2 Copyright (C
) 2003-2014 Free Software Foundation
, Inc.
3 Written by CodeSourcery
, LLC
5 This file is part of GCC.
7 GCC is free software
; you can redistribute it and
/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation
; either version
3, or (at your option
)
12 GCC is distributed in the hope that it will be useful
, but
13 WITHOUT ANY WARRANTY
; without even the implied warranty of
14 MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU
15 General Public License for more details.
17 Under Section
7 of GPL version
3, you are granted additional
18 permissions described in the GCC Runtime Library Exception
, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program
;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not
, see
24 <http
://www.gnu.org
/licenses
/>.
*/
26 /* Before using #include to read this file
, define a macro
:
28 ARM_CORE(CORE_NAME
, INTERNAL_IDENT
, TUNE_IDENT
, ARCH
, FLAGS
, COSTS
)
30 The CORE_NAME is the name of the core
, represented as a string constant.
31 The INTERNAL_IDENT is the name of the core represented as an identifier.
32 This must be unique for each entry in this table.
33 The TUNE_IDENT is the name of the core for which scheduling decisions
34 should be made
, represented as an identifier.
35 ARCH is the architecture revision implemented by the chip.
36 FLAGS are the bitwise
-or of the traits that apply to that core.
37 This need not include flags implied by the architecture.
38 COSTS is the name of the rtx_costs routine to use.
40 If you update this table
, you must update the
"tune" attribute in
43 Some tools assume no whitespace up to the first
"," in each entry.
*/
45 /* V2
/V2A Architecture Processors
*/
46 ARM_CORE("arm2", arm2
, arm2
, 2, FL_CO_PROC | FL_MODE26
, slowmul
)
47 ARM_CORE("arm250", arm250
, arm250
, 2, FL_CO_PROC | FL_MODE26
, slowmul
)
48 ARM_CORE("arm3", arm3
, arm3
, 2, FL_CO_PROC | FL_MODE26
, slowmul
)
50 /* V3 Architecture Processors
*/
51 ARM_CORE("arm6", arm6
, arm6
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
52 ARM_CORE("arm60", arm60
, arm60
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
53 ARM_CORE("arm600", arm600
, arm600
, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF
, slowmul
)
54 ARM_CORE("arm610", arm610
, arm610
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
55 ARM_CORE("arm620", arm620
, arm620
, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF
, slowmul
)
56 ARM_CORE("arm7", arm7
, arm7
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
57 ARM_CORE("arm7d", arm7d
, arm7d
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
58 ARM_CORE("arm7di", arm7di
, arm7di
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
59 ARM_CORE("arm70", arm70
, arm70
, 3, FL_CO_PROC | FL_MODE26
, slowmul
)
60 ARM_CORE("arm700", arm700
, arm700
, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF
, slowmul
)
61 ARM_CORE("arm700i", arm700i
, arm700i
, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF
, slowmul
)
62 ARM_CORE("arm710", arm710
, arm710
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
63 ARM_CORE("arm720", arm720
, arm720
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
64 ARM_CORE("arm710c", arm710c
, arm710c
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
65 ARM_CORE("arm7100", arm7100
, arm7100
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
66 ARM_CORE("arm7500", arm7500
, arm7500
, 3, FL_MODE26 | FL_WBUF
, slowmul
)
67 /* Doesn
't have an external co-proc, but does have embedded fpa. */
68 ARM_CORE("arm7500fe", arm7500fe, arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
70 /* V3M Architecture Processors */
71 /* arm7m doesn't exist on its own
, but only with D
, ("and", and I
), but
72 those don
't alter the code, so arm7m is sometimes used. */
73 ARM_CORE("arm7m", arm7m, arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
74 ARM_CORE("arm7dm", arm7dm, arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
75 ARM_CORE("arm7dmi", arm7dmi, arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
77 /* V4 Architecture Processors */
78 ARM_CORE("arm8", arm8, arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
79 ARM_CORE("arm810", arm810, arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
80 ARM_CORE("strongarm", strongarm, strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
81 ARM_CORE("strongarm110", strongarm110, strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
82 ARM_CORE("strongarm1100", strongarm1100, strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
83 ARM_CORE("strongarm1110", strongarm1110, strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
84 ARM_CORE("fa526", fa526, fa526, 4, FL_LDSCHED, fastmul)
85 ARM_CORE("fa626", fa626, fa626, 4, FL_LDSCHED, fastmul)
87 /* V4T Architecture Processors */
88 ARM_CORE("arm7tdmi", arm7tdmi, arm7tdmi, 4T, FL_CO_PROC, fastmul)
89 ARM_CORE("arm7tdmi-s", arm7tdmis, arm7tdmis, 4T, FL_CO_PROC, fastmul)
90 ARM_CORE("arm710t", arm710t, arm710t, 4T, FL_WBUF, fastmul)
91 ARM_CORE("arm720t", arm720t, arm720t, 4T, FL_WBUF, fastmul)
92 ARM_CORE("arm740t", arm740t, arm740t, 4T, FL_WBUF, fastmul)
93 ARM_CORE("arm9", arm9, arm9, 4T, FL_LDSCHED, fastmul)
94 ARM_CORE("arm9tdmi", arm9tdmi, arm9tdmi, 4T, FL_LDSCHED, fastmul)
95 ARM_CORE("arm920", arm920, arm920, 4T, FL_LDSCHED, fastmul)
96 ARM_CORE("arm920t", arm920t, arm920t, 4T, FL_LDSCHED, fastmul)
97 ARM_CORE("arm922t", arm922t, arm922t, 4T, FL_LDSCHED, fastmul)
98 ARM_CORE("arm940t", arm940t, arm940t, 4T, FL_LDSCHED, fastmul)
99 ARM_CORE("ep9312", ep9312, ep9312, 4T, FL_LDSCHED, fastmul)
101 /* V5T Architecture Processors */
102 ARM_CORE("arm10tdmi", arm10tdmi, arm10tdmi, 5T, FL_LDSCHED, fastmul)
103 ARM_CORE("arm1020t", arm1020t, arm1020t, 5T, FL_LDSCHED, fastmul)
105 /* V5TE Architecture Processors */
106 ARM_CORE("arm9e", arm9e, arm9e, 5TE, FL_LDSCHED, 9e)
107 ARM_CORE("arm946e-s", arm946es, arm946es, 5TE, FL_LDSCHED, 9e)
108 ARM_CORE("arm966e-s", arm966es, arm966es, 5TE, FL_LDSCHED, 9e)
109 ARM_CORE("arm968e-s", arm968es, arm968es, 5TE, FL_LDSCHED, 9e)
110 ARM_CORE("arm10e", arm10e, arm10e, 5TE, FL_LDSCHED, fastmul)
111 ARM_CORE("arm1020e", arm1020e, arm1020e, 5TE, FL_LDSCHED, fastmul)
112 ARM_CORE("arm1022e", arm1022e, arm1022e, 5TE, FL_LDSCHED, fastmul)
113 ARM_CORE("xscale", xscale, xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
114 ARM_CORE("iwmmxt", iwmmxt, iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
115 ARM_CORE("iwmmxt2", iwmmxt2, iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale)
116 ARM_CORE("fa606te", fa606te, fa606te, 5TE, FL_LDSCHED, 9e)
117 ARM_CORE("fa626te", fa626te, fa626te, 5TE, FL_LDSCHED, 9e)
118 ARM_CORE("fmp626", fmp626, fmp626, 5TE, FL_LDSCHED, 9e)
119 ARM_CORE("fa726te", fa726te, fa726te, 5TE, FL_LDSCHED, fa726te)
121 /* V5TEJ Architecture Processors */
122 ARM_CORE("arm926ej-s", arm926ejs, arm926ejs, 5TEJ, FL_LDSCHED, 9e)
123 ARM_CORE("arm1026ej-s", arm1026ejs, arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
125 /* V6 Architecture Processors */
126 ARM_CORE("arm1136j-s", arm1136js, arm1136js, 6J, FL_LDSCHED, 9e)
127 ARM_CORE("arm1136jf-s", arm1136jfs, arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
128 ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6ZK, FL_LDSCHED, 9e)
129 ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
130 ARM_CORE("mpcorenovfp", mpcorenovfp, mpcorenovfp, 6K, FL_LDSCHED, 9e)
131 ARM_CORE("mpcore", mpcore, mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
132 ARM_CORE("arm1156t2-s", arm1156t2s, arm1156t2s, 6T2, FL_LDSCHED, v6t2)
133 ARM_CORE("arm1156t2f-s", arm1156t2fs, arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
135 /* V6M Architecture Processors */
136 ARM_CORE("cortex-m1", cortexm1, cortexm1, 6M, FL_LDSCHED, v6m)
137 ARM_CORE("cortex-m0", cortexm0, cortexm0, 6M, FL_LDSCHED, v6m)
138 ARM_CORE("cortex-m0plus", cortexm0plus, cortexm0plus, 6M, FL_LDSCHED, v6m)
140 /* V7 Architecture Processors */
141 ARM_CORE("generic-armv7-a", genericv7a, genericv7a, 7A, FL_LDSCHED, cortex)
142 ARM_CORE("cortex-a5", cortexa5, cortexa5, 7A, FL_LDSCHED, cortex_a5)
143 ARM_CORE("cortex-a7", cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
144 ARM_CORE("cortex-a8", cortexa8, cortexa8, 7A, FL_LDSCHED, cortex_a8)
145 ARM_CORE("cortex-a9", cortexa9, cortexa9, 7A, FL_LDSCHED, cortex_a9)
146 ARM_CORE("cortex-a12", cortexa12, cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
147 ARM_CORE("cortex-a15", cortexa15, cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
148 ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, FL_LDSCHED, cortex)
149 ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, FL_LDSCHED, cortex)
150 ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
151 ARM_CORE("cortex-r7", cortexr7, cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
152 ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m)
153 ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m)
154 ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e)
156 /* V7 big.LITTLE implementations */
157 ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
159 /* V8 Architecture Processors */
160 ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, cortex_a53)
161 ARM_CORE("cortex-a57", cortexa57, cortexa15, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)
163 /* V8 big.LITTLE implementations */
164 ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)