1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 All explicitly referenced input operands may not "skip" a reg.
101 Otherwise we can have holes in the stack.
103 3. It is possible that if an input dies in an insn, reload might
104 use the input reg for an output reload. Consider this example:
106 asm ("foo" : "=t" (a) : "f" (b));
108 This asm says that input B is not popped by the asm, and that
109 the asm pushes a result onto the reg-stack, i.e., the stack is one
110 deeper after the asm than it was before. But, it is possible that
111 reload will think that it can use the same reg for both the input and
112 the output, if input B dies in this insn.
114 If any input operand uses the "f" constraint, all output reg
115 constraints must use the "&" earlyclobber.
117 The asm above would be written as
119 asm ("foo" : "=&t" (a) : "f" (b));
121 4. Some operands need to be in particular places on the stack. All
122 output operands fall in this category - there is no other way to
123 know which regs the outputs appear in unless the user indicates
124 this in the constraints.
126 Output operands must specifically indicate which reg an output
127 appears in after an asm. "=f" is not allowed: the operand
128 constraints must select a class with a single reg.
130 5. Output operands may not be "inserted" between existing stack regs.
131 Since no 387 opcode uses a read/write operand, all output operands
132 are dead before the asm_operands, and are pushed by the asm_operands.
133 It makes no sense to push anywhere but the top of the reg-stack.
135 Output operands must start at the top of the reg-stack: output
136 operands may not "skip" a reg.
138 6. Some asm statements may need extra stack space for internal
139 calculations. This can be guaranteed by clobbering stack registers
140 unrelated to the inputs and outputs.
142 Here are a couple of reasonable asms to want to write. This asm
143 takes one input, which is internally popped, and produces two outputs.
145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
147 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
148 and replaces them with one output. The user must code the "st(1)"
149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
157 #include "coretypes.h"
163 #include "insn-config.h"
164 #include "memmodel.h"
165 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
168 #include "rtl-error.h"
171 #include "cfgbuild.h"
172 #include "cfgcleanup.h"
174 #include "tree-pass.h"
175 #include "rtl-iter.h"
179 /* We use this array to cache info about insns, because otherwise we
180 spend too much time in stack_regs_mentioned_p.
182 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
183 the insn uses stack registers, two indicates the insn does not use
185 static vec
<char> stack_regs_mentioned_data
;
187 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
189 int regstack_completed
= 0;
191 /* This is the basic stack record. TOP is an index into REG[] such
192 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
194 If TOP is -2, REG[] is not yet initialized. Stack initialization
195 consists of placing each live reg in array `reg' and setting `top'
198 REG_SET indicates which registers are live. */
200 typedef struct stack_def
202 int top
; /* index to top stack element */
203 HARD_REG_SET reg_set
; /* set of live registers */
204 unsigned char reg
[REG_STACK_SIZE
];/* register - stack mapping */
207 /* This is used to carry information about basic blocks. It is
208 attached to the AUX field of the standard CFG block. */
210 typedef struct block_info_def
212 struct stack_def stack_in
; /* Input stack configuration. */
213 struct stack_def stack_out
; /* Output stack configuration. */
214 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
215 int done
; /* True if block already converted. */
216 int predecessors
; /* Number of predecessors that need
220 #define BLOCK_INFO(B) ((block_info) (B)->aux)
222 /* Passed to change_stack to indicate where to emit insns. */
229 /* The block we're currently working on. */
230 static basic_block current_block
;
232 /* In the current_block, whether we're processing the first register
233 stack or call instruction, i.e. the regstack is currently the
234 same as BLOCK_INFO(current_block)->stack_in. */
235 static bool starting_stack_p
;
237 /* This is the register file for all register after conversion. */
239 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
241 #define FP_MODE_REG(regno,mode) \
242 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
244 /* Used to initialize uninitialized registers. */
245 static rtx not_a_num
;
247 /* Forward declarations */
249 static int stack_regs_mentioned_p (const_rtx pat
);
250 static void pop_stack (stack_ptr
, int);
251 static rtx
*get_true_reg (rtx
*);
253 static int check_asm_stack_operands (rtx_insn
*);
254 static void get_asm_operands_in_out (rtx
, int *, int *);
255 static rtx
stack_result (tree
);
256 static void replace_reg (rtx
*, int);
257 static void remove_regno_note (rtx_insn
*, enum reg_note
, unsigned int);
258 static int get_hard_regnum (stack_ptr
, rtx
);
259 static rtx_insn
*emit_pop_insn (rtx_insn
*, stack_ptr
, rtx
, enum emit_where
);
260 static void swap_to_top (rtx_insn
*, stack_ptr
, rtx
, rtx
);
261 static bool move_for_stack_reg (rtx_insn
*, stack_ptr
, rtx
);
262 static bool move_nan_for_stack_reg (rtx_insn
*, stack_ptr
, rtx
);
263 static int swap_rtx_condition_1 (rtx
);
264 static int swap_rtx_condition (rtx_insn
*);
265 static void compare_for_stack_reg (rtx_insn
*, stack_ptr
, rtx
, bool);
266 static bool subst_stack_regs_pat (rtx_insn
*, stack_ptr
, rtx
);
267 static void subst_asm_stack_regs (rtx_insn
*, stack_ptr
);
268 static bool subst_stack_regs (rtx_insn
*, stack_ptr
);
269 static void change_stack (rtx_insn
*, stack_ptr
, stack_ptr
, enum emit_where
);
270 static void print_stack (FILE *, stack_ptr
);
271 static rtx_insn
*next_flags_user (rtx_insn
*);
273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 stack_regs_mentioned_p (const_rtx pat
)
281 if (STACK_REG_P (pat
))
284 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
285 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
291 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
292 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
295 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
302 /* Return nonzero if INSN mentions stacked registers, else return zero. */
305 stack_regs_mentioned (const_rtx insn
)
307 unsigned int uid
, max
;
310 if (! INSN_P (insn
) || !stack_regs_mentioned_data
.exists ())
313 uid
= INSN_UID (insn
);
314 max
= stack_regs_mentioned_data
.length ();
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max
= uid
+ uid
/ 20 + 1;
320 stack_regs_mentioned_data
.safe_grow_cleared (max
);
323 test
= stack_regs_mentioned_data
[uid
];
326 /* This insn has yet to be examined. Do so now. */
327 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
328 stack_regs_mentioned_data
[uid
] = test
;
334 static rtx ix86_flags_rtx
;
337 next_flags_user (rtx_insn
*insn
)
339 /* Search forward looking for the first use of this value.
340 Stop at block boundaries. */
342 while (insn
!= BB_END (current_block
))
344 insn
= NEXT_INSN (insn
);
346 if (INSN_P (insn
) && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
355 /* Reorganize the stack into ascending numbers, before this insn. */
358 straighten_stack (rtx_insn
*insn
, stack_ptr regstack
)
360 struct stack_def temp_stack
;
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
366 Similarly if the stack is empty. */
367 if (regstack
->top
<= 0)
370 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
372 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
373 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
375 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
378 /* Pop a register from the stack. */
381 pop_stack (stack_ptr regstack
, int regno
)
383 int top
= regstack
->top
;
385 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
387 /* If regno was not at the top of stack then adjust stack. */
388 if (regstack
->reg
[top
] != regno
)
391 for (i
= regstack
->top
; i
>= 0; i
--)
392 if (regstack
->reg
[i
] == regno
)
395 for (j
= i
; j
< top
; j
++)
396 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
402 /* Return a pointer to the REG expression within PAT. If PAT is not a
403 REG, possible enclosed by a conversion rtx, return the inner part of
404 PAT that stopped the search. */
407 get_true_reg (rtx
*pat
)
410 switch (GET_CODE (*pat
))
413 /* Eliminate FP subregister accesses in favor of the
414 actual FP register in use. */
416 rtx subreg
= SUBREG_REG (*pat
);
418 if (STACK_REG_P (subreg
))
420 int regno_off
= subreg_regno_offset (REGNO (subreg
),
424 *pat
= FP_MODE_REG (REGNO (subreg
) + regno_off
,
428 pat
= &XEXP (*pat
, 0);
433 if (!flag_unsafe_math_optimizations
)
440 pat
= &XEXP (*pat
, 0);
444 if (XINT (*pat
, 1) == UNSPEC_TRUNC_NOOP
445 || XINT (*pat
, 1) == UNSPEC_FILD_ATOMIC
)
446 pat
= &XVECEXP (*pat
, 0, 0);
454 /* Set if we find any malformed asms in a block. */
455 static bool any_malformed_asm
;
457 /* There are many rules that an asm statement for stack-like regs must
458 follow. Those rules are explained at the top of this file: the rule
459 numbers below refer to that explanation. */
462 check_asm_stack_operands (rtx_insn
*insn
)
466 int malformed_asm
= 0;
467 rtx body
= PATTERN (insn
);
469 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
470 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
471 char explicitly_used
[FIRST_PSEUDO_REGISTER
];
473 rtx
*clobber_reg
= 0;
474 int n_inputs
, n_outputs
;
476 /* Find out what the constraints require. If no constraint
477 alternative matches, this asm is malformed. */
478 extract_constrain_insn (insn
);
480 preprocess_constraints (insn
);
482 get_asm_operands_in_out (body
, &n_outputs
, &n_inputs
);
484 if (which_alternative
< 0)
487 /* Avoid further trouble with this insn. */
488 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
491 const operand_alternative
*op_alt
= which_op_alt ();
493 /* Strip SUBREGs here to make the following code simpler. */
494 for (i
= 0; i
< recog_data
.n_operands
; i
++)
495 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
496 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
497 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
499 /* Set up CLOBBER_REG. */
503 if (GET_CODE (body
) == PARALLEL
)
505 clobber_reg
= XALLOCAVEC (rtx
, XVECLEN (body
, 0));
507 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
508 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
510 rtx clobber
= XVECEXP (body
, 0, i
);
511 rtx reg
= XEXP (clobber
, 0);
513 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
514 reg
= SUBREG_REG (reg
);
516 if (STACK_REG_P (reg
))
518 clobber_reg
[n_clobbers
] = reg
;
524 /* Enforce rule #4: Output operands must specifically indicate which
525 reg an output appears in after an asm. "=f" is not allowed: the
526 operand constraints must select a class with a single reg.
528 Also enforce rule #5: Output operands must start at the top of
529 the reg-stack: output operands may not "skip" a reg. */
531 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
532 for (i
= 0; i
< n_outputs
; i
++)
533 if (STACK_REG_P (recog_data
.operand
[i
]))
535 if (reg_class_size
[(int) op_alt
[i
].cl
] != 1)
537 error_for_asm (insn
, "output constraint %d must specify a single register", i
);
544 for (j
= 0; j
< n_clobbers
; j
++)
545 if (REGNO (recog_data
.operand
[i
]) == REGNO (clobber_reg
[j
]))
547 error_for_asm (insn
, "output constraint %d cannot be specified together with \"%s\" clobber",
548 i
, reg_names
[REGNO (clobber_reg
[j
])]);
553 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
558 /* Search for first non-popped reg. */
559 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
560 if (! reg_used_as_output
[i
])
563 /* If there are any other popped regs, that's an error. */
564 for (; i
< LAST_STACK_REG
+ 1; i
++)
565 if (reg_used_as_output
[i
])
568 if (i
!= LAST_STACK_REG
+ 1)
570 error_for_asm (insn
, "output regs must be grouped at top of stack");
574 /* Enforce rule #2: All implicitly popped input regs must be closer
575 to the top of the reg-stack than any input that is not implicitly
578 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
579 memset (explicitly_used
, 0, sizeof (explicitly_used
));
580 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
581 if (STACK_REG_P (recog_data
.operand
[i
]))
583 /* An input reg is implicitly popped if it is tied to an
584 output, or if there is a CLOBBER for it. */
587 for (j
= 0; j
< n_clobbers
; j
++)
588 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
591 if (j
< n_clobbers
|| op_alt
[i
].matches
>= 0)
592 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
593 else if (reg_class_size
[(int) op_alt
[i
].cl
] == 1)
594 explicitly_used
[REGNO (recog_data
.operand
[i
])] = 1;
597 /* Search for first non-popped reg. */
598 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
599 if (! implicitly_dies
[i
])
602 /* If there are any other popped regs, that's an error. */
603 for (; i
< LAST_STACK_REG
+ 1; i
++)
604 if (implicitly_dies
[i
])
607 if (i
!= LAST_STACK_REG
+ 1)
610 "implicitly popped regs must be grouped at top of stack");
614 /* Search for first not-explicitly used reg. */
615 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
616 if (! implicitly_dies
[i
] && ! explicitly_used
[i
])
619 /* If there are any other explicitly used regs, that's an error. */
620 for (; i
< LAST_STACK_REG
+ 1; i
++)
621 if (explicitly_used
[i
])
624 if (i
!= LAST_STACK_REG
+ 1)
627 "explicitly used regs must be grouped at top of stack");
631 /* Enforce rule #3: If any input operand uses the "f" constraint, all
632 output constraints must use the "&" earlyclobber.
634 ??? Detect this more deterministically by having constrain_asm_operands
635 record any earlyclobber. */
637 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
638 if (STACK_REG_P (recog_data
.operand
[i
]) && op_alt
[i
].matches
== -1)
642 for (j
= 0; j
< n_outputs
; j
++)
643 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
646 "output operand %d must use %<&%> constraint", j
);
653 /* Avoid further trouble with this insn. */
654 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
655 any_malformed_asm
= true;
662 /* Calculate the number of inputs and outputs in BODY, an
663 asm_operands. N_OPERANDS is the total number of operands, and
664 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
668 get_asm_operands_in_out (rtx body
, int *pout
, int *pin
)
670 rtx asmop
= extract_asm_operands (body
);
672 *pin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
673 *pout
= (recog_data
.n_operands
674 - ASM_OPERANDS_INPUT_LENGTH (asmop
)
675 - ASM_OPERANDS_LABEL_LENGTH (asmop
));
678 /* If current function returns its result in an fp stack register,
679 return the REG. Otherwise, return 0. */
682 stack_result (tree decl
)
686 /* If the value is supposed to be returned in memory, then clearly
687 it is not returned in a stack register. */
688 if (aggregate_value_p (DECL_RESULT (decl
), decl
))
691 result
= DECL_RTL_IF_SET (DECL_RESULT (decl
));
693 result
= targetm
.calls
.function_value (TREE_TYPE (DECL_RESULT (decl
)),
696 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
701 * This section deals with stack register substitution, and forms the second
705 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
706 the desired hard REGNO. */
709 replace_reg (rtx
*reg
, int regno
)
711 gcc_assert (IN_RANGE (regno
, FIRST_STACK_REG
, LAST_STACK_REG
));
712 gcc_assert (STACK_REG_P (*reg
));
714 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg
))
715 || GET_MODE_CLASS (GET_MODE (*reg
)) == MODE_COMPLEX_FLOAT
);
717 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
720 /* Remove a note of type NOTE, which must be found, for register
721 number REGNO from INSN. Remove only one such note. */
724 remove_regno_note (rtx_insn
*insn
, enum reg_note note
, unsigned int regno
)
726 rtx
*note_link
, this_rtx
;
728 note_link
= ®_NOTES (insn
);
729 for (this_rtx
= *note_link
; this_rtx
; this_rtx
= XEXP (this_rtx
, 1))
730 if (REG_NOTE_KIND (this_rtx
) == note
731 && REG_P (XEXP (this_rtx
, 0)) && REGNO (XEXP (this_rtx
, 0)) == regno
)
733 *note_link
= XEXP (this_rtx
, 1);
737 note_link
= &XEXP (this_rtx
, 1);
742 /* Find the hard register number of virtual register REG in REGSTACK.
743 The hard register number is relative to the top of the stack. -1 is
744 returned if the register is not found. */
747 get_hard_regnum (stack_ptr regstack
, rtx reg
)
751 gcc_assert (STACK_REG_P (reg
));
753 for (i
= regstack
->top
; i
>= 0; i
--)
754 if (regstack
->reg
[i
] == REGNO (reg
))
757 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
760 /* Emit an insn to pop virtual register REG before or after INSN.
761 REGSTACK is the stack state after INSN and is updated to reflect this
762 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
763 is represented as a SET whose destination is the register to be popped
764 and source is the top of stack. A death note for the top of stack
765 cases the movdf pattern to pop. */
768 emit_pop_insn (rtx_insn
*insn
, stack_ptr regstack
, rtx reg
, enum emit_where where
)
774 /* For complex types take care to pop both halves. These may survive in
775 CLOBBER and USE expressions. */
776 if (COMPLEX_MODE_P (GET_MODE (reg
)))
778 rtx reg1
= FP_MODE_REG (REGNO (reg
), DFmode
);
779 rtx reg2
= FP_MODE_REG (REGNO (reg
) + 1, DFmode
);
782 if (get_hard_regnum (regstack
, reg1
) >= 0)
783 pop_insn
= emit_pop_insn (insn
, regstack
, reg1
, where
);
784 if (get_hard_regnum (regstack
, reg2
) >= 0)
785 pop_insn
= emit_pop_insn (insn
, regstack
, reg2
, where
);
786 gcc_assert (pop_insn
);
790 hard_regno
= get_hard_regnum (regstack
, reg
);
792 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
794 pop_rtx
= gen_rtx_SET (FP_MODE_REG (hard_regno
, DFmode
),
795 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
797 if (where
== EMIT_AFTER
)
798 pop_insn
= emit_insn_after (pop_rtx
, insn
);
800 pop_insn
= emit_insn_before (pop_rtx
, insn
);
802 add_reg_note (pop_insn
, REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
804 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
805 = regstack
->reg
[regstack
->top
];
807 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
812 /* Emit an insn before or after INSN to swap virtual register REG with
813 the top of stack. REGSTACK is the stack state before the swap, and
814 is updated to reflect the swap. A swap insn is represented as a
815 PARALLEL of two patterns: each pattern moves one reg to the other.
817 If REG is already at the top of the stack, no insn is emitted. */
820 emit_swap_insn (rtx_insn
*insn
, stack_ptr regstack
, rtx reg
)
824 int other_reg
; /* swap regno temps */
825 rtx_insn
*i1
; /* the stack-reg insn prior to INSN */
826 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
828 hard_regno
= get_hard_regnum (regstack
, reg
);
830 if (hard_regno
== FIRST_STACK_REG
)
832 if (hard_regno
== -1)
834 /* Something failed if the register wasn't on the stack. If we had
835 malformed asms, we zapped the instruction itself, but that didn't
836 produce the same pattern of register sets as before. To prevent
837 further failure, adjust REGSTACK to include REG at TOP. */
838 gcc_assert (any_malformed_asm
);
839 regstack
->reg
[++regstack
->top
] = REGNO (reg
);
842 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
844 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
845 std::swap (regstack
->reg
[regstack
->top
], regstack
->reg
[other_reg
]);
847 /* Find the previous insn involving stack regs, but don't pass a
850 if (current_block
&& insn
!= BB_HEAD (current_block
))
852 rtx_insn
*tmp
= PREV_INSN (insn
);
853 rtx_insn
*limit
= PREV_INSN (BB_HEAD (current_block
));
858 || NOTE_INSN_BASIC_BLOCK_P (tmp
)
859 || (NONJUMP_INSN_P (tmp
)
860 && stack_regs_mentioned (tmp
)))
865 tmp
= PREV_INSN (tmp
);
870 && (i1set
= single_set (i1
)) != NULL_RTX
)
872 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
873 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
875 /* If the previous register stack push was from the reg we are to
876 swap with, omit the swap. */
878 if (REG_P (i1dest
) && REGNO (i1dest
) == FIRST_STACK_REG
880 && REGNO (i1src
) == (unsigned) hard_regno
- 1
881 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
884 /* If the previous insn wrote to the reg we are to swap with,
887 if (REG_P (i1dest
) && REGNO (i1dest
) == (unsigned) hard_regno
888 && REG_P (i1src
) && REGNO (i1src
) == FIRST_STACK_REG
889 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
899 if possible. Similarly for fld1, fldz, fldpi etc. instead of any
900 of the loads or for float extension from memory. */
902 i1src
= SET_SRC (i1set
);
903 if (GET_CODE (i1src
) == FLOAT_EXTEND
)
904 i1src
= XEXP (i1src
, 0);
906 && REGNO (i1dest
) == FIRST_STACK_REG
907 && (MEM_P (i1src
) || GET_CODE (i1src
) == CONST_DOUBLE
)
908 && !side_effects_p (i1src
)
909 && hard_regno
== FIRST_STACK_REG
+ 1
910 && i1
!= BB_HEAD (current_block
))
912 /* i1 is the last insn that involves stack regs before insn, and
913 is known to be a load without other side-effects, i.e. fld b
914 in the above comment. */
917 rtx_insn
*tmp
= PREV_INSN (i1
);
918 rtx_insn
*limit
= PREV_INSN (BB_HEAD (current_block
));
919 /* Find the previous insn involving stack regs, but don't pass a
925 || NOTE_INSN_BASIC_BLOCK_P (tmp
)
926 || (NONJUMP_INSN_P (tmp
)
927 && stack_regs_mentioned (tmp
)))
932 tmp
= PREV_INSN (tmp
);
935 && (i2set
= single_set (i2
)) != NULL_RTX
)
937 rtx i2dest
= *get_true_reg (&SET_DEST (i2set
));
938 rtx i2src
= SET_SRC (i2set
);
939 if (GET_CODE (i2src
) == FLOAT_EXTEND
)
940 i2src
= XEXP (i2src
, 0);
941 /* If the last two insns before insn that involve
942 stack regs are loads, where the latter (i1)
943 pushes onto the register stack and thus
944 moves the value from the first load (i2) from
945 %st to %st(1), consider swapping them. */
947 && REGNO (i2dest
) == FIRST_STACK_REG
948 && (MEM_P (i2src
) || GET_CODE (i2src
) == CONST_DOUBLE
)
949 /* Ensure i2 doesn't have other side-effects. */
950 && !side_effects_p (i2src
)
951 /* And that the two instructions can actually be
952 swapped, i.e. there shouldn't be any stores
953 in between i2 and i1 that might alias with
954 the i1 memory, and the memory address can't
955 use registers set in between i2 and i1. */
956 && !modified_between_p (SET_SRC (i1set
), i2
, i1
))
958 /* Move i1 (fld b above) right before i2 (fld a
961 SET_PREV_INSN (i1
) = NULL_RTX
;
962 SET_NEXT_INSN (i1
) = NULL_RTX
;
963 set_block_for_insn (i1
, NULL
);
964 emit_insn_before (i1
, i2
);
971 /* Avoid emitting the swap if this is the first register stack insn
972 of the current_block. Instead update the current_block's stack_in
973 and let compensate edges take care of this for us. */
974 if (current_block
&& starting_stack_p
)
976 BLOCK_INFO (current_block
)->stack_in
= *regstack
;
977 starting_stack_p
= false;
981 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
982 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
985 emit_insn_after (swap_rtx
, i1
);
986 else if (current_block
)
987 emit_insn_before (swap_rtx
, BB_HEAD (current_block
));
989 emit_insn_before (swap_rtx
, insn
);
992 /* Emit an insns before INSN to swap virtual register SRC1 with
993 the top of stack and virtual register SRC2 with second stack
994 slot. REGSTACK is the stack state before the swaps, and
995 is updated to reflect the swaps. A swap insn is represented as a
996 PARALLEL of two patterns: each pattern moves one reg to the other.
998 If SRC1 and/or SRC2 are already at the right place, no swap insn
1002 swap_to_top (rtx_insn
*insn
, stack_ptr regstack
, rtx src1
, rtx src2
)
1004 struct stack_def temp_stack
;
1007 temp_stack
= *regstack
;
1009 /* Place operand 1 at the top of stack. */
1010 regno
= get_hard_regnum (&temp_stack
, src1
);
1011 gcc_assert (regno
>= 0);
1012 if (regno
!= FIRST_STACK_REG
)
1014 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
1017 std::swap (temp_stack
.reg
[j
], temp_stack
.reg
[k
]);
1020 /* Place operand 2 next on the stack. */
1021 regno
= get_hard_regnum (&temp_stack
, src2
);
1022 gcc_assert (regno
>= 0);
1023 if (regno
!= FIRST_STACK_REG
+ 1)
1025 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
1026 j
= temp_stack
.top
- 1;
1028 std::swap (temp_stack
.reg
[j
], temp_stack
.reg
[k
]);
1031 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
1034 /* Handle a move to or from a stack register in PAT, which is in INSN.
1035 REGSTACK is the current stack. Return whether a control flow insn
1036 was deleted in the process. */
1039 move_for_stack_reg (rtx_insn
*insn
, stack_ptr regstack
, rtx pat
)
1041 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1042 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1045 bool control_flow_insn_deleted
= false;
1047 src
= *psrc
; dest
= *pdest
;
1049 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1051 /* Write from one stack reg to another. If SRC dies here, then
1052 just change the register mapping and delete the insn. */
1054 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1059 /* If this is a no-op move, there must not be a REG_DEAD note. */
1060 gcc_assert (REGNO (src
) != REGNO (dest
));
1062 for (i
= regstack
->top
; i
>= 0; i
--)
1063 if (regstack
->reg
[i
] == REGNO (src
))
1066 /* The destination must be dead, or life analysis is borked. */
1067 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
1069 /* If the source is not live, this is yet another case of
1070 uninitialized variables. Load up a NaN instead. */
1072 return move_nan_for_stack_reg (insn
, regstack
, dest
);
1074 /* It is possible that the dest is unused after this insn.
1075 If so, just pop the src. */
1077 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1078 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1081 regstack
->reg
[i
] = REGNO (dest
);
1082 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1083 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1086 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1088 return control_flow_insn_deleted
;
1091 /* The source reg does not die. */
1093 /* If this appears to be a no-op move, delete it, or else it
1094 will confuse the machine description output patterns. But if
1095 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1096 for REG_UNUSED will not work for deleted insns. */
1098 if (REGNO (src
) == REGNO (dest
))
1100 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1101 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1103 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1105 return control_flow_insn_deleted
;
1108 /* The destination ought to be dead. */
1109 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1110 gcc_assert (any_malformed_asm
);
1113 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1115 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1116 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1117 replace_reg (pdest
, FIRST_STACK_REG
);
1120 else if (STACK_REG_P (src
))
1122 /* Save from a stack reg to MEM, or possibly integer reg. Since
1123 only top of stack may be saved, emit an exchange first if
1126 emit_swap_insn (insn
, regstack
, src
);
1128 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1131 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1133 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1135 else if ((GET_MODE (src
) == XFmode
)
1136 && regstack
->top
< REG_STACK_SIZE
- 1)
1138 /* A 387 cannot write an XFmode value to a MEM without
1139 clobbering the source reg. The output code can handle
1140 this by reading back the value from the MEM.
1141 But it is more efficient to use a temp register if one is
1142 available. Push the source value here if the register
1143 stack is not full, and then write the value to memory via
1146 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, GET_MODE (src
));
1148 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1149 emit_insn_before (push_rtx
, insn
);
1150 add_reg_note (insn
, REG_DEAD
, top_stack_reg
);
1153 replace_reg (psrc
, FIRST_STACK_REG
);
1157 rtx pat
= PATTERN (insn
);
1159 gcc_assert (STACK_REG_P (dest
));
1161 /* Load from MEM, or possibly integer REG or constant, into the
1162 stack regs. The actual target is always the top of the
1163 stack. The stack mapping is changed to reflect that DEST is
1164 now at top of stack. */
1166 /* The destination ought to be dead. However, there is a
1167 special case with i387 UNSPEC_TAN, where destination is live
1168 (an argument to fptan) but inherent load of 1.0 is modelled
1169 as a load from a constant. */
1170 if (GET_CODE (pat
) == PARALLEL
1171 && XVECLEN (pat
, 0) == 2
1172 && GET_CODE (XVECEXP (pat
, 0, 1)) == SET
1173 && GET_CODE (SET_SRC (XVECEXP (pat
, 0, 1))) == UNSPEC
1174 && XINT (SET_SRC (XVECEXP (pat
, 0, 1)), 1) == UNSPEC_TAN
)
1175 emit_swap_insn (insn
, regstack
, dest
);
1177 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
1178 || any_malformed_asm
);
1180 gcc_assert (regstack
->top
< REG_STACK_SIZE
);
1182 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1183 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1184 replace_reg (pdest
, FIRST_STACK_REG
);
1187 return control_flow_insn_deleted
;
1190 /* A helper function which replaces INSN with a pattern that loads up
1191 a NaN into DEST, then invokes move_for_stack_reg. */
1194 move_nan_for_stack_reg (rtx_insn
*insn
, stack_ptr regstack
, rtx dest
)
1198 dest
= FP_MODE_REG (REGNO (dest
), SFmode
);
1199 pat
= gen_rtx_SET (dest
, not_a_num
);
1200 PATTERN (insn
) = pat
;
1201 INSN_CODE (insn
) = -1;
1203 return move_for_stack_reg (insn
, regstack
, pat
);
1206 /* Swap the condition on a branch, if there is one. Return true if we
1207 found a condition to swap. False if the condition was not used as
1211 swap_rtx_condition_1 (rtx pat
)
1216 if (COMPARISON_P (pat
))
1218 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1223 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1224 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1230 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1231 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1233 else if (fmt
[i
] == 'e')
1234 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1242 swap_rtx_condition (rtx_insn
*insn
)
1244 rtx pat
= PATTERN (insn
);
1246 /* We're looking for a single set to cc0 or an HImode temporary. */
1248 if (GET_CODE (pat
) == SET
1249 && REG_P (SET_DEST (pat
))
1250 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1252 insn
= next_flags_user (insn
);
1253 if (insn
== NULL_RTX
)
1255 pat
= PATTERN (insn
);
1258 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1259 with the cc value right now. We may be able to search for one
1262 if (GET_CODE (pat
) == SET
1263 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1264 && XINT (SET_SRC (pat
), 1) == UNSPEC_FNSTSW
)
1266 rtx dest
= SET_DEST (pat
);
1268 /* Search forward looking for the first use of this value.
1269 Stop at block boundaries. */
1270 while (insn
!= BB_END (current_block
))
1272 insn
= NEXT_INSN (insn
);
1273 if (INSN_P (insn
) && reg_mentioned_p (dest
, insn
))
1279 /* We haven't found it. */
1280 if (insn
== BB_END (current_block
))
1283 /* So we've found the insn using this value. If it is anything
1284 other than sahf or the value does not die (meaning we'd have
1285 to search further), then we must give up. */
1286 pat
= PATTERN (insn
);
1287 if (GET_CODE (pat
) != SET
1288 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1289 || XINT (SET_SRC (pat
), 1) != UNSPEC_SAHF
1290 || ! dead_or_set_p (insn
, dest
))
1293 /* Now we are prepared to handle this as a normal cc0 setter. */
1294 insn
= next_flags_user (insn
);
1295 if (insn
== NULL_RTX
)
1297 pat
= PATTERN (insn
);
1300 if (swap_rtx_condition_1 (pat
))
1303 INSN_CODE (insn
) = -1;
1304 if (recog_memoized (insn
) == -1)
1306 /* In case the flags don't die here, recurse to try fix
1307 following user too. */
1308 else if (! dead_or_set_p (insn
, ix86_flags_rtx
))
1310 insn
= next_flags_user (insn
);
1311 if (!insn
|| !swap_rtx_condition (insn
))
1316 swap_rtx_condition_1 (pat
);
1324 /* Handle a comparison. Special care needs to be taken to avoid
1325 causing comparisons that a 387 cannot do correctly, such as EQ.
1327 Also, a pop insn may need to be emitted. The 387 does have an
1328 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1329 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1333 compare_for_stack_reg (rtx_insn
*insn
, stack_ptr regstack
,
1334 rtx pat_src
, bool can_pop_second_op
)
1337 rtx src1_note
, src2_note
;
1339 src1
= get_true_reg (&XEXP (pat_src
, 0));
1340 src2
= get_true_reg (&XEXP (pat_src
, 1));
1342 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1343 registers that die in this insn - move those to stack top first. */
1344 if ((! STACK_REG_P (*src1
)
1345 || (STACK_REG_P (*src2
)
1346 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1347 && swap_rtx_condition (insn
))
1349 std::swap (XEXP (pat_src
, 0), XEXP (pat_src
, 1));
1351 src1
= get_true_reg (&XEXP (pat_src
, 0));
1352 src2
= get_true_reg (&XEXP (pat_src
, 1));
1354 INSN_CODE (insn
) = -1;
1357 /* We will fix any death note later. */
1359 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1361 if (STACK_REG_P (*src2
))
1362 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1364 src2_note
= NULL_RTX
;
1366 emit_swap_insn (insn
, regstack
, *src1
);
1368 replace_reg (src1
, FIRST_STACK_REG
);
1370 if (STACK_REG_P (*src2
))
1371 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1375 if (*src2
== CONST0_RTX (GET_MODE (*src2
)))
1377 /* This is `ftst' insn that can't pop register. */
1378 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src1_note
, 0)));
1379 emit_pop_insn (insn
, regstack
, XEXP (src1_note
, 0),
1384 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1385 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1389 /* If the second operand dies, handle that. But if the operands are
1390 the same stack register, don't bother, because only one death is
1391 needed, and it was just handled. */
1394 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1395 && REGNO (*src1
) == REGNO (*src2
)))
1397 /* As a special case, two regs may die in this insn if src2 is
1398 next to top of stack and the top of stack also dies. Since
1399 we have already popped src1, "next to top of stack" is really
1400 at top (FIRST_STACK_REG) now. */
1402 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1403 && src1_note
&& can_pop_second_op
)
1405 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1406 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1410 /* The 386 can only represent death of the first operand in
1411 the case handled above. In all other cases, emit a separate
1412 pop and remove the death note from here. */
1413 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1414 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1420 /* Substitute hardware stack regs in debug insn INSN, using stack
1421 layout REGSTACK. If we can't find a hardware stack reg for any of
1422 the REGs in it, reset the debug insn. */
1425 subst_all_stack_regs_in_debug_insn (rtx_insn
*insn
, struct stack_def
*regstack
)
1427 subrtx_ptr_iterator::array_type array
;
1428 FOR_EACH_SUBRTX_PTR (iter
, array
, &INSN_VAR_LOCATION_LOC (insn
), NONCONST
)
1432 if (STACK_REG_P (x
))
1434 int hard_regno
= get_hard_regnum (regstack
, x
);
1436 /* If we can't find an active register, reset this debug insn. */
1437 if (hard_regno
== -1)
1439 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
1443 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
1444 replace_reg (loc
, hard_regno
);
1445 iter
.skip_subrtxes ();
1450 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1451 is the current register layout. Return whether a control flow insn
1452 was deleted in the process. */
1455 subst_stack_regs_pat (rtx_insn
*insn
, stack_ptr regstack
, rtx pat
)
1458 bool control_flow_insn_deleted
= false;
1460 switch (GET_CODE (pat
))
1463 /* Deaths in USE insns can happen in non optimizing compilation.
1464 Handle them by popping the dying register. */
1465 src
= get_true_reg (&XEXP (pat
, 0));
1466 if (STACK_REG_P (*src
)
1467 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1469 /* USEs are ignored for liveness information so USEs of dead
1470 register might happen. */
1471 if (TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
)))
1472 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1473 return control_flow_insn_deleted
;
1475 /* Uninitialized USE might happen for functions returning uninitialized
1476 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1477 so it is safe to ignore the use here. This is consistent with behavior
1478 of dataflow analyzer that ignores USE too. (This also imply that
1479 forcibly initializing the register to NaN here would lead to ICE later,
1480 since the REG_DEAD notes are not issued.) */
1490 dest
= get_true_reg (&XEXP (pat
, 0));
1491 if (STACK_REG_P (*dest
))
1493 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1495 if (pat
!= PATTERN (insn
))
1497 /* The fix_truncdi_1 pattern wants to be able to
1498 allocate its own scratch register. It does this by
1499 clobbering an fp reg so that it is assured of an
1500 empty reg-stack register. If the register is live,
1501 kill it now. Remove the DEAD/UNUSED note so we
1502 don't try to kill it later too.
1504 In reality the UNUSED note can be absent in some
1505 complicated cases when the register is reused for
1506 partially set variable. */
1509 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1511 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1513 remove_note (insn
, note
);
1514 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1518 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1519 indicates an uninitialized value. Because reload removed
1520 all other clobbers, this must be due to a function
1521 returning without a value. Load up a NaN. */
1526 if (COMPLEX_MODE_P (GET_MODE (t
)))
1528 rtx u
= FP_MODE_REG (REGNO (t
) + 1, SFmode
);
1529 if (get_hard_regnum (regstack
, u
) == -1)
1531 rtx pat2
= gen_rtx_CLOBBER (VOIDmode
, u
);
1532 rtx_insn
*insn2
= emit_insn_before (pat2
, insn
);
1533 control_flow_insn_deleted
1534 |= move_nan_for_stack_reg (insn2
, regstack
, u
);
1537 if (get_hard_regnum (regstack
, t
) == -1)
1538 control_flow_insn_deleted
1539 |= move_nan_for_stack_reg (insn
, regstack
, t
);
1548 rtx
*src1
= (rtx
*) 0, *src2
;
1549 rtx src1_note
, src2_note
;
1552 dest
= get_true_reg (&SET_DEST (pat
));
1553 src
= get_true_reg (&SET_SRC (pat
));
1554 pat_src
= SET_SRC (pat
);
1556 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1557 if (STACK_REG_P (*src
)
1558 || (STACK_REG_P (*dest
)
1559 && (REG_P (*src
) || MEM_P (*src
)
1560 || CONST_DOUBLE_P (*src
))))
1562 control_flow_insn_deleted
|= move_for_stack_reg (insn
, regstack
, pat
);
1566 switch (GET_CODE (pat_src
))
1571 for (count
= REG_NREGS (*dest
); --count
>= 0;)
1573 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1574 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1577 replace_reg (dest
, FIRST_STACK_REG
);
1581 /* This is a `tstM2' case. */
1582 gcc_assert (*dest
== cc0_rtx
);
1587 case FLOAT_TRUNCATE
:
1591 /* These insns only operate on the top of the stack. DEST might
1592 be cc0_rtx if we're processing a tstM pattern. Also, it's
1593 possible that the tstM case results in a REG_DEAD note on the
1597 src1
= get_true_reg (&XEXP (pat_src
, 0));
1599 emit_swap_insn (insn
, regstack
, *src1
);
1601 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1603 if (STACK_REG_P (*dest
))
1604 replace_reg (dest
, FIRST_STACK_REG
);
1608 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1610 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1613 replace_reg (src1
, FIRST_STACK_REG
);
1618 /* On i386, reversed forms of subM3 and divM3 exist for
1619 MODE_FLOAT, so the same code that works for addM3 and mulM3
1623 /* These insns can accept the top of stack as a destination
1624 from a stack reg or mem, or can use the top of stack as a
1625 source and some other stack register (possibly top of stack)
1626 as a destination. */
1628 src1
= get_true_reg (&XEXP (pat_src
, 0));
1629 src2
= get_true_reg (&XEXP (pat_src
, 1));
1631 /* We will fix any death note later. */
1633 if (STACK_REG_P (*src1
))
1634 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1636 src1_note
= NULL_RTX
;
1637 if (STACK_REG_P (*src2
))
1638 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1640 src2_note
= NULL_RTX
;
1642 /* If either operand is not a stack register, then the dest
1643 must be top of stack. */
1645 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1646 emit_swap_insn (insn
, regstack
, *dest
);
1649 /* Both operands are REG. If neither operand is already
1650 at the top of stack, choose to make the one that is the
1651 dest the new top of stack. */
1653 int src1_hard_regnum
, src2_hard_regnum
;
1655 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1656 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1658 /* If the source is not live, this is yet another case of
1659 uninitialized variables. Load up a NaN instead. */
1660 if (src1_hard_regnum
== -1)
1662 rtx pat2
= gen_rtx_CLOBBER (VOIDmode
, *src1
);
1663 rtx_insn
*insn2
= emit_insn_before (pat2
, insn
);
1664 control_flow_insn_deleted
1665 |= move_nan_for_stack_reg (insn2
, regstack
, *src1
);
1667 if (src2_hard_regnum
== -1)
1669 rtx pat2
= gen_rtx_CLOBBER (VOIDmode
, *src2
);
1670 rtx_insn
*insn2
= emit_insn_before (pat2
, insn
);
1671 control_flow_insn_deleted
1672 |= move_nan_for_stack_reg (insn2
, regstack
, *src2
);
1675 if (src1_hard_regnum
!= FIRST_STACK_REG
1676 && src2_hard_regnum
!= FIRST_STACK_REG
)
1677 emit_swap_insn (insn
, regstack
, *dest
);
1680 if (STACK_REG_P (*src1
))
1681 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1682 if (STACK_REG_P (*src2
))
1683 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1687 rtx src1_reg
= XEXP (src1_note
, 0);
1689 /* If the register that dies is at the top of stack, then
1690 the destination is somewhere else - merely substitute it.
1691 But if the reg that dies is not at top of stack, then
1692 move the top of stack to the dead reg, as though we had
1693 done the insn and then a store-with-pop. */
1695 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1697 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1698 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1702 int regno
= get_hard_regnum (regstack
, src1_reg
);
1704 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1705 replace_reg (dest
, regno
);
1707 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1708 = regstack
->reg
[regstack
->top
];
1711 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1712 REGNO (XEXP (src1_note
, 0)));
1713 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1718 rtx src2_reg
= XEXP (src2_note
, 0);
1719 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1721 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1722 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1726 int regno
= get_hard_regnum (regstack
, src2_reg
);
1728 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1729 replace_reg (dest
, regno
);
1731 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1732 = regstack
->reg
[regstack
->top
];
1735 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1736 REGNO (XEXP (src2_note
, 0)));
1737 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1742 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1743 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1746 /* Keep operand 1 matching with destination. */
1747 if (COMMUTATIVE_ARITH_P (pat_src
)
1748 && REG_P (*src1
) && REG_P (*src2
)
1749 && REGNO (*src1
) != REGNO (*dest
))
1751 int tmp
= REGNO (*src1
);
1752 replace_reg (src1
, REGNO (*src2
));
1753 replace_reg (src2
, tmp
);
1758 switch (XINT (pat_src
, 1))
1761 case UNSPEC_FIST_ATOMIC
:
1763 case UNSPEC_FIST_FLOOR
:
1764 case UNSPEC_FIST_CEIL
:
1766 /* These insns only operate on the top of the stack. */
1768 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1769 emit_swap_insn (insn
, regstack
, *src1
);
1771 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1773 if (STACK_REG_P (*dest
))
1774 replace_reg (dest
, FIRST_STACK_REG
);
1778 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1780 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1783 replace_reg (src1
, FIRST_STACK_REG
);
1788 /* This insn only operate on the top of the stack. */
1790 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1791 emit_swap_insn (insn
, regstack
, *src1
);
1793 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1795 replace_reg (src1
, FIRST_STACK_REG
);
1799 remove_regno_note (insn
, REG_DEAD
,
1800 REGNO (XEXP (src1_note
, 0)));
1801 emit_pop_insn (insn
, regstack
, XEXP (src1_note
, 0),
1809 case UNSPEC_FRNDINT
:
1812 case UNSPEC_FRNDINT_FLOOR
:
1813 case UNSPEC_FRNDINT_CEIL
:
1814 case UNSPEC_FRNDINT_TRUNC
:
1815 case UNSPEC_FRNDINT_MASK_PM
:
1817 /* Above insns operate on the top of the stack. */
1819 case UNSPEC_SINCOS_COS
:
1820 case UNSPEC_XTRACT_FRACT
:
1822 /* Above insns operate on the top two stack slots,
1823 first part of one input, double output insn. */
1825 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1827 emit_swap_insn (insn
, regstack
, *src1
);
1829 /* Input should never die, it is replaced with output. */
1830 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1831 gcc_assert (!src1_note
);
1833 if (STACK_REG_P (*dest
))
1834 replace_reg (dest
, FIRST_STACK_REG
);
1836 replace_reg (src1
, FIRST_STACK_REG
);
1839 case UNSPEC_SINCOS_SIN
:
1840 case UNSPEC_XTRACT_EXP
:
1842 /* These insns operate on the top two stack slots,
1843 second part of one input, double output insn. */
1850 /* For UNSPEC_TAN, regstack->top is already increased
1851 by inherent load of constant 1.0. */
1853 /* Output value is generated in the second stack slot.
1854 Move current value from second slot to the top. */
1855 regstack
->reg
[regstack
->top
]
1856 = regstack
->reg
[regstack
->top
- 1];
1858 gcc_assert (STACK_REG_P (*dest
));
1860 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1861 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1862 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1864 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1866 replace_reg (src1
, FIRST_STACK_REG
);
1871 case UNSPEC_FYL2XP1
:
1872 /* These insns operate on the top two stack slots. */
1874 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1875 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1877 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1878 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1880 swap_to_top (insn
, regstack
, *src1
, *src2
);
1882 replace_reg (src1
, FIRST_STACK_REG
);
1883 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1886 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1888 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1890 /* Pop both input operands from the stack. */
1891 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1892 regstack
->reg
[regstack
->top
]);
1893 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1894 regstack
->reg
[regstack
->top
- 1]);
1897 /* Push the result back onto the stack. */
1898 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1899 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1900 replace_reg (dest
, FIRST_STACK_REG
);
1903 case UNSPEC_FSCALE_FRACT
:
1904 case UNSPEC_FPREM_F
:
1905 case UNSPEC_FPREM1_F
:
1906 /* These insns operate on the top two stack slots,
1907 first part of double input, double output insn. */
1909 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1910 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1912 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1913 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1915 /* Inputs should never die, they are
1916 replaced with outputs. */
1917 gcc_assert (!src1_note
);
1918 gcc_assert (!src2_note
);
1920 swap_to_top (insn
, regstack
, *src1
, *src2
);
1922 /* Push the result back onto stack. Empty stack slot
1923 will be filled in second part of insn. */
1924 if (STACK_REG_P (*dest
))
1926 regstack
->reg
[regstack
->top
] = REGNO (*dest
);
1927 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1928 replace_reg (dest
, FIRST_STACK_REG
);
1931 replace_reg (src1
, FIRST_STACK_REG
);
1932 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1935 case UNSPEC_FSCALE_EXP
:
1936 case UNSPEC_FPREM_U
:
1937 case UNSPEC_FPREM1_U
:
1938 /* These insns operate on the top two stack slots,
1939 second part of double input, double output insn. */
1941 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1942 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1944 /* Push the result back onto stack. Fill empty slot from
1945 first part of insn and fix top of stack pointer. */
1946 if (STACK_REG_P (*dest
))
1948 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1949 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1950 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1953 replace_reg (src1
, FIRST_STACK_REG
);
1954 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1957 case UNSPEC_C2_FLAG
:
1958 /* This insn operates on the top two stack slots,
1959 third part of C2 setting double input insn. */
1961 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1962 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1964 replace_reg (src1
, FIRST_STACK_REG
);
1965 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1969 /* Combined fcomp+fnstsw generated for doing well with
1970 CSE. When optimizing this would have been broken
1973 pat_src
= XVECEXP (pat_src
, 0, 0);
1974 if (GET_CODE (pat_src
) == COMPARE
)
1981 pat_src
= XVECEXP (pat_src
, 0, 0);
1982 gcc_assert (GET_CODE (pat_src
) == COMPARE
);
1992 /* `fcomi' insn can't pop two regs. */
1993 compare_for_stack_reg (insn
, regstack
, pat_src
,
1994 REGNO (*dest
) != FLAGS_REG
);
1998 /* This insn requires the top of stack to be the destination. */
2000 src1
= get_true_reg (&XEXP (pat_src
, 1));
2001 src2
= get_true_reg (&XEXP (pat_src
, 2));
2003 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2004 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2006 /* If the comparison operator is an FP comparison operator,
2007 it is handled correctly by compare_for_stack_reg () who
2008 will move the destination to the top of stack. But if the
2009 comparison operator is not an FP comparison operator, we
2010 have to handle it here. */
2011 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
2012 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
2014 /* In case one of operands is the top of stack and the operands
2015 dies, it is safe to make it the destination operand by
2016 reversing the direction of cmove and avoid fxch. */
2017 if ((REGNO (*src1
) == regstack
->reg
[regstack
->top
]
2019 || (REGNO (*src2
) == regstack
->reg
[regstack
->top
]
2022 int idx1
= (get_hard_regnum (regstack
, *src1
)
2024 int idx2
= (get_hard_regnum (regstack
, *src2
)
2027 /* Make reg-stack believe that the operands are already
2028 swapped on the stack */
2029 regstack
->reg
[regstack
->top
- idx1
] = REGNO (*src2
);
2030 regstack
->reg
[regstack
->top
- idx2
] = REGNO (*src1
);
2032 /* Reverse condition to compensate the operand swap.
2033 i386 do have comparison always reversible. */
2034 PUT_CODE (XEXP (pat_src
, 0),
2035 reversed_comparison_code (XEXP (pat_src
, 0), insn
));
2038 emit_swap_insn (insn
, regstack
, *dest
);
2046 src_note
[1] = src1_note
;
2047 src_note
[2] = src2_note
;
2049 if (STACK_REG_P (*src1
))
2050 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2051 if (STACK_REG_P (*src2
))
2052 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2054 for (i
= 1; i
<= 2; i
++)
2057 int regno
= REGNO (XEXP (src_note
[i
], 0));
2059 /* If the register that dies is not at the top of
2060 stack, then move the top of stack to the dead reg.
2061 Top of stack should never die, as it is the
2063 gcc_assert (regno
!= regstack
->reg
[regstack
->top
]);
2064 remove_regno_note (insn
, REG_DEAD
, regno
);
2065 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
2070 /* Make dest the top of stack. Add dest to regstack if
2072 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
2073 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
2074 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2075 replace_reg (dest
, FIRST_STACK_REG
);
2088 return control_flow_insn_deleted
;
2091 /* Substitute hard regnums for any stack regs in INSN, which has
2092 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2093 before the insn, and is updated with changes made here.
2095 There are several requirements and assumptions about the use of
2096 stack-like regs in asm statements. These rules are enforced by
2097 record_asm_stack_regs; see comments there for details. Any
2098 asm_operands left in the RTL at this point may be assume to meet the
2099 requirements, since record_asm_stack_regs removes any problem asm. */
2102 subst_asm_stack_regs (rtx_insn
*insn
, stack_ptr regstack
)
2104 rtx body
= PATTERN (insn
);
2106 rtx
*note_reg
; /* Array of note contents */
2107 rtx
**note_loc
; /* Address of REG field of each note */
2108 enum reg_note
*note_kind
; /* The type of each note */
2110 rtx
*clobber_reg
= 0;
2111 rtx
**clobber_loc
= 0;
2113 struct stack_def temp_stack
;
2118 int n_inputs
, n_outputs
;
2120 if (! check_asm_stack_operands (insn
))
2123 /* Find out what the constraints required. If no constraint
2124 alternative matches, that is a compiler bug: we should have caught
2125 such an insn in check_asm_stack_operands. */
2126 extract_constrain_insn (insn
);
2128 preprocess_constraints (insn
);
2129 const operand_alternative
*op_alt
= which_op_alt ();
2131 get_asm_operands_in_out (body
, &n_outputs
, &n_inputs
);
2133 /* Strip SUBREGs here to make the following code simpler. */
2134 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2135 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
2136 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
2138 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
2139 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
2142 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2144 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2147 note_reg
= XALLOCAVEC (rtx
, i
);
2148 note_loc
= XALLOCAVEC (rtx
*, i
);
2149 note_kind
= XALLOCAVEC (enum reg_note
, i
);
2152 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2154 if (GET_CODE (note
) != EXPR_LIST
)
2156 rtx reg
= XEXP (note
, 0);
2157 rtx
*loc
= & XEXP (note
, 0);
2159 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2161 loc
= & SUBREG_REG (reg
);
2162 reg
= SUBREG_REG (reg
);
2165 if (STACK_REG_P (reg
)
2166 && (REG_NOTE_KIND (note
) == REG_DEAD
2167 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2169 note_reg
[n_notes
] = reg
;
2170 note_loc
[n_notes
] = loc
;
2171 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2176 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2180 if (GET_CODE (body
) == PARALLEL
)
2182 clobber_reg
= XALLOCAVEC (rtx
, XVECLEN (body
, 0));
2183 clobber_loc
= XALLOCAVEC (rtx
*, XVECLEN (body
, 0));
2185 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2186 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2188 rtx clobber
= XVECEXP (body
, 0, i
);
2189 rtx reg
= XEXP (clobber
, 0);
2190 rtx
*loc
= & XEXP (clobber
, 0);
2192 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2194 loc
= & SUBREG_REG (reg
);
2195 reg
= SUBREG_REG (reg
);
2198 if (STACK_REG_P (reg
))
2200 clobber_reg
[n_clobbers
] = reg
;
2201 clobber_loc
[n_clobbers
] = loc
;
2207 temp_stack
= *regstack
;
2209 /* Put the input regs into the desired place in TEMP_STACK. */
2211 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2212 if (STACK_REG_P (recog_data
.operand
[i
])
2213 && reg_class_subset_p (op_alt
[i
].cl
, FLOAT_REGS
)
2214 && op_alt
[i
].cl
!= FLOAT_REGS
)
2216 /* If an operand needs to be in a particular reg in
2217 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2218 these constraints are for single register classes, and
2219 reload guaranteed that operand[i] is already in that class,
2220 we can just use REGNO (recog_data.operand[i]) to know which
2221 actual reg this operand needs to be in. */
2223 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
2225 gcc_assert (regno
>= 0);
2227 if ((unsigned int) regno
!= REGNO (recog_data
.operand
[i
]))
2229 /* recog_data.operand[i] is not in the right place. Find
2230 it and swap it with whatever is already in I's place.
2231 K is where recog_data.operand[i] is now. J is where it
2235 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2237 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
2239 std::swap (temp_stack
.reg
[j
], temp_stack
.reg
[k
]);
2243 /* Emit insns before INSN to make sure the reg-stack is in the right
2246 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
2248 /* Make the needed input register substitutions. Do death notes and
2249 clobbers too, because these are for inputs, not outputs. */
2251 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2252 if (STACK_REG_P (recog_data
.operand
[i
]))
2254 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
2256 gcc_assert (regnum
>= 0);
2258 replace_reg (recog_data
.operand_loc
[i
], regnum
);
2261 for (i
= 0; i
< n_notes
; i
++)
2262 if (note_kind
[i
] == REG_DEAD
)
2264 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2266 gcc_assert (regnum
>= 0);
2268 replace_reg (note_loc
[i
], regnum
);
2271 for (i
= 0; i
< n_clobbers
; i
++)
2273 /* It's OK for a CLOBBER to reference a reg that is not live.
2274 Don't try to replace it in that case. */
2275 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2278 replace_reg (clobber_loc
[i
], regnum
);
2281 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2283 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2284 if (STACK_REG_P (recog_data
.operand
[i
]))
2286 /* An input reg is implicitly popped if it is tied to an
2287 output, or if there is a CLOBBER for it. */
2290 for (j
= 0; j
< n_clobbers
; j
++)
2291 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
2294 if (j
< n_clobbers
|| op_alt
[i
].matches
>= 0)
2296 /* recog_data.operand[i] might not be at the top of stack.
2297 But that's OK, because all we need to do is pop the
2298 right number of regs off of the top of the reg-stack.
2299 record_asm_stack_regs guaranteed that all implicitly
2300 popped regs were grouped at the top of the reg-stack. */
2302 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2303 regstack
->reg
[regstack
->top
]);
2308 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2309 Note that there isn't any need to substitute register numbers.
2310 ??? Explain why this is true. */
2312 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2314 /* See if there is an output for this hard reg. */
2317 for (j
= 0; j
< n_outputs
; j
++)
2318 if (STACK_REG_P (recog_data
.operand
[j
])
2319 && REGNO (recog_data
.operand
[j
]) == (unsigned) i
)
2321 regstack
->reg
[++regstack
->top
] = i
;
2322 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2327 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2328 input that the asm didn't implicitly pop. If the asm didn't
2329 implicitly pop an input reg, that reg will still be live.
2331 Note that we can't use find_regno_note here: the register numbers
2332 in the death notes have already been substituted. */
2334 for (i
= 0; i
< n_outputs
; i
++)
2335 if (STACK_REG_P (recog_data
.operand
[i
]))
2339 for (j
= 0; j
< n_notes
; j
++)
2340 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2341 && note_kind
[j
] == REG_UNUSED
)
2343 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2349 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2350 if (STACK_REG_P (recog_data
.operand
[i
]))
2354 for (j
= 0; j
< n_notes
; j
++)
2355 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2356 && note_kind
[j
] == REG_DEAD
2357 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2358 REGNO (recog_data
.operand
[i
])))
2360 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2367 /* Substitute stack hard reg numbers for stack virtual registers in
2368 INSN. Non-stack register numbers are not changed. REGSTACK is the
2369 current stack content. Insns may be emitted as needed to arrange the
2370 stack for the 387 based on the contents of the insn. Return whether
2371 a control flow insn was deleted in the process. */
2374 subst_stack_regs (rtx_insn
*insn
, stack_ptr regstack
)
2376 rtx
*note_link
, note
;
2377 bool control_flow_insn_deleted
= false;
2382 int top
= regstack
->top
;
2384 /* If there are any floating point parameters to be passed in
2385 registers for this call, make sure they are in the right
2390 straighten_stack (insn
, regstack
);
2392 /* Now mark the arguments as dead after the call. */
2394 while (regstack
->top
>= 0)
2396 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2402 /* Do the actual substitution if any stack regs are mentioned.
2403 Since we only record whether entire insn mentions stack regs, and
2404 subst_stack_regs_pat only works for patterns that contain stack regs,
2405 we must check each pattern in a parallel here. A call_value_pop could
2408 if (stack_regs_mentioned (insn
))
2410 int n_operands
= asm_noperands (PATTERN (insn
));
2411 if (n_operands
>= 0)
2413 /* This insn is an `asm' with operands. Decode the operands,
2414 decide how many are inputs, and do register substitution.
2415 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2417 subst_asm_stack_regs (insn
, regstack
);
2418 return control_flow_insn_deleted
;
2421 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2422 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2424 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2426 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
2427 XVECEXP (PATTERN (insn
), 0, i
)
2428 = shallow_copy_rtx (XVECEXP (PATTERN (insn
), 0, i
));
2429 control_flow_insn_deleted
2430 |= subst_stack_regs_pat (insn
, regstack
,
2431 XVECEXP (PATTERN (insn
), 0, i
));
2435 control_flow_insn_deleted
2436 |= subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2439 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2440 REG_UNUSED will already have been dealt with, so just return. */
2442 if (NOTE_P (insn
) || insn
->deleted ())
2443 return control_flow_insn_deleted
;
2445 /* If this a noreturn call, we can't insert pop insns after it.
2446 Instead, reset the stack state to empty. */
2448 && find_reg_note (insn
, REG_NORETURN
, NULL
))
2451 CLEAR_HARD_REG_SET (regstack
->reg_set
);
2452 return control_flow_insn_deleted
;
2455 /* If there is a REG_UNUSED note on a stack register on this insn,
2456 the indicated reg must be popped. The REG_UNUSED note is removed,
2457 since the form of the newly emitted pop insn references the reg,
2458 making it no longer `unset'. */
2460 note_link
= ®_NOTES (insn
);
2461 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2462 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2464 *note_link
= XEXP (note
, 1);
2465 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2468 note_link
= &XEXP (note
, 1);
2470 return control_flow_insn_deleted
;
2473 /* Change the organization of the stack so that it fits a new basic
2474 block. Some registers might have to be popped, but there can never be
2475 a register live in the new block that is not now live.
2477 Insert any needed insns before or after INSN, as indicated by
2478 WHERE. OLD is the original stack layout, and NEW is the desired
2479 form. OLD is updated to reflect the code emitted, i.e., it will be
2480 the same as NEW upon return.
2482 This function will not preserve block_end[]. But that information
2483 is no longer needed once this has executed. */
2486 change_stack (rtx_insn
*insn
, stack_ptr old
, stack_ptr new_stack
,
2487 enum emit_where where
)
2490 rtx_insn
*update_end
= NULL
;
2493 /* Stack adjustments for the first insn in a block update the
2494 current_block's stack_in instead of inserting insns directly.
2495 compensate_edges will add the necessary code later. */
2498 && where
== EMIT_BEFORE
)
2500 BLOCK_INFO (current_block
)->stack_in
= *new_stack
;
2501 starting_stack_p
= false;
2506 /* We will be inserting new insns "backwards". If we are to insert
2507 after INSN, find the next insn, and insert before it. */
2509 if (where
== EMIT_AFTER
)
2511 if (current_block
&& BB_END (current_block
) == insn
)
2513 insn
= NEXT_INSN (insn
);
2516 /* Initialize partially dead variables. */
2517 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
2518 if (TEST_HARD_REG_BIT (new_stack
->reg_set
, i
)
2519 && !TEST_HARD_REG_BIT (old
->reg_set
, i
))
2521 old
->reg
[++old
->top
] = i
;
2522 SET_HARD_REG_BIT (old
->reg_set
, i
);
2523 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i
, SFmode
), not_a_num
),
2527 /* Pop any registers that are not needed in the new block. */
2529 /* If the destination block's stack already has a specified layout
2530 and contains two or more registers, use a more intelligent algorithm
2531 to pop registers that minimizes the number of fxchs below. */
2532 if (new_stack
->top
> 0)
2534 bool slots
[REG_STACK_SIZE
];
2535 int pops
[REG_STACK_SIZE
];
2536 int next
, dest
, topsrc
;
2538 /* First pass to determine the free slots. */
2539 for (reg
= 0; reg
<= new_stack
->top
; reg
++)
2540 slots
[reg
] = TEST_HARD_REG_BIT (new_stack
->reg_set
, old
->reg
[reg
]);
2542 /* Second pass to allocate preferred slots. */
2544 for (reg
= old
->top
; reg
> new_stack
->top
; reg
--)
2545 if (TEST_HARD_REG_BIT (new_stack
->reg_set
, old
->reg
[reg
]))
2548 for (next
= 0; next
<= new_stack
->top
; next
++)
2549 if (!slots
[next
] && new_stack
->reg
[next
] == old
->reg
[reg
])
2551 /* If this is a preference for the new top of stack, record
2552 the fact by remembering it's old->reg in topsrc. */
2553 if (next
== new_stack
->top
)
2564 /* Intentionally, avoid placing the top of stack in it's correct
2565 location, if we still need to permute the stack below and we
2566 can usefully place it somewhere else. This is the case if any
2567 slot is still unallocated, in which case we should place the
2568 top of stack there. */
2570 for (reg
= 0; reg
< new_stack
->top
; reg
++)
2574 slots
[new_stack
->top
] = false;
2579 /* Third pass allocates remaining slots and emits pop insns. */
2580 next
= new_stack
->top
;
2581 for (reg
= old
->top
; reg
> new_stack
->top
; reg
--)
2586 /* Find next free slot. */
2591 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[dest
], DFmode
),
2597 /* The following loop attempts to maximize the number of times we
2598 pop the top of the stack, as this permits the use of the faster
2599 ffreep instruction on platforms that support it. */
2603 for (reg
= 0; reg
<= old
->top
; reg
++)
2604 if (TEST_HARD_REG_BIT (new_stack
->reg_set
, old
->reg
[reg
]))
2608 while (old
->top
>= live
)
2609 if (TEST_HARD_REG_BIT (new_stack
->reg_set
, old
->reg
[old
->top
]))
2611 while (TEST_HARD_REG_BIT (new_stack
->reg_set
, old
->reg
[next
]))
2613 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[next
], DFmode
),
2617 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[old
->top
], DFmode
),
2621 if (new_stack
->top
== -2)
2623 /* If the new block has never been processed, then it can inherit
2624 the old stack order. */
2626 new_stack
->top
= old
->top
;
2627 memcpy (new_stack
->reg
, old
->reg
, sizeof (new_stack
->reg
));
2631 /* This block has been entered before, and we must match the
2632 previously selected stack order. */
2634 /* By now, the only difference should be the order of the stack,
2635 not their depth or liveliness. */
2637 gcc_assert (hard_reg_set_equal_p (old
->reg_set
, new_stack
->reg_set
));
2638 gcc_assert (old
->top
== new_stack
->top
);
2640 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2641 swaps until the stack is correct.
2643 The worst case number of swaps emitted is N + 2, where N is the
2644 depth of the stack. In some cases, the reg at the top of
2645 stack may be correct, but swapped anyway in order to fix
2646 other regs. But since we never swap any other reg away from
2647 its correct slot, this algorithm will converge. */
2649 if (new_stack
->top
!= -1)
2652 /* Swap the reg at top of stack into the position it is
2653 supposed to be in, until the correct top of stack appears. */
2655 while (old
->reg
[old
->top
] != new_stack
->reg
[new_stack
->top
])
2657 for (reg
= new_stack
->top
; reg
>= 0; reg
--)
2658 if (new_stack
->reg
[reg
] == old
->reg
[old
->top
])
2661 gcc_assert (reg
!= -1);
2663 emit_swap_insn (insn
, old
,
2664 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2667 /* See if any regs remain incorrect. If so, bring an
2668 incorrect reg to the top of stack, and let the while loop
2671 for (reg
= new_stack
->top
; reg
>= 0; reg
--)
2672 if (new_stack
->reg
[reg
] != old
->reg
[reg
])
2674 emit_swap_insn (insn
, old
,
2675 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2680 /* At this point there must be no differences. */
2682 for (reg
= old
->top
; reg
>= 0; reg
--)
2683 gcc_assert (old
->reg
[reg
] == new_stack
->reg
[reg
]);
2688 for (update_end
= NEXT_INSN (update_end
); update_end
!= insn
;
2689 update_end
= NEXT_INSN (update_end
))
2691 set_block_for_insn (update_end
, current_block
);
2692 if (INSN_P (update_end
))
2693 df_insn_rescan (update_end
);
2695 BB_END (current_block
) = PREV_INSN (insn
);
2699 /* Print stack configuration. */
2702 print_stack (FILE *file
, stack_ptr s
)
2708 fprintf (file
, "uninitialized\n");
2709 else if (s
->top
== -1)
2710 fprintf (file
, "empty\n");
2715 for (i
= 0; i
<= s
->top
; ++i
)
2716 fprintf (file
, "%d ", s
->reg
[i
]);
2717 fputs ("]\n", file
);
2721 /* This function was doing life analysis. We now let the regular live
2722 code do it's job, so we only need to check some extra invariants
2723 that reg-stack expects. Primary among these being that all registers
2724 are initialized before use.
2726 The function returns true when code was emitted to CFG edges and
2727 commit_edge_insertions needs to be called. */
2730 convert_regs_entry (void)
2736 /* Load something into each stack register live at function entry.
2737 Such live registers can be caused by uninitialized variables or
2738 functions not returning values on all paths. In order to keep
2739 the push/pop code happy, and to not scrog the register stack, we
2740 must put something in these registers. Use a QNaN.
2742 Note that we are inserting converted code here. This code is
2743 never seen by the convert_regs pass. */
2745 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR_FOR_FN (cfun
)->succs
)
2747 basic_block block
= e
->dest
;
2748 block_info bi
= BLOCK_INFO (block
);
2751 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2752 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2756 bi
->stack_in
.reg
[++top
] = reg
;
2758 init
= gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2760 insert_insn_on_edge (init
, e
);
2764 bi
->stack_in
.top
= top
;
2770 /* Construct the desired stack for function exit. This will either
2771 be `empty', or the function return value at top-of-stack. */
2774 convert_regs_exit (void)
2776 int value_reg_low
, value_reg_high
;
2777 stack_ptr output_stack
;
2780 retvalue
= stack_result (current_function_decl
);
2781 value_reg_low
= value_reg_high
= -1;
2784 value_reg_low
= REGNO (retvalue
);
2785 value_reg_high
= END_REGNO (retvalue
) - 1;
2788 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun
))->stack_in
;
2789 if (value_reg_low
== -1)
2790 output_stack
->top
= -1;
2795 output_stack
->top
= value_reg_high
- value_reg_low
;
2796 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2798 output_stack
->reg
[value_reg_high
- reg
] = reg
;
2799 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2804 /* Copy the stack info from the end of edge E's source block to the
2805 start of E's destination block. */
2808 propagate_stack (edge e
)
2810 stack_ptr src_stack
= &BLOCK_INFO (e
->src
)->stack_out
;
2811 stack_ptr dest_stack
= &BLOCK_INFO (e
->dest
)->stack_in
;
2814 /* Preserve the order of the original stack, but check whether
2815 any pops are needed. */
2816 dest_stack
->top
= -1;
2817 for (reg
= 0; reg
<= src_stack
->top
; ++reg
)
2818 if (TEST_HARD_REG_BIT (dest_stack
->reg_set
, src_stack
->reg
[reg
]))
2819 dest_stack
->reg
[++dest_stack
->top
] = src_stack
->reg
[reg
];
2821 /* Push in any partially dead values. */
2822 for (reg
= FIRST_STACK_REG
; reg
< LAST_STACK_REG
+ 1; reg
++)
2823 if (TEST_HARD_REG_BIT (dest_stack
->reg_set
, reg
)
2824 && !TEST_HARD_REG_BIT (src_stack
->reg_set
, reg
))
2825 dest_stack
->reg
[++dest_stack
->top
] = reg
;
2829 /* Adjust the stack of edge E's source block on exit to match the stack
2830 of it's target block upon input. The stack layouts of both blocks
2831 should have been defined by now. */
2834 compensate_edge (edge e
)
2836 basic_block source
= e
->src
, target
= e
->dest
;
2837 stack_ptr target_stack
= &BLOCK_INFO (target
)->stack_in
;
2838 stack_ptr source_stack
= &BLOCK_INFO (source
)->stack_out
;
2839 struct stack_def regstack
;
2843 fprintf (dump_file
, "Edge %d->%d: ", source
->index
, target
->index
);
2845 gcc_assert (target_stack
->top
!= -2);
2847 /* Check whether stacks are identical. */
2848 if (target_stack
->top
== source_stack
->top
)
2850 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2851 if (target_stack
->reg
[reg
] != source_stack
->reg
[reg
])
2857 fprintf (dump_file
, "no changes needed\n");
2864 fprintf (dump_file
, "correcting stack to ");
2865 print_stack (dump_file
, target_stack
);
2868 /* Abnormal calls may appear to have values live in st(0), but the
2869 abnormal return path will not have actually loaded the values. */
2870 if (e
->flags
& EDGE_ABNORMAL_CALL
)
2872 /* Assert that the lifetimes are as we expect -- one value
2873 live at st(0) on the end of the source block, and no
2874 values live at the beginning of the destination block.
2875 For complex return values, we may have st(1) live as well. */
2876 gcc_assert (source_stack
->top
== 0 || source_stack
->top
== 1);
2877 gcc_assert (target_stack
->top
== -1);
2881 /* Handle non-call EH edges specially. The normal return path have
2882 values in registers. These will be popped en masse by the unwind
2884 if (e
->flags
& EDGE_EH
)
2886 gcc_assert (target_stack
->top
== -1);
2890 /* We don't support abnormal edges. Global takes care to
2891 avoid any live register across them, so we should never
2892 have to insert instructions on such edges. */
2893 gcc_assert (! (e
->flags
& EDGE_ABNORMAL
));
2895 /* Make a copy of source_stack as change_stack is destructive. */
2896 regstack
= *source_stack
;
2898 /* It is better to output directly to the end of the block
2899 instead of to the edge, because emit_swap can do minimal
2900 insn scheduling. We can do this when there is only one
2901 edge out, and it is not abnormal. */
2902 if (EDGE_COUNT (source
->succs
) == 1)
2904 current_block
= source
;
2905 change_stack (BB_END (source
), ®stack
, target_stack
,
2906 (JUMP_P (BB_END (source
)) ? EMIT_BEFORE
: EMIT_AFTER
));
2913 current_block
= NULL
;
2916 /* ??? change_stack needs some point to emit insns after. */
2917 after
= emit_note (NOTE_INSN_DELETED
);
2919 change_stack (after
, ®stack
, target_stack
, EMIT_BEFORE
);
2924 insert_insn_on_edge (seq
, e
);
2930 /* Traverse all non-entry edges in the CFG, and emit the necessary
2931 edge compensation code to change the stack from stack_out of the
2932 source block to the stack_in of the destination block. */
2935 compensate_edges (void)
2937 bool inserted
= false;
2940 starting_stack_p
= false;
2942 FOR_EACH_BB_FN (bb
, cfun
)
2943 if (bb
!= ENTRY_BLOCK_PTR_FOR_FN (cfun
))
2948 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
2949 inserted
|= compensate_edge (e
);
2954 /* Select the better of two edges E1 and E2 to use to determine the
2955 stack layout for their shared destination basic block. This is
2956 typically the more frequently executed. The edge E1 may be NULL
2957 (in which case E2 is returned), but E2 is always non-NULL. */
2960 better_edge (edge e1
, edge e2
)
2965 if (e1
->count () > e2
->count ())
2967 if (e1
->count () < e2
->count ())
2970 /* Prefer critical edges to minimize inserting compensation code on
2973 if (EDGE_CRITICAL_P (e1
) != EDGE_CRITICAL_P (e2
))
2974 return EDGE_CRITICAL_P (e1
) ? e1
: e2
;
2976 /* Avoid non-deterministic behavior. */
2977 return (e1
->src
->index
< e2
->src
->index
) ? e1
: e2
;
2980 /* Convert stack register references in one block. Return true if the CFG
2981 has been modified in the process. */
2984 convert_regs_1 (basic_block block
)
2986 struct stack_def regstack
;
2987 block_info bi
= BLOCK_INFO (block
);
2989 rtx_insn
*insn
, *next
;
2990 bool control_flow_insn_deleted
= false;
2991 bool cfg_altered
= false;
2992 int debug_insns_with_starting_stack
= 0;
2994 any_malformed_asm
= false;
2996 /* Choose an initial stack layout, if one hasn't already been chosen. */
2997 if (bi
->stack_in
.top
== -2)
2999 edge e
, beste
= NULL
;
3002 /* Select the best incoming edge (typically the most frequent) to
3003 use as a template for this basic block. */
3004 FOR_EACH_EDGE (e
, ei
, block
->preds
)
3005 if (BLOCK_INFO (e
->src
)->done
)
3006 beste
= better_edge (beste
, e
);
3009 propagate_stack (beste
);
3012 /* No predecessors. Create an arbitrary input stack. */
3013 bi
->stack_in
.top
= -1;
3014 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
3015 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
3016 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
3022 fprintf (dump_file
, "\nBasic block %d\nInput stack: ", block
->index
);
3023 print_stack (dump_file
, &bi
->stack_in
);
3026 /* Process all insns in this block. Keep track of NEXT so that we
3027 don't process insns emitted while substituting in INSN. */
3028 current_block
= block
;
3029 next
= BB_HEAD (block
);
3030 regstack
= bi
->stack_in
;
3031 starting_stack_p
= true;
3036 next
= NEXT_INSN (insn
);
3038 /* Ensure we have not missed a block boundary. */
3040 if (insn
== BB_END (block
))
3043 /* Don't bother processing unless there is a stack reg
3044 mentioned or if it's a CALL_INSN. */
3045 if (DEBUG_BIND_INSN_P (insn
))
3047 if (starting_stack_p
)
3048 debug_insns_with_starting_stack
++;
3051 subst_all_stack_regs_in_debug_insn (insn
, ®stack
);
3053 /* Nothing must ever die at a debug insn. If something
3054 is referenced in it that becomes dead, it should have
3055 died before and the reference in the debug insn
3056 should have been removed so as to avoid changing code
3058 gcc_assert (!find_reg_note (insn
, REG_DEAD
, NULL
));
3061 else if (stack_regs_mentioned (insn
)
3066 fprintf (dump_file
, " insn %d input stack: ",
3068 print_stack (dump_file
, ®stack
);
3070 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
3071 starting_stack_p
= false;
3076 if (debug_insns_with_starting_stack
)
3078 /* Since it's the first non-debug instruction that determines
3079 the stack requirements of the current basic block, we refrain
3080 from updating debug insns before it in the loop above, and
3081 fix them up here. */
3082 for (insn
= BB_HEAD (block
); debug_insns_with_starting_stack
;
3083 insn
= NEXT_INSN (insn
))
3085 if (!DEBUG_BIND_INSN_P (insn
))
3088 debug_insns_with_starting_stack
--;
3089 subst_all_stack_regs_in_debug_insn (insn
, &bi
->stack_in
);
3095 fprintf (dump_file
, "Expected live registers [");
3096 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
3097 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
3098 fprintf (dump_file
, " %d", reg
);
3099 fprintf (dump_file
, " ]\nOutput stack: ");
3100 print_stack (dump_file
, ®stack
);
3103 insn
= BB_END (block
);
3105 insn
= PREV_INSN (insn
);
3107 /* If the function is declared to return a value, but it returns one
3108 in only some cases, some registers might come live here. Emit
3109 necessary moves for them. */
3111 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
3113 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
3114 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
3119 fprintf (dump_file
, "Emitting insn initializing reg %d\n", reg
);
3121 set
= gen_rtx_SET (FP_MODE_REG (reg
, SFmode
), not_a_num
);
3122 insn
= emit_insn_after (set
, insn
);
3123 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
3127 /* Amongst the insns possibly deleted during the substitution process above,
3128 might have been the only trapping insn in the block. We purge the now
3129 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3130 called at the end of convert_regs. The order in which we process the
3131 blocks ensures that we never delete an already processed edge.
3133 Note that, at this point, the CFG may have been damaged by the emission
3134 of instructions after an abnormal call, which moves the basic block end
3135 (and is the reason why we call fixup_abnormal_edges later). So we must
3136 be sure that the trapping insn has been deleted before trying to purge
3137 dead edges, otherwise we risk purging valid edges.
3139 ??? We are normally supposed not to delete trapping insns, so we pretend
3140 that the insns deleted above don't actually trap. It would have been
3141 better to detect this earlier and avoid creating the EH edge in the first
3142 place, still, but we don't have enough information at that time. */
3144 if (control_flow_insn_deleted
)
3145 cfg_altered
|= purge_dead_edges (block
);
3147 /* Something failed if the stack lives don't match. If we had malformed
3148 asms, we zapped the instruction itself, but that didn't produce the
3149 same pattern of register kills as before. */
3151 gcc_assert (hard_reg_set_equal_p (regstack
.reg_set
, bi
->out_reg_set
)
3152 || any_malformed_asm
);
3153 bi
->stack_out
= regstack
;
3159 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3160 CFG has been modified in the process. */
3163 convert_regs_2 (basic_block block
)
3165 basic_block
*stack
, *sp
;
3166 bool cfg_altered
= false;
3168 /* We process the blocks in a top-down manner, in a way such that one block
3169 is only processed after all its predecessors. The number of predecessors
3170 of every block has already been computed. */
3172 stack
= XNEWVEC (basic_block
, n_basic_blocks_for_fn (cfun
));
3184 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3185 some dead EH outgoing edge after the deletion of the trapping
3186 insn inside the block. Since the number of predecessors of
3187 BLOCK's successors was computed based on the initial edge set,
3188 we check the necessity to process some of these successors
3189 before such an edge deletion may happen. However, there is
3190 a pitfall: if BLOCK is the only predecessor of a successor and
3191 the edge between them happens to be deleted, the successor
3192 becomes unreachable and should not be processed. The problem
3193 is that there is no way to preventively detect this case so we
3194 stack the successor in all cases and hand over the task of
3195 fixing up the discrepancy to convert_regs_1. */
3197 FOR_EACH_EDGE (e
, ei
, block
->succs
)
3198 if (! (e
->flags
& EDGE_DFS_BACK
))
3200 BLOCK_INFO (e
->dest
)->predecessors
--;
3201 if (!BLOCK_INFO (e
->dest
)->predecessors
)
3205 cfg_altered
|= convert_regs_1 (block
);
3207 while (sp
!= stack
);
3214 /* Traverse all basic blocks in a function, converting the register
3215 references in each insn from the "flat" register file that gcc uses,
3216 to the stack-like registers the 387 uses. */
3221 bool cfg_altered
= false;
3227 /* Initialize uninitialized registers on function entry. */
3228 inserted
= convert_regs_entry ();
3230 /* Construct the desired stack for function exit. */
3231 convert_regs_exit ();
3232 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun
))->done
= 1;
3234 /* ??? Future: process inner loops first, and give them arbitrary
3235 initial stacks which emit_swap_insn can modify. This ought to
3236 prevent double fxch that often appears at the head of a loop. */
3238 /* Process all blocks reachable from all entry points. */
3239 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR_FOR_FN (cfun
)->succs
)
3240 cfg_altered
|= convert_regs_2 (e
->dest
);
3242 /* ??? Process all unreachable blocks. Though there's no excuse
3243 for keeping these even when not optimizing. */
3244 FOR_EACH_BB_FN (b
, cfun
)
3246 block_info bi
= BLOCK_INFO (b
);
3249 cfg_altered
|= convert_regs_2 (b
);
3252 /* We must fix up abnormal edges before inserting compensation code
3253 because both mechanisms insert insns on edges. */
3254 inserted
|= fixup_abnormal_edges ();
3256 inserted
|= compensate_edges ();
3258 clear_aux_for_blocks ();
3261 commit_edge_insertions ();
3267 fputc ('\n', dump_file
);
3270 /* Convert register usage from "flat" register file usage to a "stack
3271 register file. FILE is the dump file, if used.
3273 Construct a CFG and run life analysis. Then convert each insn one
3274 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3275 code duplication created when the converter inserts pop insns on
3285 /* Clean up previous run. */
3286 stack_regs_mentioned_data
.release ();
3288 /* See if there is something to do. Flow analysis is quite
3289 expensive so we might save some compilation time. */
3290 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3291 if (df_regs_ever_live_p (i
))
3293 if (i
> LAST_STACK_REG
)
3296 df_note_add_problem ();
3299 mark_dfs_back_edges ();
3301 /* Set up block info for each basic block. */
3302 alloc_aux_for_blocks (sizeof (struct block_info_def
));
3303 FOR_EACH_BB_FN (bb
, cfun
)
3305 block_info bi
= BLOCK_INFO (bb
);
3310 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
3311 if (!(e
->flags
& EDGE_DFS_BACK
)
3312 && e
->src
!= ENTRY_BLOCK_PTR_FOR_FN (cfun
))
3315 /* Set current register status at last instruction `uninitialized'. */
3316 bi
->stack_in
.top
= -2;
3318 /* Copy live_at_end and live_at_start into temporaries. */
3319 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
3321 if (REGNO_REG_SET_P (DF_LR_OUT (bb
), reg
))
3322 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
3323 if (REGNO_REG_SET_P (DF_LR_IN (bb
), reg
))
3324 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
3328 /* Create the replacement registers up front. */
3329 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3332 FOR_EACH_MODE_IN_CLASS (mode
, MODE_FLOAT
)
3333 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3334 FOR_EACH_MODE_IN_CLASS (mode
, MODE_COMPLEX_FLOAT
)
3335 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3338 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
3340 /* A QNaN for initializing uninitialized variables.
3342 ??? We can't load from constant memory in PIC mode, because
3343 we're inserting these instructions before the prologue and
3344 the PIC register hasn't been set up. In that case, fall back
3345 on zero, which we can get from `fldz'. */
3347 if ((flag_pic
&& !TARGET_64BIT
)
3348 || ix86_cmodel
== CM_LARGE
|| ix86_cmodel
== CM_LARGE_PIC
)
3349 not_a_num
= CONST0_RTX (SFmode
);
3354 real_nan (&r
, "", 1, SFmode
);
3355 not_a_num
= const_double_from_real_value (r
, SFmode
);
3356 not_a_num
= force_const_mem (SFmode
, not_a_num
);
3359 /* Allocate a cache for stack_regs_mentioned. */
3360 max_uid
= get_max_uid ();
3361 stack_regs_mentioned_data
.create (max_uid
+ 1);
3362 memset (stack_regs_mentioned_data
.address (),
3363 0, sizeof (char) * (max_uid
+ 1));
3367 free_aux_for_blocks ();
3370 #endif /* STACK_REGS */
3374 const pass_data pass_data_stack_regs
=
3376 RTL_PASS
, /* type */
3377 "*stack_regs", /* name */
3378 OPTGROUP_NONE
, /* optinfo_flags */
3379 TV_REG_STACK
, /* tv_id */
3380 0, /* properties_required */
3381 0, /* properties_provided */
3382 0, /* properties_destroyed */
3383 0, /* todo_flags_start */
3384 0, /* todo_flags_finish */
3387 class pass_stack_regs
: public rtl_opt_pass
3390 pass_stack_regs (gcc::context
*ctxt
)
3391 : rtl_opt_pass (pass_data_stack_regs
, ctxt
)
3394 /* opt_pass methods: */
3395 virtual bool gate (function
*)
3404 }; // class pass_stack_regs
3409 make_pass_stack_regs (gcc::context
*ctxt
)
3411 return new pass_stack_regs (ctxt
);
3414 /* Convert register usage from flat register file usage to a stack
3417 rest_of_handle_stack_regs (void)
3421 regstack_completed
= 1;
3428 const pass_data pass_data_stack_regs_run
=
3430 RTL_PASS
, /* type */
3432 OPTGROUP_NONE
, /* optinfo_flags */
3433 TV_REG_STACK
, /* tv_id */
3434 0, /* properties_required */
3435 0, /* properties_provided */
3436 0, /* properties_destroyed */
3437 0, /* todo_flags_start */
3438 TODO_df_finish
, /* todo_flags_finish */
3441 class pass_stack_regs_run
: public rtl_opt_pass
3444 pass_stack_regs_run (gcc::context
*ctxt
)
3445 : rtl_opt_pass (pass_data_stack_regs_run
, ctxt
)
3448 /* opt_pass methods: */
3449 virtual unsigned int execute (function
*)
3451 return rest_of_handle_stack_regs ();
3454 }; // class pass_stack_regs_run
3459 make_pass_stack_regs_run (gcc::context
*ctxt
)
3461 return new pass_stack_regs_run (ctxt
);