1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
237 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
238 from_mode
= to_int_mode
;
241 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
243 if (to_mode
== from_mode
244 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
246 emit_move_insn (to
, from
);
250 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
253 GET_MODE_BITSIZE (to_mode
)));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_endp (int);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation. If ENDP is 1 return
1186 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1187 end minus one byte ala stpcpy. */
1190 move_by_pieces_d::finish_endp (int endp
)
1192 gcc_assert (!m_reverse
);
1195 m_to
.maybe_postinc (-1);
1198 return m_to
.adjust (QImode
, m_offset
);
1201 /* Generate several move instructions to copy LEN bytes from block FROM to
1202 block TO. (These are MEM rtx's with BLKmode).
1204 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1205 used to push FROM to the stack.
1207 ALIGN is maximum stack alignment we can assume.
1209 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1210 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1214 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1215 unsigned int align
, int endp
)
1217 #ifndef PUSH_ROUNDING
1222 move_by_pieces_d
data (to
, from
, len
, align
);
1227 return data
.finish_endp (endp
);
1232 /* Derived class from op_by_pieces_d, providing support for block move
1235 class store_by_pieces_d
: public op_by_pieces_d
1237 insn_gen_fn m_gen_fun
;
1238 void generate (rtx
, rtx
, machine_mode
);
1239 bool prepare_mode (machine_mode
, unsigned int);
1242 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1243 unsigned HOST_WIDE_INT len
, unsigned int align
)
1244 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1247 rtx
finish_endp (int);
1250 /* Return true if MODE can be used for a set of stores, given an
1251 alignment ALIGN. Prepare whatever data is necessary for later
1252 calls to generate. */
1255 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1257 insn_code icode
= optab_handler (mov_optab
, mode
);
1258 m_gen_fun
= GEN_FCN (icode
);
1259 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1262 /* A callback used when iterating for a store_by_pieces_operation.
1263 OP0 and OP1 are the values that have been loaded and should be
1264 compared in MODE. If OP0 is NULL, this means we should generate a
1265 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1266 gen function that should be used to generate the mode. */
1269 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1271 emit_insn (m_gen_fun (op0
, op1
));
1274 /* Perform the final adjustment at the end of a string to obtain the
1275 correct return value for the block operation. If ENDP is 1 return
1276 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1277 end minus one byte ala stpcpy. */
1280 store_by_pieces_d::finish_endp (int endp
)
1282 gcc_assert (!m_reverse
);
1285 m_to
.maybe_postinc (-1);
1288 return m_to
.adjust (QImode
, m_offset
);
1291 /* Determine whether the LEN bytes generated by CONSTFUN can be
1292 stored to memory using several move instructions. CONSTFUNDATA is
1293 a pointer which will be passed as argument in every CONSTFUN call.
1294 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1295 a memset operation and false if it's a copy of a constant string.
1296 Return nonzero if a call to store_by_pieces should succeed. */
1299 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1300 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1301 void *constfundata
, unsigned int align
, bool memsetp
)
1303 unsigned HOST_WIDE_INT l
;
1304 unsigned int max_size
;
1305 HOST_WIDE_INT offset
= 0;
1306 enum insn_code icode
;
1308 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1309 rtx cst ATTRIBUTE_UNUSED
;
1314 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1318 optimize_insn_for_speed_p ()))
1321 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1323 /* We would first store what we can in the largest integer mode, then go to
1324 successively smaller modes. */
1327 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1331 max_size
= STORE_MAX_PIECES
+ 1;
1332 while (max_size
> 1 && l
> 0)
1334 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1336 icode
= optab_handler (mov_optab
, mode
);
1337 if (icode
!= CODE_FOR_nothing
1338 && align
>= GET_MODE_ALIGNMENT (mode
))
1340 unsigned int size
= GET_MODE_SIZE (mode
);
1347 cst
= (*constfun
) (constfundata
, offset
, mode
);
1348 if (!targetm
.legitimate_constant_p (mode
, cst
))
1358 max_size
= GET_MODE_SIZE (mode
);
1361 /* The code above should have handled everything. */
1368 /* Generate several move instructions to store LEN bytes generated by
1369 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1370 pointer which will be passed as argument in every CONSTFUN call.
1371 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1372 a memset operation and false if it's a copy of a constant string.
1373 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1374 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1378 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1379 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1380 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1384 gcc_assert (endp
!= 2);
1388 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1390 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1391 optimize_insn_for_speed_p ()));
1393 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1397 return data
.finish_endp (endp
);
1402 /* Callback routine for clear_by_pieces.
1403 Return const0_rtx unconditionally. */
1406 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1411 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1412 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1415 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1420 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1424 /* Context used by compare_by_pieces_genfn. It stores the fail label
1425 to jump to in case of miscomparison, and for branch ratios greater than 1,
1426 it stores an accumulator and the current and maximum counts before
1427 emitting another branch. */
1429 class compare_by_pieces_d
: public op_by_pieces_d
1431 rtx_code_label
*m_fail_label
;
1433 int m_count
, m_batch
;
1435 void generate (rtx
, rtx
, machine_mode
);
1436 bool prepare_mode (machine_mode
, unsigned int);
1437 void finish_mode (machine_mode
);
1439 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1440 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1441 rtx_code_label
*fail_label
)
1442 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1444 m_fail_label
= fail_label
;
1448 /* A callback used when iterating for a compare_by_pieces_operation.
1449 OP0 and OP1 are the values that have been loaded and should be
1450 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1451 context structure. */
1454 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1458 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1459 true, OPTAB_LIB_WIDEN
);
1461 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1462 true, OPTAB_LIB_WIDEN
);
1463 m_accumulator
= temp
;
1465 if (++m_count
< m_batch
)
1469 op0
= m_accumulator
;
1471 m_accumulator
= NULL_RTX
;
1473 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1474 m_fail_label
, profile_probability::uninitialized ());
1477 /* Return true if MODE can be used for a set of moves and comparisons,
1478 given an alignment ALIGN. Prepare whatever data is necessary for
1479 later calls to generate. */
1482 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1484 insn_code icode
= optab_handler (mov_optab
, mode
);
1485 if (icode
== CODE_FOR_nothing
1486 || align
< GET_MODE_ALIGNMENT (mode
)
1487 || !can_compare_p (EQ
, mode
, ccp_jump
))
1489 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1492 m_accumulator
= NULL_RTX
;
1497 /* Called after expanding a series of comparisons in MODE. If we have
1498 accumulated results for which we haven't emitted a branch yet, do
1502 compare_by_pieces_d::finish_mode (machine_mode mode
)
1504 if (m_accumulator
!= NULL_RTX
)
1505 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1506 NULL_RTX
, NULL
, m_fail_label
,
1507 profile_probability::uninitialized ());
1510 /* Generate several move instructions to compare LEN bytes from blocks
1511 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1513 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1514 used to push FROM to the stack.
1516 ALIGN is maximum stack alignment we can assume.
1518 Optionally, the caller can pass a constfn and associated data in A1_CFN
1519 and A1_CFN_DATA. describing that the second operand being compared is a
1520 known constant and how to obtain its data. */
1523 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1524 rtx target
, unsigned int align
,
1525 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1527 rtx_code_label
*fail_label
= gen_label_rtx ();
1528 rtx_code_label
*end_label
= gen_label_rtx ();
1530 if (target
== NULL_RTX
1531 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1532 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1534 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1539 emit_move_insn (target
, const0_rtx
);
1540 emit_jump (end_label
);
1542 emit_label (fail_label
);
1543 emit_move_insn (target
, const1_rtx
);
1544 emit_label (end_label
);
1549 /* Emit code to move a block Y to a block X. This may be done with
1550 string-move instructions, with multiple scalar move instructions,
1551 or with a library call.
1553 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1554 SIZE is an rtx that says how long they are.
1555 ALIGN is the maximum alignment we can assume they have.
1556 METHOD describes what kind of copy this is, and what mechanisms may be used.
1557 MIN_SIZE is the minimal size of block to move
1558 MAX_SIZE is the maximal size of block to move, if it can not be represented
1559 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1561 Return the address of the new block, if memcpy is called and returns it,
1565 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1566 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1567 unsigned HOST_WIDE_INT min_size
,
1568 unsigned HOST_WIDE_INT max_size
,
1569 unsigned HOST_WIDE_INT probable_max_size
)
1576 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1581 case BLOCK_OP_NORMAL
:
1582 case BLOCK_OP_TAILCALL
:
1586 case BLOCK_OP_CALL_PARM
:
1587 may_use_call
= block_move_libcall_safe_for_call_parm ();
1589 /* Make inhibit_defer_pop nonzero around the library call
1590 to force it to pop the arguments right away. */
1594 case BLOCK_OP_NO_LIBCALL
:
1598 case BLOCK_OP_NO_LIBCALL_RET
:
1606 gcc_assert (MEM_P (x
) && MEM_P (y
));
1607 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1608 gcc_assert (align
>= BITS_PER_UNIT
);
1610 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1611 block copy is more efficient for other large modes, e.g. DCmode. */
1612 x
= adjust_address (x
, BLKmode
, 0);
1613 y
= adjust_address (y
, BLKmode
, 0);
1615 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1616 can be incorrect is coming from __builtin_memcpy. */
1617 poly_int64 const_size
;
1618 if (poly_int_rtx_p (size
, &const_size
))
1620 x
= shallow_copy_rtx (x
);
1621 y
= shallow_copy_rtx (y
);
1622 set_mem_size (x
, const_size
);
1623 set_mem_size (y
, const_size
);
1626 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1627 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1628 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1629 expected_align
, expected_size
,
1630 min_size
, max_size
, probable_max_size
))
1632 else if (may_use_call
1633 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1634 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1636 if (may_use_call
< 0)
1639 /* Since x and y are passed to a libcall, mark the corresponding
1640 tree EXPR as addressable. */
1641 tree y_expr
= MEM_EXPR (y
);
1642 tree x_expr
= MEM_EXPR (x
);
1644 mark_addressable (y_expr
);
1646 mark_addressable (x_expr
);
1647 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1648 method
== BLOCK_OP_TAILCALL
);
1652 emit_block_move_via_loop (x
, y
, size
, align
);
1654 if (method
== BLOCK_OP_CALL_PARM
)
1661 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1663 unsigned HOST_WIDE_INT max
, min
= 0;
1664 if (GET_CODE (size
) == CONST_INT
)
1665 min
= max
= UINTVAL (size
);
1667 max
= GET_MODE_MASK (GET_MODE (size
));
1668 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1672 /* A subroutine of emit_block_move. Returns true if calling the
1673 block move libcall will not clobber any parameters which may have
1674 already been placed on the stack. */
1677 block_move_libcall_safe_for_call_parm (void)
1679 #if defined (REG_PARM_STACK_SPACE)
1683 /* If arguments are pushed on the stack, then they're safe. */
1687 /* If registers go on the stack anyway, any argument is sure to clobber
1688 an outgoing argument. */
1689 #if defined (REG_PARM_STACK_SPACE)
1690 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1691 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1692 depend on its argument. */
1694 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1695 && REG_PARM_STACK_SPACE (fn
) != 0)
1699 /* If any argument goes in memory, then it might clobber an outgoing
1702 CUMULATIVE_ARGS args_so_far_v
;
1703 cumulative_args_t args_so_far
;
1706 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1707 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1708 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1710 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1711 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1713 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1714 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1716 if (!tmp
|| !REG_P (tmp
))
1718 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1720 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1727 /* A subroutine of emit_block_move. Expand a movmem pattern;
1728 return true if successful. */
1731 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1732 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1733 unsigned HOST_WIDE_INT min_size
,
1734 unsigned HOST_WIDE_INT max_size
,
1735 unsigned HOST_WIDE_INT probable_max_size
)
1737 int save_volatile_ok
= volatile_ok
;
1739 if (expected_align
< align
)
1740 expected_align
= align
;
1741 if (expected_size
!= -1)
1743 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1744 expected_size
= probable_max_size
;
1745 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1746 expected_size
= min_size
;
1749 /* Since this is a move insn, we don't care about volatility. */
1752 /* Try the most limited insn first, because there's no point
1753 including more than one in the machine description unless
1754 the more limited one has some advantage. */
1756 opt_scalar_int_mode mode_iter
;
1757 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1759 scalar_int_mode mode
= mode_iter
.require ();
1760 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1762 if (code
!= CODE_FOR_nothing
1763 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1764 here because if SIZE is less than the mode mask, as it is
1765 returned by the macro, it will definitely be less than the
1766 actual mode mask. Since SIZE is within the Pmode address
1767 space, we limit MODE to Pmode. */
1768 && ((CONST_INT_P (size
)
1769 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1770 <= (GET_MODE_MASK (mode
) >> 1)))
1771 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1772 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1774 struct expand_operand ops
[9];
1777 /* ??? When called via emit_block_move_for_call, it'd be
1778 nice if there were some way to inform the backend, so
1779 that it doesn't fail the expansion because it thinks
1780 emitting the libcall would be more efficient. */
1781 nops
= insn_data
[(int) code
].n_generator_args
;
1782 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1784 create_fixed_operand (&ops
[0], x
);
1785 create_fixed_operand (&ops
[1], y
);
1786 /* The check above guarantees that this size conversion is valid. */
1787 create_convert_operand_to (&ops
[2], size
, mode
, true);
1788 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1791 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1792 create_integer_operand (&ops
[5], expected_size
);
1796 create_integer_operand (&ops
[6], min_size
);
1797 /* If we can not represent the maximal size,
1798 make parameter NULL. */
1799 if ((HOST_WIDE_INT
) max_size
!= -1)
1800 create_integer_operand (&ops
[7], max_size
);
1802 create_fixed_operand (&ops
[7], NULL
);
1806 /* If we can not represent the maximal size,
1807 make parameter NULL. */
1808 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1809 create_integer_operand (&ops
[8], probable_max_size
);
1811 create_fixed_operand (&ops
[8], NULL
);
1813 if (maybe_expand_insn (code
, nops
, ops
))
1815 volatile_ok
= save_volatile_ok
;
1821 volatile_ok
= save_volatile_ok
;
1825 /* A subroutine of emit_block_move. Copy the data via an explicit
1826 loop. This is used only when libcalls are forbidden. */
1827 /* ??? It'd be nice to copy in hunks larger than QImode. */
1830 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1831 unsigned int align ATTRIBUTE_UNUSED
)
1833 rtx_code_label
*cmp_label
, *top_label
;
1834 rtx iter
, x_addr
, y_addr
, tmp
;
1835 machine_mode x_addr_mode
= get_address_mode (x
);
1836 machine_mode y_addr_mode
= get_address_mode (y
);
1837 machine_mode iter_mode
;
1839 iter_mode
= GET_MODE (size
);
1840 if (iter_mode
== VOIDmode
)
1841 iter_mode
= word_mode
;
1843 top_label
= gen_label_rtx ();
1844 cmp_label
= gen_label_rtx ();
1845 iter
= gen_reg_rtx (iter_mode
);
1847 emit_move_insn (iter
, const0_rtx
);
1849 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1850 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1851 do_pending_stack_adjust ();
1853 emit_jump (cmp_label
);
1854 emit_label (top_label
);
1856 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1857 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1859 if (x_addr_mode
!= y_addr_mode
)
1860 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1861 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1863 x
= change_address (x
, QImode
, x_addr
);
1864 y
= change_address (y
, QImode
, y_addr
);
1866 emit_move_insn (x
, y
);
1868 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1869 true, OPTAB_LIB_WIDEN
);
1871 emit_move_insn (iter
, tmp
);
1873 emit_label (cmp_label
);
1875 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1877 profile_probability::guessed_always ()
1878 .apply_scale (9, 10));
1881 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1882 TAILCALL is true if this is a tail call. */
1885 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1886 rtx size
, bool tailcall
)
1888 rtx dst_addr
, src_addr
;
1889 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1890 machine_mode size_mode
;
1892 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1893 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1894 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1896 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1897 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1898 src_tree
= make_tree (ptr_type_node
, src_addr
);
1900 size_mode
= TYPE_MODE (sizetype
);
1901 size
= convert_to_mode (size_mode
, size
, 1);
1902 size
= copy_to_mode_reg (size_mode
, size
);
1903 size_tree
= make_tree (sizetype
, size
);
1905 /* It is incorrect to use the libcall calling conventions for calls to
1906 memcpy/memmove/memcmp because they can be provided by the user. */
1907 tree fn
= builtin_decl_implicit (fncode
);
1908 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1909 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1911 return expand_call (call_expr
, NULL_RTX
, false);
1914 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1915 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1916 otherwise return null. */
1919 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1920 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1921 HOST_WIDE_INT align
)
1923 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1925 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1928 struct expand_operand ops
[5];
1929 create_output_operand (&ops
[0], target
, insn_mode
);
1930 create_fixed_operand (&ops
[1], arg1_rtx
);
1931 create_fixed_operand (&ops
[2], arg2_rtx
);
1932 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1933 TYPE_UNSIGNED (arg3_type
));
1934 create_integer_operand (&ops
[4], align
);
1935 if (maybe_expand_insn (icode
, 5, ops
))
1936 return ops
[0].value
;
1940 /* Expand a block compare between X and Y with length LEN using the
1941 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1942 of the expression that was used to calculate the length. ALIGN
1943 gives the known minimum common alignment. */
1946 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1949 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1950 implementing memcmp because it will stop if it encounters two
1952 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1954 if (icode
== CODE_FOR_nothing
)
1957 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1960 /* Emit code to compare a block Y to a block X. This may be done with
1961 string-compare instructions, with multiple scalar instructions,
1962 or with a library call.
1964 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1965 they are. LEN_TYPE is the type of the expression that was used to
1968 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1969 value of a normal memcmp call, instead we can just compare for equality.
1970 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1973 Optionally, the caller can pass a constfn and associated data in Y_CFN
1974 and Y_CFN_DATA. describing that the second operand being compared is a
1975 known constant and how to obtain its data.
1976 Return the result of the comparison, or NULL_RTX if we failed to
1977 perform the operation. */
1980 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1981 bool equality_only
, by_pieces_constfn y_cfn
,
1986 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1989 gcc_assert (MEM_P (x
) && MEM_P (y
));
1990 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1991 gcc_assert (align
>= BITS_PER_UNIT
);
1993 x
= adjust_address (x
, BLKmode
, 0);
1994 y
= adjust_address (y
, BLKmode
, 0);
1997 && CONST_INT_P (len
)
1998 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1999 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2002 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2007 /* Copy all or part of a value X into registers starting at REGNO.
2008 The number of registers to be filled is NREGS. */
2011 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2016 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2017 x
= validize_mem (force_const_mem (mode
, x
));
2019 /* See if the machine can do this with a load multiple insn. */
2020 if (targetm
.have_load_multiple ())
2022 rtx_insn
*last
= get_last_insn ();
2023 rtx first
= gen_rtx_REG (word_mode
, regno
);
2024 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2031 delete_insns_since (last
);
2034 for (int i
= 0; i
< nregs
; i
++)
2035 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2036 operand_subword_force (x
, i
, mode
));
2039 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2040 The number of registers to be filled is NREGS. */
2043 move_block_from_reg (int regno
, rtx x
, int nregs
)
2048 /* See if the machine can do this with a store multiple insn. */
2049 if (targetm
.have_store_multiple ())
2051 rtx_insn
*last
= get_last_insn ();
2052 rtx first
= gen_rtx_REG (word_mode
, regno
);
2053 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2060 delete_insns_since (last
);
2063 for (int i
= 0; i
< nregs
; i
++)
2065 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2069 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2073 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2074 ORIG, where ORIG is a non-consecutive group of registers represented by
2075 a PARALLEL. The clone is identical to the original except in that the
2076 original set of registers is replaced by a new set of pseudo registers.
2077 The new set has the same modes as the original set. */
2080 gen_group_rtx (rtx orig
)
2085 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2087 length
= XVECLEN (orig
, 0);
2088 tmps
= XALLOCAVEC (rtx
, length
);
2090 /* Skip a NULL entry in first slot. */
2091 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2096 for (; i
< length
; i
++)
2098 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2099 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2101 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2104 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2107 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2108 except that values are placed in TMPS[i], and must later be moved
2109 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2112 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2117 machine_mode m
= GET_MODE (orig_src
);
2119 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2122 && !SCALAR_INT_MODE_P (m
)
2123 && !MEM_P (orig_src
)
2124 && GET_CODE (orig_src
) != CONCAT
)
2126 scalar_int_mode imode
;
2127 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2129 src
= gen_reg_rtx (imode
);
2130 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2134 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2135 emit_move_insn (src
, orig_src
);
2137 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2141 /* Check for a NULL entry, used to indicate that the parameter goes
2142 both on the stack and in registers. */
2143 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2148 /* Process the pieces. */
2149 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2151 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2152 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2153 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2154 poly_int64 shift
= 0;
2156 /* Handle trailing fragments that run over the size of the struct.
2157 It's the target's responsibility to make sure that the fragment
2158 cannot be strictly smaller in some cases and strictly larger
2160 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2161 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2163 /* Arrange to shift the fragment to where it belongs.
2164 extract_bit_field loads to the lsb of the reg. */
2166 #ifdef BLOCK_REG_PADDING
2167 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2168 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2173 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2174 bytelen
= ssize
- bytepos
;
2175 gcc_assert (maybe_gt (bytelen
, 0));
2178 /* If we won't be loading directly from memory, protect the real source
2179 from strange tricks we might play; but make sure that the source can
2180 be loaded directly into the destination. */
2182 if (!MEM_P (orig_src
)
2183 && (!CONSTANT_P (orig_src
)
2184 || (GET_MODE (orig_src
) != mode
2185 && GET_MODE (orig_src
) != VOIDmode
)))
2187 if (GET_MODE (orig_src
) == VOIDmode
)
2188 src
= gen_reg_rtx (mode
);
2190 src
= gen_reg_rtx (GET_MODE (orig_src
));
2192 emit_move_insn (src
, orig_src
);
2195 /* Optimize the access just a bit. */
2197 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2198 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2199 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2200 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2202 tmps
[i
] = gen_reg_rtx (mode
);
2203 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2205 else if (COMPLEX_MODE_P (mode
)
2206 && GET_MODE (src
) == mode
2207 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2208 /* Let emit_move_complex do the bulk of the work. */
2210 else if (GET_CODE (src
) == CONCAT
)
2212 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2213 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2217 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2218 && known_le (subpos
+ bytelen
, slen0
))
2220 /* The following assumes that the concatenated objects all
2221 have the same size. In this case, a simple calculation
2222 can be used to determine the object and the bit field
2224 tmps
[i
] = XEXP (src
, elt
);
2225 if (maybe_ne (subpos
, 0)
2226 || maybe_ne (subpos
+ bytelen
, slen0
)
2227 || (!CONSTANT_P (tmps
[i
])
2228 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2229 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2230 subpos
* BITS_PER_UNIT
,
2231 1, NULL_RTX
, mode
, mode
, false,
2238 gcc_assert (known_eq (bytepos
, 0));
2239 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2240 emit_move_insn (mem
, src
);
2241 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2242 0, 1, NULL_RTX
, mode
, mode
, false,
2246 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2247 SIMD register, which is currently broken. While we get GCC
2248 to emit proper RTL for these cases, let's dump to memory. */
2249 else if (VECTOR_MODE_P (GET_MODE (dst
))
2252 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2255 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2256 emit_move_insn (mem
, src
);
2257 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2259 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2260 && XVECLEN (dst
, 0) > 1)
2261 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2262 else if (CONSTANT_P (src
))
2264 if (known_eq (bytelen
, ssize
))
2270 /* TODO: const_wide_int can have sizes other than this... */
2271 gcc_assert (known_eq (2 * bytelen
, ssize
));
2272 split_double (src
, &first
, &second
);
2279 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2282 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2283 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2284 mode
, mode
, false, NULL
);
2286 if (maybe_ne (shift
, 0))
2287 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2292 /* Emit code to move a block SRC of type TYPE to a block DST,
2293 where DST is non-consecutive registers represented by a PARALLEL.
2294 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2298 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2303 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2304 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2306 /* Copy the extracted pieces into the proper (probable) hard regs. */
2307 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2309 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2312 emit_move_insn (d
, tmps
[i
]);
2316 /* Similar, but load SRC into new pseudos in a format that looks like
2317 PARALLEL. This can later be fed to emit_group_move to get things
2318 in the right place. */
2321 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2326 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2327 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2329 /* Convert the vector to look just like the original PARALLEL, except
2330 with the computed values. */
2331 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2333 rtx e
= XVECEXP (parallel
, 0, i
);
2334 rtx d
= XEXP (e
, 0);
2338 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2339 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2341 RTVEC_ELT (vec
, i
) = e
;
2344 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2347 /* Emit code to move a block SRC to block DST, where SRC and DST are
2348 non-consecutive groups of registers, each represented by a PARALLEL. */
2351 emit_group_move (rtx dst
, rtx src
)
2355 gcc_assert (GET_CODE (src
) == PARALLEL
2356 && GET_CODE (dst
) == PARALLEL
2357 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2359 /* Skip first entry if NULL. */
2360 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2361 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2362 XEXP (XVECEXP (src
, 0, i
), 0));
2365 /* Move a group of registers represented by a PARALLEL into pseudos. */
2368 emit_group_move_into_temps (rtx src
)
2370 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2373 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2375 rtx e
= XVECEXP (src
, 0, i
);
2376 rtx d
= XEXP (e
, 0);
2379 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2380 RTVEC_ELT (vec
, i
) = e
;
2383 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2386 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2387 where SRC is non-consecutive registers represented by a PARALLEL.
2388 SSIZE represents the total size of block ORIG_DST, or -1 if not
2392 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2396 int start
, finish
, i
;
2397 machine_mode m
= GET_MODE (orig_dst
);
2399 gcc_assert (GET_CODE (src
) == PARALLEL
);
2401 if (!SCALAR_INT_MODE_P (m
)
2402 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2404 scalar_int_mode imode
;
2405 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2407 dst
= gen_reg_rtx (imode
);
2408 emit_group_store (dst
, src
, type
, ssize
);
2409 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2413 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2414 emit_group_store (dst
, src
, type
, ssize
);
2416 emit_move_insn (orig_dst
, dst
);
2420 /* Check for a NULL entry, used to indicate that the parameter goes
2421 both on the stack and in registers. */
2422 if (XEXP (XVECEXP (src
, 0, 0), 0))
2426 finish
= XVECLEN (src
, 0);
2428 tmps
= XALLOCAVEC (rtx
, finish
);
2430 /* Copy the (probable) hard regs into pseudos. */
2431 for (i
= start
; i
< finish
; i
++)
2433 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2434 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2436 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2437 emit_move_insn (tmps
[i
], reg
);
2443 /* If we won't be storing directly into memory, protect the real destination
2444 from strange tricks we might play. */
2446 if (GET_CODE (dst
) == PARALLEL
)
2450 /* We can get a PARALLEL dst if there is a conditional expression in
2451 a return statement. In that case, the dst and src are the same,
2452 so no action is necessary. */
2453 if (rtx_equal_p (dst
, src
))
2456 /* It is unclear if we can ever reach here, but we may as well handle
2457 it. Allocate a temporary, and split this into a store/load to/from
2459 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2460 emit_group_store (temp
, src
, type
, ssize
);
2461 emit_group_load (dst
, temp
, type
, ssize
);
2464 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2466 machine_mode outer
= GET_MODE (dst
);
2472 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2473 dst
= gen_reg_rtx (outer
);
2475 /* Make life a bit easier for combine. */
2476 /* If the first element of the vector is the low part
2477 of the destination mode, use a paradoxical subreg to
2478 initialize the destination. */
2481 inner
= GET_MODE (tmps
[start
]);
2482 bytepos
= subreg_lowpart_offset (inner
, outer
);
2483 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2486 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2490 emit_move_insn (dst
, temp
);
2497 /* If the first element wasn't the low part, try the last. */
2499 && start
< finish
- 1)
2501 inner
= GET_MODE (tmps
[finish
- 1]);
2502 bytepos
= subreg_lowpart_offset (inner
, outer
);
2503 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2507 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2511 emit_move_insn (dst
, temp
);
2518 /* Otherwise, simply initialize the result to zero. */
2520 emit_move_insn (dst
, CONST0_RTX (outer
));
2523 /* Process the pieces. */
2524 for (i
= start
; i
< finish
; i
++)
2526 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2527 machine_mode mode
= GET_MODE (tmps
[i
]);
2528 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2529 poly_uint64 adj_bytelen
;
2532 /* Handle trailing fragments that run over the size of the struct.
2533 It's the target's responsibility to make sure that the fragment
2534 cannot be strictly smaller in some cases and strictly larger
2536 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2537 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2538 adj_bytelen
= ssize
- bytepos
;
2540 adj_bytelen
= bytelen
;
2542 if (GET_CODE (dst
) == CONCAT
)
2544 if (known_le (bytepos
+ adj_bytelen
,
2545 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2546 dest
= XEXP (dst
, 0);
2547 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2549 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2550 dest
= XEXP (dst
, 1);
2554 machine_mode dest_mode
= GET_MODE (dest
);
2555 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2557 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2559 if (GET_MODE_ALIGNMENT (dest_mode
)
2560 >= GET_MODE_ALIGNMENT (tmp_mode
))
2562 dest
= assign_stack_temp (dest_mode
,
2563 GET_MODE_SIZE (dest_mode
));
2564 emit_move_insn (adjust_address (dest
,
2572 dest
= assign_stack_temp (tmp_mode
,
2573 GET_MODE_SIZE (tmp_mode
));
2574 emit_move_insn (dest
, tmps
[i
]);
2575 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2581 /* Handle trailing fragments that run over the size of the struct. */
2582 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2584 /* store_bit_field always takes its value from the lsb.
2585 Move the fragment to the lsb if it's not already there. */
2587 #ifdef BLOCK_REG_PADDING
2588 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2589 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2595 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2596 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2600 /* Make sure not to write past the end of the struct. */
2601 store_bit_field (dest
,
2602 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2603 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2604 VOIDmode
, tmps
[i
], false);
2607 /* Optimize the access just a bit. */
2608 else if (MEM_P (dest
)
2609 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2610 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2611 && multiple_p (bytepos
* BITS_PER_UNIT
,
2612 GET_MODE_ALIGNMENT (mode
))
2613 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2614 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2617 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2618 0, 0, mode
, tmps
[i
], false);
2621 /* Copy from the pseudo into the (probable) hard reg. */
2622 if (orig_dst
!= dst
)
2623 emit_move_insn (orig_dst
, dst
);
2626 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2627 of the value stored in X. */
2630 maybe_emit_group_store (rtx x
, tree type
)
2632 machine_mode mode
= TYPE_MODE (type
);
2633 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2634 if (GET_CODE (x
) == PARALLEL
)
2636 rtx result
= gen_reg_rtx (mode
);
2637 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2643 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2645 This is used on targets that return BLKmode values in registers. */
2648 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2650 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2651 rtx src
= NULL
, dst
= NULL
;
2652 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2653 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2654 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2655 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2656 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2657 fixed_size_mode copy_mode
;
2659 /* BLKmode registers created in the back-end shouldn't have survived. */
2660 gcc_assert (mode
!= BLKmode
);
2662 /* If the structure doesn't take up a whole number of words, see whether
2663 SRCREG is padded on the left or on the right. If it's on the left,
2664 set PADDING_CORRECTION to the number of bits to skip.
2666 In most ABIs, the structure will be returned at the least end of
2667 the register, which translates to right padding on little-endian
2668 targets and left padding on big-endian targets. The opposite
2669 holds if the structure is returned at the most significant
2670 end of the register. */
2671 if (bytes
% UNITS_PER_WORD
!= 0
2672 && (targetm
.calls
.return_in_msb (type
)
2674 : BYTES_BIG_ENDIAN
))
2676 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2678 /* We can use a single move if we have an exact mode for the size. */
2679 else if (MEM_P (target
)
2680 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2681 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2682 && bytes
== GET_MODE_SIZE (mode
))
2684 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2688 /* And if we additionally have the same mode for a register. */
2689 else if (REG_P (target
)
2690 && GET_MODE (target
) == mode
2691 && bytes
== GET_MODE_SIZE (mode
))
2693 emit_move_insn (target
, srcreg
);
2697 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2698 into a new pseudo which is a full word. */
2699 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2701 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2705 /* Copy the structure BITSIZE bits at a time. If the target lives in
2706 memory, take care of not reading/writing past its end by selecting
2707 a copy mode suited to BITSIZE. This should always be possible given
2710 If the target lives in register, make sure not to select a copy mode
2711 larger than the mode of the register.
2713 We could probably emit more efficient code for machines which do not use
2714 strict alignment, but it doesn't seem worth the effort at the current
2717 copy_mode
= word_mode
;
2720 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2721 if (mem_mode
.exists ())
2722 copy_mode
= mem_mode
.require ();
2724 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2727 for (bitpos
= 0, xbitpos
= padding_correction
;
2728 bitpos
< bytes
* BITS_PER_UNIT
;
2729 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2731 /* We need a new source operand each time xbitpos is on a
2732 word boundary and when xbitpos == padding_correction
2733 (the first time through). */
2734 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2735 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2737 /* We need a new destination operand each time bitpos is on
2739 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2741 else if (bitpos
% BITS_PER_WORD
== 0)
2742 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2744 /* Use xbitpos for the source extraction (right justified) and
2745 bitpos for the destination store (left justified). */
2746 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2747 extract_bit_field (src
, bitsize
,
2748 xbitpos
% BITS_PER_WORD
, 1,
2749 NULL_RTX
, copy_mode
, copy_mode
,
2755 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2756 register if it contains any data, otherwise return null.
2758 This is used on targets that return BLKmode values in registers. */
2761 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2764 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2765 unsigned int bitsize
;
2766 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2767 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2768 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2769 fixed_size_mode dst_mode
;
2770 scalar_int_mode min_mode
;
2772 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2774 x
= expand_normal (src
);
2776 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2780 /* If the structure doesn't take up a whole number of words, see
2781 whether the register value should be padded on the left or on
2782 the right. Set PADDING_CORRECTION to the number of padding
2783 bits needed on the left side.
2785 In most ABIs, the structure will be returned at the least end of
2786 the register, which translates to right padding on little-endian
2787 targets and left padding on big-endian targets. The opposite
2788 holds if the structure is returned at the most significant
2789 end of the register. */
2790 if (bytes
% UNITS_PER_WORD
!= 0
2791 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2793 : BYTES_BIG_ENDIAN
))
2794 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2797 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2798 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2799 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2800 min_mode
= smallest_int_mode_for_size (bitsize
);
2802 /* Copy the structure BITSIZE bits at a time. */
2803 for (bitpos
= 0, xbitpos
= padding_correction
;
2804 bitpos
< bytes
* BITS_PER_UNIT
;
2805 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2807 /* We need a new destination pseudo each time xbitpos is
2808 on a word boundary and when xbitpos == padding_correction
2809 (the first time through). */
2810 if (xbitpos
% BITS_PER_WORD
== 0
2811 || xbitpos
== padding_correction
)
2813 /* Generate an appropriate register. */
2814 dst_word
= gen_reg_rtx (word_mode
);
2815 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2817 /* Clear the destination before we move anything into it. */
2818 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2821 /* Find the largest integer mode that can be used to copy all or as
2822 many bits as possible of the structure if the target supports larger
2823 copies. There are too many corner cases here w.r.t to alignments on
2824 the read/writes. So if there is any padding just use single byte
2826 opt_scalar_int_mode mode_iter
;
2827 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2829 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2831 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2832 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2833 && msize
<= BITS_PER_WORD
)
2840 /* We need a new source operand each time bitpos is on a word
2842 if (bitpos
% BITS_PER_WORD
== 0)
2843 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2845 /* Use bitpos for the source extraction (left justified) and
2846 xbitpos for the destination store (right justified). */
2847 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2849 extract_bit_field (src_word
, bitsize
,
2850 bitpos
% BITS_PER_WORD
, 1,
2851 NULL_RTX
, word_mode
, word_mode
,
2856 if (mode
== BLKmode
)
2858 /* Find the smallest integer mode large enough to hold the
2859 entire structure. */
2860 opt_scalar_int_mode mode_iter
;
2861 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2862 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2865 /* A suitable mode should have been found. */
2866 mode
= mode_iter
.require ();
2869 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2870 dst_mode
= word_mode
;
2873 dst
= gen_reg_rtx (dst_mode
);
2875 for (i
= 0; i
< n_regs
; i
++)
2876 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2878 if (mode
!= dst_mode
)
2879 dst
= gen_lowpart (mode
, dst
);
2884 /* Add a USE expression for REG to the (possibly empty) list pointed
2885 to by CALL_FUSAGE. REG must denote a hard register. */
2888 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2890 gcc_assert (REG_P (reg
));
2892 if (!HARD_REGISTER_P (reg
))
2896 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2899 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2900 to by CALL_FUSAGE. REG must denote a hard register. */
2903 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2905 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2908 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2911 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2912 starting at REGNO. All of these registers must be hard registers. */
2915 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2919 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2921 for (i
= 0; i
< nregs
; i
++)
2922 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2925 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2926 PARALLEL REGS. This is for calls that pass values in multiple
2927 non-contiguous locations. The Irix 6 ABI has examples of this. */
2930 use_group_regs (rtx
*call_fusage
, rtx regs
)
2934 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2936 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2938 /* A NULL entry means the parameter goes both on the stack and in
2939 registers. This can also be a MEM for targets that pass values
2940 partially on the stack and partially in registers. */
2941 if (reg
!= 0 && REG_P (reg
))
2942 use_reg (call_fusage
, reg
);
2946 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2947 assigment and the code of the expresion on the RHS is CODE. Return
2951 get_def_for_expr (tree name
, enum tree_code code
)
2955 if (TREE_CODE (name
) != SSA_NAME
)
2958 def_stmt
= get_gimple_for_ssa_name (name
);
2960 || gimple_assign_rhs_code (def_stmt
) != code
)
2966 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2967 assigment and the class of the expresion on the RHS is CLASS. Return
2971 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2975 if (TREE_CODE (name
) != SSA_NAME
)
2978 def_stmt
= get_gimple_for_ssa_name (name
);
2980 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2986 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2987 its length in bytes. */
2990 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2991 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2992 unsigned HOST_WIDE_INT min_size
,
2993 unsigned HOST_WIDE_INT max_size
,
2994 unsigned HOST_WIDE_INT probable_max_size
)
2996 machine_mode mode
= GET_MODE (object
);
2999 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3001 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3002 just move a zero. Otherwise, do this a piece at a time. */
3003 poly_int64 size_val
;
3005 && poly_int_rtx_p (size
, &size_val
)
3006 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3008 rtx zero
= CONST0_RTX (mode
);
3011 emit_move_insn (object
, zero
);
3015 if (COMPLEX_MODE_P (mode
))
3017 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3020 write_complex_part (object
, zero
, 0);
3021 write_complex_part (object
, zero
, 1);
3027 if (size
== const0_rtx
)
3030 align
= MEM_ALIGN (object
);
3032 if (CONST_INT_P (size
)
3033 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3035 optimize_insn_for_speed_p ()))
3036 clear_by_pieces (object
, INTVAL (size
), align
);
3037 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3038 expected_align
, expected_size
,
3039 min_size
, max_size
, probable_max_size
))
3041 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3042 return set_storage_via_libcall (object
, size
, const0_rtx
,
3043 method
== BLOCK_OP_TAILCALL
);
3051 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3053 unsigned HOST_WIDE_INT max
, min
= 0;
3054 if (GET_CODE (size
) == CONST_INT
)
3055 min
= max
= UINTVAL (size
);
3057 max
= GET_MODE_MASK (GET_MODE (size
));
3058 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3062 /* A subroutine of clear_storage. Expand a call to memset.
3063 Return the return value of memset, 0 otherwise. */
3066 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3068 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3069 machine_mode size_mode
;
3071 object
= copy_addr_to_reg (XEXP (object
, 0));
3072 object_tree
= make_tree (ptr_type_node
, object
);
3074 if (!CONST_INT_P (val
))
3075 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3076 val_tree
= make_tree (integer_type_node
, val
);
3078 size_mode
= TYPE_MODE (sizetype
);
3079 size
= convert_to_mode (size_mode
, size
, 1);
3080 size
= copy_to_mode_reg (size_mode
, size
);
3081 size_tree
= make_tree (sizetype
, size
);
3083 /* It is incorrect to use the libcall calling conventions for calls to
3084 memset because it can be provided by the user. */
3085 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3086 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3087 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3089 return expand_call (call_expr
, NULL_RTX
, false);
3092 /* Expand a setmem pattern; return true if successful. */
3095 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3096 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3097 unsigned HOST_WIDE_INT min_size
,
3098 unsigned HOST_WIDE_INT max_size
,
3099 unsigned HOST_WIDE_INT probable_max_size
)
3101 /* Try the most limited insn first, because there's no point
3102 including more than one in the machine description unless
3103 the more limited one has some advantage. */
3105 if (expected_align
< align
)
3106 expected_align
= align
;
3107 if (expected_size
!= -1)
3109 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3110 expected_size
= max_size
;
3111 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3112 expected_size
= min_size
;
3115 opt_scalar_int_mode mode_iter
;
3116 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3118 scalar_int_mode mode
= mode_iter
.require ();
3119 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3121 if (code
!= CODE_FOR_nothing
3122 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3123 here because if SIZE is less than the mode mask, as it is
3124 returned by the macro, it will definitely be less than the
3125 actual mode mask. Since SIZE is within the Pmode address
3126 space, we limit MODE to Pmode. */
3127 && ((CONST_INT_P (size
)
3128 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3129 <= (GET_MODE_MASK (mode
) >> 1)))
3130 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3131 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3133 struct expand_operand ops
[9];
3136 nops
= insn_data
[(int) code
].n_generator_args
;
3137 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3139 create_fixed_operand (&ops
[0], object
);
3140 /* The check above guarantees that this size conversion is valid. */
3141 create_convert_operand_to (&ops
[1], size
, mode
, true);
3142 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3143 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3146 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3147 create_integer_operand (&ops
[5], expected_size
);
3151 create_integer_operand (&ops
[6], min_size
);
3152 /* If we can not represent the maximal size,
3153 make parameter NULL. */
3154 if ((HOST_WIDE_INT
) max_size
!= -1)
3155 create_integer_operand (&ops
[7], max_size
);
3157 create_fixed_operand (&ops
[7], NULL
);
3161 /* If we can not represent the maximal size,
3162 make parameter NULL. */
3163 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3164 create_integer_operand (&ops
[8], probable_max_size
);
3166 create_fixed_operand (&ops
[8], NULL
);
3168 if (maybe_expand_insn (code
, nops
, ops
))
3177 /* Write to one of the components of the complex value CPLX. Write VAL to
3178 the real part if IMAG_P is false, and the imaginary part if its true. */
3181 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3187 if (GET_CODE (cplx
) == CONCAT
)
3189 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3193 cmode
= GET_MODE (cplx
);
3194 imode
= GET_MODE_INNER (cmode
);
3195 ibitsize
= GET_MODE_BITSIZE (imode
);
3197 /* For MEMs simplify_gen_subreg may generate an invalid new address
3198 because, e.g., the original address is considered mode-dependent
3199 by the target, which restricts simplify_subreg from invoking
3200 adjust_address_nv. Instead of preparing fallback support for an
3201 invalid address, we call adjust_address_nv directly. */
3204 emit_move_insn (adjust_address_nv (cplx
, imode
,
3205 imag_p
? GET_MODE_SIZE (imode
) : 0),
3210 /* If the sub-object is at least word sized, then we know that subregging
3211 will work. This special case is important, since store_bit_field
3212 wants to operate on integer modes, and there's rarely an OImode to
3213 correspond to TCmode. */
3214 if (ibitsize
>= BITS_PER_WORD
3215 /* For hard regs we have exact predicates. Assume we can split
3216 the original object if it spans an even number of hard regs.
3217 This special case is important for SCmode on 64-bit platforms
3218 where the natural size of floating-point regs is 32-bit. */
3220 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3221 && REG_NREGS (cplx
) % 2 == 0))
3223 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3224 imag_p
? GET_MODE_SIZE (imode
) : 0);
3227 emit_move_insn (part
, val
);
3231 /* simplify_gen_subreg may fail for sub-word MEMs. */
3232 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3235 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3239 /* Extract one of the components of the complex value CPLX. Extract the
3240 real part if IMAG_P is false, and the imaginary part if it's true. */
3243 read_complex_part (rtx cplx
, bool imag_p
)
3249 if (GET_CODE (cplx
) == CONCAT
)
3250 return XEXP (cplx
, imag_p
);
3252 cmode
= GET_MODE (cplx
);
3253 imode
= GET_MODE_INNER (cmode
);
3254 ibitsize
= GET_MODE_BITSIZE (imode
);
3256 /* Special case reads from complex constants that got spilled to memory. */
3257 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3259 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3260 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3262 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3263 if (CONSTANT_CLASS_P (part
))
3264 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3268 /* For MEMs simplify_gen_subreg may generate an invalid new address
3269 because, e.g., the original address is considered mode-dependent
3270 by the target, which restricts simplify_subreg from invoking
3271 adjust_address_nv. Instead of preparing fallback support for an
3272 invalid address, we call adjust_address_nv directly. */
3274 return adjust_address_nv (cplx
, imode
,
3275 imag_p
? GET_MODE_SIZE (imode
) : 0);
3277 /* If the sub-object is at least word sized, then we know that subregging
3278 will work. This special case is important, since extract_bit_field
3279 wants to operate on integer modes, and there's rarely an OImode to
3280 correspond to TCmode. */
3281 if (ibitsize
>= BITS_PER_WORD
3282 /* For hard regs we have exact predicates. Assume we can split
3283 the original object if it spans an even number of hard regs.
3284 This special case is important for SCmode on 64-bit platforms
3285 where the natural size of floating-point regs is 32-bit. */
3287 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3288 && REG_NREGS (cplx
) % 2 == 0))
3290 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3291 imag_p
? GET_MODE_SIZE (imode
) : 0);
3295 /* simplify_gen_subreg may fail for sub-word MEMs. */
3296 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3299 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3300 true, NULL_RTX
, imode
, imode
, false, NULL
);
3303 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3304 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3305 represented in NEW_MODE. If FORCE is true, this will never happen, as
3306 we'll force-create a SUBREG if needed. */
3309 emit_move_change_mode (machine_mode new_mode
,
3310 machine_mode old_mode
, rtx x
, bool force
)
3314 if (push_operand (x
, GET_MODE (x
)))
3316 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3317 MEM_COPY_ATTRIBUTES (ret
, x
);
3321 /* We don't have to worry about changing the address since the
3322 size in bytes is supposed to be the same. */
3323 if (reload_in_progress
)
3325 /* Copy the MEM to change the mode and move any
3326 substitutions from the old MEM to the new one. */
3327 ret
= adjust_address_nv (x
, new_mode
, 0);
3328 copy_replacements (x
, ret
);
3331 ret
= adjust_address (x
, new_mode
, 0);
3335 /* Note that we do want simplify_subreg's behavior of validating
3336 that the new mode is ok for a hard register. If we were to use
3337 simplify_gen_subreg, we would create the subreg, but would
3338 probably run into the target not being able to implement it. */
3339 /* Except, of course, when FORCE is true, when this is exactly what
3340 we want. Which is needed for CCmodes on some targets. */
3342 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3344 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3350 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3351 an integer mode of the same size as MODE. Returns the instruction
3352 emitted, or NULL if such a move could not be generated. */
3355 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3357 scalar_int_mode imode
;
3358 enum insn_code code
;
3360 /* There must exist a mode of the exact size we require. */
3361 if (!int_mode_for_mode (mode
).exists (&imode
))
3364 /* The target must support moves in this mode. */
3365 code
= optab_handler (mov_optab
, imode
);
3366 if (code
== CODE_FOR_nothing
)
3369 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3372 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3375 return emit_insn (GEN_FCN (code
) (x
, y
));
3378 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3379 Return an equivalent MEM that does not use an auto-increment. */
3382 emit_move_resolve_push (machine_mode mode
, rtx x
)
3384 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3387 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3388 #ifdef PUSH_ROUNDING
3389 adjust
= PUSH_ROUNDING (adjust
);
3391 if (code
== PRE_DEC
|| code
== POST_DEC
)
3393 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3395 rtx expr
= XEXP (XEXP (x
, 0), 1);
3397 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3398 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3399 if (GET_CODE (expr
) == MINUS
)
3401 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3405 /* Do not use anti_adjust_stack, since we don't want to update
3406 stack_pointer_delta. */
3407 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3408 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3409 0, OPTAB_LIB_WIDEN
);
3410 if (temp
!= stack_pointer_rtx
)
3411 emit_move_insn (stack_pointer_rtx
, temp
);
3418 temp
= stack_pointer_rtx
;
3423 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3429 return replace_equiv_address (x
, temp
);
3432 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3433 X is known to satisfy push_operand, and MODE is known to be complex.
3434 Returns the last instruction emitted. */
3437 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3439 scalar_mode submode
= GET_MODE_INNER (mode
);
3442 #ifdef PUSH_ROUNDING
3443 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3445 /* In case we output to the stack, but the size is smaller than the
3446 machine can push exactly, we need to use move instructions. */
3447 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3449 x
= emit_move_resolve_push (mode
, x
);
3450 return emit_move_insn (x
, y
);
3454 /* Note that the real part always precedes the imag part in memory
3455 regardless of machine's endianness. */
3456 switch (GET_CODE (XEXP (x
, 0)))
3470 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3471 read_complex_part (y
, imag_first
));
3472 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3473 read_complex_part (y
, !imag_first
));
3476 /* A subroutine of emit_move_complex. Perform the move from Y to X
3477 via two moves of the parts. Returns the last instruction emitted. */
3480 emit_move_complex_parts (rtx x
, rtx y
)
3482 /* Show the output dies here. This is necessary for SUBREGs
3483 of pseudos since we cannot track their lifetimes correctly;
3484 hard regs shouldn't appear here except as return values. */
3485 if (!reload_completed
&& !reload_in_progress
3486 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3489 write_complex_part (x
, read_complex_part (y
, false), false);
3490 write_complex_part (x
, read_complex_part (y
, true), true);
3492 return get_last_insn ();
3495 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3496 MODE is known to be complex. Returns the last instruction emitted. */
3499 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3503 /* Need to take special care for pushes, to maintain proper ordering
3504 of the data, and possibly extra padding. */
3505 if (push_operand (x
, mode
))
3506 return emit_move_complex_push (mode
, x
, y
);
3508 /* See if we can coerce the target into moving both values at once, except
3509 for floating point where we favor moving as parts if this is easy. */
3510 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3511 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3513 && HARD_REGISTER_P (x
)
3514 && REG_NREGS (x
) == 1)
3516 && HARD_REGISTER_P (y
)
3517 && REG_NREGS (y
) == 1))
3519 /* Not possible if the values are inherently not adjacent. */
3520 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3522 /* Is possible if both are registers (or subregs of registers). */
3523 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3525 /* If one of the operands is a memory, and alignment constraints
3526 are friendly enough, we may be able to do combined memory operations.
3527 We do not attempt this if Y is a constant because that combination is
3528 usually better with the by-parts thing below. */
3529 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3530 && (!STRICT_ALIGNMENT
3531 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3540 /* For memory to memory moves, optimal behavior can be had with the
3541 existing block move logic. */
3542 if (MEM_P (x
) && MEM_P (y
))
3544 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3545 BLOCK_OP_NO_LIBCALL
);
3546 return get_last_insn ();
3549 ret
= emit_move_via_integer (mode
, x
, y
, true);
3554 return emit_move_complex_parts (x
, y
);
3557 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3558 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3561 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3565 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3568 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3569 if (code
!= CODE_FOR_nothing
)
3571 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3572 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3573 return emit_insn (GEN_FCN (code
) (x
, y
));
3577 /* Otherwise, find the MODE_INT mode of the same width. */
3578 ret
= emit_move_via_integer (mode
, x
, y
, false);
3579 gcc_assert (ret
!= NULL
);
3583 /* Return true if word I of OP lies entirely in the
3584 undefined bits of a paradoxical subreg. */
3587 undefined_operand_subword_p (const_rtx op
, int i
)
3589 if (GET_CODE (op
) != SUBREG
)
3591 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3592 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3593 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3594 || known_le (offset
, -UNITS_PER_WORD
));
3597 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3598 MODE is any multi-word or full-word mode that lacks a move_insn
3599 pattern. Note that you will get better code if you define such
3600 patterns, even if they must turn into multiple assembler instructions. */
3603 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3605 rtx_insn
*last_insn
= 0;
3611 /* This function can only handle cases where the number of words is
3612 known at compile time. */
3613 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3614 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3616 /* If X is a push on the stack, do the push now and replace
3617 X with a reference to the stack pointer. */
3618 if (push_operand (x
, mode
))
3619 x
= emit_move_resolve_push (mode
, x
);
3621 /* If we are in reload, see if either operand is a MEM whose address
3622 is scheduled for replacement. */
3623 if (reload_in_progress
&& MEM_P (x
)
3624 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3625 x
= replace_equiv_address_nv (x
, inner
);
3626 if (reload_in_progress
&& MEM_P (y
)
3627 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3628 y
= replace_equiv_address_nv (y
, inner
);
3632 need_clobber
= false;
3633 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3635 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3638 /* Do not generate code for a move if it would come entirely
3639 from the undefined bits of a paradoxical subreg. */
3640 if (undefined_operand_subword_p (y
, i
))
3643 ypart
= operand_subword (y
, i
, 1, mode
);
3645 /* If we can't get a part of Y, put Y into memory if it is a
3646 constant. Otherwise, force it into a register. Then we must
3647 be able to get a part of Y. */
3648 if (ypart
== 0 && CONSTANT_P (y
))
3650 y
= use_anchored_address (force_const_mem (mode
, y
));
3651 ypart
= operand_subword (y
, i
, 1, mode
);
3653 else if (ypart
== 0)
3654 ypart
= operand_subword_force (y
, i
, mode
);
3656 gcc_assert (xpart
&& ypart
);
3658 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3660 last_insn
= emit_move_insn (xpart
, ypart
);
3666 /* Show the output dies here. This is necessary for SUBREGs
3667 of pseudos since we cannot track their lifetimes correctly;
3668 hard regs shouldn't appear here except as return values.
3669 We never want to emit such a clobber after reload. */
3671 && ! (reload_in_progress
|| reload_completed
)
3672 && need_clobber
!= 0)
3680 /* Low level part of emit_move_insn.
3681 Called just like emit_move_insn, but assumes X and Y
3682 are basically valid. */
3685 emit_move_insn_1 (rtx x
, rtx y
)
3687 machine_mode mode
= GET_MODE (x
);
3688 enum insn_code code
;
3690 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3692 code
= optab_handler (mov_optab
, mode
);
3693 if (code
!= CODE_FOR_nothing
)
3694 return emit_insn (GEN_FCN (code
) (x
, y
));
3696 /* Expand complex moves by moving real part and imag part. */
3697 if (COMPLEX_MODE_P (mode
))
3698 return emit_move_complex (mode
, x
, y
);
3700 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3701 || ALL_FIXED_POINT_MODE_P (mode
))
3703 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3705 /* If we can't find an integer mode, use multi words. */
3709 return emit_move_multi_word (mode
, x
, y
);
3712 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3713 return emit_move_ccmode (mode
, x
, y
);
3715 /* Try using a move pattern for the corresponding integer mode. This is
3716 only safe when simplify_subreg can convert MODE constants into integer
3717 constants. At present, it can only do this reliably if the value
3718 fits within a HOST_WIDE_INT. */
3720 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3722 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3726 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3731 return emit_move_multi_word (mode
, x
, y
);
3734 /* Generate code to copy Y into X.
3735 Both Y and X must have the same mode, except that
3736 Y can be a constant with VOIDmode.
3737 This mode cannot be BLKmode; use emit_block_move for that.
3739 Return the last instruction emitted. */
3742 emit_move_insn (rtx x
, rtx y
)
3744 machine_mode mode
= GET_MODE (x
);
3745 rtx y_cst
= NULL_RTX
;
3746 rtx_insn
*last_insn
;
3749 gcc_assert (mode
!= BLKmode
3750 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3755 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3756 && (last_insn
= compress_float_constant (x
, y
)))
3761 if (!targetm
.legitimate_constant_p (mode
, y
))
3763 y
= force_const_mem (mode
, y
);
3765 /* If the target's cannot_force_const_mem prevented the spill,
3766 assume that the target's move expanders will also take care
3767 of the non-legitimate constant. */
3771 y
= use_anchored_address (y
);
3775 /* If X or Y are memory references, verify that their addresses are valid
3778 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3780 && ! push_operand (x
, GET_MODE (x
))))
3781 x
= validize_mem (x
);
3784 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3785 MEM_ADDR_SPACE (y
)))
3786 y
= validize_mem (y
);
3788 gcc_assert (mode
!= BLKmode
);
3790 last_insn
= emit_move_insn_1 (x
, y
);
3792 if (y_cst
&& REG_P (x
)
3793 && (set
= single_set (last_insn
)) != NULL_RTX
3794 && SET_DEST (set
) == x
3795 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3796 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3801 /* Generate the body of an instruction to copy Y into X.
3802 It may be a list of insns, if one insn isn't enough. */
3805 gen_move_insn (rtx x
, rtx y
)
3810 emit_move_insn_1 (x
, y
);
3816 /* If Y is representable exactly in a narrower mode, and the target can
3817 perform the extension directly from constant or memory, then emit the
3818 move as an extension. */
3821 compress_float_constant (rtx x
, rtx y
)
3823 machine_mode dstmode
= GET_MODE (x
);
3824 machine_mode orig_srcmode
= GET_MODE (y
);
3825 machine_mode srcmode
;
3826 const REAL_VALUE_TYPE
*r
;
3827 int oldcost
, newcost
;
3828 bool speed
= optimize_insn_for_speed_p ();
3830 r
= CONST_DOUBLE_REAL_VALUE (y
);
3832 if (targetm
.legitimate_constant_p (dstmode
, y
))
3833 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3835 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3837 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3841 rtx_insn
*last_insn
;
3843 /* Skip if the target can't extend this way. */
3844 ic
= can_extend_p (dstmode
, srcmode
, 0);
3845 if (ic
== CODE_FOR_nothing
)
3848 /* Skip if the narrowed value isn't exact. */
3849 if (! exact_real_truncate (srcmode
, r
))
3852 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3854 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3856 /* Skip if the target needs extra instructions to perform
3858 if (!insn_operand_matches (ic
, 1, trunc_y
))
3860 /* This is valid, but may not be cheaper than the original. */
3861 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3863 if (oldcost
< newcost
)
3866 else if (float_extend_from_mem
[dstmode
][srcmode
])
3868 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3869 /* This is valid, but may not be cheaper than the original. */
3870 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3872 if (oldcost
< newcost
)
3874 trunc_y
= validize_mem (trunc_y
);
3879 /* For CSE's benefit, force the compressed constant pool entry
3880 into a new pseudo. This constant may be used in different modes,
3881 and if not, combine will put things back together for us. */
3882 trunc_y
= force_reg (srcmode
, trunc_y
);
3884 /* If x is a hard register, perform the extension into a pseudo,
3885 so that e.g. stack realignment code is aware of it. */
3887 if (REG_P (x
) && HARD_REGISTER_P (x
))
3888 target
= gen_reg_rtx (dstmode
);
3890 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3891 last_insn
= get_last_insn ();
3894 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3897 return emit_move_insn (x
, target
);
3904 /* Pushing data onto the stack. */
3906 /* Push a block of length SIZE (perhaps variable)
3907 and return an rtx to address the beginning of the block.
3908 The value may be virtual_outgoing_args_rtx.
3910 EXTRA is the number of bytes of padding to push in addition to SIZE.
3911 BELOW nonzero means this padding comes at low addresses;
3912 otherwise, the padding comes at high addresses. */
3915 push_block (rtx size
, poly_int64 extra
, int below
)
3919 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3920 if (CONSTANT_P (size
))
3921 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3922 else if (REG_P (size
) && known_eq (extra
, 0))
3923 anti_adjust_stack (size
);
3926 temp
= copy_to_mode_reg (Pmode
, size
);
3927 if (maybe_ne (extra
, 0))
3928 temp
= expand_binop (Pmode
, add_optab
, temp
,
3929 gen_int_mode (extra
, Pmode
),
3930 temp
, 0, OPTAB_LIB_WIDEN
);
3931 anti_adjust_stack (temp
);
3934 if (STACK_GROWS_DOWNWARD
)
3936 temp
= virtual_outgoing_args_rtx
;
3937 if (maybe_ne (extra
, 0) && below
)
3938 temp
= plus_constant (Pmode
, temp
, extra
);
3943 if (poly_int_rtx_p (size
, &csize
))
3944 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3945 -csize
- (below
? 0 : extra
));
3946 else if (maybe_ne (extra
, 0) && !below
)
3947 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3948 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3951 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3952 negate_rtx (Pmode
, size
));
3955 return memory_address (NARROWEST_INT_MODE
, temp
);
3958 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3961 mem_autoinc_base (rtx mem
)
3965 rtx addr
= XEXP (mem
, 0);
3966 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3967 return XEXP (addr
, 0);
3972 /* A utility routine used here, in reload, and in try_split. The insns
3973 after PREV up to and including LAST are known to adjust the stack,
3974 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3975 placing notes as appropriate. PREV may be NULL, indicating the
3976 entire insn sequence prior to LAST should be scanned.
3978 The set of allowed stack pointer modifications is small:
3979 (1) One or more auto-inc style memory references (aka pushes),
3980 (2) One or more addition/subtraction with the SP as destination,
3981 (3) A single move insn with the SP as destination,
3982 (4) A call_pop insn,
3983 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3985 Insns in the sequence that do not modify the SP are ignored,
3986 except for noreturn calls.
3988 The return value is the amount of adjustment that can be trivially
3989 verified, via immediate operand or auto-inc. If the adjustment
3990 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3993 find_args_size_adjust (rtx_insn
*insn
)
3998 pat
= PATTERN (insn
);
4001 /* Look for a call_pop pattern. */
4004 /* We have to allow non-call_pop patterns for the case
4005 of emit_single_push_insn of a TLS address. */
4006 if (GET_CODE (pat
) != PARALLEL
)
4009 /* All call_pop have a stack pointer adjust in the parallel.
4010 The call itself is always first, and the stack adjust is
4011 usually last, so search from the end. */
4012 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4014 set
= XVECEXP (pat
, 0, i
);
4015 if (GET_CODE (set
) != SET
)
4017 dest
= SET_DEST (set
);
4018 if (dest
== stack_pointer_rtx
)
4021 /* We'd better have found the stack pointer adjust. */
4024 /* Fall through to process the extracted SET and DEST
4025 as if it was a standalone insn. */
4027 else if (GET_CODE (pat
) == SET
)
4029 else if ((set
= single_set (insn
)) != NULL
)
4031 else if (GET_CODE (pat
) == PARALLEL
)
4033 /* ??? Some older ports use a parallel with a stack adjust
4034 and a store for a PUSH_ROUNDING pattern, rather than a
4035 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4036 /* ??? See h8300 and m68k, pushqi1. */
4037 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4039 set
= XVECEXP (pat
, 0, i
);
4040 if (GET_CODE (set
) != SET
)
4042 dest
= SET_DEST (set
);
4043 if (dest
== stack_pointer_rtx
)
4046 /* We do not expect an auto-inc of the sp in the parallel. */
4047 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4048 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4049 != stack_pointer_rtx
);
4057 dest
= SET_DEST (set
);
4059 /* Look for direct modifications of the stack pointer. */
4060 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4062 /* Look for a trivial adjustment, otherwise assume nothing. */
4063 /* Note that the SPU restore_stack_block pattern refers to
4064 the stack pointer in V4SImode. Consider that non-trivial. */
4066 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4067 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4069 /* ??? Reload can generate no-op moves, which will be cleaned
4070 up later. Recognize it and continue searching. */
4071 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4074 return HOST_WIDE_INT_MIN
;
4080 /* Otherwise only think about autoinc patterns. */
4081 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4084 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4085 != stack_pointer_rtx
);
4087 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4088 mem
= SET_SRC (set
);
4092 addr
= XEXP (mem
, 0);
4093 switch (GET_CODE (addr
))
4097 return GET_MODE_SIZE (GET_MODE (mem
));
4100 return -GET_MODE_SIZE (GET_MODE (mem
));
4103 addr
= XEXP (addr
, 1);
4104 gcc_assert (GET_CODE (addr
) == PLUS
);
4105 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4106 return rtx_to_poly_int64 (XEXP (addr
, 1));
4114 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4115 poly_int64 end_args_size
)
4117 poly_int64 args_size
= end_args_size
;
4118 bool saw_unknown
= false;
4121 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4123 if (!NONDEBUG_INSN_P (insn
))
4126 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4127 a call argument containing a TLS address that itself requires
4128 a call to __tls_get_addr. The handling of stack_pointer_delta
4129 in emit_single_push_insn is supposed to ensure that any such
4130 notes are already correct. */
4131 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4132 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4134 poly_int64 this_delta
= find_args_size_adjust (insn
);
4135 if (known_eq (this_delta
, 0))
4138 || ACCUMULATE_OUTGOING_ARGS
4139 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4143 gcc_assert (!saw_unknown
);
4144 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4148 add_args_size_note (insn
, args_size
);
4149 if (STACK_GROWS_DOWNWARD
)
4150 this_delta
= -poly_uint64 (this_delta
);
4153 args_size
= HOST_WIDE_INT_MIN
;
4155 args_size
-= this_delta
;
4161 #ifdef PUSH_ROUNDING
4162 /* Emit single push insn. */
4165 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4168 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4170 enum insn_code icode
;
4172 /* If there is push pattern, use it. Otherwise try old way of throwing
4173 MEM representing push operation to move expander. */
4174 icode
= optab_handler (push_optab
, mode
);
4175 if (icode
!= CODE_FOR_nothing
)
4177 struct expand_operand ops
[1];
4179 create_input_operand (&ops
[0], x
, mode
);
4180 if (maybe_expand_insn (icode
, 1, ops
))
4183 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4184 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4185 /* If we are to pad downward, adjust the stack pointer first and
4186 then store X into the stack location using an offset. This is
4187 because emit_move_insn does not know how to pad; it does not have
4189 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4191 emit_move_insn (stack_pointer_rtx
,
4192 expand_binop (Pmode
,
4193 STACK_GROWS_DOWNWARD
? sub_optab
4196 gen_int_mode (rounded_size
, Pmode
),
4197 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4199 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4200 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4201 /* We have already decremented the stack pointer, so get the
4203 offset
+= rounded_size
;
4205 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4206 /* We have already incremented the stack pointer, so get the
4208 offset
-= rounded_size
;
4210 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4214 if (STACK_GROWS_DOWNWARD
)
4215 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4216 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4218 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4219 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4221 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4224 dest
= gen_rtx_MEM (mode
, dest_addr
);
4228 set_mem_attributes (dest
, type
, 1);
4230 if (cfun
->tail_call_marked
)
4231 /* Function incoming arguments may overlap with sibling call
4232 outgoing arguments and we cannot allow reordering of reads
4233 from function arguments with stores to outgoing arguments
4234 of sibling calls. */
4235 set_mem_alias_set (dest
, 0);
4237 emit_move_insn (dest
, x
);
4240 /* Emit and annotate a single push insn. */
4243 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4245 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4246 rtx_insn
*prev
= get_last_insn ();
4249 emit_single_push_insn_1 (mode
, x
, type
);
4251 /* Adjust stack_pointer_delta to describe the situation after the push
4252 we just performed. Note that we must do this after the push rather
4253 than before the push in case calculating X needs pushes and pops of
4254 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4255 for such pushes and pops must not include the effect of the future
4257 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4259 last
= get_last_insn ();
4261 /* Notice the common case where we emitted exactly one insn. */
4262 if (PREV_INSN (last
) == prev
)
4264 add_args_size_note (last
, stack_pointer_delta
);
4268 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4269 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4270 || known_eq (delta
, old_delta
));
4274 /* If reading SIZE bytes from X will end up reading from
4275 Y return the number of bytes that overlap. Return -1
4276 if there is no overlap or -2 if we can't determine
4277 (for example when X and Y have different base registers). */
4280 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4282 rtx tmp
= plus_constant (Pmode
, x
, size
);
4283 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4285 if (!CONST_INT_P (sub
))
4288 HOST_WIDE_INT val
= INTVAL (sub
);
4290 return IN_RANGE (val
, 1, size
) ? val
: -1;
4293 /* Generate code to push X onto the stack, assuming it has mode MODE and
4295 MODE is redundant except when X is a CONST_INT (since they don't
4297 SIZE is an rtx for the size of data to be copied (in bytes),
4298 needed only if X is BLKmode.
4299 Return true if successful. May return false if asked to push a
4300 partial argument during a sibcall optimization (as specified by
4301 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4304 ALIGN (in bits) is maximum alignment we can assume.
4306 If PARTIAL and REG are both nonzero, then copy that many of the first
4307 bytes of X into registers starting with REG, and push the rest of X.
4308 The amount of space pushed is decreased by PARTIAL bytes.
4309 REG must be a hard register in this case.
4310 If REG is zero but PARTIAL is not, take any all others actions for an
4311 argument partially in registers, but do not actually load any
4314 EXTRA is the amount in bytes of extra space to leave next to this arg.
4315 This is ignored if an argument block has already been allocated.
4317 On a machine that lacks real push insns, ARGS_ADDR is the address of
4318 the bottom of the argument block for this call. We use indexing off there
4319 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4320 argument block has not been preallocated.
4322 ARGS_SO_FAR is the size of args previously pushed for this call.
4324 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4325 for arguments passed in registers. If nonzero, it will be the number
4326 of bytes required. */
4329 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4330 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4331 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4332 rtx alignment_pad
, bool sibcall_p
)
4335 pad_direction stack_direction
4336 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4338 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4339 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4340 Default is below for small data on big-endian machines; else above. */
4341 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4343 /* Invert direction if stack is post-decrement.
4345 if (STACK_PUSH_CODE
== POST_DEC
)
4346 if (where_pad
!= PAD_NONE
)
4347 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4351 int nregs
= partial
/ UNITS_PER_WORD
;
4352 rtx
*tmp_regs
= NULL
;
4353 int overlapping
= 0;
4356 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4358 /* Copy a block into the stack, entirely or partially. */
4365 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4366 used
= partial
- offset
;
4368 if (mode
!= BLKmode
)
4370 /* A value is to be stored in an insufficiently aligned
4371 stack slot; copy via a suitably aligned slot if
4373 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4374 if (!MEM_P (xinner
))
4376 temp
= assign_temp (type
, 1, 1);
4377 emit_move_insn (temp
, xinner
);
4384 /* USED is now the # of bytes we need not copy to the stack
4385 because registers will take care of them. */
4388 xinner
= adjust_address (xinner
, BLKmode
, used
);
4390 /* If the partial register-part of the arg counts in its stack size,
4391 skip the part of stack space corresponding to the registers.
4392 Otherwise, start copying to the beginning of the stack space,
4393 by setting SKIP to 0. */
4394 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4396 #ifdef PUSH_ROUNDING
4397 /* Do it with several push insns if that doesn't take lots of insns
4398 and if there is no difficulty with push insns that skip bytes
4399 on the stack for alignment purposes. */
4402 && CONST_INT_P (size
)
4404 && MEM_ALIGN (xinner
) >= align
4405 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4406 /* Here we avoid the case of a structure whose weak alignment
4407 forces many pushes of a small amount of data,
4408 and such small pushes do rounding that causes trouble. */
4409 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4410 || align
>= BIGGEST_ALIGNMENT
4411 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4412 align
/ BITS_PER_UNIT
))
4413 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4415 /* Push padding now if padding above and stack grows down,
4416 or if padding below and stack grows up.
4417 But if space already allocated, this has already been done. */
4418 if (maybe_ne (extra
, 0)
4420 && where_pad
!= PAD_NONE
4421 && where_pad
!= stack_direction
)
4422 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4424 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4427 #endif /* PUSH_ROUNDING */
4431 /* Otherwise make space on the stack and copy the data
4432 to the address of that space. */
4434 /* Deduct words put into registers from the size we must copy. */
4437 if (CONST_INT_P (size
))
4438 size
= GEN_INT (INTVAL (size
) - used
);
4440 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4441 gen_int_mode (used
, GET_MODE (size
)),
4442 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4445 /* Get the address of the stack space.
4446 In this case, we do not deal with EXTRA separately.
4447 A single stack adjust will do. */
4451 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4454 else if (poly_int_rtx_p (args_so_far
, &offset
))
4455 temp
= memory_address (BLKmode
,
4456 plus_constant (Pmode
, args_addr
,
4459 temp
= memory_address (BLKmode
,
4460 plus_constant (Pmode
,
4461 gen_rtx_PLUS (Pmode
,
4466 if (!ACCUMULATE_OUTGOING_ARGS
)
4468 /* If the source is referenced relative to the stack pointer,
4469 copy it to another register to stabilize it. We do not need
4470 to do this if we know that we won't be changing sp. */
4472 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4473 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4474 temp
= copy_to_reg (temp
);
4477 target
= gen_rtx_MEM (BLKmode
, temp
);
4479 /* We do *not* set_mem_attributes here, because incoming arguments
4480 may overlap with sibling call outgoing arguments and we cannot
4481 allow reordering of reads from function arguments with stores
4482 to outgoing arguments of sibling calls. We do, however, want
4483 to record the alignment of the stack slot. */
4484 /* ALIGN may well be better aligned than TYPE, e.g. due to
4485 PARM_BOUNDARY. Assume the caller isn't lying. */
4486 set_mem_align (target
, align
);
4488 /* If part should go in registers and pushing to that part would
4489 overwrite some of the values that need to go into regs, load the
4490 overlapping values into temporary pseudos to be moved into the hard
4491 regs at the end after the stack pushing has completed.
4492 We cannot load them directly into the hard regs here because
4493 they can be clobbered by the block move expansions.
4496 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4497 && GET_CODE (reg
) != PARALLEL
)
4499 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4500 if (overlapping
> 0)
4502 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4503 overlapping
/= UNITS_PER_WORD
;
4505 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4507 for (int i
= 0; i
< overlapping
; i
++)
4508 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4510 for (int i
= 0; i
< overlapping
; i
++)
4511 emit_move_insn (tmp_regs
[i
],
4512 operand_subword_force (target
, i
, mode
));
4514 else if (overlapping
== -1)
4516 /* Could not determine whether there is overlap.
4517 Fail the sibcall. */
4525 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4528 else if (partial
> 0)
4530 /* Scalar partly in registers. This case is only supported
4531 for fixed-wdth modes. */
4532 int size
= GET_MODE_SIZE (mode
).to_constant ();
4533 size
/= UNITS_PER_WORD
;
4536 /* # bytes of start of argument
4537 that we must make space for but need not store. */
4538 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4539 int args_offset
= INTVAL (args_so_far
);
4542 /* Push padding now if padding above and stack grows down,
4543 or if padding below and stack grows up.
4544 But if space already allocated, this has already been done. */
4545 if (maybe_ne (extra
, 0)
4547 && where_pad
!= PAD_NONE
4548 && where_pad
!= stack_direction
)
4549 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4551 /* If we make space by pushing it, we might as well push
4552 the real data. Otherwise, we can leave OFFSET nonzero
4553 and leave the space uninitialized. */
4557 /* Now NOT_STACK gets the number of words that we don't need to
4558 allocate on the stack. Convert OFFSET to words too. */
4559 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4560 offset
/= UNITS_PER_WORD
;
4562 /* If the partial register-part of the arg counts in its stack size,
4563 skip the part of stack space corresponding to the registers.
4564 Otherwise, start copying to the beginning of the stack space,
4565 by setting SKIP to 0. */
4566 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4568 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4569 x
= validize_mem (force_const_mem (mode
, x
));
4571 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4572 SUBREGs of such registers are not allowed. */
4573 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4574 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4575 x
= copy_to_reg (x
);
4577 /* Loop over all the words allocated on the stack for this arg. */
4578 /* We can do it by words, because any scalar bigger than a word
4579 has a size a multiple of a word. */
4580 for (i
= size
- 1; i
>= not_stack
; i
--)
4581 if (i
>= not_stack
+ offset
)
4582 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4583 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4585 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4587 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4595 /* Push padding now if padding above and stack grows down,
4596 or if padding below and stack grows up.
4597 But if space already allocated, this has already been done. */
4598 if (maybe_ne (extra
, 0)
4600 && where_pad
!= PAD_NONE
4601 && where_pad
!= stack_direction
)
4602 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4604 #ifdef PUSH_ROUNDING
4605 if (args_addr
== 0 && PUSH_ARGS
)
4606 emit_single_push_insn (mode
, x
, type
);
4610 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4611 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4613 /* We do *not* set_mem_attributes here, because incoming arguments
4614 may overlap with sibling call outgoing arguments and we cannot
4615 allow reordering of reads from function arguments with stores
4616 to outgoing arguments of sibling calls. We do, however, want
4617 to record the alignment of the stack slot. */
4618 /* ALIGN may well be better aligned than TYPE, e.g. due to
4619 PARM_BOUNDARY. Assume the caller isn't lying. */
4620 set_mem_align (dest
, align
);
4622 emit_move_insn (dest
, x
);
4626 /* Move the partial arguments into the registers and any overlapping
4627 values that we moved into the pseudos in tmp_regs. */
4628 if (partial
> 0 && reg
!= 0)
4630 /* Handle calls that pass values in multiple non-contiguous locations.
4631 The Irix 6 ABI has examples of this. */
4632 if (GET_CODE (reg
) == PARALLEL
)
4633 emit_group_load (reg
, x
, type
, -1);
4636 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4637 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4639 for (int i
= 0; i
< overlapping
; i
++)
4640 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4641 + nregs
- overlapping
+ i
),
4647 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4648 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4650 if (alignment_pad
&& args_addr
== 0)
4651 anti_adjust_stack (alignment_pad
);
4656 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4660 get_subtarget (rtx x
)
4664 /* Only registers can be subtargets. */
4666 /* Don't use hard regs to avoid extending their life. */
4667 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4671 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4672 FIELD is a bitfield. Returns true if the optimization was successful,
4673 and there's nothing else to do. */
4676 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4677 poly_uint64 pbitpos
,
4678 poly_uint64 pbitregion_start
,
4679 poly_uint64 pbitregion_end
,
4680 machine_mode mode1
, rtx str_rtx
,
4681 tree to
, tree src
, bool reverse
)
4683 /* str_mode is not guaranteed to be a scalar type. */
4684 machine_mode str_mode
= GET_MODE (str_rtx
);
4685 unsigned int str_bitsize
;
4690 enum tree_code code
;
4692 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4693 if (mode1
!= VOIDmode
4694 || !pbitsize
.is_constant (&bitsize
)
4695 || !pbitpos
.is_constant (&bitpos
)
4696 || !pbitregion_start
.is_constant (&bitregion_start
)
4697 || !pbitregion_end
.is_constant (&bitregion_end
)
4698 || bitsize
>= BITS_PER_WORD
4699 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4700 || str_bitsize
> BITS_PER_WORD
4701 || TREE_SIDE_EFFECTS (to
)
4702 || TREE_THIS_VOLATILE (to
))
4706 if (TREE_CODE (src
) != SSA_NAME
)
4708 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4711 srcstmt
= get_gimple_for_ssa_name (src
);
4713 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4716 code
= gimple_assign_rhs_code (srcstmt
);
4718 op0
= gimple_assign_rhs1 (srcstmt
);
4720 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4721 to find its initialization. Hopefully the initialization will
4722 be from a bitfield load. */
4723 if (TREE_CODE (op0
) == SSA_NAME
)
4725 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4727 /* We want to eventually have OP0 be the same as TO, which
4728 should be a bitfield. */
4730 || !is_gimple_assign (op0stmt
)
4731 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4733 op0
= gimple_assign_rhs1 (op0stmt
);
4736 op1
= gimple_assign_rhs2 (srcstmt
);
4738 if (!operand_equal_p (to
, op0
, 0))
4741 if (MEM_P (str_rtx
))
4743 unsigned HOST_WIDE_INT offset1
;
4745 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4746 str_bitsize
= BITS_PER_WORD
;
4748 scalar_int_mode best_mode
;
4749 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4750 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4752 str_mode
= best_mode
;
4753 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4756 bitpos
%= str_bitsize
;
4757 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4758 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4760 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4763 /* If the bit field covers the whole REG/MEM, store_field
4764 will likely generate better code. */
4765 if (bitsize
>= str_bitsize
)
4768 /* We can't handle fields split across multiple entities. */
4769 if (bitpos
+ bitsize
> str_bitsize
)
4772 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4773 bitpos
= str_bitsize
- bitpos
- bitsize
;
4779 /* For now, just optimize the case of the topmost bitfield
4780 where we don't need to do any masking and also
4781 1 bit bitfields where xor can be used.
4782 We might win by one instruction for the other bitfields
4783 too if insv/extv instructions aren't used, so that
4784 can be added later. */
4785 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4786 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4789 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4790 value
= convert_modes (str_mode
,
4791 TYPE_MODE (TREE_TYPE (op1
)), value
,
4792 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4794 /* We may be accessing data outside the field, which means
4795 we can alias adjacent data. */
4796 if (MEM_P (str_rtx
))
4798 str_rtx
= shallow_copy_rtx (str_rtx
);
4799 set_mem_alias_set (str_rtx
, 0);
4800 set_mem_expr (str_rtx
, 0);
4803 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4805 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4809 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4811 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4813 value
= flip_storage_order (str_mode
, value
);
4814 result
= expand_binop (str_mode
, binop
, str_rtx
,
4815 value
, str_rtx
, 1, OPTAB_WIDEN
);
4816 if (result
!= str_rtx
)
4817 emit_move_insn (str_rtx
, result
);
4822 if (TREE_CODE (op1
) != INTEGER_CST
)
4824 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4825 value
= convert_modes (str_mode
,
4826 TYPE_MODE (TREE_TYPE (op1
)), value
,
4827 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4829 /* We may be accessing data outside the field, which means
4830 we can alias adjacent data. */
4831 if (MEM_P (str_rtx
))
4833 str_rtx
= shallow_copy_rtx (str_rtx
);
4834 set_mem_alias_set (str_rtx
, 0);
4835 set_mem_expr (str_rtx
, 0);
4838 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4839 if (bitpos
+ bitsize
!= str_bitsize
)
4841 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4843 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4845 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4847 value
= flip_storage_order (str_mode
, value
);
4848 result
= expand_binop (str_mode
, binop
, str_rtx
,
4849 value
, str_rtx
, 1, OPTAB_WIDEN
);
4850 if (result
!= str_rtx
)
4851 emit_move_insn (str_rtx
, result
);
4861 /* In the C++ memory model, consecutive bit fields in a structure are
4862 considered one memory location.
4864 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4865 returns the bit range of consecutive bits in which this COMPONENT_REF
4866 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4867 and *OFFSET may be adjusted in the process.
4869 If the access does not need to be restricted, 0 is returned in both
4870 *BITSTART and *BITEND. */
4873 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4874 poly_int64_pod
*bitpos
, tree
*offset
)
4876 poly_int64 bitoffset
;
4879 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4881 field
= TREE_OPERAND (exp
, 1);
4882 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4883 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4884 need to limit the range we can access. */
4887 *bitstart
= *bitend
= 0;
4891 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4892 part of a larger bit field, then the representative does not serve any
4893 useful purpose. This can occur in Ada. */
4894 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4897 poly_int64 rbitsize
, rbitpos
;
4899 int unsignedp
, reversep
, volatilep
= 0;
4900 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4901 &roffset
, &rmode
, &unsignedp
, &reversep
,
4903 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4905 *bitstart
= *bitend
= 0;
4910 /* Compute the adjustment to bitpos from the offset of the field
4911 relative to the representative. DECL_FIELD_OFFSET of field and
4912 repr are the same by construction if they are not constants,
4913 see finish_bitfield_layout. */
4914 poly_uint64 field_offset
, repr_offset
;
4915 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4916 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4917 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4920 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4921 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4923 /* If the adjustment is larger than bitpos, we would have a negative bit
4924 position for the lower bound and this may wreak havoc later. Adjust
4925 offset and bitpos to make the lower bound non-negative in that case. */
4926 if (maybe_gt (bitoffset
, *bitpos
))
4928 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4929 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4931 *bitpos
+= adjust_bits
;
4932 if (*offset
== NULL_TREE
)
4933 *offset
= size_int (-adjust_bytes
);
4935 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4939 *bitstart
= *bitpos
- bitoffset
;
4941 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4944 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4945 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4946 DECL_RTL was not set yet, return NORTL. */
4949 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4951 if (TREE_CODE (addr
) != ADDR_EXPR
)
4954 tree base
= TREE_OPERAND (addr
, 0);
4957 || TREE_ADDRESSABLE (base
)
4958 || DECL_MODE (base
) == BLKmode
)
4961 if (!DECL_RTL_SET_P (base
))
4964 return (!MEM_P (DECL_RTL (base
)));
4967 /* Returns true if the MEM_REF REF refers to an object that does not
4968 reside in memory and has non-BLKmode. */
4971 mem_ref_refers_to_non_mem_p (tree ref
)
4973 tree base
= TREE_OPERAND (ref
, 0);
4974 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4977 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4978 is true, try generating a nontemporal store. */
4981 expand_assignment (tree to
, tree from
, bool nontemporal
)
4987 enum insn_code icode
;
4989 /* Don't crash if the lhs of the assignment was erroneous. */
4990 if (TREE_CODE (to
) == ERROR_MARK
)
4992 expand_normal (from
);
4996 /* Optimize away no-op moves without side-effects. */
4997 if (operand_equal_p (to
, from
, 0))
5000 /* Handle misaligned stores. */
5001 mode
= TYPE_MODE (TREE_TYPE (to
));
5002 if ((TREE_CODE (to
) == MEM_REF
5003 || TREE_CODE (to
) == TARGET_MEM_REF
)
5005 && !mem_ref_refers_to_non_mem_p (to
)
5006 && ((align
= get_object_alignment (to
))
5007 < GET_MODE_ALIGNMENT (mode
))
5008 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5009 != CODE_FOR_nothing
)
5010 || targetm
.slow_unaligned_access (mode
, align
)))
5014 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5015 reg
= force_not_mem (reg
);
5016 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5017 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5018 reg
= flip_storage_order (mode
, reg
);
5020 if (icode
!= CODE_FOR_nothing
)
5022 struct expand_operand ops
[2];
5024 create_fixed_operand (&ops
[0], mem
);
5025 create_input_operand (&ops
[1], reg
, mode
);
5026 /* The movmisalign<mode> pattern cannot fail, else the assignment
5027 would silently be omitted. */
5028 expand_insn (icode
, 2, ops
);
5031 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5036 /* Assignment of a structure component needs special treatment
5037 if the structure component's rtx is not simply a MEM.
5038 Assignment of an array element at a constant index, and assignment of
5039 an array element in an unaligned packed structure field, has the same
5040 problem. Same for (partially) storing into a non-memory object. */
5041 if (handled_component_p (to
)
5042 || (TREE_CODE (to
) == MEM_REF
5043 && (REF_REVERSE_STORAGE_ORDER (to
)
5044 || mem_ref_refers_to_non_mem_p (to
)))
5045 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5048 poly_int64 bitsize
, bitpos
;
5049 poly_uint64 bitregion_start
= 0;
5050 poly_uint64 bitregion_end
= 0;
5052 int unsignedp
, reversep
, volatilep
= 0;
5056 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5057 &unsignedp
, &reversep
, &volatilep
);
5059 /* Make sure bitpos is not negative, it can wreak havoc later. */
5060 if (maybe_lt (bitpos
, 0))
5062 gcc_assert (offset
== NULL_TREE
);
5063 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5064 bitpos
= num_trailing_bits (bitpos
);
5067 if (TREE_CODE (to
) == COMPONENT_REF
5068 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5069 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5070 /* The C++ memory model naturally applies to byte-aligned fields.
5071 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5072 BITSIZE are not byte-aligned, there is no need to limit the range
5073 we can access. This can occur with packed structures in Ada. */
5074 else if (maybe_gt (bitsize
, 0)
5075 && multiple_p (bitsize
, BITS_PER_UNIT
)
5076 && multiple_p (bitpos
, BITS_PER_UNIT
))
5078 bitregion_start
= bitpos
;
5079 bitregion_end
= bitpos
+ bitsize
- 1;
5082 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5084 /* If the field has a mode, we want to access it in the
5085 field's mode, not the computed mode.
5086 If a MEM has VOIDmode (external with incomplete type),
5087 use BLKmode for it instead. */
5090 if (mode1
!= VOIDmode
)
5091 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5092 else if (GET_MODE (to_rtx
) == VOIDmode
)
5093 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5098 machine_mode address_mode
;
5101 if (!MEM_P (to_rtx
))
5103 /* We can get constant negative offsets into arrays with broken
5104 user code. Translate this to a trap instead of ICEing. */
5105 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5106 expand_builtin_trap ();
5107 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5110 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5111 address_mode
= get_address_mode (to_rtx
);
5112 if (GET_MODE (offset_rtx
) != address_mode
)
5114 /* We cannot be sure that the RTL in offset_rtx is valid outside
5115 of a memory address context, so force it into a register
5116 before attempting to convert it to the desired mode. */
5117 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5118 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5121 /* If we have an expression in OFFSET_RTX and a non-zero
5122 byte offset in BITPOS, adding the byte offset before the
5123 OFFSET_RTX results in better intermediate code, which makes
5124 later rtl optimization passes perform better.
5126 We prefer intermediate code like this:
5128 r124:DI=r123:DI+0x18
5133 r124:DI=r123:DI+0x10
5134 [r124:DI+0x8]=r121:DI
5136 This is only done for aligned data values, as these can
5137 be expected to result in single move instructions. */
5139 if (mode1
!= VOIDmode
5140 && maybe_ne (bitpos
, 0)
5141 && maybe_gt (bitsize
, 0)
5142 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5143 && multiple_p (bitpos
, bitsize
)
5144 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5145 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5147 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5148 bitregion_start
= 0;
5149 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5150 bitregion_end
-= bitpos
;
5154 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5155 highest_pow2_factor_for_target (to
,
5159 /* No action is needed if the target is not a memory and the field
5160 lies completely outside that target. This can occur if the source
5161 code contains an out-of-bounds access to a small array. */
5163 && GET_MODE (to_rtx
) != BLKmode
5164 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5166 expand_normal (from
);
5169 /* Handle expand_expr of a complex value returning a CONCAT. */
5170 else if (GET_CODE (to_rtx
) == CONCAT
)
5172 machine_mode to_mode
= GET_MODE (to_rtx
);
5173 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5174 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5175 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5176 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5177 && known_eq (bitpos
, 0)
5178 && known_eq (bitsize
, mode_bitsize
))
5179 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5180 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5181 && known_eq (bitsize
, inner_bitsize
)
5182 && (known_eq (bitpos
, 0)
5183 || known_eq (bitpos
, inner_bitsize
)))
5184 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5185 false, nontemporal
, reversep
);
5186 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5187 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5188 bitregion_start
, bitregion_end
,
5189 mode1
, from
, get_alias_set (to
),
5190 nontemporal
, reversep
);
5191 else if (known_ge (bitpos
, inner_bitsize
))
5192 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5193 bitpos
- inner_bitsize
,
5194 bitregion_start
, bitregion_end
,
5195 mode1
, from
, get_alias_set (to
),
5196 nontemporal
, reversep
);
5197 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5199 result
= expand_normal (from
);
5200 if (GET_CODE (result
) == CONCAT
)
5202 to_mode
= GET_MODE_INNER (to_mode
);
5203 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5205 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5208 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5210 if (!from_real
|| !from_imag
)
5211 goto concat_store_slow
;
5212 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5213 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5218 = simplify_gen_subreg (to_mode
, result
,
5219 TYPE_MODE (TREE_TYPE (from
)), 0);
5222 emit_move_insn (XEXP (to_rtx
, 0),
5223 read_complex_part (from_rtx
, false));
5224 emit_move_insn (XEXP (to_rtx
, 1),
5225 read_complex_part (from_rtx
, true));
5229 machine_mode to_mode
5230 = GET_MODE_INNER (GET_MODE (to_rtx
));
5232 = simplify_gen_subreg (to_mode
, result
,
5233 TYPE_MODE (TREE_TYPE (from
)),
5236 = simplify_gen_subreg (to_mode
, result
,
5237 TYPE_MODE (TREE_TYPE (from
)),
5238 GET_MODE_SIZE (to_mode
));
5239 if (!from_real
|| !from_imag
)
5240 goto concat_store_slow
;
5241 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5242 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5249 rtx temp
= assign_stack_temp (to_mode
,
5250 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5251 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5252 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5253 result
= store_field (temp
, bitsize
, bitpos
,
5254 bitregion_start
, bitregion_end
,
5255 mode1
, from
, get_alias_set (to
),
5256 nontemporal
, reversep
);
5257 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5258 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5265 /* If the field is at offset zero, we could have been given the
5266 DECL_RTX of the parent struct. Don't munge it. */
5267 to_rtx
= shallow_copy_rtx (to_rtx
);
5268 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5270 MEM_VOLATILE_P (to_rtx
) = 1;
5273 gcc_checking_assert (known_ge (bitpos
, 0));
5274 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5275 bitregion_start
, bitregion_end
,
5276 mode1
, to_rtx
, to
, from
,
5280 result
= store_field (to_rtx
, bitsize
, bitpos
,
5281 bitregion_start
, bitregion_end
,
5282 mode1
, from
, get_alias_set (to
),
5283 nontemporal
, reversep
);
5287 preserve_temp_slots (result
);
5292 /* If the rhs is a function call and its value is not an aggregate,
5293 call the function before we start to compute the lhs.
5294 This is needed for correct code for cases such as
5295 val = setjmp (buf) on machines where reference to val
5296 requires loading up part of an address in a separate insn.
5298 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5299 since it might be a promoted variable where the zero- or sign- extension
5300 needs to be done. Handling this in the normal way is safe because no
5301 computation is done before the call. The same is true for SSA names. */
5302 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5303 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5304 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5306 || TREE_CODE (to
) == PARM_DECL
5307 || TREE_CODE (to
) == RESULT_DECL
)
5308 && REG_P (DECL_RTL (to
)))
5309 || TREE_CODE (to
) == SSA_NAME
))
5314 value
= expand_normal (from
);
5317 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5319 /* Handle calls that return values in multiple non-contiguous locations.
5320 The Irix 6 ABI has examples of this. */
5321 if (GET_CODE (to_rtx
) == PARALLEL
)
5323 if (GET_CODE (value
) == PARALLEL
)
5324 emit_group_move (to_rtx
, value
);
5326 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5327 int_size_in_bytes (TREE_TYPE (from
)));
5329 else if (GET_CODE (value
) == PARALLEL
)
5330 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5331 int_size_in_bytes (TREE_TYPE (from
)));
5332 else if (GET_MODE (to_rtx
) == BLKmode
)
5334 /* Handle calls that return BLKmode values in registers. */
5336 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5338 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5342 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5343 value
= convert_memory_address_addr_space
5344 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5345 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5347 emit_move_insn (to_rtx
, value
);
5350 preserve_temp_slots (to_rtx
);
5355 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5356 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5358 /* Don't move directly into a return register. */
5359 if (TREE_CODE (to
) == RESULT_DECL
5360 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5366 /* If the source is itself a return value, it still is in a pseudo at
5367 this point so we can move it back to the return register directly. */
5369 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5370 && TREE_CODE (from
) != CALL_EXPR
)
5371 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5373 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5375 /* Handle calls that return values in multiple non-contiguous locations.
5376 The Irix 6 ABI has examples of this. */
5377 if (GET_CODE (to_rtx
) == PARALLEL
)
5379 if (GET_CODE (temp
) == PARALLEL
)
5380 emit_group_move (to_rtx
, temp
);
5382 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5383 int_size_in_bytes (TREE_TYPE (from
)));
5386 emit_move_insn (to_rtx
, temp
);
5388 preserve_temp_slots (to_rtx
);
5393 /* In case we are returning the contents of an object which overlaps
5394 the place the value is being stored, use a safe function when copying
5395 a value through a pointer into a structure value return block. */
5396 if (TREE_CODE (to
) == RESULT_DECL
5397 && TREE_CODE (from
) == INDIRECT_REF
5398 && ADDR_SPACE_GENERIC_P
5399 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5400 && refs_may_alias_p (to
, from
)
5401 && cfun
->returns_struct
5402 && !cfun
->returns_pcc_struct
)
5407 size
= expr_size (from
);
5408 from_rtx
= expand_normal (from
);
5410 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5412 preserve_temp_slots (to_rtx
);
5417 /* Compute FROM and store the value in the rtx we got. */
5420 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5421 preserve_temp_slots (result
);
5426 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5427 succeeded, false otherwise. */
5430 emit_storent_insn (rtx to
, rtx from
)
5432 struct expand_operand ops
[2];
5433 machine_mode mode
= GET_MODE (to
);
5434 enum insn_code code
= optab_handler (storent_optab
, mode
);
5436 if (code
== CODE_FOR_nothing
)
5439 create_fixed_operand (&ops
[0], to
);
5440 create_input_operand (&ops
[1], from
, mode
);
5441 return maybe_expand_insn (code
, 2, ops
);
5444 /* Generate code for computing expression EXP,
5445 and storing the value into TARGET.
5447 If the mode is BLKmode then we may return TARGET itself.
5448 It turns out that in BLKmode it doesn't cause a problem.
5449 because C has no operators that could combine two different
5450 assignments into the same BLKmode object with different values
5451 with no sequence point. Will other languages need this to
5454 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5455 stack, and block moves may need to be treated specially.
5457 If NONTEMPORAL is true, try using a nontemporal store instruction.
5459 If REVERSE is true, the store is to be done in reverse order. */
5462 store_expr (tree exp
, rtx target
, int call_param_p
,
5463 bool nontemporal
, bool reverse
)
5466 rtx alt_rtl
= NULL_RTX
;
5467 location_t loc
= curr_insn_location ();
5469 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5471 /* C++ can generate ?: expressions with a throw expression in one
5472 branch and an rvalue in the other. Here, we resolve attempts to
5473 store the throw expression's nonexistent result. */
5474 gcc_assert (!call_param_p
);
5475 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5478 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5480 /* Perform first part of compound expression, then assign from second
5482 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5483 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5484 return store_expr (TREE_OPERAND (exp
, 1), target
,
5485 call_param_p
, nontemporal
, reverse
);
5487 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5489 /* For conditional expression, get safe form of the target. Then
5490 test the condition, doing the appropriate assignment on either
5491 side. This avoids the creation of unnecessary temporaries.
5492 For non-BLKmode, it is more efficient not to do this. */
5494 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5496 do_pending_stack_adjust ();
5498 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5499 profile_probability::uninitialized ());
5500 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5501 nontemporal
, reverse
);
5502 emit_jump_insn (targetm
.gen_jump (lab2
));
5505 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5506 nontemporal
, reverse
);
5512 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5513 /* If this is a scalar in a register that is stored in a wider mode
5514 than the declared mode, compute the result into its declared mode
5515 and then convert to the wider mode. Our value is the computed
5518 rtx inner_target
= 0;
5519 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5520 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5522 /* We can do the conversion inside EXP, which will often result
5523 in some optimizations. Do the conversion in two steps: first
5524 change the signedness, if needed, then the extend. But don't
5525 do this if the type of EXP is a subtype of something else
5526 since then the conversion might involve more than just
5527 converting modes. */
5528 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5529 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5530 && GET_MODE_PRECISION (outer_mode
)
5531 == TYPE_PRECISION (TREE_TYPE (exp
)))
5533 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5534 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5536 /* Some types, e.g. Fortran's logical*4, won't have a signed
5537 version, so use the mode instead. */
5539 = (signed_or_unsigned_type_for
5540 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5542 ntype
= lang_hooks
.types
.type_for_mode
5543 (TYPE_MODE (TREE_TYPE (exp
)),
5544 SUBREG_PROMOTED_SIGN (target
));
5546 exp
= fold_convert_loc (loc
, ntype
, exp
);
5549 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5550 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5553 inner_target
= SUBREG_REG (target
);
5556 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5557 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5560 /* If TEMP is a VOIDmode constant, use convert_modes to make
5561 sure that we properly convert it. */
5562 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5564 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5565 temp
, SUBREG_PROMOTED_SIGN (target
));
5566 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5567 SUBREG_PROMOTED_SIGN (target
));
5570 convert_move (SUBREG_REG (target
), temp
,
5571 SUBREG_PROMOTED_SIGN (target
));
5575 else if ((TREE_CODE (exp
) == STRING_CST
5576 || (TREE_CODE (exp
) == MEM_REF
5577 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5578 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5580 && integer_zerop (TREE_OPERAND (exp
, 1))))
5581 && !nontemporal
&& !call_param_p
5584 /* Optimize initialization of an array with a STRING_CST. */
5585 HOST_WIDE_INT exp_len
, str_copy_len
;
5587 tree str
= TREE_CODE (exp
) == STRING_CST
5588 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5590 exp_len
= int_expr_size (exp
);
5594 if (TREE_STRING_LENGTH (str
) <= 0)
5597 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5598 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5601 str_copy_len
= TREE_STRING_LENGTH (str
);
5602 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5603 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5605 str_copy_len
+= STORE_MAX_PIECES
- 1;
5606 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5608 str_copy_len
= MIN (str_copy_len
, exp_len
);
5609 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5610 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5611 MEM_ALIGN (target
), false))
5616 dest_mem
= store_by_pieces (dest_mem
,
5617 str_copy_len
, builtin_strncpy_read_str
,
5619 TREE_STRING_POINTER (str
)),
5620 MEM_ALIGN (target
), false,
5621 exp_len
> str_copy_len
? 1 : 0);
5622 if (exp_len
> str_copy_len
)
5623 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5624 GEN_INT (exp_len
- str_copy_len
),
5633 /* If we want to use a nontemporal or a reverse order store, force the
5634 value into a register first. */
5635 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5636 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5638 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5642 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5643 the same as that of TARGET, adjust the constant. This is needed, for
5644 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5645 only a word-sized value. */
5646 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5647 && TREE_CODE (exp
) != ERROR_MARK
5648 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5650 if (GET_MODE_CLASS (GET_MODE (target
))
5651 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5652 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5653 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5655 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5656 TYPE_MODE (TREE_TYPE (exp
)), 0);
5660 if (GET_MODE (temp
) == VOIDmode
)
5661 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5662 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5665 /* If value was not generated in the target, store it there.
5666 Convert the value to TARGET's type first if necessary and emit the
5667 pending incrementations that have been queued when expanding EXP.
5668 Note that we cannot emit the whole queue blindly because this will
5669 effectively disable the POST_INC optimization later.
5671 If TEMP and TARGET compare equal according to rtx_equal_p, but
5672 one or both of them are volatile memory refs, we have to distinguish
5674 - expand_expr has used TARGET. In this case, we must not generate
5675 another copy. This can be detected by TARGET being equal according
5677 - expand_expr has not used TARGET - that means that the source just
5678 happens to have the same RTX form. Since temp will have been created
5679 by expand_expr, it will compare unequal according to == .
5680 We must generate a copy in this case, to reach the correct number
5681 of volatile memory references. */
5683 if ((! rtx_equal_p (temp
, target
)
5684 || (temp
!= target
&& (side_effects_p (temp
)
5685 || side_effects_p (target
))))
5686 && TREE_CODE (exp
) != ERROR_MARK
5687 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5688 but TARGET is not valid memory reference, TEMP will differ
5689 from TARGET although it is really the same location. */
5691 && rtx_equal_p (alt_rtl
, target
)
5692 && !side_effects_p (alt_rtl
)
5693 && !side_effects_p (target
))
5694 /* If there's nothing to copy, don't bother. Don't call
5695 expr_size unless necessary, because some front-ends (C++)
5696 expr_size-hook must not be given objects that are not
5697 supposed to be bit-copied or bit-initialized. */
5698 && expr_size (exp
) != const0_rtx
)
5700 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5702 if (GET_MODE (target
) == BLKmode
)
5704 /* Handle calls that return BLKmode values in registers. */
5705 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5706 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5708 store_bit_field (target
,
5709 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5710 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5713 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5716 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5718 /* Handle copying a string constant into an array. The string
5719 constant may be shorter than the array. So copy just the string's
5720 actual length, and clear the rest. First get the size of the data
5721 type of the string, which is actually the size of the target. */
5722 rtx size
= expr_size (exp
);
5724 if (CONST_INT_P (size
)
5725 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5726 emit_block_move (target
, temp
, size
,
5728 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5731 machine_mode pointer_mode
5732 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5733 machine_mode address_mode
= get_address_mode (target
);
5735 /* Compute the size of the data to copy from the string. */
5737 = size_binop_loc (loc
, MIN_EXPR
,
5738 make_tree (sizetype
, size
),
5739 size_int (TREE_STRING_LENGTH (exp
)));
5741 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5743 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5744 rtx_code_label
*label
= 0;
5746 /* Copy that much. */
5747 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5748 TYPE_UNSIGNED (sizetype
));
5749 emit_block_move (target
, temp
, copy_size_rtx
,
5751 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5753 /* Figure out how much is left in TARGET that we have to clear.
5754 Do all calculations in pointer_mode. */
5755 poly_int64 const_copy_size
;
5756 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5758 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5759 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5763 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5764 copy_size_rtx
, NULL_RTX
, 0,
5767 if (GET_MODE (copy_size_rtx
) != address_mode
)
5768 copy_size_rtx
= convert_to_mode (address_mode
,
5770 TYPE_UNSIGNED (sizetype
));
5772 target
= offset_address (target
, copy_size_rtx
,
5773 highest_pow2_factor (copy_size
));
5774 label
= gen_label_rtx ();
5775 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5776 GET_MODE (size
), 0, label
);
5779 if (size
!= const0_rtx
)
5780 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5786 /* Handle calls that return values in multiple non-contiguous locations.
5787 The Irix 6 ABI has examples of this. */
5788 else if (GET_CODE (target
) == PARALLEL
)
5790 if (GET_CODE (temp
) == PARALLEL
)
5791 emit_group_move (target
, temp
);
5793 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5794 int_size_in_bytes (TREE_TYPE (exp
)));
5796 else if (GET_CODE (temp
) == PARALLEL
)
5797 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5798 int_size_in_bytes (TREE_TYPE (exp
)));
5799 else if (GET_MODE (temp
) == BLKmode
)
5800 emit_block_move (target
, temp
, expr_size (exp
),
5802 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5803 /* If we emit a nontemporal store, there is nothing else to do. */
5804 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5809 temp
= flip_storage_order (GET_MODE (target
), temp
);
5810 temp
= force_operand (temp
, target
);
5812 emit_move_insn (target
, temp
);
5819 /* Return true if field F of structure TYPE is a flexible array. */
5822 flexible_array_member_p (const_tree f
, const_tree type
)
5827 return (DECL_CHAIN (f
) == NULL
5828 && TREE_CODE (tf
) == ARRAY_TYPE
5830 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5831 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5832 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5833 && int_size_in_bytes (type
) >= 0);
5836 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5837 must have in order for it to completely initialize a value of type TYPE.
5838 Return -1 if the number isn't known.
5840 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5842 static HOST_WIDE_INT
5843 count_type_elements (const_tree type
, bool for_ctor_p
)
5845 switch (TREE_CODE (type
))
5851 nelts
= array_type_nelts (type
);
5852 if (nelts
&& tree_fits_uhwi_p (nelts
))
5854 unsigned HOST_WIDE_INT n
;
5856 n
= tree_to_uhwi (nelts
) + 1;
5857 if (n
== 0 || for_ctor_p
)
5860 return n
* count_type_elements (TREE_TYPE (type
), false);
5862 return for_ctor_p
? -1 : 1;
5867 unsigned HOST_WIDE_INT n
;
5871 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5872 if (TREE_CODE (f
) == FIELD_DECL
)
5875 n
+= count_type_elements (TREE_TYPE (f
), false);
5876 else if (!flexible_array_member_p (f
, type
))
5877 /* Don't count flexible arrays, which are not supposed
5878 to be initialized. */
5886 case QUAL_UNION_TYPE
:
5891 gcc_assert (!for_ctor_p
);
5892 /* Estimate the number of scalars in each field and pick the
5893 maximum. Other estimates would do instead; the idea is simply
5894 to make sure that the estimate is not sensitive to the ordering
5897 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5898 if (TREE_CODE (f
) == FIELD_DECL
)
5900 m
= count_type_elements (TREE_TYPE (f
), false);
5901 /* If the field doesn't span the whole union, add an extra
5902 scalar for the rest. */
5903 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5904 TYPE_SIZE (type
)) != 1)
5917 unsigned HOST_WIDE_INT nelts
;
5918 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5926 case FIXED_POINT_TYPE
:
5931 case REFERENCE_TYPE
:
5947 /* Helper for categorize_ctor_elements. Identical interface. */
5950 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5951 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5953 unsigned HOST_WIDE_INT idx
;
5954 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5955 tree value
, purpose
, elt_type
;
5957 /* Whether CTOR is a valid constant initializer, in accordance with what
5958 initializer_constant_valid_p does. If inferred from the constructor
5959 elements, true until proven otherwise. */
5960 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5961 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5966 elt_type
= NULL_TREE
;
5968 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5970 HOST_WIDE_INT mult
= 1;
5972 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5974 tree lo_index
= TREE_OPERAND (purpose
, 0);
5975 tree hi_index
= TREE_OPERAND (purpose
, 1);
5977 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5978 mult
= (tree_to_uhwi (hi_index
)
5979 - tree_to_uhwi (lo_index
) + 1);
5982 elt_type
= TREE_TYPE (value
);
5984 switch (TREE_CODE (value
))
5988 HOST_WIDE_INT nz
= 0, ic
= 0;
5990 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5993 nz_elts
+= mult
* nz
;
5994 init_elts
+= mult
* ic
;
5996 if (const_from_elts_p
&& const_p
)
5997 const_p
= const_elt_p
;
6004 if (!initializer_zerop (value
))
6010 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6011 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6015 if (!initializer_zerop (TREE_REALPART (value
)))
6017 if (!initializer_zerop (TREE_IMAGPART (value
)))
6024 /* We can only construct constant-length vectors using
6026 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6027 for (unsigned int i
= 0; i
< nunits
; ++i
)
6029 tree v
= VECTOR_CST_ELT (value
, i
);
6030 if (!initializer_zerop (v
))
6039 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6040 nz_elts
+= mult
* tc
;
6041 init_elts
+= mult
* tc
;
6043 if (const_from_elts_p
&& const_p
)
6045 = initializer_constant_valid_p (value
,
6047 TYPE_REVERSE_STORAGE_ORDER
6055 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6056 num_fields
, elt_type
))
6057 *p_complete
= false;
6059 *p_nz_elts
+= nz_elts
;
6060 *p_init_elts
+= init_elts
;
6065 /* Examine CTOR to discover:
6066 * how many scalar fields are set to nonzero values,
6067 and place it in *P_NZ_ELTS;
6068 * how many scalar fields in total are in CTOR,
6069 and place it in *P_ELT_COUNT.
6070 * whether the constructor is complete -- in the sense that every
6071 meaningful byte is explicitly given a value --
6072 and place it in *P_COMPLETE.
6074 Return whether or not CTOR is a valid static constant initializer, the same
6075 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6078 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6079 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6085 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6088 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6089 of which had type LAST_TYPE. Each element was itself a complete
6090 initializer, in the sense that every meaningful byte was explicitly
6091 given a value. Return true if the same is true for the constructor
6095 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6096 const_tree last_type
)
6098 if (TREE_CODE (type
) == UNION_TYPE
6099 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6104 gcc_assert (num_elts
== 1 && last_type
);
6106 /* ??? We could look at each element of the union, and find the
6107 largest element. Which would avoid comparing the size of the
6108 initialized element against any tail padding in the union.
6109 Doesn't seem worth the effort... */
6110 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6113 return count_type_elements (type
, true) == num_elts
;
6116 /* Return 1 if EXP contains mostly (3/4) zeros. */
6119 mostly_zeros_p (const_tree exp
)
6121 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6123 HOST_WIDE_INT nz_elts
, init_elts
;
6126 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6127 return !complete_p
|| nz_elts
< init_elts
/ 4;
6130 return initializer_zerop (exp
);
6133 /* Return 1 if EXP contains all zeros. */
6136 all_zeros_p (const_tree exp
)
6138 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6140 HOST_WIDE_INT nz_elts
, init_elts
;
6143 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6144 return nz_elts
== 0;
6147 return initializer_zerop (exp
);
6150 /* Helper function for store_constructor.
6151 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6152 CLEARED is as for store_constructor.
6153 ALIAS_SET is the alias set to use for any stores.
6154 If REVERSE is true, the store is to be done in reverse order.
6156 This provides a recursive shortcut back to store_constructor when it isn't
6157 necessary to go through store_field. This is so that we can pass through
6158 the cleared field to let store_constructor know that we may not have to
6159 clear a substructure if the outer structure has already been cleared. */
6162 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6163 poly_uint64 bitregion_start
,
6164 poly_uint64 bitregion_end
,
6166 tree exp
, int cleared
,
6167 alias_set_type alias_set
, bool reverse
)
6170 poly_uint64 bytesize
;
6171 if (TREE_CODE (exp
) == CONSTRUCTOR
6172 /* We can only call store_constructor recursively if the size and
6173 bit position are on a byte boundary. */
6174 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6175 && maybe_ne (bitsize
, 0U)
6176 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6177 /* If we have a nonzero bitpos for a register target, then we just
6178 let store_field do the bitfield handling. This is unlikely to
6179 generate unnecessary clear instructions anyways. */
6180 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6184 machine_mode target_mode
= GET_MODE (target
);
6185 if (target_mode
!= BLKmode
6186 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6187 target_mode
= BLKmode
;
6188 target
= adjust_address (target
, target_mode
, bytepos
);
6192 /* Update the alias set, if required. */
6193 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6194 && MEM_ALIAS_SET (target
) != 0)
6196 target
= copy_rtx (target
);
6197 set_mem_alias_set (target
, alias_set
);
6200 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6203 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6204 exp
, alias_set
, false, reverse
);
6208 /* Returns the number of FIELD_DECLs in TYPE. */
6211 fields_length (const_tree type
)
6213 tree t
= TYPE_FIELDS (type
);
6216 for (; t
; t
= DECL_CHAIN (t
))
6217 if (TREE_CODE (t
) == FIELD_DECL
)
6224 /* Store the value of constructor EXP into the rtx TARGET.
6225 TARGET is either a REG or a MEM; we know it cannot conflict, since
6226 safe_from_p has been called.
6227 CLEARED is true if TARGET is known to have been zero'd.
6228 SIZE is the number of bytes of TARGET we are allowed to modify: this
6229 may not be the same as the size of EXP if we are assigning to a field
6230 which has been packed to exclude padding bits.
6231 If REVERSE is true, the store is to be done in reverse order. */
6234 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6237 tree type
= TREE_TYPE (exp
);
6238 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6239 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6241 switch (TREE_CODE (type
))
6245 case QUAL_UNION_TYPE
:
6247 unsigned HOST_WIDE_INT idx
;
6250 /* The storage order is specified for every aggregate type. */
6251 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6253 /* If size is zero or the target is already cleared, do nothing. */
6254 if (known_eq (size
, 0) || cleared
)
6256 /* We either clear the aggregate or indicate the value is dead. */
6257 else if ((TREE_CODE (type
) == UNION_TYPE
6258 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6259 && ! CONSTRUCTOR_ELTS (exp
))
6260 /* If the constructor is empty, clear the union. */
6262 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6266 /* If we are building a static constructor into a register,
6267 set the initial value as zero so we can fold the value into
6268 a constant. But if more than one register is involved,
6269 this probably loses. */
6270 else if (REG_P (target
) && TREE_STATIC (exp
)
6271 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6272 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6274 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6278 /* If the constructor has fewer fields than the structure or
6279 if we are initializing the structure to mostly zeros, clear
6280 the whole structure first. Don't do this if TARGET is a
6281 register whose mode size isn't equal to SIZE since
6282 clear_storage can't handle this case. */
6283 else if (known_size_p (size
)
6284 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6285 || mostly_zeros_p (exp
))
6287 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6289 clear_storage (target
, gen_int_mode (size
, Pmode
),
6294 if (REG_P (target
) && !cleared
)
6295 emit_clobber (target
);
6297 /* Store each element of the constructor into the
6298 corresponding field of TARGET. */
6299 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6302 HOST_WIDE_INT bitsize
;
6303 HOST_WIDE_INT bitpos
= 0;
6305 rtx to_rtx
= target
;
6307 /* Just ignore missing fields. We cleared the whole
6308 structure, above, if any fields are missing. */
6312 if (cleared
&& initializer_zerop (value
))
6315 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6316 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6320 mode
= DECL_MODE (field
);
6321 if (DECL_BIT_FIELD (field
))
6324 offset
= DECL_FIELD_OFFSET (field
);
6325 if (tree_fits_shwi_p (offset
)
6326 && tree_fits_shwi_p (bit_position (field
)))
6328 bitpos
= int_bit_position (field
);
6334 /* If this initializes a field that is smaller than a
6335 word, at the start of a word, try to widen it to a full
6336 word. This special case allows us to output C++ member
6337 function initializations in a form that the optimizers
6339 if (WORD_REGISTER_OPERATIONS
6341 && bitsize
< BITS_PER_WORD
6342 && bitpos
% BITS_PER_WORD
== 0
6343 && GET_MODE_CLASS (mode
) == MODE_INT
6344 && TREE_CODE (value
) == INTEGER_CST
6346 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6348 tree type
= TREE_TYPE (value
);
6350 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6352 type
= lang_hooks
.types
.type_for_mode
6353 (word_mode
, TYPE_UNSIGNED (type
));
6354 value
= fold_convert (type
, value
);
6355 /* Make sure the bits beyond the original bitsize are zero
6356 so that we can correctly avoid extra zeroing stores in
6357 later constructor elements. */
6359 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6361 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6364 if (BYTES_BIG_ENDIAN
)
6366 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6367 build_int_cst (type
,
6368 BITS_PER_WORD
- bitsize
));
6369 bitsize
= BITS_PER_WORD
;
6373 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6374 && DECL_NONADDRESSABLE_P (field
))
6376 to_rtx
= copy_rtx (to_rtx
);
6377 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6380 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6381 0, bitregion_end
, mode
,
6383 get_alias_set (TREE_TYPE (field
)),
6391 unsigned HOST_WIDE_INT i
;
6394 tree elttype
= TREE_TYPE (type
);
6396 HOST_WIDE_INT minelt
= 0;
6397 HOST_WIDE_INT maxelt
= 0;
6399 /* The storage order is specified for every aggregate type. */
6400 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6402 domain
= TYPE_DOMAIN (type
);
6403 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6404 && TYPE_MAX_VALUE (domain
)
6405 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6406 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6408 /* If we have constant bounds for the range of the type, get them. */
6411 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6412 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6415 /* If the constructor has fewer elements than the array, clear
6416 the whole array first. Similarly if this is static
6417 constructor of a non-BLKmode object. */
6420 else if (REG_P (target
) && TREE_STATIC (exp
))
6424 unsigned HOST_WIDE_INT idx
;
6426 HOST_WIDE_INT count
= 0, zero_count
= 0;
6427 need_to_clear
= ! const_bounds_p
;
6429 /* This loop is a more accurate version of the loop in
6430 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6431 is also needed to check for missing elements. */
6432 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6434 HOST_WIDE_INT this_node_count
;
6439 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6441 tree lo_index
= TREE_OPERAND (index
, 0);
6442 tree hi_index
= TREE_OPERAND (index
, 1);
6444 if (! tree_fits_uhwi_p (lo_index
)
6445 || ! tree_fits_uhwi_p (hi_index
))
6451 this_node_count
= (tree_to_uhwi (hi_index
)
6452 - tree_to_uhwi (lo_index
) + 1);
6455 this_node_count
= 1;
6457 count
+= this_node_count
;
6458 if (mostly_zeros_p (value
))
6459 zero_count
+= this_node_count
;
6462 /* Clear the entire array first if there are any missing
6463 elements, or if the incidence of zero elements is >=
6466 && (count
< maxelt
- minelt
+ 1
6467 || 4 * zero_count
>= 3 * count
))
6471 if (need_to_clear
&& maybe_gt (size
, 0))
6474 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6476 clear_storage (target
, gen_int_mode (size
, Pmode
),
6481 if (!cleared
&& REG_P (target
))
6482 /* Inform later passes that the old value is dead. */
6483 emit_clobber (target
);
6485 /* Store each element of the constructor into the
6486 corresponding element of TARGET, determined by counting the
6488 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6492 HOST_WIDE_INT bitpos
;
6493 rtx xtarget
= target
;
6495 if (cleared
&& initializer_zerop (value
))
6498 mode
= TYPE_MODE (elttype
);
6499 if (mode
!= BLKmode
)
6500 bitsize
= GET_MODE_BITSIZE (mode
);
6501 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6504 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6506 tree lo_index
= TREE_OPERAND (index
, 0);
6507 tree hi_index
= TREE_OPERAND (index
, 1);
6508 rtx index_r
, pos_rtx
;
6509 HOST_WIDE_INT lo
, hi
, count
;
6512 /* If the range is constant and "small", unroll the loop. */
6514 && tree_fits_shwi_p (lo_index
)
6515 && tree_fits_shwi_p (hi_index
)
6516 && (lo
= tree_to_shwi (lo_index
),
6517 hi
= tree_to_shwi (hi_index
),
6518 count
= hi
- lo
+ 1,
6521 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6522 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6525 lo
-= minelt
; hi
-= minelt
;
6526 for (; lo
<= hi
; lo
++)
6528 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6531 && !MEM_KEEP_ALIAS_SET_P (target
)
6532 && TREE_CODE (type
) == ARRAY_TYPE
6533 && TYPE_NONALIASED_COMPONENT (type
))
6535 target
= copy_rtx (target
);
6536 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6539 store_constructor_field
6540 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6541 mode
, value
, cleared
,
6542 get_alias_set (elttype
), reverse
);
6547 rtx_code_label
*loop_start
= gen_label_rtx ();
6548 rtx_code_label
*loop_end
= gen_label_rtx ();
6551 expand_normal (hi_index
);
6553 index
= build_decl (EXPR_LOCATION (exp
),
6554 VAR_DECL
, NULL_TREE
, domain
);
6555 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6556 SET_DECL_RTL (index
, index_r
);
6557 store_expr (lo_index
, index_r
, 0, false, reverse
);
6559 /* Build the head of the loop. */
6560 do_pending_stack_adjust ();
6561 emit_label (loop_start
);
6563 /* Assign value to element index. */
6565 fold_convert (ssizetype
,
6566 fold_build2 (MINUS_EXPR
,
6569 TYPE_MIN_VALUE (domain
)));
6572 size_binop (MULT_EXPR
, position
,
6573 fold_convert (ssizetype
,
6574 TYPE_SIZE_UNIT (elttype
)));
6576 pos_rtx
= expand_normal (position
);
6577 xtarget
= offset_address (target
, pos_rtx
,
6578 highest_pow2_factor (position
));
6579 xtarget
= adjust_address (xtarget
, mode
, 0);
6580 if (TREE_CODE (value
) == CONSTRUCTOR
)
6581 store_constructor (value
, xtarget
, cleared
,
6582 exact_div (bitsize
, BITS_PER_UNIT
),
6585 store_expr (value
, xtarget
, 0, false, reverse
);
6587 /* Generate a conditional jump to exit the loop. */
6588 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6590 jumpif (exit_cond
, loop_end
,
6591 profile_probability::uninitialized ());
6593 /* Update the loop counter, and jump to the head of
6595 expand_assignment (index
,
6596 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6597 index
, integer_one_node
),
6600 emit_jump (loop_start
);
6602 /* Build the end of the loop. */
6603 emit_label (loop_end
);
6606 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6607 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6612 index
= ssize_int (1);
6615 index
= fold_convert (ssizetype
,
6616 fold_build2 (MINUS_EXPR
,
6619 TYPE_MIN_VALUE (domain
)));
6622 size_binop (MULT_EXPR
, index
,
6623 fold_convert (ssizetype
,
6624 TYPE_SIZE_UNIT (elttype
)));
6625 xtarget
= offset_address (target
,
6626 expand_normal (position
),
6627 highest_pow2_factor (position
));
6628 xtarget
= adjust_address (xtarget
, mode
, 0);
6629 store_expr (value
, xtarget
, 0, false, reverse
);
6634 bitpos
= ((tree_to_shwi (index
) - minelt
)
6635 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6637 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6639 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6640 && TREE_CODE (type
) == ARRAY_TYPE
6641 && TYPE_NONALIASED_COMPONENT (type
))
6643 target
= copy_rtx (target
);
6644 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6646 store_constructor_field (target
, bitsize
, bitpos
, 0,
6647 bitregion_end
, mode
, value
,
6648 cleared
, get_alias_set (elttype
),
6657 unsigned HOST_WIDE_INT idx
;
6658 constructor_elt
*ce
;
6661 insn_code icode
= CODE_FOR_nothing
;
6663 tree elttype
= TREE_TYPE (type
);
6664 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6665 machine_mode eltmode
= TYPE_MODE (elttype
);
6666 HOST_WIDE_INT bitsize
;
6667 HOST_WIDE_INT bitpos
;
6668 rtvec vector
= NULL
;
6670 unsigned HOST_WIDE_INT const_n_elts
;
6671 alias_set_type alias
;
6672 bool vec_vec_init_p
= false;
6673 machine_mode mode
= GET_MODE (target
);
6675 gcc_assert (eltmode
!= BLKmode
);
6677 /* Try using vec_duplicate_optab for uniform vectors. */
6678 if (!TREE_SIDE_EFFECTS (exp
)
6679 && VECTOR_MODE_P (mode
)
6680 && eltmode
== GET_MODE_INNER (mode
)
6681 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6682 != CODE_FOR_nothing
)
6683 && (elt
= uniform_vector_p (exp
)))
6685 struct expand_operand ops
[2];
6686 create_output_operand (&ops
[0], target
, mode
);
6687 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6688 expand_insn (icode
, 2, ops
);
6689 if (!rtx_equal_p (target
, ops
[0].value
))
6690 emit_move_insn (target
, ops
[0].value
);
6694 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6696 && VECTOR_MODE_P (mode
)
6697 && n_elts
.is_constant (&const_n_elts
))
6699 machine_mode emode
= eltmode
;
6701 if (CONSTRUCTOR_NELTS (exp
)
6702 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6705 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6706 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6707 * TYPE_VECTOR_SUBPARTS (etype
),
6709 emode
= TYPE_MODE (etype
);
6711 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6712 if (icode
!= CODE_FOR_nothing
)
6714 unsigned int i
, n
= const_n_elts
;
6716 if (emode
!= eltmode
)
6718 n
= CONSTRUCTOR_NELTS (exp
);
6719 vec_vec_init_p
= true;
6721 vector
= rtvec_alloc (n
);
6722 for (i
= 0; i
< n
; i
++)
6723 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6727 /* If the constructor has fewer elements than the vector,
6728 clear the whole array first. Similarly if this is static
6729 constructor of a non-BLKmode object. */
6732 else if (REG_P (target
) && TREE_STATIC (exp
))
6736 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6739 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6741 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6743 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6744 TYPE_SIZE (elttype
)));
6746 count
+= n_elts_here
;
6747 if (mostly_zeros_p (value
))
6748 zero_count
+= n_elts_here
;
6751 /* Clear the entire vector first if there are any missing elements,
6752 or if the incidence of zero elements is >= 75%. */
6753 need_to_clear
= (maybe_lt (count
, n_elts
)
6754 || 4 * zero_count
>= 3 * count
);
6757 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6760 emit_move_insn (target
, CONST0_RTX (mode
));
6762 clear_storage (target
, gen_int_mode (size
, Pmode
),
6767 /* Inform later passes that the old value is dead. */
6768 if (!cleared
&& !vector
&& REG_P (target
))
6769 emit_move_insn (target
, CONST0_RTX (mode
));
6772 alias
= MEM_ALIAS_SET (target
);
6774 alias
= get_alias_set (elttype
);
6776 /* Store each element of the constructor into the corresponding
6777 element of TARGET, determined by counting the elements. */
6778 for (idx
= 0, i
= 0;
6779 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6780 idx
++, i
+= bitsize
/ elt_size
)
6782 HOST_WIDE_INT eltpos
;
6783 tree value
= ce
->value
;
6785 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6786 if (cleared
&& initializer_zerop (value
))
6790 eltpos
= tree_to_uhwi (ce
->index
);
6798 gcc_assert (ce
->index
== NULL_TREE
);
6799 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6803 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6804 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6808 machine_mode value_mode
6809 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6810 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6811 bitpos
= eltpos
* elt_size
;
6812 store_constructor_field (target
, bitsize
, bitpos
, 0,
6813 bitregion_end
, value_mode
,
6814 value
, cleared
, alias
, reverse
);
6819 emit_insn (GEN_FCN (icode
) (target
,
6820 gen_rtx_PARALLEL (mode
, vector
)));
6829 /* Store the value of EXP (an expression tree)
6830 into a subfield of TARGET which has mode MODE and occupies
6831 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6832 If MODE is VOIDmode, it means that we are storing into a bit-field.
6834 BITREGION_START is bitpos of the first bitfield in this region.
6835 BITREGION_END is the bitpos of the ending bitfield in this region.
6836 These two fields are 0, if the C++ memory model does not apply,
6837 or we are not interested in keeping track of bitfield regions.
6839 Always return const0_rtx unless we have something particular to
6842 ALIAS_SET is the alias set for the destination. This value will
6843 (in general) be different from that for TARGET, since TARGET is a
6844 reference to the containing structure.
6846 If NONTEMPORAL is true, try generating a nontemporal store.
6848 If REVERSE is true, the store is to be done in reverse order. */
6851 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6852 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6853 machine_mode mode
, tree exp
,
6854 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6856 if (TREE_CODE (exp
) == ERROR_MARK
)
6859 /* If we have nothing to store, do nothing unless the expression has
6860 side-effects. Don't do that for zero sized addressable lhs of
6862 if (known_eq (bitsize
, 0)
6863 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6864 || TREE_CODE (exp
) != CALL_EXPR
))
6865 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6867 if (GET_CODE (target
) == CONCAT
)
6869 /* We're storing into a struct containing a single __complex. */
6871 gcc_assert (known_eq (bitpos
, 0));
6872 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6875 /* If the structure is in a register or if the component
6876 is a bit field, we cannot use addressing to access it.
6877 Use bit-field techniques or SUBREG to store in it. */
6879 poly_int64 decl_bitsize
;
6880 if (mode
== VOIDmode
6881 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6882 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6883 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6885 || GET_CODE (target
) == SUBREG
6886 /* If the field isn't aligned enough to store as an ordinary memref,
6887 store it as a bit field. */
6889 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6890 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6891 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6892 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6893 || (known_size_p (bitsize
)
6895 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6896 /* If the RHS and field are a constant size and the size of the
6897 RHS isn't the same size as the bitfield, we must use bitfield
6899 || (known_size_p (bitsize
)
6900 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6901 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6903 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6904 we will handle specially below. */
6905 && !(TREE_CODE (exp
) == CONSTRUCTOR
6906 && multiple_p (bitsize
, BITS_PER_UNIT
))
6907 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6908 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6909 includes some extra padding. store_expr / expand_expr will in
6910 that case call get_inner_reference that will have the bitsize
6911 we check here and thus the block move will not clobber the
6912 padding that shouldn't be clobbered. In the future we could
6913 replace the TREE_ADDRESSABLE check with a check that
6914 get_base_address needs to live in memory. */
6915 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6916 || TREE_CODE (exp
) != COMPONENT_REF
6917 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6918 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6919 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6921 || maybe_ne (decl_bitsize
, bitsize
)))
6922 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6923 decl we must use bitfield operations. */
6924 || (known_size_p (bitsize
)
6925 && TREE_CODE (exp
) == MEM_REF
6926 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6927 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6928 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6929 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6934 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6935 implies a mask operation. If the precision is the same size as
6936 the field we're storing into, that mask is redundant. This is
6937 particularly common with bit field assignments generated by the
6939 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6942 tree type
= TREE_TYPE (exp
);
6943 if (INTEGRAL_TYPE_P (type
)
6944 && maybe_ne (TYPE_PRECISION (type
),
6945 GET_MODE_BITSIZE (TYPE_MODE (type
)))
6946 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6948 tree op
= gimple_assign_rhs1 (nop_def
);
6949 type
= TREE_TYPE (op
);
6950 if (INTEGRAL_TYPE_P (type
)
6951 && known_ge (TYPE_PRECISION (type
), bitsize
))
6956 temp
= expand_normal (exp
);
6958 /* We don't support variable-sized BLKmode bitfields, since our
6959 handling of BLKmode is bound up with the ability to break
6960 things into words. */
6961 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6963 /* Handle calls that return values in multiple non-contiguous locations.
6964 The Irix 6 ABI has examples of this. */
6965 if (GET_CODE (temp
) == PARALLEL
)
6967 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6968 machine_mode temp_mode
= GET_MODE (temp
);
6969 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
6970 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6971 rtx temp_target
= gen_reg_rtx (temp_mode
);
6972 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6976 /* Handle calls that return BLKmode values in registers. */
6977 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6979 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6980 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6984 /* If the value has aggregate type and an integral mode then, if BITSIZE
6985 is narrower than this mode and this is for big-endian data, we first
6986 need to put the value into the low-order bits for store_bit_field,
6987 except when MODE is BLKmode and BITSIZE larger than the word size
6988 (see the handling of fields larger than a word in store_bit_field).
6989 Moreover, the field may be not aligned on a byte boundary; in this
6990 case, if it has reverse storage order, it needs to be accessed as a
6991 scalar field with reverse storage order and we must first put the
6992 value into target order. */
6993 scalar_int_mode temp_mode
;
6994 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6995 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6997 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6999 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7002 temp
= flip_storage_order (temp_mode
, temp
);
7004 gcc_checking_assert (known_le (bitsize
, size
));
7005 if (maybe_lt (bitsize
, size
)
7006 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7007 /* Use of to_constant for BLKmode was checked above. */
7008 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7009 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7010 size
- bitsize
, NULL_RTX
, 1);
7013 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7014 if (mode
!= VOIDmode
&& mode
!= BLKmode
7015 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7016 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7018 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7019 and BITPOS must be aligned on a byte boundary. If so, we simply do
7020 a block copy. Likewise for a BLKmode-like TARGET. */
7021 if (GET_MODE (temp
) == BLKmode
7022 && (GET_MODE (target
) == BLKmode
7024 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7025 && multiple_p (bitpos
, BITS_PER_UNIT
)
7026 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7028 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7029 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7030 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7032 target
= adjust_address (target
, VOIDmode
, bytepos
);
7033 emit_block_move (target
, temp
,
7034 gen_int_mode (bytesize
, Pmode
),
7040 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7041 word size, we need to load the value (see again store_bit_field). */
7042 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7044 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7045 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7046 temp_mode
, false, NULL
);
7049 /* Store the value in the bitfield. */
7050 gcc_checking_assert (known_ge (bitpos
, 0));
7051 store_bit_field (target
, bitsize
, bitpos
,
7052 bitregion_start
, bitregion_end
,
7053 mode
, temp
, reverse
);
7059 /* Now build a reference to just the desired component. */
7060 rtx to_rtx
= adjust_address (target
, mode
,
7061 exact_div (bitpos
, BITS_PER_UNIT
));
7063 if (to_rtx
== target
)
7064 to_rtx
= copy_rtx (to_rtx
);
7066 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7067 set_mem_alias_set (to_rtx
, alias_set
);
7069 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7070 into a target smaller than its type; handle that case now. */
7071 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7073 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7074 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7078 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7082 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7083 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7084 codes and find the ultimate containing object, which we return.
7086 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7087 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7088 storage order of the field.
7089 If the position of the field is variable, we store a tree
7090 giving the variable offset (in units) in *POFFSET.
7091 This offset is in addition to the bit position.
7092 If the position is not variable, we store 0 in *POFFSET.
7094 If any of the extraction expressions is volatile,
7095 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7097 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7098 Otherwise, it is a mode that can be used to access the field.
7100 If the field describes a variable-sized object, *PMODE is set to
7101 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7102 this case, but the address of the object can be found. */
7105 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7106 poly_int64_pod
*pbitpos
, tree
*poffset
,
7107 machine_mode
*pmode
, int *punsignedp
,
7108 int *preversep
, int *pvolatilep
)
7111 machine_mode mode
= VOIDmode
;
7112 bool blkmode_bitfield
= false;
7113 tree offset
= size_zero_node
;
7114 poly_offset_int bit_offset
= 0;
7116 /* First get the mode, signedness, storage order and size. We do this from
7117 just the outermost expression. */
7119 if (TREE_CODE (exp
) == COMPONENT_REF
)
7121 tree field
= TREE_OPERAND (exp
, 1);
7122 size_tree
= DECL_SIZE (field
);
7123 if (flag_strict_volatile_bitfields
> 0
7124 && TREE_THIS_VOLATILE (exp
)
7125 && DECL_BIT_FIELD_TYPE (field
)
7126 && DECL_MODE (field
) != BLKmode
)
7127 /* Volatile bitfields should be accessed in the mode of the
7128 field's type, not the mode computed based on the bit
7130 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7131 else if (!DECL_BIT_FIELD (field
))
7133 mode
= DECL_MODE (field
);
7134 /* For vector fields re-check the target flags, as DECL_MODE
7135 could have been set with different target flags than
7136 the current function has. */
7138 && VECTOR_TYPE_P (TREE_TYPE (field
))
7139 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7140 mode
= TYPE_MODE (TREE_TYPE (field
));
7142 else if (DECL_MODE (field
) == BLKmode
)
7143 blkmode_bitfield
= true;
7145 *punsignedp
= DECL_UNSIGNED (field
);
7147 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7149 size_tree
= TREE_OPERAND (exp
, 1);
7150 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7151 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7153 /* For vector types, with the correct size of access, use the mode of
7155 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7156 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7157 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7158 mode
= TYPE_MODE (TREE_TYPE (exp
));
7162 mode
= TYPE_MODE (TREE_TYPE (exp
));
7163 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7165 if (mode
== BLKmode
)
7166 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7168 *pbitsize
= GET_MODE_BITSIZE (mode
);
7173 if (! tree_fits_uhwi_p (size_tree
))
7174 mode
= BLKmode
, *pbitsize
= -1;
7176 *pbitsize
= tree_to_uhwi (size_tree
);
7179 *preversep
= reverse_storage_order_for_component_p (exp
);
7181 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7182 and find the ultimate containing object. */
7185 switch (TREE_CODE (exp
))
7188 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7193 tree field
= TREE_OPERAND (exp
, 1);
7194 tree this_offset
= component_ref_field_offset (exp
);
7196 /* If this field hasn't been filled in yet, don't go past it.
7197 This should only happen when folding expressions made during
7198 type construction. */
7199 if (this_offset
== 0)
7202 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7203 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7205 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7210 case ARRAY_RANGE_REF
:
7212 tree index
= TREE_OPERAND (exp
, 1);
7213 tree low_bound
= array_ref_low_bound (exp
);
7214 tree unit_size
= array_ref_element_size (exp
);
7216 /* We assume all arrays have sizes that are a multiple of a byte.
7217 First subtract the lower bound, if any, in the type of the
7218 index, then convert to sizetype and multiply by the size of
7219 the array element. */
7220 if (! integer_zerop (low_bound
))
7221 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7224 offset
= size_binop (PLUS_EXPR
, offset
,
7225 size_binop (MULT_EXPR
,
7226 fold_convert (sizetype
, index
),
7235 bit_offset
+= *pbitsize
;
7238 case VIEW_CONVERT_EXPR
:
7242 /* Hand back the decl for MEM[&decl, off]. */
7243 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7245 tree off
= TREE_OPERAND (exp
, 1);
7246 if (!integer_zerop (off
))
7248 poly_offset_int boff
= mem_ref_offset (exp
);
7249 boff
<<= LOG2_BITS_PER_UNIT
;
7252 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7260 /* If any reference in the chain is volatile, the effect is volatile. */
7261 if (TREE_THIS_VOLATILE (exp
))
7264 exp
= TREE_OPERAND (exp
, 0);
7268 /* If OFFSET is constant, see if we can return the whole thing as a
7269 constant bit position. Make sure to handle overflow during
7271 if (poly_int_tree_p (offset
))
7273 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7274 TYPE_PRECISION (sizetype
));
7275 tem
<<= LOG2_BITS_PER_UNIT
;
7277 if (tem
.to_shwi (pbitpos
))
7278 *poffset
= offset
= NULL_TREE
;
7281 /* Otherwise, split it up. */
7284 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7285 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7287 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7288 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7289 offset
= size_binop (PLUS_EXPR
, offset
,
7290 build_int_cst (sizetype
, bytes
.force_shwi ()));
7296 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7297 if (mode
== VOIDmode
7299 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7300 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7308 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7310 static unsigned HOST_WIDE_INT
7311 target_align (const_tree target
)
7313 /* We might have a chain of nested references with intermediate misaligning
7314 bitfields components, so need to recurse to find out. */
7316 unsigned HOST_WIDE_INT this_align
, outer_align
;
7318 switch (TREE_CODE (target
))
7324 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7325 outer_align
= target_align (TREE_OPERAND (target
, 0));
7326 return MIN (this_align
, outer_align
);
7329 case ARRAY_RANGE_REF
:
7330 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7331 outer_align
= target_align (TREE_OPERAND (target
, 0));
7332 return MIN (this_align
, outer_align
);
7335 case NON_LVALUE_EXPR
:
7336 case VIEW_CONVERT_EXPR
:
7337 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7338 outer_align
= target_align (TREE_OPERAND (target
, 0));
7339 return MAX (this_align
, outer_align
);
7342 return TYPE_ALIGN (TREE_TYPE (target
));
7347 /* Given an rtx VALUE that may contain additions and multiplications, return
7348 an equivalent value that just refers to a register, memory, or constant.
7349 This is done by generating instructions to perform the arithmetic and
7350 returning a pseudo-register containing the value.
7352 The returned value may be a REG, SUBREG, MEM or constant. */
7355 force_operand (rtx value
, rtx target
)
7358 /* Use subtarget as the target for operand 0 of a binary operation. */
7359 rtx subtarget
= get_subtarget (target
);
7360 enum rtx_code code
= GET_CODE (value
);
7362 /* Check for subreg applied to an expression produced by loop optimizer. */
7364 && !REG_P (SUBREG_REG (value
))
7365 && !MEM_P (SUBREG_REG (value
)))
7368 = simplify_gen_subreg (GET_MODE (value
),
7369 force_reg (GET_MODE (SUBREG_REG (value
)),
7370 force_operand (SUBREG_REG (value
),
7372 GET_MODE (SUBREG_REG (value
)),
7373 SUBREG_BYTE (value
));
7374 code
= GET_CODE (value
);
7377 /* Check for a PIC address load. */
7378 if ((code
== PLUS
|| code
== MINUS
)
7379 && XEXP (value
, 0) == pic_offset_table_rtx
7380 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7381 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7382 || GET_CODE (XEXP (value
, 1)) == CONST
))
7385 subtarget
= gen_reg_rtx (GET_MODE (value
));
7386 emit_move_insn (subtarget
, value
);
7390 if (ARITHMETIC_P (value
))
7392 op2
= XEXP (value
, 1);
7393 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7395 if (code
== MINUS
&& CONST_INT_P (op2
))
7398 op2
= negate_rtx (GET_MODE (value
), op2
);
7401 /* Check for an addition with OP2 a constant integer and our first
7402 operand a PLUS of a virtual register and something else. In that
7403 case, we want to emit the sum of the virtual register and the
7404 constant first and then add the other value. This allows virtual
7405 register instantiation to simply modify the constant rather than
7406 creating another one around this addition. */
7407 if (code
== PLUS
&& CONST_INT_P (op2
)
7408 && GET_CODE (XEXP (value
, 0)) == PLUS
7409 && REG_P (XEXP (XEXP (value
, 0), 0))
7410 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7411 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7413 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7414 XEXP (XEXP (value
, 0), 0), op2
,
7415 subtarget
, 0, OPTAB_LIB_WIDEN
);
7416 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7417 force_operand (XEXP (XEXP (value
,
7419 target
, 0, OPTAB_LIB_WIDEN
);
7422 op1
= force_operand (XEXP (value
, 0), subtarget
);
7423 op2
= force_operand (op2
, NULL_RTX
);
7427 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7429 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7430 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7431 target
, 1, OPTAB_LIB_WIDEN
);
7433 return expand_divmod (0,
7434 FLOAT_MODE_P (GET_MODE (value
))
7435 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7436 GET_MODE (value
), op1
, op2
, target
, 0);
7438 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7441 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7444 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7447 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7448 target
, 0, OPTAB_LIB_WIDEN
);
7450 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7451 target
, 1, OPTAB_LIB_WIDEN
);
7454 if (UNARY_P (value
))
7457 target
= gen_reg_rtx (GET_MODE (value
));
7458 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7465 case FLOAT_TRUNCATE
:
7466 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7471 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7475 case UNSIGNED_FLOAT
:
7476 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7480 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7484 #ifdef INSN_SCHEDULING
7485 /* On machines that have insn scheduling, we want all memory reference to be
7486 explicit, so we need to deal with such paradoxical SUBREGs. */
7487 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7489 = simplify_gen_subreg (GET_MODE (value
),
7490 force_reg (GET_MODE (SUBREG_REG (value
)),
7491 force_operand (SUBREG_REG (value
),
7493 GET_MODE (SUBREG_REG (value
)),
7494 SUBREG_BYTE (value
));
7500 /* Subroutine of expand_expr: return nonzero iff there is no way that
7501 EXP can reference X, which is being modified. TOP_P is nonzero if this
7502 call is going to be used to determine whether we need a temporary
7503 for EXP, as opposed to a recursive call to this function.
7505 It is always safe for this routine to return zero since it merely
7506 searches for optimization opportunities. */
7509 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7515 /* If EXP has varying size, we MUST use a target since we currently
7516 have no way of allocating temporaries of variable size
7517 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7518 So we assume here that something at a higher level has prevented a
7519 clash. This is somewhat bogus, but the best we can do. Only
7520 do this when X is BLKmode and when we are at the top level. */
7521 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7522 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7523 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7524 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7525 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7527 && GET_MODE (x
) == BLKmode
)
7528 /* If X is in the outgoing argument area, it is always safe. */
7530 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7531 || (GET_CODE (XEXP (x
, 0)) == PLUS
7532 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7535 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7536 find the underlying pseudo. */
7537 if (GET_CODE (x
) == SUBREG
)
7540 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7544 /* Now look at our tree code and possibly recurse. */
7545 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7547 case tcc_declaration
:
7548 exp_rtl
= DECL_RTL_IF_SET (exp
);
7554 case tcc_exceptional
:
7555 if (TREE_CODE (exp
) == TREE_LIST
)
7559 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7561 exp
= TREE_CHAIN (exp
);
7564 if (TREE_CODE (exp
) != TREE_LIST
)
7565 return safe_from_p (x
, exp
, 0);
7568 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7570 constructor_elt
*ce
;
7571 unsigned HOST_WIDE_INT idx
;
7573 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7574 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7575 || !safe_from_p (x
, ce
->value
, 0))
7579 else if (TREE_CODE (exp
) == ERROR_MARK
)
7580 return 1; /* An already-visited SAVE_EXPR? */
7585 /* The only case we look at here is the DECL_INITIAL inside a
7587 return (TREE_CODE (exp
) != DECL_EXPR
7588 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7589 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7590 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7593 case tcc_comparison
:
7594 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7599 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7601 case tcc_expression
:
7604 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7605 the expression. If it is set, we conflict iff we are that rtx or
7606 both are in memory. Otherwise, we check all operands of the
7607 expression recursively. */
7609 switch (TREE_CODE (exp
))
7612 /* If the operand is static or we are static, we can't conflict.
7613 Likewise if we don't conflict with the operand at all. */
7614 if (staticp (TREE_OPERAND (exp
, 0))
7615 || TREE_STATIC (exp
)
7616 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7619 /* Otherwise, the only way this can conflict is if we are taking
7620 the address of a DECL a that address if part of X, which is
7622 exp
= TREE_OPERAND (exp
, 0);
7625 if (!DECL_RTL_SET_P (exp
)
7626 || !MEM_P (DECL_RTL (exp
)))
7629 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7635 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7636 get_alias_set (exp
)))
7641 /* Assume that the call will clobber all hard registers and
7643 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7648 case WITH_CLEANUP_EXPR
:
7649 case CLEANUP_POINT_EXPR
:
7650 /* Lowered by gimplify.c. */
7654 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7660 /* If we have an rtx, we do not need to scan our operands. */
7664 nops
= TREE_OPERAND_LENGTH (exp
);
7665 for (i
= 0; i
< nops
; i
++)
7666 if (TREE_OPERAND (exp
, i
) != 0
7667 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7673 /* Should never get a type here. */
7677 /* If we have an rtl, find any enclosed object. Then see if we conflict
7681 if (GET_CODE (exp_rtl
) == SUBREG
)
7683 exp_rtl
= SUBREG_REG (exp_rtl
);
7685 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7689 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7690 are memory and they conflict. */
7691 return ! (rtx_equal_p (x
, exp_rtl
)
7692 || (MEM_P (x
) && MEM_P (exp_rtl
)
7693 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7696 /* If we reach here, it is safe. */
7701 /* Return the highest power of two that EXP is known to be a multiple of.
7702 This is used in updating alignment of MEMs in array references. */
7704 unsigned HOST_WIDE_INT
7705 highest_pow2_factor (const_tree exp
)
7707 unsigned HOST_WIDE_INT ret
;
7708 int trailing_zeros
= tree_ctz (exp
);
7709 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7710 return BIGGEST_ALIGNMENT
;
7711 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7712 if (ret
> BIGGEST_ALIGNMENT
)
7713 return BIGGEST_ALIGNMENT
;
7717 /* Similar, except that the alignment requirements of TARGET are
7718 taken into account. Assume it is at least as aligned as its
7719 type, unless it is a COMPONENT_REF in which case the layout of
7720 the structure gives the alignment. */
7722 static unsigned HOST_WIDE_INT
7723 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7725 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7726 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7728 return MAX (factor
, talign
);
7731 /* Convert the tree comparison code TCODE to the rtl one where the
7732 signedness is UNSIGNEDP. */
7734 static enum rtx_code
7735 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7747 code
= unsignedp
? LTU
: LT
;
7750 code
= unsignedp
? LEU
: LE
;
7753 code
= unsignedp
? GTU
: GT
;
7756 code
= unsignedp
? GEU
: GE
;
7758 case UNORDERED_EXPR
:
7789 /* Subroutine of expand_expr. Expand the two operands of a binary
7790 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7791 The value may be stored in TARGET if TARGET is nonzero. The
7792 MODIFIER argument is as documented by expand_expr. */
7795 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7796 enum expand_modifier modifier
)
7798 if (! safe_from_p (target
, exp1
, 1))
7800 if (operand_equal_p (exp0
, exp1
, 0))
7802 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7803 *op1
= copy_rtx (*op0
);
7807 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7808 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7813 /* Return a MEM that contains constant EXP. DEFER is as for
7814 output_constant_def and MODIFIER is as for expand_expr. */
7817 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7821 mem
= output_constant_def (exp
, defer
);
7822 if (modifier
!= EXPAND_INITIALIZER
)
7823 mem
= use_anchored_address (mem
);
7827 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7828 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7831 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7832 enum expand_modifier modifier
, addr_space_t as
)
7834 rtx result
, subtarget
;
7836 poly_int64 bitsize
, bitpos
;
7837 int unsignedp
, reversep
, volatilep
= 0;
7840 /* If we are taking the address of a constant and are at the top level,
7841 we have to use output_constant_def since we can't call force_const_mem
7843 /* ??? This should be considered a front-end bug. We should not be
7844 generating ADDR_EXPR of something that isn't an LVALUE. The only
7845 exception here is STRING_CST. */
7846 if (CONSTANT_CLASS_P (exp
))
7848 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7849 if (modifier
< EXPAND_SUM
)
7850 result
= force_operand (result
, target
);
7854 /* Everything must be something allowed by is_gimple_addressable. */
7855 switch (TREE_CODE (exp
))
7858 /* This case will happen via recursion for &a->b. */
7859 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7863 tree tem
= TREE_OPERAND (exp
, 0);
7864 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7865 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7866 return expand_expr (tem
, target
, tmode
, modifier
);
7869 case TARGET_MEM_REF
:
7870 return addr_for_mem_ref (exp
, as
, true);
7873 /* Expand the initializer like constants above. */
7874 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7876 if (modifier
< EXPAND_SUM
)
7877 result
= force_operand (result
, target
);
7881 /* The real part of the complex number is always first, therefore
7882 the address is the same as the address of the parent object. */
7885 inner
= TREE_OPERAND (exp
, 0);
7889 /* The imaginary part of the complex number is always second.
7890 The expression is therefore always offset by the size of the
7893 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7894 inner
= TREE_OPERAND (exp
, 0);
7897 case COMPOUND_LITERAL_EXPR
:
7898 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7899 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7900 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7901 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7902 the initializers aren't gimplified. */
7903 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7904 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7905 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7906 target
, tmode
, modifier
, as
);
7909 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7910 expand_expr, as that can have various side effects; LABEL_DECLs for
7911 example, may not have their DECL_RTL set yet. Expand the rtl of
7912 CONSTRUCTORs too, which should yield a memory reference for the
7913 constructor's contents. Assume language specific tree nodes can
7914 be expanded in some interesting way. */
7915 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7917 || TREE_CODE (exp
) == CONSTRUCTOR
7918 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7920 result
= expand_expr (exp
, target
, tmode
,
7921 modifier
== EXPAND_INITIALIZER
7922 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7924 /* If the DECL isn't in memory, then the DECL wasn't properly
7925 marked TREE_ADDRESSABLE, which will be either a front-end
7926 or a tree optimizer bug. */
7928 gcc_assert (MEM_P (result
));
7929 result
= XEXP (result
, 0);
7931 /* ??? Is this needed anymore? */
7933 TREE_USED (exp
) = 1;
7935 if (modifier
!= EXPAND_INITIALIZER
7936 && modifier
!= EXPAND_CONST_ADDRESS
7937 && modifier
!= EXPAND_SUM
)
7938 result
= force_operand (result
, target
);
7942 /* Pass FALSE as the last argument to get_inner_reference although
7943 we are expanding to RTL. The rationale is that we know how to
7944 handle "aligning nodes" here: we can just bypass them because
7945 they won't change the final object whose address will be returned
7946 (they actually exist only for that purpose). */
7947 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7948 &unsignedp
, &reversep
, &volatilep
);
7952 /* We must have made progress. */
7953 gcc_assert (inner
!= exp
);
7955 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7956 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7957 inner alignment, force the inner to be sufficiently aligned. */
7958 if (CONSTANT_CLASS_P (inner
)
7959 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7961 inner
= copy_node (inner
);
7962 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7963 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7964 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7966 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7972 if (modifier
!= EXPAND_NORMAL
)
7973 result
= force_operand (result
, NULL
);
7974 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7975 modifier
== EXPAND_INITIALIZER
7976 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7978 /* expand_expr is allowed to return an object in a mode other
7979 than TMODE. If it did, we need to convert. */
7980 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7981 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7982 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7983 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7984 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7986 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7987 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7990 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7991 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7992 1, OPTAB_LIB_WIDEN
);
7996 if (maybe_ne (bitpos
, 0))
7998 /* Someone beforehand should have rejected taking the address
7999 of an object that isn't byte-aligned. */
8000 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8001 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8002 result
= plus_constant (tmode
, result
, bytepos
);
8003 if (modifier
< EXPAND_SUM
)
8004 result
= force_operand (result
, target
);
8010 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8011 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8014 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8015 enum expand_modifier modifier
)
8017 addr_space_t as
= ADDR_SPACE_GENERIC
;
8018 scalar_int_mode address_mode
= Pmode
;
8019 scalar_int_mode pointer_mode
= ptr_mode
;
8023 /* Target mode of VOIDmode says "whatever's natural". */
8024 if (tmode
== VOIDmode
)
8025 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8027 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8029 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8030 address_mode
= targetm
.addr_space
.address_mode (as
);
8031 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8034 /* We can get called with some Weird Things if the user does silliness
8035 like "(short) &a". In that case, convert_memory_address won't do
8036 the right thing, so ignore the given target mode. */
8037 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8041 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8042 new_tmode
, modifier
, as
);
8044 /* Despite expand_expr claims concerning ignoring TMODE when not
8045 strictly convenient, stuff breaks if we don't honor it. Note
8046 that combined with the above, we only do this for pointer modes. */
8047 rmode
= GET_MODE (result
);
8048 if (rmode
== VOIDmode
)
8050 if (rmode
!= new_tmode
)
8051 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8056 /* Generate code for computing CONSTRUCTOR EXP.
8057 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8058 is TRUE, instead of creating a temporary variable in memory
8059 NULL is returned and the caller needs to handle it differently. */
8062 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8063 bool avoid_temp_mem
)
8065 tree type
= TREE_TYPE (exp
);
8066 machine_mode mode
= TYPE_MODE (type
);
8068 /* Try to avoid creating a temporary at all. This is possible
8069 if all of the initializer is zero.
8070 FIXME: try to handle all [0..255] initializers we can handle
8072 if (TREE_STATIC (exp
)
8073 && !TREE_ADDRESSABLE (exp
)
8074 && target
!= 0 && mode
== BLKmode
8075 && all_zeros_p (exp
))
8077 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8081 /* All elts simple constants => refer to a constant in memory. But
8082 if this is a non-BLKmode mode, let it store a field at a time
8083 since that should make a CONST_INT, CONST_WIDE_INT or
8084 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8085 use, it is best to store directly into the target unless the type
8086 is large enough that memcpy will be used. If we are making an
8087 initializer and all operands are constant, put it in memory as
8090 FIXME: Avoid trying to fill vector constructors piece-meal.
8091 Output them with output_constant_def below unless we're sure
8092 they're zeros. This should go away when vector initializers
8093 are treated like VECTOR_CST instead of arrays. */
8094 if ((TREE_STATIC (exp
)
8095 && ((mode
== BLKmode
8096 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8097 || TREE_ADDRESSABLE (exp
)
8098 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8099 && (! can_move_by_pieces
8100 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8102 && ! mostly_zeros_p (exp
))))
8103 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8104 && TREE_CONSTANT (exp
)))
8111 constructor
= expand_expr_constant (exp
, 1, modifier
);
8113 if (modifier
!= EXPAND_CONST_ADDRESS
8114 && modifier
!= EXPAND_INITIALIZER
8115 && modifier
!= EXPAND_SUM
)
8116 constructor
= validize_mem (constructor
);
8121 /* Handle calls that pass values in multiple non-contiguous
8122 locations. The Irix 6 ABI has examples of this. */
8123 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8124 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8129 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8132 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8137 /* expand_expr: generate code for computing expression EXP.
8138 An rtx for the computed value is returned. The value is never null.
8139 In the case of a void EXP, const0_rtx is returned.
8141 The value may be stored in TARGET if TARGET is nonzero.
8142 TARGET is just a suggestion; callers must assume that
8143 the rtx returned may not be the same as TARGET.
8145 If TARGET is CONST0_RTX, it means that the value will be ignored.
8147 If TMODE is not VOIDmode, it suggests generating the
8148 result in mode TMODE. But this is done only when convenient.
8149 Otherwise, TMODE is ignored and the value generated in its natural mode.
8150 TMODE is just a suggestion; callers must assume that
8151 the rtx returned may not have mode TMODE.
8153 Note that TARGET may have neither TMODE nor MODE. In that case, it
8154 probably will not be used.
8156 If MODIFIER is EXPAND_SUM then when EXP is an addition
8157 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8158 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8159 products as above, or REG or MEM, or constant.
8160 Ordinarily in such cases we would output mul or add instructions
8161 and then return a pseudo reg containing the sum.
8163 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8164 it also marks a label as absolutely required (it can't be dead).
8165 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8166 This is used for outputting expressions used in initializers.
8168 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8169 with a constant address even if that address is not normally legitimate.
8170 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8172 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8173 a call parameter. Such targets require special care as we haven't yet
8174 marked TARGET so that it's safe from being trashed by libcalls. We
8175 don't want to use TARGET for anything but the final result;
8176 Intermediate values must go elsewhere. Additionally, calls to
8177 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8179 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8180 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8181 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8182 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8185 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8186 In this case, we don't adjust a returned MEM rtx that wouldn't be
8187 sufficiently aligned for its mode; instead, it's up to the caller
8188 to deal with it afterwards. This is used to make sure that unaligned
8189 base objects for which out-of-bounds accesses are supported, for
8190 example record types with trailing arrays, aren't realigned behind
8191 the back of the caller.
8192 The normal operating mode is to pass FALSE for this parameter. */
8195 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8196 enum expand_modifier modifier
, rtx
*alt_rtl
,
8197 bool inner_reference_p
)
8201 /* Handle ERROR_MARK before anybody tries to access its type. */
8202 if (TREE_CODE (exp
) == ERROR_MARK
8203 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8205 ret
= CONST0_RTX (tmode
);
8206 return ret
? ret
: const0_rtx
;
8209 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8214 /* Try to expand the conditional expression which is represented by
8215 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8216 return the rtl reg which represents the result. Otherwise return
8220 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8221 tree treeop1 ATTRIBUTE_UNUSED
,
8222 tree treeop2 ATTRIBUTE_UNUSED
)
8225 rtx op00
, op01
, op1
, op2
;
8226 enum rtx_code comparison_code
;
8227 machine_mode comparison_mode
;
8230 tree type
= TREE_TYPE (treeop1
);
8231 int unsignedp
= TYPE_UNSIGNED (type
);
8232 machine_mode mode
= TYPE_MODE (type
);
8233 machine_mode orig_mode
= mode
;
8234 static bool expanding_cond_expr_using_cmove
= false;
8236 /* Conditional move expansion can end up TERing two operands which,
8237 when recursively hitting conditional expressions can result in
8238 exponential behavior if the cmove expansion ultimatively fails.
8239 It's hardly profitable to TER a cmove into a cmove so avoid doing
8240 that by failing early if we end up recursing. */
8241 if (expanding_cond_expr_using_cmove
)
8244 /* If we cannot do a conditional move on the mode, try doing it
8245 with the promoted mode. */
8246 if (!can_conditionally_move_p (mode
))
8248 mode
= promote_mode (type
, mode
, &unsignedp
);
8249 if (!can_conditionally_move_p (mode
))
8251 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8254 temp
= assign_temp (type
, 0, 1);
8256 expanding_cond_expr_using_cmove
= true;
8258 expand_operands (treeop1
, treeop2
,
8259 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8261 if (TREE_CODE (treeop0
) == SSA_NAME
8262 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8264 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8265 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8266 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8267 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8268 comparison_mode
= TYPE_MODE (type
);
8269 unsignedp
= TYPE_UNSIGNED (type
);
8270 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8272 else if (COMPARISON_CLASS_P (treeop0
))
8274 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8275 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8276 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8277 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8278 unsignedp
= TYPE_UNSIGNED (type
);
8279 comparison_mode
= TYPE_MODE (type
);
8280 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8284 op00
= expand_normal (treeop0
);
8286 comparison_code
= NE
;
8287 comparison_mode
= GET_MODE (op00
);
8288 if (comparison_mode
== VOIDmode
)
8289 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8291 expanding_cond_expr_using_cmove
= false;
8293 if (GET_MODE (op1
) != mode
)
8294 op1
= gen_lowpart (mode
, op1
);
8296 if (GET_MODE (op2
) != mode
)
8297 op2
= gen_lowpart (mode
, op2
);
8299 /* Try to emit the conditional move. */
8300 insn
= emit_conditional_move (temp
, comparison_code
,
8301 op00
, op01
, comparison_mode
,
8305 /* If we could do the conditional move, emit the sequence,
8309 rtx_insn
*seq
= get_insns ();
8312 return convert_modes (orig_mode
, mode
, temp
, 0);
8315 /* Otherwise discard the sequence and fall back to code with
8322 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8323 enum expand_modifier modifier
)
8325 rtx op0
, op1
, op2
, temp
;
8326 rtx_code_label
*lab
;
8330 scalar_int_mode int_mode
;
8331 enum tree_code code
= ops
->code
;
8333 rtx subtarget
, original_target
;
8335 bool reduce_bit_field
;
8336 location_t loc
= ops
->location
;
8337 tree treeop0
, treeop1
, treeop2
;
8338 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8339 ? reduce_to_bit_field_precision ((expr), \
8345 mode
= TYPE_MODE (type
);
8346 unsignedp
= TYPE_UNSIGNED (type
);
8352 /* We should be called only on simple (binary or unary) expressions,
8353 exactly those that are valid in gimple expressions that aren't
8354 GIMPLE_SINGLE_RHS (or invalid). */
8355 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8356 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8357 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8359 ignore
= (target
== const0_rtx
8360 || ((CONVERT_EXPR_CODE_P (code
)
8361 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8362 && TREE_CODE (type
) == VOID_TYPE
));
8364 /* We should be called only if we need the result. */
8365 gcc_assert (!ignore
);
8367 /* An operation in what may be a bit-field type needs the
8368 result to be reduced to the precision of the bit-field type,
8369 which is narrower than that of the type's mode. */
8370 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8371 && !type_has_mode_precision_p (type
));
8373 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8376 /* Use subtarget as the target for operand 0 of a binary operation. */
8377 subtarget
= get_subtarget (target
);
8378 original_target
= target
;
8382 case NON_LVALUE_EXPR
:
8385 if (treeop0
== error_mark_node
)
8388 if (TREE_CODE (type
) == UNION_TYPE
)
8390 tree valtype
= TREE_TYPE (treeop0
);
8392 /* If both input and output are BLKmode, this conversion isn't doing
8393 anything except possibly changing memory attribute. */
8394 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8396 rtx result
= expand_expr (treeop0
, target
, tmode
,
8399 result
= copy_rtx (result
);
8400 set_mem_attributes (result
, type
, 0);
8406 if (TYPE_MODE (type
) != BLKmode
)
8407 target
= gen_reg_rtx (TYPE_MODE (type
));
8409 target
= assign_temp (type
, 1, 1);
8413 /* Store data into beginning of memory target. */
8414 store_expr (treeop0
,
8415 adjust_address (target
, TYPE_MODE (valtype
), 0),
8416 modifier
== EXPAND_STACK_PARM
,
8417 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8421 gcc_assert (REG_P (target
)
8422 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8424 /* Store this field into a union of the proper type. */
8425 poly_uint64 op0_size
8426 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8427 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8428 store_field (target
,
8429 /* The conversion must be constructed so that
8430 we know at compile time how many bits
8432 ordered_min (op0_size
, union_size
),
8433 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8437 /* Return the entire union. */
8441 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8443 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8446 /* If the signedness of the conversion differs and OP0 is
8447 a promoted SUBREG, clear that indication since we now
8448 have to do the proper extension. */
8449 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8450 && GET_CODE (op0
) == SUBREG
)
8451 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8453 return REDUCE_BIT_FIELD (op0
);
8456 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8457 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8458 if (GET_MODE (op0
) == mode
)
8461 /* If OP0 is a constant, just convert it into the proper mode. */
8462 else if (CONSTANT_P (op0
))
8464 tree inner_type
= TREE_TYPE (treeop0
);
8465 machine_mode inner_mode
= GET_MODE (op0
);
8467 if (inner_mode
== VOIDmode
)
8468 inner_mode
= TYPE_MODE (inner_type
);
8470 if (modifier
== EXPAND_INITIALIZER
)
8471 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8473 op0
= convert_modes (mode
, inner_mode
, op0
,
8474 TYPE_UNSIGNED (inner_type
));
8477 else if (modifier
== EXPAND_INITIALIZER
)
8478 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8479 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8481 else if (target
== 0)
8482 op0
= convert_to_mode (mode
, op0
,
8483 TYPE_UNSIGNED (TREE_TYPE
8487 convert_move (target
, op0
,
8488 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8492 return REDUCE_BIT_FIELD (op0
);
8494 case ADDR_SPACE_CONVERT_EXPR
:
8496 tree treeop0_type
= TREE_TYPE (treeop0
);
8498 gcc_assert (POINTER_TYPE_P (type
));
8499 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8501 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8502 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8504 /* Conversions between pointers to the same address space should
8505 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8506 gcc_assert (as_to
!= as_from
);
8508 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8510 /* Ask target code to handle conversion between pointers
8511 to overlapping address spaces. */
8512 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8513 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8515 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8519 /* For disjoint address spaces, converting anything but a null
8520 pointer invokes undefined behavior. We truncate or extend the
8521 value as if we'd converted via integers, which handles 0 as
8522 required, and all others as the programmer likely expects. */
8523 #ifndef POINTERS_EXTEND_UNSIGNED
8524 const int POINTERS_EXTEND_UNSIGNED
= 1;
8526 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8527 op0
, POINTERS_EXTEND_UNSIGNED
);
8533 case POINTER_PLUS_EXPR
:
8534 /* Even though the sizetype mode and the pointer's mode can be different
8535 expand is able to handle this correctly and get the correct result out
8536 of the PLUS_EXPR code. */
8537 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8538 if sizetype precision is smaller than pointer precision. */
8539 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8540 treeop1
= fold_convert_loc (loc
, type
,
8541 fold_convert_loc (loc
, ssizetype
,
8543 /* If sizetype precision is larger than pointer precision, truncate the
8544 offset to have matching modes. */
8545 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8546 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8550 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8551 something else, make sure we add the register to the constant and
8552 then to the other thing. This case can occur during strength
8553 reduction and doing it this way will produce better code if the
8554 frame pointer or argument pointer is eliminated.
8556 fold-const.c will ensure that the constant is always in the inner
8557 PLUS_EXPR, so the only case we need to do anything about is if
8558 sp, ap, or fp is our second argument, in which case we must swap
8559 the innermost first argument and our second argument. */
8561 if (TREE_CODE (treeop0
) == PLUS_EXPR
8562 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8564 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8565 || DECL_RTL (treeop1
) == stack_pointer_rtx
8566 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8571 /* If the result is to be ptr_mode and we are adding an integer to
8572 something, we might be forming a constant. So try to use
8573 plus_constant. If it produces a sum and we can't accept it,
8574 use force_operand. This allows P = &ARR[const] to generate
8575 efficient code on machines where a SYMBOL_REF is not a valid
8578 If this is an EXPAND_SUM call, always return the sum. */
8579 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8580 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8582 if (modifier
== EXPAND_STACK_PARM
)
8584 if (TREE_CODE (treeop0
) == INTEGER_CST
8585 && HWI_COMPUTABLE_MODE_P (mode
)
8586 && TREE_CONSTANT (treeop1
))
8590 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8592 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8594 /* Use wi::shwi to ensure that the constant is
8595 truncated according to the mode of OP1, then sign extended
8596 to a HOST_WIDE_INT. Using the constant directly can result
8597 in non-canonical RTL in a 64x32 cross compile. */
8598 wc
= TREE_INT_CST_LOW (treeop0
);
8600 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8601 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8602 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8603 op1
= force_operand (op1
, target
);
8604 return REDUCE_BIT_FIELD (op1
);
8607 else if (TREE_CODE (treeop1
) == INTEGER_CST
8608 && HWI_COMPUTABLE_MODE_P (mode
)
8609 && TREE_CONSTANT (treeop0
))
8613 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8615 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8616 (modifier
== EXPAND_INITIALIZER
8617 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8618 if (! CONSTANT_P (op0
))
8620 op1
= expand_expr (treeop1
, NULL_RTX
,
8621 VOIDmode
, modifier
);
8622 /* Return a PLUS if modifier says it's OK. */
8623 if (modifier
== EXPAND_SUM
8624 || modifier
== EXPAND_INITIALIZER
)
8625 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8628 /* Use wi::shwi to ensure that the constant is
8629 truncated according to the mode of OP1, then sign extended
8630 to a HOST_WIDE_INT. Using the constant directly can result
8631 in non-canonical RTL in a 64x32 cross compile. */
8632 wc
= TREE_INT_CST_LOW (treeop1
);
8634 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8635 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8636 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8637 op0
= force_operand (op0
, target
);
8638 return REDUCE_BIT_FIELD (op0
);
8642 /* Use TER to expand pointer addition of a negated value
8643 as pointer subtraction. */
8644 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8645 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8646 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8647 && TREE_CODE (treeop1
) == SSA_NAME
8648 && TYPE_MODE (TREE_TYPE (treeop0
))
8649 == TYPE_MODE (TREE_TYPE (treeop1
)))
8651 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8654 treeop1
= gimple_assign_rhs1 (def
);
8660 /* No sense saving up arithmetic to be done
8661 if it's all in the wrong mode to form part of an address.
8662 And force_operand won't know whether to sign-extend or
8664 if (modifier
!= EXPAND_INITIALIZER
8665 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8667 expand_operands (treeop0
, treeop1
,
8668 subtarget
, &op0
, &op1
, modifier
);
8669 if (op0
== const0_rtx
)
8671 if (op1
== const0_rtx
)
8676 expand_operands (treeop0
, treeop1
,
8677 subtarget
, &op0
, &op1
, modifier
);
8678 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8681 case POINTER_DIFF_EXPR
:
8683 /* For initializers, we are allowed to return a MINUS of two
8684 symbolic constants. Here we handle all cases when both operands
8686 /* Handle difference of two symbolic constants,
8687 for the sake of an initializer. */
8688 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8689 && really_constant_p (treeop0
)
8690 && really_constant_p (treeop1
))
8692 expand_operands (treeop0
, treeop1
,
8693 NULL_RTX
, &op0
, &op1
, modifier
);
8694 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8697 /* No sense saving up arithmetic to be done
8698 if it's all in the wrong mode to form part of an address.
8699 And force_operand won't know whether to sign-extend or
8701 if (modifier
!= EXPAND_INITIALIZER
8702 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8705 expand_operands (treeop0
, treeop1
,
8706 subtarget
, &op0
, &op1
, modifier
);
8708 /* Convert A - const to A + (-const). */
8709 if (CONST_INT_P (op1
))
8711 op1
= negate_rtx (mode
, op1
);
8712 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8717 case WIDEN_MULT_PLUS_EXPR
:
8718 case WIDEN_MULT_MINUS_EXPR
:
8719 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8720 op2
= expand_normal (treeop2
);
8721 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8725 case WIDEN_MULT_EXPR
:
8726 /* If first operand is constant, swap them.
8727 Thus the following special case checks need only
8728 check the second operand. */
8729 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8730 std::swap (treeop0
, treeop1
);
8732 /* First, check if we have a multiplication of one signed and one
8733 unsigned operand. */
8734 if (TREE_CODE (treeop1
) != INTEGER_CST
8735 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8736 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8738 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8739 this_optab
= usmul_widen_optab
;
8740 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8741 != CODE_FOR_nothing
)
8743 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8744 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8747 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8749 /* op0 and op1 might still be constant, despite the above
8750 != INTEGER_CST check. Handle it. */
8751 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8753 op0
= convert_modes (innermode
, mode
, op0
, true);
8754 op1
= convert_modes (innermode
, mode
, op1
, false);
8755 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8756 target
, unsignedp
));
8761 /* Check for a multiplication with matching signedness. */
8762 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8763 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8764 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8765 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8767 tree op0type
= TREE_TYPE (treeop0
);
8768 machine_mode innermode
= TYPE_MODE (op0type
);
8769 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8770 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8771 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8773 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8775 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8776 != CODE_FOR_nothing
)
8778 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8780 /* op0 and op1 might still be constant, despite the above
8781 != INTEGER_CST check. Handle it. */
8782 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8785 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8787 = convert_modes (innermode
, mode
, op1
,
8788 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8789 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8793 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8794 unsignedp
, this_optab
);
8795 return REDUCE_BIT_FIELD (temp
);
8797 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8799 && innermode
== word_mode
)
8802 op0
= expand_normal (treeop0
);
8803 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8804 op1
= convert_modes (word_mode
, mode
,
8805 expand_normal (treeop1
),
8806 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8808 op1
= expand_normal (treeop1
);
8809 /* op0 and op1 might still be constant, despite the above
8810 != INTEGER_CST check. Handle it. */
8811 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8812 goto widen_mult_const
;
8813 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8814 unsignedp
, OPTAB_LIB_WIDEN
);
8815 hipart
= gen_highpart (word_mode
, temp
);
8816 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8820 emit_move_insn (hipart
, htem
);
8821 return REDUCE_BIT_FIELD (temp
);
8825 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8826 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8827 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8828 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8831 /* If this is a fixed-point operation, then we cannot use the code
8832 below because "expand_mult" doesn't support sat/no-sat fixed-point
8834 if (ALL_FIXED_POINT_MODE_P (mode
))
8837 /* If first operand is constant, swap them.
8838 Thus the following special case checks need only
8839 check the second operand. */
8840 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8841 std::swap (treeop0
, treeop1
);
8843 /* Attempt to return something suitable for generating an
8844 indexed address, for machines that support that. */
8846 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8847 && tree_fits_shwi_p (treeop1
))
8849 tree exp1
= treeop1
;
8851 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8855 op0
= force_operand (op0
, NULL_RTX
);
8857 op0
= copy_to_mode_reg (mode
, op0
);
8859 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8860 gen_int_mode (tree_to_shwi (exp1
),
8861 TYPE_MODE (TREE_TYPE (exp1
)))));
8864 if (modifier
== EXPAND_STACK_PARM
)
8867 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8868 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8870 case TRUNC_MOD_EXPR
:
8871 case FLOOR_MOD_EXPR
:
8873 case ROUND_MOD_EXPR
:
8875 case TRUNC_DIV_EXPR
:
8876 case FLOOR_DIV_EXPR
:
8878 case ROUND_DIV_EXPR
:
8879 case EXACT_DIV_EXPR
:
8881 /* If this is a fixed-point operation, then we cannot use the code
8882 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8884 if (ALL_FIXED_POINT_MODE_P (mode
))
8887 if (modifier
== EXPAND_STACK_PARM
)
8889 /* Possible optimization: compute the dividend with EXPAND_SUM
8890 then if the divisor is constant can optimize the case
8891 where some terms of the dividend have coeffs divisible by it. */
8892 expand_operands (treeop0
, treeop1
,
8893 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8894 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8895 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8896 if (SCALAR_INT_MODE_P (mode
)
8898 && get_range_pos_neg (treeop0
) == 1
8899 && get_range_pos_neg (treeop1
) == 1)
8901 /* If both arguments are known to be positive when interpreted
8902 as signed, we can expand it as both signed and unsigned
8903 division or modulo. Choose the cheaper sequence in that case. */
8904 bool speed_p
= optimize_insn_for_speed_p ();
8905 do_pending_stack_adjust ();
8907 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8908 rtx_insn
*uns_insns
= get_insns ();
8911 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8912 rtx_insn
*sgn_insns
= get_insns ();
8914 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8915 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8917 /* If costs are the same then use as tie breaker the other
8919 if (uns_cost
== sgn_cost
)
8921 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8922 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8925 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8927 emit_insn (uns_insns
);
8930 emit_insn (sgn_insns
);
8933 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8938 case MULT_HIGHPART_EXPR
:
8939 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8940 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8944 case FIXED_CONVERT_EXPR
:
8945 op0
= expand_normal (treeop0
);
8946 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8947 target
= gen_reg_rtx (mode
);
8949 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8950 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8951 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8952 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8954 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8957 case FIX_TRUNC_EXPR
:
8958 op0
= expand_normal (treeop0
);
8959 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8960 target
= gen_reg_rtx (mode
);
8961 expand_fix (target
, op0
, unsignedp
);
8965 op0
= expand_normal (treeop0
);
8966 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8967 target
= gen_reg_rtx (mode
);
8968 /* expand_float can't figure out what to do if FROM has VOIDmode.
8969 So give it the correct mode. With -O, cse will optimize this. */
8970 if (GET_MODE (op0
) == VOIDmode
)
8971 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8973 expand_float (target
, op0
,
8974 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8978 op0
= expand_expr (treeop0
, subtarget
,
8979 VOIDmode
, EXPAND_NORMAL
);
8980 if (modifier
== EXPAND_STACK_PARM
)
8982 temp
= expand_unop (mode
,
8983 optab_for_tree_code (NEGATE_EXPR
, type
,
8987 return REDUCE_BIT_FIELD (temp
);
8991 op0
= expand_expr (treeop0
, subtarget
,
8992 VOIDmode
, EXPAND_NORMAL
);
8993 if (modifier
== EXPAND_STACK_PARM
)
8996 /* ABS_EXPR is not valid for complex arguments. */
8997 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8998 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9000 /* Unsigned abs is simply the operand. Testing here means we don't
9001 risk generating incorrect code below. */
9002 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9005 return expand_abs (mode
, op0
, target
, unsignedp
,
9006 safe_from_p (target
, treeop0
, 1));
9010 target
= original_target
;
9012 || modifier
== EXPAND_STACK_PARM
9013 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9014 || GET_MODE (target
) != mode
9016 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9017 target
= gen_reg_rtx (mode
);
9018 expand_operands (treeop0
, treeop1
,
9019 target
, &op0
, &op1
, EXPAND_NORMAL
);
9021 /* First try to do it with a special MIN or MAX instruction.
9022 If that does not win, use a conditional jump to select the proper
9024 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9025 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9030 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9031 and similarly for MAX <x, y>. */
9032 if (VECTOR_TYPE_P (type
))
9034 tree t0
= make_tree (type
, op0
);
9035 tree t1
= make_tree (type
, op1
);
9036 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9038 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9042 /* At this point, a MEM target is no longer useful; we will get better
9045 if (! REG_P (target
))
9046 target
= gen_reg_rtx (mode
);
9048 /* If op1 was placed in target, swap op0 and op1. */
9049 if (target
!= op0
&& target
== op1
)
9050 std::swap (op0
, op1
);
9052 /* We generate better code and avoid problems with op1 mentioning
9053 target by forcing op1 into a pseudo if it isn't a constant. */
9054 if (! CONSTANT_P (op1
))
9055 op1
= force_reg (mode
, op1
);
9058 enum rtx_code comparison_code
;
9061 if (code
== MAX_EXPR
)
9062 comparison_code
= unsignedp
? GEU
: GE
;
9064 comparison_code
= unsignedp
? LEU
: LE
;
9066 /* Canonicalize to comparisons against 0. */
9067 if (op1
== const1_rtx
)
9069 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9070 or (a != 0 ? a : 1) for unsigned.
9071 For MIN we are safe converting (a <= 1 ? a : 1)
9072 into (a <= 0 ? a : 1) */
9073 cmpop1
= const0_rtx
;
9074 if (code
== MAX_EXPR
)
9075 comparison_code
= unsignedp
? NE
: GT
;
9077 if (op1
== constm1_rtx
&& !unsignedp
)
9079 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9080 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9081 cmpop1
= const0_rtx
;
9082 if (code
== MIN_EXPR
)
9083 comparison_code
= LT
;
9086 /* Use a conditional move if possible. */
9087 if (can_conditionally_move_p (mode
))
9093 /* Try to emit the conditional move. */
9094 insn
= emit_conditional_move (target
, comparison_code
,
9099 /* If we could do the conditional move, emit the sequence,
9103 rtx_insn
*seq
= get_insns ();
9109 /* Otherwise discard the sequence and fall back to code with
9115 emit_move_insn (target
, op0
);
9117 lab
= gen_label_rtx ();
9118 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9119 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9120 profile_probability::uninitialized ());
9122 emit_move_insn (target
, op1
);
9127 op0
= expand_expr (treeop0
, subtarget
,
9128 VOIDmode
, EXPAND_NORMAL
);
9129 if (modifier
== EXPAND_STACK_PARM
)
9131 /* In case we have to reduce the result to bitfield precision
9132 for unsigned bitfield expand this as XOR with a proper constant
9134 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9136 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9137 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9138 false, GET_MODE_PRECISION (int_mode
));
9140 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9141 immed_wide_int_const (mask
, int_mode
),
9142 target
, 1, OPTAB_LIB_WIDEN
);
9145 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9149 /* ??? Can optimize bitwise operations with one arg constant.
9150 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9151 and (a bitwise1 b) bitwise2 b (etc)
9152 but that is probably not worth while. */
9161 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9162 || type_has_mode_precision_p (type
));
9168 /* If this is a fixed-point operation, then we cannot use the code
9169 below because "expand_shift" doesn't support sat/no-sat fixed-point
9171 if (ALL_FIXED_POINT_MODE_P (mode
))
9174 if (! safe_from_p (subtarget
, treeop1
, 1))
9176 if (modifier
== EXPAND_STACK_PARM
)
9178 op0
= expand_expr (treeop0
, subtarget
,
9179 VOIDmode
, EXPAND_NORMAL
);
9181 /* Left shift optimization when shifting across word_size boundary.
9183 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9184 there isn't native instruction to support this wide mode
9185 left shift. Given below scenario:
9187 Type A = (Type) B << C
9190 | dest_high | dest_low |
9194 If the shift amount C caused we shift B to across the word
9195 size boundary, i.e part of B shifted into high half of
9196 destination register, and part of B remains in the low
9197 half, then GCC will use the following left shift expand
9200 1. Initialize dest_low to B.
9201 2. Initialize every bit of dest_high to the sign bit of B.
9202 3. Logic left shift dest_low by C bit to finalize dest_low.
9203 The value of dest_low before this shift is kept in a temp D.
9204 4. Logic left shift dest_high by C.
9205 5. Logic right shift D by (word_size - C).
9206 6. Or the result of 4 and 5 to finalize dest_high.
9208 While, by checking gimple statements, if operand B is
9209 coming from signed extension, then we can simplify above
9212 1. dest_high = src_low >> (word_size - C).
9213 2. dest_low = src_low << C.
9215 We can use one arithmetic right shift to finish all the
9216 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9217 needed from 6 into 2.
9219 The case is similar for zero extension, except that we
9220 initialize dest_high to zero rather than copies of the sign
9221 bit from B. Furthermore, we need to use a logical right shift
9224 The choice of sign-extension versus zero-extension is
9225 determined entirely by whether or not B is signed and is
9226 independent of the current setting of unsignedp. */
9229 if (code
== LSHIFT_EXPR
9232 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9234 && TREE_CONSTANT (treeop1
)
9235 && TREE_CODE (treeop0
) == SSA_NAME
)
9237 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9238 if (is_gimple_assign (def
)
9239 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9241 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9242 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9244 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9245 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9246 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9247 >= GET_MODE_BITSIZE (word_mode
)))
9249 rtx_insn
*seq
, *seq_old
;
9250 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9252 bool extend_unsigned
9253 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9254 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9255 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9256 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9257 int_mode
, high_off
);
9258 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9259 - TREE_INT_CST_LOW (treeop1
));
9260 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9263 /* dest_high = src_low >> (word_size - C). */
9264 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9267 if (temp
!= dest_high
)
9268 emit_move_insn (dest_high
, temp
);
9270 /* dest_low = src_low << C. */
9271 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9272 treeop1
, dest_low
, unsignedp
);
9273 if (temp
!= dest_low
)
9274 emit_move_insn (dest_low
, temp
);
9280 if (have_insn_for (ASHIFT
, int_mode
))
9282 bool speed_p
= optimize_insn_for_speed_p ();
9284 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9289 seq_old
= get_insns ();
9291 if (seq_cost (seq
, speed_p
)
9292 >= seq_cost (seq_old
, speed_p
))
9303 if (temp
== NULL_RTX
)
9304 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9306 if (code
== LSHIFT_EXPR
)
9307 temp
= REDUCE_BIT_FIELD (temp
);
9311 /* Could determine the answer when only additive constants differ. Also,
9312 the addition of one can be handled by changing the condition. */
9319 case UNORDERED_EXPR
:
9328 temp
= do_store_flag (ops
,
9329 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9330 tmode
!= VOIDmode
? tmode
: mode
);
9334 /* Use a compare and a jump for BLKmode comparisons, or for function
9335 type comparisons is have_canonicalize_funcptr_for_compare. */
9338 || modifier
== EXPAND_STACK_PARM
9339 || ! safe_from_p (target
, treeop0
, 1)
9340 || ! safe_from_p (target
, treeop1
, 1)
9341 /* Make sure we don't have a hard reg (such as function's return
9342 value) live across basic blocks, if not optimizing. */
9343 || (!optimize
&& REG_P (target
)
9344 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9345 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9347 emit_move_insn (target
, const0_rtx
);
9349 rtx_code_label
*lab1
= gen_label_rtx ();
9350 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9351 profile_probability::uninitialized ());
9353 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9354 emit_move_insn (target
, constm1_rtx
);
9356 emit_move_insn (target
, const1_rtx
);
9362 /* Get the rtx code of the operands. */
9363 op0
= expand_normal (treeop0
);
9364 op1
= expand_normal (treeop1
);
9367 target
= gen_reg_rtx (TYPE_MODE (type
));
9369 /* If target overlaps with op1, then either we need to force
9370 op1 into a pseudo (if target also overlaps with op0),
9371 or write the complex parts in reverse order. */
9372 switch (GET_CODE (target
))
9375 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9377 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9379 complex_expr_force_op1
:
9380 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9381 emit_move_insn (temp
, op1
);
9385 complex_expr_swap_order
:
9386 /* Move the imaginary (op1) and real (op0) parts to their
9388 write_complex_part (target
, op1
, true);
9389 write_complex_part (target
, op0
, false);
9395 temp
= adjust_address_nv (target
,
9396 GET_MODE_INNER (GET_MODE (target
)), 0);
9397 if (reg_overlap_mentioned_p (temp
, op1
))
9399 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9400 temp
= adjust_address_nv (target
, imode
,
9401 GET_MODE_SIZE (imode
));
9402 if (reg_overlap_mentioned_p (temp
, op0
))
9403 goto complex_expr_force_op1
;
9404 goto complex_expr_swap_order
;
9408 if (reg_overlap_mentioned_p (target
, op1
))
9410 if (reg_overlap_mentioned_p (target
, op0
))
9411 goto complex_expr_force_op1
;
9412 goto complex_expr_swap_order
;
9417 /* Move the real (op0) and imaginary (op1) parts to their location. */
9418 write_complex_part (target
, op0
, false);
9419 write_complex_part (target
, op1
, true);
9423 case WIDEN_SUM_EXPR
:
9425 tree oprnd0
= treeop0
;
9426 tree oprnd1
= treeop1
;
9428 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9429 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9434 case VEC_UNPACK_HI_EXPR
:
9435 case VEC_UNPACK_LO_EXPR
:
9436 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9437 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9439 op0
= expand_normal (treeop0
);
9440 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9446 case VEC_UNPACK_FLOAT_HI_EXPR
:
9447 case VEC_UNPACK_FLOAT_LO_EXPR
:
9449 op0
= expand_normal (treeop0
);
9450 /* The signedness is determined from input operand. */
9451 temp
= expand_widen_pattern_expr
9452 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9453 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9459 case VEC_WIDEN_MULT_HI_EXPR
:
9460 case VEC_WIDEN_MULT_LO_EXPR
:
9461 case VEC_WIDEN_MULT_EVEN_EXPR
:
9462 case VEC_WIDEN_MULT_ODD_EXPR
:
9463 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9464 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9465 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9466 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9468 gcc_assert (target
);
9471 case VEC_PACK_TRUNC_EXPR
:
9472 case VEC_PACK_SAT_EXPR
:
9473 case VEC_PACK_FIX_TRUNC_EXPR
:
9474 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9477 case VEC_PACK_FLOAT_EXPR
:
9478 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9479 expand_operands (treeop0
, treeop1
,
9480 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9481 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9483 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9484 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9486 gcc_assert (target
);
9491 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9492 vec_perm_builder sel
;
9493 if (TREE_CODE (treeop2
) == VECTOR_CST
9494 && tree_to_vec_perm_builder (&sel
, treeop2
))
9496 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9497 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9502 op2
= expand_normal (treeop2
);
9503 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9511 tree oprnd0
= treeop0
;
9512 tree oprnd1
= treeop1
;
9513 tree oprnd2
= treeop2
;
9516 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9517 op2
= expand_normal (oprnd2
);
9518 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9525 tree oprnd0
= treeop0
;
9526 tree oprnd1
= treeop1
;
9527 tree oprnd2
= treeop2
;
9530 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9531 op2
= expand_normal (oprnd2
);
9532 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9537 case REALIGN_LOAD_EXPR
:
9539 tree oprnd0
= treeop0
;
9540 tree oprnd1
= treeop1
;
9541 tree oprnd2
= treeop2
;
9544 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9545 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9546 op2
= expand_normal (oprnd2
);
9547 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9555 /* A COND_EXPR with its type being VOID_TYPE represents a
9556 conditional jump and is handled in
9557 expand_gimple_cond_expr. */
9558 gcc_assert (!VOID_TYPE_P (type
));
9560 /* Note that COND_EXPRs whose type is a structure or union
9561 are required to be constructed to contain assignments of
9562 a temporary variable, so that we can evaluate them here
9563 for side effect only. If type is void, we must do likewise. */
9565 gcc_assert (!TREE_ADDRESSABLE (type
)
9567 && TREE_TYPE (treeop1
) != void_type_node
9568 && TREE_TYPE (treeop2
) != void_type_node
);
9570 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9574 /* If we are not to produce a result, we have no target. Otherwise,
9575 if a target was specified use it; it will not be used as an
9576 intermediate target unless it is safe. If no target, use a
9579 if (modifier
!= EXPAND_STACK_PARM
9581 && safe_from_p (original_target
, treeop0
, 1)
9582 && GET_MODE (original_target
) == mode
9583 && !MEM_P (original_target
))
9584 temp
= original_target
;
9586 temp
= assign_temp (type
, 0, 1);
9588 do_pending_stack_adjust ();
9590 rtx_code_label
*lab0
= gen_label_rtx ();
9591 rtx_code_label
*lab1
= gen_label_rtx ();
9592 jumpifnot (treeop0
, lab0
,
9593 profile_probability::uninitialized ());
9594 store_expr (treeop1
, temp
,
9595 modifier
== EXPAND_STACK_PARM
,
9598 emit_jump_insn (targetm
.gen_jump (lab1
));
9601 store_expr (treeop2
, temp
,
9602 modifier
== EXPAND_STACK_PARM
,
9611 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9614 case VEC_DUPLICATE_EXPR
:
9615 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9616 target
= expand_vector_broadcast (mode
, op0
);
9617 gcc_assert (target
);
9620 case VEC_SERIES_EXPR
:
9621 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9622 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9624 case BIT_INSERT_EXPR
:
9626 unsigned bitpos
= tree_to_uhwi (treeop2
);
9628 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9629 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9631 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9632 rtx op0
= expand_normal (treeop0
);
9633 rtx op1
= expand_normal (treeop1
);
9634 rtx dst
= gen_reg_rtx (mode
);
9635 emit_move_insn (dst
, op0
);
9636 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9637 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9645 /* Here to do an ordinary binary operator. */
9647 expand_operands (treeop0
, treeop1
,
9648 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9650 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9652 if (modifier
== EXPAND_STACK_PARM
)
9654 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9655 unsignedp
, OPTAB_LIB_WIDEN
);
9657 /* Bitwise operations do not need bitfield reduction as we expect their
9658 operands being properly truncated. */
9659 if (code
== BIT_XOR_EXPR
9660 || code
== BIT_AND_EXPR
9661 || code
== BIT_IOR_EXPR
)
9663 return REDUCE_BIT_FIELD (temp
);
9665 #undef REDUCE_BIT_FIELD
9668 /* Return TRUE if expression STMT is suitable for replacement.
9669 Never consider memory loads as replaceable, because those don't ever lead
9670 into constant expressions. */
9673 stmt_is_replaceable_p (gimple
*stmt
)
9675 if (ssa_is_replaceable_p (stmt
))
9677 /* Don't move around loads. */
9678 if (!gimple_assign_single_p (stmt
)
9679 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9686 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9687 enum expand_modifier modifier
, rtx
*alt_rtl
,
9688 bool inner_reference_p
)
9690 rtx op0
, op1
, temp
, decl_rtl
;
9693 machine_mode mode
, dmode
;
9694 enum tree_code code
= TREE_CODE (exp
);
9695 rtx subtarget
, original_target
;
9698 bool reduce_bit_field
;
9699 location_t loc
= EXPR_LOCATION (exp
);
9700 struct separate_ops ops
;
9701 tree treeop0
, treeop1
, treeop2
;
9702 tree ssa_name
= NULL_TREE
;
9705 type
= TREE_TYPE (exp
);
9706 mode
= TYPE_MODE (type
);
9707 unsignedp
= TYPE_UNSIGNED (type
);
9709 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9710 if (!VL_EXP_CLASS_P (exp
))
9711 switch (TREE_CODE_LENGTH (code
))
9714 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9715 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9716 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9726 ignore
= (target
== const0_rtx
9727 || ((CONVERT_EXPR_CODE_P (code
)
9728 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9729 && TREE_CODE (type
) == VOID_TYPE
));
9731 /* An operation in what may be a bit-field type needs the
9732 result to be reduced to the precision of the bit-field type,
9733 which is narrower than that of the type's mode. */
9734 reduce_bit_field
= (!ignore
9735 && INTEGRAL_TYPE_P (type
)
9736 && !type_has_mode_precision_p (type
));
9738 /* If we are going to ignore this result, we need only do something
9739 if there is a side-effect somewhere in the expression. If there
9740 is, short-circuit the most common cases here. Note that we must
9741 not call expand_expr with anything but const0_rtx in case this
9742 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9746 if (! TREE_SIDE_EFFECTS (exp
))
9749 /* Ensure we reference a volatile object even if value is ignored, but
9750 don't do this if all we are doing is taking its address. */
9751 if (TREE_THIS_VOLATILE (exp
)
9752 && TREE_CODE (exp
) != FUNCTION_DECL
9753 && mode
!= VOIDmode
&& mode
!= BLKmode
9754 && modifier
!= EXPAND_CONST_ADDRESS
)
9756 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9762 if (TREE_CODE_CLASS (code
) == tcc_unary
9763 || code
== BIT_FIELD_REF
9764 || code
== COMPONENT_REF
9765 || code
== INDIRECT_REF
)
9766 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9769 else if (TREE_CODE_CLASS (code
) == tcc_binary
9770 || TREE_CODE_CLASS (code
) == tcc_comparison
9771 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9773 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9774 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9781 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9784 /* Use subtarget as the target for operand 0 of a binary operation. */
9785 subtarget
= get_subtarget (target
);
9786 original_target
= target
;
9792 tree function
= decl_function_context (exp
);
9794 temp
= label_rtx (exp
);
9795 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9797 if (function
!= current_function_decl
9799 LABEL_REF_NONLOCAL_P (temp
) = 1;
9801 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9806 /* ??? ivopts calls expander, without any preparation from
9807 out-of-ssa. So fake instructions as if this was an access to the
9808 base variable. This unnecessarily allocates a pseudo, see how we can
9809 reuse it, if partition base vars have it set already. */
9810 if (!currently_expanding_to_rtl
)
9812 tree var
= SSA_NAME_VAR (exp
);
9813 if (var
&& DECL_RTL_SET_P (var
))
9814 return DECL_RTL (var
);
9815 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9816 LAST_VIRTUAL_REGISTER
+ 1);
9819 g
= get_gimple_for_ssa_name (exp
);
9820 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9822 && modifier
== EXPAND_INITIALIZER
9823 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9824 && (optimize
|| !SSA_NAME_VAR (exp
)
9825 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9826 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9827 g
= SSA_NAME_DEF_STMT (exp
);
9831 location_t saved_loc
= curr_insn_location ();
9832 location_t loc
= gimple_location (g
);
9833 if (loc
!= UNKNOWN_LOCATION
)
9834 set_curr_insn_location (loc
);
9835 ops
.code
= gimple_assign_rhs_code (g
);
9836 switch (get_gimple_rhs_class (ops
.code
))
9838 case GIMPLE_TERNARY_RHS
:
9839 ops
.op2
= gimple_assign_rhs3 (g
);
9841 case GIMPLE_BINARY_RHS
:
9842 ops
.op1
= gimple_assign_rhs2 (g
);
9844 /* Try to expand conditonal compare. */
9845 if (targetm
.gen_ccmp_first
)
9847 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9848 r
= expand_ccmp_expr (g
, mode
);
9853 case GIMPLE_UNARY_RHS
:
9854 ops
.op0
= gimple_assign_rhs1 (g
);
9855 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9857 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9859 case GIMPLE_SINGLE_RHS
:
9861 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9862 tmode
, modifier
, alt_rtl
,
9869 set_curr_insn_location (saved_loc
);
9870 if (REG_P (r
) && !REG_EXPR (r
))
9871 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9876 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9877 exp
= SSA_NAME_VAR (ssa_name
);
9878 goto expand_decl_rtl
;
9882 /* If a static var's type was incomplete when the decl was written,
9883 but the type is complete now, lay out the decl now. */
9884 if (DECL_SIZE (exp
) == 0
9885 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9886 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9887 layout_decl (exp
, 0);
9893 decl_rtl
= DECL_RTL (exp
);
9895 gcc_assert (decl_rtl
);
9897 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9898 settings for VECTOR_TYPE_P that might switch for the function. */
9899 if (currently_expanding_to_rtl
9900 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9901 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9902 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9904 decl_rtl
= copy_rtx (decl_rtl
);
9906 /* Record writes to register variables. */
9907 if (modifier
== EXPAND_WRITE
9909 && HARD_REGISTER_P (decl_rtl
))
9910 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9911 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9913 /* Ensure variable marked as used even if it doesn't go through
9914 a parser. If it hasn't be used yet, write out an external
9917 TREE_USED (exp
) = 1;
9919 /* Show we haven't gotten RTL for this yet. */
9922 /* Variables inherited from containing functions should have
9923 been lowered by this point. */
9925 context
= decl_function_context (exp
);
9927 || SCOPE_FILE_SCOPE_P (context
)
9928 || context
== current_function_decl
9929 || TREE_STATIC (exp
)
9930 || DECL_EXTERNAL (exp
)
9931 /* ??? C++ creates functions that are not TREE_STATIC. */
9932 || TREE_CODE (exp
) == FUNCTION_DECL
);
9934 /* This is the case of an array whose size is to be determined
9935 from its initializer, while the initializer is still being parsed.
9936 ??? We aren't parsing while expanding anymore. */
9938 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9939 temp
= validize_mem (decl_rtl
);
9941 /* If DECL_RTL is memory, we are in the normal case and the
9942 address is not valid, get the address into a register. */
9944 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9947 *alt_rtl
= decl_rtl
;
9948 decl_rtl
= use_anchored_address (decl_rtl
);
9949 if (modifier
!= EXPAND_CONST_ADDRESS
9950 && modifier
!= EXPAND_SUM
9951 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9952 : GET_MODE (decl_rtl
),
9954 MEM_ADDR_SPACE (decl_rtl
)))
9955 temp
= replace_equiv_address (decl_rtl
,
9956 copy_rtx (XEXP (decl_rtl
, 0)));
9959 /* If we got something, return it. But first, set the alignment
9960 if the address is a register. */
9963 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9964 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9970 dmode
= DECL_MODE (exp
);
9972 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9974 /* If the mode of DECL_RTL does not match that of the decl,
9975 there are two cases: we are dealing with a BLKmode value
9976 that is returned in a register, or we are dealing with
9977 a promoted value. In the latter case, return a SUBREG
9978 of the wanted mode, but mark it so that we know that it
9979 was already extended. */
9980 if (REG_P (decl_rtl
)
9982 && GET_MODE (decl_rtl
) != dmode
)
9986 /* Get the signedness to be used for this variable. Ensure we get
9987 the same mode we got when the variable was declared. */
9988 if (code
!= SSA_NAME
)
9989 pmode
= promote_decl_mode (exp
, &unsignedp
);
9990 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9991 && gimple_code (g
) == GIMPLE_CALL
9992 && !gimple_call_internal_p (g
))
9993 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9994 gimple_call_fntype (g
),
9997 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9998 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10000 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10001 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10002 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10010 /* Given that TYPE_PRECISION (type) is not always equal to
10011 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10012 the former to the latter according to the signedness of the
10014 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10015 temp
= immed_wide_int_const
10016 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10022 tree tmp
= NULL_TREE
;
10023 if (VECTOR_MODE_P (mode
))
10024 return const_vector_from_tree (exp
);
10025 scalar_int_mode int_mode
;
10026 if (is_int_mode (mode
, &int_mode
))
10028 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10029 return const_scalar_mask_from_tree (int_mode
, exp
);
10033 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10035 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10036 type_for_mode
, exp
);
10041 vec
<constructor_elt
, va_gc
> *v
;
10042 /* Constructors need to be fixed-length. FIXME. */
10043 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10044 vec_alloc (v
, nunits
);
10045 for (unsigned int i
= 0; i
< nunits
; ++i
)
10046 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10047 tmp
= build_constructor (type
, v
);
10049 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10054 if (modifier
== EXPAND_WRITE
)
10056 /* Writing into CONST_DECL is always invalid, but handle it
10058 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10059 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10060 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10061 EXPAND_NORMAL
, as
);
10062 op0
= memory_address_addr_space (mode
, op0
, as
);
10063 temp
= gen_rtx_MEM (mode
, op0
);
10064 set_mem_addr_space (temp
, as
);
10067 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10070 /* If optimized, generate immediate CONST_DOUBLE
10071 which will be turned into memory by reload if necessary.
10073 We used to force a register so that loop.c could see it. But
10074 this does not allow gen_* patterns to perform optimizations with
10075 the constants. It also produces two insns in cases like "x = 1.0;".
10076 On most machines, floating-point constants are not permitted in
10077 many insns, so we'd end up copying it to a register in any case.
10079 Now, we do the copying in expand_binop, if appropriate. */
10080 return const_double_from_real_value (TREE_REAL_CST (exp
),
10081 TYPE_MODE (TREE_TYPE (exp
)));
10084 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10085 TYPE_MODE (TREE_TYPE (exp
)));
10088 /* Handle evaluating a complex constant in a CONCAT target. */
10089 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10091 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10094 rtarg
= XEXP (original_target
, 0);
10095 itarg
= XEXP (original_target
, 1);
10097 /* Move the real and imaginary parts separately. */
10098 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10099 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10102 emit_move_insn (rtarg
, op0
);
10104 emit_move_insn (itarg
, op1
);
10106 return original_target
;
10112 temp
= expand_expr_constant (exp
, 1, modifier
);
10114 /* temp contains a constant address.
10115 On RISC machines where a constant address isn't valid,
10116 make some insns to get that address into a register. */
10117 if (modifier
!= EXPAND_CONST_ADDRESS
10118 && modifier
!= EXPAND_INITIALIZER
10119 && modifier
!= EXPAND_SUM
10120 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10121 MEM_ADDR_SPACE (temp
)))
10122 return replace_equiv_address (temp
,
10123 copy_rtx (XEXP (temp
, 0)));
10127 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10131 tree val
= treeop0
;
10132 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10133 inner_reference_p
);
10135 if (!SAVE_EXPR_RESOLVED_P (exp
))
10137 /* We can indeed still hit this case, typically via builtin
10138 expanders calling save_expr immediately before expanding
10139 something. Assume this means that we only have to deal
10140 with non-BLKmode values. */
10141 gcc_assert (GET_MODE (ret
) != BLKmode
);
10143 val
= build_decl (curr_insn_location (),
10144 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10145 DECL_ARTIFICIAL (val
) = 1;
10146 DECL_IGNORED_P (val
) = 1;
10148 TREE_OPERAND (exp
, 0) = treeop0
;
10149 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10151 if (!CONSTANT_P (ret
))
10152 ret
= copy_to_reg (ret
);
10153 SET_DECL_RTL (val
, ret
);
10161 /* If we don't need the result, just ensure we evaluate any
10165 unsigned HOST_WIDE_INT idx
;
10168 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10169 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10174 return expand_constructor (exp
, target
, modifier
, false);
10176 case TARGET_MEM_REF
:
10179 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10180 enum insn_code icode
;
10181 unsigned int align
;
10183 op0
= addr_for_mem_ref (exp
, as
, true);
10184 op0
= memory_address_addr_space (mode
, op0
, as
);
10185 temp
= gen_rtx_MEM (mode
, op0
);
10186 set_mem_attributes (temp
, exp
, 0);
10187 set_mem_addr_space (temp
, as
);
10188 align
= get_object_alignment (exp
);
10189 if (modifier
!= EXPAND_WRITE
10190 && modifier
!= EXPAND_MEMORY
10192 && align
< GET_MODE_ALIGNMENT (mode
)
10193 /* If the target does not have special handling for unaligned
10194 loads of mode then it can use regular moves for them. */
10195 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10196 != CODE_FOR_nothing
))
10198 struct expand_operand ops
[2];
10200 /* We've already validated the memory, and we're creating a
10201 new pseudo destination. The predicates really can't fail,
10202 nor can the generator. */
10203 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10204 create_fixed_operand (&ops
[1], temp
);
10205 expand_insn (icode
, 2, ops
);
10206 temp
= ops
[0].value
;
10213 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10215 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10216 machine_mode address_mode
;
10217 tree base
= TREE_OPERAND (exp
, 0);
10219 enum insn_code icode
;
10221 /* Handle expansion of non-aliased memory with non-BLKmode. That
10222 might end up in a register. */
10223 if (mem_ref_refers_to_non_mem_p (exp
))
10225 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10226 base
= TREE_OPERAND (base
, 0);
10227 poly_uint64 type_size
;
10228 if (known_eq (offset
, 0)
10230 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10231 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10232 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10233 target
, tmode
, modifier
);
10234 if (TYPE_MODE (type
) == BLKmode
)
10236 temp
= assign_stack_temp (DECL_MODE (base
),
10237 GET_MODE_SIZE (DECL_MODE (base
)));
10238 store_expr (base
, temp
, 0, false, false);
10239 temp
= adjust_address (temp
, BLKmode
, offset
);
10240 set_mem_size (temp
, int_size_in_bytes (type
));
10243 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10244 bitsize_int (offset
* BITS_PER_UNIT
));
10245 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10246 return expand_expr (exp
, target
, tmode
, modifier
);
10248 address_mode
= targetm
.addr_space
.address_mode (as
);
10249 base
= TREE_OPERAND (exp
, 0);
10250 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10252 tree mask
= gimple_assign_rhs2 (def_stmt
);
10253 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10254 gimple_assign_rhs1 (def_stmt
), mask
);
10255 TREE_OPERAND (exp
, 0) = base
;
10257 align
= get_object_alignment (exp
);
10258 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10259 op0
= memory_address_addr_space (mode
, op0
, as
);
10260 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10262 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10263 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10264 op0
= memory_address_addr_space (mode
, op0
, as
);
10266 temp
= gen_rtx_MEM (mode
, op0
);
10267 set_mem_attributes (temp
, exp
, 0);
10268 set_mem_addr_space (temp
, as
);
10269 if (TREE_THIS_VOLATILE (exp
))
10270 MEM_VOLATILE_P (temp
) = 1;
10271 if (modifier
!= EXPAND_WRITE
10272 && modifier
!= EXPAND_MEMORY
10273 && !inner_reference_p
10275 && align
< GET_MODE_ALIGNMENT (mode
))
10277 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10278 != CODE_FOR_nothing
)
10280 struct expand_operand ops
[2];
10282 /* We've already validated the memory, and we're creating a
10283 new pseudo destination. The predicates really can't fail,
10284 nor can the generator. */
10285 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10286 create_fixed_operand (&ops
[1], temp
);
10287 expand_insn (icode
, 2, ops
);
10288 temp
= ops
[0].value
;
10290 else if (targetm
.slow_unaligned_access (mode
, align
))
10291 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10292 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10293 (modifier
== EXPAND_STACK_PARM
10294 ? NULL_RTX
: target
),
10295 mode
, mode
, false, alt_rtl
);
10298 && modifier
!= EXPAND_MEMORY
10299 && modifier
!= EXPAND_WRITE
)
10300 temp
= flip_storage_order (mode
, temp
);
10307 tree array
= treeop0
;
10308 tree index
= treeop1
;
10311 /* Fold an expression like: "foo"[2].
10312 This is not done in fold so it won't happen inside &.
10313 Don't fold if this is for wide characters since it's too
10314 difficult to do correctly and this is a very rare case. */
10316 if (modifier
!= EXPAND_CONST_ADDRESS
10317 && modifier
!= EXPAND_INITIALIZER
10318 && modifier
!= EXPAND_MEMORY
)
10320 tree t
= fold_read_from_constant_string (exp
);
10323 return expand_expr (t
, target
, tmode
, modifier
);
10326 /* If this is a constant index into a constant array,
10327 just get the value from the array. Handle both the cases when
10328 we have an explicit constructor and when our operand is a variable
10329 that was declared const. */
10331 if (modifier
!= EXPAND_CONST_ADDRESS
10332 && modifier
!= EXPAND_INITIALIZER
10333 && modifier
!= EXPAND_MEMORY
10334 && TREE_CODE (array
) == CONSTRUCTOR
10335 && ! TREE_SIDE_EFFECTS (array
)
10336 && TREE_CODE (index
) == INTEGER_CST
)
10338 unsigned HOST_WIDE_INT ix
;
10341 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10343 if (tree_int_cst_equal (field
, index
))
10345 if (!TREE_SIDE_EFFECTS (value
))
10346 return expand_expr (fold (value
), target
, tmode
, modifier
);
10351 else if (optimize
>= 1
10352 && modifier
!= EXPAND_CONST_ADDRESS
10353 && modifier
!= EXPAND_INITIALIZER
10354 && modifier
!= EXPAND_MEMORY
10355 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10356 && TREE_CODE (index
) == INTEGER_CST
10357 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10358 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10360 if (init
== NULL_TREE
)
10362 tree value
= build_zero_cst (type
);
10363 if (TREE_CODE (value
) == CONSTRUCTOR
)
10365 /* If VALUE is a CONSTRUCTOR, this optimization is only
10366 useful if this doesn't store the CONSTRUCTOR into
10367 memory. If it does, it is more efficient to just
10368 load the data from the array directly. */
10369 rtx ret
= expand_constructor (value
, target
,
10371 if (ret
== NULL_RTX
)
10376 return expand_expr (value
, target
, tmode
, modifier
);
10378 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10380 unsigned HOST_WIDE_INT ix
;
10383 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10385 if (tree_int_cst_equal (field
, index
))
10387 if (TREE_SIDE_EFFECTS (value
))
10390 if (TREE_CODE (value
) == CONSTRUCTOR
)
10392 /* If VALUE is a CONSTRUCTOR, this
10393 optimization is only useful if
10394 this doesn't store the CONSTRUCTOR
10395 into memory. If it does, it is more
10396 efficient to just load the data from
10397 the array directly. */
10398 rtx ret
= expand_constructor (value
, target
,
10400 if (ret
== NULL_RTX
)
10405 expand_expr (fold (value
), target
, tmode
, modifier
);
10408 else if (TREE_CODE (init
) == STRING_CST
)
10410 tree low_bound
= array_ref_low_bound (exp
);
10411 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10413 /* Optimize the special case of a zero lower bound.
10415 We convert the lower bound to sizetype to avoid problems
10416 with constant folding. E.g. suppose the lower bound is
10417 1 and its mode is QI. Without the conversion
10418 (ARRAY + (INDEX - (unsigned char)1))
10420 (ARRAY + (-(unsigned char)1) + INDEX)
10422 (ARRAY + 255 + INDEX). Oops! */
10423 if (!integer_zerop (low_bound
))
10424 index1
= size_diffop_loc (loc
, index1
,
10425 fold_convert_loc (loc
, sizetype
,
10428 if (tree_fits_uhwi_p (index1
)
10429 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10431 tree type
= TREE_TYPE (TREE_TYPE (init
));
10432 scalar_int_mode mode
;
10434 if (is_int_mode (TYPE_MODE (type
), &mode
)
10435 && GET_MODE_SIZE (mode
) == 1)
10436 return gen_int_mode (TREE_STRING_POINTER (init
)
10437 [TREE_INT_CST_LOW (index1
)],
10443 goto normal_inner_ref
;
10445 case COMPONENT_REF
:
10446 /* If the operand is a CONSTRUCTOR, we can just extract the
10447 appropriate field if it is present. */
10448 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10450 unsigned HOST_WIDE_INT idx
;
10452 scalar_int_mode field_mode
;
10454 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10456 if (field
== treeop1
10457 /* We can normally use the value of the field in the
10458 CONSTRUCTOR. However, if this is a bitfield in
10459 an integral mode that we can fit in a HOST_WIDE_INT,
10460 we must mask only the number of bits in the bitfield,
10461 since this is done implicitly by the constructor. If
10462 the bitfield does not meet either of those conditions,
10463 we can't do this optimization. */
10464 && (! DECL_BIT_FIELD (field
)
10465 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10466 && (GET_MODE_PRECISION (field_mode
)
10467 <= HOST_BITS_PER_WIDE_INT
))))
10469 if (DECL_BIT_FIELD (field
)
10470 && modifier
== EXPAND_STACK_PARM
)
10472 op0
= expand_expr (value
, target
, tmode
, modifier
);
10473 if (DECL_BIT_FIELD (field
))
10475 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10476 scalar_int_mode imode
10477 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10479 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10481 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10483 op0
= expand_and (imode
, op0
, op1
, target
);
10487 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10489 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10491 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10499 goto normal_inner_ref
;
10501 case BIT_FIELD_REF
:
10502 case ARRAY_RANGE_REF
:
10505 machine_mode mode1
, mode2
;
10506 poly_int64 bitsize
, bitpos
, bytepos
;
10508 int reversep
, volatilep
= 0, must_force_mem
;
10510 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10511 &unsignedp
, &reversep
, &volatilep
);
10512 rtx orig_op0
, memloc
;
10513 bool clear_mem_expr
= false;
10515 /* If we got back the original object, something is wrong. Perhaps
10516 we are evaluating an expression too early. In any event, don't
10517 infinitely recurse. */
10518 gcc_assert (tem
!= exp
);
10520 /* If TEM's type is a union of variable size, pass TARGET to the inner
10521 computation, since it will need a temporary and TARGET is known
10522 to have to do. This occurs in unchecked conversion in Ada. */
10524 = expand_expr_real (tem
,
10525 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10526 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10527 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10529 && modifier
!= EXPAND_STACK_PARM
10530 ? target
: NULL_RTX
),
10532 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10535 /* If the field has a mode, we want to access it in the
10536 field's mode, not the computed mode.
10537 If a MEM has VOIDmode (external with incomplete type),
10538 use BLKmode for it instead. */
10541 if (mode1
!= VOIDmode
)
10542 op0
= adjust_address (op0
, mode1
, 0);
10543 else if (GET_MODE (op0
) == VOIDmode
)
10544 op0
= adjust_address (op0
, BLKmode
, 0);
10548 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10550 /* Make sure bitpos is not negative, it can wreak havoc later. */
10551 if (maybe_lt (bitpos
, 0))
10553 gcc_checking_assert (offset
== NULL_TREE
);
10554 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10555 bitpos
= num_trailing_bits (bitpos
);
10558 /* If we have either an offset, a BLKmode result, or a reference
10559 outside the underlying object, we must force it to memory.
10560 Such a case can occur in Ada if we have unchecked conversion
10561 of an expression from a scalar type to an aggregate type or
10562 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10563 passed a partially uninitialized object or a view-conversion
10564 to a larger size. */
10565 must_force_mem
= (offset
10566 || mode1
== BLKmode
10567 || (mode
== BLKmode
10568 && !int_mode_for_size (bitsize
, 1).exists ())
10569 || maybe_gt (bitpos
+ bitsize
,
10570 GET_MODE_BITSIZE (mode2
)));
10572 /* Handle CONCAT first. */
10573 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10575 if (known_eq (bitpos
, 0)
10576 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10577 && COMPLEX_MODE_P (mode1
)
10578 && COMPLEX_MODE_P (GET_MODE (op0
))
10579 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10580 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10583 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10584 if (mode1
!= GET_MODE (op0
))
10587 for (int i
= 0; i
< 2; i
++)
10589 rtx op
= read_complex_part (op0
, i
!= 0);
10590 if (GET_CODE (op
) == SUBREG
)
10591 op
= force_reg (GET_MODE (op
), op
);
10592 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10598 if (!REG_P (op
) && !MEM_P (op
))
10599 op
= force_reg (GET_MODE (op
), op
);
10600 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10604 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10608 if (known_eq (bitpos
, 0)
10609 && known_eq (bitsize
,
10610 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10611 && maybe_ne (bitsize
, 0))
10613 op0
= XEXP (op0
, 0);
10614 mode2
= GET_MODE (op0
);
10616 else if (known_eq (bitpos
,
10617 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10618 && known_eq (bitsize
,
10619 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10620 && maybe_ne (bitpos
, 0)
10621 && maybe_ne (bitsize
, 0))
10623 op0
= XEXP (op0
, 1);
10625 mode2
= GET_MODE (op0
);
10628 /* Otherwise force into memory. */
10629 must_force_mem
= 1;
10632 /* If this is a constant, put it in a register if it is a legitimate
10633 constant and we don't need a memory reference. */
10634 if (CONSTANT_P (op0
)
10635 && mode2
!= BLKmode
10636 && targetm
.legitimate_constant_p (mode2
, op0
)
10637 && !must_force_mem
)
10638 op0
= force_reg (mode2
, op0
);
10640 /* Otherwise, if this is a constant, try to force it to the constant
10641 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10642 is a legitimate constant. */
10643 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10644 op0
= validize_mem (memloc
);
10646 /* Otherwise, if this is a constant or the object is not in memory
10647 and need be, put it there. */
10648 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10650 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10651 emit_move_insn (memloc
, op0
);
10653 clear_mem_expr
= true;
10658 machine_mode address_mode
;
10659 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10662 gcc_assert (MEM_P (op0
));
10664 address_mode
= get_address_mode (op0
);
10665 if (GET_MODE (offset_rtx
) != address_mode
)
10667 /* We cannot be sure that the RTL in offset_rtx is valid outside
10668 of a memory address context, so force it into a register
10669 before attempting to convert it to the desired mode. */
10670 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10671 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10674 /* See the comment in expand_assignment for the rationale. */
10675 if (mode1
!= VOIDmode
10676 && maybe_ne (bitpos
, 0)
10677 && maybe_gt (bitsize
, 0)
10678 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10679 && multiple_p (bitpos
, bitsize
)
10680 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10681 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10683 op0
= adjust_address (op0
, mode1
, bytepos
);
10687 op0
= offset_address (op0
, offset_rtx
,
10688 highest_pow2_factor (offset
));
10691 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10692 record its alignment as BIGGEST_ALIGNMENT. */
10694 && known_eq (bitpos
, 0)
10696 && is_aligning_offset (offset
, tem
))
10697 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10699 /* Don't forget about volatility even if this is a bitfield. */
10700 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10702 if (op0
== orig_op0
)
10703 op0
= copy_rtx (op0
);
10705 MEM_VOLATILE_P (op0
) = 1;
10708 /* In cases where an aligned union has an unaligned object
10709 as a field, we might be extracting a BLKmode value from
10710 an integer-mode (e.g., SImode) object. Handle this case
10711 by doing the extract into an object as wide as the field
10712 (which we know to be the width of a basic mode), then
10713 storing into memory, and changing the mode to BLKmode. */
10714 if (mode1
== VOIDmode
10715 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10716 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10717 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10718 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10719 && modifier
!= EXPAND_CONST_ADDRESS
10720 && modifier
!= EXPAND_INITIALIZER
10721 && modifier
!= EXPAND_MEMORY
)
10722 /* If the bitfield is volatile and the bitsize
10723 is narrower than the access size of the bitfield,
10724 we need to extract bitfields from the access. */
10725 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10726 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10727 && mode1
!= BLKmode
10728 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10729 /* If the field isn't aligned enough to fetch as a memref,
10730 fetch it as a bit field. */
10731 || (mode1
!= BLKmode
10733 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10734 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10735 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10736 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10737 && modifier
!= EXPAND_MEMORY
10738 && ((modifier
== EXPAND_CONST_ADDRESS
10739 || modifier
== EXPAND_INITIALIZER
)
10741 : targetm
.slow_unaligned_access (mode1
,
10743 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10744 /* If the type and the field are a constant size and the
10745 size of the type isn't the same size as the bitfield,
10746 we must use bitfield operations. */
10747 || (known_size_p (bitsize
)
10748 && TYPE_SIZE (TREE_TYPE (exp
))
10749 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10750 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10753 machine_mode ext_mode
= mode
;
10755 if (ext_mode
== BLKmode
10756 && ! (target
!= 0 && MEM_P (op0
)
10758 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10759 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10761 if (ext_mode
== BLKmode
)
10764 target
= assign_temp (type
, 1, 1);
10766 /* ??? Unlike the similar test a few lines below, this one is
10767 very likely obsolete. */
10768 if (known_eq (bitsize
, 0))
10771 /* In this case, BITPOS must start at a byte boundary and
10772 TARGET, if specified, must be a MEM. */
10773 gcc_assert (MEM_P (op0
)
10774 && (!target
|| MEM_P (target
)));
10776 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10777 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10778 emit_block_move (target
,
10779 adjust_address (op0
, VOIDmode
, bytepos
),
10780 gen_int_mode (bytesize
, Pmode
),
10781 (modifier
== EXPAND_STACK_PARM
10782 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10787 /* If we have nothing to extract, the result will be 0 for targets
10788 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10789 return 0 for the sake of consistency, as reading a zero-sized
10790 bitfield is valid in Ada and the value is fully specified. */
10791 if (known_eq (bitsize
, 0))
10794 op0
= validize_mem (op0
);
10796 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10797 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10799 /* If the result has a record type and the extraction is done in
10800 an integral mode, then the field may be not aligned on a byte
10801 boundary; in this case, if it has reverse storage order, it
10802 needs to be extracted as a scalar field with reverse storage
10803 order and put back into memory order afterwards. */
10804 if (TREE_CODE (type
) == RECORD_TYPE
10805 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10806 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10808 gcc_checking_assert (known_ge (bitpos
, 0));
10809 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10810 (modifier
== EXPAND_STACK_PARM
10811 ? NULL_RTX
: target
),
10812 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10814 /* If the result has a record type and the mode of OP0 is an
10815 integral mode then, if BITSIZE is narrower than this mode
10816 and this is for big-endian data, we must put the field
10817 into the high-order bits. And we must also put it back
10818 into memory order if it has been previously reversed. */
10819 scalar_int_mode op0_mode
;
10820 if (TREE_CODE (type
) == RECORD_TYPE
10821 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10823 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10825 gcc_checking_assert (known_le (bitsize
, size
));
10826 if (maybe_lt (bitsize
, size
)
10827 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10828 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10829 size
- bitsize
, op0
, 1);
10832 op0
= flip_storage_order (op0_mode
, op0
);
10835 /* If the result type is BLKmode, store the data into a temporary
10836 of the appropriate type, but with the mode corresponding to the
10837 mode for the data we have (op0's mode). */
10838 if (mode
== BLKmode
)
10841 = assign_stack_temp_for_type (ext_mode
,
10842 GET_MODE_BITSIZE (ext_mode
),
10844 emit_move_insn (new_rtx
, op0
);
10845 op0
= copy_rtx (new_rtx
);
10846 PUT_MODE (op0
, BLKmode
);
10852 /* If the result is BLKmode, use that to access the object
10854 if (mode
== BLKmode
)
10857 /* Get a reference to just this component. */
10858 bytepos
= bits_to_bytes_round_down (bitpos
);
10859 if (modifier
== EXPAND_CONST_ADDRESS
10860 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10861 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10863 op0
= adjust_address (op0
, mode1
, bytepos
);
10865 if (op0
== orig_op0
)
10866 op0
= copy_rtx (op0
);
10868 /* Don't set memory attributes if the base expression is
10869 SSA_NAME that got expanded as a MEM. In that case, we should
10870 just honor its original memory attributes. */
10871 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10872 set_mem_attributes (op0
, exp
, 0);
10874 if (REG_P (XEXP (op0
, 0)))
10875 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10877 /* If op0 is a temporary because the original expressions was forced
10878 to memory, clear MEM_EXPR so that the original expression cannot
10879 be marked as addressable through MEM_EXPR of the temporary. */
10880 if (clear_mem_expr
)
10881 set_mem_expr (op0
, NULL_TREE
);
10883 MEM_VOLATILE_P (op0
) |= volatilep
;
10886 && modifier
!= EXPAND_MEMORY
10887 && modifier
!= EXPAND_WRITE
)
10888 op0
= flip_storage_order (mode1
, op0
);
10890 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10891 || modifier
== EXPAND_CONST_ADDRESS
10892 || modifier
== EXPAND_INITIALIZER
)
10896 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10898 convert_move (target
, op0
, unsignedp
);
10903 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10906 /* All valid uses of __builtin_va_arg_pack () are removed during
10908 if (CALL_EXPR_VA_ARG_PACK (exp
))
10909 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10911 tree fndecl
= get_callee_fndecl (exp
), attr
;
10914 /* Don't diagnose the error attribute in thunks, those are
10915 artificially created. */
10916 && !CALL_FROM_THUNK_P (exp
)
10917 && (attr
= lookup_attribute ("error",
10918 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10920 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10921 error ("%Kcall to %qs declared with attribute error: %s", exp
,
10922 identifier_to_locale (ident
),
10923 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10926 /* Don't diagnose the warning attribute in thunks, those are
10927 artificially created. */
10928 && !CALL_FROM_THUNK_P (exp
)
10929 && (attr
= lookup_attribute ("warning",
10930 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10932 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10933 warning_at (tree_nonartificial_location (exp
), 0,
10934 "%Kcall to %qs declared with attribute warning: %s",
10935 exp
, identifier_to_locale (ident
),
10936 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10939 /* Check for a built-in function. */
10940 if (fndecl
&& fndecl_built_in_p (fndecl
))
10942 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10943 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10946 return expand_call (exp
, target
, ignore
);
10948 case VIEW_CONVERT_EXPR
:
10951 /* If we are converting to BLKmode, try to avoid an intermediate
10952 temporary by fetching an inner memory reference. */
10953 if (mode
== BLKmode
10954 && poly_int_tree_p (TYPE_SIZE (type
))
10955 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10956 && handled_component_p (treeop0
))
10958 machine_mode mode1
;
10959 poly_int64 bitsize
, bitpos
, bytepos
;
10961 int unsignedp
, reversep
, volatilep
= 0;
10963 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10964 &unsignedp
, &reversep
, &volatilep
);
10967 /* ??? We should work harder and deal with non-zero offsets. */
10969 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10971 && known_size_p (bitsize
)
10972 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
10974 /* See the normal_inner_ref case for the rationale. */
10976 = expand_expr_real (tem
,
10977 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10978 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10980 && modifier
!= EXPAND_STACK_PARM
10981 ? target
: NULL_RTX
),
10983 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10986 if (MEM_P (orig_op0
))
10990 /* Get a reference to just this component. */
10991 if (modifier
== EXPAND_CONST_ADDRESS
10992 || modifier
== EXPAND_SUM
10993 || modifier
== EXPAND_INITIALIZER
)
10994 op0
= adjust_address_nv (op0
, mode
, bytepos
);
10996 op0
= adjust_address (op0
, mode
, bytepos
);
10998 if (op0
== orig_op0
)
10999 op0
= copy_rtx (op0
);
11001 set_mem_attributes (op0
, treeop0
, 0);
11002 if (REG_P (XEXP (op0
, 0)))
11003 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11005 MEM_VOLATILE_P (op0
) |= volatilep
;
11011 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11012 NULL
, inner_reference_p
);
11014 /* If the input and output modes are both the same, we are done. */
11015 if (mode
== GET_MODE (op0
))
11017 /* If neither mode is BLKmode, and both modes are the same size
11018 then we can use gen_lowpart. */
11019 else if (mode
!= BLKmode
11020 && GET_MODE (op0
) != BLKmode
11021 && known_eq (GET_MODE_PRECISION (mode
),
11022 GET_MODE_PRECISION (GET_MODE (op0
)))
11023 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11025 if (GET_CODE (op0
) == SUBREG
)
11026 op0
= force_reg (GET_MODE (op0
), op0
);
11027 temp
= gen_lowpart_common (mode
, op0
);
11032 if (!REG_P (op0
) && !MEM_P (op0
))
11033 op0
= force_reg (GET_MODE (op0
), op0
);
11034 op0
= gen_lowpart (mode
, op0
);
11037 /* If both types are integral, convert from one mode to the other. */
11038 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11039 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11040 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11041 /* If the output type is a bit-field type, do an extraction. */
11042 else if (reduce_bit_field
)
11043 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11044 TYPE_UNSIGNED (type
), NULL_RTX
,
11045 mode
, mode
, false, NULL
);
11046 /* As a last resort, spill op0 to memory, and reload it in a
11048 else if (!MEM_P (op0
))
11050 /* If the operand is not a MEM, force it into memory. Since we
11051 are going to be changing the mode of the MEM, don't call
11052 force_const_mem for constants because we don't allow pool
11053 constants to change mode. */
11054 tree inner_type
= TREE_TYPE (treeop0
);
11056 gcc_assert (!TREE_ADDRESSABLE (exp
));
11058 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11060 = assign_stack_temp_for_type
11061 (TYPE_MODE (inner_type
),
11062 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11064 emit_move_insn (target
, op0
);
11068 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11069 output type is such that the operand is known to be aligned, indicate
11070 that it is. Otherwise, we need only be concerned about alignment for
11071 non-BLKmode results. */
11074 enum insn_code icode
;
11076 if (modifier
!= EXPAND_WRITE
11077 && modifier
!= EXPAND_MEMORY
11078 && !inner_reference_p
11080 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11082 /* If the target does have special handling for unaligned
11083 loads of mode then use them. */
11084 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11085 != CODE_FOR_nothing
)
11089 op0
= adjust_address (op0
, mode
, 0);
11090 /* We've already validated the memory, and we're creating a
11091 new pseudo destination. The predicates really can't
11093 reg
= gen_reg_rtx (mode
);
11095 /* Nor can the insn generator. */
11096 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11100 else if (STRICT_ALIGNMENT
)
11102 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11103 poly_uint64 temp_size
= mode_size
;
11104 if (GET_MODE (op0
) != BLKmode
)
11105 temp_size
= upper_bound (temp_size
,
11106 GET_MODE_SIZE (GET_MODE (op0
)));
11108 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11109 rtx new_with_op0_mode
11110 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11112 gcc_assert (!TREE_ADDRESSABLE (exp
));
11114 if (GET_MODE (op0
) == BLKmode
)
11116 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11117 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11118 (modifier
== EXPAND_STACK_PARM
11119 ? BLOCK_OP_CALL_PARM
11120 : BLOCK_OP_NORMAL
));
11123 emit_move_insn (new_with_op0_mode
, op0
);
11129 op0
= adjust_address (op0
, mode
, 0);
11136 tree lhs
= treeop0
;
11137 tree rhs
= treeop1
;
11138 gcc_assert (ignore
);
11140 /* Check for |= or &= of a bitfield of size one into another bitfield
11141 of size 1. In this case, (unless we need the result of the
11142 assignment) we can do this more efficiently with a
11143 test followed by an assignment, if necessary.
11145 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11146 things change so we do, this code should be enhanced to
11148 if (TREE_CODE (lhs
) == COMPONENT_REF
11149 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11150 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11151 && TREE_OPERAND (rhs
, 0) == lhs
11152 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11153 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11154 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11156 rtx_code_label
*label
= gen_label_rtx ();
11157 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11158 do_jump (TREE_OPERAND (rhs
, 1),
11161 profile_probability::uninitialized ());
11162 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11164 do_pending_stack_adjust ();
11165 emit_label (label
);
11169 expand_assignment (lhs
, rhs
, false);
11174 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11176 case REALPART_EXPR
:
11177 op0
= expand_normal (treeop0
);
11178 return read_complex_part (op0
, false);
11180 case IMAGPART_EXPR
:
11181 op0
= expand_normal (treeop0
);
11182 return read_complex_part (op0
, true);
11189 /* Expanded in cfgexpand.c. */
11190 gcc_unreachable ();
11192 case TRY_CATCH_EXPR
:
11194 case EH_FILTER_EXPR
:
11195 case TRY_FINALLY_EXPR
:
11196 /* Lowered by tree-eh.c. */
11197 gcc_unreachable ();
11199 case WITH_CLEANUP_EXPR
:
11200 case CLEANUP_POINT_EXPR
:
11202 case CASE_LABEL_EXPR
:
11207 case COMPOUND_EXPR
:
11208 case PREINCREMENT_EXPR
:
11209 case PREDECREMENT_EXPR
:
11210 case POSTINCREMENT_EXPR
:
11211 case POSTDECREMENT_EXPR
:
11214 case COMPOUND_LITERAL_EXPR
:
11215 /* Lowered by gimplify.c. */
11216 gcc_unreachable ();
11219 /* Function descriptors are not valid except for as
11220 initialization constants, and should not be expanded. */
11221 gcc_unreachable ();
11223 case WITH_SIZE_EXPR
:
11224 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11225 have pulled out the size to use in whatever context it needed. */
11226 return expand_expr_real (treeop0
, original_target
, tmode
,
11227 modifier
, alt_rtl
, inner_reference_p
);
11230 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11234 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11235 signedness of TYPE), possibly returning the result in TARGET.
11236 TYPE is known to be a partial integer type. */
11238 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11240 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11241 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11243 /* For constant values, reduce using build_int_cst_type. */
11244 poly_int64 const_exp
;
11245 if (poly_int_rtx_p (exp
, &const_exp
))
11247 tree t
= build_int_cst_type (type
, const_exp
);
11248 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11250 else if (TYPE_UNSIGNED (type
))
11252 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11253 rtx mask
= immed_wide_int_const
11254 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11255 return expand_and (mode
, exp
, mask
, target
);
11259 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11260 int count
= GET_MODE_PRECISION (mode
) - prec
;
11261 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11262 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11266 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11267 when applied to the address of EXP produces an address known to be
11268 aligned more than BIGGEST_ALIGNMENT. */
11271 is_aligning_offset (const_tree offset
, const_tree exp
)
11273 /* Strip off any conversions. */
11274 while (CONVERT_EXPR_P (offset
))
11275 offset
= TREE_OPERAND (offset
, 0);
11277 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11278 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11279 if (TREE_CODE (offset
) != BIT_AND_EXPR
11280 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11281 || compare_tree_int (TREE_OPERAND (offset
, 1),
11282 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11283 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11286 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11287 It must be NEGATE_EXPR. Then strip any more conversions. */
11288 offset
= TREE_OPERAND (offset
, 0);
11289 while (CONVERT_EXPR_P (offset
))
11290 offset
= TREE_OPERAND (offset
, 0);
11292 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11295 offset
= TREE_OPERAND (offset
, 0);
11296 while (CONVERT_EXPR_P (offset
))
11297 offset
= TREE_OPERAND (offset
, 0);
11299 /* This must now be the address of EXP. */
11300 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11303 /* Return the tree node if an ARG corresponds to a string constant or zero
11304 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11305 non-constant) offset in bytes within the string that ARG is accessing.
11306 If NONSTR is non-null, consider valid even sequences of characters that
11307 aren't nul-terminated strings. In that case, if ARG refers to such
11308 a sequence set *NONSTR to its declaration and clear it otherwise.
11309 The type of the offset is sizetype. If MEM_SIZE is non-zero the storage
11310 size of the memory is returned. If MEM_SIZE is zero, the string is
11311 only returned when it is properly zero terminated. */
11314 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*nonstr
)
11319 /* Non-constant index into the character array in an ARRAY_REF
11320 expression or null. */
11321 tree varidx
= NULL_TREE
;
11323 poly_int64 base_off
= 0;
11325 if (TREE_CODE (arg
) == ADDR_EXPR
)
11327 arg
= TREE_OPERAND (arg
, 0);
11329 if (TREE_CODE (arg
) == ARRAY_REF
)
11331 tree idx
= TREE_OPERAND (arg
, 1);
11332 if (TREE_CODE (idx
) != INTEGER_CST
)
11334 /* From a pointer (but not array) argument extract the variable
11335 index to prevent get_addr_base_and_unit_offset() from failing
11336 due to it. Use it later to compute the non-constant offset
11337 into the string and return it to the caller. */
11339 ref
= TREE_OPERAND (arg
, 0);
11341 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11345 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11347 || (TREE_CODE (array
) != VAR_DECL
11348 && TREE_CODE (array
) != CONST_DECL
11349 && TREE_CODE (array
) != STRING_CST
))
11352 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11354 tree arg0
= TREE_OPERAND (arg
, 0);
11355 tree arg1
= TREE_OPERAND (arg
, 1);
11360 if (TREE_CODE (arg0
) == ADDR_EXPR
)
11361 ; /* Do nothing. */
11362 else if (TREE_CODE (arg1
) == ADDR_EXPR
)
11363 std::swap (arg0
, arg1
);
11368 if (tree str
= string_constant (arg0
, &offset
, mem_size
, nonstr
))
11370 /* Avoid pointers to arrays (see bug 86622). */
11371 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11372 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11373 && TREE_CODE (TREE_OPERAND (arg0
, 0)) == ARRAY_REF
)
11376 tree type
= TREE_TYPE (arg1
);
11377 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11382 else if (DECL_P (arg
))
11387 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11390 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11393 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11394 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11395 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11398 tree charsize
= array_ref_element_size (arg
);
11399 /* Set the non-constant offset to the non-constant index scaled
11400 by the size of the character type. */
11401 offset
= fold_build2 (MULT_EXPR
, TREE_TYPE (offset
),
11402 fold_convert (sizetype
, varidx
), charsize
);
11405 if (TREE_CODE (array
) == STRING_CST
)
11407 *ptr_offset
= fold_convert (sizetype
, offset
);
11409 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11410 /* This is not strictly correct. FIXME in follow-up patch. */
11412 *nonstr
= NULL_TREE
;
11416 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11419 tree init
= ctor_for_folding (array
);
11421 /* Handle variables initialized with string literals. */
11422 if (!init
|| init
== error_mark_node
)
11424 if (TREE_CODE (init
) == CONSTRUCTOR
)
11426 /* Convert the 64-bit constant offset to a wider type to avoid
11429 if (!base_off
.is_constant (&wioff
))
11432 wioff
*= BITS_PER_UNIT
;
11433 if (!wi::fits_uhwi_p (wioff
))
11436 base_off
= wioff
.to_uhwi ();
11437 unsigned HOST_WIDE_INT fieldoff
= 0;
11438 init
= fold_ctor_reference (NULL_TREE
, init
, base_off
, 0, array
,
11440 HOST_WIDE_INT cstoff
;
11441 if (!base_off
.is_constant (&cstoff
))
11444 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11445 tree off
= build_int_cst (sizetype
, cstoff
);
11447 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11452 if (!init
|| TREE_CODE (init
) != STRING_CST
)
11455 tree array_size
= DECL_SIZE_UNIT (array
);
11456 if (!array_size
|| TREE_CODE (array_size
) != INTEGER_CST
)
11459 /* Avoid returning an array that is unterminated because it lacks
11460 a terminating nul, like
11461 const char a[4] = "abcde";
11462 but do handle those that are strings even if they have excess
11463 initializers, such as in
11464 const char a[4] = "abc\000\000";
11465 The excess elements contribute to TREE_STRING_LENGTH()
11466 but not to strlen(). */
11467 unsigned HOST_WIDE_INT charsize
11468 = tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (init
))));
11469 /* Compute the lower bound number of elements (not bytes) in the array
11470 that the string is used to initialize. The actual size of the array
11471 may be greater if the string is shorter, but the the important
11472 data point is whether the literal, inlcuding the terminating nul,
11474 unsigned HOST_WIDE_INT array_elts
11475 = tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (init
))) / charsize
;
11477 /* Compute the string length in (wide) characters. */
11478 unsigned HOST_WIDE_INT length
= TREE_STRING_LENGTH (init
);
11479 length
= string_length (TREE_STRING_POINTER (init
), charsize
,
11480 length
/ charsize
);
11482 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (init
));
11484 *nonstr
= array_elts
> length
? NULL_TREE
: array
;
11486 if ((!mem_size
&& !nonstr
)
11487 && array_elts
<= length
)
11490 *ptr_offset
= offset
;
11494 /* Compute the modular multiplicative inverse of A modulo M
11495 using extended Euclid's algorithm. Assumes A and M are coprime. */
11497 mod_inv (const wide_int
&a
, const wide_int
&b
)
11499 /* Verify the assumption. */
11500 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11502 unsigned int p
= a
.get_precision () + 1;
11503 gcc_checking_assert (b
.get_precision () + 1 == p
);
11504 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11505 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11506 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11507 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11509 if (wi::eq_p (b
, 1))
11510 return wide_int::from (1, p
, UNSIGNED
);
11512 while (wi::gt_p (c
, 1, UNSIGNED
))
11515 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11518 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11521 if (wi::lt_p (x1
, 0, SIGNED
))
11526 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11527 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11528 for C2 > 0 to x & C3 == C2
11529 for C2 < 0 to x & C3 == (C2 & C3). */
11531 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11533 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11534 tree treeop0
= gimple_assign_rhs1 (stmt
);
11535 tree treeop1
= gimple_assign_rhs2 (stmt
);
11536 tree type
= TREE_TYPE (*arg0
);
11537 scalar_int_mode mode
;
11538 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11540 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11541 || TYPE_PRECISION (type
) <= 1
11542 || TYPE_UNSIGNED (type
)
11543 /* Signed x % c == 0 should have been optimized into unsigned modulo
11545 || integer_zerop (*arg1
)
11546 /* If c is known to be non-negative, modulo will be expanded as unsigned
11548 || get_range_pos_neg (treeop0
) == 1)
11551 /* x % c == d where d < 0 && d <= -c should be always false. */
11552 if (tree_int_cst_sgn (*arg1
) == -1
11553 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11556 int prec
= TYPE_PRECISION (type
);
11557 wide_int w
= wi::to_wide (treeop1
) - 1;
11558 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11559 tree c3
= wide_int_to_tree (type
, w
);
11561 if (tree_int_cst_sgn (*arg1
) == -1)
11562 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11564 rtx op0
= expand_normal (treeop0
);
11565 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11567 bool speed_p
= optimize_insn_for_speed_p ();
11569 do_pending_stack_adjust ();
11571 location_t loc
= gimple_location (stmt
);
11572 struct separate_ops ops
;
11573 ops
.code
= TRUNC_MOD_EXPR
;
11574 ops
.location
= loc
;
11575 ops
.type
= TREE_TYPE (treeop0
);
11578 ops
.op2
= NULL_TREE
;
11580 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11582 rtx_insn
*moinsns
= get_insns ();
11585 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11586 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11587 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11589 ops
.code
= BIT_AND_EXPR
;
11590 ops
.location
= loc
;
11591 ops
.type
= TREE_TYPE (treeop0
);
11594 ops
.op2
= NULL_TREE
;
11596 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11598 rtx_insn
*muinsns
= get_insns ();
11601 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11602 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11603 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11605 if (mocost
<= mucost
)
11607 emit_insn (moinsns
);
11608 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11612 emit_insn (muinsns
);
11613 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11618 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11620 (X - C2) * C3 <= C4 (or >), where
11621 C3 is modular multiplicative inverse of C1 and 1<<prec and
11622 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11623 if C2 > ((1<<prec) - 1) % C1).
11624 If C1 is even, S = ctz (C1) and C2 is 0, use
11625 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11626 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11628 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11630 (X * C3) + C4 <= 2 * C4, where
11631 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11632 C4 is ((1<<(prec - 1) - 1) / C1).
11633 If C1 is even, S = ctz(C1), use
11634 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11635 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11636 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11638 See the Hacker's Delight book, section 10-17. */
11640 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11642 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11643 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11648 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11652 tree treeop0
= gimple_assign_rhs1 (stmt
);
11653 tree treeop1
= gimple_assign_rhs2 (stmt
);
11654 if (TREE_CODE (treeop0
) != SSA_NAME
11655 || TREE_CODE (treeop1
) != INTEGER_CST
11656 /* Don't optimize the undefined behavior case x % 0;
11657 x % 1 should have been optimized into zero, punt if
11658 it makes it here for whatever reason;
11659 x % -c should have been optimized into x % c. */
11660 || compare_tree_int (treeop1
, 2) <= 0
11661 /* Likewise x % c == d where d >= c should be always false. */
11662 || tree_int_cst_le (treeop1
, *arg1
))
11665 /* Unsigned x % pow2 is handled right already, for signed
11666 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11667 if (integer_pow2p (treeop1
))
11668 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11670 tree type
= TREE_TYPE (*arg0
);
11671 scalar_int_mode mode
;
11672 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11674 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11675 || TYPE_PRECISION (type
) <= 1)
11678 signop sgn
= UNSIGNED
;
11679 /* If both operands are known to have the sign bit clear, handle
11680 even the signed modulo case as unsigned. treeop1 is always
11681 positive >= 2, checked above. */
11682 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11685 if (!TYPE_UNSIGNED (type
))
11687 if (tree_int_cst_sgn (*arg1
) == -1)
11689 type
= unsigned_type_for (type
);
11690 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11694 int prec
= TYPE_PRECISION (type
);
11695 wide_int w
= wi::to_wide (treeop1
);
11696 int shift
= wi::ctz (w
);
11697 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11698 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11699 If C1 is odd, we can handle all cases by subtracting
11700 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11701 e.g. by testing for overflow on the subtraction, punt on that for now
11703 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
11707 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
11708 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
11712 imm_use_iterator imm_iter
;
11713 use_operand_p use_p
;
11714 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
11716 gimple
*use_stmt
= USE_STMT (use_p
);
11717 /* Punt if treeop0 is used in the same bb in a division
11718 or another modulo with the same divisor. We should expect
11719 the division and modulo combined together. */
11720 if (use_stmt
== stmt
11721 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
11723 if (!is_gimple_assign (use_stmt
)
11724 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
11725 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
11727 if (gimple_assign_rhs1 (use_stmt
) != treeop0
11728 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
11733 w
= wi::lrshift (w
, shift
);
11734 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
11735 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
11736 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
11737 tree c3
= wide_int_to_tree (type
, m
);
11738 tree c5
= NULL_TREE
;
11740 if (sgn
== UNSIGNED
)
11742 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
11743 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
11744 otherwise use < or subtract one from C4. E.g. for
11745 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
11746 x % 3U == 1 already needs to be
11747 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
11748 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
11751 d
= wi::lrshift (d
, shift
);
11755 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
11757 d
= wi::lshift (e
, 1);
11760 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
11761 d
= wi::lrshift (e
, shift
- 1);
11763 c5
= wide_int_to_tree (type
, e
);
11765 tree c4
= wide_int_to_tree (type
, d
);
11767 rtx op0
= expand_normal (treeop0
);
11768 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11770 bool speed_p
= optimize_insn_for_speed_p ();
11772 do_pending_stack_adjust ();
11774 location_t loc
= gimple_location (stmt
);
11775 struct separate_ops ops
;
11776 ops
.code
= TRUNC_MOD_EXPR
;
11777 ops
.location
= loc
;
11778 ops
.type
= TREE_TYPE (treeop0
);
11781 ops
.op2
= NULL_TREE
;
11783 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11785 rtx_insn
*moinsns
= get_insns ();
11788 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11789 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11790 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11792 tree t
= fold_convert_loc (loc
, type
, treeop0
);
11793 if (!integer_zerop (*arg1
))
11794 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
11795 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
11797 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
11800 tree s
= build_int_cst (NULL_TREE
, shift
);
11801 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
11805 rtx mur
= expand_normal (t
);
11806 rtx_insn
*muinsns
= get_insns ();
11809 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11810 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
11811 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
11813 if (mocost
<= mucost
)
11815 emit_insn (moinsns
);
11816 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11820 emit_insn (muinsns
);
11821 *arg0
= make_tree (type
, mur
);
11823 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
11826 /* Generate code to calculate OPS, and exploded expression
11827 using a store-flag instruction and return an rtx for the result.
11828 OPS reflects a comparison.
11830 If TARGET is nonzero, store the result there if convenient.
11832 Return zero if there is no suitable set-flag instruction
11833 available on this machine.
11835 Once expand_expr has been called on the arguments of the comparison,
11836 we are committed to doing the store flag, since it is not safe to
11837 re-evaluate the expression. We emit the store-flag insn by calling
11838 emit_store_flag, but only expand the arguments if we have a reason
11839 to believe that emit_store_flag will be successful. If we think that
11840 it will, but it isn't, we have to simulate the store-flag with a
11841 set/jump/set sequence. */
11844 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11846 enum rtx_code code
;
11847 tree arg0
, arg1
, type
;
11848 machine_mode operand_mode
;
11851 rtx subtarget
= target
;
11852 location_t loc
= ops
->location
;
11857 /* Don't crash if the comparison was erroneous. */
11858 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11861 type
= TREE_TYPE (arg0
);
11862 operand_mode
= TYPE_MODE (type
);
11863 unsignedp
= TYPE_UNSIGNED (type
);
11865 /* We won't bother with BLKmode store-flag operations because it would mean
11866 passing a lot of information to emit_store_flag. */
11867 if (operand_mode
== BLKmode
)
11870 /* We won't bother with store-flag operations involving function pointers
11871 when function pointers must be canonicalized before comparisons. */
11872 if (targetm
.have_canonicalize_funcptr_for_compare ()
11873 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11874 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11876 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11877 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11878 == FUNCTION_TYPE
))))
11884 /* For vector typed comparisons emit code to generate the desired
11885 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11886 expander for this. */
11887 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11889 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11890 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11891 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11892 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11895 tree if_true
= constant_boolean_node (true, ops
->type
);
11896 tree if_false
= constant_boolean_node (false, ops
->type
);
11897 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11902 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
11903 into (x - C2) * C3 < C4. */
11904 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
11905 && TREE_CODE (arg0
) == SSA_NAME
11906 && TREE_CODE (arg1
) == INTEGER_CST
)
11908 enum tree_code code
= maybe_optimize_mod_cmp (ops
->code
, &arg0
, &arg1
);
11909 if (code
!= ops
->code
)
11911 struct separate_ops nops
= *ops
;
11912 nops
.code
= ops
->code
= code
;
11915 nops
.type
= TREE_TYPE (arg0
);
11916 return do_store_flag (&nops
, target
, mode
);
11920 /* Get the rtx comparison code to use. We know that EXP is a comparison
11921 operation of some type. Some comparisons against 1 and -1 can be
11922 converted to comparisons with zero. Do so here so that the tests
11923 below will be aware that we have a comparison with zero. These
11924 tests will not catch constants in the first operand, but constants
11925 are rarely passed as the first operand. */
11936 if (integer_onep (arg1
))
11937 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11939 code
= unsignedp
? LTU
: LT
;
11942 if (! unsignedp
&& integer_all_onesp (arg1
))
11943 arg1
= integer_zero_node
, code
= LT
;
11945 code
= unsignedp
? LEU
: LE
;
11948 if (! unsignedp
&& integer_all_onesp (arg1
))
11949 arg1
= integer_zero_node
, code
= GE
;
11951 code
= unsignedp
? GTU
: GT
;
11954 if (integer_onep (arg1
))
11955 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11957 code
= unsignedp
? GEU
: GE
;
11960 case UNORDERED_EXPR
:
11986 gcc_unreachable ();
11989 /* Put a constant second. */
11990 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11991 || TREE_CODE (arg0
) == FIXED_CST
)
11993 std::swap (arg0
, arg1
);
11994 code
= swap_condition (code
);
11997 /* If this is an equality or inequality test of a single bit, we can
11998 do this by shifting the bit being tested to the low-order bit and
11999 masking the result with the constant 1. If the condition was EQ,
12000 we xor it with 1. This does not require an scc insn and is faster
12001 than an scc insn even if we have it.
12003 The code to make this transformation was moved into fold_single_bit_test,
12004 so we just call into the folder and expand its result. */
12006 if ((code
== NE
|| code
== EQ
)
12007 && integer_zerop (arg1
)
12008 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12010 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12012 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12014 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12015 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12016 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12017 gimple_assign_rhs1 (srcstmt
),
12018 gimple_assign_rhs2 (srcstmt
));
12019 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12021 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12025 if (! get_subtarget (target
)
12026 || GET_MODE (subtarget
) != operand_mode
)
12029 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12032 target
= gen_reg_rtx (mode
);
12034 /* Try a cstore if possible. */
12035 return emit_store_flag_force (target
, code
, op0
, op1
,
12036 operand_mode
, unsignedp
,
12037 (TYPE_PRECISION (ops
->type
) == 1
12038 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12041 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12042 0 otherwise (i.e. if there is no casesi instruction).
12044 DEFAULT_PROBABILITY is the probability of jumping to the default
12047 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12048 rtx table_label
, rtx default_label
, rtx fallback_label
,
12049 profile_probability default_probability
)
12051 struct expand_operand ops
[5];
12052 scalar_int_mode index_mode
= SImode
;
12053 rtx op1
, op2
, index
;
12055 if (! targetm
.have_casesi ())
12058 /* The index must be some form of integer. Convert it to SImode. */
12059 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12060 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12062 rtx rangertx
= expand_normal (range
);
12064 /* We must handle the endpoints in the original mode. */
12065 index_expr
= build2 (MINUS_EXPR
, index_type
,
12066 index_expr
, minval
);
12067 minval
= integer_zero_node
;
12068 index
= expand_normal (index_expr
);
12070 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12071 omode
, 1, default_label
,
12072 default_probability
);
12073 /* Now we can safely truncate. */
12074 index
= convert_to_mode (index_mode
, index
, 0);
12078 if (omode
!= index_mode
)
12080 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12081 index_expr
= fold_convert (index_type
, index_expr
);
12084 index
= expand_normal (index_expr
);
12087 do_pending_stack_adjust ();
12089 op1
= expand_normal (minval
);
12090 op2
= expand_normal (range
);
12092 create_input_operand (&ops
[0], index
, index_mode
);
12093 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12094 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12095 create_fixed_operand (&ops
[3], table_label
);
12096 create_fixed_operand (&ops
[4], (default_label
12098 : fallback_label
));
12099 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12103 /* Attempt to generate a tablejump instruction; same concept. */
12104 /* Subroutine of the next function.
12106 INDEX is the value being switched on, with the lowest value
12107 in the table already subtracted.
12108 MODE is its expected mode (needed if INDEX is constant).
12109 RANGE is the length of the jump table.
12110 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12112 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12113 index value is out of range.
12114 DEFAULT_PROBABILITY is the probability of jumping to
12115 the default label. */
12118 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12119 rtx default_label
, profile_probability default_probability
)
12123 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12124 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12126 /* Do an unsigned comparison (in the proper mode) between the index
12127 expression and the value which represents the length of the range.
12128 Since we just finished subtracting the lower bound of the range
12129 from the index expression, this comparison allows us to simultaneously
12130 check that the original index expression value is both greater than
12131 or equal to the minimum value of the range and less than or equal to
12132 the maximum value of the range. */
12135 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12136 default_label
, default_probability
);
12138 /* If index is in range, it must fit in Pmode.
12139 Convert to Pmode so we can index with it. */
12142 unsigned int width
;
12144 /* We know the value of INDEX is between 0 and RANGE. If we have a
12145 sign-extended subreg, and RANGE does not have the sign bit set, then
12146 we have a value that is valid for both sign and zero extension. In
12147 this case, we get better code if we sign extend. */
12148 if (GET_CODE (index
) == SUBREG
12149 && SUBREG_PROMOTED_VAR_P (index
)
12150 && SUBREG_PROMOTED_SIGNED_P (index
)
12151 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12152 <= HOST_BITS_PER_WIDE_INT
)
12153 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12154 index
= convert_to_mode (Pmode
, index
, 0);
12156 index
= convert_to_mode (Pmode
, index
, 1);
12159 /* Don't let a MEM slip through, because then INDEX that comes
12160 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12161 and break_out_memory_refs will go to work on it and mess it up. */
12162 #ifdef PIC_CASE_VECTOR_ADDRESS
12163 if (flag_pic
&& !REG_P (index
))
12164 index
= copy_to_mode_reg (Pmode
, index
);
12167 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12168 GET_MODE_SIZE, because this indicates how large insns are. The other
12169 uses should all be Pmode, because they are addresses. This code
12170 could fail if addresses and insns are not the same size. */
12171 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12172 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12174 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12175 gen_rtx_LABEL_REF (Pmode
, table_label
));
12177 #ifdef PIC_CASE_VECTOR_ADDRESS
12179 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12182 index
= memory_address (CASE_VECTOR_MODE
, index
);
12183 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12184 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12185 convert_move (temp
, vector
, 0);
12187 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12189 /* If we are generating PIC code or if the table is PC-relative, the
12190 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12191 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12196 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12197 rtx table_label
, rtx default_label
,
12198 profile_probability default_probability
)
12202 if (! targetm
.have_tablejump ())
12205 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12206 fold_convert (index_type
, index_expr
),
12207 fold_convert (index_type
, minval
));
12208 index
= expand_normal (index_expr
);
12209 do_pending_stack_adjust ();
12211 do_tablejump (index
, TYPE_MODE (index_type
),
12212 convert_modes (TYPE_MODE (index_type
),
12213 TYPE_MODE (TREE_TYPE (range
)),
12214 expand_normal (range
),
12215 TYPE_UNSIGNED (TREE_TYPE (range
))),
12216 table_label
, default_label
, default_probability
);
12220 /* Return a CONST_VECTOR rtx representing vector mask for
12221 a VECTOR_CST of booleans. */
12223 const_vector_mask_from_tree (tree exp
)
12225 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12226 machine_mode inner
= GET_MODE_INNER (mode
);
12228 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12229 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12230 unsigned int count
= builder
.encoded_nelts ();
12231 for (unsigned int i
= 0; i
< count
; ++i
)
12233 tree elt
= VECTOR_CST_ELT (exp
, i
);
12234 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12235 if (integer_zerop (elt
))
12236 builder
.quick_push (CONST0_RTX (inner
));
12237 else if (integer_onep (elt
)
12238 || integer_minus_onep (elt
))
12239 builder
.quick_push (CONSTM1_RTX (inner
));
12241 gcc_unreachable ();
12243 return builder
.build ();
12246 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12247 Return a constant scalar rtx of mode MODE in which bit X is set if element
12248 X of EXP is nonzero. */
12250 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12252 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12255 /* The result has a fixed number of bits so the input must too. */
12256 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12257 for (unsigned int i
= 0; i
< nunits
; ++i
)
12259 elt
= VECTOR_CST_ELT (exp
, i
);
12260 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12261 if (integer_all_onesp (elt
))
12262 res
= wi::set_bit (res
, i
);
12264 gcc_assert (integer_zerop (elt
));
12267 return immed_wide_int_const (res
, mode
);
12270 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12272 const_vector_from_tree (tree exp
)
12274 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12276 if (initializer_zerop (exp
))
12277 return CONST0_RTX (mode
);
12279 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12280 return const_vector_mask_from_tree (exp
);
12282 machine_mode inner
= GET_MODE_INNER (mode
);
12284 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12285 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12286 unsigned int count
= builder
.encoded_nelts ();
12287 for (unsigned int i
= 0; i
< count
; ++i
)
12289 tree elt
= VECTOR_CST_ELT (exp
, i
);
12290 if (TREE_CODE (elt
) == REAL_CST
)
12291 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12293 else if (TREE_CODE (elt
) == FIXED_CST
)
12294 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12297 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12300 return builder
.build ();
12303 /* Build a decl for a personality function given a language prefix. */
12306 build_personality_function (const char *lang
)
12308 const char *unwind_and_version
;
12312 switch (targetm_common
.except_unwind_info (&global_options
))
12317 unwind_and_version
= "_sj0";
12321 unwind_and_version
= "_v0";
12324 unwind_and_version
= "_seh0";
12327 gcc_unreachable ();
12330 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12332 type
= build_function_type_list (integer_type_node
, integer_type_node
,
12333 long_long_unsigned_type_node
,
12334 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12335 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12336 get_identifier (name
), type
);
12337 DECL_ARTIFICIAL (decl
) = 1;
12338 DECL_EXTERNAL (decl
) = 1;
12339 TREE_PUBLIC (decl
) = 1;
12341 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12342 are the flags assigned by targetm.encode_section_info. */
12343 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12348 /* Extracts the personality function of DECL and returns the corresponding
12352 get_personality_function (tree decl
)
12354 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12355 enum eh_personality_kind pk
;
12357 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12358 if (pk
== eh_personality_none
)
12362 && pk
== eh_personality_any
)
12363 personality
= lang_hooks
.eh_personality ();
12365 if (pk
== eh_personality_lang
)
12366 gcc_assert (personality
!= NULL_TREE
);
12368 return XEXP (DECL_RTL (personality
), 0);
12371 /* Returns a tree for the size of EXP in bytes. */
12374 tree_expr_size (const_tree exp
)
12377 && DECL_SIZE_UNIT (exp
) != 0)
12378 return DECL_SIZE_UNIT (exp
);
12380 return size_in_bytes (TREE_TYPE (exp
));
12383 /* Return an rtx for the size in bytes of the value of EXP. */
12386 expr_size (tree exp
)
12390 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12391 size
= TREE_OPERAND (exp
, 1);
12394 size
= tree_expr_size (exp
);
12396 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12399 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12402 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12403 if the size can vary or is larger than an integer. */
12405 static HOST_WIDE_INT
12406 int_expr_size (tree exp
)
12410 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12411 size
= TREE_OPERAND (exp
, 1);
12414 size
= tree_expr_size (exp
);
12418 if (size
== 0 || !tree_fits_shwi_p (size
))
12421 return tree_to_shwi (size
);