1 /* Definitions of target machine for GCC, for SPARC running Solaris 2
2 Copyright (C) 1992-2016 Free Software Foundation, Inc.
3 Contributed by Ron Guilmette (rfg@netcom.com).
4 Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
23 sparc_override_options will disable V8+ if either not generating V9 code
24 or generating 64-bit code. */
26 #ifdef TARGET_64BIT_DEFAULT
27 #define TARGET_DEFAULT \
28 (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
29 MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
31 #define TARGET_DEFAULT \
32 (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
35 /* The default code model used to be CM_MEDANY on Solaris
36 but even Sun eventually found it to be quite wasteful
37 and changed it to CM_MEDMID in the Studio 9 compiler. */
38 #undef SPARC_DEFAULT_CMODEL
39 #define SPARC_DEFAULT_CMODEL CM_MEDMID
41 /* Select a format to encode pointers in exception handling data. CODE
42 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
43 true if the symbol may be affected by dynamic relocations.
45 Some Solaris dynamic linkers don't handle unaligned section relative
46 relocs properly, so force them to be aligned. */
47 #ifndef HAVE_AS_SPARC_UA_PCREL
48 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
49 ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
54 /* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
56 /* If the assembler supports -xarch=sparc4, we switch to the explicit
57 word size selection mechanism available both in GNU as and Sun as,
58 for the Niagara4 and above configurations. */
61 #define AS_SPARC32_FLAG ""
62 #define AS_SPARC64_FLAG ""
65 #undef ASM_ARCH32_SPEC
66 #define ASM_ARCH32_SPEC "-m32"
67 #undef ASM_ARCH64_SPEC
68 #define ASM_ARCH64_SPEC "-m64"
71 /* Both Sun as and GNU as understand -K PIC. */
73 #define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC
75 #else /* HAVE_AS_SPARC4 */
77 #define AS_SPARC32_FLAG "-xarch=v8plus"
78 #define AS_SPARC64_FLAG "-xarch=v9"
80 #undef AS_NIAGARA4_FLAG
81 #define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG
83 #undef ASM_ARCH32_SPEC
84 #define ASM_ARCH32_SPEC ""
86 #undef ASM_ARCH64_SPEC
87 #define ASM_ARCH64_SPEC ""
89 #undef ASM_ARCH_DEFAULT_SPEC
90 #define ASM_ARCH_DEFAULT_SPEC ""
93 #define ASM_ARCH_SPEC ""
95 /* Both Sun as and GNU as understand -K PIC. */
97 #define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
99 #endif /* HAVE_AS_SPARC4 */
102 #undef ASM_CPU32_DEFAULT_SPEC
103 #define ASM_CPU32_DEFAULT_SPEC ""
104 #undef ASM_CPU64_DEFAULT_SPEC
105 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9"
107 #if TARGET_CPU_DEFAULT == TARGET_CPU_v9
108 #undef CPP_CPU64_DEFAULT_SPEC
109 #define CPP_CPU64_DEFAULT_SPEC ""
110 #undef ASM_CPU32_DEFAULT_SPEC
111 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
114 #if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
115 #undef CPP_CPU64_DEFAULT_SPEC
116 #define CPP_CPU64_DEFAULT_SPEC ""
117 #undef ASM_CPU32_DEFAULT_SPEC
118 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
119 #undef ASM_CPU64_DEFAULT_SPEC
120 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
123 #if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
124 #undef CPP_CPU64_DEFAULT_SPEC
125 #define CPP_CPU64_DEFAULT_SPEC ""
126 #undef ASM_CPU32_DEFAULT_SPEC
127 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
128 #undef ASM_CPU64_DEFAULT_SPEC
129 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
132 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
133 #undef CPP_CPU64_DEFAULT_SPEC
134 #define CPP_CPU64_DEFAULT_SPEC ""
135 #undef ASM_CPU32_DEFAULT_SPEC
136 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
137 #undef ASM_CPU64_DEFAULT_SPEC
138 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
141 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
142 #undef CPP_CPU64_DEFAULT_SPEC
143 #define CPP_CPU64_DEFAULT_SPEC ""
144 #undef ASM_CPU32_DEFAULT_SPEC
145 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
146 #undef ASM_CPU64_DEFAULT_SPEC
147 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
150 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
151 #undef CPP_CPU64_DEFAULT_SPEC
152 #define CPP_CPU64_DEFAULT_SPEC ""
153 #undef ASM_CPU32_DEFAULT_SPEC
154 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
155 #undef ASM_CPU64_DEFAULT_SPEC
156 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
159 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
160 #undef CPP_CPU64_DEFAULT_SPEC
161 #define CPP_CPU64_DEFAULT_SPEC ""
162 #undef ASM_CPU32_DEFAULT_SPEC
163 #define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
164 #undef ASM_CPU64_DEFAULT_SPEC
165 #define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
168 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara7
169 #undef CPP_CPU64_DEFAULT_SPEC
170 #define CPP_CPU64_DEFAULT_SPEC ""
171 #undef ASM_CPU32_DEFAULT_SPEC
172 #define ASM_CPU32_DEFAUILT_SPEC AS_SPARC32_FLAG AS_NIAGARA7_FLAG
173 #undef ASM_CPU64_DEFAULT_SPEC
174 #define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA7_FLAG
178 #define CPP_CPU_SPEC "\
179 %{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
180 %{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \
181 %{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
182 %{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
183 %{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2|mcpu=niagara3|mcpu=niagara4|mcpu=niagara7:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
184 %{!mcpu*:%(cpp_cpu_default)} \
187 #undef CPP_CPU_DEFAULT_SPEC
188 #define CPP_CPU_DEFAULT_SPEC \
189 (DEFAULT_ARCH32_P ? "\
190 %{m64:" CPP_CPU64_DEFAULT_SPEC "} \
191 %{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
193 %{m32:" CPP_CPU32_DEFAULT_SPEC "} \
194 %{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
197 #undef CPP_ARCH32_SPEC
198 #define CPP_ARCH32_SPEC ""
199 #undef CPP_ARCH64_SPEC
200 #define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"
203 #define CPP_ARCH_SPEC "\
204 %{m32:%(cpp_arch32)} \
205 %{m64:%(cpp_arch64)} \
206 %{!m32:%{!m64:%(cpp_arch_default)}} \
209 /* -mcpu=native handling only makes sense with compiler running on
211 #if defined(__sparc__) && defined(__SVR4)
212 extern const char *host_detect_local_cpu (int argc
, const char **argv
);
213 # define EXTRA_SPEC_FUNCTIONS \
214 { "local_cpu_detect", host_detect_local_cpu },
216 # define MCPU_MTUNE_NATIVE_SPECS \
217 " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \
218 " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
220 # define MCPU_MTUNE_NATIVE_SPECS ""
223 #define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
228 %{m64:%{m32:%emay not use both -m32 and -m64}} \
229 %{m64:-mptr64 -mstack-bias -mno-v8plus \
230 %{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
234 %{m32:%{m64:%emay not use both -m32 and -m64}} \
235 %{m32:-mptr32 -mno-stack-bias \
236 %{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
237 %{mv8plus:-m32 -mptr32 -mno-stack-bias \
238 %{!mcpu*:-mcpu=v9}} \
242 /* Support for a compile-time default CPU, et cetera. The rules are:
243 --with-cpu is ignored if -mcpu is specified; likewise --with-cpu-32
245 --with-tune is ignored if -mtune is specified; likewise --with-tune-32
247 --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
249 In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
250 here, otherwise say -mcpu=v7 would be passed even when -m64.
251 CC1_SPEC above takes care of this instead.
253 Note that the order of the cpu* and tune* options matters: the
254 config.gcc file always sets with_cpu to some value, even if the
255 user didn't use --with-cpu when invoking the configure script.
256 This value is based on the target name. Therefore we have to make
257 sure that --with-cpu-32 takes precedence to --with-cpu in < v9
258 systems, and that --with-cpu-64 takes precedence to --with-cpu in
259 >= v9 systems. As for the tune* options, in some platforms
260 config.gcc also sets a default value for it if the user didn't use
261 --with-tune when invoking the configure script. */
262 #undef OPTION_DEFAULT_SPECS
264 #define OPTION_DEFAULT_SPECS \
265 {"cpu_32", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
266 {"cpu_64", "%{m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
267 {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
268 {"tune_32", "%{!m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
269 {"tune_64", "%{m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
270 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
271 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
273 #define OPTION_DEFAULT_SPECS \
274 {"cpu_32", "%{m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
275 {"cpu_64", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
276 {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
277 {"tune_32", "%{m32:%{!mtune=*:-mtune=%(VALUE)}}" }, \
278 {"tune_64", "%{!m32:%{!mtune=*:-mtune=%(VALUE)}}" }, \
279 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
280 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
284 #define ASM_CPU_SPEC "\
285 %{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
286 %{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
287 %{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
288 %{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
289 %{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
290 %{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
291 %{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
292 %{mcpu=niagara7:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA7_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA7_FLAG) "} \
293 %{!mcpu=niagara7:%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}}} \
294 %{!mcpu*:%(asm_cpu_default)} \
298 /* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
299 follow the Solaris 2 ABI. Prefer them if present. */
300 #ifdef HAVE_LD_SOL2_EMULATION
301 #define ARCH32_EMULATION "elf32_sparc_sol2"
302 #define ARCH64_EMULATION "elf64_sparc_sol2"
304 #define ARCH32_EMULATION "elf32_sparc"
305 #define ARCH64_EMULATION "elf64_sparc"
309 #define ARCH64_SUBDIR "sparcv9"
311 #define SUBTARGET_CPU_EXTRA_SPECS
313 #define ENDFILE_ARCH_SPEC ""
317 /* Register the Solaris-specific #pragma directives. */
318 #define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()
320 #if defined(USE_GAS) && defined(HAVE_AS_TLS)
321 /* Use GNU extensions to TLS support. */
322 #undef TARGET_SUN_TLS
323 #undef TARGET_GNU_TLS
324 #define TARGET_SUN_TLS 0
325 #define TARGET_GNU_TLS 1
328 #undef LOCAL_LABEL_PREFIX
329 #define LOCAL_LABEL_PREFIX "."
331 /* The Solaris 2 assembler uses .skip, not .zero, so put this back. */
332 #undef ASM_OUTPUT_SKIP
333 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
334 fprintf (FILE, "\t.skip %u\n", (int)(SIZE))
336 /* This is how to store into the string LABEL
337 the symbol_ref name of an internal numbered label where
338 PREFIX is the class of label and NUM is the number within the class.
339 This is suitable for output with `assemble_name'. */
341 #undef ASM_GENERATE_INTERNAL_LABEL
342 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
343 sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))
345 /* The native TLS-enabled assembler requires the directive #tls_object
346 to be put on objects in TLS sections (as of v7.1). This is not
347 required by GNU as but supported on SPARC. */
348 #undef ASM_DECLARE_OBJECT_NAME
349 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
352 HOST_WIDE_INT size; \
354 if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL)) \
355 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object"); \
357 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
359 size_directive_output = 0; \
360 if (!flag_inhibit_size_directive \
361 && (DECL) && DECL_SIZE (DECL)) \
363 size_directive_output = 1; \
364 size = int_size_in_bytes (TREE_TYPE (DECL)); \
365 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
368 ASM_OUTPUT_LABEL (FILE, NAME); \
372 /* Output a simple call for .init/.fini. */
373 #define ASM_OUTPUT_CALL(FILE, FN) \
376 fprintf (FILE, "\tcall\t"); \
377 targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0); \
378 fprintf (FILE, "\n\tnop\n"); \
382 /* Solaris as has a bug: a .common directive in .tbss or .tdata section
383 behaves as .tls_common rather than normal non-TLS .common. */
384 #undef ASM_OUTPUT_ALIGNED_COMMON
385 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
390 && ((in_section->common.flags & SECTION_TLS) == SECTION_TLS)) \
391 switch_to_section (bss_section); \
392 fprintf ((FILE), "%s", COMMON_ASM_OP); \
393 assemble_name ((FILE), (NAME)); \
394 fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
395 (SIZE), (ALIGN) / BITS_PER_UNIT); \
400 /* This is how to output an assembler line that says to advance
401 the location counter to a multiple of 2**LOG bytes using the
402 NOP instruction as padding. The filler pattern doesn't work
404 #define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \
406 fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG)))
408 /* Use Solaris ELF section syntax with Sun as. */
409 #undef TARGET_ASM_NAMED_SECTION
410 #define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section
412 /* Sun as requires doublequoted section names on SPARC. While GNU as
413 supports that, too, we prefer the standard variant. */
414 #define SECTION_NAME_FORMAT "\"%s\""
415 #endif /* !USE_GAS */
417 /* Undefine this so that attribute((init_priority)) works with GNU ld. */
419 #undef CTORS_SECTION_ASM_OP
420 #undef DTORS_SECTION_ASM_OP
425 /* Define for support of TFmode long double.
426 SPARC ABI says that long double is 4 words. */
427 #define LONG_DOUBLE_TYPE_SIZE 128
429 /* Solaris's _Qp_* library routine implementation clobbers the output
430 memory before the inputs are fully consumed. */
432 #undef TARGET_BUGGY_QP_LIB
433 #define TARGET_BUGGY_QP_LIB 1
435 #undef SUN_CONVERSION_LIBFUNCS
436 #define SUN_CONVERSION_LIBFUNCS 1
438 #undef DITF_CONVERSION_LIBFUNCS
439 #define DITF_CONVERSION_LIBFUNCS 1
441 #undef SUN_INTEGER_MULTIPLY_64
442 #define SUN_INTEGER_MULTIPLY_64 1
444 #undef SPARC_LOW_FE_EXCEPT_VALUES
445 #define SPARC_LOW_FE_EXCEPT_VALUES 1