?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
* m68k/m68k.c (m68k_last_compare_had_fp_operands): New variable.
[official-gcc.git] / gcc / longlong.h
blob65a7179f26a7ce112bf92b77acfabd015f8be3dd
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2 Copyright (C) 1991, 1992, 1994, 1995, 1996 Free Software Foundation, Inc.
3
4 This definition file is free software; you can redistribute it
5 and/or modify it under the terms of the GNU General Public
6 License as published by the Free Software Foundation; either
7 version 2, or (at your option) any later version.
8
9 This definition file is distributed in the hope that it will be
10 useful, but WITHOUT ANY WARRANTY; without even the implied
11 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12 See the GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330,
17 Boston, MA 02111-1307, USA. */
18
19 #ifndef SI_TYPE_SIZE
20 #define SI_TYPE_SIZE 32
21 #endif
22
23 #define __BITS4 (SI_TYPE_SIZE / 4)
24 #define __ll_B (1L << (SI_TYPE_SIZE / 2))
25 #define __ll_lowpart(t) ((USItype) (t) % __ll_B)
26 #define __ll_highpart(t) ((USItype) (t) / __ll_B)
27
28 /* Define auxiliary asm macros.
29
30 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand)
31 multiplies two USItype integers MULTIPLER and MULTIPLICAND,
32 and generates a two-part USItype product in HIGH_PROD and
33 LOW_PROD.
34
35 2) __umulsidi3(a,b) multiplies two USItype integers A and B,
36 and returns a UDItype product. This is just a variant of umul_ppmm.
37
38 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
39 denominator) divides a two-word unsigned integer, composed by the
40 integers HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and
41 places the quotient in QUOTIENT and the remainder in REMAINDER.
42 HIGH_NUMERATOR must be less than DENOMINATOR for correct operation.
43 If, in addition, the most significant bit of DENOMINATOR must be 1,
44 then the pre-processor symbol UDIV_NEEDS_NORMALIZATION is defined to 1.
45
46 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
47 denominator). Like udiv_qrnnd but the numbers are signed. The
48 quotient is rounded towards 0.
49
50 5) count_leading_zeros(count, x) counts the number of zero-bits from
51 the msb to the first non-zero bit. This is the number of steps X
52 needs to be shifted left to set the msb. Undefined for X == 0.
53
54 6) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
55 high_addend_2, low_addend_2) adds two two-word unsigned integers,
56 composed by HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and
57 LOW_ADDEND_2 respectively. The result is placed in HIGH_SUM and
58 LOW_SUM. Overflow (i.e. carry out) is not stored anywhere, and is
59 lost.
60
61 7) sub_ddmmss(high_difference, low_difference, high_minuend,
62 low_minuend, high_subtrahend, low_subtrahend) subtracts two
63 two-word unsigned integers, composed by HIGH_MINUEND_1 and
64 LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and LOW_SUBTRAHEND_2
65 respectively. The result is placed in HIGH_DIFFERENCE and
66 LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
67 and is lost.
68
69 If any of these macros are left undefined for a particular CPU,
70 C macros are used. */
71
72 /* The CPUs come in alphabetical order below.
73
74 Please add support for more CPUs here, or improve the current support
75 for the CPUs below!
76 (E.g. WE32100, IBM360.) */
77
78 #if defined (__GNUC__) && !defined (NO_ASM)
79
80 /* We sometimes need to clobber "cc" with gcc2, but that would not be
81 understood by gcc1. Use cpp to avoid major code duplication. */
82 #if __GNUC__ < 2
83 #define __CLOBBER_CC
84 #define __AND_CLOBBER_CC
85 #else /* __GNUC__ >= 2 */
86 #define __CLOBBER_CC : "cc"
87 #define __AND_CLOBBER_CC , "cc"
88 #endif /* __GNUC__ < 2 */
89
90 #if defined (__a29k__) || defined (_AM29K)
91 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
92 __asm__ ("add %1,%4,%5
93 addc %0,%2,%3" \
94 : "=r" ((USItype) (sh)), \
95 "=&r" ((USItype) (sl)) \
96 : "%r" ((USItype) (ah)), \
97 "rI" ((USItype) (bh)), \
98 "%r" ((USItype) (al)), \
99 "rI" ((USItype) (bl)))
100 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
101 __asm__ ("sub %1,%4,%5
102 subc %0,%2,%3" \
103 : "=r" ((USItype) (sh)), \
104 "=&r" ((USItype) (sl)) \
105 : "r" ((USItype) (ah)), \
106 "rI" ((USItype) (bh)), \
107 "r" ((USItype) (al)), \
108 "rI" ((USItype) (bl)))
109 #define umul_ppmm(xh, xl, m0, m1) \
110 do { \
111 USItype __m0 = (m0), __m1 = (m1); \
112 __asm__ ("multiplu %0,%1,%2" \
113 : "=r" ((USItype) (xl)) \
114 : "r" (__m0), \
115 "r" (__m1)); \
116 __asm__ ("multmu %0,%1,%2" \
117 : "=r" ((USItype) (xh)) \
118 : "r" (__m0), \
119 "r" (__m1)); \
120 } while (0)
121 #define udiv_qrnnd(q, r, n1, n0, d) \
122 __asm__ ("dividu %0,%3,%4" \
123 : "=r" ((USItype) (q)), \
124 "=q" ((USItype) (r)) \
125 : "1" ((USItype) (n1)), \
126 "r" ((USItype) (n0)), \
127 "r" ((USItype) (d)))
128 #define count_leading_zeros(count, x) \
129 __asm__ ("clz %0,%1" \
130 : "=r" ((USItype) (count)) \
131 : "r" ((USItype) (x)))
132 #endif /* __a29k__ */
133
134 #if defined (__arm__)
135 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
136 __asm__ ("adds %1, %4, %5
137 adc %0, %2, %3" \
138 : "=r" ((USItype) (sh)), \
139 "=&r" ((USItype) (sl)) \
140 : "%r" ((USItype) (ah)), \
141 "rI" ((USItype) (bh)), \
142 "%r" ((USItype) (al)), \
143 "rI" ((USItype) (bl)))
144 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
145 __asm__ ("subs %1, %4, %5
146 sbc %0, %2, %3" \
147 : "=r" ((USItype) (sh)), \
148 "=&r" ((USItype) (sl)) \
149 : "r" ((USItype) (ah)), \
150 "rI" ((USItype) (bh)), \
151 "r" ((USItype) (al)), \
152 "rI" ((USItype) (bl)))
153 #define umul_ppmm(xh, xl, a, b) \
154 {register USItype __t0, __t1, __t2; \
155 __asm__ ("%@ Inlined umul_ppmm
156 mov %2, %5, lsr #16
157 mov %0, %6, lsr #16
158 bic %3, %5, %2, lsl #16
159 bic %4, %6, %0, lsl #16
160 mul %1, %3, %4
161 mul %4, %2, %4
162 mul %3, %0, %3
163 mul %0, %2, %0
164 adds %3, %4, %3
165 addcs %0, %0, #65536
166 adds %1, %1, %3, lsl #16
167 adc %0, %0, %3, lsr #16" \
168 : "=&r" ((USItype) (xh)), \
169 "=r" ((USItype) (xl)), \
170 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
171 : "r" ((USItype) (a)), \
172 "r" ((USItype) (b)));}
173 #define UMUL_TIME 20
174 #define UDIV_TIME 100
175 #endif /* __arm__ */
176
177 #if defined (__clipper__)
178 #define umul_ppmm(w1, w0, u, v) \
179 ({union {UDItype __ll; \
180 struct {USItype __l, __h;} __i; \
181 } __xx; \
182 __asm__ ("mulwux %2,%0" \
183 : "=r" (__xx.__ll) \
184 : "%0" ((USItype) (u)), \
185 "r" ((USItype) (v))); \
186 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
187 #define smul_ppmm(w1, w0, u, v) \
188 ({union {DItype __ll; \
189 struct {SItype __l, __h;} __i; \
190 } __xx; \
191 __asm__ ("mulwx %2,%0" \
192 : "=r" (__xx.__ll) \
193 : "%0" ((SItype) (u)), \
194 "r" ((SItype) (v))); \
195 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
196 #define __umulsidi3(u, v) \
197 ({UDItype __w; \
198 __asm__ ("mulwux %2,%0" \
199 : "=r" (__w) \
200 : "%0" ((USItype) (u)), \
201 "r" ((USItype) (v))); \
202 __w; })
203 #endif /* __clipper__ */
204
205 #if defined (__gmicro__)
206 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
207 __asm__ ("add.w %5,%1
208 addx %3,%0" \
209 : "=g" ((USItype) (sh)), \
210 "=&g" ((USItype) (sl)) \
211 : "%0" ((USItype) (ah)), \
212 "g" ((USItype) (bh)), \
213 "%1" ((USItype) (al)), \
214 "g" ((USItype) (bl)))
215 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
216 __asm__ ("sub.w %5,%1
217 subx %3,%0" \
218 : "=g" ((USItype) (sh)), \
219 "=&g" ((USItype) (sl)) \
220 : "0" ((USItype) (ah)), \
221 "g" ((USItype) (bh)), \
222 "1" ((USItype) (al)), \
223 "g" ((USItype) (bl)))
224 #define umul_ppmm(ph, pl, m0, m1) \
225 __asm__ ("mulx %3,%0,%1" \
226 : "=g" ((USItype) (ph)), \
227 "=r" ((USItype) (pl)) \
228 : "%0" ((USItype) (m0)), \
229 "g" ((USItype) (m1)))
230 #define udiv_qrnnd(q, r, nh, nl, d) \
231 __asm__ ("divx %4,%0,%1" \
232 : "=g" ((USItype) (q)), \
233 "=r" ((USItype) (r)) \
234 : "1" ((USItype) (nh)), \
235 "0" ((USItype) (nl)), \
236 "g" ((USItype) (d)))
237 #define count_leading_zeros(count, x) \
238 __asm__ ("bsch/1 %1,%0" \
239 : "=g" (count) \
240 : "g" ((USItype) (x)), \
241 "0" ((USItype) 0))
242 #endif
243
244 #if defined (__hppa)
245 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
246 __asm__ ("add %4,%5,%1
247 addc %2,%3,%0" \
248 : "=r" ((USItype) (sh)), \
249 "=&r" ((USItype) (sl)) \
250 : "%rM" ((USItype) (ah)), \
251 "rM" ((USItype) (bh)), \
252 "%rM" ((USItype) (al)), \
253 "rM" ((USItype) (bl)))
254 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
255 __asm__ ("sub %4,%5,%1
256 subb %2,%3,%0" \
257 : "=r" ((USItype) (sh)), \
258 "=&r" ((USItype) (sl)) \
259 : "rM" ((USItype) (ah)), \
260 "rM" ((USItype) (bh)), \
261 "rM" ((USItype) (al)), \
262 "rM" ((USItype) (bl)))
263 #if defined (_PA_RISC1_1)
264 #define umul_ppmm(w1, w0, u, v) \
265 do { \
266 union \
267 { \
268 UDItype __f; \
269 struct {USItype __w1, __w0;} __w1w0; \
270 } __t; \
271 __asm__ ("xmpyu %1,%2,%0" \
272 : "=x" (__t.__f) \
273 : "x" ((USItype) (u)), \
274 "x" ((USItype) (v))); \
275 (w1) = __t.__w1w0.__w1; \
276 (w0) = __t.__w1w0.__w0; \
277 } while (0)
278 #define UMUL_TIME 8
279 #else
280 #define UMUL_TIME 30
281 #endif
282 #define UDIV_TIME 40
283 #define count_leading_zeros(count, x) \
284 do { \
285 USItype __tmp; \
286 __asm__ ( \
287 "ldi 1,%0
288 extru,= %1,15,16,%%r0 ; Bits 31..16 zero?
289 extru,tr %1,15,16,%1 ; No. Shift down, skip add.
290 ldo 16(%0),%0 ; Yes. Perform add.
291 extru,= %1,23,8,%%r0 ; Bits 15..8 zero?
292 extru,tr %1,23,8,%1 ; No. Shift down, skip add.
293 ldo 8(%0),%0 ; Yes. Perform add.
294 extru,= %1,27,4,%%r0 ; Bits 7..4 zero?
295 extru,tr %1,27,4,%1 ; No. Shift down, skip add.
296 ldo 4(%0),%0 ; Yes. Perform add.
297 extru,= %1,29,2,%%r0 ; Bits 3..2 zero?
298 extru,tr %1,29,2,%1 ; No. Shift down, skip add.
299 ldo 2(%0),%0 ; Yes. Perform add.
300 extru %1,30,1,%1 ; Extract bit 1.
301 sub %0,%1,%0 ; Subtract it.
302 " : "=r" (count), "=r" (__tmp) : "1" (x)); \
303 } while (0)
304 #endif
305
306 #if defined (__i386__) || defined (__i486__)
307 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
308 __asm__ ("addl %5,%1
309 adcl %3,%0" \
310 : "=r" ((USItype) (sh)), \
311 "=&r" ((USItype) (sl)) \
312 : "%0" ((USItype) (ah)), \
313 "g" ((USItype) (bh)), \
314 "%1" ((USItype) (al)), \
315 "g" ((USItype) (bl)))
316 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
317 __asm__ ("subl %5,%1
318 sbbl %3,%0" \
319 : "=r" ((USItype) (sh)), \
320 "=&r" ((USItype) (sl)) \
321 : "0" ((USItype) (ah)), \
322 "g" ((USItype) (bh)), \
323 "1" ((USItype) (al)), \
324 "g" ((USItype) (bl)))
325 #define umul_ppmm(w1, w0, u, v) \
326 __asm__ ("mull %3" \
327 : "=a" ((USItype) (w0)), \
328 "=d" ((USItype) (w1)) \
329 : "%0" ((USItype) (u)), \
330 "rm" ((USItype) (v)))
331 #define udiv_qrnnd(q, r, n1, n0, d) \
332 __asm__ ("divl %4" \
333 : "=a" ((USItype) (q)), \
334 "=d" ((USItype) (r)) \
335 : "0" ((USItype) (n0)), \
336 "1" ((USItype) (n1)), \
337 "rm" ((USItype) (d)))
338 #define count_leading_zeros(count, x) \
339 do { \
340 USItype __cbtmp; \
341 __asm__ ("bsrl %1,%0" \
342 : "=r" (__cbtmp) : "rm" ((USItype) (x))); \
343 (count) = __cbtmp ^ 31; \
344 } while (0)
345 #define UMUL_TIME 40
346 #define UDIV_TIME 40
347 #endif /* 80x86 */
348
349 #if defined (__i860__)
350 #if 0
351 /* Make sure these patterns really improve the code before
352 switching them on. */
353 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
354 do { \
355 union \
356 { \
357 DItype __ll; \
358 struct {USItype __l, __h;} __i; \
359 } __a, __b, __s; \
360 __a.__i.__l = (al); \
361 __a.__i.__h = (ah); \
362 __b.__i.__l = (bl); \
363 __b.__i.__h = (bh); \
364 __asm__ ("fiadd.dd %1,%2,%0" \
365 : "=f" (__s.__ll) \
366 : "%f" (__a.__ll), "f" (__b.__ll)); \
367 (sh) = __s.__i.__h; \
368 (sl) = __s.__i.__l; \
369 } while (0)
370 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
371 do { \
372 union \
373 { \
374 DItype __ll; \
375 struct {USItype __l, __h;} __i; \
376 } __a, __b, __s; \
377 __a.__i.__l = (al); \
378 __a.__i.__h = (ah); \
379 __b.__i.__l = (bl); \
380 __b.__i.__h = (bh); \
381 __asm__ ("fisub.dd %1,%2,%0" \
382 : "=f" (__s.__ll) \
383 : "%f" (__a.__ll), "f" (__b.__ll)); \
384 (sh) = __s.__i.__h; \
385 (sl) = __s.__i.__l; \
386 } while (0)
387 #endif
388 #endif /* __i860__ */
389
390 #if defined (__i960__)
391 #define umul_ppmm(w1, w0, u, v) \
392 ({union {UDItype __ll; \
393 struct {USItype __l, __h;} __i; \
394 } __xx; \
395 __asm__ ("emul %2,%1,%0" \
396 : "=d" (__xx.__ll) \
397 : "%dI" ((USItype) (u)), \
398 "dI" ((USItype) (v))); \
399 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
400 #define __umulsidi3(u, v) \
401 ({UDItype __w; \
402 __asm__ ("emul %2,%1,%0" \
403 : "=d" (__w) \
404 : "%dI" ((USItype) (u)), \
405 "dI" ((USItype) (v))); \
406 __w; })
407 #endif /* __i960__ */
408
409 #if defined (__mc68000__)
410 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
411 __asm__ ("add%.l %5,%1
412 addx%.l %3,%0" \
413 : "=d" ((USItype) (sh)), \
414 "=&d" ((USItype) (sl)) \
415 : "%0" ((USItype) (ah)), \
416 "d" ((USItype) (bh)), \
417 "%1" ((USItype) (al)), \
418 "g" ((USItype) (bl)))
419 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
420 __asm__ ("sub%.l %5,%1
421 subx%.l %3,%0" \
422 : "=d" ((USItype) (sh)), \
423 "=&d" ((USItype) (sl)) \
424 : "0" ((USItype) (ah)), \
425 "d" ((USItype) (bh)), \
426 "1" ((USItype) (al)), \
427 "g" ((USItype) (bl)))
428
429 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
430 #if defined (__mc68020__) || defined(mc68020) \
431 || defined(__mc68030__) || defined(mc68030) \
432 || defined(__mc68040__) || defined(mc68040) \
433 || defined(__mc68332__) || defined(mc68332) \
434 || defined(__NeXT__)
435 #define umul_ppmm(w1, w0, u, v) \
436 __asm__ ("mulu%.l %3,%1:%0" \
437 : "=d" ((USItype) (w0)), \
438 "=d" ((USItype) (w1)) \
439 : "%0" ((USItype) (u)), \
440 "dmi" ((USItype) (v)))
441 #define UMUL_TIME 45
442 #define udiv_qrnnd(q, r, n1, n0, d) \
443 __asm__ ("divu%.l %4,%1:%0" \
444 : "=d" ((USItype) (q)), \
445 "=d" ((USItype) (r)) \
446 : "0" ((USItype) (n0)), \
447 "1" ((USItype) (n1)), \
448 "dmi" ((USItype) (d)))
449 #define UDIV_TIME 90
450 #define sdiv_qrnnd(q, r, n1, n0, d) \
451 __asm__ ("divs%.l %4,%1:%0" \
452 : "=d" ((USItype) (q)), \
453 "=d" ((USItype) (r)) \
454 : "0" ((USItype) (n0)), \
455 "1" ((USItype) (n1)), \
456 "dmi" ((USItype) (d)))
457
458 #else /* not mc68020 */
459 #if !defined(__mcf5200__)
460 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */
461 #define umul_ppmm(xh, xl, a, b) \
462 __asm__ ("| Inlined umul_ppmm
463 move%.l %2,%/d0
464 move%.l %3,%/d1
465 move%.l %/d0,%/d2
466 swap %/d0
467 move%.l %/d1,%/d3
468 swap %/d1
469 move%.w %/d2,%/d4
470 mulu %/d3,%/d4
471 mulu %/d1,%/d2
472 mulu %/d0,%/d3
473 mulu %/d0,%/d1
474 move%.l %/d4,%/d0
475 eor%.w %/d0,%/d0
476 swap %/d0
477 add%.l %/d0,%/d2
478 add%.l %/d3,%/d2
479 jcc 1f
480 add%.l %#65536,%/d1
481 1: swap %/d2
482 moveq %#0,%/d0
483 move%.w %/d2,%/d0
484 move%.w %/d4,%/d2
485 move%.l %/d2,%1
486 add%.l %/d1,%/d0
487 move%.l %/d0,%0" \
488 : "=g" ((USItype) (xh)), \
489 "=g" ((USItype) (xl)) \
490 : "g" ((USItype) (a)), \
491 "g" ((USItype) (b)) \
492 : "d0", "d1", "d2", "d3", "d4")
493 #define UMUL_TIME 100
494 #define UDIV_TIME 400
495 #endif /* not mcf5200 */
496 #endif /* not mc68020 */
497
498 /* The '020, '030, '040 and '060 have bitfield insns. */
499 #if defined (__mc68020__) || defined(mc68020) \
500 || defined(__mc68030__) || defined(mc68030) \
501 || defined(__mc68040__) || defined(mc68040) \
502 || defined(__mc68060__) || defined(mc68060) \
503 || defined(__NeXT__)
504 #define count_leading_zeros(count, x) \
505 __asm__ ("bfffo %1{%b2:%b2},%0" \
506 : "=d" ((USItype) (count)) \
507 : "od" ((USItype) (x)), "n" (0))
508 #endif
509 #endif /* mc68000 */
510
511 #if defined (__m88000__)
512 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
513 __asm__ ("addu.co %1,%r4,%r5
514 addu.ci %0,%r2,%r3" \
515 : "=r" ((USItype) (sh)), \
516 "=&r" ((USItype) (sl)) \
517 : "%rJ" ((USItype) (ah)), \
518 "rJ" ((USItype) (bh)), \
519 "%rJ" ((USItype) (al)), \
520 "rJ" ((USItype) (bl)))
521 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
522 __asm__ ("subu.co %1,%r4,%r5
523 subu.ci %0,%r2,%r3" \
524 : "=r" ((USItype) (sh)), \
525 "=&r" ((USItype) (sl)) \
526 : "rJ" ((USItype) (ah)), \
527 "rJ" ((USItype) (bh)), \
528 "rJ" ((USItype) (al)), \
529 "rJ" ((USItype) (bl)))
530 #define count_leading_zeros(count, x) \
531 do { \
532 USItype __cbtmp; \
533 __asm__ ("ff1 %0,%1" \
534 : "=r" (__cbtmp) \
535 : "r" ((USItype) (x))); \
536 (count) = __cbtmp ^ 31; \
537 } while (0)
538 #if defined (__mc88110__)
539 #define umul_ppmm(wh, wl, u, v) \
540 do { \
541 union {UDItype __ll; \
542 struct {USItype __h, __l;} __i; \
543 } __xx; \
544 __asm__ ("mulu.d %0,%1,%2" \
545 : "=r" (__xx.__ll) \
546 : "r" ((USItype) (u)), \
547 "r" ((USItype) (v))); \
548 (wh) = __xx.__i.__h; \
549 (wl) = __xx.__i.__l; \
550 } while (0)
551 #define udiv_qrnnd(q, r, n1, n0, d) \
552 ({union {UDItype __ll; \
553 struct {USItype __h, __l;} __i; \
554 } __xx; \
555 USItype __q; \
556 __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
557 __asm__ ("divu.d %0,%1,%2" \
558 : "=r" (__q) \
559 : "r" (__xx.__ll), \
560 "r" ((USItype) (d))); \
561 (r) = (n0) - __q * (d); (q) = __q; })
562 #define UMUL_TIME 5
563 #define UDIV_TIME 25
564 #else
565 #define UMUL_TIME 17
566 #define UDIV_TIME 150
567 #endif /* __mc88110__ */
568 #endif /* __m88000__ */
569
570 #if defined (__mips__)
571 #define umul_ppmm(w1, w0, u, v) \
572 __asm__ ("multu %2,%3" \
573 : "=l" ((USItype) (w0)), \
574 "=h" ((USItype) (w1)) \
575 : "d" ((USItype) (u)), \
576 "d" ((USItype) (v)))
577 #define UMUL_TIME 10
578 #define UDIV_TIME 100
579 #endif /* __mips__ */
580
581 #if defined (__ns32000__)
582 #define umul_ppmm(w1, w0, u, v) \
583 ({union {UDItype __ll; \
584 struct {USItype __l, __h;} __i; \
585 } __xx; \
586 __asm__ ("meid %2,%0" \
587 : "=g" (__xx.__ll) \
588 : "%0" ((USItype) (u)), \
589 "g" ((USItype) (v))); \
590 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
591 #define __umulsidi3(u, v) \
592 ({UDItype __w; \
593 __asm__ ("meid %2,%0" \
594 : "=g" (__w) \
595 : "%0" ((USItype) (u)), \
596 "g" ((USItype) (v))); \
597 __w; })
598 #define udiv_qrnnd(q, r, n1, n0, d) \
599 ({union {UDItype __ll; \
600 struct {USItype __l, __h;} __i; \
601 } __xx; \
602 __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
603 __asm__ ("deid %2,%0" \
604 : "=g" (__xx.__ll) \
605 : "0" (__xx.__ll), \
606 "g" ((USItype) (d))); \
607 (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
608 #endif /* __ns32000__ */
609
610 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
611 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
612 do { \
613 if (__builtin_constant_p (bh) && (bh) == 0) \
614 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
615 : "=r" ((USItype) (sh)), \
616 "=&r" ((USItype) (sl)) \
617 : "%r" ((USItype) (ah)), \
618 "%r" ((USItype) (al)), \
619 "rI" ((USItype) (bl))); \
620 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
621 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
622 : "=r" ((USItype) (sh)), \
623 "=&r" ((USItype) (sl)) \
624 : "%r" ((USItype) (ah)), \
625 "%r" ((USItype) (al)), \
626 "rI" ((USItype) (bl))); \
627 else \
628 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
629 : "=r" ((USItype) (sh)), \
630 "=&r" ((USItype) (sl)) \
631 : "%r" ((USItype) (ah)), \
632 "r" ((USItype) (bh)), \
633 "%r" ((USItype) (al)), \
634 "rI" ((USItype) (bl))); \
635 } while (0)
636 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
637 do { \
638 if (__builtin_constant_p (ah) && (ah) == 0) \
639 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
640 : "=r" ((USItype) (sh)), \
641 "=&r" ((USItype) (sl)) \
642 : "r" ((USItype) (bh)), \
643 "rI" ((USItype) (al)), \
644 "r" ((USItype) (bl))); \
645 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
646 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
647 : "=r" ((USItype) (sh)), \
648 "=&r" ((USItype) (sl)) \
649 : "r" ((USItype) (bh)), \
650 "rI" ((USItype) (al)), \
651 "r" ((USItype) (bl))); \
652 else if (__builtin_constant_p (bh) && (bh) == 0) \
653 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
654 : "=r" ((USItype) (sh)), \
655 "=&r" ((USItype) (sl)) \
656 : "r" ((USItype) (ah)), \
657 "rI" ((USItype) (al)), \
658 "r" ((USItype) (bl))); \
659 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
660 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
661 : "=r" ((USItype) (sh)), \
662 "=&r" ((USItype) (sl)) \
663 : "r" ((USItype) (ah)), \
664 "rI" ((USItype) (al)), \
665 "r" ((USItype) (bl))); \
666 else \
667 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
668 : "=r" ((USItype) (sh)), \
669 "=&r" ((USItype) (sl)) \
670 : "r" ((USItype) (ah)), \
671 "r" ((USItype) (bh)), \
672 "rI" ((USItype) (al)), \
673 "r" ((USItype) (bl))); \
674 } while (0)
675 #define count_leading_zeros(count, x) \
676 __asm__ ("{cntlz|cntlzw} %0,%1" \
677 : "=r" ((USItype) (count)) \
678 : "r" ((USItype) (x)))
679 #if defined (_ARCH_PPC)
680 #define umul_ppmm(ph, pl, m0, m1) \
681 do { \
682 USItype __m0 = (m0), __m1 = (m1); \
683 __asm__ ("mulhwu %0,%1,%2" \
684 : "=r" ((USItype) ph) \
685 : "%r" (__m0), \
686 "r" (__m1)); \
687 (pl) = __m0 * __m1; \
688 } while (0)
689 #define UMUL_TIME 15
690 #define smul_ppmm(ph, pl, m0, m1) \
691 do { \
692 SItype __m0 = (m0), __m1 = (m1); \
693 __asm__ ("mulhw %0,%1,%2" \
694 : "=r" ((SItype) ph) \
695 : "%r" (__m0), \
696 "r" (__m1)); \
697 (pl) = __m0 * __m1; \
698 } while (0)
699 #define SMUL_TIME 14
700 #define UDIV_TIME 120
701 #else
702 #define umul_ppmm(xh, xl, m0, m1) \
703 do { \
704 USItype __m0 = (m0), __m1 = (m1); \
705 __asm__ ("mul %0,%2,%3" \
706 : "=r" ((USItype) (xh)), \
707 "=q" ((USItype) (xl)) \
708 : "r" (__m0), \
709 "r" (__m1)); \
710 (xh) += ((((SItype) __m0 >> 31) & __m1) \
711 + (((SItype) __m1 >> 31) & __m0)); \
712 } while (0)
713 #define UMUL_TIME 8
714 #define smul_ppmm(xh, xl, m0, m1) \
715 __asm__ ("mul %0,%2,%3" \
716 : "=r" ((SItype) (xh)), \
717 "=q" ((SItype) (xl)) \
718 : "r" (m0), \
719 "r" (m1))
720 #define SMUL_TIME 4
721 #define sdiv_qrnnd(q, r, nh, nl, d) \
722 __asm__ ("div %0,%2,%4" \
723 : "=r" ((SItype) (q)), "=q" ((SItype) (r)) \
724 : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
725 #define UDIV_TIME 100
726 #endif
727 #endif /* Power architecture variants. */
728
729 #if defined (__pyr__)
730 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
731 __asm__ ("addw %5,%1
732 addwc %3,%0" \
733 : "=r" ((USItype) (sh)), \
734 "=&r" ((USItype) (sl)) \
735 : "%0" ((USItype) (ah)), \
736 "g" ((USItype) (bh)), \
737 "%1" ((USItype) (al)), \
738 "g" ((USItype) (bl)))
739 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
740 __asm__ ("subw %5,%1
741 subwb %3,%0" \
742 : "=r" ((USItype) (sh)), \
743 "=&r" ((USItype) (sl)) \
744 : "0" ((USItype) (ah)), \
745 "g" ((USItype) (bh)), \
746 "1" ((USItype) (al)), \
747 "g" ((USItype) (bl)))
748 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP. */
749 #define umul_ppmm(w1, w0, u, v) \
750 ({union {UDItype __ll; \
751 struct {USItype __h, __l;} __i; \
752 } __xx; \
753 __asm__ ("movw %1,%R0
754 uemul %2,%0" \
755 : "=&r" (__xx.__ll) \
756 : "g" ((USItype) (u)), \
757 "g" ((USItype) (v))); \
758 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
759 #endif /* __pyr__ */
760
761 #if defined (__ibm032__) /* RT/ROMP */
762 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
763 __asm__ ("a %1,%5
764 ae %0,%3" \
765 : "=r" ((USItype) (sh)), \
766 "=&r" ((USItype) (sl)) \
767 : "%0" ((USItype) (ah)), \
768 "r" ((USItype) (bh)), \
769 "%1" ((USItype) (al)), \
770 "r" ((USItype) (bl)))
771 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
772 __asm__ ("s %1,%5
773 se %0,%3" \
774 : "=r" ((USItype) (sh)), \
775 "=&r" ((USItype) (sl)) \
776 : "0" ((USItype) (ah)), \
777 "r" ((USItype) (bh)), \
778 "1" ((USItype) (al)), \
779 "r" ((USItype) (bl)))
780 #define umul_ppmm(ph, pl, m0, m1) \
781 do { \
782 USItype __m0 = (m0), __m1 = (m1); \
783 __asm__ ( \
784 "s r2,r2
785 mts r10,%2
786 m r2,%3
787 m r2,%3
788 m r2,%3
789 m r2,%3
790 m r2,%3
791 m r2,%3
792 m r2,%3
793 m r2,%3
794 m r2,%3
795 m r2,%3
796 m r2,%3
797 m r2,%3
798 m r2,%3
799 m r2,%3
800 m r2,%3
801 m r2,%3
802 cas %0,r2,r0
803 mfs r10,%1" \
804 : "=r" ((USItype) (ph)), \
805 "=r" ((USItype) (pl)) \
806 : "%r" (__m0), \
807 "r" (__m1) \
808 : "r2"); \
809 (ph) += ((((SItype) __m0 >> 31) & __m1) \
810 + (((SItype) __m1 >> 31) & __m0)); \
811 } while (0)
812 #define UMUL_TIME 20
813 #define UDIV_TIME 200
814 #define count_leading_zeros(count, x) \
815 do { \
816 if ((x) >= 0x10000) \
817 __asm__ ("clz %0,%1" \
818 : "=r" ((USItype) (count)) \
819 : "r" ((USItype) (x) >> 16)); \
820 else \
821 { \
822 __asm__ ("clz %0,%1" \
823 : "=r" ((USItype) (count)) \
824 : "r" ((USItype) (x))); \
825 (count) += 16; \
826 } \
827 } while (0)
828 #endif
829
830 #if defined (__sparc__)
831 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
832 __asm__ ("addcc %r4,%5,%1
833 addx %r2,%3,%0" \
834 : "=r" ((USItype) (sh)), \
835 "=&r" ((USItype) (sl)) \
836 : "%rJ" ((USItype) (ah)), \
837 "rI" ((USItype) (bh)), \
838 "%rJ" ((USItype) (al)), \
839 "rI" ((USItype) (bl)) \
840 __CLOBBER_CC)
841 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
842 __asm__ ("subcc %r4,%5,%1
843 subx %r2,%3,%0" \
844 : "=r" ((USItype) (sh)), \
845 "=&r" ((USItype) (sl)) \
846 : "rJ" ((USItype) (ah)), \
847 "rI" ((USItype) (bh)), \
848 "rJ" ((USItype) (al)), \
849 "rI" ((USItype) (bl)) \
850 __CLOBBER_CC)
851 #if defined (__sparc_v8__)
852 #define umul_ppmm(w1, w0, u, v) \
853 __asm__ ("umul %2,%3,%1;rd %%y,%0" \
854 : "=r" ((USItype) (w1)), \
855 "=r" ((USItype) (w0)) \
856 : "r" ((USItype) (u)), \
857 "r" ((USItype) (v)))
858 #define udiv_qrnnd(q, r, n1, n0, d) \
859 __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
860 : "=&r" ((USItype) (q)), \
861 "=&r" ((USItype) (r)) \
862 : "r" ((USItype) (n1)), \
863 "r" ((USItype) (n0)), \
864 "r" ((USItype) (d)))
865 #else
866 #if defined (__sparclite__)
867 /* This has hardware multiply but not divide. It also has two additional
868 instructions scan (ffs from high bit) and divscc. */
869 #define umul_ppmm(w1, w0, u, v) \
870 __asm__ ("umul %2,%3,%1;rd %%y,%0" \
871 : "=r" ((USItype) (w1)), \
872 "=r" ((USItype) (w0)) \
873 : "r" ((USItype) (u)), \
874 "r" ((USItype) (v)))
875 #define udiv_qrnnd(q, r, n1, n0, d) \
876 __asm__ ("! Inlined udiv_qrnnd
877 wr %%g0,%2,%%y ! Not a delayed write for sparclite
878 tst %%g0
879 divscc %3,%4,%%g1
880 divscc %%g1,%4,%%g1
881 divscc %%g1,%4,%%g1
882 divscc %%g1,%4,%%g1
883 divscc %%g1,%4,%%g1
884 divscc %%g1,%4,%%g1
885 divscc %%g1,%4,%%g1
886 divscc %%g1,%4,%%g1
887 divscc %%g1,%4,%%g1
888 divscc %%g1,%4,%%g1
889 divscc %%g1,%4,%%g1
890 divscc %%g1,%4,%%g1
891 divscc %%g1,%4,%%g1
892 divscc %%g1,%4,%%g1
893 divscc %%g1,%4,%%g1
894 divscc %%g1,%4,%%g1
895 divscc %%g1,%4,%%g1
896 divscc %%g1,%4,%%g1
897 divscc %%g1,%4,%%g1
898 divscc %%g1,%4,%%g1
899 divscc %%g1,%4,%%g1
900 divscc %%g1,%4,%%g1
901 divscc %%g1,%4,%%g1
902 divscc %%g1,%4,%%g1
903 divscc %%g1,%4,%%g1
904 divscc %%g1,%4,%%g1
905 divscc %%g1,%4,%%g1
906 divscc %%g1,%4,%%g1
907 divscc %%g1,%4,%%g1
908 divscc %%g1,%4,%%g1
909 divscc %%g1,%4,%%g1
910 divscc %%g1,%4,%0
911 rd %%y,%1
912 bl,a 1f
913 add %1,%4,%1
914 1: ! End of inline udiv_qrnnd" \
915 : "=r" ((USItype) (q)), \
916 "=r" ((USItype) (r)) \
917 : "r" ((USItype) (n1)), \
918 "r" ((USItype) (n0)), \
919 "rI" ((USItype) (d)) \
920 : "%g1" __AND_CLOBBER_CC)
921 #define UDIV_TIME 37
922 #define count_leading_zeros(count, x) \
923 __asm__ ("scan %1,0,%0" \
924 : "=r" ((USItype) (x)) \
925 : "r" ((USItype) (count)))
926 #else
927 /* SPARC without integer multiplication and divide instructions.
928 (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
929 #define umul_ppmm(w1, w0, u, v) \
930 __asm__ ("! Inlined umul_ppmm
931 wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr
932 sra %3,31,%%g2 ! Don't move this insn
933 and %2,%%g2,%%g2 ! Don't move this insn
934 andcc %%g0,0,%%g1 ! Don't move this insn
935 mulscc %%g1,%3,%%g1
936 mulscc %%g1,%3,%%g1
937 mulscc %%g1,%3,%%g1
938 mulscc %%g1,%3,%%g1
939 mulscc %%g1,%3,%%g1
940 mulscc %%g1,%3,%%g1
941 mulscc %%g1,%3,%%g1
942 mulscc %%g1,%3,%%g1
943 mulscc %%g1,%3,%%g1
944 mulscc %%g1,%3,%%g1
945 mulscc %%g1,%3,%%g1
946 mulscc %%g1,%3,%%g1
947 mulscc %%g1,%3,%%g1
948 mulscc %%g1,%3,%%g1
949 mulscc %%g1,%3,%%g1
950 mulscc %%g1,%3,%%g1
951 mulscc %%g1,%3,%%g1
952 mulscc %%g1,%3,%%g1
953 mulscc %%g1,%3,%%g1
954 mulscc %%g1,%3,%%g1
955 mulscc %%g1,%3,%%g1
956 mulscc %%g1,%3,%%g1
957 mulscc %%g1,%3,%%g1
958 mulscc %%g1,%3,%%g1
959 mulscc %%g1,%3,%%g1
960 mulscc %%g1,%3,%%g1
961 mulscc %%g1,%3,%%g1
962 mulscc %%g1,%3,%%g1
963 mulscc %%g1,%3,%%g1
964 mulscc %%g1,%3,%%g1
965 mulscc %%g1,%3,%%g1
966 mulscc %%g1,%3,%%g1
967 mulscc %%g1,0,%%g1
968 add %%g1,%%g2,%0
969 rd %%y,%1" \
970 : "=r" ((USItype) (w1)), \
971 "=r" ((USItype) (w0)) \
972 : "%rI" ((USItype) (u)), \
973 "r" ((USItype) (v)) \
974 : "%g1", "%g2" __AND_CLOBBER_CC)
975 #define UMUL_TIME 39 /* 39 instructions */
976 /* It's quite necessary to add this much assembler for the sparc.
977 The default udiv_qrnnd (in C) is more than 10 times slower! */
978 #define udiv_qrnnd(q, r, n1, n0, d) \
979 __asm__ ("! Inlined udiv_qrnnd
980 mov 32,%%g1
981 subcc %1,%2,%%g0
982 1: bcs 5f
983 addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb
984 sub %1,%2,%1 ! this kills msb of n
985 addx %1,%1,%1 ! so this can't give carry
986 subcc %%g1,1,%%g1
987 2: bne 1b
988 subcc %1,%2,%%g0
989 bcs 3f
990 addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb
991 b 3f
992 sub %1,%2,%1 ! this kills msb of n
993 4: sub %1,%2,%1
994 5: addxcc %1,%1,%1
995 bcc 2b
996 subcc %%g1,1,%%g1
997 ! Got carry from n. Subtract next step to cancel this carry.
998 bne 4b
999 addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb
1000 sub %1,%2,%1
1001 3: xnor %0,0,%0
1002 ! End of inline udiv_qrnnd" \
1003 : "=&r" ((USItype) (q)), \
1004 "=&r" ((USItype) (r)) \
1005 : "r" ((USItype) (d)), \
1006 "1" ((USItype) (n1)), \
1007 "0" ((USItype) (n0)) : "%g1" __AND_CLOBBER_CC)
1008 #define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
1009 #endif /* __sparclite__ */
1010 #endif /* __sparc_v8__ */
1011 #endif /* __sparc__ */
1012
1013 #if defined (__vax__)
1014 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1015 __asm__ ("addl2 %5,%1
1016 adwc %3,%0" \
1017 : "=g" ((USItype) (sh)), \
1018 "=&g" ((USItype) (sl)) \
1019 : "%0" ((USItype) (ah)), \
1020 "g" ((USItype) (bh)), \
1021 "%1" ((USItype) (al)), \
1022 "g" ((USItype) (bl)))
1023 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1024 __asm__ ("subl2 %5,%1
1025 sbwc %3,%0" \
1026 : "=g" ((USItype) (sh)), \
1027 "=&g" ((USItype) (sl)) \
1028 : "0" ((USItype) (ah)), \
1029 "g" ((USItype) (bh)), \
1030 "1" ((USItype) (al)), \
1031 "g" ((USItype) (bl)))
1032 #define umul_ppmm(xh, xl, m0, m1) \
1033 do { \
1034 union { \
1035 UDItype __ll; \
1036 struct {USItype __l, __h;} __i; \
1037 } __xx; \
1038 USItype __m0 = (m0), __m1 = (m1); \
1039 __asm__ ("emul %1,%2,$0,%0" \
1040 : "=r" (__xx.__ll) \
1041 : "g" (__m0), \
1042 "g" (__m1)); \
1043 (xh) = __xx.__i.__h; \
1044 (xl) = __xx.__i.__l; \
1045 (xh) += ((((SItype) __m0 >> 31) & __m1) \
1046 + (((SItype) __m1 >> 31) & __m0)); \
1047 } while (0)
1048 #define sdiv_qrnnd(q, r, n1, n0, d) \
1049 do { \
1050 union {DItype __ll; \
1051 struct {SItype __l, __h;} __i; \
1052 } __xx; \
1053 __xx.__i.__h = n1; __xx.__i.__l = n0; \
1054 __asm__ ("ediv %3,%2,%0,%1" \
1055 : "=g" (q), "=g" (r) \
1056 : "g" (__xx.__ll), "g" (d)); \
1057 } while (0)
1058 #endif /* __vax__ */
1059
1060 #endif /* __GNUC__ */
1061
1062 /* If this machine has no inline assembler, use C macros. */
1063
1064 #if !defined (add_ssaaaa)
1065 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1066 do { \
1067 USItype __x; \
1068 __x = (al) + (bl); \
1069 (sh) = (ah) + (bh) + (__x < (al)); \
1070 (sl) = __x; \
1071 } while (0)
1072 #endif
1073
1074 #if !defined (sub_ddmmss)
1075 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1076 do { \
1077 USItype __x; \
1078 __x = (al) - (bl); \
1079 (sh) = (ah) - (bh) - (__x > (al)); \
1080 (sl) = __x; \
1081 } while (0)
1082 #endif
1083
1084 #if !defined (umul_ppmm)
1085 #define umul_ppmm(w1, w0, u, v) \
1086 do { \
1087 USItype __x0, __x1, __x2, __x3; \
1088 USItype __ul, __vl, __uh, __vh; \
1089 \
1090 __ul = __ll_lowpart (u); \
1091 __uh = __ll_highpart (u); \
1092 __vl = __ll_lowpart (v); \
1093 __vh = __ll_highpart (v); \
1094 \
1095 __x0 = (USItype) __ul * __vl; \
1096 __x1 = (USItype) __ul * __vh; \
1097 __x2 = (USItype) __uh * __vl; \
1098 __x3 = (USItype) __uh * __vh; \
1099 \
1100 __x1 += __ll_highpart (__x0);/* this can't give carry */ \
1101 __x1 += __x2; /* but this indeed can */ \
1102 if (__x1 < __x2) /* did we get it? */ \
1103 __x3 += __ll_B; /* yes, add it in the proper pos. */ \
1104 \
1105 (w1) = __x3 + __ll_highpart (__x1); \
1106 (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
1107 } while (0)
1108 #endif
1109
1110 #if !defined (__umulsidi3)
1111 #define __umulsidi3(u, v) \
1112 ({DIunion __w; \
1113 umul_ppmm (__w.s.high, __w.s.low, u, v); \
1114 __w.ll; })
1115 #endif
1116
1117 /* Define this unconditionally, so it can be used for debugging. */
1118 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1119 do { \
1120 USItype __d1, __d0, __q1, __q0; \
1121 USItype __r1, __r0, __m; \
1122 __d1 = __ll_highpart (d); \
1123 __d0 = __ll_lowpart (d); \
1124 \
1125 __r1 = (n1) % __d1; \
1126 __q1 = (n1) / __d1; \
1127 __m = (USItype) __q1 * __d0; \
1128 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
1129 if (__r1 < __m) \
1130 { \
1131 __q1--, __r1 += (d); \
1132 if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1133 if (__r1 < __m) \
1134 __q1--, __r1 += (d); \
1135 } \
1136 __r1 -= __m; \
1137 \
1138 __r0 = __r1 % __d1; \
1139 __q0 = __r1 / __d1; \
1140 __m = (USItype) __q0 * __d0; \
1141 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
1142 if (__r0 < __m) \
1143 { \
1144 __q0--, __r0 += (d); \
1145 if (__r0 >= (d)) \
1146 if (__r0 < __m) \
1147 __q0--, __r0 += (d); \
1148 } \
1149 __r0 -= __m; \
1150 \
1151 (q) = (USItype) __q1 * __ll_B | __q0; \
1152 (r) = __r0; \
1153 } while (0)
1154
1155 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1156 __udiv_w_sdiv (defined in libgcc or elsewhere). */
1157 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1158 #define udiv_qrnnd(q, r, nh, nl, d) \
1159 do { \
1160 USItype __r; \
1161 (q) = __udiv_w_sdiv (&__r, nh, nl, d); \
1162 (r) = __r; \
1163 } while (0)
1164 #endif
1165
1166 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
1167 #if !defined (udiv_qrnnd)
1168 #define UDIV_NEEDS_NORMALIZATION 1
1169 #define udiv_qrnnd __udiv_qrnnd_c
1170 #endif
1171
1172 #if !defined (count_leading_zeros)
1173 extern const UQItype __clz_tab[];
1174 #define count_leading_zeros(count, x) \
1175 do { \
1176 USItype __xr = (x); \
1177 USItype __a; \
1178 \
1179 if (SI_TYPE_SIZE <= 32) \
1180 { \
1181 __a = __xr < (1<<2*__BITS4) \
1182 ? (__xr < (1<<__BITS4) ? 0 : __BITS4) \
1183 : (__xr < (1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
1184 } \
1185 else \
1186 { \
1187 for (__a = SI_TYPE_SIZE - 8; __a > 0; __a -= 8) \
1188 if (((__xr >> __a) & 0xff) != 0) \
1189 break; \
1190 } \
1191 \
1192 (count) = SI_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \
1193 } while (0)
1194 #endif
1195
1196 #ifndef UDIV_NEEDS_NORMALIZATION
1197 #define UDIV_NEEDS_NORMALIZATION 0
1198 #endif
Mirror of the offical gcc git repository hosted at gcc.gnu.org