1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
88 static rtx
cond_exec_get_condition (rtx_insn
*);
89 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
90 static int noce_operand_ok (const_rtx
);
91 static void merge_if_block (ce_if_block
*);
92 static int find_cond_trap (basic_block
, edge
, edge
);
93 static basic_block
find_if_header (basic_block
, int);
94 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
95 static int noce_find_if_block (basic_block
, edge
, edge
, int);
96 static int cond_exec_find_if_block (ce_if_block
*);
97 static int find_if_case_1 (basic_block
, edge
, edge
);
98 static int find_if_case_2 (basic_block
, edge
, edge
);
99 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
101 static void noce_emit_move_insn (rtx
, rtx
);
102 static rtx_insn
*block_has_only_trap (basic_block
);
104 /* Count the number of non-jump active insns in BB. */
107 count_bb_insns (const_basic_block bb
)
110 rtx_insn
*insn
= BB_HEAD (bb
);
114 if (active_insn_p (insn
) && !JUMP_P (insn
))
117 if (insn
== BB_END (bb
))
119 insn
= NEXT_INSN (insn
);
125 /* Determine whether the total insn_rtx_cost on non-jump insns in
126 basic block BB is less than MAX_COST. This function returns
127 false if the cost of any instruction could not be estimated.
129 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
130 as those insns are being speculated. MAX_COST is scaled with SCALE
131 plus a small fudge factor. */
134 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
137 rtx_insn
*insn
= BB_HEAD (bb
);
138 bool speed
= optimize_bb_for_speed_p (bb
);
140 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
141 applied to insn_rtx_cost when optimizing for size. Only do
142 this after combine because if-conversion might interfere with
143 passes before combine.
145 Use optimize_function_for_speed_p instead of the pre-defined
146 variable speed to make sure it is set to same value for all
147 basic blocks in one if-conversion transformation. */
148 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
149 scale
= REG_BR_PROB_BASE
;
150 /* Our branch probability/scaling factors are just estimates and don't
151 account for cases where we can get speculation for free and other
152 secondary benefits. So we fudge the scale factor to make speculating
153 appear a little more profitable when optimizing for performance. */
155 scale
+= REG_BR_PROB_BASE
/ 8;
162 if (NONJUMP_INSN_P (insn
))
164 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
168 /* If this instruction is the load or set of a "stack" register,
169 such as a floating point register on x87, then the cost of
170 speculatively executing this insn may need to include
171 the additional cost of popping its result off of the
172 register stack. Unfortunately, correctly recognizing and
173 accounting for this additional overhead is tricky, so for
174 now we simply prohibit such speculative execution. */
177 rtx set
= single_set (insn
);
178 if (set
&& STACK_REG_P (SET_DEST (set
)))
184 if (count
>= max_cost
)
187 else if (CALL_P (insn
))
190 if (insn
== BB_END (bb
))
192 insn
= NEXT_INSN (insn
);
198 /* Return the first non-jump active insn in the basic block. */
201 first_active_insn (basic_block bb
)
203 rtx_insn
*insn
= BB_HEAD (bb
);
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
212 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
214 if (insn
== BB_END (bb
))
216 insn
= NEXT_INSN (insn
);
225 /* Return the last non-jump active (non-jump) insn in the basic block. */
228 last_active_insn (basic_block bb
, int skip_use_p
)
230 rtx_insn
*insn
= BB_END (bb
);
231 rtx_insn
*head
= BB_HEAD (bb
);
235 || DEBUG_INSN_P (insn
)
237 && NONJUMP_INSN_P (insn
)
238 && GET_CODE (PATTERN (insn
)) == USE
))
242 insn
= PREV_INSN (insn
);
251 /* Return the active insn before INSN inside basic block CURR_BB. */
254 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
256 if (!insn
|| insn
== BB_HEAD (curr_bb
))
259 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
261 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
264 /* No other active insn all the way to the start of the basic block. */
265 if (insn
== BB_HEAD (curr_bb
))
272 /* Return the active insn after INSN inside basic block CURR_BB. */
275 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
277 if (!insn
|| insn
== BB_END (curr_bb
))
280 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
282 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
285 /* No other active insn all the way to the end of the basic block. */
286 if (insn
== BB_END (curr_bb
))
293 /* Return the basic block reached by falling though the basic block BB. */
296 block_fallthru (basic_block bb
)
298 edge e
= find_fallthru_edge (bb
->succs
);
300 return (e
) ? e
->dest
: NULL_BLOCK
;
303 /* Return true if RTXs A and B can be safely interchanged. */
306 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
308 if (!rtx_equal_p (a
, b
))
311 if (GET_CODE (a
) != MEM
)
314 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
315 reference is not. Interchanging a dead type-unsafe memory reference with
316 a live type-safe one creates a live type-unsafe memory reference, in other
317 words, it makes the program illegal.
318 We check here conservatively whether the two memory references have equal
319 memory attributes. */
321 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
325 /* Go through a bunch of insns, converting them to conditional
326 execution format if possible. Return TRUE if all of the non-note
327 insns were processed. */
330 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
331 /* if block information */rtx_insn
*start
,
332 /* first insn to look at */rtx end
,
333 /* last insn to look at */rtx test
,
334 /* conditional execution test */int prob_val
,
335 /* probability of branch taken. */int mod_ok
)
337 int must_be_last
= FALSE
;
345 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
347 /* dwarf2out can't cope with conditional prologues. */
348 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
351 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
354 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
356 /* dwarf2out can't cope with conditional unwind info. */
357 if (RTX_FRAME_RELATED_P (insn
))
360 /* Remove USE insns that get in the way. */
361 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
363 /* ??? Ug. Actually unlinking the thing is problematic,
364 given what we'd have to coordinate with our callers. */
365 SET_INSN_DELETED (insn
);
369 /* Last insn wasn't last? */
373 if (modified_in_p (test
, insn
))
380 /* Now build the conditional form of the instruction. */
381 pattern
= PATTERN (insn
);
382 xtest
= copy_rtx (test
);
384 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
386 if (GET_CODE (pattern
) == COND_EXEC
)
388 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
391 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
392 COND_EXEC_TEST (pattern
));
393 pattern
= COND_EXEC_CODE (pattern
);
396 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
398 /* If the machine needs to modify the insn being conditionally executed,
399 say for example to force a constant integer operand into a temp
400 register, do so here. */
401 #ifdef IFCVT_MODIFY_INSN
402 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
407 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
409 if (CALL_P (insn
) && prob_val
>= 0)
410 validate_change (insn
, ®_NOTES (insn
),
411 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
412 prob_val
, REG_NOTES (insn
)), 1);
422 /* Return the condition for a jump. Do not do any special processing. */
425 cond_exec_get_condition (rtx_insn
*jump
)
429 if (any_condjump_p (jump
))
430 test_if
= SET_SRC (pc_set (jump
));
433 cond
= XEXP (test_if
, 0);
435 /* If this branches to JUMP_LABEL when the condition is false,
436 reverse the condition. */
437 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
438 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
440 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
444 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
451 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
452 to conditional execution. Return TRUE if we were successful at
453 converting the block. */
456 cond_exec_process_if_block (ce_if_block
* ce_info
,
457 /* if block information */int do_multiple_p
)
459 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
460 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
461 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
462 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
463 rtx_insn
*then_start
; /* first insn in THEN block */
464 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
465 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
466 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
467 int max
; /* max # of insns to convert. */
468 int then_mod_ok
; /* whether conditional mods are ok in THEN */
469 rtx true_expr
; /* test for else block insns */
470 rtx false_expr
; /* test for then block insns */
471 int true_prob_val
; /* probability of else block */
472 int false_prob_val
; /* probability of then block */
473 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
474 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
475 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
476 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
477 int then_n_insns
, else_n_insns
, n_insns
;
478 enum rtx_code false_code
;
481 /* If test is comprised of && or || elements, and we've failed at handling
482 all of them together, just use the last test if it is the special case of
483 && elements without an ELSE block. */
484 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
486 if (else_bb
|| ! ce_info
->and_and_p
)
489 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
490 ce_info
->num_multiple_test_blocks
= 0;
491 ce_info
->num_and_and_blocks
= 0;
492 ce_info
->num_or_or_blocks
= 0;
495 /* Find the conditional jump to the ELSE or JOIN part, and isolate
497 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
501 /* If the conditional jump is more than just a conditional jump,
502 then we can not do conditional execution conversion on this block. */
503 if (! onlyjump_p (BB_END (test_bb
)))
506 /* Collect the bounds of where we're to search, skipping any labels, jumps
507 and notes at the beginning and end of the block. Then count the total
508 number of insns and see if it is small enough to convert. */
509 then_start
= first_active_insn (then_bb
);
510 then_end
= last_active_insn (then_bb
, TRUE
);
511 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
512 n_insns
= then_n_insns
;
513 max
= MAX_CONDITIONAL_EXECUTE
;
520 else_start
= first_active_insn (else_bb
);
521 else_end
= last_active_insn (else_bb
, TRUE
);
522 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
523 n_insns
+= else_n_insns
;
525 /* Look for matching sequences at the head and tail of the two blocks,
526 and limit the range of insns to be converted if possible. */
527 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
528 &then_first_tail
, &else_first_tail
,
530 if (then_first_tail
== BB_HEAD (then_bb
))
531 then_start
= then_end
= NULL
;
532 if (else_first_tail
== BB_HEAD (else_bb
))
533 else_start
= else_end
= NULL
;
538 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
540 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
541 n_insns
-= 2 * n_matching
;
546 && then_n_insns
> n_matching
547 && else_n_insns
> n_matching
)
549 int longest_match
= MIN (then_n_insns
- n_matching
,
550 else_n_insns
- n_matching
);
552 = flow_find_head_matching_sequence (then_bb
, else_bb
,
561 /* We won't pass the insns in the head sequence to
562 cond_exec_process_insns, so we need to test them here
563 to make sure that they don't clobber the condition. */
564 for (insn
= BB_HEAD (then_bb
);
565 insn
!= NEXT_INSN (then_last_head
);
566 insn
= NEXT_INSN (insn
))
567 if (!LABEL_P (insn
) && !NOTE_P (insn
)
568 && !DEBUG_INSN_P (insn
)
569 && modified_in_p (test_expr
, insn
))
573 if (then_last_head
== then_end
)
574 then_start
= then_end
= NULL
;
575 if (else_last_head
== else_end
)
576 else_start
= else_end
= NULL
;
581 then_start
= find_active_insn_after (then_bb
, then_last_head
);
583 else_start
= find_active_insn_after (else_bb
, else_last_head
);
584 n_insns
-= 2 * n_matching
;
592 /* Map test_expr/test_jump into the appropriate MD tests to use on
593 the conditionally executed code. */
595 true_expr
= test_expr
;
597 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
598 if (false_code
!= UNKNOWN
)
599 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
600 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
602 false_expr
= NULL_RTX
;
604 #ifdef IFCVT_MODIFY_TESTS
605 /* If the machine description needs to modify the tests, such as setting a
606 conditional execution register from a comparison, it can do so here. */
607 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
609 /* See if the conversion failed. */
610 if (!true_expr
|| !false_expr
)
614 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
617 true_prob_val
= XINT (note
, 0);
618 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
626 /* If we have && or || tests, do them here. These tests are in the adjacent
627 blocks after the first block containing the test. */
628 if (ce_info
->num_multiple_test_blocks
> 0)
630 basic_block bb
= test_bb
;
631 basic_block last_test_bb
= ce_info
->last_test_bb
;
638 rtx_insn
*start
, *end
;
640 enum rtx_code f_code
;
642 bb
= block_fallthru (bb
);
643 start
= first_active_insn (bb
);
644 end
= last_active_insn (bb
, TRUE
);
646 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
647 false_prob_val
, FALSE
))
650 /* If the conditional jump is more than just a conditional jump, then
651 we can not do conditional execution conversion on this block. */
652 if (! onlyjump_p (BB_END (bb
)))
655 /* Find the conditional jump and isolate the test. */
656 t
= cond_exec_get_condition (BB_END (bb
));
660 f_code
= reversed_comparison_code (t
, BB_END (bb
));
661 if (f_code
== UNKNOWN
)
664 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
665 if (ce_info
->and_and_p
)
667 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
668 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
672 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
673 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
676 /* If the machine description needs to modify the tests, such as
677 setting a conditional execution register from a comparison, it can
679 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
680 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
682 /* See if the conversion failed. */
690 while (bb
!= last_test_bb
);
693 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
694 on then THEN block. */
695 then_mod_ok
= (else_bb
== NULL_BLOCK
);
697 /* Go through the THEN and ELSE blocks converting the insns if possible
698 to conditional execution. */
702 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
703 false_expr
, false_prob_val
,
707 if (else_bb
&& else_end
708 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
709 true_expr
, true_prob_val
, TRUE
))
712 /* If we cannot apply the changes, fail. Do not go through the normal fail
713 processing, since apply_change_group will call cancel_changes. */
714 if (! apply_change_group ())
716 #ifdef IFCVT_MODIFY_CANCEL
717 /* Cancel any machine dependent changes. */
718 IFCVT_MODIFY_CANCEL (ce_info
);
723 #ifdef IFCVT_MODIFY_FINAL
724 /* Do any machine dependent final modifications. */
725 IFCVT_MODIFY_FINAL (ce_info
);
728 /* Conversion succeeded. */
730 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
731 n_insns
, (n_insns
== 1) ? " was" : "s were");
733 /* Merge the blocks! If we had matching sequences, make sure to delete one
734 copy at the appropriate location first: delete the copy in the THEN branch
735 for a tail sequence so that the remaining one is executed last for both
736 branches, and delete the copy in the ELSE branch for a head sequence so
737 that the remaining one is executed first for both branches. */
740 rtx_insn
*from
= then_first_tail
;
742 from
= find_active_insn_after (then_bb
, from
);
743 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
746 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
748 merge_if_block (ce_info
);
749 cond_exec_changed_p
= TRUE
;
753 #ifdef IFCVT_MODIFY_CANCEL
754 /* Cancel any machine dependent changes. */
755 IFCVT_MODIFY_CANCEL (ce_info
);
762 /* Used by noce_process_if_block to communicate with its subroutines.
764 The subroutines know that A and B may be evaluated freely. They
765 know that X is a register. They should insert new instructions
766 before cond_earliest. */
770 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
771 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
773 /* The jump that ends TEST_BB. */
776 /* The jump condition. */
779 /* New insns should be inserted before this one. */
780 rtx_insn
*cond_earliest
;
782 /* Insns in the THEN and ELSE block. There is always just this
783 one insns in those blocks. The insns are single_set insns.
784 If there was no ELSE block, INSN_B is the last insn before
785 COND_EARLIEST, or NULL_RTX. In the former case, the insn
786 operands are still valid, as if INSN_B was moved down below
788 rtx_insn
*insn_a
, *insn_b
;
790 /* The SET_SRC of INSN_A and INSN_B. */
793 /* The SET_DEST of INSN_A. */
796 /* The original set destination that the THEN and ELSE basic blocks finally
797 write their result to. */
799 /* True if this if block is not canonical. In the canonical form of
800 if blocks, the THEN_BB is the block reached via the fallthru edge
801 from TEST_BB. For the noce transformations, we allow the symmetric
803 bool then_else_reversed
;
805 /* True if the contents of then_bb and else_bb are a
806 simple single set instruction. */
810 /* The total rtx cost of the instructions in then_bb and else_bb. */
811 unsigned int then_cost
;
812 unsigned int else_cost
;
814 /* Estimated cost of the particular branch instruction. */
815 unsigned int branch_cost
;
818 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
819 static int noce_try_move (struct noce_if_info
*);
820 static int noce_try_ifelse_collapse (struct noce_if_info
*);
821 static int noce_try_store_flag (struct noce_if_info
*);
822 static int noce_try_addcc (struct noce_if_info
*);
823 static int noce_try_store_flag_constants (struct noce_if_info
*);
824 static int noce_try_store_flag_mask (struct noce_if_info
*);
825 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
827 static int noce_try_cmove (struct noce_if_info
*);
828 static int noce_try_cmove_arith (struct noce_if_info
*);
829 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
830 static int noce_try_minmax (struct noce_if_info
*);
831 static int noce_try_abs (struct noce_if_info
*);
832 static int noce_try_sign_mask (struct noce_if_info
*);
834 /* Helper function for noce_try_store_flag*. */
837 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
840 rtx cond
= if_info
->cond
;
844 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
845 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
847 /* If earliest == jump, or when the condition is complex, try to
848 build the store_flag insn directly. */
852 rtx set
= pc_set (if_info
->jump
);
853 cond
= XEXP (SET_SRC (set
), 0);
854 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
855 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
856 reversep
= !reversep
;
857 if (if_info
->then_else_reversed
)
858 reversep
= !reversep
;
862 code
= reversed_comparison_code (cond
, if_info
->jump
);
864 code
= GET_CODE (cond
);
866 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
867 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
869 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
871 rtx set
= gen_rtx_SET (x
, src
);
874 rtx_insn
*insn
= emit_insn (set
);
876 if (recog_memoized (insn
) >= 0)
878 rtx_insn
*seq
= get_insns ();
882 if_info
->cond_earliest
= if_info
->jump
;
890 /* Don't even try if the comparison operands or the mode of X are weird. */
891 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
894 return emit_store_flag (x
, code
, XEXP (cond
, 0),
895 XEXP (cond
, 1), VOIDmode
,
896 (code
== LTU
|| code
== LEU
897 || code
== GEU
|| code
== GTU
), normalize
);
900 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
901 X is the destination/target and Y is the value to copy. */
904 noce_emit_move_insn (rtx x
, rtx y
)
906 machine_mode outmode
;
910 if (GET_CODE (x
) != STRICT_LOW_PART
)
912 rtx_insn
*seq
, *insn
;
917 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
918 otherwise construct a suitable SET pattern ourselves. */
919 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
920 ? emit_move_insn (x
, y
)
921 : emit_insn (gen_rtx_SET (x
, y
));
925 if (recog_memoized (insn
) <= 0)
927 if (GET_CODE (x
) == ZERO_EXTRACT
)
929 rtx op
= XEXP (x
, 0);
930 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
931 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
933 /* store_bit_field expects START to be relative to
934 BYTES_BIG_ENDIAN and adjusts this value for machines with
935 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
936 invoke store_bit_field again it is necessary to have the START
937 value from the first call. */
938 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
941 start
= BITS_PER_UNIT
- start
- size
;
944 gcc_assert (REG_P (op
));
945 start
= BITS_PER_WORD
- start
- size
;
949 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
950 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
954 switch (GET_RTX_CLASS (GET_CODE (y
)))
957 ot
= code_to_optab (GET_CODE (y
));
961 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
962 if (target
!= NULL_RTX
)
965 emit_move_insn (x
, target
);
974 ot
= code_to_optab (GET_CODE (y
));
978 target
= expand_binop (GET_MODE (y
), ot
,
979 XEXP (y
, 0), XEXP (y
, 1),
981 if (target
!= NULL_RTX
)
984 emit_move_insn (x
, target
);
1000 outer
= XEXP (x
, 0);
1001 inner
= XEXP (outer
, 0);
1002 outmode
= GET_MODE (outer
);
1003 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1004 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1005 0, 0, outmode
, y
, false);
1008 /* Return the CC reg if it is used in COND. */
1011 cc_in_cond (rtx cond
)
1013 if (have_cbranchcc4
&& cond
1014 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1015 return XEXP (cond
, 0);
1020 /* Return sequence of instructions generated by if conversion. This
1021 function calls end_sequence() to end the current stream, ensures
1022 that the instructions are unshared, recognizable non-jump insns.
1023 On failure, this function returns a NULL_RTX. */
1026 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1029 rtx_insn
*seq
= get_insns ();
1030 rtx cc
= cc_in_cond (if_info
->cond
);
1032 set_used_flags (if_info
->x
);
1033 set_used_flags (if_info
->cond
);
1034 set_used_flags (if_info
->a
);
1035 set_used_flags (if_info
->b
);
1037 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1038 set_used_flags (insn
);
1040 unshare_all_rtl_in_chain (seq
);
1043 /* Make sure that all of the instructions emitted are recognizable,
1044 and that we haven't introduced a new jump instruction.
1045 As an exercise for the reader, build a general mechanism that
1046 allows proper placement of required clobbers. */
1047 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1049 || recog_memoized (insn
) == -1
1050 /* Make sure new generated code does not clobber CC. */
1051 || (cc
&& set_of (cc
, insn
)))
1057 /* Return true iff the then and else basic block (if it exists)
1058 consist of a single simple set instruction. */
1061 noce_simple_bbs (struct noce_if_info
*if_info
)
1063 if (!if_info
->then_simple
)
1066 if (if_info
->else_bb
)
1067 return if_info
->else_simple
;
1072 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1073 "if (a == b) x = a; else x = b" into "x = b". */
1076 noce_try_move (struct noce_if_info
*if_info
)
1078 rtx cond
= if_info
->cond
;
1079 enum rtx_code code
= GET_CODE (cond
);
1083 if (code
!= NE
&& code
!= EQ
)
1086 if (!noce_simple_bbs (if_info
))
1089 /* This optimization isn't valid if either A or B could be a NaN
1090 or a signed zero. */
1091 if (HONOR_NANS (if_info
->x
)
1092 || HONOR_SIGNED_ZEROS (if_info
->x
))
1095 /* Check whether the operands of the comparison are A and in
1097 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1098 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1099 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1100 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1102 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1105 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1107 /* Avoid generating the move if the source is the destination. */
1108 if (! rtx_equal_p (if_info
->x
, y
))
1111 noce_emit_move_insn (if_info
->x
, y
);
1112 seq
= end_ifcvt_sequence (if_info
);
1116 emit_insn_before_setloc (seq
, if_info
->jump
,
1117 INSN_LOCATION (if_info
->insn_a
));
1124 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1125 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1126 If that is the case, emit the result into x. */
1129 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1131 if (!noce_simple_bbs (if_info
))
1134 machine_mode mode
= GET_MODE (if_info
->x
);
1135 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1136 if_info
->cond
, if_info
->b
,
1139 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1144 noce_emit_move_insn (if_info
->x
, if_then_else
);
1145 seq
= end_ifcvt_sequence (if_info
);
1149 emit_insn_before_setloc (seq
, if_info
->jump
,
1150 INSN_LOCATION (if_info
->insn_a
));
1155 /* Convert "if (test) x = 1; else x = 0".
1157 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1158 tried in noce_try_store_flag_constants after noce_try_cmove has had
1159 a go at the conversion. */
1162 noce_try_store_flag (struct noce_if_info
*if_info
)
1168 if (!noce_simple_bbs (if_info
))
1171 if (CONST_INT_P (if_info
->b
)
1172 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1173 && if_info
->a
== const0_rtx
)
1175 else if (if_info
->b
== const0_rtx
1176 && CONST_INT_P (if_info
->a
)
1177 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1178 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1186 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1189 if (target
!= if_info
->x
)
1190 noce_emit_move_insn (if_info
->x
, target
);
1192 seq
= end_ifcvt_sequence (if_info
);
1196 emit_insn_before_setloc (seq
, if_info
->jump
,
1197 INSN_LOCATION (if_info
->insn_a
));
1208 /* Convert "if (test) x = -A; else x = A" into
1209 x = A; if (test) x = -x if the machine can do the
1210 conditional negate form of this cheaply.
1211 Try this before noce_try_cmove that will just load the
1212 immediates into two registers and do a conditional select
1213 between them. If the target has a conditional negate or
1214 conditional invert operation we can save a potentially
1215 expensive constant synthesis. */
1218 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1220 if (!noce_simple_bbs (if_info
))
1223 if (!CONST_INT_P (if_info
->a
)
1224 || !CONST_INT_P (if_info
->b
)
1225 || !REG_P (if_info
->x
))
1228 machine_mode mode
= GET_MODE (if_info
->x
);
1230 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1231 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1233 rtx cond
= if_info
->cond
;
1241 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1243 else if (val_a
== ~val_b
)
1251 rtx tmp
= gen_reg_rtx (mode
);
1252 noce_emit_move_insn (tmp
, if_info
->a
);
1254 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1258 rtx_insn
*seq
= get_insns ();
1266 if (target
!= if_info
->x
)
1267 noce_emit_move_insn (if_info
->x
, target
);
1269 seq
= end_ifcvt_sequence (if_info
);
1274 emit_insn_before_setloc (seq
, if_info
->jump
,
1275 INSN_LOCATION (if_info
->insn_a
));
1284 /* Convert "if (test) x = a; else x = b", for A and B constant.
1285 Also allow A = y + c1, B = y + c2, with a common y between A
1289 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1294 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1297 machine_mode mode
= GET_MODE (if_info
->x
);;
1298 rtx common
= NULL_RTX
;
1303 /* Handle cases like x := test ? y + 3 : y + 4. */
1304 if (GET_CODE (a
) == PLUS
1305 && GET_CODE (b
) == PLUS
1306 && CONST_INT_P (XEXP (a
, 1))
1307 && CONST_INT_P (XEXP (b
, 1))
1308 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1309 /* Allow expressions that are not using the result or plain
1310 registers where we handle overlap below. */
1311 && (REG_P (XEXP (a
, 0))
1312 || (noce_operand_ok (XEXP (a
, 0))
1313 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0))))
1314 && if_info
->branch_cost
>= 2)
1316 common
= XEXP (a
, 0);
1321 if (!noce_simple_bbs (if_info
))
1327 ifalse
= INTVAL (a
);
1329 bool subtract_flag_p
= false;
1331 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1332 /* Make sure we can represent the difference between the two values. */
1334 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1337 diff
= trunc_int_for_mode (diff
, mode
);
1339 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1343 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1346 /* We could collapse these cases but it is easier to follow the
1347 diff/STORE_FLAG_VALUE combinations when they are listed
1351 => 4 + (test != 0). */
1352 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1355 => can_reverse | 4 + (test == 0)
1356 !can_reverse | 3 - (test != 0). */
1357 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1359 reversep
= can_reverse
;
1360 subtract_flag_p
= !can_reverse
;
1361 /* If we need to subtract the flag and we have PLUS-immediate
1362 A and B then it is unlikely to be beneficial to play tricks
1364 if (subtract_flag_p
&& common
)
1368 => can_reverse | 3 + (test == 0)
1369 !can_reverse | 4 - (test != 0). */
1370 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1372 reversep
= can_reverse
;
1373 subtract_flag_p
= !can_reverse
;
1374 /* If we need to subtract the flag and we have PLUS-immediate
1375 A and B then it is unlikely to be beneficial to play tricks
1377 if (subtract_flag_p
&& common
)
1381 => 4 + (test != 0). */
1382 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1387 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1388 && (STORE_FLAG_VALUE
== 1
1389 || if_info
->branch_cost
>= 2))
1391 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1392 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1397 else if (itrue
== -1
1398 && (STORE_FLAG_VALUE
== -1
1399 || if_info
->branch_cost
>= 2))
1401 else if (ifalse
== -1 && can_reverse
1402 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1412 std::swap (itrue
, ifalse
);
1413 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1418 /* If we have x := test ? x + 3 : x + 4 then move the original
1419 x out of the way while we store flags. */
1420 if (common
&& rtx_equal_p (common
, if_info
->x
))
1422 common
= gen_reg_rtx (mode
);
1423 noce_emit_move_insn (common
, if_info
->x
);
1426 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1433 /* if (test) x = 3; else x = 4;
1434 => x = 3 + (test == 0); */
1435 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1437 /* Add the common part now. This may allow combine to merge this
1438 with the store flag operation earlier into some sort of conditional
1439 increment/decrement if the target allows it. */
1441 target
= expand_simple_binop (mode
, PLUS
,
1443 target
, 0, OPTAB_WIDEN
);
1445 /* Always use ifalse here. It should have been swapped with itrue
1446 when appropriate when reversep is true. */
1447 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1448 gen_int_mode (ifalse
, mode
), target
,
1449 if_info
->x
, 0, OPTAB_WIDEN
);
1451 /* Other cases are not beneficial when the original A and B are PLUS
1458 /* if (test) x = 8; else x = 0;
1459 => x = (test != 0) << 3; */
1460 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1462 target
= expand_simple_binop (mode
, ASHIFT
,
1463 target
, GEN_INT (tmp
), if_info
->x
, 0,
1467 /* if (test) x = -1; else x = b;
1468 => x = -(test != 0) | b; */
1469 else if (itrue
== -1)
1471 target
= expand_simple_binop (mode
, IOR
,
1472 target
, gen_int_mode (ifalse
, mode
),
1473 if_info
->x
, 0, OPTAB_WIDEN
);
1487 if (target
!= if_info
->x
)
1488 noce_emit_move_insn (if_info
->x
, target
);
1490 seq
= end_ifcvt_sequence (if_info
);
1494 emit_insn_before_setloc (seq
, if_info
->jump
,
1495 INSN_LOCATION (if_info
->insn_a
));
1502 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1503 similarly for "foo--". */
1506 noce_try_addcc (struct noce_if_info
*if_info
)
1510 int subtract
, normalize
;
1512 if (!noce_simple_bbs (if_info
))
1515 if (GET_CODE (if_info
->a
) == PLUS
1516 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1517 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1520 rtx cond
= if_info
->cond
;
1521 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1523 /* First try to use addcc pattern. */
1524 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1525 && general_operand (XEXP (cond
, 1), VOIDmode
))
1528 target
= emit_conditional_add (if_info
->x
, code
,
1533 XEXP (if_info
->a
, 1),
1534 GET_MODE (if_info
->x
),
1535 (code
== LTU
|| code
== GEU
1536 || code
== LEU
|| code
== GTU
));
1539 if (target
!= if_info
->x
)
1540 noce_emit_move_insn (if_info
->x
, target
);
1542 seq
= end_ifcvt_sequence (if_info
);
1546 emit_insn_before_setloc (seq
, if_info
->jump
,
1547 INSN_LOCATION (if_info
->insn_a
));
1553 /* If that fails, construct conditional increment or decrement using
1555 if (if_info
->branch_cost
>= 2
1556 && (XEXP (if_info
->a
, 1) == const1_rtx
1557 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1560 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1561 subtract
= 0, normalize
= 0;
1562 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1563 subtract
= 1, normalize
= 0;
1565 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1568 target
= noce_emit_store_flag (if_info
,
1569 gen_reg_rtx (GET_MODE (if_info
->x
)),
1573 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1574 subtract
? MINUS
: PLUS
,
1575 if_info
->b
, target
, if_info
->x
,
1579 if (target
!= if_info
->x
)
1580 noce_emit_move_insn (if_info
->x
, target
);
1582 seq
= end_ifcvt_sequence (if_info
);
1586 emit_insn_before_setloc (seq
, if_info
->jump
,
1587 INSN_LOCATION (if_info
->insn_a
));
1597 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1600 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1606 if (!noce_simple_bbs (if_info
))
1610 if ((if_info
->branch_cost
>= 2
1611 || STORE_FLAG_VALUE
== -1)
1612 && ((if_info
->a
== const0_rtx
1613 && rtx_equal_p (if_info
->b
, if_info
->x
))
1614 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1617 && if_info
->b
== const0_rtx
1618 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1621 target
= noce_emit_store_flag (if_info
,
1622 gen_reg_rtx (GET_MODE (if_info
->x
)),
1625 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1627 target
, if_info
->x
, 0,
1632 int old_cost
, new_cost
, insn_cost
;
1635 if (target
!= if_info
->x
)
1636 noce_emit_move_insn (if_info
->x
, target
);
1638 seq
= end_ifcvt_sequence (if_info
);
1642 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1643 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1644 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1645 new_cost
= seq_cost (seq
, speed_p
);
1647 if (new_cost
> old_cost
)
1650 emit_insn_before_setloc (seq
, if_info
->jump
,
1651 INSN_LOCATION (if_info
->insn_a
));
1661 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1664 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1665 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1667 rtx target ATTRIBUTE_UNUSED
;
1668 int unsignedp ATTRIBUTE_UNUSED
;
1670 /* If earliest == jump, try to build the cmove insn directly.
1671 This is helpful when combine has created some complex condition
1672 (like for alpha's cmovlbs) that we can't hope to regenerate
1673 through the normal interface. */
1675 if (if_info
->cond_earliest
== if_info
->jump
)
1677 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1678 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1679 cond
, vtrue
, vfalse
);
1680 rtx set
= gen_rtx_SET (x
, if_then_else
);
1683 rtx_insn
*insn
= emit_insn (set
);
1685 if (recog_memoized (insn
) >= 0)
1687 rtx_insn
*seq
= get_insns ();
1697 /* Don't even try if the comparison operands are weird
1698 except that the target supports cbranchcc4. */
1699 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1700 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1702 if (!have_cbranchcc4
1703 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1704 || cmp_b
!= const0_rtx
)
1708 unsignedp
= (code
== LTU
|| code
== GEU
1709 || code
== LEU
|| code
== GTU
);
1711 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1712 vtrue
, vfalse
, GET_MODE (x
),
1717 /* We might be faced with a situation like:
1720 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1721 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1723 We can't do a conditional move in mode M, but it's possible that we
1724 could do a conditional move in mode N instead and take a subreg of
1727 If we can't create new pseudos, though, don't bother. */
1728 if (reload_completed
)
1731 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1733 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1734 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1735 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1736 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1737 rtx promoted_target
;
1739 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1740 || byte_vtrue
!= byte_vfalse
1741 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1742 != SUBREG_PROMOTED_VAR_P (vfalse
))
1743 || (SUBREG_PROMOTED_GET (vtrue
)
1744 != SUBREG_PROMOTED_GET (vfalse
)))
1747 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1749 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1750 VOIDmode
, reg_vtrue
, reg_vfalse
,
1751 GET_MODE (reg_vtrue
), unsignedp
);
1752 /* Nope, couldn't do it in that mode either. */
1756 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1757 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1758 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1759 emit_move_insn (x
, target
);
1766 /* Try only simple constants and registers here. More complex cases
1767 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1768 has had a go at it. */
1771 noce_try_cmove (struct noce_if_info
*if_info
)
1777 if (!noce_simple_bbs (if_info
))
1780 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1781 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1785 code
= GET_CODE (if_info
->cond
);
1786 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1787 XEXP (if_info
->cond
, 0),
1788 XEXP (if_info
->cond
, 1),
1789 if_info
->a
, if_info
->b
);
1793 if (target
!= if_info
->x
)
1794 noce_emit_move_insn (if_info
->x
, target
);
1796 seq
= end_ifcvt_sequence (if_info
);
1800 emit_insn_before_setloc (seq
, if_info
->jump
,
1801 INSN_LOCATION (if_info
->insn_a
));
1804 /* If both a and b are constants try a last-ditch transformation:
1805 if (test) x = a; else x = b;
1806 => x = (-(test != 0) & (b - a)) + a;
1807 Try this only if the target-specific expansion above has failed.
1808 The target-specific expander may want to generate sequences that
1809 we don't know about, so give them a chance before trying this
1811 else if (!targetm
.have_conditional_execution ()
1812 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1813 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1814 || if_info
->branch_cost
>= 3))
1816 machine_mode mode
= GET_MODE (if_info
->x
);
1817 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1818 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1819 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1826 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1827 /* Make sure we can represent the difference
1828 between the two values. */
1830 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1836 diff
= trunc_int_for_mode (diff
, mode
);
1837 target
= expand_simple_binop (mode
, AND
,
1838 target
, gen_int_mode (diff
, mode
),
1839 if_info
->x
, 0, OPTAB_WIDEN
);
1841 target
= expand_simple_binop (mode
, PLUS
,
1842 target
, gen_int_mode (ifalse
, mode
),
1843 if_info
->x
, 0, OPTAB_WIDEN
);
1846 if (target
!= if_info
->x
)
1847 noce_emit_move_insn (if_info
->x
, target
);
1849 seq
= end_ifcvt_sequence (if_info
);
1853 emit_insn_before_setloc (seq
, if_info
->jump
,
1854 INSN_LOCATION (if_info
->insn_a
));
1870 /* Return true if X contains a conditional code mode rtx. */
1873 contains_ccmode_rtx_p (rtx x
)
1875 subrtx_iterator::array_type array
;
1876 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1877 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1883 /* Helper for bb_valid_for_noce_process_p. Validate that
1884 the rtx insn INSN is a single set that does not set
1885 the conditional register CC and is in general valid for
1889 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1892 || !NONJUMP_INSN_P (insn
)
1893 || (cc
&& set_of (cc
, insn
)))
1896 rtx sset
= single_set (insn
);
1898 /* Currently support only simple single sets in test_bb. */
1900 || !noce_operand_ok (SET_DEST (sset
))
1901 || contains_ccmode_rtx_p (SET_DEST (sset
))
1902 || !noce_operand_ok (SET_SRC (sset
)))
1909 /* Return true iff the registers that the insns in BB_A set do not get
1910 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1911 renamed later by the caller and so conflicts on it should be ignored
1912 in this function. */
1915 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1918 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1923 FOR_BB_INSNS (bb_a
, a_insn
)
1925 if (!active_insn_p (a_insn
))
1928 rtx sset_a
= single_set (a_insn
);
1932 BITMAP_FREE (bba_sets
);
1935 /* Record all registers that BB_A sets. */
1936 FOR_EACH_INSN_DEF (def
, a_insn
)
1937 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1938 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1943 FOR_BB_INSNS (bb_b
, b_insn
)
1945 if (!active_insn_p (b_insn
))
1948 rtx sset_b
= single_set (b_insn
);
1952 BITMAP_FREE (bba_sets
);
1956 /* Make sure this is a REG and not some instance
1957 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1958 If we have a memory destination then we have a pair of simple
1959 basic blocks performing an operation of the form [addr] = c ? a : b.
1960 bb_valid_for_noce_process_p will have ensured that these are
1961 the only stores present. In that case [addr] should be the location
1962 to be renamed. Assert that the callers set this up properly. */
1963 if (MEM_P (SET_DEST (sset_b
)))
1964 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1965 else if (!REG_P (SET_DEST (sset_b
)))
1967 BITMAP_FREE (bba_sets
);
1971 /* If the insn uses a reg set in BB_A return false. */
1972 FOR_EACH_INSN_USE (use
, b_insn
)
1974 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1976 BITMAP_FREE (bba_sets
);
1983 BITMAP_FREE (bba_sets
);
1987 /* Emit copies of all the active instructions in BB except the last.
1988 This is a helper for noce_try_cmove_arith. */
1991 noce_emit_all_but_last (basic_block bb
)
1993 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1995 FOR_BB_INSNS (bb
, insn
)
1997 if (insn
!= last
&& active_insn_p (insn
))
1999 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2001 emit_insn (PATTERN (to_emit
));
2006 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2007 the resulting insn or NULL if it's not a valid insn. */
2010 noce_emit_insn (rtx to_emit
)
2012 gcc_assert (to_emit
);
2013 rtx_insn
*insn
= emit_insn (to_emit
);
2015 if (recog_memoized (insn
) < 0)
2021 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2022 and including the penultimate one in BB if it is not simple
2023 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2024 insn in the block. The reason for that is that LAST_INSN may
2025 have been modified by the preparation in noce_try_cmove_arith. */
2028 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2031 noce_emit_all_but_last (bb
);
2033 if (last_insn
&& !noce_emit_insn (last_insn
))
2039 /* Try more complex cases involving conditional_move. */
2042 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2048 rtx_insn
*insn_a
, *insn_b
;
2049 bool a_simple
= if_info
->then_simple
;
2050 bool b_simple
= if_info
->else_simple
;
2051 basic_block then_bb
= if_info
->then_bb
;
2052 basic_block else_bb
= if_info
->else_bb
;
2056 rtx_insn
*ifcvt_seq
;
2058 /* A conditional move from two memory sources is equivalent to a
2059 conditional on their addresses followed by a load. Don't do this
2060 early because it'll screw alias analysis. Note that we've
2061 already checked for no side effects. */
2062 /* ??? FIXME: Magic number 5. */
2063 if (cse_not_expected
2064 && MEM_P (a
) && MEM_P (b
)
2065 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2066 && if_info
->branch_cost
>= 5)
2068 machine_mode address_mode
= get_address_mode (a
);
2072 x
= gen_reg_rtx (address_mode
);
2076 /* ??? We could handle this if we knew that a load from A or B could
2077 not trap or fault. This is also true if we've already loaded
2078 from the address along the path from ENTRY. */
2079 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2082 /* if (test) x = a + b; else x = c - d;
2089 code
= GET_CODE (if_info
->cond
);
2090 insn_a
= if_info
->insn_a
;
2091 insn_b
= if_info
->insn_b
;
2093 machine_mode x_mode
= GET_MODE (x
);
2095 if (!can_conditionally_move_p (x_mode
))
2098 unsigned int then_cost
;
2099 unsigned int else_cost
;
2101 then_cost
= if_info
->then_cost
;
2106 else_cost
= if_info
->else_cost
;
2110 /* We're going to execute one of the basic blocks anyway, so
2111 bail out if the most expensive of the two blocks is unacceptable. */
2112 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2115 /* Possibly rearrange operands to make things come out more natural. */
2116 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2119 if (rtx_equal_p (b
, x
))
2121 else if (general_operand (b
, GET_MODE (b
)))
2126 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2128 std::swap (insn_a
, insn_b
);
2129 std::swap (a_simple
, b_simple
);
2130 std::swap (then_bb
, else_bb
);
2134 if (then_bb
&& else_bb
2135 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2136 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2141 /* If one of the blocks is empty then the corresponding B or A value
2142 came from the test block. The non-empty complex block that we will
2143 emit might clobber the register used by B or A, so move it to a pseudo
2146 rtx tmp_a
= NULL_RTX
;
2147 rtx tmp_b
= NULL_RTX
;
2149 if (b_simple
|| !else_bb
)
2150 tmp_b
= gen_reg_rtx (x_mode
);
2152 if (a_simple
|| !then_bb
)
2153 tmp_a
= gen_reg_rtx (x_mode
);
2158 rtx emit_a
= NULL_RTX
;
2159 rtx emit_b
= NULL_RTX
;
2160 rtx_insn
*tmp_insn
= NULL
;
2161 bool modified_in_a
= false;
2162 bool modified_in_b
= false;
2163 /* If either operand is complex, load it into a register first.
2164 The best way to do this is to copy the original insn. In this
2165 way we preserve any clobbers etc that the insn may have had.
2166 This is of course not possible in the IS_MEM case. */
2168 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2173 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2174 emit_a
= gen_rtx_SET (reg
, a
);
2180 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2182 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2183 rtx set
= single_set (copy_of_a
);
2186 emit_a
= PATTERN (copy_of_a
);
2190 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2191 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2197 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2201 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2202 emit_b
= gen_rtx_SET (reg
, b
);
2208 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2209 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2210 rtx set
= single_set (copy_of_b
);
2213 emit_b
= PATTERN (copy_of_b
);
2217 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2218 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2224 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2225 if (tmp_b
&& then_bb
)
2227 FOR_BB_INSNS (then_bb
, tmp_insn
)
2228 /* Don't check inside insn_a. We will have changed it to emit_a
2229 with a destination that doesn't conflict. */
2230 if (!(insn_a
&& tmp_insn
== insn_a
)
2231 && modified_in_p (orig_b
, tmp_insn
))
2233 modified_in_a
= true;
2239 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2240 if (tmp_a
&& else_bb
)
2242 FOR_BB_INSNS (else_bb
, tmp_insn
)
2243 /* Don't check inside insn_b. We will have changed it to emit_b
2244 with a destination that doesn't conflict. */
2245 if (!(insn_b
&& tmp_insn
== insn_b
)
2246 && modified_in_p (orig_a
, tmp_insn
))
2248 modified_in_b
= true;
2253 /* If insn to set up A clobbers any registers B depends on, try to
2254 swap insn that sets up A with the one that sets up B. If even
2255 that doesn't help, punt. */
2256 if (modified_in_a
&& !modified_in_b
)
2258 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2259 goto end_seq_and_fail
;
2261 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2262 goto end_seq_and_fail
;
2264 else if (!modified_in_a
)
2266 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2267 goto end_seq_and_fail
;
2269 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2270 goto end_seq_and_fail
;
2273 goto end_seq_and_fail
;
2275 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2276 XEXP (if_info
->cond
, 1), a
, b
);
2279 goto end_seq_and_fail
;
2281 /* If we're handling a memory for above, emit the load now. */
2284 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2286 /* Copy over flags as appropriate. */
2287 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2288 MEM_VOLATILE_P (mem
) = 1;
2289 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2290 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2292 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2294 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2295 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2297 noce_emit_move_insn (if_info
->x
, mem
);
2299 else if (target
!= x
)
2300 noce_emit_move_insn (x
, target
);
2302 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2306 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2307 INSN_LOCATION (if_info
->insn_a
));
2315 /* For most cases, the simplified condition we found is the best
2316 choice, but this is not the case for the min/max/abs transforms.
2317 For these we wish to know that it is A or B in the condition. */
2320 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2321 rtx_insn
**earliest
)
2327 /* If target is already mentioned in the known condition, return it. */
2328 if (reg_mentioned_p (target
, if_info
->cond
))
2330 *earliest
= if_info
->cond_earliest
;
2331 return if_info
->cond
;
2334 set
= pc_set (if_info
->jump
);
2335 cond
= XEXP (SET_SRC (set
), 0);
2337 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2338 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2339 if (if_info
->then_else_reversed
)
2342 /* If we're looking for a constant, try to make the conditional
2343 have that constant in it. There are two reasons why it may
2344 not have the constant we want:
2346 1. GCC may have needed to put the constant in a register, because
2347 the target can't compare directly against that constant. For
2348 this case, we look for a SET immediately before the comparison
2349 that puts a constant in that register.
2351 2. GCC may have canonicalized the conditional, for example
2352 replacing "if x < 4" with "if x <= 3". We can undo that (or
2353 make equivalent types of changes) to get the constants we need
2354 if they're off by one in the right direction. */
2356 if (CONST_INT_P (target
))
2358 enum rtx_code code
= GET_CODE (if_info
->cond
);
2359 rtx op_a
= XEXP (if_info
->cond
, 0);
2360 rtx op_b
= XEXP (if_info
->cond
, 1);
2361 rtx_insn
*prev_insn
;
2363 /* First, look to see if we put a constant in a register. */
2364 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2366 && BLOCK_FOR_INSN (prev_insn
)
2367 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2368 && INSN_P (prev_insn
)
2369 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2371 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2373 src
= SET_SRC (PATTERN (prev_insn
));
2374 if (CONST_INT_P (src
))
2376 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2378 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2381 if (CONST_INT_P (op_a
))
2383 std::swap (op_a
, op_b
);
2384 code
= swap_condition (code
);
2389 /* Now, look to see if we can get the right constant by
2390 adjusting the conditional. */
2391 if (CONST_INT_P (op_b
))
2393 HOST_WIDE_INT desired_val
= INTVAL (target
);
2394 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2399 if (desired_val
!= HOST_WIDE_INT_MAX
2400 && actual_val
== desired_val
+ 1)
2403 op_b
= GEN_INT (desired_val
);
2407 if (desired_val
!= HOST_WIDE_INT_MIN
2408 && actual_val
== desired_val
- 1)
2411 op_b
= GEN_INT (desired_val
);
2415 if (desired_val
!= HOST_WIDE_INT_MIN
2416 && actual_val
== desired_val
- 1)
2419 op_b
= GEN_INT (desired_val
);
2423 if (desired_val
!= HOST_WIDE_INT_MAX
2424 && actual_val
== desired_val
+ 1)
2427 op_b
= GEN_INT (desired_val
);
2435 /* If we made any changes, generate a new conditional that is
2436 equivalent to what we started with, but has the right
2438 if (code
!= GET_CODE (if_info
->cond
)
2439 || op_a
!= XEXP (if_info
->cond
, 0)
2440 || op_b
!= XEXP (if_info
->cond
, 1))
2442 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2443 *earliest
= if_info
->cond_earliest
;
2448 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2449 earliest
, target
, have_cbranchcc4
, true);
2450 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2453 /* We almost certainly searched back to a different place.
2454 Need to re-verify correct lifetimes. */
2456 /* X may not be mentioned in the range (cond_earliest, jump]. */
2457 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2458 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2461 /* A and B may not be modified in the range [cond_earliest, jump). */
2462 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2464 && (modified_in_p (if_info
->a
, insn
)
2465 || modified_in_p (if_info
->b
, insn
)))
2471 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2474 noce_try_minmax (struct noce_if_info
*if_info
)
2477 rtx_insn
*earliest
, *seq
;
2478 enum rtx_code code
, op
;
2481 if (!noce_simple_bbs (if_info
))
2484 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2485 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2486 to get the target to tell us... */
2487 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2488 || HONOR_NANS (if_info
->x
))
2491 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2495 /* Verify the condition is of the form we expect, and canonicalize
2496 the comparison code. */
2497 code
= GET_CODE (cond
);
2498 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2500 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2503 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2505 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2507 code
= swap_condition (code
);
2512 /* Determine what sort of operation this is. Note that the code is for
2513 a taken branch, so the code->operation mapping appears backwards. */
2546 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2547 if_info
->a
, if_info
->b
,
2548 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2554 if (target
!= if_info
->x
)
2555 noce_emit_move_insn (if_info
->x
, target
);
2557 seq
= end_ifcvt_sequence (if_info
);
2561 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2562 if_info
->cond
= cond
;
2563 if_info
->cond_earliest
= earliest
;
2568 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2569 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2573 noce_try_abs (struct noce_if_info
*if_info
)
2575 rtx cond
, target
, a
, b
, c
;
2576 rtx_insn
*earliest
, *seq
;
2578 bool one_cmpl
= false;
2580 if (!noce_simple_bbs (if_info
))
2583 /* Reject modes with signed zeros. */
2584 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2587 /* Recognize A and B as constituting an ABS or NABS. The canonical
2588 form is a branch around the negation, taken when the object is the
2589 first operand of a comparison against 0 that evaluates to true. */
2592 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2594 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2599 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2604 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2613 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2617 /* Verify the condition is of the form we expect. */
2618 if (rtx_equal_p (XEXP (cond
, 0), b
))
2620 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2628 /* Verify that C is zero. Search one step backward for a
2629 REG_EQUAL note or a simple source if necessary. */
2633 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2635 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2636 && (set
= single_set (insn
))
2637 && rtx_equal_p (SET_DEST (set
), c
))
2639 rtx note
= find_reg_equal_equiv_note (insn
);
2649 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2650 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2651 c
= get_pool_constant (XEXP (c
, 0));
2653 /* Work around funny ideas get_condition has wrt canonicalization.
2654 Note that these rtx constants are known to be CONST_INT, and
2655 therefore imply integer comparisons.
2656 The one_cmpl case is more complicated, as we want to handle
2657 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2658 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2659 but not other cases (x > -1 is equivalent of x >= 0). */
2660 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2662 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2667 else if (c
== CONST0_RTX (GET_MODE (b
)))
2670 && GET_CODE (cond
) != GE
2671 && GET_CODE (cond
) != LT
)
2677 /* Determine what sort of operation this is. */
2678 switch (GET_CODE (cond
))
2697 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2700 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2702 /* ??? It's a quandary whether cmove would be better here, especially
2703 for integers. Perhaps combine will clean things up. */
2704 if (target
&& negate
)
2707 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2710 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2720 if (target
!= if_info
->x
)
2721 noce_emit_move_insn (if_info
->x
, target
);
2723 seq
= end_ifcvt_sequence (if_info
);
2727 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2728 if_info
->cond
= cond
;
2729 if_info
->cond_earliest
= earliest
;
2734 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2737 noce_try_sign_mask (struct noce_if_info
*if_info
)
2743 bool t_unconditional
;
2745 if (!noce_simple_bbs (if_info
))
2748 cond
= if_info
->cond
;
2749 code
= GET_CODE (cond
);
2754 if (if_info
->a
== const0_rtx
)
2756 if ((code
== LT
&& c
== const0_rtx
)
2757 || (code
== LE
&& c
== constm1_rtx
))
2760 else if (if_info
->b
== const0_rtx
)
2762 if ((code
== GE
&& c
== const0_rtx
)
2763 || (code
== GT
&& c
== constm1_rtx
))
2767 if (! t
|| side_effects_p (t
))
2770 /* We currently don't handle different modes. */
2771 mode
= GET_MODE (t
);
2772 if (GET_MODE (m
) != mode
)
2775 /* This is only profitable if T is unconditionally executed/evaluated in the
2776 original insn sequence or T is cheap. The former happens if B is the
2777 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2778 INSN_B which can happen for e.g. conditional stores to memory. For the
2779 cost computation use the block TEST_BB where the evaluation will end up
2780 after the transformation. */
2783 && (if_info
->insn_b
== NULL_RTX
2784 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2785 if (!(t_unconditional
2786 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2787 < COSTS_N_INSNS (2))))
2791 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2792 "(signed) m >> 31" directly. This benefits targets with specialized
2793 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2794 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2795 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2804 noce_emit_move_insn (if_info
->x
, t
);
2806 seq
= end_ifcvt_sequence (if_info
);
2810 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2815 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2819 noce_try_bitop (struct noce_if_info
*if_info
)
2821 rtx cond
, x
, a
, result
;
2828 cond
= if_info
->cond
;
2829 code
= GET_CODE (cond
);
2831 if (!noce_simple_bbs (if_info
))
2834 /* Check for no else condition. */
2835 if (! rtx_equal_p (x
, if_info
->b
))
2838 /* Check for a suitable condition. */
2839 if (code
!= NE
&& code
!= EQ
)
2841 if (XEXP (cond
, 1) != const0_rtx
)
2843 cond
= XEXP (cond
, 0);
2845 /* ??? We could also handle AND here. */
2846 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2848 if (XEXP (cond
, 1) != const1_rtx
2849 || !CONST_INT_P (XEXP (cond
, 2))
2850 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2852 bitnum
= INTVAL (XEXP (cond
, 2));
2853 mode
= GET_MODE (x
);
2854 if (BITS_BIG_ENDIAN
)
2855 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2856 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2863 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2865 /* Check for "if (X & C) x = x op C". */
2866 if (! rtx_equal_p (x
, XEXP (a
, 0))
2867 || !CONST_INT_P (XEXP (a
, 1))
2868 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2869 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2872 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2873 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2874 if (GET_CODE (a
) == IOR
)
2875 result
= (code
== NE
) ? a
: NULL_RTX
;
2876 else if (code
== NE
)
2878 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2879 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2880 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2884 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2885 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2886 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2889 else if (GET_CODE (a
) == AND
)
2891 /* Check for "if (X & C) x &= ~C". */
2892 if (! rtx_equal_p (x
, XEXP (a
, 0))
2893 || !CONST_INT_P (XEXP (a
, 1))
2894 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2895 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2898 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2899 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2900 result
= (code
== EQ
) ? a
: NULL_RTX
;
2908 noce_emit_move_insn (x
, result
);
2909 seq
= end_ifcvt_sequence (if_info
);
2913 emit_insn_before_setloc (seq
, if_info
->jump
,
2914 INSN_LOCATION (if_info
->insn_a
));
2920 /* Similar to get_condition, only the resulting condition must be
2921 valid at JUMP, instead of at EARLIEST.
2923 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2924 THEN block of the caller, and we have to reverse the condition. */
2927 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2932 if (! any_condjump_p (jump
))
2935 set
= pc_set (jump
);
2937 /* If this branches to JUMP_LABEL when the condition is false,
2938 reverse the condition. */
2939 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2940 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2942 /* We may have to reverse because the caller's if block is not canonical,
2943 i.e. the THEN block isn't the fallthrough block for the TEST block
2944 (see find_if_header). */
2945 if (then_else_reversed
)
2948 /* If the condition variable is a register and is MODE_INT, accept it. */
2950 cond
= XEXP (SET_SRC (set
), 0);
2951 tmp
= XEXP (cond
, 0);
2952 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2953 && (GET_MODE (tmp
) != BImode
2954 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2959 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2960 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2964 /* Otherwise, fall back on canonicalize_condition to do the dirty
2965 work of manipulating MODE_CC values and COMPARE rtx codes. */
2966 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2967 NULL_RTX
, have_cbranchcc4
, true);
2969 /* We don't handle side-effects in the condition, like handling
2970 REG_INC notes and making sure no duplicate conditions are emitted. */
2971 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2977 /* Return true if OP is ok for if-then-else processing. */
2980 noce_operand_ok (const_rtx op
)
2982 if (side_effects_p (op
))
2985 /* We special-case memories, so handle any of them with
2986 no address side effects. */
2988 return ! side_effects_p (XEXP (op
, 0));
2990 return ! may_trap_p (op
);
2993 /* Return true if X contains a MEM subrtx. */
2996 contains_mem_rtx_p (rtx x
)
2998 subrtx_iterator::array_type array
;
2999 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
3006 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3007 The condition used in this if-conversion is in COND.
3008 In practice, check that TEST_BB ends with a single set
3009 x := a and all previous computations
3010 in TEST_BB don't produce any values that are live after TEST_BB.
3011 In other words, all the insns in TEST_BB are there only
3012 to compute a value for x. Put the rtx cost of the insns
3013 in TEST_BB into COST. Record whether TEST_BB is a single simple
3014 set instruction in SIMPLE_P. */
3017 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3018 unsigned int *cost
, bool *simple_p
)
3023 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3024 rtx last_set
= NULL_RTX
;
3026 rtx cc
= cc_in_cond (cond
);
3028 if (!insn_valid_noce_process_p (last_insn
, cc
))
3030 last_set
= single_set (last_insn
);
3032 rtx x
= SET_DEST (last_set
);
3033 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3034 rtx first_set
= single_set (first_insn
);
3039 /* We have a single simple set, that's okay. */
3040 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3042 if (first_insn
== last_insn
)
3044 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3045 *cost
= insn_rtx_cost (first_set
, speed_p
);
3049 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3050 gcc_assert (prev_last_insn
);
3052 /* For now, disallow setting x multiple times in test_bb. */
3053 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3056 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3058 /* The regs that are live out of test_bb. */
3059 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3061 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3063 FOR_BB_INSNS (test_bb
, insn
)
3065 if (insn
!= last_insn
)
3067 if (!active_insn_p (insn
))
3070 if (!insn_valid_noce_process_p (insn
, cc
))
3071 goto free_bitmap_and_fail
;
3073 rtx sset
= single_set (insn
);
3076 if (contains_mem_rtx_p (SET_SRC (sset
))
3077 || !REG_P (SET_DEST (sset
))
3078 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3079 goto free_bitmap_and_fail
;
3081 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3082 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3086 /* If any of the intermediate results in test_bb are live after test_bb
3088 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3089 goto free_bitmap_and_fail
;
3091 BITMAP_FREE (test_bb_temps
);
3092 *cost
= potential_cost
;
3096 free_bitmap_and_fail
:
3097 BITMAP_FREE (test_bb_temps
);
3101 /* We have something like:
3104 { i = a; j = b; k = c; }
3108 tmp_i = (x > y) ? a : i;
3109 tmp_j = (x > y) ? b : j;
3110 tmp_k = (x > y) ? c : k;
3115 Subsequent passes are expected to clean up the extra moves.
3117 Look for special cases such as writes to one register which are
3118 read back in another SET, as might occur in a swap idiom or
3127 Which we want to rewrite to:
3129 tmp_i = (x > y) ? a : i;
3130 tmp_j = (x > y) ? tmp_i : j;
3134 We can catch these when looking at (SET x y) by keeping a list of the
3135 registers we would have targeted before if-conversion and looking back
3136 through it for an overlap with Y. If we find one, we rewire the
3137 conditional set to use the temporary we introduced earlier.
3139 IF_INFO contains the useful information about the block structure and
3140 jump instructions. */
3143 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3145 basic_block test_bb
= if_info
->test_bb
;
3146 basic_block then_bb
= if_info
->then_bb
;
3147 basic_block join_bb
= if_info
->join_bb
;
3148 rtx_insn
*jump
= if_info
->jump
;
3149 rtx_insn
*cond_earliest
;
3154 /* Decompose the condition attached to the jump. */
3155 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3156 rtx x
= XEXP (cond
, 0);
3157 rtx y
= XEXP (cond
, 1);
3158 rtx_code cond_code
= GET_CODE (cond
);
3160 /* The true targets for a conditional move. */
3161 auto_vec
<rtx
> targets
;
3162 /* The temporaries introduced to allow us to not consider register
3164 auto_vec
<rtx
> temporaries
;
3165 /* The insns we've emitted. */
3166 auto_vec
<rtx_insn
*> unmodified_insns
;
3169 FOR_BB_INSNS (then_bb
, insn
)
3171 /* Skip over non-insns. */
3172 if (!active_insn_p (insn
))
3175 rtx set
= single_set (insn
);
3176 gcc_checking_assert (set
);
3178 rtx target
= SET_DEST (set
);
3179 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3180 rtx new_val
= SET_SRC (set
);
3181 rtx old_val
= target
;
3183 /* If we were supposed to read from an earlier write in this block,
3184 we've changed the register allocation. Rewire the read. While
3185 we are looking, also try to catch a swap idiom. */
3186 for (int i
= count
- 1; i
>= 0; --i
)
3187 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3189 /* Catch a "swap" style idiom. */
3190 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3191 /* The write to targets[i] is only live until the read
3192 here. As the condition codes match, we can propagate
3194 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3196 new_val
= temporaries
[i
];
3200 /* If we had a non-canonical conditional jump (i.e. one where
3201 the fallthrough is to the "else" case) we need to reverse
3202 the conditional select. */
3203 if (if_info
->then_else_reversed
)
3204 std::swap (old_val
, new_val
);
3206 /* Actually emit the conditional move. */
3207 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3208 x
, y
, new_val
, old_val
);
3210 /* If we failed to expand the conditional move, drop out and don't
3212 if (temp_dest
== NULL_RTX
)
3220 targets
.safe_push (target
);
3221 temporaries
.safe_push (temp_dest
);
3222 unmodified_insns
.safe_push (insn
);
3225 /* We must have seen some sort of insn to insert, otherwise we were
3226 given an empty BB to convert, and we can't handle that. */
3227 gcc_assert (!unmodified_insns
.is_empty ());
3229 /* Now fixup the assignments. */
3230 for (int i
= 0; i
< count
; i
++)
3231 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3233 /* Actually emit the sequence. */
3234 rtx_insn
*seq
= get_insns ();
3236 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3237 set_used_flags (insn
);
3239 /* Mark all our temporaries and targets as used. */
3240 for (int i
= 0; i
< count
; i
++)
3242 set_used_flags (temporaries
[i
]);
3243 set_used_flags (targets
[i
]);
3246 set_used_flags (cond
);
3250 unshare_all_rtl_in_chain (seq
);
3256 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3258 || recog_memoized (insn
) == -1)
3261 emit_insn_before_setloc (seq
, if_info
->jump
,
3262 INSN_LOCATION (unmodified_insns
.last ()));
3264 /* Clean up THEN_BB and the edges in and out of it. */
3265 remove_edge (find_edge (test_bb
, join_bb
));
3266 remove_edge (find_edge (then_bb
, join_bb
));
3267 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3268 delete_basic_block (then_bb
);
3271 /* Maybe merge blocks now the jump is simple enough. */
3272 if (can_merge_blocks_p (test_bb
, join_bb
))
3274 merge_blocks (test_bb
, join_bb
);
3278 num_updated_if_blocks
++;
3282 /* Return true iff basic block TEST_BB is comprised of only
3283 (SET (REG) (REG)) insns suitable for conversion to a series
3284 of conditional moves. FORNOW: Use II to find the expected cost of
3285 the branch into/over TEST_BB.
3287 TODO: This creates an implicit "magic number" for branch_cost.
3288 II->branch_cost now guides the maximum number of set instructions in
3289 a basic block which is considered profitable to completely
3293 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3294 struct noce_if_info
*ii
)
3298 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3299 unsigned limit
= MIN (ii
->branch_cost
, param
);
3301 FOR_BB_INSNS (test_bb
, insn
)
3303 /* Skip over notes etc. */
3304 if (!active_insn_p (insn
))
3307 /* We only handle SET insns. */
3308 rtx set
= single_set (insn
);
3309 if (set
== NULL_RTX
)
3312 rtx dest
= SET_DEST (set
);
3313 rtx src
= SET_SRC (set
);
3315 /* We can possibly relax this, but for now only handle REG to REG
3316 moves. This avoids any issues that might come from introducing
3317 loads/stores that might violate data-race-freedom guarantees. */
3318 if (!(REG_P (src
) && REG_P (dest
)))
3321 /* Destination must be appropriate for a conditional write. */
3322 if (!noce_operand_ok (dest
))
3325 /* We must be able to conditionally move in this mode. */
3326 if (!can_conditionally_move_p (GET_MODE (dest
)))
3329 /* FORNOW: Our cost model is a count of the number of instructions we
3330 would if-convert. This is suboptimal, and should be improved as part
3331 of a wider rework of branch_cost. */
3332 if (++count
> limit
)
3339 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3340 it without using conditional execution. Return TRUE if we were successful
3341 at converting the block. */
3344 noce_process_if_block (struct noce_if_info
*if_info
)
3346 basic_block test_bb
= if_info
->test_bb
; /* test block */
3347 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3348 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3349 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3350 rtx_insn
*jump
= if_info
->jump
;
3351 rtx cond
= if_info
->cond
;
3352 rtx_insn
*insn_a
, *insn_b
;
3354 rtx orig_x
, x
, a
, b
;
3356 /* We're looking for patterns of the form
3358 (1) if (...) x = a; else x = b;
3359 (2) x = b; if (...) x = a;
3360 (3) if (...) x = a; // as if with an initial x = x.
3361 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3362 The later patterns require jumps to be more expensive.
3363 For the if (...) x = a; else x = b; case we allow multiple insns
3364 inside the then and else blocks as long as their only effect is
3365 to calculate a value for x.
3366 ??? For future expansion, further expand the "multiple X" rules. */
3368 /* First look for multiple SETS. */
3370 && HAVE_conditional_move
3372 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3374 if (noce_convert_multiple_sets (if_info
))
3378 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3379 &if_info
->then_simple
))
3383 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3384 &if_info
->else_simple
))
3387 insn_a
= last_active_insn (then_bb
, FALSE
);
3388 set_a
= single_set (insn_a
);
3391 x
= SET_DEST (set_a
);
3392 a
= SET_SRC (set_a
);
3394 /* Look for the other potential set. Make sure we've got equivalent
3396 /* ??? This is overconservative. Storing to two different mems is
3397 as easy as conditionally computing the address. Storing to a
3398 single mem merely requires a scratch memory to use as one of the
3399 destination addresses; often the memory immediately below the
3400 stack pointer is available for this. */
3404 insn_b
= last_active_insn (else_bb
, FALSE
);
3405 set_b
= single_set (insn_b
);
3408 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3413 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3414 /* We're going to be moving the evaluation of B down from above
3415 COND_EARLIEST to JUMP. Make sure the relevant data is still
3418 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3419 || !NONJUMP_INSN_P (insn_b
)
3420 || (set_b
= single_set (insn_b
)) == NULL_RTX
3421 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3422 || ! noce_operand_ok (SET_SRC (set_b
))
3423 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3424 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3425 /* Avoid extending the lifetime of hard registers on small
3426 register class machines. */
3427 || (REG_P (SET_SRC (set_b
))
3428 && HARD_REGISTER_P (SET_SRC (set_b
))
3429 && targetm
.small_register_classes_for_mode_p
3430 (GET_MODE (SET_SRC (set_b
))))
3431 /* Likewise with X. In particular this can happen when
3432 noce_get_condition looks farther back in the instruction
3433 stream than one might expect. */
3434 || reg_overlap_mentioned_p (x
, cond
)
3435 || reg_overlap_mentioned_p (x
, a
)
3436 || modified_between_p (x
, insn_b
, jump
))
3443 /* If x has side effects then only the if-then-else form is safe to
3444 convert. But even in that case we would need to restore any notes
3445 (such as REG_INC) at then end. That can be tricky if
3446 noce_emit_move_insn expands to more than one insn, so disable the
3447 optimization entirely for now if there are side effects. */
3448 if (side_effects_p (x
))
3451 b
= (set_b
? SET_SRC (set_b
) : x
);
3453 /* Only operate on register destinations, and even then avoid extending
3454 the lifetime of hard registers on small register class machines. */
3456 if_info
->orig_x
= orig_x
;
3458 || (HARD_REGISTER_P (x
)
3459 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3461 if (GET_MODE (x
) == BLKmode
)
3464 if (GET_CODE (x
) == ZERO_EXTRACT
3465 && (!CONST_INT_P (XEXP (x
, 1))
3466 || !CONST_INT_P (XEXP (x
, 2))))
3469 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3470 ? XEXP (x
, 0) : x
));
3473 /* Don't operate on sources that may trap or are volatile. */
3474 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3478 /* Set up the info block for our subroutines. */
3479 if_info
->insn_a
= insn_a
;
3480 if_info
->insn_b
= insn_b
;
3485 /* Try optimizations in some approximation of a useful order. */
3486 /* ??? Should first look to see if X is live incoming at all. If it
3487 isn't, we don't need anything but an unconditional set. */
3489 /* Look and see if A and B are really the same. Avoid creating silly
3490 cmove constructs that no one will fix up later. */
3491 if (noce_simple_bbs (if_info
)
3492 && rtx_interchangeable_p (a
, b
))
3494 /* If we have an INSN_B, we don't have to create any new rtl. Just
3495 move the instruction that we already have. If we don't have an
3496 INSN_B, that means that A == X, and we've got a noop move. In
3497 that case don't do anything and let the code below delete INSN_A. */
3498 if (insn_b
&& else_bb
)
3502 if (else_bb
&& insn_b
== BB_END (else_bb
))
3503 BB_END (else_bb
) = PREV_INSN (insn_b
);
3504 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3506 /* If there was a REG_EQUAL note, delete it since it may have been
3507 true due to this insn being after a jump. */
3508 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3509 remove_note (insn_b
, note
);
3513 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3514 x must be executed twice. */
3515 else if (insn_b
&& side_effects_p (orig_x
))
3522 if (!set_b
&& MEM_P (orig_x
))
3523 /* We want to avoid store speculation to avoid cases like
3524 if (pthread_mutex_trylock(mutex))
3526 Rather than go to much effort here, we rely on the SSA optimizers,
3527 which do a good enough job these days. */
3530 if (noce_try_move (if_info
))
3532 if (noce_try_ifelse_collapse (if_info
))
3534 if (noce_try_store_flag (if_info
))
3536 if (noce_try_bitop (if_info
))
3538 if (noce_try_minmax (if_info
))
3540 if (noce_try_abs (if_info
))
3542 if (noce_try_inverse_constants (if_info
))
3544 if (!targetm
.have_conditional_execution ()
3545 && noce_try_store_flag_constants (if_info
))
3547 if (HAVE_conditional_move
3548 && noce_try_cmove (if_info
))
3550 if (! targetm
.have_conditional_execution ())
3552 if (noce_try_addcc (if_info
))
3554 if (noce_try_store_flag_mask (if_info
))
3556 if (HAVE_conditional_move
3557 && noce_try_cmove_arith (if_info
))
3559 if (noce_try_sign_mask (if_info
))
3563 if (!else_bb
&& set_b
)
3575 /* If we used a temporary, fix it up now. */
3581 noce_emit_move_insn (orig_x
, x
);
3583 set_used_flags (orig_x
);
3584 unshare_all_rtl_in_chain (seq
);
3587 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3590 /* The original THEN and ELSE blocks may now be removed. The test block
3591 must now jump to the join block. If the test block and the join block
3592 can be merged, do so. */
3595 delete_basic_block (else_bb
);
3599 remove_edge (find_edge (test_bb
, join_bb
));
3601 remove_edge (find_edge (then_bb
, join_bb
));
3602 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3603 delete_basic_block (then_bb
);
3606 if (can_merge_blocks_p (test_bb
, join_bb
))
3608 merge_blocks (test_bb
, join_bb
);
3612 num_updated_if_blocks
++;
3616 /* Check whether a block is suitable for conditional move conversion.
3617 Every insn must be a simple set of a register to a constant or a
3618 register. For each assignment, store the value in the pointer map
3619 VALS, keyed indexed by register pointer, then store the register
3620 pointer in REGS. COND is the condition we will test. */
3623 check_cond_move_block (basic_block bb
,
3624 hash_map
<rtx
, rtx
> *vals
,
3629 rtx cc
= cc_in_cond (cond
);
3631 /* We can only handle simple jumps at the end of the basic block.
3632 It is almost impossible to update the CFG otherwise. */
3634 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3637 FOR_BB_INSNS (bb
, insn
)
3641 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3643 set
= single_set (insn
);
3647 dest
= SET_DEST (set
);
3648 src
= SET_SRC (set
);
3650 || (HARD_REGISTER_P (dest
)
3651 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3654 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3657 if (side_effects_p (src
) || side_effects_p (dest
))
3660 if (may_trap_p (src
) || may_trap_p (dest
))
3663 /* Don't try to handle this if the source register was
3664 modified earlier in the block. */
3667 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3668 && vals
->get (SUBREG_REG (src
))))
3671 /* Don't try to handle this if the destination register was
3672 modified earlier in the block. */
3673 if (vals
->get (dest
))
3676 /* Don't try to handle this if the condition uses the
3677 destination register. */
3678 if (reg_overlap_mentioned_p (dest
, cond
))
3681 /* Don't try to handle this if the source register is modified
3682 later in the block. */
3683 if (!CONSTANT_P (src
)
3684 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3687 /* Skip it if the instruction to be moved might clobber CC. */
3688 if (cc
&& set_of (cc
, insn
))
3691 vals
->put (dest
, src
);
3693 regs
->safe_push (dest
);
3699 /* Given a basic block BB suitable for conditional move conversion,
3700 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3701 the register values depending on COND, emit the insns in the block as
3702 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3703 processed. The caller has started a sequence for the conversion.
3704 Return true if successful, false if something goes wrong. */
3707 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3708 basic_block bb
, rtx cond
,
3709 hash_map
<rtx
, rtx
> *then_vals
,
3710 hash_map
<rtx
, rtx
> *else_vals
,
3715 rtx cond_arg0
, cond_arg1
;
3717 code
= GET_CODE (cond
);
3718 cond_arg0
= XEXP (cond
, 0);
3719 cond_arg1
= XEXP (cond
, 1);
3721 FOR_BB_INSNS (bb
, insn
)
3723 rtx set
, target
, dest
, t
, e
;
3725 /* ??? Maybe emit conditional debug insn? */
3726 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3728 set
= single_set (insn
);
3729 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3731 dest
= SET_DEST (set
);
3733 rtx
*then_slot
= then_vals
->get (dest
);
3734 rtx
*else_slot
= else_vals
->get (dest
);
3735 t
= then_slot
? *then_slot
: NULL_RTX
;
3736 e
= else_slot
? *else_slot
: NULL_RTX
;
3740 /* If this register was set in the then block, we already
3741 handled this case there. */
3754 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3760 noce_emit_move_insn (dest
, target
);
3766 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3767 it using only conditional moves. Return TRUE if we were successful at
3768 converting the block. */
3771 cond_move_process_if_block (struct noce_if_info
*if_info
)
3773 basic_block test_bb
= if_info
->test_bb
;
3774 basic_block then_bb
= if_info
->then_bb
;
3775 basic_block else_bb
= if_info
->else_bb
;
3776 basic_block join_bb
= if_info
->join_bb
;
3777 rtx_insn
*jump
= if_info
->jump
;
3778 rtx cond
= if_info
->cond
;
3779 rtx_insn
*seq
, *loc_insn
;
3782 vec
<rtx
> then_regs
= vNULL
;
3783 vec
<rtx
> else_regs
= vNULL
;
3785 int success_p
= FALSE
;
3786 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3788 /* Build a mapping for each block to the value used for each
3790 hash_map
<rtx
, rtx
> then_vals
;
3791 hash_map
<rtx
, rtx
> else_vals
;
3793 /* Make sure the blocks are suitable. */
3794 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3796 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3799 /* Make sure the blocks can be used together. If the same register
3800 is set in both blocks, and is not set to a constant in both
3801 cases, then both blocks must set it to the same register. We
3802 have already verified that if it is set to a register, that the
3803 source register does not change after the assignment. Also count
3804 the number of registers set in only one of the blocks. */
3806 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3808 rtx
*then_slot
= then_vals
.get (reg
);
3809 rtx
*else_slot
= else_vals
.get (reg
);
3811 gcc_checking_assert (then_slot
);
3816 rtx then_val
= *then_slot
;
3817 rtx else_val
= *else_slot
;
3818 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3819 && !rtx_equal_p (then_val
, else_val
))
3824 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3825 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3827 gcc_checking_assert (else_vals
.get (reg
));
3828 if (!then_vals
.get (reg
))
3832 /* Make sure it is reasonable to convert this block. What matters
3833 is the number of assignments currently made in only one of the
3834 branches, since if we convert we are going to always execute
3836 if (c
> MAX_CONDITIONAL_EXECUTE
3840 /* Try to emit the conditional moves. First do the then block,
3841 then do anything left in the else blocks. */
3843 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3844 &then_vals
, &else_vals
, false)
3846 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3847 &then_vals
, &else_vals
, true)))
3852 seq
= end_ifcvt_sequence (if_info
);
3856 loc_insn
= first_active_insn (then_bb
);
3859 loc_insn
= first_active_insn (else_bb
);
3860 gcc_assert (loc_insn
);
3862 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3866 delete_basic_block (else_bb
);
3870 remove_edge (find_edge (test_bb
, join_bb
));
3872 remove_edge (find_edge (then_bb
, join_bb
));
3873 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3874 delete_basic_block (then_bb
);
3877 if (can_merge_blocks_p (test_bb
, join_bb
))
3879 merge_blocks (test_bb
, join_bb
);
3883 num_updated_if_blocks
++;
3887 then_regs
.release ();
3888 else_regs
.release ();
3893 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3894 IF-THEN-ELSE-JOIN block.
3896 If so, we'll try to convert the insns to not require the branch,
3897 using only transformations that do not require conditional execution.
3899 Return TRUE if we were successful at converting the block. */
3902 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3905 basic_block then_bb
, else_bb
, join_bb
;
3906 bool then_else_reversed
= false;
3909 rtx_insn
*cond_earliest
;
3910 struct noce_if_info if_info
;
3912 /* We only ever should get here before reload. */
3913 gcc_assert (!reload_completed
);
3915 /* Recognize an IF-THEN-ELSE-JOIN block. */
3916 if (single_pred_p (then_edge
->dest
)
3917 && single_succ_p (then_edge
->dest
)
3918 && single_pred_p (else_edge
->dest
)
3919 && single_succ_p (else_edge
->dest
)
3920 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3922 then_bb
= then_edge
->dest
;
3923 else_bb
= else_edge
->dest
;
3924 join_bb
= single_succ (then_bb
);
3926 /* Recognize an IF-THEN-JOIN block. */
3927 else if (single_pred_p (then_edge
->dest
)
3928 && single_succ_p (then_edge
->dest
)
3929 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3931 then_bb
= then_edge
->dest
;
3932 else_bb
= NULL_BLOCK
;
3933 join_bb
= else_edge
->dest
;
3935 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3936 of basic blocks in cfglayout mode does not matter, so the fallthrough
3937 edge can go to any basic block (and not just to bb->next_bb, like in
3939 else if (single_pred_p (else_edge
->dest
)
3940 && single_succ_p (else_edge
->dest
)
3941 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3943 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3944 To make this work, we have to invert the THEN and ELSE blocks
3945 and reverse the jump condition. */
3946 then_bb
= else_edge
->dest
;
3947 else_bb
= NULL_BLOCK
;
3948 join_bb
= single_succ (then_bb
);
3949 then_else_reversed
= true;
3952 /* Not a form we can handle. */
3955 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3956 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3959 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3962 num_possible_if_blocks
++;
3967 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3968 (else_bb
) ? "-ELSE" : "",
3969 pass
, test_bb
->index
, then_bb
->index
);
3972 fprintf (dump_file
, ", else %d", else_bb
->index
);
3974 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3977 /* If the conditional jump is more than just a conditional
3978 jump, then we can not do if-conversion on this block. */
3979 jump
= BB_END (test_bb
);
3980 if (! onlyjump_p (jump
))
3983 /* If this is not a standard conditional jump, we can't parse it. */
3984 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3988 /* We must be comparing objects whose modes imply the size. */
3989 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3992 /* Initialize an IF_INFO struct to pass around. */
3993 memset (&if_info
, 0, sizeof if_info
);
3994 if_info
.test_bb
= test_bb
;
3995 if_info
.then_bb
= then_bb
;
3996 if_info
.else_bb
= else_bb
;
3997 if_info
.join_bb
= join_bb
;
3998 if_info
.cond
= cond
;
3999 if_info
.cond_earliest
= cond_earliest
;
4000 if_info
.jump
= jump
;
4001 if_info
.then_else_reversed
= then_else_reversed
;
4002 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
4003 predictable_edge_p (then_edge
));
4005 /* Do the real work. */
4007 if (noce_process_if_block (&if_info
))
4010 if (HAVE_conditional_move
4011 && cond_move_process_if_block (&if_info
))
4018 /* Merge the blocks and mark for local life update. */
4021 merge_if_block (struct ce_if_block
* ce_info
)
4023 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4024 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4025 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4026 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4027 basic_block combo_bb
;
4029 /* All block merging is done into the lower block numbers. */
4032 df_set_bb_dirty (test_bb
);
4034 /* Merge any basic blocks to handle && and || subtests. Each of
4035 the blocks are on the fallthru path from the predecessor block. */
4036 if (ce_info
->num_multiple_test_blocks
> 0)
4038 basic_block bb
= test_bb
;
4039 basic_block last_test_bb
= ce_info
->last_test_bb
;
4040 basic_block fallthru
= block_fallthru (bb
);
4045 fallthru
= block_fallthru (bb
);
4046 merge_blocks (combo_bb
, bb
);
4049 while (bb
!= last_test_bb
);
4052 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4053 label, but it might if there were || tests. That label's count should be
4054 zero, and it normally should be removed. */
4058 /* If THEN_BB has no successors, then there's a BARRIER after it.
4059 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4060 is no longer needed, and in fact it is incorrect to leave it in
4062 if (EDGE_COUNT (then_bb
->succs
) == 0
4063 && EDGE_COUNT (combo_bb
->succs
) > 1)
4065 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4066 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4067 end
= NEXT_INSN (end
);
4069 if (end
&& BARRIER_P (end
))
4072 merge_blocks (combo_bb
, then_bb
);
4076 /* The ELSE block, if it existed, had a label. That label count
4077 will almost always be zero, but odd things can happen when labels
4078 get their addresses taken. */
4081 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4082 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4083 is no longer needed, and in fact it is incorrect to leave it in
4085 if (EDGE_COUNT (else_bb
->succs
) == 0
4086 && EDGE_COUNT (combo_bb
->succs
) > 1)
4088 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4089 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4090 end
= NEXT_INSN (end
);
4092 if (end
&& BARRIER_P (end
))
4095 merge_blocks (combo_bb
, else_bb
);
4099 /* If there was no join block reported, that means it was not adjacent
4100 to the others, and so we cannot merge them. */
4104 rtx_insn
*last
= BB_END (combo_bb
);
4106 /* The outgoing edge for the current COMBO block should already
4107 be correct. Verify this. */
4108 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4109 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4110 || (NONJUMP_INSN_P (last
)
4111 && GET_CODE (PATTERN (last
)) == TRAP_IF
4112 && (TRAP_CONDITION (PATTERN (last
))
4113 == const_true_rtx
)));
4116 /* There should still be something at the end of the THEN or ELSE
4117 blocks taking us to our final destination. */
4118 gcc_assert (JUMP_P (last
)
4119 || (EDGE_SUCC (combo_bb
, 0)->dest
4120 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4122 && SIBLING_CALL_P (last
))
4123 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4124 && can_throw_internal (last
)));
4127 /* The JOIN block may have had quite a number of other predecessors too.
4128 Since we've already merged the TEST, THEN and ELSE blocks, we should
4129 have only one remaining edge from our if-then-else diamond. If there
4130 is more than one remaining edge, it must come from elsewhere. There
4131 may be zero incoming edges if the THEN block didn't actually join
4132 back up (as with a call to a non-return function). */
4133 else if (EDGE_COUNT (join_bb
->preds
) < 2
4134 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4136 /* We can merge the JOIN cleanly and update the dataflow try
4137 again on this pass.*/
4138 merge_blocks (combo_bb
, join_bb
);
4143 /* We cannot merge the JOIN. */
4145 /* The outgoing edge for the current COMBO block should already
4146 be correct. Verify this. */
4147 gcc_assert (single_succ_p (combo_bb
)
4148 && single_succ (combo_bb
) == join_bb
);
4150 /* Remove the jump and cruft from the end of the COMBO block. */
4151 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4152 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4155 num_updated_if_blocks
++;
4158 /* Find a block ending in a simple IF condition and try to transform it
4159 in some way. When converting a multi-block condition, put the new code
4160 in the first such block and delete the rest. Return a pointer to this
4161 first block if some transformation was done. Return NULL otherwise. */
4164 find_if_header (basic_block test_bb
, int pass
)
4166 ce_if_block ce_info
;
4170 /* The kind of block we're looking for has exactly two successors. */
4171 if (EDGE_COUNT (test_bb
->succs
) != 2)
4174 then_edge
= EDGE_SUCC (test_bb
, 0);
4175 else_edge
= EDGE_SUCC (test_bb
, 1);
4177 if (df_get_bb_dirty (then_edge
->dest
))
4179 if (df_get_bb_dirty (else_edge
->dest
))
4182 /* Neither edge should be abnormal. */
4183 if ((then_edge
->flags
& EDGE_COMPLEX
)
4184 || (else_edge
->flags
& EDGE_COMPLEX
))
4187 /* Nor exit the loop. */
4188 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4189 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4192 /* The THEN edge is canonically the one that falls through. */
4193 if (then_edge
->flags
& EDGE_FALLTHRU
)
4195 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4196 std::swap (then_edge
, else_edge
);
4198 /* Otherwise this must be a multiway branch of some sort. */
4201 memset (&ce_info
, 0, sizeof (ce_info
));
4202 ce_info
.test_bb
= test_bb
;
4203 ce_info
.then_bb
= then_edge
->dest
;
4204 ce_info
.else_bb
= else_edge
->dest
;
4205 ce_info
.pass
= pass
;
4207 #ifdef IFCVT_MACHDEP_INIT
4208 IFCVT_MACHDEP_INIT (&ce_info
);
4211 if (!reload_completed
4212 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4215 if (reload_completed
4216 && targetm
.have_conditional_execution ()
4217 && cond_exec_find_if_block (&ce_info
))
4220 if (targetm
.have_trap ()
4221 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4222 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4225 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4226 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4228 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4230 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4238 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4239 /* Set this so we continue looking. */
4240 cond_exec_changed_p
= TRUE
;
4241 return ce_info
.test_bb
;
4244 /* Return true if a block has two edges, one of which falls through to the next
4245 block, and the other jumps to a specific block, so that we can tell if the
4246 block is part of an && test or an || test. Returns either -1 or the number
4247 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4250 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4253 int fallthru_p
= FALSE
;
4260 if (!cur_bb
|| !target_bb
)
4263 /* If no edges, obviously it doesn't jump or fallthru. */
4264 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4267 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4269 if (cur_edge
->flags
& EDGE_COMPLEX
)
4270 /* Anything complex isn't what we want. */
4273 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4276 else if (cur_edge
->dest
== target_bb
)
4283 if ((jump_p
& fallthru_p
) == 0)
4286 /* Don't allow calls in the block, since this is used to group && and ||
4287 together for conditional execution support. ??? we should support
4288 conditional execution support across calls for IA-64 some day, but
4289 for now it makes the code simpler. */
4290 end
= BB_END (cur_bb
);
4291 insn
= BB_HEAD (cur_bb
);
4293 while (insn
!= NULL_RTX
)
4300 && !DEBUG_INSN_P (insn
)
4301 && GET_CODE (PATTERN (insn
)) != USE
4302 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4308 insn
= NEXT_INSN (insn
);
4314 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4315 block. If so, we'll try to convert the insns to not require the branch.
4316 Return TRUE if we were successful at converting the block. */
4319 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4321 basic_block test_bb
= ce_info
->test_bb
;
4322 basic_block then_bb
= ce_info
->then_bb
;
4323 basic_block else_bb
= ce_info
->else_bb
;
4324 basic_block join_bb
= NULL_BLOCK
;
4329 ce_info
->last_test_bb
= test_bb
;
4331 /* We only ever should get here after reload,
4332 and if we have conditional execution. */
4333 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4335 /* Discover if any fall through predecessors of the current test basic block
4336 were && tests (which jump to the else block) or || tests (which jump to
4338 if (single_pred_p (test_bb
)
4339 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4341 basic_block bb
= single_pred (test_bb
);
4342 basic_block target_bb
;
4343 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4346 /* Determine if the preceding block is an && or || block. */
4347 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4349 ce_info
->and_and_p
= TRUE
;
4350 target_bb
= else_bb
;
4352 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4354 ce_info
->and_and_p
= FALSE
;
4355 target_bb
= then_bb
;
4358 target_bb
= NULL_BLOCK
;
4360 if (target_bb
&& n_insns
<= max_insns
)
4362 int total_insns
= 0;
4365 ce_info
->last_test_bb
= test_bb
;
4367 /* Found at least one && or || block, look for more. */
4370 ce_info
->test_bb
= test_bb
= bb
;
4371 total_insns
+= n_insns
;
4374 if (!single_pred_p (bb
))
4377 bb
= single_pred (bb
);
4378 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4380 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4382 ce_info
->num_multiple_test_blocks
= blocks
;
4383 ce_info
->num_multiple_test_insns
= total_insns
;
4385 if (ce_info
->and_and_p
)
4386 ce_info
->num_and_and_blocks
= blocks
;
4388 ce_info
->num_or_or_blocks
= blocks
;
4392 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4393 other than any || blocks which jump to the THEN block. */
4394 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4397 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4398 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4400 if (cur_edge
->flags
& EDGE_COMPLEX
)
4404 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4406 if (cur_edge
->flags
& EDGE_COMPLEX
)
4410 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4411 if (EDGE_COUNT (then_bb
->succs
) > 0
4412 && (!single_succ_p (then_bb
)
4413 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4414 || (epilogue_completed
4415 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4418 /* If the THEN block has no successors, conditional execution can still
4419 make a conditional call. Don't do this unless the ELSE block has
4420 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4421 Check for the last insn of the THEN block being an indirect jump, which
4422 is listed as not having any successors, but confuses the rest of the CE
4423 code processing. ??? we should fix this in the future. */
4424 if (EDGE_COUNT (then_bb
->succs
) == 0)
4426 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4428 rtx_insn
*last_insn
= BB_END (then_bb
);
4431 && NOTE_P (last_insn
)
4432 && last_insn
!= BB_HEAD (then_bb
))
4433 last_insn
= PREV_INSN (last_insn
);
4436 && JUMP_P (last_insn
)
4437 && ! simplejump_p (last_insn
))
4441 else_bb
= NULL_BLOCK
;
4447 /* If the THEN block's successor is the other edge out of the TEST block,
4448 then we have an IF-THEN combo without an ELSE. */
4449 else if (single_succ (then_bb
) == else_bb
)
4452 else_bb
= NULL_BLOCK
;
4455 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4456 has exactly one predecessor and one successor, and the outgoing edge
4457 is not complex, then we have an IF-THEN-ELSE combo. */
4458 else if (single_succ_p (else_bb
)
4459 && single_succ (then_bb
) == single_succ (else_bb
)
4460 && single_pred_p (else_bb
)
4461 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4462 && !(epilogue_completed
4463 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4464 join_bb
= single_succ (else_bb
);
4466 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4470 num_possible_if_blocks
++;
4475 "\nIF-THEN%s block found, pass %d, start block %d "
4476 "[insn %d], then %d [%d]",
4477 (else_bb
) ? "-ELSE" : "",
4480 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4482 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4485 fprintf (dump_file
, ", else %d [%d]",
4487 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4489 fprintf (dump_file
, ", join %d [%d]",
4491 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4493 if (ce_info
->num_multiple_test_blocks
> 0)
4494 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4495 ce_info
->num_multiple_test_blocks
,
4496 (ce_info
->and_and_p
) ? "&&" : "||",
4497 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4498 ce_info
->last_test_bb
->index
,
4499 ((BB_HEAD (ce_info
->last_test_bb
))
4500 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4503 fputc ('\n', dump_file
);
4506 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4507 first condition for free, since we've already asserted that there's a
4508 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4509 we checked the FALLTHRU flag, those are already adjacent to the last IF
4511 /* ??? As an enhancement, move the ELSE block. Have to deal with
4512 BLOCK notes, if by no other means than backing out the merge if they
4513 exist. Sticky enough I don't want to think about it now. */
4515 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4517 if ((next
= next
->next_bb
) != join_bb
4518 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4526 /* Do the real work. */
4528 ce_info
->else_bb
= else_bb
;
4529 ce_info
->join_bb
= join_bb
;
4531 /* If we have && and || tests, try to first handle combining the && and ||
4532 tests into the conditional code, and if that fails, go back and handle
4533 it without the && and ||, which at present handles the && case if there
4534 was no ELSE block. */
4535 if (cond_exec_process_if_block (ce_info
, TRUE
))
4538 if (ce_info
->num_multiple_test_blocks
)
4542 if (cond_exec_process_if_block (ce_info
, FALSE
))
4549 /* Convert a branch over a trap, or a branch
4550 to a trap, into a conditional trap. */
4553 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4555 basic_block then_bb
= then_edge
->dest
;
4556 basic_block else_bb
= else_edge
->dest
;
4557 basic_block other_bb
, trap_bb
;
4558 rtx_insn
*trap
, *jump
;
4560 rtx_insn
*cond_earliest
;
4563 /* Locate the block with the trap instruction. */
4564 /* ??? While we look for no successors, we really ought to allow
4565 EH successors. Need to fix merge_if_block for that to work. */
4566 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4567 trap_bb
= then_bb
, other_bb
= else_bb
;
4568 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4569 trap_bb
= else_bb
, other_bb
= then_bb
;
4575 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4576 test_bb
->index
, trap_bb
->index
);
4579 /* If this is not a standard conditional jump, we can't parse it. */
4580 jump
= BB_END (test_bb
);
4581 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4585 /* If the conditional jump is more than just a conditional jump, then
4586 we can not do if-conversion on this block. Give up for returnjump_p,
4587 changing a conditional return followed by unconditional trap for
4588 conditional trap followed by unconditional return is likely not
4589 beneficial and harder to handle. */
4590 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4593 /* We must be comparing objects whose modes imply the size. */
4594 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4597 /* Reverse the comparison code, if necessary. */
4598 code
= GET_CODE (cond
);
4599 if (then_bb
== trap_bb
)
4601 code
= reversed_comparison_code (cond
, jump
);
4602 if (code
== UNKNOWN
)
4606 /* Attempt to generate the conditional trap. */
4607 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4608 copy_rtx (XEXP (cond
, 1)),
4609 TRAP_CODE (PATTERN (trap
)));
4613 /* Emit the new insns before cond_earliest. */
4614 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4616 /* Delete the trap block if possible. */
4617 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4618 df_set_bb_dirty (test_bb
);
4619 df_set_bb_dirty (then_bb
);
4620 df_set_bb_dirty (else_bb
);
4622 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4624 delete_basic_block (trap_bb
);
4628 /* Wire together the blocks again. */
4629 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4630 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4631 else if (trap_bb
== then_bb
)
4633 rtx lab
= JUMP_LABEL (jump
);
4634 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4635 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4636 LABEL_NUSES (lab
) += 1;
4637 JUMP_LABEL (newjump
) = lab
;
4638 emit_barrier_after (newjump
);
4642 if (can_merge_blocks_p (test_bb
, other_bb
))
4644 merge_blocks (test_bb
, other_bb
);
4648 num_updated_if_blocks
++;
4652 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4656 block_has_only_trap (basic_block bb
)
4660 /* We're not the exit block. */
4661 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4664 /* The block must have no successors. */
4665 if (EDGE_COUNT (bb
->succs
) > 0)
4668 /* The only instruction in the THEN block must be the trap. */
4669 trap
= first_active_insn (bb
);
4670 if (! (trap
== BB_END (bb
)
4671 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4672 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4678 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4679 transformable, but not necessarily the other. There need be no
4682 Return TRUE if we were successful at converting the block.
4684 Cases we'd like to look at:
4687 if (test) goto over; // x not live
4695 if (! test) goto label;
4698 if (test) goto E; // x not live
4712 (3) // This one's really only interesting for targets that can do
4713 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4714 // it results in multiple branches on a cache line, which often
4715 // does not sit well with predictors.
4717 if (test1) goto E; // predicted not taken
4733 (A) Don't do (2) if the branch is predicted against the block we're
4734 eliminating. Do it anyway if we can eliminate a branch; this requires
4735 that the sole successor of the eliminated block postdominate the other
4738 (B) With CE, on (3) we can steal from both sides of the if, creating
4747 Again, this is most useful if J postdominates.
4749 (C) CE substitutes for helpful life information.
4751 (D) These heuristics need a lot of work. */
4753 /* Tests for case 1 above. */
4756 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4758 basic_block then_bb
= then_edge
->dest
;
4759 basic_block else_bb
= else_edge
->dest
;
4761 int then_bb_index
, then_prob
;
4762 rtx else_target
= NULL_RTX
;
4764 /* If we are partitioning hot/cold basic blocks, we don't want to
4765 mess up unconditional or indirect jumps that cross between hot
4768 Basic block partitioning may result in some jumps that appear to
4769 be optimizable (or blocks that appear to be mergeable), but which really
4770 must be left untouched (they are required to make it safely across
4771 partition boundaries). See the comments at the top of
4772 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4774 if ((BB_END (then_bb
)
4775 && JUMP_P (BB_END (then_bb
))
4776 && CROSSING_JUMP_P (BB_END (then_bb
)))
4777 || (BB_END (test_bb
)
4778 && JUMP_P (BB_END (test_bb
))
4779 && CROSSING_JUMP_P (BB_END (test_bb
)))
4780 || (BB_END (else_bb
)
4781 && JUMP_P (BB_END (else_bb
))
4782 && CROSSING_JUMP_P (BB_END (else_bb
))))
4785 /* THEN has one successor. */
4786 if (!single_succ_p (then_bb
))
4789 /* THEN does not fall through, but is not strange either. */
4790 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4793 /* THEN has one predecessor. */
4794 if (!single_pred_p (then_bb
))
4797 /* THEN must do something. */
4798 if (forwarder_block_p (then_bb
))
4801 num_possible_if_blocks
++;
4804 "\nIF-CASE-1 found, start %d, then %d\n",
4805 test_bb
->index
, then_bb
->index
);
4807 if (then_edge
->probability
)
4808 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4810 then_prob
= REG_BR_PROB_BASE
/ 2;
4812 /* We're speculating from the THEN path, we want to make sure the cost
4813 of speculation is within reason. */
4814 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4815 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4816 predictable_edge_p (then_edge
)))))
4819 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4821 rtx_insn
*jump
= BB_END (else_edge
->src
);
4822 gcc_assert (JUMP_P (jump
));
4823 else_target
= JUMP_LABEL (jump
);
4826 /* Registers set are dead, or are predicable. */
4827 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4828 single_succ_edge (then_bb
), 1))
4831 /* Conversion went ok, including moving the insns and fixing up the
4832 jump. Adjust the CFG to match. */
4834 /* We can avoid creating a new basic block if then_bb is immediately
4835 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4836 through to else_bb. */
4838 if (then_bb
->next_bb
== else_bb
4839 && then_bb
->prev_bb
== test_bb
4840 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4842 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4845 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4846 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4847 else_bb
, else_target
);
4849 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4852 df_set_bb_dirty (test_bb
);
4853 df_set_bb_dirty (else_bb
);
4855 then_bb_index
= then_bb
->index
;
4856 delete_basic_block (then_bb
);
4858 /* Make rest of code believe that the newly created block is the THEN_BB
4859 block we removed. */
4862 df_bb_replace (then_bb_index
, new_bb
);
4863 /* This should have been done above via force_nonfallthru_and_redirect
4864 (possibly called from redirect_edge_and_branch_force). */
4865 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4869 num_updated_if_blocks
++;
4873 /* Test for case 2 above. */
4876 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4878 basic_block then_bb
= then_edge
->dest
;
4879 basic_block else_bb
= else_edge
->dest
;
4881 int then_prob
, else_prob
;
4883 /* We do not want to speculate (empty) loop latches. */
4885 && else_bb
->loop_father
->latch
== else_bb
)
4888 /* If we are partitioning hot/cold basic blocks, we don't want to
4889 mess up unconditional or indirect jumps that cross between hot
4892 Basic block partitioning may result in some jumps that appear to
4893 be optimizable (or blocks that appear to be mergeable), but which really
4894 must be left untouched (they are required to make it safely across
4895 partition boundaries). See the comments at the top of
4896 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4898 if ((BB_END (then_bb
)
4899 && JUMP_P (BB_END (then_bb
))
4900 && CROSSING_JUMP_P (BB_END (then_bb
)))
4901 || (BB_END (test_bb
)
4902 && JUMP_P (BB_END (test_bb
))
4903 && CROSSING_JUMP_P (BB_END (test_bb
)))
4904 || (BB_END (else_bb
)
4905 && JUMP_P (BB_END (else_bb
))
4906 && CROSSING_JUMP_P (BB_END (else_bb
))))
4909 /* ELSE has one successor. */
4910 if (!single_succ_p (else_bb
))
4913 else_succ
= single_succ_edge (else_bb
);
4915 /* ELSE outgoing edge is not complex. */
4916 if (else_succ
->flags
& EDGE_COMPLEX
)
4919 /* ELSE has one predecessor. */
4920 if (!single_pred_p (else_bb
))
4923 /* THEN is not EXIT. */
4924 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4927 if (else_edge
->probability
)
4929 else_prob
= else_edge
->probability
;
4930 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4934 else_prob
= REG_BR_PROB_BASE
/ 2;
4935 then_prob
= REG_BR_PROB_BASE
/ 2;
4938 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4939 if (else_prob
> then_prob
)
4941 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4942 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4948 num_possible_if_blocks
++;
4951 "\nIF-CASE-2 found, start %d, else %d\n",
4952 test_bb
->index
, else_bb
->index
);
4954 /* We're speculating from the ELSE path, we want to make sure the cost
4955 of speculation is within reason. */
4956 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4957 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4958 predictable_edge_p (else_edge
)))))
4961 /* Registers set are dead, or are predicable. */
4962 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4965 /* Conversion went ok, including moving the insns and fixing up the
4966 jump. Adjust the CFG to match. */
4968 df_set_bb_dirty (test_bb
);
4969 df_set_bb_dirty (then_bb
);
4970 delete_basic_block (else_bb
);
4973 num_updated_if_blocks
++;
4975 /* ??? We may now fallthru from one of THEN's successors into a join
4976 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4981 /* Used by the code above to perform the actual rtl transformations.
4982 Return TRUE if successful.
4984 TEST_BB is the block containing the conditional branch. MERGE_BB
4985 is the block containing the code to manipulate. DEST_EDGE is an
4986 edge representing a jump to the join block; after the conversion,
4987 TEST_BB should be branching to its destination.
4988 REVERSEP is true if the sense of the branch should be reversed. */
4991 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4992 basic_block other_bb
, edge dest_edge
, int reversep
)
4994 basic_block new_dest
= dest_edge
->dest
;
4995 rtx_insn
*head
, *end
, *jump
;
4996 rtx_insn
*earliest
= NULL
;
4998 bitmap merge_set
= NULL
;
4999 /* Number of pending changes. */
5000 int n_validated_changes
= 0;
5001 rtx new_dest_label
= NULL_RTX
;
5003 jump
= BB_END (test_bb
);
5005 /* Find the extent of the real code in the merge block. */
5006 head
= BB_HEAD (merge_bb
);
5007 end
= BB_END (merge_bb
);
5009 while (DEBUG_INSN_P (end
) && end
!= head
)
5010 end
= PREV_INSN (end
);
5012 /* If merge_bb ends with a tablejump, predicating/moving insn's
5013 into test_bb and then deleting merge_bb will result in the jumptable
5014 that follows merge_bb being removed along with merge_bb and then we
5015 get an unresolved reference to the jumptable. */
5016 if (tablejump_p (end
, NULL
, NULL
))
5020 head
= NEXT_INSN (head
);
5021 while (DEBUG_INSN_P (head
) && head
!= end
)
5022 head
= NEXT_INSN (head
);
5030 head
= NEXT_INSN (head
);
5031 while (DEBUG_INSN_P (head
) && head
!= end
)
5032 head
= NEXT_INSN (head
);
5037 if (!onlyjump_p (end
))
5044 end
= PREV_INSN (end
);
5045 while (DEBUG_INSN_P (end
) && end
!= head
)
5046 end
= PREV_INSN (end
);
5049 /* Don't move frame-related insn across the conditional branch. This
5050 can lead to one of the paths of the branch having wrong unwind info. */
5051 if (epilogue_completed
)
5053 rtx_insn
*insn
= head
;
5056 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5060 insn
= NEXT_INSN (insn
);
5064 /* Disable handling dead code by conditional execution if the machine needs
5065 to do anything funny with the tests, etc. */
5066 #ifndef IFCVT_MODIFY_TESTS
5067 if (targetm
.have_conditional_execution ())
5069 /* In the conditional execution case, we have things easy. We know
5070 the condition is reversible. We don't have to check life info
5071 because we're going to conditionally execute the code anyway.
5072 All that's left is making sure the insns involved can actually
5077 cond
= cond_exec_get_condition (jump
);
5081 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5082 int prob_val
= (note
? XINT (note
, 0) : -1);
5086 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5089 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5092 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5095 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5096 && verify_changes (0))
5097 n_validated_changes
= num_validated_changes ();
5105 /* If we allocated new pseudos (e.g. in the conditional move
5106 expander called from noce_emit_cmove), we must resize the
5108 if (max_regno
< max_reg_num ())
5109 max_regno
= max_reg_num ();
5111 /* Try the NCE path if the CE path did not result in any changes. */
5112 if (n_validated_changes
== 0)
5119 /* In the non-conditional execution case, we have to verify that there
5120 are no trapping operations, no calls, no references to memory, and
5121 that any registers modified are dead at the branch site. */
5123 if (!any_condjump_p (jump
))
5126 /* Find the extent of the conditional. */
5127 cond
= noce_get_condition (jump
, &earliest
, false);
5131 live
= BITMAP_ALLOC (®_obstack
);
5132 simulate_backwards_to_point (merge_bb
, live
, end
);
5133 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5135 df_get_live_in (other_bb
), NULL
);
5140 /* Collect the set of registers set in MERGE_BB. */
5141 merge_set
= BITMAP_ALLOC (®_obstack
);
5143 FOR_BB_INSNS (merge_bb
, insn
)
5144 if (NONDEBUG_INSN_P (insn
))
5145 df_simulate_find_defs (insn
, merge_set
);
5147 /* If shrink-wrapping, disable this optimization when test_bb is
5148 the first basic block and merge_bb exits. The idea is to not
5149 move code setting up a return register as that may clobber a
5150 register used to pass function parameters, which then must be
5151 saved in caller-saved regs. A caller-saved reg requires the
5152 prologue, killing a shrink-wrap opportunity. */
5153 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5154 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5155 && single_succ_p (new_dest
)
5156 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5157 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5162 return_regs
= BITMAP_ALLOC (®_obstack
);
5164 /* Start off with the intersection of regs used to pass
5165 params and regs used to return values. */
5166 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5167 if (FUNCTION_ARG_REGNO_P (i
)
5168 && targetm
.calls
.function_value_regno_p (i
))
5169 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5171 bitmap_and_into (return_regs
,
5172 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5173 bitmap_and_into (return_regs
,
5174 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5175 if (!bitmap_empty_p (return_regs
))
5177 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5178 if (NONDEBUG_INSN_P (insn
))
5182 /* If this insn sets any reg in return_regs, add all
5183 reg uses to the set of regs we're interested in. */
5184 FOR_EACH_INSN_DEF (def
, insn
)
5185 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5187 df_simulate_uses (insn
, return_regs
);
5191 if (bitmap_intersect_p (merge_set
, return_regs
))
5193 BITMAP_FREE (return_regs
);
5194 BITMAP_FREE (merge_set
);
5198 BITMAP_FREE (return_regs
);
5203 /* We don't want to use normal invert_jump or redirect_jump because
5204 we don't want to delete_insn called. Also, we want to do our own
5205 change group management. */
5207 old_dest
= JUMP_LABEL (jump
);
5208 if (other_bb
!= new_dest
)
5210 if (!any_condjump_p (jump
))
5213 if (JUMP_P (BB_END (dest_edge
->src
)))
5214 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5215 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5216 new_dest_label
= ret_rtx
;
5218 new_dest_label
= block_label (new_dest
);
5220 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5222 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5223 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5227 if (verify_changes (n_validated_changes
))
5228 confirm_change_group ();
5232 if (other_bb
!= new_dest
)
5234 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5237 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5240 std::swap (BRANCH_EDGE (test_bb
)->count
,
5241 FALLTHRU_EDGE (test_bb
)->count
);
5242 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5243 FALLTHRU_EDGE (test_bb
)->probability
);
5244 update_br_prob_note (test_bb
);
5248 /* Move the insns out of MERGE_BB to before the branch. */
5253 if (end
== BB_END (merge_bb
))
5254 BB_END (merge_bb
) = PREV_INSN (head
);
5256 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5257 notes being moved might become invalid. */
5263 if (! INSN_P (insn
))
5265 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5268 remove_note (insn
, note
);
5269 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5271 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5272 notes referring to the registers being set might become invalid. */
5278 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5279 remove_reg_equal_equiv_notes_for_regno (i
);
5281 BITMAP_FREE (merge_set
);
5284 reorder_insns (head
, end
, PREV_INSN (earliest
));
5287 /* Remove the jump and edge if we can. */
5288 if (other_bb
== new_dest
)
5291 remove_edge (BRANCH_EDGE (test_bb
));
5292 /* ??? Can't merge blocks here, as then_bb is still in use.
5293 At minimum, the merge will get done just before bb-reorder. */
5302 BITMAP_FREE (merge_set
);
5307 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5308 we are after combine pass. */
5311 if_convert (bool after_combine
)
5318 df_live_add_problem ();
5319 df_live_set_all_dirty ();
5322 /* Record whether we are after combine pass. */
5323 ifcvt_after_combine
= after_combine
;
5324 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5325 != CODE_FOR_nothing
);
5326 num_possible_if_blocks
= 0;
5327 num_updated_if_blocks
= 0;
5328 num_true_changes
= 0;
5330 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5331 mark_loop_exit_edges ();
5332 loop_optimizer_finalize ();
5333 free_dominance_info (CDI_DOMINATORS
);
5335 /* Compute postdominators. */
5336 calculate_dominance_info (CDI_POST_DOMINATORS
);
5338 df_set_flags (DF_LR_RUN_DCE
);
5340 /* Go through each of the basic blocks looking for things to convert. If we
5341 have conditional execution, we make multiple passes to allow us to handle
5342 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5347 /* Only need to do dce on the first pass. */
5348 df_clear_flags (DF_LR_RUN_DCE
);
5349 cond_exec_changed_p
= FALSE
;
5352 #ifdef IFCVT_MULTIPLE_DUMPS
5353 if (dump_file
&& pass
> 1)
5354 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5357 FOR_EACH_BB_FN (bb
, cfun
)
5360 while (!df_get_bb_dirty (bb
)
5361 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5365 #ifdef IFCVT_MULTIPLE_DUMPS
5366 if (dump_file
&& cond_exec_changed_p
)
5367 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5370 while (cond_exec_changed_p
);
5372 #ifdef IFCVT_MULTIPLE_DUMPS
5374 fprintf (dump_file
, "\n\n========== no more changes\n");
5377 free_dominance_info (CDI_POST_DOMINATORS
);
5382 clear_aux_for_blocks ();
5384 /* If we allocated new pseudos, we must resize the array for sched1. */
5385 if (max_regno
< max_reg_num ())
5386 max_regno
= max_reg_num ();
5388 /* Write the final stats. */
5389 if (dump_file
&& num_possible_if_blocks
> 0)
5392 "\n%d possible IF blocks searched.\n",
5393 num_possible_if_blocks
);
5395 "%d IF blocks converted.\n",
5396 num_updated_if_blocks
);
5398 "%d true changes made.\n\n\n",
5403 df_remove_problem (df_live
);
5405 checking_verify_flow_info ();
5408 /* If-conversion and CFG cleanup. */
5410 rest_of_handle_if_conversion (void)
5412 if (flag_if_conversion
)
5416 dump_reg_info (dump_file
);
5417 dump_flow_info (dump_file
, dump_flags
);
5419 cleanup_cfg (CLEANUP_EXPENSIVE
);
5429 const pass_data pass_data_rtl_ifcvt
=
5431 RTL_PASS
, /* type */
5433 OPTGROUP_NONE
, /* optinfo_flags */
5434 TV_IFCVT
, /* tv_id */
5435 0, /* properties_required */
5436 0, /* properties_provided */
5437 0, /* properties_destroyed */
5438 0, /* todo_flags_start */
5439 TODO_df_finish
, /* todo_flags_finish */
5442 class pass_rtl_ifcvt
: public rtl_opt_pass
5445 pass_rtl_ifcvt (gcc::context
*ctxt
)
5446 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5449 /* opt_pass methods: */
5450 virtual bool gate (function
*)
5452 return (optimize
> 0) && dbg_cnt (if_conversion
);
5455 virtual unsigned int execute (function
*)
5457 return rest_of_handle_if_conversion ();
5460 }; // class pass_rtl_ifcvt
5465 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5467 return new pass_rtl_ifcvt (ctxt
);
5471 /* Rerun if-conversion, as combine may have simplified things enough
5472 to now meet sequence length restrictions. */
5476 const pass_data pass_data_if_after_combine
=
5478 RTL_PASS
, /* type */
5480 OPTGROUP_NONE
, /* optinfo_flags */
5481 TV_IFCVT
, /* tv_id */
5482 0, /* properties_required */
5483 0, /* properties_provided */
5484 0, /* properties_destroyed */
5485 0, /* todo_flags_start */
5486 TODO_df_finish
, /* todo_flags_finish */
5489 class pass_if_after_combine
: public rtl_opt_pass
5492 pass_if_after_combine (gcc::context
*ctxt
)
5493 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5496 /* opt_pass methods: */
5497 virtual bool gate (function
*)
5499 return optimize
> 0 && flag_if_conversion
5500 && dbg_cnt (if_after_combine
);
5503 virtual unsigned int execute (function
*)
5509 }; // class pass_if_after_combine
5514 make_pass_if_after_combine (gcc::context
*ctxt
)
5516 return new pass_if_after_combine (ctxt
);
5522 const pass_data pass_data_if_after_reload
=
5524 RTL_PASS
, /* type */
5526 OPTGROUP_NONE
, /* optinfo_flags */
5527 TV_IFCVT2
, /* tv_id */
5528 0, /* properties_required */
5529 0, /* properties_provided */
5530 0, /* properties_destroyed */
5531 0, /* todo_flags_start */
5532 TODO_df_finish
, /* todo_flags_finish */
5535 class pass_if_after_reload
: public rtl_opt_pass
5538 pass_if_after_reload (gcc::context
*ctxt
)
5539 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5542 /* opt_pass methods: */
5543 virtual bool gate (function
*)
5545 return optimize
> 0 && flag_if_conversion2
5546 && dbg_cnt (if_after_reload
);
5549 virtual unsigned int execute (function
*)
5555 }; // class pass_if_after_reload
5560 make_pass_if_after_reload (gcc::context
*ctxt
)
5562 return new pass_if_after_reload (ctxt
);