gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c

   1 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
   2 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
   3 /* { dg-require-effective-target powerpc_vsx_ok } */
   4 /* { dg-options "-mvsx -O2 -mcpu=power8" } */
   5 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
   6
   7
   8 /* Expected instruction counts for Power 8.  */
   9
  10 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
  11 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
  12 /* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */
  13 /* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */
  14
  15 /* We generate xxlor instructions for many reasons other than or'ing vector
  16    operands or calling __builtin_vec_or(), which  means we cannot rely on
  17    their usage counts being stable.  Therefore, we just ensure at least one
  18    xxlor instruction was generated.  */
  19 /* { dg-final { scan-assembler "xxlor" } } */
  20
  21 /* { dg-final { scan-assembler-times "xvcmpeqdp" 4 { target le } } } */
  22 /* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be } } } */
  23 /* { dg-final { scan-assembler-times "xvcmpeqdp." 4 { target le } } } */
  24 /* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */
  25 /* { dg-final { scan-assembler-times "xvcmpgtdp" 7 { target le } } } */
  26 /* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */
  27 /* { dg-final { scan-assembler-times "xvcmpgtdp." 7 { target le } } } */
  28 /* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */
  29 /* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
  30 /* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */
  31 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
  32 /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
  33 /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
  34 /* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
  35 /* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
  36 /* { dg-final { scan-assembler-times "xvmindp" 1 } } */
  37 /* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
  38 /* { dg-final { scan-assembler-times "vperm" 1 } } */
  39 /* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
  40 /* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
  41 /* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
  42 /* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
  43 /* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
  44 /* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
  45 /* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
  46 /* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
  47 /* { dg-final { scan-assembler-times "xxland" 13 } } */
  48 /* { dg-final { scan-assembler-times "xxlxor" 2 } } */
  49 /* { dg-final { scan-assembler-times "xxsel" 2 } } */
  50 /* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
  51 /* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
  52 /* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
  53
  54 /* Source code for the test in vsx-vector-6.h */
  55 #include "vsx-vector-6.h"