| blob | 5feefb2dda8adad19fef52bea9796fb2f29f7dc7 |
1 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
4 instead of NEG.
6 2018-01-18 Jakub Jelinek <jakub@redhat.com>
8 PR sanitizer/81715
9 PR testsuite/83882
10 * function.h (gimplify_parameters): Add gimple_seq * argument.
11 * function.c: Include gimple.h and options.h.
12 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
13 for the added local temporaries if needed.
14 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
15 if there are any parameter cleanups, wrap whole body into a
16 try/finally with the cleanups.
18 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
20 PR target/82964
21 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
22 Use GET_MODE_CLASS for scalar floating point.
24 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
26 PR ipa/82256
27 patch by PaX Team
28 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
29 Fix call of call_cgraph_insertion_hooks.
31 2018-01-18 Martin Sebor <msebor@redhat.com>
33 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
35 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
37 PR ipa/83619
38 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
39 frequencies.
41 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
43 PR other/70268
44 * common.opt: (-ffile-prefix-map): New option.
45 * opts.c (common_handle_option): Defer it.
46 * opts-global.c (handle_common_deferred_options): Handle it.
47 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
48 * file-prefix-map.h: New file.
49 (remap_debug_filename, add_debug_prefix_map): ...here.
50 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
51 * final.c (debug_prefix_map, add_debug_prefix_map
52 remap_debug_filename): Move to...
53 * file-prefix-map.c: New file.
54 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
55 generalize, get rid of alloca(), use strrchr() instead of strchr().
56 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
57 Implement in terms of add_prefix_map().
58 (remap_macro_filename, remap_debug_filename): Implement in term of
59 remap_filename().
60 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
61 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
62 * dbxout.c: Include file-prefix-map.h.
63 * varasm.c: Likewise.
64 * vmsdbgout.c: Likewise.
65 * xcoffout.c: Likewise.
66 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
67 * doc/cppopts.texi (-fmacro-prefix-map): Document.
68 * doc/invoke.texi (-ffile-prefix-map): Document.
69 (-fdebug-prefix-map): Update description.
71 2018-01-18 Martin Liska <mliska@suse.cz>
73 * config/i386/i386.c (indirect_thunk_name): Document that also
74 lfence is emitted.
75 (output_indirect_thunk): Document why both instructions
76 (pause and lfence) are generated.
78 2018-01-18 Richard Biener <rguenther@suse.de>
80 PR tree-optimization/83887
81 * graphite-scop-detection.c
82 (scop_detection::get_nearest_dom_with_single_entry): Remove.
83 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
84 (scop_detection::merge_sese): Re-implement with a flood-fill
85 algorithm that properly finds a SESE region if it exists.
87 2018-01-18 Jakub Jelinek <jakub@redhat.com>
89 PR c/61240
90 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
91 pointer_diff optimizations use view_convert instead of convert.
93 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
95 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
96 Generate different code for -mno-speculate-indirect-jumps.
97 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
98 (*call_indirect_aix<mode>): Disable for
99 -mno-speculate-indirect-jumps.
100 (*call_indirect_aix<mode>_nospec): New define_insn.
101 (*call_value_indirect_aix<mode>): Disable for
102 -mno-speculate-indirect-jumps.
103 (*call_value_indirect_aix<mode>_nospec): New define_insn.
104 (*sibcall_nonlocal_sysv<mode>): Generate different code for
105 -mno-speculate-indirect-jumps.
106 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
108 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
110 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
111 long double type, set the flags for noting the default long double
112 type, even if we don't pass or return a long double type.
114 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
116 PR ipa/83051
117 * ipa-inline.c (flatten_function): Do not overwrite final inlining
118 failure.
120 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
122 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
123 support for merge[hl].
124 (fold_mergehl_helper): New helper function.
125 (tree-vector-builder.h): New #include for tree_vector_builder usage.
126 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
127 (altivec_vmrglw_direct): Add xxmrglw insn.
129 2018-01-17 Andrew Waterman <andrew@sifive.com>
131 * config/riscv/riscv.c (riscv_conditional_register_usage): If
132 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
134 2018-01-17 David Malcolm <dmalcolm@redhat.com>
136 PR lto/83121
137 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
138 call the lto_location_cache before reading the
139 DECL_SOURCE_LOCATION of the types.
141 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
142 Richard Sandiford <richard.sandiford@linaro.org>
144 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
145 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
146 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
147 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
148 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
149 Add declaration.
150 * config/aarch64/constraints.md (aarch64_movti_operand):
151 Limit immediates.
152 * config/aarch64/predicates.md (Uti): Add new constraint.
154 2018-01-17 Carl Love <cel@us.ibm.com>
155 * config/rs6000/vsx.md (define_expand xl_len_r,
156 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
157 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
158 lxvll.
159 (define_expand, define_insn): Move the shift left from the
160 define_insn to the define_expand for lxvl and stxvl instructions.
161 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
162 and XL_LEN_R definitions to PURE.
164 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
166 * config/i386/i386.c (indirect_thunk_name): Declare regno
167 as unsigned int. Compare regno with INVALID_REGNUM.
168 (output_indirect_thunk): Ditto.
169 (output_indirect_thunk_function): Ditto.
170 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
171 in the call to output_indirect_thunk_function.
173 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
175 PR middle-end/83884
176 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
177 rather than the size of inner_type to determine the stack slot size
178 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
180 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
182 PR target/83546
183 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
184 to PTA_SILVERMONT.
186 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
188 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
189 endian Linux systems to optionally enable multilibs for selecting
190 the long double type if the user configured an explicit type.
191 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
192 have no long double multilibs if not defined.
193 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
194 warn if the user used -mabi={ieee,ibm}longdouble and we built
195 multilibs for long double.
196 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
197 appropriate multilib option.
198 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
199 multilib options.
200 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
201 for building long double multilibs.
202 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
204 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
206 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
207 copies.
209 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
210 64 bits.
211 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
212 128 bits.
214 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
215 variables.
217 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
218 return value.
220 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
222 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
223 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
225 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
227 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
228 different rtl trees depending on TARGET_64BIT.
229 (rs6000_gen_lvx): Likewise.
231 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
233 * config/visium/visium.md (nop): Tweak comment.
234 (hazard_nop): Likewise.
236 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
238 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
239 -mspeculate-indirect-jumps.
240 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
241 for -mno-speculate-indirect-jumps.
242 (*call_indirect_elfv2<mode>_nospec): New define_insn.
243 (*call_value_indirect_elfv2<mode>): Disable for
244 -mno-speculate-indirect-jumps.
245 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
246 (indirect_jump): Emit different RTL for
247 -mno-speculate-indirect-jumps.
248 (*indirect_jump<mode>): Disable for
249 -mno-speculate-indirect-jumps.
250 (*indirect_jump<mode>_nospec): New define_insn.
251 (tablejump): Emit different RTL for
252 -mno-speculate-indirect-jumps.
253 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
254 (tablejumpsi_nospec): New define_expand.
255 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
256 (tablejumpdi_nospec): New define_expand.
257 (*tablejump<mode>_internal1): Disable for
258 -mno-speculate-indirect-jumps.
259 (*tablejump<mode>_internal1_nospec): New define_insn.
260 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
261 option.
263 2018-01-16 Artyom Skrobov tyomitch@gmail.com
265 * caller-save.c (insert_save): Drop unnecessary parameter. All
266 callers updated.
268 2018-01-16 Jakub Jelinek <jakub@redhat.com>
269 Richard Biener <rguenth@suse.de>
271 PR libgomp/83590
272 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
273 return early, inline manually is_gimple_sizepos. Make sure if we
274 call gimplify_expr we don't end up with a gimple constant.
275 * tree.c (variably_modified_type_p): Don't return true for
276 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
277 * gimplify.h (is_gimple_sizepos): Remove.
279 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
281 PR tree-optimization/83857
282 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
283 vectorizable_live_operation for pure SLP statements.
284 (vectorizable_live_operation): Handle PHIs.
286 2018-01-16 Richard Biener <rguenther@suse.de>
288 PR tree-optimization/83867
289 * tree-vect-stmts.c (vect_transform_stmt): Precompute
290 nested_in_vect_loop_p since the scalar stmt may get invalidated.
292 2018-01-16 Jakub Jelinek <jakub@redhat.com>
294 PR c/83844
295 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
296 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
297 If off is not INTEGER_CST, issue a may not be aligned warning
298 rather than isn't aligned. Use isn%'t rather than isn't.
299 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
300 into MULT_EXPR.
301 <case MULT_EXPR>: Improve the case when bottom and one of the
302 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
303 operand, in that case check if the other operand is multiple of
304 bottom divided by the INTEGER_CST operand.
306 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
308 PR target/83858
309 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
310 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
311 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
312 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
313 * config/pa/pa.c (pa_function_arg_advance): Likewise.
314 (pa_function_arg, pa_arg_partial_bytes): Likewise.
315 (pa_function_arg_size): New function.
317 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
319 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
320 in a separate statement.
322 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
324 PR tree-optimization/83847
325 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
326 group gathers and scatters.
328 2018-01-16 Jakub Jelinek <jakub@redhat.com>
330 PR rtl-optimization/86620
331 * params.def (max-sched-ready-insns): Bump minimum value to 1.
333 PR rtl-optimization/83213
334 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
335 to last if both are JUMP_INSNs.
337 PR tree-optimization/83843
338 * gimple-ssa-store-merging.c
339 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
340 store_immediate_info for bswap/nop orig_stores.
342 2018-01-15 Andrew Waterman <andrew@sifive.com>
344 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
345 !TARGET_MUL.
346 <UDIV>: Increase cost if !TARGET_DIV.
348 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
350 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
351 (define_attr "cr_logical_3op"): New.
352 (cceq_ior_compare): Adjust.
353 (cceq_ior_compare_complement): Adjust.
354 (*cceq_rev_compare): Adjust.
355 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
356 (is_cracked_insn): Adjust.
357 (insn_must_be_first_in_group): Adjust.
358 * config/rs6000/40x.md: Adjust.
359 * config/rs6000/440.md: Adjust.
360 * config/rs6000/476.md: Adjust.
361 * config/rs6000/601.md: Adjust.
362 * config/rs6000/603.md: Adjust.
363 * config/rs6000/6xx.md: Adjust.
364 * config/rs6000/7450.md: Adjust.
365 * config/rs6000/7xx.md: Adjust.
366 * config/rs6000/8540.md: Adjust.
367 * config/rs6000/cell.md: Adjust.
368 * config/rs6000/e300c2c3.md: Adjust.
369 * config/rs6000/e500mc.md: Adjust.
370 * config/rs6000/e500mc64.md: Adjust.
371 * config/rs6000/e5500.md: Adjust.
372 * config/rs6000/e6500.md: Adjust.
373 * config/rs6000/mpc.md: Adjust.
374 * config/rs6000/power4.md: Adjust.
375 * config/rs6000/power5.md: Adjust.
376 * config/rs6000/power6.md: Adjust.
377 * config/rs6000/power7.md: Adjust.
378 * config/rs6000/power8.md: Adjust.
379 * config/rs6000/power9.md: Adjust.
380 * config/rs6000/rs64.md: Adjust.
381 * config/rs6000/titan.md: Adjust.
383 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
385 * config/i386/predicates.md (indirect_branch_operand): Rewrite
386 ix86_indirect_branch_register logic.
388 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
390 * config/i386/constraints.md (Bs): Update
391 ix86_indirect_branch_register check. Don't check
392 ix86_indirect_branch_register with GOT_memory_operand.
393 (Bw): Likewise.
394 * config/i386/predicates.md (GOT_memory_operand): Don't check
395 ix86_indirect_branch_register here.
396 (GOT32_symbol_operand): Likewise.
398 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
400 * config/i386/predicates.md (constant_call_address_operand):
401 Rewrite ix86_indirect_branch_register logic.
402 (sibcall_insn_operand): Likewise.
404 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
406 * config/i386/constraints.md (Bs): Replace
407 ix86_indirect_branch_thunk_register with
408 ix86_indirect_branch_register.
409 (Bw): Likewise.
410 * config/i386/i386.md (indirect_jump): Likewise.
411 (tablejump): Likewise.
412 (*sibcall_memory): Likewise.
413 (*sibcall_value_memory): Likewise.
414 Peepholes of indirect call and jump via memory: Likewise.
415 * config/i386/i386.opt: Likewise.
416 * config/i386/predicates.md (indirect_branch_operand): Likewise.
417 (GOT_memory_operand): Likewise.
418 (call_insn_operand): Likewise.
419 (sibcall_insn_operand): Likewise.
420 (GOT32_symbol_operand): Likewise.
422 2018-01-15 Jakub Jelinek <jakub@redhat.com>
424 PR middle-end/83837
425 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
426 type rather than type addr's type points to.
427 (expand_omp_atomic_mutex): Likewise.
428 (expand_omp_atomic): Likewise.
430 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
432 PR target/83839
433 * config/i386/i386.c (output_indirect_thunk_function): Use
434 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
435 for __x86_return_thunk.
437 2018-01-15 Richard Biener <rguenther@suse.de>
439 PR middle-end/83850
440 * expmed.c (extract_bit_field_1): Fix typo.
442 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
444 PR target/83687
445 * config/arm/iterators.md (VF): New mode iterator.
446 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
447 Remove integer-related logic from pattern.
448 (neon_vabd<mode>_3): Likewise.
450 2018-01-15 Jakub Jelinek <jakub@redhat.com>
452 PR middle-end/82694
453 * common.opt (fstrict-overflow): No longer an alias.
454 (fwrapv-pointer): New option.
455 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
456 also for pointer types based on flag_wrapv_pointer.
457 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
458 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
459 opts->x_flag_wrapv got set.
460 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
461 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
462 POINTER_TYPE_OVERFLOW_UNDEFINED.
463 * match.pd: Likewise in address comparison pattern.
464 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
466 2018-01-15 Richard Biener <rguenther@suse.de>
468 PR lto/83804
469 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
470 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
471 Reset type names to their identifier if their TYPE_DECL doesn't
472 have linkage (and thus is used for ODR and devirt).
473 (save_debug_info_for_decl): Remove.
474 (save_debug_info_for_type): Likewise.
475 (add_tree_to_fld_list): Adjust.
476 * tree-pretty-print.c (dump_generic_node): Make dumping of
477 type names more robust.
479 2018-01-15 Richard Biener <rguenther@suse.de>
481 * BASE-VER: Bump to 8.0.1.
483 2018-01-14 Martin Sebor <msebor@redhat.com>
485 PR other/83508
486 * builtins.c (check_access): Avoid warning when the no-warning bit
487 is set.
489 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
491 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
492 * ira-color (allocno_hard_regs_compare): Likewise.
494 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
496 PR target/83013
497 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
498 Use .pushsection/.popsection.
500 2018-01-14 Martin Sebor <msebor@redhat.com>
502 PR c++/81327
503 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
505 2018-01-14 Jakub Jelinek <jakub@redhat.com>
507 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
508 entry from extra_headers.
509 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
510 extra_headers, make the list bitwise identical to the i?86-*-* one.
512 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
514 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
515 -mcmodel=large with -mindirect-branch=thunk,
516 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
517 -mfunction-return=thunk-extern.
518 * doc/invoke.texi: Document -mcmodel=large is incompatible with
519 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
520 -mfunction-return=thunk and -mfunction-return=thunk-extern.
522 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
524 * config/i386/i386.c (print_reg): Print the name of the full
525 integer register without '%'.
526 (ix86_print_operand): Handle 'V'.
527 * doc/extend.texi: Document 'V' modifier.
529 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
531 * config/i386/constraints.md (Bs): Disallow memory operand for
532 -mindirect-branch-register.
533 (Bw): Likewise.
534 * config/i386/predicates.md (indirect_branch_operand): Likewise.
535 (GOT_memory_operand): Likewise.
536 (call_insn_operand): Likewise.
537 (sibcall_insn_operand): Likewise.
538 (GOT32_symbol_operand): Likewise.
539 * config/i386/i386.md (indirect_jump): Call convert_memory_address
540 for -mindirect-branch-register.
541 (tablejump): Likewise.
542 (*sibcall_memory): Likewise.
543 (*sibcall_value_memory): Likewise.
544 Disallow peepholes of indirect call and jump via memory for
545 -mindirect-branch-register.
546 (*call_pop): Replace m with Bw.
547 (*call_value_pop): Likewise.
548 (*sibcall_pop_memory): Replace m with Bs.
549 * config/i386/i386.opt (mindirect-branch-register): New option.
550 * doc/invoke.texi: Document -mindirect-branch-register option.
552 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
554 * config/i386/i386-protos.h (ix86_output_function_return): New.
555 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
556 set function_return_type.
557 (indirect_thunk_name): Add ret_p to indicate thunk for function
558 return.
559 (output_indirect_thunk_function): Pass false to
560 indirect_thunk_name.
561 (ix86_output_indirect_branch_via_reg): Likewise.
562 (ix86_output_indirect_branch_via_push): Likewise.
563 (output_indirect_thunk_function): Create alias for function
564 return thunk if regno < 0.
565 (ix86_output_function_return): New function.
566 (ix86_handle_fndecl_attribute): Handle function_return.
567 (ix86_attribute_table): Add function_return.
568 * config/i386/i386.h (machine_function): Add
569 function_return_type.
570 * config/i386/i386.md (simple_return_internal): Use
571 ix86_output_function_return.
572 (simple_return_internal_long): Likewise.
573 * config/i386/i386.opt (mfunction-return=): New option.
574 (indirect_branch): Mention -mfunction-return=.
575 * doc/extend.texi: Document function_return function attribute.
576 * doc/invoke.texi: Document -mfunction-return= option.
578 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
580 * config/i386/i386-opts.h (indirect_branch): New.
581 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
582 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
583 with local indirect jump when converting indirect call and jump.
584 (ix86_set_indirect_branch_type): New.
585 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
586 (indirectlabelno): New.
587 (indirect_thunk_needed): Likewise.
588 (indirect_thunk_bnd_needed): Likewise.
589 (indirect_thunks_used): Likewise.
590 (indirect_thunks_bnd_used): Likewise.
591 (INDIRECT_LABEL): Likewise.
592 (indirect_thunk_name): Likewise.
593 (output_indirect_thunk): Likewise.
594 (output_indirect_thunk_function): Likewise.
595 (ix86_output_indirect_branch_via_reg): Likewise.
596 (ix86_output_indirect_branch_via_push): Likewise.
597 (ix86_output_indirect_branch): Likewise.
598 (ix86_output_indirect_jmp): Likewise.
599 (ix86_code_end): Call output_indirect_thunk_function if needed.
600 (ix86_output_call_insn): Call ix86_output_indirect_branch if
601 needed.
602 (ix86_handle_fndecl_attribute): Handle indirect_branch.
603 (ix86_attribute_table): Add indirect_branch.
604 * config/i386/i386.h (machine_function): Add indirect_branch_type
605 and has_local_indirect_jump.
606 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
607 to true.
608 (tablejump): Likewise.
609 (*indirect_jump): Use ix86_output_indirect_jmp.
610 (*tablejump_1): Likewise.
611 (simple_return_indirect_internal): Likewise.
612 * config/i386/i386.opt (mindirect-branch=): New option.
613 (indirect_branch): New.
614 (keep): Likewise.
615 (thunk): Likewise.
616 (thunk-inline): Likewise.
617 (thunk-extern): Likewise.
618 * doc/extend.texi: Document indirect_branch function attribute.
619 * doc/invoke.texi: Document -mindirect-branch= option.
621 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
623 PR ipa/83051
624 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
626 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
628 * ipa-inline.c (want_inline_small_function_p): Return false if
629 inlining has already failed with CIF_FINAL_ERROR.
630 (update_caller_keys): Call want_inline_small_function_p before
631 can_inline_edge_p.
632 (update_callee_keys): Likewise.
634 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
636 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
637 New function.
638 (rs6000_quadword_masked_address_p): Likewise.
639 (quad_aligned_load_p): Likewise.
640 (quad_aligned_store_p): Likewise.
641 (const_load_sequence_p): Add comment to describe the outer-most loop.
642 (mimic_memory_attributes_and_flags): New function.
643 (rs6000_gen_stvx): Likewise.
644 (replace_swapped_aligned_store): Likewise.
645 (rs6000_gen_lvx): Likewise.
646 (replace_swapped_aligned_load): Likewise.
647 (replace_swapped_load_constant): Capitalize argument name in
648 comment describing this function.
649 (rs6000_analyze_swaps): Add a third pass to search for vector loads
650 and stores that access quad-word aligned addresses and replace
651 with stvx or lvx instructions when appropriate.
652 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
653 New function prototype.
654 (rs6000_quadword_masked_address_p): Likewise.
655 (rs6000_gen_lvx): Likewise.
656 (rs6000_gen_stvx): Likewise.
657 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
658 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
659 when memory address is aligned.
660 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
661 this split to select lvx instruction when memory address is aligned.
662 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
663 instruction when memory address is aligned.
664 (*vsx_le_perm_load_v16qi): Likewise.
665 (four unnamed splitters): Modify to select the stvx instruction
666 when memory is aligned.
668 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
670 * predict.c (determine_unlikely_bbs): Handle correctly BBs
671 which appears in the queue multiple times.
673 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
674 Alan Hayward <alan.hayward@arm.com>
675 David Sherwood <david.sherwood@arm.com>
677 * tree-vectorizer.h (vec_lower_bound): New structure.
678 (_loop_vec_info): Add check_nonzero and lower_bounds.
679 (LOOP_VINFO_CHECK_NONZERO): New macro.
680 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
681 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
682 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
683 fields. Make seg_len the distance travelled, not including the
684 access size.
685 (dr_direction_indicator): Declare.
686 (dr_zero_step_indicator): Likewise.
687 (dr_known_forward_stride_p): Likewise.
688 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
689 tree-ssanames.h.
690 (runtime_alias_check_p): Allow runtime alias checks with
691 variable strides.
692 (operator ==): Compare access_size and align.
693 (prune_runtime_alias_test_list): Rework for new distinction between
694 the access_size and seg_len.
695 (create_intersect_range_checks_index): Likewise. Cope with polynomial
696 segment lengths.
697 (get_segment_min_max): New function.
698 (create_intersect_range_checks): Use it.
699 (dr_step_indicator): New function.
700 (dr_direction_indicator): Likewise.
701 (dr_zero_step_indicator): Likewise.
702 (dr_known_forward_stride_p): Likewise.
703 * tree-loop-distribution.c (data_ref_segment_size): Return
704 DR_STEP * (niters - 1).
705 (compute_alias_check_pairs): Update call to the dr_with_seg_len
706 constructor.
707 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
708 (vect_preserves_scalar_order_p): New function, split out from...
709 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
710 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
711 (vect_vfa_access_size): New function.
712 (vect_vfa_align): Likewise.
713 (vect_compile_time_alias): Take access_size_a and access_b arguments.
714 (dump_lower_bound): New function.
715 (vect_check_lower_bound): Likewise.
716 (vect_small_gap_p): Likewise.
717 (vectorizable_with_step_bound_p): Likewise.
718 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
719 depencies if the vectorization factor is 1. Convert the checks
720 for nonzero steps into checks on the bounds of DR_STEP. Try using
721 a bunds check for variable steps if the minimum required step is
722 relatively small. Update calls to the dr_with_seg_len
723 constructor and to vect_compile_time_alias.
724 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
725 function.
726 (vect_loop_versioning): Call it.
727 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
728 when retrying.
729 (vect_estimate_min_profitable_iters): Account for any bounds checks.
731 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
732 Alan Hayward <alan.hayward@arm.com>
733 David Sherwood <david.sherwood@arm.com>
735 * doc/sourcebuild.texi (vect_scatter_store): Document.
736 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
737 optabs.
738 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
739 Document.
740 * genopinit.c (main): Add supports_vec_scatter_store and
741 supports_vec_scatter_store_cached to target_optabs.
742 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
743 IFN_MASK_SCATTER_STORE.
744 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
745 functions.
746 * internal-fn.h (internal_store_fn_p): Declare.
747 (internal_fn_stored_value_index): Likewise.
748 * internal-fn.c (scatter_store_direct): New macro.
749 (expand_scatter_store_optab_fn): New function.
750 (direct_scatter_store_optab_supported_p): New macro.
751 (internal_store_fn_p): New function.
752 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
753 IFN_MASK_SCATTER_STORE.
754 (internal_fn_mask_index): Likewise.
755 (internal_fn_stored_value_index): New function.
756 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
757 for scatter stores.
758 * optabs-query.h (supports_vec_scatter_store_p): Declare.
759 * optabs-query.c (supports_vec_scatter_store_p): New function.
760 * tree-vectorizer.h (vect_get_store_rhs): Declare.
761 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
762 true for scatter stores.
763 (vect_gather_scatter_fn_p): Handle scatter stores too.
764 (vect_check_gather_scatter): Consider using scatter stores if
765 supports_vec_scatter_store_p.
766 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
767 scatter stores too.
768 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
769 internal_fn_stored_value_index.
770 (check_load_store_masking): Handle scatter stores too.
771 (vect_get_store_rhs): Make public.
772 (vectorizable_call): Use internal_store_fn_p.
773 (vectorizable_store): Handle scatter store internal functions.
774 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
775 when deciding whether the end of the group has been reached.
776 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
777 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
778 (mask_scatter_store<mode>): New insns.
780 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
781 Alan Hayward <alan.hayward@arm.com>
782 David Sherwood <david.sherwood@arm.com>
784 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
785 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
786 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
787 function.
788 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
789 Use vect_truncate_gather_scatter_offset if we can't treat the
790 operation as a normal gather load or scatter store.
791 (get_group_load_store_type): Take the gather_scatter_info
792 as argument. Try using a gather load or scatter store for
793 single-element groups.
794 (get_load_store_type): Update calls to get_group_load_store_type
795 and vect_use_strided_gather_scatters_p.
797 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
798 Alan Hayward <alan.hayward@arm.com>
799 David Sherwood <david.sherwood@arm.com>
801 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
802 optional tree argument.
803 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
804 null target hooks.
805 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
806 but continue to use the current value as a fallback.
807 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
808 to compare the updates.
809 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
810 (get_load_store_type): Use it when handling a strided access.
811 (vect_get_strided_load_store_ops): New function.
812 (vect_get_data_ptr_increment): Likewise.
813 (vectorizable_load): Handle strided gather loads. Always pass
814 a step to vect_create_data_ref_ptr and bump_vector_ptr.
816 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
817 Alan Hayward <alan.hayward@arm.com>
818 David Sherwood <david.sherwood@arm.com>
820 * doc/md.texi (gather_load@var{m}): Document.
821 (mask_gather_load@var{m}): Likewise.
822 * genopinit.c (main): Add supports_vec_gather_load and
823 supports_vec_gather_load_cached to target_optabs.
824 * optabs-tree.c (init_tree_optimization_optabs): Use
825 ggc_cleared_alloc to allocate target_optabs.
826 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
827 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
828 functions.
829 * internal-fn.h (internal_load_fn_p): Declare.
830 (internal_gather_scatter_fn_p): Likewise.
831 (internal_fn_mask_index): Likewise.
832 (internal_gather_scatter_fn_supported_p): Likewise.
833 * internal-fn.c (gather_load_direct): New macro.
834 (expand_gather_load_optab_fn): New function.
835 (direct_gather_load_optab_supported_p): New macro.
836 (direct_internal_fn_optab): New function.
837 (internal_load_fn_p): Likewise.
838 (internal_gather_scatter_fn_p): Likewise.
839 (internal_fn_mask_index): Likewise.
840 (internal_gather_scatter_fn_supported_p): Likewise.
841 * optabs-query.c (supports_at_least_one_mode_p): New function.
842 (supports_vec_gather_load_p): Likewise.
843 * optabs-query.h (supports_vec_gather_load_p): Declare.
844 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
845 and memory_type field.
846 (NUM_PATTERNS): Bump to 15.
847 * tree-vect-data-refs.c: Include internal-fn.h.
848 (vect_gather_scatter_fn_p): New function.
849 (vect_describe_gather_scatter_call): Likewise.
850 (vect_check_gather_scatter): Try using internal functions for
851 gather loads. Recognize existing calls to a gather load function.
852 (vect_analyze_data_refs): Consider using gather loads if
853 supports_vec_gather_load_p.
854 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
855 (vect_get_gather_scatter_offset_type): Likewise.
856 (vect_convert_mask_for_vectype): Likewise.
857 (vect_add_conversion_to_patterm): Likewise.
858 (vect_try_gather_scatter_pattern): Likewise.
859 (vect_recog_gather_scatter_pattern): New pattern recognizer.
860 (vect_vect_recog_func_ptrs): Add it.
861 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
862 internal_fn_mask_index and internal_gather_scatter_fn_p.
863 (check_load_store_masking): Take the gather_scatter_info as an
864 argument and handle gather loads.
865 (vect_get_gather_scatter_ops): New function.
866 (vectorizable_call): Check internal_load_fn_p.
867 (vectorizable_load): Likewise. Handle gather load internal
868 functions.
869 (vectorizable_store): Update call to check_load_store_masking.
870 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
871 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
872 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
873 (aarch64_gather_scale_operand_d): New predicates.
874 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
875 (mask_gather_load<mode>): New insns.
877 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
878 Alan Hayward <alan.hayward@arm.com>
879 David Sherwood <david.sherwood@arm.com>
881 * optabs.def (fold_left_plus_optab): New optab.
882 * doc/md.texi (fold_left_plus_@var{m}): Document.
883 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
884 * internal-fn.c (fold_left_direct): Define.
885 (expand_fold_left_optab_fn): Likewise.
886 (direct_fold_left_optab_supported_p): Likewise.
887 * fold-const-call.c (fold_const_fold_left): New function.
888 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
889 * tree-parloops.c (valid_reduction_p): New function.
890 (gather_scalar_reductions): Use it.
891 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
892 (vect_finish_replace_stmt): Declare.
893 * tree-vect-loop.c (fold_left_reduction_fn): New function.
894 (needs_fold_left_reduction_p): New function, split out from...
895 (vect_is_simple_reduction): ...here. Accept reductions that
896 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
897 (vect_force_simple_reduction): Also store the reduction type in
898 the assignment's STMT_VINFO_REDUC_TYPE.
899 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
900 (merge_with_identity): New function.
901 (vect_expand_fold_left): Likewise.
902 (vectorize_fold_left_reduction): Likewise.
903 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
904 scalar phi in place for it. Check for target support and reject
905 cases that would reassociate the operation. Defer the transform
906 phase to vectorize_fold_left_reduction.
907 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
908 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
909 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
911 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
913 * tree-if-conv.c (predicate_mem_writes): Remove redundant
914 call to ifc_temp_var.
916 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
917 Alan Hayward <alan.hayward@arm.com>
918 David Sherwood <david.sherwood@arm.com>
920 * target.def (legitimize_address_displacement): Take the original
921 offset as a poly_int.
922 * targhooks.h (default_legitimize_address_displacement): Update
923 accordingly.
924 * targhooks.c (default_legitimize_address_displacement): Likewise.
925 * doc/tm.texi: Regenerate.
926 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
927 as an argument, moving assert of ad->disp == ad->disp_term to...
928 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
929 Try calling targetm.legitimize_address_displacement before expanding
930 the address rather than afterwards, and adjust for the new interface.
931 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
932 Match the new hook interface. Handle SVE addresses.
933 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
934 new hook interface.
936 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
938 * Makefile.in (OBJS): Add early-remat.o.
939 * target.def (select_early_remat_modes): New hook.
940 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
941 * doc/tm.texi: Regenerate.
942 * targhooks.h (default_select_early_remat_modes): Declare.
943 * targhooks.c (default_select_early_remat_modes): New function.
944 * timevar.def (TV_EARLY_REMAT): New timevar.
945 * passes.def (pass_early_remat): New pass.
946 * tree-pass.h (make_pass_early_remat): Declare.
947 * early-remat.c: New file.
948 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
949 function.
950 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
952 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
953 Alan Hayward <alan.hayward@arm.com>
954 David Sherwood <david.sherwood@arm.com>
956 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
957 vfm1 with a bound_epilog parameter.
958 (vect_do_peeling): Update calls accordingly, and move the prologue
959 call earlier in the function. Treat the base bound_epilog as 0 for
960 fully-masked loops and retain vf - 1 for other loops. Add 1 to
961 this base when peeling for gaps.
962 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
963 with fully-masked loops.
964 (vect_estimate_min_profitable_iters): Handle the single peeled
965 iteration in that case.
967 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
968 Alan Hayward <alan.hayward@arm.com>
969 David Sherwood <david.sherwood@arm.com>
971 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
972 single-element interleaving even if the size is not a power of 2.
973 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
974 accesses for single-element interleaving if the group size is
975 not a power of 2.
977 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
978 Alan Hayward <alan.hayward@arm.com>
979 David Sherwood <david.sherwood@arm.com>
981 * doc/md.texi (fold_extract_last_@var{m}): Document.
982 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
983 * optabs.def (fold_extract_last_optab): New optab.
984 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
985 * internal-fn.c (fold_extract_direct): New macro.
986 (expand_fold_extract_optab_fn): Likewise.
987 (direct_fold_extract_optab_supported_p): Likewise.
988 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
989 * tree-vect-loop.c (vect_model_reduction_cost): Handle
990 EXTRACT_LAST_REDUCTION.
991 (get_initial_def_for_reduction): Do not create an initial vector
992 for EXTRACT_LAST_REDUCTION reductions.
993 (vectorizable_reduction): Leave the scalar phi in place for
994 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
995 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
996 epilogue code for EXTRACT_LAST_REDUCTION and defer the
997 transform phase to vectorizable_condition.
998 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
999 split out from...
1000 (vect_finish_stmt_generation): ...here.
1001 (vect_finish_replace_stmt): New function.
1002 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1003 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1004 pattern.
1005 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1007 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1008 Alan Hayward <alan.hayward@arm.com>
1009 David Sherwood <david.sherwood@arm.com>
1011 * doc/md.texi (extract_last_@var{m}): Document.
1012 * optabs.def (extract_last_optab): New optab.
1013 * internal-fn.def (EXTRACT_LAST): New internal function.
1014 * internal-fn.c (cond_unary_direct): New macro.
1015 (expand_cond_unary_optab_fn): Likewise.
1016 (direct_cond_unary_optab_supported_p): Likewise.
1017 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1018 loops using EXTRACT_LAST.
1019 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1020 (extract_last_<mode>): ...this optab.
1021 (vec_extract<mode><Vel>): Update accordingly.
1023 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1024 Alan Hayward <alan.hayward@arm.com>
1025 David Sherwood <david.sherwood@arm.com>
1027 * target.def (empty_mask_is_expensive): New hook.
1028 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1029 * doc/tm.texi: Regenerate.
1030 * targhooks.h (default_empty_mask_is_expensive): Declare.
1031 * targhooks.c (default_empty_mask_is_expensive): New function.
1032 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1033 if the target says that empty masks are expensive.
1034 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1035 New function.
1036 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1038 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1039 Alan Hayward <alan.hayward@arm.com>
1040 David Sherwood <david.sherwood@arm.com>
1042 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1043 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1044 (vect_use_loop_mask_for_alignment_p): New function.
1045 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1046 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1047 niters_skip argument. Make sure that the first niters_skip elements
1048 of the first iteration are inactive.
1049 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1050 Update call to vect_set_loop_masks_directly.
1051 (get_misalign_in_elems): New function, split out from...
1052 (vect_gen_prolog_loop_niters): ...here.
1053 (vect_update_init_of_dr): Take a code argument that specifies whether
1054 the adjustment should be added or subtracted.
1055 (vect_update_init_of_drs): Likewise.
1056 (vect_prepare_for_masked_peels): New function.
1057 (vect_do_peeling): Skip prologue peeling if we're using a mask
1058 instead. Update call to vect_update_inits_of_drs.
1059 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1060 mask_skip_niters.
1061 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1062 alignment. Do not include the number of peeled iterations in
1063 the minimum threshold in that case.
1064 (vectorizable_induction): Adjust the start value down by
1065 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1066 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1067 Take the number of skipped iterations into account when calculating
1068 the loop bounds.
1069 * tree-vect-stmts.c (vect_gen_while_not): New function.
1071 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1072 Alan Hayward <alan.hayward@arm.com>
1073 David Sherwood <david.sherwood@arm.com>
1075 * doc/sourcebuild.texi (vect_fully_masked): Document.
1076 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1077 default value to 0.
1078 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1079 split out from...
1080 (vect_analyze_loop_2): ...here. Don't check the vectorization
1081 factor against the number of loop iterations if the loop is
1082 fully-masked.
1084 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1085 Alan Hayward <alan.hayward@arm.com>
1086 David Sherwood <david.sherwood@arm.com>
1088 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1089 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1090 (dump_groups): Update accordingly.
1091 (iv_use::mem_type): New member variable.
1092 (address_p): New function.
1093 (record_use): Add a mem_type argument and initialize the new
1094 mem_type field.
1095 (record_group_use): Add a mem_type argument. Use address_p.
1096 Remove obsolete null checks of base_object. Update call to record_use.
1097 (find_interesting_uses_op): Update call to record_group_use.
1098 (find_interesting_uses_cond): Likewise.
1099 (find_interesting_uses_address): Likewise.
1100 (get_mem_type_for_internal_fn): New function.
1101 (find_address_like_use): Likewise.
1102 (find_interesting_uses_stmt): Try find_address_like_use before
1103 calling find_interesting_uses_op.
1104 (addr_offset_valid_p): Use the iv mem_type field as the type
1105 of the addressed memory.
1106 (add_autoinc_candidates): Likewise.
1107 (get_address_cost): Likewise.
1108 (split_small_address_groups_p): Use address_p.
1109 (split_address_groups): Likewise.
1110 (add_iv_candidate_for_use): Likewise.
1111 (autoinc_possible_for_pair): Likewise.
1112 (rewrite_groups): Likewise.
1113 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1114 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1115 (get_alias_ptr_type_for_ptr_address): New function.
1116 (rewrite_use_address): Rewrite address uses in calls that were
1117 identified by find_address_like_use.
1119 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1120 Alan Hayward <alan.hayward@arm.com>
1121 David Sherwood <david.sherwood@arm.com>
1123 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1124 TARGET_MEM_REFs.
1125 * gimple-expr.h (is_gimple_addressable: Likewise.
1126 * gimple-expr.c (is_gimple_address): Likewise.
1127 * internal-fn.c (expand_call_mem_ref): New function.
1128 (expand_mask_load_optab_fn): Use it.
1129 (expand_mask_store_optab_fn): Likewise.
1131 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1132 Alan Hayward <alan.hayward@arm.com>
1133 David Sherwood <david.sherwood@arm.com>
1135 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1136 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1137 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1138 (cond_umax@var{mode}): Document.
1139 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1140 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1141 (cond_umin_optab, cond_umax_optab): New optabs.
1142 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1143 (COND_IOR, COND_XOR): New internal functions.
1144 * internal-fn.h (get_conditional_internal_fn): Declare.
1145 * internal-fn.c (cond_binary_direct): New macro.
1146 (expand_cond_binary_optab_fn): Likewise.
1147 (direct_cond_binary_optab_supported_p): Likewise.
1148 (get_conditional_internal_fn): New function.
1149 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1150 Cope with reduction statements that are vectorized as calls rather
1151 than assignments.
1152 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1153 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1154 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1155 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1156 (UNSPEC_COND_EOR): New unspecs.
1157 (optab): Add mappings for them.
1158 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1159 (sve_int_op, sve_fp_op): New int attributes.
1161 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1162 Alan Hayward <alan.hayward@arm.com>
1163 David Sherwood <david.sherwood@arm.com>
1165 * optabs.def (while_ult_optab): New optab.
1166 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1167 * internal-fn.def (WHILE_ULT): New internal function.
1168 * internal-fn.h (direct_internal_fn_supported_p): New override
1169 that takes two types as argument.
1170 * internal-fn.c (while_direct): New macro.
1171 (expand_while_optab_fn): New function.
1172 (convert_optab_supported_p): Likewise.
1173 (direct_while_optab_supported_p): New macro.
1174 * wide-int.h (wi::udiv_ceil): New function.
1175 * tree-vectorizer.h (rgroup_masks): New structure.
1176 (vec_loop_masks): New typedef.
1177 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1178 and fully_masked_p.
1179 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1180 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1181 (vect_max_vf): New function.
1182 (slpeel_make_loop_iterate_ntimes): Delete.
1183 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1184 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1185 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1186 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1187 internal-fn.h, stor-layout.h and optabs-query.h.
1188 (vect_set_loop_mask): New function.
1189 (add_preheader_seq): Likewise.
1190 (add_header_seq): Likewise.
1191 (interleave_supported_p): Likewise.
1192 (vect_maybe_permute_loop_masks): Likewise.
1193 (vect_set_loop_masks_directly): Likewise.
1194 (vect_set_loop_condition_masked): Likewise.
1195 (vect_set_loop_condition_unmasked): New function, split out from
1196 slpeel_make_loop_iterate_ntimes.
1197 (slpeel_make_loop_iterate_ntimes): Rename to..
1198 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1199 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1200 (vect_do_peeling): Update call accordingly.
1201 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1202 loops.
1203 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1204 mask_compare_type, can_fully_mask_p and fully_masked_p.
1205 (release_vec_loop_masks): New function.
1206 (_loop_vec_info): Use it to free the loop masks.
1207 (can_produce_all_loop_masks_p): New function.
1208 (vect_get_max_nscalars_per_iter): Likewise.
1209 (vect_verify_full_masking): Likewise.
1210 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1211 retries, and free the mask rgroups before retrying. Check loop-wide
1212 reasons for disallowing fully-masked loops. Make the final decision
1213 about whether use a fully-masked loop or not.
1214 (vect_estimate_min_profitable_iters): Do not assume that peeling
1215 for the number of iterations will be needed for fully-masked loops.
1216 (vectorizable_reduction): Disable fully-masked loops.
1217 (vectorizable_live_operation): Likewise.
1218 (vect_halve_mask_nunits): New function.
1219 (vect_double_mask_nunits): Likewise.
1220 (vect_record_loop_mask): Likewise.
1221 (vect_get_loop_mask): Likewise.
1222 (vect_transform_loop): Handle the case in which the final loop
1223 iteration might handle a partial vector. Call vect_set_loop_condition
1224 instead of slpeel_make_loop_iterate_ntimes.
1225 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1226 (check_load_store_masking): New function.
1227 (prepare_load_store_mask): Likewise.
1228 (vectorizable_store): Handle fully-masked loops.
1229 (vectorizable_load): Likewise.
1230 (supportable_widening_operation): Use vect_halve_mask_nunits for
1231 booleans.
1232 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1233 (vect_gen_while): New function.
1234 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1235 (aarch64_uqdec<mode>): New insn.
1237 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1238 Alan Hayward <alan.hayward@arm.com>
1239 David Sherwood <david.sherwood@arm.com>
1241 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1242 (reduc_xor_scal_optab): New optabs.
1243 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1244 (reduc_xor_scal_@var{m}): Document.
1245 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1246 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1247 internal functions.
1248 * fold-const-call.c (fold_const_call): Handle them.
1249 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1250 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1251 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1252 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1253 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1254 (UNSPEC_XORV): New unspecs.
1255 (optab): Add entries for them.
1256 (BITWISEV): New int iterator.
1257 (bit_reduc_op): New int attributes.
1259 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1260 Alan Hayward <alan.hayward@arm.com>
1261 David Sherwood <david.sherwood@arm.com>
1263 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1264 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1265 * optabs.def (vec_shl_insert_optab): New optab.
1266 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1267 (duplicate_and_interleave): Likewise.
1268 * tree-vect-loop.c: Include internal-fn.h.
1269 (neutral_op_for_slp_reduction): New function, split out from
1270 get_initial_defs_for_reduction.
1271 (get_initial_def_for_reduction): Handle option 2 for variable-length
1272 vectors by loading the neutral value into a vector and then shifting
1273 the initial value into element 0.
1274 (get_initial_defs_for_reduction): Replace the code argument with
1275 the neutral value calculated by neutral_op_for_slp_reduction.
1276 Use gimple_build_vector for constant-length vectors.
1277 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1278 but the first group_size elements have a neutral value.
1279 Use duplicate_and_interleave otherwise.
1280 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1281 Update call to get_initial_defs_for_reduction. Handle SLP
1282 reductions for variable-length vectors by creating one vector
1283 result for each scalar result, with the elements associated
1284 with other scalar results stubbed out with the neutral value.
1285 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1286 Require IFN_VEC_SHL_INSERT for double reductions on
1287 variable-length vectors, or SLP reductions that have
1288 a neutral value. Require can_duplicate_and_interleave_p
1289 support for variable-length unchained SLP reductions if there
1290 is no neutral value, such as for MIN/MAX reductions. Also require
1291 the number of vector elements to be a multiple of the number of
1292 SLP statements when doing variable-length unchained SLP reductions.
1293 Update call to vect_create_epilog_for_reduction.
1294 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1295 and remove initial values.
1296 (duplicate_and_interleave): Make public.
1297 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1298 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1300 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1301 Alan Hayward <alan.hayward@arm.com>
1302 David Sherwood <david.sherwood@arm.com>
1304 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1305 (can_duplicate_and_interleave_p): New function.
1306 (vect_get_and_check_slp_defs): Take the vector of statements
1307 rather than just the current one. Remove excess parentheses.
1308 Restriction rejectinon of vect_constant_def and vect_external_def
1309 for variable-length vectors to boolean types, or types for which
1310 can_duplicate_and_interleave_p is false.
1311 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1312 (duplicate_and_interleave): New function.
1313 (vect_get_constant_vectors): Use gimple_build_vector for
1314 constant-length vectors and suitable variable-length constant
1315 vectors. Use duplicate_and_interleave for other variable-length
1316 vectors. Don't defer the update when inserting new statements.
1318 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1319 Alan Hayward <alan.hayward@arm.com>
1320 David Sherwood <david.sherwood@arm.com>
1322 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1323 min_profitable_iters doesn't go negative.
1325 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1326 Alan Hayward <alan.hayward@arm.com>
1327 David Sherwood <david.sherwood@arm.com>
1329 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1330 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1331 * optabs.def (vec_mask_load_lanes_optab): New optab.
1332 (vec_mask_store_lanes_optab): Likewise.
1333 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1334 (MASK_STORE_LANES): Likewise.
1335 * internal-fn.c (mask_load_lanes_direct): New macro.
1336 (mask_store_lanes_direct): Likewise.
1337 (expand_mask_load_optab_fn): Handle masked operations.
1338 (expand_mask_load_lanes_optab_fn): New macro.
1339 (expand_mask_store_optab_fn): Handle masked operations.
1340 (expand_mask_store_lanes_optab_fn): New macro.
1341 (direct_mask_load_lanes_optab_supported_p): Likewise.
1342 (direct_mask_store_lanes_optab_supported_p): Likewise.
1343 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1344 parameter.
1345 (vect_load_lanes_supported): Likewise.
1346 * tree-vect-data-refs.c (strip_conversion): New function.
1347 (can_group_stmts_p): Likewise.
1348 (vect_analyze_data_ref_accesses): Use it instead of checking
1349 for a pair of assignments.
1350 (vect_store_lanes_supported): Take a masked_p parameter.
1351 (vect_load_lanes_supported): Likewise.
1352 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1353 vect_store_lanes_supported and vect_load_lanes_supported.
1354 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1355 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1356 parameter. Don't allow gaps for masked accesses.
1357 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1358 and vect_load_lanes_supported.
1359 (get_load_store_type): Take a masked_p parameter and update
1360 call to get_group_load_store_type.
1361 (vectorizable_store): Update call to get_load_store_type.
1362 Handle IFN_MASK_STORE_LANES.
1363 (vectorizable_load): Update call to get_load_store_type.
1364 Handle IFN_MASK_LOAD_LANES.
1366 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1367 Alan Hayward <alan.hayward@arm.com>
1368 David Sherwood <david.sherwood@arm.com>
1370 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1371 modes for SVE.
1372 * config/aarch64/aarch64-protos.h
1373 (aarch64_sve_struct_memory_operand_p): Declare.
1374 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1375 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1376 (VPRED, vpred): Handle SVE structure modes.
1377 * config/aarch64/constraints.md (Utx): New constraint.
1378 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1379 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1380 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1381 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1382 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1383 structure modes. Split into pieces after RA.
1384 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1385 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1386 New patterns.
1387 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1388 SVE structure modes.
1389 (aarch64_classify_address): Likewise.
1390 (sizetochar): Move earlier in file.
1391 (aarch64_print_operand): Handle SVE register lists.
1392 (aarch64_array_mode): New function.
1393 (aarch64_sve_struct_memory_operand_p): Likewise.
1394 (TARGET_ARRAY_MODE): Redefine.
1396 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1397 Alan Hayward <alan.hayward@arm.com>
1398 David Sherwood <david.sherwood@arm.com>
1400 * target.def (array_mode): New target hook.
1401 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1402 * doc/tm.texi: Regenerate.
1403 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1404 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1405 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1406 targetm.array_mode.
1407 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1408 type sizes.
1410 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1411 Alan Hayward <alan.hayward@arm.com>
1412 David Sherwood <david.sherwood@arm.com>
1414 * fold-const.c (fold_binary_loc): Check the argument types
1415 rather than the result type when testing for a vector operation.
1417 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1419 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1420 * doc/tm.texi: Regenerate.
1422 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1423 Alan Hayward <alan.hayward@arm.com>
1424 David Sherwood <david.sherwood@arm.com>
1426 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1427 (sve): Document new AArch64 extension.
1428 * doc/md.texi (w): Extend the description of the AArch64
1429 constraint to include SVE vectors.
1430 (Upl, Upa): Document new AArch64 predicate constraints.
1431 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1432 enum.
1433 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1434 (msve-vector-bits=): New option.
1435 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1436 SVE when these are disabled.
1437 (sve): New extension.
1438 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1439 modes. Adjust their number of units based on aarch64_sve_vg.
1440 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1441 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1442 aarch64_addr_query_type.
1443 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1444 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1445 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1446 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1447 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1448 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1449 (aarch64_simd_imm_zero_p): Delete.
1450 (aarch64_check_zero_based_sve_index_immediate): Declare.
1451 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1452 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1453 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1454 (aarch64_sve_float_mul_immediate_p): Likewise.
1455 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1456 rather than an rtx.
1457 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1458 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1459 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1460 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1461 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1462 (aarch64_regmode_natural_size): Likewise.
1463 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1464 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1465 left one place.
1466 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1467 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1468 for VG and the SVE predicate registers.
1469 (V_ALIASES): Add a "z"-prefixed alias.
1470 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1471 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1472 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1473 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1474 (REG_CLASS_NAMES): Add entries for them.
1475 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1476 and the predicate registers.
1477 (aarch64_sve_vg): Declare.
1478 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1479 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1480 (REGMODE_NATURAL_SIZE): Define.
1481 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1482 SVE macros.
1483 * config/aarch64/aarch64.c: Include cfgrtl.h.
1484 (simd_immediate_info): Add a constructor for series vectors,
1485 and an associated step field.
1486 (aarch64_sve_vg): New variable.
1487 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1488 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1489 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1490 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1491 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1492 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1493 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1494 (aarch64_get_mask_mode): New functions.
1495 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1496 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1497 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1498 predicate modes and predicate registers. Explicitly restrict
1499 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1500 to store a vector mode if it is recognized by
1501 aarch64_classify_vector_mode.
1502 (aarch64_regmode_natural_size): New function.
1503 (aarch64_hard_regno_caller_save_mode): Return the original mode
1504 for predicates.
1505 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1506 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1507 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1508 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1509 functions.
1510 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1511 does not overlap dest if the function is frame-related. Handle
1512 SVE constants.
1513 (aarch64_split_add_offset): New function.
1514 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1515 them aarch64_add_offset.
1516 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1517 and update call to aarch64_sub_sp.
1518 (aarch64_add_cfa_expression): New function.
1519 (aarch64_expand_prologue): Pass extra temporary registers to the
1520 functions above. Handle the case in which we need to emit new
1521 DW_CFA_expressions for registers that were originally saved
1522 relative to the stack pointer, but now have to be expressed
1523 relative to the frame pointer.
1524 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1525 functions above.
1526 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1527 IP0 and IP1 values for SVE frames.
1528 (aarch64_expand_vec_series): New function.
1529 (aarch64_expand_sve_widened_duplicate): Likewise.
1530 (aarch64_expand_sve_const_vector): Likewise.
1531 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1532 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1533 into the register, rather than emitting a SET directly.
1534 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1535 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1536 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1537 (offset_9bit_signed_scaled_p): New functions.
1538 (aarch64_replicate_bitmask_imm): New function.
1539 (aarch64_bitmask_imm): Use it.
1540 (aarch64_cannot_force_const_mem): Reject expressions involving
1541 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1542 (aarch64_classify_index): Handle SVE indices, by requiring
1543 a plain register index with a scale that matches the element size.
1544 (aarch64_classify_address): Handle SVE addresses. Assert that
1545 the mode of the address is VOIDmode or an integer mode.
1546 Update call to aarch64_classify_symbol.
1547 (aarch64_classify_symbolic_expression): Update call to
1548 aarch64_classify_symbol.
1549 (aarch64_const_vec_all_in_range_p): New function.
1550 (aarch64_print_vector_float_operand): Likewise.
1551 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1552 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1553 and the FP immediates 1.0 and 0.5.
1554 (aarch64_print_address_internal): Handle SVE addresses.
1555 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1556 (aarch64_regno_regclass): Handle predicate registers.
1557 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1558 data modes.
1559 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1560 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1561 (aarch64_convert_sve_vector_bits): New function.
1562 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1563 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1564 rather than an rtx.
1565 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1566 Handle SVE vector and predicate modes. Accept VL-based constants
1567 that need only one temporary register, and VL offsets that require
1568 no temporary registers.
1569 (aarch64_conditional_register_usage): Mark the predicate registers
1570 as fixed if SVE isn't available.
1571 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1572 Return true for SVE vector and predicate modes.
1573 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1574 rather than an unsigned int. Handle SVE modes.
1575 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1576 SVE modes.
1577 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1578 if SVE is enabled.
1579 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1580 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1581 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1582 (aarch64_sve_float_mul_immediate_p): New functions.
1583 (aarch64_sve_valid_immediate): New function.
1584 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1585 Explicitly reject structure modes. Check for INDEX constants.
1586 Handle PTRUE and PFALSE constants.
1587 (aarch64_check_zero_based_sve_index_immediate): New function.
1588 (aarch64_simd_imm_zero_p): Delete.
1589 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1590 vector modes. Accept constants in the range of CNT[BHWD].
1591 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1592 ask for an Advanced SIMD mode.
1593 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1594 (aarch64_simd_vector_alignment): Handle SVE predicates.
1595 (aarch64_vectorize_preferred_vector_alignment): New function.
1596 (aarch64_simd_vector_alignment_reachable): Use it instead of
1597 the vector size.
1598 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1599 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1600 functions.
1601 (MAX_VECT_LEN): Delete.
1602 (expand_vec_perm_d): Add a vec_flags field.
1603 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1604 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1605 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1606 for SVE modes.
1607 (aarch64_evpc_rev): Rename to...
1608 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1609 (aarch64_evpc_rev_global): New function.
1610 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1611 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1612 MAX_VECT_LEN.
1613 (aarch64_evpc_sve_tbl): New function.
1614 (aarch64_expand_vec_perm_const_1): Update after rename of
1615 aarch64_evpc_rev. Handle SVE permutes too, trying
1616 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1617 than aarch64_evpc_tbl.
1618 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1619 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1620 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1621 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1622 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1623 (aarch64_expand_sve_vcond): New functions.
1624 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1625 of aarch64_vector_mode_p.
1626 (aarch64_dwarf_poly_indeterminate_value): New function.
1627 (aarch64_compute_pressure_classes): Likewise.
1628 (aarch64_can_change_mode_class): Likewise.
1629 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1630 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1631 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1632 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1633 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1634 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1635 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1636 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1637 constraints.
1638 (Dn, Dl, Dr): Accept const as well as const_vector.
1639 (Dz): Likewise. Compare against CONST0_RTX.
1640 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1641 of "vector" where appropriate.
1642 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1643 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1644 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1645 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1646 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1647 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1648 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1649 (v_int_equiv): Extend to SVE modes.
1650 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1651 mode attributes.
1652 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1653 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1654 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1655 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1656 (SVE_COND_FP_CMP): New int iterators.
1657 (perm_hilo): Handle the new unpack unspecs.
1658 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1659 attributes.
1660 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1661 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1662 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1663 (aarch64_equality_operator, aarch64_constant_vector_operand)
1664 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1665 (aarch64_sve_nonimmediate_operand): Likewise.
1666 (aarch64_sve_general_operand): Likewise.
1667 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1668 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1669 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1670 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1671 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1672 (aarch64_sve_float_arith_immediate): Likewise.
1673 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1674 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1675 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1676 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1677 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1678 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1679 (aarch64_sve_float_arith_operand): Likewise.
1680 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1681 (aarch64_sve_float_mul_operand): Likewise.
1682 (aarch64_sve_vec_perm_operand): Likewise.
1683 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1684 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1685 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1686 as well as const_vector.
1687 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1688 in file. Use CONST0_RTX and CONSTM1_RTX.
1689 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1690 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1691 Use aarch64_simd_imm_zero.
1692 * config/aarch64/aarch64-sve.md: New file.
1693 * config/aarch64/aarch64.md: Include it.
1694 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1695 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1696 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1697 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1698 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1699 (sve): New attribute.
1700 (enabled): Disable instructions with the sve attribute unless
1701 TARGET_SVE.
1702 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1703 aarch64_expand_mov_immediate.
1704 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1705 CNT[BHSD] immediates.
1706 (movti): Split CONST_POLY_INT moves into two halves.
1707 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1708 Split additions that need a temporary here if the destination
1709 is the stack pointer.
1710 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1711 (*add<mode>3_poly_1): New instruction.
1712 (set_clobber_cc): New expander.
1714 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1716 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1717 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1718 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1719 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1720 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1721 Change innermode from fixed_mode_size to machine_mode.
1722 (simplify_subreg): Update call accordingly. Handle a constant-sized
1723 subreg of a variable-length CONST_VECTOR.
1725 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1726 Alan Hayward <alan.hayward@arm.com>
1727 David Sherwood <david.sherwood@arm.com>
1729 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1730 (add_offset_to_base): New function, split out from...
1731 (create_mem_ref): ...here. When handling a scale other than 1,
1732 check first whether the address is valid without the offset.
1733 Add it into the base if so, leaving the index and scale as-is.
1735 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1737 PR c++/83778
1738 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1739 fold_for_warn before checking if arg2 is INTEGER_CST.
1741 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1743 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1744 (store_multiple_operation): Delete.
1745 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1746 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1747 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1748 guarded by TARGET_STRING.
1749 (rs6000_output_load_multiple): Delete.
1750 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1751 OPTION_MASK_STRING / TARGET_STRING handling.
1752 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1753 (const rs6000_opt_masks) <"string">: Change mask to 0.
1754 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1755 (MASK_STRING): Delete.
1756 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1757 parts. Simplify.
1758 (load_multiple): Delete.
1759 (*ldmsi8): Delete.
1760 (*ldmsi7): Delete.
1761 (*ldmsi6): Delete.
1762 (*ldmsi5): Delete.
1763 (*ldmsi4): Delete.
1764 (*ldmsi3): Delete.
1765 (store_multiple): Delete.
1766 (*stmsi8): Delete.
1767 (*stmsi7): Delete.
1768 (*stmsi6): Delete.
1769 (*stmsi5): Delete.
1770 (*stmsi4): Delete.
1771 (*stmsi3): Delete.
1772 (movmemsi_8reg): Delete.
1773 (corresponding unnamed define_insn): Delete.
1774 (movmemsi_6reg): Delete.
1775 (corresponding unnamed define_insn): Delete.
1776 (movmemsi_4reg): Delete.
1777 (corresponding unnamed define_insn): Delete.
1778 (movmemsi_2reg): Delete.
1779 (corresponding unnamed define_insn): Delete.
1780 (movmemsi_1reg): Delete.
1781 (corresponding unnamed define_insn): Delete.
1782 * config/rs6000/rs6000.opt (mno-string): New.
1783 (mstring): Replace by deprecation warning stub.
1784 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1786 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1788 * regrename.c (regrename_do_replace): If replacing the same
1789 reg multiple times, try to reuse last created gen_raw_REG.
1791 PR debug/81155
1792 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1793 main to workaround a bug in GDB.
1795 2018-01-12 Tom de Vries <tom@codesourcery.com>
1797 PR target/83737
1798 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1800 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1802 PR rtl-optimization/80481
1803 * ira-color.c (get_cap_member): New function.
1804 (allocnos_conflict_by_live_ranges_p): Use it.
1805 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1806 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1808 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1810 PR target/83628
1811 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1812 (*saddl_se_1): Ditto.
1813 (*ssubsi_1): Ditto.
1814 (*ssubl_se_1): Ditto.
1816 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1818 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1819 rather than wi::to_widest for DR_INITs.
1820 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1821 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1822 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1823 INTEGER_CSTs.
1824 (vect_analyze_group_access_1): Note that here.
1826 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1828 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1829 polynomial type sizes.
1831 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1833 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1834 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1835 (gimple_add_tmp_var): Likewise.
1837 2018-01-12 Martin Liska <mliska@suse.cz>
1839 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1840 (gimple_alloc_sizes): Likewise.
1841 (dump_gimple_statistics): Use PRIu64 in printf format.
1842 * gimple.h: Change uint64_t to int.
1844 2018-01-12 Martin Liska <mliska@suse.cz>
1846 * tree-core.h: Use uint64_t instead of int.
1847 * tree.c (tree_node_counts): Likewise.
1848 (tree_node_sizes): Likewise.
1849 (dump_tree_statistics): Use PRIu64 in printf format.
1851 2018-01-12 Martin Liska <mliska@suse.cz>
1853 * Makefile.in: As qsort_chk is implemented in vec.c, add
1854 vec.o to linkage of gencfn-macros.
1855 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1856 passing the info to record_node_allocation_statistics.
1857 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1858 and pass the info.
1859 * ggc-common.c (struct ggc_usage): Add operator== and use
1860 it in operator< and compare function.
1861 * mem-stats.h (struct mem_usage): Likewise.
1862 * vec.c (struct vec_usage): Remove operator< and compare
1863 function. Can be simply inherited.
1865 2018-01-12 Martin Jambor <mjambor@suse.cz>
1867 PR target/81616
1868 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1869 * tree-ssa-math-opts.c: Include domwalk.h.
1870 (convert_mult_to_fma_1): New function.
1871 (fma_transformation_info): New type.
1872 (fma_deferring_state): Likewise.
1873 (cancel_fma_deferring): New function.
1874 (result_of_phi): Likewise.
1875 (last_fma_candidate_feeds_initial_phi): Likewise.
1876 (convert_mult_to_fma): Added deferring logic, split actual
1877 transformation to convert_mult_to_fma_1.
1878 (math_opts_dom_walker): New type.
1879 (math_opts_dom_walker::after_dom_children): New method, body moved
1880 here from pass_optimize_widening_mul::execute, added deferring logic
1881 bits.
1882 (pass_optimize_widening_mul::execute): Moved most of code to
1883 math_opts_dom_walker::after_dom_children.
1884 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1885 * config/i386/i386.c (ix86_option_override_internal): Added
1886 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1888 2018-01-12 Richard Biener <rguenther@suse.de>
1890 PR debug/83157
1891 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1892 inline instance vars.
1894 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1896 PR target/81819
1897 * config/rx/rx.c (rx_is_restricted_memory_address):
1898 Handle SUBREG case.
1900 2018-01-12 Richard Biener <rguenther@suse.de>
1902 PR tree-optimization/80846
1903 * target.def (split_reduction): New target hook.
1904 * targhooks.c (default_split_reduction): New function.
1905 * targhooks.h (default_split_reduction): Declare.
1906 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1907 target requests first reduce vectors by combining low and high
1908 parts.
1909 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1910 (get_vectype_for_scalar_type_and_size): Export.
1911 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1912 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1913 * doc/tm.texi: Regenerate.
1914 * config/i386/i386.c (ix86_split_reduction): Implement
1915 TARGET_VECTORIZE_SPLIT_REDUCTION.
1917 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1919 PR target/83368
1920 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1921 in PIC mode except for TARGET_VXWORKS_RTP.
1922 * config/sparc/sparc.c: Include cfgrtl.h.
1923 (TARGET_INIT_PIC_REG): Define.
1924 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1925 (sparc_pic_register_p): New predicate.
1926 (sparc_legitimate_address_p): Use it.
1927 (sparc_legitimize_pic_address): Likewise.
1928 (sparc_delegitimize_address): Likewise.
1929 (sparc_mode_dependent_address_p): Likewise.
1930 (gen_load_pcrel_sym): Remove 4th parameter.
1931 (load_got_register): Adjust call to above. Remove obsolete stuff.
1932 (sparc_expand_prologue): Do not call load_got_register here.
1933 (sparc_flat_expand_prologue): Likewise.
1934 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1935 (sparc_use_pseudo_pic_reg): New function.
1936 (sparc_init_pic_reg): Likewise.
1937 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1938 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1940 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1942 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1943 Add item for branch_cost.
1945 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1947 PR rtl-optimization/83565
1948 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1949 not extend the result to a larger mode for rotate operations.
1950 (num_sign_bit_copies1): Likewise.
1952 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1954 PR target/40411
1955 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1956 -symbolic.
1957 Use values-Xc.o for -pedantic.
1958 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1960 2018-01-12 Martin Liska <mliska@suse.cz>
1962 PR ipa/83054
1963 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1964 New function.
1965 (possible_polymorphic_call_targets): Use it.
1966 (ipa_devirt): Likewise.
1968 2018-01-12 Martin Liska <mliska@suse.cz>
1970 * profile-count.h (enum profile_quality): Use 0 as invalid
1971 enum value of profile_quality.
1973 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1975 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1976 -mext-string options.
1978 2018-01-12 Richard Biener <rguenther@suse.de>
1980 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1981 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1982 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1983 Likewise.
1984 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1986 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1988 * configure.ac (--with-long-double-format): Add support for the
1989 configuration option to change the default long double format on
1990 PowerPC systems.
1991 * config.gcc (powerpc*-linux*-*): Likewise.
1992 * configure: Regenerate.
1993 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1994 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1995 used without modification.
1997 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1999 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2000 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2001 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2002 MISC_BUILTIN_SPEC_BARRIER.
2003 (rs6000_init_builtins): Likewise.
2004 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2005 enum value.
2006 (speculation_barrier): New define_insn.
2007 * doc/extend.texi: Document __builtin_speculation_barrier.
2009 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2011 PR target/83203
2012 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2013 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2014 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2015 iterators.
2016 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2017 integral modes instead of "ss" and "sd".
2018 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2019 vectors with 32-bit and 64-bit elements.
2020 (vecdupssescalarmodesuffix): New mode attribute.
2021 (vec_dup<mode>): Use it.
2023 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2025 PR target/83330
2026 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2027 frame if argument is passed on stack.
2029 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2031 PR target/82682
2032 * ree.c (combine_reaching_defs): Optimize also
2033 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2034 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2036 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2038 PR middle-end/83189
2039 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2041 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2043 PR middle-end/83718
2044 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2045 after they are computed.
2047 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2049 PR tree-optimization/83695
2050 * gimple-loop-linterchange.cc
2051 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2052 reset cached scev information after interchange.
2053 (pass_linterchange::execute): Remove call to scev_reset_htab.
2055 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2057 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2058 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2059 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2060 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2061 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2062 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2063 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2064 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2065 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2066 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2067 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2068 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2069 (V_lane_reg): Likewise.
2070 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2071 New define_expand.
2072 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2073 (vfmal_lane_low<mode>_intrinsic,
2074 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2075 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2076 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2077 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2078 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2079 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2081 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2083 * config/arm/arm-cpus.in (fp16fml): New feature.
2084 (ALL_SIMD): Add fp16fml.
2085 (armv8.2-a): Add fp16fml as an option.
2086 (armv8.3-a): Likewise.
2087 (armv8.4-a): Add fp16fml as part of fp16.
2088 * config/arm/arm.h (TARGET_FP16FML): Define.
2089 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2090 when appropriate.
2091 * config/arm/arm-modes.def (V2HF): Define.
2092 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2093 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2094 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2095 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2096 vfmsl_low, vfmsl_high): New set of builtins.
2097 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2098 (vfml_op): New code attribute.
2099 (VFMLHALVES): New int iterator.
2100 (VFML, VFMLSEL): New mode attributes.
2101 (V_reg): Define mapping for V2HF.
2102 (V_hi, V_lo): New mode attributes.
2103 (VF_constraint): Likewise.
2104 (vfml_half, vfml_half_selector): New int attributes.
2105 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2106 define_expand.
2107 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2108 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2109 New define_insn.
2110 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2111 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2112 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2113 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2114 documentation.
2115 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2116 Document new effective target and option set.
2118 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2120 * config/arm/arm-cpus.in (armv8_4): New feature.
2121 (ARMv8_4a): New fgroup.
2122 (armv8.4-a): New arch.
2123 * config/arm/arm-tables.opt: Regenerate.
2124 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2125 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2126 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2127 Add matching rules for -march=armv8.4-a and extensions.
2128 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2130 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2132 PR target/81821
2133 * config/rx/rx.md (BW): New mode attribute.
2134 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2136 2018-01-11 Richard Biener <rguenther@suse.de>
2138 PR tree-optimization/83435
2139 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2140 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2141 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2143 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2144 Alan Hayward <alan.hayward@arm.com>
2145 David Sherwood <david.sherwood@arm.com>
2147 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2148 field.
2149 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2150 (aarch64_print_address_internal): Use it to check for a zero offset.
2152 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2153 Alan Hayward <alan.hayward@arm.com>
2154 David Sherwood <david.sherwood@arm.com>
2156 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2157 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2158 Return a poly_int64 rather than a HOST_WIDE_INT.
2159 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2160 rather than a HOST_WIDE_INT.
2161 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2162 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2163 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2164 final_offset from HOST_WIDE_INT to poly_int64.
2165 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2166 to_constant when getting the number of units in an Advanced SIMD
2167 mode.
2168 (aarch64_builtin_vectorized_function): Check for a constant number
2169 of units.
2170 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2171 GET_MODE_SIZE.
2172 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2173 attribute instead of GET_MODE_NUNITS.
2174 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2175 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2176 GET_MODE_SIZE for fixed-size registers.
2177 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2178 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2179 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2180 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2181 (aarch64_print_operand, aarch64_print_address_internal)
2182 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2183 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2184 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2185 Handle polynomial GET_MODE_SIZE.
2186 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2187 wider than SImode without modification.
2188 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2189 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2190 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2191 passing and returning SVE modes.
2192 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2193 rather than GEN_INT.
2194 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2195 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2196 (aarch64_allocate_and_probe_stack_space): Likewise.
2197 (aarch64_layout_frame): Cope with polynomial offsets.
2198 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2199 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2200 polynomial offsets.
2201 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2202 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2203 poly_int64 rather than a HOST_WIDE_INT.
2204 (aarch64_get_separate_components, aarch64_process_components)
2205 (aarch64_expand_prologue, aarch64_expand_epilogue)
2206 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2207 (aarch64_anchor_offset): New function, split out from...
2208 (aarch64_legitimize_address): ...here.
2209 (aarch64_builtin_vectorization_cost): Handle polynomial
2210 TYPE_VECTOR_SUBPARTS.
2211 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2212 GET_MODE_NUNITS.
2213 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2214 number of elements from the PARALLEL rather than the mode.
2215 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2216 rather than GET_MODE_BITSIZE.
2217 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2218 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2219 (aarch64_expand_vec_perm_const_1): Handle polynomial
2220 d->perm.length () and d->perm elements.
2221 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2222 Apply to_constant to d->perm elements.
2223 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2224 polynomial CONST_VECTOR_NUNITS.
2225 (aarch64_move_pointer): Take amount as a poly_int64 rather
2226 than an int.
2227 (aarch64_progress_pointer): Avoid temporary variable.
2228 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2229 the mode attribute instead of GET_MODE.
2231 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2232 Alan Hayward <alan.hayward@arm.com>
2233 David Sherwood <david.sherwood@arm.com>
2235 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2236 x exists before using it.
2237 (aarch64_add_constant_internal): Rename to...
2238 (aarch64_add_offset_1): ...this. Replace regnum with separate
2239 src and dest rtxes. Handle the case in which they're different,
2240 including when the offset is zero. Replace scratchreg with an rtx.
2241 Use 2 additions if there is no spare register into which we can
2242 move a 16-bit constant.
2243 (aarch64_add_constant): Delete.
2244 (aarch64_add_offset): Replace reg with separate src and dest
2245 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2246 Use aarch64_add_offset_1.
2247 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2248 an rtx rather than an int. Take the delta as a poly_int64
2249 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2250 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2251 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2252 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2253 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2254 and aarch64_add_sp.
2255 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2256 aarch64_add_constant.
2258 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2260 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2261 Use scalar_float_mode.
2263 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2265 * config/aarch64/aarch64-simd.md
2266 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2267 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2268 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2269 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2270 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2271 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2272 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2273 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2274 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2275 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2277 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2279 PR target/83514
2280 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2281 targ_options->x_arm_arch_string is non NULL.
2283 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2285 * config/aarch64/aarch64.h
2286 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2288 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2290 PR target/82096
2291 * expmed.c (emit_store_flag_force): Swap if const op0
2292 and change VOIDmode to mode of op0.
2294 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2296 PR rtl-optimization/83761
2297 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2298 than bytes to mode_for_size.
2300 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2302 PR middle-end/83189
2303 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2304 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2305 profile.
2307 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2309 PR middle-end/83575
2310 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2311 when in layout mode.
2312 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2313 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2314 partition fixup.
2316 2018-01-10 Michael Collison <michael.collison@arm.com>
2318 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2319 * config/aarch64/aarch64-option-extension.def: Add
2320 AARCH64_OPT_EXTENSION of 'fp16fml'.
2321 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2322 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2323 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2324 * config/aarch64/constraints.md (Ui7): New constraint.
2325 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2326 (VFMLA_SEL_W): Ditto.
2327 (f16quad): Ditto.
2328 (f16mac1): Ditto.
2329 (VFMLA16_LOW): New int iterator.
2330 (VFMLA16_HIGH): Ditto.
2331 (UNSPEC_FMLAL): New unspec.
2332 (UNSPEC_FMLSL): Ditto.
2333 (UNSPEC_FMLAL2): Ditto.
2334 (UNSPEC_FMLSL2): Ditto.
2335 (f16mac): New code attribute.
2336 * config/aarch64/aarch64-simd-builtins.def
2337 (aarch64_fmlal_lowv2sf): Ditto.
2338 (aarch64_fmlsl_lowv2sf): Ditto.
2339 (aarch64_fmlalq_lowv4sf): Ditto.
2340 (aarch64_fmlslq_lowv4sf): Ditto.
2341 (aarch64_fmlal_highv2sf): Ditto.
2342 (aarch64_fmlsl_highv2sf): Ditto.
2343 (aarch64_fmlalq_highv4sf): Ditto.
2344 (aarch64_fmlslq_highv4sf): Ditto.
2345 (aarch64_fmlal_lane_lowv2sf): Ditto.
2346 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2347 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2348 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2349 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2350 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2351 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2352 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2353 (aarch64_fmlal_lane_highv2sf): Ditto.
2354 (aarch64_fmlsl_lane_highv2sf): Ditto.
2355 (aarch64_fmlal_laneq_highv2sf): Ditto.
2356 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2357 (aarch64_fmlalq_lane_highv4sf): Ditto.
2358 (aarch64_fmlsl_lane_highv4sf): Ditto.
2359 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2360 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2361 * config/aarch64/aarch64-simd.md:
2362 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2363 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2364 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2365 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2366 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2367 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2368 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2369 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2370 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2371 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2372 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2373 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2374 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2375 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2376 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2377 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2378 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2379 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2380 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2381 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2382 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2383 (vfmlsl_low_u32): Ditto.
2384 (vfmlalq_low_u32): Ditto.
2385 (vfmlslq_low_u32): Ditto.
2386 (vfmlal_high_u32): Ditto.
2387 (vfmlsl_high_u32): Ditto.
2388 (vfmlalq_high_u32): Ditto.
2389 (vfmlslq_high_u32): Ditto.
2390 (vfmlal_lane_low_u32): Ditto.
2391 (vfmlsl_lane_low_u32): Ditto.
2392 (vfmlal_laneq_low_u32): Ditto.
2393 (vfmlsl_laneq_low_u32): Ditto.
2394 (vfmlalq_lane_low_u32): Ditto.
2395 (vfmlslq_lane_low_u32): Ditto.
2396 (vfmlalq_laneq_low_u32): Ditto.
2397 (vfmlslq_laneq_low_u32): Ditto.
2398 (vfmlal_lane_high_u32): Ditto.
2399 (vfmlsl_lane_high_u32): Ditto.
2400 (vfmlal_laneq_high_u32): Ditto.
2401 (vfmlsl_laneq_high_u32): Ditto.
2402 (vfmlalq_lane_high_u32): Ditto.
2403 (vfmlslq_lane_high_u32): Ditto.
2404 (vfmlalq_laneq_high_u32): Ditto.
2405 (vfmlslq_laneq_high_u32): Ditto.
2406 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2407 (AARCH64_FL_FOR_ARCH8_4): New.
2408 (AARCH64_ISA_F16FML): New ISA flag.
2409 (TARGET_F16FML): New feature flag for fp16fml.
2410 (doc/invoke.texi): Document new fp16fml option.
2412 2018-01-10 Michael Collison <michael.collison@arm.com>
2414 * config/aarch64/aarch64-builtins.c:
2415 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2416 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2417 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2418 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2419 (AARCH64_ISA_SHA3): New ISA flag.
2420 (TARGET_SHA3): New feature flag for sha3.
2421 * config/aarch64/iterators.md (sha512_op): New int attribute.
2422 (CRYPTO_SHA512): New int iterator.
2423 (UNSPEC_SHA512H): New unspec.
2424 (UNSPEC_SHA512H2): Ditto.
2425 (UNSPEC_SHA512SU0): Ditto.
2426 (UNSPEC_SHA512SU1): Ditto.
2427 * config/aarch64/aarch64-simd-builtins.def
2428 (aarch64_crypto_sha512hqv2di): New builtin.
2429 (aarch64_crypto_sha512h2qv2di): Ditto.
2430 (aarch64_crypto_sha512su0qv2di): Ditto.
2431 (aarch64_crypto_sha512su1qv2di): Ditto.
2432 (aarch64_eor3qv8hi): Ditto.
2433 (aarch64_rax1qv2di): Ditto.
2434 (aarch64_xarqv2di): Ditto.
2435 (aarch64_bcaxqv8hi): Ditto.
2436 * config/aarch64/aarch64-simd.md:
2437 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2438 (aarch64_crypto_sha512su0qv2di): Ditto.
2439 (aarch64_crypto_sha512su1qv2di): Ditto.
2440 (aarch64_eor3qv8hi): Ditto.
2441 (aarch64_rax1qv2di): Ditto.
2442 (aarch64_xarqv2di): Ditto.
2443 (aarch64_bcaxqv8hi): Ditto.
2444 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2445 (vsha512h2q_u64): Ditto.
2446 (vsha512su0q_u64): Ditto.
2447 (vsha512su1q_u64): Ditto.
2448 (veor3q_u16): Ditto.
2449 (vrax1q_u64): Ditto.
2450 (vxarq_u64): Ditto.
2451 (vbcaxq_u16): Ditto.
2452 * config/arm/types.md (crypto_sha512): New type attribute.
2453 (crypto_sha3): Ditto.
2454 (doc/invoke.texi): Document new sha3 option.
2456 2018-01-10 Michael Collison <michael.collison@arm.com>
2458 * config/aarch64/aarch64-builtins.c:
2459 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2460 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2461 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2462 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2463 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2464 (AARCH64_ISA_SM4): New ISA flag.
2465 (TARGET_SM4): New feature flag for sm4.
2466 * config/aarch64/aarch64-simd-builtins.def
2467 (aarch64_sm3ss1qv4si): Ditto.
2468 (aarch64_sm3tt1aq4si): Ditto.
2469 (aarch64_sm3tt1bq4si): Ditto.
2470 (aarch64_sm3tt2aq4si): Ditto.
2471 (aarch64_sm3tt2bq4si): Ditto.
2472 (aarch64_sm3partw1qv4si): Ditto.
2473 (aarch64_sm3partw2qv4si): Ditto.
2474 (aarch64_sm4eqv4si): Ditto.
2475 (aarch64_sm4ekeyqv4si): Ditto.
2476 * config/aarch64/aarch64-simd.md:
2477 (aarch64_sm3ss1qv4si): Ditto.
2478 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2479 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2480 (aarch64_sm4eqv4si): Ditto.
2481 (aarch64_sm4ekeyqv4si): Ditto.
2482 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2483 (sm3part_op): Ditto.
2484 (CRYPTO_SM3TT): Ditto.
2485 (CRYPTO_SM3PART): Ditto.
2486 (UNSPEC_SM3SS1): New unspec.
2487 (UNSPEC_SM3TT1A): Ditto.
2488 (UNSPEC_SM3TT1B): Ditto.
2489 (UNSPEC_SM3TT2A): Ditto.
2490 (UNSPEC_SM3TT2B): Ditto.
2491 (UNSPEC_SM3PARTW1): Ditto.
2492 (UNSPEC_SM3PARTW2): Ditto.
2493 (UNSPEC_SM4E): Ditto.
2494 (UNSPEC_SM4EKEY): Ditto.
2495 * config/aarch64/constraints.md (Ui2): New constraint.
2496 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2497 * config/arm/types.md (crypto_sm3): New type attribute.
2498 (crypto_sm4): Ditto.
2499 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2500 (vsm3tt1aq_u32): Ditto.
2501 (vsm3tt1bq_u32): Ditto.
2502 (vsm3tt2aq_u32): Ditto.
2503 (vsm3tt2bq_u32): Ditto.
2504 (vsm3partw1q_u32): Ditto.
2505 (vsm3partw2q_u32): Ditto.
2506 (vsm4eq_u32): Ditto.
2507 (vsm4ekeyq_u32): Ditto.
2508 (doc/invoke.texi): Document new sm4 option.
2510 2018-01-10 Michael Collison <michael.collison@arm.com>
2512 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2513 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2514 (AARCH64_FL_FOR_ARCH8_4): New.
2515 (AARCH64_FL_V8_4): New flag.
2516 (doc/invoke.texi): Document new armv8.4-a option.
2518 2018-01-10 Michael Collison <michael.collison@arm.com>
2520 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2521 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2522 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2523 * config/aarch64/aarch64-option-extension.def: Add
2524 AARCH64_OPT_EXTENSION of 'sha2'.
2525 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2526 (crypto): Disable sha2 and aes if crypto disabled.
2527 (crypto): Enable aes and sha2 if enabled.
2528 (simd): Disable sha2 and aes if simd disabled.
2529 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2530 New flags.
2531 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2532 (TARGET_SHA2): New feature flag for sha2.
2533 (TARGET_AES): New feature flag for aes.
2534 * config/aarch64/aarch64-simd.md:
2535 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2536 conditional on TARGET_AES.
2537 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2538 (aarch64_crypto_sha1hsi): Make pattern conditional
2539 on TARGET_SHA2.
2540 (aarch64_crypto_sha1hv4si): Ditto.
2541 (aarch64_be_crypto_sha1hv4si): Ditto.
2542 (aarch64_crypto_sha1su1v4si): Ditto.
2543 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2544 (aarch64_crypto_sha1su0v4si): Ditto.
2545 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2546 (aarch64_crypto_sha256su0v4si): Ditto.
2547 (aarch64_crypto_sha256su1v4si): Ditto.
2548 (doc/invoke.texi): Document new aes and sha2 options.
2550 2018-01-10 Martin Sebor <msebor@redhat.com>
2552 PR tree-optimization/83781
2553 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2554 as string arrays.
2556 2018-01-11 Martin Sebor <msebor@gmail.com>
2557 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2559 PR tree-optimization/83501
2560 PR tree-optimization/81703
2562 * tree-ssa-strlen.c (get_string_cst): Rename...
2563 (get_string_len): ...to this. Handle global constants.
2564 (handle_char_store): Adjust.
2566 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2567 Jim Wilson <jimw@sifive.com>
2569 * config/riscv/riscv-protos.h (riscv_output_return): New.
2570 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2571 (riscv_attribute_table, riscv_output_return),
2572 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2573 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2574 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2575 function.
2576 (riscv_expand_prologue): Add early return for naked function.
2577 (riscv_expand_epilogue): Likewise.
2578 (riscv_function_ok_for_sibcall): Return false for naked function.
2579 (riscv_set_current_function): New.
2580 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2581 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2582 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2583 * doc/extend.texi (RISC-V Function Attributes): New.
2585 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2587 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2588 check for 128-bit long double before checking TCmode.
2589 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2590 128-bit long doubles before checking TFmode or TCmode.
2591 (FLOAT128_IBM_P): Likewise.
2593 2018-01-10 Martin Sebor <msebor@redhat.com>
2595 PR tree-optimization/83671
2596 * builtins.c (c_strlen): Unconditionally return zero for the empty
2597 string.
2598 Use -Warray-bounds for warnings.
2599 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2600 for non-constant array indices with COMPONENT_REF, arrays of
2601 arrays, and pointers to arrays.
2602 (gimple_fold_builtin_strlen): Determine and set length range for
2603 non-constant character arrays.
2605 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2607 PR middle-end/81897
2608 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2609 empty blocks.
2611 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2613 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2615 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2617 PR target/83399
2618 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2619 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2620 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2621 indexed_or_indirect_operand predicate.
2622 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2623 (*vsx_le_perm_load_v8hi): Likewise.
2624 (*vsx_le_perm_load_v16qi): Likewise.
2625 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2626 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2627 (*vsx_le_perm_store_v8hi): Likewise.
2628 (*vsx_le_perm_store_v16qi): Likewise.
2629 (eight unnamed splitters): Likewise.
2631 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2633 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2634 * config/rs6000/emmintrin.h: Likewise.
2635 * config/rs6000/mmintrin.h: Likewise.
2636 * config/rs6000/xmmintrin.h: Likewise.
2638 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2640 PR c++/43486
2641 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2642 "public_flag".
2643 * tree.c (tree_nop_conversion): Return true for location wrapper
2644 nodes.
2645 (maybe_wrap_with_location): New function.
2646 (selftest::check_strip_nops): New function.
2647 (selftest::test_location_wrappers): New function.
2648 (selftest::tree_c_tests): Call it.
2649 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2650 (maybe_wrap_with_location): New decl.
2651 (EXPR_LOCATION_WRAPPER_P): New macro.
2652 (location_wrapper_p): New inline function.
2653 (tree_strip_any_location_wrapper): New inline function.
2655 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2657 PR target/83735
2658 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2659 stack_realign_offset for the largest alignment of stack slot
2660 actually used.
2661 (ix86_find_max_used_stack_alignment): New function.
2662 (ix86_finalize_stack_frame_flags): Use it. Set
2663 max_used_stack_alignment if we don't realign stack.
2664 * config/i386/i386.h (machine_function): Add
2665 max_used_stack_alignment.
2667 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2669 * config/arm/arm.opt (-mbranch-cost): New option.
2670 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2671 account.
2673 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2675 PR target/83629
2676 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2677 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2679 2018-01-10 Richard Biener <rguenther@suse.de>
2681 PR debug/83765
2682 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2683 early out so it also covers the case where we have a non-NULL
2684 origin.
2686 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2688 PR tree-optimization/83753
2689 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2690 for non-strided grouped accesses if the number of elements is 1.
2692 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2694 PR target/81616
2695 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2696 * i386.h (TARGET_USE_GATHER): Define.
2697 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2699 2018-01-10 Martin Liska <mliska@suse.cz>
2701 PR bootstrap/82831
2702 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2703 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2704 partitioning.
2705 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2706 CLEANUP_NO_PARTITIONING is not set.
2708 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2710 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2711 for vectors, as a partial revert of r254296.
2712 * rtl.h (const_vec_p): Delete.
2713 (const_vec_duplicate_p): Don't test for vector CONSTs.
2714 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2715 * expmed.c (make_tree): Likewise.
2717 Revert:
2718 * common.md (E, F): Use CONSTANT_P instead of checking for
2719 CONST_VECTOR.
2720 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2721 checking for CONST_VECTOR.
2723 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2725 PR middle-end/83575
2726 * predict.c (force_edge_cold): Handle in more sane way edges
2727 with no prediction.
2729 2018-01-09 Carl Love <cel@us.ibm.com>
2731 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2732 V4SI, V4SF types.
2733 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2734 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2735 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2736 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2737 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2738 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2739 * config/rs6000/rs6000-protos.h: Add extern defition for
2740 rs6000_generate_float2_double_code.
2741 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2742 function.
2743 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2744 (float2_v2df): Add define_expand.
2746 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2748 PR target/83628
2749 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2750 op_mode in the force_to_mode call.
2752 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2754 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2755 instead of checking each element individually.
2756 (aarch64_evpc_uzp): Likewise.
2757 (aarch64_evpc_zip): Likewise.
2758 (aarch64_evpc_ext): Likewise.
2759 (aarch64_evpc_rev): Likewise.
2760 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2761 instead of checking each element individually. Return true without
2762 generating rtl if
2763 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2764 whether all selected elements come from the same input, instead of
2765 checking each element individually. Remove calls to gen_rtx_REG,
2766 start_sequence and end_sequence and instead assert that no rtl is
2767 generated.
2769 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2771 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2772 order of HIGH and CONST checks.
2774 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2776 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2777 if the destination isn't an SSA_NAME.
2779 2018-01-09 Richard Biener <rguenther@suse.de>
2781 PR tree-optimization/83668
2782 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2783 move prologue...
2784 (canonicalize_loop_form): ... here, renamed from ...
2785 (canonicalize_loop_closed_ssa_form): ... this and amended to
2786 swap successor edges for loop exit blocks to make us use
2787 the RPO order we need for initial schedule generation.
2789 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2791 PR tree-optimization/64811
2792 * match.pd: When optimizing comparisons with Inf, avoid
2793 introducing or losing exceptions from comparisons with NaN.
2795 2018-01-09 Martin Liska <mliska@suse.cz>
2797 PR sanitizer/82517
2798 * asan.c (shadow_mem_size): Add gcc_assert.
2800 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2802 Don't save registers in main().
2804 PR target/83738
2805 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2806 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2807 * config/avr/avr.c (avr_set_current_function): Don't error if
2808 naked, OS_task or OS_main are specified at the same time.
2809 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2810 OS_main.
2811 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2812 attribute.
2813 * common/config/avr/avr-common.c (avr_option_optimization_table):
2814 Switch on -mmain-is-OS_task for optimizing compilations.
2816 2018-01-09 Richard Biener <rguenther@suse.de>
2818 PR tree-optimization/83572
2819 * graphite.c: Include cfganal.h.
2820 (graphite_transform_loops): Connect infinite loops to exit
2821 and remove fake edges at the end.
2823 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2825 * ipa-inline.c (edge_badness): Revert accidental checkin.
2827 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2829 PR ipa/80763
2830 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2831 symbols; not inline clones.
2833 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2835 PR target/83507
2836 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2837 hard registers. Formatting fixes.
2839 PR preprocessor/83722
2840 * gcc.c (try_generate_repro): Pass
2841 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2842 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2843 do_report_bug.
2845 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2846 Kito Cheng <kito.cheng@gmail.com>
2848 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2849 (riscv_leaf_function_p): Delete.
2850 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2852 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2854 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2855 function.
2856 (do_ifelse): New function.
2857 (do_isel): New function.
2858 (do_sub3): New function.
2859 (do_add3): New function.
2860 (do_load_mask_compare): New function.
2861 (do_overlap_load_compare): New function.
2862 (expand_compare_loop): New function.
2863 (expand_block_compare): Call expand_compare_loop() when appropriate.
2864 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2865 option description.
2866 (-mblock-compare-inline-loop-limit): New option.
2868 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2870 PR target/83677
2871 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2872 Reverse order of second and third operands in first alternative.
2873 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2874 of first and second elements in UNSPEC_VPERMR vector.
2875 (altivec_expand_vec_perm_le): Likewise.
2877 2017-01-08 Jeff Law <law@redhat.com>
2879 PR rtl-optimizatin/81308
2880 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2881 (process_switch): If group_case_labels makes a change, then set
2882 cfg_altered.
2883 (pass_convert_switch::execute): If a switch is converted, then
2884 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2886 PR rtl-optimization/81308
2887 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2888 splitting insns.
2890 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2892 PR target/83663 - Revert r255946
2893 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2894 generation for cases where splatting a value is not useful.
2895 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2896 across a vec_duplicate and a paradoxical subreg forming a vector
2897 mode to a vec_concat.
2899 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2901 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2902 -march=armv8.3-a variants.
2903 * config/arm/t-multilib: Likewise.
2904 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2906 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2908 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2909 to generate rtl.
2910 (cceq_ior_compare_complement): Give it a name so I can use it, and
2911 change boolean_or_operator predicate to boolean_operator so it can
2912 be used to generate a crand.
2913 (eqne): New code iterator.
2914 (bd/bd_neg): New code_attrs.
2915 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2916 a single define_insn.
2917 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2918 decrement (bdnzt/bdnzf/bdzt/bdzf).
2919 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2920 with the new names of the branch decrement patterns, and added the
2921 names of the branch decrement conditional patterns.
2923 2018-01-08 Richard Biener <rguenther@suse.de>
2925 PR tree-optimization/83563
2926 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2927 cache.
2929 2018-01-08 Richard Biener <rguenther@suse.de>
2931 PR middle-end/83713
2932 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2934 2018-01-08 Richard Biener <rguenther@suse.de>
2936 PR tree-optimization/83685
2937 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2938 references to abnormals.
2940 2018-01-08 Richard Biener <rguenther@suse.de>
2942 PR lto/83719
2943 * dwarf2out.c (output_indirect_strings): Handle empty
2944 skeleton_debug_str_hash.
2945 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2947 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2949 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2950 (emit_store_direct): Likewise.
2951 (arc_trampoline_adjust_address): Likewise.
2952 (arc_asm_trampoline_template): New function.
2953 (arc_initialize_trampoline): Use asm_trampoline_template.
2954 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2955 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2956 * config/arc/arc.md (flush_icache): Delete pattern.
2958 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2960 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2961 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2962 munaligned-access.
2964 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2966 PR target/83681
2967 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2968 by not USED_FOR_TARGET.
2969 (make_pass_resolve_sw_modes): Likewise.
2971 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2973 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2974 USED_FOR_TARGET.
2976 2018-01-08 Richard Biener <rguenther@suse.de>
2978 PR middle-end/83580
2979 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2981 2018-01-08 Richard Biener <rguenther@suse.de>
2983 PR middle-end/83517
2984 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2986 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2988 PR middle-end/81897
2989 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2990 basic blocks with a small number of successors.
2991 (convert_control_dep_chain_into_preds): Improve handling of
2992 forwarder blocks.
2993 (dump_predicates): Split apart into...
2994 (dump_pred_chain): ...here...
2995 (dump_pred_info): ...and here.
2996 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2997 (can_chain_union_be_invalidated_p): Improve check for invalidation
2998 of paths.
2999 (uninit_uses_cannot_happen): Avoid unnecessary if
3000 convert_control_dep_chain_into_preds yielded nothing.
3002 2018-01-06 Martin Sebor <msebor@redhat.com>
3004 PR tree-optimization/83640
3005 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3006 subtracting negative offset from size.
3007 (builtin_access::overlap): Adjust offset bounds of the access to fall
3008 within the size of the object if possible.
3010 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3012 PR rtl-optimization/83699
3013 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3014 extract_bit_field_as_subreg to cases in which the extracted
3015 value is also a vector.
3017 * lra-constraints.c (process_alt_operands): Test for the equivalence
3018 substitutions when detecting a possible reload cycle.
3020 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3022 PR debug/83480
3023 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3024 by default if flag_selective_schedling{,2}. Formatting fixes.
3026 PR rtl-optimization/83682
3027 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3028 if it has non-VECTOR_MODE element mode.
3029 (vec_duplicate_p): Likewise.
3031 PR middle-end/83694
3032 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3033 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3035 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3037 PR target/83604
3038 * config/i386/i386-builtin.def
3039 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3040 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3041 Require also OPTION_MASK_ISA_AVX512F in addition to
3042 OPTION_MASK_ISA_GFNI.
3043 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3044 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3045 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3046 to OPTION_MASK_ISA_GFNI.
3047 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3048 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3049 OPTION_MASK_ISA_AVX512BW.
3050 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3051 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3052 addition to OPTION_MASK_ISA_GFNI.
3053 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3054 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3055 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3056 to OPTION_MASK_ISA_GFNI.
3057 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3058 a requirement for all ISAs rather than any of them with a few
3059 exceptions.
3060 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3061 processing.
3062 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3063 bitmasks to be enabled with 3 exceptions, instead of requiring any
3064 enabled ISA with lots of exceptions.
3065 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3066 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3067 Change avx512bw in isa attribute to avx512f.
3068 * config/i386/sgxintrin.h: Add license boilerplate.
3069 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3070 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3071 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3072 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3073 defined.
3074 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3075 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3076 temporarily sse2 rather than sse if not enabled already.
3078 PR target/83604
3079 * config/i386/sse.md (VI248_VLBW): Rename to ...
3080 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3081 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3082 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3083 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3084 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3085 mode iterator instead of VI248_VLBW.
3087 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3089 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3090 (record_modified): Skip clobbers; add debug output.
3091 (param_change_prob): Use sreal frequencies.
3093 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3095 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3096 punt for user-aligned variables.
3098 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3100 * tree-chrec.c (chrec_contains_symbols): Return true for
3101 POLY_INT_CST.
3103 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3105 PR target/82439
3106 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3107 of (x|y) == x for BICS pattern.
3109 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3111 PR tree-optimization/83605
3112 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3113 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3114 can throw.
3116 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3118 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3119 * config/epiphany/rtems.h: New file.
3121 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3122 Uros Bizjak <ubizjak@gmail.com>
3124 PR target/83554
3125 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3126 QIreg_operand instead of register_operand predicate.
3127 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3128 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3129 comments instead of -fmitigate[-_]rop.
3131 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3133 PR bootstrap/81926
3134 * cgraphunit.c (symbol_table::compile): Switch to text_section
3135 before calling assembly_start debug hook.
3136 * run-rtl-passes.c (run_rtl_passes): Likewise.
3137 Include output.h.
3139 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3141 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3142 range_int_cst_p rather than !symbolic_range_p before calling
3143 extract_range_from_multiplicative_op_1.
3145 2017-01-04 Jeff Law <law@redhat.com>
3147 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3148 redundant test in assertion.
3150 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3152 * doc/rtl.texi: Document machine_mode wrapper classes.
3154 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3156 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3157 using tree_to_uhwi.
3159 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3161 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3162 the VEC_PERM_EXPR fold to fail.
3164 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3166 PR debug/83585
3167 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3168 to switched_sections.
3170 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3172 PR target/83680
3173 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3174 test for d.testing.
3176 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3178 PR target/83387
3179 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3180 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3182 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3184 PR debug/83666
3185 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3186 is BLKmode and bitpos not zero or mode change is needed.
3188 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3190 PR target/83675
3191 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3192 TARGET_VIS2.
3194 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3196 PR target/83628
3197 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3198 instead of MULT rtx. Update all corresponding splitters.
3199 (*saddl_se): Ditto.
3200 (*ssub<modesuffix>): Ditto.
3201 (*ssubl_se): Ditto.
3202 (*cmp_sadd_di): Update split patterns.
3203 (*cmp_sadd_si): Ditto.
3204 (*cmp_sadd_sidi): Ditto.
3205 (*cmp_ssub_di): Ditto.
3206 (*cmp_ssub_si): Ditto.
3207 (*cmp_ssub_sidi): Ditto.
3208 * config/alpha/predicates.md (const23_operand): New predicate.
3209 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3210 Look for ASHIFT, not MULT inner operand.
3211 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3213 2018-01-04 Martin Liska <mliska@suse.cz>
3215 PR gcov-profile/83669
3216 * gcov.c (output_intermediate_file): Add version to intermediate
3217 gcov file.
3218 * doc/gcov.texi: Document new field 'version' in intermediate
3219 file format. Fix location of '-k' option of gcov command.
3221 2018-01-04 Martin Liska <mliska@suse.cz>
3223 PR ipa/82352
3224 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3226 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3228 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3230 2018-01-03 Martin Sebor <msebor@redhat.com>
3232 PR tree-optimization/83655
3233 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3234 checking calls with invalid arguments.
3236 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3238 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3239 (vectorizable_mask_load_store): Delete.
3240 (vectorizable_call): Return false for masked loads and stores.
3241 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3242 instead of gimple_assign_rhs1.
3243 (vectorizable_load): Handle IFN_MASK_LOAD.
3244 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3246 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3248 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3249 split out from..,
3250 (vectorizable_mask_load_store): ...here.
3251 (vectorizable_load): ...and here.
3253 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3255 * tree-vect-stmts.c (vect_build_all_ones_mask)
3256 (vect_build_zero_merge_argument): New functions, split out from...
3257 (vectorizable_load): ...here.
3259 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3261 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3262 split out from...
3263 (vectorizable_mask_load_store): ...here.
3264 (vectorizable_store): ...and here.
3266 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3268 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3269 split out from...
3270 (vectorizable_mask_load_store): ...here.
3272 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3274 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3275 (vect_model_store_cost): Take a vec_load_store_type instead of a
3276 vect_def_type.
3277 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3278 (vect_model_store_cost): Take a vec_load_store_type instead of a
3279 vect_def_type.
3280 (vectorizable_mask_load_store): Update accordingly.
3281 (vectorizable_store): Likewise.
3282 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3284 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3286 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3287 IFN_MASK_LOAD calls here rather than...
3288 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3290 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3291 Alan Hayward <alan.hayward@arm.com>
3292 David Sherwood <david.sherwood@arm.com>
3294 * expmed.c (extract_bit_field_1): For vector extracts,
3295 fall back to extract_bit_field_as_subreg if vec_extract
3296 isn't available.
3298 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3299 Alan Hayward <alan.hayward@arm.com>
3300 David Sherwood <david.sherwood@arm.com>
3302 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3303 they are variable or constant sized.
3304 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3305 slots for constant-sized data.
3307 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3308 Alan Hayward <alan.hayward@arm.com>
3309 David Sherwood <david.sherwood@arm.com>
3311 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3312 handling COND_EXPRs with boolean comparisons, try to find a better
3313 basis for the mask type than the boolean itself.
3315 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3317 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3318 is calculated and how it can be overridden.
3319 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3320 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3321 if defined.
3322 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3323 if nonzero.
3325 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3326 Alan Hayward <alan.hayward@arm.com>
3327 David Sherwood <david.sherwood@arm.com>
3329 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3330 Remove the mode argument.
3331 (aarch64_simd_valid_immediate): Remove the mode and inverse
3332 arguments.
3333 * config/aarch64/iterators.md (bitsize): New iterator.
3334 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3335 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3336 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3337 aarch64_simd_valid_immediate.
3338 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3339 (aarch64_reg_or_bic_imm): Likewise.
3340 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3341 with an insn_type enum and msl with a modifier_type enum.
3342 Replace element_width with a scalar_mode. Change the shift
3343 to unsigned int. Add constructors for scalar_float_mode and
3344 scalar_int_mode elements.
3345 (aarch64_vect_float_const_representable_p): Delete.
3346 (aarch64_can_const_movi_rtx_p)
3347 (aarch64_simd_scalar_immediate_valid_for_move)
3348 (aarch64_simd_make_constant): Update call to
3349 aarch64_simd_valid_immediate.
3350 (aarch64_advsimd_valid_immediate_hs): New function.
3351 (aarch64_advsimd_valid_immediate): Likewise.
3352 (aarch64_simd_valid_immediate): Remove mode and inverse
3353 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3354 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3355 and aarch64_float_const_representable_p on the result.
3356 (aarch64_output_simd_mov_immediate): Remove mode argument.
3357 Update call to aarch64_simd_valid_immediate and use of
3358 simd_immediate_info.
3359 (aarch64_output_scalar_simd_mov_immediate): Update call
3360 accordingly.
3362 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3363 Alan Hayward <alan.hayward@arm.com>
3364 David Sherwood <david.sherwood@arm.com>
3366 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3367 (mode_nunits): Likewise CONST_MODE_NUNITS.
3368 * machmode.def (ADJUST_NUNITS): Document.
3369 * genmodes.c (mode_data::need_nunits_adj): New field.
3370 (blank_mode): Update accordingly.
3371 (adj_nunits): New variable.
3372 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3373 parameter.
3374 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3375 listed in adj_nunits.
3376 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3377 listed in adj_nunits. Don't emit case statements for such modes.
3378 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3379 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3380 nothing if adj_nunits is nonnull.
3381 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3382 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3383 (emit_mode_fbit): Update use of print_maybe_const_decl.
3384 (emit_move_size): Likewise. Treat the array as non-const
3385 if adj_nunits.
3386 (emit_mode_adjustments): Handle adj_nunits.
3388 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3390 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3391 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3392 (VECTOR_MODES): Use it.
3393 (make_vector_modes): Take the prefix as an argument.
3395 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3396 Alan Hayward <alan.hayward@arm.com>
3397 David Sherwood <david.sherwood@arm.com>
3399 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3400 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3401 for MODE_VECTOR_BOOL.
3402 * machmode.def (VECTOR_BOOL_MODE): Document.
3403 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3404 (make_vector_bool_mode): New function.
3405 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3406 MODE_VECTOR_BOOL.
3407 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3408 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3409 Likewise.
3410 * stor-layout.c (int_mode_for_mode): Likewise.
3411 * tree.c (build_vector_type_for_mode): Likewise.
3412 * varasm.c (output_constant_pool_2): Likewise.
3413 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3414 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3415 for MODE_VECTOR_BOOL.
3416 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3417 of mode class checks.
3418 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3419 instead of a list of mode class checks.
3420 (expand_vector_scalar_condition): Likewise.
3421 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3423 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3424 Alan Hayward <alan.hayward@arm.com>
3425 David Sherwood <david.sherwood@arm.com>
3427 * machmode.h (mode_size): Change from unsigned short to
3428 poly_uint16_pod.
3429 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3430 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3431 or if measurement_type is not polynomial.
3432 (fixed_size_mode::includes_p): Check for constant-sized modes.
3433 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3434 return a poly_uint16 rather than an unsigned short.
3435 (emit_mode_size): Change the type of mode_size from unsigned short
3436 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3437 (emit_mode_adjustments): Cope with polynomial vector sizes.
3438 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3439 for GET_MODE_SIZE.
3440 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3441 for GET_MODE_SIZE.
3442 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3443 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3444 * caller-save.c (setup_save_areas): Likewise.
3445 (replace_reg_with_saved_mem): Likewise.
3446 * calls.c (emit_library_call_value_1): Likewise.
3447 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3448 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3449 (gen_lowpart_for_combine): Likewise.
3450 * convert.c (convert_to_integer_1): Likewise.
3451 * cse.c (equiv_constant, cse_insn): Likewise.
3452 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3453 (cselib_subst_to_values): Likewise.
3454 * dce.c (word_dce_process_block): Likewise.
3455 * df-problems.c (df_word_lr_mark_ref): Likewise.
3456 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3457 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3458 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3459 (rtl_for_decl_location): Likewise.
3460 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3461 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3462 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3463 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3464 (expand_expr_real_1): Likewise.
3465 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3466 (pad_below): Likewise.
3467 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3468 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3469 * ira.c (get_subreg_tracking_sizes): Likewise.
3470 * ira-build.c (ira_create_allocno_objects): Likewise.
3471 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3472 (ira_sort_regnos_for_alter_reg): Likewise.
3473 * ira-costs.c (record_operand_costs): Likewise.
3474 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3475 (resolve_simple_move): Likewise.
3476 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3477 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3478 (lra_constraints): Likewise.
3479 (CONST_POOL_OK_P): Reject variable-sized modes.
3480 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3481 (add_pseudo_to_slot, lra_spill): Likewise.
3482 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3483 * optabs-query.c (get_best_extraction_insn): Likewise.
3484 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3485 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3486 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3487 * recog.c (offsettable_address_addr_space_p): Likewise.
3488 * regcprop.c (maybe_mode_change): Likewise.
3489 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3490 * regrename.c (build_def_use): Likewise.
3491 * regstat.c (dump_reg_info): Likewise.
3492 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3493 (find_reloads, find_reloads_subreg_address): Likewise.
3494 * reload1.c (eliminate_regs_1): Likewise.
3495 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3496 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3497 (simplify_binary_operation_1, simplify_subreg): Likewise.
3498 * targhooks.c (default_function_arg_padding): Likewise.
3499 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3500 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3501 (verify_gimple_assign_ternary): Likewise.
3502 * tree-inline.c (estimate_move_cost): Likewise.
3503 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3504 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3505 (get_address_cost_ainc): Likewise.
3506 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3507 (vect_supportable_dr_alignment): Likewise.
3508 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3509 (vectorizable_reduction): Likewise.
3510 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3511 (vectorizable_operation, vectorizable_load): Likewise.
3512 * tree.c (build_same_sized_truth_vector_type): Likewise.
3513 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3514 * var-tracking.c (emit_note_insn_var_location): Likewise.
3515 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3516 (ADDR_VEC_ALIGN): Likewise.
3518 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3519 Alan Hayward <alan.hayward@arm.com>
3520 David Sherwood <david.sherwood@arm.com>
3522 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3523 unsigned short.
3524 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3525 or if measurement_type is polynomial.
3526 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3527 * combine.c (make_extraction): Likewise.
3528 * dse.c (find_shift_sequence): Likewise.
3529 * dwarf2out.c (mem_loc_descriptor): Likewise.
3530 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3531 (extract_bit_field, extract_low_bits): Likewise.
3532 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3533 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3534 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3535 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3536 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3537 * reload.c (find_reloads): Likewise.
3538 * reload1.c (alter_reg): Likewise.
3539 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3540 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3541 * tree-if-conv.c (predicate_mem_writes): Likewise.
3542 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3543 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3544 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3545 * valtrack.c (dead_debug_insert_temp): Likewise.
3546 * varasm.c (mergeable_constant_section): Likewise.
3547 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3549 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3550 Alan Hayward <alan.hayward@arm.com>
3551 David Sherwood <david.sherwood@arm.com>
3553 * expr.c (expand_assignment): Cope with polynomial mode sizes
3554 when assigning to a CONCAT.
3556 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3557 Alan Hayward <alan.hayward@arm.com>
3558 David Sherwood <david.sherwood@arm.com>
3560 * machmode.h (mode_precision): Change from unsigned short to
3561 poly_uint16_pod.
3562 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3563 short.
3564 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3565 or if measurement_type is not polynomial.
3566 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3567 in which the mode is already known to be a scalar_int_mode.
3568 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3569 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3570 initializer.
3571 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3572 for GET_MODE_PRECISION.
3573 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3574 for GET_MODE_PRECISION.
3575 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3576 as polynomial.
3577 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3578 (expand_field_assignment, make_extraction): Likewise.
3579 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3580 (get_last_value): Likewise.
3581 * convert.c (convert_to_integer_1): Likewise.
3582 * cse.c (cse_insn): Likewise.
3583 * expr.c (expand_expr_real_1): Likewise.
3584 * lra-constraints.c (simplify_operand_subreg): Likewise.
3585 * optabs-query.c (can_atomic_load_p): Likewise.
3586 * optabs.c (expand_atomic_load): Likewise.
3587 (expand_atomic_store): Likewise.
3588 * ree.c (combine_reaching_defs): Likewise.
3589 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3590 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3591 * tree.h (type_has_mode_precision_p): Likewise.
3592 * ubsan.c (instrument_si_overflow): Likewise.
3594 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3595 Alan Hayward <alan.hayward@arm.com>
3596 David Sherwood <david.sherwood@arm.com>
3598 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3599 polynomial numbers of units.
3600 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3601 (valid_vector_subparts_p): New function.
3602 (build_vector_type): Remove temporary shim and take the number
3603 of units as a poly_uint64 rather than an int.
3604 (build_opaque_vector_type): Take the number of units as a
3605 poly_uint64 rather than an int.
3606 * tree.c (build_vector_from_ctor): Handle polynomial
3607 TYPE_VECTOR_SUBPARTS.
3608 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3609 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3610 (build_vector_from_val): If the number of units is variable,
3611 use build_vec_duplicate_cst for constant operands and
3612 VEC_DUPLICATE_EXPR otherwise.
3613 (make_vector_type): Remove temporary is_constant ().
3614 (build_vector_type, build_opaque_vector_type): Take the number of
3615 units as a poly_uint64 rather than an int.
3616 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3617 VECTOR_CST_NELTS.
3618 * cfgexpand.c (expand_debug_expr): Likewise.
3619 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3620 (store_constructor, expand_expr_real_1): Likewise.
3621 (const_scalar_mask_from_tree): Likewise.
3622 * fold-const-call.c (fold_const_reduction): Likewise.
3623 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3624 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3625 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3626 (fold_relational_const): Likewise.
3627 (native_interpret_vector): Likewise. Change the size from an
3628 int to an unsigned int.
3629 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3630 TYPE_VECTOR_SUBPARTS.
3631 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3632 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3633 duplicating a non-constant operand into a variable-length vector.
3634 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3635 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3636 * ipa-icf.c (sem_variable::equals): Likewise.
3637 * match.pd: Likewise.
3638 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3639 * print-tree.c (print_node): Likewise.
3640 * stor-layout.c (layout_type): Likewise.
3641 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3642 * tree-cfg.c (verify_gimple_comparison): Likewise.
3643 (verify_gimple_assign_binary): Likewise.
3644 (verify_gimple_assign_ternary): Likewise.
3645 (verify_gimple_assign_single): Likewise.
3646 * tree-pretty-print.c (dump_generic_node): Likewise.
3647 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3648 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3649 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3650 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3651 (vect_shift_permute_load_chain): Likewise.
3652 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3653 (expand_vector_condition, optimize_vector_constructor): Likewise.
3654 (lower_vec_perm, get_compute_type): Likewise.
3655 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3656 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3657 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3658 (vect_recog_mask_conversion_pattern): Likewise.
3659 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3660 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3661 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3662 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3663 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3664 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3665 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3666 (supportable_widening_operation): Likewise.
3667 (supportable_narrowing_operation): Likewise.
3668 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3669 Likewise.
3670 * varasm.c (output_constant): Likewise.
3672 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3673 Alan Hayward <alan.hayward@arm.com>
3674 David Sherwood <david.sherwood@arm.com>
3676 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3677 so that both the length == 3 and length != 3 cases set up their
3678 own permute vectors. Add comments explaining why we know the
3679 number of elements is constant.
3680 (vect_permute_load_chain): Likewise.
3682 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3683 Alan Hayward <alan.hayward@arm.com>
3684 David Sherwood <david.sherwood@arm.com>
3686 * machmode.h (mode_nunits): Change from unsigned char to
3687 poly_uint16_pod.
3688 (ONLY_FIXED_SIZE_MODES): New macro.
3689 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3690 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3691 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3692 New typedefs.
3693 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3694 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3695 or if measurement_type is not polynomial.
3696 * genmodes.c (ZERO_COEFFS): New macro.
3697 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3698 poly_uint16.
3699 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3700 Use ZERO_COEFFS when emitting initializers.
3701 * data-streamer.h (bp_pack_poly_value): New function.
3702 (bp_unpack_poly_value): Likewise.
3703 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3704 for GET_MODE_NUNITS.
3705 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3706 for GET_MODE_NUNITS.
3707 * tree.c (make_vector_type): Remove temporary shim and make
3708 the real function take the number of units as a poly_uint64
3709 rather than an int.
3710 (build_vector_type_for_mode): Handle polynomial nunits.
3711 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3712 * emit-rtl.c (const_vec_series_p_1): Likewise.
3713 (gen_rtx_CONST_VECTOR): Likewise.
3714 * fold-const.c (test_vec_duplicate_folding): Likewise.
3715 * genrecog.c (validate_pattern): Likewise.
3716 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3717 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3718 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3719 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3720 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3721 * rtlanal.c (subreg_get_info): Likewise.
3722 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3723 (vect_grouped_load_supported): Likewise.
3724 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3725 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3726 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3727 (simplify_const_unary_operation, simplify_binary_operation_1)
3728 (simplify_const_binary_operation, simplify_ternary_operation)
3729 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3730 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3731 instead of CONST_VECTOR_NUNITS.
3732 * varasm.c (output_constant_pool_2): Likewise.
3733 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3734 explicit-encoded elements in the XVEC for variable-length vectors.
3736 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3738 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3740 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3741 Alan Hayward <alan.hayward@arm.com>
3742 David Sherwood <david.sherwood@arm.com>
3744 * coretypes.h (fixed_size_mode): Declare.
3745 (fixed_size_mode_pod): New typedef.
3746 * builtins.h (target_builtins::x_apply_args_mode)
3747 (target_builtins::x_apply_result_mode): Change type to
3748 fixed_size_mode_pod.
3749 * builtins.c (apply_args_size, apply_result_size, result_vector)
3750 (expand_builtin_apply_args_1, expand_builtin_apply)
3751 (expand_builtin_return): Update accordingly.
3753 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3755 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3756 * cselib.c (cselib_hash_rtx): Likewise.
3757 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3758 CONST_VECTOR encoding.
3760 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3761 Jeff Law <law@redhat.com>
3763 PR target/83641
3764 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3765 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3766 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3767 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3769 PR target/83641
3770 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3771 explicitly probe *sp in a noreturn function if there were any callee
3772 register saves or frame pointer is needed.
3774 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3776 PR debug/83621
3777 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3778 BLKmode for ternary, binary or unary expressions.
3780 PR debug/83645
3781 * var-tracking.c (delete_vta_debug_insn): New inline function.
3782 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3783 insns from get_insns () to NULL instead of each bb separately.
3784 Use delete_vta_debug_insn. No longer static.
3785 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3786 delete_vta_debug_insns callers.
3787 * rtl.h (delete_vta_debug_insns): Declare.
3788 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3789 instead of variable_tracking_main.
3791 2018-01-03 Martin Sebor <msebor@redhat.com>
3793 PR tree-optimization/83603
3794 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3795 arguments past the endof the argument list in functions declared
3796 without a prototype.
3797 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3798 Avoid checking when arguments are null.
3800 2018-01-03 Martin Sebor <msebor@redhat.com>
3802 PR c/83559
3803 * doc/extend.texi (attribute const): Fix a typo.
3804 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3805 issuing -Wsuggest-attribute for void functions.
3807 2018-01-03 Martin Sebor <msebor@redhat.com>
3809 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3810 offset_int::from instead of wide_int::to_shwi.
3811 (maybe_diag_overlap): Remove assertion.
3812 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3813 * gimple-ssa-sprintf.c (format_directive): Same.
3814 (parse_directive): Same.
3815 (sprintf_dom_walker::compute_format_length): Same.
3816 (try_substitute_return_value): Same.
3818 2017-01-03 Jeff Law <law@redhat.com>
3820 PR middle-end/83654
3821 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3822 non-constant residual for zero at runtime and avoid probing in
3823 that case. Reorganize code for trailing problem to mirror handling
3824 of the residual.
3826 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3828 PR tree-optimization/83501
3829 * tree-ssa-strlen.c (get_string_cst): New.
3830 (handle_char_store): Call get_string_cst.
3832 2018-01-03 Martin Liska <mliska@suse.cz>
3834 PR tree-optimization/83593
3835 * tree-ssa-strlen.c: Include tree-cfg.h.
3836 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3837 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3838 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3839 to false.
3840 (strlen_dom_walker::before_dom_children): Call
3841 gimple_purge_dead_eh_edges. Dump tranformation with details
3842 dump flags.
3843 (strlen_dom_walker::before_dom_children): Update call by adding
3844 new argument cleanup_eh.
3845 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3847 2018-01-03 Martin Liska <mliska@suse.cz>
3849 PR ipa/83549
3850 * cif-code.def (VARIADIC_THUNK): New enum value.
3851 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3852 thunks.
3854 2018-01-03 Jan Beulich <jbeulich@suse.com>
3856 * sse.md (mov<mode>_internal): Tighten condition for when to use
3857 vmovdqu<ssescalarsize> for TI and OI modes.
3859 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3861 Update copyright years.
3863 2018-01-03 Martin Liska <mliska@suse.cz>
3865 PR ipa/83594
3866 * ipa-visibility.c (function_and_variable_visibility): Skip
3867 functions with noipa attribure.
3869 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3871 * gcc.c (process_command): Update copyright notice dates.
3872 * gcov-dump.c (print_version): Ditto.
3873 * gcov.c (print_version): Ditto.
3874 * gcov-tool.c (print_version): Ditto.
3875 * gengtype.c (create_file): Ditto.
3876 * doc/cpp.texi: Bump @copying's copyright year.
3877 * doc/cppinternals.texi: Ditto.
3878 * doc/gcc.texi: Ditto.
3879 * doc/gccint.texi: Ditto.
3880 * doc/gcov.texi: Ditto.
3881 * doc/install.texi: Ditto.
3882 * doc/invoke.texi: Ditto.
3884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3886 * vector-builder.h (vector_builder::m_full_nelts): Change from
3887 unsigned int to poly_uint64.
3888 (vector_builder::full_nelts): Update prototype accordingly.
3889 (vector_builder::new_vector): Likewise.
3890 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3891 (vector_builder::operator ==): Likewise.
3892 (vector_builder::finalize): Likewise.
3893 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3894 Take the number of elements as a poly_uint64 rather than an
3895 unsigned int.
3896 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3897 from unsigned int to poly_uint64.
3898 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3899 (vec_perm_indices::new_vector): Likewise.
3900 (vec_perm_indices::length): Likewise.
3901 (vec_perm_indices::nelts_per_input): Likewise.
3902 (vec_perm_indices::input_nelts): Likewise.
3903 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3904 number of elements per input as a poly_uint64 rather than an
3905 unsigned int. Use the original encoding for variable-length
3906 vectors, rather than clamping each individual element.
3907 For the second and subsequent elements in each pattern,
3908 clamp the step and base before clamping their sum.
3909 (vec_perm_indices::series_p): Handle polynomial element counts.
3910 (vec_perm_indices::all_in_range_p): Likewise.
3911 (vec_perm_indices_to_tree): Likewise.
3912 (vec_perm_indices_to_rtx): Likewise.
3913 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3914 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3915 (tree_vector_builder::new_binary_operation): Handle polynomial
3916 element counts. Return false if we need to know the number
3917 of elements at compile time.
3918 * fold-const.c (fold_vec_perm): Punt if the number of elements
3919 isn't known at compile time.
3921 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3923 * vec-perm-indices.h (vec_perm_builder): Change element type
3924 from HOST_WIDE_INT to poly_int64.
3925 (vec_perm_indices::element_type): Update accordingly.
3926 (vec_perm_indices::clamp): Handle polynomial element_types.
3927 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3928 (vec_perm_indices::all_in_range_p): Likewise.
3929 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3930 than shwi trees.
3931 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3932 polynomial vec_perm_indices element types.
3933 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3934 * fold-const.c (fold_vec_perm): Likewise.
3935 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3936 * tree-vect-generic.c (lower_vec_perm): Likewise.
3937 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3938 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3939 element type to HOST_WIDE_INT.
3941 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3942 Alan Hayward <alan.hayward@arm.com>
3943 David Sherwood <david.sherwood@arm.com>
3945 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3946 rather than an int. Use plus_constant.
3947 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3948 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3950 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3951 Alan Hayward <alan.hayward@arm.com>
3952 David Sherwood <david.sherwood@arm.com>
3954 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3955 a HOST_WIDE_INT to a poly_int64.
3957 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3958 Alan Hayward <alan.hayward@arm.com>
3959 David Sherwood <david.sherwood@arm.com>
3961 * calls.c (load_register_parameters): Cope with polynomial
3962 mode sizes. Require a constant size for BLKmode parameters
3963 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3964 forces a parameter to be padded at the lsb end in order to
3965 fill a complete number of words, require the parameter size
3966 to be ordered wrt UNITS_PER_WORD.
3968 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3969 Alan Hayward <alan.hayward@arm.com>
3970 David Sherwood <david.sherwood@arm.com>
3972 * reload1.c (spill_stack_slot_width): Change element type
3973 from unsigned int to poly_uint64_pod.
3974 (alter_reg): Treat mode sizes as polynomial.
3976 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3977 Alan Hayward <alan.hayward@arm.com>
3978 David Sherwood <david.sherwood@arm.com>
3980 * reload.c (complex_word_subreg_p): New function.
3981 (reload_inner_reg_of_subreg, push_reload): Use it.
3983 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3984 Alan Hayward <alan.hayward@arm.com>
3985 David Sherwood <david.sherwood@arm.com>
3987 * lra-constraints.c (process_alt_operands): Reject matched
3988 operands whose sizes aren't ordered.
3989 (match_reload): Refer to this check here.
3991 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3992 Alan Hayward <alan.hayward@arm.com>
3993 David Sherwood <david.sherwood@arm.com>
3995 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3996 that the mode size is in the set {1, 2, 4, 8, 16}.
3998 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3999 Alan Hayward <alan.hayward@arm.com>
4000 David Sherwood <david.sherwood@arm.com>
4002 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4003 Use plus_constant instead of gen_rtx_PLUS.
4005 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4006 Alan Hayward <alan.hayward@arm.com>
4007 David Sherwood <david.sherwood@arm.com>
4009 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4010 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4011 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4012 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4013 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4014 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4015 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4016 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4017 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4018 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4019 a poly_int64.
4020 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4021 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4022 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4023 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4024 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4025 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4026 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4027 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4028 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4029 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4030 function.
4031 * expr.c (emit_move_resolve_push): Treat the input and result
4032 of PUSH_ROUNDING as a poly_int64.
4033 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4034 (emit_push_insn): Likewise.
4035 * lra-eliminations.c (mark_not_eliminable): Likewise.
4036 * recog.c (push_operand): Likewise.
4037 * reload1.c (elimination_effects): Likewise.
4038 * rtlanal.c (nonzero_bits1): Likewise.
4039 * calls.c (store_one_arg): Likewise. Require the padding to be
4040 known at compile time.
4042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4043 Alan Hayward <alan.hayward@arm.com>
4044 David Sherwood <david.sherwood@arm.com>
4046 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4047 Use plus_constant instead of gen_rtx_PLUS.
4049 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4050 Alan Hayward <alan.hayward@arm.com>
4051 David Sherwood <david.sherwood@arm.com>
4053 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4054 rather than an int.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4061 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4062 via stack temporaries. Treat the mode size as polynomial too.
4064 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4065 Alan Hayward <alan.hayward@arm.com>
4066 David Sherwood <david.sherwood@arm.com>
4068 * expr.c (expand_expr_real_2): When handling conversions involving
4069 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4070 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4071 as a poly_uint64 too.
4073 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4074 Alan Hayward <alan.hayward@arm.com>
4075 David Sherwood <david.sherwood@arm.com>
4077 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4079 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4080 Alan Hayward <alan.hayward@arm.com>
4081 David Sherwood <david.sherwood@arm.com>
4083 * combine.c (can_change_dest_mode): Handle polynomial
4084 REGMODE_NATURAL_SIZE.
4085 * expmed.c (store_bit_field_1): Likewise.
4086 * expr.c (store_constructor): Likewise.
4087 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4088 and polynomial REGMODE_NATURAL_SIZE.
4089 (gen_lowpart_common): Likewise.
4090 * reginfo.c (record_subregs_of_mode): Likewise.
4091 * rtlanal.c (read_modify_subreg_p): Likewise.
4093 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4094 Alan Hayward <alan.hayward@arm.com>
4095 David Sherwood <david.sherwood@arm.com>
4097 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4098 numbers of elements.
4100 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4101 Alan Hayward <alan.hayward@arm.com>
4102 David Sherwood <david.sherwood@arm.com>
4104 * match.pd: Cope with polynomial numbers of vector elements.
4106 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4107 Alan Hayward <alan.hayward@arm.com>
4108 David Sherwood <david.sherwood@arm.com>
4110 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4111 in a POINTER_PLUS_EXPR.
4113 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4114 Alan Hayward <alan.hayward@arm.com>
4115 David Sherwood <david.sherwood@arm.com>
4117 * omp-simd-clone.c (simd_clone_subparts): New function.
4118 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4119 (ipa_simd_modify_function_body): Likewise.
4121 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4122 Alan Hayward <alan.hayward@arm.com>
4123 David Sherwood <david.sherwood@arm.com>
4125 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4126 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4127 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4128 (expand_vector_condition, vector_element): Likewise.
4129 (subparts_gt): New function.
4130 (get_compute_type): Use subparts_gt.
4131 (count_type_subparts): Delete.
4132 (expand_vector_operations_1): Use subparts_gt instead of
4133 count_type_subparts.
4135 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4136 Alan Hayward <alan.hayward@arm.com>
4137 David Sherwood <david.sherwood@arm.com>
4139 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4140 (vect_compile_time_alias): ...this new function. Do the calculation
4141 on poly_ints rather than trees.
4142 (vect_prune_runtime_alias_test_list): Update call accordingly.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4149 numbers of units.
4150 (vect_schedule_slp_instance): Likewise.
4152 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4153 Alan Hayward <alan.hayward@arm.com>
4154 David Sherwood <david.sherwood@arm.com>
4156 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4157 constant and extern definitions for variable-length vectors.
4158 (vect_get_constant_vectors): Note that the number of units
4159 is known to be constant.
4161 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4162 Alan Hayward <alan.hayward@arm.com>
4163 David Sherwood <david.sherwood@arm.com>
4165 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4166 of units as polynomial. Choose between WIDE and NARROW based
4167 on multiple_p.
4169 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4170 Alan Hayward <alan.hayward@arm.com>
4171 David Sherwood <david.sherwood@arm.com>
4173 * tree-vect-stmts.c (simd_clone_subparts): New function.
4174 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4176 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4177 Alan Hayward <alan.hayward@arm.com>
4178 David Sherwood <david.sherwood@arm.com>
4180 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4181 vectors as polynomial. Use build_index_vector for
4182 IFN_GOMP_SIMD_LANE.
4184 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4185 Alan Hayward <alan.hayward@arm.com>
4186 David Sherwood <david.sherwood@arm.com>
4188 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4189 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4190 for variable-length vectors.
4191 (vectorizable_mask_load_store): Treat the number of units as
4192 polynomial, asserting that it is constant if the condition has
4193 already been enforced.
4194 (vectorizable_store, vectorizable_load): Likewise.
4196 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4197 Alan Hayward <alan.hayward@arm.com>
4198 David Sherwood <david.sherwood@arm.com>
4200 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4201 of units as polynomial. Punt if we can't tell at compile time
4202 which vector contains the final result.
4204 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4205 Alan Hayward <alan.hayward@arm.com>
4206 David Sherwood <david.sherwood@arm.com>
4208 * tree-vect-loop.c (vectorizable_induction): Treat the number
4209 of units as polynomial. Punt on SLP inductions. Use an integer
4210 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4211 cast of such a series for variable-length floating-point
4212 reductions.
4214 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4215 Alan Hayward <alan.hayward@arm.com>
4216 David Sherwood <david.sherwood@arm.com>
4218 * tree.h (build_index_vector): Declare.
4219 * tree.c (build_index_vector): New function.
4220 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4221 of units as polynomial, forcibly converting it to a constant if
4222 vectorizable_reduction has already enforced the condition.
4223 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4224 to create a {1,2,3,...} vector.
4225 (vectorizable_reduction): Treat the number of units as polynomial.
4226 Choose vectype_in based on the largest scalar element size rather
4227 than the smallest number of units. Enforce the restrictions
4228 relied on above.
4230 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4231 Alan Hayward <alan.hayward@arm.com>
4232 David Sherwood <david.sherwood@arm.com>
4234 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4235 number of units as polynomial.
4237 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4238 Alan Hayward <alan.hayward@arm.com>
4239 David Sherwood <david.sherwood@arm.com>
4241 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4242 * target.def (autovectorize_vector_sizes): Return the vector sizes
4243 by pointer, using vector_sizes rather than a bitmask.
4244 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4245 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4246 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4247 Likewise.
4248 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4249 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4250 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4251 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4252 * omp-general.c (omp_max_vf): Likewise.
4253 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4254 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4255 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4256 * tree-vect-slp.c (vect_slp_bb): Likewise.
4257 * doc/tm.texi: Regenerate.
4258 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4259 to a poly_uint64.
4260 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4261 the vector size as a poly_uint64 rather than an unsigned int.
4262 (current_vector_size): Change from an unsigned int to a poly_uint64.
4263 (get_vectype_for_scalar_type): Update accordingly.
4264 * tree.h (build_truth_vector_type): Take the size and number of
4265 units as a poly_uint64 rather than an unsigned int.
4266 (build_vector_type): Add a temporary overload that takes
4267 the number of units as a poly_uint64 rather than an unsigned int.
4268 * tree.c (make_vector_type): Likewise.
4269 (build_truth_vector_type): Take the number of units as a poly_uint64
4270 rather than an unsigned int.
4272 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4273 Alan Hayward <alan.hayward@arm.com>
4274 David Sherwood <david.sherwood@arm.com>
4276 * target.def (get_mask_mode): Take the number of units and length
4277 as poly_uint64s rather than unsigned ints.
4278 * targhooks.h (default_get_mask_mode): Update accordingly.
4279 * targhooks.c (default_get_mask_mode): Likewise.
4280 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4281 * doc/tm.texi: Regenerate.
4283 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4284 Alan Hayward <alan.hayward@arm.com>
4285 David Sherwood <david.sherwood@arm.com>
4287 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4288 * omp-general.c (omp_max_vf): Likewise.
4289 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4290 (expand_omp_simd): Handle polynomial safelen.
4291 * omp-low.c (omplow_simd_context): Add a default constructor.
4292 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4293 (lower_rec_simd_input_clauses): Update accordingly.
4294 (lower_rec_input_clauses): Likewise.
4296 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4297 Alan Hayward <alan.hayward@arm.com>
4298 David Sherwood <david.sherwood@arm.com>
4300 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4301 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4302 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4303 (vect_analyze_slp_cost): Likewise.
4304 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4305 (vect_model_load_cost): Likewise.
4307 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4308 Alan Hayward <alan.hayward@arm.com>
4309 David Sherwood <david.sherwood@arm.com>
4311 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4312 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4313 from an unsigned int * to a poly_uint64_pod *.
4314 (calculate_unrolling_factor): New function.
4315 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4317 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4318 Alan Hayward <alan.hayward@arm.com>
4319 David Sherwood <david.sherwood@arm.com>
4321 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4322 from an unsigned int to a poly_uint64.
4323 (_loop_vec_info::slp_unrolling_factor): Likewise.
4324 (_loop_vec_info::vectorization_factor): Change from an int
4325 to a poly_uint64.
4326 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4327 (vect_get_num_vectors): New function.
4328 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4329 (vect_get_num_copies): Use vect_get_num_vectors.
4330 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4331 to an unsigned int *.
4332 (vect_analyze_data_refs): Change min_vf from an int * to a
4333 poly_uint64 *.
4334 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4335 than an unsigned HOST_WIDE_INT.
4336 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4337 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4338 to an unsigned int *.
4339 (vect_analyze_data_ref_dependences): Likewise.
4340 (vect_compute_data_ref_alignment): Handle polynomial vf.
4341 (vect_enhance_data_refs_alignment): Likewise.
4342 (vect_prune_runtime_alias_test_list): Likewise.
4343 (vect_shift_permute_load_chain): Likewise.
4344 (vect_supportable_dr_alignment): Likewise.
4345 (dependence_distance_ge_vf): Take the vectorization factor as a
4346 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4347 (vect_analyze_data_refs): Change min_vf from an int * to a
4348 poly_uint64 *.
4349 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4350 vfm1 as a poly_uint64 rather than an int. Make the same change
4351 for the returned bound_scalar.
4352 (vect_gen_vector_loop_niters): Handle polynomial vf.
4353 (vect_do_peeling): Likewise. Update call to
4354 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4355 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4356 be constant.
4357 * tree-vect-loop.c (vect_determine_vectorization_factor)
4358 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4359 (vect_get_known_peeling_cost): Likewise.
4360 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4361 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4362 (vect_transform_loop): Likewise. Use the lowest possible VF when
4363 updating the upper bounds of the loop.
4364 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4365 rather than an int.
4366 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4367 polynomial unroll factors.
4368 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4369 (vect_make_slp_decision): Likewise.
4370 (vect_supported_load_permutation_p): Likewise, and polynomial
4371 vf too.
4372 (vect_analyze_slp_cost): Handle polynomial vf.
4373 (vect_slp_analyze_node_operations): Likewise.
4374 (vect_slp_analyze_bb_1): Likewise.
4375 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4376 than an unsigned HOST_WIDE_INT.
4377 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4378 (vectorizable_load): Handle polynomial vf.
4379 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4380 a poly_uint64.
4381 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4383 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4384 Alan Hayward <alan.hayward@arm.com>
4385 David Sherwood <david.sherwood@arm.com>
4387 * match.pd: Handle bit operations involving three constants
4388 and try to fold one pair.
4390 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4392 * tree-vect-loop-manip.c: Include gimple-fold.h.
4393 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4394 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4395 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4396 Add a path that uses a step of VF instead of 1, but disable it
4397 for now.
4398 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4399 and niters_no_overflow parameters. Update calls to
4400 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4401 Create a new SSA name if the latter choses to use a ste other
4402 than zero, and return it via niters_vector_mult_vf_var.
4403 * tree-vect-loop.c (vect_transform_loop): Update calls to
4404 vect_do_peeling, vect_gen_vector_loop_niters and
4405 slpeel_make_loop_iterate_ntimes.
4406 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4407 (vect_gen_vector_loop_niters): Update declarations after above changes.
4409 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4411 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4412 128-bit round to integer instructions.
4413 (ceil<mode>2): Likewise.
4414 (btrunc<mode>2): Likewise.
4415 (round<mode>2): Likewise.
4417 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4419 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4420 unaligned VSX load/store on P8/P9.
4421 (expand_block_clear): Allow the use of unaligned VSX
4422 load/store on P8/P9.
4424 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4426 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4427 New function.
4428 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4429 swap associated with both a load and a store.
4431 2018-01-02 Andrew Waterman <andrew@sifive.com>
4433 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4434 * config/riscv/riscv.md (clear_cache): Use it.
4436 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4438 * web.c: Remove out-of-date comment.
4440 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4442 * expr.c (fixup_args_size_notes): Check that any existing
4443 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4444 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4445 (emit_single_push_insn): ...here.
4447 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4449 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4450 (const_vector_encoded_nelts): New function.
4451 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4452 (const_vector_int_elt, const_vector_elt): Declare.
4453 * emit-rtl.c (const_vector_int_elt_1): New function.
4454 (const_vector_elt): Likewise.
4455 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4456 of CONST_VECTOR_ELT.
4458 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4460 * expr.c: Include rtx-vector-builder.h.
4461 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4462 directly on the tree encoding.
4463 (const_vector_from_tree): Likewise.
4464 * optabs.c: Include rtx-vector-builder.h.
4465 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4466 sequence of "u" values.
4467 * vec-perm-indices.c: Include rtx-vector-builder.h.
4468 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4469 directly on the vec_perm_indices encoding.
4471 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4473 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4474 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4475 * rtx-vector-builder.h: New file.
4476 * rtx-vector-builder.c: Likewise.
4477 * rtl.h (rtx_def::u2): Add a const_vector field.
4478 (CONST_VECTOR_NPATTERNS): New macro.
4479 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4480 (CONST_VECTOR_DUPLICATE_P): Likewise.
4481 (CONST_VECTOR_STEPPED_P): Likewise.
4482 (CONST_VECTOR_ENCODED_ELT): Likewise.
4483 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4484 (unwrap_const_vec_duplicate): Likewise.
4485 (const_vec_series_p): Check for a non-duplicated vector encoding.
4486 Say that the function only returns true for integer vectors.
4487 * emit-rtl.c: Include rtx-vector-builder.h.
4488 (gen_const_vec_duplicate_1): Delete.
4489 (gen_const_vector): Call gen_const_vec_duplicate instead of
4490 gen_const_vec_duplicate_1.
4491 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4492 (gen_const_vec_duplicate): Use rtx_vector_builder.
4493 (gen_const_vec_series): Likewise.
4494 (gen_rtx_CONST_VECTOR): Likewise.
4495 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4496 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4497 Build a new vector rather than modifying a CONST_VECTOR in-place.
4498 (handle_special_swappables): Update call accordingly.
4499 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4500 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4501 Build a new vector rather than modifying a CONST_VECTOR in-place.
4502 (handle_special_swappables): Update call accordingly.
4504 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4506 * simplify-rtx.c (simplify_const_binary_operation): Use
4507 CONST_VECTOR_ELT instead of XVECEXP.
4509 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4511 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4512 the selector elements to be different from the data elements
4513 if the selector is a VECTOR_CST.
4514 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4515 ssizetype for the selector.
4517 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4519 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4520 before testing each element individually.
4521 * tree-vect-generic.c (lower_vec_perm): Likewise.
4523 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4525 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4526 * selftest-run-tests.c (selftest::run_tests): Call it.
4527 * vector-builder.h (vector_builder::operator ==): New function.
4528 (vector_builder::operator !=): Likewise.
4529 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4530 (vec_perm_indices::all_from_input_p): New function.
4531 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4532 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4533 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4534 instead of reading the VECTOR_CST directly. Detect whether both
4535 vector inputs are the same before constructing the vec_perm_indices,
4536 and update the number of inputs argument accordingly. Use the
4537 utility functions added above. Only construct sel2 if we need to.
4539 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4541 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4542 the broadcast of the low byte.
4543 (expand_mult_highpart): Use an explicit encoding for the permutes.
4544 * optabs-query.c (can_mult_highpart_p): Likewise.
4545 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4546 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4547 (vectorizable_bswap): Likewise.
4548 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4549 explicit encoding for the power-of-2 permutes.
4550 (vect_permute_store_chain): Likewise.
4551 (vect_grouped_load_supported): Likewise.
4552 (vect_permute_load_chain): Likewise.
4554 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4556 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4557 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4558 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4559 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4560 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4561 (vect_gen_perm_mask_any): Likewise.
4563 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4565 * int-vector-builder.h: New file.
4566 * vec-perm-indices.h: Include int-vector-builder.h.
4567 (vec_perm_indices): Redefine as an int_vector_builder.
4568 (auto_vec_perm_indices): Delete.
4569 (vec_perm_builder): Redefine as a stand-alone class.
4570 (vec_perm_indices::vec_perm_indices): New function.
4571 (vec_perm_indices::clamp): Likewise.
4572 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4573 (vec_perm_indices::new_vector): New function.
4574 (vec_perm_indices::new_expanded_vector): Update for new
4575 vec_perm_indices class.
4576 (vec_perm_indices::rotate_inputs): New function.
4577 (vec_perm_indices::all_in_range_p): Operate directly on the
4578 encoded form, without computing elided elements.
4579 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4580 encoding. Update for new vec_perm_indices class.
4581 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4582 the given vec_perm_builder.
4583 (expand_vec_perm_var): Update vec_perm_builder constructor.
4584 (expand_mult_highpart): Use vec_perm_builder instead of
4585 auto_vec_perm_indices.
4586 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4587 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4588 or double series encoding as appropriate.
4589 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4590 vec_perm_indices instead of auto_vec_perm_indices.
4591 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4592 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4593 (vect_permute_store_chain): Likewise.
4594 (vect_grouped_load_supported): Likewise.
4595 (vect_permute_load_chain): Likewise.
4596 (vect_shift_permute_load_chain): Likewise.
4597 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4598 (vect_transform_slp_perm_load): Likewise.
4599 (vect_schedule_slp_instance): Likewise.
4600 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4601 (vectorizable_mask_load_store): Likewise.
4602 (vectorizable_bswap): Likewise.
4603 (vectorizable_store): Likewise.
4604 (vectorizable_load): Likewise.
4605 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4606 vec_perm_indices instead of auto_vec_perm_indices. Use
4607 tree_to_vec_perm_builder to read the vector from a tree.
4608 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4609 vec_perm_builder instead of a vec_perm_indices.
4610 (have_whole_vector_shift): Use vec_perm_builder and
4611 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4612 truncation to calc_vec_perm_mask_for_shift.
4613 (vect_create_epilog_for_reduction): Likewise.
4614 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4615 from auto_vec_perm_indices to vec_perm_indices.
4616 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4617 instead of changing individual elements.
4618 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4619 the vector in d.perm.
4620 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4621 from auto_vec_perm_indices to vec_perm_indices.
4622 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4623 instead of changing individual elements.
4624 (arm_vectorize_vec_perm_const): Use new_vector to install
4625 the vector in d.perm.
4626 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4627 Update vec_perm_builder constructor.
4628 (rs6000_expand_interleave): Likewise.
4629 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4630 (rs6000_expand_interleave): Likewise.
4632 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4634 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4635 to qimode could truncate the indices.
4636 * optabs.c (expand_vec_perm_var): Likewise.
4638 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4640 * Makefile.in (OBJS): Add vec-perm-indices.o.
4641 * vec-perm-indices.h: New file.
4642 * vec-perm-indices.c: Likewise.
4643 * target.h (vec_perm_indices): Replace with a forward class
4644 declaration.
4645 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4646 * optabs.h: Include vec-perm-indices.h.
4647 (expand_vec_perm): Delete.
4648 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4649 (expand_vec_perm_const): Declare.
4650 * target.def (vec_perm_const_ok): Replace with...
4651 (vec_perm_const): ...this new hook.
4652 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4653 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4654 * doc/tm.texi: Regenerate.
4655 * optabs.def (vec_perm_const): Delete.
4656 * doc/md.texi (vec_perm_const): Likewise.
4657 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4658 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4659 expand_vec_perm for constant permutation vectors. Assert that
4660 the mode of variable permutation vectors is the integer equivalent
4661 of the mode that is being permuted.
4662 * optabs-query.h (selector_fits_mode_p): Declare.
4663 * optabs-query.c: Include vec-perm-indices.h.
4664 (selector_fits_mode_p): New function.
4665 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4666 is defined, instead of checking whether the vec_perm_const_optab
4667 exists. Use targetm.vectorize.vec_perm_const instead of
4668 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4669 fit in the vector mode before using a variable permute.
4670 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4671 vec_perm_indices instead of an rtx.
4672 (expand_vec_perm): Replace with...
4673 (expand_vec_perm_const): ...this new function. Take the selector
4674 as a vec_perm_indices rather than an rtx. Also take the mode of
4675 the selector. Update call to shift_amt_for_vec_perm_mask.
4676 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4677 Use vec_perm_indices::new_expanded_vector to expand the original
4678 selector into bytes. Check whether the indices fit in the vector
4679 mode before using a variable permute.
4680 (expand_vec_perm_var): Make global.
4681 (expand_mult_highpart): Use expand_vec_perm_const.
4682 * fold-const.c: Includes vec-perm-indices.h.
4683 * tree-ssa-forwprop.c: Likewise.
4684 * tree-vect-data-refs.c: Likewise.
4685 * tree-vect-generic.c: Likewise.
4686 * tree-vect-loop.c: Likewise.
4687 * tree-vect-slp.c: Likewise.
4688 * tree-vect-stmts.c: Likewise.
4689 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4690 Delete.
4691 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4692 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4693 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4694 (aarch64_vectorize_vec_perm_const): ...this new function.
4695 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4696 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4697 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4698 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4699 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4700 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4701 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4702 into...
4703 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4704 check for NEON modes.
4705 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4706 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4707 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4708 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4709 into...
4710 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4711 the old VEC_PERM_CONST conditions.
4712 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4713 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4714 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4715 (ia64_vectorize_vec_perm_const_ok): Merge into...
4716 (ia64_vectorize_vec_perm_const): ...this new function.
4717 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4718 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4719 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4720 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4721 * config/mips/mips.c (mips_expand_vec_perm_const)
4722 (mips_vectorize_vec_perm_const_ok): Merge into...
4723 (mips_vectorize_vec_perm_const): ...this new function.
4724 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4725 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4726 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4727 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4728 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4729 (rs6000_expand_vec_perm_const): Delete.
4730 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4731 Delete.
4732 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4733 (altivec_expand_vec_perm_const_le): Take each operand individually.
4734 Operate on constant selectors rather than rtxes.
4735 (altivec_expand_vec_perm_const): Likewise. Update call to
4736 altivec_expand_vec_perm_const_le.
4737 (rs6000_expand_vec_perm_const): Delete.
4738 (rs6000_vectorize_vec_perm_const_ok): Delete.
4739 (rs6000_vectorize_vec_perm_const): New function.
4740 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4741 an element count and rtx array.
4742 (rs6000_expand_extract_even): Update call accordingly.
4743 (rs6000_expand_interleave): Likewise.
4744 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4745 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4746 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4747 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4748 (rs6000_expand_vec_perm_const): Delete.
4749 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4750 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4751 (altivec_expand_vec_perm_const_le): Take each operand individually.
4752 Operate on constant selectors rather than rtxes.
4753 (altivec_expand_vec_perm_const): Likewise. Update call to
4754 altivec_expand_vec_perm_const_le.
4755 (rs6000_expand_vec_perm_const): Delete.
4756 (rs6000_vectorize_vec_perm_const_ok): Delete.
4757 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4758 reference to the SPE evmerge intructions.
4759 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4760 an element count and rtx array.
4761 (rs6000_expand_extract_even): Update call accordingly.
4762 (rs6000_expand_interleave): Likewise.
4763 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4764 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4765 new function.
4766 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4768 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4770 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4771 vector mode and that that mode matches the mode of the data
4772 being permuted.
4773 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4774 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4775 directly using expand_vec_perm_1 when forcing selectors into
4776 registers.
4777 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4779 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4781 * optabs-query.h (can_vec_perm_p): Delete.
4782 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4783 * optabs-query.c (can_vec_perm_p): Split into...
4784 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4785 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4786 particular selector is valid.
4787 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4788 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4789 (vect_grouped_load_supported): Likewise.
4790 (vect_shift_permute_load_chain): Likewise.
4791 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4792 (vect_transform_slp_perm_load): Likewise.
4793 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4794 (vectorizable_bswap): Likewise.
4795 (vect_gen_perm_mask_checked): Likewise.
4796 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4797 implementations of variable permutation vectors into account
4798 when deciding which selector to use.
4799 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4800 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4801 with a false third argument.
4802 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4803 to test whether the constant selector is valid and can_vec_perm_var_p
4804 to test whether a variable selector is valid.
4806 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4808 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4809 * optabs-query.c (can_vec_perm_p): Likewise.
4810 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4811 instead of vec_perm_indices.
4812 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4813 (vect_gen_perm_mask_checked): Likewise,
4814 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4815 (vect_gen_perm_mask_checked): Likewise,
4817 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4819 * optabs-query.h (qimode_for_vec_perm): Declare.
4820 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4821 (qimode_for_vec_perm): ...this new function.
4822 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4824 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4826 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4827 does not have a conditional at the top.
4829 2018-01-02 Richard Biener <rguenther@suse.de>
4831 * ipa-inline.c (big_speedup_p): Fix expression.
4833 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4835 PR target/81616
4836 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4837 for generic 4->6.
4839 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4841 PR target/81616
4842 Generic tuning.
4843 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4844 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4845 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4846 cond_taken_branch_cost 3->4.
4848 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4850 PR tree-optimization/83581
4851 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4852 TODO_cleanup_cfg if any changes have been made.
4854 PR middle-end/83608
4855 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4856 convert_modes if target mode has the right side, but different mode
4857 class.
4859 PR middle-end/83609
4860 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4861 last argument when extracting from CONCAT. If either from_real or
4862 from_imag is NULL, use expansion through memory. If result is not
4863 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4864 the parts directly to inner mode, if even that fails, use expansion
4865 through memory.
4867 PR middle-end/83623
4868 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4869 check for bswap in mode rather than HImode and use that in expand_unop
4870 too.
4871 \f
4872 Copyright (C) 2018 Free Software Foundation, Inc.
4874 Copying and distribution of this file, with or without modification,
4875 are permitted in any medium without royalty provided the copyright
4876 notice and this notice are preserved.