1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
38 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
39 #include "addresses.h"
41 /* Forward declarations */
42 static void set_of_1 (rtx
, const_rtx
, void *);
43 static bool covers_regno_p (const_rtx
, unsigned int);
44 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
45 static int rtx_referenced_p_1 (rtx
*, void *);
46 static int computed_jump_p_1 (const_rtx
);
47 static void parms_set (rtx
, const_rtx
, void *);
49 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
50 const_rtx
, enum machine_mode
,
51 unsigned HOST_WIDE_INT
);
52 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
53 const_rtx
, enum machine_mode
,
54 unsigned HOST_WIDE_INT
);
55 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
58 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
59 enum machine_mode
, unsigned int);
61 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
62 -1 if a code has no such operand. */
63 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
65 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
66 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
67 SIGN_EXTEND then while narrowing we also have to enforce the
68 representation and sign-extend the value to mode DESTINATION_REP.
70 If the value is already sign-extended to DESTINATION_REP mode we
71 can just switch to DESTINATION mode on it. For each pair of
72 integral modes SOURCE and DESTINATION, when truncating from SOURCE
73 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
74 contains the number of high-order bits in SOURCE that have to be
75 copies of the sign-bit so that we can do this mode-switch to
79 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
81 /* Return 1 if the value of X is unstable
82 (would be different at a different point in the program).
83 The frame pointer, arg pointer, etc. are considered stable
84 (within one function) and so is anything marked `unchanging'. */
87 rtx_unstable_p (const_rtx x
)
89 const RTX_CODE code
= GET_CODE (x
);
96 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
105 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
106 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
107 /* The arg pointer varies if it is not a fixed register. */
108 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
110 /* ??? When call-clobbered, the value is stable modulo the restore
111 that must happen after a call. This currently screws up local-alloc
112 into believing that the restore is not needed. */
113 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
118 if (MEM_VOLATILE_P (x
))
127 fmt
= GET_RTX_FORMAT (code
);
128 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
131 if (rtx_unstable_p (XEXP (x
, i
)))
134 else if (fmt
[i
] == 'E')
137 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
138 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
145 /* Return 1 if X has a value that can vary even between two
146 executions of the program. 0 means X can be compared reliably
147 against certain constants or near-constants.
148 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
149 zero, we are slightly more conservative.
150 The frame pointer and the arg pointer are considered constant. */
153 rtx_varies_p (const_rtx x
, bool for_alias
)
166 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
175 /* Note that we have to test for the actual rtx used for the frame
176 and arg pointers and not just the register number in case we have
177 eliminated the frame and/or arg pointer and are using it
179 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
180 /* The arg pointer varies if it is not a fixed register. */
181 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
183 if (x
== pic_offset_table_rtx
184 /* ??? When call-clobbered, the value is stable modulo the restore
185 that must happen after a call. This currently screws up
186 local-alloc into believing that the restore is not needed, so we
187 must return 0 only if we are called from alias analysis. */
188 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
193 /* The operand 0 of a LO_SUM is considered constant
194 (in fact it is related specifically to operand 1)
195 during alias analysis. */
196 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
197 || rtx_varies_p (XEXP (x
, 1), for_alias
);
200 if (MEM_VOLATILE_P (x
))
209 fmt
= GET_RTX_FORMAT (code
);
210 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
213 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
216 else if (fmt
[i
] == 'E')
219 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
220 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
227 /* Return nonzero if the use of X+OFFSET as an address in a MEM with SIZE
228 bytes can cause a trap. MODE is the mode of the MEM (not that of X) and
229 UNALIGNED_MEMS controls whether nonzero is returned for unaligned memory
230 references on strict alignment machines. */
233 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
234 enum machine_mode mode
, bool unaligned_mems
)
236 enum rtx_code code
= GET_CODE (x
);
238 /* The offset must be a multiple of the mode size if we are considering
239 unaligned memory references on strict alignment machines. */
240 if (STRICT_ALIGNMENT
&& unaligned_mems
&& GET_MODE_SIZE (mode
) != 0)
242 HOST_WIDE_INT actual_offset
= offset
;
244 #ifdef SPARC_STACK_BOUNDARY_HACK
245 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
246 the real alignment of %sp. However, when it does this, the
247 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
248 if (SPARC_STACK_BOUNDARY_HACK
249 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
250 actual_offset
-= STACK_POINTER_OFFSET
;
253 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
260 if (SYMBOL_REF_WEAK (x
))
262 if (!CONSTANT_POOL_ADDRESS_P (x
))
265 HOST_WIDE_INT decl_size
;
270 size
= GET_MODE_SIZE (mode
);
274 /* If the size of the access or of the symbol is unknown,
276 decl
= SYMBOL_REF_DECL (x
);
278 /* Else check that the access is in bounds. TODO: restructure
279 expr_size/tree_expr_size/int_expr_size and just use the latter. */
282 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
283 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
284 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
286 else if (TREE_CODE (decl
) == STRING_CST
)
287 decl_size
= TREE_STRING_LENGTH (decl
);
288 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
289 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
293 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
302 /* Stack references are assumed not to trap, but we need to deal with
303 nonsensical offsets. */
304 if (x
== frame_pointer_rtx
)
306 HOST_WIDE_INT adj_offset
= offset
- STARTING_FRAME_OFFSET
;
308 size
= GET_MODE_SIZE (mode
);
309 if (FRAME_GROWS_DOWNWARD
)
311 if (adj_offset
< frame_offset
|| adj_offset
+ size
- 1 >= 0)
316 if (adj_offset
< 0 || adj_offset
+ size
- 1 >= frame_offset
)
321 /* ??? Need to add a similar guard for nonsensical offsets. */
322 if (x
== hard_frame_pointer_rtx
323 || x
== stack_pointer_rtx
324 /* The arg pointer varies if it is not a fixed register. */
325 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
327 /* All of the virtual frame registers are stack references. */
328 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
329 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
334 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
335 mode
, unaligned_mems
);
338 /* An address is assumed not to trap if:
339 - it is the pic register plus a constant. */
340 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
343 /* - or it is an address that can't trap plus a constant integer. */
344 if (CONST_INT_P (XEXP (x
, 1))
345 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
346 size
, mode
, unaligned_mems
))
353 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
354 mode
, unaligned_mems
);
361 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
362 mode
, unaligned_mems
);
368 /* If it isn't one of the case above, it can cause a trap. */
372 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
375 rtx_addr_can_trap_p (const_rtx x
)
377 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
380 /* Return true if X is an address that is known to not be zero. */
383 nonzero_address_p (const_rtx x
)
385 const enum rtx_code code
= GET_CODE (x
);
390 return !SYMBOL_REF_WEAK (x
);
396 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
397 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
398 || x
== stack_pointer_rtx
399 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
401 /* All of the virtual frame registers are stack references. */
402 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
403 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
408 return nonzero_address_p (XEXP (x
, 0));
411 /* Handle PIC references. */
412 if (XEXP (x
, 0) == pic_offset_table_rtx
413 && CONSTANT_P (XEXP (x
, 1)))
418 /* Similar to the above; allow positive offsets. Further, since
419 auto-inc is only allowed in memories, the register must be a
421 if (CONST_INT_P (XEXP (x
, 1))
422 && INTVAL (XEXP (x
, 1)) > 0)
424 return nonzero_address_p (XEXP (x
, 0));
427 /* Similarly. Further, the offset is always positive. */
434 return nonzero_address_p (XEXP (x
, 0));
437 return nonzero_address_p (XEXP (x
, 1));
443 /* If it isn't one of the case above, might be zero. */
447 /* Return 1 if X refers to a memory location whose address
448 cannot be compared reliably with constant addresses,
449 or if X refers to a BLKmode memory object.
450 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
451 zero, we are slightly more conservative. */
454 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
465 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
467 fmt
= GET_RTX_FORMAT (code
);
468 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
471 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
474 else if (fmt
[i
] == 'E')
477 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
478 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
484 /* Return the CALL in X if there is one. */
487 get_call_rtx_from (rtx x
)
491 if (GET_CODE (x
) == PARALLEL
)
492 x
= XVECEXP (x
, 0, 0);
493 if (GET_CODE (x
) == SET
)
495 if (GET_CODE (x
) == CALL
&& MEM_P (XEXP (x
, 0)))
500 /* Return the value of the integer term in X, if one is apparent;
502 Only obvious integer terms are detected.
503 This is used in cse.c with the `related_value' field. */
506 get_integer_term (const_rtx x
)
508 if (GET_CODE (x
) == CONST
)
511 if (GET_CODE (x
) == MINUS
512 && CONST_INT_P (XEXP (x
, 1)))
513 return - INTVAL (XEXP (x
, 1));
514 if (GET_CODE (x
) == PLUS
515 && CONST_INT_P (XEXP (x
, 1)))
516 return INTVAL (XEXP (x
, 1));
520 /* If X is a constant, return the value sans apparent integer term;
522 Only obvious integer terms are detected. */
525 get_related_value (const_rtx x
)
527 if (GET_CODE (x
) != CONST
)
530 if (GET_CODE (x
) == PLUS
531 && CONST_INT_P (XEXP (x
, 1)))
533 else if (GET_CODE (x
) == MINUS
534 && CONST_INT_P (XEXP (x
, 1)))
539 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
540 to somewhere in the same object or object_block as SYMBOL. */
543 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
547 if (GET_CODE (symbol
) != SYMBOL_REF
)
555 if (CONSTANT_POOL_ADDRESS_P (symbol
)
556 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
559 decl
= SYMBOL_REF_DECL (symbol
);
560 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
564 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
565 && SYMBOL_REF_BLOCK (symbol
)
566 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
567 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
568 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
574 /* Split X into a base and a constant offset, storing them in *BASE_OUT
575 and *OFFSET_OUT respectively. */
578 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
580 if (GET_CODE (x
) == CONST
)
583 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
585 *base_out
= XEXP (x
, 0);
586 *offset_out
= XEXP (x
, 1);
591 *offset_out
= const0_rtx
;
594 /* Return the number of places FIND appears within X. If COUNT_DEST is
595 zero, we do not count occurrences inside the destination of a SET. */
598 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
602 const char *format_ptr
;
621 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
623 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
627 if (MEM_P (find
) && rtx_equal_p (x
, find
))
632 if (SET_DEST (x
) == find
&& ! count_dest
)
633 return count_occurrences (SET_SRC (x
), find
, count_dest
);
640 format_ptr
= GET_RTX_FORMAT (code
);
643 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
645 switch (*format_ptr
++)
648 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
652 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
653 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
661 /* Return TRUE if OP is a register or subreg of a register that
662 holds an unsigned quantity. Otherwise, return FALSE. */
665 unsigned_reg_p (rtx op
)
669 && TYPE_UNSIGNED (TREE_TYPE (REG_EXPR (op
))))
672 if (GET_CODE (op
) == SUBREG
673 && SUBREG_PROMOTED_UNSIGNED_P (op
))
680 /* Nonzero if register REG appears somewhere within IN.
681 Also works if REG is not a register; in this case it checks
682 for a subexpression of IN that is Lisp "equal" to REG. */
685 reg_mentioned_p (const_rtx reg
, const_rtx in
)
697 if (GET_CODE (in
) == LABEL_REF
)
698 return reg
== XEXP (in
, 0);
700 code
= GET_CODE (in
);
704 /* Compare registers by number. */
706 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
708 /* These codes have no constituent expressions
716 /* These are kept unique for a given value. */
723 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
726 fmt
= GET_RTX_FORMAT (code
);
728 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
733 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
734 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
737 else if (fmt
[i
] == 'e'
738 && reg_mentioned_p (reg
, XEXP (in
, i
)))
744 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
745 no CODE_LABEL insn. */
748 no_labels_between_p (const_rtx beg
, const_rtx end
)
753 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
759 /* Nonzero if register REG is used in an insn between
760 FROM_INSN and TO_INSN (exclusive of those two). */
763 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
767 if (from_insn
== to_insn
)
770 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
771 if (NONDEBUG_INSN_P (insn
)
772 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
773 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
778 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
779 is entirely replaced by a new value and the only use is as a SET_DEST,
780 we do not consider it a reference. */
783 reg_referenced_p (const_rtx x
, const_rtx body
)
787 switch (GET_CODE (body
))
790 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
793 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
794 of a REG that occupies all of the REG, the insn references X if
795 it is mentioned in the destination. */
796 if (GET_CODE (SET_DEST (body
)) != CC0
797 && GET_CODE (SET_DEST (body
)) != PC
798 && !REG_P (SET_DEST (body
))
799 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
800 && REG_P (SUBREG_REG (SET_DEST (body
)))
801 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
802 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
803 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
804 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
805 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
810 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
811 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
818 return reg_overlap_mentioned_p (x
, body
);
821 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
824 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
827 case UNSPEC_VOLATILE
:
828 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
829 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
834 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
835 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
840 if (MEM_P (XEXP (body
, 0)))
841 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
846 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
848 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
855 /* Nonzero if register REG is set or clobbered in an insn between
856 FROM_INSN and TO_INSN (exclusive of those two). */
859 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
863 if (from_insn
== to_insn
)
866 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
867 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
872 /* Internals of reg_set_between_p. */
874 reg_set_p (const_rtx reg
, const_rtx insn
)
876 /* We can be passed an insn or part of one. If we are passed an insn,
877 check if a side-effect of the insn clobbers REG. */
879 && (FIND_REG_INC_NOTE (insn
, reg
)
882 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
883 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
884 GET_MODE (reg
), REGNO (reg
)))
886 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
889 return set_of (reg
, insn
) != NULL_RTX
;
892 /* Similar to reg_set_between_p, but check all registers in X. Return 0
893 only if none of them are modified between START and END. Return 1 if
894 X contains a MEM; this routine does use memory aliasing. */
897 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
899 const enum rtx_code code
= GET_CODE (x
);
920 if (modified_between_p (XEXP (x
, 0), start
, end
))
922 if (MEM_READONLY_P (x
))
924 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
925 if (memory_modified_in_insn_p (x
, insn
))
931 return reg_set_between_p (x
, start
, end
);
937 fmt
= GET_RTX_FORMAT (code
);
938 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
940 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
943 else if (fmt
[i
] == 'E')
944 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
945 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
952 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
953 of them are modified in INSN. Return 1 if X contains a MEM; this routine
954 does use memory aliasing. */
957 modified_in_p (const_rtx x
, const_rtx insn
)
959 const enum rtx_code code
= GET_CODE (x
);
976 if (modified_in_p (XEXP (x
, 0), insn
))
978 if (MEM_READONLY_P (x
))
980 if (memory_modified_in_insn_p (x
, insn
))
986 return reg_set_p (x
, insn
);
992 fmt
= GET_RTX_FORMAT (code
);
993 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
995 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
998 else if (fmt
[i
] == 'E')
999 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1000 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
1007 /* Helper function for set_of. */
1015 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
1017 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
1018 if (rtx_equal_p (x
, data
->pat
)
1019 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
1023 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
1024 (either directly or via STRICT_LOW_PART and similar modifiers). */
1026 set_of (const_rtx pat
, const_rtx insn
)
1028 struct set_of_data data
;
1029 data
.found
= NULL_RTX
;
1031 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1035 /* This function, called through note_stores, collects sets and
1036 clobbers of hard registers in a HARD_REG_SET, which is pointed to
1039 record_hard_reg_sets (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
1041 HARD_REG_SET
*pset
= (HARD_REG_SET
*)data
;
1042 if (REG_P (x
) && HARD_REGISTER_P (x
))
1043 add_to_hard_reg_set (pset
, GET_MODE (x
), REGNO (x
));
1046 /* Examine INSN, and compute the set of hard registers written by it.
1047 Store it in *PSET. Should only be called after reload. */
1049 find_all_hard_reg_sets (const_rtx insn
, HARD_REG_SET
*pset
)
1053 CLEAR_HARD_REG_SET (*pset
);
1054 note_stores (PATTERN (insn
), record_hard_reg_sets
, pset
);
1056 IOR_HARD_REG_SET (*pset
, call_used_reg_set
);
1057 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1058 if (REG_NOTE_KIND (link
) == REG_INC
)
1059 record_hard_reg_sets (XEXP (link
, 0), NULL
, pset
);
1062 /* A for_each_rtx subroutine of record_hard_reg_uses. */
1064 record_hard_reg_uses_1 (rtx
*px
, void *data
)
1067 HARD_REG_SET
*pused
= (HARD_REG_SET
*)data
;
1069 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1071 int nregs
= hard_regno_nregs
[REGNO (x
)][GET_MODE (x
)];
1073 SET_HARD_REG_BIT (*pused
, REGNO (x
) + nregs
);
1078 /* Like record_hard_reg_sets, but called through note_uses. */
1080 record_hard_reg_uses (rtx
*px
, void *data
)
1082 for_each_rtx (px
, record_hard_reg_uses_1
, data
);
1085 /* Given an INSN, return a SET expression if this insn has only a single SET.
1086 It may also have CLOBBERs, USEs, or SET whose output
1087 will not be used, which we ignore. */
1090 single_set_2 (const_rtx insn
, const_rtx pat
)
1093 int set_verified
= 1;
1096 if (GET_CODE (pat
) == PARALLEL
)
1098 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1100 rtx sub
= XVECEXP (pat
, 0, i
);
1101 switch (GET_CODE (sub
))
1108 /* We can consider insns having multiple sets, where all
1109 but one are dead as single set insns. In common case
1110 only single set is present in the pattern so we want
1111 to avoid checking for REG_UNUSED notes unless necessary.
1113 When we reach set first time, we just expect this is
1114 the single set we are looking for and only when more
1115 sets are found in the insn, we check them. */
1118 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1119 && !side_effects_p (set
))
1125 set
= sub
, set_verified
= 0;
1126 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1127 || side_effects_p (sub
))
1139 /* Given an INSN, return nonzero if it has more than one SET, else return
1143 multiple_sets (const_rtx insn
)
1148 /* INSN must be an insn. */
1149 if (! INSN_P (insn
))
1152 /* Only a PARALLEL can have multiple SETs. */
1153 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1155 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1156 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1158 /* If we have already found a SET, then return now. */
1166 /* Either zero or one SET. */
1170 /* Return nonzero if the destination of SET equals the source
1171 and there are no side effects. */
1174 set_noop_p (const_rtx set
)
1176 rtx src
= SET_SRC (set
);
1177 rtx dst
= SET_DEST (set
);
1179 if (dst
== pc_rtx
&& src
== pc_rtx
)
1182 if (MEM_P (dst
) && MEM_P (src
))
1183 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1185 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1186 return rtx_equal_p (XEXP (dst
, 0), src
)
1187 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1188 && !side_effects_p (src
);
1190 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1191 dst
= XEXP (dst
, 0);
1193 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1195 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1197 src
= SUBREG_REG (src
);
1198 dst
= SUBREG_REG (dst
);
1201 return (REG_P (src
) && REG_P (dst
)
1202 && REGNO (src
) == REGNO (dst
));
1205 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1209 noop_move_p (const_rtx insn
)
1211 rtx pat
= PATTERN (insn
);
1213 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1216 /* Insns carrying these notes are useful later on. */
1217 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1220 /* Check the code to be executed for COND_EXEC. */
1221 if (GET_CODE (pat
) == COND_EXEC
)
1222 pat
= COND_EXEC_CODE (pat
);
1224 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1227 if (GET_CODE (pat
) == PARALLEL
)
1230 /* If nothing but SETs of registers to themselves,
1231 this insn can also be deleted. */
1232 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1234 rtx tem
= XVECEXP (pat
, 0, i
);
1236 if (GET_CODE (tem
) == USE
1237 || GET_CODE (tem
) == CLOBBER
)
1240 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1250 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1251 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1252 If the object was modified, if we hit a partial assignment to X, or hit a
1253 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1254 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1258 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1262 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1266 rtx set
= single_set (p
);
1267 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1269 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1271 rtx src
= SET_SRC (set
);
1273 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1274 src
= XEXP (note
, 0);
1276 if ((valid_to
== NULL_RTX
1277 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1278 /* Reject hard registers because we don't usually want
1279 to use them; we'd rather use a pseudo. */
1281 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1288 /* If set in non-simple way, we don't have a value. */
1289 if (reg_set_p (x
, p
))
1296 /* Return nonzero if register in range [REGNO, ENDREGNO)
1297 appears either explicitly or implicitly in X
1298 other than being stored into.
1300 References contained within the substructure at LOC do not count.
1301 LOC may be zero, meaning don't ignore anything. */
1304 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1308 unsigned int x_regno
;
1313 /* The contents of a REG_NONNEG note is always zero, so we must come here
1314 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1318 code
= GET_CODE (x
);
1323 x_regno
= REGNO (x
);
1325 /* If we modifying the stack, frame, or argument pointer, it will
1326 clobber a virtual register. In fact, we could be more precise,
1327 but it isn't worth it. */
1328 if ((x_regno
== STACK_POINTER_REGNUM
1329 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1330 || x_regno
== ARG_POINTER_REGNUM
1332 || x_regno
== FRAME_POINTER_REGNUM
)
1333 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1336 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1339 /* If this is a SUBREG of a hard reg, we can see exactly which
1340 registers are being modified. Otherwise, handle normally. */
1341 if (REG_P (SUBREG_REG (x
))
1342 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1344 unsigned int inner_regno
= subreg_regno (x
);
1345 unsigned int inner_endregno
1346 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1347 ? subreg_nregs (x
) : 1);
1349 return endregno
> inner_regno
&& regno
< inner_endregno
;
1355 if (&SET_DEST (x
) != loc
1356 /* Note setting a SUBREG counts as referring to the REG it is in for
1357 a pseudo but not for hard registers since we can
1358 treat each word individually. */
1359 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1360 && loc
!= &SUBREG_REG (SET_DEST (x
))
1361 && REG_P (SUBREG_REG (SET_DEST (x
)))
1362 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1363 && refers_to_regno_p (regno
, endregno
,
1364 SUBREG_REG (SET_DEST (x
)), loc
))
1365 || (!REG_P (SET_DEST (x
))
1366 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1369 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1378 /* X does not match, so try its subexpressions. */
1380 fmt
= GET_RTX_FORMAT (code
);
1381 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1383 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1391 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1394 else if (fmt
[i
] == 'E')
1397 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1398 if (loc
!= &XVECEXP (x
, i
, j
)
1399 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1406 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1407 we check if any register number in X conflicts with the relevant register
1408 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1409 contains a MEM (we don't bother checking for memory addresses that can't
1410 conflict because we expect this to be a rare case. */
1413 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1415 unsigned int regno
, endregno
;
1417 /* If either argument is a constant, then modifying X can not
1418 affect IN. Here we look at IN, we can profitably combine
1419 CONSTANT_P (x) with the switch statement below. */
1420 if (CONSTANT_P (in
))
1424 switch (GET_CODE (x
))
1426 case STRICT_LOW_PART
:
1429 /* Overly conservative. */
1434 regno
= REGNO (SUBREG_REG (x
));
1435 if (regno
< FIRST_PSEUDO_REGISTER
)
1436 regno
= subreg_regno (x
);
1437 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1438 ? subreg_nregs (x
) : 1);
1443 endregno
= END_REGNO (x
);
1445 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1455 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1456 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1459 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1462 else if (fmt
[i
] == 'E')
1465 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1466 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1476 return reg_mentioned_p (x
, in
);
1482 /* If any register in here refers to it we return true. */
1483 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1484 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1485 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1491 gcc_assert (CONSTANT_P (x
));
1496 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1497 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1498 ignored by note_stores, but passed to FUN.
1500 FUN receives three arguments:
1501 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1502 2. the SET or CLOBBER rtx that does the store,
1503 3. the pointer DATA provided to note_stores.
1505 If the item being stored in or clobbered is a SUBREG of a hard register,
1506 the SUBREG will be passed. */
1509 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1513 if (GET_CODE (x
) == COND_EXEC
)
1514 x
= COND_EXEC_CODE (x
);
1516 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1518 rtx dest
= SET_DEST (x
);
1520 while ((GET_CODE (dest
) == SUBREG
1521 && (!REG_P (SUBREG_REG (dest
))
1522 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1523 || GET_CODE (dest
) == ZERO_EXTRACT
1524 || GET_CODE (dest
) == STRICT_LOW_PART
)
1525 dest
= XEXP (dest
, 0);
1527 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1528 each of whose first operand is a register. */
1529 if (GET_CODE (dest
) == PARALLEL
)
1531 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1532 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1533 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1536 (*fun
) (dest
, x
, data
);
1539 else if (GET_CODE (x
) == PARALLEL
)
1540 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1541 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1544 /* Like notes_stores, but call FUN for each expression that is being
1545 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1546 FUN for each expression, not any interior subexpressions. FUN receives a
1547 pointer to the expression and the DATA passed to this function.
1549 Note that this is not quite the same test as that done in reg_referenced_p
1550 since that considers something as being referenced if it is being
1551 partially set, while we do not. */
1554 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1559 switch (GET_CODE (body
))
1562 (*fun
) (&COND_EXEC_TEST (body
), data
);
1563 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1567 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1568 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1572 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1573 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1577 (*fun
) (&XEXP (body
, 0), data
);
1581 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1582 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1586 (*fun
) (&TRAP_CONDITION (body
), data
);
1590 (*fun
) (&XEXP (body
, 0), data
);
1594 case UNSPEC_VOLATILE
:
1595 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1596 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1600 if (MEM_P (XEXP (body
, 0)))
1601 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1606 rtx dest
= SET_DEST (body
);
1608 /* For sets we replace everything in source plus registers in memory
1609 expression in store and operands of a ZERO_EXTRACT. */
1610 (*fun
) (&SET_SRC (body
), data
);
1612 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1614 (*fun
) (&XEXP (dest
, 1), data
);
1615 (*fun
) (&XEXP (dest
, 2), data
);
1618 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1619 dest
= XEXP (dest
, 0);
1622 (*fun
) (&XEXP (dest
, 0), data
);
1627 /* All the other possibilities never store. */
1628 (*fun
) (pbody
, data
);
1633 /* Return nonzero if X's old contents don't survive after INSN.
1634 This will be true if X is (cc0) or if X is a register and
1635 X dies in INSN or because INSN entirely sets X.
1637 "Entirely set" means set directly and not through a SUBREG, or
1638 ZERO_EXTRACT, so no trace of the old contents remains.
1639 Likewise, REG_INC does not count.
1641 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1642 but for this use that makes no difference, since regs don't overlap
1643 during their lifetimes. Therefore, this function may be used
1644 at any time after deaths have been computed.
1646 If REG is a hard reg that occupies multiple machine registers, this
1647 function will only return 1 if each of those registers will be replaced
1651 dead_or_set_p (const_rtx insn
, const_rtx x
)
1653 unsigned int regno
, end_regno
;
1656 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1657 if (GET_CODE (x
) == CC0
)
1660 gcc_assert (REG_P (x
));
1663 end_regno
= END_REGNO (x
);
1664 for (i
= regno
; i
< end_regno
; i
++)
1665 if (! dead_or_set_regno_p (insn
, i
))
1671 /* Return TRUE iff DEST is a register or subreg of a register and
1672 doesn't change the number of words of the inner register, and any
1673 part of the register is TEST_REGNO. */
1676 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1678 unsigned int regno
, endregno
;
1680 if (GET_CODE (dest
) == SUBREG
1681 && (((GET_MODE_SIZE (GET_MODE (dest
))
1682 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1683 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1684 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1685 dest
= SUBREG_REG (dest
);
1690 regno
= REGNO (dest
);
1691 endregno
= END_REGNO (dest
);
1692 return (test_regno
>= regno
&& test_regno
< endregno
);
1695 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1696 any member matches the covers_regno_no_parallel_p criteria. */
1699 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1701 if (GET_CODE (dest
) == PARALLEL
)
1703 /* Some targets place small structures in registers for return
1704 values of functions, and those registers are wrapped in
1705 PARALLELs that we may see as the destination of a SET. */
1708 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1710 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1711 if (inner
!= NULL_RTX
1712 && covers_regno_no_parallel_p (inner
, test_regno
))
1719 return covers_regno_no_parallel_p (dest
, test_regno
);
1722 /* Utility function for dead_or_set_p to check an individual register. */
1725 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1729 /* See if there is a death note for something that includes TEST_REGNO. */
1730 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1734 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1737 pattern
= PATTERN (insn
);
1739 /* If a COND_EXEC is not executed, the value survives. */
1740 if (GET_CODE (pattern
) == COND_EXEC
)
1743 if (GET_CODE (pattern
) == SET
)
1744 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1745 else if (GET_CODE (pattern
) == PARALLEL
)
1749 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1751 rtx body
= XVECEXP (pattern
, 0, i
);
1753 if (GET_CODE (body
) == COND_EXEC
)
1754 body
= COND_EXEC_CODE (body
);
1756 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1757 && covers_regno_p (SET_DEST (body
), test_regno
))
1765 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1766 If DATUM is nonzero, look for one whose datum is DATUM. */
1769 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1773 gcc_checking_assert (insn
);
1775 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1776 if (! INSN_P (insn
))
1780 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1781 if (REG_NOTE_KIND (link
) == kind
)
1786 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1787 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1792 /* Return the reg-note of kind KIND in insn INSN which applies to register
1793 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1794 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1795 it might be the case that the note overlaps REGNO. */
1798 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1802 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1803 if (! INSN_P (insn
))
1806 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1807 if (REG_NOTE_KIND (link
) == kind
1808 /* Verify that it is a register, so that scratch and MEM won't cause a
1810 && REG_P (XEXP (link
, 0))
1811 && REGNO (XEXP (link
, 0)) <= regno
1812 && END_REGNO (XEXP (link
, 0)) > regno
)
1817 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1821 find_reg_equal_equiv_note (const_rtx insn
)
1828 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1829 if (REG_NOTE_KIND (link
) == REG_EQUAL
1830 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1832 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1833 insns that have multiple sets. Checking single_set to
1834 make sure of this is not the proper check, as explained
1835 in the comment in set_unique_reg_note.
1837 This should be changed into an assert. */
1838 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1845 /* Check whether INSN is a single_set whose source is known to be
1846 equivalent to a constant. Return that constant if so, otherwise
1850 find_constant_src (const_rtx insn
)
1854 set
= single_set (insn
);
1857 x
= avoid_constant_pool_reference (SET_SRC (set
));
1862 note
= find_reg_equal_equiv_note (insn
);
1863 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1864 return XEXP (note
, 0);
1869 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1870 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1873 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1875 /* If it's not a CALL_INSN, it can't possibly have a
1876 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1886 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1888 link
= XEXP (link
, 1))
1889 if (GET_CODE (XEXP (link
, 0)) == code
1890 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1895 unsigned int regno
= REGNO (datum
);
1897 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1898 to pseudo registers, so don't bother checking. */
1900 if (regno
< FIRST_PSEUDO_REGISTER
)
1902 unsigned int end_regno
= END_HARD_REGNO (datum
);
1905 for (i
= regno
; i
< end_regno
; i
++)
1906 if (find_regno_fusage (insn
, code
, i
))
1914 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1915 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1918 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1922 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1923 to pseudo registers, so don't bother checking. */
1925 if (regno
>= FIRST_PSEUDO_REGISTER
1929 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1933 if (GET_CODE (op
= XEXP (link
, 0)) == code
1934 && REG_P (reg
= XEXP (op
, 0))
1935 && REGNO (reg
) <= regno
1936 && END_HARD_REGNO (reg
) > regno
)
1944 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1945 stored as the pointer to the next register note. */
1948 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1956 case REG_LABEL_TARGET
:
1957 case REG_LABEL_OPERAND
:
1959 /* These types of register notes use an INSN_LIST rather than an
1960 EXPR_LIST, so that copying is done right and dumps look
1962 note
= alloc_INSN_LIST (datum
, list
);
1963 PUT_REG_NOTE_KIND (note
, kind
);
1967 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1974 /* Add register note with kind KIND and datum DATUM to INSN. */
1977 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1979 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1982 /* Remove register note NOTE from the REG_NOTES of INSN. */
1985 remove_note (rtx insn
, const_rtx note
)
1989 if (note
== NULL_RTX
)
1992 if (REG_NOTES (insn
) == note
)
1993 REG_NOTES (insn
) = XEXP (note
, 1);
1995 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1996 if (XEXP (link
, 1) == note
)
1998 XEXP (link
, 1) = XEXP (note
, 1);
2002 switch (REG_NOTE_KIND (note
))
2006 df_notes_rescan (insn
);
2013 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
2016 remove_reg_equal_equiv_notes (rtx insn
)
2020 loc
= ®_NOTES (insn
);
2023 enum reg_note kind
= REG_NOTE_KIND (*loc
);
2024 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
2025 *loc
= XEXP (*loc
, 1);
2027 loc
= &XEXP (*loc
, 1);
2031 /* Remove all REG_EQUAL and REG_EQUIV notes referring to REGNO. */
2034 remove_reg_equal_equiv_notes_for_regno (unsigned int regno
)
2041 /* This loop is a little tricky. We cannot just go down the chain because
2042 it is being modified by some actions in the loop. So we just iterate
2043 over the head. We plan to drain the list anyway. */
2044 while ((eq_use
= DF_REG_EQ_USE_CHAIN (regno
)) != NULL
)
2046 rtx insn
= DF_REF_INSN (eq_use
);
2047 rtx note
= find_reg_equal_equiv_note (insn
);
2049 /* This assert is generally triggered when someone deletes a REG_EQUAL
2050 or REG_EQUIV note by hacking the list manually rather than calling
2054 remove_note (insn
, note
);
2058 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2059 return 1 if it is found. A simple equality test is used to determine if
2063 in_expr_list_p (const_rtx listp
, const_rtx node
)
2067 for (x
= listp
; x
; x
= XEXP (x
, 1))
2068 if (node
== XEXP (x
, 0))
2074 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2075 remove that entry from the list if it is found.
2077 A simple equality test is used to determine if NODE matches. */
2080 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
2083 rtx prev
= NULL_RTX
;
2087 if (node
== XEXP (temp
, 0))
2089 /* Splice the node out of the list. */
2091 XEXP (prev
, 1) = XEXP (temp
, 1);
2093 *listp
= XEXP (temp
, 1);
2099 temp
= XEXP (temp
, 1);
2103 /* Nonzero if X contains any volatile instructions. These are instructions
2104 which may cause unpredictable machine state instructions, and thus no
2105 instructions or register uses should be moved or combined across them.
2106 This includes only volatile asms and UNSPEC_VOLATILE instructions. */
2109 volatile_insn_p (const_rtx x
)
2111 const RTX_CODE code
= GET_CODE (x
);
2129 case UNSPEC_VOLATILE
:
2134 if (MEM_VOLATILE_P (x
))
2141 /* Recursively scan the operands of this expression. */
2144 const char *const fmt
= GET_RTX_FORMAT (code
);
2147 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2151 if (volatile_insn_p (XEXP (x
, i
)))
2154 else if (fmt
[i
] == 'E')
2157 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2158 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2166 /* Nonzero if X contains any volatile memory references
2167 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2170 volatile_refs_p (const_rtx x
)
2172 const RTX_CODE code
= GET_CODE (x
);
2188 case UNSPEC_VOLATILE
:
2194 if (MEM_VOLATILE_P (x
))
2201 /* Recursively scan the operands of this expression. */
2204 const char *const fmt
= GET_RTX_FORMAT (code
);
2207 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2211 if (volatile_refs_p (XEXP (x
, i
)))
2214 else if (fmt
[i
] == 'E')
2217 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2218 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2226 /* Similar to above, except that it also rejects register pre- and post-
2230 side_effects_p (const_rtx x
)
2232 const RTX_CODE code
= GET_CODE (x
);
2249 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2250 when some combination can't be done. If we see one, don't think
2251 that we can simplify the expression. */
2252 return (GET_MODE (x
) != VOIDmode
);
2261 case UNSPEC_VOLATILE
:
2267 if (MEM_VOLATILE_P (x
))
2274 /* Recursively scan the operands of this expression. */
2277 const char *fmt
= GET_RTX_FORMAT (code
);
2280 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2284 if (side_effects_p (XEXP (x
, i
)))
2287 else if (fmt
[i
] == 'E')
2290 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2291 if (side_effects_p (XVECEXP (x
, i
, j
)))
2299 /* Return nonzero if evaluating rtx X might cause a trap.
2300 FLAGS controls how to consider MEMs. A nonzero means the context
2301 of the access may have changed from the original, such that the
2302 address may have become invalid. */
2305 may_trap_p_1 (const_rtx x
, unsigned flags
)
2311 /* We make no distinction currently, but this function is part of
2312 the internal target-hooks ABI so we keep the parameter as
2313 "unsigned flags". */
2314 bool code_changed
= flags
!= 0;
2318 code
= GET_CODE (x
);
2321 /* Handle these cases quickly. */
2333 return targetm
.unspec_may_trap_p (x
, flags
);
2335 case UNSPEC_VOLATILE
:
2341 return MEM_VOLATILE_P (x
);
2343 /* Memory ref can trap unless it's a static var or a stack slot. */
2345 /* Recognize specific pattern of stack checking probes. */
2346 if (flag_stack_check
2347 && MEM_VOLATILE_P (x
)
2348 && XEXP (x
, 0) == stack_pointer_rtx
)
2350 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2351 reference; moving it out of context such as when moving code
2352 when optimizing, might cause its address to become invalid. */
2354 || !MEM_NOTRAP_P (x
))
2356 HOST_WIDE_INT size
= MEM_SIZE_KNOWN_P (x
) ? MEM_SIZE (x
) : 0;
2357 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2358 GET_MODE (x
), code_changed
);
2363 /* Division by a non-constant might trap. */
2368 if (HONOR_SNANS (GET_MODE (x
)))
2370 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2371 return flag_trapping_math
;
2372 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2377 /* An EXPR_LIST is used to represent a function call. This
2378 certainly may trap. */
2387 /* Some floating point comparisons may trap. */
2388 if (!flag_trapping_math
)
2390 /* ??? There is no machine independent way to check for tests that trap
2391 when COMPARE is used, though many targets do make this distinction.
2392 For instance, sparc uses CCFPE for compares which generate exceptions
2393 and CCFP for compares which do not generate exceptions. */
2394 if (HONOR_NANS (GET_MODE (x
)))
2396 /* But often the compare has some CC mode, so check operand
2398 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2399 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2405 if (HONOR_SNANS (GET_MODE (x
)))
2407 /* Often comparison is CC mode, so check operand modes. */
2408 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2409 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2414 /* Conversion of floating point might trap. */
2415 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2422 /* These operations don't trap even with floating point. */
2426 /* Any floating arithmetic may trap. */
2427 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)) && flag_trapping_math
)
2431 fmt
= GET_RTX_FORMAT (code
);
2432 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2436 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2439 else if (fmt
[i
] == 'E')
2442 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2443 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2450 /* Return nonzero if evaluating rtx X might cause a trap. */
2453 may_trap_p (const_rtx x
)
2455 return may_trap_p_1 (x
, 0);
2458 /* Same as above, but additionally return nonzero if evaluating rtx X might
2459 cause a fault. We define a fault for the purpose of this function as a
2460 erroneous execution condition that cannot be encountered during the normal
2461 execution of a valid program; the typical example is an unaligned memory
2462 access on a strict alignment machine. The compiler guarantees that it
2463 doesn't generate code that will fault from a valid program, but this
2464 guarantee doesn't mean anything for individual instructions. Consider
2465 the following example:
2467 struct S { int d; union { char *cp; int *ip; }; };
2469 int foo(struct S *s)
2477 on a strict alignment machine. In a valid program, foo will never be
2478 invoked on a structure for which d is equal to 1 and the underlying
2479 unique field of the union not aligned on a 4-byte boundary, but the
2480 expression *s->ip might cause a fault if considered individually.
2482 At the RTL level, potentially problematic expressions will almost always
2483 verify may_trap_p; for example, the above dereference can be emitted as
2484 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2485 However, suppose that foo is inlined in a caller that causes s->cp to
2486 point to a local character variable and guarantees that s->d is not set
2487 to 1; foo may have been effectively translated into pseudo-RTL as:
2490 (set (reg:SI) (mem:SI (%fp - 7)))
2492 (set (reg:QI) (mem:QI (%fp - 7)))
2494 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2495 memory reference to a stack slot, but it will certainly cause a fault
2496 on a strict alignment machine. */
2499 may_trap_or_fault_p (const_rtx x
)
2501 return may_trap_p_1 (x
, 1);
2504 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2505 i.e., an inequality. */
2508 inequality_comparisons_p (const_rtx x
)
2512 const enum rtx_code code
= GET_CODE (x
);
2540 len
= GET_RTX_LENGTH (code
);
2541 fmt
= GET_RTX_FORMAT (code
);
2543 for (i
= 0; i
< len
; i
++)
2547 if (inequality_comparisons_p (XEXP (x
, i
)))
2550 else if (fmt
[i
] == 'E')
2553 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2554 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2562 /* Replace any occurrence of FROM in X with TO. The function does
2563 not enter into CONST_DOUBLE for the replace.
2565 Note that copying is not done so X must not be shared unless all copies
2566 are to be modified. */
2569 replace_rtx (rtx x
, rtx from
, rtx to
)
2577 /* Allow this function to make replacements in EXPR_LISTs. */
2581 if (GET_CODE (x
) == SUBREG
)
2583 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2585 if (CONST_INT_P (new_rtx
))
2587 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2588 GET_MODE (SUBREG_REG (x
)),
2593 SUBREG_REG (x
) = new_rtx
;
2597 else if (GET_CODE (x
) == ZERO_EXTEND
)
2599 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2601 if (CONST_INT_P (new_rtx
))
2603 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2604 new_rtx
, GET_MODE (XEXP (x
, 0)));
2608 XEXP (x
, 0) = new_rtx
;
2613 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2614 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2617 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2618 else if (fmt
[i
] == 'E')
2619 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2620 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2626 /* Replace occurrences of the old label in *X with the new one.
2627 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2630 replace_label (rtx
*x
, void *data
)
2633 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2634 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2635 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2640 if (GET_CODE (l
) == SYMBOL_REF
2641 && CONSTANT_POOL_ADDRESS_P (l
))
2643 rtx c
= get_pool_constant (l
);
2644 if (rtx_referenced_p (old_label
, c
))
2647 replace_label_data
*d
= (replace_label_data
*) data
;
2649 /* Create a copy of constant C; replace the label inside
2650 but do not update LABEL_NUSES because uses in constant pool
2652 new_c
= copy_rtx (c
);
2653 d
->update_label_nuses
= false;
2654 for_each_rtx (&new_c
, replace_label
, data
);
2655 d
->update_label_nuses
= update_label_nuses
;
2657 /* Add the new constant NEW_C to constant pool and replace
2658 the old reference to constant by new reference. */
2659 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2660 *x
= replace_rtx (l
, l
, new_l
);
2665 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2666 field. This is not handled by for_each_rtx because it doesn't
2667 handle unprinted ('0') fields. */
2668 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2669 JUMP_LABEL (l
) = new_label
;
2671 if ((GET_CODE (l
) == LABEL_REF
2672 || GET_CODE (l
) == INSN_LIST
)
2673 && XEXP (l
, 0) == old_label
)
2675 XEXP (l
, 0) = new_label
;
2676 if (update_label_nuses
)
2678 ++LABEL_NUSES (new_label
);
2679 --LABEL_NUSES (old_label
);
2687 /* When *BODY is equal to X or X is directly referenced by *BODY
2688 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2689 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2692 rtx_referenced_p_1 (rtx
*body
, void *x
)
2696 if (*body
== NULL_RTX
)
2697 return y
== NULL_RTX
;
2699 /* Return true if a label_ref *BODY refers to label Y. */
2700 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2701 return XEXP (*body
, 0) == y
;
2703 /* If *BODY is a reference to pool constant traverse the constant. */
2704 if (GET_CODE (*body
) == SYMBOL_REF
2705 && CONSTANT_POOL_ADDRESS_P (*body
))
2706 return rtx_referenced_p (y
, get_pool_constant (*body
));
2708 /* By default, compare the RTL expressions. */
2709 return rtx_equal_p (*body
, y
);
2712 /* Return true if X is referenced in BODY. */
2715 rtx_referenced_p (rtx x
, rtx body
)
2717 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2720 /* If INSN is a tablejump return true and store the label (before jump table) to
2721 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2724 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2731 label
= JUMP_LABEL (insn
);
2732 if (label
!= NULL_RTX
&& !ANY_RETURN_P (label
)
2733 && (table
= next_active_insn (label
)) != NULL_RTX
2734 && JUMP_TABLE_DATA_P (table
))
2745 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2746 constant that is not in the constant pool and not in the condition
2747 of an IF_THEN_ELSE. */
2750 computed_jump_p_1 (const_rtx x
)
2752 const enum rtx_code code
= GET_CODE (x
);
2769 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2770 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2773 return (computed_jump_p_1 (XEXP (x
, 1))
2774 || computed_jump_p_1 (XEXP (x
, 2)));
2780 fmt
= GET_RTX_FORMAT (code
);
2781 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2784 && computed_jump_p_1 (XEXP (x
, i
)))
2787 else if (fmt
[i
] == 'E')
2788 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2789 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2796 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2798 Tablejumps and casesi insns are not considered indirect jumps;
2799 we can recognize them by a (use (label_ref)). */
2802 computed_jump_p (const_rtx insn
)
2807 rtx pat
= PATTERN (insn
);
2809 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2810 if (JUMP_LABEL (insn
) != NULL
)
2813 if (GET_CODE (pat
) == PARALLEL
)
2815 int len
= XVECLEN (pat
, 0);
2816 int has_use_labelref
= 0;
2818 for (i
= len
- 1; i
>= 0; i
--)
2819 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2820 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2822 has_use_labelref
= 1;
2824 if (! has_use_labelref
)
2825 for (i
= len
- 1; i
>= 0; i
--)
2826 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2827 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2828 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2831 else if (GET_CODE (pat
) == SET
2832 && SET_DEST (pat
) == pc_rtx
2833 && computed_jump_p_1 (SET_SRC (pat
)))
2839 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2840 calls. Processes the subexpressions of EXP and passes them to F. */
2842 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2845 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2848 for (; format
[n
] != '\0'; n
++)
2855 result
= (*f
) (x
, data
);
2857 /* Do not traverse sub-expressions. */
2859 else if (result
!= 0)
2860 /* Stop the traversal. */
2864 /* There are no sub-expressions. */
2867 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2870 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2878 if (XVEC (exp
, n
) == 0)
2880 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2883 x
= &XVECEXP (exp
, n
, j
);
2884 result
= (*f
) (x
, data
);
2886 /* Do not traverse sub-expressions. */
2888 else if (result
!= 0)
2889 /* Stop the traversal. */
2893 /* There are no sub-expressions. */
2896 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2899 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2907 /* Nothing to do. */
2915 /* Traverse X via depth-first search, calling F for each
2916 sub-expression (including X itself). F is also passed the DATA.
2917 If F returns -1, do not traverse sub-expressions, but continue
2918 traversing the rest of the tree. If F ever returns any other
2919 nonzero value, stop the traversal, and return the value returned
2920 by F. Otherwise, return 0. This function does not traverse inside
2921 tree structure that contains RTX_EXPRs, or into sub-expressions
2922 whose format code is `0' since it is not known whether or not those
2923 codes are actually RTL.
2925 This routine is very general, and could (should?) be used to
2926 implement many of the other routines in this file. */
2929 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2935 result
= (*f
) (x
, data
);
2937 /* Do not traverse sub-expressions. */
2939 else if (result
!= 0)
2940 /* Stop the traversal. */
2944 /* There are no sub-expressions. */
2947 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2951 return for_each_rtx_1 (*x
, i
, f
, data
);
2956 /* Data structure that holds the internal state communicated between
2957 for_each_inc_dec, for_each_inc_dec_find_mem and
2958 for_each_inc_dec_find_inc_dec. */
2960 struct for_each_inc_dec_ops
{
2961 /* The function to be called for each autoinc operation found. */
2962 for_each_inc_dec_fn fn
;
2963 /* The opaque argument to be passed to it. */
2965 /* The MEM we're visiting, if any. */
2969 static int for_each_inc_dec_find_mem (rtx
*r
, void *d
);
2971 /* Find PRE/POST-INC/DEC/MODIFY operations within *R, extract the
2972 operands of the equivalent add insn and pass the result to the
2973 operator specified by *D. */
2976 for_each_inc_dec_find_inc_dec (rtx
*r
, void *d
)
2979 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*)d
;
2981 switch (GET_CODE (x
))
2986 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
2987 rtx r1
= XEXP (x
, 0);
2988 rtx c
= gen_int_mode (size
, GET_MODE (r1
));
2989 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
2995 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
2996 rtx r1
= XEXP (x
, 0);
2997 rtx c
= gen_int_mode (-size
, GET_MODE (r1
));
2998 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
3004 rtx r1
= XEXP (x
, 0);
3005 rtx add
= XEXP (x
, 1);
3006 return data
->fn (data
->mem
, x
, r1
, add
, NULL
, data
->arg
);
3011 rtx save
= data
->mem
;
3012 int ret
= for_each_inc_dec_find_mem (r
, d
);
3022 /* If *R is a MEM, find PRE/POST-INC/DEC/MODIFY operations within its
3023 address, extract the operands of the equivalent add insn and pass
3024 the result to the operator specified by *D. */
3027 for_each_inc_dec_find_mem (rtx
*r
, void *d
)
3030 if (x
!= NULL_RTX
&& MEM_P (x
))
3032 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*) d
;
3037 result
= for_each_rtx (&XEXP (x
, 0), for_each_inc_dec_find_inc_dec
,
3047 /* Traverse *X looking for MEMs, and for autoinc operations within
3048 them. For each such autoinc operation found, call FN, passing it
3049 the innermost enclosing MEM, the operation itself, the RTX modified
3050 by the operation, two RTXs (the second may be NULL) that, once
3051 added, represent the value to be held by the modified RTX
3052 afterwards, and ARG. FN is to return -1 to skip looking for other
3053 autoinc operations within the visited operation, 0 to continue the
3054 traversal, or any other value to have it returned to the caller of
3055 for_each_inc_dec. */
3058 for_each_inc_dec (rtx
*x
,
3059 for_each_inc_dec_fn fn
,
3062 struct for_each_inc_dec_ops data
;
3068 return for_each_rtx (x
, for_each_inc_dec_find_mem
, &data
);
3072 /* Searches X for any reference to REGNO, returning the rtx of the
3073 reference found if any. Otherwise, returns NULL_RTX. */
3076 regno_use_in (unsigned int regno
, rtx x
)
3082 if (REG_P (x
) && REGNO (x
) == regno
)
3085 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
3086 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
3090 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
3093 else if (fmt
[i
] == 'E')
3094 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3095 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
3102 /* Return a value indicating whether OP, an operand of a commutative
3103 operation, is preferred as the first or second operand. The higher
3104 the value, the stronger the preference for being the first operand.
3105 We use negative values to indicate a preference for the first operand
3106 and positive values for the second operand. */
3109 commutative_operand_precedence (rtx op
)
3111 enum rtx_code code
= GET_CODE (op
);
3113 /* Constants always come the second operand. Prefer "nice" constants. */
3114 if (code
== CONST_INT
)
3116 if (code
== CONST_DOUBLE
)
3118 if (code
== CONST_FIXED
)
3120 op
= avoid_constant_pool_reference (op
);
3121 code
= GET_CODE (op
);
3123 switch (GET_RTX_CLASS (code
))
3126 if (code
== CONST_INT
)
3128 if (code
== CONST_DOUBLE
)
3130 if (code
== CONST_FIXED
)
3135 /* SUBREGs of objects should come second. */
3136 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
3141 /* Complex expressions should be the first, so decrease priority
3142 of objects. Prefer pointer objects over non pointer objects. */
3143 if ((REG_P (op
) && REG_POINTER (op
))
3144 || (MEM_P (op
) && MEM_POINTER (op
)))
3148 case RTX_COMM_ARITH
:
3149 /* Prefer operands that are themselves commutative to be first.
3150 This helps to make things linear. In particular,
3151 (and (and (reg) (reg)) (not (reg))) is canonical. */
3155 /* If only one operand is a binary expression, it will be the first
3156 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
3157 is canonical, although it will usually be further simplified. */
3161 /* Then prefer NEG and NOT. */
3162 if (code
== NEG
|| code
== NOT
)
3170 /* Return 1 iff it is necessary to swap operands of commutative operation
3171 in order to canonicalize expression. */
3174 swap_commutative_operands_p (rtx x
, rtx y
)
3176 return (commutative_operand_precedence (x
)
3177 < commutative_operand_precedence (y
));
3180 /* Return 1 if X is an autoincrement side effect and the register is
3181 not the stack pointer. */
3183 auto_inc_p (const_rtx x
)
3185 switch (GET_CODE (x
))
3193 /* There are no REG_INC notes for SP. */
3194 if (XEXP (x
, 0) != stack_pointer_rtx
)
3202 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3204 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3213 code
= GET_CODE (in
);
3214 fmt
= GET_RTX_FORMAT (code
);
3215 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3219 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3222 else if (fmt
[i
] == 'E')
3223 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3224 if (loc
== &XVECEXP (in
, i
, j
)
3225 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3231 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3232 and SUBREG_BYTE, return the bit offset where the subreg begins
3233 (counting from the least significant bit of the operand). */
3236 subreg_lsb_1 (enum machine_mode outer_mode
,
3237 enum machine_mode inner_mode
,
3238 unsigned int subreg_byte
)
3240 unsigned int bitpos
;
3244 /* A paradoxical subreg begins at bit position 0. */
3245 if (GET_MODE_PRECISION (outer_mode
) > GET_MODE_PRECISION (inner_mode
))
3248 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3249 /* If the subreg crosses a word boundary ensure that
3250 it also begins and ends on a word boundary. */
3251 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3252 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3253 && (subreg_byte
% UNITS_PER_WORD
3254 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3256 if (WORDS_BIG_ENDIAN
)
3257 word
= (GET_MODE_SIZE (inner_mode
)
3258 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3260 word
= subreg_byte
/ UNITS_PER_WORD
;
3261 bitpos
= word
* BITS_PER_WORD
;
3263 if (BYTES_BIG_ENDIAN
)
3264 byte
= (GET_MODE_SIZE (inner_mode
)
3265 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3267 byte
= subreg_byte
% UNITS_PER_WORD
;
3268 bitpos
+= byte
* BITS_PER_UNIT
;
3273 /* Given a subreg X, return the bit offset where the subreg begins
3274 (counting from the least significant bit of the reg). */
3277 subreg_lsb (const_rtx x
)
3279 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3283 /* Fill in information about a subreg of a hard register.
3284 xregno - A regno of an inner hard subreg_reg (or what will become one).
3285 xmode - The mode of xregno.
3286 offset - The byte offset.
3287 ymode - The mode of a top level SUBREG (or what may become one).
3288 info - Pointer to structure to fill in. */
3290 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3291 unsigned int offset
, enum machine_mode ymode
,
3292 struct subreg_info
*info
)
3294 int nregs_xmode
, nregs_ymode
;
3295 int mode_multiple
, nregs_multiple
;
3296 int offset_adj
, y_offset
, y_offset_adj
;
3297 int regsize_xmode
, regsize_ymode
;
3300 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3304 /* If there are holes in a non-scalar mode in registers, we expect
3305 that it is made up of its units concatenated together. */
3306 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3308 enum machine_mode xmode_unit
;
3310 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3311 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3314 xmode_unit
= GET_MODE_INNER (xmode
);
3315 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3316 gcc_assert (nregs_xmode
3317 == (GET_MODE_NUNITS (xmode
)
3318 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3319 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3320 == (hard_regno_nregs
[xregno
][xmode_unit
]
3321 * GET_MODE_NUNITS (xmode
)));
3323 /* You can only ask for a SUBREG of a value with holes in the middle
3324 if you don't cross the holes. (Such a SUBREG should be done by
3325 picking a different register class, or doing it in memory if
3326 necessary.) An example of a value with holes is XCmode on 32-bit
3327 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3328 3 for each part, but in memory it's two 128-bit parts.
3329 Padding is assumed to be at the end (not necessarily the 'high part')
3331 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3332 < GET_MODE_NUNITS (xmode
))
3333 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3334 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3335 / GET_MODE_SIZE (xmode_unit
))))
3337 info
->representable_p
= false;
3342 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3344 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3346 /* Paradoxical subregs are otherwise valid. */
3349 && GET_MODE_PRECISION (ymode
) > GET_MODE_PRECISION (xmode
))
3351 info
->representable_p
= true;
3352 /* If this is a big endian paradoxical subreg, which uses more
3353 actual hard registers than the original register, we must
3354 return a negative offset so that we find the proper highpart
3356 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3357 ? REG_WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3358 info
->offset
= nregs_xmode
- nregs_ymode
;
3361 info
->nregs
= nregs_ymode
;
3365 /* If registers store different numbers of bits in the different
3366 modes, we cannot generally form this subreg. */
3367 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3368 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3369 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3370 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3372 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3373 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3374 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3376 info
->representable_p
= false;
3378 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3379 info
->offset
= offset
/ regsize_xmode
;
3382 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3384 info
->representable_p
= false;
3386 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3387 info
->offset
= offset
/ regsize_xmode
;
3392 /* Lowpart subregs are otherwise valid. */
3393 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3395 info
->representable_p
= true;
3398 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3401 info
->nregs
= nregs_ymode
;
3406 /* This should always pass, otherwise we don't know how to verify
3407 the constraint. These conditions may be relaxed but
3408 subreg_regno_offset would need to be redesigned. */
3409 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3410 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3412 if (WORDS_BIG_ENDIAN
!= REG_WORDS_BIG_ENDIAN
3413 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
)
3415 HOST_WIDE_INT xsize
= GET_MODE_SIZE (xmode
);
3416 HOST_WIDE_INT ysize
= GET_MODE_SIZE (ymode
);
3417 HOST_WIDE_INT off_low
= offset
& (ysize
- 1);
3418 HOST_WIDE_INT off_high
= offset
& ~(ysize
- 1);
3419 offset
= (xsize
- ysize
- off_high
) | off_low
;
3421 /* The XMODE value can be seen as a vector of NREGS_XMODE
3422 values. The subreg must represent a lowpart of given field.
3423 Compute what field it is. */
3424 offset_adj
= offset
;
3425 offset_adj
-= subreg_lowpart_offset (ymode
,
3426 mode_for_size (GET_MODE_BITSIZE (xmode
)
3430 /* Size of ymode must not be greater than the size of xmode. */
3431 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3432 gcc_assert (mode_multiple
!= 0);
3434 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3435 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3436 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3438 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3439 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3443 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3446 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3447 info
->nregs
= nregs_ymode
;
3450 /* This function returns the regno offset of a subreg expression.
3451 xregno - A regno of an inner hard subreg_reg (or what will become one).
3452 xmode - The mode of xregno.
3453 offset - The byte offset.
3454 ymode - The mode of a top level SUBREG (or what may become one).
3455 RETURN - The regno offset which would be used. */
3457 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3458 unsigned int offset
, enum machine_mode ymode
)
3460 struct subreg_info info
;
3461 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3465 /* This function returns true when the offset is representable via
3466 subreg_offset in the given regno.
3467 xregno - A regno of an inner hard subreg_reg (or what will become one).
3468 xmode - The mode of xregno.
3469 offset - The byte offset.
3470 ymode - The mode of a top level SUBREG (or what may become one).
3471 RETURN - Whether the offset is representable. */
3473 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3474 unsigned int offset
, enum machine_mode ymode
)
3476 struct subreg_info info
;
3477 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3478 return info
.representable_p
;
3481 /* Return the number of a YMODE register to which
3483 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3485 can be simplified. Return -1 if the subreg can't be simplified.
3487 XREGNO is a hard register number. */
3490 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3491 unsigned int offset
, enum machine_mode ymode
)
3493 struct subreg_info info
;
3494 unsigned int yregno
;
3496 #ifdef CANNOT_CHANGE_MODE_CLASS
3497 /* Give the backend a chance to disallow the mode change. */
3498 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3499 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3500 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
)
3501 /* We can use mode change in LRA for some transformations. */
3502 && ! lra_in_progress
)
3506 /* We shouldn't simplify stack-related registers. */
3507 if ((!reload_completed
|| frame_pointer_needed
)
3508 && xregno
== FRAME_POINTER_REGNUM
)
3511 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3512 && xregno
== ARG_POINTER_REGNUM
)
3515 if (xregno
== STACK_POINTER_REGNUM
3516 /* We should convert hard stack register in LRA if it is
3518 && ! lra_in_progress
)
3521 /* Try to get the register offset. */
3522 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3523 if (!info
.representable_p
)
3526 /* Make sure that the offsetted register value is in range. */
3527 yregno
= xregno
+ info
.offset
;
3528 if (!HARD_REGISTER_NUM_P (yregno
))
3531 /* See whether (reg:YMODE YREGNO) is valid.
3533 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3534 This is a kludge to work around how complex FP arguments are passed
3535 on IA-64 and should be fixed. See PR target/49226. */
3536 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3537 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3540 return (int) yregno
;
3543 /* Return the final regno that a subreg expression refers to. */
3545 subreg_regno (const_rtx x
)
3548 rtx subreg
= SUBREG_REG (x
);
3549 int regno
= REGNO (subreg
);
3551 ret
= regno
+ subreg_regno_offset (regno
,
3559 /* Return the number of registers that a subreg expression refers
3562 subreg_nregs (const_rtx x
)
3564 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3567 /* Return the number of registers that a subreg REG with REGNO
3568 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3569 changed so that the regno can be passed in. */
3572 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3574 struct subreg_info info
;
3575 rtx subreg
= SUBREG_REG (x
);
3577 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3583 struct parms_set_data
3589 /* Helper function for noticing stores to parameter registers. */
3591 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3593 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3594 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3595 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3597 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3602 /* Look backward for first parameter to be loaded.
3603 Note that loads of all parameters will not necessarily be
3604 found if CSE has eliminated some of them (e.g., an argument
3605 to the outer function is passed down as a parameter).
3606 Do not skip BOUNDARY. */
3608 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3610 struct parms_set_data parm
;
3611 rtx p
, before
, first_set
;
3613 /* Since different machines initialize their parameter registers
3614 in different orders, assume nothing. Collect the set of all
3615 parameter registers. */
3616 CLEAR_HARD_REG_SET (parm
.regs
);
3618 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3619 if (GET_CODE (XEXP (p
, 0)) == USE
3620 && REG_P (XEXP (XEXP (p
, 0), 0)))
3622 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3624 /* We only care about registers which can hold function
3626 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3629 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3633 first_set
= call_insn
;
3635 /* Search backward for the first set of a register in this set. */
3636 while (parm
.nregs
&& before
!= boundary
)
3638 before
= PREV_INSN (before
);
3640 /* It is possible that some loads got CSEed from one call to
3641 another. Stop in that case. */
3642 if (CALL_P (before
))
3645 /* Our caller needs either ensure that we will find all sets
3646 (in case code has not been optimized yet), or take care
3647 for possible labels in a way by setting boundary to preceding
3649 if (LABEL_P (before
))
3651 gcc_assert (before
== boundary
);
3655 if (INSN_P (before
))
3657 int nregs_old
= parm
.nregs
;
3658 note_stores (PATTERN (before
), parms_set
, &parm
);
3659 /* If we found something that did not set a parameter reg,
3660 we're done. Do not keep going, as that might result
3661 in hoisting an insn before the setting of a pseudo
3662 that is used by the hoisted insn. */
3663 if (nregs_old
!= parm
.nregs
)
3672 /* Return true if we should avoid inserting code between INSN and preceding
3673 call instruction. */
3676 keep_with_call_p (const_rtx insn
)
3680 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3682 if (REG_P (SET_DEST (set
))
3683 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3684 && fixed_regs
[REGNO (SET_DEST (set
))]
3685 && general_operand (SET_SRC (set
), VOIDmode
))
3687 if (REG_P (SET_SRC (set
))
3688 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3689 && REG_P (SET_DEST (set
))
3690 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3692 /* There may be a stack pop just after the call and before the store
3693 of the return register. Search for the actual store when deciding
3694 if we can break or not. */
3695 if (SET_DEST (set
) == stack_pointer_rtx
)
3697 /* This CONST_CAST is okay because next_nonnote_insn just
3698 returns its argument and we assign it to a const_rtx
3700 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX(insn
));
3701 if (i2
&& keep_with_call_p (i2
))
3708 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3709 to non-complex jumps. That is, direct unconditional, conditional,
3710 and tablejumps, but not computed jumps or returns. It also does
3711 not apply to the fallthru case of a conditional jump. */
3714 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3716 rtx tmp
= JUMP_LABEL (jump_insn
);
3721 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3723 rtvec vec
= XVEC (PATTERN (tmp
),
3724 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3725 int i
, veclen
= GET_NUM_ELEM (vec
);
3727 for (i
= 0; i
< veclen
; ++i
)
3728 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3732 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3739 /* Return an estimate of the cost of computing rtx X.
3740 One use is in cse, to decide which expression to keep in the hash table.
3741 Another is in rtl generation, to pick the cheapest way to multiply.
3742 Other uses like the latter are expected in the future.
3744 X appears as operand OPNO in an expression with code OUTER_CODE.
3745 SPEED specifies whether costs optimized for speed or size should
3749 rtx_cost (rtx x
, enum rtx_code outer_code
, int opno
, bool speed
)
3760 /* A size N times larger than UNITS_PER_WORD likely needs N times as
3761 many insns, taking N times as long. */
3762 factor
= GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
;
3766 /* Compute the default costs of certain things.
3767 Note that targetm.rtx_costs can override the defaults. */
3769 code
= GET_CODE (x
);
3773 /* Multiplication has time-complexity O(N*N), where N is the
3774 number of units (translated from digits) when using
3775 schoolbook long multiplication. */
3776 total
= factor
* factor
* COSTS_N_INSNS (5);
3782 /* Similarly, complexity for schoolbook long division. */
3783 total
= factor
* factor
* COSTS_N_INSNS (7);
3786 /* Used in combine.c as a marker. */
3790 /* A SET doesn't have a mode, so let's look at the SET_DEST to get
3791 the mode for the factor. */
3792 factor
= GET_MODE_SIZE (GET_MODE (SET_DEST (x
))) / UNITS_PER_WORD
;
3797 total
= factor
* COSTS_N_INSNS (1);
3807 /* If we can't tie these modes, make this expensive. The larger
3808 the mode, the more expensive it is. */
3809 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3810 return COSTS_N_INSNS (2 + factor
);
3814 if (targetm
.rtx_costs (x
, code
, outer_code
, opno
, &total
, speed
))
3819 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3820 which is already in total. */
3822 fmt
= GET_RTX_FORMAT (code
);
3823 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3825 total
+= rtx_cost (XEXP (x
, i
), code
, i
, speed
);
3826 else if (fmt
[i
] == 'E')
3827 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3828 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, i
, speed
);
3833 /* Fill in the structure C with information about both speed and size rtx
3834 costs for X, which is operand OPNO in an expression with code OUTER. */
3837 get_full_rtx_cost (rtx x
, enum rtx_code outer
, int opno
,
3838 struct full_rtx_costs
*c
)
3840 c
->speed
= rtx_cost (x
, outer
, opno
, true);
3841 c
->size
= rtx_cost (x
, outer
, opno
, false);
3845 /* Return cost of address expression X.
3846 Expect that X is properly formed address reference.
3848 SPEED parameter specify whether costs optimized for speed or size should
3852 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3854 /* We may be asked for cost of various unusual addresses, such as operands
3855 of push instruction. It is not worthwhile to complicate writing
3856 of the target hook by such cases. */
3858 if (!memory_address_addr_space_p (mode
, x
, as
))
3861 return targetm
.address_cost (x
, mode
, as
, speed
);
3864 /* If the target doesn't override, compute the cost as with arithmetic. */
3867 default_address_cost (rtx x
, enum machine_mode
, addr_space_t
, bool speed
)
3869 return rtx_cost (x
, MEM
, 0, speed
);
3873 unsigned HOST_WIDE_INT
3874 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3876 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3880 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3882 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3885 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3886 It avoids exponential behavior in nonzero_bits1 when X has
3887 identical subexpressions on the first or the second level. */
3889 static unsigned HOST_WIDE_INT
3890 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3891 enum machine_mode known_mode
,
3892 unsigned HOST_WIDE_INT known_ret
)
3894 if (x
== known_x
&& mode
== known_mode
)
3897 /* Try to find identical subexpressions. If found call
3898 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3899 precomputed value for the subexpression as KNOWN_RET. */
3901 if (ARITHMETIC_P (x
))
3903 rtx x0
= XEXP (x
, 0);
3904 rtx x1
= XEXP (x
, 1);
3906 /* Check the first level. */
3908 return nonzero_bits1 (x
, mode
, x0
, mode
,
3909 cached_nonzero_bits (x0
, mode
, known_x
,
3910 known_mode
, known_ret
));
3912 /* Check the second level. */
3913 if (ARITHMETIC_P (x0
)
3914 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3915 return nonzero_bits1 (x
, mode
, x1
, mode
,
3916 cached_nonzero_bits (x1
, mode
, known_x
,
3917 known_mode
, known_ret
));
3919 if (ARITHMETIC_P (x1
)
3920 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3921 return nonzero_bits1 (x
, mode
, x0
, mode
,
3922 cached_nonzero_bits (x0
, mode
, known_x
,
3923 known_mode
, known_ret
));
3926 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3929 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3930 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3931 is less useful. We can't allow both, because that results in exponential
3932 run time recursion. There is a nullstone testcase that triggered
3933 this. This macro avoids accidental uses of num_sign_bit_copies. */
3934 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3936 /* Given an expression, X, compute which bits in X can be nonzero.
3937 We don't care about bits outside of those defined in MODE.
3939 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3940 an arithmetic operation, we can do better. */
3942 static unsigned HOST_WIDE_INT
3943 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3944 enum machine_mode known_mode
,
3945 unsigned HOST_WIDE_INT known_ret
)
3947 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3948 unsigned HOST_WIDE_INT inner_nz
;
3950 enum machine_mode inner_mode
;
3951 unsigned int mode_width
= GET_MODE_PRECISION (mode
);
3953 /* For floating-point and vector values, assume all bits are needed. */
3954 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3955 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3958 /* If X is wider than MODE, use its mode instead. */
3959 if (GET_MODE_PRECISION (GET_MODE (x
)) > mode_width
)
3961 mode
= GET_MODE (x
);
3962 nonzero
= GET_MODE_MASK (mode
);
3963 mode_width
= GET_MODE_PRECISION (mode
);
3966 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3967 /* Our only callers in this case look for single bit values. So
3968 just return the mode mask. Those tests will then be false. */
3971 #ifndef WORD_REGISTER_OPERATIONS
3972 /* If MODE is wider than X, but both are a single word for both the host
3973 and target machines, we can compute this from which bits of the
3974 object might be nonzero in its own mode, taking into account the fact
3975 that on many CISC machines, accessing an object in a wider mode
3976 causes the high-order bits to become undefined. So they are
3977 not known to be zero. */
3979 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3980 && GET_MODE_PRECISION (GET_MODE (x
)) <= BITS_PER_WORD
3981 && GET_MODE_PRECISION (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3982 && GET_MODE_PRECISION (mode
) > GET_MODE_PRECISION (GET_MODE (x
)))
3984 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3985 known_x
, known_mode
, known_ret
);
3986 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3991 code
= GET_CODE (x
);
3995 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3996 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3997 all the bits above ptr_mode are known to be zero. */
3998 /* As we do not know which address space the pointer is referring to,
3999 we can do this only if the target does not support different pointer
4000 or address modes depending on the address space. */
4001 if (target_default_pointer_address_modes_p ()
4002 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4004 nonzero
&= GET_MODE_MASK (ptr_mode
);
4007 /* Include declared information about alignment of pointers. */
4008 /* ??? We don't properly preserve REG_POINTER changes across
4009 pointer-to-integer casts, so we can't trust it except for
4010 things that we know must be pointers. See execute/960116-1.c. */
4011 if ((x
== stack_pointer_rtx
4012 || x
== frame_pointer_rtx
4013 || x
== arg_pointer_rtx
)
4014 && REGNO_POINTER_ALIGN (REGNO (x
)))
4016 unsigned HOST_WIDE_INT alignment
4017 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
4019 #ifdef PUSH_ROUNDING
4020 /* If PUSH_ROUNDING is defined, it is possible for the
4021 stack to be momentarily aligned only to that amount,
4022 so we pick the least alignment. */
4023 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
4024 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
4028 nonzero
&= ~(alignment
- 1);
4032 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
4033 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
4034 known_mode
, known_ret
,
4038 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
4039 known_mode
, known_ret
);
4041 return nonzero_for_hook
;
4045 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
4046 /* If X is negative in MODE, sign-extend the value. */
4048 && mode_width
< BITS_PER_WORD
4049 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
4051 return UINTVAL (x
) | ((unsigned HOST_WIDE_INT
) (-1) << mode_width
);
4057 #ifdef LOAD_EXTEND_OP
4058 /* In many, if not most, RISC machines, reading a byte from memory
4059 zeros the rest of the register. Noticing that fact saves a lot
4060 of extra zero-extends. */
4061 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
4062 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
4067 case UNEQ
: case LTGT
:
4068 case GT
: case GTU
: case UNGT
:
4069 case LT
: case LTU
: case UNLT
:
4070 case GE
: case GEU
: case UNGE
:
4071 case LE
: case LEU
: case UNLE
:
4072 case UNORDERED
: case ORDERED
:
4073 /* If this produces an integer result, we know which bits are set.
4074 Code here used to clear bits outside the mode of X, but that is
4076 /* Mind that MODE is the mode the caller wants to look at this
4077 operation in, and not the actual operation mode. We can wind
4078 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
4079 that describes the results of a vector compare. */
4080 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
4081 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
4082 nonzero
= STORE_FLAG_VALUE
;
4087 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4088 and num_sign_bit_copies. */
4089 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4090 == GET_MODE_PRECISION (GET_MODE (x
)))
4094 if (GET_MODE_PRECISION (GET_MODE (x
)) < mode_width
)
4095 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
4100 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4101 and num_sign_bit_copies. */
4102 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4103 == GET_MODE_PRECISION (GET_MODE (x
)))
4109 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
4110 known_x
, known_mode
, known_ret
)
4111 & GET_MODE_MASK (mode
));
4115 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4116 known_x
, known_mode
, known_ret
);
4117 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4118 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4122 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
4123 Otherwise, show all the bits in the outer mode but not the inner
4125 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
4126 known_x
, known_mode
, known_ret
);
4127 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4129 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4130 if (val_signbit_known_set_p (GET_MODE (XEXP (x
, 0)), inner_nz
))
4131 inner_nz
|= (GET_MODE_MASK (mode
)
4132 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
4135 nonzero
&= inner_nz
;
4139 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4140 known_x
, known_mode
, known_ret
)
4141 & cached_nonzero_bits (XEXP (x
, 1), mode
,
4142 known_x
, known_mode
, known_ret
);
4146 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
4148 unsigned HOST_WIDE_INT nonzero0
4149 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4150 known_x
, known_mode
, known_ret
);
4152 /* Don't call nonzero_bits for the second time if it cannot change
4154 if ((nonzero
& nonzero0
) != nonzero
)
4156 | cached_nonzero_bits (XEXP (x
, 1), mode
,
4157 known_x
, known_mode
, known_ret
);
4161 case PLUS
: case MINUS
:
4163 case DIV
: case UDIV
:
4164 case MOD
: case UMOD
:
4165 /* We can apply the rules of arithmetic to compute the number of
4166 high- and low-order zero bits of these operations. We start by
4167 computing the width (position of the highest-order nonzero bit)
4168 and the number of low-order zero bits for each value. */
4170 unsigned HOST_WIDE_INT nz0
4171 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4172 known_x
, known_mode
, known_ret
);
4173 unsigned HOST_WIDE_INT nz1
4174 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4175 known_x
, known_mode
, known_ret
);
4176 int sign_index
= GET_MODE_PRECISION (GET_MODE (x
)) - 1;
4177 int width0
= floor_log2 (nz0
) + 1;
4178 int width1
= floor_log2 (nz1
) + 1;
4179 int low0
= floor_log2 (nz0
& -nz0
);
4180 int low1
= floor_log2 (nz1
& -nz1
);
4181 unsigned HOST_WIDE_INT op0_maybe_minusp
4182 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4183 unsigned HOST_WIDE_INT op1_maybe_minusp
4184 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4185 unsigned int result_width
= mode_width
;
4191 result_width
= MAX (width0
, width1
) + 1;
4192 result_low
= MIN (low0
, low1
);
4195 result_low
= MIN (low0
, low1
);
4198 result_width
= width0
+ width1
;
4199 result_low
= low0
+ low1
;
4204 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4205 result_width
= width0
;
4210 result_width
= width0
;
4215 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4216 result_width
= MIN (width0
, width1
);
4217 result_low
= MIN (low0
, low1
);
4222 result_width
= MIN (width0
, width1
);
4223 result_low
= MIN (low0
, low1
);
4229 if (result_width
< mode_width
)
4230 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
4233 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
4238 if (CONST_INT_P (XEXP (x
, 1))
4239 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4240 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4244 /* If this is a SUBREG formed for a promoted variable that has
4245 been zero-extended, we know that at least the high-order bits
4246 are zero, though others might be too. */
4248 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4249 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4250 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4251 known_x
, known_mode
, known_ret
);
4253 inner_mode
= GET_MODE (SUBREG_REG (x
));
4254 /* If the inner mode is a single word for both the host and target
4255 machines, we can compute this from which bits of the inner
4256 object might be nonzero. */
4257 if (GET_MODE_PRECISION (inner_mode
) <= BITS_PER_WORD
4258 && (GET_MODE_PRECISION (inner_mode
) <= HOST_BITS_PER_WIDE_INT
))
4260 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4261 known_x
, known_mode
, known_ret
);
4263 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4264 /* If this is a typical RISC machine, we only have to worry
4265 about the way loads are extended. */
4266 if ((LOAD_EXTEND_OP (inner_mode
) == SIGN_EXTEND
4267 ? val_signbit_known_set_p (inner_mode
, nonzero
)
4268 : LOAD_EXTEND_OP (inner_mode
) != ZERO_EXTEND
)
4269 || !MEM_P (SUBREG_REG (x
)))
4272 /* On many CISC machines, accessing an object in a wider mode
4273 causes the high-order bits to become undefined. So they are
4274 not known to be zero. */
4275 if (GET_MODE_PRECISION (GET_MODE (x
))
4276 > GET_MODE_PRECISION (inner_mode
))
4277 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4278 & ~GET_MODE_MASK (inner_mode
));
4287 /* The nonzero bits are in two classes: any bits within MODE
4288 that aren't in GET_MODE (x) are always significant. The rest of the
4289 nonzero bits are those that are significant in the operand of
4290 the shift when shifted the appropriate number of bits. This
4291 shows that high-order bits are cleared by the right shift and
4292 low-order bits by left shifts. */
4293 if (CONST_INT_P (XEXP (x
, 1))
4294 && INTVAL (XEXP (x
, 1)) >= 0
4295 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4296 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4298 enum machine_mode inner_mode
= GET_MODE (x
);
4299 unsigned int width
= GET_MODE_PRECISION (inner_mode
);
4300 int count
= INTVAL (XEXP (x
, 1));
4301 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4302 unsigned HOST_WIDE_INT op_nonzero
4303 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4304 known_x
, known_mode
, known_ret
);
4305 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4306 unsigned HOST_WIDE_INT outer
= 0;
4308 if (mode_width
> width
)
4309 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4311 if (code
== LSHIFTRT
)
4313 else if (code
== ASHIFTRT
)
4317 /* If the sign bit may have been nonzero before the shift, we
4318 need to mark all the places it could have been copied to
4319 by the shift as possibly nonzero. */
4320 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4321 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4324 else if (code
== ASHIFT
)
4327 inner
= ((inner
<< (count
% width
)
4328 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4330 nonzero
&= (outer
| inner
);
4336 /* This is at most the number of bits in the mode. */
4337 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4341 /* If CLZ has a known value at zero, then the nonzero bits are
4342 that value, plus the number of bits in the mode minus one. */
4343 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4345 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4351 /* If CTZ has a known value at zero, then the nonzero bits are
4352 that value, plus the number of bits in the mode minus one. */
4353 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4355 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4361 /* This is at most the number of bits in the mode minus 1. */
4362 nonzero
= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4371 unsigned HOST_WIDE_INT nonzero_true
4372 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4373 known_x
, known_mode
, known_ret
);
4375 /* Don't call nonzero_bits for the second time if it cannot change
4377 if ((nonzero
& nonzero_true
) != nonzero
)
4378 nonzero
&= nonzero_true
4379 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4380 known_x
, known_mode
, known_ret
);
4391 /* See the macro definition above. */
4392 #undef cached_num_sign_bit_copies
4395 /* The function cached_num_sign_bit_copies is a wrapper around
4396 num_sign_bit_copies1. It avoids exponential behavior in
4397 num_sign_bit_copies1 when X has identical subexpressions on the
4398 first or the second level. */
4401 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4402 enum machine_mode known_mode
,
4403 unsigned int known_ret
)
4405 if (x
== known_x
&& mode
== known_mode
)
4408 /* Try to find identical subexpressions. If found call
4409 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4410 the precomputed value for the subexpression as KNOWN_RET. */
4412 if (ARITHMETIC_P (x
))
4414 rtx x0
= XEXP (x
, 0);
4415 rtx x1
= XEXP (x
, 1);
4417 /* Check the first level. */
4420 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4421 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4425 /* Check the second level. */
4426 if (ARITHMETIC_P (x0
)
4427 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4429 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4430 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4434 if (ARITHMETIC_P (x1
)
4435 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4437 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4438 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4443 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4446 /* Return the number of bits at the high-order end of X that are known to
4447 be equal to the sign bit. X will be used in mode MODE; if MODE is
4448 VOIDmode, X will be used in its own mode. The returned value will always
4449 be between 1 and the number of bits in MODE. */
4452 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4453 enum machine_mode known_mode
,
4454 unsigned int known_ret
)
4456 enum rtx_code code
= GET_CODE (x
);
4457 unsigned int bitwidth
= GET_MODE_PRECISION (mode
);
4458 int num0
, num1
, result
;
4459 unsigned HOST_WIDE_INT nonzero
;
4461 /* If we weren't given a mode, use the mode of X. If the mode is still
4462 VOIDmode, we don't know anything. Likewise if one of the modes is
4465 if (mode
== VOIDmode
)
4466 mode
= GET_MODE (x
);
4468 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4469 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4472 /* For a smaller object, just ignore the high bits. */
4473 if (bitwidth
< GET_MODE_PRECISION (GET_MODE (x
)))
4475 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4476 known_x
, known_mode
, known_ret
);
4478 num0
- (int) (GET_MODE_PRECISION (GET_MODE (x
)) - bitwidth
));
4481 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_PRECISION (GET_MODE (x
)))
4483 #ifndef WORD_REGISTER_OPERATIONS
4484 /* If this machine does not do all register operations on the entire
4485 register and MODE is wider than the mode of X, we can say nothing
4486 at all about the high-order bits. */
4489 /* Likewise on machines that do, if the mode of the object is smaller
4490 than a word and loads of that size don't sign extend, we can say
4491 nothing about the high order bits. */
4492 if (GET_MODE_PRECISION (GET_MODE (x
)) < BITS_PER_WORD
4493 #ifdef LOAD_EXTEND_OP
4494 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4505 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4506 /* If pointers extend signed and this is a pointer in Pmode, say that
4507 all the bits above ptr_mode are known to be sign bit copies. */
4508 /* As we do not know which address space the pointer is referring to,
4509 we can do this only if the target does not support different pointer
4510 or address modes depending on the address space. */
4511 if (target_default_pointer_address_modes_p ()
4512 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4513 && mode
== Pmode
&& REG_POINTER (x
))
4514 return GET_MODE_PRECISION (Pmode
) - GET_MODE_PRECISION (ptr_mode
) + 1;
4518 unsigned int copies_for_hook
= 1, copies
= 1;
4519 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4520 known_mode
, known_ret
,
4524 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4525 known_mode
, known_ret
);
4527 if (copies
> 1 || copies_for_hook
> 1)
4528 return MAX (copies
, copies_for_hook
);
4530 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4535 #ifdef LOAD_EXTEND_OP
4536 /* Some RISC machines sign-extend all loads of smaller than a word. */
4537 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4538 return MAX (1, ((int) bitwidth
4539 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1));
4544 /* If the constant is negative, take its 1's complement and remask.
4545 Then see how many zero bits we have. */
4546 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4547 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4548 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4549 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4551 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4554 /* If this is a SUBREG for a promoted object that is sign-extended
4555 and we are looking at it in a wider mode, we know that at least the
4556 high-order bits are known to be sign bit copies. */
4558 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4560 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4561 known_x
, known_mode
, known_ret
);
4562 return MAX ((int) bitwidth
4563 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1,
4567 /* For a smaller object, just ignore the high bits. */
4568 if (bitwidth
<= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))))
4570 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4571 known_x
, known_mode
, known_ret
);
4572 return MAX (1, (num0
4573 - (int) (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
)))
4577 #ifdef WORD_REGISTER_OPERATIONS
4578 #ifdef LOAD_EXTEND_OP
4579 /* For paradoxical SUBREGs on machines where all register operations
4580 affect the entire register, just look inside. Note that we are
4581 passing MODE to the recursive call, so the number of sign bit copies
4582 will remain relative to that mode, not the inner mode. */
4584 /* This works only if loads sign extend. Otherwise, if we get a
4585 reload for the inner part, it may be loaded from the stack, and
4586 then we lose all sign bit copies that existed before the store
4589 if (paradoxical_subreg_p (x
)
4590 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4591 && MEM_P (SUBREG_REG (x
)))
4592 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4593 known_x
, known_mode
, known_ret
);
4599 if (CONST_INT_P (XEXP (x
, 1)))
4600 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4604 return (bitwidth
- GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4605 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4606 known_x
, known_mode
, known_ret
));
4609 /* For a smaller object, just ignore the high bits. */
4610 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4611 known_x
, known_mode
, known_ret
);
4612 return MAX (1, (num0
- (int) (GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4616 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4617 known_x
, known_mode
, known_ret
);
4619 case ROTATE
: case ROTATERT
:
4620 /* If we are rotating left by a number of bits less than the number
4621 of sign bit copies, we can just subtract that amount from the
4623 if (CONST_INT_P (XEXP (x
, 1))
4624 && INTVAL (XEXP (x
, 1)) >= 0
4625 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4627 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4628 known_x
, known_mode
, known_ret
);
4629 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4630 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4635 /* In general, this subtracts one sign bit copy. But if the value
4636 is known to be positive, the number of sign bit copies is the
4637 same as that of the input. Finally, if the input has just one bit
4638 that might be nonzero, all the bits are copies of the sign bit. */
4639 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4640 known_x
, known_mode
, known_ret
);
4641 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4642 return num0
> 1 ? num0
- 1 : 1;
4644 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4649 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4654 case IOR
: case AND
: case XOR
:
4655 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4656 /* Logical operations will preserve the number of sign-bit copies.
4657 MIN and MAX operations always return one of the operands. */
4658 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4659 known_x
, known_mode
, known_ret
);
4660 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4661 known_x
, known_mode
, known_ret
);
4663 /* If num1 is clearing some of the top bits then regardless of
4664 the other term, we are guaranteed to have at least that many
4665 high-order zero bits. */
4668 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4669 && CONST_INT_P (XEXP (x
, 1))
4670 && (UINTVAL (XEXP (x
, 1))
4671 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4674 /* Similarly for IOR when setting high-order bits. */
4677 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4678 && CONST_INT_P (XEXP (x
, 1))
4679 && (UINTVAL (XEXP (x
, 1))
4680 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4683 return MIN (num0
, num1
);
4685 case PLUS
: case MINUS
:
4686 /* For addition and subtraction, we can have a 1-bit carry. However,
4687 if we are subtracting 1 from a positive number, there will not
4688 be such a carry. Furthermore, if the positive number is known to
4689 be 0 or 1, we know the result is either -1 or 0. */
4691 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4692 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4694 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4695 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4696 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4697 : bitwidth
- floor_log2 (nonzero
) - 1);
4700 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4701 known_x
, known_mode
, known_ret
);
4702 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4703 known_x
, known_mode
, known_ret
);
4704 result
= MAX (1, MIN (num0
, num1
) - 1);
4709 /* The number of bits of the product is the sum of the number of
4710 bits of both terms. However, unless one of the terms if known
4711 to be positive, we must allow for an additional bit since negating
4712 a negative number can remove one sign bit copy. */
4714 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4715 known_x
, known_mode
, known_ret
);
4716 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4717 known_x
, known_mode
, known_ret
);
4719 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4721 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4722 || (((nonzero_bits (XEXP (x
, 0), mode
)
4723 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4724 && ((nonzero_bits (XEXP (x
, 1), mode
)
4725 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4729 return MAX (1, result
);
4732 /* The result must be <= the first operand. If the first operand
4733 has the high bit set, we know nothing about the number of sign
4735 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4737 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4738 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4741 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4742 known_x
, known_mode
, known_ret
);
4745 /* The result must be <= the second operand. If the second operand
4746 has (or just might have) the high bit set, we know nothing about
4747 the number of sign bit copies. */
4748 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4750 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4751 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4754 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4755 known_x
, known_mode
, known_ret
);
4758 /* Similar to unsigned division, except that we have to worry about
4759 the case where the divisor is negative, in which case we have
4761 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4762 known_x
, known_mode
, known_ret
);
4764 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4765 || (nonzero_bits (XEXP (x
, 1), mode
)
4766 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4772 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4773 known_x
, known_mode
, known_ret
);
4775 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4776 || (nonzero_bits (XEXP (x
, 1), mode
)
4777 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4783 /* Shifts by a constant add to the number of bits equal to the
4785 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4786 known_x
, known_mode
, known_ret
);
4787 if (CONST_INT_P (XEXP (x
, 1))
4788 && INTVAL (XEXP (x
, 1)) > 0
4789 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4790 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4795 /* Left shifts destroy copies. */
4796 if (!CONST_INT_P (XEXP (x
, 1))
4797 || INTVAL (XEXP (x
, 1)) < 0
4798 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4799 || INTVAL (XEXP (x
, 1)) >= GET_MODE_PRECISION (GET_MODE (x
)))
4802 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4803 known_x
, known_mode
, known_ret
);
4804 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4807 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4808 known_x
, known_mode
, known_ret
);
4809 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4810 known_x
, known_mode
, known_ret
);
4811 return MIN (num0
, num1
);
4813 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4814 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4815 case GEU
: case GTU
: case LEU
: case LTU
:
4816 case UNORDERED
: case ORDERED
:
4817 /* If the constant is negative, take its 1's complement and remask.
4818 Then see how many zero bits we have. */
4819 nonzero
= STORE_FLAG_VALUE
;
4820 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4821 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4822 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4824 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4830 /* If we haven't been able to figure it out by one of the above rules,
4831 see if some of the high-order bits are known to be zero. If so,
4832 count those bits and return one less than that amount. If we can't
4833 safely compute the mask for this mode, always return BITWIDTH. */
4835 bitwidth
= GET_MODE_PRECISION (mode
);
4836 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4839 nonzero
= nonzero_bits (x
, mode
);
4840 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4841 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4844 /* Calculate the rtx_cost of a single instruction. A return value of
4845 zero indicates an instruction pattern without a known cost. */
4848 insn_rtx_cost (rtx pat
, bool speed
)
4853 /* Extract the single set rtx from the instruction pattern.
4854 We can't use single_set since we only have the pattern. */
4855 if (GET_CODE (pat
) == SET
)
4857 else if (GET_CODE (pat
) == PARALLEL
)
4860 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4862 rtx x
= XVECEXP (pat
, 0, i
);
4863 if (GET_CODE (x
) == SET
)
4876 cost
= set_src_cost (SET_SRC (set
), speed
);
4877 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4880 /* Given an insn INSN and condition COND, return the condition in a
4881 canonical form to simplify testing by callers. Specifically:
4883 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4884 (2) Both operands will be machine operands; (cc0) will have been replaced.
4885 (3) If an operand is a constant, it will be the second operand.
4886 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4887 for GE, GEU, and LEU.
4889 If the condition cannot be understood, or is an inequality floating-point
4890 comparison which needs to be reversed, 0 will be returned.
4892 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4894 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4895 insn used in locating the condition was found. If a replacement test
4896 of the condition is desired, it should be placed in front of that
4897 insn and we will be sure that the inputs are still valid.
4899 If WANT_REG is nonzero, we wish the condition to be relative to that
4900 register, if possible. Therefore, do not canonicalize the condition
4901 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4902 to be a compare to a CC mode register.
4904 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4908 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4909 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4916 int reverse_code
= 0;
4917 enum machine_mode mode
;
4918 basic_block bb
= BLOCK_FOR_INSN (insn
);
4920 code
= GET_CODE (cond
);
4921 mode
= GET_MODE (cond
);
4922 op0
= XEXP (cond
, 0);
4923 op1
= XEXP (cond
, 1);
4926 code
= reversed_comparison_code (cond
, insn
);
4927 if (code
== UNKNOWN
)
4933 /* If we are comparing a register with zero, see if the register is set
4934 in the previous insn to a COMPARE or a comparison operation. Perform
4935 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4938 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4939 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4940 && op1
== CONST0_RTX (GET_MODE (op0
))
4943 /* Set nonzero when we find something of interest. */
4947 /* If comparison with cc0, import actual comparison from compare
4951 if ((prev
= prev_nonnote_insn (prev
)) == 0
4952 || !NONJUMP_INSN_P (prev
)
4953 || (set
= single_set (prev
)) == 0
4954 || SET_DEST (set
) != cc0_rtx
)
4957 op0
= SET_SRC (set
);
4958 op1
= CONST0_RTX (GET_MODE (op0
));
4964 /* If this is a COMPARE, pick up the two things being compared. */
4965 if (GET_CODE (op0
) == COMPARE
)
4967 op1
= XEXP (op0
, 1);
4968 op0
= XEXP (op0
, 0);
4971 else if (!REG_P (op0
))
4974 /* Go back to the previous insn. Stop if it is not an INSN. We also
4975 stop if it isn't a single set or if it has a REG_INC note because
4976 we don't want to bother dealing with it. */
4978 prev
= prev_nonnote_nondebug_insn (prev
);
4981 || !NONJUMP_INSN_P (prev
)
4982 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4983 /* In cfglayout mode, there do not have to be labels at the
4984 beginning of a block, or jumps at the end, so the previous
4985 conditions would not stop us when we reach bb boundary. */
4986 || BLOCK_FOR_INSN (prev
) != bb
)
4989 set
= set_of (op0
, prev
);
4992 && (GET_CODE (set
) != SET
4993 || !rtx_equal_p (SET_DEST (set
), op0
)))
4996 /* If this is setting OP0, get what it sets it to if it looks
5000 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
5001 #ifdef FLOAT_STORE_FLAG_VALUE
5002 REAL_VALUE_TYPE fsfv
;
5005 /* ??? We may not combine comparisons done in a CCmode with
5006 comparisons not done in a CCmode. This is to aid targets
5007 like Alpha that have an IEEE compliant EQ instruction, and
5008 a non-IEEE compliant BEQ instruction. The use of CCmode is
5009 actually artificial, simply to prevent the combination, but
5010 should not affect other platforms.
5012 However, we must allow VOIDmode comparisons to match either
5013 CCmode or non-CCmode comparison, because some ports have
5014 modeless comparisons inside branch patterns.
5016 ??? This mode check should perhaps look more like the mode check
5017 in simplify_comparison in combine. */
5019 if ((GET_CODE (SET_SRC (set
)) == COMPARE
5022 && val_signbit_known_set_p (inner_mode
,
5024 #ifdef FLOAT_STORE_FLAG_VALUE
5026 && SCALAR_FLOAT_MODE_P (inner_mode
)
5027 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5028 REAL_VALUE_NEGATIVE (fsfv
)))
5031 && COMPARISON_P (SET_SRC (set
))))
5032 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5033 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5034 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5036 else if (((code
== EQ
5038 && val_signbit_known_set_p (inner_mode
,
5040 #ifdef FLOAT_STORE_FLAG_VALUE
5042 && SCALAR_FLOAT_MODE_P (inner_mode
)
5043 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5044 REAL_VALUE_NEGATIVE (fsfv
)))
5047 && COMPARISON_P (SET_SRC (set
))
5048 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5049 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5050 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5060 else if (reg_set_p (op0
, prev
))
5061 /* If this sets OP0, but not directly, we have to give up. */
5066 /* If the caller is expecting the condition to be valid at INSN,
5067 make sure X doesn't change before INSN. */
5068 if (valid_at_insn_p
)
5069 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
5071 if (COMPARISON_P (x
))
5072 code
= GET_CODE (x
);
5075 code
= reversed_comparison_code (x
, prev
);
5076 if (code
== UNKNOWN
)
5081 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
5087 /* If constant is first, put it last. */
5088 if (CONSTANT_P (op0
))
5089 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
5091 /* If OP0 is the result of a comparison, we weren't able to find what
5092 was really being compared, so fail. */
5094 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
5097 /* Canonicalize any ordered comparison with integers involving equality
5098 if we can do computations in the relevant mode and we do not
5101 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
5102 && CONST_INT_P (op1
)
5103 && GET_MODE (op0
) != VOIDmode
5104 && GET_MODE_PRECISION (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
5106 HOST_WIDE_INT const_val
= INTVAL (op1
);
5107 unsigned HOST_WIDE_INT uconst_val
= const_val
;
5108 unsigned HOST_WIDE_INT max_val
5109 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
5114 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
5115 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
5118 /* When cross-compiling, const_val might be sign-extended from
5119 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
5121 if ((const_val
& max_val
)
5122 != ((unsigned HOST_WIDE_INT
) 1
5123 << (GET_MODE_PRECISION (GET_MODE (op0
)) - 1)))
5124 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
5128 if (uconst_val
< max_val
)
5129 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
5133 if (uconst_val
!= 0)
5134 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
5142 /* Never return CC0; return zero instead. */
5146 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
5149 /* Given a jump insn JUMP, return the condition that will cause it to branch
5150 to its JUMP_LABEL. If the condition cannot be understood, or is an
5151 inequality floating-point comparison which needs to be reversed, 0 will
5154 If EARLIEST is nonzero, it is a pointer to a place where the earliest
5155 insn used in locating the condition was found. If a replacement test
5156 of the condition is desired, it should be placed in front of that
5157 insn and we will be sure that the inputs are still valid. If EARLIEST
5158 is null, the returned condition will be valid at INSN.
5160 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
5161 compare CC mode register.
5163 VALID_AT_INSN_P is the same as for canonicalize_condition. */
5166 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
5172 /* If this is not a standard conditional jump, we can't parse it. */
5174 || ! any_condjump_p (jump
))
5176 set
= pc_set (jump
);
5178 cond
= XEXP (SET_SRC (set
), 0);
5180 /* If this branches to JUMP_LABEL when the condition is false, reverse
5183 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
5184 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
5186 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
5187 allow_cc_mode
, valid_at_insn_p
);
5190 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
5191 TARGET_MODE_REP_EXTENDED.
5193 Note that we assume that the property of
5194 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
5195 narrower than mode B. I.e., if A is a mode narrower than B then in
5196 order to be able to operate on it in mode B, mode A needs to
5197 satisfy the requirements set by the representation of mode B. */
5200 init_num_sign_bit_copies_in_rep (void)
5202 enum machine_mode mode
, in_mode
;
5204 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
5205 in_mode
= GET_MODE_WIDER_MODE (mode
))
5206 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
5207 mode
= GET_MODE_WIDER_MODE (mode
))
5209 enum machine_mode i
;
5211 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
5212 extends to the next widest mode. */
5213 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
5214 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5216 /* We are in in_mode. Count how many bits outside of mode
5217 have to be copies of the sign-bit. */
5218 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5220 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5222 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5223 /* We can only check sign-bit copies starting from the
5224 top-bit. In order to be able to check the bits we
5225 have already seen we pretend that subsequent bits
5226 have to be sign-bit copies too. */
5227 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5228 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5229 += GET_MODE_PRECISION (wider
) - GET_MODE_PRECISION (i
);
5234 /* Suppose that truncation from the machine mode of X to MODE is not a
5235 no-op. See if there is anything special about X so that we can
5236 assume it already contains a truncated value of MODE. */
5239 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5241 /* This register has already been used in MODE without explicit
5243 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5246 /* See if we already satisfy the requirements of MODE. If yes we
5247 can just switch to MODE. */
5248 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5249 && (num_sign_bit_copies (x
, GET_MODE (x
))
5250 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5256 /* Initialize non_rtx_starting_operands, which is used to speed up
5262 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5264 const char *format
= GET_RTX_FORMAT (i
);
5265 const char *first
= strpbrk (format
, "eEV");
5266 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5269 init_num_sign_bit_copies_in_rep ();
5272 /* Check whether this is a constant pool constant. */
5274 constant_pool_constant_p (rtx x
)
5276 x
= avoid_constant_pool_reference (x
);
5277 return CONST_DOUBLE_P (x
);
5280 /* If M is a bitmask that selects a field of low-order bits within an item but
5281 not the entire word, return the length of the field. Return -1 otherwise.
5282 M is used in machine mode MODE. */
5285 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5287 if (mode
!= VOIDmode
)
5289 if (GET_MODE_PRECISION (mode
) > HOST_BITS_PER_WIDE_INT
)
5291 m
&= GET_MODE_MASK (mode
);
5294 return exact_log2 (m
+ 1);
5297 /* Return the mode of MEM's address. */
5300 get_address_mode (rtx mem
)
5302 enum machine_mode mode
;
5304 gcc_assert (MEM_P (mem
));
5305 mode
= GET_MODE (XEXP (mem
, 0));
5306 if (mode
!= VOIDmode
)
5308 return targetm
.addr_space
.address_mode (MEM_ADDR_SPACE (mem
));
5311 /* Split up a CONST_DOUBLE or integer constant rtx
5312 into two rtx's for single words,
5313 storing in *FIRST the word that comes first in memory in the target
5314 and in *SECOND the other. */
5317 split_double (rtx value
, rtx
*first
, rtx
*second
)
5319 if (CONST_INT_P (value
))
5321 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
5323 /* In this case the CONST_INT holds both target words.
5324 Extract the bits from it into two word-sized pieces.
5325 Sign extend each half to HOST_WIDE_INT. */
5326 unsigned HOST_WIDE_INT low
, high
;
5327 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
5328 unsigned bits_per_word
= BITS_PER_WORD
;
5330 /* Set sign_bit to the most significant bit of a word. */
5332 sign_bit
<<= bits_per_word
- 1;
5334 /* Set mask so that all bits of the word are set. We could
5335 have used 1 << BITS_PER_WORD instead of basing the
5336 calculation on sign_bit. However, on machines where
5337 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
5338 compiler warning, even though the code would never be
5340 mask
= sign_bit
<< 1;
5343 /* Set sign_extend as any remaining bits. */
5344 sign_extend
= ~mask
;
5346 /* Pick the lower word and sign-extend it. */
5347 low
= INTVAL (value
);
5352 /* Pick the higher word, shifted to the least significant
5353 bits, and sign-extend it. */
5354 high
= INTVAL (value
);
5355 high
>>= bits_per_word
- 1;
5358 if (high
& sign_bit
)
5359 high
|= sign_extend
;
5361 /* Store the words in the target machine order. */
5362 if (WORDS_BIG_ENDIAN
)
5364 *first
= GEN_INT (high
);
5365 *second
= GEN_INT (low
);
5369 *first
= GEN_INT (low
);
5370 *second
= GEN_INT (high
);
5375 /* The rule for using CONST_INT for a wider mode
5376 is that we regard the value as signed.
5377 So sign-extend it. */
5378 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
5379 if (WORDS_BIG_ENDIAN
)
5391 else if (!CONST_DOUBLE_P (value
))
5393 if (WORDS_BIG_ENDIAN
)
5395 *first
= const0_rtx
;
5401 *second
= const0_rtx
;
5404 else if (GET_MODE (value
) == VOIDmode
5405 /* This is the old way we did CONST_DOUBLE integers. */
5406 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
5408 /* In an integer, the words are defined as most and least significant.
5409 So order them by the target's convention. */
5410 if (WORDS_BIG_ENDIAN
)
5412 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5413 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
5417 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
5418 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5425 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
5427 /* Note, this converts the REAL_VALUE_TYPE to the target's
5428 format, splits up the floating point double and outputs
5429 exactly 32 bits of it into each of l[0] and l[1] --
5430 not necessarily BITS_PER_WORD bits. */
5431 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
5433 /* If 32 bits is an entire word for the target, but not for the host,
5434 then sign-extend on the host so that the number will look the same
5435 way on the host that it would on the target. See for instance
5436 simplify_unary_operation. The #if is needed to avoid compiler
5439 #if HOST_BITS_PER_LONG > 32
5440 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
5442 if (l
[0] & ((long) 1 << 31))
5443 l
[0] |= ((long) (-1) << 32);
5444 if (l
[1] & ((long) 1 << 31))
5445 l
[1] |= ((long) (-1) << 32);
5449 *first
= GEN_INT (l
[0]);
5450 *second
= GEN_INT (l
[1]);
5454 /* Strip outer address "mutations" from LOC and return a pointer to the
5455 inner value. If OUTER_CODE is nonnull, store the code of the innermost
5456 stripped expression there.
5458 "Mutations" either convert between modes or apply some kind of
5462 strip_address_mutations (rtx
*loc
, enum rtx_code
*outer_code
)
5466 enum rtx_code code
= GET_CODE (*loc
);
5467 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
5468 /* Things like SIGN_EXTEND, ZERO_EXTEND and TRUNCATE can be
5469 used to convert between pointer sizes. */
5470 loc
= &XEXP (*loc
, 0);
5471 else if (code
== AND
&& CONST_INT_P (XEXP (*loc
, 1)))
5472 /* (and ... (const_int -X)) is used to align to X bytes. */
5473 loc
= &XEXP (*loc
, 0);
5474 else if (code
== SUBREG
5475 && !OBJECT_P (SUBREG_REG (*loc
))
5476 && subreg_lowpart_p (*loc
))
5477 /* (subreg (operator ...) ...) inside and is used for mode
5479 loc
= &SUBREG_REG (*loc
);
5487 /* Return true if X must be a base rather than an index. */
5490 must_be_base_p (rtx x
)
5492 return GET_CODE (x
) == LO_SUM
;
5495 /* Return true if X must be an index rather than a base. */
5498 must_be_index_p (rtx x
)
5500 return GET_CODE (x
) == MULT
|| GET_CODE (x
) == ASHIFT
;
5503 /* Set the segment part of address INFO to LOC, given that INNER is the
5507 set_address_segment (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5509 gcc_checking_assert (GET_CODE (*inner
) == UNSPEC
);
5511 gcc_assert (!info
->segment
);
5512 info
->segment
= loc
;
5513 info
->segment_term
= inner
;
5516 /* Set the base part of address INFO to LOC, given that INNER is the
5520 set_address_base (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5522 if (GET_CODE (*inner
) == LO_SUM
)
5523 inner
= strip_address_mutations (&XEXP (*inner
, 0));
5524 gcc_checking_assert (REG_P (*inner
)
5526 || GET_CODE (*inner
) == SUBREG
);
5528 gcc_assert (!info
->base
);
5530 info
->base_term
= inner
;
5533 /* Set the index part of address INFO to LOC, given that INNER is the
5537 set_address_index (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5539 if ((GET_CODE (*inner
) == MULT
|| GET_CODE (*inner
) == ASHIFT
)
5540 && CONSTANT_P (XEXP (*inner
, 1)))
5541 inner
= strip_address_mutations (&XEXP (*inner
, 0));
5542 gcc_checking_assert (REG_P (*inner
)
5544 || GET_CODE (*inner
) == SUBREG
);
5546 gcc_assert (!info
->index
);
5548 info
->index_term
= inner
;
5551 /* Set the displacement part of address INFO to LOC, given that INNER
5552 is the constant term. */
5555 set_address_disp (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5557 gcc_checking_assert (CONSTANT_P (*inner
));
5559 gcc_assert (!info
->disp
);
5561 info
->disp_term
= inner
;
5564 /* INFO->INNER describes a {PRE,POST}_{INC,DEC} address. Set up the
5565 rest of INFO accordingly. */
5568 decompose_incdec_address (struct address_info
*info
)
5570 info
->autoinc_p
= true;
5572 rtx
*base
= &XEXP (*info
->inner
, 0);
5573 set_address_base (info
, base
, base
);
5574 gcc_checking_assert (info
->base
== info
->base_term
);
5576 /* These addresses are only valid when the size of the addressed
5578 gcc_checking_assert (info
->mode
!= VOIDmode
);
5581 /* INFO->INNER describes a {PRE,POST}_MODIFY address. Set up the rest
5582 of INFO accordingly. */
5585 decompose_automod_address (struct address_info
*info
)
5587 info
->autoinc_p
= true;
5589 rtx
*base
= &XEXP (*info
->inner
, 0);
5590 set_address_base (info
, base
, base
);
5591 gcc_checking_assert (info
->base
== info
->base_term
);
5593 rtx plus
= XEXP (*info
->inner
, 1);
5594 gcc_assert (GET_CODE (plus
) == PLUS
);
5596 info
->base_term2
= &XEXP (plus
, 0);
5597 gcc_checking_assert (rtx_equal_p (*info
->base_term
, *info
->base_term2
));
5599 rtx
*step
= &XEXP (plus
, 1);
5600 rtx
*inner_step
= strip_address_mutations (step
);
5601 if (CONSTANT_P (*inner_step
))
5602 set_address_disp (info
, step
, inner_step
);
5604 set_address_index (info
, step
, inner_step
);
5607 /* Treat *LOC as a tree of PLUS operands and store pointers to the summed
5608 values in [PTR, END). Return a pointer to the end of the used array. */
5611 extract_plus_operands (rtx
*loc
, rtx
**ptr
, rtx
**end
)
5614 if (GET_CODE (x
) == PLUS
)
5616 ptr
= extract_plus_operands (&XEXP (x
, 0), ptr
, end
);
5617 ptr
= extract_plus_operands (&XEXP (x
, 1), ptr
, end
);
5621 gcc_assert (ptr
!= end
);
5627 /* Evaluate the likelihood of X being a base or index value, returning
5628 positive if it is likely to be a base, negative if it is likely to be
5629 an index, and 0 if we can't tell. Make the magnitude of the return
5630 value reflect the amount of confidence we have in the answer.
5632 MODE, AS, OUTER_CODE and INDEX_CODE are as for ok_for_base_p_1. */
5635 baseness (rtx x
, enum machine_mode mode
, addr_space_t as
,
5636 enum rtx_code outer_code
, enum rtx_code index_code
)
5638 /* See whether we can be certain. */
5639 if (must_be_base_p (x
))
5641 if (must_be_index_p (x
))
5644 /* Believe *_POINTER unless the address shape requires otherwise. */
5645 if (REG_P (x
) && REG_POINTER (x
))
5647 if (MEM_P (x
) && MEM_POINTER (x
))
5650 if (REG_P (x
) && HARD_REGISTER_P (x
))
5652 /* X is a hard register. If it only fits one of the base
5653 or index classes, choose that interpretation. */
5654 int regno
= REGNO (x
);
5655 bool base_p
= ok_for_base_p_1 (regno
, mode
, as
, outer_code
, index_code
);
5656 bool index_p
= REGNO_OK_FOR_INDEX_P (regno
);
5657 if (base_p
!= index_p
)
5658 return base_p
? 1 : -1;
5663 /* INFO->INNER describes a normal, non-automodified address.
5664 Fill in the rest of INFO accordingly. */
5667 decompose_normal_address (struct address_info
*info
)
5669 /* Treat the address as the sum of up to four values. */
5671 size_t n_ops
= extract_plus_operands (info
->inner
, ops
,
5672 ops
+ ARRAY_SIZE (ops
)) - ops
;
5674 /* If there is more than one component, any base component is in a PLUS. */
5676 info
->base_outer_code
= PLUS
;
5678 /* Separate the parts that contain a REG or MEM from those that don't.
5679 Record the latter in INFO and leave the former in OPS. */
5682 for (size_t in
= 0; in
< n_ops
; ++in
)
5685 rtx
*inner
= strip_address_mutations (loc
);
5686 if (CONSTANT_P (*inner
))
5687 set_address_disp (info
, loc
, inner
);
5688 else if (GET_CODE (*inner
) == UNSPEC
)
5689 set_address_segment (info
, loc
, inner
);
5693 inner_ops
[out
] = inner
;
5698 /* Classify the remaining OPS members as bases and indexes. */
5701 /* Assume that the remaining value is a base unless the shape
5702 requires otherwise. */
5703 if (!must_be_index_p (*inner_ops
[0]))
5704 set_address_base (info
, ops
[0], inner_ops
[0]);
5706 set_address_index (info
, ops
[0], inner_ops
[0]);
5710 /* In the event of a tie, assume the base comes first. */
5711 if (baseness (*inner_ops
[0], info
->mode
, info
->as
, PLUS
,
5713 >= baseness (*inner_ops
[1], info
->mode
, info
->as
, PLUS
,
5714 GET_CODE (*ops
[0])))
5716 set_address_base (info
, ops
[0], inner_ops
[0]);
5717 set_address_index (info
, ops
[1], inner_ops
[1]);
5721 set_address_base (info
, ops
[1], inner_ops
[1]);
5722 set_address_index (info
, ops
[0], inner_ops
[0]);
5726 gcc_assert (out
== 0);
5729 /* Describe address *LOC in *INFO. MODE is the mode of the addressed value,
5730 or VOIDmode if not known. AS is the address space associated with LOC.
5731 OUTER_CODE is MEM if *LOC is a MEM address and ADDRESS otherwise. */
5734 decompose_address (struct address_info
*info
, rtx
*loc
, enum machine_mode mode
,
5735 addr_space_t as
, enum rtx_code outer_code
)
5737 memset (info
, 0, sizeof (*info
));
5740 info
->addr_outer_code
= outer_code
;
5742 info
->inner
= strip_address_mutations (loc
, &outer_code
);
5743 info
->base_outer_code
= outer_code
;
5744 switch (GET_CODE (*info
->inner
))
5750 decompose_incdec_address (info
);
5755 decompose_automod_address (info
);
5759 decompose_normal_address (info
);
5764 /* Describe address operand LOC in INFO. */
5767 decompose_lea_address (struct address_info
*info
, rtx
*loc
)
5769 decompose_address (info
, loc
, VOIDmode
, ADDR_SPACE_GENERIC
, ADDRESS
);
5772 /* Describe the address of MEM X in INFO. */
5775 decompose_mem_address (struct address_info
*info
, rtx x
)
5777 gcc_assert (MEM_P (x
));
5778 decompose_address (info
, &XEXP (x
, 0), GET_MODE (x
),
5779 MEM_ADDR_SPACE (x
), MEM
);
5782 /* Update INFO after a change to the address it describes. */
5785 update_address (struct address_info
*info
)
5787 decompose_address (info
, info
->outer
, info
->mode
, info
->as
,
5788 info
->addr_outer_code
);
5791 /* Return the scale applied to *INFO->INDEX_TERM, or 0 if the index is
5792 more complicated than that. */
5795 get_index_scale (const struct address_info
*info
)
5797 rtx index
= *info
->index
;
5798 if (GET_CODE (index
) == MULT
5799 && CONST_INT_P (XEXP (index
, 1))
5800 && info
->index_term
== &XEXP (index
, 0))
5801 return INTVAL (XEXP (index
, 1));
5803 if (GET_CODE (index
) == ASHIFT
5804 && CONST_INT_P (XEXP (index
, 1))
5805 && info
->index_term
== &XEXP (index
, 0))
5806 return (HOST_WIDE_INT
) 1 << INTVAL (XEXP (index
, 1));
5808 if (info
->index
== info
->index_term
)
5814 /* Return the "index code" of INFO, in the form required by
5818 get_index_code (const struct address_info
*info
)
5821 return GET_CODE (*info
->index
);
5824 return GET_CODE (*info
->disp
);