1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011, 2012 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
44 #include "basic-block.h"
47 struct target_optabs default_target_optabs
;
48 struct target_libfuncs default_target_libfuncs
;
50 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
51 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
54 #define libfunc_hash \
55 (this_target_libfuncs->x_libfunc_hash)
57 /* Contains the optab used for each rtx code. */
58 optab code_to_optab
[NUM_RTX_CODE
+ 1];
60 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
62 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
63 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
65 /* Debug facility for use in GDB. */
66 void debug_optab_libfuncs (void);
68 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
69 #if ENABLE_DECIMAL_BID_FORMAT
70 #define DECIMAL_PREFIX "bid_"
72 #define DECIMAL_PREFIX "dpd_"
75 /* Used for libfunc_hash. */
78 hash_libfunc (const void *p
)
80 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
82 return (((int) e
->mode1
+ (int) e
->mode2
* NUM_MACHINE_MODES
)
86 /* Used for libfunc_hash. */
89 eq_libfunc (const void *p
, const void *q
)
91 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
92 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
94 return (e1
->optab
== e2
->optab
95 && e1
->mode1
== e2
->mode1
96 && e1
->mode2
== e2
->mode2
);
99 /* Return libfunc corresponding operation defined by OPTAB converting
100 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
101 if no libfunc is available. */
103 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
104 enum machine_mode mode2
)
106 struct libfunc_entry e
;
107 struct libfunc_entry
**slot
;
109 e
.optab
= (size_t) (optab
- &convert_optab_table
[0]);
112 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
115 if (optab
->libcall_gen
)
117 optab
->libcall_gen (optab
, optab
->libcall_basename
, mode1
, mode2
);
118 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
120 return (*slot
)->libfunc
;
126 return (*slot
)->libfunc
;
129 /* Return libfunc corresponding operation defined by OPTAB in MODE.
130 Trigger lazy initialization if needed, return NULL if no libfunc is
133 optab_libfunc (optab optab
, enum machine_mode mode
)
135 struct libfunc_entry e
;
136 struct libfunc_entry
**slot
;
138 e
.optab
= (size_t) (optab
- &optab_table
[0]);
141 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
144 if (optab
->libcall_gen
)
146 optab
->libcall_gen (optab
, optab
->libcall_basename
,
147 optab
->libcall_suffix
, mode
);
148 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
,
151 return (*slot
)->libfunc
;
157 return (*slot
)->libfunc
;
161 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
162 the result of operation CODE applied to OP0 (and OP1 if it is a binary
165 If the last insn does not set TARGET, don't do anything, but return 1.
167 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
168 don't add the REG_EQUAL note but return 0. Our caller can then try
169 again, ensuring that TARGET is not one of the operands. */
172 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
174 rtx last_insn
, insn
, set
;
177 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
179 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
180 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
181 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
182 && GET_RTX_CLASS (code
) != RTX_COMPARE
183 && GET_RTX_CLASS (code
) != RTX_UNARY
)
186 if (GET_CODE (target
) == ZERO_EXTRACT
)
189 for (last_insn
= insns
;
190 NEXT_INSN (last_insn
) != NULL_RTX
;
191 last_insn
= NEXT_INSN (last_insn
))
194 set
= single_set (last_insn
);
198 if (! rtx_equal_p (SET_DEST (set
), target
)
199 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
200 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
201 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
204 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
205 besides the last insn. */
206 if (reg_overlap_mentioned_p (target
, op0
)
207 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
209 insn
= PREV_INSN (last_insn
);
210 while (insn
!= NULL_RTX
)
212 if (reg_set_p (target
, insn
))
215 insn
= PREV_INSN (insn
);
219 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
229 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
231 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
232 if (GET_MODE_SIZE (GET_MODE (op0
))
233 > GET_MODE_SIZE (GET_MODE (target
)))
234 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
235 note
, GET_MODE (op0
));
237 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
238 note
, GET_MODE (op0
));
243 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
247 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
249 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
254 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
255 for a widening operation would be. In most cases this would be OP0, but if
256 that's a constant it'll be VOIDmode, which isn't useful. */
258 static enum machine_mode
259 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
261 enum machine_mode m0
= GET_MODE (op0
);
262 enum machine_mode m1
= GET_MODE (op1
);
263 enum machine_mode result
;
265 if (m0
== VOIDmode
&& m1
== VOIDmode
)
267 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
272 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
278 /* Find a widening optab even if it doesn't widen as much as we want.
279 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
280 direct HI->SI insn, then return SI->DI, if that exists.
281 If PERMIT_NON_WIDENING is non-zero then this can be used with
282 non-widening optabs also. */
285 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
286 enum machine_mode from_mode
,
287 int permit_non_widening
,
288 enum machine_mode
*found_mode
)
290 for (; (permit_non_widening
|| from_mode
!= to_mode
)
291 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
292 && from_mode
!= VOIDmode
;
293 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
295 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
298 if (handler
!= CODE_FOR_nothing
)
301 *found_mode
= from_mode
;
306 return CODE_FOR_nothing
;
309 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
310 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
311 not actually do a sign-extend or zero-extend, but can leave the
312 higher-order bits of the result rtx undefined, for example, in the case
313 of logical operations, but not right shifts. */
316 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
317 int unsignedp
, int no_extend
)
321 /* If we don't have to extend and this is a constant, return it. */
322 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
325 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
326 extend since it will be more efficient to do so unless the signedness of
327 a promoted object differs from our extension. */
329 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
330 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
331 return convert_modes (mode
, oldmode
, op
, unsignedp
);
333 /* If MODE is no wider than a single word, we return a paradoxical
335 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
336 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
338 /* Otherwise, get an object of MODE, clobber it, and set the low-order
341 result
= gen_reg_rtx (mode
);
342 emit_clobber (result
);
343 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
347 /* Return the optab used for computing the operation given by the tree code,
348 CODE and the tree EXP. This function is not always usable (for example, it
349 cannot give complete results for multiplication or division) but probably
350 ought to be relied on more widely throughout the expander. */
352 optab_for_tree_code (enum tree_code code
, const_tree type
,
353 enum optab_subtype subtype
)
365 return one_cmpl_optab
;
374 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
382 if (TYPE_SATURATING(type
))
383 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
384 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
387 if (TREE_CODE (type
) == VECTOR_TYPE
)
389 if (subtype
== optab_vector
)
390 return TYPE_SATURATING (type
) ? NULL
: vashl_optab
;
392 gcc_assert (subtype
== optab_scalar
);
394 if (TYPE_SATURATING(type
))
395 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
399 if (TREE_CODE (type
) == VECTOR_TYPE
)
401 if (subtype
== optab_vector
)
402 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
404 gcc_assert (subtype
== optab_scalar
);
406 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
409 if (TREE_CODE (type
) == VECTOR_TYPE
)
411 if (subtype
== optab_vector
)
414 gcc_assert (subtype
== optab_scalar
);
419 if (TREE_CODE (type
) == VECTOR_TYPE
)
421 if (subtype
== optab_vector
)
424 gcc_assert (subtype
== optab_scalar
);
429 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
432 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
434 case REALIGN_LOAD_EXPR
:
435 return vec_realign_load_optab
;
438 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
441 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
443 case WIDEN_MULT_PLUS_EXPR
:
444 return (TYPE_UNSIGNED (type
)
445 ? (TYPE_SATURATING (type
)
446 ? usmadd_widen_optab
: umadd_widen_optab
)
447 : (TYPE_SATURATING (type
)
448 ? ssmadd_widen_optab
: smadd_widen_optab
));
450 case WIDEN_MULT_MINUS_EXPR
:
451 return (TYPE_UNSIGNED (type
)
452 ? (TYPE_SATURATING (type
)
453 ? usmsub_widen_optab
: umsub_widen_optab
)
454 : (TYPE_SATURATING (type
)
455 ? ssmsub_widen_optab
: smsub_widen_optab
));
461 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
464 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
466 case REDUC_PLUS_EXPR
:
467 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
469 case VEC_LSHIFT_EXPR
:
470 return vec_shl_optab
;
472 case VEC_RSHIFT_EXPR
:
473 return vec_shr_optab
;
475 case VEC_WIDEN_MULT_HI_EXPR
:
476 return TYPE_UNSIGNED (type
) ?
477 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
479 case VEC_WIDEN_MULT_LO_EXPR
:
480 return TYPE_UNSIGNED (type
) ?
481 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
483 case VEC_WIDEN_LSHIFT_HI_EXPR
:
484 return TYPE_UNSIGNED (type
) ?
485 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
487 case VEC_WIDEN_LSHIFT_LO_EXPR
:
488 return TYPE_UNSIGNED (type
) ?
489 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
491 case VEC_UNPACK_HI_EXPR
:
492 return TYPE_UNSIGNED (type
) ?
493 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
495 case VEC_UNPACK_LO_EXPR
:
496 return TYPE_UNSIGNED (type
) ?
497 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
499 case VEC_UNPACK_FLOAT_HI_EXPR
:
500 /* The signedness is determined from input operand. */
501 return TYPE_UNSIGNED (type
) ?
502 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
504 case VEC_UNPACK_FLOAT_LO_EXPR
:
505 /* The signedness is determined from input operand. */
506 return TYPE_UNSIGNED (type
) ?
507 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
509 case VEC_PACK_TRUNC_EXPR
:
510 return vec_pack_trunc_optab
;
512 case VEC_PACK_SAT_EXPR
:
513 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
515 case VEC_PACK_FIX_TRUNC_EXPR
:
516 /* The signedness is determined from output operand. */
517 return TYPE_UNSIGNED (type
) ?
518 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
524 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
527 case POINTER_PLUS_EXPR
:
529 if (TYPE_SATURATING(type
))
530 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
531 return trapv
? addv_optab
: add_optab
;
534 if (TYPE_SATURATING(type
))
535 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
536 return trapv
? subv_optab
: sub_optab
;
539 if (TYPE_SATURATING(type
))
540 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
541 return trapv
? smulv_optab
: smul_optab
;
544 if (TYPE_SATURATING(type
))
545 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
546 return trapv
? negv_optab
: neg_optab
;
549 return trapv
? absv_optab
: abs_optab
;
557 /* Expand vector widening operations.
559 There are two different classes of operations handled here:
560 1) Operations whose result is wider than all the arguments to the operation.
561 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
562 In this case OP0 and optionally OP1 would be initialized,
563 but WIDE_OP wouldn't (not relevant for this case).
564 2) Operations whose result is of the same size as the last argument to the
565 operation, but wider than all the other arguments to the operation.
566 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
567 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
569 E.g, when called to expand the following operations, this is how
570 the arguments will be initialized:
572 widening-sum 2 oprnd0 - oprnd1
573 widening-dot-product 3 oprnd0 oprnd1 oprnd2
574 widening-mult 2 oprnd0 oprnd1 -
575 type-promotion (vec-unpack) 1 oprnd0 - - */
578 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
579 rtx target
, int unsignedp
)
581 struct expand_operand eops
[4];
582 tree oprnd0
, oprnd1
, oprnd2
;
583 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
584 optab widen_pattern_optab
;
585 enum insn_code icode
;
586 int nops
= TREE_CODE_LENGTH (ops
->code
);
590 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
591 widen_pattern_optab
=
592 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
593 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
594 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
595 icode
= find_widening_optab_handler (widen_pattern_optab
,
596 TYPE_MODE (TREE_TYPE (ops
->op2
)),
599 icode
= optab_handler (widen_pattern_optab
, tmode0
);
600 gcc_assert (icode
!= CODE_FOR_nothing
);
605 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
608 /* The last operand is of a wider mode than the rest of the operands. */
613 gcc_assert (tmode1
== tmode0
);
616 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
620 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
621 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
623 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
625 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
626 expand_insn (icode
, op
, eops
);
627 return eops
[0].value
;
630 /* Generate code to perform an operation specified by TERNARY_OPTAB
631 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
633 UNSIGNEDP is for the case where we have to widen the operands
634 to perform the operation. It says to use zero-extension.
636 If TARGET is nonzero, the value
637 is generated there, if it is convenient to do so.
638 In all cases an rtx is returned for the locus of the value;
639 this may or may not be TARGET. */
642 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
643 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
645 struct expand_operand ops
[4];
646 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
648 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
650 create_output_operand (&ops
[0], target
, mode
);
651 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
652 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
653 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
654 expand_insn (icode
, 4, ops
);
659 /* Like expand_binop, but return a constant rtx if the result can be
660 calculated at compile time. The arguments and return value are
661 otherwise the same as for expand_binop. */
664 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
665 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
666 enum optab_methods methods
)
668 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
670 rtx x
= simplify_binary_operation (binoptab
->code
, mode
, op0
, op1
);
676 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
679 /* Like simplify_expand_binop, but always put the result in TARGET.
680 Return true if the expansion succeeded. */
683 force_expand_binop (enum machine_mode mode
, optab binoptab
,
684 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
685 enum optab_methods methods
)
687 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
688 target
, unsignedp
, methods
);
692 emit_move_insn (target
, x
);
696 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
699 expand_vec_shift_expr (sepops ops
, rtx target
)
701 struct expand_operand eops
[3];
702 enum insn_code icode
;
703 rtx rtx_op1
, rtx_op2
;
704 enum machine_mode mode
= TYPE_MODE (ops
->type
);
705 tree vec_oprnd
= ops
->op0
;
706 tree shift_oprnd
= ops
->op1
;
711 case VEC_RSHIFT_EXPR
:
712 shift_optab
= vec_shr_optab
;
714 case VEC_LSHIFT_EXPR
:
715 shift_optab
= vec_shl_optab
;
721 icode
= optab_handler (shift_optab
, mode
);
722 gcc_assert (icode
!= CODE_FOR_nothing
);
724 rtx_op1
= expand_normal (vec_oprnd
);
725 rtx_op2
= expand_normal (shift_oprnd
);
727 create_output_operand (&eops
[0], target
, mode
);
728 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
729 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
730 expand_insn (icode
, 3, eops
);
732 return eops
[0].value
;
735 /* Create a new vector value in VMODE with all elements set to OP. The
736 mode of OP must be the element mode of VMODE. If OP is a constant,
737 then the return value will be a constant. */
740 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
742 enum insn_code icode
;
747 gcc_checking_assert (VECTOR_MODE_P (vmode
));
749 n
= GET_MODE_NUNITS (vmode
);
750 vec
= rtvec_alloc (n
);
751 for (i
= 0; i
< n
; ++i
)
752 RTVEC_ELT (vec
, i
) = op
;
755 return gen_rtx_CONST_VECTOR (vmode
, vec
);
757 /* ??? If the target doesn't have a vec_init, then we have no easy way
758 of performing this operation. Most of this sort of generic support
759 is hidden away in the vector lowering support in gimple. */
760 icode
= optab_handler (vec_init_optab
, vmode
);
761 if (icode
== CODE_FOR_nothing
)
764 ret
= gen_reg_rtx (vmode
);
765 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
770 /* This subroutine of expand_doubleword_shift handles the cases in which
771 the effective shift value is >= BITS_PER_WORD. The arguments and return
772 value are the same as for the parent routine, except that SUPERWORD_OP1
773 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
774 INTO_TARGET may be null if the caller has decided to calculate it. */
777 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
778 rtx outof_target
, rtx into_target
,
779 int unsignedp
, enum optab_methods methods
)
781 if (into_target
!= 0)
782 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
783 into_target
, unsignedp
, methods
))
786 if (outof_target
!= 0)
788 /* For a signed right shift, we must fill OUTOF_TARGET with copies
789 of the sign bit, otherwise we must fill it with zeros. */
790 if (binoptab
!= ashr_optab
)
791 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
793 if (!force_expand_binop (word_mode
, binoptab
,
794 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
795 outof_target
, unsignedp
, methods
))
801 /* This subroutine of expand_doubleword_shift handles the cases in which
802 the effective shift value is < BITS_PER_WORD. The arguments and return
803 value are the same as for the parent routine. */
806 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
807 rtx outof_input
, rtx into_input
, rtx op1
,
808 rtx outof_target
, rtx into_target
,
809 int unsignedp
, enum optab_methods methods
,
810 unsigned HOST_WIDE_INT shift_mask
)
812 optab reverse_unsigned_shift
, unsigned_shift
;
815 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
816 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
818 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
819 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
820 the opposite direction to BINOPTAB. */
821 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
823 carries
= outof_input
;
824 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
825 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
830 /* We must avoid shifting by BITS_PER_WORD bits since that is either
831 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
832 has unknown behavior. Do a single shift first, then shift by the
833 remainder. It's OK to use ~OP1 as the remainder if shift counts
834 are truncated to the mode size. */
835 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
836 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
837 if (shift_mask
== BITS_PER_WORD
- 1)
839 tmp
= immed_double_const (-1, -1, op1_mode
);
840 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
845 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
846 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
850 if (tmp
== 0 || carries
== 0)
852 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
853 carries
, tmp
, 0, unsignedp
, methods
);
857 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
858 so the result can go directly into INTO_TARGET if convenient. */
859 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
860 into_target
, unsignedp
, methods
);
864 /* Now OR in the bits carried over from OUTOF_INPUT. */
865 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
866 into_target
, unsignedp
, methods
))
869 /* Use a standard word_mode shift for the out-of half. */
870 if (outof_target
!= 0)
871 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
872 outof_target
, unsignedp
, methods
))
879 #ifdef HAVE_conditional_move
880 /* Try implementing expand_doubleword_shift using conditional moves.
881 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
882 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
883 are the shift counts to use in the former and latter case. All other
884 arguments are the same as the parent routine. */
887 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
888 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
889 rtx outof_input
, rtx into_input
,
890 rtx subword_op1
, rtx superword_op1
,
891 rtx outof_target
, rtx into_target
,
892 int unsignedp
, enum optab_methods methods
,
893 unsigned HOST_WIDE_INT shift_mask
)
895 rtx outof_superword
, into_superword
;
897 /* Put the superword version of the output into OUTOF_SUPERWORD and
899 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
900 if (outof_target
!= 0 && subword_op1
== superword_op1
)
902 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
903 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
904 into_superword
= outof_target
;
905 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
906 outof_superword
, 0, unsignedp
, methods
))
911 into_superword
= gen_reg_rtx (word_mode
);
912 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
913 outof_superword
, into_superword
,
918 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
919 if (!expand_subword_shift (op1_mode
, binoptab
,
920 outof_input
, into_input
, subword_op1
,
921 outof_target
, into_target
,
922 unsignedp
, methods
, shift_mask
))
925 /* Select between them. Do the INTO half first because INTO_SUPERWORD
926 might be the current value of OUTOF_TARGET. */
927 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
928 into_target
, into_superword
, word_mode
, false))
931 if (outof_target
!= 0)
932 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
933 outof_target
, outof_superword
,
941 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
942 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
943 input operand; the shift moves bits in the direction OUTOF_INPUT->
944 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
945 of the target. OP1 is the shift count and OP1_MODE is its mode.
946 If OP1 is constant, it will have been truncated as appropriate
947 and is known to be nonzero.
949 If SHIFT_MASK is zero, the result of word shifts is undefined when the
950 shift count is outside the range [0, BITS_PER_WORD). This routine must
951 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
953 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
954 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
955 fill with zeros or sign bits as appropriate.
957 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
958 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
959 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
960 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
963 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
964 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
965 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
966 function wants to calculate it itself.
968 Return true if the shift could be successfully synthesized. */
971 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
972 rtx outof_input
, rtx into_input
, rtx op1
,
973 rtx outof_target
, rtx into_target
,
974 int unsignedp
, enum optab_methods methods
,
975 unsigned HOST_WIDE_INT shift_mask
)
977 rtx superword_op1
, tmp
, cmp1
, cmp2
;
978 rtx subword_label
, done_label
;
979 enum rtx_code cmp_code
;
981 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
982 fill the result with sign or zero bits as appropriate. If so, the value
983 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
984 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
985 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
987 This isn't worthwhile for constant shifts since the optimizers will
988 cope better with in-range shift counts. */
989 if (shift_mask
>= BITS_PER_WORD
991 && !CONSTANT_P (op1
))
993 if (!expand_doubleword_shift (op1_mode
, binoptab
,
994 outof_input
, into_input
, op1
,
996 unsignedp
, methods
, shift_mask
))
998 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
999 outof_target
, unsignedp
, methods
))
1004 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1005 is true when the effective shift value is less than BITS_PER_WORD.
1006 Set SUPERWORD_OP1 to the shift count that should be used to shift
1007 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1008 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1009 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1011 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1012 is a subword shift count. */
1013 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1015 cmp2
= CONST0_RTX (op1_mode
);
1017 superword_op1
= op1
;
1021 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1022 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1024 cmp2
= CONST0_RTX (op1_mode
);
1026 superword_op1
= cmp1
;
1031 /* If we can compute the condition at compile time, pick the
1032 appropriate subroutine. */
1033 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1034 if (tmp
!= 0 && CONST_INT_P (tmp
))
1036 if (tmp
== const0_rtx
)
1037 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1038 outof_target
, into_target
,
1039 unsignedp
, methods
);
1041 return expand_subword_shift (op1_mode
, binoptab
,
1042 outof_input
, into_input
, op1
,
1043 outof_target
, into_target
,
1044 unsignedp
, methods
, shift_mask
);
1047 #ifdef HAVE_conditional_move
1048 /* Try using conditional moves to generate straight-line code. */
1050 rtx start
= get_last_insn ();
1051 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1052 cmp_code
, cmp1
, cmp2
,
1053 outof_input
, into_input
,
1055 outof_target
, into_target
,
1056 unsignedp
, methods
, shift_mask
))
1058 delete_insns_since (start
);
1062 /* As a last resort, use branches to select the correct alternative. */
1063 subword_label
= gen_label_rtx ();
1064 done_label
= gen_label_rtx ();
1067 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1068 0, 0, subword_label
, -1);
1071 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1072 outof_target
, into_target
,
1073 unsignedp
, methods
))
1076 emit_jump_insn (gen_jump (done_label
));
1078 emit_label (subword_label
);
1080 if (!expand_subword_shift (op1_mode
, binoptab
,
1081 outof_input
, into_input
, op1
,
1082 outof_target
, into_target
,
1083 unsignedp
, methods
, shift_mask
))
1086 emit_label (done_label
);
1090 /* Subroutine of expand_binop. Perform a double word multiplication of
1091 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1092 as the target's word_mode. This function return NULL_RTX if anything
1093 goes wrong, in which case it may have already emitted instructions
1094 which need to be deleted.
1096 If we want to multiply two two-word values and have normal and widening
1097 multiplies of single-word values, we can do this with three smaller
1100 The multiplication proceeds as follows:
1101 _______________________
1102 [__op0_high_|__op0_low__]
1103 _______________________
1104 * [__op1_high_|__op1_low__]
1105 _______________________________________________
1106 _______________________
1107 (1) [__op0_low__*__op1_low__]
1108 _______________________
1109 (2a) [__op0_low__*__op1_high_]
1110 _______________________
1111 (2b) [__op0_high_*__op1_low__]
1112 _______________________
1113 (3) [__op0_high_*__op1_high_]
1116 This gives a 4-word result. Since we are only interested in the
1117 lower 2 words, partial result (3) and the upper words of (2a) and
1118 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1119 calculated using non-widening multiplication.
1121 (1), however, needs to be calculated with an unsigned widening
1122 multiplication. If this operation is not directly supported we
1123 try using a signed widening multiplication and adjust the result.
1124 This adjustment works as follows:
1126 If both operands are positive then no adjustment is needed.
1128 If the operands have different signs, for example op0_low < 0 and
1129 op1_low >= 0, the instruction treats the most significant bit of
1130 op0_low as a sign bit instead of a bit with significance
1131 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1132 with 2**BITS_PER_WORD - op0_low, and two's complements the
1133 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1136 Similarly, if both operands are negative, we need to add
1137 (op0_low + op1_low) * 2**BITS_PER_WORD.
1139 We use a trick to adjust quickly. We logically shift op0_low right
1140 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1141 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1142 logical shift exists, we do an arithmetic right shift and subtract
1146 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1147 bool umulp
, enum optab_methods methods
)
1149 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1150 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1151 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1152 rtx product
, adjust
, product_high
, temp
;
1154 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1155 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1156 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1157 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1159 /* If we're using an unsigned multiply to directly compute the product
1160 of the low-order words of the operands and perform any required
1161 adjustments of the operands, we begin by trying two more multiplications
1162 and then computing the appropriate sum.
1164 We have checked above that the required addition is provided.
1165 Full-word addition will normally always succeed, especially if
1166 it is provided at all, so we don't worry about its failure. The
1167 multiplication may well fail, however, so we do handle that. */
1171 /* ??? This could be done with emit_store_flag where available. */
1172 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1173 NULL_RTX
, 1, methods
);
1175 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1176 NULL_RTX
, 0, OPTAB_DIRECT
);
1179 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1180 NULL_RTX
, 0, methods
);
1183 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1184 NULL_RTX
, 0, OPTAB_DIRECT
);
1191 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1192 NULL_RTX
, 0, OPTAB_DIRECT
);
1196 /* OP0_HIGH should now be dead. */
1200 /* ??? This could be done with emit_store_flag where available. */
1201 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1202 NULL_RTX
, 1, methods
);
1204 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1205 NULL_RTX
, 0, OPTAB_DIRECT
);
1208 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1209 NULL_RTX
, 0, methods
);
1212 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1213 NULL_RTX
, 0, OPTAB_DIRECT
);
1220 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1221 NULL_RTX
, 0, OPTAB_DIRECT
);
1225 /* OP1_HIGH should now be dead. */
1227 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1228 NULL_RTX
, 0, OPTAB_DIRECT
);
1230 if (target
&& !REG_P (target
))
1234 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1235 target
, 1, OPTAB_DIRECT
);
1237 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1238 target
, 1, OPTAB_DIRECT
);
1243 product_high
= operand_subword (product
, high
, 1, mode
);
1244 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1245 NULL_RTX
, 0, OPTAB_DIRECT
);
1246 emit_move_insn (product_high
, adjust
);
1250 /* Wrapper around expand_binop which takes an rtx code to specify
1251 the operation to perform, not an optab pointer. All other
1252 arguments are the same. */
1254 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1255 rtx op1
, rtx target
, int unsignedp
,
1256 enum optab_methods methods
)
1258 optab binop
= code_to_optab
[(int) code
];
1261 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1264 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1265 binop. Order them according to commutative_operand_precedence and, if
1266 possible, try to put TARGET or a pseudo first. */
1268 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1270 int op0_prec
= commutative_operand_precedence (op0
);
1271 int op1_prec
= commutative_operand_precedence (op1
);
1273 if (op0_prec
< op1_prec
)
1276 if (op0_prec
> op1_prec
)
1279 /* With equal precedence, both orders are ok, but it is better if the
1280 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1281 if (target
== 0 || REG_P (target
))
1282 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1284 return rtx_equal_p (op1
, target
);
1287 /* Return true if BINOPTAB implements a shift operation. */
1290 shift_optab_p (optab binoptab
)
1292 switch (binoptab
->code
)
1308 /* Return true if BINOPTAB implements a commutative binary operation. */
1311 commutative_optab_p (optab binoptab
)
1313 return (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
1314 || binoptab
== smul_widen_optab
1315 || binoptab
== umul_widen_optab
1316 || binoptab
== smul_highpart_optab
1317 || binoptab
== umul_highpart_optab
);
1320 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1321 optimizing, and if the operand is a constant that costs more than
1322 1 instruction, force the constant into a register and return that
1323 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1326 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1327 int opn
, rtx x
, bool unsignedp
)
1329 bool speed
= optimize_insn_for_speed_p ();
1331 if (mode
!= VOIDmode
1334 && rtx_cost (x
, binoptab
->code
, opn
, speed
) > set_src_cost (x
, speed
))
1336 if (CONST_INT_P (x
))
1338 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1339 if (intval
!= INTVAL (x
))
1340 x
= GEN_INT (intval
);
1343 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1344 x
= force_reg (mode
, x
);
1349 /* Helper function for expand_binop: handle the case where there
1350 is an insn that directly implements the indicated operation.
1351 Returns null if this is not possible. */
1353 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1355 rtx target
, int unsignedp
, enum optab_methods methods
,
1358 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1359 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1361 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1362 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1363 enum machine_mode mode0
, mode1
, tmp_mode
;
1364 struct expand_operand ops
[3];
1367 rtx xop0
= op0
, xop1
= op1
;
1370 /* If it is a commutative operator and the modes would match
1371 if we would swap the operands, we can save the conversions. */
1372 commutative_p
= commutative_optab_p (binoptab
);
1374 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1375 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1382 /* If we are optimizing, force expensive constants into a register. */
1383 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1384 if (!shift_optab_p (binoptab
))
1385 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1387 /* In case the insn wants input operands in modes different from
1388 those of the actual operands, convert the operands. It would
1389 seem that we don't need to convert CONST_INTs, but we do, so
1390 that they're properly zero-extended, sign-extended or truncated
1393 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1394 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1396 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1400 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1401 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1403 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1407 /* If operation is commutative,
1408 try to make the first operand a register.
1409 Even better, try to make it the same as the target.
1410 Also try to make the last operand a constant. */
1412 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1419 /* Now, if insn's predicates don't allow our operands, put them into
1422 if (binoptab
== vec_pack_trunc_optab
1423 || binoptab
== vec_pack_usat_optab
1424 || binoptab
== vec_pack_ssat_optab
1425 || binoptab
== vec_pack_ufix_trunc_optab
1426 || binoptab
== vec_pack_sfix_trunc_optab
)
1428 /* The mode of the result is different then the mode of the
1430 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1431 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1433 delete_insns_since (last
);
1440 create_output_operand (&ops
[0], target
, tmp_mode
);
1441 create_input_operand (&ops
[1], xop0
, mode0
);
1442 create_input_operand (&ops
[2], xop1
, mode1
);
1443 pat
= maybe_gen_insn (icode
, 3, ops
);
1446 /* If PAT is composed of more than one insn, try to add an appropriate
1447 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1448 operand, call expand_binop again, this time without a target. */
1449 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1450 && ! add_equal_note (pat
, ops
[0].value
, binoptab
->code
,
1451 ops
[1].value
, ops
[2].value
))
1453 delete_insns_since (last
);
1454 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1455 unsignedp
, methods
);
1459 return ops
[0].value
;
1461 delete_insns_since (last
);
1465 /* Generate code to perform an operation specified by BINOPTAB
1466 on operands OP0 and OP1, with result having machine-mode MODE.
1468 UNSIGNEDP is for the case where we have to widen the operands
1469 to perform the operation. It says to use zero-extension.
1471 If TARGET is nonzero, the value
1472 is generated there, if it is convenient to do so.
1473 In all cases an rtx is returned for the locus of the value;
1474 this may or may not be TARGET. */
1477 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1478 rtx target
, int unsignedp
, enum optab_methods methods
)
1480 enum optab_methods next_methods
1481 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1482 ? OPTAB_WIDEN
: methods
);
1483 enum mode_class mclass
;
1484 enum machine_mode wider_mode
;
1487 rtx entry_last
= get_last_insn ();
1490 mclass
= GET_MODE_CLASS (mode
);
1492 /* If subtracting an integer constant, convert this into an addition of
1493 the negated constant. */
1495 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1497 op1
= negate_rtx (mode
, op1
);
1498 binoptab
= add_optab
;
1501 /* Record where to delete back to if we backtrack. */
1502 last
= get_last_insn ();
1504 /* If we can do it with a three-operand insn, do so. */
1506 if (methods
!= OPTAB_MUST_WIDEN
1507 && find_widening_optab_handler (binoptab
, mode
,
1508 widened_mode (mode
, op0
, op1
), 1)
1509 != CODE_FOR_nothing
)
1511 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1512 unsignedp
, methods
, last
);
1517 /* If we were trying to rotate, and that didn't work, try rotating
1518 the other direction before falling back to shifts and bitwise-or. */
1519 if (((binoptab
== rotl_optab
1520 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1521 || (binoptab
== rotr_optab
1522 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1523 && mclass
== MODE_INT
)
1525 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1527 unsigned int bits
= GET_MODE_PRECISION (mode
);
1529 if (CONST_INT_P (op1
))
1530 newop1
= GEN_INT (bits
- INTVAL (op1
));
1531 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1532 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1534 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1535 GEN_INT (bits
), op1
,
1536 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1538 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1539 target
, unsignedp
, methods
, last
);
1544 /* If this is a multiply, see if we can do a widening operation that
1545 takes operands of this mode and makes a wider mode. */
1547 if (binoptab
== smul_optab
1548 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1549 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1550 : smul_widen_optab
),
1551 GET_MODE_2XWIDER_MODE (mode
), mode
)
1552 != CODE_FOR_nothing
))
1554 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1555 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1556 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1560 if (GET_MODE_CLASS (mode
) == MODE_INT
1561 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1562 return gen_lowpart (mode
, temp
);
1564 return convert_to_mode (mode
, temp
, unsignedp
);
1568 /* If this is a vector shift by a scalar, see if we can do a vector
1569 shift by a vector. If so, broadcast the scalar into a vector. */
1570 if (mclass
== MODE_VECTOR_INT
)
1572 optab otheroptab
= NULL
;
1574 if (binoptab
== ashl_optab
)
1575 otheroptab
= vashl_optab
;
1576 else if (binoptab
== ashr_optab
)
1577 otheroptab
= vashr_optab
;
1578 else if (binoptab
== lshr_optab
)
1579 otheroptab
= vlshr_optab
;
1580 else if (binoptab
== rotl_optab
)
1581 otheroptab
= vrotl_optab
;
1582 else if (binoptab
== rotr_optab
)
1583 otheroptab
= vrotr_optab
;
1585 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1587 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1590 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1591 target
, unsignedp
, methods
, last
);
1598 /* Look for a wider mode of the same class for which we think we
1599 can open-code the operation. Check for a widening multiply at the
1600 wider mode as well. */
1602 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1603 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1604 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1605 wider_mode
!= VOIDmode
;
1606 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1608 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1609 || (binoptab
== smul_optab
1610 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1611 && (find_widening_optab_handler ((unsignedp
1613 : smul_widen_optab
),
1614 GET_MODE_WIDER_MODE (wider_mode
),
1616 != CODE_FOR_nothing
)))
1618 rtx xop0
= op0
, xop1
= op1
;
1621 /* For certain integer operations, we need not actually extend
1622 the narrow operands, as long as we will truncate
1623 the results to the same narrowness. */
1625 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1626 || binoptab
== xor_optab
1627 || binoptab
== add_optab
|| binoptab
== sub_optab
1628 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1629 && mclass
== MODE_INT
)
1632 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1634 if (binoptab
!= ashl_optab
)
1635 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1639 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1641 /* The second operand of a shift must always be extended. */
1642 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1643 no_extend
&& binoptab
!= ashl_optab
);
1645 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1646 unsignedp
, OPTAB_DIRECT
);
1649 if (mclass
!= MODE_INT
1650 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1653 target
= gen_reg_rtx (mode
);
1654 convert_move (target
, temp
, 0);
1658 return gen_lowpart (mode
, temp
);
1661 delete_insns_since (last
);
1665 /* If operation is commutative,
1666 try to make the first operand a register.
1667 Even better, try to make it the same as the target.
1668 Also try to make the last operand a constant. */
1669 if (commutative_optab_p (binoptab
)
1670 && swap_commutative_operands_with_target (target
, op0
, op1
))
1677 /* These can be done a word at a time. */
1678 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1679 && mclass
== MODE_INT
1680 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1681 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1686 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1687 won't be accurate, so use a new target. */
1691 || !valid_multiword_target_p (target
))
1692 target
= gen_reg_rtx (mode
);
1696 /* Do the actual arithmetic. */
1697 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1699 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1700 rtx x
= expand_binop (word_mode
, binoptab
,
1701 operand_subword_force (op0
, i
, mode
),
1702 operand_subword_force (op1
, i
, mode
),
1703 target_piece
, unsignedp
, next_methods
);
1708 if (target_piece
!= x
)
1709 emit_move_insn (target_piece
, x
);
1712 insns
= get_insns ();
1715 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1722 /* Synthesize double word shifts from single word shifts. */
1723 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1724 || binoptab
== ashr_optab
)
1725 && mclass
== MODE_INT
1726 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1727 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1728 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1729 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1730 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1731 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1733 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1734 enum machine_mode op1_mode
;
1736 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1737 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1738 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1740 /* Apply the truncation to constant shifts. */
1741 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1742 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1744 if (op1
== CONST0_RTX (op1_mode
))
1747 /* Make sure that this is a combination that expand_doubleword_shift
1748 can handle. See the comments there for details. */
1749 if (double_shift_mask
== 0
1750 || (shift_mask
== BITS_PER_WORD
- 1
1751 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1754 rtx into_target
, outof_target
;
1755 rtx into_input
, outof_input
;
1756 int left_shift
, outof_word
;
1758 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1759 won't be accurate, so use a new target. */
1763 || !valid_multiword_target_p (target
))
1764 target
= gen_reg_rtx (mode
);
1768 /* OUTOF_* is the word we are shifting bits away from, and
1769 INTO_* is the word that we are shifting bits towards, thus
1770 they differ depending on the direction of the shift and
1771 WORDS_BIG_ENDIAN. */
1773 left_shift
= binoptab
== ashl_optab
;
1774 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1776 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1777 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1779 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1780 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1782 if (expand_doubleword_shift (op1_mode
, binoptab
,
1783 outof_input
, into_input
, op1
,
1784 outof_target
, into_target
,
1785 unsignedp
, next_methods
, shift_mask
))
1787 insns
= get_insns ();
1797 /* Synthesize double word rotates from single word shifts. */
1798 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1799 && mclass
== MODE_INT
1800 && CONST_INT_P (op1
)
1801 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1802 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1803 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1806 rtx into_target
, outof_target
;
1807 rtx into_input
, outof_input
;
1809 int shift_count
, left_shift
, outof_word
;
1811 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1812 won't be accurate, so use a new target. Do this also if target is not
1813 a REG, first because having a register instead may open optimization
1814 opportunities, and second because if target and op0 happen to be MEMs
1815 designating the same location, we would risk clobbering it too early
1816 in the code sequence we generate below. */
1821 || !valid_multiword_target_p (target
))
1822 target
= gen_reg_rtx (mode
);
1826 shift_count
= INTVAL (op1
);
1828 /* OUTOF_* is the word we are shifting bits away from, and
1829 INTO_* is the word that we are shifting bits towards, thus
1830 they differ depending on the direction of the shift and
1831 WORDS_BIG_ENDIAN. */
1833 left_shift
= (binoptab
== rotl_optab
);
1834 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1836 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1837 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1839 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1840 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1842 if (shift_count
== BITS_PER_WORD
)
1844 /* This is just a word swap. */
1845 emit_move_insn (outof_target
, into_input
);
1846 emit_move_insn (into_target
, outof_input
);
1851 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1852 rtx first_shift_count
, second_shift_count
;
1853 optab reverse_unsigned_shift
, unsigned_shift
;
1855 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1856 ? lshr_optab
: ashl_optab
);
1858 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1859 ? ashl_optab
: lshr_optab
);
1861 if (shift_count
> BITS_PER_WORD
)
1863 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1864 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1868 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1869 second_shift_count
= GEN_INT (shift_count
);
1872 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1873 outof_input
, first_shift_count
,
1874 NULL_RTX
, unsignedp
, next_methods
);
1875 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1876 into_input
, second_shift_count
,
1877 NULL_RTX
, unsignedp
, next_methods
);
1879 if (into_temp1
!= 0 && into_temp2
!= 0)
1880 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1881 into_target
, unsignedp
, next_methods
);
1885 if (inter
!= 0 && inter
!= into_target
)
1886 emit_move_insn (into_target
, inter
);
1888 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1889 into_input
, first_shift_count
,
1890 NULL_RTX
, unsignedp
, next_methods
);
1891 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1892 outof_input
, second_shift_count
,
1893 NULL_RTX
, unsignedp
, next_methods
);
1895 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1896 inter
= expand_binop (word_mode
, ior_optab
,
1897 outof_temp1
, outof_temp2
,
1898 outof_target
, unsignedp
, next_methods
);
1900 if (inter
!= 0 && inter
!= outof_target
)
1901 emit_move_insn (outof_target
, inter
);
1904 insns
= get_insns ();
1914 /* These can be done a word at a time by propagating carries. */
1915 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1916 && mclass
== MODE_INT
1917 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1918 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1921 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1922 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1923 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1924 rtx xop0
, xop1
, xtarget
;
1926 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1927 value is one of those, use it. Otherwise, use 1 since it is the
1928 one easiest to get. */
1929 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1930 int normalizep
= STORE_FLAG_VALUE
;
1935 /* Prepare the operands. */
1936 xop0
= force_reg (mode
, op0
);
1937 xop1
= force_reg (mode
, op1
);
1939 xtarget
= gen_reg_rtx (mode
);
1941 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1944 /* Indicate for flow that the entire target reg is being set. */
1946 emit_clobber (xtarget
);
1948 /* Do the actual arithmetic. */
1949 for (i
= 0; i
< nwords
; i
++)
1951 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1952 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1953 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1954 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1957 /* Main add/subtract of the input operands. */
1958 x
= expand_binop (word_mode
, binoptab
,
1959 op0_piece
, op1_piece
,
1960 target_piece
, unsignedp
, next_methods
);
1966 /* Store carry from main add/subtract. */
1967 carry_out
= gen_reg_rtx (word_mode
);
1968 carry_out
= emit_store_flag_force (carry_out
,
1969 (binoptab
== add_optab
1972 word_mode
, 1, normalizep
);
1979 /* Add/subtract previous carry to main result. */
1980 newx
= expand_binop (word_mode
,
1981 normalizep
== 1 ? binoptab
: otheroptab
,
1983 NULL_RTX
, 1, next_methods
);
1987 /* Get out carry from adding/subtracting carry in. */
1988 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1989 carry_tmp
= emit_store_flag_force (carry_tmp
,
1990 (binoptab
== add_optab
1993 word_mode
, 1, normalizep
);
1995 /* Logical-ior the two poss. carry together. */
1996 carry_out
= expand_binop (word_mode
, ior_optab
,
1997 carry_out
, carry_tmp
,
1998 carry_out
, 0, next_methods
);
2002 emit_move_insn (target_piece
, newx
);
2006 if (x
!= target_piece
)
2007 emit_move_insn (target_piece
, x
);
2010 carry_in
= carry_out
;
2013 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2015 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2016 || ! rtx_equal_p (target
, xtarget
))
2018 rtx temp
= emit_move_insn (target
, xtarget
);
2020 set_dst_reg_note (temp
, REG_EQUAL
,
2021 gen_rtx_fmt_ee (binoptab
->code
, mode
,
2033 delete_insns_since (last
);
2036 /* Attempt to synthesize double word multiplies using a sequence of word
2037 mode multiplications. We first attempt to generate a sequence using a
2038 more efficient unsigned widening multiply, and if that fails we then
2039 try using a signed widening multiply. */
2041 if (binoptab
== smul_optab
2042 && mclass
== MODE_INT
2043 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2044 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2045 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2047 rtx product
= NULL_RTX
;
2048 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2049 != CODE_FOR_nothing
)
2051 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2054 delete_insns_since (last
);
2057 if (product
== NULL_RTX
2058 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2059 != CODE_FOR_nothing
)
2061 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2064 delete_insns_since (last
);
2067 if (product
!= NULL_RTX
)
2069 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2071 temp
= emit_move_insn (target
? target
: product
, product
);
2072 set_dst_reg_note (temp
,
2074 gen_rtx_fmt_ee (MULT
, mode
,
2077 target
? target
: product
);
2083 /* It can't be open-coded in this mode.
2084 Use a library call if one is available and caller says that's ok. */
2086 libfunc
= optab_libfunc (binoptab
, mode
);
2088 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2092 enum machine_mode op1_mode
= mode
;
2097 if (shift_optab_p (binoptab
))
2099 op1_mode
= targetm
.libgcc_shift_count_mode ();
2100 /* Specify unsigned here,
2101 since negative shift counts are meaningless. */
2102 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2105 if (GET_MODE (op0
) != VOIDmode
2106 && GET_MODE (op0
) != mode
)
2107 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2109 /* Pass 1 for NO_QUEUE so we don't lose any increments
2110 if the libcall is cse'd or moved. */
2111 value
= emit_library_call_value (libfunc
,
2112 NULL_RTX
, LCT_CONST
, mode
, 2,
2113 op0
, mode
, op1x
, op1_mode
);
2115 insns
= get_insns ();
2118 target
= gen_reg_rtx (mode
);
2119 emit_libcall_block_1 (insns
, target
, value
,
2120 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
),
2121 trapv_binoptab_p (binoptab
));
2126 delete_insns_since (last
);
2128 /* It can't be done in this mode. Can we do it in a wider mode? */
2130 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2131 || methods
== OPTAB_MUST_WIDEN
))
2133 /* Caller says, don't even try. */
2134 delete_insns_since (entry_last
);
2138 /* Compute the value of METHODS to pass to recursive calls.
2139 Don't allow widening to be tried recursively. */
2141 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2143 /* Look for a wider mode of the same class for which it appears we can do
2146 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2148 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2149 wider_mode
!= VOIDmode
;
2150 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2152 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2154 || (methods
== OPTAB_LIB
2155 && optab_libfunc (binoptab
, wider_mode
)))
2157 rtx xop0
= op0
, xop1
= op1
;
2160 /* For certain integer operations, we need not actually extend
2161 the narrow operands, as long as we will truncate
2162 the results to the same narrowness. */
2164 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2165 || binoptab
== xor_optab
2166 || binoptab
== add_optab
|| binoptab
== sub_optab
2167 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2168 && mclass
== MODE_INT
)
2171 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2172 unsignedp
, no_extend
);
2174 /* The second operand of a shift must always be extended. */
2175 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2176 no_extend
&& binoptab
!= ashl_optab
);
2178 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2179 unsignedp
, methods
);
2182 if (mclass
!= MODE_INT
2183 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2186 target
= gen_reg_rtx (mode
);
2187 convert_move (target
, temp
, 0);
2191 return gen_lowpart (mode
, temp
);
2194 delete_insns_since (last
);
2199 delete_insns_since (entry_last
);
2203 /* Expand a binary operator which has both signed and unsigned forms.
2204 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2207 If we widen unsigned operands, we may use a signed wider operation instead
2208 of an unsigned wider operation, since the result would be the same. */
2211 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2212 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2213 enum optab_methods methods
)
2216 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2217 struct optab_d wide_soptab
;
2219 /* Do it without widening, if possible. */
2220 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2221 unsignedp
, OPTAB_DIRECT
);
2222 if (temp
|| methods
== OPTAB_DIRECT
)
2225 /* Try widening to a signed int. Make a fake signed optab that
2226 hides any signed insn for direct use. */
2227 wide_soptab
= *soptab
;
2228 set_optab_handler (&wide_soptab
, mode
, CODE_FOR_nothing
);
2229 /* We don't want to generate new hash table entries from this fake
2231 wide_soptab
.libcall_gen
= NULL
;
2233 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2234 unsignedp
, OPTAB_WIDEN
);
2236 /* For unsigned operands, try widening to an unsigned int. */
2237 if (temp
== 0 && unsignedp
)
2238 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2239 unsignedp
, OPTAB_WIDEN
);
2240 if (temp
|| methods
== OPTAB_WIDEN
)
2243 /* Use the right width libcall if that exists. */
2244 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2245 if (temp
|| methods
== OPTAB_LIB
)
2248 /* Must widen and use a libcall, use either signed or unsigned. */
2249 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2250 unsignedp
, methods
);
2254 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2255 unsignedp
, methods
);
2259 /* Generate code to perform an operation specified by UNOPPTAB
2260 on operand OP0, with two results to TARG0 and TARG1.
2261 We assume that the order of the operands for the instruction
2262 is TARG0, TARG1, OP0.
2264 Either TARG0 or TARG1 may be zero, but what that means is that
2265 the result is not actually wanted. We will generate it into
2266 a dummy pseudo-reg and discard it. They may not both be zero.
2268 Returns 1 if this operation can be performed; 0 if not. */
2271 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2274 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2275 enum mode_class mclass
;
2276 enum machine_mode wider_mode
;
2277 rtx entry_last
= get_last_insn ();
2280 mclass
= GET_MODE_CLASS (mode
);
2283 targ0
= gen_reg_rtx (mode
);
2285 targ1
= gen_reg_rtx (mode
);
2287 /* Record where to go back to if we fail. */
2288 last
= get_last_insn ();
2290 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2292 struct expand_operand ops
[3];
2293 enum insn_code icode
= optab_handler (unoptab
, mode
);
2295 create_fixed_operand (&ops
[0], targ0
);
2296 create_fixed_operand (&ops
[1], targ1
);
2297 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2298 if (maybe_expand_insn (icode
, 3, ops
))
2302 /* It can't be done in this mode. Can we do it in a wider mode? */
2304 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2306 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2307 wider_mode
!= VOIDmode
;
2308 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2310 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2312 rtx t0
= gen_reg_rtx (wider_mode
);
2313 rtx t1
= gen_reg_rtx (wider_mode
);
2314 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2316 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2318 convert_move (targ0
, t0
, unsignedp
);
2319 convert_move (targ1
, t1
, unsignedp
);
2323 delete_insns_since (last
);
2328 delete_insns_since (entry_last
);
2332 /* Generate code to perform an operation specified by BINOPTAB
2333 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2334 We assume that the order of the operands for the instruction
2335 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2336 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2338 Either TARG0 or TARG1 may be zero, but what that means is that
2339 the result is not actually wanted. We will generate it into
2340 a dummy pseudo-reg and discard it. They may not both be zero.
2342 Returns 1 if this operation can be performed; 0 if not. */
2345 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2348 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2349 enum mode_class mclass
;
2350 enum machine_mode wider_mode
;
2351 rtx entry_last
= get_last_insn ();
2354 mclass
= GET_MODE_CLASS (mode
);
2357 targ0
= gen_reg_rtx (mode
);
2359 targ1
= gen_reg_rtx (mode
);
2361 /* Record where to go back to if we fail. */
2362 last
= get_last_insn ();
2364 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2366 struct expand_operand ops
[4];
2367 enum insn_code icode
= optab_handler (binoptab
, mode
);
2368 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2369 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2370 rtx xop0
= op0
, xop1
= op1
;
2372 /* If we are optimizing, force expensive constants into a register. */
2373 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2374 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2376 create_fixed_operand (&ops
[0], targ0
);
2377 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2378 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2379 create_fixed_operand (&ops
[3], targ1
);
2380 if (maybe_expand_insn (icode
, 4, ops
))
2382 delete_insns_since (last
);
2385 /* It can't be done in this mode. Can we do it in a wider mode? */
2387 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2389 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2390 wider_mode
!= VOIDmode
;
2391 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2393 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2395 rtx t0
= gen_reg_rtx (wider_mode
);
2396 rtx t1
= gen_reg_rtx (wider_mode
);
2397 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2398 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2400 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2403 convert_move (targ0
, t0
, unsignedp
);
2404 convert_move (targ1
, t1
, unsignedp
);
2408 delete_insns_since (last
);
2413 delete_insns_since (entry_last
);
2417 /* Expand the two-valued library call indicated by BINOPTAB, but
2418 preserve only one of the values. If TARG0 is non-NULL, the first
2419 value is placed into TARG0; otherwise the second value is placed
2420 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2421 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2422 This routine assumes that the value returned by the library call is
2423 as if the return value was of an integral mode twice as wide as the
2424 mode of OP0. Returns 1 if the call was successful. */
2427 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2428 rtx targ0
, rtx targ1
, enum rtx_code code
)
2430 enum machine_mode mode
;
2431 enum machine_mode libval_mode
;
2436 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2437 gcc_assert (!targ0
!= !targ1
);
2439 mode
= GET_MODE (op0
);
2440 libfunc
= optab_libfunc (binoptab
, mode
);
2444 /* The value returned by the library function will have twice as
2445 many bits as the nominal MODE. */
2446 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2449 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2453 /* Get the part of VAL containing the value that we want. */
2454 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2455 targ0
? 0 : GET_MODE_SIZE (mode
));
2456 insns
= get_insns ();
2458 /* Move the into the desired location. */
2459 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2460 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2466 /* Wrapper around expand_unop which takes an rtx code to specify
2467 the operation to perform, not an optab pointer. All other
2468 arguments are the same. */
2470 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2471 rtx target
, int unsignedp
)
2473 optab unop
= code_to_optab
[(int) code
];
2476 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2482 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2484 A similar operation can be used for clrsb. UNOPTAB says which operation
2485 we are trying to expand. */
2487 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2489 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2490 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2492 enum machine_mode wider_mode
;
2493 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2494 wider_mode
!= VOIDmode
;
2495 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2497 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2499 rtx xop0
, temp
, last
;
2501 last
= get_last_insn ();
2504 target
= gen_reg_rtx (mode
);
2505 xop0
= widen_operand (op0
, wider_mode
, mode
,
2506 unoptab
!= clrsb_optab
, false);
2507 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2508 unoptab
!= clrsb_optab
);
2510 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2511 GEN_INT (GET_MODE_PRECISION (wider_mode
)
2512 - GET_MODE_PRECISION (mode
)),
2513 target
, true, OPTAB_DIRECT
);
2515 delete_insns_since (last
);
2524 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2525 quantities, choosing which based on whether the high word is nonzero. */
2527 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2529 rtx xop0
= force_reg (mode
, op0
);
2530 rtx subhi
= gen_highpart (word_mode
, xop0
);
2531 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2532 rtx hi0_label
= gen_label_rtx ();
2533 rtx after_label
= gen_label_rtx ();
2534 rtx seq
, temp
, result
;
2536 /* If we were not given a target, use a word_mode register, not a
2537 'mode' register. The result will fit, and nobody is expecting
2538 anything bigger (the return type of __builtin_clz* is int). */
2540 target
= gen_reg_rtx (word_mode
);
2542 /* In any case, write to a word_mode scratch in both branches of the
2543 conditional, so we can ensure there is a single move insn setting
2544 'target' to tag a REG_EQUAL note on. */
2545 result
= gen_reg_rtx (word_mode
);
2549 /* If the high word is not equal to zero,
2550 then clz of the full value is clz of the high word. */
2551 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2552 word_mode
, true, hi0_label
);
2554 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2559 convert_move (result
, temp
, true);
2561 emit_jump_insn (gen_jump (after_label
));
2564 /* Else clz of the full value is clz of the low word plus the number
2565 of bits in the high word. */
2566 emit_label (hi0_label
);
2568 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2571 temp
= expand_binop (word_mode
, add_optab
, temp
,
2572 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2573 result
, true, OPTAB_DIRECT
);
2577 convert_move (result
, temp
, true);
2579 emit_label (after_label
);
2580 convert_move (target
, result
, true);
2585 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2597 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2599 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2601 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2602 enum machine_mode wider_mode
;
2605 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2608 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2609 wider_mode
!= VOIDmode
;
2610 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2611 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2616 last
= get_last_insn ();
2618 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2619 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2621 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2622 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2624 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2625 GET_MODE_BITSIZE (wider_mode
)
2626 - GET_MODE_BITSIZE (mode
),
2632 target
= gen_reg_rtx (mode
);
2633 emit_move_insn (target
, gen_lowpart (mode
, x
));
2636 delete_insns_since (last
);
2641 /* Try calculating bswap as two bswaps of two word-sized operands. */
2644 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2648 t1
= expand_unop (word_mode
, bswap_optab
,
2649 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2650 t0
= expand_unop (word_mode
, bswap_optab
,
2651 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2653 if (target
== 0 || !valid_multiword_target_p (target
))
2654 target
= gen_reg_rtx (mode
);
2656 emit_clobber (target
);
2657 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2658 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2663 /* Try calculating (parity x) as (and (popcount x) 1), where
2664 popcount can also be done in a wider mode. */
2666 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2668 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2669 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2671 enum machine_mode wider_mode
;
2672 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2673 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2675 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2677 rtx xop0
, temp
, last
;
2679 last
= get_last_insn ();
2682 target
= gen_reg_rtx (mode
);
2683 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2684 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2687 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2688 target
, true, OPTAB_DIRECT
);
2690 delete_insns_since (last
);
2699 /* Try calculating ctz(x) as K - clz(x & -x) ,
2700 where K is GET_MODE_PRECISION(mode) - 1.
2702 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2703 don't have to worry about what the hardware does in that case. (If
2704 the clz instruction produces the usual value at 0, which is K, the
2705 result of this code sequence will be -1; expand_ffs, below, relies
2706 on this. It might be nice to have it be K instead, for consistency
2707 with the (very few) processors that provide a ctz with a defined
2708 value, but that would take one more instruction, and it would be
2709 less convenient for expand_ffs anyway. */
2712 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2716 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2721 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2723 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2724 true, OPTAB_DIRECT
);
2726 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2728 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_PRECISION (mode
) - 1),
2730 true, OPTAB_DIRECT
);
2740 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2746 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2747 else with the sequence used by expand_clz.
2749 The ffs builtin promises to return zero for a zero value and ctz/clz
2750 may have an undefined value in that case. If they do not give us a
2751 convenient value, we have to generate a test and branch. */
2753 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2755 HOST_WIDE_INT val
= 0;
2756 bool defined_at_zero
= false;
2759 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2763 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2767 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2769 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2772 temp
= expand_ctz (mode
, op0
, 0);
2776 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2778 defined_at_zero
= true;
2779 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2785 if (defined_at_zero
&& val
== -1)
2786 /* No correction needed at zero. */;
2789 /* We don't try to do anything clever with the situation found
2790 on some processors (eg Alpha) where ctz(0:mode) ==
2791 bitsize(mode). If someone can think of a way to send N to -1
2792 and leave alone all values in the range 0..N-1 (where N is a
2793 power of two), cheaper than this test-and-branch, please add it.
2795 The test-and-branch is done after the operation itself, in case
2796 the operation sets condition codes that can be recycled for this.
2797 (This is true on i386, for instance.) */
2799 rtx nonzero_label
= gen_label_rtx ();
2800 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2801 mode
, true, nonzero_label
);
2803 convert_move (temp
, GEN_INT (-1), false);
2804 emit_label (nonzero_label
);
2807 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2808 to produce a value in the range 0..bitsize. */
2809 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2810 target
, false, OPTAB_DIRECT
);
2817 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2826 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2827 conditions, VAL may already be a SUBREG against which we cannot generate
2828 a further SUBREG. In this case, we expect forcing the value into a
2829 register will work around the situation. */
2832 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2833 enum machine_mode imode
)
2836 ret
= lowpart_subreg (omode
, val
, imode
);
2839 val
= force_reg (imode
, val
);
2840 ret
= lowpart_subreg (omode
, val
, imode
);
2841 gcc_assert (ret
!= NULL
);
2846 /* Expand a floating point absolute value or negation operation via a
2847 logical operation on the sign bit. */
2850 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2851 rtx op0
, rtx target
)
2853 const struct real_format
*fmt
;
2854 int bitpos
, word
, nwords
, i
;
2855 enum machine_mode imode
;
2859 /* The format has to have a simple sign bit. */
2860 fmt
= REAL_MODE_FORMAT (mode
);
2864 bitpos
= fmt
->signbit_rw
;
2868 /* Don't create negative zeros if the format doesn't support them. */
2869 if (code
== NEG
&& !fmt
->has_signed_zero
)
2872 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2874 imode
= int_mode_for_mode (mode
);
2875 if (imode
== BLKmode
)
2884 if (FLOAT_WORDS_BIG_ENDIAN
)
2885 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2887 word
= bitpos
/ BITS_PER_WORD
;
2888 bitpos
= bitpos
% BITS_PER_WORD
;
2889 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2892 mask
= double_int_setbit (double_int_zero
, bitpos
);
2894 mask
= double_int_not (mask
);
2898 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2899 target
= gen_reg_rtx (mode
);
2905 for (i
= 0; i
< nwords
; ++i
)
2907 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2908 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2912 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2914 immed_double_int_const (mask
, imode
),
2915 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2916 if (temp
!= targ_piece
)
2917 emit_move_insn (targ_piece
, temp
);
2920 emit_move_insn (targ_piece
, op0_piece
);
2923 insns
= get_insns ();
2930 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2931 gen_lowpart (imode
, op0
),
2932 immed_double_int_const (mask
, imode
),
2933 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2934 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2936 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2937 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2944 /* As expand_unop, but will fail rather than attempt the operation in a
2945 different mode or with a libcall. */
2947 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2950 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2952 struct expand_operand ops
[2];
2953 enum insn_code icode
= optab_handler (unoptab
, mode
);
2954 rtx last
= get_last_insn ();
2957 create_output_operand (&ops
[0], target
, mode
);
2958 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2959 pat
= maybe_gen_insn (icode
, 2, ops
);
2962 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2963 && ! add_equal_note (pat
, ops
[0].value
, unoptab
->code
,
2964 ops
[1].value
, NULL_RTX
))
2966 delete_insns_since (last
);
2967 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2972 return ops
[0].value
;
2978 /* Generate code to perform an operation specified by UNOPTAB
2979 on operand OP0, with result having machine-mode MODE.
2981 UNSIGNEDP is for the case where we have to widen the operands
2982 to perform the operation. It says to use zero-extension.
2984 If TARGET is nonzero, the value
2985 is generated there, if it is convenient to do so.
2986 In all cases an rtx is returned for the locus of the value;
2987 this may or may not be TARGET. */
2990 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2993 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2994 enum machine_mode wider_mode
;
2998 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3002 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3004 /* Widening (or narrowing) clz needs special treatment. */
3005 if (unoptab
== clz_optab
)
3007 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3011 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3012 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3014 temp
= expand_doubleword_clz (mode
, op0
, target
);
3022 if (unoptab
== clrsb_optab
)
3024 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3030 /* Widening (or narrowing) bswap needs special treatment. */
3031 if (unoptab
== bswap_optab
)
3033 temp
= widen_bswap (mode
, op0
, target
);
3037 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3038 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3040 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3048 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3049 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3050 wider_mode
!= VOIDmode
;
3051 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3053 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3056 rtx last
= get_last_insn ();
3058 /* For certain operations, we need not actually extend
3059 the narrow operand, as long as we will truncate the
3060 results to the same narrowness. */
3062 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3063 (unoptab
== neg_optab
3064 || unoptab
== one_cmpl_optab
)
3065 && mclass
== MODE_INT
);
3067 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3072 if (mclass
!= MODE_INT
3073 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3076 target
= gen_reg_rtx (mode
);
3077 convert_move (target
, temp
, 0);
3081 return gen_lowpart (mode
, temp
);
3084 delete_insns_since (last
);
3088 /* These can be done a word at a time. */
3089 if (unoptab
== one_cmpl_optab
3090 && mclass
== MODE_INT
3091 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3092 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3097 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3098 target
= gen_reg_rtx (mode
);
3102 /* Do the actual arithmetic. */
3103 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3105 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3106 rtx x
= expand_unop (word_mode
, unoptab
,
3107 operand_subword_force (op0
, i
, mode
),
3108 target_piece
, unsignedp
);
3110 if (target_piece
!= x
)
3111 emit_move_insn (target_piece
, x
);
3114 insns
= get_insns ();
3121 if (unoptab
->code
== NEG
)
3123 /* Try negating floating point values by flipping the sign bit. */
3124 if (SCALAR_FLOAT_MODE_P (mode
))
3126 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3131 /* If there is no negation pattern, and we have no negative zero,
3132 try subtracting from zero. */
3133 if (!HONOR_SIGNED_ZEROS (mode
))
3135 temp
= expand_binop (mode
, (unoptab
== negv_optab
3136 ? subv_optab
: sub_optab
),
3137 CONST0_RTX (mode
), op0
, target
,
3138 unsignedp
, OPTAB_DIRECT
);
3144 /* Try calculating parity (x) as popcount (x) % 2. */
3145 if (unoptab
== parity_optab
)
3147 temp
= expand_parity (mode
, op0
, target
);
3152 /* Try implementing ffs (x) in terms of clz (x). */
3153 if (unoptab
== ffs_optab
)
3155 temp
= expand_ffs (mode
, op0
, target
);
3160 /* Try implementing ctz (x) in terms of clz (x). */
3161 if (unoptab
== ctz_optab
)
3163 temp
= expand_ctz (mode
, op0
, target
);
3169 /* Now try a library call in this mode. */
3170 libfunc
= optab_libfunc (unoptab
, mode
);
3176 enum machine_mode outmode
= mode
;
3178 /* All of these functions return small values. Thus we choose to
3179 have them return something that isn't a double-word. */
3180 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3181 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3182 || unoptab
== parity_optab
)
3184 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3185 optab_libfunc (unoptab
, mode
)));
3189 /* Pass 1 for NO_QUEUE so we don't lose any increments
3190 if the libcall is cse'd or moved. */
3191 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3193 insns
= get_insns ();
3196 target
= gen_reg_rtx (outmode
);
3197 eq_value
= gen_rtx_fmt_e (unoptab
->code
, mode
, op0
);
3198 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3199 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3200 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3201 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3202 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3203 trapv_unoptab_p (unoptab
));
3208 /* It can't be done in this mode. Can we do it in a wider mode? */
3210 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3212 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3213 wider_mode
!= VOIDmode
;
3214 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3216 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3217 || optab_libfunc (unoptab
, wider_mode
))
3220 rtx last
= get_last_insn ();
3222 /* For certain operations, we need not actually extend
3223 the narrow operand, as long as we will truncate the
3224 results to the same narrowness. */
3226 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3227 (unoptab
== neg_optab
3228 || unoptab
== one_cmpl_optab
)
3229 && mclass
== MODE_INT
);
3231 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3234 /* If we are generating clz using wider mode, adjust the
3235 result. Similarly for clrsb. */
3236 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3238 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3239 GEN_INT (GET_MODE_PRECISION (wider_mode
)
3240 - GET_MODE_PRECISION (mode
)),
3241 target
, true, OPTAB_DIRECT
);
3245 if (mclass
!= MODE_INT
)
3248 target
= gen_reg_rtx (mode
);
3249 convert_move (target
, temp
, 0);
3253 return gen_lowpart (mode
, temp
);
3256 delete_insns_since (last
);
3261 /* One final attempt at implementing negation via subtraction,
3262 this time allowing widening of the operand. */
3263 if (unoptab
->code
== NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3266 temp
= expand_binop (mode
,
3267 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3268 CONST0_RTX (mode
), op0
,
3269 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3277 /* Emit code to compute the absolute value of OP0, with result to
3278 TARGET if convenient. (TARGET may be 0.) The return value says
3279 where the result actually is to be found.
3281 MODE is the mode of the operand; the mode of the result is
3282 different but can be deduced from MODE.
3287 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3288 int result_unsignedp
)
3293 result_unsignedp
= 1;
3295 /* First try to do it with a special abs instruction. */
3296 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3301 /* For floating point modes, try clearing the sign bit. */
3302 if (SCALAR_FLOAT_MODE_P (mode
))
3304 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3309 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3310 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3311 && !HONOR_SIGNED_ZEROS (mode
))
3313 rtx last
= get_last_insn ();
3315 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3317 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3323 delete_insns_since (last
);
3326 /* If this machine has expensive jumps, we can do integer absolute
3327 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3328 where W is the width of MODE. */
3330 if (GET_MODE_CLASS (mode
) == MODE_INT
3331 && BRANCH_COST (optimize_insn_for_speed_p (),
3334 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3335 GET_MODE_PRECISION (mode
) - 1,
3338 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3341 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3342 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3352 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3353 int result_unsignedp
, int safe
)
3358 result_unsignedp
= 1;
3360 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3364 /* If that does not win, use conditional jump and negate. */
3366 /* It is safe to use the target if it is the same
3367 as the source if this is also a pseudo register */
3368 if (op0
== target
&& REG_P (op0
)
3369 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3372 op1
= gen_label_rtx ();
3373 if (target
== 0 || ! safe
3374 || GET_MODE (target
) != mode
3375 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3377 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3378 target
= gen_reg_rtx (mode
);
3380 emit_move_insn (target
, op0
);
3383 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3384 NULL_RTX
, NULL_RTX
, op1
, -1);
3386 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3389 emit_move_insn (target
, op0
);
3395 /* Emit code to compute the one's complement absolute value of OP0
3396 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3397 (TARGET may be NULL_RTX.) The return value says where the result
3398 actually is to be found.
3400 MODE is the mode of the operand; the mode of the result is
3401 different but can be deduced from MODE. */
3404 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3408 /* Not applicable for floating point modes. */
3409 if (FLOAT_MODE_P (mode
))
3412 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3413 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3415 rtx last
= get_last_insn ();
3417 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3419 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3425 delete_insns_since (last
);
3428 /* If this machine has expensive jumps, we can do one's complement
3429 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3431 if (GET_MODE_CLASS (mode
) == MODE_INT
3432 && BRANCH_COST (optimize_insn_for_speed_p (),
3435 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3436 GET_MODE_PRECISION (mode
) - 1,
3439 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3449 /* A subroutine of expand_copysign, perform the copysign operation using the
3450 abs and neg primitives advertised to exist on the target. The assumption
3451 is that we have a split register file, and leaving op0 in fp registers,
3452 and not playing with subregs so much, will help the register allocator. */
3455 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3456 int bitpos
, bool op0_is_abs
)
3458 enum machine_mode imode
;
3459 enum insn_code icode
;
3465 /* Check if the back end provides an insn that handles signbit for the
3467 icode
= optab_handler (signbit_optab
, mode
);
3468 if (icode
!= CODE_FOR_nothing
)
3470 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3471 sign
= gen_reg_rtx (imode
);
3472 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3478 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3480 imode
= int_mode_for_mode (mode
);
3481 if (imode
== BLKmode
)
3483 op1
= gen_lowpart (imode
, op1
);
3490 if (FLOAT_WORDS_BIG_ENDIAN
)
3491 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3493 word
= bitpos
/ BITS_PER_WORD
;
3494 bitpos
= bitpos
% BITS_PER_WORD
;
3495 op1
= operand_subword_force (op1
, word
, mode
);
3498 mask
= double_int_setbit (double_int_zero
, bitpos
);
3500 sign
= expand_binop (imode
, and_optab
, op1
,
3501 immed_double_int_const (mask
, imode
),
3502 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3507 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3514 if (target
== NULL_RTX
)
3515 target
= copy_to_reg (op0
);
3517 emit_move_insn (target
, op0
);
3520 label
= gen_label_rtx ();
3521 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3523 if (GET_CODE (op0
) == CONST_DOUBLE
)
3524 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3526 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3528 emit_move_insn (target
, op0
);
3536 /* A subroutine of expand_copysign, perform the entire copysign operation
3537 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3538 is true if op0 is known to have its sign bit clear. */
3541 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3542 int bitpos
, bool op0_is_abs
)
3544 enum machine_mode imode
;
3546 int word
, nwords
, i
;
3549 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3551 imode
= int_mode_for_mode (mode
);
3552 if (imode
== BLKmode
)
3561 if (FLOAT_WORDS_BIG_ENDIAN
)
3562 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3564 word
= bitpos
/ BITS_PER_WORD
;
3565 bitpos
= bitpos
% BITS_PER_WORD
;
3566 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3569 mask
= double_int_setbit (double_int_zero
, bitpos
);
3574 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3575 target
= gen_reg_rtx (mode
);
3581 for (i
= 0; i
< nwords
; ++i
)
3583 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3584 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3590 = expand_binop (imode
, and_optab
, op0_piece
,
3591 immed_double_int_const (double_int_not (mask
),
3593 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3595 op1
= expand_binop (imode
, and_optab
,
3596 operand_subword_force (op1
, i
, mode
),
3597 immed_double_int_const (mask
, imode
),
3598 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3600 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3601 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3602 if (temp
!= targ_piece
)
3603 emit_move_insn (targ_piece
, temp
);
3606 emit_move_insn (targ_piece
, op0_piece
);
3609 insns
= get_insns ();
3616 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3617 immed_double_int_const (mask
, imode
),
3618 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3620 op0
= gen_lowpart (imode
, op0
);
3622 op0
= expand_binop (imode
, and_optab
, op0
,
3623 immed_double_int_const (double_int_not (mask
),
3625 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3627 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3628 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3629 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3635 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3636 scalar floating point mode. Return NULL if we do not know how to
3637 expand the operation inline. */
3640 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3642 enum machine_mode mode
= GET_MODE (op0
);
3643 const struct real_format
*fmt
;
3647 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3648 gcc_assert (GET_MODE (op1
) == mode
);
3650 /* First try to do it with a special instruction. */
3651 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3652 target
, 0, OPTAB_DIRECT
);
3656 fmt
= REAL_MODE_FORMAT (mode
);
3657 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3661 if (GET_CODE (op0
) == CONST_DOUBLE
)
3663 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3664 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3668 if (fmt
->signbit_ro
>= 0
3669 && (GET_CODE (op0
) == CONST_DOUBLE
3670 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3671 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3673 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3674 fmt
->signbit_ro
, op0_is_abs
);
3679 if (fmt
->signbit_rw
< 0)
3681 return expand_copysign_bit (mode
, op0
, op1
, target
,
3682 fmt
->signbit_rw
, op0_is_abs
);
3685 /* Generate an instruction whose insn-code is INSN_CODE,
3686 with two operands: an output TARGET and an input OP0.
3687 TARGET *must* be nonzero, and the output is always stored there.
3688 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3689 the value that is stored into TARGET.
3691 Return false if expansion failed. */
3694 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3697 struct expand_operand ops
[2];
3700 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3701 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3702 pat
= maybe_gen_insn (icode
, 2, ops
);
3706 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3707 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3711 if (ops
[0].value
!= target
)
3712 emit_move_insn (target
, ops
[0].value
);
3715 /* Generate an instruction whose insn-code is INSN_CODE,
3716 with two operands: an output TARGET and an input OP0.
3717 TARGET *must* be nonzero, and the output is always stored there.
3718 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3719 the value that is stored into TARGET. */
3722 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3724 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3728 struct no_conflict_data
3730 rtx target
, first
, insn
;
3734 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3735 the currently examined clobber / store has to stay in the list of
3736 insns that constitute the actual libcall block. */
3738 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3740 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3742 /* If this inns directly contributes to setting the target, it must stay. */
3743 if (reg_overlap_mentioned_p (p
->target
, dest
))
3744 p
->must_stay
= true;
3745 /* If we haven't committed to keeping any other insns in the list yet,
3746 there is nothing more to check. */
3747 else if (p
->insn
== p
->first
)
3749 /* If this insn sets / clobbers a register that feeds one of the insns
3750 already in the list, this insn has to stay too. */
3751 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3752 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3753 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3754 /* Likewise if this insn depends on a register set by a previous
3755 insn in the list, or if it sets a result (presumably a hard
3756 register) that is set or clobbered by a previous insn.
3757 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3758 SET_DEST perform the former check on the address, and the latter
3759 check on the MEM. */
3760 || (GET_CODE (set
) == SET
3761 && (modified_in_p (SET_SRC (set
), p
->first
)
3762 || modified_in_p (SET_DEST (set
), p
->first
)
3763 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3764 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3765 p
->must_stay
= true;
3769 /* Emit code to make a call to a constant function or a library call.
3771 INSNS is a list containing all insns emitted in the call.
3772 These insns leave the result in RESULT. Our block is to copy RESULT
3773 to TARGET, which is logically equivalent to EQUIV.
3775 We first emit any insns that set a pseudo on the assumption that these are
3776 loading constants into registers; doing so allows them to be safely cse'ed
3777 between blocks. Then we emit all the other insns in the block, followed by
3778 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3779 note with an operand of EQUIV. */
3782 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3783 bool equiv_may_trap
)
3785 rtx final_dest
= target
;
3786 rtx next
, last
, insn
;
3788 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3789 into a MEM later. Protect the libcall block from this change. */
3790 if (! REG_P (target
) || REG_USERVAR_P (target
))
3791 target
= gen_reg_rtx (GET_MODE (target
));
3793 /* If we're using non-call exceptions, a libcall corresponding to an
3794 operation that may trap may also trap. */
3795 /* ??? See the comment in front of make_reg_eh_region_note. */
3796 if (cfun
->can_throw_non_call_exceptions
3797 && (equiv_may_trap
|| may_trap_p (equiv
)))
3799 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3802 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3805 int lp_nr
= INTVAL (XEXP (note
, 0));
3806 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3807 remove_note (insn
, note
);
3813 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3814 reg note to indicate that this call cannot throw or execute a nonlocal
3815 goto (unless there is already a REG_EH_REGION note, in which case
3817 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3819 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3822 /* First emit all insns that set pseudos. Remove them from the list as
3823 we go. Avoid insns that set pseudos which were referenced in previous
3824 insns. These can be generated by move_by_pieces, for example,
3825 to update an address. Similarly, avoid insns that reference things
3826 set in previous insns. */
3828 for (insn
= insns
; insn
; insn
= next
)
3830 rtx set
= single_set (insn
);
3832 next
= NEXT_INSN (insn
);
3834 if (set
!= 0 && REG_P (SET_DEST (set
))
3835 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3837 struct no_conflict_data data
;
3839 data
.target
= const0_rtx
;
3843 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3844 if (! data
.must_stay
)
3846 if (PREV_INSN (insn
))
3847 NEXT_INSN (PREV_INSN (insn
)) = next
;
3852 PREV_INSN (next
) = PREV_INSN (insn
);
3858 /* Some ports use a loop to copy large arguments onto the stack.
3859 Don't move anything outside such a loop. */
3864 /* Write the remaining insns followed by the final copy. */
3865 for (insn
= insns
; insn
; insn
= next
)
3867 next
= NEXT_INSN (insn
);
3872 last
= emit_move_insn (target
, result
);
3873 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3875 if (final_dest
!= target
)
3876 emit_move_insn (final_dest
, target
);
3880 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3882 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3885 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3886 PURPOSE describes how this comparison will be used. CODE is the rtx
3887 comparison code we will be using.
3889 ??? Actually, CODE is slightly weaker than that. A target is still
3890 required to implement all of the normal bcc operations, but not
3891 required to implement all (or any) of the unordered bcc operations. */
3894 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3895 enum can_compare_purpose purpose
)
3898 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3901 enum insn_code icode
;
3903 if (purpose
== ccp_jump
3904 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3905 && insn_operand_matches (icode
, 0, test
))
3907 if (purpose
== ccp_store_flag
3908 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3909 && insn_operand_matches (icode
, 1, test
))
3911 if (purpose
== ccp_cmov
3912 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
3915 mode
= GET_MODE_WIDER_MODE (mode
);
3916 PUT_MODE (test
, mode
);
3918 while (mode
!= VOIDmode
);
3923 /* This function is called when we are going to emit a compare instruction that
3924 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3926 *PMODE is the mode of the inputs (in case they are const_int).
3927 *PUNSIGNEDP nonzero says that the operands are unsigned;
3928 this matters if they need to be widened (as given by METHODS).
3930 If they have mode BLKmode, then SIZE specifies the size of both operands.
3932 This function performs all the setup necessary so that the caller only has
3933 to emit a single comparison insn. This setup can involve doing a BLKmode
3934 comparison or emitting a library call to perform the comparison if no insn
3935 is available to handle it.
3936 The values which are passed in through pointers can be modified; the caller
3937 should perform the comparison on the modified values. Constant
3938 comparisons must have already been folded. */
3941 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3942 int unsignedp
, enum optab_methods methods
,
3943 rtx
*ptest
, enum machine_mode
*pmode
)
3945 enum machine_mode mode
= *pmode
;
3947 enum machine_mode cmp_mode
;
3948 enum mode_class mclass
;
3950 /* The other methods are not needed. */
3951 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
3952 || methods
== OPTAB_LIB_WIDEN
);
3954 /* If we are optimizing, force expensive constants into a register. */
3955 if (CONSTANT_P (x
) && optimize
3956 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
3957 > COSTS_N_INSNS (1)))
3958 x
= force_reg (mode
, x
);
3960 if (CONSTANT_P (y
) && optimize
3961 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
3962 > COSTS_N_INSNS (1)))
3963 y
= force_reg (mode
, y
);
3966 /* Make sure if we have a canonical comparison. The RTL
3967 documentation states that canonical comparisons are required only
3968 for targets which have cc0. */
3969 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
3972 /* Don't let both operands fail to indicate the mode. */
3973 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3974 x
= force_reg (mode
, x
);
3975 if (mode
== VOIDmode
)
3976 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
3978 /* Handle all BLKmode compares. */
3980 if (mode
== BLKmode
)
3982 enum machine_mode result_mode
;
3983 enum insn_code cmp_code
;
3988 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3992 /* Try to use a memory block compare insn - either cmpstr
3993 or cmpmem will do. */
3994 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
3995 cmp_mode
!= VOIDmode
;
3996 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
3998 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
3999 if (cmp_code
== CODE_FOR_nothing
)
4000 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4001 if (cmp_code
== CODE_FOR_nothing
)
4002 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4003 if (cmp_code
== CODE_FOR_nothing
)
4006 /* Must make sure the size fits the insn's mode. */
4007 if ((CONST_INT_P (size
)
4008 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4009 || (GET_MODE_BITSIZE (GET_MODE (size
))
4010 > GET_MODE_BITSIZE (cmp_mode
)))
4013 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4014 result
= gen_reg_rtx (result_mode
);
4015 size
= convert_to_mode (cmp_mode
, size
, 1);
4016 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4018 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4019 *pmode
= result_mode
;
4023 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4026 /* Otherwise call a library function, memcmp. */
4027 libfunc
= memcmp_libfunc
;
4028 length_type
= sizetype
;
4029 result_mode
= TYPE_MODE (integer_type_node
);
4030 cmp_mode
= TYPE_MODE (length_type
);
4031 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4032 TYPE_UNSIGNED (length_type
));
4034 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4040 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4041 *pmode
= result_mode
;
4045 /* Don't allow operands to the compare to trap, as that can put the
4046 compare and branch in different basic blocks. */
4047 if (cfun
->can_throw_non_call_exceptions
)
4050 x
= force_reg (mode
, x
);
4052 y
= force_reg (mode
, y
);
4055 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4057 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4058 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4062 mclass
= GET_MODE_CLASS (mode
);
4063 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4067 enum insn_code icode
;
4068 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4069 if (icode
!= CODE_FOR_nothing
4070 && insn_operand_matches (icode
, 0, test
))
4072 rtx last
= get_last_insn ();
4073 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4074 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4076 && insn_operand_matches (icode
, 1, op0
)
4077 && insn_operand_matches (icode
, 2, op1
))
4079 XEXP (test
, 0) = op0
;
4080 XEXP (test
, 1) = op1
;
4085 delete_insns_since (last
);
4088 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4090 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4092 while (cmp_mode
!= VOIDmode
);
4094 if (methods
!= OPTAB_LIB_WIDEN
)
4097 if (!SCALAR_FLOAT_MODE_P (mode
))
4101 /* Handle a libcall just for the mode we are using. */
4102 libfunc
= optab_libfunc (cmp_optab
, mode
);
4103 gcc_assert (libfunc
);
4105 /* If we want unsigned, and this mode has a distinct unsigned
4106 comparison routine, use that. */
4109 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4114 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4115 targetm
.libgcc_cmp_return_mode (),
4116 2, x
, mode
, y
, mode
);
4118 /* There are two kinds of comparison routines. Biased routines
4119 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4120 of gcc expect that the comparison operation is equivalent
4121 to the modified comparison. For signed comparisons compare the
4122 result against 1 in the biased case, and zero in the unbiased
4123 case. For unsigned comparisons always compare against 1 after
4124 biasing the unbiased result by adding 1. This gives us a way to
4126 The comparisons in the fixed-point helper library are always
4131 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4134 x
= plus_constant (result
, 1);
4140 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4144 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4152 /* Before emitting an insn with code ICODE, make sure that X, which is going
4153 to be used for operand OPNUM of the insn, is converted from mode MODE to
4154 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4155 that it is accepted by the operand predicate. Return the new value. */
4158 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4159 enum machine_mode wider_mode
, int unsignedp
)
4161 if (mode
!= wider_mode
)
4162 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4164 if (!insn_operand_matches (icode
, opnum
, x
))
4166 if (reload_completed
)
4168 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4174 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4175 we can do the branch. */
4178 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
)
4180 enum machine_mode optab_mode
;
4181 enum mode_class mclass
;
4182 enum insn_code icode
;
4184 mclass
= GET_MODE_CLASS (mode
);
4185 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4186 icode
= optab_handler (cbranch_optab
, optab_mode
);
4188 gcc_assert (icode
!= CODE_FOR_nothing
);
4189 gcc_assert (insn_operand_matches (icode
, 0, test
));
4190 emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0), XEXP (test
, 1), label
));
4193 /* Generate code to compare X with Y so that the condition codes are
4194 set and to jump to LABEL if the condition is true. If X is a
4195 constant and Y is not a constant, then the comparison is swapped to
4196 ensure that the comparison RTL has the canonical form.
4198 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4199 need to be widened. UNSIGNEDP is also used to select the proper
4200 branch condition code.
4202 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4204 MODE is the mode of the inputs (in case they are const_int).
4206 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4207 It will be potentially converted into an unsigned variant based on
4208 UNSIGNEDP to select a proper jump instruction. */
4211 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4212 enum machine_mode mode
, int unsignedp
, rtx label
)
4214 rtx op0
= x
, op1
= y
;
4217 /* Swap operands and condition to ensure canonical RTL. */
4218 if (swap_commutative_operands_p (x
, y
)
4219 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4222 comparison
= swap_condition (comparison
);
4225 /* If OP0 is still a constant, then both X and Y must be constants
4226 or the opposite comparison is not supported. Force X into a register
4227 to create canonical RTL. */
4228 if (CONSTANT_P (op0
))
4229 op0
= force_reg (mode
, op0
);
4232 comparison
= unsigned_condition (comparison
);
4234 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4236 emit_cmp_and_jump_insn_1 (test
, mode
, label
);
4240 /* Emit a library call comparison between floating point X and Y.
4241 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4244 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4245 rtx
*ptest
, enum machine_mode
*pmode
)
4247 enum rtx_code swapped
= swap_condition (comparison
);
4248 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4249 enum machine_mode orig_mode
= GET_MODE (x
);
4250 enum machine_mode mode
, cmp_mode
;
4251 rtx true_rtx
, false_rtx
;
4252 rtx value
, target
, insns
, equiv
;
4254 bool reversed_p
= false;
4255 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4257 for (mode
= orig_mode
;
4259 mode
= GET_MODE_WIDER_MODE (mode
))
4261 if (code_to_optab
[comparison
]
4262 && (libfunc
= optab_libfunc (code_to_optab
[comparison
], mode
)))
4265 if (code_to_optab
[swapped
]
4266 && (libfunc
= optab_libfunc (code_to_optab
[swapped
], mode
)))
4269 tmp
= x
; x
= y
; y
= tmp
;
4270 comparison
= swapped
;
4274 if (code_to_optab
[reversed
]
4275 && (libfunc
= optab_libfunc (code_to_optab
[reversed
], mode
)))
4277 comparison
= reversed
;
4283 gcc_assert (mode
!= VOIDmode
);
4285 if (mode
!= orig_mode
)
4287 x
= convert_to_mode (mode
, x
, 0);
4288 y
= convert_to_mode (mode
, y
, 0);
4291 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4292 the RTL. The allows the RTL optimizers to delete the libcall if the
4293 condition can be determined at compile-time. */
4294 if (comparison
== UNORDERED
4295 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4297 true_rtx
= const_true_rtx
;
4298 false_rtx
= const0_rtx
;
4305 true_rtx
= const0_rtx
;
4306 false_rtx
= const_true_rtx
;
4310 true_rtx
= const_true_rtx
;
4311 false_rtx
= const0_rtx
;
4315 true_rtx
= const1_rtx
;
4316 false_rtx
= const0_rtx
;
4320 true_rtx
= const0_rtx
;
4321 false_rtx
= constm1_rtx
;
4325 true_rtx
= constm1_rtx
;
4326 false_rtx
= const0_rtx
;
4330 true_rtx
= const0_rtx
;
4331 false_rtx
= const1_rtx
;
4339 if (comparison
== UNORDERED
)
4341 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4342 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4343 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4344 temp
, const_true_rtx
, equiv
);
4348 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4349 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4350 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4351 equiv
, true_rtx
, false_rtx
);
4355 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4356 cmp_mode
, 2, x
, mode
, y
, mode
);
4357 insns
= get_insns ();
4360 target
= gen_reg_rtx (cmp_mode
);
4361 emit_libcall_block (insns
, target
, value
, equiv
);
4363 if (comparison
== UNORDERED
4364 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4366 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4368 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4373 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4376 emit_indirect_jump (rtx loc
)
4378 struct expand_operand ops
[1];
4380 create_address_operand (&ops
[0], loc
);
4381 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4385 #ifdef HAVE_conditional_move
4387 /* Emit a conditional move instruction if the machine supports one for that
4388 condition and machine mode.
4390 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4391 the mode to use should they be constants. If it is VOIDmode, they cannot
4394 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4395 should be stored there. MODE is the mode to use should they be constants.
4396 If it is VOIDmode, they cannot both be constants.
4398 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4399 is not supported. */
4402 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4403 enum machine_mode cmode
, rtx op2
, rtx op3
,
4404 enum machine_mode mode
, int unsignedp
)
4406 rtx tem
, comparison
, last
;
4407 enum insn_code icode
;
4408 enum rtx_code reversed
;
4410 /* If one operand is constant, make it the second one. Only do this
4411 if the other operand is not constant as well. */
4413 if (swap_commutative_operands_p (op0
, op1
))
4418 code
= swap_condition (code
);
4421 /* get_condition will prefer to generate LT and GT even if the old
4422 comparison was against zero, so undo that canonicalization here since
4423 comparisons against zero are cheaper. */
4424 if (code
== LT
&& op1
== const1_rtx
)
4425 code
= LE
, op1
= const0_rtx
;
4426 else if (code
== GT
&& op1
== constm1_rtx
)
4427 code
= GE
, op1
= const0_rtx
;
4429 if (cmode
== VOIDmode
)
4430 cmode
= GET_MODE (op0
);
4432 if (swap_commutative_operands_p (op2
, op3
)
4433 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4442 if (mode
== VOIDmode
)
4443 mode
= GET_MODE (op2
);
4445 icode
= direct_optab_handler (movcc_optab
, mode
);
4447 if (icode
== CODE_FOR_nothing
)
4451 target
= gen_reg_rtx (mode
);
4453 code
= unsignedp
? unsigned_condition (code
) : code
;
4454 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4456 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4457 return NULL and let the caller figure out how best to deal with this
4459 if (!COMPARISON_P (comparison
))
4462 do_pending_stack_adjust ();
4463 last
= get_last_insn ();
4464 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4465 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4466 &comparison
, &cmode
);
4469 struct expand_operand ops
[4];
4471 create_output_operand (&ops
[0], target
, mode
);
4472 create_fixed_operand (&ops
[1], comparison
);
4473 create_input_operand (&ops
[2], op2
, mode
);
4474 create_input_operand (&ops
[3], op3
, mode
);
4475 if (maybe_expand_insn (icode
, 4, ops
))
4477 if (ops
[0].value
!= target
)
4478 convert_move (target
, ops
[0].value
, false);
4482 delete_insns_since (last
);
4486 /* Return nonzero if a conditional move of mode MODE is supported.
4488 This function is for combine so it can tell whether an insn that looks
4489 like a conditional move is actually supported by the hardware. If we
4490 guess wrong we lose a bit on optimization, but that's it. */
4491 /* ??? sparc64 supports conditionally moving integers values based on fp
4492 comparisons, and vice versa. How do we handle them? */
4495 can_conditionally_move_p (enum machine_mode mode
)
4497 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4503 #endif /* HAVE_conditional_move */
4505 /* Emit a conditional addition instruction if the machine supports one for that
4506 condition and machine mode.
4508 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4509 the mode to use should they be constants. If it is VOIDmode, they cannot
4512 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4513 should be stored there. MODE is the mode to use should they be constants.
4514 If it is VOIDmode, they cannot both be constants.
4516 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4517 is not supported. */
4520 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4521 enum machine_mode cmode
, rtx op2
, rtx op3
,
4522 enum machine_mode mode
, int unsignedp
)
4524 rtx tem
, comparison
, last
;
4525 enum insn_code icode
;
4526 enum rtx_code reversed
;
4528 /* If one operand is constant, make it the second one. Only do this
4529 if the other operand is not constant as well. */
4531 if (swap_commutative_operands_p (op0
, op1
))
4536 code
= swap_condition (code
);
4539 /* get_condition will prefer to generate LT and GT even if the old
4540 comparison was against zero, so undo that canonicalization here since
4541 comparisons against zero are cheaper. */
4542 if (code
== LT
&& op1
== const1_rtx
)
4543 code
= LE
, op1
= const0_rtx
;
4544 else if (code
== GT
&& op1
== constm1_rtx
)
4545 code
= GE
, op1
= const0_rtx
;
4547 if (cmode
== VOIDmode
)
4548 cmode
= GET_MODE (op0
);
4550 if (swap_commutative_operands_p (op2
, op3
)
4551 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4560 if (mode
== VOIDmode
)
4561 mode
= GET_MODE (op2
);
4563 icode
= optab_handler (addcc_optab
, mode
);
4565 if (icode
== CODE_FOR_nothing
)
4569 target
= gen_reg_rtx (mode
);
4571 code
= unsignedp
? unsigned_condition (code
) : code
;
4572 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4574 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4575 return NULL and let the caller figure out how best to deal with this
4577 if (!COMPARISON_P (comparison
))
4580 do_pending_stack_adjust ();
4581 last
= get_last_insn ();
4582 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4583 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4584 &comparison
, &cmode
);
4587 struct expand_operand ops
[4];
4589 create_output_operand (&ops
[0], target
, mode
);
4590 create_fixed_operand (&ops
[1], comparison
);
4591 create_input_operand (&ops
[2], op2
, mode
);
4592 create_input_operand (&ops
[3], op3
, mode
);
4593 if (maybe_expand_insn (icode
, 4, ops
))
4595 if (ops
[0].value
!= target
)
4596 convert_move (target
, ops
[0].value
, false);
4600 delete_insns_since (last
);
4604 /* These functions attempt to generate an insn body, rather than
4605 emitting the insn, but if the gen function already emits them, we
4606 make no attempt to turn them back into naked patterns. */
4608 /* Generate and return an insn body to add Y to X. */
4611 gen_add2_insn (rtx x
, rtx y
)
4613 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4615 gcc_assert (insn_operand_matches (icode
, 0, x
));
4616 gcc_assert (insn_operand_matches (icode
, 1, x
));
4617 gcc_assert (insn_operand_matches (icode
, 2, y
));
4619 return GEN_FCN (icode
) (x
, x
, y
);
4622 /* Generate and return an insn body to add r1 and c,
4623 storing the result in r0. */
4626 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4628 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4630 if (icode
== CODE_FOR_nothing
4631 || !insn_operand_matches (icode
, 0, r0
)
4632 || !insn_operand_matches (icode
, 1, r1
)
4633 || !insn_operand_matches (icode
, 2, c
))
4636 return GEN_FCN (icode
) (r0
, r1
, c
);
4640 have_add2_insn (rtx x
, rtx y
)
4642 enum insn_code icode
;
4644 gcc_assert (GET_MODE (x
) != VOIDmode
);
4646 icode
= optab_handler (add_optab
, GET_MODE (x
));
4648 if (icode
== CODE_FOR_nothing
)
4651 if (!insn_operand_matches (icode
, 0, x
)
4652 || !insn_operand_matches (icode
, 1, x
)
4653 || !insn_operand_matches (icode
, 2, y
))
4659 /* Generate and return an insn body to subtract Y from X. */
4662 gen_sub2_insn (rtx x
, rtx y
)
4664 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4666 gcc_assert (insn_operand_matches (icode
, 0, x
));
4667 gcc_assert (insn_operand_matches (icode
, 1, x
));
4668 gcc_assert (insn_operand_matches (icode
, 2, y
));
4670 return GEN_FCN (icode
) (x
, x
, y
);
4673 /* Generate and return an insn body to subtract r1 and c,
4674 storing the result in r0. */
4677 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4679 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4681 if (icode
== CODE_FOR_nothing
4682 || !insn_operand_matches (icode
, 0, r0
)
4683 || !insn_operand_matches (icode
, 1, r1
)
4684 || !insn_operand_matches (icode
, 2, c
))
4687 return GEN_FCN (icode
) (r0
, r1
, c
);
4691 have_sub2_insn (rtx x
, rtx y
)
4693 enum insn_code icode
;
4695 gcc_assert (GET_MODE (x
) != VOIDmode
);
4697 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4699 if (icode
== CODE_FOR_nothing
)
4702 if (!insn_operand_matches (icode
, 0, x
)
4703 || !insn_operand_matches (icode
, 1, x
)
4704 || !insn_operand_matches (icode
, 2, y
))
4710 /* Generate the body of an instruction to copy Y into X.
4711 It may be a list of insns, if one insn isn't enough. */
4714 gen_move_insn (rtx x
, rtx y
)
4719 emit_move_insn_1 (x
, y
);
4725 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4726 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4727 no such operation exists, CODE_FOR_nothing will be returned. */
4730 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4734 #ifdef HAVE_ptr_extend
4736 return CODE_FOR_ptr_extend
;
4739 tab
= unsignedp
? zext_optab
: sext_optab
;
4740 return convert_optab_handler (tab
, to_mode
, from_mode
);
4743 /* Generate the body of an insn to extend Y (with mode MFROM)
4744 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4747 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4748 enum machine_mode mfrom
, int unsignedp
)
4750 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4751 return GEN_FCN (icode
) (x
, y
);
4754 /* can_fix_p and can_float_p say whether the target machine
4755 can directly convert a given fixed point type to
4756 a given floating point type, or vice versa.
4757 The returned value is the CODE_FOR_... value to use,
4758 or CODE_FOR_nothing if these modes cannot be directly converted.
4760 *TRUNCP_PTR is set to 1 if it is necessary to output
4761 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4763 static enum insn_code
4764 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4765 int unsignedp
, int *truncp_ptr
)
4768 enum insn_code icode
;
4770 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4771 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4772 if (icode
!= CODE_FOR_nothing
)
4778 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4779 for this to work. We need to rework the fix* and ftrunc* patterns
4780 and documentation. */
4781 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4782 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4783 if (icode
!= CODE_FOR_nothing
4784 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4791 return CODE_FOR_nothing
;
4795 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4800 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4801 return convert_optab_handler (tab
, fltmode
, fixmode
);
4804 /* Function supportable_convert_operation
4806 Check whether an operation represented by the code CODE is a
4807 convert operation that is supported by the target platform in
4808 vector form (i.e., when operating on arguments of type VECTYPE_IN
4809 producing a result of type VECTYPE_OUT).
4811 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4812 This function checks if these operations are supported
4813 by the target platform either directly (via vector tree-codes), or via
4817 - CODE1 is code of vector operation to be used when
4818 vectorizing the operation, if available.
4819 - DECL is decl of target builtin functions to be used
4820 when vectorizing the operation, if available. In this case,
4821 CODE1 is CALL_EXPR. */
4824 supportable_convert_operation (enum tree_code code
,
4825 tree vectype_out
, tree vectype_in
,
4826 tree
*decl
, enum tree_code
*code1
)
4828 enum machine_mode m1
,m2
;
4831 m1
= TYPE_MODE (vectype_out
);
4832 m2
= TYPE_MODE (vectype_in
);
4834 /* First check if we can done conversion directly. */
4835 if ((code
== FIX_TRUNC_EXPR
4836 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4837 != CODE_FOR_nothing
)
4838 || (code
== FLOAT_EXPR
4839 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4840 != CODE_FOR_nothing
))
4846 /* Now check for builtin. */
4847 if (targetm
.vectorize
.builtin_conversion
4848 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4851 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
4858 /* Generate code to convert FROM to floating point
4859 and store in TO. FROM must be fixed point and not VOIDmode.
4860 UNSIGNEDP nonzero means regard FROM as unsigned.
4861 Normally this is done by correcting the final value
4862 if it is negative. */
4865 expand_float (rtx to
, rtx from
, int unsignedp
)
4867 enum insn_code icode
;
4869 enum machine_mode fmode
, imode
;
4870 bool can_do_signed
= false;
4872 /* Crash now, because we won't be able to decide which mode to use. */
4873 gcc_assert (GET_MODE (from
) != VOIDmode
);
4875 /* Look for an insn to do the conversion. Do it in the specified
4876 modes if possible; otherwise convert either input, output or both to
4877 wider mode. If the integer mode is wider than the mode of FROM,
4878 we can do the conversion signed even if the input is unsigned. */
4880 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4881 fmode
= GET_MODE_WIDER_MODE (fmode
))
4882 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4883 imode
= GET_MODE_WIDER_MODE (imode
))
4885 int doing_unsigned
= unsignedp
;
4887 if (fmode
!= GET_MODE (to
)
4888 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
4891 icode
= can_float_p (fmode
, imode
, unsignedp
);
4892 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4894 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4895 if (scode
!= CODE_FOR_nothing
)
4896 can_do_signed
= true;
4897 if (imode
!= GET_MODE (from
))
4898 icode
= scode
, doing_unsigned
= 0;
4901 if (icode
!= CODE_FOR_nothing
)
4903 if (imode
!= GET_MODE (from
))
4904 from
= convert_to_mode (imode
, from
, unsignedp
);
4906 if (fmode
!= GET_MODE (to
))
4907 target
= gen_reg_rtx (fmode
);
4909 emit_unop_insn (icode
, target
, from
,
4910 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4913 convert_move (to
, target
, 0);
4918 /* Unsigned integer, and no way to convert directly. Convert as signed,
4919 then unconditionally adjust the result. */
4920 if (unsignedp
&& can_do_signed
)
4922 rtx label
= gen_label_rtx ();
4924 REAL_VALUE_TYPE offset
;
4926 /* Look for a usable floating mode FMODE wider than the source and at
4927 least as wide as the target. Using FMODE will avoid rounding woes
4928 with unsigned values greater than the signed maximum value. */
4930 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4931 fmode
= GET_MODE_WIDER_MODE (fmode
))
4932 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4933 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4936 if (fmode
== VOIDmode
)
4938 /* There is no such mode. Pretend the target is wide enough. */
4939 fmode
= GET_MODE (to
);
4941 /* Avoid double-rounding when TO is narrower than FROM. */
4942 if ((significand_size (fmode
) + 1)
4943 < GET_MODE_PRECISION (GET_MODE (from
)))
4946 rtx neglabel
= gen_label_rtx ();
4948 /* Don't use TARGET if it isn't a register, is a hard register,
4949 or is the wrong mode. */
4951 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4952 || GET_MODE (target
) != fmode
)
4953 target
= gen_reg_rtx (fmode
);
4955 imode
= GET_MODE (from
);
4956 do_pending_stack_adjust ();
4958 /* Test whether the sign bit is set. */
4959 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4962 /* The sign bit is not set. Convert as signed. */
4963 expand_float (target
, from
, 0);
4964 emit_jump_insn (gen_jump (label
));
4967 /* The sign bit is set.
4968 Convert to a usable (positive signed) value by shifting right
4969 one bit, while remembering if a nonzero bit was shifted
4970 out; i.e., compute (from & 1) | (from >> 1). */
4972 emit_label (neglabel
);
4973 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4974 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4975 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
4976 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4978 expand_float (target
, temp
, 0);
4980 /* Multiply by 2 to undo the shift above. */
4981 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4982 target
, 0, OPTAB_LIB_WIDEN
);
4984 emit_move_insn (target
, temp
);
4986 do_pending_stack_adjust ();
4992 /* If we are about to do some arithmetic to correct for an
4993 unsigned operand, do it in a pseudo-register. */
4995 if (GET_MODE (to
) != fmode
4996 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4997 target
= gen_reg_rtx (fmode
);
4999 /* Convert as signed integer to floating. */
5000 expand_float (target
, from
, 0);
5002 /* If FROM is negative (and therefore TO is negative),
5003 correct its value by 2**bitwidth. */
5005 do_pending_stack_adjust ();
5006 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5010 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5011 temp
= expand_binop (fmode
, add_optab
, target
,
5012 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5013 target
, 0, OPTAB_LIB_WIDEN
);
5015 emit_move_insn (target
, temp
);
5017 do_pending_stack_adjust ();
5022 /* No hardware instruction available; call a library routine. */
5027 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5029 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5030 from
= convert_to_mode (SImode
, from
, unsignedp
);
5032 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5033 gcc_assert (libfunc
);
5037 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5038 GET_MODE (to
), 1, from
,
5040 insns
= get_insns ();
5043 emit_libcall_block (insns
, target
, value
,
5044 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5045 GET_MODE (to
), from
));
5050 /* Copy result to requested destination
5051 if we have been computing in a temp location. */
5055 if (GET_MODE (target
) == GET_MODE (to
))
5056 emit_move_insn (to
, target
);
5058 convert_move (to
, target
, 0);
5062 /* Generate code to convert FROM to fixed point and store in TO. FROM
5063 must be floating point. */
5066 expand_fix (rtx to
, rtx from
, int unsignedp
)
5068 enum insn_code icode
;
5070 enum machine_mode fmode
, imode
;
5073 /* We first try to find a pair of modes, one real and one integer, at
5074 least as wide as FROM and TO, respectively, in which we can open-code
5075 this conversion. If the integer mode is wider than the mode of TO,
5076 we can do the conversion either signed or unsigned. */
5078 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5079 fmode
= GET_MODE_WIDER_MODE (fmode
))
5080 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5081 imode
= GET_MODE_WIDER_MODE (imode
))
5083 int doing_unsigned
= unsignedp
;
5085 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5086 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5087 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5089 if (icode
!= CODE_FOR_nothing
)
5091 rtx last
= get_last_insn ();
5092 if (fmode
!= GET_MODE (from
))
5093 from
= convert_to_mode (fmode
, from
, 0);
5097 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5098 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5102 if (imode
!= GET_MODE (to
))
5103 target
= gen_reg_rtx (imode
);
5105 if (maybe_emit_unop_insn (icode
, target
, from
,
5106 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5109 convert_move (to
, target
, unsignedp
);
5112 delete_insns_since (last
);
5116 /* For an unsigned conversion, there is one more way to do it.
5117 If we have a signed conversion, we generate code that compares
5118 the real value to the largest representable positive number. If if
5119 is smaller, the conversion is done normally. Otherwise, subtract
5120 one plus the highest signed number, convert, and add it back.
5122 We only need to check all real modes, since we know we didn't find
5123 anything with a wider integer mode.
5125 This code used to extend FP value into mode wider than the destination.
5126 This is needed for decimal float modes which cannot accurately
5127 represent one plus the highest signed number of the same size, but
5128 not for binary modes. Consider, for instance conversion from SFmode
5131 The hot path through the code is dealing with inputs smaller than 2^63
5132 and doing just the conversion, so there is no bits to lose.
5134 In the other path we know the value is positive in the range 2^63..2^64-1
5135 inclusive. (as for other input overflow happens and result is undefined)
5136 So we know that the most important bit set in mantissa corresponds to
5137 2^63. The subtraction of 2^63 should not generate any rounding as it
5138 simply clears out that bit. The rest is trivial. */
5140 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5141 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5142 fmode
= GET_MODE_WIDER_MODE (fmode
))
5143 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5144 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5145 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5148 REAL_VALUE_TYPE offset
;
5149 rtx limit
, lab1
, lab2
, insn
;
5151 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5152 real_2expN (&offset
, bitsize
- 1, fmode
);
5153 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5154 lab1
= gen_label_rtx ();
5155 lab2
= gen_label_rtx ();
5157 if (fmode
!= GET_MODE (from
))
5158 from
= convert_to_mode (fmode
, from
, 0);
5160 /* See if we need to do the subtraction. */
5161 do_pending_stack_adjust ();
5162 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5165 /* If not, do the signed "fix" and branch around fixup code. */
5166 expand_fix (to
, from
, 0);
5167 emit_jump_insn (gen_jump (lab2
));
5170 /* Otherwise, subtract 2**(N-1), convert to signed number,
5171 then add 2**(N-1). Do the addition using XOR since this
5172 will often generate better code. */
5174 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5175 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5176 expand_fix (to
, target
, 0);
5177 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5179 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5181 to
, 1, OPTAB_LIB_WIDEN
);
5184 emit_move_insn (to
, target
);
5188 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5190 /* Make a place for a REG_NOTE and add it. */
5191 insn
= emit_move_insn (to
, to
);
5192 set_dst_reg_note (insn
, REG_EQUAL
,
5193 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5201 /* We can't do it with an insn, so use a library call. But first ensure
5202 that the mode of TO is at least as wide as SImode, since those are the
5203 only library calls we know about. */
5205 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5207 target
= gen_reg_rtx (SImode
);
5209 expand_fix (target
, from
, unsignedp
);
5217 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5218 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5219 gcc_assert (libfunc
);
5223 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5224 GET_MODE (to
), 1, from
,
5226 insns
= get_insns ();
5229 emit_libcall_block (insns
, target
, value
,
5230 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5231 GET_MODE (to
), from
));
5236 if (GET_MODE (to
) == GET_MODE (target
))
5237 emit_move_insn (to
, target
);
5239 convert_move (to
, target
, 0);
5243 /* Generate code to convert FROM or TO a fixed-point.
5244 If UINTP is true, either TO or FROM is an unsigned integer.
5245 If SATP is true, we need to saturate the result. */
5248 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5250 enum machine_mode to_mode
= GET_MODE (to
);
5251 enum machine_mode from_mode
= GET_MODE (from
);
5253 enum rtx_code this_code
;
5254 enum insn_code code
;
5258 if (to_mode
== from_mode
)
5260 emit_move_insn (to
, from
);
5266 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5267 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5271 tab
= satp
? satfract_optab
: fract_optab
;
5272 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5274 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5275 if (code
!= CODE_FOR_nothing
)
5277 emit_unop_insn (code
, to
, from
, this_code
);
5281 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5282 gcc_assert (libfunc
);
5285 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5286 1, from
, from_mode
);
5287 insns
= get_insns ();
5290 emit_libcall_block (insns
, to
, value
,
5291 gen_rtx_fmt_e (tab
->code
, to_mode
, from
));
5294 /* Generate code to convert FROM to fixed point and store in TO. FROM
5295 must be floating point, TO must be signed. Use the conversion optab
5296 TAB to do the conversion. */
5299 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5301 enum insn_code icode
;
5303 enum machine_mode fmode
, imode
;
5305 /* We first try to find a pair of modes, one real and one integer, at
5306 least as wide as FROM and TO, respectively, in which we can open-code
5307 this conversion. If the integer mode is wider than the mode of TO,
5308 we can do the conversion either signed or unsigned. */
5310 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5311 fmode
= GET_MODE_WIDER_MODE (fmode
))
5312 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5313 imode
= GET_MODE_WIDER_MODE (imode
))
5315 icode
= convert_optab_handler (tab
, imode
, fmode
);
5316 if (icode
!= CODE_FOR_nothing
)
5318 rtx last
= get_last_insn ();
5319 if (fmode
!= GET_MODE (from
))
5320 from
= convert_to_mode (fmode
, from
, 0);
5322 if (imode
!= GET_MODE (to
))
5323 target
= gen_reg_rtx (imode
);
5325 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5327 delete_insns_since (last
);
5331 convert_move (to
, target
, 0);
5339 /* Report whether we have an instruction to perform the operation
5340 specified by CODE on operands of mode MODE. */
5342 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5344 return (code_to_optab
[(int) code
] != 0
5345 && (optab_handler (code_to_optab
[(int) code
], mode
)
5346 != CODE_FOR_nothing
));
5349 /* Set all insn_code fields to CODE_FOR_nothing. */
5352 init_insn_codes (void)
5354 memset (optab_table
, 0, sizeof (optab_table
));
5355 memset (convert_optab_table
, 0, sizeof (convert_optab_table
));
5356 memset (direct_optab_table
, 0, sizeof (direct_optab_table
));
5359 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5361 init_optab (optab op
, enum rtx_code code
)
5364 code_to_optab
[(int) code
] = op
;
5367 /* Same, but fill in its code as CODE, and do _not_ write it into
5368 the code_to_optab table. */
5370 init_optabv (optab op
, enum rtx_code code
)
5375 /* Conversion optabs never go in the code_to_optab table. */
5377 init_convert_optab (convert_optab op
, enum rtx_code code
)
5382 /* Initialize the libfunc fields of an entire group of entries in some
5383 optab. Each entry is set equal to a string consisting of a leading
5384 pair of underscores followed by a generic operation name followed by
5385 a mode name (downshifted to lowercase) followed by a single character
5386 representing the number of operands for the given operation (which is
5387 usually one of the characters '2', '3', or '4').
5389 OPTABLE is the table in which libfunc fields are to be initialized.
5390 OPNAME is the generic (string) name of the operation.
5391 SUFFIX is the character which specifies the number of operands for
5392 the given generic operation.
5393 MODE is the mode to generate for.
5397 gen_libfunc (optab optable
, const char *opname
, int suffix
, enum machine_mode mode
)
5399 unsigned opname_len
= strlen (opname
);
5400 const char *mname
= GET_MODE_NAME (mode
);
5401 unsigned mname_len
= strlen (mname
);
5402 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5403 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5404 char *libfunc_name
= XALLOCAVEC (char, len
);
5411 if (targetm
.libfunc_gnu_prefix
)
5418 for (q
= opname
; *q
; )
5420 for (q
= mname
; *q
; q
++)
5421 *p
++ = TOLOWER (*q
);
5425 set_optab_libfunc (optable
, mode
,
5426 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5429 /* Like gen_libfunc, but verify that integer operation is involved. */
5432 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5433 enum machine_mode mode
)
5435 int maxsize
= 2 * BITS_PER_WORD
;
5437 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5439 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5440 maxsize
= LONG_LONG_TYPE_SIZE
;
5441 if (GET_MODE_CLASS (mode
) != MODE_INT
5442 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5444 gen_libfunc (optable
, opname
, suffix
, mode
);
5447 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5450 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5451 enum machine_mode mode
)
5455 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5456 gen_libfunc (optable
, opname
, suffix
, mode
);
5457 if (DECIMAL_FLOAT_MODE_P (mode
))
5459 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5460 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5461 depending on the low level floating format used. */
5462 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5463 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5464 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5468 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5471 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5472 enum machine_mode mode
)
5474 if (!ALL_FIXED_POINT_MODE_P (mode
))
5476 gen_libfunc (optable
, opname
, suffix
, mode
);
5479 /* Like gen_libfunc, but verify that signed fixed-point operation is
5483 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5484 enum machine_mode mode
)
5486 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5488 gen_libfunc (optable
, opname
, suffix
, mode
);
5491 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5495 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5496 enum machine_mode mode
)
5498 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5500 gen_libfunc (optable
, opname
, suffix
, mode
);
5503 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5506 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5507 enum machine_mode mode
)
5509 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5510 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5511 if (INTEGRAL_MODE_P (mode
))
5512 gen_int_libfunc (optable
, name
, suffix
, mode
);
5515 /* Like gen_libfunc, but verify that FP or INT operation is involved
5516 and add 'v' suffix for integer operation. */
5519 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5520 enum machine_mode mode
)
5522 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5523 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5524 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5526 int len
= strlen (name
);
5527 char *v_name
= XALLOCAVEC (char, len
+ 2);
5528 strcpy (v_name
, name
);
5530 v_name
[len
+ 1] = 0;
5531 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5535 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5539 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5540 enum machine_mode mode
)
5542 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5543 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5544 if (INTEGRAL_MODE_P (mode
))
5545 gen_int_libfunc (optable
, name
, suffix
, mode
);
5546 if (ALL_FIXED_POINT_MODE_P (mode
))
5547 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5550 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5554 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5555 enum machine_mode mode
)
5557 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5558 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5559 if (INTEGRAL_MODE_P (mode
))
5560 gen_int_libfunc (optable
, name
, suffix
, mode
);
5561 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5562 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5565 /* Like gen_libfunc, but verify that INT or FIXED operation is
5569 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5570 enum machine_mode mode
)
5572 if (INTEGRAL_MODE_P (mode
))
5573 gen_int_libfunc (optable
, name
, suffix
, mode
);
5574 if (ALL_FIXED_POINT_MODE_P (mode
))
5575 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5578 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5582 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5583 enum machine_mode mode
)
5585 if (INTEGRAL_MODE_P (mode
))
5586 gen_int_libfunc (optable
, name
, suffix
, mode
);
5587 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5588 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5591 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5595 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5596 enum machine_mode mode
)
5598 if (INTEGRAL_MODE_P (mode
))
5599 gen_int_libfunc (optable
, name
, suffix
, mode
);
5600 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5601 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5604 /* Initialize the libfunc fields of an entire group of entries of an
5605 inter-mode-class conversion optab. The string formation rules are
5606 similar to the ones for init_libfuncs, above, but instead of having
5607 a mode name and an operand count these functions have two mode names
5608 and no operand count. */
5611 gen_interclass_conv_libfunc (convert_optab tab
,
5613 enum machine_mode tmode
,
5614 enum machine_mode fmode
)
5616 size_t opname_len
= strlen (opname
);
5617 size_t mname_len
= 0;
5619 const char *fname
, *tname
;
5621 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5622 char *libfunc_name
, *suffix
;
5623 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5626 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5627 depends on which underlying decimal floating point format is used. */
5628 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5630 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5632 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5633 nondec_name
[0] = '_';
5634 nondec_name
[1] = '_';
5635 if (targetm
.libfunc_gnu_prefix
)
5637 nondec_name
[2] = 'g';
5638 nondec_name
[3] = 'n';
5639 nondec_name
[4] = 'u';
5640 nondec_name
[5] = '_';
5643 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5644 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5646 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5649 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5650 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5651 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5653 fname
= GET_MODE_NAME (fmode
);
5654 tname
= GET_MODE_NAME (tmode
);
5656 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5658 libfunc_name
= dec_name
;
5659 suffix
= dec_suffix
;
5663 libfunc_name
= nondec_name
;
5664 suffix
= nondec_suffix
;
5668 for (q
= fname
; *q
; p
++, q
++)
5670 for (q
= tname
; *q
; p
++, q
++)
5675 set_conv_libfunc (tab
, tmode
, fmode
,
5676 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5679 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5680 int->fp conversion. */
5683 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5685 enum machine_mode tmode
,
5686 enum machine_mode fmode
)
5688 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5690 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5692 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5695 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5699 gen_ufloat_conv_libfunc (convert_optab tab
,
5700 const char *opname ATTRIBUTE_UNUSED
,
5701 enum machine_mode tmode
,
5702 enum machine_mode fmode
)
5704 if (DECIMAL_FLOAT_MODE_P (tmode
))
5705 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5707 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5710 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5711 fp->int conversion. */
5714 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5716 enum machine_mode tmode
,
5717 enum machine_mode fmode
)
5719 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5721 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5723 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5726 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5727 fp->int conversion with no decimal floating point involved. */
5730 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5732 enum machine_mode tmode
,
5733 enum machine_mode fmode
)
5735 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5737 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5739 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5742 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5743 The string formation rules are
5744 similar to the ones for init_libfunc, above. */
5747 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5748 enum machine_mode tmode
, enum machine_mode fmode
)
5750 size_t opname_len
= strlen (opname
);
5751 size_t mname_len
= 0;
5753 const char *fname
, *tname
;
5755 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5756 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5757 char *libfunc_name
, *suffix
;
5760 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5761 depends on which underlying decimal floating point format is used. */
5762 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5764 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5766 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5767 nondec_name
[0] = '_';
5768 nondec_name
[1] = '_';
5769 if (targetm
.libfunc_gnu_prefix
)
5771 nondec_name
[2] = 'g';
5772 nondec_name
[3] = 'n';
5773 nondec_name
[4] = 'u';
5774 nondec_name
[5] = '_';
5776 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5777 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5779 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5782 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5783 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5784 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5786 fname
= GET_MODE_NAME (fmode
);
5787 tname
= GET_MODE_NAME (tmode
);
5789 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5791 libfunc_name
= dec_name
;
5792 suffix
= dec_suffix
;
5796 libfunc_name
= nondec_name
;
5797 suffix
= nondec_suffix
;
5801 for (q
= fname
; *q
; p
++, q
++)
5803 for (q
= tname
; *q
; p
++, q
++)
5809 set_conv_libfunc (tab
, tmode
, fmode
,
5810 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5813 /* Pick proper libcall for trunc_optab. We need to chose if we do
5814 truncation or extension and interclass or intraclass. */
5817 gen_trunc_conv_libfunc (convert_optab tab
,
5819 enum machine_mode tmode
,
5820 enum machine_mode fmode
)
5822 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5824 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5829 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5830 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5831 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5833 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5836 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5837 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5838 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5839 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5842 /* Pick proper libcall for extend_optab. We need to chose if we do
5843 truncation or extension and interclass or intraclass. */
5846 gen_extend_conv_libfunc (convert_optab tab
,
5847 const char *opname ATTRIBUTE_UNUSED
,
5848 enum machine_mode tmode
,
5849 enum machine_mode fmode
)
5851 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5853 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5858 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5859 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5860 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5862 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5865 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5866 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5867 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5868 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5871 /* Pick proper libcall for fract_optab. We need to chose if we do
5872 interclass or intraclass. */
5875 gen_fract_conv_libfunc (convert_optab tab
,
5877 enum machine_mode tmode
,
5878 enum machine_mode fmode
)
5882 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5885 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5886 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5888 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5891 /* Pick proper libcall for fractuns_optab. */
5894 gen_fractuns_conv_libfunc (convert_optab tab
,
5896 enum machine_mode tmode
,
5897 enum machine_mode fmode
)
5901 /* One mode must be a fixed-point mode, and the other must be an integer
5903 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5904 || (ALL_FIXED_POINT_MODE_P (fmode
)
5905 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5908 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5911 /* Pick proper libcall for satfract_optab. We need to chose if we do
5912 interclass or intraclass. */
5915 gen_satfract_conv_libfunc (convert_optab tab
,
5917 enum machine_mode tmode
,
5918 enum machine_mode fmode
)
5922 /* TMODE must be a fixed-point mode. */
5923 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5926 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5927 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5929 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5932 /* Pick proper libcall for satfractuns_optab. */
5935 gen_satfractuns_conv_libfunc (convert_optab tab
,
5937 enum machine_mode tmode
,
5938 enum machine_mode fmode
)
5942 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5943 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
5946 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5949 /* A table of previously-created libfuncs, hashed by name. */
5950 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
5952 /* Hashtable callbacks for libfunc_decls. */
5955 libfunc_decl_hash (const void *entry
)
5957 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
5961 libfunc_decl_eq (const void *entry1
, const void *entry2
)
5963 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
5966 /* Build a decl for a libfunc named NAME. */
5969 build_libfunc_function (const char *name
)
5971 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
5972 get_identifier (name
),
5973 build_function_type (integer_type_node
, NULL_TREE
));
5974 /* ??? We don't have any type information except for this is
5975 a function. Pretend this is "int foo()". */
5976 DECL_ARTIFICIAL (decl
) = 1;
5977 DECL_EXTERNAL (decl
) = 1;
5978 TREE_PUBLIC (decl
) = 1;
5979 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
5981 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5982 are the flags assigned by targetm.encode_section_info. */
5983 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
5989 init_one_libfunc (const char *name
)
5995 if (libfunc_decls
== NULL
)
5996 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
5997 libfunc_decl_eq
, NULL
);
5999 /* See if we have already created a libfunc decl for this function. */
6000 id
= get_identifier (name
);
6001 hash
= IDENTIFIER_HASH_VALUE (id
);
6002 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6003 decl
= (tree
) *slot
;
6006 /* Create a new decl, so that it can be passed to
6007 targetm.encode_section_info. */
6008 decl
= build_libfunc_function (name
);
6011 return XEXP (DECL_RTL (decl
), 0);
6014 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6017 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6023 id
= get_identifier (name
);
6024 hash
= IDENTIFIER_HASH_VALUE (id
);
6025 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6027 decl
= (tree
) *slot
;
6028 set_user_assembler_name (decl
, asmspec
);
6029 return XEXP (DECL_RTL (decl
), 0);
6032 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6033 MODE to NAME, which should be either 0 or a string constant. */
6035 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
6038 struct libfunc_entry e
;
6039 struct libfunc_entry
**slot
;
6040 e
.optab
= (size_t) (optable
- &optab_table
[0]);
6045 val
= init_one_libfunc (name
);
6048 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6050 *slot
= ggc_alloc_libfunc_entry ();
6051 (*slot
)->optab
= (size_t) (optable
- &optab_table
[0]);
6052 (*slot
)->mode1
= mode
;
6053 (*slot
)->mode2
= VOIDmode
;
6054 (*slot
)->libfunc
= val
;
6057 /* Call this to reset the function entry for one conversion optab
6058 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6059 either 0 or a string constant. */
6061 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
6062 enum machine_mode fmode
, const char *name
)
6065 struct libfunc_entry e
;
6066 struct libfunc_entry
**slot
;
6067 e
.optab
= (size_t) (optable
- &convert_optab_table
[0]);
6072 val
= init_one_libfunc (name
);
6075 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6077 *slot
= ggc_alloc_libfunc_entry ();
6078 (*slot
)->optab
= (size_t) (optable
- &convert_optab_table
[0]);
6079 (*slot
)->mode1
= tmode
;
6080 (*slot
)->mode2
= fmode
;
6081 (*slot
)->libfunc
= val
;
6084 /* Call this to initialize the contents of the optabs
6085 appropriately for the current target machine. */
6092 htab_empty (libfunc_hash
);
6093 /* We statically initialize the insn_codes with the equivalent of
6094 CODE_FOR_nothing. Repeat the process if reinitialising. */
6098 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6100 init_optab (add_optab
, PLUS
);
6101 init_optabv (addv_optab
, PLUS
);
6102 init_optab (sub_optab
, MINUS
);
6103 init_optabv (subv_optab
, MINUS
);
6104 init_optab (ssadd_optab
, SS_PLUS
);
6105 init_optab (usadd_optab
, US_PLUS
);
6106 init_optab (sssub_optab
, SS_MINUS
);
6107 init_optab (ussub_optab
, US_MINUS
);
6108 init_optab (smul_optab
, MULT
);
6109 init_optab (ssmul_optab
, SS_MULT
);
6110 init_optab (usmul_optab
, US_MULT
);
6111 init_optabv (smulv_optab
, MULT
);
6112 init_optab (smul_highpart_optab
, UNKNOWN
);
6113 init_optab (umul_highpart_optab
, UNKNOWN
);
6114 init_optab (smul_widen_optab
, UNKNOWN
);
6115 init_optab (umul_widen_optab
, UNKNOWN
);
6116 init_optab (usmul_widen_optab
, UNKNOWN
);
6117 init_optab (smadd_widen_optab
, UNKNOWN
);
6118 init_optab (umadd_widen_optab
, UNKNOWN
);
6119 init_optab (ssmadd_widen_optab
, UNKNOWN
);
6120 init_optab (usmadd_widen_optab
, UNKNOWN
);
6121 init_optab (smsub_widen_optab
, UNKNOWN
);
6122 init_optab (umsub_widen_optab
, UNKNOWN
);
6123 init_optab (ssmsub_widen_optab
, UNKNOWN
);
6124 init_optab (usmsub_widen_optab
, UNKNOWN
);
6125 init_optab (sdiv_optab
, DIV
);
6126 init_optab (ssdiv_optab
, SS_DIV
);
6127 init_optab (usdiv_optab
, US_DIV
);
6128 init_optabv (sdivv_optab
, DIV
);
6129 init_optab (sdivmod_optab
, UNKNOWN
);
6130 init_optab (udiv_optab
, UDIV
);
6131 init_optab (udivmod_optab
, UNKNOWN
);
6132 init_optab (smod_optab
, MOD
);
6133 init_optab (umod_optab
, UMOD
);
6134 init_optab (fmod_optab
, UNKNOWN
);
6135 init_optab (remainder_optab
, UNKNOWN
);
6136 init_optab (ftrunc_optab
, UNKNOWN
);
6137 init_optab (and_optab
, AND
);
6138 init_optab (ior_optab
, IOR
);
6139 init_optab (xor_optab
, XOR
);
6140 init_optab (ashl_optab
, ASHIFT
);
6141 init_optab (ssashl_optab
, SS_ASHIFT
);
6142 init_optab (usashl_optab
, US_ASHIFT
);
6143 init_optab (ashr_optab
, ASHIFTRT
);
6144 init_optab (lshr_optab
, LSHIFTRT
);
6145 init_optabv (vashl_optab
, ASHIFT
);
6146 init_optabv (vashr_optab
, ASHIFTRT
);
6147 init_optabv (vlshr_optab
, LSHIFTRT
);
6148 init_optab (rotl_optab
, ROTATE
);
6149 init_optab (rotr_optab
, ROTATERT
);
6150 init_optab (smin_optab
, SMIN
);
6151 init_optab (smax_optab
, SMAX
);
6152 init_optab (umin_optab
, UMIN
);
6153 init_optab (umax_optab
, UMAX
);
6154 init_optab (pow_optab
, UNKNOWN
);
6155 init_optab (atan2_optab
, UNKNOWN
);
6156 init_optab (fma_optab
, FMA
);
6157 init_optab (fms_optab
, UNKNOWN
);
6158 init_optab (fnma_optab
, UNKNOWN
);
6159 init_optab (fnms_optab
, UNKNOWN
);
6161 /* These three have codes assigned exclusively for the sake of
6163 init_optab (mov_optab
, SET
);
6164 init_optab (movstrict_optab
, STRICT_LOW_PART
);
6165 init_optab (cbranch_optab
, COMPARE
);
6167 init_optab (cmov_optab
, UNKNOWN
);
6168 init_optab (cstore_optab
, UNKNOWN
);
6169 init_optab (ctrap_optab
, UNKNOWN
);
6171 init_optab (storent_optab
, UNKNOWN
);
6173 init_optab (cmp_optab
, UNKNOWN
);
6174 init_optab (ucmp_optab
, UNKNOWN
);
6176 init_optab (eq_optab
, EQ
);
6177 init_optab (ne_optab
, NE
);
6178 init_optab (gt_optab
, GT
);
6179 init_optab (ge_optab
, GE
);
6180 init_optab (lt_optab
, LT
);
6181 init_optab (le_optab
, LE
);
6182 init_optab (unord_optab
, UNORDERED
);
6184 init_optab (neg_optab
, NEG
);
6185 init_optab (ssneg_optab
, SS_NEG
);
6186 init_optab (usneg_optab
, US_NEG
);
6187 init_optabv (negv_optab
, NEG
);
6188 init_optab (abs_optab
, ABS
);
6189 init_optabv (absv_optab
, ABS
);
6190 init_optab (addcc_optab
, UNKNOWN
);
6191 init_optab (one_cmpl_optab
, NOT
);
6192 init_optab (bswap_optab
, BSWAP
);
6193 init_optab (ffs_optab
, FFS
);
6194 init_optab (clz_optab
, CLZ
);
6195 init_optab (ctz_optab
, CTZ
);
6196 init_optab (clrsb_optab
, CLRSB
);
6197 init_optab (popcount_optab
, POPCOUNT
);
6198 init_optab (parity_optab
, PARITY
);
6199 init_optab (sqrt_optab
, SQRT
);
6200 init_optab (floor_optab
, UNKNOWN
);
6201 init_optab (ceil_optab
, UNKNOWN
);
6202 init_optab (round_optab
, UNKNOWN
);
6203 init_optab (btrunc_optab
, UNKNOWN
);
6204 init_optab (nearbyint_optab
, UNKNOWN
);
6205 init_optab (rint_optab
, UNKNOWN
);
6206 init_optab (sincos_optab
, UNKNOWN
);
6207 init_optab (sin_optab
, UNKNOWN
);
6208 init_optab (asin_optab
, UNKNOWN
);
6209 init_optab (cos_optab
, UNKNOWN
);
6210 init_optab (acos_optab
, UNKNOWN
);
6211 init_optab (exp_optab
, UNKNOWN
);
6212 init_optab (exp10_optab
, UNKNOWN
);
6213 init_optab (exp2_optab
, UNKNOWN
);
6214 init_optab (expm1_optab
, UNKNOWN
);
6215 init_optab (ldexp_optab
, UNKNOWN
);
6216 init_optab (scalb_optab
, UNKNOWN
);
6217 init_optab (significand_optab
, UNKNOWN
);
6218 init_optab (logb_optab
, UNKNOWN
);
6219 init_optab (ilogb_optab
, UNKNOWN
);
6220 init_optab (log_optab
, UNKNOWN
);
6221 init_optab (log10_optab
, UNKNOWN
);
6222 init_optab (log2_optab
, UNKNOWN
);
6223 init_optab (log1p_optab
, UNKNOWN
);
6224 init_optab (tan_optab
, UNKNOWN
);
6225 init_optab (atan_optab
, UNKNOWN
);
6226 init_optab (copysign_optab
, UNKNOWN
);
6227 init_optab (signbit_optab
, UNKNOWN
);
6229 init_optab (isinf_optab
, UNKNOWN
);
6231 init_optab (strlen_optab
, UNKNOWN
);
6232 init_optab (push_optab
, UNKNOWN
);
6234 init_optab (reduc_smax_optab
, UNKNOWN
);
6235 init_optab (reduc_umax_optab
, UNKNOWN
);
6236 init_optab (reduc_smin_optab
, UNKNOWN
);
6237 init_optab (reduc_umin_optab
, UNKNOWN
);
6238 init_optab (reduc_splus_optab
, UNKNOWN
);
6239 init_optab (reduc_uplus_optab
, UNKNOWN
);
6241 init_optab (ssum_widen_optab
, UNKNOWN
);
6242 init_optab (usum_widen_optab
, UNKNOWN
);
6243 init_optab (sdot_prod_optab
, UNKNOWN
);
6244 init_optab (udot_prod_optab
, UNKNOWN
);
6246 init_optab (vec_extract_optab
, UNKNOWN
);
6247 init_optab (vec_set_optab
, UNKNOWN
);
6248 init_optab (vec_init_optab
, UNKNOWN
);
6249 init_optab (vec_shl_optab
, UNKNOWN
);
6250 init_optab (vec_shr_optab
, UNKNOWN
);
6251 init_optab (vec_realign_load_optab
, UNKNOWN
);
6252 init_optab (movmisalign_optab
, UNKNOWN
);
6253 init_optab (vec_widen_umult_hi_optab
, UNKNOWN
);
6254 init_optab (vec_widen_umult_lo_optab
, UNKNOWN
);
6255 init_optab (vec_widen_smult_hi_optab
, UNKNOWN
);
6256 init_optab (vec_widen_smult_lo_optab
, UNKNOWN
);
6257 init_optab (vec_widen_ushiftl_hi_optab
, UNKNOWN
);
6258 init_optab (vec_widen_ushiftl_lo_optab
, UNKNOWN
);
6259 init_optab (vec_widen_sshiftl_hi_optab
, UNKNOWN
);
6260 init_optab (vec_widen_sshiftl_lo_optab
, UNKNOWN
);
6261 init_optab (vec_unpacks_hi_optab
, UNKNOWN
);
6262 init_optab (vec_unpacks_lo_optab
, UNKNOWN
);
6263 init_optab (vec_unpacku_hi_optab
, UNKNOWN
);
6264 init_optab (vec_unpacku_lo_optab
, UNKNOWN
);
6265 init_optab (vec_unpacks_float_hi_optab
, UNKNOWN
);
6266 init_optab (vec_unpacks_float_lo_optab
, UNKNOWN
);
6267 init_optab (vec_unpacku_float_hi_optab
, UNKNOWN
);
6268 init_optab (vec_unpacku_float_lo_optab
, UNKNOWN
);
6269 init_optab (vec_pack_trunc_optab
, UNKNOWN
);
6270 init_optab (vec_pack_usat_optab
, UNKNOWN
);
6271 init_optab (vec_pack_ssat_optab
, UNKNOWN
);
6272 init_optab (vec_pack_ufix_trunc_optab
, UNKNOWN
);
6273 init_optab (vec_pack_sfix_trunc_optab
, UNKNOWN
);
6275 init_optab (powi_optab
, UNKNOWN
);
6278 init_convert_optab (sext_optab
, SIGN_EXTEND
);
6279 init_convert_optab (zext_optab
, ZERO_EXTEND
);
6280 init_convert_optab (trunc_optab
, TRUNCATE
);
6281 init_convert_optab (sfix_optab
, FIX
);
6282 init_convert_optab (ufix_optab
, UNSIGNED_FIX
);
6283 init_convert_optab (sfixtrunc_optab
, UNKNOWN
);
6284 init_convert_optab (ufixtrunc_optab
, UNKNOWN
);
6285 init_convert_optab (sfloat_optab
, FLOAT
);
6286 init_convert_optab (ufloat_optab
, UNSIGNED_FLOAT
);
6287 init_convert_optab (lrint_optab
, UNKNOWN
);
6288 init_convert_optab (lround_optab
, UNKNOWN
);
6289 init_convert_optab (lfloor_optab
, UNKNOWN
);
6290 init_convert_optab (lceil_optab
, UNKNOWN
);
6292 init_convert_optab (fract_optab
, FRACT_CONVERT
);
6293 init_convert_optab (fractuns_optab
, UNSIGNED_FRACT_CONVERT
);
6294 init_convert_optab (satfract_optab
, SAT_FRACT
);
6295 init_convert_optab (satfractuns_optab
, UNSIGNED_SAT_FRACT
);
6297 /* Fill in the optabs with the insns we support. */
6300 /* Initialize the optabs with the names of the library functions. */
6301 add_optab
->libcall_basename
= "add";
6302 add_optab
->libcall_suffix
= '3';
6303 add_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6304 addv_optab
->libcall_basename
= "add";
6305 addv_optab
->libcall_suffix
= '3';
6306 addv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6307 ssadd_optab
->libcall_basename
= "ssadd";
6308 ssadd_optab
->libcall_suffix
= '3';
6309 ssadd_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6310 usadd_optab
->libcall_basename
= "usadd";
6311 usadd_optab
->libcall_suffix
= '3';
6312 usadd_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6313 sub_optab
->libcall_basename
= "sub";
6314 sub_optab
->libcall_suffix
= '3';
6315 sub_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6316 subv_optab
->libcall_basename
= "sub";
6317 subv_optab
->libcall_suffix
= '3';
6318 subv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6319 sssub_optab
->libcall_basename
= "sssub";
6320 sssub_optab
->libcall_suffix
= '3';
6321 sssub_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6322 ussub_optab
->libcall_basename
= "ussub";
6323 ussub_optab
->libcall_suffix
= '3';
6324 ussub_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6325 smul_optab
->libcall_basename
= "mul";
6326 smul_optab
->libcall_suffix
= '3';
6327 smul_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6328 smulv_optab
->libcall_basename
= "mul";
6329 smulv_optab
->libcall_suffix
= '3';
6330 smulv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6331 ssmul_optab
->libcall_basename
= "ssmul";
6332 ssmul_optab
->libcall_suffix
= '3';
6333 ssmul_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6334 usmul_optab
->libcall_basename
= "usmul";
6335 usmul_optab
->libcall_suffix
= '3';
6336 usmul_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6337 sdiv_optab
->libcall_basename
= "div";
6338 sdiv_optab
->libcall_suffix
= '3';
6339 sdiv_optab
->libcall_gen
= gen_int_fp_signed_fixed_libfunc
;
6340 sdivv_optab
->libcall_basename
= "divv";
6341 sdivv_optab
->libcall_suffix
= '3';
6342 sdivv_optab
->libcall_gen
= gen_int_libfunc
;
6343 ssdiv_optab
->libcall_basename
= "ssdiv";
6344 ssdiv_optab
->libcall_suffix
= '3';
6345 ssdiv_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6346 udiv_optab
->libcall_basename
= "udiv";
6347 udiv_optab
->libcall_suffix
= '3';
6348 udiv_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6349 usdiv_optab
->libcall_basename
= "usdiv";
6350 usdiv_optab
->libcall_suffix
= '3';
6351 usdiv_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6352 sdivmod_optab
->libcall_basename
= "divmod";
6353 sdivmod_optab
->libcall_suffix
= '4';
6354 sdivmod_optab
->libcall_gen
= gen_int_libfunc
;
6355 udivmod_optab
->libcall_basename
= "udivmod";
6356 udivmod_optab
->libcall_suffix
= '4';
6357 udivmod_optab
->libcall_gen
= gen_int_libfunc
;
6358 smod_optab
->libcall_basename
= "mod";
6359 smod_optab
->libcall_suffix
= '3';
6360 smod_optab
->libcall_gen
= gen_int_libfunc
;
6361 umod_optab
->libcall_basename
= "umod";
6362 umod_optab
->libcall_suffix
= '3';
6363 umod_optab
->libcall_gen
= gen_int_libfunc
;
6364 ftrunc_optab
->libcall_basename
= "ftrunc";
6365 ftrunc_optab
->libcall_suffix
= '2';
6366 ftrunc_optab
->libcall_gen
= gen_fp_libfunc
;
6367 and_optab
->libcall_basename
= "and";
6368 and_optab
->libcall_suffix
= '3';
6369 and_optab
->libcall_gen
= gen_int_libfunc
;
6370 ior_optab
->libcall_basename
= "ior";
6371 ior_optab
->libcall_suffix
= '3';
6372 ior_optab
->libcall_gen
= gen_int_libfunc
;
6373 xor_optab
->libcall_basename
= "xor";
6374 xor_optab
->libcall_suffix
= '3';
6375 xor_optab
->libcall_gen
= gen_int_libfunc
;
6376 ashl_optab
->libcall_basename
= "ashl";
6377 ashl_optab
->libcall_suffix
= '3';
6378 ashl_optab
->libcall_gen
= gen_int_fixed_libfunc
;
6379 ssashl_optab
->libcall_basename
= "ssashl";
6380 ssashl_optab
->libcall_suffix
= '3';
6381 ssashl_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6382 usashl_optab
->libcall_basename
= "usashl";
6383 usashl_optab
->libcall_suffix
= '3';
6384 usashl_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6385 ashr_optab
->libcall_basename
= "ashr";
6386 ashr_optab
->libcall_suffix
= '3';
6387 ashr_optab
->libcall_gen
= gen_int_signed_fixed_libfunc
;
6388 lshr_optab
->libcall_basename
= "lshr";
6389 lshr_optab
->libcall_suffix
= '3';
6390 lshr_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6391 smin_optab
->libcall_basename
= "min";
6392 smin_optab
->libcall_suffix
= '3';
6393 smin_optab
->libcall_gen
= gen_int_fp_libfunc
;
6394 smax_optab
->libcall_basename
= "max";
6395 smax_optab
->libcall_suffix
= '3';
6396 smax_optab
->libcall_gen
= gen_int_fp_libfunc
;
6397 umin_optab
->libcall_basename
= "umin";
6398 umin_optab
->libcall_suffix
= '3';
6399 umin_optab
->libcall_gen
= gen_int_libfunc
;
6400 umax_optab
->libcall_basename
= "umax";
6401 umax_optab
->libcall_suffix
= '3';
6402 umax_optab
->libcall_gen
= gen_int_libfunc
;
6403 neg_optab
->libcall_basename
= "neg";
6404 neg_optab
->libcall_suffix
= '2';
6405 neg_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6406 ssneg_optab
->libcall_basename
= "ssneg";
6407 ssneg_optab
->libcall_suffix
= '2';
6408 ssneg_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6409 usneg_optab
->libcall_basename
= "usneg";
6410 usneg_optab
->libcall_suffix
= '2';
6411 usneg_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6412 negv_optab
->libcall_basename
= "neg";
6413 negv_optab
->libcall_suffix
= '2';
6414 negv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6415 one_cmpl_optab
->libcall_basename
= "one_cmpl";
6416 one_cmpl_optab
->libcall_suffix
= '2';
6417 one_cmpl_optab
->libcall_gen
= gen_int_libfunc
;
6418 ffs_optab
->libcall_basename
= "ffs";
6419 ffs_optab
->libcall_suffix
= '2';
6420 ffs_optab
->libcall_gen
= gen_int_libfunc
;
6421 clz_optab
->libcall_basename
= "clz";
6422 clz_optab
->libcall_suffix
= '2';
6423 clz_optab
->libcall_gen
= gen_int_libfunc
;
6424 ctz_optab
->libcall_basename
= "ctz";
6425 ctz_optab
->libcall_suffix
= '2';
6426 ctz_optab
->libcall_gen
= gen_int_libfunc
;
6427 clrsb_optab
->libcall_basename
= "clrsb";
6428 clrsb_optab
->libcall_suffix
= '2';
6429 clrsb_optab
->libcall_gen
= gen_int_libfunc
;
6430 popcount_optab
->libcall_basename
= "popcount";
6431 popcount_optab
->libcall_suffix
= '2';
6432 popcount_optab
->libcall_gen
= gen_int_libfunc
;
6433 parity_optab
->libcall_basename
= "parity";
6434 parity_optab
->libcall_suffix
= '2';
6435 parity_optab
->libcall_gen
= gen_int_libfunc
;
6437 /* Comparison libcalls for integers MUST come in pairs,
6439 cmp_optab
->libcall_basename
= "cmp";
6440 cmp_optab
->libcall_suffix
= '2';
6441 cmp_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6442 ucmp_optab
->libcall_basename
= "ucmp";
6443 ucmp_optab
->libcall_suffix
= '2';
6444 ucmp_optab
->libcall_gen
= gen_int_libfunc
;
6446 /* EQ etc are floating point only. */
6447 eq_optab
->libcall_basename
= "eq";
6448 eq_optab
->libcall_suffix
= '2';
6449 eq_optab
->libcall_gen
= gen_fp_libfunc
;
6450 ne_optab
->libcall_basename
= "ne";
6451 ne_optab
->libcall_suffix
= '2';
6452 ne_optab
->libcall_gen
= gen_fp_libfunc
;
6453 gt_optab
->libcall_basename
= "gt";
6454 gt_optab
->libcall_suffix
= '2';
6455 gt_optab
->libcall_gen
= gen_fp_libfunc
;
6456 ge_optab
->libcall_basename
= "ge";
6457 ge_optab
->libcall_suffix
= '2';
6458 ge_optab
->libcall_gen
= gen_fp_libfunc
;
6459 lt_optab
->libcall_basename
= "lt";
6460 lt_optab
->libcall_suffix
= '2';
6461 lt_optab
->libcall_gen
= gen_fp_libfunc
;
6462 le_optab
->libcall_basename
= "le";
6463 le_optab
->libcall_suffix
= '2';
6464 le_optab
->libcall_gen
= gen_fp_libfunc
;
6465 unord_optab
->libcall_basename
= "unord";
6466 unord_optab
->libcall_suffix
= '2';
6467 unord_optab
->libcall_gen
= gen_fp_libfunc
;
6469 powi_optab
->libcall_basename
= "powi";
6470 powi_optab
->libcall_suffix
= '2';
6471 powi_optab
->libcall_gen
= gen_fp_libfunc
;
6474 sfloat_optab
->libcall_basename
= "float";
6475 sfloat_optab
->libcall_gen
= gen_int_to_fp_conv_libfunc
;
6476 ufloat_optab
->libcall_gen
= gen_ufloat_conv_libfunc
;
6477 sfix_optab
->libcall_basename
= "fix";
6478 sfix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6479 ufix_optab
->libcall_basename
= "fixuns";
6480 ufix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6481 lrint_optab
->libcall_basename
= "lrint";
6482 lrint_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6483 lround_optab
->libcall_basename
= "lround";
6484 lround_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6485 lfloor_optab
->libcall_basename
= "lfloor";
6486 lfloor_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6487 lceil_optab
->libcall_basename
= "lceil";
6488 lceil_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6490 /* trunc_optab is also used for FLOAT_EXTEND. */
6491 sext_optab
->libcall_basename
= "extend";
6492 sext_optab
->libcall_gen
= gen_extend_conv_libfunc
;
6493 trunc_optab
->libcall_basename
= "trunc";
6494 trunc_optab
->libcall_gen
= gen_trunc_conv_libfunc
;
6496 /* Conversions for fixed-point modes and other modes. */
6497 fract_optab
->libcall_basename
= "fract";
6498 fract_optab
->libcall_gen
= gen_fract_conv_libfunc
;
6499 satfract_optab
->libcall_basename
= "satfract";
6500 satfract_optab
->libcall_gen
= gen_satfract_conv_libfunc
;
6501 fractuns_optab
->libcall_basename
= "fractuns";
6502 fractuns_optab
->libcall_gen
= gen_fractuns_conv_libfunc
;
6503 satfractuns_optab
->libcall_basename
= "satfractuns";
6504 satfractuns_optab
->libcall_gen
= gen_satfractuns_conv_libfunc
;
6506 /* The ffs function operates on `int'. Fall back on it if we do not
6507 have a libgcc2 function for that width. */
6508 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6509 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6512 /* Explicitly initialize the bswap libfuncs since we need them to be
6513 valid for things other than word_mode. */
6514 if (targetm
.libfunc_gnu_prefix
)
6516 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6517 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6521 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6522 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6525 /* Use cabs for double complex abs, since systems generally have cabs.
6526 Don't define any libcall for float complex, so that cabs will be used. */
6527 if (complex_double_type_node
)
6528 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
), "cabs");
6530 abort_libfunc
= init_one_libfunc ("abort");
6531 memcpy_libfunc
= init_one_libfunc ("memcpy");
6532 memmove_libfunc
= init_one_libfunc ("memmove");
6533 memcmp_libfunc
= init_one_libfunc ("memcmp");
6534 memset_libfunc
= init_one_libfunc ("memset");
6535 setbits_libfunc
= init_one_libfunc ("__setbits");
6537 #ifndef DONT_USE_BUILTIN_SETJMP
6538 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6539 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6541 setjmp_libfunc
= init_one_libfunc ("setjmp");
6542 longjmp_libfunc
= init_one_libfunc ("longjmp");
6544 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6545 unwind_sjlj_unregister_libfunc
6546 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6548 /* For function entry/exit instrumentation. */
6549 profile_function_entry_libfunc
6550 = init_one_libfunc ("__cyg_profile_func_enter");
6551 profile_function_exit_libfunc
6552 = init_one_libfunc ("__cyg_profile_func_exit");
6554 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6556 /* Allow the target to add more libcalls or rename some, etc. */
6557 targetm
.init_libfuncs ();
6560 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6561 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6564 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6566 enum machine_mode mode
;
6568 size_t len
= strlen (base
);
6571 gcc_assert (max
<= 8);
6572 gcc_assert (len
+ 3 < sizeof (buf
));
6574 memcpy (buf
, base
, len
);
6577 buf
[len
+ 2] = '\0';
6580 for (i
= 1; i
<= max
; i
*= 2)
6582 buf
[len
+ 1] = '0' + i
;
6583 set_optab_libfunc (tab
, mode
, buf
);
6584 mode
= GET_MODE_2XWIDER_MODE (mode
);
6589 init_sync_libfuncs (int max
)
6591 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6592 "__sync_val_compare_and_swap", max
);
6593 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6594 "__sync_lock_test_and_set", max
);
6596 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6597 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6598 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6599 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6600 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6601 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6603 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6604 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6605 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6606 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6607 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6608 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6611 /* Print information about the current contents of the optabs on
6615 debug_optab_libfuncs (void)
6621 /* Dump the arithmetic optabs. */
6622 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
6623 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6628 o
= &optab_table
[i
];
6629 l
= optab_libfunc (o
, (enum machine_mode
) j
);
6632 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6633 fprintf (stderr
, "%s\t%s:\t%s\n",
6634 GET_RTX_NAME (o
->code
),
6640 /* Dump the conversion optabs. */
6641 for (i
= 0; i
< (int) COI_MAX
; ++i
)
6642 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6643 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6648 o
= &convert_optab_table
[i
];
6649 l
= convert_optab_libfunc (o
, (enum machine_mode
) j
,
6650 (enum machine_mode
) k
);
6653 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6654 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6655 GET_RTX_NAME (o
->code
),
6664 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6665 CODE. Return 0 on failure. */
6668 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6670 enum machine_mode mode
= GET_MODE (op1
);
6671 enum insn_code icode
;
6675 if (mode
== VOIDmode
)
6678 icode
= optab_handler (ctrap_optab
, mode
);
6679 if (icode
== CODE_FOR_nothing
)
6682 /* Some targets only accept a zero trap code. */
6683 if (!insn_operand_matches (icode
, 3, tcode
))
6686 do_pending_stack_adjust ();
6688 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6693 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6696 /* If that failed, then give up. */
6704 insn
= get_insns ();
6709 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6710 or unsigned operation code. */
6712 static enum rtx_code
6713 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6725 code
= unsignedp
? LTU
: LT
;
6728 code
= unsignedp
? LEU
: LE
;
6731 code
= unsignedp
? GTU
: GT
;
6734 code
= unsignedp
? GEU
: GE
;
6737 case UNORDERED_EXPR
:
6768 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6769 unsigned operators. Do not generate compare instruction. */
6772 vector_compare_rtx (tree cond
, bool unsignedp
, enum insn_code icode
)
6774 struct expand_operand ops
[2];
6775 enum rtx_code rcode
;
6777 rtx rtx_op0
, rtx_op1
;
6779 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6780 ensures that condition is a relational operation. */
6781 gcc_assert (COMPARISON_CLASS_P (cond
));
6783 rcode
= get_rtx_code (TREE_CODE (cond
), unsignedp
);
6784 t_op0
= TREE_OPERAND (cond
, 0);
6785 t_op1
= TREE_OPERAND (cond
, 1);
6787 /* Expand operands. */
6788 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6790 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6793 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6794 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6795 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6797 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6800 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6801 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6804 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6805 const unsigned char *sel
)
6807 enum machine_mode qimode
;
6809 /* If the target doesn't implement a vector mode for the vector type,
6810 then no operations are supported. */
6811 if (!VECTOR_MODE_P (mode
))
6816 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6818 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6819 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6823 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6826 /* We allow fallback to a QI vector mode, and adjust the mask. */
6827 if (GET_MODE_INNER (mode
) == QImode
)
6829 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6830 if (!VECTOR_MODE_P (qimode
))
6833 /* ??? For completeness, we ought to check the QImode version of
6834 vec_perm_const_optab. But all users of this implicit lowering
6835 feature implement the variable vec_perm_optab. */
6836 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6839 /* In order to support the lowering of variable permutations,
6840 we need to support shifts and adds. */
6843 if (GET_MODE_UNIT_SIZE (mode
) > 2
6844 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6845 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6847 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6854 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6857 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6858 rtx v0
, rtx v1
, rtx sel
)
6860 enum machine_mode tmode
= GET_MODE (target
);
6861 enum machine_mode smode
= GET_MODE (sel
);
6862 struct expand_operand ops
[4];
6864 create_output_operand (&ops
[0], target
, tmode
);
6865 create_input_operand (&ops
[3], sel
, smode
);
6867 /* Make an effort to preserve v0 == v1. The target expander is able to
6868 rely on this to determine if we're permuting a single input operand. */
6869 if (rtx_equal_p (v0
, v1
))
6871 if (!insn_operand_matches (icode
, 1, v0
))
6872 v0
= force_reg (tmode
, v0
);
6873 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6874 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6876 create_fixed_operand (&ops
[1], v0
);
6877 create_fixed_operand (&ops
[2], v0
);
6881 create_input_operand (&ops
[1], v0
, tmode
);
6882 create_input_operand (&ops
[2], v1
, tmode
);
6885 if (maybe_expand_insn (icode
, 4, ops
))
6886 return ops
[0].value
;
6890 /* Generate instructions for vec_perm optab given its mode
6891 and three operands. */
6894 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6896 enum insn_code icode
;
6897 enum machine_mode qimode
;
6898 unsigned int i
, w
, e
, u
;
6899 rtx tmp
, sel_qi
= NULL
;
6902 if (!target
|| GET_MODE (target
) != mode
)
6903 target
= gen_reg_rtx (mode
);
6905 w
= GET_MODE_SIZE (mode
);
6906 e
= GET_MODE_NUNITS (mode
);
6907 u
= GET_MODE_UNIT_SIZE (mode
);
6909 /* Set QIMODE to a different vector mode with byte elements.
6910 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6912 if (GET_MODE_INNER (mode
) != QImode
)
6914 qimode
= mode_for_vector (QImode
, w
);
6915 if (!VECTOR_MODE_P (qimode
))
6919 /* If the input is a constant, expand it specially. */
6920 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6921 if (GET_CODE (sel
) == CONST_VECTOR
)
6923 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6924 if (icode
!= CODE_FOR_nothing
)
6926 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6931 /* Fall back to a constant byte-based permutation. */
6932 if (qimode
!= VOIDmode
)
6934 vec
= rtvec_alloc (w
);
6935 for (i
= 0; i
< e
; ++i
)
6937 unsigned int j
, this_e
;
6939 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6940 this_e
&= 2 * e
- 1;
6943 for (j
= 0; j
< u
; ++j
)
6944 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6946 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6948 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6949 if (icode
!= CODE_FOR_nothing
)
6951 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
6952 gen_lowpart (qimode
, v0
),
6953 gen_lowpart (qimode
, v1
), sel_qi
);
6955 return gen_lowpart (mode
, tmp
);
6960 /* Otherwise expand as a fully variable permuation. */
6961 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6962 if (icode
!= CODE_FOR_nothing
)
6964 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6969 /* As a special case to aid several targets, lower the element-based
6970 permutation to a byte-based permutation and try again. */
6971 if (qimode
== VOIDmode
)
6973 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6974 if (icode
== CODE_FOR_nothing
)
6979 /* Multiply each element by its byte size. */
6980 enum machine_mode selmode
= GET_MODE (sel
);
6982 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6983 sel
, 0, OPTAB_DIRECT
);
6985 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6986 GEN_INT (exact_log2 (u
)),
6987 sel
, 0, OPTAB_DIRECT
);
6988 gcc_assert (sel
!= NULL
);
6990 /* Broadcast the low byte each element into each of its bytes. */
6991 vec
= rtvec_alloc (w
);
6992 for (i
= 0; i
< w
; ++i
)
6994 int this_e
= i
/ u
* u
;
6995 if (BYTES_BIG_ENDIAN
)
6997 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6999 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
7000 sel
= gen_lowpart (qimode
, sel
);
7001 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
7002 gcc_assert (sel
!= NULL
);
7004 /* Add the byte offset to each byte element. */
7005 /* Note that the definition of the indicies here is memory ordering,
7006 so there should be no difference between big and little endian. */
7007 vec
= rtvec_alloc (w
);
7008 for (i
= 0; i
< w
; ++i
)
7009 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
7010 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
7011 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
7012 sel
, 0, OPTAB_DIRECT
);
7013 gcc_assert (sel_qi
!= NULL
);
7016 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
7017 gen_lowpart (qimode
, v0
),
7018 gen_lowpart (qimode
, v1
), sel_qi
);
7020 tmp
= gen_lowpart (mode
, tmp
);
7024 /* Return insn code for a conditional operator with a comparison in
7025 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
7027 static inline enum insn_code
7028 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
7030 enum insn_code icode
= CODE_FOR_nothing
;
7032 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
7034 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
7038 /* Return TRUE iff, appropriate vector insns are available
7039 for vector cond expr with vector type VALUE_TYPE and a comparison
7040 with operand vector types in CMP_OP_TYPE. */
7043 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
7045 enum machine_mode value_mode
= TYPE_MODE (value_type
);
7046 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
7047 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
7048 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
7049 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
7050 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
7055 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
7059 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
7062 struct expand_operand ops
[6];
7063 enum insn_code icode
;
7064 rtx comparison
, rtx_op1
, rtx_op2
;
7065 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
7066 enum machine_mode cmp_op_mode
;
7069 gcc_assert (COMPARISON_CLASS_P (op0
));
7071 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0
, 0)));
7072 cmp_op_mode
= TYPE_MODE (TREE_TYPE (TREE_OPERAND (op0
, 0)));
7074 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
7075 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
7077 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
7078 if (icode
== CODE_FOR_nothing
)
7081 comparison
= vector_compare_rtx (op0
, unsignedp
, icode
);
7082 rtx_op1
= expand_normal (op1
);
7083 rtx_op2
= expand_normal (op2
);
7085 create_output_operand (&ops
[0], target
, mode
);
7086 create_input_operand (&ops
[1], rtx_op1
, mode
);
7087 create_input_operand (&ops
[2], rtx_op2
, mode
);
7088 create_fixed_operand (&ops
[3], comparison
);
7089 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
7090 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
7091 expand_insn (icode
, 6, ops
);
7092 return ops
[0].value
;
7096 /* Return true if there is a compare_and_swap pattern. */
7099 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
7101 enum insn_code icode
;
7103 /* Check for __atomic_compare_and_swap. */
7104 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7105 if (icode
!= CODE_FOR_nothing
)
7108 /* Check for __sync_compare_and_swap. */
7109 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7110 if (icode
!= CODE_FOR_nothing
)
7112 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
7115 /* No inline compare and swap. */
7119 /* Return true if an atomic exchange can be performed. */
7122 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
7124 enum insn_code icode
;
7126 /* Check for __atomic_exchange. */
7127 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7128 if (icode
!= CODE_FOR_nothing
)
7131 /* Don't check __sync_test_and_set, as on some platforms that
7132 has reduced functionality. Targets that really do support
7133 a proper exchange should simply be updated to the __atomics. */
7135 return can_compare_and_swap_p (mode
, allow_libcall
);
7139 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7143 find_cc_set (rtx x
, const_rtx pat
, void *data
)
7145 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
7146 && GET_CODE (pat
) == SET
)
7148 rtx
*p_cc_reg
= (rtx
*) data
;
7149 gcc_assert (!*p_cc_reg
);
7154 /* This is a helper function for the other atomic operations. This function
7155 emits a loop that contains SEQ that iterates until a compare-and-swap
7156 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7157 a set of instructions that takes a value from OLD_REG as an input and
7158 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7159 set to the current contents of MEM. After SEQ, a compare-and-swap will
7160 attempt to update MEM with NEW_REG. The function returns true when the
7161 loop was generated successfully. */
7164 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7166 enum machine_mode mode
= GET_MODE (mem
);
7167 rtx label
, cmp_reg
, success
, oldval
;
7169 /* The loop we want to generate looks like
7175 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
7179 Note that we only do the plain load from memory once. Subsequent
7180 iterations use the value loaded by the compare-and-swap pattern. */
7182 label
= gen_label_rtx ();
7183 cmp_reg
= gen_reg_rtx (mode
);
7185 emit_move_insn (cmp_reg
, mem
);
7187 emit_move_insn (old_reg
, cmp_reg
);
7193 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7194 new_reg
, false, MEMMODEL_SEQ_CST
,
7198 if (oldval
!= cmp_reg
)
7199 emit_move_insn (cmp_reg
, oldval
);
7201 /* ??? Mark this jump predicted not taken? */
7202 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7203 GET_MODE (success
), 1, label
);
7208 /* This function tries to emit an atomic_exchange intruction. VAL is written
7209 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7210 using TARGET if possible. */
7213 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7215 enum machine_mode mode
= GET_MODE (mem
);
7216 enum insn_code icode
;
7218 /* If the target supports the exchange directly, great. */
7219 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7220 if (icode
!= CODE_FOR_nothing
)
7222 struct expand_operand ops
[4];
7224 create_output_operand (&ops
[0], target
, mode
);
7225 create_fixed_operand (&ops
[1], mem
);
7226 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7227 create_convert_operand_to (&ops
[2], val
, mode
, true);
7228 create_integer_operand (&ops
[3], model
);
7229 if (maybe_expand_insn (icode
, 4, ops
))
7230 return ops
[0].value
;
7236 /* This function tries to implement an atomic exchange operation using
7237 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7238 The previous contents of *MEM are returned, using TARGET if possible.
7239 Since this instructionn is an acquire barrier only, stronger memory
7240 models may require additional barriers to be emitted. */
7243 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7244 enum memmodel model
)
7246 enum machine_mode mode
= GET_MODE (mem
);
7247 enum insn_code icode
;
7248 rtx last_insn
= get_last_insn ();
7250 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7252 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7253 exists, and the memory model is stronger than acquire, add a release
7254 barrier before the instruction. */
7256 if (model
== MEMMODEL_SEQ_CST
7257 || model
== MEMMODEL_RELEASE
7258 || model
== MEMMODEL_ACQ_REL
)
7259 expand_mem_thread_fence (model
);
7261 if (icode
!= CODE_FOR_nothing
)
7263 struct expand_operand ops
[3];
7264 create_output_operand (&ops
[0], target
, mode
);
7265 create_fixed_operand (&ops
[1], mem
);
7266 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7267 create_convert_operand_to (&ops
[2], val
, mode
, true);
7268 if (maybe_expand_insn (icode
, 3, ops
))
7269 return ops
[0].value
;
7272 /* If an external test-and-set libcall is provided, use that instead of
7273 any external compare-and-swap that we might get from the compare-and-
7274 swap-loop expansion later. */
7275 if (!can_compare_and_swap_p (mode
, false))
7277 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7278 if (libfunc
!= NULL
)
7282 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7283 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7284 mode
, 2, addr
, ptr_mode
,
7289 /* If the test_and_set can't be emitted, eliminate any barrier that might
7290 have been emitted. */
7291 delete_insns_since (last_insn
);
7295 /* This function tries to implement an atomic exchange operation using a
7296 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7297 *MEM are returned, using TARGET if possible. No memory model is required
7298 since a compare_and_swap loop is seq-cst. */
7301 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7303 enum machine_mode mode
= GET_MODE (mem
);
7305 if (can_compare_and_swap_p (mode
, true))
7307 if (!target
|| !register_operand (target
, mode
))
7308 target
= gen_reg_rtx (mode
);
7309 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7310 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7311 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7318 /* This function tries to implement an atomic test-and-set operation
7319 using the atomic_test_and_set instruction pattern. A boolean value
7320 is returned from the operation, using TARGET if possible. */
7322 #ifndef HAVE_atomic_test_and_set
7323 #define HAVE_atomic_test_and_set 0
7324 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7328 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7330 enum machine_mode pat_bool_mode
;
7331 struct expand_operand ops
[3];
7333 if (!HAVE_atomic_test_and_set
)
7336 /* While we always get QImode from __atomic_test_and_set, we get
7337 other memory modes from __sync_lock_test_and_set. Note that we
7338 use no endian adjustment here. This matches the 4.6 behavior
7339 in the Sparc backend. */
7341 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7342 if (GET_MODE (mem
) != QImode
)
7343 mem
= adjust_address_nv (mem
, QImode
, 0);
7345 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7346 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7347 create_fixed_operand (&ops
[1], mem
);
7348 create_integer_operand (&ops
[2], model
);
7350 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7351 return ops
[0].value
;
7355 /* This function expands the legacy _sync_lock test_and_set operation which is
7356 generally an atomic exchange. Some limited targets only allow the
7357 constant 1 to be stored. This is an ACQUIRE operation.
7359 TARGET is an optional place to stick the return value.
7360 MEM is where VAL is stored. */
7363 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7367 /* Try an atomic_exchange first. */
7368 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7372 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7376 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7380 /* If there are no other options, try atomic_test_and_set if the value
7381 being stored is 1. */
7382 if (val
== const1_rtx
)
7383 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7388 /* This function expands the atomic test_and_set operation:
7389 atomically store a boolean TRUE into MEM and return the previous value.
7391 MEMMODEL is the memory model variant to use.
7392 TARGET is an optional place to stick the return value. */
7395 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7397 enum machine_mode mode
= GET_MODE (mem
);
7398 rtx ret
, trueval
, subtarget
;
7400 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7404 /* Be binary compatible with non-default settings of trueval, and different
7405 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7406 another only has atomic-exchange. */
7407 if (targetm
.atomic_test_and_set_trueval
== 1)
7409 trueval
= const1_rtx
;
7410 subtarget
= target
? target
: gen_reg_rtx (mode
);
7414 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7415 subtarget
= gen_reg_rtx (mode
);
7418 /* Try the atomic-exchange optab... */
7419 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7421 /* ... then an atomic-compare-and-swap loop ... */
7423 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7425 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7427 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7429 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7430 things with the value 1. Thus we try again without trueval. */
7431 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7432 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7434 /* Failing all else, assume a single threaded environment and simply
7435 perform the operation. */
7438 emit_move_insn (subtarget
, mem
);
7439 emit_move_insn (mem
, trueval
);
7443 /* Recall that have to return a boolean value; rectify if trueval
7444 is not exactly one. */
7445 if (targetm
.atomic_test_and_set_trueval
!= 1)
7446 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7451 /* This function expands the atomic exchange operation:
7452 atomically store VAL in MEM and return the previous value in MEM.
7454 MEMMODEL is the memory model variant to use.
7455 TARGET is an optional place to stick the return value. */
7458 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7462 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7464 /* Next try a compare-and-swap loop for the exchange. */
7466 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7471 /* This function expands the atomic compare exchange operation:
7473 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7474 *PTARGET_OVAL is an optional place to store the old value from memory.
7475 Both target parameters may be NULL to indicate that we do not care about
7476 that return value. Both target parameters are updated on success to
7477 the actual location of the corresponding result.
7479 MEMMODEL is the memory model variant to use.
7481 The return value of the function is true for success. */
7484 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7485 rtx mem
, rtx expected
, rtx desired
,
7486 bool is_weak
, enum memmodel succ_model
,
7487 enum memmodel fail_model
)
7489 enum machine_mode mode
= GET_MODE (mem
);
7490 struct expand_operand ops
[8];
7491 enum insn_code icode
;
7492 rtx target_oval
, target_bool
= NULL_RTX
;
7495 /* Load expected into a register for the compare and swap. */
7496 if (MEM_P (expected
))
7497 expected
= copy_to_reg (expected
);
7499 /* Make sure we always have some place to put the return oldval.
7500 Further, make sure that place is distinct from the input expected,
7501 just in case we need that path down below. */
7502 if (ptarget_oval
== NULL
7503 || (target_oval
= *ptarget_oval
) == NULL
7504 || reg_overlap_mentioned_p (expected
, target_oval
))
7505 target_oval
= gen_reg_rtx (mode
);
7507 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7508 if (icode
!= CODE_FOR_nothing
)
7510 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7512 /* Make sure we always have a place for the bool operand. */
7513 if (ptarget_bool
== NULL
7514 || (target_bool
= *ptarget_bool
) == NULL
7515 || GET_MODE (target_bool
) != bool_mode
)
7516 target_bool
= gen_reg_rtx (bool_mode
);
7518 /* Emit the compare_and_swap. */
7519 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7520 create_output_operand (&ops
[1], target_oval
, mode
);
7521 create_fixed_operand (&ops
[2], mem
);
7522 create_convert_operand_to (&ops
[3], expected
, mode
, true);
7523 create_convert_operand_to (&ops
[4], desired
, mode
, true);
7524 create_integer_operand (&ops
[5], is_weak
);
7525 create_integer_operand (&ops
[6], succ_model
);
7526 create_integer_operand (&ops
[7], fail_model
);
7527 expand_insn (icode
, 8, ops
);
7529 /* Return success/failure. */
7530 target_bool
= ops
[0].value
;
7531 target_oval
= ops
[1].value
;
7535 /* Otherwise fall back to the original __sync_val_compare_and_swap
7536 which is always seq-cst. */
7537 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7538 if (icode
!= CODE_FOR_nothing
)
7542 create_output_operand (&ops
[0], target_oval
, mode
);
7543 create_fixed_operand (&ops
[1], mem
);
7544 create_convert_operand_to (&ops
[2], expected
, mode
, true);
7545 create_convert_operand_to (&ops
[3], desired
, mode
, true);
7546 if (!maybe_expand_insn (icode
, 4, ops
))
7549 target_oval
= ops
[0].value
;
7551 /* If the caller isn't interested in the boolean return value,
7552 skip the computation of it. */
7553 if (ptarget_bool
== NULL
)
7556 /* Otherwise, work out if the compare-and-swap succeeded. */
7558 if (have_insn_for (COMPARE
, CCmode
))
7559 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7562 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7563 const0_rtx
, VOIDmode
, 0, 1);
7566 goto success_bool_from_val
;
7569 /* Also check for library support for __sync_val_compare_and_swap. */
7570 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7571 if (libfunc
!= NULL
)
7573 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7574 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7575 mode
, 3, addr
, ptr_mode
,
7576 expected
, mode
, desired
, mode
);
7578 /* Compute the boolean return value only if requested. */
7580 goto success_bool_from_val
;
7588 success_bool_from_val
:
7589 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7590 expected
, VOIDmode
, 1, 1);
7592 /* Make sure that the oval output winds up where the caller asked. */
7594 *ptarget_oval
= target_oval
;
7596 *ptarget_bool
= target_bool
;
7600 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7603 expand_asm_memory_barrier (void)
7607 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7608 rtvec_alloc (0), rtvec_alloc (0),
7609 rtvec_alloc (0), UNKNOWN_LOCATION
);
7610 MEM_VOLATILE_P (asm_op
) = 1;
7612 clob
= gen_rtx_SCRATCH (VOIDmode
);
7613 clob
= gen_rtx_MEM (BLKmode
, clob
);
7614 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7616 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7619 /* This routine will either emit the mem_thread_fence pattern or issue a
7620 sync_synchronize to generate a fence for memory model MEMMODEL. */
7622 #ifndef HAVE_mem_thread_fence
7623 # define HAVE_mem_thread_fence 0
7624 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7626 #ifndef HAVE_memory_barrier
7627 # define HAVE_memory_barrier 0
7628 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7632 expand_mem_thread_fence (enum memmodel model
)
7634 if (HAVE_mem_thread_fence
)
7635 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7636 else if (model
!= MEMMODEL_RELAXED
)
7638 if (HAVE_memory_barrier
)
7639 emit_insn (gen_memory_barrier ());
7640 else if (synchronize_libfunc
!= NULL_RTX
)
7641 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7643 expand_asm_memory_barrier ();
7647 /* This routine will either emit the mem_signal_fence pattern or issue a
7648 sync_synchronize to generate a fence for memory model MEMMODEL. */
7650 #ifndef HAVE_mem_signal_fence
7651 # define HAVE_mem_signal_fence 0
7652 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7656 expand_mem_signal_fence (enum memmodel model
)
7658 if (HAVE_mem_signal_fence
)
7659 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7660 else if (model
!= MEMMODEL_RELAXED
)
7662 /* By default targets are coherent between a thread and the signal
7663 handler running on the same thread. Thus this really becomes a
7664 compiler barrier, in that stores must not be sunk past
7665 (or raised above) a given point. */
7666 expand_asm_memory_barrier ();
7670 /* This function expands the atomic load operation:
7671 return the atomically loaded value in MEM.
7673 MEMMODEL is the memory model variant to use.
7674 TARGET is an option place to stick the return value. */
7677 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7679 enum machine_mode mode
= GET_MODE (mem
);
7680 enum insn_code icode
;
7682 /* If the target supports the load directly, great. */
7683 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7684 if (icode
!= CODE_FOR_nothing
)
7686 struct expand_operand ops
[3];
7688 create_output_operand (&ops
[0], target
, mode
);
7689 create_fixed_operand (&ops
[1], mem
);
7690 create_integer_operand (&ops
[2], model
);
7691 if (maybe_expand_insn (icode
, 3, ops
))
7692 return ops
[0].value
;
7695 /* If the size of the object is greater than word size on this target,
7696 then we assume that a load will not be atomic. */
7697 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7699 /* Issue val = compare_and_swap (mem, 0, 0).
7700 This may cause the occasional harmless store of 0 when the value is
7701 already 0, but it seems to be OK according to the standards guys. */
7702 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7703 const0_rtx
, false, model
, model
))
7706 /* Otherwise there is no atomic load, leave the library call. */
7710 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7711 if (!target
|| target
== const0_rtx
)
7712 target
= gen_reg_rtx (mode
);
7714 /* Emit the appropriate barrier before the load. */
7715 expand_mem_thread_fence (model
);
7717 emit_move_insn (target
, mem
);
7719 /* For SEQ_CST, also emit a barrier after the load. */
7720 if (model
== MEMMODEL_SEQ_CST
)
7721 expand_mem_thread_fence (model
);
7726 /* This function expands the atomic store operation:
7727 Atomically store VAL in MEM.
7728 MEMMODEL is the memory model variant to use.
7729 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7730 function returns const0_rtx if a pattern was emitted. */
7733 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7735 enum machine_mode mode
= GET_MODE (mem
);
7736 enum insn_code icode
;
7737 struct expand_operand ops
[3];
7739 /* If the target supports the store directly, great. */
7740 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7741 if (icode
!= CODE_FOR_nothing
)
7743 create_fixed_operand (&ops
[0], mem
);
7744 create_input_operand (&ops
[1], val
, mode
);
7745 create_integer_operand (&ops
[2], model
);
7746 if (maybe_expand_insn (icode
, 3, ops
))
7750 /* If using __sync_lock_release is a viable alternative, try it. */
7753 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7754 if (icode
!= CODE_FOR_nothing
)
7756 create_fixed_operand (&ops
[0], mem
);
7757 create_input_operand (&ops
[1], const0_rtx
, mode
);
7758 if (maybe_expand_insn (icode
, 2, ops
))
7760 /* lock_release is only a release barrier. */
7761 if (model
== MEMMODEL_SEQ_CST
)
7762 expand_mem_thread_fence (model
);
7768 /* If the size of the object is greater than word size on this target,
7769 a default store will not be atomic, Try a mem_exchange and throw away
7770 the result. If that doesn't work, don't do anything. */
7771 if (GET_MODE_PRECISION(mode
) > BITS_PER_WORD
)
7773 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7775 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7782 /* If there is no mem_store, default to a move with barriers */
7783 if (model
== MEMMODEL_SEQ_CST
|| model
== MEMMODEL_RELEASE
)
7784 expand_mem_thread_fence (model
);
7786 emit_move_insn (mem
, val
);
7788 /* For SEQ_CST, also emit a barrier after the load. */
7789 if (model
== MEMMODEL_SEQ_CST
)
7790 expand_mem_thread_fence (model
);
7796 /* Structure containing the pointers and values required to process the
7797 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7799 struct atomic_op_functions
7801 direct_optab mem_fetch_before
;
7802 direct_optab mem_fetch_after
;
7803 direct_optab mem_no_result
;
7806 direct_optab no_result
;
7807 enum rtx_code reverse_code
;
7811 /* Fill in structure pointed to by OP with the various optab entries for an
7812 operation of type CODE. */
7815 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7817 gcc_assert (op
!= NULL
);
7819 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7820 in the source code during compilation, and the optab entries are not
7821 computable until runtime. Fill in the values at runtime. */
7825 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7826 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7827 op
->mem_no_result
= atomic_add_optab
;
7828 op
->fetch_before
= sync_old_add_optab
;
7829 op
->fetch_after
= sync_new_add_optab
;
7830 op
->no_result
= sync_add_optab
;
7831 op
->reverse_code
= MINUS
;
7834 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7835 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7836 op
->mem_no_result
= atomic_sub_optab
;
7837 op
->fetch_before
= sync_old_sub_optab
;
7838 op
->fetch_after
= sync_new_sub_optab
;
7839 op
->no_result
= sync_sub_optab
;
7840 op
->reverse_code
= PLUS
;
7843 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7844 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7845 op
->mem_no_result
= atomic_xor_optab
;
7846 op
->fetch_before
= sync_old_xor_optab
;
7847 op
->fetch_after
= sync_new_xor_optab
;
7848 op
->no_result
= sync_xor_optab
;
7849 op
->reverse_code
= XOR
;
7852 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7853 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7854 op
->mem_no_result
= atomic_and_optab
;
7855 op
->fetch_before
= sync_old_and_optab
;
7856 op
->fetch_after
= sync_new_and_optab
;
7857 op
->no_result
= sync_and_optab
;
7858 op
->reverse_code
= UNKNOWN
;
7861 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7862 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7863 op
->mem_no_result
= atomic_or_optab
;
7864 op
->fetch_before
= sync_old_ior_optab
;
7865 op
->fetch_after
= sync_new_ior_optab
;
7866 op
->no_result
= sync_ior_optab
;
7867 op
->reverse_code
= UNKNOWN
;
7870 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7871 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7872 op
->mem_no_result
= atomic_nand_optab
;
7873 op
->fetch_before
= sync_old_nand_optab
;
7874 op
->fetch_after
= sync_new_nand_optab
;
7875 op
->no_result
= sync_nand_optab
;
7876 op
->reverse_code
= UNKNOWN
;
7883 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7884 using memory order MODEL. If AFTER is true the operation needs to return
7885 the value of *MEM after the operation, otherwise the previous value.
7886 TARGET is an optional place to place the result. The result is unused if
7888 Return the result if there is a better sequence, otherwise NULL_RTX. */
7891 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7892 enum memmodel model
, bool after
)
7894 /* If the value is prefetched, or not used, it may be possible to replace
7895 the sequence with a native exchange operation. */
7896 if (!after
|| target
== const0_rtx
)
7898 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7899 if (code
== AND
&& val
== const0_rtx
)
7901 if (target
== const0_rtx
)
7902 target
= gen_reg_rtx (GET_MODE (mem
));
7903 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7906 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7907 if (code
== IOR
&& val
== constm1_rtx
)
7909 if (target
== const0_rtx
)
7910 target
= gen_reg_rtx (GET_MODE (mem
));
7911 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7918 /* Try to emit an instruction for a specific operation varaition.
7919 OPTAB contains the OP functions.
7920 TARGET is an optional place to return the result. const0_rtx means unused.
7921 MEM is the memory location to operate on.
7922 VAL is the value to use in the operation.
7923 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7924 MODEL is the memory model, if used.
7925 AFTER is true if the returned result is the value after the operation. */
7928 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7929 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7931 enum machine_mode mode
= GET_MODE (mem
);
7932 struct expand_operand ops
[4];
7933 enum insn_code icode
;
7937 /* Check to see if there is a result returned. */
7938 if (target
== const0_rtx
)
7942 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7943 create_integer_operand (&ops
[2], model
);
7948 icode
= direct_optab_handler (optab
->no_result
, mode
);
7952 /* Otherwise, we need to generate a result. */
7957 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7958 : optab
->mem_fetch_before
, mode
);
7959 create_integer_operand (&ops
[3], model
);
7964 icode
= optab_handler (after
? optab
->fetch_after
7965 : optab
->fetch_before
, mode
);
7968 create_output_operand (&ops
[op_counter
++], target
, mode
);
7970 if (icode
== CODE_FOR_nothing
)
7973 create_fixed_operand (&ops
[op_counter
++], mem
);
7974 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7975 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7977 if (maybe_expand_insn (icode
, num_ops
, ops
))
7978 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7984 /* This function expands an atomic fetch_OP or OP_fetch operation:
7985 TARGET is an option place to stick the return value. const0_rtx indicates
7986 the result is unused.
7987 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7988 CODE is the operation being performed (OP)
7989 MEMMODEL is the memory model variant to use.
7990 AFTER is true to return the result of the operation (OP_fetch).
7991 AFTER is false to return the value before the operation (fetch_OP). */
7993 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7994 enum memmodel model
, bool after
)
7996 enum machine_mode mode
= GET_MODE (mem
);
7997 struct atomic_op_functions optab
;
7999 bool unused_result
= (target
== const0_rtx
);
8001 get_atomic_op_for_code (&optab
, code
);
8003 /* Check to see if there are any better instructions. */
8004 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
8008 /* Check for the case where the result isn't used and try those patterns. */
8011 /* Try the memory model variant first. */
8012 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
8016 /* Next try the old style withuot a memory model. */
8017 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
8021 /* There is no no-result pattern, so try patterns with a result. */
8025 /* Try the __atomic version. */
8026 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
8030 /* Try the older __sync version. */
8031 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
8035 /* If the fetch value can be calculated from the other variation of fetch,
8036 try that operation. */
8037 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
8039 /* Try the __atomic version, then the older __sync version. */
8040 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
8042 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
8046 /* If the result isn't used, no need to do compensation code. */
8050 /* Issue compensation code. Fetch_after == fetch_before OP val.
8051 Fetch_before == after REVERSE_OP val. */
8053 code
= optab
.reverse_code
;
8056 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
8057 true, OPTAB_LIB_WIDEN
);
8058 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
8061 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8062 true, OPTAB_LIB_WIDEN
);
8067 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
8068 if (!can_compare_and_swap_p (mode
, false))
8073 libfunc
= optab_libfunc (after
? optab
.fetch_after
8074 : optab
.fetch_before
, mode
);
8076 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
8080 code
= optab
.reverse_code
;
8081 libfunc
= optab_libfunc (after
? optab
.fetch_before
8082 : optab
.fetch_after
, mode
);
8084 if (libfunc
!= NULL
)
8086 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
8087 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
8088 2, addr
, ptr_mode
, val
, mode
);
8090 if (!unused_result
&& fixup
)
8091 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8092 true, OPTAB_LIB_WIDEN
);
8097 /* If nothing else has succeeded, default to a compare and swap loop. */
8098 if (can_compare_and_swap_p (mode
, true))
8101 rtx t0
= gen_reg_rtx (mode
), t1
;
8105 /* If the result is used, get a register for it. */
8108 if (!target
|| !register_operand (target
, mode
))
8109 target
= gen_reg_rtx (mode
);
8110 /* If fetch_before, copy the value now. */
8112 emit_move_insn (target
, t0
);
8115 target
= const0_rtx
;
8120 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
8121 true, OPTAB_LIB_WIDEN
);
8122 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
8125 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
8128 /* For after, copy the value now. */
8129 if (!unused_result
&& after
)
8130 emit_move_insn (target
, t1
);
8131 insn
= get_insns ();
8134 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8141 /* Return true if OPERAND is suitable for operand number OPNO of
8142 instruction ICODE. */
8145 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8147 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8148 || (insn_data
[(int) icode
].operand
[opno
].predicate
8149 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8152 /* TARGET is a target of a multiword operation that we are going to
8153 implement as a series of word-mode operations. Return true if
8154 TARGET is suitable for this purpose. */
8157 valid_multiword_target_p (rtx target
)
8159 enum machine_mode mode
;
8162 mode
= GET_MODE (target
);
8163 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8164 if (!validate_subreg (word_mode
, mode
, target
, i
))
8169 /* Like maybe_legitimize_operand, but do not change the code of the
8170 current rtx value. */
8173 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8174 struct expand_operand
*op
)
8176 /* See if the operand matches in its current form. */
8177 if (insn_operand_matches (icode
, opno
, op
->value
))
8180 /* If the operand is a memory whose address has no side effects,
8181 try forcing the address into a non-virtual pseudo register.
8182 The check for side effects is important because copy_to_mode_reg
8183 cannot handle things like auto-modified addresses. */
8184 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8189 addr
= XEXP (mem
, 0);
8190 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8191 && !side_effects_p (addr
))
8194 enum machine_mode mode
;
8196 last
= get_last_insn ();
8197 mode
= targetm
.addr_space
.address_mode (MEM_ADDR_SPACE (mem
));
8198 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8199 if (insn_operand_matches (icode
, opno
, mem
))
8204 delete_insns_since (last
);
8211 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8212 on success, storing the new operand value back in OP. */
8215 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8216 struct expand_operand
*op
)
8218 enum machine_mode mode
, imode
;
8219 bool old_volatile_ok
, result
;
8225 old_volatile_ok
= volatile_ok
;
8227 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8228 volatile_ok
= old_volatile_ok
;
8232 gcc_assert (mode
!= VOIDmode
);
8234 && op
->value
!= const0_rtx
8235 && GET_MODE (op
->value
) == mode
8236 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8239 op
->value
= gen_reg_rtx (mode
);
8244 gcc_assert (mode
!= VOIDmode
);
8245 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8246 || GET_MODE (op
->value
) == mode
);
8247 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8250 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8253 case EXPAND_CONVERT_TO
:
8254 gcc_assert (mode
!= VOIDmode
);
8255 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8258 case EXPAND_CONVERT_FROM
:
8259 if (GET_MODE (op
->value
) != VOIDmode
)
8260 mode
= GET_MODE (op
->value
);
8262 /* The caller must tell us what mode this value has. */
8263 gcc_assert (mode
!= VOIDmode
);
8265 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8266 if (imode
!= VOIDmode
&& imode
!= mode
)
8268 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8273 case EXPAND_ADDRESS
:
8274 gcc_assert (mode
!= VOIDmode
);
8275 op
->value
= convert_memory_address (mode
, op
->value
);
8278 case EXPAND_INTEGER
:
8279 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8280 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8284 return insn_operand_matches (icode
, opno
, op
->value
);
8287 /* Make OP describe an input operand that should have the same value
8288 as VALUE, after any mode conversion that the target might request.
8289 TYPE is the type of VALUE. */
8292 create_convert_operand_from_type (struct expand_operand
*op
,
8293 rtx value
, tree type
)
8295 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8296 TYPE_UNSIGNED (type
));
8299 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8300 of instruction ICODE. Return true on success, leaving the new operand
8301 values in the OPS themselves. Emit no code on failure. */
8304 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8305 unsigned int nops
, struct expand_operand
*ops
)
8310 last
= get_last_insn ();
8311 for (i
= 0; i
< nops
; i
++)
8312 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8314 delete_insns_since (last
);
8320 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8321 as its operands. Return the instruction pattern on success,
8322 and emit any necessary set-up code. Return null and emit no
8326 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8327 struct expand_operand
*ops
)
8329 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8330 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8336 return GEN_FCN (icode
) (ops
[0].value
);
8338 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8340 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8342 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8345 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8346 ops
[3].value
, ops
[4].value
);
8348 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8349 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8351 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8352 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8355 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8356 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8357 ops
[6].value
, ops
[7].value
);
8362 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8363 as its operands. Return true on success and emit no code on failure. */
8366 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8367 struct expand_operand
*ops
)
8369 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8378 /* Like maybe_expand_insn, but for jumps. */
8381 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8382 struct expand_operand
*ops
)
8384 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8387 emit_jump_insn (pat
);
8393 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8397 expand_insn (enum insn_code icode
, unsigned int nops
,
8398 struct expand_operand
*ops
)
8400 if (!maybe_expand_insn (icode
, nops
, ops
))
8404 /* Like expand_insn, but for jumps. */
8407 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8408 struct expand_operand
*ops
)
8410 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8414 #include "gt-optabs.h"