Handle Octeon 3 not supporting MIPS paired-single instructions.
[official-gcc.git] / gcc / testsuite / gcc.target / mips / inline-memcpy-2.c
blobe144e61a800fe02627e9c2b542dde3c4e40a17e4
1 /* { dg-options "-fno-common isa_rev>=6" } */
2 /* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-Os"} { "" } } */
3 /* { dg-final { scan-assembler-not "\tmemcpy" } } */
4 /* { dg-final { scan-assembler-times "\tsh\t" 16 } } */
6 /* Test that inline memcpy is expanded for target hardware without
7 swl, swr when alignment is halfword and sufficent shs are produced. */
9 #include <string.h>
11 char c[40] __attribute__ ((aligned(2)));
13 void
14 f1 ()
16 memcpy (c, "1234567890QWERTYUIOPASDFGHJKLZXCVBNM", 32);