gcc/rtl.def

   1 /* This file contains the definitions and documentation for the
   2    Register Transfer Expressions (rtx's) that make up the
   3    Register Transfer Language (rtl) used in the Back End of the GNU compiler.
   4    Copyright (C) 1987, 88, 92, 94, 95, 97, 98, 1999
   5    Free Software Foundation, Inc.
   6
   7 This file is part of GNU CC.
   8
   9 GNU CC is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 GNU CC is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GNU CC; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330,
  22 Boston, MA 02111-1307, USA.  */
  23
  24
  25 /* Expression definitions and descriptions for all targets are in this file.
  26    Some will not be used for some targets.
  27
  28    The fields in the cpp macro call "DEF_RTL_EXPR()"
  29    are used to create declarations in the C source of the compiler.
  30
  31    The fields are:
  32
  33    1.  The internal name of the rtx used in the C source.
  34    It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
  35    By convention these are in UPPER_CASE.
  36
  37    2.  The name of the rtx in the external ASCII format read by
  38    read_rtx(), and printed by print_rtx().
  39    These names are stored in rtx_name[].
  40    By convention these are the internal (field 1) names in lower_case.
  41
  42    3.  The print format, and type of each rtx->fld[] (field) in this rtx.
  43    These formats are stored in rtx_format[].
  44    The meaning of the formats is documented in front of this array in rtl.c
  45
  46    4.  The class of the rtx.  These are stored in rtx_class and are accessed
  47    via the GET_RTX_CLASS macro.  They are defined as follows:
  48
  49      "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
  50      "<" an rtx code for a comparison (e.g, EQ, NE, LT)
  51      "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
  52      "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
  53      "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
  54      "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
  55      "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
  56      "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
  57      "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
  58      "g" an rtx code for grouping insns together (e.g, GROUP_PARALLEL)
  59      "x" everything else
  60
  61    */
  62
  63 /* ---------------------------------------------------------------------
  64    Expressions (and "meta" expressions) used for structuring the
  65    rtl representation of a program.
  66    --------------------------------------------------------------------- */
  67
  68 /* an expression code name unknown to the reader */
  69 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
  70
  71 /* (NIL) is used by rtl reader and printer to represent a null pointer.  */
  72
  73 DEF_RTL_EXPR(NIL, "nil", "*", 'x')
  74
  75 /* ---------------------------------------------------------------------
  76    Expressions used in constructing lists.
  77    --------------------------------------------------------------------- */
  78
  79 /* a linked list of expressions */
  80 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
  81
  82 /* a linked list of instructions.
  83    The insns are represented in print by their uids.  */
  84 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
  85
  86 /* ----------------------------------------------------------------------
  87    Expression types for machine descriptions.
  88    These do not appear in actual rtl code in the compiler.
  89    ---------------------------------------------------------------------- */
  90
  91 /* Appears only in machine descriptions.
  92    Means use the function named by the second arg (the string)
  93    as a predicate; if matched, store the structure that was matched
  94    in the operand table at index specified by the first arg (the integer).
  95    If the second arg is the null string, the structure is just stored.
  96
  97    A third string argument indicates to the register allocator restrictions
  98    on where the operand can be allocated.
  99
 100    If the target needs no restriction on any instruction this field should
 101    be the null string.
 102
 103    The string is prepended by:
 104    '=' to indicate the operand is only written to.
 105    '+' to indicate the operand is both read and written to.
 106
 107    Each character in the string represents an allocable class for an operand.
 108    'g' indicates the operand can be any valid class.
 109    'i' indicates the operand can be immediate (in the instruction) data.
 110    'r' indicates the operand can be in a register.
 111    'm' indicates the operand can be in memory.
 112    'o' a subset of the 'm' class.  Those memory addressing modes that
 113        can be offset at compile time (have a constant added to them).
 114
 115    Other characters indicate target dependent operand classes and
 116    are described in each target's machine description.
 117
 118    For instructions with more than one operand, sets of classes can be
 119    separated by a comma to indicate the appropriate multi-operand constraints.
 120    There must be a 1 to 1 correspondence between these sets of classes in
 121    all operands for an instruction.
 122    */
 123 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
 124
 125 /* Appears only in machine descriptions.
 126    Means match a SCRATCH or a register.  When used to generate rtl, a
 127    SCRATCH is generated.  As for MATCH_OPERAND, the mode specifies
 128    the desired mode and the first argument is the operand number.
 129    The second argument is the constraint.  */
 130 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
 131
 132 /* Appears only in machine descriptions.
 133    Means match only something equal to what is stored in the operand table
 134    at the index specified by the argument.  */
 135 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
 136
 137 /* Appears only in machine descriptions.
 138    Means apply a predicate, AND match recursively the operands of the rtx.
 139    Operand 0 is the operand-number, as in match_operand.
 140    Operand 1 is a predicate to apply (as a string, a function name).
 141    Operand 2 is a vector of expressions, each of which must match
 142    one subexpression of the rtx this construct is matching.  */
 143 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
 144
 145 /* Appears only in machine descriptions.
 146    Means to match a PARALLEL of arbitrary length.  The predicate is applied
 147    to the PARALLEL and the initial expressions in the PARALLEL are matched.
 148    Operand 0 is the operand-number, as in match_operand.
 149    Operand 1 is a predicate to apply to the PARALLEL.
 150    Operand 2 is a vector of expressions, each of which must match the
 151    corresponding element in the PARALLEL.  */
 152 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
 153
 154 /* Appears only in machine descriptions.
 155    Means match only something equal to what is stored in the operand table
 156    at the index specified by the argument.  For MATCH_OPERATOR.  */
 157 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
 158
 159 /* Appears only in machine descriptions.
 160    Means match only something equal to what is stored in the operand table
 161    at the index specified by the argument.  For MATCH_PARALLEL.  */
 162 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
 163
 164 /* Appears only in machine descriptions.
 165    Operand 0 is the operand number, as in match_operand.
 166    Operand 1 is the predicate to apply to the insn.  */
 167 DEF_RTL_EXPR(MATCH_INSN, "match_insn", "is", 'm')
 168
 169 /* Appears only in machine descriptions.
 170    Defines the pattern for one kind of instruction.
 171    Operand:
 172    0: names this instruction.
 173       If the name is the null string, the instruction is in the
 174       machine description just to be recognized, and will never be emitted by
 175       the tree to rtl expander.
 176    1: is the pattern.
 177    2: is a string which is a C expression
 178       giving an additional condition for recognizing this pattern.
 179       A null string means no extra condition.
 180    3: is the action to execute if this pattern is matched.
 181       If this assembler code template starts with a * then it is a fragment of
 182       C code to run to decide on a template to use.  Otherwise, it is the
 183       template to use.
 184    4: optionally, a vector of attributes for this insn.
 185      */
 186 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x')
 187
 188 /* Definition of a peephole optimization.
 189    1st operand: vector of insn patterns to match
 190    2nd operand: C expression that must be true
 191    3rd operand: template or C code to produce assembler output.
 192    4: optionally, a vector of attributes for this insn.
 193      */
 194 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x')
 195
 196 /* Definition of a split operation.
 197    1st operand: insn pattern to match
 198    2nd operand: C expression that must be true
 199    3rd operand: vector of insn patterns to place into a SEQUENCE
 200    4th operand: optionally, some C code to execute before generating the
 201         insns.  This might, for example, create some RTX's and store them in
 202         elements of `recog_operand' for use by the vector of insn-patterns.
 203         (`operands' is an alias here for `recog_operand').   */
 204 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
 205
 206 /* Definition of an RTL peephole operation.
 207    Follows the same arguments as define_split.  */
 208 DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
 209
 210 /* Definition of a combiner pattern.
 211    Operands not defined yet.  */
 212 DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x')
 213
 214 /* Define how to generate multiple insns for a standard insn name.
 215    1st operand: the insn name.
 216    2nd operand: vector of insn-patterns.
 217         Use match_operand to substitute an element of `recog_operand'.
 218    3rd operand: C expression that must be true for this to be available.
 219         This may not test any operands.
 220    4th operand: Extra C code to execute before generating the insns.
 221         This might, for example, create some RTX's and store them in
 222         elements of `recog_operand' for use by the vector of insn-patterns.
 223         (`operands' is an alias here for `recog_operand').  */
 224 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
 225
 226 /* Define a requirement for delay slots.
 227    1st operand: Condition involving insn attributes that, if true,
 228                 indicates that the insn requires the number of delay slots
 229                 shown.
 230    2nd operand: Vector whose length is the three times the number of delay
 231                 slots required.
 232                 Each entry gives three conditions, each involving attributes.
 233                 The first must be true for an insn to occupy that delay slot
 234                 location.  The second is true for all insns that can be
 235                 annulled if the branch is true and the third is true for all
 236                 insns that can be annulled if the branch is false.
 237
 238    Multiple DEFINE_DELAYs may be present.  They indicate differing
 239    requirements for delay slots.  */
 240 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
 241
 242 /* Define a set of insns that requires a function unit.  This means that
 243    these insns produce their result after a delay and that there may be
 244    restrictions on the number of insns of this type that can be scheduled
 245    simultaneously.
 246
 247    More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
 248    Each gives a set of operations and associated delays.  The first three
 249    operands must be the same for each operation for the same function unit.
 250
 251    All delays are specified in cycles.
 252
 253    1st operand: Name of function unit (mostly for documentation)
 254    2nd operand: Number of identical function units in CPU
 255    3rd operand: Total number of simultaneous insns that can execute on this
 256                 function unit; 0 if unlimited.
 257    4th operand: Condition involving insn attribute, that, if true, specifies
 258                 those insns that this expression applies to.
 259    5th operand: Constant delay after which insn result will be
 260                 available.
 261    6th operand: Delay until next insn can be scheduled on the function unit
 262                 executing this operation.  The meaning depends on whether or
 263                 not the next operand is supplied.
 264    7th operand: If this operand is not specified, the 6th operand gives the
 265                 number of cycles after the instruction matching the 4th
 266                 operand begins using the function unit until a subsequent
 267                 insn can begin.  A value of zero should be used for a
 268                 unit with no issue constraints.  If only one operation can
 269                 be executed a time and the unit is busy for the entire time,
 270                 the 3rd operand should be specified as 1, the 6th operand
 271                 should be specified as 0, and the 7th operand should not
 272                 be specified.
 273
 274                 If this operand is specified, it is a list of attribute
 275                 expressions.  If an insn for which any of these expressions
 276                 is true is currently executing on the function unit, the
 277                 issue delay will be given by the 6th operand.  Otherwise,
 278                 the insn can be immediately scheduled (subject to the limit
 279                 on the number of simultaneous operations executing on the
 280                 unit.)  */
 281 DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
 282
 283 /* Define attribute computation for `asm' instructions.  */
 284 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
 285
 286 /* SEQUENCE appears in the result of a `gen_...' function
 287    for a DEFINE_EXPAND that wants to make several insns.
 288    Its elements are the bodies of the insns that should be made.
 289    `emit_insn' takes the SEQUENCE apart and makes separate insns.  */
 290 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
 291
 292 /* Refers to the address of its argument.
 293    This appears only in machine descriptions, indicating that
 294    any expression that would be acceptable as the operand of MEM
 295    should be matched.  */
 296 DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
 297
 298 /* ----------------------------------------------------------------------
 299    Expressions used for insn attributes.  These also do not appear in
 300    actual rtl code in the compiler.
 301    ---------------------------------------------------------------------- */
 302
 303 /* Definition of an insn attribute.
 304    1st operand: name of the attribute
 305    2nd operand: comma-separated list of possible attribute values
 306    3rd operand: expression for the default value of the attribute. */
 307 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
 308
 309 /* Marker for the name of an attribute. */
 310 DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
 311
 312 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
 313    in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
 314    pattern.
 315
 316    (set_attr "name" "value") is equivalent to
 317    (set (attr "name") (const_string "value"))  */
 318 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
 319
 320 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
 321    specify that attribute values are to be assigned according to the
 322    alternative matched.
 323
 324    The following three expressions are equivalent:
 325
 326    (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
 327                             (eq_attrq "alternative" "2") (const_string "a2")]
 328                            (const_string "a3")))
 329    (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
 330                                  (const_string "a3")])
 331    (set_attr "att" "a1,a2,a3")
 332  */
 333 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
 334
 335 /* A conditional expression true if the value of the specified attribute of
 336    the current insn equals the specified value.  The first operand is the
 337    attribute name and the second is the comparison value.  */
 338 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
 339
 340 /* A conditional expression which is true if the specified flag is
 341    true for the insn being scheduled in reorg.
 342
 343    genattr.c defines the following flags which can be tested by
 344    (attr_flag "foo") expressions in eligible_for_delay.
 345
 346    forward, backward, very_likely, likely, very_unlikely, and unlikely.  */
 347
 348 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
 349
 350 /* ----------------------------------------------------------------------
 351    Expression types used for things in the instruction chain.
 352
 353    All formats must start with "iuu" to handle the chain.
 354    Each insn expression holds an rtl instruction and its semantics
 355    during back-end processing.
 356    See macros's in "rtl.h" for the meaning of each rtx->fld[].
 357
 358    ---------------------------------------------------------------------- */
 359
 360 /* An instruction that cannot jump.  */
 361 DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i')
 362
 363 /* An instruction that can possibly jump.
 364    Fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 365 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i')
 366
 367 /* An instruction that can possibly call a subroutine
 368    but which will not change which instruction comes next
 369    in the current function.
 370    Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE.
 371    All other fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 372 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i')
 373
 374 /* A marker that indicates that control will not flow through.  */
 375 DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x')
 376
 377 /* Holds a label that is followed by instructions.
 378    Operand:
 379    3: is a number that is unique in the entire compilation.
 380    4: is the user-given name of the label, if any.
 381    5: is used in jump.c for the use-count of the label.
 382    6: is used in flow.c to point to the chain of label_ref's to this label.  */
 383 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis00", 'x')
 384
 385 /* Say where in the code a source line starts, for symbol table's sake.
 386    Contains a filename and a line number.  Line numbers <= 0 are special:
 387    0 is used in a dummy placed at the front of every function
 388       just so there will never be a need to delete the first insn;
 389    -1 indicates a dummy; insns to be deleted by flow analysis and combining
 390       are really changed to NOTEs with a number of -1.
 391    -2 means beginning of a name binding contour; output N_LBRAC.
 392    -3 means end of a contour; output N_RBRAC.  */
 393 DEF_RTL_EXPR(NOTE, "note", "iuu0n", 'x')
 394
 395 /* ----------------------------------------------------------------------
 396    Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 397    ---------------------------------------------------------------------- */
 398
 399 /* Several operations to be done in parallel.  */
 400 DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
 401
 402 /* A string that is passed through to the assembler as input.
 403      One can obviously pass comments through by using the
 404      assembler comment syntax.
 405      These occur in an insn all by themselves as the PATTERN.
 406      They also appear inside an ASM_OPERANDS
 407      as a convenient way to hold a string.  */
 408 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
 409
 410 /* An assembler instruction with operands.
 411    1st operand is the instruction template.
 412    2nd operand is the constraint for the output.
 413    3rd operand is the number of the output this expression refers to.
 414      When an insn stores more than one value, a separate ASM_OPERANDS
 415      is made for each output; this integer distinguishes them.
 416    4th is a vector of values of input operands.
 417    5th is a vector of modes and constraints for the input operands.
 418      Each element is an ASM_INPUT containing a constraint string
 419      and whose mode indicates the mode of the input operand.
 420    6th is the name of the containing source file.
 421    7th is the source line number.  */
 422 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
 423
 424 /* A machine-specific operation.
 425    1st operand is a vector of operands being used by the operation so that
 426      any needed reloads can be done.
 427    2nd operand is a unique value saying which of a number of machine-specific
 428      operations is to be performed.
 429    (Note that the vector must be the first operand because of the way that
 430    genrecog.c record positions within an insn.)
 431    This can occur all by itself in a PATTERN, as a component of a PARALLEL,
 432    or inside an expression.  */
 433 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
 434
 435 /* Similar, but a volatile operation and one which may trap.  */
 436 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
 437
 438 /* Vector of addresses, stored as full words.  */
 439 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
 440 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
 441
 442 /* Vector of address differences X0 - BASE, X1 - BASE, ...
 443    First operand is BASE; the vector contains the X's.
 444    The machine mode of this rtx says how much space to leave
 445    for each difference and is adjusted by branch shortening if
 446    CASE_VECTOR_SHORTEN_MODE is defined.
 447    The third and fourth operands store the target labels with the
 448    minimum and maximum addresses respectively.
 449    The fifth operand stores flags for use by branch shortening.
 450   Set at the start of shorten_branches:
 451    min_align: the minimum alignment for any of the target labels.
 452    base_after_vec: true iff BASE is after the ADDR_DIFF_VEC.
 453    min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC.
 454    max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC.
 455    min_after_base: true iff minimum address target label is after BASE.
 456    max_after_base: true iff maximum address target label is after BASE.
 457   Set by the actual branch shortening process:
 458    offset_unsigned: true iff offsets have to be treated as unsigned.
 459    scale: scaling that is necessary to make offsets fit into the mode.
 460
 461    The third, fourth and fifth operands are only valid when
 462    CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
 463    compilations.  */
 464
 465 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
 466
 467 /* ----------------------------------------------------------------------
 468    At the top level of an instruction (perhaps under PARALLEL).
 469    ---------------------------------------------------------------------- */
 470
 471 /* Assignment.
 472    Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
 473    Operand 2 is the value stored there.
 474    ALL assignment must use SET.
 475    Instructions that do multiple assignments must use multiple SET,
 476    under PARALLEL.  */
 477 DEF_RTL_EXPR(SET, "set", "ee", 'x')
 478
 479 /* Indicate something is used in a way that we don't want to explain.
 480    For example, subroutine calls will use the register
 481    in which the static chain is passed.  */
 482 DEF_RTL_EXPR(USE, "use", "e", 'x')
 483
 484 /* Indicate something is clobbered in a way that we don't want to explain.
 485    For example, subroutine calls will clobber some physical registers
 486    (the ones that are by convention not saved).  */
 487 DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
 488
 489 /* Call a subroutine.
 490    Operand 1 is the address to call.
 491    Operand 2 is the number of arguments.  */
 492
 493 DEF_RTL_EXPR(CALL, "call", "ee", 'x')
 494
 495 /* Return from a subroutine.  */
 496
 497 DEF_RTL_EXPR(RETURN, "return", "", 'x')
 498
 499 /* Conditional trap.
 500    Operand 1 is the condition.
 501    Operand 2 is the trap code.
 502    For an unconditional trap, make the condition (const_int 1).  */
 503 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", 'x')
 504
 505 /* ----------------------------------------------------------------------
 506    Primitive values for use in expressions.
 507    ---------------------------------------------------------------------- */
 508
 509 /* numeric integer constant */
 510 DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
 511
 512 /* numeric floating point constant.
 513    Operand 0 ('e') is the MEM that stores this constant in memory, or
 514    various other things (see comments at immed_double_const in
 515    varasm.c).
 516    Operand 1 ('0') is a chain of all CONST_DOUBLEs in use in the
 517    current function.
 518    Remaining operands hold the actual value.  They are all 'w' and
 519    there may be from 1 to 4; see rtl.c.  */
 520 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, 'o')
 521
 522 /* String constant.  Used only for attributes right now.  */
 523 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
 524
 525 /* This is used to encapsulate an expression whose value is constant
 526    (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
 527    recognized as a constant operand rather than by arithmetic instructions.  */
 528
 529 DEF_RTL_EXPR(CONST, "const", "e", 'o')
 530
 531 /* program counter.  Ordinary jumps are represented
 532    by a SET whose first operand is (PC).  */
 533 DEF_RTL_EXPR(PC, "pc", "", 'o')
 534
 535 /* A register.  The "operand" is the register number, accessed with
 536    the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 537    than a hardware register is being referred to.  The second operand
 538    doesn't really exist.  Unfortunately, however, the compiler
 539    implicitly assumes that a REG can be transformed in place into a
 540    MEM, and therefore that a REG is at least as big as a MEM.  To
 541    avoid this memory overhead, which is likely to be substantial,
 542    search for uses of PUT_CODE that turn REGs into MEMs, and fix them
 543    somehow.  Then, the trailing `0' can be removed here.  */
 544 DEF_RTL_EXPR(REG, "reg", "i0", 'o')
 545
 546 /* A scratch register.  This represents a register used only within a
 547    single insn.  It will be turned into a REG during register allocation
 548    or reload unless the constraint indicates that the register won't be
 549    needed, in which case it can remain a SCRATCH.  This code is
 550    marked as having one operand so it can be turned into a REG.  */
 551 DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
 552
 553 /* One word of a multi-word value.
 554    The first operand is the complete value; the second says which word.
 555    The WORDS_BIG_ENDIAN flag controls whether word number 0
 556    (as numbered in a SUBREG) is the most or least significant word.
 557
 558    This is also used to refer to a value in a different machine mode.
 559    For example, it can be used to refer to a SImode value as if it were
 560    Qimode, or vice versa.  Then the word number is always 0.  */
 561 DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
 562
 563 /* This one-argument rtx is used for move instructions
 564    that are guaranteed to alter only the low part of a destination.
 565    Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
 566    has an unspecified effect on the high part of REG,
 567    but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
 568    is guaranteed to alter only the bits of REG that are in HImode.
 569
 570    The actual instruction used is probably the same in both cases,
 571    but the register constraints may be tighter when STRICT_LOW_PART
 572    is in use.  */
 573
 574 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
 575
 576 /* (CONCAT a b) represents the virtual concatenation of a and b
 577    to make a value that has as many bits as a and b put together.
 578    This is used for complex values.  Normally it appears only
 579    in DECL_RTLs and during RTL generation, but not in the insn chain.  */
 580 DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
 581
 582 /* A memory location; operand is the address.  Can be nested inside a
 583    VOLATILE.  The second operand is the alias set to which this MEM
 584    belongs.  We use `0' instead of `i' for this field so that the
 585    field need not be specified in machine descriptions.  */
 586 DEF_RTL_EXPR(MEM, "mem", "e0", 'o')
 587
 588 /* Reference to an assembler label in the code for this function.
 589    The operand is a CODE_LABEL found in the insn chain.
 590    The unprinted fields 1 and 2 are used in flow.c for the
 591    LABEL_NEXTREF and CONTAINING_INSN.  */
 592 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
 593
 594 /* Reference to a named label: the string that is the first operand,
 595    with `_' added implicitly in front.
 596    Exception: if the first character explicitly given is `*',
 597    to give it to the assembler, remove the `*' and do not add `_'.  */
 598 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o')
 599
 600 /* The condition code register is represented, in our imagination,
 601    as a register holding a value that can be compared to zero.
 602    In fact, the machine has already compared them and recorded the
 603    results; but instructions that look at the condition code
 604    pretend to be looking at the entire value and comparing it.  */
 605 DEF_RTL_EXPR(CC0, "cc0", "", 'o')
 606
 607 /* Reference to the address of a register.  Removed by purge_addressof after
 608    CSE has elided as many as possible.
 609    1st operand: the register we may need the address of.
 610    2nd operand: the original pseudo regno we were generated for.
 611    3rd operand: the decl for the object in the register, for
 612      put_reg_in_stack.  */
 613
 614 DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
 615
 616 /* =====================================================================
 617    A QUEUED expression really points to a member of the queue of instructions
 618    to be output later for postincrement/postdecrement.
 619    QUEUED expressions never become part of instructions.
 620    When a QUEUED expression would be put into an instruction,
 621    instead either the incremented variable or a copy of its previous
 622    value is used.
 623
 624    Operands are:
 625    0. the variable to be incremented (a REG rtx).
 626    1. the incrementing instruction, or 0 if it hasn't been output yet.
 627    2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
 628    3. the body to use for the incrementing instruction
 629    4. the next QUEUED expression in the queue.
 630    ====================================================================== */
 631
 632 DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
 633
 634 /* ----------------------------------------------------------------------
 635    Expressions for operators in an rtl pattern
 636    ---------------------------------------------------------------------- */
 637
 638 /* if_then_else.  This is used in representing ordinary
 639    conditional jump instructions.
 640      Operand:
 641      0:  condition
 642      1:  then expr
 643      2:  else expr */
 644 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
 645
 646 /* General conditional. The first operand is a vector composed of pairs of
 647    expressions.  The first element of each pair is evaluated, in turn.
 648    The value of the conditional is the second expression of the first pair
 649    whose first expression evaluates non-zero.  If none of the expressions is
 650    true, the second operand will be used as the value of the conditional.
 651
 652    This should be replaced with use of IF_THEN_ELSE.  */
 653 DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
 654
 655 /* Comparison, produces a condition code result.  */
 656 DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
 657
 658 /* plus */
 659 DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
 660
 661 /* Operand 0 minus operand 1.  */
 662 DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
 663
 664 /* Minus operand 0.  */
 665 DEF_RTL_EXPR(NEG, "neg", "e", '1')
 666
 667 DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
 668
 669 /* Operand 0 divided by operand 1.  */
 670 DEF_RTL_EXPR(DIV, "div", "ee", '2')
 671 /* Remainder of operand 0 divided by operand 1.  */
 672 DEF_RTL_EXPR(MOD, "mod", "ee", '2')
 673
 674 /* Unsigned divide and remainder.  */
 675 DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
 676 DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
 677
 678 /* Bitwise operations.  */
 679 DEF_RTL_EXPR(AND, "and", "ee", 'c')
 680
 681 DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
 682
 683 DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
 684
 685 DEF_RTL_EXPR(NOT, "not", "e", '1')
 686
 687 /* Operand:
 688      0:  value to be shifted.
 689      1:  number of bits.  */
 690 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2')
 691 DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2')
 692
 693 /* Right shift operations, for machines where these are not the same
 694    as left shifting with a negative argument.  */
 695
 696 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2')
 697 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2')
 698 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2')
 699
 700 /* Minimum and maximum values of two operands.  We need both signed and
 701    unsigned forms.  (We cannot use MIN for SMIN because it conflicts
 702    with a macro of the same name.) */
 703
 704 DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
 705 DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
 706 DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
 707 DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
 708
 709 /* These unary operations are used to represent incrementation
 710    and decrementation as they occur in memory addresses.
 711    The amount of increment or decrement are not represented
 712    because they can be understood from the machine-mode of the
 713    containing MEM.  These operations exist in only two cases:
 714    1. pushes onto the stack.
 715    2. created automatically by the life_analysis pass in flow.c.  */
 716 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x')
 717 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x')
 718 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x')
 719 DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x')
 720
 721 /* These binary operations are used to represent generic address
 722    side-effects in memory addresses, except for simple incrementation
 723    or decrementation which use the above operations.  They are
 724    created automatically by the life_analysis pass in flow.c.
 725    (Note that these operators are currently placeholders.)  */
 726 DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", 'x')
 727 DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", 'x')
 728
 729 /* Comparison operations.  The ordered comparisons exist in two
 730    flavors, signed and unsigned.  */
 731 DEF_RTL_EXPR(NE, "ne", "ee", '<')
 732 DEF_RTL_EXPR(EQ, "eq", "ee", '<')
 733 DEF_RTL_EXPR(GE, "ge", "ee", '<')
 734 DEF_RTL_EXPR(GT, "gt", "ee", '<')
 735 DEF_RTL_EXPR(LE, "le", "ee", '<')
 736 DEF_RTL_EXPR(LT, "lt", "ee", '<')
 737 DEF_RTL_EXPR(GEU, "geu", "ee", '<')
 738 DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
 739 DEF_RTL_EXPR(LEU, "leu", "ee", '<')
 740 DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
 741
 742 /* Represents the result of sign-extending the sole operand.
 743    The machine modes of the operand and of the SIGN_EXTEND expression
 744    determine how much sign-extension is going on.  */
 745 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
 746
 747 /* Similar for zero-extension (such as unsigned short to int).  */
 748 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
 749
 750 /* Similar but here the operand has a wider mode.  */
 751 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
 752
 753 /* Similar for extending floating-point values (such as SFmode to DFmode).  */
 754 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
 755 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
 756
 757 /* Conversion of fixed point operand to floating point value.  */
 758 DEF_RTL_EXPR(FLOAT, "float", "e", '1')
 759
 760 /* With fixed-point machine mode:
 761    Conversion of floating point operand to fixed point value.
 762    Value is defined only when the operand's value is an integer.
 763    With floating-point machine mode (and operand with same mode):
 764    Operand is rounded toward zero to produce an integer value
 765    represented in floating point.  */
 766 DEF_RTL_EXPR(FIX, "fix", "e", '1')
 767
 768 /* Conversion of unsigned fixed point operand to floating point value.  */
 769 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
 770
 771 /* With fixed-point machine mode:
 772    Conversion of floating point operand to *unsigned* fixed point value.
 773    Value is defined only when the operand's value is an integer.  */
 774 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
 775
 776 /* Absolute value */
 777 DEF_RTL_EXPR(ABS, "abs", "e", '1')
 778
 779 /* Square root */
 780 DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
 781
 782 /* Find first bit that is set.
 783    Value is 1 + number of trailing zeros in the arg.,
 784    or 0 if arg is 0.  */
 785 DEF_RTL_EXPR(FFS, "ffs", "e", '1')
 786
 787 /* Reference to a signed bit-field of specified size and position.
 788    Operand 0 is the memory unit (usually SImode or QImode) which
 789    contains the field's first bit.  Operand 1 is the width, in bits.
 790    Operand 2 is the number of bits in the memory unit before the
 791    first bit of this field.
 792    If BITS_BIG_ENDIAN is defined, the first bit is the msb and
 793    operand 2 counts from the msb of the memory unit.
 794    Otherwise, the first bit is the lsb and operand 2 counts from
 795    the lsb of the memory unit.  */
 796 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
 797
 798 /* Similar for unsigned bit-field.  */
 799 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
 800
 801 /* For RISC machines.  These save memory when splitting insns.  */
 802
 803 /* HIGH are the high-order bits of a constant expression.  */
 804 DEF_RTL_EXPR(HIGH, "high", "e", 'o')
 805
 806 /* LO_SUM is the sum of a register and the low-order bits
 807    of a constant expression.  */
 808 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
 809
 810 /* Header for range information.  Operand 0 is the NOTE_INSN_RANGE_START insn.
 811    Operand 1 is the NOTE_INSN_RANGE_END insn.  Operand 2 is a vector of all of
 812    the registers that can be substituted within this range.  Operand 3 is the
 813    number of calls in the range.  Operand 4 is the number of insns in the
 814    range.  Operand 5 is the unique range number for this range.  Operand 6 is
 815    the basic block # of the start of the live range.  Operand 7 is the basic
 816    block # of the end of the live range.  Operand 8 is the loop depth.  Operand
 817    9 is a bitmap of the registers live at the start of the range.  Operand 10
 818    is a bitmap of the registers live at the end of the range.  Operand 11 is
 819    marker number for the start of the range.  Operand 12 is the marker number
 820    for the end of the range.  */
 821 DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
 822
 823 /* Registers that can be substituted within the range.  Operand 0 is the
 824    original pseudo register number.  Operand 1 will be filled in with the
 825    pseudo register the value is copied for the duration of the range.  Operand
 826    2 is the number of references within the range to the register.  Operand 3
 827    is the number of sets or clobbers of the register in the range.  Operand 4
 828    is the number of deaths the register has.  Operand 5 is the copy flags that
 829    give the status of whether a copy is needed from the original register to
 830    the new register at the beginning of the range, or whether a copy from the
 831    new register back to the original at the end of the range.  Operand 6 is the
 832    live length.  Operand 7 is the number of calls that this register is live
 833    across.  Operand 8 is the symbol node of the variable if the register is a
 834    user variable.  Operand 9 is the block node that the variable is declared
 835    in if the register is a user variable. */
 836 DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", 'x')
 837
 838 /* Information about a local variable's ranges.  Operand 0 is an EXPR_LIST of
 839    the different ranges a variable is in where it is copied to a different
 840    pseudo register.  Operand 1 is the block that the variable is declared in.
 841    Operand 2 is the number of distinct ranges.  */
 842 DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", 'x')
 843
 844 /* Information about the registers that are live at the current point.  Operand
 845    0 is the live bitmap.  Operand 1 is the original block number.  */
 846 DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
 847
 848 /* A unary `__builtin_constant_p' expression.  These are only emitted
 849    during RTL generation, and then only if optimize > 0.  They are
 850    eliminated by the first CSE pass. */
 851 DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
 852
 853 /* A placeholder for a CALL_INSN which may be turned into a normal call,
 854    a sibling (tail) call or tail recursion.
 855
 856    Immediately after RTL generation, this placeholder will be replaced
 857    by the insns to perform the call, sibcall or tail recursion.
 858
 859    This RTX has 4 operands.  The first three are lists of instructions to
 860    perform the call as a normal call, sibling call and tail recursion
 861    respectively.  The latter two lists may be NULL, the first may never
 862    be NULL.
 863
 864    The last operand is the tail recursion CODE_LABEL, which may be NULL if no
 865    potential tail recursive calls were found.
 866
 867    The tail recursion label is needed so that we can clear LABEL_PRESERVE_P
 868    after we select a call method.  */
 869 DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
 870
 871 /*
 872 Local variables:
 873 mode:c
 874 End:
 875 */