1 @c Copyright (C) 1988-2014 Free Software Foundation, Inc.
2 @c This is part of the GCC manual.
3 @c For copying conditions, see the file gcc.texi.
6 @chapter RTL Representation
7 @cindex RTL representation
8 @cindex representation of RTL
9 @cindex Register Transfer Language (RTL)
11 The last part of the compiler work is done on a low-level intermediate
12 representation called Register Transfer Language. In this language, the
13 instructions to be output are described, pretty much one by one, in an
14 algebraic form that describes what the instruction does.
16 RTL is inspired by Lisp lists. It has both an internal form, made up of
17 structures that point at other structures, and a textual form that is used
18 in the machine description and in printed debugging dumps. The textual
19 form uses nested parentheses to indicate the pointers in the internal form.
22 * RTL Objects:: Expressions vs vectors vs strings vs integers.
23 * RTL Classes:: Categories of RTL expression objects, and their structure.
24 * Accessors:: Macros to access expression operands or vector elts.
25 * Special Accessors:: Macros to access specific annotations on RTL.
26 * Flags:: Other flags in an RTL expression.
27 * Machine Modes:: Describing the size and format of a datum.
28 * Constants:: Expressions with constant values.
29 * Regs and Memory:: Expressions representing register contents or memory.
30 * Arithmetic:: Expressions representing arithmetic on other expressions.
31 * Comparisons:: Expressions representing comparison of expressions.
32 * Bit-Fields:: Expressions representing bit-fields in memory or reg.
33 * Vector Operations:: Expressions involving vector datatypes.
34 * Conversions:: Extending, truncating, floating or fixing.
35 * RTL Declarations:: Declaring volatility, constancy, etc.
36 * Side Effects:: Expressions for storing in registers, etc.
37 * Incdec:: Embedded side-effects for autoincrement addressing.
38 * Assembler:: Representing @code{asm} with operands.
39 * Debug Information:: Expressions representing debugging information.
40 * Insns:: Expression types for entire insns.
41 * Calls:: RTL representation of function call insns.
42 * Sharing:: Some expressions are unique; others *must* be copied.
43 * Reading RTL:: Reading textual RTL from a file.
47 @section RTL Object Types
48 @cindex RTL object types
53 @cindex RTL expression
55 RTL uses five kinds of objects: expressions, integers, wide integers,
56 strings and vectors. Expressions are the most important ones. An RTL
57 expression (``RTX'', for short) is a C structure, but it is usually
58 referred to with a pointer; a type that is given the typedef name
61 An integer is simply an @code{int}; their written form uses decimal
62 digits. A wide integer is an integral object whose type is
63 @code{HOST_WIDE_INT}; their written form uses decimal digits.
65 A string is a sequence of characters. In core it is represented as a
66 @code{char *} in usual C fashion, and it is written in C syntax as well.
67 However, strings in RTL may never be null. If you write an empty string in
68 a machine description, it is represented in core as a null pointer rather
69 than as a pointer to a null character. In certain contexts, these null
70 pointers instead of strings are valid. Within RTL code, strings are most
71 commonly found inside @code{symbol_ref} expressions, but they appear in
72 other contexts in the RTL expressions that make up machine descriptions.
74 In a machine description, strings are normally written with double
75 quotes, as you would in C@. However, strings in machine descriptions may
76 extend over many lines, which is invalid C, and adjacent string
77 constants are not concatenated as they are in C@. Any string constant
78 may be surrounded with a single set of parentheses. Sometimes this
79 makes the machine description easier to read.
81 There is also a special syntax for strings, which can be useful when C
82 code is embedded in a machine description. Wherever a string can
83 appear, it is also valid to write a C-style brace block. The entire
84 brace block, including the outermost pair of braces, is considered to be
85 the string constant. Double quote characters inside the braces are not
86 special. Therefore, if you write string constants in the C code, you
87 need not escape each quote character with a backslash.
89 A vector contains an arbitrary number of pointers to expressions. The
90 number of elements in the vector is explicitly present in the vector.
91 The written form of a vector consists of square brackets
92 (@samp{[@dots{}]}) surrounding the elements, in sequence and with
93 whitespace separating them. Vectors of length zero are not created;
94 null pointers are used instead.
96 @cindex expression codes
97 @cindex codes, RTL expression
100 Expressions are classified by @dfn{expression codes} (also called RTX
101 codes). The expression code is a name defined in @file{rtl.def}, which is
102 also (in uppercase) a C enumeration constant. The possible expression
103 codes and their meanings are machine-independent. The code of an RTX can
104 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
105 @code{PUT_CODE (@var{x}, @var{newcode})}.
107 The expression code determines how many operands the expression contains,
108 and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
109 by looking at an operand what kind of object it is. Instead, you must know
110 from its context---from the expression code of the containing expression.
111 For example, in an expression of code @code{subreg}, the first operand is
112 to be regarded as an expression and the second operand as an integer. In
113 an expression of code @code{plus}, there are two operands, both of which
114 are to be regarded as expressions. In a @code{symbol_ref} expression,
115 there is one operand, which is to be regarded as a string.
117 Expressions are written as parentheses containing the name of the
118 expression type, its flags and machine mode if any, and then the operands
119 of the expression (separated by spaces).
121 Expression code names in the @samp{md} file are written in lowercase,
122 but when they appear in C code they are written in uppercase. In this
123 manual, they are shown as follows: @code{const_int}.
127 In a few contexts a null pointer is valid where an expression is normally
128 wanted. The written form of this is @code{(nil)}.
131 @section RTL Classes and Formats
133 @cindex classes of RTX codes
134 @cindex RTX codes, classes of
135 @findex GET_RTX_CLASS
137 The various expression codes are divided into several @dfn{classes},
138 which are represented by single characters. You can determine the class
139 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
140 Currently, @file{rtl.def} defines these classes:
144 An RTX code that represents an actual object, such as a register
145 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
146 @code{LO_SUM}) is also included; instead, @code{SUBREG} and
147 @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
150 An RTX code that represents a constant object. @code{HIGH} is also
151 included in this class.
154 An RTX code for a non-symmetric comparison, such as @code{GEU} or
157 @item RTX_COMM_COMPARE
158 An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
162 An RTX code for a unary arithmetic operation, such as @code{NEG},
163 @code{NOT}, or @code{ABS}. This category also includes value extension
164 (sign or zero) and conversions between integer and floating point.
167 An RTX code for a commutative binary operation, such as @code{PLUS} or
168 @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
172 An RTX code for a non-commutative binary operation, such as @code{MINUS},
173 @code{DIV}, or @code{ASHIFTRT}.
175 @item RTX_BITFIELD_OPS
176 An RTX code for a bit-field operation. Currently only
177 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
178 and are lvalues (so they can be used for insertion as well).
182 An RTX code for other three input operations. Currently only
183 @code{IF_THEN_ELSE}, @code{VEC_MERGE}, @code{SIGN_EXTRACT},
184 @code{ZERO_EXTRACT}, and @code{FMA}.
187 An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
188 @code{CALL_INSN}. @xref{Insns}.
191 An RTX code for something that matches in insns, such as
192 @code{MATCH_DUP}. These only occur in machine descriptions.
195 An RTX code for an auto-increment addressing mode, such as
199 All other RTX codes. This category includes the remaining codes used
200 only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
201 all the codes describing side effects (@code{SET}, @code{USE},
202 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
203 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
204 @code{SUBREG} is also part of this class.
208 For each expression code, @file{rtl.def} specifies the number of
209 contained objects and their kinds using a sequence of characters
210 called the @dfn{format} of the expression code. For example,
211 the format of @code{subreg} is @samp{ei}.
213 @cindex RTL format characters
214 These are the most commonly used format characters:
218 An expression (actually a pointer to an expression).
230 A vector of expressions.
233 A few other format characters are used occasionally:
237 @samp{u} is equivalent to @samp{e} except that it is printed differently
238 in debugging dumps. It is used for pointers to insns.
241 @samp{n} is equivalent to @samp{i} except that it is printed differently
242 in debugging dumps. It is used for the line number or code number of a
246 @samp{S} indicates a string which is optional. In the RTL objects in
247 core, @samp{S} is equivalent to @samp{s}, but when the object is read,
248 from an @samp{md} file, the string value of this operand may be omitted.
249 An omitted string is taken to be the null string.
252 @samp{V} indicates a vector which is optional. In the RTL objects in
253 core, @samp{V} is equivalent to @samp{E}, but when the object is read
254 from an @samp{md} file, the vector value of this operand may be omitted.
255 An omitted vector is effectively the same as a vector of no elements.
258 @samp{B} indicates a pointer to basic block structure.
261 @samp{0} means a slot whose contents do not fit any normal category.
262 @samp{0} slots are not printed at all in dumps, and are often used in
263 special ways by small parts of the compiler.
266 There are macros to get the number of operands and the format
267 of an expression code:
270 @findex GET_RTX_LENGTH
271 @item GET_RTX_LENGTH (@var{code})
272 Number of operands of an RTX of code @var{code}.
274 @findex GET_RTX_FORMAT
275 @item GET_RTX_FORMAT (@var{code})
276 The format of an RTX of code @var{code}, as a C string.
279 Some classes of RTX codes always have the same format. For example, it
280 is safe to assume that all comparison operations have format @code{ee}.
284 All codes of this class have format @code{e}.
289 All codes of these classes have format @code{ee}.
293 All codes of these classes have format @code{eee}.
296 All codes of this class have formats that begin with @code{iuueiee}.
297 @xref{Insns}. Note that not all RTL objects linked onto an insn chain
298 are of class @code{i}.
303 You can make no assumptions about the format of these codes.
307 @section Access to Operands
309 @cindex access to operands
310 @cindex operand access
316 Operands of expressions are accessed using the macros @code{XEXP},
317 @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
318 two arguments: an expression-pointer (RTX) and an operand number
319 (counting from zero). Thus,
326 accesses operand 2 of expression @var{x}, as an expression.
333 accesses the same operand as an integer. @code{XSTR}, used in the same
334 fashion, would access it as a string.
336 Any operand can be accessed as an integer, as an expression or as a string.
337 You must choose the correct method of access for the kind of value actually
338 stored in the operand. You would do this based on the expression code of
339 the containing expression. That is also how you would know how many
342 For example, if @var{x} is a @code{subreg} expression, you know that it has
343 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
344 and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
345 would get the address of the expression operand but cast as an integer;
346 that might occasionally be useful, but it would be cleaner to write
347 @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
348 compile without error, and would return the second, integer operand cast as
349 an expression pointer, which would probably result in a crash when
350 accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
351 but this will access memory past the end of the expression with
352 unpredictable results.
354 Access to operands which are vectors is more complicated. You can use the
355 macro @code{XVEC} to get the vector-pointer itself, or the macros
356 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
361 @item XVEC (@var{exp}, @var{idx})
362 Access the vector-pointer which is operand number @var{idx} in @var{exp}.
365 @item XVECLEN (@var{exp}, @var{idx})
366 Access the length (number of elements) in the vector which is
367 in operand number @var{idx} in @var{exp}. This value is an @code{int}.
370 @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
371 Access element number @var{eltnum} in the vector which is
372 in operand number @var{idx} in @var{exp}. This value is an RTX@.
374 It is up to you to make sure that @var{eltnum} is not negative
375 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
378 All the macros defined in this section expand into lvalues and therefore
379 can be used to assign the operands, lengths and vector elements as well as
382 @node Special Accessors
383 @section Access to Special Operands
384 @cindex access to special operands
386 Some RTL nodes have special annotations associated with them.
391 @findex MEM_ALIAS_SET
392 @item MEM_ALIAS_SET (@var{x})
393 If 0, @var{x} is not in any alias set, and may alias anything. Otherwise,
394 @var{x} can only alias @code{MEM}s in a conflicting alias set. This value
395 is set in a language-dependent manner in the front-end, and should not be
396 altered in the back-end. In some front-ends, these numbers may correspond
397 in some way to types, or other language-level entities, but they need not,
398 and the back-end makes no such assumptions.
399 These set numbers are tested with @code{alias_sets_conflict_p}.
402 @item MEM_EXPR (@var{x})
403 If this register is known to hold the value of some user-level
404 declaration, this is that tree node. It may also be a
405 @code{COMPONENT_REF}, in which case this is some field reference,
406 and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
407 or another @code{COMPONENT_REF}, or null if there is no compile-time
408 object associated with the reference.
410 @findex MEM_OFFSET_KNOWN_P
411 @item MEM_OFFSET_KNOWN_P (@var{x})
412 True if the offset of the memory reference from @code{MEM_EXPR} is known.
413 @samp{MEM_OFFSET (@var{x})} provides the offset if so.
416 @item MEM_OFFSET (@var{x})
417 The offset from the start of @code{MEM_EXPR}. The value is only valid if
418 @samp{MEM_OFFSET_KNOWN_P (@var{x})} is true.
420 @findex MEM_SIZE_KNOWN_P
421 @item MEM_SIZE_KNOWN_P (@var{x})
422 True if the size of the memory reference is known.
423 @samp{MEM_SIZE (@var{x})} provides its size if so.
426 @item MEM_SIZE (@var{x})
427 The size in bytes of the memory reference.
428 This is mostly relevant for @code{BLKmode} references as otherwise
429 the size is implied by the mode. The value is only valid if
430 @samp{MEM_SIZE_KNOWN_P (@var{x})} is true.
433 @item MEM_ALIGN (@var{x})
434 The known alignment in bits of the memory reference.
436 @findex MEM_ADDR_SPACE
437 @item MEM_ADDR_SPACE (@var{x})
438 The address space of the memory reference. This will commonly be zero
439 for the generic address space.
444 @findex ORIGINAL_REGNO
445 @item ORIGINAL_REGNO (@var{x})
446 This field holds the number the register ``originally'' had; for a
447 pseudo register turned into a hard reg this will hold the old pseudo
451 @item REG_EXPR (@var{x})
452 If this register is known to hold the value of some user-level
453 declaration, this is that tree node.
456 @item REG_OFFSET (@var{x})
457 If this register is known to hold the value of some user-level
458 declaration, this is the offset into that logical storage.
463 @findex SYMBOL_REF_DECL
464 @item SYMBOL_REF_DECL (@var{x})
465 If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
466 a @code{FUNCTION_DECL}, that tree is recorded here. If this value is
467 null, then @var{x} was created by back end code generation routines,
468 and there is no associated front end symbol table entry.
470 @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
471 that is, some sort of constant. In this case, the @code{symbol_ref}
472 is an entry in the per-file constant pool; again, there is no associated
473 front end symbol table entry.
475 @findex SYMBOL_REF_CONSTANT
476 @item SYMBOL_REF_CONSTANT (@var{x})
477 If @samp{CONSTANT_POOL_ADDRESS_P (@var{x})} is true, this is the constant
478 pool entry for @var{x}. It is null otherwise.
480 @findex SYMBOL_REF_DATA
481 @item SYMBOL_REF_DATA (@var{x})
482 A field of opaque type used to store @code{SYMBOL_REF_DECL} or
483 @code{SYMBOL_REF_CONSTANT}.
485 @findex SYMBOL_REF_FLAGS
486 @item SYMBOL_REF_FLAGS (@var{x})
487 In a @code{symbol_ref}, this is used to communicate various predicates
488 about the symbol. Some of these are common enough to be computed by
489 common code, some are specific to the target. The common bits are:
492 @findex SYMBOL_REF_FUNCTION_P
493 @findex SYMBOL_FLAG_FUNCTION
494 @item SYMBOL_FLAG_FUNCTION
495 Set if the symbol refers to a function.
497 @findex SYMBOL_REF_LOCAL_P
498 @findex SYMBOL_FLAG_LOCAL
499 @item SYMBOL_FLAG_LOCAL
500 Set if the symbol is local to this ``module''.
501 See @code{TARGET_BINDS_LOCAL_P}.
503 @findex SYMBOL_REF_EXTERNAL_P
504 @findex SYMBOL_FLAG_EXTERNAL
505 @item SYMBOL_FLAG_EXTERNAL
506 Set if this symbol is not defined in this translation unit.
507 Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
509 @findex SYMBOL_REF_SMALL_P
510 @findex SYMBOL_FLAG_SMALL
511 @item SYMBOL_FLAG_SMALL
512 Set if the symbol is located in the small data section.
513 See @code{TARGET_IN_SMALL_DATA_P}.
515 @findex SYMBOL_FLAG_TLS_SHIFT
516 @findex SYMBOL_REF_TLS_MODEL
517 @item SYMBOL_REF_TLS_MODEL (@var{x})
518 This is a multi-bit field accessor that returns the @code{tls_model}
519 to be used for a thread-local storage symbol. It returns zero for
520 non-thread-local symbols.
522 @findex SYMBOL_REF_HAS_BLOCK_INFO_P
523 @findex SYMBOL_FLAG_HAS_BLOCK_INFO
524 @item SYMBOL_FLAG_HAS_BLOCK_INFO
525 Set if the symbol has @code{SYMBOL_REF_BLOCK} and
526 @code{SYMBOL_REF_BLOCK_OFFSET} fields.
528 @findex SYMBOL_REF_ANCHOR_P
529 @findex SYMBOL_FLAG_ANCHOR
530 @cindex @option{-fsection-anchors}
531 @item SYMBOL_FLAG_ANCHOR
532 Set if the symbol is used as a section anchor. ``Section anchors''
533 are symbols that have a known position within an @code{object_block}
534 and that can be used to access nearby members of that block.
535 They are used to implement @option{-fsection-anchors}.
537 If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too.
540 Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
544 @findex SYMBOL_REF_BLOCK
545 @item SYMBOL_REF_BLOCK (@var{x})
546 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the
547 @samp{object_block} structure to which the symbol belongs,
548 or @code{NULL} if it has not been assigned a block.
550 @findex SYMBOL_REF_BLOCK_OFFSET
551 @item SYMBOL_REF_BLOCK_OFFSET (@var{x})
552 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the offset of @var{x}
553 from the first object in @samp{SYMBOL_REF_BLOCK (@var{x})}. The value is
554 negative if @var{x} has not yet been assigned to a block, or it has not
555 been given an offset within that block.
559 @section Flags in an RTL Expression
560 @cindex flags in RTL expression
562 RTL expressions contain several flags (one-bit bit-fields)
563 that are used in certain types of expression. Most often they
564 are accessed with the following macros, which expand into lvalues.
567 @findex CONSTANT_POOL_ADDRESS_P
568 @cindex @code{symbol_ref} and @samp{/u}
569 @cindex @code{unchanging}, in @code{symbol_ref}
570 @item CONSTANT_POOL_ADDRESS_P (@var{x})
571 Nonzero in a @code{symbol_ref} if it refers to part of the current
572 function's constant pool. For most targets these addresses are in a
573 @code{.rodata} section entirely separate from the function, but for
574 some targets the addresses are close to the beginning of the function.
575 In either case GCC assumes these addresses can be addressed directly,
576 perhaps with the help of base registers.
577 Stored in the @code{unchanging} field and printed as @samp{/u}.
579 @findex RTL_CONST_CALL_P
580 @cindex @code{call_insn} and @samp{/u}
581 @cindex @code{unchanging}, in @code{call_insn}
582 @item RTL_CONST_CALL_P (@var{x})
583 In a @code{call_insn} indicates that the insn represents a call to a
584 const function. Stored in the @code{unchanging} field and printed as
587 @findex RTL_PURE_CALL_P
588 @cindex @code{call_insn} and @samp{/i}
589 @cindex @code{return_val}, in @code{call_insn}
590 @item RTL_PURE_CALL_P (@var{x})
591 In a @code{call_insn} indicates that the insn represents a call to a
592 pure function. Stored in the @code{return_val} field and printed as
595 @findex RTL_CONST_OR_PURE_CALL_P
596 @cindex @code{call_insn} and @samp{/u} or @samp{/i}
597 @item RTL_CONST_OR_PURE_CALL_P (@var{x})
598 In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or
599 @code{RTL_PURE_CALL_P} is true.
601 @findex RTL_LOOPING_CONST_OR_PURE_CALL_P
602 @cindex @code{call_insn} and @samp{/c}
603 @cindex @code{call}, in @code{call_insn}
604 @item RTL_LOOPING_CONST_OR_PURE_CALL_P (@var{x})
605 In a @code{call_insn} indicates that the insn represents a possibly
606 infinite looping call to a const or pure function. Stored in the
607 @code{call} field and printed as @samp{/c}. Only true if one of
608 @code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true.
610 @findex INSN_ANNULLED_BRANCH_P
611 @cindex @code{jump_insn} and @samp{/u}
612 @cindex @code{call_insn} and @samp{/u}
613 @cindex @code{insn} and @samp{/u}
614 @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
615 @item INSN_ANNULLED_BRANCH_P (@var{x})
616 In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
617 that the branch is an annulling one. See the discussion under
618 @code{sequence} below. Stored in the @code{unchanging} field and
619 printed as @samp{/u}.
621 @findex INSN_DELETED_P
622 @cindex @code{insn} and @samp{/v}
623 @cindex @code{call_insn} and @samp{/v}
624 @cindex @code{jump_insn} and @samp{/v}
625 @cindex @code{code_label} and @samp{/v}
626 @cindex @code{jump_table_data} and @samp{/v}
627 @cindex @code{barrier} and @samp{/v}
628 @cindex @code{note} and @samp{/v}
629 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{jump_table_data}, @code{barrier}, and @code{note}
630 @item INSN_DELETED_P (@var{x})
631 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
632 @code{jump_table_data}, @code{barrier}, or @code{note},
633 nonzero if the insn has been deleted. Stored in the
634 @code{volatil} field and printed as @samp{/v}.
636 @findex INSN_FROM_TARGET_P
637 @cindex @code{insn} and @samp{/s}
638 @cindex @code{jump_insn} and @samp{/s}
639 @cindex @code{call_insn} and @samp{/s}
640 @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
641 @item INSN_FROM_TARGET_P (@var{x})
642 In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
643 slot of a branch, indicates that the insn
644 is from the target of the branch. If the branch insn has
645 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
646 the branch is taken. For annulled branches with
647 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
648 branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
649 this insn will always be executed. Stored in the @code{in_struct}
650 field and printed as @samp{/s}.
652 @findex LABEL_PRESERVE_P
653 @cindex @code{code_label} and @samp{/i}
654 @cindex @code{note} and @samp{/i}
655 @cindex @code{in_struct}, in @code{code_label} and @code{note}
656 @item LABEL_PRESERVE_P (@var{x})
657 In a @code{code_label} or @code{note}, indicates that the label is referenced by
658 code or data not visible to the RTL of a given function.
659 Labels referenced by a non-local goto will have this bit set. Stored
660 in the @code{in_struct} field and printed as @samp{/s}.
662 @findex LABEL_REF_NONLOCAL_P
663 @cindex @code{label_ref} and @samp{/v}
664 @cindex @code{reg_label} and @samp{/v}
665 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
666 @item LABEL_REF_NONLOCAL_P (@var{x})
667 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
668 a reference to a non-local label.
669 Stored in the @code{volatil} field and printed as @samp{/v}.
671 @findex MEM_KEEP_ALIAS_SET_P
672 @cindex @code{mem} and @samp{/j}
673 @cindex @code{jump}, in @code{mem}
674 @item MEM_KEEP_ALIAS_SET_P (@var{x})
675 In @code{mem} expressions, 1 if we should keep the alias set for this
676 mem unchanged when we access a component. Set to 1, for example, when we
677 are already in a non-addressable component of an aggregate.
678 Stored in the @code{jump} field and printed as @samp{/j}.
680 @findex MEM_VOLATILE_P
681 @cindex @code{mem} and @samp{/v}
682 @cindex @code{asm_input} and @samp{/v}
683 @cindex @code{asm_operands} and @samp{/v}
684 @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
685 @item MEM_VOLATILE_P (@var{x})
686 In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
687 nonzero for volatile memory references.
688 Stored in the @code{volatil} field and printed as @samp{/v}.
691 @cindex @code{mem} and @samp{/c}
692 @cindex @code{call}, in @code{mem}
693 @item MEM_NOTRAP_P (@var{x})
694 In @code{mem}, nonzero for memory references that will not trap.
695 Stored in the @code{call} field and printed as @samp{/c}.
698 @cindex @code{mem} and @samp{/f}
699 @cindex @code{frame_related}, in @code{mem}
700 @item MEM_POINTER (@var{x})
701 Nonzero in a @code{mem} if the memory reference holds a pointer.
702 Stored in the @code{frame_related} field and printed as @samp{/f}.
704 @findex REG_FUNCTION_VALUE_P
705 @cindex @code{reg} and @samp{/i}
706 @cindex @code{return_val}, in @code{reg}
707 @item REG_FUNCTION_VALUE_P (@var{x})
708 Nonzero in a @code{reg} if it is the place in which this function's
709 value is going to be returned. (This happens only in a hard
710 register.) Stored in the @code{return_val} field and printed as
714 @cindex @code{reg} and @samp{/f}
715 @cindex @code{frame_related}, in @code{reg}
716 @item REG_POINTER (@var{x})
717 Nonzero in a @code{reg} if the register holds a pointer. Stored in the
718 @code{frame_related} field and printed as @samp{/f}.
720 @findex REG_USERVAR_P
721 @cindex @code{reg} and @samp{/v}
722 @cindex @code{volatil}, in @code{reg}
723 @item REG_USERVAR_P (@var{x})
724 In a @code{reg}, nonzero if it corresponds to a variable present in
725 the user's source code. Zero for temporaries generated internally by
726 the compiler. Stored in the @code{volatil} field and printed as
729 The same hard register may be used also for collecting the values of
730 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
733 @findex RTX_FRAME_RELATED_P
734 @cindex @code{insn} and @samp{/f}
735 @cindex @code{call_insn} and @samp{/f}
736 @cindex @code{jump_insn} and @samp{/f}
737 @cindex @code{barrier} and @samp{/f}
738 @cindex @code{set} and @samp{/f}
739 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
740 @item RTX_FRAME_RELATED_P (@var{x})
741 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
742 @code{barrier}, or @code{set} which is part of a function prologue
743 and sets the stack pointer, sets the frame pointer, or saves a register.
744 This flag should also be set on an instruction that sets up a temporary
745 register to use in place of the frame pointer.
746 Stored in the @code{frame_related} field and printed as @samp{/f}.
748 In particular, on RISC targets where there are limits on the sizes of
749 immediate constants, it is sometimes impossible to reach the register
750 save area directly from the stack pointer. In that case, a temporary
751 register is used that is near enough to the register save area, and the
752 Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
753 must (temporarily) be changed to be this temporary register. So, the
754 instruction that sets this temporary register must be marked as
755 @code{RTX_FRAME_RELATED_P}.
757 If the marked instruction is overly complex (defined in terms of what
758 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
759 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
760 instruction. This note should contain a simple expression of the
761 computation performed by this instruction, i.e., one that
762 @code{dwarf2out_frame_debug_expr} can handle.
764 This flag is required for exception handling support on targets with RTL
767 @findex MEM_READONLY_P
768 @cindex @code{mem} and @samp{/u}
769 @cindex @code{unchanging}, in @code{mem}
770 @item MEM_READONLY_P (@var{x})
771 Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
773 Read-only in this context means never modified during the lifetime of the
774 program, not necessarily in ROM or in write-disabled pages. A common
775 example of the later is a shared library's global offset table. This
776 table is initialized by the runtime loader, so the memory is technically
777 writable, but after control is transferred from the runtime loader to the
778 application, this memory will never be subsequently modified.
780 Stored in the @code{unchanging} field and printed as @samp{/u}.
782 @findex SCHED_GROUP_P
783 @cindex @code{insn} and @samp{/s}
784 @cindex @code{call_insn} and @samp{/s}
785 @cindex @code{jump_insn} and @samp{/s}
786 @cindex @code{jump_table_data} and @samp{/s}
787 @cindex @code{in_struct}, in @code{insn}, @code{call_insn}, @code{jump_insn} and @code{jump_table_data}
788 @item SCHED_GROUP_P (@var{x})
789 During instruction scheduling, in an @code{insn}, @code{call_insn},
790 @code{jump_insn} or @code{jump_table_data}, indicates that the
791 previous insn must be scheduled together with this insn. This is used to
792 ensure that certain groups of instructions will not be split up by the
793 instruction scheduling pass, for example, @code{use} insns before
794 a @code{call_insn} may not be separated from the @code{call_insn}.
795 Stored in the @code{in_struct} field and printed as @samp{/s}.
797 @findex SET_IS_RETURN_P
798 @cindex @code{insn} and @samp{/j}
799 @cindex @code{jump}, in @code{insn}
800 @item SET_IS_RETURN_P (@var{x})
801 For a @code{set}, nonzero if it is for a return.
802 Stored in the @code{jump} field and printed as @samp{/j}.
804 @findex SIBLING_CALL_P
805 @cindex @code{call_insn} and @samp{/j}
806 @cindex @code{jump}, in @code{call_insn}
807 @item SIBLING_CALL_P (@var{x})
808 For a @code{call_insn}, nonzero if the insn is a sibling call.
809 Stored in the @code{jump} field and printed as @samp{/j}.
811 @findex STRING_POOL_ADDRESS_P
812 @cindex @code{symbol_ref} and @samp{/f}
813 @cindex @code{frame_related}, in @code{symbol_ref}
814 @item STRING_POOL_ADDRESS_P (@var{x})
815 For a @code{symbol_ref} expression, nonzero if it addresses this function's
816 string constant pool.
817 Stored in the @code{frame_related} field and printed as @samp{/f}.
819 @findex SUBREG_PROMOTED_UNSIGNED_P
820 @cindex @code{subreg} and @samp{/u} and @samp{/v}
821 @cindex @code{unchanging}, in @code{subreg}
822 @cindex @code{volatil}, in @code{subreg}
823 @item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
824 Returns a value greater then zero for a @code{subreg} that has
825 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
826 zero-extended, zero if it is kept sign-extended, and less then zero if it is
827 extended some other way via the @code{ptr_extend} instruction.
828 Stored in the @code{unchanging}
829 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
830 This macro may only be used to get the value it may not be used to change
831 the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
833 @findex SUBREG_PROMOTED_UNSIGNED_SET
834 @cindex @code{subreg} and @samp{/u}
835 @cindex @code{unchanging}, in @code{subreg}
836 @cindex @code{volatil}, in @code{subreg}
837 @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
838 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
839 to reflect zero, sign, or other extension. If @code{volatil} is
840 zero, then @code{unchanging} as nonzero means zero extension and as
841 zero means sign extension. If @code{volatil} is nonzero then some
842 other type of extension was done via the @code{ptr_extend} instruction.
844 @findex SUBREG_PROMOTED_VAR_P
845 @cindex @code{subreg} and @samp{/s}
846 @cindex @code{in_struct}, in @code{subreg}
847 @item SUBREG_PROMOTED_VAR_P (@var{x})
848 Nonzero in a @code{subreg} if it was made when accessing an object that
849 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
850 description macro (@pxref{Storage Layout}). In this case, the mode of
851 the @code{subreg} is the declared mode of the object and the mode of
852 @code{SUBREG_REG} is the mode of the register that holds the object.
853 Promoted variables are always either sign- or zero-extended to the wider
854 mode on every assignment. Stored in the @code{in_struct} field and
855 printed as @samp{/s}.
857 @findex SYMBOL_REF_USED
858 @cindex @code{used}, in @code{symbol_ref}
859 @item SYMBOL_REF_USED (@var{x})
860 In a @code{symbol_ref}, indicates that @var{x} has been used. This is
861 normally only used to ensure that @var{x} is only declared external
862 once. Stored in the @code{used} field.
864 @findex SYMBOL_REF_WEAK
865 @cindex @code{symbol_ref} and @samp{/i}
866 @cindex @code{return_val}, in @code{symbol_ref}
867 @item SYMBOL_REF_WEAK (@var{x})
868 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
869 Stored in the @code{return_val} field and printed as @samp{/i}.
871 @findex SYMBOL_REF_FLAG
872 @cindex @code{symbol_ref} and @samp{/v}
873 @cindex @code{volatil}, in @code{symbol_ref}
874 @item SYMBOL_REF_FLAG (@var{x})
875 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
876 Stored in the @code{volatil} field and printed as @samp{/v}.
878 Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
879 by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
880 is mandatory if the target requires more than one bit of storage.
882 @findex PREFETCH_SCHEDULE_BARRIER_P
883 @cindex @code{prefetch} and @samp{/v}
884 @cindex @code{volatile}, in @code{prefetch}
885 @item PREFETCH_SCHEDULE_BARRIER_P (@var{x})
886 In a @code{prefetch}, indicates that the prefetch is a scheduling barrier.
887 No other INSNs will be moved over it.
888 Stored in the @code{volatil} field and printed as @samp{/v}.
891 These are the fields to which the above macros refer:
895 @cindex @samp{/c} in RTL dump
897 In a @code{mem}, 1 means that the memory reference will not trap.
899 In a @code{call}, 1 means that this pure or const call may possibly
902 In an RTL dump, this flag is represented as @samp{/c}.
904 @findex frame_related
905 @cindex @samp{/f} in RTL dump
907 In an @code{insn} or @code{set} expression, 1 means that it is part of
908 a function prologue and sets the stack pointer, sets the frame pointer,
909 saves a register, or sets up a temporary register to use in place of the
912 In @code{reg} expressions, 1 means that the register holds a pointer.
914 In @code{mem} expressions, 1 means that the memory reference holds a pointer.
916 In @code{symbol_ref} expressions, 1 means that the reference addresses
917 this function's string constant pool.
919 In an RTL dump, this flag is represented as @samp{/f}.
922 @cindex @samp{/s} in RTL dump
924 In @code{reg} expressions, it is 1 if the register has its entire life
925 contained within the test expression of some loop.
927 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
928 an object that has had its mode promoted from a wider mode.
930 In @code{label_ref} expressions, 1 means that the referenced label is
931 outside the innermost loop containing the insn in which the @code{label_ref}
934 In @code{code_label} expressions, it is 1 if the label may never be deleted.
935 This is used for labels which are the target of non-local gotos. Such a
936 label that would have been deleted is replaced with a @code{note} of type
937 @code{NOTE_INSN_DELETED_LABEL}.
939 In an @code{insn} during dead-code elimination, 1 means that the insn is
942 In an @code{insn} or @code{jump_insn} during reorg for an insn in the
943 delay slot of a branch,
944 1 means that this insn is from the target of the branch.
946 In an @code{insn} during instruction scheduling, 1 means that this insn
947 must be scheduled as part of a group together with the previous insn.
949 In an RTL dump, this flag is represented as @samp{/s}.
952 @cindex @samp{/i} in RTL dump
954 In @code{reg} expressions, 1 means the register contains
955 the value to be returned by the current function. On
956 machines that pass parameters in registers, the same register number
957 may be used for parameters as well, but this flag is not set on such
960 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
962 In @code{call} expressions, 1 means the call is pure.
964 In an RTL dump, this flag is represented as @samp{/i}.
967 @cindex @samp{/j} in RTL dump
969 In a @code{mem} expression, 1 means we should keep the alias set for this
970 mem unchanged when we access a component.
972 In a @code{set}, 1 means it is for a return.
974 In a @code{call_insn}, 1 means it is a sibling call.
976 In an RTL dump, this flag is represented as @samp{/j}.
979 @cindex @samp{/u} in RTL dump
981 In @code{reg} and @code{mem} expressions, 1 means
982 that the value of the expression never changes.
984 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
985 unsigned object whose mode has been promoted to a wider mode.
987 In an @code{insn} or @code{jump_insn} in the delay slot of a branch
988 instruction, 1 means an annulling branch should be used.
990 In a @code{symbol_ref} expression, 1 means that this symbol addresses
991 something in the per-function constant pool.
993 In a @code{call_insn} 1 means that this instruction is a call to a const
996 In an RTL dump, this flag is represented as @samp{/u}.
1000 This flag is used directly (without an access macro) at the end of RTL
1001 generation for a function, to count the number of times an expression
1002 appears in insns. Expressions that appear more than once are copied,
1003 according to the rules for shared structure (@pxref{Sharing}).
1005 For a @code{reg}, it is used directly (without an access macro) by the
1006 leaf register renumbering code to ensure that each register is only
1009 In a @code{symbol_ref}, it indicates that an external declaration for
1010 the symbol has already been written.
1013 @cindex @samp{/v} in RTL dump
1015 @cindex volatile memory references
1016 In a @code{mem}, @code{asm_operands}, or @code{asm_input}
1017 expression, it is 1 if the memory
1018 reference is volatile. Volatile memory references may not be deleted,
1019 reordered or combined.
1021 In a @code{symbol_ref} expression, it is used for machine-specific
1024 In a @code{reg} expression, it is 1 if the value is a user-level variable.
1025 0 indicates an internal compiler temporary.
1027 In an @code{insn}, 1 means the insn has been deleted.
1029 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
1030 to a non-local label.
1032 In @code{prefetch} expressions, 1 means that the containing insn is a
1035 In an RTL dump, this flag is represented as @samp{/v}.
1039 @section Machine Modes
1040 @cindex machine modes
1042 @findex enum machine_mode
1043 A machine mode describes a size of data object and the representation used
1044 for it. In the C code, machine modes are represented by an enumeration
1045 type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
1046 expression has room for a machine mode and so do certain kinds of tree
1047 expressions (declarations and types, to be precise).
1049 In debugging dumps and machine descriptions, the machine mode of an RTL
1050 expression is written after the expression code with a colon to separate
1051 them. The letters @samp{mode} which appear at the end of each machine mode
1052 name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
1053 expression with machine mode @code{SImode}. If the mode is
1054 @code{VOIDmode}, it is not written at all.
1056 Here is a table of machine modes. The term ``byte'' below refers to an
1057 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
1062 ``Bit'' mode represents a single bit, for predicate registers.
1066 ``Quarter-Integer'' mode represents a single byte treated as an integer.
1070 ``Half-Integer'' mode represents a two-byte integer.
1074 ``Partial Single Integer'' mode represents an integer which occupies
1075 four bytes but which doesn't really use all four. On some machines,
1076 this is the right mode to use for pointers.
1080 ``Single Integer'' mode represents a four-byte integer.
1084 ``Partial Double Integer'' mode represents an integer which occupies
1085 eight bytes but which doesn't really use all eight. On some machines,
1086 this is the right mode to use for certain pointers.
1090 ``Double Integer'' mode represents an eight-byte integer.
1094 ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
1098 ``Octa Integer'' (?) mode represents a thirty-two-byte integer.
1102 ``Hexadeca Integer'' (?) mode represents a sixty-four-byte integer.
1106 ``Quarter-Floating'' mode represents a quarter-precision (single byte)
1107 floating point number.
1111 ``Half-Floating'' mode represents a half-precision (two byte) floating
1116 ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
1117 (three byte) floating point number.
1121 ``Single Floating'' mode represents a four byte floating point number.
1122 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1123 this is a single-precision IEEE floating point number; it can also be
1124 used for double-precision (on processors with 16-bit bytes) and
1125 single-precision VAX and IBM types.
1129 ``Double Floating'' mode represents an eight byte floating point number.
1130 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1131 this is a double-precision IEEE floating point number.
1135 ``Extended Floating'' mode represents an IEEE extended floating point
1136 number. This mode only has 80 meaningful bits (ten bytes). Some
1137 processors require such numbers to be padded to twelve bytes, others
1138 to sixteen; this mode is used for either.
1142 ``Single Decimal Floating'' mode represents a four byte decimal
1143 floating point number (as distinct from conventional binary floating
1148 ``Double Decimal Floating'' mode represents an eight byte decimal
1149 floating point number.
1153 ``Tetra Decimal Floating'' mode represents a sixteen byte decimal
1154 floating point number all 128 of whose bits are meaningful.
1158 ``Tetra Floating'' mode represents a sixteen byte floating point number
1159 all 128 of whose bits are meaningful. One common use is the
1160 IEEE quad-precision format.
1164 ``Quarter-Fractional'' mode represents a single byte treated as a signed
1165 fractional number. The default format is ``s.7''.
1169 ``Half-Fractional'' mode represents a two-byte signed fractional number.
1170 The default format is ``s.15''.
1174 ``Single Fractional'' mode represents a four-byte signed fractional number.
1175 The default format is ``s.31''.
1179 ``Double Fractional'' mode represents an eight-byte signed fractional number.
1180 The default format is ``s.63''.
1184 ``Tetra Fractional'' mode represents a sixteen-byte signed fractional number.
1185 The default format is ``s.127''.
1189 ``Unsigned Quarter-Fractional'' mode represents a single byte treated as an
1190 unsigned fractional number. The default format is ``.8''.
1194 ``Unsigned Half-Fractional'' mode represents a two-byte unsigned fractional
1195 number. The default format is ``.16''.
1199 ``Unsigned Single Fractional'' mode represents a four-byte unsigned fractional
1200 number. The default format is ``.32''.
1204 ``Unsigned Double Fractional'' mode represents an eight-byte unsigned
1205 fractional number. The default format is ``.64''.
1209 ``Unsigned Tetra Fractional'' mode represents a sixteen-byte unsigned
1210 fractional number. The default format is ``.128''.
1214 ``Half-Accumulator'' mode represents a two-byte signed accumulator.
1215 The default format is ``s8.7''.
1219 ``Single Accumulator'' mode represents a four-byte signed accumulator.
1220 The default format is ``s16.15''.
1224 ``Double Accumulator'' mode represents an eight-byte signed accumulator.
1225 The default format is ``s32.31''.
1229 ``Tetra Accumulator'' mode represents a sixteen-byte signed accumulator.
1230 The default format is ``s64.63''.
1234 ``Unsigned Half-Accumulator'' mode represents a two-byte unsigned accumulator.
1235 The default format is ``8.8''.
1239 ``Unsigned Single Accumulator'' mode represents a four-byte unsigned
1240 accumulator. The default format is ``16.16''.
1244 ``Unsigned Double Accumulator'' mode represents an eight-byte unsigned
1245 accumulator. The default format is ``32.32''.
1249 ``Unsigned Tetra Accumulator'' mode represents a sixteen-byte unsigned
1250 accumulator. The default format is ``64.64''.
1254 ``Condition Code'' mode represents the value of a condition code, which
1255 is a machine-specific set of bits used to represent the result of a
1256 comparison operation. Other machine-specific modes may also be used for
1257 the condition code. These modes are not used on machines that use
1258 @code{cc0} (@pxref{Condition Code}).
1262 ``Block'' mode represents values that are aggregates to which none of
1263 the other modes apply. In RTL, only memory references can have this mode,
1264 and only if they appear in string-move or vector instructions. On machines
1265 which have no such instructions, @code{BLKmode} will not appear in RTL@.
1269 Void mode means the absence of a mode or an unspecified mode.
1270 For example, RTL expressions of code @code{const_int} have mode
1271 @code{VOIDmode} because they can be taken to have whatever mode the context
1272 requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
1273 the absence of any mode.
1281 @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
1282 These modes stand for a complex number represented as a pair of floating
1283 point values. The floating point values are in @code{QFmode},
1284 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
1285 @code{TFmode}, respectively.
1293 @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
1294 These modes stand for a complex number represented as a pair of integer
1295 values. The integer values are in @code{QImode}, @code{HImode},
1296 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1300 The machine description defines @code{Pmode} as a C macro which expands
1301 into the machine mode used for addresses. Normally this is the mode
1302 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1304 The only modes which a machine description @i{must} support are
1305 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1306 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1307 The compiler will attempt to use @code{DImode} for 8-byte structures and
1308 unions, but this can be prevented by overriding the definition of
1309 @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
1310 use @code{TImode} for 16-byte structures and unions. Likewise, you can
1311 arrange for the C type @code{short int} to avoid using @code{HImode}.
1313 @cindex mode classes
1314 Very few explicit references to machine modes remain in the compiler and
1315 these few references will soon be removed. Instead, the machine modes
1316 are divided into mode classes. These are represented by the enumeration
1317 type @code{enum mode_class} defined in @file{machmode.h}. The possible
1323 Integer modes. By default these are @code{BImode}, @code{QImode},
1324 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1327 @findex MODE_PARTIAL_INT
1328 @item MODE_PARTIAL_INT
1329 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1330 @code{PSImode} and @code{PDImode}.
1334 Floating point modes. By default these are @code{QFmode},
1335 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1336 @code{XFmode} and @code{TFmode}.
1338 @findex MODE_DECIMAL_FLOAT
1339 @item MODE_DECIMAL_FLOAT
1340 Decimal floating point modes. By default these are @code{SDmode},
1341 @code{DDmode} and @code{TDmode}.
1345 Signed fractional modes. By default these are @code{QQmode}, @code{HQmode},
1346 @code{SQmode}, @code{DQmode} and @code{TQmode}.
1350 Unsigned fractional modes. By default these are @code{UQQmode}, @code{UHQmode},
1351 @code{USQmode}, @code{UDQmode} and @code{UTQmode}.
1355 Signed accumulator modes. By default these are @code{HAmode},
1356 @code{SAmode}, @code{DAmode} and @code{TAmode}.
1360 Unsigned accumulator modes. By default these are @code{UHAmode},
1361 @code{USAmode}, @code{UDAmode} and @code{UTAmode}.
1363 @findex MODE_COMPLEX_INT
1364 @item MODE_COMPLEX_INT
1365 Complex integer modes. (These are not currently implemented).
1367 @findex MODE_COMPLEX_FLOAT
1368 @item MODE_COMPLEX_FLOAT
1369 Complex floating point modes. By default these are @code{QCmode},
1370 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1373 @findex MODE_FUNCTION
1375 Algol or Pascal function variables including a static chain.
1376 (These are not currently implemented).
1380 Modes representing condition code values. These are @code{CCmode} plus
1381 any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.
1382 @xref{Jump Patterns},
1383 also see @ref{Condition Code}.
1387 This is a catchall mode class for modes which don't fit into the above
1388 classes. Currently @code{VOIDmode} and @code{BLKmode} are in
1392 Here are some C macros that relate to machine modes:
1396 @item GET_MODE (@var{x})
1397 Returns the machine mode of the RTX @var{x}.
1400 @item PUT_MODE (@var{x}, @var{newmode})
1401 Alters the machine mode of the RTX @var{x} to be @var{newmode}.
1403 @findex NUM_MACHINE_MODES
1404 @item NUM_MACHINE_MODES
1405 Stands for the number of machine modes available on the target
1406 machine. This is one greater than the largest numeric value of any
1409 @findex GET_MODE_NAME
1410 @item GET_MODE_NAME (@var{m})
1411 Returns the name of mode @var{m} as a string.
1413 @findex GET_MODE_CLASS
1414 @item GET_MODE_CLASS (@var{m})
1415 Returns the mode class of mode @var{m}.
1417 @findex GET_MODE_WIDER_MODE
1418 @item GET_MODE_WIDER_MODE (@var{m})
1419 Returns the next wider natural mode. For example, the expression
1420 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1422 @findex GET_MODE_SIZE
1423 @item GET_MODE_SIZE (@var{m})
1424 Returns the size in bytes of a datum of mode @var{m}.
1426 @findex GET_MODE_BITSIZE
1427 @item GET_MODE_BITSIZE (@var{m})
1428 Returns the size in bits of a datum of mode @var{m}.
1430 @findex GET_MODE_IBIT
1431 @item GET_MODE_IBIT (@var{m})
1432 Returns the number of integral bits of a datum of fixed-point mode @var{m}.
1434 @findex GET_MODE_FBIT
1435 @item GET_MODE_FBIT (@var{m})
1436 Returns the number of fractional bits of a datum of fixed-point mode @var{m}.
1438 @findex GET_MODE_MASK
1439 @item GET_MODE_MASK (@var{m})
1440 Returns a bitmask containing 1 for all bits in a word that fit within
1441 mode @var{m}. This macro can only be used for modes whose bitsize is
1442 less than or equal to @code{HOST_BITS_PER_INT}.
1444 @findex GET_MODE_ALIGNMENT
1445 @item GET_MODE_ALIGNMENT (@var{m})
1446 Return the required alignment, in bits, for an object of mode @var{m}.
1448 @findex GET_MODE_UNIT_SIZE
1449 @item GET_MODE_UNIT_SIZE (@var{m})
1450 Returns the size in bytes of the subunits of a datum of mode @var{m}.
1451 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1452 modes. For them, the unit size is the size of the real or imaginary
1455 @findex GET_MODE_NUNITS
1456 @item GET_MODE_NUNITS (@var{m})
1457 Returns the number of units contained in a mode, i.e.,
1458 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1460 @findex GET_CLASS_NARROWEST_MODE
1461 @item GET_CLASS_NARROWEST_MODE (@var{c})
1462 Returns the narrowest mode in mode class @var{c}.
1465 The following 3 variables are defined on every target. They can be
1466 used to allocate buffers that are guaranteed to be large enough to
1467 hold any value that can be represented on the target. The first two
1468 can be overridden by defining them in the target's mode.def file,
1469 however, the value must be a constant that can determined very early
1470 in the compilation process. The third symbol cannot be overridden.
1473 @findex BITS_PER_UNIT
1475 The number of bits in an addressable storage unit (byte). If you do
1476 not define this, the default is 8.
1478 @findex MAX_BITSIZE_MODE_ANY_INT
1479 @item MAX_BITSIZE_MODE_ANY_INT
1480 The maximum bitsize of any mode that is used in integer math. This
1481 should be overridden by the target if it uses large integers as
1482 containers for larger vectors but otherwise never uses the contents to
1483 compute integer values.
1485 @findex MAX_BITSIZE_MODE_ANY_MODE
1486 @item MAX_BITSIZE_MODE_ANY_MODE
1487 The bitsize of the largest mode on the target.
1492 The global variables @code{byte_mode} and @code{word_mode} contain modes
1493 whose classes are @code{MODE_INT} and whose bitsizes are either
1494 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
1495 machines, these are @code{QImode} and @code{SImode}, respectively.
1498 @section Constant Expression Types
1499 @cindex RTL constants
1500 @cindex RTL constant expression types
1502 The simplest RTL expressions are those that represent constant values.
1506 @item (const_int @var{i})
1507 This type of expression represents the integer value @var{i}. @var{i}
1508 is customarily accessed with the macro @code{INTVAL} as in
1509 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1511 Constants generated for modes with fewer bits than in
1512 @code{HOST_WIDE_INT} must be sign extended to full width (e.g., with
1513 @code{gen_int_mode}). For constants for modes with more bits than in
1514 @code{HOST_WIDE_INT} the implied high order bits of that constant are
1515 copies of the top bit. Note however that values are neither
1516 inherently signed nor inherently unsigned; where necessary, signedness
1517 is determined by the rtl operation instead.
1523 There is only one expression object for the integer value zero; it is
1524 the value of the variable @code{const0_rtx}. Likewise, the only
1525 expression for integer value one is found in @code{const1_rtx}, the only
1526 expression for integer value two is found in @code{const2_rtx}, and the
1527 only expression for integer value negative one is found in
1528 @code{constm1_rtx}. Any attempt to create an expression of code
1529 @code{const_int} and value zero, one, two or negative one will return
1530 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1531 @code{constm1_rtx} as appropriate.
1533 @findex const_true_rtx
1534 Similarly, there is only one object for the integer whose value is
1535 @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
1536 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1537 @code{const1_rtx} will point to the same object. If
1538 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1539 @code{constm1_rtx} will point to the same object.
1541 @findex const_double
1542 @item (const_double:@var{m} @var{i0} @var{i1} @dots{})
1543 This represents either a floating-point constant of mode @var{m} or
1544 (on older ports that do not define
1545 @code{TARGET_SUPPORTS_WIDE_INT}) an integer constant too large to fit
1546 into @code{HOST_BITS_PER_WIDE_INT} bits but small enough to fit within
1547 twice that number of bits. In the latter case, @var{m} will be
1548 @code{VOIDmode}. For integral values constants for modes with more
1549 bits than twice the number in @code{HOST_WIDE_INT} the implied high
1550 order bits of that constant are copies of the top bit of
1551 @code{CONST_DOUBLE_HIGH}. Note however that integral values are
1552 neither inherently signed nor inherently unsigned; where necessary,
1553 signedness is determined by the rtl operation instead.
1555 On more modern ports, @code{CONST_DOUBLE} only represents floating
1556 point values. New ports define @code{TARGET_SUPPORTS_WIDE_INT} to
1557 make this designation.
1559 @findex CONST_DOUBLE_LOW
1560 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1561 @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
1562 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1564 If the constant is floating point (regardless of its precision), then
1565 the number of integers used to store the value depends on the size of
1566 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
1567 represent a floating point number, but not precisely in the target
1568 machine's or host machine's floating point format. To convert them to
1569 the precise bit pattern used by the target machine, use the macro
1570 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1572 @findex CONST_WIDE_INT
1573 @item (const_wide_int:@var{m} @var{nunits} @var{elt0} @dots{})
1574 This contains an array of @code{HOST_WIDE_INT}s that is large enough
1575 to hold any constant that can be represented on the target. This form
1576 of rtl is only used on targets that define
1577 @code{TARGET_SUPPORTS_WIDE_INT} to be nonzero and then
1578 @code{CONST_DOUBLE}s are only used to hold floating-point values. If
1579 the target leaves @code{TARGET_SUPPORTS_WIDE_INT} defined as 0,
1580 @code{CONST_WIDE_INT}s are not used and @code{CONST_DOUBLE}s are as
1583 The values are stored in a compressed format. The higher-order
1584 0s or -1s are not represented if they are just the logical sign
1585 extension of the number that is represented.
1587 @findex CONST_WIDE_INT_VEC
1588 @item CONST_WIDE_INT_VEC (@var{code})
1589 Returns the entire array of @code{HOST_WIDE_INT}s that are used to
1590 store the value. This macro should be rarely used.
1592 @findex CONST_WIDE_INT_NUNITS
1593 @item CONST_WIDE_INT_NUNITS (@var{code})
1594 The number of @code{HOST_WIDE_INT}s used to represent the number.
1595 Note that this generally is smaller than the number of
1596 @code{HOST_WIDE_INT}s implied by the mode size.
1598 @findex CONST_WIDE_INT_ELT
1599 @item CONST_WIDE_INT_NUNITS (@var{code},@var{i})
1600 Returns the @code{i}th element of the array. Element 0 is contains
1601 the low order bits of the constant.
1604 @item (const_fixed:@var{m} @dots{})
1605 Represents a fixed-point constant of mode @var{m}.
1606 The operand is a data structure of type @code{struct fixed_value} and
1607 is accessed with the macro @code{CONST_FIXED_VALUE}. The high part of
1608 data is accessed with @code{CONST_FIXED_VALUE_HIGH}; the low part is
1609 accessed with @code{CONST_FIXED_VALUE_LOW}.
1611 @findex const_vector
1612 @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
1613 Represents a vector constant. The square brackets stand for the vector
1614 containing the constant elements. @var{x0}, @var{x1} and so on are
1615 the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
1617 The number of units in a @code{const_vector} is obtained with the macro
1618 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1620 Individual elements in a vector constant are accessed with the macro
1621 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1622 where @var{v} is the vector constant and @var{n} is the element
1625 @findex const_string
1626 @item (const_string @var{str})
1627 Represents a constant string with value @var{str}. Currently this is
1628 used only for insn attributes (@pxref{Insn Attributes}) since constant
1629 strings in C are placed in memory.
1632 @item (symbol_ref:@var{mode} @var{symbol})
1633 Represents the value of an assembler label for data. @var{symbol} is
1634 a string that describes the name of the assembler label. If it starts
1635 with a @samp{*}, the label is the rest of @var{symbol} not including
1636 the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
1639 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1640 Usually that is the only mode for which a symbol is directly valid.
1643 @item (label_ref:@var{mode} @var{label})
1644 Represents the value of an assembler label for code. It contains one
1645 operand, an expression, which must be a @code{code_label} or a @code{note}
1646 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1647 sequence to identify the place where the label should go.
1649 The reason for using a distinct expression type for code label
1650 references is so that jump optimization can distinguish them.
1652 The @code{label_ref} contains a mode, which is usually @code{Pmode}.
1653 Usually that is the only mode for which a label is directly valid.
1656 @item (const:@var{m} @var{exp})
1657 Represents a constant that is the result of an assembly-time
1658 arithmetic computation. The operand, @var{exp}, is an expression that
1659 contains only constants (@code{const_int}, @code{symbol_ref} and
1660 @code{label_ref} expressions) combined with @code{plus} and
1661 @code{minus}. However, not all combinations are valid, since the
1662 assembler cannot do arbitrary arithmetic on relocatable symbols.
1664 @var{m} should be @code{Pmode}.
1667 @item (high:@var{m} @var{exp})
1668 Represents the high-order bits of @var{exp}, usually a
1669 @code{symbol_ref}. The number of bits is machine-dependent and is
1670 normally the number of bits specified in an instruction that initializes
1671 the high order bits of a register. It is used with @code{lo_sum} to
1672 represent the typical two-instruction sequence used in RISC machines to
1673 reference a global memory location.
1675 @var{m} should be @code{Pmode}.
1681 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1682 value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1683 @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
1684 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1685 expression in mode @var{mode}. Otherwise, it returns a
1686 @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
1687 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1688 mode @var{mode} and similarly for @code{CONST2_RTX}. The
1689 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1692 @node Regs and Memory
1693 @section Registers and Memory
1694 @cindex RTL register expressions
1695 @cindex RTL memory expressions
1697 Here are the RTL expression types for describing access to machine
1698 registers and to main memory.
1702 @cindex hard registers
1703 @cindex pseudo registers
1704 @item (reg:@var{m} @var{n})
1705 For small values of the integer @var{n} (those that are less than
1706 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1707 register number @var{n}: a @dfn{hard register}. For larger values of
1708 @var{n}, it stands for a temporary value or @dfn{pseudo register}.
1709 The compiler's strategy is to generate code assuming an unlimited
1710 number of such pseudo registers, and later convert them into hard
1711 registers or into memory references.
1713 @var{m} is the machine mode of the reference. It is necessary because
1714 machines can generally refer to each register in more than one mode.
1715 For example, a register may contain a full word but there may be
1716 instructions to refer to it as a half word or as a single byte, as
1717 well as instructions to refer to it as a floating point number of
1720 Even for a register that the machine can access in only one mode,
1721 the mode must always be specified.
1723 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1724 description, since the number of hard registers on the machine is an
1725 invariant characteristic of the machine. Note, however, that not
1726 all of the machine registers must be general registers. All the
1727 machine registers that can be used for storage of data are given
1728 hard register numbers, even those that can be used only in certain
1729 instructions or can hold only certain types of data.
1731 A hard register may be accessed in various modes throughout one
1732 function, but each pseudo register is given a natural mode
1733 and is accessed only in that mode. When it is necessary to describe
1734 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1737 A @code{reg} expression with a machine mode that specifies more than
1738 one word of data may actually stand for several consecutive registers.
1739 If in addition the register number specifies a hardware register, then
1740 it actually represents several consecutive hardware registers starting
1741 with the specified one.
1743 Each pseudo register number used in a function's RTL code is
1744 represented by a unique @code{reg} expression.
1746 @findex FIRST_VIRTUAL_REGISTER
1747 @findex LAST_VIRTUAL_REGISTER
1748 Some pseudo register numbers, those within the range of
1749 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1750 appear during the RTL generation phase and are eliminated before the
1751 optimization phases. These represent locations in the stack frame that
1752 cannot be determined until RTL generation for the function has been
1753 completed. The following virtual register numbers are defined:
1756 @findex VIRTUAL_INCOMING_ARGS_REGNUM
1757 @item VIRTUAL_INCOMING_ARGS_REGNUM
1758 This points to the first word of the incoming arguments passed on the
1759 stack. Normally these arguments are placed there by the caller, but the
1760 callee may have pushed some arguments that were previously passed in
1763 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1764 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1765 When RTL generation is complete, this virtual register is replaced
1766 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1767 value of @code{FIRST_PARM_OFFSET}.
1769 @findex VIRTUAL_STACK_VARS_REGNUM
1770 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1771 @item VIRTUAL_STACK_VARS_REGNUM
1772 If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
1773 to immediately above the first variable on the stack. Otherwise, it points
1774 to the first variable on the stack.
1776 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1777 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1778 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1779 register given by @code{FRAME_POINTER_REGNUM} and the value
1780 @code{STARTING_FRAME_OFFSET}.
1782 @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1783 @item VIRTUAL_STACK_DYNAMIC_REGNUM
1784 This points to the location of dynamically allocated memory on the stack
1785 immediately after the stack pointer has been adjusted by the amount of
1788 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1789 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1790 This virtual register is replaced by the sum of the register given by
1791 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1793 @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1794 @item VIRTUAL_OUTGOING_ARGS_REGNUM
1795 This points to the location in the stack at which outgoing arguments
1796 should be written when the stack is pre-pushed (arguments pushed using
1797 push insns should always use @code{STACK_POINTER_REGNUM}).
1799 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1800 This virtual register is replaced by the sum of the register given by
1801 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1805 @item (subreg:@var{m1} @var{reg:m2} @var{bytenum})
1807 @code{subreg} expressions are used to refer to a register in a machine
1808 mode other than its natural one, or to refer to one register of
1809 a multi-part @code{reg} that actually refers to several registers.
1811 Each pseudo register has a natural mode. If it is necessary to
1812 operate on it in a different mode, the register must be
1813 enclosed in a @code{subreg}.
1815 There are currently three supported types for the first operand of a
1818 @item pseudo registers
1819 This is the most common case. Most @code{subreg}s have pseudo
1820 @code{reg}s as their first operand.
1823 @code{subreg}s of @code{mem} were common in earlier versions of GCC and
1824 are still supported. During the reload pass these are replaced by plain
1825 @code{mem}s. On machines that do not do instruction scheduling, use of
1826 @code{subreg}s of @code{mem} are still used, but this is no longer
1827 recommended. Such @code{subreg}s are considered to be
1828 @code{register_operand}s rather than @code{memory_operand}s before and
1829 during reload. Because of this, the scheduling passes cannot properly
1830 schedule instructions with @code{subreg}s of @code{mem}, so for machines
1831 that do scheduling, @code{subreg}s of @code{mem} should never be used.
1832 To support this, the combine and recog passes have explicit code to
1833 inhibit the creation of @code{subreg}s of @code{mem} when
1834 @code{INSN_SCHEDULING} is defined.
1836 The use of @code{subreg}s of @code{mem} after the reload pass is an area
1837 that is not well understood and should be avoided. There is still some
1838 code in the compiler to support this, but this code has possibly rotted.
1839 This use of @code{subreg}s is discouraged and will most likely not be
1840 supported in the future.
1842 @item hard registers
1843 It is seldom necessary to wrap hard registers in @code{subreg}s; such
1844 registers would normally reduce to a single @code{reg} rtx. This use of
1845 @code{subreg}s is discouraged and may not be supported in the future.
1849 @code{subreg}s of @code{subreg}s are not supported. Using
1850 @code{simplify_gen_subreg} is the recommended way to avoid this problem.
1852 @code{subreg}s come in two distinct flavors, each having its own
1856 @item Paradoxical subregs
1857 When @var{m1} is strictly wider than @var{m2}, the @code{subreg}
1858 expression is called @dfn{paradoxical}. The canonical test for this
1859 class of @code{subreg} is:
1862 GET_MODE_SIZE (@var{m1}) > GET_MODE_SIZE (@var{m2})
1865 Paradoxical @code{subreg}s can be used as both lvalues and rvalues.
1866 When used as an lvalue, the low-order bits of the source value
1867 are stored in @var{reg} and the high-order bits are discarded.
1868 When used as an rvalue, the low-order bits of the @code{subreg} are
1869 taken from @var{reg} while the high-order bits may or may not be
1872 The high-order bits of rvalues are in the following circumstances:
1875 @item @code{subreg}s of @code{mem}
1876 When @var{m2} is smaller than a word, the macro @code{LOAD_EXTEND_OP},
1877 can control how the high-order bits are defined.
1879 @item @code{subreg} of @code{reg}s
1880 The upper bits are defined when @code{SUBREG_PROMOTED_VAR_P} is true.
1881 @code{SUBREG_PROMOTED_UNSIGNED_P} describes what the upper bits hold.
1882 Such subregs usually represent local variables, register variables
1883 and parameter pseudo variables that have been promoted to a wider mode.
1887 @var{bytenum} is always zero for a paradoxical @code{subreg}, even on
1890 For example, the paradoxical @code{subreg}:
1893 (set (subreg:SI (reg:HI @var{x}) 0) @var{y})
1896 stores the lower 2 bytes of @var{y} in @var{x} and discards the upper
1897 2 bytes. A subsequent:
1900 (set @var{z} (subreg:SI (reg:HI @var{x}) 0))
1903 would set the lower two bytes of @var{z} to @var{y} and set the upper
1904 two bytes to an unknown value assuming @code{SUBREG_PROMOTED_VAR_P} is
1907 @item Normal subregs
1908 When @var{m1} is at least as narrow as @var{m2} the @code{subreg}
1909 expression is called @dfn{normal}.
1911 Normal @code{subreg}s restrict consideration to certain bits of
1912 @var{reg}. There are two cases. If @var{m1} is smaller than a word,
1913 the @code{subreg} refers to the least-significant part (or
1914 @dfn{lowpart}) of one word of @var{reg}. If @var{m1} is word-sized or
1915 greater, the @code{subreg} refers to one or more complete words.
1917 When used as an lvalue, @code{subreg} is a word-based accessor.
1918 Storing to a @code{subreg} modifies all the words of @var{reg} that
1919 overlap the @code{subreg}, but it leaves the other words of @var{reg}
1922 When storing to a normal @code{subreg} that is smaller than a word,
1923 the other bits of the referenced word are usually left in an undefined
1924 state. This laxity makes it easier to generate efficient code for
1925 such instructions. To represent an instruction that preserves all the
1926 bits outside of those in the @code{subreg}, use @code{strict_low_part}
1927 or @code{zero_extract} around the @code{subreg}.
1929 @var{bytenum} must identify the offset of the first byte of the
1930 @code{subreg} from the start of @var{reg}, assuming that @var{reg} is
1931 laid out in memory order. The memory order of bytes is defined by
1932 two target macros, @code{WORDS_BIG_ENDIAN} and @code{BYTES_BIG_ENDIAN}:
1936 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1937 @code{WORDS_BIG_ENDIAN}, if set to 1, says that byte number zero is
1938 part of the most significant word; otherwise, it is part of the least
1942 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1943 @code{BYTES_BIG_ENDIAN}, if set to 1, says that byte number zero is
1944 the most significant byte within a word; otherwise, it is the least
1945 significant byte within a word.
1948 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1949 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1950 @code{WORDS_BIG_ENDIAN}. However, most parts of the compiler treat
1951 floating point values as if they had the same endianness as integer
1952 values. This works because they handle them solely as a collection of
1953 integer values, with no particular numerical value. Only real.c and
1954 the runtime libraries care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1959 (subreg:HI (reg:SI @var{x}) 2)
1962 on a @code{BYTES_BIG_ENDIAN}, @samp{UNITS_PER_WORD == 4} target is the same as
1965 (subreg:HI (reg:SI @var{x}) 0)
1968 on a little-endian, @samp{UNITS_PER_WORD == 4} target. Both
1969 @code{subreg}s access the lower two bytes of register @var{x}.
1973 A @code{MODE_PARTIAL_INT} mode behaves as if it were as wide as the
1974 corresponding @code{MODE_INT} mode, except that it has an unknown
1975 number of undefined bits. For example:
1978 (subreg:PSI (reg:SI 0) 0)
1981 accesses the whole of @samp{(reg:SI 0)}, but the exact relationship
1982 between the @code{PSImode} value and the @code{SImode} value is not
1983 defined. If we assume @samp{UNITS_PER_WORD <= 4}, then the following
1987 (subreg:PSI (reg:DI 0) 0)
1988 (subreg:PSI (reg:DI 0) 4)
1991 represent independent 4-byte accesses to the two halves of
1992 @samp{(reg:DI 0)}. Both @code{subreg}s have an unknown number
1995 If @samp{UNITS_PER_WORD <= 2} then these two @code{subreg}s:
1998 (subreg:HI (reg:PSI 0) 0)
1999 (subreg:HI (reg:PSI 0) 2)
2002 represent independent 2-byte accesses that together span the whole
2003 of @samp{(reg:PSI 0)}. Storing to the first @code{subreg} does not
2004 affect the value of the second, and vice versa. @samp{(reg:PSI 0)}
2005 has an unknown number of undefined bits, so the assignment:
2008 (set (subreg:HI (reg:PSI 0) 0) (reg:HI 4))
2011 does not guarantee that @samp{(subreg:HI (reg:PSI 0) 0)} has the
2012 value @samp{(reg:HI 4)}.
2014 @cindex @code{CANNOT_CHANGE_MODE_CLASS} and subreg semantics
2015 The rules above apply to both pseudo @var{reg}s and hard @var{reg}s.
2016 If the semantics are not correct for particular combinations of
2017 @var{m1}, @var{m2} and hard @var{reg}, the target-specific code
2018 must ensure that those combinations are never used. For example:
2021 CANNOT_CHANGE_MODE_CLASS (@var{m2}, @var{m1}, @var{class})
2024 must be true for every class @var{class} that includes @var{reg}.
2028 The first operand of a @code{subreg} expression is customarily accessed
2029 with the @code{SUBREG_REG} macro and the second operand is customarily
2030 accessed with the @code{SUBREG_BYTE} macro.
2032 It has been several years since a platform in which
2033 @code{BYTES_BIG_ENDIAN} not equal to @code{WORDS_BIG_ENDIAN} has
2034 been tested. Anyone wishing to support such a platform in the future
2035 may be confronted with code rot.
2038 @cindex scratch operands
2039 @item (scratch:@var{m})
2040 This represents a scratch register that will be required for the
2041 execution of a single instruction and not used subsequently. It is
2042 converted into a @code{reg} by either the local register allocator or
2045 @code{scratch} is usually present inside a @code{clobber} operation
2046 (@pxref{Side Effects}).
2049 @cindex condition code register
2051 This refers to the machine's condition code register. It has no
2052 operands and may not have a machine mode. There are two ways to use it:
2056 To stand for a complete set of condition code flags. This is best on
2057 most machines, where each comparison sets the entire series of flags.
2059 With this technique, @code{(cc0)} may be validly used in only two
2060 contexts: as the destination of an assignment (in test and compare
2061 instructions) and in comparison operators comparing against zero
2062 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
2065 To stand for a single flag that is the result of a single condition.
2066 This is useful on machines that have only a single flag bit, and in
2067 which comparison instructions must specify the condition to test.
2069 With this technique, @code{(cc0)} may be validly used in only two
2070 contexts: as the destination of an assignment (in test and compare
2071 instructions) where the source is a comparison operator, and as the
2072 first operand of @code{if_then_else} (in a conditional branch).
2076 There is only one expression object of code @code{cc0}; it is the
2077 value of the variable @code{cc0_rtx}. Any attempt to create an
2078 expression of code @code{cc0} will return @code{cc0_rtx}.
2080 Instructions can set the condition code implicitly. On many machines,
2081 nearly all instructions set the condition code based on the value that
2082 they compute or store. It is not necessary to record these actions
2083 explicitly in the RTL because the machine description includes a
2084 prescription for recognizing the instructions that do so (by means of
2085 the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
2086 instructions whose sole purpose is to set the condition code, and
2087 instructions that use the condition code, need mention @code{(cc0)}.
2089 On some machines, the condition code register is given a register number
2090 and a @code{reg} is used instead of @code{(cc0)}. This is usually the
2091 preferable approach if only a small subset of instructions modify the
2092 condition code. Other machines store condition codes in general
2093 registers; in such cases a pseudo register should be used.
2095 Some machines, such as the SPARC and RS/6000, have two sets of
2096 arithmetic instructions, one that sets and one that does not set the
2097 condition code. This is best handled by normally generating the
2098 instruction that does not set the condition code, and making a pattern
2099 that both performs the arithmetic and sets the condition code register
2100 (which would not be @code{(cc0)} in this case). For examples, search
2101 for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
2105 @cindex program counter
2106 This represents the machine's program counter. It has no operands and
2107 may not have a machine mode. @code{(pc)} may be validly used only in
2108 certain specific contexts in jump instructions.
2111 There is only one expression object of code @code{pc}; it is the value
2112 of the variable @code{pc_rtx}. Any attempt to create an expression of
2113 code @code{pc} will return @code{pc_rtx}.
2115 All instructions that do not jump alter the program counter implicitly
2116 by incrementing it, but there is no need to mention this in the RTL@.
2119 @item (mem:@var{m} @var{addr} @var{alias})
2120 This RTX represents a reference to main memory at an address
2121 represented by the expression @var{addr}. @var{m} specifies how large
2122 a unit of memory is accessed. @var{alias} specifies an alias set for the
2123 reference. In general two items are in different alias sets if they cannot
2124 reference the same memory address.
2126 The construct @code{(mem:BLK (scratch))} is considered to alias all
2127 other memories. Thus it may be used as a memory barrier in epilogue
2128 stack deallocation patterns.
2131 @item (concat@var{m} @var{rtx} @var{rtx})
2132 This RTX represents the concatenation of two other RTXs. This is used
2133 for complex values. It should only appear in the RTL attached to
2134 declarations and during RTL generation. It should not appear in the
2135 ordinary insn chain.
2138 @item (concatn@var{m} [@var{rtx} @dots{}])
2139 This RTX represents the concatenation of all the @var{rtx} to make a
2140 single value. Like @code{concat}, this should only appear in
2141 declarations, and not in the insn chain.
2145 @section RTL Expressions for Arithmetic
2146 @cindex arithmetic, in RTL
2147 @cindex math, in RTL
2148 @cindex RTL expressions for arithmetic
2150 Unless otherwise specified, all the operands of arithmetic expressions
2151 must be valid for mode @var{m}. An operand is valid for mode @var{m}
2152 if it has mode @var{m}, or if it is a @code{const_int} or
2153 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
2155 For commutative binary operations, constants should be placed in the
2163 @cindex RTL addition
2164 @cindex RTL addition with signed saturation
2165 @cindex RTL addition with unsigned saturation
2166 @item (plus:@var{m} @var{x} @var{y})
2167 @itemx (ss_plus:@var{m} @var{x} @var{y})
2168 @itemx (us_plus:@var{m} @var{x} @var{y})
2170 These three expressions all represent the sum of the values
2171 represented by @var{x} and @var{y} carried out in machine mode
2172 @var{m}. They differ in their behavior on overflow of integer modes.
2173 @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
2174 saturates at the maximum signed value representable in @var{m};
2175 @code{us_plus} saturates at the maximum unsigned value.
2177 @c ??? What happens on overflow of floating point modes?
2180 @item (lo_sum:@var{m} @var{x} @var{y})
2182 This expression represents the sum of @var{x} and the low-order bits
2183 of @var{y}. It is used with @code{high} (@pxref{Constants}) to
2184 represent the typical two-instruction sequence used in RISC machines
2185 to reference a global memory location.
2187 The number of low order bits is machine-dependent but is
2188 normally the number of bits in a @code{Pmode} item minus the number of
2189 bits set by @code{high}.
2191 @var{m} should be @code{Pmode}.
2196 @cindex RTL difference
2197 @cindex RTL subtraction
2198 @cindex RTL subtraction with signed saturation
2199 @cindex RTL subtraction with unsigned saturation
2200 @item (minus:@var{m} @var{x} @var{y})
2201 @itemx (ss_minus:@var{m} @var{x} @var{y})
2202 @itemx (us_minus:@var{m} @var{x} @var{y})
2204 These three expressions represent the result of subtracting @var{y}
2205 from @var{x}, carried out in mode @var{M}. Behavior on overflow is
2206 the same as for the three variants of @code{plus} (see above).
2209 @cindex RTL comparison
2210 @item (compare:@var{m} @var{x} @var{y})
2211 Represents the result of subtracting @var{y} from @var{x} for purposes
2212 of comparison. The result is computed without overflow, as if with
2215 Of course, machines can't really subtract with infinite precision.
2216 However, they can pretend to do so when only the sign of the result will
2217 be used, which is the case when the result is stored in the condition
2218 code. And that is the @emph{only} way this kind of expression may
2219 validly be used: as a value to be stored in the condition codes, either
2220 @code{(cc0)} or a register. @xref{Comparisons}.
2222 The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
2223 instead is the mode of the condition code value. If @code{(cc0)} is
2224 used, it is @code{VOIDmode}. Otherwise it is some mode in class
2225 @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
2226 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
2227 information (in an unspecified format) so that any comparison operator
2228 can be applied to the result of the @code{COMPARE} operation. For other
2229 modes in class @code{MODE_CC}, the operation only returns a subset of
2232 Normally, @var{x} and @var{y} must have the same mode. Otherwise,
2233 @code{compare} is valid only if the mode of @var{x} is in class
2234 @code{MODE_INT} and @var{y} is a @code{const_int} or
2235 @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
2236 determines what mode the comparison is to be done in; thus it must not
2239 If one of the operands is a constant, it should be placed in the
2240 second operand and the comparison code adjusted as appropriate.
2242 A @code{compare} specifying two @code{VOIDmode} constants is not valid
2243 since there is no way to know in what mode the comparison is to be
2244 performed; the comparison must either be folded during the compilation
2245 or the first operand must be loaded into a register while its mode is
2252 @cindex negation with signed saturation
2253 @cindex negation with unsigned saturation
2254 @item (neg:@var{m} @var{x})
2255 @itemx (ss_neg:@var{m} @var{x})
2256 @itemx (us_neg:@var{m} @var{x})
2257 These two expressions represent the negation (subtraction from zero) of
2258 the value represented by @var{x}, carried out in mode @var{m}. They
2259 differ in the behavior on overflow of integer modes. In the case of
2260 @code{neg}, the negation of the operand may be a number not representable
2261 in mode @var{m}, in which case it is truncated to @var{m}. @code{ss_neg}
2262 and @code{us_neg} ensure that an out-of-bounds result saturates to the
2263 maximum or minimum signed or unsigned value.
2268 @cindex multiplication
2270 @cindex multiplication with signed saturation
2271 @cindex multiplication with unsigned saturation
2272 @item (mult:@var{m} @var{x} @var{y})
2273 @itemx (ss_mult:@var{m} @var{x} @var{y})
2274 @itemx (us_mult:@var{m} @var{x} @var{y})
2275 Represents the signed product of the values represented by @var{x} and
2276 @var{y} carried out in machine mode @var{m}.
2277 @code{ss_mult} and @code{us_mult} ensure that an out-of-bounds result
2278 saturates to the maximum or minimum signed or unsigned value.
2280 Some machines support a multiplication that generates a product wider
2281 than the operands. Write the pattern for this as
2284 (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
2287 where @var{m} is wider than the modes of @var{x} and @var{y}, which need
2290 For unsigned widening multiplication, use the same idiom, but with
2291 @code{zero_extend} instead of @code{sign_extend}.
2294 @item (fma:@var{m} @var{x} @var{y} @var{z})
2295 Represents the @code{fma}, @code{fmaf}, and @code{fmal} builtin
2296 functions that do a combined multiply of @var{x} and @var{y} and then
2297 adding to@var{z} without doing an intermediate rounding step.
2302 @cindex signed division
2303 @cindex signed division with signed saturation
2305 @item (div:@var{m} @var{x} @var{y})
2306 @itemx (ss_div:@var{m} @var{x} @var{y})
2307 Represents the quotient in signed division of @var{x} by @var{y},
2308 carried out in machine mode @var{m}. If @var{m} is a floating point
2309 mode, it represents the exact quotient; otherwise, the integerized
2311 @code{ss_div} ensures that an out-of-bounds result saturates to the maximum
2312 or minimum signed value.
2314 Some machines have division instructions in which the operands and
2315 quotient widths are not all the same; you should represent
2316 such instructions using @code{truncate} and @code{sign_extend} as in,
2319 (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
2323 @cindex unsigned division
2324 @cindex unsigned division with unsigned saturation
2326 @item (udiv:@var{m} @var{x} @var{y})
2327 @itemx (us_div:@var{m} @var{x} @var{y})
2328 Like @code{div} but represents unsigned division.
2329 @code{us_div} ensures that an out-of-bounds result saturates to the maximum
2330 or minimum unsigned value.
2336 @item (mod:@var{m} @var{x} @var{y})
2337 @itemx (umod:@var{m} @var{x} @var{y})
2338 Like @code{div} and @code{udiv} but represent the remainder instead of
2343 @cindex signed minimum
2344 @cindex signed maximum
2345 @item (smin:@var{m} @var{x} @var{y})
2346 @itemx (smax:@var{m} @var{x} @var{y})
2347 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
2348 @var{x} and @var{y}, interpreted as signed values in mode @var{m}.
2349 When used with floating point, if both operands are zeros, or if either
2350 operand is @code{NaN}, then it is unspecified which of the two operands
2351 is returned as the result.
2355 @cindex unsigned minimum and maximum
2356 @item (umin:@var{m} @var{x} @var{y})
2357 @itemx (umax:@var{m} @var{x} @var{y})
2358 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
2362 @cindex complement, bitwise
2363 @cindex bitwise complement
2364 @item (not:@var{m} @var{x})
2365 Represents the bitwise complement of the value represented by @var{x},
2366 carried out in mode @var{m}, which must be a fixed-point machine mode.
2369 @cindex logical-and, bitwise
2370 @cindex bitwise logical-and
2371 @item (and:@var{m} @var{x} @var{y})
2372 Represents the bitwise logical-and of the values represented by
2373 @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
2374 a fixed-point machine mode.
2377 @cindex inclusive-or, bitwise
2378 @cindex bitwise inclusive-or
2379 @item (ior:@var{m} @var{x} @var{y})
2380 Represents the bitwise inclusive-or of the values represented by @var{x}
2381 and @var{y}, carried out in machine mode @var{m}, which must be a
2385 @cindex exclusive-or, bitwise
2386 @cindex bitwise exclusive-or
2387 @item (xor:@var{m} @var{x} @var{y})
2388 Represents the bitwise exclusive-or of the values represented by @var{x}
2389 and @var{y}, carried out in machine mode @var{m}, which must be a
2397 @cindex arithmetic shift
2398 @cindex arithmetic shift with signed saturation
2399 @cindex arithmetic shift with unsigned saturation
2400 @item (ashift:@var{m} @var{x} @var{c})
2401 @itemx (ss_ashift:@var{m} @var{x} @var{c})
2402 @itemx (us_ashift:@var{m} @var{x} @var{c})
2403 These three expressions represent the result of arithmetically shifting @var{x}
2404 left by @var{c} places. They differ in their behavior on overflow of integer
2405 modes. An @code{ashift} operation is a plain shift with no special behavior
2406 in case of a change in the sign bit; @code{ss_ashift} and @code{us_ashift}
2407 saturates to the minimum or maximum representable value if any of the bits
2408 shifted out differs from the final sign bit.
2410 @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
2411 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
2412 mode is determined by the mode called for in the machine description
2413 entry for the left-shift instruction. For example, on the VAX, the mode
2414 of @var{c} is @code{QImode} regardless of @var{m}.
2419 @item (lshiftrt:@var{m} @var{x} @var{c})
2420 @itemx (ashiftrt:@var{m} @var{x} @var{c})
2421 Like @code{ashift} but for right shift. Unlike the case for left shift,
2422 these two operations are distinct.
2428 @cindex right rotate
2429 @item (rotate:@var{m} @var{x} @var{c})
2430 @itemx (rotatert:@var{m} @var{x} @var{c})
2431 Similar but represent left and right rotate. If @var{c} is a constant,
2436 @cindex absolute value
2437 @item (abs:@var{m} @var{x})
2438 @item (ss_abs:@var{m} @var{x})
2439 Represents the absolute value of @var{x}, computed in mode @var{m}.
2440 @code{ss_abs} ensures that an out-of-bounds result saturates to the
2441 maximum signed value.
2446 @item (sqrt:@var{m} @var{x})
2447 Represents the square root of @var{x}, computed in mode @var{m}.
2448 Most often @var{m} will be a floating point mode.
2451 @item (ffs:@var{m} @var{x})
2452 Represents one plus the index of the least significant 1-bit in
2453 @var{x}, represented as an integer of mode @var{m}. (The value is
2454 zero if @var{x} is zero.) The mode of @var{x} must be @var{m}
2458 @item (clrsb:@var{m} @var{x})
2459 Represents the number of redundant leading sign bits in @var{x},
2460 represented as an integer of mode @var{m}, starting at the most
2461 significant bit position. This is one less than the number of leading
2462 sign bits (either 0 or 1), with no special cases. The mode of @var{x}
2463 must be @var{m} or @code{VOIDmode}.
2466 @item (clz:@var{m} @var{x})
2467 Represents the number of leading 0-bits in @var{x}, represented as an
2468 integer of mode @var{m}, starting at the most significant bit position.
2469 If @var{x} is zero, the value is determined by
2470 @code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Note that this is one of
2471 the few expressions that is not invariant under widening. The mode of
2472 @var{x} must be @var{m} or @code{VOIDmode}.
2475 @item (ctz:@var{m} @var{x})
2476 Represents the number of trailing 0-bits in @var{x}, represented as an
2477 integer of mode @var{m}, starting at the least significant bit position.
2478 If @var{x} is zero, the value is determined by
2479 @code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Except for this case,
2480 @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of
2481 @var{x} must be @var{m} or @code{VOIDmode}.
2484 @item (popcount:@var{m} @var{x})
2485 Represents the number of 1-bits in @var{x}, represented as an integer of
2486 mode @var{m}. The mode of @var{x} must be @var{m} or @code{VOIDmode}.
2489 @item (parity:@var{m} @var{x})
2490 Represents the number of 1-bits modulo 2 in @var{x}, represented as an
2491 integer of mode @var{m}. The mode of @var{x} must be @var{m} or
2495 @item (bswap:@var{m} @var{x})
2496 Represents the value @var{x} with the order of bytes reversed, carried out
2497 in mode @var{m}, which must be a fixed-point machine mode.
2498 The mode of @var{x} must be @var{m} or @code{VOIDmode}.
2502 @section Comparison Operations
2503 @cindex RTL comparison operations
2505 Comparison operators test a relation on two operands and are considered
2506 to represent a machine-dependent nonzero value described by, but not
2507 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
2508 if the relation holds, or zero if it does not, for comparison operators
2509 whose results have a `MODE_INT' mode,
2510 @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
2511 zero if it does not, for comparison operators that return floating-point
2512 values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
2513 if the relation holds, or of zeros if it does not, for comparison operators
2514 that return vector results.
2515 The mode of the comparison operation is independent of the mode
2516 of the data being compared. If the comparison operation is being tested
2517 (e.g., the first operand of an @code{if_then_else}), the mode must be
2520 @cindex condition codes
2521 There are two ways that comparison operations may be used. The
2522 comparison operators may be used to compare the condition codes
2523 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
2524 a construct actually refers to the result of the preceding instruction
2525 in which the condition codes were set. The instruction setting the
2526 condition code must be adjacent to the instruction using the condition
2527 code; only @code{note} insns may separate them.
2529 Alternatively, a comparison operation may directly compare two data
2530 objects. The mode of the comparison is determined by the operands; they
2531 must both be valid for a common machine mode. A comparison with both
2532 operands constant would be invalid as the machine mode could not be
2533 deduced from it, but such a comparison should never exist in RTL due to
2536 In the example above, if @code{(cc0)} were last set to
2537 @code{(compare @var{x} @var{y})}, the comparison operation is
2538 identical to @code{(eq @var{x} @var{y})}. Usually only one style
2539 of comparisons is supported on a particular machine, but the combine
2540 pass will try to merge the operations to produce the @code{eq} shown
2541 in case it exists in the context of the particular insn involved.
2543 Inequality comparisons come in two flavors, signed and unsigned. Thus,
2544 there are distinct expression codes @code{gt} and @code{gtu} for signed and
2545 unsigned greater-than. These can produce different results for the same
2546 pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
2547 unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
2548 @code{0xffffffff} which is greater than 1.
2550 The signed comparisons are also used for floating point values. Floating
2551 point comparisons are distinguished by the machine modes of the operands.
2556 @item (eq:@var{m} @var{x} @var{y})
2557 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2558 are equal, otherwise 0.
2562 @item (ne:@var{m} @var{x} @var{y})
2563 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2564 are not equal, otherwise 0.
2567 @cindex greater than
2568 @item (gt:@var{m} @var{x} @var{y})
2569 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
2570 are fixed-point, the comparison is done in a signed sense.
2573 @cindex greater than
2574 @cindex unsigned greater than
2575 @item (gtu:@var{m} @var{x} @var{y})
2576 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
2581 @cindex unsigned less than
2582 @item (lt:@var{m} @var{x} @var{y})
2583 @itemx (ltu:@var{m} @var{x} @var{y})
2584 Like @code{gt} and @code{gtu} but test for ``less than''.
2587 @cindex greater than
2589 @cindex unsigned greater than
2590 @item (ge:@var{m} @var{x} @var{y})
2591 @itemx (geu:@var{m} @var{x} @var{y})
2592 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
2595 @cindex less than or equal
2597 @cindex unsigned less than
2598 @item (le:@var{m} @var{x} @var{y})
2599 @itemx (leu:@var{m} @var{x} @var{y})
2600 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
2602 @findex if_then_else
2603 @item (if_then_else @var{cond} @var{then} @var{else})
2604 This is not a comparison operation but is listed here because it is
2605 always used in conjunction with a comparison operation. To be
2606 precise, @var{cond} is a comparison expression. This expression
2607 represents a choice, according to @var{cond}, between the value
2608 represented by @var{then} and the one represented by @var{else}.
2610 On most machines, @code{if_then_else} expressions are valid only
2611 to express conditional jumps.
2614 @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
2615 Similar to @code{if_then_else}, but more general. Each of @var{test1},
2616 @var{test2}, @dots{} is performed in turn. The result of this expression is
2617 the @var{value} corresponding to the first nonzero test, or @var{default} if
2618 none of the tests are nonzero expressions.
2620 This is currently not valid for instruction patterns and is supported only
2621 for insn attributes. @xref{Insn Attributes}.
2628 Special expression codes exist to represent bit-field instructions.
2631 @findex sign_extract
2632 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
2633 @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
2634 This represents a reference to a sign-extended bit-field contained or
2635 starting in @var{loc} (a memory or register reference). The bit-field
2636 is @var{size} bits wide and starts at bit @var{pos}. The compilation
2637 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
2638 @var{pos} counts from.
2640 If @var{loc} is in memory, its mode must be a single-byte integer mode.
2641 If @var{loc} is in a register, the mode to use is specified by the
2642 operand of the @code{insv} or @code{extv} pattern
2643 (@pxref{Standard Names}) and is usually a full-word integer mode,
2644 which is the default if none is specified.
2646 The mode of @var{pos} is machine-specific and is also specified
2647 in the @code{insv} or @code{extv} pattern.
2649 The mode @var{m} is the same as the mode that would be used for
2650 @var{loc} if it were a register.
2652 A @code{sign_extract} can not appear as an lvalue, or part thereof,
2655 @findex zero_extract
2656 @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
2657 Like @code{sign_extract} but refers to an unsigned or zero-extended
2658 bit-field. The same sequence of bits are extracted, but they
2659 are filled to an entire word with zeros instead of by sign-extension.
2661 Unlike @code{sign_extract}, this type of expressions can be lvalues
2662 in RTL; they may appear on the left side of an assignment, indicating
2663 insertion of a value into the specified bit-field.
2666 @node Vector Operations
2667 @section Vector Operations
2668 @cindex vector operations
2670 All normal RTL expressions can be used with vector modes; they are
2671 interpreted as operating on each part of the vector independently.
2672 Additionally, there are a few new expressions to describe specific vector
2677 @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
2678 This describes a merge operation between two vectors. The result is a vector
2679 of mode @var{m}; its elements are selected from either @var{vec1} or
2680 @var{vec2}. Which elements are selected is described by @var{items}, which
2681 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2682 corresponding element in the result vector is taken from @var{vec2} while
2683 a set bit indicates it is taken from @var{vec1}.
2686 @item (vec_select:@var{m} @var{vec1} @var{selection})
2687 This describes an operation that selects parts of a vector. @var{vec1} is
2688 the source vector, and @var{selection} is a @code{parallel} that contains a
2689 @code{const_int} for each of the subparts of the result vector, giving the
2690 number of the source subpart that should be stored into it.
2691 The result mode @var{m} is either the submode for a single element of
2692 @var{vec1} (if only one subpart is selected), or another vector mode
2693 with that element submode (if multiple subparts are selected).
2696 @item (vec_concat:@var{m} @var{x1} @var{x2})
2697 Describes a vector concat operation. The result is a concatenation of the
2698 vectors or scalars @var{x1} and @var{x2}; its length is the sum of the
2699 lengths of the two inputs.
2701 @findex vec_duplicate
2702 @item (vec_duplicate:@var{m} @var{x})
2703 This operation converts a scalar into a vector or a small vector into a
2704 larger one by duplicating the input values. The output vector mode must have
2705 the same submodes as the input vector mode or the scalar modes, and the
2706 number of output parts must be an integer multiple of the number of input
2712 @section Conversions
2714 @cindex machine mode conversions
2716 All conversions between machine modes must be represented by
2717 explicit conversion operations. For example, an expression
2718 which is the sum of a byte and a full word cannot be written as
2719 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2720 operation requires two operands of the same machine mode.
2721 Therefore, the byte-sized operand is enclosed in a conversion
2725 (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
2728 The conversion operation is not a mere placeholder, because there
2729 may be more than one way of converting from a given starting mode
2730 to the desired final mode. The conversion operation code says how
2733 For all conversion operations, @var{x} must not be @code{VOIDmode}
2734 because the mode in which to do the conversion would not be known.
2735 The conversion must either be done at compile-time or @var{x}
2736 must be placed into a register.
2740 @item (sign_extend:@var{m} @var{x})
2741 Represents the result of sign-extending the value @var{x}
2742 to machine mode @var{m}. @var{m} must be a fixed-point mode
2743 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2746 @item (zero_extend:@var{m} @var{x})
2747 Represents the result of zero-extending the value @var{x}
2748 to machine mode @var{m}. @var{m} must be a fixed-point mode
2749 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2751 @findex float_extend
2752 @item (float_extend:@var{m} @var{x})
2753 Represents the result of extending the value @var{x}
2754 to machine mode @var{m}. @var{m} must be a floating point mode
2755 and @var{x} a floating point value of a mode narrower than @var{m}.
2758 @item (truncate:@var{m} @var{x})
2759 Represents the result of truncating the value @var{x}
2760 to machine mode @var{m}. @var{m} must be a fixed-point mode
2761 and @var{x} a fixed-point value of a mode wider than @var{m}.
2764 @item (ss_truncate:@var{m} @var{x})
2765 Represents the result of truncating the value @var{x}
2766 to machine mode @var{m}, using signed saturation in the case of
2767 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2771 @item (us_truncate:@var{m} @var{x})
2772 Represents the result of truncating the value @var{x}
2773 to machine mode @var{m}, using unsigned saturation in the case of
2774 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2777 @findex float_truncate
2778 @item (float_truncate:@var{m} @var{x})
2779 Represents the result of truncating the value @var{x}
2780 to machine mode @var{m}. @var{m} must be a floating point mode
2781 and @var{x} a floating point value of a mode wider than @var{m}.
2784 @item (float:@var{m} @var{x})
2785 Represents the result of converting fixed point value @var{x},
2786 regarded as signed, to floating point mode @var{m}.
2788 @findex unsigned_float
2789 @item (unsigned_float:@var{m} @var{x})
2790 Represents the result of converting fixed point value @var{x},
2791 regarded as unsigned, to floating point mode @var{m}.
2794 @item (fix:@var{m} @var{x})
2795 When @var{m} is a floating-point mode, represents the result of
2796 converting floating point value @var{x} (valid for mode @var{m}) to an
2797 integer, still represented in floating point mode @var{m}, by rounding
2800 When @var{m} is a fixed-point mode, represents the result of
2801 converting floating point value @var{x} to mode @var{m}, regarded as
2802 signed. How rounding is done is not specified, so this operation may
2803 be used validly in compiling C code only for integer-valued operands.
2805 @findex unsigned_fix
2806 @item (unsigned_fix:@var{m} @var{x})
2807 Represents the result of converting floating point value @var{x} to
2808 fixed point mode @var{m}, regarded as unsigned. How rounding is done
2811 @findex fract_convert
2812 @item (fract_convert:@var{m} @var{x})
2813 Represents the result of converting fixed-point value @var{x} to
2814 fixed-point mode @var{m}, signed integer value @var{x} to
2815 fixed-point mode @var{m}, floating-point value @var{x} to
2816 fixed-point mode @var{m}, fixed-point value @var{x} to integer mode @var{m}
2817 regarded as signed, or fixed-point value @var{x} to floating-point mode @var{m}.
2818 When overflows or underflows happen, the results are undefined.
2821 @item (sat_fract:@var{m} @var{x})
2822 Represents the result of converting fixed-point value @var{x} to
2823 fixed-point mode @var{m}, signed integer value @var{x} to
2824 fixed-point mode @var{m}, or floating-point value @var{x} to
2825 fixed-point mode @var{m}.
2826 When overflows or underflows happen, the results are saturated to the
2827 maximum or the minimum.
2829 @findex unsigned_fract_convert
2830 @item (unsigned_fract_convert:@var{m} @var{x})
2831 Represents the result of converting fixed-point value @var{x} to
2832 integer mode @var{m} regarded as unsigned, or unsigned integer value @var{x} to
2833 fixed-point mode @var{m}.
2834 When overflows or underflows happen, the results are undefined.
2836 @findex unsigned_sat_fract
2837 @item (unsigned_sat_fract:@var{m} @var{x})
2838 Represents the result of converting unsigned integer value @var{x} to
2839 fixed-point mode @var{m}.
2840 When overflows or underflows happen, the results are saturated to the
2841 maximum or the minimum.
2844 @node RTL Declarations
2845 @section Declarations
2846 @cindex RTL declarations
2847 @cindex declarations, RTL
2849 Declaration expression codes do not represent arithmetic operations
2850 but rather state assertions about their operands.
2853 @findex strict_low_part
2854 @cindex @code{subreg}, in @code{strict_low_part}
2855 @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
2856 This expression code is used in only one context: as the destination operand of a
2857 @code{set} expression. In addition, the operand of this expression
2858 must be a non-paradoxical @code{subreg} expression.
2860 The presence of @code{strict_low_part} says that the part of the
2861 register which is meaningful in mode @var{n}, but is not part of
2862 mode @var{m}, is not to be altered. Normally, an assignment to such
2863 a subreg is allowed to have undefined effects on the rest of the
2864 register when @var{m} is less than a word.
2868 @section Side Effect Expressions
2869 @cindex RTL side effect expressions
2871 The expression codes described so far represent values, not actions.
2872 But machine instructions never produce values; they are meaningful
2873 only for their side effects on the state of the machine. Special
2874 expression codes are used to represent side effects.
2876 The body of an instruction is always one of these side effect codes;
2877 the codes described above, which represent values, appear only as
2878 the operands of these.
2882 @item (set @var{lval} @var{x})
2883 Represents the action of storing the value of @var{x} into the place
2884 represented by @var{lval}. @var{lval} must be an expression
2885 representing a place that can be stored in: @code{reg} (or @code{subreg},
2886 @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
2887 @code{parallel}, or @code{cc0}.
2889 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2890 machine mode; then @var{x} must be valid for that mode.
2892 If @var{lval} is a @code{reg} whose machine mode is less than the full
2893 width of the register, then it means that the part of the register
2894 specified by the machine mode is given the specified value and the
2895 rest of the register receives an undefined value. Likewise, if
2896 @var{lval} is a @code{subreg} whose machine mode is narrower than
2897 the mode of the register, the rest of the register can be changed in
2900 If @var{lval} is a @code{strict_low_part} of a subreg, then the part
2901 of the register specified by the machine mode of the @code{subreg} is
2902 given the value @var{x} and the rest of the register is not changed.
2904 If @var{lval} is a @code{zero_extract}, then the referenced part of
2905 the bit-field (a memory or register reference) specified by the
2906 @code{zero_extract} is given the value @var{x} and the rest of the
2907 bit-field is not changed. Note that @code{sign_extract} can not
2908 appear in @var{lval}.
2910 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2911 be either a @code{compare} expression or a value that may have any mode.
2912 The latter case represents a ``test'' instruction. The expression
2913 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2914 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2915 Use the former expression to save space during the compilation.
2917 If @var{lval} is a @code{parallel}, it is used to represent the case of
2918 a function returning a structure in multiple registers. Each element
2919 of the @code{parallel} is an @code{expr_list} whose first operand is a
2920 @code{reg} and whose second operand is a @code{const_int} representing the
2921 offset (in bytes) into the structure at which the data in that register
2922 corresponds. The first element may be null to indicate that the structure
2923 is also passed partly in memory.
2925 @cindex jump instructions and @code{set}
2926 @cindex @code{if_then_else} usage
2927 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2928 possibilities for @var{x} are very limited. It may be a
2929 @code{label_ref} expression (unconditional jump). It may be an
2930 @code{if_then_else} (conditional jump), in which case either the
2931 second or the third operand must be @code{(pc)} (for the case which
2932 does not jump) and the other of the two must be a @code{label_ref}
2933 (for the case which does jump). @var{x} may also be a @code{mem} or
2934 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2935 @code{mem}; these unusual patterns are used to represent jumps through
2938 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2939 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2940 valid for the mode of @var{lval}.
2944 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2945 @var{x} with the @code{SET_SRC} macro.
2949 As the sole expression in a pattern, represents a return from the
2950 current function, on machines where this can be done with one
2951 instruction, such as VAXen. On machines where a multi-instruction
2952 ``epilogue'' must be executed in order to return from the function,
2953 returning is done by jumping to a label which precedes the epilogue, and
2954 the @code{return} expression code is never used.
2956 Inside an @code{if_then_else} expression, represents the value to be
2957 placed in @code{pc} to return to the caller.
2959 Note that an insn pattern of @code{(return)} is logically equivalent to
2960 @code{(set (pc) (return))}, but the latter form is never used.
2962 @findex simple_return
2963 @item (simple_return)
2964 Like @code{(return)}, but truly represents only a function return, while
2965 @code{(return)} may represent an insn that also performs other functions
2966 of the function epilogue. Like @code{(return)}, this may also occur in
2970 @item (call @var{function} @var{nargs})
2971 Represents a function call. @var{function} is a @code{mem} expression
2972 whose address is the address of the function to be called.
2973 @var{nargs} is an expression which can be used for two purposes: on
2974 some machines it represents the number of bytes of stack argument; on
2975 others, it represents the number of argument registers.
2977 Each machine has a standard machine mode which @var{function} must
2978 have. The machine description defines macro @code{FUNCTION_MODE} to
2979 expand into the requisite mode name. The purpose of this mode is to
2980 specify what kind of addressing is allowed, on machines where the
2981 allowed kinds of addressing depend on the machine mode being
2985 @item (clobber @var{x})
2986 Represents the storing or possible storing of an unpredictable,
2987 undescribed value into @var{x}, which must be a @code{reg},
2988 @code{scratch}, @code{parallel} or @code{mem} expression.
2990 One place this is used is in string instructions that store standard
2991 values into particular hard registers. It may not be worth the
2992 trouble to describe the values that are stored, but it is essential to
2993 inform the compiler that the registers will be altered, lest it
2994 attempt to keep data in them across the string instruction.
2996 If @var{x} is @code{(mem:BLK (const_int 0))} or
2997 @code{(mem:BLK (scratch))}, it means that all memory
2998 locations must be presumed clobbered. If @var{x} is a @code{parallel},
2999 it has the same meaning as a @code{parallel} in a @code{set} expression.
3001 Note that the machine description classifies certain hard registers as
3002 ``call-clobbered''. All function call instructions are assumed by
3003 default to clobber these registers, so there is no need to use
3004 @code{clobber} expressions to indicate this fact. Also, each function
3005 call is assumed to have the potential to alter any memory location,
3006 unless the function is declared @code{const}.
3008 If the last group of expressions in a @code{parallel} are each a
3009 @code{clobber} expression whose arguments are @code{reg} or
3010 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
3011 phase can add the appropriate @code{clobber} expressions to an insn it
3012 has constructed when doing so will cause a pattern to be matched.
3014 This feature can be used, for example, on a machine that whose multiply
3015 and add instructions don't use an MQ register but which has an
3016 add-accumulate instruction that does clobber the MQ register. Similarly,
3017 a combined instruction might require a temporary register while the
3018 constituent instructions might not.
3020 When a @code{clobber} expression for a register appears inside a
3021 @code{parallel} with other side effects, the register allocator
3022 guarantees that the register is unoccupied both before and after that
3023 insn if it is a hard register clobber. For pseudo-register clobber,
3024 the register allocator and the reload pass do not assign the same hard
3025 register to the clobber and the input operands if there is an insn
3026 alternative containing the @samp{&} constraint (@pxref{Modifiers}) for
3027 the clobber and the hard register is in register classes of the
3028 clobber in the alternative. You can clobber either a specific hard
3029 register, a pseudo register, or a @code{scratch} expression; in the
3030 latter two cases, GCC will allocate a hard register that is available
3031 there for use as a temporary.
3033 For instructions that require a temporary register, you should use
3034 @code{scratch} instead of a pseudo-register because this will allow the
3035 combiner phase to add the @code{clobber} when required. You do this by
3036 coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
3037 clobber a pseudo register, use one which appears nowhere else---generate
3038 a new one each time. Otherwise, you may confuse CSE@.
3040 There is one other known use for clobbering a pseudo register in a
3041 @code{parallel}: when one of the input operands of the insn is also
3042 clobbered by the insn. In this case, using the same pseudo register in
3043 the clobber and elsewhere in the insn produces the expected results.
3047 Represents the use of the value of @var{x}. It indicates that the
3048 value in @var{x} at this point in the program is needed, even though
3049 it may not be apparent why this is so. Therefore, the compiler will
3050 not attempt to delete previous instructions whose only effect is to
3051 store a value in @var{x}. @var{x} must be a @code{reg} expression.
3053 In some situations, it may be tempting to add a @code{use} of a
3054 register in a @code{parallel} to describe a situation where the value
3055 of a special register will modify the behavior of the instruction.
3056 A hypothetical example might be a pattern for an addition that can
3057 either wrap around or use saturating addition depending on the value
3058 of a special control register:
3061 (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
3068 This will not work, several of the optimizers only look at expressions
3069 locally; it is very likely that if you have multiple insns with
3070 identical inputs to the @code{unspec}, they will be optimized away even
3071 if register 1 changes in between.
3073 This means that @code{use} can @emph{only} be used to describe
3074 that the register is live. You should think twice before adding
3075 @code{use} statements, more often you will want to use @code{unspec}
3076 instead. The @code{use} RTX is most commonly useful to describe that
3077 a fixed register is implicitly used in an insn. It is also safe to use
3078 in patterns where the compiler knows for other reasons that the result
3079 of the whole pattern is variable, such as @samp{movmem@var{m}} or
3080 @samp{call} patterns.
3082 During the reload phase, an insn that has a @code{use} as pattern
3083 can carry a reg_equal note. These @code{use} insns will be deleted
3084 before the reload phase exits.
3086 During the delayed branch scheduling phase, @var{x} may be an insn.
3087 This indicates that @var{x} previously was located at this place in the
3088 code and its data dependencies need to be taken into account. These
3089 @code{use} insns will be deleted before the delayed branch scheduling
3093 @item (parallel [@var{x0} @var{x1} @dots{}])
3094 Represents several side effects performed in parallel. The square
3095 brackets stand for a vector; the operand of @code{parallel} is a
3096 vector of expressions. @var{x0}, @var{x1} and so on are individual
3097 side effect expressions---expressions of code @code{set}, @code{call},
3098 @code{return}, @code{simple_return}, @code{clobber} or @code{use}.
3100 ``In parallel'' means that first all the values used in the individual
3101 side-effects are computed, and second all the actual side-effects are
3102 performed. For example,
3105 (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
3106 (set (mem:SI (reg:SI 1)) (reg:SI 1))])
3110 says unambiguously that the values of hard register 1 and the memory
3111 location addressed by it are interchanged. In both places where
3112 @code{(reg:SI 1)} appears as a memory address it refers to the value
3113 in register 1 @emph{before} the execution of the insn.
3115 It follows that it is @emph{incorrect} to use @code{parallel} and
3116 expect the result of one @code{set} to be available for the next one.
3117 For example, people sometimes attempt to represent a jump-if-zero
3118 instruction this way:
3121 (parallel [(set (cc0) (reg:SI 34))
3122 (set (pc) (if_then_else
3123 (eq (cc0) (const_int 0))
3129 But this is incorrect, because it says that the jump condition depends
3130 on the condition code value @emph{before} this instruction, not on the
3131 new value that is set by this instruction.
3133 @cindex peephole optimization, RTL representation
3134 Peephole optimization, which takes place together with final assembly
3135 code output, can produce insns whose patterns consist of a @code{parallel}
3136 whose elements are the operands needed to output the resulting
3137 assembler code---often @code{reg}, @code{mem} or constant expressions.
3138 This would not be well-formed RTL at any other stage in compilation,
3139 but it is OK then because no further optimization remains to be done.
3140 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
3141 any, must deal with such insns if you define any peephole optimizations.
3144 @item (cond_exec [@var{cond} @var{expr}])
3145 Represents a conditionally executed expression. The @var{expr} is
3146 executed only if the @var{cond} is nonzero. The @var{cond} expression
3147 must not have side-effects, but the @var{expr} may very well have
3151 @item (sequence [@var{insns} @dots{}])
3152 Represents a sequence of insns. If a @code{sequence} appears in the
3153 chain of insns, then each of the @var{insns} that appears in the sequence
3154 must be suitable for appearing in the chain of insns, i.e. must satisfy
3155 the @code{INSN_P} predicate.
3157 After delay-slot scheduling is completed, an insn and all the insns that
3158 reside in its delay slots are grouped together into a @code{sequence}.
3159 The insn requiring the delay slot is the first insn in the vector;
3160 subsequent insns are to be placed in the delay slot.
3162 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
3163 indicate that a branch insn should be used that will conditionally annul
3164 the effect of the insns in the delay slots. In such a case,
3165 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
3166 the branch and should be executed only if the branch is taken; otherwise
3167 the insn should be executed only if the branch is not taken.
3170 Some back ends also use @code{sequence} objects for purposes other than
3171 delay-slot groups. This is not supported in the common parts of the
3172 compiler, which treat such sequences as delay-slot groups.
3174 DWARF2 Call Frame Address (CFA) adjustments are sometimes also expressed
3175 using @code{sequence} objects as the value of a @code{RTX_FRAME_RELATED_P}
3176 note. This only happens if the CFA adjustments cannot be easily derived
3177 from the pattern of the instruction to which the note is attached. In
3178 such cases, the value of the note is used instead of best-guesing the
3179 semantics of the instruction. The back end can attach notes containing
3180 a @code{sequence} of @code{set} patterns that express the effect of the
3184 These expression codes appear in place of a side effect, as the body of
3185 an insn, though strictly speaking they do not always describe side
3190 @item (asm_input @var{s})
3191 Represents literal assembler code as described by the string @var{s}.
3194 @findex unspec_volatile
3195 @item (unspec [@var{operands} @dots{}] @var{index})
3196 @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
3197 Represents a machine-specific operation on @var{operands}. @var{index}
3198 selects between multiple machine-specific operations.
3199 @code{unspec_volatile} is used for volatile operations and operations
3200 that may trap; @code{unspec} is used for other operations.
3202 These codes may appear inside a @code{pattern} of an
3203 insn, inside a @code{parallel}, or inside an expression.
3206 @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
3207 Represents a table of jump addresses. The vector elements @var{lr0},
3208 etc., are @code{label_ref} expressions. The mode @var{m} specifies
3209 how much space is given to each address; normally @var{m} would be
3212 @findex addr_diff_vec
3213 @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
3214 Represents a table of jump addresses expressed as offsets from
3215 @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
3216 expressions and so is @var{base}. The mode @var{m} specifies how much
3217 space is given to each address-difference. @var{min} and @var{max}
3218 are set up by branch shortening and hold a label with a minimum and a
3219 maximum address, respectively. @var{flags} indicates the relative
3220 position of @var{base}, @var{min} and @var{max} to the containing insn
3221 and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
3224 @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
3225 Represents prefetch of memory at address @var{addr}.
3226 Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
3227 targets that do not support write prefetches should treat this as a normal
3229 Operand @var{locality} specifies the amount of temporal locality; 0 if there
3230 is none or 1, 2, or 3 for increasing levels of temporal locality;
3231 targets that do not support locality hints should ignore this.
3233 This insn is used to minimize cache-miss latency by moving data into a
3234 cache before it is accessed. It should use only non-faulting data prefetch
3239 @section Embedded Side-Effects on Addresses
3240 @cindex RTL preincrement
3241 @cindex RTL postincrement
3242 @cindex RTL predecrement
3243 @cindex RTL postdecrement
3245 Six special side-effect expression codes appear as memory addresses.
3249 @item (pre_dec:@var{m} @var{x})
3250 Represents the side effect of decrementing @var{x} by a standard
3251 amount and represents also the value that @var{x} has after being
3252 decremented. @var{x} must be a @code{reg} or @code{mem}, but most
3253 machines allow only a @code{reg}. @var{m} must be the machine mode
3254 for pointers on the machine in use. The amount @var{x} is decremented
3255 by is the length in bytes of the machine mode of the containing memory
3256 reference of which this expression serves as the address. Here is an
3260 (mem:DF (pre_dec:SI (reg:SI 39)))
3264 This says to decrement pseudo register 39 by the length of a @code{DFmode}
3265 value and use the result to address a @code{DFmode} value.
3268 @item (pre_inc:@var{m} @var{x})
3269 Similar, but specifies incrementing @var{x} instead of decrementing it.
3272 @item (post_dec:@var{m} @var{x})
3273 Represents the same side effect as @code{pre_dec} but a different
3274 value. The value represented here is the value @var{x} has @i{before}
3278 @item (post_inc:@var{m} @var{x})
3279 Similar, but specifies incrementing @var{x} instead of decrementing it.
3282 @item (post_modify:@var{m} @var{x} @var{y})
3284 Represents the side effect of setting @var{x} to @var{y} and
3285 represents @var{x} before @var{x} is modified. @var{x} must be a
3286 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
3287 @var{m} must be the machine mode for pointers on the machine in use.
3289 The expression @var{y} must be one of three forms:
3290 @code{(plus:@var{m} @var{x} @var{z})},
3291 @code{(minus:@var{m} @var{x} @var{z})}, or
3292 @code{(plus:@var{m} @var{x} @var{i})},
3293 where @var{z} is an index register and @var{i} is a constant.
3295 Here is an example of its use:
3298 (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
3302 This says to modify pseudo register 42 by adding the contents of pseudo
3303 register 48 to it, after the use of what ever 42 points to.
3306 @item (pre_modify:@var{m} @var{x} @var{expr})
3307 Similar except side effects happen before the use.
3310 These embedded side effect expressions must be used with care. Instruction
3311 patterns may not use them. Until the @samp{flow} pass of the compiler,
3312 they may occur only to represent pushes onto the stack. The @samp{flow}
3313 pass finds cases where registers are incremented or decremented in one
3314 instruction and used as an address shortly before or after; these cases are
3315 then transformed to use pre- or post-increment or -decrement.
3317 If a register used as the operand of these expressions is used in
3318 another address in an insn, the original value of the register is used.
3319 Uses of the register outside of an address are not permitted within the
3320 same insn as a use in an embedded side effect expression because such
3321 insns behave differently on different machines and hence must be treated
3322 as ambiguous and disallowed.
3324 An instruction that can be represented with an embedded side effect
3325 could also be represented using @code{parallel} containing an additional
3326 @code{set} to describe how the address register is altered. This is not
3327 done because machines that allow these operations at all typically
3328 allow them wherever a memory address is called for. Describing them as
3329 additional parallel stores would require doubling the number of entries
3330 in the machine description.
3333 @section Assembler Instructions as Expressions
3334 @cindex assembler instructions in RTL
3336 @cindex @code{asm_operands}, usage
3337 The RTX code @code{asm_operands} represents a value produced by a
3338 user-specified assembler instruction. It is used to represent
3339 an @code{asm} statement with arguments. An @code{asm} statement with
3340 a single output operand, like this:
3343 asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
3347 is represented using a single @code{asm_operands} RTX which represents
3348 the value that is stored in @code{outputvar}:
3351 (set @var{rtx-for-outputvar}
3352 (asm_operands "foo %1,%2,%0" "a" 0
3353 [@var{rtx-for-addition-result} @var{rtx-for-*z}]
3354 [(asm_input:@var{m1} "g")
3355 (asm_input:@var{m2} "di")]))
3359 Here the operands of the @code{asm_operands} RTX are the assembler
3360 template string, the output-operand's constraint, the index-number of the
3361 output operand among the output operands specified, a vector of input
3362 operand RTX's, and a vector of input-operand modes and constraints. The
3363 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
3366 When an @code{asm} statement has multiple output values, its insn has
3367 several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
3368 contains an @code{asm_operands}; all of these share the same assembler
3369 template and vectors, but each contains the constraint for the respective
3370 output operand. They are also distinguished by the output-operand index
3371 number, which is 0, 1, @dots{} for successive output operands.
3373 @node Debug Information
3374 @section Variable Location Debug Information in RTL
3375 @cindex Variable Location Debug Information in RTL
3377 Variable tracking relies on @code{MEM_EXPR} and @code{REG_EXPR}
3378 annotations to determine what user variables memory and register
3379 references refer to.
3381 Variable tracking at assignments uses these notes only when they refer
3382 to variables that live at fixed locations (e.g., addressable
3383 variables, global non-automatic variables). For variables whose
3384 location may vary, it relies on the following types of notes.
3387 @findex var_location
3388 @item (var_location:@var{mode} @var{var} @var{exp} @var{stat})
3389 Binds variable @code{var}, a tree, to value @var{exp}, an RTL
3390 expression. It appears only in @code{NOTE_INSN_VAR_LOCATION} and
3391 @code{DEBUG_INSN}s, with slightly different meanings. @var{mode}, if
3392 present, represents the mode of @var{exp}, which is useful if it is a
3393 modeless expression. @var{stat} is only meaningful in notes,
3394 indicating whether the variable is known to be initialized or
3398 @item (debug_expr:@var{mode} @var{decl})
3399 Stands for the value bound to the @code{DEBUG_EXPR_DECL} @var{decl},
3400 that points back to it, within value expressions in
3401 @code{VAR_LOCATION} nodes.
3409 The RTL representation of the code for a function is a doubly-linked
3410 chain of objects called @dfn{insns}. Insns are expressions with
3411 special codes that are used for no other purpose. Some insns are
3412 actual instructions; others represent dispatch tables for @code{switch}
3413 statements; others represent labels to jump to or various sorts of
3414 declarative information.
3416 In addition to its own specific data, each insn must have a unique
3417 id-number that distinguishes it from all other insns in the current
3418 function (after delayed branch scheduling, copies of an insn with the
3419 same id-number may be present in multiple places in a function, but
3420 these copies will always be identical and will only appear inside a
3421 @code{sequence}), and chain pointers to the preceding and following
3422 insns. These three fields occupy the same position in every insn,
3423 independent of the expression code of the insn. They could be accessed
3424 with @code{XEXP} and @code{XINT}, but instead three special macros are
3429 @item INSN_UID (@var{i})
3430 Accesses the unique id of insn @var{i}.
3433 @item PREV_INSN (@var{i})
3434 Accesses the chain pointer to the insn preceding @var{i}.
3435 If @var{i} is the first insn, this is a null pointer.
3438 @item NEXT_INSN (@var{i})
3439 Accesses the chain pointer to the insn following @var{i}.
3440 If @var{i} is the last insn, this is a null pointer.
3444 @findex get_last_insn
3445 The first insn in the chain is obtained by calling @code{get_insns}; the
3446 last insn is the result of calling @code{get_last_insn}. Within the
3447 chain delimited by these insns, the @code{NEXT_INSN} and
3448 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
3452 NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
3456 is always true and if @var{insn} is not the last insn,
3459 PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
3465 After delay slot scheduling, some of the insns in the chain might be
3466 @code{sequence} expressions, which contain a vector of insns. The value
3467 of @code{NEXT_INSN} in all but the last of these insns is the next insn
3468 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
3469 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
3470 which it is contained. Similar rules apply for @code{PREV_INSN}.
3472 This means that the above invariants are not necessarily true for insns
3473 inside @code{sequence} expressions. Specifically, if @var{insn} is the
3474 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
3475 is the insn containing the @code{sequence} expression, as is the value
3476 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
3477 insn in the @code{sequence} expression. You can use these expressions
3478 to find the containing @code{sequence} expression.
3480 Every insn has one of the following expression codes:
3485 The expression code @code{insn} is used for instructions that do not jump
3486 and do not do function calls. @code{sequence} expressions are always
3487 contained in insns with code @code{insn} even if one of those insns
3488 should jump or do function calls.
3490 Insns with code @code{insn} have four additional fields beyond the three
3491 mandatory ones listed above. These four are described in a table below.
3495 The expression code @code{jump_insn} is used for instructions that may
3496 jump (or, more generally, may contain @code{label_ref} expressions to
3497 which @code{pc} can be set in that instruction). If there is an
3498 instruction to return from the current function, it is recorded as a
3502 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
3503 accessed in the same way and in addition contain a field
3504 @code{JUMP_LABEL} which is defined once jump optimization has completed.
3506 For simple conditional and unconditional jumps, this field contains
3507 the @code{code_label} to which this insn will (possibly conditionally)
3508 branch. In a more complex jump, @code{JUMP_LABEL} records one of the
3509 labels that the insn refers to; other jump target labels are recorded
3510 as @code{REG_LABEL_TARGET} notes. The exception is @code{addr_vec}
3511 and @code{addr_diff_vec}, where @code{JUMP_LABEL} is @code{NULL_RTX}
3512 and the only way to find the labels is to scan the entire body of the
3515 Return insns count as jumps, but since they do not refer to any
3516 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
3520 The expression code @code{call_insn} is used for instructions that may do
3521 function calls. It is important to distinguish these instructions because
3522 they imply that certain registers and memory locations may be altered
3525 @findex CALL_INSN_FUNCTION_USAGE
3526 @code{call_insn} insns have the same extra fields as @code{insn} insns,
3527 accessed in the same way and in addition contain a field
3528 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
3529 @code{expr_list} expressions) containing @code{use}, @code{clobber} and
3530 sometimes @code{set} expressions that denote hard registers and
3531 @code{mem}s used or clobbered by the called function.
3533 A @code{mem} generally points to a stack slot in which arguments passed
3534 to the libcall by reference (@pxref{Register Arguments,
3535 TARGET_PASS_BY_REFERENCE}) are stored. If the argument is
3536 caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}),
3537 the stack slot will be mentioned in @code{clobber} and @code{use}
3538 entries; if it's callee-copied, only a @code{use} will appear, and the
3539 @code{mem} may point to addresses that are not stack slots.
3541 Registers occurring inside a @code{clobber} in this list augment
3542 registers specified in @code{CALL_USED_REGISTERS} (@pxref{Register
3545 If the list contains a @code{set} involving two registers, it indicates
3546 that the function returns one of its arguments. Such a @code{set} may
3547 look like a no-op if the same register holds the argument and the return
3551 @findex CODE_LABEL_NUMBER
3553 A @code{code_label} insn represents a label that a jump insn can jump
3554 to. It contains two special fields of data in addition to the three
3555 standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
3556 number}, a number that identifies this label uniquely among all the
3557 labels in the compilation (not just in the current function).
3558 Ultimately, the label is represented in the assembler output as an
3559 assembler label, usually of the form @samp{L@var{n}} where @var{n} is
3562 When a @code{code_label} appears in an RTL expression, it normally
3563 appears within a @code{label_ref} which represents the address of
3564 the label, as a number.
3566 Besides as a @code{code_label}, a label can also be represented as a
3567 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
3570 The field @code{LABEL_NUSES} is only defined once the jump optimization
3571 phase is completed. It contains the number of times this label is
3572 referenced in the current function.
3575 @findex SET_LABEL_KIND
3576 @findex LABEL_ALT_ENTRY_P
3577 @cindex alternate entry points
3578 The field @code{LABEL_KIND} differentiates four different types of
3579 labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
3580 @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels
3581 that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
3582 points} to the current function. These may be static (visible only in
3583 the containing translation unit), global (exposed to all translation
3584 units), or weak (global, but can be overridden by another symbol with the
3587 Much of the compiler treats all four kinds of label identically. Some
3588 of it needs to know whether or not a label is an alternate entry point;
3589 for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is
3590 equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
3591 The only place that cares about the distinction between static, global,
3592 and weak alternate entry points, besides the front-end code that creates
3593 them, is the function @code{output_alternate_entry_point}, in
3596 To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
3598 @findex jump_table_data
3599 @item jump_table_data
3600 A @code{jump_table_data} insn is a placeholder for the jump-table data
3601 of a @code{casesi} or @code{tablejump} insn. They are placed after
3602 a @code{tablejump_p} insn. A @code{jump_table_data} insn is not part o
3603 a basic blockm but it is associated with the basic block that ends with
3604 the @code{tablejump_p} insn. The @code{PATTERN} of a @code{jump_table_data}
3605 is always either an @code{addr_vec} or an @code{addr_diff_vec}, and a
3606 @code{jump_table_data} insn is always preceded by a @code{code_label}.
3607 The @code{tablejump_p} insn refers to that @code{code_label} via its
3612 Barriers are placed in the instruction stream when control cannot flow
3613 past them. They are placed after unconditional jump instructions to
3614 indicate that the jumps are unconditional and after calls to
3615 @code{volatile} functions, which do not return (e.g., @code{exit}).
3616 They contain no information beyond the three standard fields.
3619 @findex NOTE_LINE_NUMBER
3620 @findex NOTE_SOURCE_FILE
3622 @code{note} insns are used to represent additional debugging and
3623 declarative information. They contain two nonstandard fields, an
3624 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
3625 string accessed with @code{NOTE_SOURCE_FILE}.
3627 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
3628 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
3629 that the line came from. These notes control generation of line
3630 number data in the assembler output.
3632 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
3633 code with one of the following values (and @code{NOTE_SOURCE_FILE}
3634 must contain a null pointer):
3637 @findex NOTE_INSN_DELETED
3638 @item NOTE_INSN_DELETED
3639 Such a note is completely ignorable. Some passes of the compiler
3640 delete insns by altering them into notes of this kind.
3642 @findex NOTE_INSN_DELETED_LABEL
3643 @item NOTE_INSN_DELETED_LABEL
3644 This marks what used to be a @code{code_label}, but was not used for other
3645 purposes than taking its address and was transformed to mark that no
3648 @findex NOTE_INSN_BLOCK_BEG
3649 @findex NOTE_INSN_BLOCK_END
3650 @item NOTE_INSN_BLOCK_BEG
3651 @itemx NOTE_INSN_BLOCK_END
3652 These types of notes indicate the position of the beginning and end
3653 of a level of scoping of variable names. They control the output
3654 of debugging information.
3656 @findex NOTE_INSN_EH_REGION_BEG
3657 @findex NOTE_INSN_EH_REGION_END
3658 @item NOTE_INSN_EH_REGION_BEG
3659 @itemx NOTE_INSN_EH_REGION_END
3660 These types of notes indicate the position of the beginning and end of a
3661 level of scoping for exception handling. @code{NOTE_EH_HANDLER}
3662 identifies which region is associated with these notes.
3664 @findex NOTE_INSN_FUNCTION_BEG
3665 @item NOTE_INSN_FUNCTION_BEG
3666 Appears at the start of the function body, after the function
3669 @findex NOTE_INSN_VAR_LOCATION
3670 @findex NOTE_VAR_LOCATION
3671 @item NOTE_INSN_VAR_LOCATION
3672 This note is used to generate variable location debugging information.
3673 It indicates that the user variable in its @code{VAR_LOCATION} operand
3674 is at the location given in the RTL expression, or holds a value that
3675 can be computed by evaluating the RTL expression from that static
3676 point in the program up to the next such note for the same user
3681 These codes are printed symbolically when they appear in debugging dumps.
3684 @findex INSN_VAR_LOCATION
3686 The expression code @code{debug_insn} is used for pseudo-instructions
3687 that hold debugging information for variable tracking at assignments
3688 (see @option{-fvar-tracking-assignments} option). They are the RTL
3689 representation of @code{GIMPLE_DEBUG} statements
3690 (@ref{@code{GIMPLE_DEBUG}}), with a @code{VAR_LOCATION} operand that
3691 binds a user variable tree to an RTL representation of the
3692 @code{value} in the corresponding statement. A @code{DEBUG_EXPR} in
3693 it stands for the value bound to the corresponding
3694 @code{DEBUG_EXPR_DECL}.
3696 Throughout optimization passes, binding information is kept in
3697 pseudo-instruction form, so that, unlike notes, it gets the same
3698 treatment and adjustments that regular instructions would. It is the
3699 variable tracking pass that turns these pseudo-instructions into var
3700 location notes, analyzing control flow, value equivalences and changes
3701 to registers and memory referenced in value expressions, propagating
3702 the values of debug temporaries and determining expressions that can
3703 be used to compute the value of each user variable at as many points
3704 (ranges, actually) in the program as possible.
3706 Unlike @code{NOTE_INSN_VAR_LOCATION}, the value expression in an
3707 @code{INSN_VAR_LOCATION} denotes a value at that specific point in the
3708 program, rather than an expression that can be evaluated at any later
3709 point before an overriding @code{VAR_LOCATION} is encountered. E.g.,
3710 if a user variable is bound to a @code{REG} and then a subsequent insn
3711 modifies the @code{REG}, the note location would keep mapping the user
3712 variable to the register across the insn, whereas the insn location
3713 would keep the variable bound to the value, so that the variable
3714 tracking pass would emit another location note for the variable at the
3715 point in which the register is modified.
3719 @cindex @code{TImode}, in @code{insn}
3720 @cindex @code{HImode}, in @code{insn}
3721 @cindex @code{QImode}, in @code{insn}
3722 The machine mode of an insn is normally @code{VOIDmode}, but some
3723 phases use the mode for various purposes.
3725 The common subexpression elimination pass sets the mode of an insn to
3726 @code{QImode} when it is the first insn in a block that has already
3729 The second Haifa scheduling pass, for targets that can multiple issue,
3730 sets the mode of an insn to @code{TImode} when it is believed that the
3731 instruction begins an issue group. That is, when the instruction
3732 cannot issue simultaneously with the previous. This may be relied on
3733 by later passes, in particular machine-dependent reorg.
3735 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
3736 and @code{call_insn} insns:
3740 @item PATTERN (@var{i})
3741 An expression for the side effect performed by this insn. This must
3742 be one of the following codes: @code{set}, @code{call}, @code{use},
3743 @code{clobber}, @code{return}, @code{simple_return}, @code{asm_input},
3744 @code{asm_output}, @code{addr_vec}, @code{addr_diff_vec},
3745 @code{trap_if}, @code{unspec}, @code{unspec_volatile},
3746 @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a
3747 @code{parallel}, each element of the @code{parallel} must be one these
3748 codes, except that @code{parallel} expressions cannot be nested and
3749 @code{addr_vec} and @code{addr_diff_vec} are not permitted inside a
3750 @code{parallel} expression.
3753 @item INSN_CODE (@var{i})
3754 An integer that says which pattern in the machine description matches
3755 this insn, or @minus{}1 if the matching has not yet been attempted.
3757 Such matching is never attempted and this field remains @minus{}1 on an insn
3758 whose pattern consists of a single @code{use}, @code{clobber},
3759 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
3761 @findex asm_noperands
3762 Matching is also never attempted on insns that result from an @code{asm}
3763 statement. These contain at least one @code{asm_operands} expression.
3764 The function @code{asm_noperands} returns a non-negative value for
3767 In the debugging output, this field is printed as a number followed by
3768 a symbolic representation that locates the pattern in the @file{md}
3769 file as some small positive or negative offset from a named pattern.
3772 @item LOG_LINKS (@var{i})
3773 A list (chain of @code{insn_list} expressions) giving information about
3774 dependencies between instructions within a basic block. Neither a jump
3775 nor a label may come between the related insns. These are only used by
3776 the schedulers and by combine. This is a deprecated data structure.
3777 Def-use and use-def chains are now preferred.
3780 @item REG_NOTES (@var{i})
3781 A list (chain of @code{expr_list}, @code{insn_list} and @code{int_list}
3782 expressions) giving miscellaneous information about the insn. It is often
3783 information pertaining to the registers used in this insn.
3786 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
3787 expressions. Each of these has two operands: the first is an insn,
3788 and the second is another @code{insn_list} expression (the next one in
3789 the chain). The last @code{insn_list} in the chain has a null pointer
3790 as second operand. The significant thing about the chain is which
3791 insns appear in it (as first operands of @code{insn_list}
3792 expressions). Their order is not significant.
3794 This list is originally set up by the flow analysis pass; it is a null
3795 pointer until then. Flow only adds links for those data dependencies
3796 which can be used for instruction combination. For each insn, the flow
3797 analysis pass adds a link to insns which store into registers values
3798 that are used for the first time in this insn.
3800 The @code{REG_NOTES} field of an insn is a chain similar to the
3801 @code{LOG_LINKS} field but it includes @code{expr_list} and @code{int_list}
3802 expressions in addition to @code{insn_list} expressions. There are several
3803 kinds of register notes, which are distinguished by the machine mode, which
3804 in a register note is really understood as being an @code{enum reg_note}.
3805 The first operand @var{op} of the note is data whose meaning depends on
3808 @findex REG_NOTE_KIND
3809 @findex PUT_REG_NOTE_KIND
3810 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3811 register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3812 (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
3815 Register notes are of three classes: They may say something about an
3816 input to an insn, they may say something about an output of an insn, or
3817 they may create a linkage between two insns. There are also a set
3818 of values that are only used in @code{LOG_LINKS}.
3820 These register notes annotate inputs to an insn:
3825 The value in @var{op} dies in this insn; that is to say, altering the
3826 value immediately after this insn would not affect the future behavior
3829 It does not follow that the register @var{op} has no useful value after
3830 this insn since @var{op} is not necessarily modified by this insn.
3831 Rather, no subsequent instruction uses the contents of @var{op}.
3835 The register @var{op} being set by this insn will not be used in a
3836 subsequent insn. This differs from a @code{REG_DEAD} note, which
3837 indicates that the value in an input will not be used subsequently.
3838 These two notes are independent; both may be present for the same
3843 The register @var{op} is incremented (or decremented; at this level
3844 there is no distinction) by an embedded side effect inside this insn.
3845 This means it appears in a @code{post_inc}, @code{pre_inc},
3846 @code{post_dec} or @code{pre_dec} expression.
3850 The register @var{op} is known to have a nonnegative value when this
3851 insn is reached. This is used so that decrement and branch until zero
3852 instructions, such as the m68k dbra, can be matched.
3854 The @code{REG_NONNEG} note is added to insns only if the machine
3855 description has a @samp{decrement_and_branch_until_zero} pattern.
3857 @findex REG_LABEL_OPERAND
3858 @item REG_LABEL_OPERAND
3859 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3860 @code{NOTE_INSN_DELETED_LABEL}, but is not a @code{jump_insn}, or it
3861 is a @code{jump_insn} that refers to the operand as an ordinary
3862 operand. The label may still eventually be a jump target, but if so
3863 in an indirect jump in a subsequent insn. The presence of this note
3864 allows jump optimization to be aware that @var{op} is, in fact, being
3865 used, and flow optimization to build an accurate flow graph.
3867 @findex REG_LABEL_TARGET
3868 @item REG_LABEL_TARGET
3869 This insn is a @code{jump_insn} but not an @code{addr_vec} or
3870 @code{addr_diff_vec}. It uses @var{op}, a @code{code_label} as a
3871 direct or indirect jump target. Its purpose is similar to that of
3872 @code{REG_LABEL_OPERAND}. This note is only present if the insn has
3873 multiple targets; the last label in the insn (in the highest numbered
3874 insn-field) goes into the @code{JUMP_LABEL} field and does not have a
3875 @code{REG_LABEL_TARGET} note. @xref{Insns, JUMP_LABEL}.
3877 @findex REG_CROSSING_JUMP
3878 @item REG_CROSSING_JUMP
3879 This insn is a branching instruction (either an unconditional jump or
3880 an indirect jump) which crosses between hot and cold sections, which
3881 could potentially be very far apart in the executable. The presence
3882 of this note indicates to other optimizations that this branching
3883 instruction should not be ``collapsed'' into a simpler branching
3884 construct. It is used when the optimization to partition basic blocks
3885 into hot and cold sections is turned on.
3889 Appears attached to each @code{CALL_INSN} to @code{setjmp} or a
3893 The following notes describe attributes of outputs of an insn:
3900 This note is only valid on an insn that sets only one register and
3901 indicates that that register will be equal to @var{op} at run time; the
3902 scope of this equivalence differs between the two types of notes. The
3903 value which the insn explicitly copies into the register may look
3904 different from @var{op}, but they will be equal at run time. If the
3905 output of the single @code{set} is a @code{strict_low_part} expression,
3906 the note refers to the register that is contained in @code{SUBREG_REG}
3907 of the @code{subreg} expression.
3909 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3910 the entire function, and could validly be replaced in all its
3911 occurrences by @var{op}. (``Validly'' here refers to the data flow of
3912 the program; simple replacement may make some insns invalid.) For
3913 example, when a constant is loaded into a register that is never
3914 assigned any other value, this kind of note is used.
3916 When a parameter is copied into a pseudo-register at entry to a function,
3917 a note of this kind records that the register is equivalent to the stack
3918 slot where the parameter was passed. Although in this case the register
3919 may be set by other insns, it is still valid to replace the register
3920 by the stack slot throughout the function.
3922 A @code{REG_EQUIV} note is also used on an instruction which copies a
3923 register parameter into a pseudo-register at entry to a function, if
3924 there is a stack slot where that parameter could be stored. Although
3925 other insns may set the pseudo-register, it is valid for the compiler to
3926 replace the pseudo-register by stack slot throughout the function,
3927 provided the compiler ensures that the stack slot is properly
3928 initialized by making the replacement in the initial copy instruction as
3929 well. This is used on machines for which the calling convention
3930 allocates stack space for register parameters. See
3931 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3933 In the case of @code{REG_EQUAL}, the register that is set by this insn
3934 will be equal to @var{op} at run time at the end of this insn but not
3935 necessarily elsewhere in the function. In this case, @var{op}
3936 is typically an arithmetic expression. For example, when a sequence of
3937 insns such as a library call is used to perform an arithmetic operation,
3938 this kind of note is attached to the insn that produces or copies the
3941 These two notes are used in different ways by the compiler passes.
3942 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3943 common subexpression elimination and loop optimization) to tell them how
3944 to think of that value. @code{REG_EQUIV} notes are used by register
3945 allocation to indicate that there is an available substitute expression
3946 (either a constant or a @code{mem} expression for the location of a
3947 parameter on the stack) that may be used in place of a register if
3948 insufficient registers are available.
3950 Except for stack homes for parameters, which are indicated by a
3951 @code{REG_EQUIV} note and are not useful to the early optimization
3952 passes and pseudo registers that are equivalent to a memory location
3953 throughout their entire life, which is not detected until later in
3954 the compilation, all equivalences are initially indicated by an attached
3955 @code{REG_EQUAL} note. In the early stages of register allocation, a
3956 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3957 @var{op} is a constant and the insn represents the only set of its
3958 destination register.
3960 Thus, compiler passes prior to register allocation need only check for
3961 @code{REG_EQUAL} notes and passes subsequent to register allocation
3962 need only check for @code{REG_EQUIV} notes.
3965 These notes describe linkages between insns. They occur in pairs: one
3966 insn has one of a pair of notes that points to a second insn, which has
3967 the inverse note pointing back to the first insn.
3970 @findex REG_CC_SETTER
3974 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3975 set and use @code{cc0} are adjacent. However, when branch delay slot
3976 filling is done, this may no longer be true. In this case a
3977 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3978 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3979 be placed on the insn using @code{cc0} to point to the insn setting
3983 These values are only used in the @code{LOG_LINKS} field, and indicate
3984 the type of dependency that each link represents. Links which indicate
3985 a data dependence (a read after write dependence) do not use any code,
3986 they simply have mode @code{VOIDmode}, and are printed without any
3990 @findex REG_DEP_TRUE
3992 This indicates a true dependence (a read after write dependence).
3994 @findex REG_DEP_OUTPUT
3995 @item REG_DEP_OUTPUT
3996 This indicates an output dependence (a write after write dependence).
3998 @findex REG_DEP_ANTI
4000 This indicates an anti dependence (a write after read dependence).
4004 These notes describe information gathered from gcov profile data. They
4005 are stored in the @code{REG_NOTES} field of an insn.
4010 This is used to specify the ratio of branches to non-branches of a
4011 branch insn according to the profile data. The note is represented
4012 as an @code{int_list} expression whose integer value is between 0 and
4013 REG_BR_PROB_BASE. Larger values indicate a higher probability that
4014 the branch will be taken.
4018 These notes are found in JUMP insns after delayed branch scheduling
4019 has taken place. They indicate both the direction and the likelihood
4020 of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
4022 @findex REG_FRAME_RELATED_EXPR
4023 @item REG_FRAME_RELATED_EXPR
4024 This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
4025 is used in place of the actual insn pattern. This is done in cases where
4026 the pattern is either complex or misleading.
4029 For convenience, the machine mode in an @code{insn_list} or
4030 @code{expr_list} is printed using these symbolic codes in debugging dumps.
4034 The only difference between the expression codes @code{insn_list} and
4035 @code{expr_list} is that the first operand of an @code{insn_list} is
4036 assumed to be an insn and is printed in debugging dumps as the insn's
4037 unique id; the first operand of an @code{expr_list} is printed in the
4038 ordinary way as an expression.
4041 @section RTL Representation of Function-Call Insns
4042 @cindex calling functions in RTL
4043 @cindex RTL function-call insns
4044 @cindex function-call insns
4046 Insns that call subroutines have the RTL expression code @code{call_insn}.
4047 These insns must satisfy special rules, and their bodies must use a special
4048 RTL expression code, @code{call}.
4050 @cindex @code{call} usage
4051 A @code{call} expression has two operands, as follows:
4054 (call (mem:@var{fm} @var{addr}) @var{nbytes})
4058 Here @var{nbytes} is an operand that represents the number of bytes of
4059 argument data being passed to the subroutine, @var{fm} is a machine mode
4060 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
4061 the machine description) and @var{addr} represents the address of the
4064 For a subroutine that returns no value, the @code{call} expression as
4065 shown above is the entire body of the insn, except that the insn might
4066 also contain @code{use} or @code{clobber} expressions.
4068 @cindex @code{BLKmode}, and function return values
4069 For a subroutine that returns a value whose mode is not @code{BLKmode},
4070 the value is returned in a hard register. If this register's number is
4071 @var{r}, then the body of the call insn looks like this:
4074 (set (reg:@var{m} @var{r})
4075 (call (mem:@var{fm} @var{addr}) @var{nbytes}))
4079 This RTL expression makes it clear (to the optimizer passes) that the
4080 appropriate register receives a useful value in this insn.
4082 When a subroutine returns a @code{BLKmode} value, it is handled by
4083 passing to the subroutine the address of a place to store the value.
4084 So the call insn itself does not ``return'' any value, and it has the
4085 same RTL form as a call that returns nothing.
4087 On some machines, the call instruction itself clobbers some register,
4088 for example to contain the return address. @code{call_insn} insns
4089 on these machines should have a body which is a @code{parallel}
4090 that contains both the @code{call} expression and @code{clobber}
4091 expressions that indicate which registers are destroyed. Similarly,
4092 if the call instruction requires some register other than the stack
4093 pointer that is not explicitly mentioned in its RTL, a @code{use}
4094 subexpression should mention that register.
4096 Functions that are called are assumed to modify all registers listed in
4097 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
4098 Basics}) and, with the exception of @code{const} functions and library
4099 calls, to modify all of memory.
4101 Insns containing just @code{use} expressions directly precede the
4102 @code{call_insn} insn to indicate which registers contain inputs to the
4103 function. Similarly, if registers other than those in
4104 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
4105 containing a single @code{clobber} follow immediately after the call to
4106 indicate which registers.
4109 @section Structure Sharing Assumptions
4110 @cindex sharing of RTL components
4111 @cindex RTL structure sharing assumptions
4113 The compiler assumes that certain kinds of RTL expressions are unique;
4114 there do not exist two distinct objects representing the same value.
4115 In other cases, it makes an opposite assumption: that no RTL expression
4116 object of a certain kind appears in more than one place in the
4117 containing structure.
4119 These assumptions refer to a single function; except for the RTL
4120 objects that describe global variables and external functions,
4121 and a few standard objects such as small integer constants,
4122 no RTL objects are common to two functions.
4125 @cindex @code{reg}, RTL sharing
4127 Each pseudo-register has only a single @code{reg} object to represent it,
4128 and therefore only a single machine mode.
4130 @cindex symbolic label
4131 @cindex @code{symbol_ref}, RTL sharing
4133 For any symbolic label, there is only one @code{symbol_ref} object
4136 @cindex @code{const_int}, RTL sharing
4138 All @code{const_int} expressions with equal values are shared.
4140 @cindex @code{pc}, RTL sharing
4142 There is only one @code{pc} expression.
4144 @cindex @code{cc0}, RTL sharing
4146 There is only one @code{cc0} expression.
4148 @cindex @code{const_double}, RTL sharing
4150 There is only one @code{const_double} expression with value 0 for
4151 each floating point mode. Likewise for values 1 and 2.
4153 @cindex @code{const_vector}, RTL sharing
4155 There is only one @code{const_vector} expression with value 0 for
4156 each vector mode, be it an integer or a double constant vector.
4158 @cindex @code{label_ref}, RTL sharing
4159 @cindex @code{scratch}, RTL sharing
4161 No @code{label_ref} or @code{scratch} appears in more than one place in
4162 the RTL structure; in other words, it is safe to do a tree-walk of all
4163 the insns in the function and assume that each time a @code{label_ref}
4164 or @code{scratch} is seen it is distinct from all others that are seen.
4166 @cindex @code{mem}, RTL sharing
4168 Only one @code{mem} object is normally created for each static
4169 variable or stack slot, so these objects are frequently shared in all
4170 the places they appear. However, separate but equal objects for these
4171 variables are occasionally made.
4173 @cindex @code{asm_operands}, RTL sharing
4175 When a single @code{asm} statement has multiple output operands, a
4176 distinct @code{asm_operands} expression is made for each output operand.
4177 However, these all share the vector which contains the sequence of input
4178 operands. This sharing is used later on to test whether two
4179 @code{asm_operands} expressions come from the same statement, so all
4180 optimizations must carefully preserve the sharing if they copy the
4184 No RTL object appears in more than one place in the RTL structure
4185 except as described above. Many passes of the compiler rely on this
4186 by assuming that they can modify RTL objects in place without unwanted
4187 side-effects on other insns.
4189 @findex unshare_all_rtl
4191 During initial RTL generation, shared structure is freely introduced.
4192 After all the RTL for a function has been generated, all shared
4193 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
4194 after which the above rules are guaranteed to be followed.
4196 @findex copy_rtx_if_shared
4198 During the combiner pass, shared structure within an insn can exist
4199 temporarily. However, the shared structure is copied before the
4200 combiner is finished with the insn. This is done by calling
4201 @code{copy_rtx_if_shared}, which is a subroutine of
4202 @code{unshare_all_rtl}.
4206 @section Reading RTL
4208 To read an RTL object from a file, call @code{read_rtx}. It takes one
4209 argument, a stdio stream, and returns a single RTL object. This routine
4210 is defined in @file{read-rtl.c}. It is not available in the compiler
4211 itself, only the various programs that generate the compiler back end
4212 from the machine description.
4214 People frequently have the idea of using RTL stored as text in a file as
4215 an interface between a language front end and the bulk of GCC@. This
4216 idea is not feasible.
4218 GCC was designed to use RTL internally only. Correct RTL for a given
4219 program is very dependent on the particular target machine. And the RTL
4220 does not contain all the information about the program.
4222 The proper way to interface GCC to a new language front end is with
4223 the ``tree'' data structure, described in the files @file{tree.h} and
4224 @file{tree.def}. The documentation for this structure (@pxref{GENERIC})