* sv.po, zh_CN.po: Update.
[official-gcc.git] / gcc / final.c
blobe3b62a1553e785264feef531afe0a04678ce2945
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21 02110-1301, USA. */
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "real.h"
63 #include "hard-reg-set.h"
64 #include "output.h"
65 #include "except.h"
66 #include "function.h"
67 #include "toplev.h"
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "debug.h"
73 #include "expr.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
76 #include "timevar.h"
77 #include "cgraph.h"
78 #include "coverage.h"
80 #ifdef XCOFF_DEBUGGING_INFO
81 #include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
83 #endif
85 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86 #include "dwarf2out.h"
87 #endif
89 #ifdef DBX_DEBUGGING_INFO
90 #include "dbxout.h"
91 #endif
93 #ifdef SDB_DEBUGGING_INFO
94 #include "sdbout.h"
95 #endif
97 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
101 #endif
103 /* How to start an assembler comment. */
104 #ifndef ASM_COMMENT_START
105 #define ASM_COMMENT_START ";#"
106 #endif
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
111 #endif
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
115 #endif
117 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
118 #define HAVE_READONLY_DATA_SECTION 1
119 #else
120 #define HAVE_READONLY_DATA_SECTION 0
121 #endif
123 /* Bitflags used by final_scan_insn. */
124 #define SEEN_BB 1
125 #define SEEN_NOTE 2
126 #define SEEN_EMITTED 4
128 /* Last insn processed by final_scan_insn. */
129 static rtx debug_insn;
130 rtx current_output_insn;
132 /* Line number of last NOTE. */
133 static int last_linenum;
135 /* Highest line number in current block. */
136 static int high_block_linenum;
138 /* Likewise for function. */
139 static int high_function_linenum;
141 /* Filename of last NOTE. */
142 static const char *last_filename;
144 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
146 /* Nonzero while outputting an `asm' with operands.
147 This means that inconsistencies are the user's fault, so don't die.
148 The precise value is the insn being output, to pass to error_for_asm. */
149 rtx this_is_asm_operands;
151 /* Number of operands of this insn, for an `asm' with operands. */
152 static unsigned int insn_noperands;
154 /* Compare optimization flag. */
156 static rtx last_ignored_compare = 0;
158 /* Assign a unique number to each insn that is output.
159 This can be used to generate unique local labels. */
161 static int insn_counter = 0;
163 #ifdef HAVE_cc0
164 /* This variable contains machine-dependent flags (defined in tm.h)
165 set and examined by output routines
166 that describe how to interpret the condition codes properly. */
168 CC_STATUS cc_status;
170 /* During output of an insn, this contains a copy of cc_status
171 from before the insn. */
173 CC_STATUS cc_prev_status;
174 #endif
176 /* Indexed by hardware reg number, is 1 if that register is ever
177 used in the current function.
179 In life_analysis, or in stupid_life_analysis, this is set
180 up to record the hard regs used explicitly. Reload adds
181 in the hard regs used for holding pseudo regs. Final uses
182 it to generate the code in the function prologue and epilogue
183 to save and restore registers as needed. */
185 char regs_ever_live[FIRST_PSEUDO_REGISTER];
187 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
188 Unlike regs_ever_live, elements of this array corresponding to
189 eliminable regs like the frame pointer are set if an asm sets them. */
191 char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
193 /* Nonzero means current function must be given a frame pointer.
194 Initialized in function.c to 0. Set only in reload1.c as per
195 the needs of the function. */
197 int frame_pointer_needed;
199 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
201 static int block_depth;
203 /* Nonzero if have enabled APP processing of our assembler output. */
205 static int app_on;
207 /* If we are outputting an insn sequence, this contains the sequence rtx.
208 Zero otherwise. */
210 rtx final_sequence;
212 #ifdef ASSEMBLER_DIALECT
214 /* Number of the assembler dialect to use, starting at 0. */
215 static int dialect_number;
216 #endif
218 #ifdef HAVE_conditional_execution
219 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
220 rtx current_insn_predicate;
221 #endif
223 #ifdef HAVE_ATTR_length
224 static int asm_insn_count (rtx);
225 #endif
226 static void profile_function (FILE *);
227 static void profile_after_prologue (FILE *);
228 static bool notice_source_line (rtx);
229 static rtx walk_alter_subreg (rtx *);
230 static void output_asm_name (void);
231 static void output_alternate_entry_point (FILE *, rtx);
232 static tree get_mem_expr_from_op (rtx, int *);
233 static void output_asm_operand_names (rtx *, int *, int);
234 static void output_operand (rtx, int);
235 #ifdef LEAF_REGISTERS
236 static void leaf_renumber_regs (rtx);
237 #endif
238 #ifdef HAVE_cc0
239 static int alter_cond (rtx);
240 #endif
241 #ifndef ADDR_VEC_ALIGN
242 static int final_addr_vec_align (rtx);
243 #endif
244 #ifdef HAVE_ATTR_length
245 static int align_fuzz (rtx, rtx, int, unsigned);
246 #endif
248 /* Initialize data in final at the beginning of a compilation. */
250 void
251 init_final (const char *filename ATTRIBUTE_UNUSED)
253 app_on = 0;
254 final_sequence = 0;
256 #ifdef ASSEMBLER_DIALECT
257 dialect_number = ASSEMBLER_DIALECT;
258 #endif
261 /* Default target function prologue and epilogue assembler output.
263 If not overridden for epilogue code, then the function body itself
264 contains return instructions wherever needed. */
265 void
266 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
267 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
271 /* Default target hook that outputs nothing to a stream. */
272 void
273 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
277 /* Enable APP processing of subsequent output.
278 Used before the output from an `asm' statement. */
280 void
281 app_enable (void)
283 if (! app_on)
285 fputs (ASM_APP_ON, asm_out_file);
286 app_on = 1;
290 /* Disable APP processing of subsequent output.
291 Called from varasm.c before most kinds of output. */
293 void
294 app_disable (void)
296 if (app_on)
298 fputs (ASM_APP_OFF, asm_out_file);
299 app_on = 0;
303 /* Return the number of slots filled in the current
304 delayed branch sequence (we don't count the insn needing the
305 delay slot). Zero if not in a delayed branch sequence. */
307 #ifdef DELAY_SLOTS
309 dbr_sequence_length (void)
311 if (final_sequence != 0)
312 return XVECLEN (final_sequence, 0) - 1;
313 else
314 return 0;
316 #endif
318 /* The next two pages contain routines used to compute the length of an insn
319 and to shorten branches. */
321 /* Arrays for insn lengths, and addresses. The latter is referenced by
322 `insn_current_length'. */
324 static int *insn_lengths;
326 varray_type insn_addresses_;
328 /* Max uid for which the above arrays are valid. */
329 static int insn_lengths_max_uid;
331 /* Address of insn being processed. Used by `insn_current_length'. */
332 int insn_current_address;
334 /* Address of insn being processed in previous iteration. */
335 int insn_last_address;
337 /* known invariant alignment of insn being processed. */
338 int insn_current_align;
340 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
341 gives the next following alignment insn that increases the known
342 alignment, or NULL_RTX if there is no such insn.
343 For any alignment obtained this way, we can again index uid_align with
344 its uid to obtain the next following align that in turn increases the
345 alignment, till we reach NULL_RTX; the sequence obtained this way
346 for each insn we'll call the alignment chain of this insn in the following
347 comments. */
349 struct label_alignment
351 short alignment;
352 short max_skip;
355 static rtx *uid_align;
356 static int *uid_shuid;
357 static struct label_alignment *label_align;
359 /* Indicate that branch shortening hasn't yet been done. */
361 void
362 init_insn_lengths (void)
364 if (uid_shuid)
366 free (uid_shuid);
367 uid_shuid = 0;
369 if (insn_lengths)
371 free (insn_lengths);
372 insn_lengths = 0;
373 insn_lengths_max_uid = 0;
375 #ifdef HAVE_ATTR_length
376 INSN_ADDRESSES_FREE ();
377 #endif
378 if (uid_align)
380 free (uid_align);
381 uid_align = 0;
385 /* Obtain the current length of an insn. If branch shortening has been done,
386 get its actual length. Otherwise, get its maximum length. */
389 get_attr_length (rtx insn ATTRIBUTE_UNUSED)
391 #ifdef HAVE_ATTR_length
392 rtx body;
393 int i;
394 int length = 0;
396 if (insn_lengths_max_uid > INSN_UID (insn))
397 return insn_lengths[INSN_UID (insn)];
398 else
399 switch (GET_CODE (insn))
401 case NOTE:
402 case BARRIER:
403 case CODE_LABEL:
404 return 0;
406 case CALL_INSN:
407 length = insn_default_length (insn);
408 break;
410 case JUMP_INSN:
411 body = PATTERN (insn);
412 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
414 /* Alignment is machine-dependent and should be handled by
415 ADDR_VEC_ALIGN. */
417 else
418 length = insn_default_length (insn);
419 break;
421 case INSN:
422 body = PATTERN (insn);
423 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
424 return 0;
426 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
427 length = asm_insn_count (body) * insn_default_length (insn);
428 else if (GET_CODE (body) == SEQUENCE)
429 for (i = 0; i < XVECLEN (body, 0); i++)
430 length += get_attr_length (XVECEXP (body, 0, i));
431 else
432 length = insn_default_length (insn);
433 break;
435 default:
436 break;
439 #ifdef ADJUST_INSN_LENGTH
440 ADJUST_INSN_LENGTH (insn, length);
441 #endif
442 return length;
443 #else /* not HAVE_ATTR_length */
444 return 0;
445 #endif /* not HAVE_ATTR_length */
448 /* Code to handle alignment inside shorten_branches. */
450 /* Here is an explanation how the algorithm in align_fuzz can give
451 proper results:
453 Call a sequence of instructions beginning with alignment point X
454 and continuing until the next alignment point `block X'. When `X'
455 is used in an expression, it means the alignment value of the
456 alignment point.
458 Call the distance between the start of the first insn of block X, and
459 the end of the last insn of block X `IX', for the `inner size of X'.
460 This is clearly the sum of the instruction lengths.
462 Likewise with the next alignment-delimited block following X, which we
463 shall call block Y.
465 Call the distance between the start of the first insn of block X, and
466 the start of the first insn of block Y `OX', for the `outer size of X'.
468 The estimated padding is then OX - IX.
470 OX can be safely estimated as
472 if (X >= Y)
473 OX = round_up(IX, Y)
474 else
475 OX = round_up(IX, X) + Y - X
477 Clearly est(IX) >= real(IX), because that only depends on the
478 instruction lengths, and those being overestimated is a given.
480 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
481 we needn't worry about that when thinking about OX.
483 When X >= Y, the alignment provided by Y adds no uncertainty factor
484 for branch ranges starting before X, so we can just round what we have.
485 But when X < Y, we don't know anything about the, so to speak,
486 `middle bits', so we have to assume the worst when aligning up from an
487 address mod X to one mod Y, which is Y - X. */
489 #ifndef LABEL_ALIGN
490 #define LABEL_ALIGN(LABEL) align_labels_log
491 #endif
493 #ifndef LABEL_ALIGN_MAX_SKIP
494 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
495 #endif
497 #ifndef LOOP_ALIGN
498 #define LOOP_ALIGN(LABEL) align_loops_log
499 #endif
501 #ifndef LOOP_ALIGN_MAX_SKIP
502 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
503 #endif
505 #ifndef LABEL_ALIGN_AFTER_BARRIER
506 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
507 #endif
509 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
510 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
511 #endif
513 #ifndef JUMP_ALIGN
514 #define JUMP_ALIGN(LABEL) align_jumps_log
515 #endif
517 #ifndef JUMP_ALIGN_MAX_SKIP
518 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
519 #endif
521 #ifndef ADDR_VEC_ALIGN
522 static int
523 final_addr_vec_align (rtx addr_vec)
525 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
527 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
528 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
529 return exact_log2 (align);
533 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
534 #endif
536 #ifndef INSN_LENGTH_ALIGNMENT
537 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
538 #endif
540 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
542 static int min_labelno, max_labelno;
544 #define LABEL_TO_ALIGNMENT(LABEL) \
545 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
547 #define LABEL_TO_MAX_SKIP(LABEL) \
548 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
550 /* For the benefit of port specific code do this also as a function. */
553 label_to_alignment (rtx label)
555 return LABEL_TO_ALIGNMENT (label);
558 #ifdef HAVE_ATTR_length
559 /* The differences in addresses
560 between a branch and its target might grow or shrink depending on
561 the alignment the start insn of the range (the branch for a forward
562 branch or the label for a backward branch) starts out on; if these
563 differences are used naively, they can even oscillate infinitely.
564 We therefore want to compute a 'worst case' address difference that
565 is independent of the alignment the start insn of the range end
566 up on, and that is at least as large as the actual difference.
567 The function align_fuzz calculates the amount we have to add to the
568 naively computed difference, by traversing the part of the alignment
569 chain of the start insn of the range that is in front of the end insn
570 of the range, and considering for each alignment the maximum amount
571 that it might contribute to a size increase.
573 For casesi tables, we also want to know worst case minimum amounts of
574 address difference, in case a machine description wants to introduce
575 some common offset that is added to all offsets in a table.
576 For this purpose, align_fuzz with a growth argument of 0 computes the
577 appropriate adjustment. */
579 /* Compute the maximum delta by which the difference of the addresses of
580 START and END might grow / shrink due to a different address for start
581 which changes the size of alignment insns between START and END.
582 KNOWN_ALIGN_LOG is the alignment known for START.
583 GROWTH should be ~0 if the objective is to compute potential code size
584 increase, and 0 if the objective is to compute potential shrink.
585 The return value is undefined for any other value of GROWTH. */
587 static int
588 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
590 int uid = INSN_UID (start);
591 rtx align_label;
592 int known_align = 1 << known_align_log;
593 int end_shuid = INSN_SHUID (end);
594 int fuzz = 0;
596 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
598 int align_addr, new_align;
600 uid = INSN_UID (align_label);
601 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
602 if (uid_shuid[uid] > end_shuid)
603 break;
604 known_align_log = LABEL_TO_ALIGNMENT (align_label);
605 new_align = 1 << known_align_log;
606 if (new_align < known_align)
607 continue;
608 fuzz += (-align_addr ^ growth) & (new_align - known_align);
609 known_align = new_align;
611 return fuzz;
614 /* Compute a worst-case reference address of a branch so that it
615 can be safely used in the presence of aligned labels. Since the
616 size of the branch itself is unknown, the size of the branch is
617 not included in the range. I.e. for a forward branch, the reference
618 address is the end address of the branch as known from the previous
619 branch shortening pass, minus a value to account for possible size
620 increase due to alignment. For a backward branch, it is the start
621 address of the branch as known from the current pass, plus a value
622 to account for possible size increase due to alignment.
623 NB.: Therefore, the maximum offset allowed for backward branches needs
624 to exclude the branch size. */
627 insn_current_reference_address (rtx branch)
629 rtx dest, seq;
630 int seq_uid;
632 if (! INSN_ADDRESSES_SET_P ())
633 return 0;
635 seq = NEXT_INSN (PREV_INSN (branch));
636 seq_uid = INSN_UID (seq);
637 if (!JUMP_P (branch))
638 /* This can happen for example on the PA; the objective is to know the
639 offset to address something in front of the start of the function.
640 Thus, we can treat it like a backward branch.
641 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
642 any alignment we'd encounter, so we skip the call to align_fuzz. */
643 return insn_current_address;
644 dest = JUMP_LABEL (branch);
646 /* BRANCH has no proper alignment chain set, so use SEQ.
647 BRANCH also has no INSN_SHUID. */
648 if (INSN_SHUID (seq) < INSN_SHUID (dest))
650 /* Forward branch. */
651 return (insn_last_address + insn_lengths[seq_uid]
652 - align_fuzz (seq, dest, length_unit_log, ~0));
654 else
656 /* Backward branch. */
657 return (insn_current_address
658 + align_fuzz (dest, seq, length_unit_log, ~0));
661 #endif /* HAVE_ATTR_length */
663 void
664 compute_alignments (void)
666 int log, max_skip, max_log;
667 basic_block bb;
669 if (label_align)
671 free (label_align);
672 label_align = 0;
675 max_labelno = max_label_num ();
676 min_labelno = get_first_label_num ();
677 label_align = xcalloc (max_labelno - min_labelno + 1,
678 sizeof (struct label_alignment));
680 /* If not optimizing or optimizing for size, don't assign any alignments. */
681 if (! optimize || optimize_size)
682 return;
684 FOR_EACH_BB (bb)
686 rtx label = BB_HEAD (bb);
687 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
688 edge e;
689 edge_iterator ei;
691 if (!LABEL_P (label)
692 || probably_never_executed_bb_p (bb))
693 continue;
694 max_log = LABEL_ALIGN (label);
695 max_skip = LABEL_ALIGN_MAX_SKIP;
697 FOR_EACH_EDGE (e, ei, bb->preds)
699 if (e->flags & EDGE_FALLTHRU)
700 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
701 else
702 branch_frequency += EDGE_FREQUENCY (e);
705 /* There are two purposes to align block with no fallthru incoming edge:
706 1) to avoid fetch stalls when branch destination is near cache boundary
707 2) to improve cache efficiency in case the previous block is not executed
708 (so it does not need to be in the cache).
710 We to catch first case, we align frequently executed blocks.
711 To catch the second, we align blocks that are executed more frequently
712 than the predecessor and the predecessor is likely to not be executed
713 when function is called. */
715 if (!has_fallthru
716 && (branch_frequency > BB_FREQ_MAX / 10
717 || (bb->frequency > bb->prev_bb->frequency * 10
718 && (bb->prev_bb->frequency
719 <= ENTRY_BLOCK_PTR->frequency / 2))))
721 log = JUMP_ALIGN (label);
722 if (max_log < log)
724 max_log = log;
725 max_skip = JUMP_ALIGN_MAX_SKIP;
728 /* In case block is frequent and reached mostly by non-fallthru edge,
729 align it. It is most likely a first block of loop. */
730 if (has_fallthru
731 && maybe_hot_bb_p (bb)
732 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
733 && branch_frequency > fallthru_frequency * 2)
735 log = LOOP_ALIGN (label);
736 if (max_log < log)
738 max_log = log;
739 max_skip = LOOP_ALIGN_MAX_SKIP;
742 LABEL_TO_ALIGNMENT (label) = max_log;
743 LABEL_TO_MAX_SKIP (label) = max_skip;
747 struct tree_opt_pass pass_compute_alignments =
749 NULL, /* name */
750 NULL, /* gate */
751 compute_alignments, /* execute */
752 NULL, /* sub */
753 NULL, /* next */
754 0, /* static_pass_number */
755 0, /* tv_id */
756 0, /* properties_required */
757 0, /* properties_provided */
758 0, /* properties_destroyed */
759 0, /* todo_flags_start */
760 0, /* todo_flags_finish */
761 0 /* letter */
765 /* Make a pass over all insns and compute their actual lengths by shortening
766 any branches of variable length if possible. */
768 /* shorten_branches might be called multiple times: for example, the SH
769 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
770 In order to do this, it needs proper length information, which it obtains
771 by calling shorten_branches. This cannot be collapsed with
772 shorten_branches itself into a single pass unless we also want to integrate
773 reorg.c, since the branch splitting exposes new instructions with delay
774 slots. */
776 void
777 shorten_branches (rtx first ATTRIBUTE_UNUSED)
779 rtx insn;
780 int max_uid;
781 int i;
782 int max_log;
783 int max_skip;
784 #ifdef HAVE_ATTR_length
785 #define MAX_CODE_ALIGN 16
786 rtx seq;
787 int something_changed = 1;
788 char *varying_length;
789 rtx body;
790 int uid;
791 rtx align_tab[MAX_CODE_ALIGN];
793 #endif
795 /* Compute maximum UID and allocate label_align / uid_shuid. */
796 max_uid = get_max_uid ();
798 /* Free uid_shuid before reallocating it. */
799 free (uid_shuid);
801 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
803 if (max_labelno != max_label_num ())
805 int old = max_labelno;
806 int n_labels;
807 int n_old_labels;
809 max_labelno = max_label_num ();
811 n_labels = max_labelno - min_labelno + 1;
812 n_old_labels = old - min_labelno + 1;
814 label_align = xrealloc (label_align,
815 n_labels * sizeof (struct label_alignment));
817 /* Range of labels grows monotonically in the function. Failing here
818 means that the initialization of array got lost. */
819 gcc_assert (n_old_labels <= n_labels);
821 memset (label_align + n_old_labels, 0,
822 (n_labels - n_old_labels) * sizeof (struct label_alignment));
825 /* Initialize label_align and set up uid_shuid to be strictly
826 monotonically rising with insn order. */
827 /* We use max_log here to keep track of the maximum alignment we want to
828 impose on the next CODE_LABEL (or the current one if we are processing
829 the CODE_LABEL itself). */
831 max_log = 0;
832 max_skip = 0;
834 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
836 int log;
838 INSN_SHUID (insn) = i++;
839 if (INSN_P (insn))
841 /* reorg might make the first insn of a loop being run once only,
842 and delete the label in front of it. Then we want to apply
843 the loop alignment to the new label created by reorg, which
844 is separated by the former loop start insn from the
845 NOTE_INSN_LOOP_BEG. */
847 else if (LABEL_P (insn))
849 rtx next;
851 /* Merge in alignments computed by compute_alignments. */
852 log = LABEL_TO_ALIGNMENT (insn);
853 if (max_log < log)
855 max_log = log;
856 max_skip = LABEL_TO_MAX_SKIP (insn);
859 log = LABEL_ALIGN (insn);
860 if (max_log < log)
862 max_log = log;
863 max_skip = LABEL_ALIGN_MAX_SKIP;
865 next = next_nonnote_insn (insn);
866 /* ADDR_VECs only take room if read-only data goes into the text
867 section. */
868 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
869 if (next && JUMP_P (next))
871 rtx nextbody = PATTERN (next);
872 if (GET_CODE (nextbody) == ADDR_VEC
873 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
875 log = ADDR_VEC_ALIGN (next);
876 if (max_log < log)
878 max_log = log;
879 max_skip = LABEL_ALIGN_MAX_SKIP;
883 LABEL_TO_ALIGNMENT (insn) = max_log;
884 LABEL_TO_MAX_SKIP (insn) = max_skip;
885 max_log = 0;
886 max_skip = 0;
888 else if (BARRIER_P (insn))
890 rtx label;
892 for (label = insn; label && ! INSN_P (label);
893 label = NEXT_INSN (label))
894 if (LABEL_P (label))
896 log = LABEL_ALIGN_AFTER_BARRIER (insn);
897 if (max_log < log)
899 max_log = log;
900 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
902 break;
906 #ifdef HAVE_ATTR_length
908 /* Allocate the rest of the arrays. */
909 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
910 insn_lengths_max_uid = max_uid;
911 /* Syntax errors can lead to labels being outside of the main insn stream.
912 Initialize insn_addresses, so that we get reproducible results. */
913 INSN_ADDRESSES_ALLOC (max_uid);
915 varying_length = xcalloc (max_uid, sizeof (char));
917 /* Initialize uid_align. We scan instructions
918 from end to start, and keep in align_tab[n] the last seen insn
919 that does an alignment of at least n+1, i.e. the successor
920 in the alignment chain for an insn that does / has a known
921 alignment of n. */
922 uid_align = xcalloc (max_uid, sizeof *uid_align);
924 for (i = MAX_CODE_ALIGN; --i >= 0;)
925 align_tab[i] = NULL_RTX;
926 seq = get_last_insn ();
927 for (; seq; seq = PREV_INSN (seq))
929 int uid = INSN_UID (seq);
930 int log;
931 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
932 uid_align[uid] = align_tab[0];
933 if (log)
935 /* Found an alignment label. */
936 uid_align[uid] = align_tab[log];
937 for (i = log - 1; i >= 0; i--)
938 align_tab[i] = seq;
941 #ifdef CASE_VECTOR_SHORTEN_MODE
942 if (optimize)
944 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
945 label fields. */
947 int min_shuid = INSN_SHUID (get_insns ()) - 1;
948 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
949 int rel;
951 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
953 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
954 int len, i, min, max, insn_shuid;
955 int min_align;
956 addr_diff_vec_flags flags;
958 if (!JUMP_P (insn)
959 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
960 continue;
961 pat = PATTERN (insn);
962 len = XVECLEN (pat, 1);
963 gcc_assert (len > 0);
964 min_align = MAX_CODE_ALIGN;
965 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
967 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
968 int shuid = INSN_SHUID (lab);
969 if (shuid < min)
971 min = shuid;
972 min_lab = lab;
974 if (shuid > max)
976 max = shuid;
977 max_lab = lab;
979 if (min_align > LABEL_TO_ALIGNMENT (lab))
980 min_align = LABEL_TO_ALIGNMENT (lab);
982 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
983 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
984 insn_shuid = INSN_SHUID (insn);
985 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
986 memset (&flags, 0, sizeof (flags));
987 flags.min_align = min_align;
988 flags.base_after_vec = rel > insn_shuid;
989 flags.min_after_vec = min > insn_shuid;
990 flags.max_after_vec = max > insn_shuid;
991 flags.min_after_base = min > rel;
992 flags.max_after_base = max > rel;
993 ADDR_DIFF_VEC_FLAGS (pat) = flags;
996 #endif /* CASE_VECTOR_SHORTEN_MODE */
998 /* Compute initial lengths, addresses, and varying flags for each insn. */
999 for (insn_current_address = 0, insn = first;
1000 insn != 0;
1001 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1003 uid = INSN_UID (insn);
1005 insn_lengths[uid] = 0;
1007 if (LABEL_P (insn))
1009 int log = LABEL_TO_ALIGNMENT (insn);
1010 if (log)
1012 int align = 1 << log;
1013 int new_address = (insn_current_address + align - 1) & -align;
1014 insn_lengths[uid] = new_address - insn_current_address;
1018 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1020 if (NOTE_P (insn) || BARRIER_P (insn)
1021 || LABEL_P (insn))
1022 continue;
1023 if (INSN_DELETED_P (insn))
1024 continue;
1026 body = PATTERN (insn);
1027 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1029 /* This only takes room if read-only data goes into the text
1030 section. */
1031 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1032 insn_lengths[uid] = (XVECLEN (body,
1033 GET_CODE (body) == ADDR_DIFF_VEC)
1034 * GET_MODE_SIZE (GET_MODE (body)));
1035 /* Alignment is handled by ADDR_VEC_ALIGN. */
1037 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1038 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1039 else if (GET_CODE (body) == SEQUENCE)
1041 int i;
1042 int const_delay_slots;
1043 #ifdef DELAY_SLOTS
1044 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1045 #else
1046 const_delay_slots = 0;
1047 #endif
1048 /* Inside a delay slot sequence, we do not do any branch shortening
1049 if the shortening could change the number of delay slots
1050 of the branch. */
1051 for (i = 0; i < XVECLEN (body, 0); i++)
1053 rtx inner_insn = XVECEXP (body, 0, i);
1054 int inner_uid = INSN_UID (inner_insn);
1055 int inner_length;
1057 if (GET_CODE (body) == ASM_INPUT
1058 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1059 inner_length = (asm_insn_count (PATTERN (inner_insn))
1060 * insn_default_length (inner_insn));
1061 else
1062 inner_length = insn_default_length (inner_insn);
1064 insn_lengths[inner_uid] = inner_length;
1065 if (const_delay_slots)
1067 if ((varying_length[inner_uid]
1068 = insn_variable_length_p (inner_insn)) != 0)
1069 varying_length[uid] = 1;
1070 INSN_ADDRESSES (inner_uid) = (insn_current_address
1071 + insn_lengths[uid]);
1073 else
1074 varying_length[inner_uid] = 0;
1075 insn_lengths[uid] += inner_length;
1078 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1080 insn_lengths[uid] = insn_default_length (insn);
1081 varying_length[uid] = insn_variable_length_p (insn);
1084 /* If needed, do any adjustment. */
1085 #ifdef ADJUST_INSN_LENGTH
1086 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1087 if (insn_lengths[uid] < 0)
1088 fatal_insn ("negative insn length", insn);
1089 #endif
1092 /* Now loop over all the insns finding varying length insns. For each,
1093 get the current insn length. If it has changed, reflect the change.
1094 When nothing changes for a full pass, we are done. */
1096 while (something_changed)
1098 something_changed = 0;
1099 insn_current_align = MAX_CODE_ALIGN - 1;
1100 for (insn_current_address = 0, insn = first;
1101 insn != 0;
1102 insn = NEXT_INSN (insn))
1104 int new_length;
1105 #ifdef ADJUST_INSN_LENGTH
1106 int tmp_length;
1107 #endif
1108 int length_align;
1110 uid = INSN_UID (insn);
1112 if (LABEL_P (insn))
1114 int log = LABEL_TO_ALIGNMENT (insn);
1115 if (log > insn_current_align)
1117 int align = 1 << log;
1118 int new_address= (insn_current_address + align - 1) & -align;
1119 insn_lengths[uid] = new_address - insn_current_address;
1120 insn_current_align = log;
1121 insn_current_address = new_address;
1123 else
1124 insn_lengths[uid] = 0;
1125 INSN_ADDRESSES (uid) = insn_current_address;
1126 continue;
1129 length_align = INSN_LENGTH_ALIGNMENT (insn);
1130 if (length_align < insn_current_align)
1131 insn_current_align = length_align;
1133 insn_last_address = INSN_ADDRESSES (uid);
1134 INSN_ADDRESSES (uid) = insn_current_address;
1136 #ifdef CASE_VECTOR_SHORTEN_MODE
1137 if (optimize && JUMP_P (insn)
1138 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1140 rtx body = PATTERN (insn);
1141 int old_length = insn_lengths[uid];
1142 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1143 rtx min_lab = XEXP (XEXP (body, 2), 0);
1144 rtx max_lab = XEXP (XEXP (body, 3), 0);
1145 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1146 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1147 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1148 rtx prev;
1149 int rel_align = 0;
1150 addr_diff_vec_flags flags;
1152 /* Avoid automatic aggregate initialization. */
1153 flags = ADDR_DIFF_VEC_FLAGS (body);
1155 /* Try to find a known alignment for rel_lab. */
1156 for (prev = rel_lab;
1157 prev
1158 && ! insn_lengths[INSN_UID (prev)]
1159 && ! (varying_length[INSN_UID (prev)] & 1);
1160 prev = PREV_INSN (prev))
1161 if (varying_length[INSN_UID (prev)] & 2)
1163 rel_align = LABEL_TO_ALIGNMENT (prev);
1164 break;
1167 /* See the comment on addr_diff_vec_flags in rtl.h for the
1168 meaning of the flags values. base: REL_LAB vec: INSN */
1169 /* Anything after INSN has still addresses from the last
1170 pass; adjust these so that they reflect our current
1171 estimate for this pass. */
1172 if (flags.base_after_vec)
1173 rel_addr += insn_current_address - insn_last_address;
1174 if (flags.min_after_vec)
1175 min_addr += insn_current_address - insn_last_address;
1176 if (flags.max_after_vec)
1177 max_addr += insn_current_address - insn_last_address;
1178 /* We want to know the worst case, i.e. lowest possible value
1179 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1180 its offset is positive, and we have to be wary of code shrink;
1181 otherwise, it is negative, and we have to be vary of code
1182 size increase. */
1183 if (flags.min_after_base)
1185 /* If INSN is between REL_LAB and MIN_LAB, the size
1186 changes we are about to make can change the alignment
1187 within the observed offset, therefore we have to break
1188 it up into two parts that are independent. */
1189 if (! flags.base_after_vec && flags.min_after_vec)
1191 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1192 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1194 else
1195 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1197 else
1199 if (flags.base_after_vec && ! flags.min_after_vec)
1201 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1202 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1204 else
1205 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1207 /* Likewise, determine the highest lowest possible value
1208 for the offset of MAX_LAB. */
1209 if (flags.max_after_base)
1211 if (! flags.base_after_vec && flags.max_after_vec)
1213 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1214 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1216 else
1217 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1219 else
1221 if (flags.base_after_vec && ! flags.max_after_vec)
1223 max_addr += align_fuzz (max_lab, insn, 0, 0);
1224 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1226 else
1227 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1229 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1230 max_addr - rel_addr,
1231 body));
1232 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1234 insn_lengths[uid]
1235 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1236 insn_current_address += insn_lengths[uid];
1237 if (insn_lengths[uid] != old_length)
1238 something_changed = 1;
1241 continue;
1243 #endif /* CASE_VECTOR_SHORTEN_MODE */
1245 if (! (varying_length[uid]))
1247 if (NONJUMP_INSN_P (insn)
1248 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1250 int i;
1252 body = PATTERN (insn);
1253 for (i = 0; i < XVECLEN (body, 0); i++)
1255 rtx inner_insn = XVECEXP (body, 0, i);
1256 int inner_uid = INSN_UID (inner_insn);
1258 INSN_ADDRESSES (inner_uid) = insn_current_address;
1260 insn_current_address += insn_lengths[inner_uid];
1263 else
1264 insn_current_address += insn_lengths[uid];
1266 continue;
1269 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1271 int i;
1273 body = PATTERN (insn);
1274 new_length = 0;
1275 for (i = 0; i < XVECLEN (body, 0); i++)
1277 rtx inner_insn = XVECEXP (body, 0, i);
1278 int inner_uid = INSN_UID (inner_insn);
1279 int inner_length;
1281 INSN_ADDRESSES (inner_uid) = insn_current_address;
1283 /* insn_current_length returns 0 for insns with a
1284 non-varying length. */
1285 if (! varying_length[inner_uid])
1286 inner_length = insn_lengths[inner_uid];
1287 else
1288 inner_length = insn_current_length (inner_insn);
1290 if (inner_length != insn_lengths[inner_uid])
1292 insn_lengths[inner_uid] = inner_length;
1293 something_changed = 1;
1295 insn_current_address += insn_lengths[inner_uid];
1296 new_length += inner_length;
1299 else
1301 new_length = insn_current_length (insn);
1302 insn_current_address += new_length;
1305 #ifdef ADJUST_INSN_LENGTH
1306 /* If needed, do any adjustment. */
1307 tmp_length = new_length;
1308 ADJUST_INSN_LENGTH (insn, new_length);
1309 insn_current_address += (new_length - tmp_length);
1310 #endif
1312 if (new_length != insn_lengths[uid])
1314 insn_lengths[uid] = new_length;
1315 something_changed = 1;
1318 /* For a non-optimizing compile, do only a single pass. */
1319 if (!optimize)
1320 break;
1323 free (varying_length);
1325 #endif /* HAVE_ATTR_length */
1328 #ifdef HAVE_ATTR_length
1329 /* Given the body of an INSN known to be generated by an ASM statement, return
1330 the number of machine instructions likely to be generated for this insn.
1331 This is used to compute its length. */
1333 static int
1334 asm_insn_count (rtx body)
1336 const char *template;
1337 int count = 1;
1339 if (GET_CODE (body) == ASM_INPUT)
1340 template = XSTR (body, 0);
1341 else
1342 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1344 for (; *template; template++)
1345 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1346 count++;
1348 return count;
1350 #endif
1352 /* Output assembler code for the start of a function,
1353 and initialize some of the variables in this file
1354 for the new function. The label for the function and associated
1355 assembler pseudo-ops have already been output in `assemble_start_function'.
1357 FIRST is the first insn of the rtl for the function being compiled.
1358 FILE is the file to write assembler code to.
1359 OPTIMIZE is nonzero if we should eliminate redundant
1360 test and compare insns. */
1362 void
1363 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1364 int optimize ATTRIBUTE_UNUSED)
1366 block_depth = 0;
1368 this_is_asm_operands = 0;
1370 last_filename = locator_file (prologue_locator);
1371 last_linenum = locator_line (prologue_locator);
1373 high_block_linenum = high_function_linenum = last_linenum;
1375 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1377 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1378 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1379 dwarf2out_begin_prologue (0, NULL);
1380 #endif
1382 #ifdef LEAF_REG_REMAP
1383 if (current_function_uses_only_leaf_regs)
1384 leaf_renumber_regs (first);
1385 #endif
1387 /* The Sun386i and perhaps other machines don't work right
1388 if the profiling code comes after the prologue. */
1389 #ifdef PROFILE_BEFORE_PROLOGUE
1390 if (current_function_profile)
1391 profile_function (file);
1392 #endif /* PROFILE_BEFORE_PROLOGUE */
1394 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1395 if (dwarf2out_do_frame ())
1396 dwarf2out_frame_debug (NULL_RTX, false);
1397 #endif
1399 /* If debugging, assign block numbers to all of the blocks in this
1400 function. */
1401 if (write_symbols)
1403 remove_unnecessary_notes ();
1404 reemit_insn_block_notes ();
1405 number_blocks (current_function_decl);
1406 /* We never actually put out begin/end notes for the top-level
1407 block in the function. But, conceptually, that block is
1408 always needed. */
1409 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1412 /* First output the function prologue: code to set up the stack frame. */
1413 targetm.asm_out.function_prologue (file, get_frame_size ());
1415 /* If the machine represents the prologue as RTL, the profiling code must
1416 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1417 #ifdef HAVE_prologue
1418 if (! HAVE_prologue)
1419 #endif
1420 profile_after_prologue (file);
1423 static void
1424 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1426 #ifndef PROFILE_BEFORE_PROLOGUE
1427 if (current_function_profile)
1428 profile_function (file);
1429 #endif /* not PROFILE_BEFORE_PROLOGUE */
1432 static void
1433 profile_function (FILE *file ATTRIBUTE_UNUSED)
1435 #ifndef NO_PROFILE_COUNTERS
1436 # define NO_PROFILE_COUNTERS 0
1437 #endif
1438 #if defined(ASM_OUTPUT_REG_PUSH)
1439 int sval = current_function_returns_struct;
1440 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1441 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1442 int cxt = cfun->static_chain_decl != NULL;
1443 #endif
1444 #endif /* ASM_OUTPUT_REG_PUSH */
1446 if (! NO_PROFILE_COUNTERS)
1448 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1449 data_section ();
1450 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1451 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1452 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1455 current_function_section (current_function_decl);
1457 #if defined(ASM_OUTPUT_REG_PUSH)
1458 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1459 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1460 #endif
1462 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1463 if (cxt)
1464 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1465 #else
1466 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1467 if (cxt)
1469 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1471 #endif
1472 #endif
1474 FUNCTION_PROFILER (file, current_function_funcdef_no);
1476 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1477 if (cxt)
1478 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1479 #else
1480 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1481 if (cxt)
1483 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1485 #endif
1486 #endif
1488 #if defined(ASM_OUTPUT_REG_PUSH)
1489 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1490 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1491 #endif
1494 /* Output assembler code for the end of a function.
1495 For clarity, args are same as those of `final_start_function'
1496 even though not all of them are needed. */
1498 void
1499 final_end_function (void)
1501 app_disable ();
1503 (*debug_hooks->end_function) (high_function_linenum);
1505 /* Finally, output the function epilogue:
1506 code to restore the stack frame and return to the caller. */
1507 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1509 /* And debug output. */
1510 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1512 #if defined (DWARF2_UNWIND_INFO)
1513 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1514 && dwarf2out_do_frame ())
1515 dwarf2out_end_epilogue (last_linenum, last_filename);
1516 #endif
1519 /* Output assembler code for some insns: all or part of a function.
1520 For description of args, see `final_start_function', above. */
1522 void
1523 final (rtx first, FILE *file, int optimize)
1525 rtx insn;
1526 int max_uid = 0;
1527 int seen = 0;
1529 last_ignored_compare = 0;
1531 #ifdef SDB_DEBUGGING_INFO
1532 /* When producing SDB debugging info, delete troublesome line number
1533 notes from inlined functions in other files as well as duplicate
1534 line number notes. */
1535 if (write_symbols == SDB_DEBUG)
1537 rtx last = 0;
1538 for (insn = first; insn; insn = NEXT_INSN (insn))
1539 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
1541 if (last != 0
1542 #ifdef USE_MAPPED_LOCATION
1543 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1544 #else
1545 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1546 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1547 #endif
1550 delete_insn (insn); /* Use delete_note. */
1551 continue;
1553 last = insn;
1556 #endif
1558 for (insn = first; insn; insn = NEXT_INSN (insn))
1560 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1561 max_uid = INSN_UID (insn);
1562 #ifdef HAVE_cc0
1563 /* If CC tracking across branches is enabled, record the insn which
1564 jumps to each branch only reached from one place. */
1565 if (optimize && JUMP_P (insn))
1567 rtx lab = JUMP_LABEL (insn);
1568 if (lab && LABEL_NUSES (lab) == 1)
1570 LABEL_REFS (lab) = insn;
1573 #endif
1576 init_recog ();
1578 CC_STATUS_INIT;
1580 /* Output the insns. */
1581 for (insn = NEXT_INSN (first); insn;)
1583 #ifdef HAVE_ATTR_length
1584 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1586 /* This can be triggered by bugs elsewhere in the compiler if
1587 new insns are created after init_insn_lengths is called. */
1588 gcc_assert (NOTE_P (insn));
1589 insn_current_address = -1;
1591 else
1592 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1593 #endif /* HAVE_ATTR_length */
1595 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1599 const char *
1600 get_insn_template (int code, rtx insn)
1602 switch (insn_data[code].output_format)
1604 case INSN_OUTPUT_FORMAT_SINGLE:
1605 return insn_data[code].output.single;
1606 case INSN_OUTPUT_FORMAT_MULTI:
1607 return insn_data[code].output.multi[which_alternative];
1608 case INSN_OUTPUT_FORMAT_FUNCTION:
1609 gcc_assert (insn);
1610 return (*insn_data[code].output.function) (recog_data.operand, insn);
1612 default:
1613 gcc_unreachable ();
1617 /* Emit the appropriate declaration for an alternate-entry-point
1618 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1619 LABEL_KIND != LABEL_NORMAL.
1621 The case fall-through in this function is intentional. */
1622 static void
1623 output_alternate_entry_point (FILE *file, rtx insn)
1625 const char *name = LABEL_NAME (insn);
1627 switch (LABEL_KIND (insn))
1629 case LABEL_WEAK_ENTRY:
1630 #ifdef ASM_WEAKEN_LABEL
1631 ASM_WEAKEN_LABEL (file, name);
1632 #endif
1633 case LABEL_GLOBAL_ENTRY:
1634 targetm.asm_out.globalize_label (file, name);
1635 case LABEL_STATIC_ENTRY:
1636 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1637 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1638 #endif
1639 ASM_OUTPUT_LABEL (file, name);
1640 break;
1642 case LABEL_NORMAL:
1643 default:
1644 gcc_unreachable ();
1648 /* The final scan for one insn, INSN.
1649 Args are same as in `final', except that INSN
1650 is the insn being scanned.
1651 Value returned is the next insn to be scanned.
1653 NOPEEPHOLES is the flag to disallow peephole processing (currently
1654 used for within delayed branch sequence output).
1656 SEEN is used to track the end of the prologue, for emitting
1657 debug information. We force the emission of a line note after
1658 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1659 at the beginning of the second basic block, whichever comes
1660 first. */
1663 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1664 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1666 #ifdef HAVE_cc0
1667 rtx set;
1668 #endif
1669 rtx next;
1671 insn_counter++;
1673 /* Ignore deleted insns. These can occur when we split insns (due to a
1674 template of "#") while not optimizing. */
1675 if (INSN_DELETED_P (insn))
1676 return NEXT_INSN (insn);
1678 switch (GET_CODE (insn))
1680 case NOTE:
1681 switch (NOTE_LINE_NUMBER (insn))
1683 case NOTE_INSN_DELETED:
1684 case NOTE_INSN_LOOP_BEG:
1685 case NOTE_INSN_LOOP_END:
1686 case NOTE_INSN_FUNCTION_END:
1687 case NOTE_INSN_REPEATED_LINE_NUMBER:
1688 case NOTE_INSN_EXPECTED_VALUE:
1689 break;
1691 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1693 /* The presence of this note indicates that this basic block
1694 belongs in the "cold" section of the .o file. If we are
1695 not already writing to the cold section we need to change
1696 to it. */
1698 if (last_text_section == in_text)
1700 (*debug_hooks->switch_text_section) ();
1701 unlikely_text_section ();
1703 else
1705 (*debug_hooks->switch_text_section) ();
1706 text_section ();
1708 break;
1710 case NOTE_INSN_BASIC_BLOCK:
1712 #ifdef TARGET_UNWIND_INFO
1713 targetm.asm_out.unwind_emit (asm_out_file, insn);
1714 #endif
1716 if (flag_debug_asm)
1717 fprintf (asm_out_file, "\t%s basic block %d\n",
1718 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1720 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1722 *seen |= SEEN_EMITTED;
1723 last_filename = NULL;
1725 else
1726 *seen |= SEEN_BB;
1728 break;
1730 case NOTE_INSN_EH_REGION_BEG:
1731 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1732 NOTE_EH_HANDLER (insn));
1733 break;
1735 case NOTE_INSN_EH_REGION_END:
1736 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1737 NOTE_EH_HANDLER (insn));
1738 break;
1740 case NOTE_INSN_PROLOGUE_END:
1741 targetm.asm_out.function_end_prologue (file);
1742 profile_after_prologue (file);
1744 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1746 *seen |= SEEN_EMITTED;
1747 last_filename = NULL;
1749 else
1750 *seen |= SEEN_NOTE;
1752 break;
1754 case NOTE_INSN_EPILOGUE_BEG:
1755 targetm.asm_out.function_begin_epilogue (file);
1756 break;
1758 case NOTE_INSN_FUNCTION_BEG:
1759 app_disable ();
1760 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1762 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1764 *seen |= SEEN_EMITTED;
1765 last_filename = NULL;
1767 else
1768 *seen |= SEEN_NOTE;
1770 break;
1772 case NOTE_INSN_BLOCK_BEG:
1773 if (debug_info_level == DINFO_LEVEL_NORMAL
1774 || debug_info_level == DINFO_LEVEL_VERBOSE
1775 || write_symbols == DWARF2_DEBUG
1776 || write_symbols == VMS_AND_DWARF2_DEBUG
1777 || write_symbols == VMS_DEBUG)
1779 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1781 app_disable ();
1782 ++block_depth;
1783 high_block_linenum = last_linenum;
1785 /* Output debugging info about the symbol-block beginning. */
1786 (*debug_hooks->begin_block) (last_linenum, n);
1788 /* Mark this block as output. */
1789 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1791 break;
1793 case NOTE_INSN_BLOCK_END:
1794 if (debug_info_level == DINFO_LEVEL_NORMAL
1795 || debug_info_level == DINFO_LEVEL_VERBOSE
1796 || write_symbols == DWARF2_DEBUG
1797 || write_symbols == VMS_AND_DWARF2_DEBUG
1798 || write_symbols == VMS_DEBUG)
1800 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1802 app_disable ();
1804 /* End of a symbol-block. */
1805 --block_depth;
1806 gcc_assert (block_depth >= 0);
1808 (*debug_hooks->end_block) (high_block_linenum, n);
1810 break;
1812 case NOTE_INSN_DELETED_LABEL:
1813 /* Emit the label. We may have deleted the CODE_LABEL because
1814 the label could be proved to be unreachable, though still
1815 referenced (in the form of having its address taken. */
1816 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1817 break;
1819 case NOTE_INSN_VAR_LOCATION:
1820 (*debug_hooks->var_location) (insn);
1821 break;
1823 case 0:
1824 break;
1826 default:
1827 gcc_assert (NOTE_LINE_NUMBER (insn) > 0);
1828 break;
1830 break;
1832 case BARRIER:
1833 #if defined (DWARF2_UNWIND_INFO)
1834 if (dwarf2out_do_frame ())
1835 dwarf2out_frame_debug (insn, false);
1836 #endif
1837 break;
1839 case CODE_LABEL:
1840 /* The target port might emit labels in the output function for
1841 some insn, e.g. sh.c output_branchy_insn. */
1842 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1844 int align = LABEL_TO_ALIGNMENT (insn);
1845 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1846 int max_skip = LABEL_TO_MAX_SKIP (insn);
1847 #endif
1849 if (align && NEXT_INSN (insn))
1851 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1852 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1853 #else
1854 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1855 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1856 #else
1857 ASM_OUTPUT_ALIGN (file, align);
1858 #endif
1859 #endif
1862 #ifdef HAVE_cc0
1863 CC_STATUS_INIT;
1864 /* If this label is reached from only one place, set the condition
1865 codes from the instruction just before the branch. */
1867 /* Disabled because some insns set cc_status in the C output code
1868 and NOTICE_UPDATE_CC alone can set incorrect status. */
1869 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1871 rtx jump = LABEL_REFS (insn);
1872 rtx barrier = prev_nonnote_insn (insn);
1873 rtx prev;
1874 /* If the LABEL_REFS field of this label has been set to point
1875 at a branch, the predecessor of the branch is a regular
1876 insn, and that branch is the only way to reach this label,
1877 set the condition codes based on the branch and its
1878 predecessor. */
1879 if (barrier && BARRIER_P (barrier)
1880 && jump && JUMP_P (jump)
1881 && (prev = prev_nonnote_insn (jump))
1882 && NONJUMP_INSN_P (prev))
1884 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1885 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1888 #endif
1890 if (LABEL_NAME (insn))
1891 (*debug_hooks->label) (insn);
1893 if (app_on)
1895 fputs (ASM_APP_OFF, file);
1896 app_on = 0;
1899 next = next_nonnote_insn (insn);
1900 if (next != 0 && JUMP_P (next))
1902 rtx nextbody = PATTERN (next);
1904 /* If this label is followed by a jump-table,
1905 make sure we put the label in the read-only section. Also
1906 possibly write the label and jump table together. */
1908 if (GET_CODE (nextbody) == ADDR_VEC
1909 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1911 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1912 /* In this case, the case vector is being moved by the
1913 target, so don't output the label at all. Leave that
1914 to the back end macros. */
1915 #else
1916 if (! JUMP_TABLES_IN_TEXT_SECTION)
1918 int log_align;
1920 targetm.asm_out.function_rodata_section (current_function_decl);
1922 #ifdef ADDR_VEC_ALIGN
1923 log_align = ADDR_VEC_ALIGN (next);
1924 #else
1925 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1926 #endif
1927 ASM_OUTPUT_ALIGN (file, log_align);
1929 else
1930 current_function_section (current_function_decl);
1932 #ifdef ASM_OUTPUT_CASE_LABEL
1933 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1934 next);
1935 #else
1936 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1937 #endif
1938 #endif
1939 break;
1942 if (LABEL_ALT_ENTRY_P (insn))
1943 output_alternate_entry_point (file, insn);
1944 else
1945 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1946 break;
1948 default:
1950 rtx body = PATTERN (insn);
1951 int insn_code_number;
1952 const char *template;
1954 /* An INSN, JUMP_INSN or CALL_INSN.
1955 First check for special kinds that recog doesn't recognize. */
1957 if (GET_CODE (body) == USE /* These are just declarations. */
1958 || GET_CODE (body) == CLOBBER)
1959 break;
1961 #ifdef HAVE_cc0
1963 /* If there is a REG_CC_SETTER note on this insn, it means that
1964 the setting of the condition code was done in the delay slot
1965 of the insn that branched here. So recover the cc status
1966 from the insn that set it. */
1968 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1969 if (note)
1971 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1972 cc_prev_status = cc_status;
1975 #endif
1977 /* Detect insns that are really jump-tables
1978 and output them as such. */
1980 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1982 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1983 int vlen, idx;
1984 #endif
1986 if (! JUMP_TABLES_IN_TEXT_SECTION)
1987 targetm.asm_out.function_rodata_section (current_function_decl);
1988 else
1989 current_function_section (current_function_decl);
1991 if (app_on)
1993 fputs (ASM_APP_OFF, file);
1994 app_on = 0;
1997 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1998 if (GET_CODE (body) == ADDR_VEC)
2000 #ifdef ASM_OUTPUT_ADDR_VEC
2001 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2002 #else
2003 gcc_unreachable ();
2004 #endif
2006 else
2008 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2009 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2010 #else
2011 gcc_unreachable ();
2012 #endif
2014 #else
2015 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2016 for (idx = 0; idx < vlen; idx++)
2018 if (GET_CODE (body) == ADDR_VEC)
2020 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2021 ASM_OUTPUT_ADDR_VEC_ELT
2022 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2023 #else
2024 gcc_unreachable ();
2025 #endif
2027 else
2029 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2030 ASM_OUTPUT_ADDR_DIFF_ELT
2031 (file,
2032 body,
2033 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2034 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2035 #else
2036 gcc_unreachable ();
2037 #endif
2040 #ifdef ASM_OUTPUT_CASE_END
2041 ASM_OUTPUT_CASE_END (file,
2042 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2043 insn);
2044 #endif
2045 #endif
2047 current_function_section (current_function_decl);
2049 break;
2051 /* Output this line note if it is the first or the last line
2052 note in a row. */
2053 if (notice_source_line (insn))
2055 (*debug_hooks->source_line) (last_linenum, last_filename);
2058 if (GET_CODE (body) == ASM_INPUT)
2060 const char *string = XSTR (body, 0);
2062 /* There's no telling what that did to the condition codes. */
2063 CC_STATUS_INIT;
2065 if (string[0])
2067 if (! app_on)
2069 fputs (ASM_APP_ON, file);
2070 app_on = 1;
2072 fprintf (asm_out_file, "\t%s\n", string);
2074 break;
2077 /* Detect `asm' construct with operands. */
2078 if (asm_noperands (body) >= 0)
2080 unsigned int noperands = asm_noperands (body);
2081 rtx *ops = alloca (noperands * sizeof (rtx));
2082 const char *string;
2084 /* There's no telling what that did to the condition codes. */
2085 CC_STATUS_INIT;
2087 /* Get out the operand values. */
2088 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2089 /* Inhibit dieing on what would otherwise be compiler bugs. */
2090 insn_noperands = noperands;
2091 this_is_asm_operands = insn;
2093 #ifdef FINAL_PRESCAN_INSN
2094 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2095 #endif
2097 /* Output the insn using them. */
2098 if (string[0])
2100 if (! app_on)
2102 fputs (ASM_APP_ON, file);
2103 app_on = 1;
2105 output_asm_insn (string, ops);
2108 this_is_asm_operands = 0;
2109 break;
2112 if (app_on)
2114 fputs (ASM_APP_OFF, file);
2115 app_on = 0;
2118 if (GET_CODE (body) == SEQUENCE)
2120 /* A delayed-branch sequence */
2121 int i;
2123 final_sequence = body;
2125 /* Record the delay slots' frame information before the branch.
2126 This is needed for delayed calls: see execute_cfa_program(). */
2127 #if defined (DWARF2_UNWIND_INFO)
2128 if (dwarf2out_do_frame ())
2129 for (i = 1; i < XVECLEN (body, 0); i++)
2130 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2131 #endif
2133 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2134 force the restoration of a comparison that was previously
2135 thought unnecessary. If that happens, cancel this sequence
2136 and cause that insn to be restored. */
2138 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2139 if (next != XVECEXP (body, 0, 1))
2141 final_sequence = 0;
2142 return next;
2145 for (i = 1; i < XVECLEN (body, 0); i++)
2147 rtx insn = XVECEXP (body, 0, i);
2148 rtx next = NEXT_INSN (insn);
2149 /* We loop in case any instruction in a delay slot gets
2150 split. */
2152 insn = final_scan_insn (insn, file, 0, 1, seen);
2153 while (insn != next);
2155 #ifdef DBR_OUTPUT_SEQEND
2156 DBR_OUTPUT_SEQEND (file);
2157 #endif
2158 final_sequence = 0;
2160 /* If the insn requiring the delay slot was a CALL_INSN, the
2161 insns in the delay slot are actually executed before the
2162 called function. Hence we don't preserve any CC-setting
2163 actions in these insns and the CC must be marked as being
2164 clobbered by the function. */
2165 if (CALL_P (XVECEXP (body, 0, 0)))
2167 CC_STATUS_INIT;
2169 break;
2172 /* We have a real machine instruction as rtl. */
2174 body = PATTERN (insn);
2176 #ifdef HAVE_cc0
2177 set = single_set (insn);
2179 /* Check for redundant test and compare instructions
2180 (when the condition codes are already set up as desired).
2181 This is done only when optimizing; if not optimizing,
2182 it should be possible for the user to alter a variable
2183 with the debugger in between statements
2184 and the next statement should reexamine the variable
2185 to compute the condition codes. */
2187 if (optimize)
2189 if (set
2190 && GET_CODE (SET_DEST (set)) == CC0
2191 && insn != last_ignored_compare)
2193 if (GET_CODE (SET_SRC (set)) == SUBREG)
2194 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2195 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2197 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2198 XEXP (SET_SRC (set), 0)
2199 = alter_subreg (&XEXP (SET_SRC (set), 0));
2200 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2201 XEXP (SET_SRC (set), 1)
2202 = alter_subreg (&XEXP (SET_SRC (set), 1));
2204 if ((cc_status.value1 != 0
2205 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2206 || (cc_status.value2 != 0
2207 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2209 /* Don't delete insn if it has an addressing side-effect. */
2210 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2211 /* or if anything in it is volatile. */
2212 && ! volatile_refs_p (PATTERN (insn)))
2214 /* We don't really delete the insn; just ignore it. */
2215 last_ignored_compare = insn;
2216 break;
2221 #endif
2223 #ifdef HAVE_cc0
2224 /* If this is a conditional branch, maybe modify it
2225 if the cc's are in a nonstandard state
2226 so that it accomplishes the same thing that it would
2227 do straightforwardly if the cc's were set up normally. */
2229 if (cc_status.flags != 0
2230 && JUMP_P (insn)
2231 && GET_CODE (body) == SET
2232 && SET_DEST (body) == pc_rtx
2233 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2234 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2235 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2237 /* This function may alter the contents of its argument
2238 and clear some of the cc_status.flags bits.
2239 It may also return 1 meaning condition now always true
2240 or -1 meaning condition now always false
2241 or 2 meaning condition nontrivial but altered. */
2242 int result = alter_cond (XEXP (SET_SRC (body), 0));
2243 /* If condition now has fixed value, replace the IF_THEN_ELSE
2244 with its then-operand or its else-operand. */
2245 if (result == 1)
2246 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2247 if (result == -1)
2248 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2250 /* The jump is now either unconditional or a no-op.
2251 If it has become a no-op, don't try to output it.
2252 (It would not be recognized.) */
2253 if (SET_SRC (body) == pc_rtx)
2255 delete_insn (insn);
2256 break;
2258 else if (GET_CODE (SET_SRC (body)) == RETURN)
2259 /* Replace (set (pc) (return)) with (return). */
2260 PATTERN (insn) = body = SET_SRC (body);
2262 /* Rerecognize the instruction if it has changed. */
2263 if (result != 0)
2264 INSN_CODE (insn) = -1;
2267 /* Make same adjustments to instructions that examine the
2268 condition codes without jumping and instructions that
2269 handle conditional moves (if this machine has either one). */
2271 if (cc_status.flags != 0
2272 && set != 0)
2274 rtx cond_rtx, then_rtx, else_rtx;
2276 if (!JUMP_P (insn)
2277 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2279 cond_rtx = XEXP (SET_SRC (set), 0);
2280 then_rtx = XEXP (SET_SRC (set), 1);
2281 else_rtx = XEXP (SET_SRC (set), 2);
2283 else
2285 cond_rtx = SET_SRC (set);
2286 then_rtx = const_true_rtx;
2287 else_rtx = const0_rtx;
2290 switch (GET_CODE (cond_rtx))
2292 case GTU:
2293 case GT:
2294 case LTU:
2295 case LT:
2296 case GEU:
2297 case GE:
2298 case LEU:
2299 case LE:
2300 case EQ:
2301 case NE:
2303 int result;
2304 if (XEXP (cond_rtx, 0) != cc0_rtx)
2305 break;
2306 result = alter_cond (cond_rtx);
2307 if (result == 1)
2308 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2309 else if (result == -1)
2310 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2311 else if (result == 2)
2312 INSN_CODE (insn) = -1;
2313 if (SET_DEST (set) == SET_SRC (set))
2314 delete_insn (insn);
2316 break;
2318 default:
2319 break;
2323 #endif
2325 #ifdef HAVE_peephole
2326 /* Do machine-specific peephole optimizations if desired. */
2328 if (optimize && !flag_no_peephole && !nopeepholes)
2330 rtx next = peephole (insn);
2331 /* When peepholing, if there were notes within the peephole,
2332 emit them before the peephole. */
2333 if (next != 0 && next != NEXT_INSN (insn))
2335 rtx note, prev = PREV_INSN (insn);
2337 for (note = NEXT_INSN (insn); note != next;
2338 note = NEXT_INSN (note))
2339 final_scan_insn (note, file, optimize, nopeepholes, seen);
2341 /* Put the notes in the proper position for a later
2342 rescan. For example, the SH target can do this
2343 when generating a far jump in a delayed branch
2344 sequence. */
2345 note = NEXT_INSN (insn);
2346 PREV_INSN (note) = prev;
2347 NEXT_INSN (prev) = note;
2348 NEXT_INSN (PREV_INSN (next)) = insn;
2349 PREV_INSN (insn) = PREV_INSN (next);
2350 NEXT_INSN (insn) = next;
2351 PREV_INSN (next) = insn;
2354 /* PEEPHOLE might have changed this. */
2355 body = PATTERN (insn);
2357 #endif
2359 /* Try to recognize the instruction.
2360 If successful, verify that the operands satisfy the
2361 constraints for the instruction. Crash if they don't,
2362 since `reload' should have changed them so that they do. */
2364 insn_code_number = recog_memoized (insn);
2365 cleanup_subreg_operands (insn);
2367 /* Dump the insn in the assembly for debugging. */
2368 if (flag_dump_rtl_in_asm)
2370 print_rtx_head = ASM_COMMENT_START;
2371 print_rtl_single (asm_out_file, insn);
2372 print_rtx_head = "";
2375 if (! constrain_operands_cached (1))
2376 fatal_insn_not_found (insn);
2378 /* Some target machines need to prescan each insn before
2379 it is output. */
2381 #ifdef FINAL_PRESCAN_INSN
2382 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2383 #endif
2385 #ifdef HAVE_conditional_execution
2386 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2387 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2388 else
2389 current_insn_predicate = NULL_RTX;
2390 #endif
2392 #ifdef HAVE_cc0
2393 cc_prev_status = cc_status;
2395 /* Update `cc_status' for this instruction.
2396 The instruction's output routine may change it further.
2397 If the output routine for a jump insn needs to depend
2398 on the cc status, it should look at cc_prev_status. */
2400 NOTICE_UPDATE_CC (body, insn);
2401 #endif
2403 current_output_insn = debug_insn = insn;
2405 #if defined (DWARF2_UNWIND_INFO)
2406 if (CALL_P (insn) && dwarf2out_do_frame ())
2407 dwarf2out_frame_debug (insn, false);
2408 #endif
2410 /* Find the proper template for this insn. */
2411 template = get_insn_template (insn_code_number, insn);
2413 /* If the C code returns 0, it means that it is a jump insn
2414 which follows a deleted test insn, and that test insn
2415 needs to be reinserted. */
2416 if (template == 0)
2418 rtx prev;
2420 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2422 /* We have already processed the notes between the setter and
2423 the user. Make sure we don't process them again, this is
2424 particularly important if one of the notes is a block
2425 scope note or an EH note. */
2426 for (prev = insn;
2427 prev != last_ignored_compare;
2428 prev = PREV_INSN (prev))
2430 if (NOTE_P (prev))
2431 delete_insn (prev); /* Use delete_note. */
2434 return prev;
2437 /* If the template is the string "#", it means that this insn must
2438 be split. */
2439 if (template[0] == '#' && template[1] == '\0')
2441 rtx new = try_split (body, insn, 0);
2443 /* If we didn't split the insn, go away. */
2444 if (new == insn && PATTERN (new) == body)
2445 fatal_insn ("could not split insn", insn);
2447 #ifdef HAVE_ATTR_length
2448 /* This instruction should have been split in shorten_branches,
2449 to ensure that we would have valid length info for the
2450 splitees. */
2451 gcc_unreachable ();
2452 #endif
2454 return new;
2457 #ifdef TARGET_UNWIND_INFO
2458 /* ??? This will put the directives in the wrong place if
2459 get_insn_template outputs assembly directly. However calling it
2460 before get_insn_template breaks if the insns is split. */
2461 targetm.asm_out.unwind_emit (asm_out_file, insn);
2462 #endif
2464 /* Output assembler code from the template. */
2465 output_asm_insn (template, recog_data.operand);
2467 /* If necessary, report the effect that the instruction has on
2468 the unwind info. We've already done this for delay slots
2469 and call instructions. */
2470 #if defined (DWARF2_UNWIND_INFO)
2471 if (final_sequence == 0
2472 #if !defined (HAVE_prologue)
2473 && !ACCUMULATE_OUTGOING_ARGS
2474 #endif
2475 && dwarf2out_do_frame ())
2476 dwarf2out_frame_debug (insn, true);
2477 #endif
2479 current_output_insn = debug_insn = 0;
2482 return NEXT_INSN (insn);
2485 /* Output debugging info to the assembler file FILE
2486 based on the NOTE-insn INSN, assumed to be a line number. */
2488 static bool
2489 notice_source_line (rtx insn)
2491 const char *filename = insn_file (insn);
2492 int linenum = insn_line (insn);
2494 if (filename && (filename != last_filename || last_linenum != linenum))
2496 last_filename = filename;
2497 last_linenum = linenum;
2498 high_block_linenum = MAX (last_linenum, high_block_linenum);
2499 high_function_linenum = MAX (last_linenum, high_function_linenum);
2500 return true;
2502 return false;
2505 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2506 directly to the desired hard register. */
2508 void
2509 cleanup_subreg_operands (rtx insn)
2511 int i;
2512 extract_insn_cached (insn);
2513 for (i = 0; i < recog_data.n_operands; i++)
2515 /* The following test cannot use recog_data.operand when testing
2516 for a SUBREG: the underlying object might have been changed
2517 already if we are inside a match_operator expression that
2518 matches the else clause. Instead we test the underlying
2519 expression directly. */
2520 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2521 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2522 else if (GET_CODE (recog_data.operand[i]) == PLUS
2523 || GET_CODE (recog_data.operand[i]) == MULT
2524 || MEM_P (recog_data.operand[i]))
2525 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2528 for (i = 0; i < recog_data.n_dups; i++)
2530 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2531 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2532 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2533 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2534 || MEM_P (*recog_data.dup_loc[i]))
2535 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2539 /* If X is a SUBREG, replace it with a REG or a MEM,
2540 based on the thing it is a subreg of. */
2543 alter_subreg (rtx *xp)
2545 rtx x = *xp;
2546 rtx y = SUBREG_REG (x);
2548 /* simplify_subreg does not remove subreg from volatile references.
2549 We are required to. */
2550 if (MEM_P (y))
2552 int offset = SUBREG_BYTE (x);
2554 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2555 contains 0 instead of the proper offset. See simplify_subreg. */
2556 if (offset == 0
2557 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2559 int difference = GET_MODE_SIZE (GET_MODE (y))
2560 - GET_MODE_SIZE (GET_MODE (x));
2561 if (WORDS_BIG_ENDIAN)
2562 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2563 if (BYTES_BIG_ENDIAN)
2564 offset += difference % UNITS_PER_WORD;
2567 *xp = adjust_address (y, GET_MODE (x), offset);
2569 else
2571 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2572 SUBREG_BYTE (x));
2574 if (new != 0)
2575 *xp = new;
2576 else if (REG_P (y))
2578 /* Simplify_subreg can't handle some REG cases, but we have to. */
2579 unsigned int regno = subreg_regno (x);
2580 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2584 return *xp;
2587 /* Do alter_subreg on all the SUBREGs contained in X. */
2589 static rtx
2590 walk_alter_subreg (rtx *xp)
2592 rtx x = *xp;
2593 switch (GET_CODE (x))
2595 case PLUS:
2596 case MULT:
2597 case AND:
2598 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2599 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2600 break;
2602 case MEM:
2603 case ZERO_EXTEND:
2604 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2605 break;
2607 case SUBREG:
2608 return alter_subreg (xp);
2610 default:
2611 break;
2614 return *xp;
2617 #ifdef HAVE_cc0
2619 /* Given BODY, the body of a jump instruction, alter the jump condition
2620 as required by the bits that are set in cc_status.flags.
2621 Not all of the bits there can be handled at this level in all cases.
2623 The value is normally 0.
2624 1 means that the condition has become always true.
2625 -1 means that the condition has become always false.
2626 2 means that COND has been altered. */
2628 static int
2629 alter_cond (rtx cond)
2631 int value = 0;
2633 if (cc_status.flags & CC_REVERSED)
2635 value = 2;
2636 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2639 if (cc_status.flags & CC_INVERTED)
2641 value = 2;
2642 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2645 if (cc_status.flags & CC_NOT_POSITIVE)
2646 switch (GET_CODE (cond))
2648 case LE:
2649 case LEU:
2650 case GEU:
2651 /* Jump becomes unconditional. */
2652 return 1;
2654 case GT:
2655 case GTU:
2656 case LTU:
2657 /* Jump becomes no-op. */
2658 return -1;
2660 case GE:
2661 PUT_CODE (cond, EQ);
2662 value = 2;
2663 break;
2665 case LT:
2666 PUT_CODE (cond, NE);
2667 value = 2;
2668 break;
2670 default:
2671 break;
2674 if (cc_status.flags & CC_NOT_NEGATIVE)
2675 switch (GET_CODE (cond))
2677 case GE:
2678 case GEU:
2679 /* Jump becomes unconditional. */
2680 return 1;
2682 case LT:
2683 case LTU:
2684 /* Jump becomes no-op. */
2685 return -1;
2687 case LE:
2688 case LEU:
2689 PUT_CODE (cond, EQ);
2690 value = 2;
2691 break;
2693 case GT:
2694 case GTU:
2695 PUT_CODE (cond, NE);
2696 value = 2;
2697 break;
2699 default:
2700 break;
2703 if (cc_status.flags & CC_NO_OVERFLOW)
2704 switch (GET_CODE (cond))
2706 case GEU:
2707 /* Jump becomes unconditional. */
2708 return 1;
2710 case LEU:
2711 PUT_CODE (cond, EQ);
2712 value = 2;
2713 break;
2715 case GTU:
2716 PUT_CODE (cond, NE);
2717 value = 2;
2718 break;
2720 case LTU:
2721 /* Jump becomes no-op. */
2722 return -1;
2724 default:
2725 break;
2728 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2729 switch (GET_CODE (cond))
2731 default:
2732 gcc_unreachable ();
2734 case NE:
2735 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2736 value = 2;
2737 break;
2739 case EQ:
2740 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2741 value = 2;
2742 break;
2745 if (cc_status.flags & CC_NOT_SIGNED)
2746 /* The flags are valid if signed condition operators are converted
2747 to unsigned. */
2748 switch (GET_CODE (cond))
2750 case LE:
2751 PUT_CODE (cond, LEU);
2752 value = 2;
2753 break;
2755 case LT:
2756 PUT_CODE (cond, LTU);
2757 value = 2;
2758 break;
2760 case GT:
2761 PUT_CODE (cond, GTU);
2762 value = 2;
2763 break;
2765 case GE:
2766 PUT_CODE (cond, GEU);
2767 value = 2;
2768 break;
2770 default:
2771 break;
2774 return value;
2776 #endif
2778 /* Report inconsistency between the assembler template and the operands.
2779 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2781 void
2782 output_operand_lossage (const char *cmsgid, ...)
2784 char *fmt_string;
2785 char *new_message;
2786 const char *pfx_str;
2787 va_list ap;
2789 va_start (ap, cmsgid);
2791 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2792 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2793 vasprintf (&new_message, fmt_string, ap);
2795 if (this_is_asm_operands)
2796 error_for_asm (this_is_asm_operands, "%s", new_message);
2797 else
2798 internal_error ("%s", new_message);
2800 free (fmt_string);
2801 free (new_message);
2802 va_end (ap);
2805 /* Output of assembler code from a template, and its subroutines. */
2807 /* Annotate the assembly with a comment describing the pattern and
2808 alternative used. */
2810 static void
2811 output_asm_name (void)
2813 if (debug_insn)
2815 int num = INSN_CODE (debug_insn);
2816 fprintf (asm_out_file, "\t%s %d\t%s",
2817 ASM_COMMENT_START, INSN_UID (debug_insn),
2818 insn_data[num].name);
2819 if (insn_data[num].n_alternatives > 1)
2820 fprintf (asm_out_file, "/%d", which_alternative + 1);
2821 #ifdef HAVE_ATTR_length
2822 fprintf (asm_out_file, "\t[length = %d]",
2823 get_attr_length (debug_insn));
2824 #endif
2825 /* Clear this so only the first assembler insn
2826 of any rtl insn will get the special comment for -dp. */
2827 debug_insn = 0;
2831 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2832 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2833 corresponds to the address of the object and 0 if to the object. */
2835 static tree
2836 get_mem_expr_from_op (rtx op, int *paddressp)
2838 tree expr;
2839 int inner_addressp;
2841 *paddressp = 0;
2843 if (REG_P (op))
2844 return REG_EXPR (op);
2845 else if (!MEM_P (op))
2846 return 0;
2848 if (MEM_EXPR (op) != 0)
2849 return MEM_EXPR (op);
2851 /* Otherwise we have an address, so indicate it and look at the address. */
2852 *paddressp = 1;
2853 op = XEXP (op, 0);
2855 /* First check if we have a decl for the address, then look at the right side
2856 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2857 But don't allow the address to itself be indirect. */
2858 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2859 return expr;
2860 else if (GET_CODE (op) == PLUS
2861 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2862 return expr;
2864 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2865 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2866 op = XEXP (op, 0);
2868 expr = get_mem_expr_from_op (op, &inner_addressp);
2869 return inner_addressp ? 0 : expr;
2872 /* Output operand names for assembler instructions. OPERANDS is the
2873 operand vector, OPORDER is the order to write the operands, and NOPS
2874 is the number of operands to write. */
2876 static void
2877 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2879 int wrote = 0;
2880 int i;
2882 for (i = 0; i < nops; i++)
2884 int addressp;
2885 rtx op = operands[oporder[i]];
2886 tree expr = get_mem_expr_from_op (op, &addressp);
2888 fprintf (asm_out_file, "%c%s",
2889 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2890 wrote = 1;
2891 if (expr)
2893 fprintf (asm_out_file, "%s",
2894 addressp ? "*" : "");
2895 print_mem_expr (asm_out_file, expr);
2896 wrote = 1;
2898 else if (REG_P (op) && ORIGINAL_REGNO (op)
2899 && ORIGINAL_REGNO (op) != REGNO (op))
2900 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2904 /* Output text from TEMPLATE to the assembler output file,
2905 obeying %-directions to substitute operands taken from
2906 the vector OPERANDS.
2908 %N (for N a digit) means print operand N in usual manner.
2909 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2910 and print the label name with no punctuation.
2911 %cN means require operand N to be a constant
2912 and print the constant expression with no punctuation.
2913 %aN means expect operand N to be a memory address
2914 (not a memory reference!) and print a reference
2915 to that address.
2916 %nN means expect operand N to be a constant
2917 and print a constant expression for minus the value
2918 of the operand, with no other punctuation. */
2920 void
2921 output_asm_insn (const char *template, rtx *operands)
2923 const char *p;
2924 int c;
2925 #ifdef ASSEMBLER_DIALECT
2926 int dialect = 0;
2927 #endif
2928 int oporder[MAX_RECOG_OPERANDS];
2929 char opoutput[MAX_RECOG_OPERANDS];
2930 int ops = 0;
2932 /* An insn may return a null string template
2933 in a case where no assembler code is needed. */
2934 if (*template == 0)
2935 return;
2937 memset (opoutput, 0, sizeof opoutput);
2938 p = template;
2939 putc ('\t', asm_out_file);
2941 #ifdef ASM_OUTPUT_OPCODE
2942 ASM_OUTPUT_OPCODE (asm_out_file, p);
2943 #endif
2945 while ((c = *p++))
2946 switch (c)
2948 case '\n':
2949 if (flag_verbose_asm)
2950 output_asm_operand_names (operands, oporder, ops);
2951 if (flag_print_asm_name)
2952 output_asm_name ();
2954 ops = 0;
2955 memset (opoutput, 0, sizeof opoutput);
2957 putc (c, asm_out_file);
2958 #ifdef ASM_OUTPUT_OPCODE
2959 while ((c = *p) == '\t')
2961 putc (c, asm_out_file);
2962 p++;
2964 ASM_OUTPUT_OPCODE (asm_out_file, p);
2965 #endif
2966 break;
2968 #ifdef ASSEMBLER_DIALECT
2969 case '{':
2971 int i;
2973 if (dialect)
2974 output_operand_lossage ("nested assembly dialect alternatives");
2975 else
2976 dialect = 1;
2978 /* If we want the first dialect, do nothing. Otherwise, skip
2979 DIALECT_NUMBER of strings ending with '|'. */
2980 for (i = 0; i < dialect_number; i++)
2982 while (*p && *p != '}' && *p++ != '|')
2984 if (*p == '}')
2985 break;
2986 if (*p == '|')
2987 p++;
2990 if (*p == '\0')
2991 output_operand_lossage ("unterminated assembly dialect alternative");
2993 break;
2995 case '|':
2996 if (dialect)
2998 /* Skip to close brace. */
3001 if (*p == '\0')
3003 output_operand_lossage ("unterminated assembly dialect alternative");
3004 break;
3007 while (*p++ != '}');
3008 dialect = 0;
3010 else
3011 putc (c, asm_out_file);
3012 break;
3014 case '}':
3015 if (! dialect)
3016 putc (c, asm_out_file);
3017 dialect = 0;
3018 break;
3019 #endif
3021 case '%':
3022 /* %% outputs a single %. */
3023 if (*p == '%')
3025 p++;
3026 putc (c, asm_out_file);
3028 /* %= outputs a number which is unique to each insn in the entire
3029 compilation. This is useful for making local labels that are
3030 referred to more than once in a given insn. */
3031 else if (*p == '=')
3033 p++;
3034 fprintf (asm_out_file, "%d", insn_counter);
3036 /* % followed by a letter and some digits
3037 outputs an operand in a special way depending on the letter.
3038 Letters `acln' are implemented directly.
3039 Other letters are passed to `output_operand' so that
3040 the PRINT_OPERAND macro can define them. */
3041 else if (ISALPHA (*p))
3043 int letter = *p++;
3044 unsigned long opnum;
3045 char *endptr;
3047 opnum = strtoul (p, &endptr, 10);
3049 if (endptr == p)
3050 output_operand_lossage ("operand number missing "
3051 "after %%-letter");
3052 else if (this_is_asm_operands && opnum >= insn_noperands)
3053 output_operand_lossage ("operand number out of range");
3054 else if (letter == 'l')
3055 output_asm_label (operands[opnum]);
3056 else if (letter == 'a')
3057 output_address (operands[opnum]);
3058 else if (letter == 'c')
3060 if (CONSTANT_ADDRESS_P (operands[opnum]))
3061 output_addr_const (asm_out_file, operands[opnum]);
3062 else
3063 output_operand (operands[opnum], 'c');
3065 else if (letter == 'n')
3067 if (GET_CODE (operands[opnum]) == CONST_INT)
3068 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3069 - INTVAL (operands[opnum]));
3070 else
3072 putc ('-', asm_out_file);
3073 output_addr_const (asm_out_file, operands[opnum]);
3076 else
3077 output_operand (operands[opnum], letter);
3079 if (!opoutput[opnum])
3080 oporder[ops++] = opnum;
3081 opoutput[opnum] = 1;
3083 p = endptr;
3084 c = *p;
3086 /* % followed by a digit outputs an operand the default way. */
3087 else if (ISDIGIT (*p))
3089 unsigned long opnum;
3090 char *endptr;
3092 opnum = strtoul (p, &endptr, 10);
3093 if (this_is_asm_operands && opnum >= insn_noperands)
3094 output_operand_lossage ("operand number out of range");
3095 else
3096 output_operand (operands[opnum], 0);
3098 if (!opoutput[opnum])
3099 oporder[ops++] = opnum;
3100 opoutput[opnum] = 1;
3102 p = endptr;
3103 c = *p;
3105 /* % followed by punctuation: output something for that
3106 punctuation character alone, with no operand.
3107 The PRINT_OPERAND macro decides what is actually done. */
3108 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3109 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3110 output_operand (NULL_RTX, *p++);
3111 #endif
3112 else
3113 output_operand_lossage ("invalid %%-code");
3114 break;
3116 default:
3117 putc (c, asm_out_file);
3120 /* Write out the variable names for operands, if we know them. */
3121 if (flag_verbose_asm)
3122 output_asm_operand_names (operands, oporder, ops);
3123 if (flag_print_asm_name)
3124 output_asm_name ();
3126 putc ('\n', asm_out_file);
3129 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3131 void
3132 output_asm_label (rtx x)
3134 char buf[256];
3136 if (GET_CODE (x) == LABEL_REF)
3137 x = XEXP (x, 0);
3138 if (LABEL_P (x)
3139 || (NOTE_P (x)
3140 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3141 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3142 else
3143 output_operand_lossage ("'%%l' operand isn't a label");
3145 assemble_name (asm_out_file, buf);
3148 /* Print operand X using machine-dependent assembler syntax.
3149 The macro PRINT_OPERAND is defined just to control this function.
3150 CODE is a non-digit that preceded the operand-number in the % spec,
3151 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3152 between the % and the digits.
3153 When CODE is a non-letter, X is 0.
3155 The meanings of the letters are machine-dependent and controlled
3156 by PRINT_OPERAND. */
3158 static void
3159 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3161 if (x && GET_CODE (x) == SUBREG)
3162 x = alter_subreg (&x);
3164 /* X must not be a pseudo reg. */
3165 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3167 PRINT_OPERAND (asm_out_file, x, code);
3170 /* Print a memory reference operand for address X
3171 using machine-dependent assembler syntax.
3172 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3174 void
3175 output_address (rtx x)
3177 walk_alter_subreg (&x);
3178 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3181 /* Print an integer constant expression in assembler syntax.
3182 Addition and subtraction are the only arithmetic
3183 that may appear in these expressions. */
3185 void
3186 output_addr_const (FILE *file, rtx x)
3188 char buf[256];
3190 restart:
3191 switch (GET_CODE (x))
3193 case PC:
3194 putc ('.', file);
3195 break;
3197 case SYMBOL_REF:
3198 if (SYMBOL_REF_DECL (x))
3199 mark_decl_referenced (SYMBOL_REF_DECL (x));
3200 #ifdef ASM_OUTPUT_SYMBOL_REF
3201 ASM_OUTPUT_SYMBOL_REF (file, x);
3202 #else
3203 assemble_name (file, XSTR (x, 0));
3204 #endif
3205 break;
3207 case LABEL_REF:
3208 x = XEXP (x, 0);
3209 /* Fall through. */
3210 case CODE_LABEL:
3211 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3212 #ifdef ASM_OUTPUT_LABEL_REF
3213 ASM_OUTPUT_LABEL_REF (file, buf);
3214 #else
3215 assemble_name (file, buf);
3216 #endif
3217 break;
3219 case CONST_INT:
3220 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3221 break;
3223 case CONST:
3224 /* This used to output parentheses around the expression,
3225 but that does not work on the 386 (either ATT or BSD assembler). */
3226 output_addr_const (file, XEXP (x, 0));
3227 break;
3229 case CONST_DOUBLE:
3230 if (GET_MODE (x) == VOIDmode)
3232 /* We can use %d if the number is one word and positive. */
3233 if (CONST_DOUBLE_HIGH (x))
3234 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3235 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3236 else if (CONST_DOUBLE_LOW (x) < 0)
3237 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3238 else
3239 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3241 else
3242 /* We can't handle floating point constants;
3243 PRINT_OPERAND must handle them. */
3244 output_operand_lossage ("floating constant misused");
3245 break;
3247 case PLUS:
3248 /* Some assemblers need integer constants to appear last (eg masm). */
3249 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3251 output_addr_const (file, XEXP (x, 1));
3252 if (INTVAL (XEXP (x, 0)) >= 0)
3253 fprintf (file, "+");
3254 output_addr_const (file, XEXP (x, 0));
3256 else
3258 output_addr_const (file, XEXP (x, 0));
3259 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3260 || INTVAL (XEXP (x, 1)) >= 0)
3261 fprintf (file, "+");
3262 output_addr_const (file, XEXP (x, 1));
3264 break;
3266 case MINUS:
3267 /* Avoid outputting things like x-x or x+5-x,
3268 since some assemblers can't handle that. */
3269 x = simplify_subtraction (x);
3270 if (GET_CODE (x) != MINUS)
3271 goto restart;
3273 output_addr_const (file, XEXP (x, 0));
3274 fprintf (file, "-");
3275 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3276 || GET_CODE (XEXP (x, 1)) == PC
3277 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3278 output_addr_const (file, XEXP (x, 1));
3279 else
3281 fputs (targetm.asm_out.open_paren, file);
3282 output_addr_const (file, XEXP (x, 1));
3283 fputs (targetm.asm_out.close_paren, file);
3285 break;
3287 case ZERO_EXTEND:
3288 case SIGN_EXTEND:
3289 case SUBREG:
3290 output_addr_const (file, XEXP (x, 0));
3291 break;
3293 default:
3294 #ifdef OUTPUT_ADDR_CONST_EXTRA
3295 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3296 break;
3298 fail:
3299 #endif
3300 output_operand_lossage ("invalid expression as operand");
3304 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3305 %R prints the value of REGISTER_PREFIX.
3306 %L prints the value of LOCAL_LABEL_PREFIX.
3307 %U prints the value of USER_LABEL_PREFIX.
3308 %I prints the value of IMMEDIATE_PREFIX.
3309 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3310 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3312 We handle alternate assembler dialects here, just like output_asm_insn. */
3314 void
3315 asm_fprintf (FILE *file, const char *p, ...)
3317 char buf[10];
3318 char *q, c;
3319 va_list argptr;
3321 va_start (argptr, p);
3323 buf[0] = '%';
3325 while ((c = *p++))
3326 switch (c)
3328 #ifdef ASSEMBLER_DIALECT
3329 case '{':
3331 int i;
3333 /* If we want the first dialect, do nothing. Otherwise, skip
3334 DIALECT_NUMBER of strings ending with '|'. */
3335 for (i = 0; i < dialect_number; i++)
3337 while (*p && *p++ != '|')
3340 if (*p == '|')
3341 p++;
3344 break;
3346 case '|':
3347 /* Skip to close brace. */
3348 while (*p && *p++ != '}')
3350 break;
3352 case '}':
3353 break;
3354 #endif
3356 case '%':
3357 c = *p++;
3358 q = &buf[1];
3359 while (strchr ("-+ #0", c))
3361 *q++ = c;
3362 c = *p++;
3364 while (ISDIGIT (c) || c == '.')
3366 *q++ = c;
3367 c = *p++;
3369 switch (c)
3371 case '%':
3372 putc ('%', file);
3373 break;
3375 case 'd': case 'i': case 'u':
3376 case 'x': case 'X': case 'o':
3377 case 'c':
3378 *q++ = c;
3379 *q = 0;
3380 fprintf (file, buf, va_arg (argptr, int));
3381 break;
3383 case 'w':
3384 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3385 'o' cases, but we do not check for those cases. It
3386 means that the value is a HOST_WIDE_INT, which may be
3387 either `long' or `long long'. */
3388 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3389 q += strlen (HOST_WIDE_INT_PRINT);
3390 *q++ = *p++;
3391 *q = 0;
3392 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3393 break;
3395 case 'l':
3396 *q++ = c;
3397 #ifdef HAVE_LONG_LONG
3398 if (*p == 'l')
3400 *q++ = *p++;
3401 *q++ = *p++;
3402 *q = 0;
3403 fprintf (file, buf, va_arg (argptr, long long));
3405 else
3406 #endif
3408 *q++ = *p++;
3409 *q = 0;
3410 fprintf (file, buf, va_arg (argptr, long));
3413 break;
3415 case 's':
3416 *q++ = c;
3417 *q = 0;
3418 fprintf (file, buf, va_arg (argptr, char *));
3419 break;
3421 case 'O':
3422 #ifdef ASM_OUTPUT_OPCODE
3423 ASM_OUTPUT_OPCODE (asm_out_file, p);
3424 #endif
3425 break;
3427 case 'R':
3428 #ifdef REGISTER_PREFIX
3429 fprintf (file, "%s", REGISTER_PREFIX);
3430 #endif
3431 break;
3433 case 'I':
3434 #ifdef IMMEDIATE_PREFIX
3435 fprintf (file, "%s", IMMEDIATE_PREFIX);
3436 #endif
3437 break;
3439 case 'L':
3440 #ifdef LOCAL_LABEL_PREFIX
3441 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3442 #endif
3443 break;
3445 case 'U':
3446 fputs (user_label_prefix, file);
3447 break;
3449 #ifdef ASM_FPRINTF_EXTENSIONS
3450 /* Uppercase letters are reserved for general use by asm_fprintf
3451 and so are not available to target specific code. In order to
3452 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3453 they are defined here. As they get turned into real extensions
3454 to asm_fprintf they should be removed from this list. */
3455 case 'A': case 'B': case 'C': case 'D': case 'E':
3456 case 'F': case 'G': case 'H': case 'J': case 'K':
3457 case 'M': case 'N': case 'P': case 'Q': case 'S':
3458 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3459 break;
3461 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3462 #endif
3463 default:
3464 gcc_unreachable ();
3466 break;
3468 default:
3469 putc (c, file);
3471 va_end (argptr);
3474 /* Split up a CONST_DOUBLE or integer constant rtx
3475 into two rtx's for single words,
3476 storing in *FIRST the word that comes first in memory in the target
3477 and in *SECOND the other. */
3479 void
3480 split_double (rtx value, rtx *first, rtx *second)
3482 if (GET_CODE (value) == CONST_INT)
3484 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3486 /* In this case the CONST_INT holds both target words.
3487 Extract the bits from it into two word-sized pieces.
3488 Sign extend each half to HOST_WIDE_INT. */
3489 unsigned HOST_WIDE_INT low, high;
3490 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3492 /* Set sign_bit to the most significant bit of a word. */
3493 sign_bit = 1;
3494 sign_bit <<= BITS_PER_WORD - 1;
3496 /* Set mask so that all bits of the word are set. We could
3497 have used 1 << BITS_PER_WORD instead of basing the
3498 calculation on sign_bit. However, on machines where
3499 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3500 compiler warning, even though the code would never be
3501 executed. */
3502 mask = sign_bit << 1;
3503 mask--;
3505 /* Set sign_extend as any remaining bits. */
3506 sign_extend = ~mask;
3508 /* Pick the lower word and sign-extend it. */
3509 low = INTVAL (value);
3510 low &= mask;
3511 if (low & sign_bit)
3512 low |= sign_extend;
3514 /* Pick the higher word, shifted to the least significant
3515 bits, and sign-extend it. */
3516 high = INTVAL (value);
3517 high >>= BITS_PER_WORD - 1;
3518 high >>= 1;
3519 high &= mask;
3520 if (high & sign_bit)
3521 high |= sign_extend;
3523 /* Store the words in the target machine order. */
3524 if (WORDS_BIG_ENDIAN)
3526 *first = GEN_INT (high);
3527 *second = GEN_INT (low);
3529 else
3531 *first = GEN_INT (low);
3532 *second = GEN_INT (high);
3535 else
3537 /* The rule for using CONST_INT for a wider mode
3538 is that we regard the value as signed.
3539 So sign-extend it. */
3540 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3541 if (WORDS_BIG_ENDIAN)
3543 *first = high;
3544 *second = value;
3546 else
3548 *first = value;
3549 *second = high;
3553 else if (GET_CODE (value) != CONST_DOUBLE)
3555 if (WORDS_BIG_ENDIAN)
3557 *first = const0_rtx;
3558 *second = value;
3560 else
3562 *first = value;
3563 *second = const0_rtx;
3566 else if (GET_MODE (value) == VOIDmode
3567 /* This is the old way we did CONST_DOUBLE integers. */
3568 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3570 /* In an integer, the words are defined as most and least significant.
3571 So order them by the target's convention. */
3572 if (WORDS_BIG_ENDIAN)
3574 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3575 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3577 else
3579 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3580 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3583 else
3585 REAL_VALUE_TYPE r;
3586 long l[2];
3587 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3589 /* Note, this converts the REAL_VALUE_TYPE to the target's
3590 format, splits up the floating point double and outputs
3591 exactly 32 bits of it into each of l[0] and l[1] --
3592 not necessarily BITS_PER_WORD bits. */
3593 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3595 /* If 32 bits is an entire word for the target, but not for the host,
3596 then sign-extend on the host so that the number will look the same
3597 way on the host that it would on the target. See for instance
3598 simplify_unary_operation. The #if is needed to avoid compiler
3599 warnings. */
3601 #if HOST_BITS_PER_LONG > 32
3602 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3604 if (l[0] & ((long) 1 << 31))
3605 l[0] |= ((long) (-1) << 32);
3606 if (l[1] & ((long) 1 << 31))
3607 l[1] |= ((long) (-1) << 32);
3609 #endif
3611 *first = GEN_INT (l[0]);
3612 *second = GEN_INT (l[1]);
3616 /* Return nonzero if this function has no function calls. */
3619 leaf_function_p (void)
3621 rtx insn;
3622 rtx link;
3624 if (current_function_profile || profile_arc_flag)
3625 return 0;
3627 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3629 if (CALL_P (insn)
3630 && ! SIBLING_CALL_P (insn))
3631 return 0;
3632 if (NONJUMP_INSN_P (insn)
3633 && GET_CODE (PATTERN (insn)) == SEQUENCE
3634 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3635 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3636 return 0;
3638 for (link = current_function_epilogue_delay_list;
3639 link;
3640 link = XEXP (link, 1))
3642 insn = XEXP (link, 0);
3644 if (CALL_P (insn)
3645 && ! SIBLING_CALL_P (insn))
3646 return 0;
3647 if (NONJUMP_INSN_P (insn)
3648 && GET_CODE (PATTERN (insn)) == SEQUENCE
3649 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3650 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3651 return 0;
3654 return 1;
3657 /* Return 1 if branch is a forward branch.
3658 Uses insn_shuid array, so it works only in the final pass. May be used by
3659 output templates to customary add branch prediction hints.
3662 final_forward_branch_p (rtx insn)
3664 int insn_id, label_id;
3666 gcc_assert (uid_shuid);
3667 insn_id = INSN_SHUID (insn);
3668 label_id = INSN_SHUID (JUMP_LABEL (insn));
3669 /* We've hit some insns that does not have id information available. */
3670 gcc_assert (insn_id && label_id);
3671 return insn_id < label_id;
3674 /* On some machines, a function with no call insns
3675 can run faster if it doesn't create its own register window.
3676 When output, the leaf function should use only the "output"
3677 registers. Ordinarily, the function would be compiled to use
3678 the "input" registers to find its arguments; it is a candidate
3679 for leaf treatment if it uses only the "input" registers.
3680 Leaf function treatment means renumbering so the function
3681 uses the "output" registers instead. */
3683 #ifdef LEAF_REGISTERS
3685 /* Return 1 if this function uses only the registers that can be
3686 safely renumbered. */
3689 only_leaf_regs_used (void)
3691 int i;
3692 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3694 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3695 if ((regs_ever_live[i] || global_regs[i])
3696 && ! permitted_reg_in_leaf_functions[i])
3697 return 0;
3699 if (current_function_uses_pic_offset_table
3700 && pic_offset_table_rtx != 0
3701 && REG_P (pic_offset_table_rtx)
3702 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3703 return 0;
3705 return 1;
3708 /* Scan all instructions and renumber all registers into those
3709 available in leaf functions. */
3711 static void
3712 leaf_renumber_regs (rtx first)
3714 rtx insn;
3716 /* Renumber only the actual patterns.
3717 The reg-notes can contain frame pointer refs,
3718 and renumbering them could crash, and should not be needed. */
3719 for (insn = first; insn; insn = NEXT_INSN (insn))
3720 if (INSN_P (insn))
3721 leaf_renumber_regs_insn (PATTERN (insn));
3722 for (insn = current_function_epilogue_delay_list;
3723 insn;
3724 insn = XEXP (insn, 1))
3725 if (INSN_P (XEXP (insn, 0)))
3726 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3729 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3730 available in leaf functions. */
3732 void
3733 leaf_renumber_regs_insn (rtx in_rtx)
3735 int i, j;
3736 const char *format_ptr;
3738 if (in_rtx == 0)
3739 return;
3741 /* Renumber all input-registers into output-registers.
3742 renumbered_regs would be 1 for an output-register;
3743 they */
3745 if (REG_P (in_rtx))
3747 int newreg;
3749 /* Don't renumber the same reg twice. */
3750 if (in_rtx->used)
3751 return;
3753 newreg = REGNO (in_rtx);
3754 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3755 to reach here as part of a REG_NOTE. */
3756 if (newreg >= FIRST_PSEUDO_REGISTER)
3758 in_rtx->used = 1;
3759 return;
3761 newreg = LEAF_REG_REMAP (newreg);
3762 gcc_assert (newreg >= 0);
3763 regs_ever_live[REGNO (in_rtx)] = 0;
3764 regs_ever_live[newreg] = 1;
3765 REGNO (in_rtx) = newreg;
3766 in_rtx->used = 1;
3769 if (INSN_P (in_rtx))
3771 /* Inside a SEQUENCE, we find insns.
3772 Renumber just the patterns of these insns,
3773 just as we do for the top-level insns. */
3774 leaf_renumber_regs_insn (PATTERN (in_rtx));
3775 return;
3778 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3780 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3781 switch (*format_ptr++)
3783 case 'e':
3784 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3785 break;
3787 case 'E':
3788 if (NULL != XVEC (in_rtx, i))
3790 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3791 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3793 break;
3795 case 'S':
3796 case 's':
3797 case '0':
3798 case 'i':
3799 case 'w':
3800 case 'n':
3801 case 'u':
3802 break;
3804 default:
3805 gcc_unreachable ();
3808 #endif
3811 /* When -gused is used, emit debug info for only used symbols. But in
3812 addition to the standard intercepted debug_hooks there are some direct
3813 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3814 Those routines may also be called from a higher level intercepted routine. So
3815 to prevent recording data for an inner call to one of these for an intercept,
3816 we maintain an intercept nesting counter (debug_nesting). We only save the
3817 intercepted arguments if the nesting is 1. */
3818 int debug_nesting = 0;
3820 static tree *symbol_queue;
3821 int symbol_queue_index = 0;
3822 static int symbol_queue_size = 0;
3824 /* Generate the symbols for any queued up type symbols we encountered
3825 while generating the type info for some originally used symbol.
3826 This might generate additional entries in the queue. Only when
3827 the nesting depth goes to 0 is this routine called. */
3829 void
3830 debug_flush_symbol_queue (void)
3832 int i;
3834 /* Make sure that additionally queued items are not flushed
3835 prematurely. */
3837 ++debug_nesting;
3839 for (i = 0; i < symbol_queue_index; ++i)
3841 /* If we pushed queued symbols then such symbols are must be
3842 output no matter what anyone else says. Specifically,
3843 we need to make sure dbxout_symbol() thinks the symbol was
3844 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3845 which may be set for outside reasons. */
3846 int saved_tree_used = TREE_USED (symbol_queue[i]);
3847 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3848 TREE_USED (symbol_queue[i]) = 1;
3849 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3851 #ifdef DBX_DEBUGGING_INFO
3852 dbxout_symbol (symbol_queue[i], 0);
3853 #endif
3855 TREE_USED (symbol_queue[i]) = saved_tree_used;
3856 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3859 symbol_queue_index = 0;
3860 --debug_nesting;
3863 /* Queue a type symbol needed as part of the definition of a decl
3864 symbol. These symbols are generated when debug_flush_symbol_queue()
3865 is called. */
3867 void
3868 debug_queue_symbol (tree decl)
3870 if (symbol_queue_index >= symbol_queue_size)
3872 symbol_queue_size += 10;
3873 symbol_queue = xrealloc (symbol_queue,
3874 symbol_queue_size * sizeof (tree));
3877 symbol_queue[symbol_queue_index++] = decl;
3880 /* Free symbol queue. */
3881 void
3882 debug_free_queue (void)
3884 if (symbol_queue)
3886 free (symbol_queue);
3887 symbol_queue = NULL;
3888 symbol_queue_size = 0;
3892 /* Turn the RTL into assembly. */
3893 static void
3894 rest_of_handle_final (void)
3896 rtx x;
3897 const char *fnname;
3899 /* Get the function's name, as described by its RTL. This may be
3900 different from the DECL_NAME name used in the source file. */
3902 x = DECL_RTL (current_function_decl);
3903 gcc_assert (MEM_P (x));
3904 x = XEXP (x, 0);
3905 gcc_assert (GET_CODE (x) == SYMBOL_REF);
3906 fnname = XSTR (x, 0);
3908 assemble_start_function (current_function_decl, fnname);
3909 final_start_function (get_insns (), asm_out_file, optimize);
3910 final (get_insns (), asm_out_file, optimize);
3911 final_end_function ();
3913 #ifdef TARGET_UNWIND_INFO
3914 /* ??? The IA-64 ".handlerdata" directive must be issued before
3915 the ".endp" directive that closes the procedure descriptor. */
3916 output_function_exception_table ();
3917 #endif
3919 assemble_end_function (current_function_decl, fnname);
3921 #ifndef TARGET_UNWIND_INFO
3922 /* Otherwise, it feels unclean to switch sections in the middle. */
3923 output_function_exception_table ();
3924 #endif
3926 user_defined_section_attribute = false;
3928 if (! quiet_flag)
3929 fflush (asm_out_file);
3931 /* Release all memory allocated by flow. */
3932 free_basic_block_vars ();
3934 /* Write DBX symbols if requested. */
3936 /* Note that for those inline functions where we don't initially
3937 know for certain that we will be generating an out-of-line copy,
3938 the first invocation of this routine (rest_of_compilation) will
3939 skip over this code by doing a `goto exit_rest_of_compilation;'.
3940 Later on, wrapup_global_declarations will (indirectly) call
3941 rest_of_compilation again for those inline functions that need
3942 to have out-of-line copies generated. During that call, we
3943 *will* be routed past here. */
3945 timevar_push (TV_SYMOUT);
3946 (*debug_hooks->function_decl) (current_function_decl);
3947 timevar_pop (TV_SYMOUT);
3950 struct tree_opt_pass pass_final =
3952 NULL, /* name */
3953 NULL, /* gate */
3954 rest_of_handle_final, /* execute */
3955 NULL, /* sub */
3956 NULL, /* next */
3957 0, /* static_pass_number */
3958 TV_FINAL, /* tv_id */
3959 0, /* properties_required */
3960 0, /* properties_provided */
3961 0, /* properties_destroyed */
3962 0, /* todo_flags_start */
3963 TODO_ggc_collect, /* todo_flags_finish */
3964 0 /* letter */
3968 static void
3969 rest_of_handle_shorten_branches (void)
3971 /* Shorten branches. */
3972 shorten_branches (get_insns ());
3975 struct tree_opt_pass pass_shorten_branches =
3977 NULL, /* name */
3978 NULL, /* gate */
3979 rest_of_handle_shorten_branches, /* execute */
3980 NULL, /* sub */
3981 NULL, /* next */
3982 0, /* static_pass_number */
3983 TV_FINAL, /* tv_id */
3984 0, /* properties_required */
3985 0, /* properties_provided */
3986 0, /* properties_destroyed */
3987 0, /* todo_flags_start */
3988 0, /* todo_flags_finish */
3989 0 /* letter */
3993 static void
3994 rest_of_clean_state (void)
3996 rtx insn, next;
3998 /* It is very important to decompose the RTL instruction chain here:
3999 debug information keeps pointing into CODE_LABEL insns inside the function
4000 body. If these remain pointing to the other insns, we end up preserving
4001 whole RTL chain and attached detailed debug info in memory. */
4002 for (insn = get_insns (); insn; insn = next)
4004 next = NEXT_INSN (insn);
4005 NEXT_INSN (insn) = NULL;
4006 PREV_INSN (insn) = NULL;
4009 /* In case the function was not output,
4010 don't leave any temporary anonymous types
4011 queued up for sdb output. */
4012 #ifdef SDB_DEBUGGING_INFO
4013 if (write_symbols == SDB_DEBUG)
4014 sdbout_types (NULL_TREE);
4015 #endif
4017 reload_completed = 0;
4018 epilogue_completed = 0;
4019 flow2_completed = 0;
4020 no_new_pseudos = 0;
4022 /* Clear out the insn_length contents now that they are no
4023 longer valid. */
4024 init_insn_lengths ();
4026 /* Show no temporary slots allocated. */
4027 init_temp_slots ();
4029 free_basic_block_vars ();
4030 free_bb_for_insn ();
4033 if (targetm.binds_local_p (current_function_decl))
4035 int pref = cfun->preferred_stack_boundary;
4036 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary)
4037 pref = cfun->stack_alignment_needed;
4038 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4039 = pref;
4042 /* Make sure volatile mem refs aren't considered valid operands for
4043 arithmetic insns. We must call this here if this is a nested inline
4044 function, since the above code leaves us in the init_recog state,
4045 and the function context push/pop code does not save/restore volatile_ok.
4047 ??? Maybe it isn't necessary for expand_start_function to call this
4048 anymore if we do it here? */
4050 init_recog_no_volatile ();
4052 /* We're done with this function. Free up memory if we can. */
4053 free_after_parsing (cfun);
4054 free_after_compilation (cfun);
4057 struct tree_opt_pass pass_clean_state =
4059 NULL, /* name */
4060 NULL, /* gate */
4061 rest_of_clean_state, /* execute */
4062 NULL, /* sub */
4063 NULL, /* next */
4064 0, /* static_pass_number */
4065 TV_FINAL, /* tv_id */
4066 0, /* properties_required */
4067 0, /* properties_provided */
4068 PROP_rtl, /* properties_destroyed */
4069 0, /* todo_flags_start */
4070 0, /* todo_flags_finish */
4071 0 /* letter */