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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "regs.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
41 #include "timevar.h"
42 #include "except.h"
43 #include "target.h"
44 #include "params.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
57 global CSE.
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `REG_QTY (N)' records what quantity register N is currently thought
85 of as containing.
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, `REG_QTY (N)' will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
123 `const_rtx'.
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
131 Other expressions:
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
137 hash codes.
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
166 must be removed.
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 `REG_TICK' and `REG_IN_TABLE', accessors for members of
177 cse_reg_info, are used to detect this case. REG_TICK (i) is
178 incremented whenever a value is stored in register i.
179 REG_IN_TABLE (i) holds -1 if no references to register i have been
180 entered in the table; otherwise, it contains the value REG_TICK (i)
181 had when the references were entered. If we want to enter a
182 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
183 remove old references. Until we want to enter a new entry, the
184 mere fact that the two vectors don't match makes the entries be
185 ignored if anyone tries to match them.
187 Registers themselves are entered in the hash table as well as in
188 the equivalent-register chains. However, `REG_TICK' and
189 `REG_IN_TABLE' do not apply to expressions which are simple
190 register references. These expressions are removed from the table
191 immediately when they become invalid, and this can be done even if
192 we do not immediately search for all the expressions that refer to
193 the register.
195 A CLOBBER rtx in an instruction invalidates its operand for further
196 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
197 invalidates everything that resides in memory.
199 Related expressions:
201 Constant expressions that differ only by an additive integer
202 are called related. When a constant expression is put in
203 the table, the related expression with no constant term
204 is also entered. These are made to point at each other
205 so that it is possible to find out if there exists any
206 register equivalent to an expression related to a given expression. */
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 /* The sizes of these fields should match the sizes of the
251 code and mode fields of struct rtx_def (see rtl.h). */
252 ENUM_BITFIELD(rtx_code) comparison_code : 16;
253 ENUM_BITFIELD(machine_mode) mode : 8;
256 /* The table of all qtys, indexed by qty number. */
257 static struct qty_table_elem *qty_table;
259 /* Structure used to pass arguments via for_each_rtx to function
260 cse_change_cc_mode. */
261 struct change_cc_mode_args
263 rtx insn;
264 rtx newreg;
267 #ifdef HAVE_cc0
268 /* For machines that have a CC0, we do not record its value in the hash
269 table since its use is guaranteed to be the insn immediately following
270 its definition and any other insn is presumed to invalidate it.
272 Instead, we store below the value last assigned to CC0. If it should
273 happen to be a constant, it is stored in preference to the actual
274 assigned value. In case it is a constant, we store the mode in which
275 the constant should be interpreted. */
277 static rtx prev_insn_cc0;
278 static enum machine_mode prev_insn_cc0_mode;
280 /* Previous actual insn. 0 if at first insn of basic block. */
282 static rtx prev_insn;
283 #endif
285 /* Insn being scanned. */
287 static rtx this_insn;
289 /* Index by register number, gives the number of the next (or
290 previous) register in the chain of registers sharing the same
291 value.
293 Or -1 if this register is at the end of the chain.
295 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
297 /* Per-register equivalence chain. */
298 struct reg_eqv_elem
300 int next, prev;
303 /* The table of all register equivalence chains. */
304 static struct reg_eqv_elem *reg_eqv_table;
306 struct cse_reg_info
308 /* The timestamp at which this register is initialized. */
309 unsigned int timestamp;
311 /* The quantity number of the register's current contents. */
312 int reg_qty;
314 /* The number of times the register has been altered in the current
315 basic block. */
316 int reg_tick;
318 /* The REG_TICK value at which rtx's containing this register are
319 valid in the hash table. If this does not equal the current
320 reg_tick value, such expressions existing in the hash table are
321 invalid. */
322 int reg_in_table;
324 /* The SUBREG that was set when REG_TICK was last incremented. Set
325 to -1 if the last store was to the whole register, not a subreg. */
326 unsigned int subreg_ticked;
329 /* A table of cse_reg_info indexed by register numbers. */
330 static struct cse_reg_info *cse_reg_info_table;
332 /* The size of the above table. */
333 static unsigned int cse_reg_info_table_size;
335 /* The index of the first entry that has not been initialized. */
336 static unsigned int cse_reg_info_table_first_uninitialized;
338 /* The timestamp at the beginning of the current run of
339 cse_basic_block. We increment this variable at the beginning of
340 the current run of cse_basic_block. The timestamp field of a
341 cse_reg_info entry matches the value of this variable if and only
342 if the entry has been initialized during the current run of
343 cse_basic_block. */
344 static unsigned int cse_reg_info_timestamp;
346 /* A HARD_REG_SET containing all the hard registers for which there is
347 currently a REG expression in the hash table. Note the difference
348 from the above variables, which indicate if the REG is mentioned in some
349 expression in the table. */
351 static HARD_REG_SET hard_regs_in_table;
353 /* CUID of insn that starts the basic block currently being cse-processed. */
355 static int cse_basic_block_start;
357 /* CUID of insn that ends the basic block currently being cse-processed. */
359 static int cse_basic_block_end;
361 /* Vector mapping INSN_UIDs to cuids.
362 The cuids are like uids but increase monotonically always.
363 We use them to see whether a reg is used outside a given basic block. */
365 static int *uid_cuid;
367 /* Highest UID in UID_CUID. */
368 static int max_uid;
370 /* Get the cuid of an insn. */
372 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
374 /* Nonzero if this pass has made changes, and therefore it's
375 worthwhile to run the garbage collector. */
377 static int cse_altered;
379 /* Nonzero if cse has altered conditional jump insns
380 in such a way that jump optimization should be redone. */
382 static int cse_jumps_altered;
384 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
385 REG_LABEL, we have to rerun jump after CSE to put in the note. */
386 static int recorded_label_ref;
388 /* canon_hash stores 1 in do_not_record
389 if it notices a reference to CC0, PC, or some other volatile
390 subexpression. */
392 static int do_not_record;
394 /* canon_hash stores 1 in hash_arg_in_memory
395 if it notices a reference to memory within the expression being hashed. */
397 static int hash_arg_in_memory;
399 /* The hash table contains buckets which are chains of `struct table_elt's,
400 each recording one expression's information.
401 That expression is in the `exp' field.
403 The canon_exp field contains a canonical (from the point of view of
404 alias analysis) version of the `exp' field.
406 Those elements with the same hash code are chained in both directions
407 through the `next_same_hash' and `prev_same_hash' fields.
409 Each set of expressions with equivalent values
410 are on a two-way chain through the `next_same_value'
411 and `prev_same_value' fields, and all point with
412 the `first_same_value' field at the first element in
413 that chain. The chain is in order of increasing cost.
414 Each element's cost value is in its `cost' field.
416 The `in_memory' field is nonzero for elements that
417 involve any reference to memory. These elements are removed
418 whenever a write is done to an unidentified location in memory.
419 To be safe, we assume that a memory address is unidentified unless
420 the address is either a symbol constant or a constant plus
421 the frame pointer or argument pointer.
423 The `related_value' field is used to connect related expressions
424 (that differ by adding an integer).
425 The related expressions are chained in a circular fashion.
426 `related_value' is zero for expressions for which this
427 chain is not useful.
429 The `cost' field stores the cost of this element's expression.
430 The `regcost' field stores the value returned by approx_reg_cost for
431 this element's expression.
433 The `is_const' flag is set if the element is a constant (including
434 a fixed address).
436 The `flag' field is used as a temporary during some search routines.
438 The `mode' field is usually the same as GET_MODE (`exp'), but
439 if `exp' is a CONST_INT and has no machine mode then the `mode'
440 field is the mode it was being used as. Each constant is
441 recorded separately for each mode it is used with. */
443 struct table_elt
445 rtx exp;
446 rtx canon_exp;
447 struct table_elt *next_same_hash;
448 struct table_elt *prev_same_hash;
449 struct table_elt *next_same_value;
450 struct table_elt *prev_same_value;
451 struct table_elt *first_same_value;
452 struct table_elt *related_value;
453 int cost;
454 int regcost;
455 /* The size of this field should match the size
456 of the mode field of struct rtx_def (see rtl.h). */
457 ENUM_BITFIELD(machine_mode) mode : 8;
458 char in_memory;
459 char is_const;
460 char flag;
463 /* We don't want a lot of buckets, because we rarely have very many
464 things stored in the hash table, and a lot of buckets slows
465 down a lot of loops that happen frequently. */
466 #define HASH_SHIFT 5
467 #define HASH_SIZE (1 << HASH_SHIFT)
468 #define HASH_MASK (HASH_SIZE - 1)
470 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
471 register (hard registers may require `do_not_record' to be set). */
473 #define HASH(X, M) \
474 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
476 : canon_hash (X, M)) & HASH_MASK)
478 /* Like HASH, but without side-effects. */
479 #define SAFE_HASH(X, M) \
480 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
481 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
482 : safe_hash (X, M)) & HASH_MASK)
484 /* Determine whether register number N is considered a fixed register for the
485 purpose of approximating register costs.
486 It is desirable to replace other regs with fixed regs, to reduce need for
487 non-fixed hard regs.
488 A reg wins if it is either the frame pointer or designated as fixed. */
489 #define FIXED_REGNO_P(N) \
490 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
491 || fixed_regs[N] || global_regs[N])
493 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
494 hard registers and pointers into the frame are the cheapest with a cost
495 of 0. Next come pseudos with a cost of one and other hard registers with
496 a cost of 2. Aside from these special cases, call `rtx_cost'. */
498 #define CHEAP_REGNO(N) \
499 (REGNO_PTR_FRAME_P(N) \
500 || (HARD_REGISTER_NUM_P (N) \
501 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
503 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
504 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
506 /* Get the number of times this register has been updated in this
507 basic block. */
509 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
511 /* Get the point at which REG was recorded in the table. */
513 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
515 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
516 SUBREG). */
518 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
520 /* Get the quantity number for REG. */
522 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
524 /* Determine if the quantity number for register X represents a valid index
525 into the qty_table. */
527 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
529 static struct table_elt *table[HASH_SIZE];
531 /* Chain of `struct table_elt's made so far for this function
532 but currently removed from the table. */
534 static struct table_elt *free_element_chain;
536 /* Set to the cost of a constant pool reference if one was found for a
537 symbolic constant. If this was found, it means we should try to
538 convert constants into constant pool entries if they don't fit in
539 the insn. */
541 static int constant_pool_entries_cost;
542 static int constant_pool_entries_regcost;
544 /* This data describes a block that will be processed by cse_basic_block. */
546 struct cse_basic_block_data
548 /* Lowest CUID value of insns in block. */
549 int low_cuid;
550 /* Highest CUID value of insns in block. */
551 int high_cuid;
552 /* Total number of SETs in block. */
553 int nsets;
554 /* Last insn in the block. */
555 rtx last;
556 /* Size of current branch path, if any. */
557 int path_size;
558 /* Current branch path, indicating which branches will be taken. */
559 struct branch_path
561 /* The branch insn. */
562 rtx branch;
563 /* Whether it should be taken or not. AROUND is the same as taken
564 except that it is used when the destination label is not preceded
565 by a BARRIER. */
566 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
567 } *path;
570 static bool fixed_base_plus_p (rtx x);
571 static int notreg_cost (rtx, enum rtx_code);
572 static int approx_reg_cost_1 (rtx *, void *);
573 static int approx_reg_cost (rtx);
574 static int preferable (int, int, int, int);
575 static void new_basic_block (void);
576 static void make_new_qty (unsigned int, enum machine_mode);
577 static void make_regs_eqv (unsigned int, unsigned int);
578 static void delete_reg_equiv (unsigned int);
579 static int mention_regs (rtx);
580 static int insert_regs (rtx, struct table_elt *, int);
581 static void remove_from_table (struct table_elt *, unsigned);
582 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
583 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
584 static rtx lookup_as_function (rtx, enum rtx_code);
585 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
586 enum machine_mode);
587 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
588 static void invalidate (rtx, enum machine_mode);
589 static int cse_rtx_varies_p (rtx, int);
590 static void remove_invalid_refs (unsigned int);
591 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
592 enum machine_mode);
593 static void rehash_using_reg (rtx);
594 static void invalidate_memory (void);
595 static void invalidate_for_call (void);
596 static rtx use_related_value (rtx, struct table_elt *);
598 static inline unsigned canon_hash (rtx, enum machine_mode);
599 static inline unsigned safe_hash (rtx, enum machine_mode);
600 static unsigned hash_rtx_string (const char *);
602 static rtx canon_reg (rtx, rtx);
603 static void find_best_addr (rtx, rtx *, enum machine_mode);
604 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
605 enum machine_mode *,
606 enum machine_mode *);
607 static rtx fold_rtx (rtx, rtx);
608 static rtx equiv_constant (rtx);
609 static void record_jump_equiv (rtx, int);
610 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
611 int);
612 static void cse_insn (rtx, rtx);
613 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
614 int, int);
615 static int addr_affects_sp_p (rtx);
616 static void invalidate_from_clobbers (rtx);
617 static rtx cse_process_notes (rtx, rtx);
618 static void invalidate_skipped_set (rtx, rtx, void *);
619 static void invalidate_skipped_block (rtx);
620 static rtx cse_basic_block (rtx, rtx, struct branch_path *);
621 static void count_reg_usage (rtx, int *, int);
622 static int check_for_label_ref (rtx *, void *);
623 extern void dump_class (struct table_elt*);
624 static void get_cse_reg_info_1 (unsigned int regno);
625 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
626 static int check_dependence (rtx *, void *);
628 static void flush_hash_table (void);
629 static bool insn_live_p (rtx, int *);
630 static bool set_live_p (rtx, rtx, int *);
631 static bool dead_libcall_p (rtx, int *);
632 static int cse_change_cc_mode (rtx *, void *);
633 static void cse_change_cc_mode_insn (rtx, rtx);
634 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
635 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
638 #undef RTL_HOOKS_GEN_LOWPART
639 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
641 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
643 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
644 virtual regs here because the simplify_*_operation routines are called
645 by integrate.c, which is called before virtual register instantiation. */
647 static bool
648 fixed_base_plus_p (rtx x)
650 switch (GET_CODE (x))
652 case REG:
653 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
654 return true;
655 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
656 return true;
657 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
658 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
659 return true;
660 return false;
662 case PLUS:
663 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
664 return false;
665 return fixed_base_plus_p (XEXP (x, 0));
667 default:
668 return false;
672 /* Dump the expressions in the equivalence class indicated by CLASSP.
673 This function is used only for debugging. */
674 void
675 dump_class (struct table_elt *classp)
677 struct table_elt *elt;
679 fprintf (stderr, "Equivalence chain for ");
680 print_rtl (stderr, classp->exp);
681 fprintf (stderr, ": \n");
683 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
685 print_rtl (stderr, elt->exp);
686 fprintf (stderr, "\n");
690 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
692 static int
693 approx_reg_cost_1 (rtx *xp, void *data)
695 rtx x = *xp;
696 int *cost_p = data;
698 if (x && REG_P (x))
700 unsigned int regno = REGNO (x);
702 if (! CHEAP_REGNO (regno))
704 if (regno < FIRST_PSEUDO_REGISTER)
706 if (SMALL_REGISTER_CLASSES)
707 return 1;
708 *cost_p += 2;
710 else
711 *cost_p += 1;
715 return 0;
718 /* Return an estimate of the cost of the registers used in an rtx.
719 This is mostly the number of different REG expressions in the rtx;
720 however for some exceptions like fixed registers we use a cost of
721 0. If any other hard register reference occurs, return MAX_COST. */
723 static int
724 approx_reg_cost (rtx x)
726 int cost = 0;
728 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
729 return MAX_COST;
731 return cost;
734 /* Returns a canonical version of X for the address, from the point of view,
735 that all multiplications are represented as MULT instead of the multiply
736 by a power of 2 being represented as ASHIFT. */
738 static rtx
739 canon_for_address (rtx x)
741 enum rtx_code code;
742 enum machine_mode mode;
743 rtx new = 0;
744 int i;
745 const char *fmt;
747 if (!x)
748 return x;
750 code = GET_CODE (x);
751 mode = GET_MODE (x);
753 switch (code)
755 case ASHIFT:
756 if (GET_CODE (XEXP (x, 1)) == CONST_INT
757 && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode)
758 && INTVAL (XEXP (x, 1)) >= 0)
760 new = canon_for_address (XEXP (x, 0));
761 new = gen_rtx_MULT (mode, new,
762 gen_int_mode ((HOST_WIDE_INT) 1
763 << INTVAL (XEXP (x, 1)),
764 mode));
766 break;
767 default:
768 break;
771 if (new)
772 return new;
774 /* Now recursively process each operand of this operation. */
775 fmt = GET_RTX_FORMAT (code);
776 for (i = 0; i < GET_RTX_LENGTH (code); i++)
777 if (fmt[i] == 'e')
779 new = canon_for_address (XEXP (x, i));
780 XEXP (x, i) = new;
782 return x;
785 /* Return a negative value if an rtx A, whose costs are given by COST_A
786 and REGCOST_A, is more desirable than an rtx B.
787 Return a positive value if A is less desirable, or 0 if the two are
788 equally good. */
789 static int
790 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
792 /* First, get rid of cases involving expressions that are entirely
793 unwanted. */
794 if (cost_a != cost_b)
796 if (cost_a == MAX_COST)
797 return 1;
798 if (cost_b == MAX_COST)
799 return -1;
802 /* Avoid extending lifetimes of hardregs. */
803 if (regcost_a != regcost_b)
805 if (regcost_a == MAX_COST)
806 return 1;
807 if (regcost_b == MAX_COST)
808 return -1;
811 /* Normal operation costs take precedence. */
812 if (cost_a != cost_b)
813 return cost_a - cost_b;
814 /* Only if these are identical consider effects on register pressure. */
815 if (regcost_a != regcost_b)
816 return regcost_a - regcost_b;
817 return 0;
820 /* Internal function, to compute cost when X is not a register; called
821 from COST macro to keep it simple. */
823 static int
824 notreg_cost (rtx x, enum rtx_code outer)
826 return ((GET_CODE (x) == SUBREG
827 && REG_P (SUBREG_REG (x))
828 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
829 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
830 && (GET_MODE_SIZE (GET_MODE (x))
831 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
832 && subreg_lowpart_p (x)
833 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
834 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
836 : rtx_cost (x, outer) * 2);
840 /* Initialize CSE_REG_INFO_TABLE. */
842 static void
843 init_cse_reg_info (unsigned int nregs)
845 /* Do we need to grow the table? */
846 if (nregs > cse_reg_info_table_size)
848 unsigned int new_size;
850 if (cse_reg_info_table_size < 2048)
852 /* Compute a new size that is a power of 2 and no smaller
853 than the large of NREGS and 64. */
854 new_size = (cse_reg_info_table_size
855 ? cse_reg_info_table_size : 64);
857 while (new_size < nregs)
858 new_size *= 2;
860 else
862 /* If we need a big table, allocate just enough to hold
863 NREGS registers. */
864 new_size = nregs;
867 /* Reallocate the table with NEW_SIZE entries. */
868 if (cse_reg_info_table)
869 free (cse_reg_info_table);
870 cse_reg_info_table = xmalloc (sizeof (struct cse_reg_info)
871 * new_size);
872 cse_reg_info_table_size = new_size;
873 cse_reg_info_table_first_uninitialized = 0;
876 /* Do we have all of the first NREGS entries initialized? */
877 if (cse_reg_info_table_first_uninitialized < nregs)
879 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
880 unsigned int i;
882 /* Put the old timestamp on newly allocated entries so that they
883 will all be considered out of date. We do not touch those
884 entries beyond the first NREGS entries to be nice to the
885 virtual memory. */
886 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
887 cse_reg_info_table[i].timestamp = old_timestamp;
889 cse_reg_info_table_first_uninitialized = nregs;
893 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
895 static void
896 get_cse_reg_info_1 (unsigned int regno)
898 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
899 entry will be considered to have been initialized. */
900 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
902 /* Initialize the rest of the entry. */
903 cse_reg_info_table[regno].reg_tick = 1;
904 cse_reg_info_table[regno].reg_in_table = -1;
905 cse_reg_info_table[regno].subreg_ticked = -1;
906 cse_reg_info_table[regno].reg_qty = -regno - 1;
909 /* Find a cse_reg_info entry for REGNO. */
911 static inline struct cse_reg_info *
912 get_cse_reg_info (unsigned int regno)
914 struct cse_reg_info *p = &cse_reg_info_table[regno];
916 /* If this entry has not been initialized, go ahead and initialize
917 it. */
918 if (p->timestamp != cse_reg_info_timestamp)
919 get_cse_reg_info_1 (regno);
921 return p;
924 /* Clear the hash table and initialize each register with its own quantity,
925 for a new basic block. */
927 static void
928 new_basic_block (void)
930 int i;
932 next_qty = 0;
934 /* Invalidate cse_reg_info_table. */
935 cse_reg_info_timestamp++;
937 /* Clear out hash table state for this pass. */
938 CLEAR_HARD_REG_SET (hard_regs_in_table);
940 /* The per-quantity values used to be initialized here, but it is
941 much faster to initialize each as it is made in `make_new_qty'. */
943 for (i = 0; i < HASH_SIZE; i++)
945 struct table_elt *first;
947 first = table[i];
948 if (first != NULL)
950 struct table_elt *last = first;
952 table[i] = NULL;
954 while (last->next_same_hash != NULL)
955 last = last->next_same_hash;
957 /* Now relink this hash entire chain into
958 the free element list. */
960 last->next_same_hash = free_element_chain;
961 free_element_chain = first;
965 #ifdef HAVE_cc0
966 prev_insn = 0;
967 prev_insn_cc0 = 0;
968 #endif
971 /* Say that register REG contains a quantity in mode MODE not in any
972 register before and initialize that quantity. */
974 static void
975 make_new_qty (unsigned int reg, enum machine_mode mode)
977 int q;
978 struct qty_table_elem *ent;
979 struct reg_eqv_elem *eqv;
981 gcc_assert (next_qty < max_qty);
983 q = REG_QTY (reg) = next_qty++;
984 ent = &qty_table[q];
985 ent->first_reg = reg;
986 ent->last_reg = reg;
987 ent->mode = mode;
988 ent->const_rtx = ent->const_insn = NULL_RTX;
989 ent->comparison_code = UNKNOWN;
991 eqv = &reg_eqv_table[reg];
992 eqv->next = eqv->prev = -1;
995 /* Make reg NEW equivalent to reg OLD.
996 OLD is not changing; NEW is. */
998 static void
999 make_regs_eqv (unsigned int new, unsigned int old)
1001 unsigned int lastr, firstr;
1002 int q = REG_QTY (old);
1003 struct qty_table_elem *ent;
1005 ent = &qty_table[q];
1007 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1008 gcc_assert (REGNO_QTY_VALID_P (old));
1010 REG_QTY (new) = q;
1011 firstr = ent->first_reg;
1012 lastr = ent->last_reg;
1014 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1015 hard regs. Among pseudos, if NEW will live longer than any other reg
1016 of the same qty, and that is beyond the current basic block,
1017 make it the new canonical replacement for this qty. */
1018 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1019 /* Certain fixed registers might be of the class NO_REGS. This means
1020 that not only can they not be allocated by the compiler, but
1021 they cannot be used in substitutions or canonicalizations
1022 either. */
1023 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1024 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1025 || (new >= FIRST_PSEUDO_REGISTER
1026 && (firstr < FIRST_PSEUDO_REGISTER
1027 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1028 || (uid_cuid[REGNO_FIRST_UID (new)]
1029 < cse_basic_block_start))
1030 && (uid_cuid[REGNO_LAST_UID (new)]
1031 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1033 reg_eqv_table[firstr].prev = new;
1034 reg_eqv_table[new].next = firstr;
1035 reg_eqv_table[new].prev = -1;
1036 ent->first_reg = new;
1038 else
1040 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1041 Otherwise, insert before any non-fixed hard regs that are at the
1042 end. Registers of class NO_REGS cannot be used as an
1043 equivalent for anything. */
1044 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1045 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1046 && new >= FIRST_PSEUDO_REGISTER)
1047 lastr = reg_eqv_table[lastr].prev;
1048 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1049 if (reg_eqv_table[lastr].next >= 0)
1050 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1051 else
1052 qty_table[q].last_reg = new;
1053 reg_eqv_table[lastr].next = new;
1054 reg_eqv_table[new].prev = lastr;
1058 /* Remove REG from its equivalence class. */
1060 static void
1061 delete_reg_equiv (unsigned int reg)
1063 struct qty_table_elem *ent;
1064 int q = REG_QTY (reg);
1065 int p, n;
1067 /* If invalid, do nothing. */
1068 if (! REGNO_QTY_VALID_P (reg))
1069 return;
1071 ent = &qty_table[q];
1073 p = reg_eqv_table[reg].prev;
1074 n = reg_eqv_table[reg].next;
1076 if (n != -1)
1077 reg_eqv_table[n].prev = p;
1078 else
1079 ent->last_reg = p;
1080 if (p != -1)
1081 reg_eqv_table[p].next = n;
1082 else
1083 ent->first_reg = n;
1085 REG_QTY (reg) = -reg - 1;
1088 /* Remove any invalid expressions from the hash table
1089 that refer to any of the registers contained in expression X.
1091 Make sure that newly inserted references to those registers
1092 as subexpressions will be considered valid.
1094 mention_regs is not called when a register itself
1095 is being stored in the table.
1097 Return 1 if we have done something that may have changed the hash code
1098 of X. */
1100 static int
1101 mention_regs (rtx x)
1103 enum rtx_code code;
1104 int i, j;
1105 const char *fmt;
1106 int changed = 0;
1108 if (x == 0)
1109 return 0;
1111 code = GET_CODE (x);
1112 if (code == REG)
1114 unsigned int regno = REGNO (x);
1115 unsigned int endregno
1116 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1117 : hard_regno_nregs[regno][GET_MODE (x)]);
1118 unsigned int i;
1120 for (i = regno; i < endregno; i++)
1122 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1123 remove_invalid_refs (i);
1125 REG_IN_TABLE (i) = REG_TICK (i);
1126 SUBREG_TICKED (i) = -1;
1129 return 0;
1132 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1133 pseudo if they don't use overlapping words. We handle only pseudos
1134 here for simplicity. */
1135 if (code == SUBREG && REG_P (SUBREG_REG (x))
1136 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1138 unsigned int i = REGNO (SUBREG_REG (x));
1140 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1142 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1143 the last store to this register really stored into this
1144 subreg, then remove the memory of this subreg.
1145 Otherwise, remove any memory of the entire register and
1146 all its subregs from the table. */
1147 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1148 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1149 remove_invalid_refs (i);
1150 else
1151 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1154 REG_IN_TABLE (i) = REG_TICK (i);
1155 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1156 return 0;
1159 /* If X is a comparison or a COMPARE and either operand is a register
1160 that does not have a quantity, give it one. This is so that a later
1161 call to record_jump_equiv won't cause X to be assigned a different
1162 hash code and not found in the table after that call.
1164 It is not necessary to do this here, since rehash_using_reg can
1165 fix up the table later, but doing this here eliminates the need to
1166 call that expensive function in the most common case where the only
1167 use of the register is in the comparison. */
1169 if (code == COMPARE || COMPARISON_P (x))
1171 if (REG_P (XEXP (x, 0))
1172 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1173 if (insert_regs (XEXP (x, 0), NULL, 0))
1175 rehash_using_reg (XEXP (x, 0));
1176 changed = 1;
1179 if (REG_P (XEXP (x, 1))
1180 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1181 if (insert_regs (XEXP (x, 1), NULL, 0))
1183 rehash_using_reg (XEXP (x, 1));
1184 changed = 1;
1188 fmt = GET_RTX_FORMAT (code);
1189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1190 if (fmt[i] == 'e')
1191 changed |= mention_regs (XEXP (x, i));
1192 else if (fmt[i] == 'E')
1193 for (j = 0; j < XVECLEN (x, i); j++)
1194 changed |= mention_regs (XVECEXP (x, i, j));
1196 return changed;
1199 /* Update the register quantities for inserting X into the hash table
1200 with a value equivalent to CLASSP.
1201 (If the class does not contain a REG, it is irrelevant.)
1202 If MODIFIED is nonzero, X is a destination; it is being modified.
1203 Note that delete_reg_equiv should be called on a register
1204 before insert_regs is done on that register with MODIFIED != 0.
1206 Nonzero value means that elements of reg_qty have changed
1207 so X's hash code may be different. */
1209 static int
1210 insert_regs (rtx x, struct table_elt *classp, int modified)
1212 if (REG_P (x))
1214 unsigned int regno = REGNO (x);
1215 int qty_valid;
1217 /* If REGNO is in the equivalence table already but is of the
1218 wrong mode for that equivalence, don't do anything here. */
1220 qty_valid = REGNO_QTY_VALID_P (regno);
1221 if (qty_valid)
1223 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1225 if (ent->mode != GET_MODE (x))
1226 return 0;
1229 if (modified || ! qty_valid)
1231 if (classp)
1232 for (classp = classp->first_same_value;
1233 classp != 0;
1234 classp = classp->next_same_value)
1235 if (REG_P (classp->exp)
1236 && GET_MODE (classp->exp) == GET_MODE (x))
1238 unsigned c_regno = REGNO (classp->exp);
1240 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1242 /* Suppose that 5 is hard reg and 100 and 101 are
1243 pseudos. Consider
1245 (set (reg:si 100) (reg:si 5))
1246 (set (reg:si 5) (reg:si 100))
1247 (set (reg:di 101) (reg:di 5))
1249 We would now set REG_QTY (101) = REG_QTY (5), but the
1250 entry for 5 is in SImode. When we use this later in
1251 copy propagation, we get the register in wrong mode. */
1252 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1253 continue;
1255 make_regs_eqv (regno, c_regno);
1256 return 1;
1259 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1260 than REG_IN_TABLE to find out if there was only a single preceding
1261 invalidation - for the SUBREG - or another one, which would be
1262 for the full register. However, if we find here that REG_TICK
1263 indicates that the register is invalid, it means that it has
1264 been invalidated in a separate operation. The SUBREG might be used
1265 now (then this is a recursive call), or we might use the full REG
1266 now and a SUBREG of it later. So bump up REG_TICK so that
1267 mention_regs will do the right thing. */
1268 if (! modified
1269 && REG_IN_TABLE (regno) >= 0
1270 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1271 REG_TICK (regno)++;
1272 make_new_qty (regno, GET_MODE (x));
1273 return 1;
1276 return 0;
1279 /* If X is a SUBREG, we will likely be inserting the inner register in the
1280 table. If that register doesn't have an assigned quantity number at
1281 this point but does later, the insertion that we will be doing now will
1282 not be accessible because its hash code will have changed. So assign
1283 a quantity number now. */
1285 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1286 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1288 insert_regs (SUBREG_REG (x), NULL, 0);
1289 mention_regs (x);
1290 return 1;
1292 else
1293 return mention_regs (x);
1296 /* Look in or update the hash table. */
1298 /* Remove table element ELT from use in the table.
1299 HASH is its hash code, made using the HASH macro.
1300 It's an argument because often that is known in advance
1301 and we save much time not recomputing it. */
1303 static void
1304 remove_from_table (struct table_elt *elt, unsigned int hash)
1306 if (elt == 0)
1307 return;
1309 /* Mark this element as removed. See cse_insn. */
1310 elt->first_same_value = 0;
1312 /* Remove the table element from its equivalence class. */
1315 struct table_elt *prev = elt->prev_same_value;
1316 struct table_elt *next = elt->next_same_value;
1318 if (next)
1319 next->prev_same_value = prev;
1321 if (prev)
1322 prev->next_same_value = next;
1323 else
1325 struct table_elt *newfirst = next;
1326 while (next)
1328 next->first_same_value = newfirst;
1329 next = next->next_same_value;
1334 /* Remove the table element from its hash bucket. */
1337 struct table_elt *prev = elt->prev_same_hash;
1338 struct table_elt *next = elt->next_same_hash;
1340 if (next)
1341 next->prev_same_hash = prev;
1343 if (prev)
1344 prev->next_same_hash = next;
1345 else if (table[hash] == elt)
1346 table[hash] = next;
1347 else
1349 /* This entry is not in the proper hash bucket. This can happen
1350 when two classes were merged by `merge_equiv_classes'. Search
1351 for the hash bucket that it heads. This happens only very
1352 rarely, so the cost is acceptable. */
1353 for (hash = 0; hash < HASH_SIZE; hash++)
1354 if (table[hash] == elt)
1355 table[hash] = next;
1359 /* Remove the table element from its related-value circular chain. */
1361 if (elt->related_value != 0 && elt->related_value != elt)
1363 struct table_elt *p = elt->related_value;
1365 while (p->related_value != elt)
1366 p = p->related_value;
1367 p->related_value = elt->related_value;
1368 if (p->related_value == p)
1369 p->related_value = 0;
1372 /* Now add it to the free element chain. */
1373 elt->next_same_hash = free_element_chain;
1374 free_element_chain = elt;
1377 /* Look up X in the hash table and return its table element,
1378 or 0 if X is not in the table.
1380 MODE is the machine-mode of X, or if X is an integer constant
1381 with VOIDmode then MODE is the mode with which X will be used.
1383 Here we are satisfied to find an expression whose tree structure
1384 looks like X. */
1386 static struct table_elt *
1387 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1389 struct table_elt *p;
1391 for (p = table[hash]; p; p = p->next_same_hash)
1392 if (mode == p->mode && ((x == p->exp && REG_P (x))
1393 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1394 return p;
1396 return 0;
1399 /* Like `lookup' but don't care whether the table element uses invalid regs.
1400 Also ignore discrepancies in the machine mode of a register. */
1402 static struct table_elt *
1403 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1405 struct table_elt *p;
1407 if (REG_P (x))
1409 unsigned int regno = REGNO (x);
1411 /* Don't check the machine mode when comparing registers;
1412 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1413 for (p = table[hash]; p; p = p->next_same_hash)
1414 if (REG_P (p->exp)
1415 && REGNO (p->exp) == regno)
1416 return p;
1418 else
1420 for (p = table[hash]; p; p = p->next_same_hash)
1421 if (mode == p->mode
1422 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1423 return p;
1426 return 0;
1429 /* Look for an expression equivalent to X and with code CODE.
1430 If one is found, return that expression. */
1432 static rtx
1433 lookup_as_function (rtx x, enum rtx_code code)
1435 struct table_elt *p
1436 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1438 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1439 long as we are narrowing. So if we looked in vain for a mode narrower
1440 than word_mode before, look for word_mode now. */
1441 if (p == 0 && code == CONST_INT
1442 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1444 x = copy_rtx (x);
1445 PUT_MODE (x, word_mode);
1446 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1449 if (p == 0)
1450 return 0;
1452 for (p = p->first_same_value; p; p = p->next_same_value)
1453 if (GET_CODE (p->exp) == code
1454 /* Make sure this is a valid entry in the table. */
1455 && exp_equiv_p (p->exp, p->exp, 1, false))
1456 return p->exp;
1458 return 0;
1461 /* Insert X in the hash table, assuming HASH is its hash code
1462 and CLASSP is an element of the class it should go in
1463 (or 0 if a new class should be made).
1464 It is inserted at the proper position to keep the class in
1465 the order cheapest first.
1467 MODE is the machine-mode of X, or if X is an integer constant
1468 with VOIDmode then MODE is the mode with which X will be used.
1470 For elements of equal cheapness, the most recent one
1471 goes in front, except that the first element in the list
1472 remains first unless a cheaper element is added. The order of
1473 pseudo-registers does not matter, as canon_reg will be called to
1474 find the cheapest when a register is retrieved from the table.
1476 The in_memory field in the hash table element is set to 0.
1477 The caller must set it nonzero if appropriate.
1479 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1480 and if insert_regs returns a nonzero value
1481 you must then recompute its hash code before calling here.
1483 If necessary, update table showing constant values of quantities. */
1485 #define CHEAPER(X, Y) \
1486 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1488 static struct table_elt *
1489 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1491 struct table_elt *elt;
1493 /* If X is a register and we haven't made a quantity for it,
1494 something is wrong. */
1495 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1497 /* If X is a hard register, show it is being put in the table. */
1498 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1500 unsigned int regno = REGNO (x);
1501 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1502 unsigned int i;
1504 for (i = regno; i < endregno; i++)
1505 SET_HARD_REG_BIT (hard_regs_in_table, i);
1508 /* Put an element for X into the right hash bucket. */
1510 elt = free_element_chain;
1511 if (elt)
1512 free_element_chain = elt->next_same_hash;
1513 else
1514 elt = xmalloc (sizeof (struct table_elt));
1516 elt->exp = x;
1517 elt->canon_exp = NULL_RTX;
1518 elt->cost = COST (x);
1519 elt->regcost = approx_reg_cost (x);
1520 elt->next_same_value = 0;
1521 elt->prev_same_value = 0;
1522 elt->next_same_hash = table[hash];
1523 elt->prev_same_hash = 0;
1524 elt->related_value = 0;
1525 elt->in_memory = 0;
1526 elt->mode = mode;
1527 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1529 if (table[hash])
1530 table[hash]->prev_same_hash = elt;
1531 table[hash] = elt;
1533 /* Put it into the proper value-class. */
1534 if (classp)
1536 classp = classp->first_same_value;
1537 if (CHEAPER (elt, classp))
1538 /* Insert at the head of the class. */
1540 struct table_elt *p;
1541 elt->next_same_value = classp;
1542 classp->prev_same_value = elt;
1543 elt->first_same_value = elt;
1545 for (p = classp; p; p = p->next_same_value)
1546 p->first_same_value = elt;
1548 else
1550 /* Insert not at head of the class. */
1551 /* Put it after the last element cheaper than X. */
1552 struct table_elt *p, *next;
1554 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1555 p = next);
1557 /* Put it after P and before NEXT. */
1558 elt->next_same_value = next;
1559 if (next)
1560 next->prev_same_value = elt;
1562 elt->prev_same_value = p;
1563 p->next_same_value = elt;
1564 elt->first_same_value = classp;
1567 else
1568 elt->first_same_value = elt;
1570 /* If this is a constant being set equivalent to a register or a register
1571 being set equivalent to a constant, note the constant equivalence.
1573 If this is a constant, it cannot be equivalent to a different constant,
1574 and a constant is the only thing that can be cheaper than a register. So
1575 we know the register is the head of the class (before the constant was
1576 inserted).
1578 If this is a register that is not already known equivalent to a
1579 constant, we must check the entire class.
1581 If this is a register that is already known equivalent to an insn,
1582 update the qtys `const_insn' to show that `this_insn' is the latest
1583 insn making that quantity equivalent to the constant. */
1585 if (elt->is_const && classp && REG_P (classp->exp)
1586 && !REG_P (x))
1588 int exp_q = REG_QTY (REGNO (classp->exp));
1589 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1591 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1592 exp_ent->const_insn = this_insn;
1595 else if (REG_P (x)
1596 && classp
1597 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1598 && ! elt->is_const)
1600 struct table_elt *p;
1602 for (p = classp; p != 0; p = p->next_same_value)
1604 if (p->is_const && !REG_P (p->exp))
1606 int x_q = REG_QTY (REGNO (x));
1607 struct qty_table_elem *x_ent = &qty_table[x_q];
1609 x_ent->const_rtx
1610 = gen_lowpart (GET_MODE (x), p->exp);
1611 x_ent->const_insn = this_insn;
1612 break;
1617 else if (REG_P (x)
1618 && qty_table[REG_QTY (REGNO (x))].const_rtx
1619 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1620 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1622 /* If this is a constant with symbolic value,
1623 and it has a term with an explicit integer value,
1624 link it up with related expressions. */
1625 if (GET_CODE (x) == CONST)
1627 rtx subexp = get_related_value (x);
1628 unsigned subhash;
1629 struct table_elt *subelt, *subelt_prev;
1631 if (subexp != 0)
1633 /* Get the integer-free subexpression in the hash table. */
1634 subhash = SAFE_HASH (subexp, mode);
1635 subelt = lookup (subexp, subhash, mode);
1636 if (subelt == 0)
1637 subelt = insert (subexp, NULL, subhash, mode);
1638 /* Initialize SUBELT's circular chain if it has none. */
1639 if (subelt->related_value == 0)
1640 subelt->related_value = subelt;
1641 /* Find the element in the circular chain that precedes SUBELT. */
1642 subelt_prev = subelt;
1643 while (subelt_prev->related_value != subelt)
1644 subelt_prev = subelt_prev->related_value;
1645 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1646 This way the element that follows SUBELT is the oldest one. */
1647 elt->related_value = subelt_prev->related_value;
1648 subelt_prev->related_value = elt;
1652 return elt;
1655 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1656 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1657 the two classes equivalent.
1659 CLASS1 will be the surviving class; CLASS2 should not be used after this
1660 call.
1662 Any invalid entries in CLASS2 will not be copied. */
1664 static void
1665 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1667 struct table_elt *elt, *next, *new;
1669 /* Ensure we start with the head of the classes. */
1670 class1 = class1->first_same_value;
1671 class2 = class2->first_same_value;
1673 /* If they were already equal, forget it. */
1674 if (class1 == class2)
1675 return;
1677 for (elt = class2; elt; elt = next)
1679 unsigned int hash;
1680 rtx exp = elt->exp;
1681 enum machine_mode mode = elt->mode;
1683 next = elt->next_same_value;
1685 /* Remove old entry, make a new one in CLASS1's class.
1686 Don't do this for invalid entries as we cannot find their
1687 hash code (it also isn't necessary). */
1688 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1690 bool need_rehash = false;
1692 hash_arg_in_memory = 0;
1693 hash = HASH (exp, mode);
1695 if (REG_P (exp))
1697 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1698 delete_reg_equiv (REGNO (exp));
1701 remove_from_table (elt, hash);
1703 if (insert_regs (exp, class1, 0) || need_rehash)
1705 rehash_using_reg (exp);
1706 hash = HASH (exp, mode);
1708 new = insert (exp, class1, hash, mode);
1709 new->in_memory = hash_arg_in_memory;
1714 /* Flush the entire hash table. */
1716 static void
1717 flush_hash_table (void)
1719 int i;
1720 struct table_elt *p;
1722 for (i = 0; i < HASH_SIZE; i++)
1723 for (p = table[i]; p; p = table[i])
1725 /* Note that invalidate can remove elements
1726 after P in the current hash chain. */
1727 if (REG_P (p->exp))
1728 invalidate (p->exp, p->mode);
1729 else
1730 remove_from_table (p, i);
1734 /* Function called for each rtx to check whether true dependence exist. */
1735 struct check_dependence_data
1737 enum machine_mode mode;
1738 rtx exp;
1739 rtx addr;
1742 static int
1743 check_dependence (rtx *x, void *data)
1745 struct check_dependence_data *d = (struct check_dependence_data *) data;
1746 if (*x && MEM_P (*x))
1747 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1748 cse_rtx_varies_p);
1749 else
1750 return 0;
1753 /* Remove from the hash table, or mark as invalid, all expressions whose
1754 values could be altered by storing in X. X is a register, a subreg, or
1755 a memory reference with nonvarying address (because, when a memory
1756 reference with a varying address is stored in, all memory references are
1757 removed by invalidate_memory so specific invalidation is superfluous).
1758 FULL_MODE, if not VOIDmode, indicates that this much should be
1759 invalidated instead of just the amount indicated by the mode of X. This
1760 is only used for bitfield stores into memory.
1762 A nonvarying address may be just a register or just a symbol reference,
1763 or it may be either of those plus a numeric offset. */
1765 static void
1766 invalidate (rtx x, enum machine_mode full_mode)
1768 int i;
1769 struct table_elt *p;
1770 rtx addr;
1772 switch (GET_CODE (x))
1774 case REG:
1776 /* If X is a register, dependencies on its contents are recorded
1777 through the qty number mechanism. Just change the qty number of
1778 the register, mark it as invalid for expressions that refer to it,
1779 and remove it itself. */
1780 unsigned int regno = REGNO (x);
1781 unsigned int hash = HASH (x, GET_MODE (x));
1783 /* Remove REGNO from any quantity list it might be on and indicate
1784 that its value might have changed. If it is a pseudo, remove its
1785 entry from the hash table.
1787 For a hard register, we do the first two actions above for any
1788 additional hard registers corresponding to X. Then, if any of these
1789 registers are in the table, we must remove any REG entries that
1790 overlap these registers. */
1792 delete_reg_equiv (regno);
1793 REG_TICK (regno)++;
1794 SUBREG_TICKED (regno) = -1;
1796 if (regno >= FIRST_PSEUDO_REGISTER)
1798 /* Because a register can be referenced in more than one mode,
1799 we might have to remove more than one table entry. */
1800 struct table_elt *elt;
1802 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1803 remove_from_table (elt, hash);
1805 else
1807 HOST_WIDE_INT in_table
1808 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1809 unsigned int endregno
1810 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1811 unsigned int tregno, tendregno, rn;
1812 struct table_elt *p, *next;
1814 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1816 for (rn = regno + 1; rn < endregno; rn++)
1818 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1819 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1820 delete_reg_equiv (rn);
1821 REG_TICK (rn)++;
1822 SUBREG_TICKED (rn) = -1;
1825 if (in_table)
1826 for (hash = 0; hash < HASH_SIZE; hash++)
1827 for (p = table[hash]; p; p = next)
1829 next = p->next_same_hash;
1831 if (!REG_P (p->exp)
1832 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1833 continue;
1835 tregno = REGNO (p->exp);
1836 tendregno
1837 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1838 if (tendregno > regno && tregno < endregno)
1839 remove_from_table (p, hash);
1843 return;
1845 case SUBREG:
1846 invalidate (SUBREG_REG (x), VOIDmode);
1847 return;
1849 case PARALLEL:
1850 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1851 invalidate (XVECEXP (x, 0, i), VOIDmode);
1852 return;
1854 case EXPR_LIST:
1855 /* This is part of a disjoint return value; extract the location in
1856 question ignoring the offset. */
1857 invalidate (XEXP (x, 0), VOIDmode);
1858 return;
1860 case MEM:
1861 addr = canon_rtx (get_addr (XEXP (x, 0)));
1862 /* Calculate the canonical version of X here so that
1863 true_dependence doesn't generate new RTL for X on each call. */
1864 x = canon_rtx (x);
1866 /* Remove all hash table elements that refer to overlapping pieces of
1867 memory. */
1868 if (full_mode == VOIDmode)
1869 full_mode = GET_MODE (x);
1871 for (i = 0; i < HASH_SIZE; i++)
1873 struct table_elt *next;
1875 for (p = table[i]; p; p = next)
1877 next = p->next_same_hash;
1878 if (p->in_memory)
1880 struct check_dependence_data d;
1882 /* Just canonicalize the expression once;
1883 otherwise each time we call invalidate
1884 true_dependence will canonicalize the
1885 expression again. */
1886 if (!p->canon_exp)
1887 p->canon_exp = canon_rtx (p->exp);
1888 d.exp = x;
1889 d.addr = addr;
1890 d.mode = full_mode;
1891 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1892 remove_from_table (p, i);
1896 return;
1898 default:
1899 gcc_unreachable ();
1903 /* Remove all expressions that refer to register REGNO,
1904 since they are already invalid, and we are about to
1905 mark that register valid again and don't want the old
1906 expressions to reappear as valid. */
1908 static void
1909 remove_invalid_refs (unsigned int regno)
1911 unsigned int i;
1912 struct table_elt *p, *next;
1914 for (i = 0; i < HASH_SIZE; i++)
1915 for (p = table[i]; p; p = next)
1917 next = p->next_same_hash;
1918 if (!REG_P (p->exp)
1919 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1920 remove_from_table (p, i);
1924 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1925 and mode MODE. */
1926 static void
1927 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1928 enum machine_mode mode)
1930 unsigned int i;
1931 struct table_elt *p, *next;
1932 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1934 for (i = 0; i < HASH_SIZE; i++)
1935 for (p = table[i]; p; p = next)
1937 rtx exp = p->exp;
1938 next = p->next_same_hash;
1940 if (!REG_P (exp)
1941 && (GET_CODE (exp) != SUBREG
1942 || !REG_P (SUBREG_REG (exp))
1943 || REGNO (SUBREG_REG (exp)) != regno
1944 || (((SUBREG_BYTE (exp)
1945 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1946 && SUBREG_BYTE (exp) <= end))
1947 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1948 remove_from_table (p, i);
1952 /* Recompute the hash codes of any valid entries in the hash table that
1953 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1955 This is called when we make a jump equivalence. */
1957 static void
1958 rehash_using_reg (rtx x)
1960 unsigned int i;
1961 struct table_elt *p, *next;
1962 unsigned hash;
1964 if (GET_CODE (x) == SUBREG)
1965 x = SUBREG_REG (x);
1967 /* If X is not a register or if the register is known not to be in any
1968 valid entries in the table, we have no work to do. */
1970 if (!REG_P (x)
1971 || REG_IN_TABLE (REGNO (x)) < 0
1972 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1973 return;
1975 /* Scan all hash chains looking for valid entries that mention X.
1976 If we find one and it is in the wrong hash chain, move it. */
1978 for (i = 0; i < HASH_SIZE; i++)
1979 for (p = table[i]; p; p = next)
1981 next = p->next_same_hash;
1982 if (reg_mentioned_p (x, p->exp)
1983 && exp_equiv_p (p->exp, p->exp, 1, false)
1984 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1986 if (p->next_same_hash)
1987 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1989 if (p->prev_same_hash)
1990 p->prev_same_hash->next_same_hash = p->next_same_hash;
1991 else
1992 table[i] = p->next_same_hash;
1994 p->next_same_hash = table[hash];
1995 p->prev_same_hash = 0;
1996 if (table[hash])
1997 table[hash]->prev_same_hash = p;
1998 table[hash] = p;
2003 /* Remove from the hash table any expression that is a call-clobbered
2004 register. Also update their TICK values. */
2006 static void
2007 invalidate_for_call (void)
2009 unsigned int regno, endregno;
2010 unsigned int i;
2011 unsigned hash;
2012 struct table_elt *p, *next;
2013 int in_table = 0;
2015 /* Go through all the hard registers. For each that is clobbered in
2016 a CALL_INSN, remove the register from quantity chains and update
2017 reg_tick if defined. Also see if any of these registers is currently
2018 in the table. */
2020 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2021 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2023 delete_reg_equiv (regno);
2024 if (REG_TICK (regno) >= 0)
2026 REG_TICK (regno)++;
2027 SUBREG_TICKED (regno) = -1;
2030 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2033 /* In the case where we have no call-clobbered hard registers in the
2034 table, we are done. Otherwise, scan the table and remove any
2035 entry that overlaps a call-clobbered register. */
2037 if (in_table)
2038 for (hash = 0; hash < HASH_SIZE; hash++)
2039 for (p = table[hash]; p; p = next)
2041 next = p->next_same_hash;
2043 if (!REG_P (p->exp)
2044 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2045 continue;
2047 regno = REGNO (p->exp);
2048 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
2050 for (i = regno; i < endregno; i++)
2051 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2053 remove_from_table (p, hash);
2054 break;
2059 /* Given an expression X of type CONST,
2060 and ELT which is its table entry (or 0 if it
2061 is not in the hash table),
2062 return an alternate expression for X as a register plus integer.
2063 If none can be found, return 0. */
2065 static rtx
2066 use_related_value (rtx x, struct table_elt *elt)
2068 struct table_elt *relt = 0;
2069 struct table_elt *p, *q;
2070 HOST_WIDE_INT offset;
2072 /* First, is there anything related known?
2073 If we have a table element, we can tell from that.
2074 Otherwise, must look it up. */
2076 if (elt != 0 && elt->related_value != 0)
2077 relt = elt;
2078 else if (elt == 0 && GET_CODE (x) == CONST)
2080 rtx subexp = get_related_value (x);
2081 if (subexp != 0)
2082 relt = lookup (subexp,
2083 SAFE_HASH (subexp, GET_MODE (subexp)),
2084 GET_MODE (subexp));
2087 if (relt == 0)
2088 return 0;
2090 /* Search all related table entries for one that has an
2091 equivalent register. */
2093 p = relt;
2094 while (1)
2096 /* This loop is strange in that it is executed in two different cases.
2097 The first is when X is already in the table. Then it is searching
2098 the RELATED_VALUE list of X's class (RELT). The second case is when
2099 X is not in the table. Then RELT points to a class for the related
2100 value.
2102 Ensure that, whatever case we are in, that we ignore classes that have
2103 the same value as X. */
2105 if (rtx_equal_p (x, p->exp))
2106 q = 0;
2107 else
2108 for (q = p->first_same_value; q; q = q->next_same_value)
2109 if (REG_P (q->exp))
2110 break;
2112 if (q)
2113 break;
2115 p = p->related_value;
2117 /* We went all the way around, so there is nothing to be found.
2118 Alternatively, perhaps RELT was in the table for some other reason
2119 and it has no related values recorded. */
2120 if (p == relt || p == 0)
2121 break;
2124 if (q == 0)
2125 return 0;
2127 offset = (get_integer_term (x) - get_integer_term (p->exp));
2128 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2129 return plus_constant (q->exp, offset);
2132 /* Hash a string. Just add its bytes up. */
2133 static inline unsigned
2134 hash_rtx_string (const char *ps)
2136 unsigned hash = 0;
2137 const unsigned char *p = (const unsigned char *) ps;
2139 if (p)
2140 while (*p)
2141 hash += *p++;
2143 return hash;
2146 /* Hash an rtx. We are careful to make sure the value is never negative.
2147 Equivalent registers hash identically.
2148 MODE is used in hashing for CONST_INTs only;
2149 otherwise the mode of X is used.
2151 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2153 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2154 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2156 Note that cse_insn knows that the hash code of a MEM expression
2157 is just (int) MEM plus the hash code of the address. */
2159 unsigned
2160 hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p,
2161 int *hash_arg_in_memory_p, bool have_reg_qty)
2163 int i, j;
2164 unsigned hash = 0;
2165 enum rtx_code code;
2166 const char *fmt;
2168 /* Used to turn recursion into iteration. We can't rely on GCC's
2169 tail-recursion elimination since we need to keep accumulating values
2170 in HASH. */
2171 repeat:
2172 if (x == 0)
2173 return hash;
2175 code = GET_CODE (x);
2176 switch (code)
2178 case REG:
2180 unsigned int regno = REGNO (x);
2182 if (!reload_completed)
2184 /* On some machines, we can't record any non-fixed hard register,
2185 because extending its life will cause reload problems. We
2186 consider ap, fp, sp, gp to be fixed for this purpose.
2188 We also consider CCmode registers to be fixed for this purpose;
2189 failure to do so leads to failure to simplify 0<100 type of
2190 conditionals.
2192 On all machines, we can't record any global registers.
2193 Nor should we record any register that is in a small
2194 class, as defined by CLASS_LIKELY_SPILLED_P. */
2195 bool record;
2197 if (regno >= FIRST_PSEUDO_REGISTER)
2198 record = true;
2199 else if (x == frame_pointer_rtx
2200 || x == hard_frame_pointer_rtx
2201 || x == arg_pointer_rtx
2202 || x == stack_pointer_rtx
2203 || x == pic_offset_table_rtx)
2204 record = true;
2205 else if (global_regs[regno])
2206 record = false;
2207 else if (fixed_regs[regno])
2208 record = true;
2209 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2210 record = true;
2211 else if (SMALL_REGISTER_CLASSES)
2212 record = false;
2213 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2214 record = false;
2215 else
2216 record = true;
2218 if (!record)
2220 *do_not_record_p = 1;
2221 return 0;
2225 hash += ((unsigned int) REG << 7);
2226 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2227 return hash;
2230 /* We handle SUBREG of a REG specially because the underlying
2231 reg changes its hash value with every value change; we don't
2232 want to have to forget unrelated subregs when one subreg changes. */
2233 case SUBREG:
2235 if (REG_P (SUBREG_REG (x)))
2237 hash += (((unsigned int) SUBREG << 7)
2238 + REGNO (SUBREG_REG (x))
2239 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2240 return hash;
2242 break;
2245 case CONST_INT:
2246 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2247 + (unsigned int) INTVAL (x));
2248 return hash;
2250 case CONST_DOUBLE:
2251 /* This is like the general case, except that it only counts
2252 the integers representing the constant. */
2253 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2254 if (GET_MODE (x) != VOIDmode)
2255 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2256 else
2257 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2258 + (unsigned int) CONST_DOUBLE_HIGH (x));
2259 return hash;
2261 case CONST_VECTOR:
2263 int units;
2264 rtx elt;
2266 units = CONST_VECTOR_NUNITS (x);
2268 for (i = 0; i < units; ++i)
2270 elt = CONST_VECTOR_ELT (x, i);
2271 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2272 hash_arg_in_memory_p, have_reg_qty);
2275 return hash;
2278 /* Assume there is only one rtx object for any given label. */
2279 case LABEL_REF:
2280 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2281 differences and differences between each stage's debugging dumps. */
2282 hash += (((unsigned int) LABEL_REF << 7)
2283 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2284 return hash;
2286 case SYMBOL_REF:
2288 /* Don't hash on the symbol's address to avoid bootstrap differences.
2289 Different hash values may cause expressions to be recorded in
2290 different orders and thus different registers to be used in the
2291 final assembler. This also avoids differences in the dump files
2292 between various stages. */
2293 unsigned int h = 0;
2294 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2296 while (*p)
2297 h += (h << 7) + *p++; /* ??? revisit */
2299 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2300 return hash;
2303 case MEM:
2304 /* We don't record if marked volatile or if BLKmode since we don't
2305 know the size of the move. */
2306 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2308 *do_not_record_p = 1;
2309 return 0;
2311 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2312 *hash_arg_in_memory_p = 1;
2314 /* Now that we have already found this special case,
2315 might as well speed it up as much as possible. */
2316 hash += (unsigned) MEM;
2317 x = XEXP (x, 0);
2318 goto repeat;
2320 case USE:
2321 /* A USE that mentions non-volatile memory needs special
2322 handling since the MEM may be BLKmode which normally
2323 prevents an entry from being made. Pure calls are
2324 marked by a USE which mentions BLKmode memory.
2325 See calls.c:emit_call_1. */
2326 if (MEM_P (XEXP (x, 0))
2327 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2329 hash += (unsigned) USE;
2330 x = XEXP (x, 0);
2332 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2333 *hash_arg_in_memory_p = 1;
2335 /* Now that we have already found this special case,
2336 might as well speed it up as much as possible. */
2337 hash += (unsigned) MEM;
2338 x = XEXP (x, 0);
2339 goto repeat;
2341 break;
2343 case PRE_DEC:
2344 case PRE_INC:
2345 case POST_DEC:
2346 case POST_INC:
2347 case PRE_MODIFY:
2348 case POST_MODIFY:
2349 case PC:
2350 case CC0:
2351 case CALL:
2352 case UNSPEC_VOLATILE:
2353 *do_not_record_p = 1;
2354 return 0;
2356 case ASM_OPERANDS:
2357 if (MEM_VOLATILE_P (x))
2359 *do_not_record_p = 1;
2360 return 0;
2362 else
2364 /* We don't want to take the filename and line into account. */
2365 hash += (unsigned) code + (unsigned) GET_MODE (x)
2366 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2367 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2368 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2370 if (ASM_OPERANDS_INPUT_LENGTH (x))
2372 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2374 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2375 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2376 do_not_record_p, hash_arg_in_memory_p,
2377 have_reg_qty)
2378 + hash_rtx_string
2379 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2382 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2383 x = ASM_OPERANDS_INPUT (x, 0);
2384 mode = GET_MODE (x);
2385 goto repeat;
2388 return hash;
2390 break;
2392 default:
2393 break;
2396 i = GET_RTX_LENGTH (code) - 1;
2397 hash += (unsigned) code + (unsigned) GET_MODE (x);
2398 fmt = GET_RTX_FORMAT (code);
2399 for (; i >= 0; i--)
2401 switch (fmt[i])
2403 case 'e':
2404 /* If we are about to do the last recursive call
2405 needed at this level, change it into iteration.
2406 This function is called enough to be worth it. */
2407 if (i == 0)
2409 x = XEXP (x, i);
2410 goto repeat;
2413 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2414 hash_arg_in_memory_p, have_reg_qty);
2415 break;
2417 case 'E':
2418 for (j = 0; j < XVECLEN (x, i); j++)
2419 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2420 hash_arg_in_memory_p, have_reg_qty);
2421 break;
2423 case 's':
2424 hash += hash_rtx_string (XSTR (x, i));
2425 break;
2427 case 'i':
2428 hash += (unsigned int) XINT (x, i);
2429 break;
2431 case '0': case 't':
2432 /* Unused. */
2433 break;
2435 default:
2436 gcc_unreachable ();
2440 return hash;
2443 /* Hash an rtx X for cse via hash_rtx.
2444 Stores 1 in do_not_record if any subexpression is volatile.
2445 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2446 does not have the RTX_UNCHANGING_P bit set. */
2448 static inline unsigned
2449 canon_hash (rtx x, enum machine_mode mode)
2451 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2454 /* Like canon_hash but with no side effects, i.e. do_not_record
2455 and hash_arg_in_memory are not changed. */
2457 static inline unsigned
2458 safe_hash (rtx x, enum machine_mode mode)
2460 int dummy_do_not_record;
2461 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2464 /* Return 1 iff X and Y would canonicalize into the same thing,
2465 without actually constructing the canonicalization of either one.
2466 If VALIDATE is nonzero,
2467 we assume X is an expression being processed from the rtl
2468 and Y was found in the hash table. We check register refs
2469 in Y for being marked as valid.
2471 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2474 exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse)
2476 int i, j;
2477 enum rtx_code code;
2478 const char *fmt;
2480 /* Note: it is incorrect to assume an expression is equivalent to itself
2481 if VALIDATE is nonzero. */
2482 if (x == y && !validate)
2483 return 1;
2485 if (x == 0 || y == 0)
2486 return x == y;
2488 code = GET_CODE (x);
2489 if (code != GET_CODE (y))
2490 return 0;
2492 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2493 if (GET_MODE (x) != GET_MODE (y))
2494 return 0;
2496 switch (code)
2498 case PC:
2499 case CC0:
2500 case CONST_INT:
2501 return x == y;
2503 case LABEL_REF:
2504 return XEXP (x, 0) == XEXP (y, 0);
2506 case SYMBOL_REF:
2507 return XSTR (x, 0) == XSTR (y, 0);
2509 case REG:
2510 if (for_gcse)
2511 return REGNO (x) == REGNO (y);
2512 else
2514 unsigned int regno = REGNO (y);
2515 unsigned int i;
2516 unsigned int endregno
2517 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2518 : hard_regno_nregs[regno][GET_MODE (y)]);
2520 /* If the quantities are not the same, the expressions are not
2521 equivalent. If there are and we are not to validate, they
2522 are equivalent. Otherwise, ensure all regs are up-to-date. */
2524 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2525 return 0;
2527 if (! validate)
2528 return 1;
2530 for (i = regno; i < endregno; i++)
2531 if (REG_IN_TABLE (i) != REG_TICK (i))
2532 return 0;
2534 return 1;
2537 case MEM:
2538 if (for_gcse)
2540 /* Can't merge two expressions in different alias sets, since we
2541 can decide that the expression is transparent in a block when
2542 it isn't, due to it being set with the different alias set. */
2543 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
2544 return 0;
2546 /* A volatile mem should not be considered equivalent to any
2547 other. */
2548 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2549 return 0;
2551 break;
2553 /* For commutative operations, check both orders. */
2554 case PLUS:
2555 case MULT:
2556 case AND:
2557 case IOR:
2558 case XOR:
2559 case NE:
2560 case EQ:
2561 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2562 validate, for_gcse)
2563 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2564 validate, for_gcse))
2565 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2566 validate, for_gcse)
2567 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2568 validate, for_gcse)));
2570 case ASM_OPERANDS:
2571 /* We don't use the generic code below because we want to
2572 disregard filename and line numbers. */
2574 /* A volatile asm isn't equivalent to any other. */
2575 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2576 return 0;
2578 if (GET_MODE (x) != GET_MODE (y)
2579 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2580 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2581 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2582 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2583 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2584 return 0;
2586 if (ASM_OPERANDS_INPUT_LENGTH (x))
2588 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2589 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2590 ASM_OPERANDS_INPUT (y, i),
2591 validate, for_gcse)
2592 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2593 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2594 return 0;
2597 return 1;
2599 default:
2600 break;
2603 /* Compare the elements. If any pair of corresponding elements
2604 fail to match, return 0 for the whole thing. */
2606 fmt = GET_RTX_FORMAT (code);
2607 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2609 switch (fmt[i])
2611 case 'e':
2612 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2613 validate, for_gcse))
2614 return 0;
2615 break;
2617 case 'E':
2618 if (XVECLEN (x, i) != XVECLEN (y, i))
2619 return 0;
2620 for (j = 0; j < XVECLEN (x, i); j++)
2621 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2622 validate, for_gcse))
2623 return 0;
2624 break;
2626 case 's':
2627 if (strcmp (XSTR (x, i), XSTR (y, i)))
2628 return 0;
2629 break;
2631 case 'i':
2632 if (XINT (x, i) != XINT (y, i))
2633 return 0;
2634 break;
2636 case 'w':
2637 if (XWINT (x, i) != XWINT (y, i))
2638 return 0;
2639 break;
2641 case '0':
2642 case 't':
2643 break;
2645 default:
2646 gcc_unreachable ();
2650 return 1;
2653 /* Return 1 if X has a value that can vary even between two
2654 executions of the program. 0 means X can be compared reliably
2655 against certain constants or near-constants. */
2657 static int
2658 cse_rtx_varies_p (rtx x, int from_alias)
2660 /* We need not check for X and the equivalence class being of the same
2661 mode because if X is equivalent to a constant in some mode, it
2662 doesn't vary in any mode. */
2664 if (REG_P (x)
2665 && REGNO_QTY_VALID_P (REGNO (x)))
2667 int x_q = REG_QTY (REGNO (x));
2668 struct qty_table_elem *x_ent = &qty_table[x_q];
2670 if (GET_MODE (x) == x_ent->mode
2671 && x_ent->const_rtx != NULL_RTX)
2672 return 0;
2675 if (GET_CODE (x) == PLUS
2676 && GET_CODE (XEXP (x, 1)) == CONST_INT
2677 && REG_P (XEXP (x, 0))
2678 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2680 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2681 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2683 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2684 && x0_ent->const_rtx != NULL_RTX)
2685 return 0;
2688 /* This can happen as the result of virtual register instantiation, if
2689 the initial constant is too large to be a valid address. This gives
2690 us a three instruction sequence, load large offset into a register,
2691 load fp minus a constant into a register, then a MEM which is the
2692 sum of the two `constant' registers. */
2693 if (GET_CODE (x) == PLUS
2694 && REG_P (XEXP (x, 0))
2695 && REG_P (XEXP (x, 1))
2696 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2697 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2699 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2700 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2701 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2702 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2704 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2705 && x0_ent->const_rtx != NULL_RTX
2706 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2707 && x1_ent->const_rtx != NULL_RTX)
2708 return 0;
2711 return rtx_varies_p (x, from_alias);
2714 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2715 the result if necessary. INSN is as for canon_reg. */
2717 static void
2718 validate_canon_reg (rtx *xloc, rtx insn)
2720 rtx new = canon_reg (*xloc, insn);
2721 int insn_code;
2723 /* If replacing pseudo with hard reg or vice versa, ensure the
2724 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2725 if (insn != 0 && new != 0
2726 && REG_P (new) && REG_P (*xloc)
2727 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2728 != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER))
2729 || GET_MODE (new) != GET_MODE (*xloc)
2730 || (insn_code = recog_memoized (insn)) < 0
2731 || insn_data[insn_code].n_dups > 0))
2732 validate_change (insn, xloc, new, 1);
2733 else
2734 *xloc = new;
2737 /* Canonicalize an expression:
2738 replace each register reference inside it
2739 with the "oldest" equivalent register.
2741 If INSN is nonzero and we are replacing a pseudo with a hard register
2742 or vice versa, validate_change is used to ensure that INSN remains valid
2743 after we make our substitution. The calls are made with IN_GROUP nonzero
2744 so apply_change_group must be called upon the outermost return from this
2745 function (unless INSN is zero). The result of apply_change_group can
2746 generally be discarded since the changes we are making are optional. */
2748 static rtx
2749 canon_reg (rtx x, rtx insn)
2751 int i;
2752 enum rtx_code code;
2753 const char *fmt;
2755 if (x == 0)
2756 return x;
2758 code = GET_CODE (x);
2759 switch (code)
2761 case PC:
2762 case CC0:
2763 case CONST:
2764 case CONST_INT:
2765 case CONST_DOUBLE:
2766 case CONST_VECTOR:
2767 case SYMBOL_REF:
2768 case LABEL_REF:
2769 case ADDR_VEC:
2770 case ADDR_DIFF_VEC:
2771 return x;
2773 case REG:
2775 int first;
2776 int q;
2777 struct qty_table_elem *ent;
2779 /* Never replace a hard reg, because hard regs can appear
2780 in more than one machine mode, and we must preserve the mode
2781 of each occurrence. Also, some hard regs appear in
2782 MEMs that are shared and mustn't be altered. Don't try to
2783 replace any reg that maps to a reg of class NO_REGS. */
2784 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2785 || ! REGNO_QTY_VALID_P (REGNO (x)))
2786 return x;
2788 q = REG_QTY (REGNO (x));
2789 ent = &qty_table[q];
2790 first = ent->first_reg;
2791 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2792 : REGNO_REG_CLASS (first) == NO_REGS ? x
2793 : gen_rtx_REG (ent->mode, first));
2796 default:
2797 break;
2800 fmt = GET_RTX_FORMAT (code);
2801 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2803 int j;
2805 if (fmt[i] == 'e')
2806 validate_canon_reg (&XEXP (x, i), insn);
2807 else if (fmt[i] == 'E')
2808 for (j = 0; j < XVECLEN (x, i); j++)
2809 validate_canon_reg (&XVECEXP (x, i, j), insn);
2812 return x;
2815 /* LOC is a location within INSN that is an operand address (the contents of
2816 a MEM). Find the best equivalent address to use that is valid for this
2817 insn.
2819 On most CISC machines, complicated address modes are costly, and rtx_cost
2820 is a good approximation for that cost. However, most RISC machines have
2821 only a few (usually only one) memory reference formats. If an address is
2822 valid at all, it is often just as cheap as any other address. Hence, for
2823 RISC machines, we use `address_cost' to compare the costs of various
2824 addresses. For two addresses of equal cost, choose the one with the
2825 highest `rtx_cost' value as that has the potential of eliminating the
2826 most insns. For equal costs, we choose the first in the equivalence
2827 class. Note that we ignore the fact that pseudo registers are cheaper than
2828 hard registers here because we would also prefer the pseudo registers. */
2830 static void
2831 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2833 struct table_elt *elt;
2834 rtx addr = *loc;
2835 struct table_elt *p;
2836 int found_better = 1;
2837 int save_do_not_record = do_not_record;
2838 int save_hash_arg_in_memory = hash_arg_in_memory;
2839 int addr_volatile;
2840 int regno;
2841 unsigned hash;
2843 /* Do not try to replace constant addresses or addresses of local and
2844 argument slots. These MEM expressions are made only once and inserted
2845 in many instructions, as well as being used to control symbol table
2846 output. It is not safe to clobber them.
2848 There are some uncommon cases where the address is already in a register
2849 for some reason, but we cannot take advantage of that because we have
2850 no easy way to unshare the MEM. In addition, looking up all stack
2851 addresses is costly. */
2852 if ((GET_CODE (addr) == PLUS
2853 && REG_P (XEXP (addr, 0))
2854 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2855 && (regno = REGNO (XEXP (addr, 0)),
2856 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2857 || regno == ARG_POINTER_REGNUM))
2858 || (REG_P (addr)
2859 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2860 || regno == HARD_FRAME_POINTER_REGNUM
2861 || regno == ARG_POINTER_REGNUM))
2862 || CONSTANT_ADDRESS_P (addr))
2863 return;
2865 /* If this address is not simply a register, try to fold it. This will
2866 sometimes simplify the expression. Many simplifications
2867 will not be valid, but some, usually applying the associative rule, will
2868 be valid and produce better code. */
2869 if (!REG_P (addr))
2871 rtx folded = canon_for_address (fold_rtx (addr, NULL_RTX));
2873 if (folded != addr)
2875 int addr_folded_cost = address_cost (folded, mode);
2876 int addr_cost = address_cost (addr, mode);
2878 if ((addr_folded_cost < addr_cost
2879 || (addr_folded_cost == addr_cost
2880 /* ??? The rtx_cost comparison is left over from an older
2881 version of this code. It is probably no longer helpful.*/
2882 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2883 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2884 && validate_change (insn, loc, folded, 0))
2885 addr = folded;
2889 /* If this address is not in the hash table, we can't look for equivalences
2890 of the whole address. Also, ignore if volatile. */
2892 do_not_record = 0;
2893 hash = HASH (addr, Pmode);
2894 addr_volatile = do_not_record;
2895 do_not_record = save_do_not_record;
2896 hash_arg_in_memory = save_hash_arg_in_memory;
2898 if (addr_volatile)
2899 return;
2901 elt = lookup (addr, hash, Pmode);
2903 if (elt)
2905 /* We need to find the best (under the criteria documented above) entry
2906 in the class that is valid. We use the `flag' field to indicate
2907 choices that were invalid and iterate until we can't find a better
2908 one that hasn't already been tried. */
2910 for (p = elt->first_same_value; p; p = p->next_same_value)
2911 p->flag = 0;
2913 while (found_better)
2915 int best_addr_cost = address_cost (*loc, mode);
2916 int best_rtx_cost = (elt->cost + 1) >> 1;
2917 int exp_cost;
2918 struct table_elt *best_elt = elt;
2920 found_better = 0;
2921 for (p = elt->first_same_value; p; p = p->next_same_value)
2922 if (! p->flag)
2924 if ((REG_P (p->exp)
2925 || exp_equiv_p (p->exp, p->exp, 1, false))
2926 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2927 || (exp_cost == best_addr_cost
2928 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2930 found_better = 1;
2931 best_addr_cost = exp_cost;
2932 best_rtx_cost = (p->cost + 1) >> 1;
2933 best_elt = p;
2937 if (found_better)
2939 if (validate_change (insn, loc,
2940 canon_reg (copy_rtx (best_elt->exp),
2941 NULL_RTX), 0))
2942 return;
2943 else
2944 best_elt->flag = 1;
2949 /* If the address is a binary operation with the first operand a register
2950 and the second a constant, do the same as above, but looking for
2951 equivalences of the register. Then try to simplify before checking for
2952 the best address to use. This catches a few cases: First is when we
2953 have REG+const and the register is another REG+const. We can often merge
2954 the constants and eliminate one insn and one register. It may also be
2955 that a machine has a cheap REG+REG+const. Finally, this improves the
2956 code on the Alpha for unaligned byte stores. */
2958 if (flag_expensive_optimizations
2959 && ARITHMETIC_P (*loc)
2960 && REG_P (XEXP (*loc, 0)))
2962 rtx op1 = XEXP (*loc, 1);
2964 do_not_record = 0;
2965 hash = HASH (XEXP (*loc, 0), Pmode);
2966 do_not_record = save_do_not_record;
2967 hash_arg_in_memory = save_hash_arg_in_memory;
2969 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2970 if (elt == 0)
2971 return;
2973 /* We need to find the best (under the criteria documented above) entry
2974 in the class that is valid. We use the `flag' field to indicate
2975 choices that were invalid and iterate until we can't find a better
2976 one that hasn't already been tried. */
2978 for (p = elt->first_same_value; p; p = p->next_same_value)
2979 p->flag = 0;
2981 while (found_better)
2983 int best_addr_cost = address_cost (*loc, mode);
2984 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2985 struct table_elt *best_elt = elt;
2986 rtx best_rtx = *loc;
2987 int count;
2989 /* This is at worst case an O(n^2) algorithm, so limit our search
2990 to the first 32 elements on the list. This avoids trouble
2991 compiling code with very long basic blocks that can easily
2992 call simplify_gen_binary so many times that we run out of
2993 memory. */
2995 found_better = 0;
2996 for (p = elt->first_same_value, count = 0;
2997 p && count < 32;
2998 p = p->next_same_value, count++)
2999 if (! p->flag
3000 && (REG_P (p->exp)
3001 || exp_equiv_p (p->exp, p->exp, 1, false)))
3003 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3004 p->exp, op1);
3005 int new_cost;
3007 /* Get the canonical version of the address so we can accept
3008 more. */
3009 new = canon_for_address (new);
3011 new_cost = address_cost (new, mode);
3013 if (new_cost < best_addr_cost
3014 || (new_cost == best_addr_cost
3015 && (COST (new) + 1) >> 1 > best_rtx_cost))
3017 found_better = 1;
3018 best_addr_cost = new_cost;
3019 best_rtx_cost = (COST (new) + 1) >> 1;
3020 best_elt = p;
3021 best_rtx = new;
3025 if (found_better)
3027 if (validate_change (insn, loc,
3028 canon_reg (copy_rtx (best_rtx),
3029 NULL_RTX), 0))
3030 return;
3031 else
3032 best_elt->flag = 1;
3038 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3039 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3040 what values are being compared.
3042 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3043 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3044 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3045 compared to produce cc0.
3047 The return value is the comparison operator and is either the code of
3048 A or the code corresponding to the inverse of the comparison. */
3050 static enum rtx_code
3051 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3052 enum machine_mode *pmode1, enum machine_mode *pmode2)
3054 rtx arg1, arg2;
3056 arg1 = *parg1, arg2 = *parg2;
3058 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3060 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3062 /* Set nonzero when we find something of interest. */
3063 rtx x = 0;
3064 int reverse_code = 0;
3065 struct table_elt *p = 0;
3067 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3068 On machines with CC0, this is the only case that can occur, since
3069 fold_rtx will return the COMPARE or item being compared with zero
3070 when given CC0. */
3072 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3073 x = arg1;
3075 /* If ARG1 is a comparison operator and CODE is testing for
3076 STORE_FLAG_VALUE, get the inner arguments. */
3078 else if (COMPARISON_P (arg1))
3080 #ifdef FLOAT_STORE_FLAG_VALUE
3081 REAL_VALUE_TYPE fsfv;
3082 #endif
3084 if (code == NE
3085 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3086 && code == LT && STORE_FLAG_VALUE == -1)
3087 #ifdef FLOAT_STORE_FLAG_VALUE
3088 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3089 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3090 REAL_VALUE_NEGATIVE (fsfv)))
3091 #endif
3093 x = arg1;
3094 else if (code == EQ
3095 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3096 && code == GE && STORE_FLAG_VALUE == -1)
3097 #ifdef FLOAT_STORE_FLAG_VALUE
3098 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3099 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3100 REAL_VALUE_NEGATIVE (fsfv)))
3101 #endif
3103 x = arg1, reverse_code = 1;
3106 /* ??? We could also check for
3108 (ne (and (eq (...) (const_int 1))) (const_int 0))
3110 and related forms, but let's wait until we see them occurring. */
3112 if (x == 0)
3113 /* Look up ARG1 in the hash table and see if it has an equivalence
3114 that lets us see what is being compared. */
3115 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3116 if (p)
3118 p = p->first_same_value;
3120 /* If what we compare is already known to be constant, that is as
3121 good as it gets.
3122 We need to break the loop in this case, because otherwise we
3123 can have an infinite loop when looking at a reg that is known
3124 to be a constant which is the same as a comparison of a reg
3125 against zero which appears later in the insn stream, which in
3126 turn is constant and the same as the comparison of the first reg
3127 against zero... */
3128 if (p->is_const)
3129 break;
3132 for (; p; p = p->next_same_value)
3134 enum machine_mode inner_mode = GET_MODE (p->exp);
3135 #ifdef FLOAT_STORE_FLAG_VALUE
3136 REAL_VALUE_TYPE fsfv;
3137 #endif
3139 /* If the entry isn't valid, skip it. */
3140 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3141 continue;
3143 if (GET_CODE (p->exp) == COMPARE
3144 /* Another possibility is that this machine has a compare insn
3145 that includes the comparison code. In that case, ARG1 would
3146 be equivalent to a comparison operation that would set ARG1 to
3147 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3148 ORIG_CODE is the actual comparison being done; if it is an EQ,
3149 we must reverse ORIG_CODE. On machine with a negative value
3150 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3151 || ((code == NE
3152 || (code == LT
3153 && GET_MODE_CLASS (inner_mode) == MODE_INT
3154 && (GET_MODE_BITSIZE (inner_mode)
3155 <= HOST_BITS_PER_WIDE_INT)
3156 && (STORE_FLAG_VALUE
3157 & ((HOST_WIDE_INT) 1
3158 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3159 #ifdef FLOAT_STORE_FLAG_VALUE
3160 || (code == LT
3161 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3162 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3163 REAL_VALUE_NEGATIVE (fsfv)))
3164 #endif
3166 && COMPARISON_P (p->exp)))
3168 x = p->exp;
3169 break;
3171 else if ((code == EQ
3172 || (code == GE
3173 && GET_MODE_CLASS (inner_mode) == MODE_INT
3174 && (GET_MODE_BITSIZE (inner_mode)
3175 <= HOST_BITS_PER_WIDE_INT)
3176 && (STORE_FLAG_VALUE
3177 & ((HOST_WIDE_INT) 1
3178 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3179 #ifdef FLOAT_STORE_FLAG_VALUE
3180 || (code == GE
3181 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3182 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3183 REAL_VALUE_NEGATIVE (fsfv)))
3184 #endif
3186 && COMPARISON_P (p->exp))
3188 reverse_code = 1;
3189 x = p->exp;
3190 break;
3193 /* If this non-trapping address, e.g. fp + constant, the
3194 equivalent is a better operand since it may let us predict
3195 the value of the comparison. */
3196 else if (!rtx_addr_can_trap_p (p->exp))
3198 arg1 = p->exp;
3199 continue;
3203 /* If we didn't find a useful equivalence for ARG1, we are done.
3204 Otherwise, set up for the next iteration. */
3205 if (x == 0)
3206 break;
3208 /* If we need to reverse the comparison, make sure that that is
3209 possible -- we can't necessarily infer the value of GE from LT
3210 with floating-point operands. */
3211 if (reverse_code)
3213 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3214 if (reversed == UNKNOWN)
3215 break;
3216 else
3217 code = reversed;
3219 else if (COMPARISON_P (x))
3220 code = GET_CODE (x);
3221 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3224 /* Return our results. Return the modes from before fold_rtx
3225 because fold_rtx might produce const_int, and then it's too late. */
3226 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3227 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3229 return code;
3232 /* Fold SUBREG. */
3234 static rtx
3235 fold_rtx_subreg (rtx x, rtx insn)
3237 enum machine_mode mode = GET_MODE (x);
3238 rtx folded_arg0;
3239 rtx const_arg0;
3240 rtx new;
3242 /* See if we previously assigned a constant value to this SUBREG. */
3243 if ((new = lookup_as_function (x, CONST_INT)) != 0
3244 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3245 return new;
3247 /* If this is a paradoxical SUBREG, we have no idea what value the
3248 extra bits would have. However, if the operand is equivalent to
3249 a SUBREG whose operand is the same as our mode, and all the modes
3250 are within a word, we can just use the inner operand because
3251 these SUBREGs just say how to treat the register.
3253 Similarly if we find an integer constant. */
3255 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3257 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3258 struct table_elt *elt;
3260 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3261 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3262 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3263 imode)) != 0)
3264 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3266 if (CONSTANT_P (elt->exp)
3267 && GET_MODE (elt->exp) == VOIDmode)
3268 return elt->exp;
3270 if (GET_CODE (elt->exp) == SUBREG
3271 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3272 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3273 return copy_rtx (SUBREG_REG (elt->exp));
3276 return x;
3279 /* Fold SUBREG_REG. If it changed, see if we can simplify the
3280 SUBREG. We might be able to if the SUBREG is extracting a single
3281 word in an integral mode or extracting the low part. */
3283 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3284 const_arg0 = equiv_constant (folded_arg0);
3285 if (const_arg0)
3286 folded_arg0 = const_arg0;
3288 if (folded_arg0 != SUBREG_REG (x))
3290 new = simplify_subreg (mode, folded_arg0,
3291 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3292 if (new)
3293 return new;
3296 if (REG_P (folded_arg0)
3297 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3299 struct table_elt *elt;
3301 elt = lookup (folded_arg0,
3302 HASH (folded_arg0, GET_MODE (folded_arg0)),
3303 GET_MODE (folded_arg0));
3305 if (elt)
3306 elt = elt->first_same_value;
3308 if (subreg_lowpart_p (x))
3309 /* If this is a narrowing SUBREG and our operand is a REG, see
3310 if we can find an equivalence for REG that is an arithmetic
3311 operation in a wider mode where both operands are
3312 paradoxical SUBREGs from objects of our result mode. In
3313 that case, we couldn-t report an equivalent value for that
3314 operation, since we don't know what the extra bits will be.
3315 But we can find an equivalence for this SUBREG by folding
3316 that operation in the narrow mode. This allows us to fold
3317 arithmetic in narrow modes when the machine only supports
3318 word-sized arithmetic.
3320 Also look for a case where we have a SUBREG whose operand
3321 is the same as our result. If both modes are smaller than
3322 a word, we are simply interpreting a register in different
3323 modes and we can use the inner value. */
3325 for (; elt; elt = elt->next_same_value)
3327 enum rtx_code eltcode = GET_CODE (elt->exp);
3329 /* Just check for unary and binary operations. */
3330 if (UNARY_P (elt->exp)
3331 && eltcode != SIGN_EXTEND
3332 && eltcode != ZERO_EXTEND
3333 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3334 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3335 && (GET_MODE_CLASS (mode)
3336 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3338 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3340 if (!REG_P (op0) && ! CONSTANT_P (op0))
3341 op0 = fold_rtx (op0, NULL_RTX);
3343 op0 = equiv_constant (op0);
3344 if (op0)
3345 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3346 op0, mode);
3348 else if (ARITHMETIC_P (elt->exp)
3349 && eltcode != DIV && eltcode != MOD
3350 && eltcode != UDIV && eltcode != UMOD
3351 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3352 && eltcode != ROTATE && eltcode != ROTATERT
3353 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3354 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3355 == mode))
3356 || CONSTANT_P (XEXP (elt->exp, 0)))
3357 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3358 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3359 == mode))
3360 || CONSTANT_P (XEXP (elt->exp, 1))))
3362 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3363 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3365 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3366 op0 = fold_rtx (op0, NULL_RTX);
3368 if (op0)
3369 op0 = equiv_constant (op0);
3371 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3372 op1 = fold_rtx (op1, NULL_RTX);
3374 if (op1)
3375 op1 = equiv_constant (op1);
3377 /* If we are looking for the low SImode part of
3378 (ashift:DI c (const_int 32)), it doesn't work to
3379 compute that in SImode, because a 32-bit shift in
3380 SImode is unpredictable. We know the value is
3381 0. */
3382 if (op0 && op1
3383 && GET_CODE (elt->exp) == ASHIFT
3384 && GET_CODE (op1) == CONST_INT
3385 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3387 if (INTVAL (op1)
3388 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3389 /* If the count fits in the inner mode's width,
3390 but exceeds the outer mode's width, the value
3391 will get truncated to 0 by the subreg. */
3392 new = CONST0_RTX (mode);
3393 else
3394 /* If the count exceeds even the inner mode's width,
3395 don't fold this expression. */
3396 new = 0;
3398 else if (op0 && op1)
3399 new = simplify_binary_operation (GET_CODE (elt->exp),
3400 mode, op0, op1);
3403 else if (GET_CODE (elt->exp) == SUBREG
3404 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3405 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3406 <= UNITS_PER_WORD)
3407 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3408 new = copy_rtx (SUBREG_REG (elt->exp));
3410 if (new)
3411 return new;
3413 else
3414 /* A SUBREG resulting from a zero extension may fold to zero
3415 if it extracts higher bits than the ZERO_EXTEND's source
3416 bits. FIXME: if combine tried to, er, combine these
3417 instructions, this transformation may be moved to
3418 simplify_subreg. */
3419 for (; elt; elt = elt->next_same_value)
3421 if (GET_CODE (elt->exp) == ZERO_EXTEND
3422 && subreg_lsb (x)
3423 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3424 return CONST0_RTX (mode);
3428 return x;
3431 /* Fold MEM. */
3433 static rtx
3434 fold_rtx_mem (rtx x, rtx insn)
3436 enum machine_mode mode = GET_MODE (x);
3437 rtx new;
3439 /* If we are not actually processing an insn, don't try to find the
3440 best address. Not only don't we care, but we could modify the
3441 MEM in an invalid way since we have no insn to validate
3442 against. */
3443 if (insn != 0)
3444 find_best_addr (insn, &XEXP (x, 0), mode);
3447 /* Even if we don't fold in the insn itself, we can safely do so
3448 here, in hopes of getting a constant. */
3449 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3450 rtx base = 0;
3451 HOST_WIDE_INT offset = 0;
3453 if (REG_P (addr)
3454 && REGNO_QTY_VALID_P (REGNO (addr)))
3456 int addr_q = REG_QTY (REGNO (addr));
3457 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3459 if (GET_MODE (addr) == addr_ent->mode
3460 && addr_ent->const_rtx != NULL_RTX)
3461 addr = addr_ent->const_rtx;
3464 /* If address is constant, split it into a base and integer
3465 offset. */
3466 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3467 base = addr;
3468 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3469 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3471 base = XEXP (XEXP (addr, 0), 0);
3472 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3474 else if (GET_CODE (addr) == LO_SUM
3475 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3476 base = XEXP (addr, 1);
3478 /* If this is a constant pool reference, we can fold it into its
3479 constant to allow better value tracking. */
3480 if (base && GET_CODE (base) == SYMBOL_REF
3481 && CONSTANT_POOL_ADDRESS_P (base))
3483 rtx constant = get_pool_constant (base);
3484 enum machine_mode const_mode = get_pool_mode (base);
3485 rtx new;
3487 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3489 constant_pool_entries_cost = COST (constant);
3490 constant_pool_entries_regcost = approx_reg_cost (constant);
3493 /* If we are loading the full constant, we have an
3494 equivalence. */
3495 if (offset == 0 && mode == const_mode)
3496 return constant;
3498 /* If this actually isn't a constant (weird!), we can't do
3499 anything. Otherwise, handle the two most common cases:
3500 extracting a word from a multi-word constant, and
3501 extracting the low-order bits. Other cases don't seem
3502 common enough to worry about. */
3503 if (! CONSTANT_P (constant))
3504 return x;
3506 if (GET_MODE_CLASS (mode) == MODE_INT
3507 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3508 && offset % UNITS_PER_WORD == 0
3509 && (new = operand_subword (constant,
3510 offset / UNITS_PER_WORD,
3511 0, const_mode)) != 0)
3512 return new;
3514 if (((BYTES_BIG_ENDIAN
3515 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3516 || (! BYTES_BIG_ENDIAN && offset == 0))
3517 && (new = gen_lowpart (mode, constant)) != 0)
3518 return new;
3521 /* If this is a reference to a label at a known position in a jump
3522 table, we also know its value. */
3523 if (base && GET_CODE (base) == LABEL_REF)
3525 rtx label = XEXP (base, 0);
3526 rtx table_insn = NEXT_INSN (label);
3528 if (table_insn && JUMP_P (table_insn)
3529 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3531 rtx table = PATTERN (table_insn);
3533 if (offset >= 0
3534 && (offset / GET_MODE_SIZE (GET_MODE (table))
3535 < XVECLEN (table, 0)))
3537 rtx label = XVECEXP
3538 (table, 0, offset / GET_MODE_SIZE (GET_MODE (table)));
3539 rtx set;
3541 /* If we have an insn that loads the label from the
3542 jumptable into a reg, we don't want to set the reg
3543 to the label, because this may cause a reference to
3544 the label to remain after the label is removed in
3545 some very obscure cases (PR middle-end/18628). */
3546 if (!insn)
3547 return label;
3549 set = single_set (insn);
3551 if (! set || SET_SRC (set) != x)
3552 return x;
3554 /* If it's a jump, it's safe to reference the label. */
3555 if (SET_DEST (set) == pc_rtx)
3556 return label;
3558 return x;
3561 if (table_insn && JUMP_P (table_insn)
3562 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3564 rtx table = PATTERN (table_insn);
3566 if (offset >= 0
3567 && (offset / GET_MODE_SIZE (GET_MODE (table))
3568 < XVECLEN (table, 1)))
3570 offset /= GET_MODE_SIZE (GET_MODE (table));
3571 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3572 XEXP (table, 0));
3574 if (GET_MODE (table) != Pmode)
3575 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3577 /* Indicate this is a constant. This isn't a valid
3578 form of CONST, but it will only be used to fold the
3579 next insns and then discarded, so it should be
3580 safe.
3582 Note this expression must be explicitly discarded,
3583 by cse_insn, else it may end up in a REG_EQUAL note
3584 and "escape" to cause problems elsewhere. */
3585 return gen_rtx_CONST (GET_MODE (new), new);
3590 return x;
3594 /* If X is a nontrivial arithmetic operation on an argument
3595 for which a constant value can be determined, return
3596 the result of operating on that value, as a constant.
3597 Otherwise, return X, possibly with one or more operands
3598 modified by recursive calls to this function.
3600 If X is a register whose contents are known, we do NOT
3601 return those contents here. equiv_constant is called to
3602 perform that task.
3604 INSN is the insn that we may be modifying. If it is 0, make a copy
3605 of X before modifying it. */
3607 static rtx
3608 fold_rtx (rtx x, rtx insn)
3610 enum rtx_code code;
3611 enum machine_mode mode;
3612 const char *fmt;
3613 int i;
3614 rtx new = 0;
3615 int copied = 0;
3616 int must_swap = 0;
3618 /* Folded equivalents of first two operands of X. */
3619 rtx folded_arg0;
3620 rtx folded_arg1;
3622 /* Constant equivalents of first three operands of X;
3623 0 when no such equivalent is known. */
3624 rtx const_arg0;
3625 rtx const_arg1;
3626 rtx const_arg2;
3628 /* The mode of the first operand of X. We need this for sign and zero
3629 extends. */
3630 enum machine_mode mode_arg0;
3632 if (x == 0)
3633 return x;
3635 mode = GET_MODE (x);
3636 code = GET_CODE (x);
3637 switch (code)
3639 case CONST:
3640 case CONST_INT:
3641 case CONST_DOUBLE:
3642 case CONST_VECTOR:
3643 case SYMBOL_REF:
3644 case LABEL_REF:
3645 case REG:
3646 case PC:
3647 /* No use simplifying an EXPR_LIST
3648 since they are used only for lists of args
3649 in a function call's REG_EQUAL note. */
3650 case EXPR_LIST:
3651 return x;
3653 #ifdef HAVE_cc0
3654 case CC0:
3655 return prev_insn_cc0;
3656 #endif
3658 case SUBREG:
3659 return fold_rtx_subreg (x, insn);
3661 case NOT:
3662 case NEG:
3663 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3664 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3665 new = lookup_as_function (XEXP (x, 0), code);
3666 if (new)
3667 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3668 break;
3670 case MEM:
3671 return fold_rtx_mem (x, insn);
3673 #ifdef NO_FUNCTION_CSE
3674 case CALL:
3675 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3676 return x;
3677 break;
3678 #endif
3680 case ASM_OPERANDS:
3681 if (insn)
3683 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3684 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3685 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3687 break;
3689 default:
3690 break;
3693 const_arg0 = 0;
3694 const_arg1 = 0;
3695 const_arg2 = 0;
3696 mode_arg0 = VOIDmode;
3698 /* Try folding our operands.
3699 Then see which ones have constant values known. */
3701 fmt = GET_RTX_FORMAT (code);
3702 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3703 if (fmt[i] == 'e')
3705 rtx arg = XEXP (x, i);
3706 rtx folded_arg = arg, const_arg = 0;
3707 enum machine_mode mode_arg = GET_MODE (arg);
3708 rtx cheap_arg, expensive_arg;
3709 rtx replacements[2];
3710 int j;
3711 int old_cost = COST_IN (XEXP (x, i), code);
3713 /* Most arguments are cheap, so handle them specially. */
3714 switch (GET_CODE (arg))
3716 case REG:
3717 /* This is the same as calling equiv_constant; it is duplicated
3718 here for speed. */
3719 if (REGNO_QTY_VALID_P (REGNO (arg)))
3721 int arg_q = REG_QTY (REGNO (arg));
3722 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3724 if (arg_ent->const_rtx != NULL_RTX
3725 && !REG_P (arg_ent->const_rtx)
3726 && GET_CODE (arg_ent->const_rtx) != PLUS)
3727 const_arg
3728 = gen_lowpart (GET_MODE (arg),
3729 arg_ent->const_rtx);
3731 break;
3733 case CONST:
3734 case CONST_INT:
3735 case SYMBOL_REF:
3736 case LABEL_REF:
3737 case CONST_DOUBLE:
3738 case CONST_VECTOR:
3739 const_arg = arg;
3740 break;
3742 #ifdef HAVE_cc0
3743 case CC0:
3744 folded_arg = prev_insn_cc0;
3745 mode_arg = prev_insn_cc0_mode;
3746 const_arg = equiv_constant (folded_arg);
3747 break;
3748 #endif
3750 default:
3751 folded_arg = fold_rtx (arg, insn);
3752 const_arg = equiv_constant (folded_arg);
3755 /* For the first three operands, see if the operand
3756 is constant or equivalent to a constant. */
3757 switch (i)
3759 case 0:
3760 folded_arg0 = folded_arg;
3761 const_arg0 = const_arg;
3762 mode_arg0 = mode_arg;
3763 break;
3764 case 1:
3765 folded_arg1 = folded_arg;
3766 const_arg1 = const_arg;
3767 break;
3768 case 2:
3769 const_arg2 = const_arg;
3770 break;
3773 /* Pick the least expensive of the folded argument and an
3774 equivalent constant argument. */
3775 if (const_arg == 0 || const_arg == folded_arg
3776 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3777 cheap_arg = folded_arg, expensive_arg = const_arg;
3778 else
3779 cheap_arg = const_arg, expensive_arg = folded_arg;
3781 /* Try to replace the operand with the cheapest of the two
3782 possibilities. If it doesn't work and this is either of the first
3783 two operands of a commutative operation, try swapping them.
3784 If THAT fails, try the more expensive, provided it is cheaper
3785 than what is already there. */
3787 if (cheap_arg == XEXP (x, i))
3788 continue;
3790 if (insn == 0 && ! copied)
3792 x = copy_rtx (x);
3793 copied = 1;
3796 /* Order the replacements from cheapest to most expensive. */
3797 replacements[0] = cheap_arg;
3798 replacements[1] = expensive_arg;
3800 for (j = 0; j < 2 && replacements[j]; j++)
3802 int new_cost = COST_IN (replacements[j], code);
3804 /* Stop if what existed before was cheaper. Prefer constants
3805 in the case of a tie. */
3806 if (new_cost > old_cost
3807 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3808 break;
3810 /* It's not safe to substitute the operand of a conversion
3811 operator with a constant, as the conversion's identity
3812 depends upon the mode of its operand. This optimization
3813 is handled by the call to simplify_unary_operation. */
3814 if (GET_RTX_CLASS (code) == RTX_UNARY
3815 && GET_MODE (replacements[j]) != mode_arg0
3816 && (code == ZERO_EXTEND
3817 || code == SIGN_EXTEND
3818 || code == TRUNCATE
3819 || code == FLOAT_TRUNCATE
3820 || code == FLOAT_EXTEND
3821 || code == FLOAT
3822 || code == FIX
3823 || code == UNSIGNED_FLOAT
3824 || code == UNSIGNED_FIX))
3825 continue;
3827 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3828 break;
3830 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3831 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3833 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3834 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3836 if (apply_change_group ())
3838 /* Swap them back to be invalid so that this loop can
3839 continue and flag them to be swapped back later. */
3840 rtx tem;
3842 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3843 XEXP (x, 1) = tem;
3844 must_swap = 1;
3845 break;
3851 else
3853 if (fmt[i] == 'E')
3854 /* Don't try to fold inside of a vector of expressions.
3855 Doing nothing is harmless. */
3859 /* If a commutative operation, place a constant integer as the second
3860 operand unless the first operand is also a constant integer. Otherwise,
3861 place any constant second unless the first operand is also a constant. */
3863 if (COMMUTATIVE_P (x))
3865 if (must_swap
3866 || swap_commutative_operands_p (const_arg0 ? const_arg0
3867 : XEXP (x, 0),
3868 const_arg1 ? const_arg1
3869 : XEXP (x, 1)))
3871 rtx tem = XEXP (x, 0);
3873 if (insn == 0 && ! copied)
3875 x = copy_rtx (x);
3876 copied = 1;
3879 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3880 validate_change (insn, &XEXP (x, 1), tem, 1);
3881 if (apply_change_group ())
3883 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3884 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3889 /* If X is an arithmetic operation, see if we can simplify it. */
3891 switch (GET_RTX_CLASS (code))
3893 case RTX_UNARY:
3895 int is_const = 0;
3897 /* We can't simplify extension ops unless we know the
3898 original mode. */
3899 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3900 && mode_arg0 == VOIDmode)
3901 break;
3903 /* If we had a CONST, strip it off and put it back later if we
3904 fold. */
3905 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3906 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3908 new = simplify_unary_operation (code, mode,
3909 const_arg0 ? const_arg0 : folded_arg0,
3910 mode_arg0);
3911 /* NEG of PLUS could be converted into MINUS, but that causes
3912 expressions of the form
3913 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3914 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3915 FIXME: those ports should be fixed. */
3916 if (new != 0 && is_const
3917 && GET_CODE (new) == PLUS
3918 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3919 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3920 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3921 new = gen_rtx_CONST (mode, new);
3923 break;
3925 case RTX_COMPARE:
3926 case RTX_COMM_COMPARE:
3927 /* See what items are actually being compared and set FOLDED_ARG[01]
3928 to those values and CODE to the actual comparison code. If any are
3929 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3930 do anything if both operands are already known to be constant. */
3932 /* ??? Vector mode comparisons are not supported yet. */
3933 if (VECTOR_MODE_P (mode))
3934 break;
3936 if (const_arg0 == 0 || const_arg1 == 0)
3938 struct table_elt *p0, *p1;
3939 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3940 enum machine_mode mode_arg1;
3942 #ifdef FLOAT_STORE_FLAG_VALUE
3943 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3945 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3946 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3947 false_rtx = CONST0_RTX (mode);
3949 #endif
3951 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3952 &mode_arg0, &mode_arg1);
3954 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3955 what kinds of things are being compared, so we can't do
3956 anything with this comparison. */
3958 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3959 break;
3961 const_arg0 = equiv_constant (folded_arg0);
3962 const_arg1 = equiv_constant (folded_arg1);
3964 /* If we do not now have two constants being compared, see
3965 if we can nevertheless deduce some things about the
3966 comparison. */
3967 if (const_arg0 == 0 || const_arg1 == 0)
3969 /* Some addresses are known to be nonzero. We don't know
3970 their sign, but equality comparisons are known. */
3971 if (const_arg1 == const0_rtx
3972 && nonzero_address_p (folded_arg0))
3974 if (code == EQ)
3975 return false_rtx;
3976 else if (code == NE)
3977 return true_rtx;
3980 /* See if the two operands are the same. */
3982 if (folded_arg0 == folded_arg1
3983 || (REG_P (folded_arg0)
3984 && REG_P (folded_arg1)
3985 && (REG_QTY (REGNO (folded_arg0))
3986 == REG_QTY (REGNO (folded_arg1))))
3987 || ((p0 = lookup (folded_arg0,
3988 SAFE_HASH (folded_arg0, mode_arg0),
3989 mode_arg0))
3990 && (p1 = lookup (folded_arg1,
3991 SAFE_HASH (folded_arg1, mode_arg0),
3992 mode_arg0))
3993 && p0->first_same_value == p1->first_same_value))
3995 /* Sadly two equal NaNs are not equivalent. */
3996 if (!HONOR_NANS (mode_arg0))
3997 return ((code == EQ || code == LE || code == GE
3998 || code == LEU || code == GEU || code == UNEQ
3999 || code == UNLE || code == UNGE
4000 || code == ORDERED)
4001 ? true_rtx : false_rtx);
4002 /* Take care for the FP compares we can resolve. */
4003 if (code == UNEQ || code == UNLE || code == UNGE)
4004 return true_rtx;
4005 if (code == LTGT || code == LT || code == GT)
4006 return false_rtx;
4009 /* If FOLDED_ARG0 is a register, see if the comparison we are
4010 doing now is either the same as we did before or the reverse
4011 (we only check the reverse if not floating-point). */
4012 else if (REG_P (folded_arg0))
4014 int qty = REG_QTY (REGNO (folded_arg0));
4016 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
4018 struct qty_table_elem *ent = &qty_table[qty];
4020 if ((comparison_dominates_p (ent->comparison_code, code)
4021 || (! FLOAT_MODE_P (mode_arg0)
4022 && comparison_dominates_p (ent->comparison_code,
4023 reverse_condition (code))))
4024 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4025 || (const_arg1
4026 && rtx_equal_p (ent->comparison_const,
4027 const_arg1))
4028 || (REG_P (folded_arg1)
4029 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4030 return (comparison_dominates_p (ent->comparison_code, code)
4031 ? true_rtx : false_rtx);
4037 /* If we are comparing against zero, see if the first operand is
4038 equivalent to an IOR with a constant. If so, we may be able to
4039 determine the result of this comparison. */
4041 if (const_arg1 == const0_rtx)
4043 rtx y = lookup_as_function (folded_arg0, IOR);
4044 rtx inner_const;
4046 if (y != 0
4047 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4048 && GET_CODE (inner_const) == CONST_INT
4049 && INTVAL (inner_const) != 0)
4051 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4052 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4053 && (INTVAL (inner_const)
4054 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4055 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4057 #ifdef FLOAT_STORE_FLAG_VALUE
4058 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4060 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4061 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4062 false_rtx = CONST0_RTX (mode);
4064 #endif
4066 switch (code)
4068 case EQ:
4069 return false_rtx;
4070 case NE:
4071 return true_rtx;
4072 case LT: case LE:
4073 if (has_sign)
4074 return true_rtx;
4075 break;
4076 case GT: case GE:
4077 if (has_sign)
4078 return false_rtx;
4079 break;
4080 default:
4081 break;
4087 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
4088 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
4089 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
4091 break;
4093 case RTX_BIN_ARITH:
4094 case RTX_COMM_ARITH:
4095 switch (code)
4097 case PLUS:
4098 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4099 with that LABEL_REF as its second operand. If so, the result is
4100 the first operand of that MINUS. This handles switches with an
4101 ADDR_DIFF_VEC table. */
4102 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4104 rtx y
4105 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4106 : lookup_as_function (folded_arg0, MINUS);
4108 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4109 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4110 return XEXP (y, 0);
4112 /* Now try for a CONST of a MINUS like the above. */
4113 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4114 : lookup_as_function (folded_arg0, CONST))) != 0
4115 && GET_CODE (XEXP (y, 0)) == MINUS
4116 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4117 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4118 return XEXP (XEXP (y, 0), 0);
4121 /* Likewise if the operands are in the other order. */
4122 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4124 rtx y
4125 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4126 : lookup_as_function (folded_arg1, MINUS);
4128 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4129 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4130 return XEXP (y, 0);
4132 /* Now try for a CONST of a MINUS like the above. */
4133 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4134 : lookup_as_function (folded_arg1, CONST))) != 0
4135 && GET_CODE (XEXP (y, 0)) == MINUS
4136 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4137 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4138 return XEXP (XEXP (y, 0), 0);
4141 /* If second operand is a register equivalent to a negative
4142 CONST_INT, see if we can find a register equivalent to the
4143 positive constant. Make a MINUS if so. Don't do this for
4144 a non-negative constant since we might then alternate between
4145 choosing positive and negative constants. Having the positive
4146 constant previously-used is the more common case. Be sure
4147 the resulting constant is non-negative; if const_arg1 were
4148 the smallest negative number this would overflow: depending
4149 on the mode, this would either just be the same value (and
4150 hence not save anything) or be incorrect. */
4151 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4152 && INTVAL (const_arg1) < 0
4153 /* This used to test
4155 -INTVAL (const_arg1) >= 0
4157 But The Sun V5.0 compilers mis-compiled that test. So
4158 instead we test for the problematic value in a more direct
4159 manner and hope the Sun compilers get it correct. */
4160 && INTVAL (const_arg1) !=
4161 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4162 && REG_P (folded_arg1))
4164 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4165 struct table_elt *p
4166 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
4168 if (p)
4169 for (p = p->first_same_value; p; p = p->next_same_value)
4170 if (REG_P (p->exp))
4171 return simplify_gen_binary (MINUS, mode, folded_arg0,
4172 canon_reg (p->exp, NULL_RTX));
4174 goto from_plus;
4176 case MINUS:
4177 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4178 If so, produce (PLUS Z C2-C). */
4179 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4181 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4182 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4183 return fold_rtx (plus_constant (copy_rtx (y),
4184 -INTVAL (const_arg1)),
4185 NULL_RTX);
4188 /* Fall through. */
4190 from_plus:
4191 case SMIN: case SMAX: case UMIN: case UMAX:
4192 case IOR: case AND: case XOR:
4193 case MULT:
4194 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4195 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4196 is known to be of similar form, we may be able to replace the
4197 operation with a combined operation. This may eliminate the
4198 intermediate operation if every use is simplified in this way.
4199 Note that the similar optimization done by combine.c only works
4200 if the intermediate operation's result has only one reference. */
4202 if (REG_P (folded_arg0)
4203 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4205 int is_shift
4206 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4207 rtx y = lookup_as_function (folded_arg0, code);
4208 rtx inner_const;
4209 enum rtx_code associate_code;
4210 rtx new_const;
4212 if (y == 0
4213 || 0 == (inner_const
4214 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4215 || GET_CODE (inner_const) != CONST_INT
4216 /* If we have compiled a statement like
4217 "if (x == (x & mask1))", and now are looking at
4218 "x & mask2", we will have a case where the first operand
4219 of Y is the same as our first operand. Unless we detect
4220 this case, an infinite loop will result. */
4221 || XEXP (y, 0) == folded_arg0)
4222 break;
4224 /* Don't associate these operations if they are a PLUS with the
4225 same constant and it is a power of two. These might be doable
4226 with a pre- or post-increment. Similarly for two subtracts of
4227 identical powers of two with post decrement. */
4229 if (code == PLUS && const_arg1 == inner_const
4230 && ((HAVE_PRE_INCREMENT
4231 && exact_log2 (INTVAL (const_arg1)) >= 0)
4232 || (HAVE_POST_INCREMENT
4233 && exact_log2 (INTVAL (const_arg1)) >= 0)
4234 || (HAVE_PRE_DECREMENT
4235 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4236 || (HAVE_POST_DECREMENT
4237 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4238 break;
4240 /* Compute the code used to compose the constants. For example,
4241 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4243 associate_code = (is_shift || code == MINUS ? PLUS : code);
4245 new_const = simplify_binary_operation (associate_code, mode,
4246 const_arg1, inner_const);
4248 if (new_const == 0)
4249 break;
4251 /* If we are associating shift operations, don't let this
4252 produce a shift of the size of the object or larger.
4253 This could occur when we follow a sign-extend by a right
4254 shift on a machine that does a sign-extend as a pair
4255 of shifts. */
4257 if (is_shift && GET_CODE (new_const) == CONST_INT
4258 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4260 /* As an exception, we can turn an ASHIFTRT of this
4261 form into a shift of the number of bits - 1. */
4262 if (code == ASHIFTRT)
4263 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4264 else
4265 break;
4268 y = copy_rtx (XEXP (y, 0));
4270 /* If Y contains our first operand (the most common way this
4271 can happen is if Y is a MEM), we would do into an infinite
4272 loop if we tried to fold it. So don't in that case. */
4274 if (! reg_mentioned_p (folded_arg0, y))
4275 y = fold_rtx (y, insn);
4277 return simplify_gen_binary (code, mode, y, new_const);
4279 break;
4281 case DIV: case UDIV:
4282 /* ??? The associative optimization performed immediately above is
4283 also possible for DIV and UDIV using associate_code of MULT.
4284 However, we would need extra code to verify that the
4285 multiplication does not overflow, that is, there is no overflow
4286 in the calculation of new_const. */
4287 break;
4289 default:
4290 break;
4293 new = simplify_binary_operation (code, mode,
4294 const_arg0 ? const_arg0 : folded_arg0,
4295 const_arg1 ? const_arg1 : folded_arg1);
4296 break;
4298 case RTX_OBJ:
4299 /* (lo_sum (high X) X) is simply X. */
4300 if (code == LO_SUM && const_arg0 != 0
4301 && GET_CODE (const_arg0) == HIGH
4302 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4303 return const_arg1;
4304 break;
4306 case RTX_TERNARY:
4307 case RTX_BITFIELD_OPS:
4308 new = simplify_ternary_operation (code, mode, mode_arg0,
4309 const_arg0 ? const_arg0 : folded_arg0,
4310 const_arg1 ? const_arg1 : folded_arg1,
4311 const_arg2 ? const_arg2 : XEXP (x, 2));
4312 break;
4314 default:
4315 break;
4318 return new ? new : x;
4321 /* Return a constant value currently equivalent to X.
4322 Return 0 if we don't know one. */
4324 static rtx
4325 equiv_constant (rtx x)
4327 if (REG_P (x)
4328 && REGNO_QTY_VALID_P (REGNO (x)))
4330 int x_q = REG_QTY (REGNO (x));
4331 struct qty_table_elem *x_ent = &qty_table[x_q];
4333 if (x_ent->const_rtx)
4334 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4337 if (x == 0 || CONSTANT_P (x))
4338 return x;
4340 /* If X is a MEM, try to fold it outside the context of any insn to see if
4341 it might be equivalent to a constant. That handles the case where it
4342 is a constant-pool reference. Then try to look it up in the hash table
4343 in case it is something whose value we have seen before. */
4345 if (MEM_P (x))
4347 struct table_elt *elt;
4349 x = fold_rtx (x, NULL_RTX);
4350 if (CONSTANT_P (x))
4351 return x;
4353 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
4354 if (elt == 0)
4355 return 0;
4357 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4358 if (elt->is_const && CONSTANT_P (elt->exp))
4359 return elt->exp;
4362 return 0;
4365 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4366 branch. It will be zero if not.
4368 In certain cases, this can cause us to add an equivalence. For example,
4369 if we are following the taken case of
4370 if (i == 2)
4371 we can add the fact that `i' and '2' are now equivalent.
4373 In any case, we can record that this comparison was passed. If the same
4374 comparison is seen later, we will know its value. */
4376 static void
4377 record_jump_equiv (rtx insn, int taken)
4379 int cond_known_true;
4380 rtx op0, op1;
4381 rtx set;
4382 enum machine_mode mode, mode0, mode1;
4383 int reversed_nonequality = 0;
4384 enum rtx_code code;
4386 /* Ensure this is the right kind of insn. */
4387 if (! any_condjump_p (insn))
4388 return;
4389 set = pc_set (insn);
4391 /* See if this jump condition is known true or false. */
4392 if (taken)
4393 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4394 else
4395 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4397 /* Get the type of comparison being done and the operands being compared.
4398 If we had to reverse a non-equality condition, record that fact so we
4399 know that it isn't valid for floating-point. */
4400 code = GET_CODE (XEXP (SET_SRC (set), 0));
4401 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4402 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4404 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4405 if (! cond_known_true)
4407 code = reversed_comparison_code_parts (code, op0, op1, insn);
4409 /* Don't remember if we can't find the inverse. */
4410 if (code == UNKNOWN)
4411 return;
4414 /* The mode is the mode of the non-constant. */
4415 mode = mode0;
4416 if (mode1 != VOIDmode)
4417 mode = mode1;
4419 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4422 /* Yet another form of subreg creation. In this case, we want something in
4423 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4425 static rtx
4426 record_jump_cond_subreg (enum machine_mode mode, rtx op)
4428 enum machine_mode op_mode = GET_MODE (op);
4429 if (op_mode == mode || op_mode == VOIDmode)
4430 return op;
4431 return lowpart_subreg (mode, op, op_mode);
4434 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4435 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4436 Make any useful entries we can with that information. Called from
4437 above function and called recursively. */
4439 static void
4440 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4441 rtx op1, int reversed_nonequality)
4443 unsigned op0_hash, op1_hash;
4444 int op0_in_memory, op1_in_memory;
4445 struct table_elt *op0_elt, *op1_elt;
4447 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4448 we know that they are also equal in the smaller mode (this is also
4449 true for all smaller modes whether or not there is a SUBREG, but
4450 is not worth testing for with no SUBREG). */
4452 /* Note that GET_MODE (op0) may not equal MODE. */
4453 if (code == EQ && GET_CODE (op0) == SUBREG
4454 && (GET_MODE_SIZE (GET_MODE (op0))
4455 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4457 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4458 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4459 if (tem)
4460 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4461 reversed_nonequality);
4464 if (code == EQ && GET_CODE (op1) == SUBREG
4465 && (GET_MODE_SIZE (GET_MODE (op1))
4466 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4468 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4469 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4470 if (tem)
4471 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4472 reversed_nonequality);
4475 /* Similarly, if this is an NE comparison, and either is a SUBREG
4476 making a smaller mode, we know the whole thing is also NE. */
4478 /* Note that GET_MODE (op0) may not equal MODE;
4479 if we test MODE instead, we can get an infinite recursion
4480 alternating between two modes each wider than MODE. */
4482 if (code == NE && GET_CODE (op0) == SUBREG
4483 && subreg_lowpart_p (op0)
4484 && (GET_MODE_SIZE (GET_MODE (op0))
4485 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4487 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4488 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4489 if (tem)
4490 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4491 reversed_nonequality);
4494 if (code == NE && GET_CODE (op1) == SUBREG
4495 && subreg_lowpart_p (op1)
4496 && (GET_MODE_SIZE (GET_MODE (op1))
4497 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4499 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4500 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4501 if (tem)
4502 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4503 reversed_nonequality);
4506 /* Hash both operands. */
4508 do_not_record = 0;
4509 hash_arg_in_memory = 0;
4510 op0_hash = HASH (op0, mode);
4511 op0_in_memory = hash_arg_in_memory;
4513 if (do_not_record)
4514 return;
4516 do_not_record = 0;
4517 hash_arg_in_memory = 0;
4518 op1_hash = HASH (op1, mode);
4519 op1_in_memory = hash_arg_in_memory;
4521 if (do_not_record)
4522 return;
4524 /* Look up both operands. */
4525 op0_elt = lookup (op0, op0_hash, mode);
4526 op1_elt = lookup (op1, op1_hash, mode);
4528 /* If both operands are already equivalent or if they are not in the
4529 table but are identical, do nothing. */
4530 if ((op0_elt != 0 && op1_elt != 0
4531 && op0_elt->first_same_value == op1_elt->first_same_value)
4532 || op0 == op1 || rtx_equal_p (op0, op1))
4533 return;
4535 /* If we aren't setting two things equal all we can do is save this
4536 comparison. Similarly if this is floating-point. In the latter
4537 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4538 If we record the equality, we might inadvertently delete code
4539 whose intent was to change -0 to +0. */
4541 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4543 struct qty_table_elem *ent;
4544 int qty;
4546 /* If we reversed a floating-point comparison, if OP0 is not a
4547 register, or if OP1 is neither a register or constant, we can't
4548 do anything. */
4550 if (!REG_P (op1))
4551 op1 = equiv_constant (op1);
4553 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4554 || !REG_P (op0) || op1 == 0)
4555 return;
4557 /* Put OP0 in the hash table if it isn't already. This gives it a
4558 new quantity number. */
4559 if (op0_elt == 0)
4561 if (insert_regs (op0, NULL, 0))
4563 rehash_using_reg (op0);
4564 op0_hash = HASH (op0, mode);
4566 /* If OP0 is contained in OP1, this changes its hash code
4567 as well. Faster to rehash than to check, except
4568 for the simple case of a constant. */
4569 if (! CONSTANT_P (op1))
4570 op1_hash = HASH (op1,mode);
4573 op0_elt = insert (op0, NULL, op0_hash, mode);
4574 op0_elt->in_memory = op0_in_memory;
4577 qty = REG_QTY (REGNO (op0));
4578 ent = &qty_table[qty];
4580 ent->comparison_code = code;
4581 if (REG_P (op1))
4583 /* Look it up again--in case op0 and op1 are the same. */
4584 op1_elt = lookup (op1, op1_hash, mode);
4586 /* Put OP1 in the hash table so it gets a new quantity number. */
4587 if (op1_elt == 0)
4589 if (insert_regs (op1, NULL, 0))
4591 rehash_using_reg (op1);
4592 op1_hash = HASH (op1, mode);
4595 op1_elt = insert (op1, NULL, op1_hash, mode);
4596 op1_elt->in_memory = op1_in_memory;
4599 ent->comparison_const = NULL_RTX;
4600 ent->comparison_qty = REG_QTY (REGNO (op1));
4602 else
4604 ent->comparison_const = op1;
4605 ent->comparison_qty = -1;
4608 return;
4611 /* If either side is still missing an equivalence, make it now,
4612 then merge the equivalences. */
4614 if (op0_elt == 0)
4616 if (insert_regs (op0, NULL, 0))
4618 rehash_using_reg (op0);
4619 op0_hash = HASH (op0, mode);
4622 op0_elt = insert (op0, NULL, op0_hash, mode);
4623 op0_elt->in_memory = op0_in_memory;
4626 if (op1_elt == 0)
4628 if (insert_regs (op1, NULL, 0))
4630 rehash_using_reg (op1);
4631 op1_hash = HASH (op1, mode);
4634 op1_elt = insert (op1, NULL, op1_hash, mode);
4635 op1_elt->in_memory = op1_in_memory;
4638 merge_equiv_classes (op0_elt, op1_elt);
4641 /* CSE processing for one instruction.
4642 First simplify sources and addresses of all assignments
4643 in the instruction, using previously-computed equivalents values.
4644 Then install the new sources and destinations in the table
4645 of available values.
4647 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4648 the insn. It means that INSN is inside libcall block. In this
4649 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4651 /* Data on one SET contained in the instruction. */
4653 struct set
4655 /* The SET rtx itself. */
4656 rtx rtl;
4657 /* The SET_SRC of the rtx (the original value, if it is changing). */
4658 rtx src;
4659 /* The hash-table element for the SET_SRC of the SET. */
4660 struct table_elt *src_elt;
4661 /* Hash value for the SET_SRC. */
4662 unsigned src_hash;
4663 /* Hash value for the SET_DEST. */
4664 unsigned dest_hash;
4665 /* The SET_DEST, with SUBREG, etc., stripped. */
4666 rtx inner_dest;
4667 /* Nonzero if the SET_SRC is in memory. */
4668 char src_in_memory;
4669 /* Nonzero if the SET_SRC contains something
4670 whose value cannot be predicted and understood. */
4671 char src_volatile;
4672 /* Original machine mode, in case it becomes a CONST_INT.
4673 The size of this field should match the size of the mode
4674 field of struct rtx_def (see rtl.h). */
4675 ENUM_BITFIELD(machine_mode) mode : 8;
4676 /* A constant equivalent for SET_SRC, if any. */
4677 rtx src_const;
4678 /* Original SET_SRC value used for libcall notes. */
4679 rtx orig_src;
4680 /* Hash value of constant equivalent for SET_SRC. */
4681 unsigned src_const_hash;
4682 /* Table entry for constant equivalent for SET_SRC, if any. */
4683 struct table_elt *src_const_elt;
4686 static void
4687 cse_insn (rtx insn, rtx libcall_insn)
4689 rtx x = PATTERN (insn);
4690 int i;
4691 rtx tem;
4692 int n_sets = 0;
4694 #ifdef HAVE_cc0
4695 /* Records what this insn does to set CC0. */
4696 rtx this_insn_cc0 = 0;
4697 enum machine_mode this_insn_cc0_mode = VOIDmode;
4698 #endif
4700 rtx src_eqv = 0;
4701 struct table_elt *src_eqv_elt = 0;
4702 int src_eqv_volatile = 0;
4703 int src_eqv_in_memory = 0;
4704 unsigned src_eqv_hash = 0;
4706 struct set *sets = (struct set *) 0;
4708 this_insn = insn;
4710 /* Find all the SETs and CLOBBERs in this instruction.
4711 Record all the SETs in the array `set' and count them.
4712 Also determine whether there is a CLOBBER that invalidates
4713 all memory references, or all references at varying addresses. */
4715 if (CALL_P (insn))
4717 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4719 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4720 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4721 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4725 if (GET_CODE (x) == SET)
4727 sets = alloca (sizeof (struct set));
4728 sets[0].rtl = x;
4730 /* Ignore SETs that are unconditional jumps.
4731 They never need cse processing, so this does not hurt.
4732 The reason is not efficiency but rather
4733 so that we can test at the end for instructions
4734 that have been simplified to unconditional jumps
4735 and not be misled by unchanged instructions
4736 that were unconditional jumps to begin with. */
4737 if (SET_DEST (x) == pc_rtx
4738 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4741 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4742 The hard function value register is used only once, to copy to
4743 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4744 Ensure we invalidate the destination register. On the 80386 no
4745 other code would invalidate it since it is a fixed_reg.
4746 We need not check the return of apply_change_group; see canon_reg. */
4748 else if (GET_CODE (SET_SRC (x)) == CALL)
4750 canon_reg (SET_SRC (x), insn);
4751 apply_change_group ();
4752 fold_rtx (SET_SRC (x), insn);
4753 invalidate (SET_DEST (x), VOIDmode);
4755 else
4756 n_sets = 1;
4758 else if (GET_CODE (x) == PARALLEL)
4760 int lim = XVECLEN (x, 0);
4762 sets = alloca (lim * sizeof (struct set));
4764 /* Find all regs explicitly clobbered in this insn,
4765 and ensure they are not replaced with any other regs
4766 elsewhere in this insn.
4767 When a reg that is clobbered is also used for input,
4768 we should presume that that is for a reason,
4769 and we should not substitute some other register
4770 which is not supposed to be clobbered.
4771 Therefore, this loop cannot be merged into the one below
4772 because a CALL may precede a CLOBBER and refer to the
4773 value clobbered. We must not let a canonicalization do
4774 anything in that case. */
4775 for (i = 0; i < lim; i++)
4777 rtx y = XVECEXP (x, 0, i);
4778 if (GET_CODE (y) == CLOBBER)
4780 rtx clobbered = XEXP (y, 0);
4782 if (REG_P (clobbered)
4783 || GET_CODE (clobbered) == SUBREG)
4784 invalidate (clobbered, VOIDmode);
4785 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4786 || GET_CODE (clobbered) == ZERO_EXTRACT)
4787 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4791 for (i = 0; i < lim; i++)
4793 rtx y = XVECEXP (x, 0, i);
4794 if (GET_CODE (y) == SET)
4796 /* As above, we ignore unconditional jumps and call-insns and
4797 ignore the result of apply_change_group. */
4798 if (GET_CODE (SET_SRC (y)) == CALL)
4800 canon_reg (SET_SRC (y), insn);
4801 apply_change_group ();
4802 fold_rtx (SET_SRC (y), insn);
4803 invalidate (SET_DEST (y), VOIDmode);
4805 else if (SET_DEST (y) == pc_rtx
4806 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4808 else
4809 sets[n_sets++].rtl = y;
4811 else if (GET_CODE (y) == CLOBBER)
4813 /* If we clobber memory, canon the address.
4814 This does nothing when a register is clobbered
4815 because we have already invalidated the reg. */
4816 if (MEM_P (XEXP (y, 0)))
4817 canon_reg (XEXP (y, 0), NULL_RTX);
4819 else if (GET_CODE (y) == USE
4820 && ! (REG_P (XEXP (y, 0))
4821 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4822 canon_reg (y, NULL_RTX);
4823 else if (GET_CODE (y) == CALL)
4825 /* The result of apply_change_group can be ignored; see
4826 canon_reg. */
4827 canon_reg (y, insn);
4828 apply_change_group ();
4829 fold_rtx (y, insn);
4833 else if (GET_CODE (x) == CLOBBER)
4835 if (MEM_P (XEXP (x, 0)))
4836 canon_reg (XEXP (x, 0), NULL_RTX);
4839 /* Canonicalize a USE of a pseudo register or memory location. */
4840 else if (GET_CODE (x) == USE
4841 && ! (REG_P (XEXP (x, 0))
4842 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4843 canon_reg (XEXP (x, 0), NULL_RTX);
4844 else if (GET_CODE (x) == CALL)
4846 /* The result of apply_change_group can be ignored; see canon_reg. */
4847 canon_reg (x, insn);
4848 apply_change_group ();
4849 fold_rtx (x, insn);
4852 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4853 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4854 is handled specially for this case, and if it isn't set, then there will
4855 be no equivalence for the destination. */
4856 if (n_sets == 1 && REG_NOTES (insn) != 0
4857 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4858 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4859 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4861 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4862 XEXP (tem, 0) = src_eqv;
4865 /* Canonicalize sources and addresses of destinations.
4866 We do this in a separate pass to avoid problems when a MATCH_DUP is
4867 present in the insn pattern. In that case, we want to ensure that
4868 we don't break the duplicate nature of the pattern. So we will replace
4869 both operands at the same time. Otherwise, we would fail to find an
4870 equivalent substitution in the loop calling validate_change below.
4872 We used to suppress canonicalization of DEST if it appears in SRC,
4873 but we don't do this any more. */
4875 for (i = 0; i < n_sets; i++)
4877 rtx dest = SET_DEST (sets[i].rtl);
4878 rtx src = SET_SRC (sets[i].rtl);
4879 rtx new = canon_reg (src, insn);
4880 int insn_code;
4882 sets[i].orig_src = src;
4883 if ((REG_P (new) && REG_P (src)
4884 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4885 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4886 || (insn_code = recog_memoized (insn)) < 0
4887 || insn_data[insn_code].n_dups > 0)
4888 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4889 else
4890 SET_SRC (sets[i].rtl) = new;
4892 if (GET_CODE (dest) == ZERO_EXTRACT)
4894 validate_change (insn, &XEXP (dest, 1),
4895 canon_reg (XEXP (dest, 1), insn), 1);
4896 validate_change (insn, &XEXP (dest, 2),
4897 canon_reg (XEXP (dest, 2), insn), 1);
4900 while (GET_CODE (dest) == SUBREG
4901 || GET_CODE (dest) == ZERO_EXTRACT
4902 || GET_CODE (dest) == STRICT_LOW_PART)
4903 dest = XEXP (dest, 0);
4905 if (MEM_P (dest))
4906 canon_reg (dest, insn);
4909 /* Now that we have done all the replacements, we can apply the change
4910 group and see if they all work. Note that this will cause some
4911 canonicalizations that would have worked individually not to be applied
4912 because some other canonicalization didn't work, but this should not
4913 occur often.
4915 The result of apply_change_group can be ignored; see canon_reg. */
4917 apply_change_group ();
4919 /* Set sets[i].src_elt to the class each source belongs to.
4920 Detect assignments from or to volatile things
4921 and set set[i] to zero so they will be ignored
4922 in the rest of this function.
4924 Nothing in this loop changes the hash table or the register chains. */
4926 for (i = 0; i < n_sets; i++)
4928 rtx src, dest;
4929 rtx src_folded;
4930 struct table_elt *elt = 0, *p;
4931 enum machine_mode mode;
4932 rtx src_eqv_here;
4933 rtx src_const = 0;
4934 rtx src_related = 0;
4935 struct table_elt *src_const_elt = 0;
4936 int src_cost = MAX_COST;
4937 int src_eqv_cost = MAX_COST;
4938 int src_folded_cost = MAX_COST;
4939 int src_related_cost = MAX_COST;
4940 int src_elt_cost = MAX_COST;
4941 int src_regcost = MAX_COST;
4942 int src_eqv_regcost = MAX_COST;
4943 int src_folded_regcost = MAX_COST;
4944 int src_related_regcost = MAX_COST;
4945 int src_elt_regcost = MAX_COST;
4946 /* Set nonzero if we need to call force_const_mem on with the
4947 contents of src_folded before using it. */
4948 int src_folded_force_flag = 0;
4950 dest = SET_DEST (sets[i].rtl);
4951 src = SET_SRC (sets[i].rtl);
4953 /* If SRC is a constant that has no machine mode,
4954 hash it with the destination's machine mode.
4955 This way we can keep different modes separate. */
4957 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4958 sets[i].mode = mode;
4960 if (src_eqv)
4962 enum machine_mode eqvmode = mode;
4963 if (GET_CODE (dest) == STRICT_LOW_PART)
4964 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4965 do_not_record = 0;
4966 hash_arg_in_memory = 0;
4967 src_eqv_hash = HASH (src_eqv, eqvmode);
4969 /* Find the equivalence class for the equivalent expression. */
4971 if (!do_not_record)
4972 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4974 src_eqv_volatile = do_not_record;
4975 src_eqv_in_memory = hash_arg_in_memory;
4978 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4979 value of the INNER register, not the destination. So it is not
4980 a valid substitution for the source. But save it for later. */
4981 if (GET_CODE (dest) == STRICT_LOW_PART)
4982 src_eqv_here = 0;
4983 else
4984 src_eqv_here = src_eqv;
4986 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4987 simplified result, which may not necessarily be valid. */
4988 src_folded = fold_rtx (src, insn);
4990 #if 0
4991 /* ??? This caused bad code to be generated for the m68k port with -O2.
4992 Suppose src is (CONST_INT -1), and that after truncation src_folded
4993 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4994 At the end we will add src and src_const to the same equivalence
4995 class. We now have 3 and -1 on the same equivalence class. This
4996 causes later instructions to be mis-optimized. */
4997 /* If storing a constant in a bitfield, pre-truncate the constant
4998 so we will be able to record it later. */
4999 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5001 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5003 if (GET_CODE (src) == CONST_INT
5004 && GET_CODE (width) == CONST_INT
5005 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5006 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5007 src_folded
5008 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5009 << INTVAL (width)) - 1));
5011 #endif
5013 /* Compute SRC's hash code, and also notice if it
5014 should not be recorded at all. In that case,
5015 prevent any further processing of this assignment. */
5016 do_not_record = 0;
5017 hash_arg_in_memory = 0;
5019 sets[i].src = src;
5020 sets[i].src_hash = HASH (src, mode);
5021 sets[i].src_volatile = do_not_record;
5022 sets[i].src_in_memory = hash_arg_in_memory;
5024 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5025 a pseudo, do not record SRC. Using SRC as a replacement for
5026 anything else will be incorrect in that situation. Note that
5027 this usually occurs only for stack slots, in which case all the
5028 RTL would be referring to SRC, so we don't lose any optimization
5029 opportunities by not having SRC in the hash table. */
5031 if (MEM_P (src)
5032 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5033 && REG_P (dest)
5034 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5035 sets[i].src_volatile = 1;
5037 #if 0
5038 /* It is no longer clear why we used to do this, but it doesn't
5039 appear to still be needed. So let's try without it since this
5040 code hurts cse'ing widened ops. */
5041 /* If source is a paradoxical subreg (such as QI treated as an SI),
5042 treat it as volatile. It may do the work of an SI in one context
5043 where the extra bits are not being used, but cannot replace an SI
5044 in general. */
5045 if (GET_CODE (src) == SUBREG
5046 && (GET_MODE_SIZE (GET_MODE (src))
5047 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5048 sets[i].src_volatile = 1;
5049 #endif
5051 /* Locate all possible equivalent forms for SRC. Try to replace
5052 SRC in the insn with each cheaper equivalent.
5054 We have the following types of equivalents: SRC itself, a folded
5055 version, a value given in a REG_EQUAL note, or a value related
5056 to a constant.
5058 Each of these equivalents may be part of an additional class
5059 of equivalents (if more than one is in the table, they must be in
5060 the same class; we check for this).
5062 If the source is volatile, we don't do any table lookups.
5064 We note any constant equivalent for possible later use in a
5065 REG_NOTE. */
5067 if (!sets[i].src_volatile)
5068 elt = lookup (src, sets[i].src_hash, mode);
5070 sets[i].src_elt = elt;
5072 if (elt && src_eqv_here && src_eqv_elt)
5074 if (elt->first_same_value != src_eqv_elt->first_same_value)
5076 /* The REG_EQUAL is indicating that two formerly distinct
5077 classes are now equivalent. So merge them. */
5078 merge_equiv_classes (elt, src_eqv_elt);
5079 src_eqv_hash = HASH (src_eqv, elt->mode);
5080 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5083 src_eqv_here = 0;
5086 else if (src_eqv_elt)
5087 elt = src_eqv_elt;
5089 /* Try to find a constant somewhere and record it in `src_const'.
5090 Record its table element, if any, in `src_const_elt'. Look in
5091 any known equivalences first. (If the constant is not in the
5092 table, also set `sets[i].src_const_hash'). */
5093 if (elt)
5094 for (p = elt->first_same_value; p; p = p->next_same_value)
5095 if (p->is_const)
5097 src_const = p->exp;
5098 src_const_elt = elt;
5099 break;
5102 if (src_const == 0
5103 && (CONSTANT_P (src_folded)
5104 /* Consider (minus (label_ref L1) (label_ref L2)) as
5105 "constant" here so we will record it. This allows us
5106 to fold switch statements when an ADDR_DIFF_VEC is used. */
5107 || (GET_CODE (src_folded) == MINUS
5108 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5109 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5110 src_const = src_folded, src_const_elt = elt;
5111 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5112 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5114 /* If we don't know if the constant is in the table, get its
5115 hash code and look it up. */
5116 if (src_const && src_const_elt == 0)
5118 sets[i].src_const_hash = HASH (src_const, mode);
5119 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5122 sets[i].src_const = src_const;
5123 sets[i].src_const_elt = src_const_elt;
5125 /* If the constant and our source are both in the table, mark them as
5126 equivalent. Otherwise, if a constant is in the table but the source
5127 isn't, set ELT to it. */
5128 if (src_const_elt && elt
5129 && src_const_elt->first_same_value != elt->first_same_value)
5130 merge_equiv_classes (elt, src_const_elt);
5131 else if (src_const_elt && elt == 0)
5132 elt = src_const_elt;
5134 /* See if there is a register linearly related to a constant
5135 equivalent of SRC. */
5136 if (src_const
5137 && (GET_CODE (src_const) == CONST
5138 || (src_const_elt && src_const_elt->related_value != 0)))
5140 src_related = use_related_value (src_const, src_const_elt);
5141 if (src_related)
5143 struct table_elt *src_related_elt
5144 = lookup (src_related, HASH (src_related, mode), mode);
5145 if (src_related_elt && elt)
5147 if (elt->first_same_value
5148 != src_related_elt->first_same_value)
5149 /* This can occur when we previously saw a CONST
5150 involving a SYMBOL_REF and then see the SYMBOL_REF
5151 twice. Merge the involved classes. */
5152 merge_equiv_classes (elt, src_related_elt);
5154 src_related = 0;
5155 src_related_elt = 0;
5157 else if (src_related_elt && elt == 0)
5158 elt = src_related_elt;
5162 /* See if we have a CONST_INT that is already in a register in a
5163 wider mode. */
5165 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5166 && GET_MODE_CLASS (mode) == MODE_INT
5167 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5169 enum machine_mode wider_mode;
5171 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5172 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5173 && src_related == 0;
5174 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5176 struct table_elt *const_elt
5177 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5179 if (const_elt == 0)
5180 continue;
5182 for (const_elt = const_elt->first_same_value;
5183 const_elt; const_elt = const_elt->next_same_value)
5184 if (REG_P (const_elt->exp))
5186 src_related = gen_lowpart (mode,
5187 const_elt->exp);
5188 break;
5193 /* Another possibility is that we have an AND with a constant in
5194 a mode narrower than a word. If so, it might have been generated
5195 as part of an "if" which would narrow the AND. If we already
5196 have done the AND in a wider mode, we can use a SUBREG of that
5197 value. */
5199 if (flag_expensive_optimizations && ! src_related
5200 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5201 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5203 enum machine_mode tmode;
5204 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5206 for (tmode = GET_MODE_WIDER_MODE (mode);
5207 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5208 tmode = GET_MODE_WIDER_MODE (tmode))
5210 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5211 struct table_elt *larger_elt;
5213 if (inner)
5215 PUT_MODE (new_and, tmode);
5216 XEXP (new_and, 0) = inner;
5217 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5218 if (larger_elt == 0)
5219 continue;
5221 for (larger_elt = larger_elt->first_same_value;
5222 larger_elt; larger_elt = larger_elt->next_same_value)
5223 if (REG_P (larger_elt->exp))
5225 src_related
5226 = gen_lowpart (mode, larger_elt->exp);
5227 break;
5230 if (src_related)
5231 break;
5236 #ifdef LOAD_EXTEND_OP
5237 /* See if a MEM has already been loaded with a widening operation;
5238 if it has, we can use a subreg of that. Many CISC machines
5239 also have such operations, but this is only likely to be
5240 beneficial on these machines. */
5242 if (flag_expensive_optimizations && src_related == 0
5243 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5244 && GET_MODE_CLASS (mode) == MODE_INT
5245 && MEM_P (src) && ! do_not_record
5246 && LOAD_EXTEND_OP (mode) != UNKNOWN)
5248 struct rtx_def memory_extend_buf;
5249 rtx memory_extend_rtx = &memory_extend_buf;
5250 enum machine_mode tmode;
5252 /* Set what we are trying to extend and the operation it might
5253 have been extended with. */
5254 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
5255 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5256 XEXP (memory_extend_rtx, 0) = src;
5258 for (tmode = GET_MODE_WIDER_MODE (mode);
5259 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5260 tmode = GET_MODE_WIDER_MODE (tmode))
5262 struct table_elt *larger_elt;
5264 PUT_MODE (memory_extend_rtx, tmode);
5265 larger_elt = lookup (memory_extend_rtx,
5266 HASH (memory_extend_rtx, tmode), tmode);
5267 if (larger_elt == 0)
5268 continue;
5270 for (larger_elt = larger_elt->first_same_value;
5271 larger_elt; larger_elt = larger_elt->next_same_value)
5272 if (REG_P (larger_elt->exp))
5274 src_related = gen_lowpart (mode,
5275 larger_elt->exp);
5276 break;
5279 if (src_related)
5280 break;
5283 #endif /* LOAD_EXTEND_OP */
5285 if (src == src_folded)
5286 src_folded = 0;
5288 /* At this point, ELT, if nonzero, points to a class of expressions
5289 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5290 and SRC_RELATED, if nonzero, each contain additional equivalent
5291 expressions. Prune these latter expressions by deleting expressions
5292 already in the equivalence class.
5294 Check for an equivalent identical to the destination. If found,
5295 this is the preferred equivalent since it will likely lead to
5296 elimination of the insn. Indicate this by placing it in
5297 `src_related'. */
5299 if (elt)
5300 elt = elt->first_same_value;
5301 for (p = elt; p; p = p->next_same_value)
5303 enum rtx_code code = GET_CODE (p->exp);
5305 /* If the expression is not valid, ignore it. Then we do not
5306 have to check for validity below. In most cases, we can use
5307 `rtx_equal_p', since canonicalization has already been done. */
5308 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5309 continue;
5311 /* Also skip paradoxical subregs, unless that's what we're
5312 looking for. */
5313 if (code == SUBREG
5314 && (GET_MODE_SIZE (GET_MODE (p->exp))
5315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5316 && ! (src != 0
5317 && GET_CODE (src) == SUBREG
5318 && GET_MODE (src) == GET_MODE (p->exp)
5319 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5320 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5321 continue;
5323 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5324 src = 0;
5325 else if (src_folded && GET_CODE (src_folded) == code
5326 && rtx_equal_p (src_folded, p->exp))
5327 src_folded = 0;
5328 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5329 && rtx_equal_p (src_eqv_here, p->exp))
5330 src_eqv_here = 0;
5331 else if (src_related && GET_CODE (src_related) == code
5332 && rtx_equal_p (src_related, p->exp))
5333 src_related = 0;
5335 /* This is the same as the destination of the insns, we want
5336 to prefer it. Copy it to src_related. The code below will
5337 then give it a negative cost. */
5338 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5339 src_related = dest;
5342 /* Find the cheapest valid equivalent, trying all the available
5343 possibilities. Prefer items not in the hash table to ones
5344 that are when they are equal cost. Note that we can never
5345 worsen an insn as the current contents will also succeed.
5346 If we find an equivalent identical to the destination, use it as best,
5347 since this insn will probably be eliminated in that case. */
5348 if (src)
5350 if (rtx_equal_p (src, dest))
5351 src_cost = src_regcost = -1;
5352 else
5354 src_cost = COST (src);
5355 src_regcost = approx_reg_cost (src);
5359 if (src_eqv_here)
5361 if (rtx_equal_p (src_eqv_here, dest))
5362 src_eqv_cost = src_eqv_regcost = -1;
5363 else
5365 src_eqv_cost = COST (src_eqv_here);
5366 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5370 if (src_folded)
5372 if (rtx_equal_p (src_folded, dest))
5373 src_folded_cost = src_folded_regcost = -1;
5374 else
5376 src_folded_cost = COST (src_folded);
5377 src_folded_regcost = approx_reg_cost (src_folded);
5381 if (src_related)
5383 if (rtx_equal_p (src_related, dest))
5384 src_related_cost = src_related_regcost = -1;
5385 else
5387 src_related_cost = COST (src_related);
5388 src_related_regcost = approx_reg_cost (src_related);
5392 /* If this was an indirect jump insn, a known label will really be
5393 cheaper even though it looks more expensive. */
5394 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5395 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5397 /* Terminate loop when replacement made. This must terminate since
5398 the current contents will be tested and will always be valid. */
5399 while (1)
5401 rtx trial;
5403 /* Skip invalid entries. */
5404 while (elt && !REG_P (elt->exp)
5405 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5406 elt = elt->next_same_value;
5408 /* A paradoxical subreg would be bad here: it'll be the right
5409 size, but later may be adjusted so that the upper bits aren't
5410 what we want. So reject it. */
5411 if (elt != 0
5412 && GET_CODE (elt->exp) == SUBREG
5413 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5414 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5415 /* It is okay, though, if the rtx we're trying to match
5416 will ignore any of the bits we can't predict. */
5417 && ! (src != 0
5418 && GET_CODE (src) == SUBREG
5419 && GET_MODE (src) == GET_MODE (elt->exp)
5420 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5421 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5423 elt = elt->next_same_value;
5424 continue;
5427 if (elt)
5429 src_elt_cost = elt->cost;
5430 src_elt_regcost = elt->regcost;
5433 /* Find cheapest and skip it for the next time. For items
5434 of equal cost, use this order:
5435 src_folded, src, src_eqv, src_related and hash table entry. */
5436 if (src_folded
5437 && preferable (src_folded_cost, src_folded_regcost,
5438 src_cost, src_regcost) <= 0
5439 && preferable (src_folded_cost, src_folded_regcost,
5440 src_eqv_cost, src_eqv_regcost) <= 0
5441 && preferable (src_folded_cost, src_folded_regcost,
5442 src_related_cost, src_related_regcost) <= 0
5443 && preferable (src_folded_cost, src_folded_regcost,
5444 src_elt_cost, src_elt_regcost) <= 0)
5446 trial = src_folded, src_folded_cost = MAX_COST;
5447 if (src_folded_force_flag)
5449 rtx forced = force_const_mem (mode, trial);
5450 if (forced)
5451 trial = forced;
5454 else if (src
5455 && preferable (src_cost, src_regcost,
5456 src_eqv_cost, src_eqv_regcost) <= 0
5457 && preferable (src_cost, src_regcost,
5458 src_related_cost, src_related_regcost) <= 0
5459 && preferable (src_cost, src_regcost,
5460 src_elt_cost, src_elt_regcost) <= 0)
5461 trial = src, src_cost = MAX_COST;
5462 else if (src_eqv_here
5463 && preferable (src_eqv_cost, src_eqv_regcost,
5464 src_related_cost, src_related_regcost) <= 0
5465 && preferable (src_eqv_cost, src_eqv_regcost,
5466 src_elt_cost, src_elt_regcost) <= 0)
5467 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5468 else if (src_related
5469 && preferable (src_related_cost, src_related_regcost,
5470 src_elt_cost, src_elt_regcost) <= 0)
5471 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5472 else
5474 trial = copy_rtx (elt->exp);
5475 elt = elt->next_same_value;
5476 src_elt_cost = MAX_COST;
5479 /* We don't normally have an insn matching (set (pc) (pc)), so
5480 check for this separately here. We will delete such an
5481 insn below.
5483 For other cases such as a table jump or conditional jump
5484 where we know the ultimate target, go ahead and replace the
5485 operand. While that may not make a valid insn, we will
5486 reemit the jump below (and also insert any necessary
5487 barriers). */
5488 if (n_sets == 1 && dest == pc_rtx
5489 && (trial == pc_rtx
5490 || (GET_CODE (trial) == LABEL_REF
5491 && ! condjump_p (insn))))
5493 /* Don't substitute non-local labels, this confuses CFG. */
5494 if (GET_CODE (trial) == LABEL_REF
5495 && LABEL_REF_NONLOCAL_P (trial))
5496 continue;
5498 SET_SRC (sets[i].rtl) = trial;
5499 cse_jumps_altered = 1;
5500 break;
5503 /* Look for a substitution that makes a valid insn. */
5504 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5506 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5508 /* If we just made a substitution inside a libcall, then we
5509 need to make the same substitution in any notes attached
5510 to the RETVAL insn. */
5511 if (libcall_insn
5512 && (REG_P (sets[i].orig_src)
5513 || GET_CODE (sets[i].orig_src) == SUBREG
5514 || MEM_P (sets[i].orig_src)))
5516 rtx note = find_reg_equal_equiv_note (libcall_insn);
5517 if (note != 0)
5518 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5519 sets[i].orig_src,
5520 copy_rtx (new));
5523 /* The result of apply_change_group can be ignored; see
5524 canon_reg. */
5526 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5527 apply_change_group ();
5528 break;
5531 /* If we previously found constant pool entries for
5532 constants and this is a constant, try making a
5533 pool entry. Put it in src_folded unless we already have done
5534 this since that is where it likely came from. */
5536 else if (constant_pool_entries_cost
5537 && CONSTANT_P (trial)
5538 /* Reject cases that will cause decode_rtx_const to
5539 die. On the alpha when simplifying a switch, we
5540 get (const (truncate (minus (label_ref)
5541 (label_ref)))). */
5542 && ! (GET_CODE (trial) == CONST
5543 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5544 /* Likewise on IA-64, except without the truncate. */
5545 && ! (GET_CODE (trial) == CONST
5546 && GET_CODE (XEXP (trial, 0)) == MINUS
5547 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5548 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5549 && (src_folded == 0
5550 || (!MEM_P (src_folded)
5551 && ! src_folded_force_flag))
5552 && GET_MODE_CLASS (mode) != MODE_CC
5553 && mode != VOIDmode)
5555 src_folded_force_flag = 1;
5556 src_folded = trial;
5557 src_folded_cost = constant_pool_entries_cost;
5558 src_folded_regcost = constant_pool_entries_regcost;
5562 src = SET_SRC (sets[i].rtl);
5564 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5565 However, there is an important exception: If both are registers
5566 that are not the head of their equivalence class, replace SET_SRC
5567 with the head of the class. If we do not do this, we will have
5568 both registers live over a portion of the basic block. This way,
5569 their lifetimes will likely abut instead of overlapping. */
5570 if (REG_P (dest)
5571 && REGNO_QTY_VALID_P (REGNO (dest)))
5573 int dest_q = REG_QTY (REGNO (dest));
5574 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5576 if (dest_ent->mode == GET_MODE (dest)
5577 && dest_ent->first_reg != REGNO (dest)
5578 && REG_P (src) && REGNO (src) == REGNO (dest)
5579 /* Don't do this if the original insn had a hard reg as
5580 SET_SRC or SET_DEST. */
5581 && (!REG_P (sets[i].src)
5582 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5583 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5584 /* We can't call canon_reg here because it won't do anything if
5585 SRC is a hard register. */
5587 int src_q = REG_QTY (REGNO (src));
5588 struct qty_table_elem *src_ent = &qty_table[src_q];
5589 int first = src_ent->first_reg;
5590 rtx new_src
5591 = (first >= FIRST_PSEUDO_REGISTER
5592 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5594 /* We must use validate-change even for this, because this
5595 might be a special no-op instruction, suitable only to
5596 tag notes onto. */
5597 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5599 src = new_src;
5600 /* If we had a constant that is cheaper than what we are now
5601 setting SRC to, use that constant. We ignored it when we
5602 thought we could make this into a no-op. */
5603 if (src_const && COST (src_const) < COST (src)
5604 && validate_change (insn, &SET_SRC (sets[i].rtl),
5605 src_const, 0))
5606 src = src_const;
5611 /* If we made a change, recompute SRC values. */
5612 if (src != sets[i].src)
5614 cse_altered = 1;
5615 do_not_record = 0;
5616 hash_arg_in_memory = 0;
5617 sets[i].src = src;
5618 sets[i].src_hash = HASH (src, mode);
5619 sets[i].src_volatile = do_not_record;
5620 sets[i].src_in_memory = hash_arg_in_memory;
5621 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5624 /* If this is a single SET, we are setting a register, and we have an
5625 equivalent constant, we want to add a REG_NOTE. We don't want
5626 to write a REG_EQUAL note for a constant pseudo since verifying that
5627 that pseudo hasn't been eliminated is a pain. Such a note also
5628 won't help anything.
5630 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5631 which can be created for a reference to a compile time computable
5632 entry in a jump table. */
5634 if (n_sets == 1 && src_const && REG_P (dest)
5635 && !REG_P (src_const)
5636 && ! (GET_CODE (src_const) == CONST
5637 && GET_CODE (XEXP (src_const, 0)) == MINUS
5638 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5639 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5641 /* We only want a REG_EQUAL note if src_const != src. */
5642 if (! rtx_equal_p (src, src_const))
5644 /* Make sure that the rtx is not shared. */
5645 src_const = copy_rtx (src_const);
5647 /* Record the actual constant value in a REG_EQUAL note,
5648 making a new one if one does not already exist. */
5649 set_unique_reg_note (insn, REG_EQUAL, src_const);
5653 /* Now deal with the destination. */
5654 do_not_record = 0;
5656 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5657 while (GET_CODE (dest) == SUBREG
5658 || GET_CODE (dest) == ZERO_EXTRACT
5659 || GET_CODE (dest) == STRICT_LOW_PART)
5660 dest = XEXP (dest, 0);
5662 sets[i].inner_dest = dest;
5664 if (MEM_P (dest))
5666 #ifdef PUSH_ROUNDING
5667 /* Stack pushes invalidate the stack pointer. */
5668 rtx addr = XEXP (dest, 0);
5669 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5670 && XEXP (addr, 0) == stack_pointer_rtx)
5671 invalidate (stack_pointer_rtx, Pmode);
5672 #endif
5673 dest = fold_rtx (dest, insn);
5676 /* Compute the hash code of the destination now,
5677 before the effects of this instruction are recorded,
5678 since the register values used in the address computation
5679 are those before this instruction. */
5680 sets[i].dest_hash = HASH (dest, mode);
5682 /* Don't enter a bit-field in the hash table
5683 because the value in it after the store
5684 may not equal what was stored, due to truncation. */
5686 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5688 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5690 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5691 && GET_CODE (width) == CONST_INT
5692 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5693 && ! (INTVAL (src_const)
5694 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5695 /* Exception: if the value is constant,
5696 and it won't be truncated, record it. */
5698 else
5700 /* This is chosen so that the destination will be invalidated
5701 but no new value will be recorded.
5702 We must invalidate because sometimes constant
5703 values can be recorded for bitfields. */
5704 sets[i].src_elt = 0;
5705 sets[i].src_volatile = 1;
5706 src_eqv = 0;
5707 src_eqv_elt = 0;
5711 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5712 the insn. */
5713 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5715 /* One less use of the label this insn used to jump to. */
5716 delete_insn (insn);
5717 cse_jumps_altered = 1;
5718 /* No more processing for this set. */
5719 sets[i].rtl = 0;
5722 /* If this SET is now setting PC to a label, we know it used to
5723 be a conditional or computed branch. */
5724 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5725 && !LABEL_REF_NONLOCAL_P (src))
5727 /* Now emit a BARRIER after the unconditional jump. */
5728 if (NEXT_INSN (insn) == 0
5729 || !BARRIER_P (NEXT_INSN (insn)))
5730 emit_barrier_after (insn);
5732 /* We reemit the jump in as many cases as possible just in
5733 case the form of an unconditional jump is significantly
5734 different than a computed jump or conditional jump.
5736 If this insn has multiple sets, then reemitting the
5737 jump is nontrivial. So instead we just force rerecognition
5738 and hope for the best. */
5739 if (n_sets == 1)
5741 rtx new, note;
5743 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5744 JUMP_LABEL (new) = XEXP (src, 0);
5745 LABEL_NUSES (XEXP (src, 0))++;
5747 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5748 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5749 if (note)
5751 XEXP (note, 1) = NULL_RTX;
5752 REG_NOTES (new) = note;
5755 delete_insn (insn);
5756 insn = new;
5758 /* Now emit a BARRIER after the unconditional jump. */
5759 if (NEXT_INSN (insn) == 0
5760 || !BARRIER_P (NEXT_INSN (insn)))
5761 emit_barrier_after (insn);
5763 else
5764 INSN_CODE (insn) = -1;
5766 /* Do not bother deleting any unreachable code,
5767 let jump/flow do that. */
5769 cse_jumps_altered = 1;
5770 sets[i].rtl = 0;
5773 /* If destination is volatile, invalidate it and then do no further
5774 processing for this assignment. */
5776 else if (do_not_record)
5778 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5779 invalidate (dest, VOIDmode);
5780 else if (MEM_P (dest))
5781 invalidate (dest, VOIDmode);
5782 else if (GET_CODE (dest) == STRICT_LOW_PART
5783 || GET_CODE (dest) == ZERO_EXTRACT)
5784 invalidate (XEXP (dest, 0), GET_MODE (dest));
5785 sets[i].rtl = 0;
5788 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5789 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5791 #ifdef HAVE_cc0
5792 /* If setting CC0, record what it was set to, or a constant, if it
5793 is equivalent to a constant. If it is being set to a floating-point
5794 value, make a COMPARE with the appropriate constant of 0. If we
5795 don't do this, later code can interpret this as a test against
5796 const0_rtx, which can cause problems if we try to put it into an
5797 insn as a floating-point operand. */
5798 if (dest == cc0_rtx)
5800 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5801 this_insn_cc0_mode = mode;
5802 if (FLOAT_MODE_P (mode))
5803 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5804 CONST0_RTX (mode));
5806 #endif
5809 /* Now enter all non-volatile source expressions in the hash table
5810 if they are not already present.
5811 Record their equivalence classes in src_elt.
5812 This way we can insert the corresponding destinations into
5813 the same classes even if the actual sources are no longer in them
5814 (having been invalidated). */
5816 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5817 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5819 struct table_elt *elt;
5820 struct table_elt *classp = sets[0].src_elt;
5821 rtx dest = SET_DEST (sets[0].rtl);
5822 enum machine_mode eqvmode = GET_MODE (dest);
5824 if (GET_CODE (dest) == STRICT_LOW_PART)
5826 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5827 classp = 0;
5829 if (insert_regs (src_eqv, classp, 0))
5831 rehash_using_reg (src_eqv);
5832 src_eqv_hash = HASH (src_eqv, eqvmode);
5834 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5835 elt->in_memory = src_eqv_in_memory;
5836 src_eqv_elt = elt;
5838 /* Check to see if src_eqv_elt is the same as a set source which
5839 does not yet have an elt, and if so set the elt of the set source
5840 to src_eqv_elt. */
5841 for (i = 0; i < n_sets; i++)
5842 if (sets[i].rtl && sets[i].src_elt == 0
5843 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5844 sets[i].src_elt = src_eqv_elt;
5847 for (i = 0; i < n_sets; i++)
5848 if (sets[i].rtl && ! sets[i].src_volatile
5849 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5851 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5853 /* REG_EQUAL in setting a STRICT_LOW_PART
5854 gives an equivalent for the entire destination register,
5855 not just for the subreg being stored in now.
5856 This is a more interesting equivalence, so we arrange later
5857 to treat the entire reg as the destination. */
5858 sets[i].src_elt = src_eqv_elt;
5859 sets[i].src_hash = src_eqv_hash;
5861 else
5863 /* Insert source and constant equivalent into hash table, if not
5864 already present. */
5865 struct table_elt *classp = src_eqv_elt;
5866 rtx src = sets[i].src;
5867 rtx dest = SET_DEST (sets[i].rtl);
5868 enum machine_mode mode
5869 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5871 /* It's possible that we have a source value known to be
5872 constant but don't have a REG_EQUAL note on the insn.
5873 Lack of a note will mean src_eqv_elt will be NULL. This
5874 can happen where we've generated a SUBREG to access a
5875 CONST_INT that is already in a register in a wider mode.
5876 Ensure that the source expression is put in the proper
5877 constant class. */
5878 if (!classp)
5879 classp = sets[i].src_const_elt;
5881 if (sets[i].src_elt == 0)
5883 /* Don't put a hard register source into the table if this is
5884 the last insn of a libcall. In this case, we only need
5885 to put src_eqv_elt in src_elt. */
5886 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5888 struct table_elt *elt;
5890 /* Note that these insert_regs calls cannot remove
5891 any of the src_elt's, because they would have failed to
5892 match if not still valid. */
5893 if (insert_regs (src, classp, 0))
5895 rehash_using_reg (src);
5896 sets[i].src_hash = HASH (src, mode);
5898 elt = insert (src, classp, sets[i].src_hash, mode);
5899 elt->in_memory = sets[i].src_in_memory;
5900 sets[i].src_elt = classp = elt;
5902 else
5903 sets[i].src_elt = classp;
5905 if (sets[i].src_const && sets[i].src_const_elt == 0
5906 && src != sets[i].src_const
5907 && ! rtx_equal_p (sets[i].src_const, src))
5908 sets[i].src_elt = insert (sets[i].src_const, classp,
5909 sets[i].src_const_hash, mode);
5912 else if (sets[i].src_elt == 0)
5913 /* If we did not insert the source into the hash table (e.g., it was
5914 volatile), note the equivalence class for the REG_EQUAL value, if any,
5915 so that the destination goes into that class. */
5916 sets[i].src_elt = src_eqv_elt;
5918 invalidate_from_clobbers (x);
5920 /* Some registers are invalidated by subroutine calls. Memory is
5921 invalidated by non-constant calls. */
5923 if (CALL_P (insn))
5925 if (! CONST_OR_PURE_CALL_P (insn))
5926 invalidate_memory ();
5927 invalidate_for_call ();
5930 /* Now invalidate everything set by this instruction.
5931 If a SUBREG or other funny destination is being set,
5932 sets[i].rtl is still nonzero, so here we invalidate the reg
5933 a part of which is being set. */
5935 for (i = 0; i < n_sets; i++)
5936 if (sets[i].rtl)
5938 /* We can't use the inner dest, because the mode associated with
5939 a ZERO_EXTRACT is significant. */
5940 rtx dest = SET_DEST (sets[i].rtl);
5942 /* Needed for registers to remove the register from its
5943 previous quantity's chain.
5944 Needed for memory if this is a nonvarying address, unless
5945 we have just done an invalidate_memory that covers even those. */
5946 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5947 invalidate (dest, VOIDmode);
5948 else if (MEM_P (dest))
5949 invalidate (dest, VOIDmode);
5950 else if (GET_CODE (dest) == STRICT_LOW_PART
5951 || GET_CODE (dest) == ZERO_EXTRACT)
5952 invalidate (XEXP (dest, 0), GET_MODE (dest));
5955 /* A volatile ASM invalidates everything. */
5956 if (NONJUMP_INSN_P (insn)
5957 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5958 && MEM_VOLATILE_P (PATTERN (insn)))
5959 flush_hash_table ();
5961 /* Make sure registers mentioned in destinations
5962 are safe for use in an expression to be inserted.
5963 This removes from the hash table
5964 any invalid entry that refers to one of these registers.
5966 We don't care about the return value from mention_regs because
5967 we are going to hash the SET_DEST values unconditionally. */
5969 for (i = 0; i < n_sets; i++)
5971 if (sets[i].rtl)
5973 rtx x = SET_DEST (sets[i].rtl);
5975 if (!REG_P (x))
5976 mention_regs (x);
5977 else
5979 /* We used to rely on all references to a register becoming
5980 inaccessible when a register changes to a new quantity,
5981 since that changes the hash code. However, that is not
5982 safe, since after HASH_SIZE new quantities we get a
5983 hash 'collision' of a register with its own invalid
5984 entries. And since SUBREGs have been changed not to
5985 change their hash code with the hash code of the register,
5986 it wouldn't work any longer at all. So we have to check
5987 for any invalid references lying around now.
5988 This code is similar to the REG case in mention_regs,
5989 but it knows that reg_tick has been incremented, and
5990 it leaves reg_in_table as -1 . */
5991 unsigned int regno = REGNO (x);
5992 unsigned int endregno
5993 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5994 : hard_regno_nregs[regno][GET_MODE (x)]);
5995 unsigned int i;
5997 for (i = regno; i < endregno; i++)
5999 if (REG_IN_TABLE (i) >= 0)
6001 remove_invalid_refs (i);
6002 REG_IN_TABLE (i) = -1;
6009 /* We may have just removed some of the src_elt's from the hash table.
6010 So replace each one with the current head of the same class. */
6012 for (i = 0; i < n_sets; i++)
6013 if (sets[i].rtl)
6015 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6016 /* If elt was removed, find current head of same class,
6017 or 0 if nothing remains of that class. */
6019 struct table_elt *elt = sets[i].src_elt;
6021 while (elt && elt->prev_same_value)
6022 elt = elt->prev_same_value;
6024 while (elt && elt->first_same_value == 0)
6025 elt = elt->next_same_value;
6026 sets[i].src_elt = elt ? elt->first_same_value : 0;
6030 /* Now insert the destinations into their equivalence classes. */
6032 for (i = 0; i < n_sets; i++)
6033 if (sets[i].rtl)
6035 rtx dest = SET_DEST (sets[i].rtl);
6036 struct table_elt *elt;
6038 /* Don't record value if we are not supposed to risk allocating
6039 floating-point values in registers that might be wider than
6040 memory. */
6041 if ((flag_float_store
6042 && MEM_P (dest)
6043 && FLOAT_MODE_P (GET_MODE (dest)))
6044 /* Don't record BLKmode values, because we don't know the
6045 size of it, and can't be sure that other BLKmode values
6046 have the same or smaller size. */
6047 || GET_MODE (dest) == BLKmode
6048 /* Don't record values of destinations set inside a libcall block
6049 since we might delete the libcall. Things should have been set
6050 up so we won't want to reuse such a value, but we play it safe
6051 here. */
6052 || libcall_insn
6053 /* If we didn't put a REG_EQUAL value or a source into the hash
6054 table, there is no point is recording DEST. */
6055 || sets[i].src_elt == 0
6056 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6057 or SIGN_EXTEND, don't record DEST since it can cause
6058 some tracking to be wrong.
6060 ??? Think about this more later. */
6061 || (GET_CODE (dest) == SUBREG
6062 && (GET_MODE_SIZE (GET_MODE (dest))
6063 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6064 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6065 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6066 continue;
6068 /* STRICT_LOW_PART isn't part of the value BEING set,
6069 and neither is the SUBREG inside it.
6070 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6071 if (GET_CODE (dest) == STRICT_LOW_PART)
6072 dest = SUBREG_REG (XEXP (dest, 0));
6074 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
6075 /* Registers must also be inserted into chains for quantities. */
6076 if (insert_regs (dest, sets[i].src_elt, 1))
6078 /* If `insert_regs' changes something, the hash code must be
6079 recalculated. */
6080 rehash_using_reg (dest);
6081 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6084 elt = insert (dest, sets[i].src_elt,
6085 sets[i].dest_hash, GET_MODE (dest));
6087 elt->in_memory = (MEM_P (sets[i].inner_dest)
6088 && !MEM_READONLY_P (sets[i].inner_dest));
6090 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6091 narrower than M2, and both M1 and M2 are the same number of words,
6092 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6093 make that equivalence as well.
6095 However, BAR may have equivalences for which gen_lowpart
6096 will produce a simpler value than gen_lowpart applied to
6097 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6098 BAR's equivalences. If we don't get a simplified form, make
6099 the SUBREG. It will not be used in an equivalence, but will
6100 cause two similar assignments to be detected.
6102 Note the loop below will find SUBREG_REG (DEST) since we have
6103 already entered SRC and DEST of the SET in the table. */
6105 if (GET_CODE (dest) == SUBREG
6106 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6107 / UNITS_PER_WORD)
6108 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6109 && (GET_MODE_SIZE (GET_MODE (dest))
6110 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6111 && sets[i].src_elt != 0)
6113 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6114 struct table_elt *elt, *classp = 0;
6116 for (elt = sets[i].src_elt->first_same_value; elt;
6117 elt = elt->next_same_value)
6119 rtx new_src = 0;
6120 unsigned src_hash;
6121 struct table_elt *src_elt;
6122 int byte = 0;
6124 /* Ignore invalid entries. */
6125 if (!REG_P (elt->exp)
6126 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6127 continue;
6129 /* We may have already been playing subreg games. If the
6130 mode is already correct for the destination, use it. */
6131 if (GET_MODE (elt->exp) == new_mode)
6132 new_src = elt->exp;
6133 else
6135 /* Calculate big endian correction for the SUBREG_BYTE.
6136 We have already checked that M1 (GET_MODE (dest))
6137 is not narrower than M2 (new_mode). */
6138 if (BYTES_BIG_ENDIAN)
6139 byte = (GET_MODE_SIZE (GET_MODE (dest))
6140 - GET_MODE_SIZE (new_mode));
6142 new_src = simplify_gen_subreg (new_mode, elt->exp,
6143 GET_MODE (dest), byte);
6146 /* The call to simplify_gen_subreg fails if the value
6147 is VOIDmode, yet we can't do any simplification, e.g.
6148 for EXPR_LISTs denoting function call results.
6149 It is invalid to construct a SUBREG with a VOIDmode
6150 SUBREG_REG, hence a zero new_src means we can't do
6151 this substitution. */
6152 if (! new_src)
6153 continue;
6155 src_hash = HASH (new_src, new_mode);
6156 src_elt = lookup (new_src, src_hash, new_mode);
6158 /* Put the new source in the hash table is if isn't
6159 already. */
6160 if (src_elt == 0)
6162 if (insert_regs (new_src, classp, 0))
6164 rehash_using_reg (new_src);
6165 src_hash = HASH (new_src, new_mode);
6167 src_elt = insert (new_src, classp, src_hash, new_mode);
6168 src_elt->in_memory = elt->in_memory;
6170 else if (classp && classp != src_elt->first_same_value)
6171 /* Show that two things that we've seen before are
6172 actually the same. */
6173 merge_equiv_classes (src_elt, classp);
6175 classp = src_elt->first_same_value;
6176 /* Ignore invalid entries. */
6177 while (classp
6178 && !REG_P (classp->exp)
6179 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6180 classp = classp->next_same_value;
6185 /* Special handling for (set REG0 REG1) where REG0 is the
6186 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6187 be used in the sequel, so (if easily done) change this insn to
6188 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6189 that computed their value. Then REG1 will become a dead store
6190 and won't cloud the situation for later optimizations.
6192 Do not make this change if REG1 is a hard register, because it will
6193 then be used in the sequel and we may be changing a two-operand insn
6194 into a three-operand insn.
6196 Also do not do this if we are operating on a copy of INSN.
6198 Also don't do this if INSN ends a libcall; this would cause an unrelated
6199 register to be set in the middle of a libcall, and we then get bad code
6200 if the libcall is deleted. */
6202 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6203 && NEXT_INSN (PREV_INSN (insn)) == insn
6204 && REG_P (SET_SRC (sets[0].rtl))
6205 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6206 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6208 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6209 struct qty_table_elem *src_ent = &qty_table[src_q];
6211 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6212 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6214 rtx prev = insn;
6215 /* Scan for the previous nonnote insn, but stop at a basic
6216 block boundary. */
6219 prev = PREV_INSN (prev);
6221 while (prev && NOTE_P (prev)
6222 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6224 /* Do not swap the registers around if the previous instruction
6225 attaches a REG_EQUIV note to REG1.
6227 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6228 from the pseudo that originally shadowed an incoming argument
6229 to another register. Some uses of REG_EQUIV might rely on it
6230 being attached to REG1 rather than REG2.
6232 This section previously turned the REG_EQUIV into a REG_EQUAL
6233 note. We cannot do that because REG_EQUIV may provide an
6234 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6236 if (prev != 0 && NONJUMP_INSN_P (prev)
6237 && GET_CODE (PATTERN (prev)) == SET
6238 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6239 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6241 rtx dest = SET_DEST (sets[0].rtl);
6242 rtx src = SET_SRC (sets[0].rtl);
6243 rtx note;
6245 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6246 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6247 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6248 apply_change_group ();
6250 /* If INSN has a REG_EQUAL note, and this note mentions
6251 REG0, then we must delete it, because the value in
6252 REG0 has changed. If the note's value is REG1, we must
6253 also delete it because that is now this insn's dest. */
6254 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6255 if (note != 0
6256 && (reg_mentioned_p (dest, XEXP (note, 0))
6257 || rtx_equal_p (src, XEXP (note, 0))))
6258 remove_note (insn, note);
6263 /* If this is a conditional jump insn, record any known equivalences due to
6264 the condition being tested. */
6266 if (JUMP_P (insn)
6267 && n_sets == 1 && GET_CODE (x) == SET
6268 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6269 record_jump_equiv (insn, 0);
6271 #ifdef HAVE_cc0
6272 /* If the previous insn set CC0 and this insn no longer references CC0,
6273 delete the previous insn. Here we use the fact that nothing expects CC0
6274 to be valid over an insn, which is true until the final pass. */
6275 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6276 && (tem = single_set (prev_insn)) != 0
6277 && SET_DEST (tem) == cc0_rtx
6278 && ! reg_mentioned_p (cc0_rtx, x))
6279 delete_insn (prev_insn);
6281 prev_insn_cc0 = this_insn_cc0;
6282 prev_insn_cc0_mode = this_insn_cc0_mode;
6283 prev_insn = insn;
6284 #endif
6287 /* Remove from the hash table all expressions that reference memory. */
6289 static void
6290 invalidate_memory (void)
6292 int i;
6293 struct table_elt *p, *next;
6295 for (i = 0; i < HASH_SIZE; i++)
6296 for (p = table[i]; p; p = next)
6298 next = p->next_same_hash;
6299 if (p->in_memory)
6300 remove_from_table (p, i);
6304 /* If ADDR is an address that implicitly affects the stack pointer, return
6305 1 and update the register tables to show the effect. Else, return 0. */
6307 static int
6308 addr_affects_sp_p (rtx addr)
6310 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6311 && REG_P (XEXP (addr, 0))
6312 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6314 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6316 REG_TICK (STACK_POINTER_REGNUM)++;
6317 /* Is it possible to use a subreg of SP? */
6318 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6321 /* This should be *very* rare. */
6322 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6323 invalidate (stack_pointer_rtx, VOIDmode);
6325 return 1;
6328 return 0;
6331 /* Perform invalidation on the basis of everything about an insn
6332 except for invalidating the actual places that are SET in it.
6333 This includes the places CLOBBERed, and anything that might
6334 alias with something that is SET or CLOBBERed.
6336 X is the pattern of the insn. */
6338 static void
6339 invalidate_from_clobbers (rtx x)
6341 if (GET_CODE (x) == CLOBBER)
6343 rtx ref = XEXP (x, 0);
6344 if (ref)
6346 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6347 || MEM_P (ref))
6348 invalidate (ref, VOIDmode);
6349 else if (GET_CODE (ref) == STRICT_LOW_PART
6350 || GET_CODE (ref) == ZERO_EXTRACT)
6351 invalidate (XEXP (ref, 0), GET_MODE (ref));
6354 else if (GET_CODE (x) == PARALLEL)
6356 int i;
6357 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6359 rtx y = XVECEXP (x, 0, i);
6360 if (GET_CODE (y) == CLOBBER)
6362 rtx ref = XEXP (y, 0);
6363 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6364 || MEM_P (ref))
6365 invalidate (ref, VOIDmode);
6366 else if (GET_CODE (ref) == STRICT_LOW_PART
6367 || GET_CODE (ref) == ZERO_EXTRACT)
6368 invalidate (XEXP (ref, 0), GET_MODE (ref));
6374 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6375 and replace any registers in them with either an equivalent constant
6376 or the canonical form of the register. If we are inside an address,
6377 only do this if the address remains valid.
6379 OBJECT is 0 except when within a MEM in which case it is the MEM.
6381 Return the replacement for X. */
6383 static rtx
6384 cse_process_notes (rtx x, rtx object)
6386 enum rtx_code code = GET_CODE (x);
6387 const char *fmt = GET_RTX_FORMAT (code);
6388 int i;
6390 switch (code)
6392 case CONST_INT:
6393 case CONST:
6394 case SYMBOL_REF:
6395 case LABEL_REF:
6396 case CONST_DOUBLE:
6397 case CONST_VECTOR:
6398 case PC:
6399 case CC0:
6400 case LO_SUM:
6401 return x;
6403 case MEM:
6404 validate_change (x, &XEXP (x, 0),
6405 cse_process_notes (XEXP (x, 0), x), 0);
6406 return x;
6408 case EXPR_LIST:
6409 case INSN_LIST:
6410 if (REG_NOTE_KIND (x) == REG_EQUAL)
6411 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6412 if (XEXP (x, 1))
6413 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6414 return x;
6416 case SIGN_EXTEND:
6417 case ZERO_EXTEND:
6418 case SUBREG:
6420 rtx new = cse_process_notes (XEXP (x, 0), object);
6421 /* We don't substitute VOIDmode constants into these rtx,
6422 since they would impede folding. */
6423 if (GET_MODE (new) != VOIDmode)
6424 validate_change (object, &XEXP (x, 0), new, 0);
6425 return x;
6428 case REG:
6429 i = REG_QTY (REGNO (x));
6431 /* Return a constant or a constant register. */
6432 if (REGNO_QTY_VALID_P (REGNO (x)))
6434 struct qty_table_elem *ent = &qty_table[i];
6436 if (ent->const_rtx != NULL_RTX
6437 && (CONSTANT_P (ent->const_rtx)
6438 || REG_P (ent->const_rtx)))
6440 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6441 if (new)
6442 return new;
6446 /* Otherwise, canonicalize this register. */
6447 return canon_reg (x, NULL_RTX);
6449 default:
6450 break;
6453 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6454 if (fmt[i] == 'e')
6455 validate_change (object, &XEXP (x, i),
6456 cse_process_notes (XEXP (x, i), object), 0);
6458 return x;
6461 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6462 since they are done elsewhere. This function is called via note_stores. */
6464 static void
6465 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6467 enum rtx_code code = GET_CODE (dest);
6469 if (code == MEM
6470 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6471 /* There are times when an address can appear varying and be a PLUS
6472 during this scan when it would be a fixed address were we to know
6473 the proper equivalences. So invalidate all memory if there is
6474 a BLKmode or nonscalar memory reference or a reference to a
6475 variable address. */
6476 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6477 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6479 invalidate_memory ();
6480 return;
6483 if (GET_CODE (set) == CLOBBER
6484 || CC0_P (dest)
6485 || dest == pc_rtx)
6486 return;
6488 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6489 invalidate (XEXP (dest, 0), GET_MODE (dest));
6490 else if (code == REG || code == SUBREG || code == MEM)
6491 invalidate (dest, VOIDmode);
6494 /* Invalidate all insns from START up to the end of the function or the
6495 next label. This called when we wish to CSE around a block that is
6496 conditionally executed. */
6498 static void
6499 invalidate_skipped_block (rtx start)
6501 rtx insn;
6503 for (insn = start; insn && !LABEL_P (insn);
6504 insn = NEXT_INSN (insn))
6506 if (! INSN_P (insn))
6507 continue;
6509 if (CALL_P (insn))
6511 if (! CONST_OR_PURE_CALL_P (insn))
6512 invalidate_memory ();
6513 invalidate_for_call ();
6516 invalidate_from_clobbers (PATTERN (insn));
6517 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6521 /* Find the end of INSN's basic block and return its range,
6522 the total number of SETs in all the insns of the block, the last insn of the
6523 block, and the branch path.
6525 The branch path indicates which branches should be followed. If a nonzero
6526 path size is specified, the block should be rescanned and a different set
6527 of branches will be taken. The branch path is only used if
6528 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6530 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6531 used to describe the block. It is filled in with the information about
6532 the current block. The incoming structure's branch path, if any, is used
6533 to construct the output branch path. */
6535 static void
6536 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6537 int follow_jumps, int skip_blocks)
6539 rtx p = insn, q;
6540 int nsets = 0;
6541 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6542 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6543 int path_size = data->path_size;
6544 int path_entry = 0;
6545 int i;
6547 /* Update the previous branch path, if any. If the last branch was
6548 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6549 If it was previously PATH_NOT_TAKEN,
6550 shorten the path by one and look at the previous branch. We know that
6551 at least one branch must have been taken if PATH_SIZE is nonzero. */
6552 while (path_size > 0)
6554 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6556 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6557 break;
6559 else
6560 path_size--;
6563 /* If the first instruction is marked with QImode, that means we've
6564 already processed this block. Our caller will look at DATA->LAST
6565 to figure out where to go next. We want to return the next block
6566 in the instruction stream, not some branched-to block somewhere
6567 else. We accomplish this by pretending our called forbid us to
6568 follow jumps, or skip blocks. */
6569 if (GET_MODE (insn) == QImode)
6570 follow_jumps = skip_blocks = 0;
6572 /* Scan to end of this basic block. */
6573 while (p && !LABEL_P (p))
6575 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6576 the regs restored by the longjmp come from
6577 a later time than the setjmp. */
6578 if (PREV_INSN (p) && CALL_P (PREV_INSN (p))
6579 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6580 break;
6582 /* A PARALLEL can have lots of SETs in it,
6583 especially if it is really an ASM_OPERANDS. */
6584 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6585 nsets += XVECLEN (PATTERN (p), 0);
6586 else if (!NOTE_P (p))
6587 nsets += 1;
6589 /* Ignore insns made by CSE; they cannot affect the boundaries of
6590 the basic block. */
6592 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6593 high_cuid = INSN_CUID (p);
6594 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6595 low_cuid = INSN_CUID (p);
6597 /* See if this insn is in our branch path. If it is and we are to
6598 take it, do so. */
6599 if (path_entry < path_size && data->path[path_entry].branch == p)
6601 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6602 p = JUMP_LABEL (p);
6604 /* Point to next entry in path, if any. */
6605 path_entry++;
6608 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6609 was specified, we haven't reached our maximum path length, there are
6610 insns following the target of the jump, this is the only use of the
6611 jump label, and the target label is preceded by a BARRIER.
6613 Alternatively, we can follow the jump if it branches around a
6614 block of code and there are no other branches into the block.
6615 In this case invalidate_skipped_block will be called to invalidate any
6616 registers set in the block when following the jump. */
6618 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6619 && JUMP_P (p)
6620 && GET_CODE (PATTERN (p)) == SET
6621 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6622 && JUMP_LABEL (p) != 0
6623 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6624 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6626 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6627 if ((!NOTE_P (q)
6628 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6629 || (PREV_INSN (q) && CALL_P (PREV_INSN (q))
6630 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6631 && (!LABEL_P (q) || LABEL_NUSES (q) != 0))
6632 break;
6634 /* If we ran into a BARRIER, this code is an extension of the
6635 basic block when the branch is taken. */
6636 if (follow_jumps && q != 0 && BARRIER_P (q))
6638 /* Don't allow ourself to keep walking around an
6639 always-executed loop. */
6640 if (next_real_insn (q) == next)
6642 p = NEXT_INSN (p);
6643 continue;
6646 /* Similarly, don't put a branch in our path more than once. */
6647 for (i = 0; i < path_entry; i++)
6648 if (data->path[i].branch == p)
6649 break;
6651 if (i != path_entry)
6652 break;
6654 data->path[path_entry].branch = p;
6655 data->path[path_entry++].status = PATH_TAKEN;
6657 /* This branch now ends our path. It was possible that we
6658 didn't see this branch the last time around (when the
6659 insn in front of the target was a JUMP_INSN that was
6660 turned into a no-op). */
6661 path_size = path_entry;
6663 p = JUMP_LABEL (p);
6664 /* Mark block so we won't scan it again later. */
6665 PUT_MODE (NEXT_INSN (p), QImode);
6667 /* Detect a branch around a block of code. */
6668 else if (skip_blocks && q != 0 && !LABEL_P (q))
6670 rtx tmp;
6672 if (next_real_insn (q) == next)
6674 p = NEXT_INSN (p);
6675 continue;
6678 for (i = 0; i < path_entry; i++)
6679 if (data->path[i].branch == p)
6680 break;
6682 if (i != path_entry)
6683 break;
6685 /* This is no_labels_between_p (p, q) with an added check for
6686 reaching the end of a function (in case Q precedes P). */
6687 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6688 if (LABEL_P (tmp))
6689 break;
6691 if (tmp == q)
6693 data->path[path_entry].branch = p;
6694 data->path[path_entry++].status = PATH_AROUND;
6696 path_size = path_entry;
6698 p = JUMP_LABEL (p);
6699 /* Mark block so we won't scan it again later. */
6700 PUT_MODE (NEXT_INSN (p), QImode);
6704 p = NEXT_INSN (p);
6707 data->low_cuid = low_cuid;
6708 data->high_cuid = high_cuid;
6709 data->nsets = nsets;
6710 data->last = p;
6712 /* If all jumps in the path are not taken, set our path length to zero
6713 so a rescan won't be done. */
6714 for (i = path_size - 1; i >= 0; i--)
6715 if (data->path[i].status != PATH_NOT_TAKEN)
6716 break;
6718 if (i == -1)
6719 data->path_size = 0;
6720 else
6721 data->path_size = path_size;
6723 /* End the current branch path. */
6724 data->path[path_size].branch = 0;
6727 /* Perform cse on the instructions of a function.
6728 F is the first instruction.
6729 NREGS is one plus the highest pseudo-reg number used in the instruction.
6731 Returns 1 if jump_optimize should be redone due to simplifications
6732 in conditional jump instructions. */
6735 cse_main (rtx f, int nregs, FILE *file)
6737 struct cse_basic_block_data val;
6738 rtx insn = f;
6739 int i;
6741 init_cse_reg_info (nregs);
6743 val.path = xmalloc (sizeof (struct branch_path)
6744 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6746 cse_jumps_altered = 0;
6747 recorded_label_ref = 0;
6748 constant_pool_entries_cost = 0;
6749 constant_pool_entries_regcost = 0;
6750 val.path_size = 0;
6751 rtl_hooks = cse_rtl_hooks;
6753 init_recog ();
6754 init_alias_analysis ();
6756 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6758 /* Find the largest uid. */
6760 max_uid = get_max_uid ();
6761 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6763 /* Compute the mapping from uids to cuids.
6764 CUIDs are numbers assigned to insns, like uids,
6765 except that cuids increase monotonically through the code.
6766 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6767 between two insns is not affected by -g. */
6769 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6771 if (!NOTE_P (insn)
6772 || NOTE_LINE_NUMBER (insn) < 0)
6773 INSN_CUID (insn) = ++i;
6774 else
6775 /* Give a line number note the same cuid as preceding insn. */
6776 INSN_CUID (insn) = i;
6779 /* Loop over basic blocks.
6780 Compute the maximum number of qty's needed for each basic block
6781 (which is 2 for each SET). */
6782 insn = f;
6783 while (insn)
6785 cse_altered = 0;
6786 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps,
6787 flag_cse_skip_blocks);
6789 /* If this basic block was already processed or has no sets, skip it. */
6790 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6792 PUT_MODE (insn, VOIDmode);
6793 insn = (val.last ? NEXT_INSN (val.last) : 0);
6794 val.path_size = 0;
6795 continue;
6798 cse_basic_block_start = val.low_cuid;
6799 cse_basic_block_end = val.high_cuid;
6800 max_qty = val.nsets * 2;
6802 if (file)
6803 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
6804 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6805 val.nsets);
6807 /* Make MAX_QTY bigger to give us room to optimize
6808 past the end of this basic block, if that should prove useful. */
6809 if (max_qty < 500)
6810 max_qty = 500;
6812 /* If this basic block is being extended by following certain jumps,
6813 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6814 Otherwise, we start after this basic block. */
6815 if (val.path_size > 0)
6816 cse_basic_block (insn, val.last, val.path);
6817 else
6819 int old_cse_jumps_altered = cse_jumps_altered;
6820 rtx temp;
6822 /* When cse changes a conditional jump to an unconditional
6823 jump, we want to reprocess the block, since it will give
6824 us a new branch path to investigate. */
6825 cse_jumps_altered = 0;
6826 temp = cse_basic_block (insn, val.last, val.path);
6827 if (cse_jumps_altered == 0
6828 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6829 insn = temp;
6831 cse_jumps_altered |= old_cse_jumps_altered;
6834 if (cse_altered)
6835 ggc_collect ();
6837 #ifdef USE_C_ALLOCA
6838 alloca (0);
6839 #endif
6842 /* Clean up. */
6843 end_alias_analysis ();
6844 free (uid_cuid);
6845 free (reg_eqv_table);
6846 free (val.path);
6847 rtl_hooks = general_rtl_hooks;
6849 return cse_jumps_altered || recorded_label_ref;
6852 /* Process a single basic block. FROM and TO and the limits of the basic
6853 block. NEXT_BRANCH points to the branch path when following jumps or
6854 a null path when not following jumps. */
6856 static rtx
6857 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch)
6859 rtx insn;
6860 int to_usage = 0;
6861 rtx libcall_insn = NULL_RTX;
6862 int num_insns = 0;
6863 int no_conflict = 0;
6865 /* Allocate the space needed by qty_table. */
6866 qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem));
6868 new_basic_block ();
6870 /* TO might be a label. If so, protect it from being deleted. */
6871 if (to != 0 && LABEL_P (to))
6872 ++LABEL_NUSES (to);
6874 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6876 enum rtx_code code = GET_CODE (insn);
6878 /* If we have processed 1,000 insns, flush the hash table to
6879 avoid extreme quadratic behavior. We must not include NOTEs
6880 in the count since there may be more of them when generating
6881 debugging information. If we clear the table at different
6882 times, code generated with -g -O might be different than code
6883 generated with -O but not -g.
6885 ??? This is a real kludge and needs to be done some other way.
6886 Perhaps for 2.9. */
6887 if (code != NOTE && num_insns++ > 1000)
6889 flush_hash_table ();
6890 num_insns = 0;
6893 /* See if this is a branch that is part of the path. If so, and it is
6894 to be taken, do so. */
6895 if (next_branch->branch == insn)
6897 enum taken status = next_branch++->status;
6898 if (status != PATH_NOT_TAKEN)
6900 if (status == PATH_TAKEN)
6901 record_jump_equiv (insn, 1);
6902 else
6903 invalidate_skipped_block (NEXT_INSN (insn));
6905 /* Set the last insn as the jump insn; it doesn't affect cc0.
6906 Then follow this branch. */
6907 #ifdef HAVE_cc0
6908 prev_insn_cc0 = 0;
6909 prev_insn = insn;
6910 #endif
6911 insn = JUMP_LABEL (insn);
6912 continue;
6916 if (GET_MODE (insn) == QImode)
6917 PUT_MODE (insn, VOIDmode);
6919 if (GET_RTX_CLASS (code) == RTX_INSN)
6921 rtx p;
6923 /* Process notes first so we have all notes in canonical forms when
6924 looking for duplicate operations. */
6926 if (REG_NOTES (insn))
6927 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6929 /* Track when we are inside in LIBCALL block. Inside such a block,
6930 we do not want to record destinations. The last insn of a
6931 LIBCALL block is not considered to be part of the block, since
6932 its destination is the result of the block and hence should be
6933 recorded. */
6935 if (REG_NOTES (insn) != 0)
6937 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6938 libcall_insn = XEXP (p, 0);
6939 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6941 /* Keep libcall_insn for the last SET insn of a no-conflict
6942 block to prevent changing the destination. */
6943 if (! no_conflict)
6944 libcall_insn = 0;
6945 else
6946 no_conflict = -1;
6948 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
6949 no_conflict = 1;
6952 cse_insn (insn, libcall_insn);
6954 if (no_conflict == -1)
6956 libcall_insn = 0;
6957 no_conflict = 0;
6960 /* If we haven't already found an insn where we added a LABEL_REF,
6961 check this one. */
6962 if (NONJUMP_INSN_P (insn) && ! recorded_label_ref
6963 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6964 (void *) insn))
6965 recorded_label_ref = 1;
6968 /* If INSN is now an unconditional jump, skip to the end of our
6969 basic block by pretending that we just did the last insn in the
6970 basic block. If we are jumping to the end of our block, show
6971 that we can have one usage of TO. */
6973 if (any_uncondjump_p (insn))
6975 if (to == 0)
6977 free (qty_table);
6978 return 0;
6981 if (JUMP_LABEL (insn) == to)
6982 to_usage = 1;
6984 /* Maybe TO was deleted because the jump is unconditional.
6985 If so, there is nothing left in this basic block. */
6986 /* ??? Perhaps it would be smarter to set TO
6987 to whatever follows this insn,
6988 and pretend the basic block had always ended here. */
6989 if (INSN_DELETED_P (to))
6990 break;
6992 insn = PREV_INSN (to);
6995 /* See if it is ok to keep on going past the label
6996 which used to end our basic block. Remember that we incremented
6997 the count of that label, so we decrement it here. If we made
6998 a jump unconditional, TO_USAGE will be one; in that case, we don't
6999 want to count the use in that jump. */
7001 if (to != 0 && NEXT_INSN (insn) == to
7002 && LABEL_P (to) && --LABEL_NUSES (to) == to_usage)
7004 struct cse_basic_block_data val;
7005 rtx prev;
7007 insn = NEXT_INSN (to);
7009 /* If TO was the last insn in the function, we are done. */
7010 if (insn == 0)
7012 free (qty_table);
7013 return 0;
7016 /* If TO was preceded by a BARRIER we are done with this block
7017 because it has no continuation. */
7018 prev = prev_nonnote_insn (to);
7019 if (prev && BARRIER_P (prev))
7021 free (qty_table);
7022 return insn;
7025 /* Find the end of the following block. Note that we won't be
7026 following branches in this case. */
7027 to_usage = 0;
7028 val.path_size = 0;
7029 val.path = xmalloc (sizeof (struct branch_path)
7030 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7031 cse_end_of_basic_block (insn, &val, 0, 0);
7032 free (val.path);
7034 /* If the tables we allocated have enough space left
7035 to handle all the SETs in the next basic block,
7036 continue through it. Otherwise, return,
7037 and that block will be scanned individually. */
7038 if (val.nsets * 2 + next_qty > max_qty)
7039 break;
7041 cse_basic_block_start = val.low_cuid;
7042 cse_basic_block_end = val.high_cuid;
7043 to = val.last;
7045 /* Prevent TO from being deleted if it is a label. */
7046 if (to != 0 && LABEL_P (to))
7047 ++LABEL_NUSES (to);
7049 /* Back up so we process the first insn in the extension. */
7050 insn = PREV_INSN (insn);
7054 gcc_assert (next_qty <= max_qty);
7056 free (qty_table);
7058 return to ? NEXT_INSN (to) : 0;
7061 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7062 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7064 static int
7065 check_for_label_ref (rtx *rtl, void *data)
7067 rtx insn = (rtx) data;
7069 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7070 we must rerun jump since it needs to place the note. If this is a
7071 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7072 since no REG_LABEL will be added. */
7073 return (GET_CODE (*rtl) == LABEL_REF
7074 && ! LABEL_REF_NONLOCAL_P (*rtl)
7075 && LABEL_P (XEXP (*rtl, 0))
7076 && INSN_UID (XEXP (*rtl, 0)) != 0
7077 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7080 /* Count the number of times registers are used (not set) in X.
7081 COUNTS is an array in which we accumulate the count, INCR is how much
7082 we count each register usage. */
7084 static void
7085 count_reg_usage (rtx x, int *counts, int incr)
7087 enum rtx_code code;
7088 rtx note;
7089 const char *fmt;
7090 int i, j;
7092 if (x == 0)
7093 return;
7095 switch (code = GET_CODE (x))
7097 case REG:
7098 counts[REGNO (x)] += incr;
7099 return;
7101 case PC:
7102 case CC0:
7103 case CONST:
7104 case CONST_INT:
7105 case CONST_DOUBLE:
7106 case CONST_VECTOR:
7107 case SYMBOL_REF:
7108 case LABEL_REF:
7109 return;
7111 case CLOBBER:
7112 /* If we are clobbering a MEM, mark any registers inside the address
7113 as being used. */
7114 if (MEM_P (XEXP (x, 0)))
7115 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7116 return;
7118 case SET:
7119 /* Unless we are setting a REG, count everything in SET_DEST. */
7120 if (!REG_P (SET_DEST (x)))
7121 count_reg_usage (SET_DEST (x), counts, incr);
7122 count_reg_usage (SET_SRC (x), counts, incr);
7123 return;
7125 case CALL_INSN:
7126 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7127 /* Fall through. */
7129 case INSN:
7130 case JUMP_INSN:
7131 count_reg_usage (PATTERN (x), counts, incr);
7133 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7134 use them. */
7136 note = find_reg_equal_equiv_note (x);
7137 if (note)
7139 rtx eqv = XEXP (note, 0);
7141 if (GET_CODE (eqv) == EXPR_LIST)
7142 /* This REG_EQUAL note describes the result of a function call.
7143 Process all the arguments. */
7146 count_reg_usage (XEXP (eqv, 0), counts, incr);
7147 eqv = XEXP (eqv, 1);
7149 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7150 else
7151 count_reg_usage (eqv, counts, incr);
7153 return;
7155 case EXPR_LIST:
7156 if (REG_NOTE_KIND (x) == REG_EQUAL
7157 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7158 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7159 involving registers in the address. */
7160 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7161 count_reg_usage (XEXP (x, 0), counts, incr);
7163 count_reg_usage (XEXP (x, 1), counts, incr);
7164 return;
7166 case ASM_OPERANDS:
7167 /* Iterate over just the inputs, not the constraints as well. */
7168 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7169 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7170 return;
7172 case INSN_LIST:
7173 gcc_unreachable ();
7175 default:
7176 break;
7179 fmt = GET_RTX_FORMAT (code);
7180 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7182 if (fmt[i] == 'e')
7183 count_reg_usage (XEXP (x, i), counts, incr);
7184 else if (fmt[i] == 'E')
7185 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7186 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7190 /* Return true if set is live. */
7191 static bool
7192 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7193 int *counts)
7195 #ifdef HAVE_cc0
7196 rtx tem;
7197 #endif
7199 if (set_noop_p (set))
7202 #ifdef HAVE_cc0
7203 else if (GET_CODE (SET_DEST (set)) == CC0
7204 && !side_effects_p (SET_SRC (set))
7205 && ((tem = next_nonnote_insn (insn)) == 0
7206 || !INSN_P (tem)
7207 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7208 return false;
7209 #endif
7210 else if (!REG_P (SET_DEST (set))
7211 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7212 || counts[REGNO (SET_DEST (set))] != 0
7213 || side_effects_p (SET_SRC (set)))
7214 return true;
7215 return false;
7218 /* Return true if insn is live. */
7220 static bool
7221 insn_live_p (rtx insn, int *counts)
7223 int i;
7224 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7225 return true;
7226 else if (GET_CODE (PATTERN (insn)) == SET)
7227 return set_live_p (PATTERN (insn), insn, counts);
7228 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7230 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7232 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7234 if (GET_CODE (elt) == SET)
7236 if (set_live_p (elt, insn, counts))
7237 return true;
7239 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7240 return true;
7242 return false;
7244 else
7245 return true;
7248 /* Return true if libcall is dead as a whole. */
7250 static bool
7251 dead_libcall_p (rtx insn, int *counts)
7253 rtx note, set, new;
7255 /* See if there's a REG_EQUAL note on this insn and try to
7256 replace the source with the REG_EQUAL expression.
7258 We assume that insns with REG_RETVALs can only be reg->reg
7259 copies at this point. */
7260 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7261 if (!note)
7262 return false;
7264 set = single_set (insn);
7265 if (!set)
7266 return false;
7268 new = simplify_rtx (XEXP (note, 0));
7269 if (!new)
7270 new = XEXP (note, 0);
7272 /* While changing insn, we must update the counts accordingly. */
7273 count_reg_usage (insn, counts, -1);
7275 if (validate_change (insn, &SET_SRC (set), new, 0))
7277 count_reg_usage (insn, counts, 1);
7278 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7279 remove_note (insn, note);
7280 return true;
7283 if (CONSTANT_P (new))
7285 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7286 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7288 count_reg_usage (insn, counts, 1);
7289 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7290 remove_note (insn, note);
7291 return true;
7295 count_reg_usage (insn, counts, 1);
7296 return false;
7299 /* Scan all the insns and delete any that are dead; i.e., they store a register
7300 that is never used or they copy a register to itself.
7302 This is used to remove insns made obviously dead by cse, loop or other
7303 optimizations. It improves the heuristics in loop since it won't try to
7304 move dead invariants out of loops or make givs for dead quantities. The
7305 remaining passes of the compilation are also sped up. */
7308 delete_trivially_dead_insns (rtx insns, int nreg)
7310 int *counts;
7311 rtx insn, prev;
7312 int in_libcall = 0, dead_libcall = 0;
7313 int ndead = 0;
7315 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7316 /* First count the number of times each register is used. */
7317 counts = xcalloc (nreg, sizeof (int));
7318 for (insn = insns; insn; insn = NEXT_INSN (insn))
7319 if (INSN_P (insn))
7320 count_reg_usage (insn, counts, 1);
7322 /* Go from the last insn to the first and delete insns that only set unused
7323 registers or copy a register to itself. As we delete an insn, remove
7324 usage counts for registers it uses.
7326 The first jump optimization pass may leave a real insn as the last
7327 insn in the function. We must not skip that insn or we may end
7328 up deleting code that is not really dead. */
7329 for (insn = get_last_insn (); insn; insn = prev)
7331 int live_insn = 0;
7333 prev = PREV_INSN (insn);
7334 if (!INSN_P (insn))
7335 continue;
7337 /* Don't delete any insns that are part of a libcall block unless
7338 we can delete the whole libcall block.
7340 Flow or loop might get confused if we did that. Remember
7341 that we are scanning backwards. */
7342 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7344 in_libcall = 1;
7345 live_insn = 1;
7346 dead_libcall = dead_libcall_p (insn, counts);
7348 else if (in_libcall)
7349 live_insn = ! dead_libcall;
7350 else
7351 live_insn = insn_live_p (insn, counts);
7353 /* If this is a dead insn, delete it and show registers in it aren't
7354 being used. */
7356 if (! live_insn)
7358 count_reg_usage (insn, counts, -1);
7359 delete_insn_and_edges (insn);
7360 ndead++;
7363 if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7365 in_libcall = 0;
7366 dead_libcall = 0;
7370 if (dump_file && ndead)
7371 fprintf (dump_file, "Deleted %i trivially dead insns\n",
7372 ndead);
7373 /* Clean up. */
7374 free (counts);
7375 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7376 return ndead;
7379 /* This function is called via for_each_rtx. The argument, NEWREG, is
7380 a condition code register with the desired mode. If we are looking
7381 at the same register in a different mode, replace it with
7382 NEWREG. */
7384 static int
7385 cse_change_cc_mode (rtx *loc, void *data)
7387 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
7389 if (*loc
7390 && REG_P (*loc)
7391 && REGNO (*loc) == REGNO (args->newreg)
7392 && GET_MODE (*loc) != GET_MODE (args->newreg))
7394 validate_change (args->insn, loc, args->newreg, 1);
7396 return -1;
7398 return 0;
7401 /* Change the mode of any reference to the register REGNO (NEWREG) to
7402 GET_MODE (NEWREG) in INSN. */
7404 static void
7405 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7407 struct change_cc_mode_args args;
7408 int success;
7410 if (!INSN_P (insn))
7411 return;
7413 args.insn = insn;
7414 args.newreg = newreg;
7416 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7417 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, &args);
7419 /* If the following assertion was triggered, there is most probably
7420 something wrong with the cc_modes_compatible back end function.
7421 CC modes only can be considered compatible if the insn - with the mode
7422 replaced by any of the compatible modes - can still be recognized. */
7423 success = apply_change_group ();
7424 gcc_assert (success);
7427 /* Change the mode of any reference to the register REGNO (NEWREG) to
7428 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7429 any instruction which modifies NEWREG. */
7431 static void
7432 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7434 rtx insn;
7436 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7438 if (! INSN_P (insn))
7439 continue;
7441 if (reg_set_p (newreg, insn))
7442 return;
7444 cse_change_cc_mode_insn (insn, newreg);
7448 /* BB is a basic block which finishes with CC_REG as a condition code
7449 register which is set to CC_SRC. Look through the successors of BB
7450 to find blocks which have a single predecessor (i.e., this one),
7451 and look through those blocks for an assignment to CC_REG which is
7452 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7453 permitted to change the mode of CC_SRC to a compatible mode. This
7454 returns VOIDmode if no equivalent assignments were found.
7455 Otherwise it returns the mode which CC_SRC should wind up with.
7457 The main complexity in this function is handling the mode issues.
7458 We may have more than one duplicate which we can eliminate, and we
7459 try to find a mode which will work for multiple duplicates. */
7461 static enum machine_mode
7462 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7464 bool found_equiv;
7465 enum machine_mode mode;
7466 unsigned int insn_count;
7467 edge e;
7468 rtx insns[2];
7469 enum machine_mode modes[2];
7470 rtx last_insns[2];
7471 unsigned int i;
7472 rtx newreg;
7473 edge_iterator ei;
7475 /* We expect to have two successors. Look at both before picking
7476 the final mode for the comparison. If we have more successors
7477 (i.e., some sort of table jump, although that seems unlikely),
7478 then we require all beyond the first two to use the same
7479 mode. */
7481 found_equiv = false;
7482 mode = GET_MODE (cc_src);
7483 insn_count = 0;
7484 FOR_EACH_EDGE (e, ei, bb->succs)
7486 rtx insn;
7487 rtx end;
7489 if (e->flags & EDGE_COMPLEX)
7490 continue;
7492 if (EDGE_COUNT (e->dest->preds) != 1
7493 || e->dest == EXIT_BLOCK_PTR)
7494 continue;
7496 end = NEXT_INSN (BB_END (e->dest));
7497 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7499 rtx set;
7501 if (! INSN_P (insn))
7502 continue;
7504 /* If CC_SRC is modified, we have to stop looking for
7505 something which uses it. */
7506 if (modified_in_p (cc_src, insn))
7507 break;
7509 /* Check whether INSN sets CC_REG to CC_SRC. */
7510 set = single_set (insn);
7511 if (set
7512 && REG_P (SET_DEST (set))
7513 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7515 bool found;
7516 enum machine_mode set_mode;
7517 enum machine_mode comp_mode;
7519 found = false;
7520 set_mode = GET_MODE (SET_SRC (set));
7521 comp_mode = set_mode;
7522 if (rtx_equal_p (cc_src, SET_SRC (set)))
7523 found = true;
7524 else if (GET_CODE (cc_src) == COMPARE
7525 && GET_CODE (SET_SRC (set)) == COMPARE
7526 && mode != set_mode
7527 && rtx_equal_p (XEXP (cc_src, 0),
7528 XEXP (SET_SRC (set), 0))
7529 && rtx_equal_p (XEXP (cc_src, 1),
7530 XEXP (SET_SRC (set), 1)))
7533 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7534 if (comp_mode != VOIDmode
7535 && (can_change_mode || comp_mode == mode))
7536 found = true;
7539 if (found)
7541 found_equiv = true;
7542 if (insn_count < ARRAY_SIZE (insns))
7544 insns[insn_count] = insn;
7545 modes[insn_count] = set_mode;
7546 last_insns[insn_count] = end;
7547 ++insn_count;
7549 if (mode != comp_mode)
7551 gcc_assert (can_change_mode);
7552 mode = comp_mode;
7554 /* The modified insn will be re-recognized later. */
7555 PUT_MODE (cc_src, mode);
7558 else
7560 if (set_mode != mode)
7562 /* We found a matching expression in the
7563 wrong mode, but we don't have room to
7564 store it in the array. Punt. This case
7565 should be rare. */
7566 break;
7568 /* INSN sets CC_REG to a value equal to CC_SRC
7569 with the right mode. We can simply delete
7570 it. */
7571 delete_insn (insn);
7574 /* We found an instruction to delete. Keep looking,
7575 in the hopes of finding a three-way jump. */
7576 continue;
7579 /* We found an instruction which sets the condition
7580 code, so don't look any farther. */
7581 break;
7584 /* If INSN sets CC_REG in some other way, don't look any
7585 farther. */
7586 if (reg_set_p (cc_reg, insn))
7587 break;
7590 /* If we fell off the bottom of the block, we can keep looking
7591 through successors. We pass CAN_CHANGE_MODE as false because
7592 we aren't prepared to handle compatibility between the
7593 further blocks and this block. */
7594 if (insn == end)
7596 enum machine_mode submode;
7598 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7599 if (submode != VOIDmode)
7601 gcc_assert (submode == mode);
7602 found_equiv = true;
7603 can_change_mode = false;
7608 if (! found_equiv)
7609 return VOIDmode;
7611 /* Now INSN_COUNT is the number of instructions we found which set
7612 CC_REG to a value equivalent to CC_SRC. The instructions are in
7613 INSNS. The modes used by those instructions are in MODES. */
7615 newreg = NULL_RTX;
7616 for (i = 0; i < insn_count; ++i)
7618 if (modes[i] != mode)
7620 /* We need to change the mode of CC_REG in INSNS[i] and
7621 subsequent instructions. */
7622 if (! newreg)
7624 if (GET_MODE (cc_reg) == mode)
7625 newreg = cc_reg;
7626 else
7627 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7629 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7630 newreg);
7633 delete_insn (insns[i]);
7636 return mode;
7639 /* If we have a fixed condition code register (or two), walk through
7640 the instructions and try to eliminate duplicate assignments. */
7642 void
7643 cse_condition_code_reg (void)
7645 unsigned int cc_regno_1;
7646 unsigned int cc_regno_2;
7647 rtx cc_reg_1;
7648 rtx cc_reg_2;
7649 basic_block bb;
7651 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7652 return;
7654 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7655 if (cc_regno_2 != INVALID_REGNUM)
7656 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7657 else
7658 cc_reg_2 = NULL_RTX;
7660 FOR_EACH_BB (bb)
7662 rtx last_insn;
7663 rtx cc_reg;
7664 rtx insn;
7665 rtx cc_src_insn;
7666 rtx cc_src;
7667 enum machine_mode mode;
7668 enum machine_mode orig_mode;
7670 /* Look for blocks which end with a conditional jump based on a
7671 condition code register. Then look for the instruction which
7672 sets the condition code register. Then look through the
7673 successor blocks for instructions which set the condition
7674 code register to the same value. There are other possible
7675 uses of the condition code register, but these are by far the
7676 most common and the ones which we are most likely to be able
7677 to optimize. */
7679 last_insn = BB_END (bb);
7680 if (!JUMP_P (last_insn))
7681 continue;
7683 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7684 cc_reg = cc_reg_1;
7685 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7686 cc_reg = cc_reg_2;
7687 else
7688 continue;
7690 cc_src_insn = NULL_RTX;
7691 cc_src = NULL_RTX;
7692 for (insn = PREV_INSN (last_insn);
7693 insn && insn != PREV_INSN (BB_HEAD (bb));
7694 insn = PREV_INSN (insn))
7696 rtx set;
7698 if (! INSN_P (insn))
7699 continue;
7700 set = single_set (insn);
7701 if (set
7702 && REG_P (SET_DEST (set))
7703 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7705 cc_src_insn = insn;
7706 cc_src = SET_SRC (set);
7707 break;
7709 else if (reg_set_p (cc_reg, insn))
7710 break;
7713 if (! cc_src_insn)
7714 continue;
7716 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7717 continue;
7719 /* Now CC_REG is a condition code register used for a
7720 conditional jump at the end of the block, and CC_SRC, in
7721 CC_SRC_INSN, is the value to which that condition code
7722 register is set, and CC_SRC is still meaningful at the end of
7723 the basic block. */
7725 orig_mode = GET_MODE (cc_src);
7726 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7727 if (mode != VOIDmode)
7729 gcc_assert (mode == GET_MODE (cc_src));
7730 if (mode != orig_mode)
7732 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7734 cse_change_cc_mode_insn (cc_src_insn, newreg);
7736 /* Do the same in the following insns that use the
7737 current value of CC_REG within BB. */
7738 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7739 NEXT_INSN (last_insn),
7740 newreg);
7747 /* Perform common subexpression elimination. Nonzero value from
7748 `cse_main' means that jumps were simplified and some code may now
7749 be unreachable, so do jump optimization again. */
7750 static bool
7751 gate_handle_cse (void)
7753 return optimize > 0;
7756 static void
7757 rest_of_handle_cse (void)
7759 int tem;
7761 if (dump_file)
7762 dump_flow_info (dump_file);
7764 reg_scan (get_insns (), max_reg_num ());
7766 tem = cse_main (get_insns (), max_reg_num (), dump_file);
7767 if (tem)
7768 rebuild_jump_labels (get_insns ());
7769 if (purge_all_dead_edges ())
7770 delete_unreachable_blocks ();
7772 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7774 /* If we are not running more CSE passes, then we are no longer
7775 expecting CSE to be run. But always rerun it in a cheap mode. */
7776 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7778 if (tem)
7779 delete_dead_jumptables ();
7781 if (tem || optimize > 1)
7782 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
7785 struct tree_opt_pass pass_cse =
7787 "cse1", /* name */
7788 gate_handle_cse, /* gate */
7789 rest_of_handle_cse, /* execute */
7790 NULL, /* sub */
7791 NULL, /* next */
7792 0, /* static_pass_number */
7793 TV_CSE, /* tv_id */
7794 0, /* properties_required */
7795 0, /* properties_provided */
7796 0, /* properties_destroyed */
7797 0, /* todo_flags_start */
7798 TODO_dump_func |
7799 TODO_ggc_collect, /* todo_flags_finish */
7800 's' /* letter */
7804 static bool
7805 gate_handle_cse2 (void)
7807 return optimize > 0 && flag_rerun_cse_after_loop;
7810 /* Run second CSE pass after loop optimizations. */
7811 static void
7812 rest_of_handle_cse2 (void)
7814 int tem;
7816 if (dump_file)
7817 dump_flow_info (dump_file);
7819 tem = cse_main (get_insns (), max_reg_num (), dump_file);
7821 /* Run a pass to eliminate duplicated assignments to condition code
7822 registers. We have to run this after bypass_jumps, because it
7823 makes it harder for that pass to determine whether a jump can be
7824 bypassed safely. */
7825 cse_condition_code_reg ();
7827 purge_all_dead_edges ();
7828 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7830 if (tem)
7832 timevar_push (TV_JUMP);
7833 rebuild_jump_labels (get_insns ());
7834 delete_dead_jumptables ();
7835 cleanup_cfg (CLEANUP_EXPENSIVE);
7836 timevar_pop (TV_JUMP);
7838 reg_scan (get_insns (), max_reg_num ());
7839 cse_not_expected = 1;
7843 struct tree_opt_pass pass_cse2 =
7845 "cse2", /* name */
7846 gate_handle_cse2, /* gate */
7847 rest_of_handle_cse2, /* execute */
7848 NULL, /* sub */
7849 NULL, /* next */
7850 0, /* static_pass_number */
7851 TV_CSE2, /* tv_id */
7852 0, /* properties_required */
7853 0, /* properties_provided */
7854 0, /* properties_destroyed */
7855 0, /* todo_flags_start */
7856 TODO_dump_func |
7857 TODO_ggc_collect, /* todo_flags_finish */
7858 't' /* letter */