1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
29 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "insn-config.h"
49 #include "expr.h" /* init_return_column_size */
50 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
51 #include "output.h" /* asm_out_file */
52 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
55 /* ??? Poison these here until it can be done generically. They've been
56 totally replaced in this file; make sure it stays that way. */
57 #undef DWARF2_UNWIND_INFO
58 #undef DWARF2_FRAME_INFO
59 #if (GCC_VERSION >= 3000)
60 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
63 #ifndef INCOMING_RETURN_ADDR_RTX
64 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
67 /* Maximum size (in bytes) of an artificially generated label. */
68 #define MAX_ARTIFICIAL_LABEL_BYTES 30
70 /* A collected description of an entire row of the abstract CFI table. */
71 struct GTY(()) dw_cfi_row
73 /* The expression that computes the CFA, expressed in two different ways.
74 The CFA member for the simple cases, and the full CFI expression for
75 the complex cases. The later will be a DW_CFA_cfa_expression. */
79 /* The expressions for any register column that is saved. */
83 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
84 struct GTY(()) reg_saved_in_data
{
90 /* Since we no longer have a proper CFG, we're going to create a facsimile
91 of one on the fly while processing the frame-related insns.
93 We create dw_trace_info structures for each extended basic block beginning
94 and ending at a "save point". Save points are labels, barriers, certain
95 notes, and of course the beginning and end of the function.
97 As we encounter control transfer insns, we propagate the "current"
98 row state across the edges to the starts of traces. When checking is
99 enabled, we validate that we propagate the same data from all sources.
101 All traces are members of the TRACE_INFO array, in the order in which
102 they appear in the instruction stream.
104 All save points are present in the TRACE_INDEX hash, mapping the insn
105 starting a trace to the dw_trace_info describing the trace. */
109 /* The insn that begins the trace. */
112 /* The row state at the beginning and end of the trace. */
113 dw_cfi_row
*beg_row
, *end_row
;
115 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
116 while scanning insns. However, the args_size value is irrelevant at
117 any point except can_throw_internal_p insns. Therefore the "delay"
118 sizes the values that must actually be emitted for this trace. */
119 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
120 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
122 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
125 /* The following variables contain data used in interpreting frame related
126 expressions. These are not part of the "real" row state as defined by
127 Dwarf, but it seems like they need to be propagated into a trace in case
128 frame related expressions have been sunk. */
129 /* ??? This seems fragile. These variables are fragments of a larger
130 expression. If we do not keep the entire expression together, we risk
131 not being able to put it together properly. Consider forcing targets
132 to generate self-contained expressions and dropping all of the magic
133 interpretation code in this file. Or at least refusing to shrink wrap
134 any frame related insn that doesn't contain a complete expression. */
136 /* The register used for saving registers to the stack, and its offset
138 dw_cfa_location cfa_store
;
140 /* A temporary register holding an integral value used in adjusting SP
141 or setting up the store_reg. The "offset" field holds the integer
142 value, not an offset. */
143 dw_cfa_location cfa_temp
;
145 /* A set of registers saved in other registers. This is the inverse of
146 the row->reg_save info, if the entry is a DW_CFA_register. This is
147 implemented as a flat array because it normally contains zero or 1
148 entry, depending on the target. IA-64 is the big spender here, using
149 a maximum of 5 entries. */
150 vec
<reg_saved_in_data
> regs_saved_in_regs
;
152 /* An identifier for this trace. Used only for debugging dumps. */
155 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
156 bool switch_sections
;
158 /* True if we've seen different values incoming to beg_true_args_size. */
159 bool args_size_undefined
;
163 /* Hashtable helpers. */
165 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
167 static inline hashval_t
hash (const dw_trace_info
*);
168 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
172 trace_info_hasher::hash (const dw_trace_info
*ti
)
174 return INSN_UID (ti
->head
);
178 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
180 return a
->head
== b
->head
;
184 /* The variables making up the pseudo-cfg, as described above. */
185 static vec
<dw_trace_info
> trace_info
;
186 static vec
<dw_trace_info
*> trace_work_list
;
187 static hash_table
<trace_info_hasher
> *trace_index
;
189 /* A vector of call frame insns for the CIE. */
192 /* The state of the first row of the FDE table, which includes the
193 state provided by the CIE. */
194 static GTY(()) dw_cfi_row
*cie_cfi_row
;
196 static GTY(()) reg_saved_in_data
*cie_return_save
;
198 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
200 /* The insn after which a new CFI note should be emitted. */
201 static rtx_insn
*add_cfi_insn
;
203 /* When non-null, add_cfi will add the CFI to this vector. */
204 static cfi_vec
*add_cfi_vec
;
206 /* The current instruction trace. */
207 static dw_trace_info
*cur_trace
;
209 /* The current, i.e. most recently generated, row of the CFI table. */
210 static dw_cfi_row
*cur_row
;
212 /* A copy of the current CFA, for use during the processing of a
214 static dw_cfa_location
*cur_cfa
;
216 /* We delay emitting a register save until either (a) we reach the end
217 of the prologue or (b) the register is clobbered. This clusters
218 register saves so that there are fewer pc advances. */
220 struct queued_reg_save
{
223 HOST_WIDE_INT cfa_offset
;
227 static vec
<queued_reg_save
> queued_reg_saves
;
229 /* True if any CFI directives were emitted at the current insn. */
230 static bool any_cfis_emitted
;
232 /* Short-hand for commonly used register numbers. */
233 static unsigned dw_stack_pointer_regnum
;
234 static unsigned dw_frame_pointer_regnum
;
236 /* Hook used by __throw. */
239 expand_builtin_dwarf_sp_column (void)
241 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
242 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
245 /* MEM is a memory reference for the register size table, each element of
246 which has mode MODE. Initialize column C as a return address column. */
249 init_return_column_size (machine_mode mode
, rtx mem
, unsigned int c
)
251 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
252 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
253 emit_move_insn (adjust_address (mem
, mode
, offset
),
254 gen_int_mode (size
, mode
));
257 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
258 init_one_dwarf_reg_size to communicate on what has been done by the
261 struct init_one_dwarf_reg_state
263 /* Whether the dwarf return column was initialized. */
264 bool wrote_return_column
;
266 /* For each hard register REGNO, whether init_one_dwarf_reg_size
267 was given REGNO to process already. */
268 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
272 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
273 initialize the dwarf register size table entry corresponding to register
274 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
275 use for the size entry to initialize, and INIT_STATE is the communication
276 datastructure conveying what we're doing to our caller. */
279 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
280 rtx table
, machine_mode slotmode
,
281 init_one_dwarf_reg_state
*init_state
)
283 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
284 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
285 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
287 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
288 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
290 init_state
->processed_regno
[regno
] = true;
292 if (rnum
>= DWARF_FRAME_REGISTERS
)
295 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
297 if (regmode
== VOIDmode
)
299 init_state
->wrote_return_column
= true;
305 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
306 gen_int_mode (regsize
, slotmode
));
309 /* Generate code to initialize the dwarf register size table located
310 at the provided ADDRESS. */
313 expand_builtin_init_dwarf_reg_sizes (tree address
)
316 machine_mode mode
= TYPE_MODE (char_type_node
);
317 rtx addr
= expand_normal (address
);
318 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
320 init_one_dwarf_reg_state init_state
;
322 memset ((char *)&init_state
, 0, sizeof (init_state
));
324 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
326 machine_mode save_mode
;
329 /* No point in processing a register multiple times. This could happen
330 with register spans, e.g. when a reg is first processed as a piece of
331 a span, then as a register on its own later on. */
333 if (init_state
.processed_regno
[i
])
336 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
337 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
340 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
343 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
345 rtx reg
= XVECEXP (span
, 0, si
);
347 init_one_dwarf_reg_size
348 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
353 if (!init_state
.wrote_return_column
)
354 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
356 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
357 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
360 targetm
.init_dwarf_reg_sizes_extra (address
);
364 static dw_trace_info
*
365 get_trace_info (rtx_insn
*insn
)
369 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
373 save_point_p (rtx_insn
*insn
)
375 /* Labels, except those that are really jump tables. */
377 return inside_basic_block_p (insn
);
379 /* We split traces at the prologue/epilogue notes because those
380 are points at which the unwind info is usually stable. This
381 makes it easier to find spots with identical unwind info so
382 that we can use remember/restore_state opcodes. */
384 switch (NOTE_KIND (insn
))
386 case NOTE_INSN_PROLOGUE_END
:
387 case NOTE_INSN_EPILOGUE_BEG
:
394 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
396 static inline HOST_WIDE_INT
397 div_data_align (HOST_WIDE_INT off
)
399 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
400 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
404 /* Return true if we need a signed version of a given opcode
405 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
408 need_data_align_sf_opcode (HOST_WIDE_INT off
)
410 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
413 /* Return a pointer to a newly allocated Call Frame Instruction. */
415 static inline dw_cfi_ref
418 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
420 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
421 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
426 /* Return a newly allocated CFI row, with no defined data. */
431 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
433 row
->cfa
.reg
= INVALID_REGNUM
;
438 /* Return a copy of an existing CFI row. */
441 copy_cfi_row (dw_cfi_row
*src
)
443 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
446 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
451 /* Generate a new label for the CFI info to refer to. */
454 dwarf2out_cfi_label (void)
456 int num
= dwarf2out_cfi_label_num
++;
459 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
461 return xstrdup (label
);
464 /* Add CFI either to the current insn stream or to a vector, or both. */
467 add_cfi (dw_cfi_ref cfi
)
469 any_cfis_emitted
= true;
471 if (add_cfi_insn
!= NULL
)
473 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
474 NOTE_CFI (add_cfi_insn
) = cfi
;
477 if (add_cfi_vec
!= NULL
)
478 vec_safe_push (*add_cfi_vec
, cfi
);
482 add_cfi_args_size (HOST_WIDE_INT size
)
484 dw_cfi_ref cfi
= new_cfi ();
486 /* While we can occasionally have args_size < 0 internally, this state
487 should not persist at a point we actually need an opcode. */
488 gcc_assert (size
>= 0);
490 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
491 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
497 add_cfi_restore (unsigned reg
)
499 dw_cfi_ref cfi
= new_cfi ();
501 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
502 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
507 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
508 that the register column is no longer saved. */
511 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
513 if (vec_safe_length (row
->reg_save
) <= column
)
514 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
515 (*row
->reg_save
)[column
] = cfi
;
518 /* This function fills in aa dw_cfa_location structure from a dwarf location
519 descriptor sequence. */
522 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
524 struct dw_loc_descr_node
*ptr
;
526 cfa
->base_offset
= 0;
530 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
532 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
568 cfa
->reg
= op
- DW_OP_reg0
;
571 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
605 cfa
->reg
= op
- DW_OP_breg0
;
606 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
609 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
610 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
615 case DW_OP_plus_uconst
:
616 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
624 /* Find the previous value for the CFA, iteratively. CFI is the opcode
625 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
626 one level of remember/restore state processing. */
629 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
631 switch (cfi
->dw_cfi_opc
)
633 case DW_CFA_def_cfa_offset
:
634 case DW_CFA_def_cfa_offset_sf
:
635 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
637 case DW_CFA_def_cfa_register
:
638 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
641 case DW_CFA_def_cfa_sf
:
642 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
643 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
645 case DW_CFA_def_cfa_expression
:
646 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
649 case DW_CFA_remember_state
:
650 gcc_assert (!remember
->in_use
);
652 remember
->in_use
= 1;
654 case DW_CFA_restore_state
:
655 gcc_assert (remember
->in_use
);
657 remember
->in_use
= 0;
665 /* Determine if two dw_cfa_location structures define the same data. */
668 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
670 return (loc1
->reg
== loc2
->reg
671 && loc1
->offset
== loc2
->offset
672 && loc1
->indirect
== loc2
->indirect
673 && (loc1
->indirect
== 0
674 || loc1
->base_offset
== loc2
->base_offset
));
677 /* Determine if two CFI operands are identical. */
680 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
684 case dw_cfi_oprnd_unused
:
686 case dw_cfi_oprnd_reg_num
:
687 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
688 case dw_cfi_oprnd_offset
:
689 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
690 case dw_cfi_oprnd_addr
:
691 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
692 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
693 case dw_cfi_oprnd_loc
:
694 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
699 /* Determine if two CFI entries are identical. */
702 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
704 enum dwarf_call_frame_info opc
;
706 /* Make things easier for our callers, including missing operands. */
709 if (a
== NULL
|| b
== NULL
)
712 /* Obviously, the opcodes must match. */
714 if (opc
!= b
->dw_cfi_opc
)
717 /* Compare the two operands, re-using the type of the operands as
718 already exposed elsewhere. */
719 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
720 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
721 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
722 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
725 /* Determine if two CFI_ROW structures are identical. */
728 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
730 size_t i
, n_a
, n_b
, n_max
;
734 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
737 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
740 n_a
= vec_safe_length (a
->reg_save
);
741 n_b
= vec_safe_length (b
->reg_save
);
742 n_max
= MAX (n_a
, n_b
);
744 for (i
= 0; i
< n_max
; ++i
)
746 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
749 r_a
= (*a
->reg_save
)[i
];
751 r_b
= (*b
->reg_save
)[i
];
753 if (!cfi_equal_p (r_a
, r_b
))
760 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
761 what opcode to emit. Returns the CFI opcode to effect the change, or
762 NULL if NEW_CFA == OLD_CFA. */
765 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
769 /* If nothing changed, no need to issue any call frame instructions. */
770 if (cfa_equal_p (old_cfa
, new_cfa
))
775 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
777 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
778 the CFA register did not change but the offset did. The data
779 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
780 in the assembler via the .cfi_def_cfa_offset directive. */
781 if (new_cfa
->offset
< 0)
782 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
784 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
785 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
787 else if (new_cfa
->offset
== old_cfa
->offset
788 && old_cfa
->reg
!= INVALID_REGNUM
789 && !new_cfa
->indirect
790 && !old_cfa
->indirect
)
792 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
793 indicating the CFA register has changed to <register> but the
794 offset has not changed. */
795 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
796 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
798 else if (new_cfa
->indirect
== 0)
800 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
801 indicating the CFA register has changed to <register> with
802 the specified offset. The data factoring for DW_CFA_def_cfa_sf
803 happens in output_cfi, or in the assembler via the .cfi_def_cfa
805 if (new_cfa
->offset
< 0)
806 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
808 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
809 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
810 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
814 /* Construct a DW_CFA_def_cfa_expression instruction to
815 calculate the CFA using a full location expression since no
816 register-offset pair is available. */
817 struct dw_loc_descr_node
*loc_list
;
819 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
820 loc_list
= build_cfa_loc (new_cfa
, 0);
821 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
827 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
830 def_cfa_1 (dw_cfa_location
*new_cfa
)
834 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
835 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
837 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
840 cur_row
->cfa
= *new_cfa
;
841 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
848 /* Add the CFI for saving a register. REG is the CFA column number.
849 If SREG is -1, the register is saved at OFFSET from the CFA;
850 otherwise it is saved in SREG. */
853 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
855 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
856 dw_cfi_ref cfi
= new_cfi ();
858 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
860 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
862 && fde
->stack_realign
863 && sreg
== INVALID_REGNUM
)
865 cfi
->dw_cfi_opc
= DW_CFA_expression
;
866 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
867 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
868 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
869 fde
->stack_realignment
);
871 else if (sreg
== INVALID_REGNUM
)
873 if (need_data_align_sf_opcode (offset
))
874 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
875 else if (reg
& ~0x3f)
876 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
878 cfi
->dw_cfi_opc
= DW_CFA_offset
;
879 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
881 else if (sreg
== reg
)
883 /* While we could emit something like DW_CFA_same_value or
884 DW_CFA_restore, we never expect to see something like that
885 in a prologue. This is more likely to be a bug. A backend
886 can always bypass this by using REG_CFA_RESTORE directly. */
891 cfi
->dw_cfi_opc
= DW_CFA_register
;
892 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
896 update_row_reg_save (cur_row
, reg
, cfi
);
899 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
900 and adjust data structures to match. */
903 notice_args_size (rtx_insn
*insn
)
905 HOST_WIDE_INT args_size
, delta
;
908 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
912 args_size
= INTVAL (XEXP (note
, 0));
913 delta
= args_size
- cur_trace
->end_true_args_size
;
917 cur_trace
->end_true_args_size
= args_size
;
919 /* If the CFA is computed off the stack pointer, then we must adjust
920 the computation of the CFA as well. */
921 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
923 gcc_assert (!cur_cfa
->indirect
);
925 /* Convert a change in args_size (always a positive in the
926 direction of stack growth) to a change in stack pointer. */
927 if (!STACK_GROWS_DOWNWARD
)
930 cur_cfa
->offset
+= delta
;
934 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
935 data within the trace related to EH insns and args_size. */
938 notice_eh_throw (rtx_insn
*insn
)
940 HOST_WIDE_INT args_size
;
942 args_size
= cur_trace
->end_true_args_size
;
943 if (cur_trace
->eh_head
== NULL
)
945 cur_trace
->eh_head
= insn
;
946 cur_trace
->beg_delay_args_size
= args_size
;
947 cur_trace
->end_delay_args_size
= args_size
;
949 else if (cur_trace
->end_delay_args_size
!= args_size
)
951 cur_trace
->end_delay_args_size
= args_size
;
953 /* ??? If the CFA is the stack pointer, search backward for the last
954 CFI note and insert there. Given that the stack changed for the
955 args_size change, there *must* be such a note in between here and
957 add_cfi_args_size (args_size
);
961 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
962 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
963 used in places where rtl is prohibited. */
965 static inline unsigned
966 dwf_regno (const_rtx reg
)
968 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
969 return DWARF_FRAME_REGNUM (REGNO (reg
));
972 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
975 compare_reg_or_pc (rtx x
, rtx y
)
977 if (REG_P (x
) && REG_P (y
))
978 return REGNO (x
) == REGNO (y
);
982 /* Record SRC as being saved in DEST. DEST may be null to delete an
983 existing entry. SRC may be a register or PC_RTX. */
986 record_reg_saved_in_reg (rtx dest
, rtx src
)
988 reg_saved_in_data
*elt
;
991 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
992 if (compare_reg_or_pc (elt
->orig_reg
, src
))
995 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
997 elt
->saved_in_reg
= dest
;
1004 reg_saved_in_data e
= {src
, dest
};
1005 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1008 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1009 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1012 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1015 queued_reg_save e
= {reg
, sreg
, offset
};
1018 /* Duplicates waste space, but it's also necessary to remove them
1019 for correctness, since the queue gets output in reverse order. */
1020 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1021 if (compare_reg_or_pc (q
->reg
, reg
))
1027 queued_reg_saves
.safe_push (e
);
1030 /* Output all the entries in QUEUED_REG_SAVES. */
1033 dwarf2out_flush_queued_reg_saves (void)
1038 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1040 unsigned int reg
, sreg
;
1042 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1044 if (q
->reg
== pc_rtx
)
1045 reg
= DWARF_FRAME_RETURN_COLUMN
;
1047 reg
= dwf_regno (q
->reg
);
1049 sreg
= dwf_regno (q
->saved_reg
);
1051 sreg
= INVALID_REGNUM
;
1052 reg_save (reg
, sreg
, q
->cfa_offset
);
1055 queued_reg_saves
.truncate (0);
1058 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1059 location for? Or, does it clobber a register which we've previously
1060 said that some other register is saved in, and for which we now
1061 have a new location for? */
1064 clobbers_queued_reg_save (const_rtx insn
)
1069 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1072 reg_saved_in_data
*rir
;
1074 if (modified_in_p (q
->reg
, insn
))
1077 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1078 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1079 && modified_in_p (rir
->saved_in_reg
, insn
))
1086 /* What register, if any, is currently saved in REG? */
1089 reg_saved_in (rtx reg
)
1091 unsigned int regn
= REGNO (reg
);
1093 reg_saved_in_data
*rir
;
1096 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1097 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1100 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1101 if (regn
== REGNO (rir
->saved_in_reg
))
1102 return rir
->orig_reg
;
1107 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1110 dwarf2out_frame_debug_def_cfa (rtx pat
)
1112 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1114 if (GET_CODE (pat
) == PLUS
)
1116 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1117 pat
= XEXP (pat
, 0);
1121 cur_cfa
->indirect
= 1;
1122 pat
= XEXP (pat
, 0);
1123 if (GET_CODE (pat
) == PLUS
)
1125 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1126 pat
= XEXP (pat
, 0);
1129 /* ??? If this fails, we could be calling into the _loc functions to
1130 define a full expression. So far no port does that. */
1131 gcc_assert (REG_P (pat
));
1132 cur_cfa
->reg
= dwf_regno (pat
);
1135 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1138 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1142 gcc_assert (GET_CODE (pat
) == SET
);
1143 dest
= XEXP (pat
, 0);
1144 src
= XEXP (pat
, 1);
1146 switch (GET_CODE (src
))
1149 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1150 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1160 cur_cfa
->reg
= dwf_regno (dest
);
1161 gcc_assert (cur_cfa
->indirect
== 0);
1164 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1167 dwarf2out_frame_debug_cfa_offset (rtx set
)
1169 HOST_WIDE_INT offset
;
1170 rtx src
, addr
, span
;
1171 unsigned int sregno
;
1173 src
= XEXP (set
, 1);
1174 addr
= XEXP (set
, 0);
1175 gcc_assert (MEM_P (addr
));
1176 addr
= XEXP (addr
, 0);
1178 /* As documented, only consider extremely simple addresses. */
1179 switch (GET_CODE (addr
))
1182 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1183 offset
= -cur_cfa
->offset
;
1186 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1187 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1196 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1200 span
= targetm
.dwarf_register_span (src
);
1201 sregno
= dwf_regno (src
);
1204 /* ??? We'd like to use queue_reg_save, but we need to come up with
1205 a different flushing heuristic for epilogues. */
1207 reg_save (sregno
, INVALID_REGNUM
, offset
);
1210 /* We have a PARALLEL describing where the contents of SRC live.
1211 Adjust the offset for each piece of the PARALLEL. */
1212 HOST_WIDE_INT span_offset
= offset
;
1214 gcc_assert (GET_CODE (span
) == PARALLEL
);
1216 const int par_len
= XVECLEN (span
, 0);
1217 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1219 rtx elem
= XVECEXP (span
, 0, par_index
);
1220 sregno
= dwf_regno (src
);
1221 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1222 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1227 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1230 dwarf2out_frame_debug_cfa_register (rtx set
)
1233 unsigned sregno
, dregno
;
1235 src
= XEXP (set
, 1);
1236 dest
= XEXP (set
, 0);
1238 record_reg_saved_in_reg (dest
, src
);
1240 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1242 sregno
= dwf_regno (src
);
1244 dregno
= dwf_regno (dest
);
1246 /* ??? We'd like to use queue_reg_save, but we need to come up with
1247 a different flushing heuristic for epilogues. */
1248 reg_save (sregno
, dregno
, 0);
1251 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1254 dwarf2out_frame_debug_cfa_expression (rtx set
)
1256 rtx src
, dest
, span
;
1257 dw_cfi_ref cfi
= new_cfi ();
1260 dest
= SET_DEST (set
);
1261 src
= SET_SRC (set
);
1263 gcc_assert (REG_P (src
));
1264 gcc_assert (MEM_P (dest
));
1266 span
= targetm
.dwarf_register_span (src
);
1269 regno
= dwf_regno (src
);
1271 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1272 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1273 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1274 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1275 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1277 /* ??? We'd like to use queue_reg_save, were the interface different,
1278 and, as above, we could manage flushing for epilogues. */
1280 update_row_reg_save (cur_row
, regno
, cfi
);
1283 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1286 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1288 gcc_assert (REG_P (reg
));
1290 rtx span
= targetm
.dwarf_register_span (reg
);
1293 unsigned int regno
= dwf_regno (reg
);
1294 add_cfi_restore (regno
);
1295 update_row_reg_save (cur_row
, regno
, NULL
);
1299 /* We have a PARALLEL describing where the contents of REG live.
1300 Restore the register for each piece of the PARALLEL. */
1301 gcc_assert (GET_CODE (span
) == PARALLEL
);
1303 const int par_len
= XVECLEN (span
, 0);
1304 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1306 reg
= XVECEXP (span
, 0, par_index
);
1307 gcc_assert (REG_P (reg
));
1308 unsigned int regno
= dwf_regno (reg
);
1309 add_cfi_restore (regno
);
1310 update_row_reg_save (cur_row
, regno
, NULL
);
1315 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1316 ??? Perhaps we should note in the CIE where windows are saved (instead of
1317 assuming 0(cfa)) and what registers are in the window. */
1320 dwarf2out_frame_debug_cfa_window_save (void)
1322 dw_cfi_ref cfi
= new_cfi ();
1324 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1328 /* Record call frame debugging information for an expression EXPR,
1329 which either sets SP or FP (adjusting how we calculate the frame
1330 address) or saves a register to the stack or another register.
1331 LABEL indicates the address of EXPR.
1333 This function encodes a state machine mapping rtxes to actions on
1334 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1335 users need not read the source code.
1337 The High-Level Picture
1339 Changes in the register we use to calculate the CFA: Currently we
1340 assume that if you copy the CFA register into another register, we
1341 should take the other one as the new CFA register; this seems to
1342 work pretty well. If it's wrong for some target, it's simple
1343 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1345 Changes in the register we use for saving registers to the stack:
1346 This is usually SP, but not always. Again, we deduce that if you
1347 copy SP into another register (and SP is not the CFA register),
1348 then the new register is the one we will be using for register
1349 saves. This also seems to work.
1351 Register saves: There's not much guesswork about this one; if
1352 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1353 register save, and the register used to calculate the destination
1354 had better be the one we think we're using for this purpose.
1355 It's also assumed that a copy from a call-saved register to another
1356 register is saving that register if RTX_FRAME_RELATED_P is set on
1357 that instruction. If the copy is from a call-saved register to
1358 the *same* register, that means that the register is now the same
1359 value as in the caller.
1361 Except: If the register being saved is the CFA register, and the
1362 offset is nonzero, we are saving the CFA, so we assume we have to
1363 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1364 the intent is to save the value of SP from the previous frame.
1366 In addition, if a register has previously been saved to a different
1369 Invariants / Summaries of Rules
1371 cfa current rule for calculating the CFA. It usually
1372 consists of a register and an offset. This is
1373 actually stored in *cur_cfa, but abbreviated
1374 for the purposes of this documentation.
1375 cfa_store register used by prologue code to save things to the stack
1376 cfa_store.offset is the offset from the value of
1377 cfa_store.reg to the actual CFA
1378 cfa_temp register holding an integral value. cfa_temp.offset
1379 stores the value, which will be used to adjust the
1380 stack pointer. cfa_temp is also used like cfa_store,
1381 to track stores to the stack via fp or a temp reg.
1383 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1384 with cfa.reg as the first operand changes the cfa.reg and its
1385 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1388 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1389 expression yielding a constant. This sets cfa_temp.reg
1390 and cfa_temp.offset.
1392 Rule 5: Create a new register cfa_store used to save items to the
1395 Rules 10-14: Save a register to the stack. Define offset as the
1396 difference of the original location and cfa_store's
1397 location (or cfa_temp's location if cfa_temp is used).
1399 Rules 16-20: If AND operation happens on sp in prologue, we assume
1400 stack is realigned. We will use a group of DW_OP_XXX
1401 expressions to represent the location of the stored
1402 register instead of CFA+offset.
1406 "{a,b}" indicates a choice of a xor b.
1407 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1410 (set <reg1> <reg2>:cfa.reg)
1411 effects: cfa.reg = <reg1>
1412 cfa.offset unchanged
1413 cfa_temp.reg = <reg1>
1414 cfa_temp.offset = cfa.offset
1417 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1418 {<const_int>,<reg>:cfa_temp.reg}))
1419 effects: cfa.reg = sp if fp used
1420 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1421 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1422 if cfa_store.reg==sp
1425 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1426 effects: cfa.reg = fp
1427 cfa_offset += +/- <const_int>
1430 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1431 constraints: <reg1> != fp
1433 effects: cfa.reg = <reg1>
1434 cfa_temp.reg = <reg1>
1435 cfa_temp.offset = cfa.offset
1438 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1439 constraints: <reg1> != fp
1441 effects: cfa_store.reg = <reg1>
1442 cfa_store.offset = cfa.offset - cfa_temp.offset
1445 (set <reg> <const_int>)
1446 effects: cfa_temp.reg = <reg>
1447 cfa_temp.offset = <const_int>
1450 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1451 effects: cfa_temp.reg = <reg1>
1452 cfa_temp.offset |= <const_int>
1455 (set <reg> (high <exp>))
1459 (set <reg> (lo_sum <exp> <const_int>))
1460 effects: cfa_temp.reg = <reg>
1461 cfa_temp.offset = <const_int>
1464 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1465 effects: cfa_store.offset -= <const_int>
1466 cfa.offset = cfa_store.offset if cfa.reg == sp
1468 cfa.base_offset = -cfa_store.offset
1471 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1472 effects: cfa_store.offset += -/+ mode_size(mem)
1473 cfa.offset = cfa_store.offset if cfa.reg == sp
1475 cfa.base_offset = -cfa_store.offset
1478 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1481 effects: cfa.reg = <reg1>
1482 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1485 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1486 effects: cfa.reg = <reg1>
1487 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1490 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1491 effects: cfa.reg = <reg1>
1492 cfa.base_offset = -cfa_temp.offset
1493 cfa_temp.offset -= mode_size(mem)
1496 (set <reg> {unspec, unspec_volatile})
1497 effects: target-dependent
1500 (set sp (and: sp <const_int>))
1501 constraints: cfa_store.reg == sp
1502 effects: cfun->fde.stack_realign = 1
1503 cfa_store.offset = 0
1504 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1507 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1508 effects: cfa_store.offset += -/+ mode_size(mem)
1511 (set (mem ({pre_inc, pre_dec} sp)) fp)
1512 constraints: fde->stack_realign == 1
1513 effects: cfa_store.offset = 0
1514 cfa.reg != HARD_FRAME_POINTER_REGNUM
1517 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1518 constraints: fde->stack_realign == 1
1520 && cfa.indirect == 0
1521 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1522 effects: Use DW_CFA_def_cfa_expression to define cfa
1523 cfa.reg == fde->drap_reg */
1526 dwarf2out_frame_debug_expr (rtx expr
)
1528 rtx src
, dest
, span
;
1529 HOST_WIDE_INT offset
;
1532 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1533 the PARALLEL independently. The first element is always processed if
1534 it is a SET. This is for backward compatibility. Other elements
1535 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1536 flag is set in them. */
1537 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1540 int limit
= XVECLEN (expr
, 0);
1543 /* PARALLELs have strict read-modify-write semantics, so we
1544 ought to evaluate every rvalue before changing any lvalue.
1545 It's cumbersome to do that in general, but there's an
1546 easy approximation that is enough for all current users:
1547 handle register saves before register assignments. */
1548 if (GET_CODE (expr
) == PARALLEL
)
1549 for (par_index
= 0; par_index
< limit
; par_index
++)
1551 elem
= XVECEXP (expr
, 0, par_index
);
1552 if (GET_CODE (elem
) == SET
1553 && MEM_P (SET_DEST (elem
))
1554 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1555 dwarf2out_frame_debug_expr (elem
);
1558 for (par_index
= 0; par_index
< limit
; par_index
++)
1560 elem
= XVECEXP (expr
, 0, par_index
);
1561 if (GET_CODE (elem
) == SET
1562 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1563 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1564 dwarf2out_frame_debug_expr (elem
);
1569 gcc_assert (GET_CODE (expr
) == SET
);
1571 src
= SET_SRC (expr
);
1572 dest
= SET_DEST (expr
);
1576 rtx rsi
= reg_saved_in (src
);
1583 switch (GET_CODE (dest
))
1586 switch (GET_CODE (src
))
1588 /* Setting FP from SP. */
1590 if (cur_cfa
->reg
== dwf_regno (src
))
1593 /* Update the CFA rule wrt SP or FP. Make sure src is
1594 relative to the current CFA register.
1596 We used to require that dest be either SP or FP, but the
1597 ARM copies SP to a temporary register, and from there to
1598 FP. So we just rely on the backends to only set
1599 RTX_FRAME_RELATED_P on appropriate insns. */
1600 cur_cfa
->reg
= dwf_regno (dest
);
1601 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1602 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1606 /* Saving a register in a register. */
1607 gcc_assert (!fixed_regs
[REGNO (dest
)]
1608 /* For the SPARC and its register window. */
1609 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1611 /* After stack is aligned, we can only save SP in FP
1612 if drap register is used. In this case, we have
1613 to restore stack pointer with the CFA value and we
1614 don't generate this DWARF information. */
1616 && fde
->stack_realign
1617 && REGNO (src
) == STACK_POINTER_REGNUM
)
1618 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1619 && fde
->drap_reg
!= INVALID_REGNUM
1620 && cur_cfa
->reg
!= dwf_regno (src
));
1622 queue_reg_save (src
, dest
, 0);
1629 if (dest
== stack_pointer_rtx
)
1633 switch (GET_CODE (XEXP (src
, 1)))
1636 offset
= INTVAL (XEXP (src
, 1));
1639 gcc_assert (dwf_regno (XEXP (src
, 1))
1640 == cur_trace
->cfa_temp
.reg
);
1641 offset
= cur_trace
->cfa_temp
.offset
;
1647 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1649 /* Restoring SP from FP in the epilogue. */
1650 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1651 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1653 else if (GET_CODE (src
) == LO_SUM
)
1654 /* Assume we've set the source reg of the LO_SUM from sp. */
1657 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1659 if (GET_CODE (src
) != MINUS
)
1661 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1662 cur_cfa
->offset
+= offset
;
1663 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1664 cur_trace
->cfa_store
.offset
+= offset
;
1666 else if (dest
== hard_frame_pointer_rtx
)
1669 /* Either setting the FP from an offset of the SP,
1670 or adjusting the FP */
1671 gcc_assert (frame_pointer_needed
);
1673 gcc_assert (REG_P (XEXP (src
, 0))
1674 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1675 && CONST_INT_P (XEXP (src
, 1)));
1676 offset
= INTVAL (XEXP (src
, 1));
1677 if (GET_CODE (src
) != MINUS
)
1679 cur_cfa
->offset
+= offset
;
1680 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1684 gcc_assert (GET_CODE (src
) != MINUS
);
1687 if (REG_P (XEXP (src
, 0))
1688 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1689 && CONST_INT_P (XEXP (src
, 1)))
1691 /* Setting a temporary CFA register that will be copied
1692 into the FP later on. */
1693 offset
= - INTVAL (XEXP (src
, 1));
1694 cur_cfa
->offset
+= offset
;
1695 cur_cfa
->reg
= dwf_regno (dest
);
1696 /* Or used to save regs to the stack. */
1697 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1698 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1702 else if (REG_P (XEXP (src
, 0))
1703 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1704 && XEXP (src
, 1) == stack_pointer_rtx
)
1706 /* Setting a scratch register that we will use instead
1707 of SP for saving registers to the stack. */
1708 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1709 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1710 cur_trace
->cfa_store
.offset
1711 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1715 else if (GET_CODE (src
) == LO_SUM
1716 && CONST_INT_P (XEXP (src
, 1)))
1718 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1719 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1728 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1729 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1734 gcc_assert (REG_P (XEXP (src
, 0))
1735 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1736 && CONST_INT_P (XEXP (src
, 1)));
1738 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1739 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1742 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1743 which will fill in all of the bits. */
1750 case UNSPEC_VOLATILE
:
1751 /* All unspecs should be represented by REG_CFA_* notes. */
1757 /* If this AND operation happens on stack pointer in prologue,
1758 we assume the stack is realigned and we extract the
1760 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1762 /* We interpret reg_save differently with stack_realign set.
1763 Thus we must flush whatever we have queued first. */
1764 dwarf2out_flush_queued_reg_saves ();
1766 gcc_assert (cur_trace
->cfa_store
.reg
1767 == dwf_regno (XEXP (src
, 0)));
1768 fde
->stack_realign
= 1;
1769 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1770 cur_trace
->cfa_store
.offset
= 0;
1772 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1773 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1774 fde
->drap_reg
= cur_cfa
->reg
;
1785 /* Saving a register to the stack. Make sure dest is relative to the
1787 switch (GET_CODE (XEXP (dest
, 0)))
1793 /* We can't handle variable size modifications. */
1794 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1796 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1798 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1799 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1801 cur_trace
->cfa_store
.offset
+= offset
;
1802 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1803 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1805 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1806 offset
-= cur_trace
->cfa_store
.offset
;
1808 offset
= -cur_trace
->cfa_store
.offset
;
1815 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1816 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1819 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1820 == STACK_POINTER_REGNUM
)
1821 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1823 cur_trace
->cfa_store
.offset
+= offset
;
1825 /* Rule 18: If stack is aligned, we will use FP as a
1826 reference to represent the address of the stored
1829 && fde
->stack_realign
1831 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1833 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1834 cur_trace
->cfa_store
.offset
= 0;
1837 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1838 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1840 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1841 offset
+= -cur_trace
->cfa_store
.offset
;
1843 offset
= -cur_trace
->cfa_store
.offset
;
1847 /* With an offset. */
1854 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1855 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1856 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1857 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1860 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1862 if (cur_cfa
->reg
== regno
)
1863 offset
-= cur_cfa
->offset
;
1864 else if (cur_trace
->cfa_store
.reg
== regno
)
1865 offset
-= cur_trace
->cfa_store
.offset
;
1868 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1869 offset
-= cur_trace
->cfa_temp
.offset
;
1875 /* Without an offset. */
1878 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1880 if (cur_cfa
->reg
== regno
)
1881 offset
= -cur_cfa
->offset
;
1882 else if (cur_trace
->cfa_store
.reg
== regno
)
1883 offset
= -cur_trace
->cfa_store
.offset
;
1886 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1887 offset
= -cur_trace
->cfa_temp
.offset
;
1894 gcc_assert (cur_trace
->cfa_temp
.reg
1895 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1896 offset
= -cur_trace
->cfa_temp
.offset
;
1897 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1905 /* If the source operand of this MEM operation is a memory,
1906 we only care how much stack grew. */
1911 && REGNO (src
) != STACK_POINTER_REGNUM
1912 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1913 && dwf_regno (src
) == cur_cfa
->reg
)
1915 /* We're storing the current CFA reg into the stack. */
1917 if (cur_cfa
->offset
== 0)
1920 /* If stack is aligned, putting CFA reg into stack means
1921 we can no longer use reg + offset to represent CFA.
1922 Here we use DW_CFA_def_cfa_expression instead. The
1923 result of this expression equals to the original CFA
1926 && fde
->stack_realign
1927 && cur_cfa
->indirect
== 0
1928 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1930 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1932 cur_cfa
->indirect
= 1;
1933 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1934 cur_cfa
->base_offset
= offset
;
1935 cur_cfa
->offset
= 0;
1937 fde
->drap_reg_saved
= 1;
1941 /* If the source register is exactly the CFA, assume
1942 we're saving SP like any other register; this happens
1944 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1949 /* Otherwise, we'll need to look in the stack to
1950 calculate the CFA. */
1951 rtx x
= XEXP (dest
, 0);
1955 gcc_assert (REG_P (x
));
1957 cur_cfa
->reg
= dwf_regno (x
);
1958 cur_cfa
->base_offset
= offset
;
1959 cur_cfa
->indirect
= 1;
1965 span
= targetm
.dwarf_register_span (src
);
1970 queue_reg_save (src
, NULL_RTX
, offset
);
1973 /* We have a PARALLEL describing where the contents of SRC live.
1974 Queue register saves for each piece of the PARALLEL. */
1975 HOST_WIDE_INT span_offset
= offset
;
1977 gcc_assert (GET_CODE (span
) == PARALLEL
);
1979 const int par_len
= XVECLEN (span
, 0);
1980 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1982 rtx elem
= XVECEXP (span
, 0, par_index
);
1983 queue_reg_save (elem
, NULL_RTX
, span_offset
);
1984 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1994 /* Record call frame debugging information for INSN, which either sets
1995 SP or FP (adjusting how we calculate the frame address) or saves a
1996 register to the stack. */
1999 dwarf2out_frame_debug (rtx_insn
*insn
)
2002 bool handled_one
= false;
2004 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2005 switch (REG_NOTE_KIND (note
))
2007 case REG_FRAME_RELATED_EXPR
:
2008 pat
= XEXP (note
, 0);
2011 case REG_CFA_DEF_CFA
:
2012 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2016 case REG_CFA_ADJUST_CFA
:
2021 if (GET_CODE (n
) == PARALLEL
)
2022 n
= XVECEXP (n
, 0, 0);
2024 dwarf2out_frame_debug_adjust_cfa (n
);
2028 case REG_CFA_OFFSET
:
2031 n
= single_set (insn
);
2032 dwarf2out_frame_debug_cfa_offset (n
);
2036 case REG_CFA_REGISTER
:
2041 if (GET_CODE (n
) == PARALLEL
)
2042 n
= XVECEXP (n
, 0, 0);
2044 dwarf2out_frame_debug_cfa_register (n
);
2048 case REG_CFA_EXPRESSION
:
2051 n
= single_set (insn
);
2052 dwarf2out_frame_debug_cfa_expression (n
);
2056 case REG_CFA_RESTORE
:
2061 if (GET_CODE (n
) == PARALLEL
)
2062 n
= XVECEXP (n
, 0, 0);
2065 dwarf2out_frame_debug_cfa_restore (n
);
2069 case REG_CFA_SET_VDRAP
:
2073 dw_fde_ref fde
= cfun
->fde
;
2076 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2078 fde
->vdrap_reg
= dwf_regno (n
);
2084 case REG_CFA_WINDOW_SAVE
:
2085 dwarf2out_frame_debug_cfa_window_save ();
2089 case REG_CFA_FLUSH_QUEUE
:
2090 /* The actual flush happens elsewhere. */
2100 pat
= PATTERN (insn
);
2102 dwarf2out_frame_debug_expr (pat
);
2104 /* Check again. A parallel can save and update the same register.
2105 We could probably check just once, here, but this is safer than
2106 removing the check at the start of the function. */
2107 if (clobbers_queued_reg_save (pat
))
2108 dwarf2out_flush_queued_reg_saves ();
2112 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2115 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2117 size_t i
, n_old
, n_new
, n_max
;
2120 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2121 add_cfi (new_row
->cfa_cfi
);
2124 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2129 n_old
= vec_safe_length (old_row
->reg_save
);
2130 n_new
= vec_safe_length (new_row
->reg_save
);
2131 n_max
= MAX (n_old
, n_new
);
2133 for (i
= 0; i
< n_max
; ++i
)
2135 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2138 r_old
= (*old_row
->reg_save
)[i
];
2140 r_new
= (*new_row
->reg_save
)[i
];
2144 else if (r_new
== NULL
)
2145 add_cfi_restore (i
);
2146 else if (!cfi_equal_p (r_old
, r_new
))
2151 /* Examine CFI and return true if a cfi label and set_loc is needed
2152 beforehand. Even when generating CFI assembler instructions, we
2153 still have to add the cfi to the list so that lookup_cfa_1 works
2154 later on. When -g2 and above we even need to force emitting of
2155 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2156 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2157 and so don't use convert_cfa_to_fb_loc_list. */
2160 cfi_label_required_p (dw_cfi_ref cfi
)
2162 if (!dwarf2out_do_cfi_asm ())
2165 if (dwarf_version
== 2
2166 && debug_info_level
> DINFO_LEVEL_TERSE
2167 && (write_symbols
== DWARF2_DEBUG
2168 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2170 switch (cfi
->dw_cfi_opc
)
2172 case DW_CFA_def_cfa_offset
:
2173 case DW_CFA_def_cfa_offset_sf
:
2174 case DW_CFA_def_cfa_register
:
2175 case DW_CFA_def_cfa
:
2176 case DW_CFA_def_cfa_sf
:
2177 case DW_CFA_def_cfa_expression
:
2178 case DW_CFA_restore_state
:
2187 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2188 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2191 add_cfis_to_fde (void)
2193 dw_fde_ref fde
= cfun
->fde
;
2194 rtx_insn
*insn
, *next
;
2195 /* We always start with a function_begin label. */
2198 for (insn
= get_insns (); insn
; insn
= next
)
2200 next
= NEXT_INSN (insn
);
2202 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2204 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2205 /* Don't attempt to advance_loc4 between labels
2206 in different sections. */
2210 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2212 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2214 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2216 required
|= cfi_label_required_p (NOTE_CFI (next
));
2217 next
= NEXT_INSN (next
);
2219 else if (active_insn_p (next
)
2220 || (NOTE_P (next
) && (NOTE_KIND (next
)
2221 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2224 next
= NEXT_INSN (next
);
2227 int num
= dwarf2out_cfi_label_num
;
2228 const char *label
= dwarf2out_cfi_label ();
2231 /* Set the location counter to the new label. */
2233 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2234 : DW_CFA_advance_loc4
);
2235 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2236 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2238 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2239 NOTE_LABEL_NUMBER (tmp
) = num
;
2244 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2245 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2246 insn
= NEXT_INSN (insn
);
2248 while (insn
!= next
);
2254 /* If LABEL is the start of a trace, then initialize the state of that
2255 trace from CUR_TRACE and CUR_ROW. */
2258 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2261 HOST_WIDE_INT args_size
;
2263 ti
= get_trace_info (start
);
2264 gcc_assert (ti
!= NULL
);
2268 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2269 cur_trace
->id
, ti
->id
,
2270 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2271 (origin
? INSN_UID (origin
) : 0));
2274 args_size
= cur_trace
->end_true_args_size
;
2275 if (ti
->beg_row
== NULL
)
2277 /* This is the first time we've encountered this trace. Propagate
2278 state across the edge and push the trace onto the work list. */
2279 ti
->beg_row
= copy_cfi_row (cur_row
);
2280 ti
->beg_true_args_size
= args_size
;
2282 ti
->cfa_store
= cur_trace
->cfa_store
;
2283 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2284 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2286 trace_work_list
.safe_push (ti
);
2289 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2294 /* We ought to have the same state incoming to a given trace no
2295 matter how we arrive at the trace. Anything else means we've
2296 got some kind of optimization error. */
2297 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2299 /* The args_size is allowed to conflict if it isn't actually used. */
2300 if (ti
->beg_true_args_size
!= args_size
)
2301 ti
->args_size_undefined
= true;
2305 /* Similarly, but handle the args_size and CFA reset across EH
2306 and non-local goto edges. */
2309 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2311 HOST_WIDE_INT save_args_size
, delta
;
2312 dw_cfa_location save_cfa
;
2314 save_args_size
= cur_trace
->end_true_args_size
;
2315 if (save_args_size
== 0)
2317 maybe_record_trace_start (start
, origin
);
2321 delta
= -save_args_size
;
2322 cur_trace
->end_true_args_size
= 0;
2324 save_cfa
= cur_row
->cfa
;
2325 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2327 /* Convert a change in args_size (always a positive in the
2328 direction of stack growth) to a change in stack pointer. */
2329 if (!STACK_GROWS_DOWNWARD
)
2332 cur_row
->cfa
.offset
+= delta
;
2335 maybe_record_trace_start (start
, origin
);
2337 cur_trace
->end_true_args_size
= save_args_size
;
2338 cur_row
->cfa
= save_cfa
;
2341 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2342 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2345 create_trace_edges (rtx_insn
*insn
)
2352 rtx_jump_table_data
*table
;
2354 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2357 if (tablejump_p (insn
, NULL
, &table
))
2359 rtvec vec
= table
->get_labels ();
2361 n
= GET_NUM_ELEM (vec
);
2362 for (i
= 0; i
< n
; ++i
)
2364 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2365 maybe_record_trace_start (lab
, insn
);
2368 else if (computed_jump_p (insn
))
2370 for (rtx_insn_list
*lab
= forced_labels
; lab
; lab
= lab
->next ())
2371 maybe_record_trace_start (lab
->insn (), insn
);
2373 else if (returnjump_p (insn
))
2375 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2377 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2378 for (i
= 0; i
< n
; ++i
)
2381 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2382 maybe_record_trace_start (lab
, insn
);
2387 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2388 gcc_assert (lab
!= NULL
);
2389 maybe_record_trace_start (lab
, insn
);
2392 else if (CALL_P (insn
))
2394 /* Sibling calls don't have edges inside this function. */
2395 if (SIBLING_CALL_P (insn
))
2398 /* Process non-local goto edges. */
2399 if (can_nonlocal_goto (insn
))
2400 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2403 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2405 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2407 int i
, n
= seq
->len ();
2408 for (i
= 0; i
< n
; ++i
)
2409 create_trace_edges (seq
->insn (i
));
2413 /* Process EH edges. */
2414 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2416 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2418 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2422 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2425 scan_insn_after (rtx_insn
*insn
)
2427 if (RTX_FRAME_RELATED_P (insn
))
2428 dwarf2out_frame_debug (insn
);
2429 notice_args_size (insn
);
2432 /* Scan the trace beginning at INSN and create the CFI notes for the
2433 instructions therein. */
2436 scan_trace (dw_trace_info
*trace
)
2438 rtx_insn
*prev
, *insn
= trace
->head
;
2439 dw_cfa_location this_cfa
;
2442 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2443 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2446 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2447 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2450 cur_row
= trace
->end_row
;
2452 this_cfa
= cur_row
->cfa
;
2453 cur_cfa
= &this_cfa
;
2455 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2457 prev
= insn
, insn
= NEXT_INSN (insn
))
2461 /* Do everything that happens "before" the insn. */
2462 add_cfi_insn
= prev
;
2464 /* Notice the end of a trace. */
2465 if (BARRIER_P (insn
))
2467 /* Don't bother saving the unneeded queued registers at all. */
2468 queued_reg_saves
.truncate (0);
2471 if (save_point_p (insn
))
2473 /* Propagate across fallthru edges. */
2474 dwarf2out_flush_queued_reg_saves ();
2475 maybe_record_trace_start (insn
, NULL
);
2479 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2482 /* Handle all changes to the row state. Sequences require special
2483 handling for the positioning of the notes. */
2484 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2487 int i
, n
= pat
->len ();
2489 control
= pat
->insn (0);
2490 if (can_throw_internal (control
))
2491 notice_eh_throw (control
);
2492 dwarf2out_flush_queued_reg_saves ();
2494 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2496 /* ??? Hopefully multiple delay slots are not annulled. */
2497 gcc_assert (n
== 2);
2498 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2499 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2501 elt
= pat
->insn (1);
2503 if (INSN_FROM_TARGET_P (elt
))
2505 HOST_WIDE_INT restore_args_size
;
2506 cfi_vec save_row_reg_save
;
2508 /* If ELT is an instruction from target of an annulled
2509 branch, the effects are for the target only and so
2510 the args_size and CFA along the current path
2511 shouldn't change. */
2512 add_cfi_insn
= NULL
;
2513 restore_args_size
= cur_trace
->end_true_args_size
;
2514 cur_cfa
= &cur_row
->cfa
;
2515 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2517 scan_insn_after (elt
);
2519 /* ??? Should we instead save the entire row state? */
2520 gcc_assert (!queued_reg_saves
.length ());
2522 create_trace_edges (control
);
2524 cur_trace
->end_true_args_size
= restore_args_size
;
2525 cur_row
->cfa
= this_cfa
;
2526 cur_row
->reg_save
= save_row_reg_save
;
2527 cur_cfa
= &this_cfa
;
2531 /* If ELT is a annulled branch-taken instruction (i.e.
2532 executed only when branch is not taken), the args_size
2533 and CFA should not change through the jump. */
2534 create_trace_edges (control
);
2536 /* Update and continue with the trace. */
2537 add_cfi_insn
= insn
;
2538 scan_insn_after (elt
);
2539 def_cfa_1 (&this_cfa
);
2544 /* The insns in the delay slot should all be considered to happen
2545 "before" a call insn. Consider a call with a stack pointer
2546 adjustment in the delay slot. The backtrace from the callee
2547 should include the sp adjustment. Unfortunately, that leaves
2548 us with an unavoidable unwinding error exactly at the call insn
2549 itself. For jump insns we'd prefer to avoid this error by
2550 placing the notes after the sequence. */
2551 if (JUMP_P (control
))
2552 add_cfi_insn
= insn
;
2554 for (i
= 1; i
< n
; ++i
)
2556 elt
= pat
->insn (i
);
2557 scan_insn_after (elt
);
2560 /* Make sure any register saves are visible at the jump target. */
2561 dwarf2out_flush_queued_reg_saves ();
2562 any_cfis_emitted
= false;
2564 /* However, if there is some adjustment on the call itself, e.g.
2565 a call_pop, that action should be considered to happen after
2566 the call returns. */
2567 add_cfi_insn
= insn
;
2568 scan_insn_after (control
);
2572 /* Flush data before calls and jumps, and of course if necessary. */
2573 if (can_throw_internal (insn
))
2575 notice_eh_throw (insn
);
2576 dwarf2out_flush_queued_reg_saves ();
2578 else if (!NONJUMP_INSN_P (insn
)
2579 || clobbers_queued_reg_save (insn
)
2580 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2581 dwarf2out_flush_queued_reg_saves ();
2582 any_cfis_emitted
= false;
2584 add_cfi_insn
= insn
;
2585 scan_insn_after (insn
);
2589 /* Between frame-related-p and args_size we might have otherwise
2590 emitted two cfa adjustments. Do it now. */
2591 def_cfa_1 (&this_cfa
);
2593 /* Minimize the number of advances by emitting the entire queue
2594 once anything is emitted. */
2595 if (any_cfis_emitted
2596 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2597 dwarf2out_flush_queued_reg_saves ();
2599 /* Note that a test for control_flow_insn_p does exactly the
2600 same tests as are done to actually create the edges. So
2601 always call the routine and let it not create edges for
2602 non-control-flow insns. */
2603 create_trace_edges (control
);
2606 add_cfi_insn
= NULL
;
2612 /* Scan the function and create the initial set of CFI notes. */
2615 create_cfi_notes (void)
2619 gcc_checking_assert (!queued_reg_saves
.exists ());
2620 gcc_checking_assert (!trace_work_list
.exists ());
2622 /* Always begin at the entry trace. */
2623 ti
= &trace_info
[0];
2626 while (!trace_work_list
.is_empty ())
2628 ti
= trace_work_list
.pop ();
2632 queued_reg_saves
.release ();
2633 trace_work_list
.release ();
2636 /* Return the insn before the first NOTE_INSN_CFI after START. */
2639 before_next_cfi_note (rtx_insn
*start
)
2641 rtx_insn
*prev
= start
;
2644 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2647 start
= NEXT_INSN (start
);
2652 /* Insert CFI notes between traces to properly change state between them. */
2655 connect_traces (void)
2657 unsigned i
, n
= trace_info
.length ();
2658 dw_trace_info
*prev_ti
, *ti
;
2660 /* ??? Ideally, we should have both queued and processed every trace.
2661 However the current representation of constant pools on various targets
2662 is indistinguishable from unreachable code. Assume for the moment that
2663 we can simply skip over such traces. */
2664 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2665 these are not "real" instructions, and should not be considered.
2666 This could be generically useful for tablejump data as well. */
2667 /* Remove all unprocessed traces from the list. */
2668 for (i
= n
- 1; i
> 0; --i
)
2670 ti
= &trace_info
[i
];
2671 if (ti
->beg_row
== NULL
)
2673 trace_info
.ordered_remove (i
);
2677 gcc_assert (ti
->end_row
!= NULL
);
2680 /* Work from the end back to the beginning. This lets us easily insert
2681 remember/restore_state notes in the correct order wrt other notes. */
2682 prev_ti
= &trace_info
[n
- 1];
2683 for (i
= n
- 1; i
> 0; --i
)
2685 dw_cfi_row
*old_row
;
2688 prev_ti
= &trace_info
[i
- 1];
2690 add_cfi_insn
= ti
->head
;
2692 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2693 for the portion of the function in the alternate text
2694 section. The row state at the very beginning of that
2695 new FDE will be exactly the row state from the CIE. */
2696 if (ti
->switch_sections
)
2697 old_row
= cie_cfi_row
;
2700 old_row
= prev_ti
->end_row
;
2701 /* If there's no change from the previous end state, fine. */
2702 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2704 /* Otherwise check for the common case of sharing state with
2705 the beginning of an epilogue, but not the end. Insert
2706 remember/restore opcodes in that case. */
2707 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2711 /* Note that if we blindly insert the remember at the
2712 start of the trace, we can wind up increasing the
2713 size of the unwind info due to extra advance opcodes.
2714 Instead, put the remember immediately before the next
2715 state change. We know there must be one, because the
2716 state at the beginning and head of the trace differ. */
2717 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2719 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2722 add_cfi_insn
= ti
->head
;
2724 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2727 old_row
= prev_ti
->beg_row
;
2729 /* Otherwise, we'll simply change state from the previous end. */
2732 change_cfi_row (old_row
, ti
->beg_row
);
2734 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2738 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2739 prev_ti
->id
, ti
->id
);
2744 note
= NEXT_INSN (note
);
2745 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2746 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2748 while (note
!= add_cfi_insn
);
2752 /* Connect args_size between traces that have can_throw_internal insns. */
2753 if (cfun
->eh
->lp_array
)
2755 HOST_WIDE_INT prev_args_size
= 0;
2757 for (i
= 0; i
< n
; ++i
)
2759 ti
= &trace_info
[i
];
2761 if (ti
->switch_sections
)
2763 if (ti
->eh_head
== NULL
)
2765 gcc_assert (!ti
->args_size_undefined
);
2767 if (ti
->beg_delay_args_size
!= prev_args_size
)
2769 /* ??? Search back to previous CFI note. */
2770 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2771 add_cfi_args_size (ti
->beg_delay_args_size
);
2774 prev_args_size
= ti
->end_delay_args_size
;
2779 /* Set up the pseudo-cfg of instruction traces, as described at the
2780 block comment at the top of the file. */
2783 create_pseudo_cfg (void)
2785 bool saw_barrier
, switch_sections
;
2790 /* The first trace begins at the start of the function,
2791 and begins with the CIE row state. */
2792 trace_info
.create (16);
2793 memset (&ti
, 0, sizeof (ti
));
2794 ti
.head
= get_insns ();
2795 ti
.beg_row
= cie_cfi_row
;
2796 ti
.cfa_store
= cie_cfi_row
->cfa
;
2797 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2798 trace_info
.quick_push (ti
);
2800 if (cie_return_save
)
2801 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2803 /* Walk all the insns, collecting start of trace locations. */
2804 saw_barrier
= false;
2805 switch_sections
= false;
2806 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2808 if (BARRIER_P (insn
))
2810 else if (NOTE_P (insn
)
2811 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2813 /* We should have just seen a barrier. */
2814 gcc_assert (saw_barrier
);
2815 switch_sections
= true;
2817 /* Watch out for save_point notes between basic blocks.
2818 In particular, a note after a barrier. Do not record these,
2819 delaying trace creation until the label. */
2820 else if (save_point_p (insn
)
2821 && (LABEL_P (insn
) || !saw_barrier
))
2823 memset (&ti
, 0, sizeof (ti
));
2825 ti
.switch_sections
= switch_sections
;
2826 ti
.id
= trace_info
.length ();
2827 trace_info
.safe_push (ti
);
2829 saw_barrier
= false;
2830 switch_sections
= false;
2834 /* Create the trace index after we've finished building trace_info,
2835 avoiding stale pointer problems due to reallocation. */
2837 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2839 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2841 dw_trace_info
**slot
;
2844 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2845 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2846 tp
->switch_sections
? " (section switch)" : "");
2848 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2849 gcc_assert (*slot
== NULL
);
2854 /* Record the initial position of the return address. RTL is
2855 INCOMING_RETURN_ADDR_RTX. */
2858 initial_return_save (rtx rtl
)
2860 unsigned int reg
= INVALID_REGNUM
;
2861 HOST_WIDE_INT offset
= 0;
2863 switch (GET_CODE (rtl
))
2866 /* RA is in a register. */
2867 reg
= dwf_regno (rtl
);
2871 /* RA is on the stack. */
2872 rtl
= XEXP (rtl
, 0);
2873 switch (GET_CODE (rtl
))
2876 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2881 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2882 offset
= INTVAL (XEXP (rtl
, 1));
2886 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2887 offset
= -INTVAL (XEXP (rtl
, 1));
2897 /* The return address is at some offset from any value we can
2898 actually load. For instance, on the SPARC it is in %i7+8. Just
2899 ignore the offset for now; it doesn't matter for unwinding frames. */
2900 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2901 initial_return_save (XEXP (rtl
, 0));
2908 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2910 if (reg
!= INVALID_REGNUM
)
2911 record_reg_saved_in_reg (rtl
, pc_rtx
);
2912 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2917 create_cie_data (void)
2919 dw_cfa_location loc
;
2920 dw_trace_info cie_trace
;
2922 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2924 memset (&cie_trace
, 0, sizeof (cie_trace
));
2925 cur_trace
= &cie_trace
;
2927 add_cfi_vec
= &cie_cfi_vec
;
2928 cie_cfi_row
= cur_row
= new_cfi_row ();
2930 /* On entry, the Canonical Frame Address is at SP. */
2931 memset (&loc
, 0, sizeof (loc
));
2932 loc
.reg
= dw_stack_pointer_regnum
;
2933 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2936 if (targetm
.debug_unwind_info () == UI_DWARF2
2937 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2939 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2941 /* For a few targets, we have the return address incoming into a
2942 register, but choose a different return column. This will result
2943 in a DW_CFA_register for the return, and an entry in
2944 regs_saved_in_regs to match. If the target later stores that
2945 return address register to the stack, we want to be able to emit
2946 the DW_CFA_offset against the return column, not the intermediate
2947 save register. Save the contents of regs_saved_in_regs so that
2948 we can re-initialize it at the start of each function. */
2949 switch (cie_trace
.regs_saved_in_regs
.length ())
2954 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
2955 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
2956 cie_trace
.regs_saved_in_regs
.release ();
2968 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2969 state at each location within the function. These notes will be
2970 emitted during pass_final. */
2973 execute_dwarf2_frame (void)
2975 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
2976 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2978 /* The first time we're called, compute the incoming frame state. */
2979 if (cie_cfi_vec
== NULL
)
2982 dwarf2out_alloc_current_fde ();
2984 create_pseudo_cfg ();
2987 create_cfi_notes ();
2991 /* Free all the data we allocated. */
2996 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
2997 ti
->regs_saved_in_regs
.release ();
2999 trace_info
.release ();
3007 /* Convert a DWARF call frame info. operation to its string name */
3010 dwarf_cfi_name (unsigned int cfi_opc
)
3012 const char *name
= get_DW_CFA_name (cfi_opc
);
3017 return "DW_CFA_<unknown>";
3020 /* This routine will generate the correct assembly data for a location
3021 description based on a cfi entry with a complex address. */
3024 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3026 dw_loc_descr_ref loc
;
3029 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3032 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3033 dw2_asm_output_data (1, r
, NULL
);
3034 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3037 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3039 /* Output the size of the block. */
3040 size
= size_of_locs (loc
);
3041 dw2_asm_output_data_uleb128 (size
, NULL
);
3043 /* Now output the operations themselves. */
3044 output_loc_sequence (loc
, for_eh
);
3047 /* Similar, but used for .cfi_escape. */
3050 output_cfa_loc_raw (dw_cfi_ref cfi
)
3052 dw_loc_descr_ref loc
;
3055 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3058 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3059 fprintf (asm_out_file
, "%#x,", r
);
3060 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3063 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3065 /* Output the size of the block. */
3066 size
= size_of_locs (loc
);
3067 dw2_asm_output_data_uleb128_raw (size
);
3068 fputc (',', asm_out_file
);
3070 /* Now output the operations themselves. */
3071 output_loc_sequence_raw (loc
);
3074 /* Output a Call Frame Information opcode and its operand(s). */
3077 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3082 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3083 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3084 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3085 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3086 ((unsigned HOST_WIDE_INT
)
3087 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3088 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3090 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3091 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3092 "DW_CFA_offset, column %#lx", r
);
3093 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3094 dw2_asm_output_data_uleb128 (off
, NULL
);
3096 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3098 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3099 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3100 "DW_CFA_restore, column %#lx", r
);
3104 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3105 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3107 switch (cfi
->dw_cfi_opc
)
3109 case DW_CFA_set_loc
:
3111 dw2_asm_output_encoded_addr_rtx (
3112 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3113 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3116 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3117 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3118 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3121 case DW_CFA_advance_loc1
:
3122 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3123 fde
->dw_fde_current_label
, NULL
);
3124 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3127 case DW_CFA_advance_loc2
:
3128 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3129 fde
->dw_fde_current_label
, NULL
);
3130 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3133 case DW_CFA_advance_loc4
:
3134 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3135 fde
->dw_fde_current_label
, NULL
);
3136 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3139 case DW_CFA_MIPS_advance_loc8
:
3140 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3141 fde
->dw_fde_current_label
, NULL
);
3142 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3145 case DW_CFA_offset_extended
:
3146 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3147 dw2_asm_output_data_uleb128 (r
, NULL
);
3148 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3149 dw2_asm_output_data_uleb128 (off
, NULL
);
3152 case DW_CFA_def_cfa
:
3153 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3154 dw2_asm_output_data_uleb128 (r
, NULL
);
3155 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3158 case DW_CFA_offset_extended_sf
:
3159 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3160 dw2_asm_output_data_uleb128 (r
, NULL
);
3161 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3162 dw2_asm_output_data_sleb128 (off
, NULL
);
3165 case DW_CFA_def_cfa_sf
:
3166 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3167 dw2_asm_output_data_uleb128 (r
, NULL
);
3168 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3169 dw2_asm_output_data_sleb128 (off
, NULL
);
3172 case DW_CFA_restore_extended
:
3173 case DW_CFA_undefined
:
3174 case DW_CFA_same_value
:
3175 case DW_CFA_def_cfa_register
:
3176 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3177 dw2_asm_output_data_uleb128 (r
, NULL
);
3180 case DW_CFA_register
:
3181 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3182 dw2_asm_output_data_uleb128 (r
, NULL
);
3183 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3184 dw2_asm_output_data_uleb128 (r
, NULL
);
3187 case DW_CFA_def_cfa_offset
:
3188 case DW_CFA_GNU_args_size
:
3189 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3192 case DW_CFA_def_cfa_offset_sf
:
3193 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3194 dw2_asm_output_data_sleb128 (off
, NULL
);
3197 case DW_CFA_GNU_window_save
:
3200 case DW_CFA_def_cfa_expression
:
3201 case DW_CFA_expression
:
3202 output_cfa_loc (cfi
, for_eh
);
3205 case DW_CFA_GNU_negative_offset_extended
:
3206 /* Obsoleted by DW_CFA_offset_extended_sf. */
3215 /* Similar, but do it via assembler directives instead. */
3218 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3220 unsigned long r
, r2
;
3222 switch (cfi
->dw_cfi_opc
)
3224 case DW_CFA_advance_loc
:
3225 case DW_CFA_advance_loc1
:
3226 case DW_CFA_advance_loc2
:
3227 case DW_CFA_advance_loc4
:
3228 case DW_CFA_MIPS_advance_loc8
:
3229 case DW_CFA_set_loc
:
3230 /* Should only be created in a code path not followed when emitting
3231 via directives. The assembler is going to take care of this for
3232 us. But this routines is also used for debugging dumps, so
3234 gcc_assert (f
!= asm_out_file
);
3235 fprintf (f
, "\t.cfi_advance_loc\n");
3239 case DW_CFA_offset_extended
:
3240 case DW_CFA_offset_extended_sf
:
3241 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3242 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3243 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3246 case DW_CFA_restore
:
3247 case DW_CFA_restore_extended
:
3248 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3249 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3252 case DW_CFA_undefined
:
3253 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3254 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3257 case DW_CFA_same_value
:
3258 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3259 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3262 case DW_CFA_def_cfa
:
3263 case DW_CFA_def_cfa_sf
:
3264 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3265 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3266 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3269 case DW_CFA_def_cfa_register
:
3270 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3271 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3274 case DW_CFA_register
:
3275 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3276 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3277 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3280 case DW_CFA_def_cfa_offset
:
3281 case DW_CFA_def_cfa_offset_sf
:
3282 fprintf (f
, "\t.cfi_def_cfa_offset "
3283 HOST_WIDE_INT_PRINT_DEC
"\n",
3284 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3287 case DW_CFA_remember_state
:
3288 fprintf (f
, "\t.cfi_remember_state\n");
3290 case DW_CFA_restore_state
:
3291 fprintf (f
, "\t.cfi_restore_state\n");
3294 case DW_CFA_GNU_args_size
:
3295 if (f
== asm_out_file
)
3297 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3298 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3300 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3301 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3306 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3307 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3311 case DW_CFA_GNU_window_save
:
3312 fprintf (f
, "\t.cfi_window_save\n");
3315 case DW_CFA_def_cfa_expression
:
3316 if (f
!= asm_out_file
)
3318 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3322 case DW_CFA_expression
:
3323 if (f
!= asm_out_file
)
3325 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3328 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3329 output_cfa_loc_raw (cfi
);
3339 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3341 if (dwarf2out_do_cfi_asm ())
3342 output_cfi_directive (asm_out_file
, cfi
);
3346 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3354 dw_cfa_location dummy
;
3355 memset (&dummy
, 0, sizeof (dummy
));
3356 dummy
.reg
= INVALID_REGNUM
;
3357 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3359 output_cfi_directive (f
, cfi
);
3361 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3363 output_cfi_directive (f
, cfi
);
3366 void debug_cfi_row (dw_cfi_row
*row
);
3369 debug_cfi_row (dw_cfi_row
*row
)
3371 dump_cfi_row (stderr
, row
);
3375 /* Save the result of dwarf2out_do_frame across PCH.
3376 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3377 static GTY(()) signed char saved_do_cfi_asm
= 0;
3379 /* Decide whether we want to emit frame unwind information for the current
3380 translation unit. */
3383 dwarf2out_do_frame (void)
3385 /* We want to emit correct CFA location expressions or lists, so we
3386 have to return true if we're going to output debug info, even if
3387 we're not going to output frame or unwind info. */
3388 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3391 if (saved_do_cfi_asm
> 0)
3394 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3397 if ((flag_unwind_tables
|| flag_exceptions
)
3398 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3404 /* Decide whether to emit frame unwind via assembler directives. */
3407 dwarf2out_do_cfi_asm (void)
3411 if (saved_do_cfi_asm
!= 0)
3412 return saved_do_cfi_asm
> 0;
3414 /* Assume failure for a moment. */
3415 saved_do_cfi_asm
= -1;
3417 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3419 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3422 /* Make sure the personality encoding is one the assembler can support.
3423 In particular, aligned addresses can't be handled. */
3424 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3425 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3427 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3428 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3431 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3432 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3433 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3434 && !flag_unwind_tables
&& !flag_exceptions
3435 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3439 saved_do_cfi_asm
= 1;
3445 const pass_data pass_data_dwarf2_frame
=
3447 RTL_PASS
, /* type */
3448 "dwarf2", /* name */
3449 OPTGROUP_NONE
, /* optinfo_flags */
3450 TV_FINAL
, /* tv_id */
3451 0, /* properties_required */
3452 0, /* properties_provided */
3453 0, /* properties_destroyed */
3454 0, /* todo_flags_start */
3455 0, /* todo_flags_finish */
3458 class pass_dwarf2_frame
: public rtl_opt_pass
3461 pass_dwarf2_frame (gcc::context
*ctxt
)
3462 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3465 /* opt_pass methods: */
3466 virtual bool gate (function
*);
3467 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3469 }; // class pass_dwarf2_frame
3472 pass_dwarf2_frame::gate (function
*)
3474 /* Targets which still implement the prologue in assembler text
3475 cannot use the generic dwarf2 unwinding. */
3476 if (!targetm
.have_prologue ())
3479 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3480 from the optimized shrink-wrapping annotations that we will compute.
3481 For now, only produce the CFI notes for dwarf2. */
3482 return dwarf2out_do_frame ();
3488 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3490 return new pass_dwarf2_frame (ctxt
);
3493 #include "gt-dwarf2cfi.h"