1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2023 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-iterator.h"
64 #include "gimple-fold.h"
65 #include "rtx-vector-builder.h"
66 #include "tree-pretty-print.h"
70 /* If this is nonzero, we do not bother generating VOLATILE
71 around volatile memory references, and we are willing to
72 output indirect addresses. If cse is to follow, we reject
73 indirect addresses so a useful potential cse is generated;
74 if it is used only once, instruction combination will produce
75 the same indirect address eventually. */
78 static bool block_move_libcall_safe_for_call_parm (void);
79 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
80 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
81 unsigned HOST_WIDE_INT
,
82 unsigned HOST_WIDE_INT
, bool);
83 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
84 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
85 static rtx_insn
*compress_float_constant (rtx
, rtx
);
86 static rtx
get_subtarget (rtx
);
87 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
88 machine_mode
, tree
, alias_set_type
, bool, bool);
90 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
92 static bool is_aligning_offset (const_tree
, const_tree
);
93 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
94 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
96 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
98 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 static rtx
const_vector_from_tree (tree
);
101 static tree
tree_expr_size (const_tree
);
102 static void convert_mode_scalar (rtx
, rtx
, int);
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
110 init_expr_target (void)
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
121 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
127 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
128 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
129 PATTERN (insn
) = pat
;
131 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
132 mode
= (machine_mode
) ((int) mode
+ 1))
136 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
137 PUT_MODE (mem
, mode
);
138 PUT_MODE (mem1
, mode
);
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
143 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
144 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
145 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
148 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
151 set_mode_and_regno (reg
, mode
, regno
);
154 SET_DEST (pat
) = reg
;
155 if (recog (pat
, insn
, &num_clobbers
) >= 0)
156 direct_load
[(int) mode
] = 1;
158 SET_SRC (pat
) = mem1
;
159 SET_DEST (pat
) = reg
;
160 if (recog (pat
, insn
, &num_clobbers
) >= 0)
161 direct_load
[(int) mode
] = 1;
164 SET_DEST (pat
) = mem
;
165 if (recog (pat
, insn
, &num_clobbers
) >= 0)
166 direct_store
[(int) mode
] = 1;
169 SET_DEST (pat
) = mem1
;
170 if (recog (pat
, insn
, &num_clobbers
) >= 0)
171 direct_store
[(int) mode
] = 1;
175 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
177 opt_scalar_float_mode mode_iter
;
178 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
180 scalar_float_mode mode
= mode_iter
.require ();
181 scalar_float_mode srcmode
;
182 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
186 ic
= can_extend_p (mode
, srcmode
, 0);
187 if (ic
== CODE_FOR_nothing
)
190 PUT_MODE (mem
, srcmode
);
192 if (insn_operand_matches (ic
, 1, mem
))
193 float_extend_from_mem
[mode
][srcmode
] = true;
198 /* This is run at the start of compiling a function. */
203 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
213 convert_move (rtx to
, rtx from
, int unsignedp
)
215 machine_mode to_mode
= GET_MODE (to
);
216 machine_mode from_mode
= GET_MODE (from
);
218 gcc_assert (to_mode
!= BLKmode
);
219 gcc_assert (from_mode
!= BLKmode
);
221 /* If the source and destination are already the same, then there's
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
230 scalar_int_mode to_int_mode
;
231 if (GET_CODE (from
) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from
)
233 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
235 >= GET_MODE_PRECISION (to_int_mode
))
236 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
238 scalar_int_mode int_orig_mode
;
239 scalar_int_mode int_inner_mode
;
240 machine_mode orig_mode
= GET_MODE (from
);
242 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
243 from_mode
= to_int_mode
;
245 /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
246 the original mode, but narrower than the inner mode. */
247 if (GET_CODE (from
) == SUBREG
248 && is_a
<scalar_int_mode
> (orig_mode
, &int_orig_mode
)
249 && GET_MODE_PRECISION (to_int_mode
)
250 > GET_MODE_PRECISION (int_orig_mode
)
251 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (from
)),
253 && GET_MODE_PRECISION (int_inner_mode
)
254 > GET_MODE_PRECISION (to_int_mode
))
256 SUBREG_PROMOTED_VAR_P (from
) = 1;
257 SUBREG_PROMOTED_SET (from
, unsignedp
);
261 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
263 if (to_mode
== from_mode
264 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
266 emit_move_insn (to
, from
);
270 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
272 if (GET_MODE_UNIT_PRECISION (to_mode
)
273 > GET_MODE_UNIT_PRECISION (from_mode
))
275 optab op
= unsignedp
? zext_optab
: sext_optab
;
276 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
277 if (icode
!= CODE_FOR_nothing
)
279 emit_unop_insn (icode
, to
, from
,
280 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
285 if (GET_MODE_UNIT_PRECISION (to_mode
)
286 < GET_MODE_UNIT_PRECISION (from_mode
))
288 insn_code icode
= convert_optab_handler (trunc_optab
,
290 if (icode
!= CODE_FOR_nothing
)
292 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
297 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
298 GET_MODE_BITSIZE (to_mode
)));
300 if (VECTOR_MODE_P (to_mode
))
301 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
303 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
305 emit_move_insn (to
, from
);
309 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
311 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
312 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
316 convert_mode_scalar (to
, from
, unsignedp
);
319 /* Like convert_move, but deals only with scalar modes. */
322 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
324 /* Both modes should be scalar types. */
325 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
326 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
327 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
328 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
332 gcc_assert (to_real
== from_real
);
334 /* rtx code for making an equivalent value. */
335 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
336 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
344 gcc_assert ((GET_MODE_PRECISION (from_mode
)
345 != GET_MODE_PRECISION (to_mode
))
346 || (DECIMAL_FLOAT_MODE_P (from_mode
)
347 != DECIMAL_FLOAT_MODE_P (to_mode
))
348 || (REAL_MODE_FORMAT (from_mode
) == &arm_bfloat_half_format
349 && REAL_MODE_FORMAT (to_mode
) == &ieee_half_format
)
350 || (REAL_MODE_FORMAT (to_mode
) == &arm_bfloat_half_format
351 && REAL_MODE_FORMAT (from_mode
) == &ieee_half_format
));
353 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
354 /* Conversion between decimal float and binary float, same size. */
355 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
356 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
361 /* Try converting directly if the insn is supported. */
363 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
364 if (code
!= CODE_FOR_nothing
)
366 emit_unop_insn (code
, to
, from
,
367 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
372 if (REAL_MODE_FORMAT (from_mode
) == &arm_bfloat_half_format
373 && REAL_MODE_FORMAT (SFmode
) == &ieee_single_format
)
375 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (SFmode
))
377 /* To cut down on libgcc size, implement
378 BFmode -> {DF,XF,TF}mode conversions by
379 BFmode -> SFmode -> {DF,XF,TF}mode conversions. */
380 rtx temp
= gen_reg_rtx (SFmode
);
381 convert_mode_scalar (temp
, from
, unsignedp
);
382 convert_mode_scalar (to
, temp
, unsignedp
);
385 if (REAL_MODE_FORMAT (to_mode
) == &ieee_half_format
)
387 /* Similarly, implement BFmode -> HFmode as
388 BFmode -> SFmode -> HFmode conversion where SFmode
389 has superset of BFmode values. We don't need
390 to handle sNaNs by raising exception and turning
391 into into qNaN though, as that can be done in the
392 SFmode -> HFmode conversion too. */
393 rtx temp
= gen_reg_rtx (SFmode
);
394 int save_flag_finite_math_only
= flag_finite_math_only
;
395 flag_finite_math_only
= true;
396 convert_mode_scalar (temp
, from
, unsignedp
);
397 flag_finite_math_only
= save_flag_finite_math_only
;
398 convert_mode_scalar (to
, temp
, unsignedp
);
401 if (to_mode
== SFmode
402 && !HONOR_NANS (from_mode
)
403 && !HONOR_NANS (to_mode
)
404 && optimize_insn_for_speed_p ())
406 /* If we don't expect sNaNs, for BFmode -> SFmode we can just
407 shift the bits up. */
408 machine_mode fromi_mode
, toi_mode
;
409 if (int_mode_for_size (GET_MODE_BITSIZE (from_mode
),
410 0).exists (&fromi_mode
)
411 && int_mode_for_size (GET_MODE_BITSIZE (to_mode
),
412 0).exists (&toi_mode
))
415 rtx fromi
= lowpart_subreg (fromi_mode
, from
, from_mode
);
420 if (GET_MODE (fromi
) == VOIDmode
)
421 toi
= simplify_unary_operation (ZERO_EXTEND
, toi_mode
,
425 toi
= gen_reg_rtx (toi_mode
);
426 convert_mode_scalar (toi
, fromi
, 1);
429 = maybe_expand_shift (LSHIFT_EXPR
, toi_mode
, toi
,
430 GET_MODE_PRECISION (to_mode
)
431 - GET_MODE_PRECISION (from_mode
),
435 tof
= lowpart_subreg (to_mode
, toi
, toi_mode
);
437 emit_move_insn (to
, tof
);
440 insns
= get_insns ();
450 if (REAL_MODE_FORMAT (from_mode
) == &ieee_single_format
451 && REAL_MODE_FORMAT (to_mode
) == &arm_bfloat_half_format
452 && !HONOR_NANS (from_mode
)
453 && !HONOR_NANS (to_mode
)
454 && !flag_rounding_math
455 && optimize_insn_for_speed_p ())
457 /* If we don't expect qNaNs nor sNaNs and can assume rounding
458 to nearest, we can expand the conversion inline as
459 (fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16. */
460 machine_mode fromi_mode
, toi_mode
;
461 if (int_mode_for_size (GET_MODE_BITSIZE (from_mode
),
462 0).exists (&fromi_mode
)
463 && int_mode_for_size (GET_MODE_BITSIZE (to_mode
),
464 0).exists (&toi_mode
))
467 rtx fromi
= lowpart_subreg (fromi_mode
, from
, from_mode
);
473 int shift
= (GET_MODE_PRECISION (from_mode
)
474 - GET_MODE_PRECISION (to_mode
));
476 = maybe_expand_shift (RSHIFT_EXPR
, fromi_mode
, fromi
,
481 = expand_binop (fromi_mode
, and_optab
, temp1
, const1_rtx
,
482 NULL_RTX
, 1, OPTAB_DIRECT
);
486 = expand_binop (fromi_mode
, add_optab
, fromi
,
487 gen_int_mode ((HOST_WIDE_INT_1U
489 fromi_mode
), NULL_RTX
,
494 = expand_binop (fromi_mode
, add_optab
, temp3
, temp2
,
495 NULL_RTX
, 1, OPTAB_DIRECT
);
498 rtx temp5
= maybe_expand_shift (RSHIFT_EXPR
, fromi_mode
,
499 temp4
, shift
, NULL_RTX
, 1);
502 rtx temp6
= lowpart_subreg (toi_mode
, temp5
, fromi_mode
);
505 tof
= lowpart_subreg (to_mode
, force_reg (toi_mode
, temp6
),
508 emit_move_insn (to
, tof
);
511 insns
= get_insns ();
522 /* Otherwise use a libcall. */
523 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
525 /* Is this conversion implemented yet? */
526 gcc_assert (libcall
);
529 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
531 insns
= get_insns ();
533 emit_libcall_block (insns
, to
, value
,
534 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
536 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
540 /* Handle pointer conversion. */ /* SPEE 900220. */
541 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
545 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
552 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
555 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
561 /* Targets are expected to provide conversion insns between PxImode and
562 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
563 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
565 scalar_int_mode full_mode
566 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
568 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
569 != CODE_FOR_nothing
);
571 if (full_mode
!= from_mode
)
572 from
= convert_to_mode (full_mode
, from
, unsignedp
);
573 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
577 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
580 scalar_int_mode full_mode
581 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
582 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
583 enum insn_code icode
;
585 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
586 gcc_assert (icode
!= CODE_FOR_nothing
);
588 if (to_mode
== full_mode
)
590 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
594 new_from
= gen_reg_rtx (full_mode
);
595 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
597 /* else proceed to integer conversions below. */
598 from_mode
= full_mode
;
602 /* Make sure both are fixed-point modes or both are not. */
603 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
604 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
605 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
607 /* If we widen from_mode to to_mode and they are in the same class,
608 we won't saturate the result.
609 Otherwise, always saturate the result to play safe. */
610 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
611 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
612 expand_fixed_convert (to
, from
, 0, 0);
614 expand_fixed_convert (to
, from
, 0, 1);
618 /* Now both modes are integers. */
620 /* Handle expanding beyond a word. */
621 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
622 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
629 scalar_mode lowpart_mode
;
630 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
632 /* Try converting directly if the insn is supported. */
633 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
636 /* If FROM is a SUBREG, put it into a register. Do this
637 so that we always generate the same set of insns for
638 better cse'ing; if an intermediate assignment occurred,
639 we won't be doing the operation directly on the SUBREG. */
640 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
641 from
= force_reg (from_mode
, from
);
642 emit_unop_insn (code
, to
, from
, equiv_code
);
645 /* Next, try converting via full word. */
646 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
647 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
648 != CODE_FOR_nothing
))
650 rtx word_to
= gen_reg_rtx (word_mode
);
653 if (reg_overlap_mentioned_p (to
, from
))
654 from
= force_reg (from_mode
, from
);
657 convert_move (word_to
, from
, unsignedp
);
658 emit_unop_insn (code
, to
, word_to
, equiv_code
);
662 /* No special multiword conversion insn; do it by hand. */
665 /* Since we will turn this into a no conflict block, we must ensure
666 the source does not overlap the target so force it into an isolated
667 register when maybe so. Likewise for any MEM input, since the
668 conversion sequence might require several references to it and we
669 must ensure we're getting the same value every time. */
671 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
672 from
= force_reg (from_mode
, from
);
674 /* Get a copy of FROM widened to a word, if necessary. */
675 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
676 lowpart_mode
= word_mode
;
678 lowpart_mode
= from_mode
;
680 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
682 lowpart
= gen_lowpart (lowpart_mode
, to
);
683 emit_move_insn (lowpart
, lowfrom
);
685 /* Compute the value to put in each remaining word. */
687 fill_value
= const0_rtx
;
689 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
690 LT
, lowfrom
, const0_rtx
,
691 lowpart_mode
, 0, -1);
693 /* Fill the remaining words. */
694 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
696 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
697 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
699 gcc_assert (subword
);
701 if (fill_value
!= subword
)
702 emit_move_insn (subword
, fill_value
);
705 insns
= get_insns ();
712 /* Truncating multi-word to a word or less. */
713 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
714 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
717 && ! MEM_VOLATILE_P (from
)
718 && direct_load
[(int) to_mode
]
719 && ! mode_dependent_address_p (XEXP (from
, 0),
720 MEM_ADDR_SPACE (from
)))
722 || GET_CODE (from
) == SUBREG
))
723 from
= force_reg (from_mode
, from
);
724 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
728 /* Now follow all the conversions between integers
729 no more than a word long. */
731 /* For truncation, usually we can just refer to FROM in a narrower mode. */
732 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
733 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
736 && ! MEM_VOLATILE_P (from
)
737 && direct_load
[(int) to_mode
]
738 && ! mode_dependent_address_p (XEXP (from
, 0),
739 MEM_ADDR_SPACE (from
)))
741 || GET_CODE (from
) == SUBREG
))
742 from
= force_reg (from_mode
, from
);
743 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
744 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
745 from
= copy_to_reg (from
);
746 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
750 /* Handle extension. */
751 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
753 /* Convert directly if that works. */
754 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
757 emit_unop_insn (code
, to
, from
, equiv_code
);
765 /* Search for a mode to convert via. */
766 opt_scalar_mode intermediate_iter
;
767 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
769 scalar_mode intermediate
= intermediate_iter
.require ();
770 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
772 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
773 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
775 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
776 != CODE_FOR_nothing
))
778 convert_move (to
, convert_to_mode (intermediate
, from
,
779 unsignedp
), unsignedp
);
784 /* No suitable intermediate mode.
785 Generate what we need with shifts. */
786 shift_amount
= (GET_MODE_PRECISION (to_mode
)
787 - GET_MODE_PRECISION (from_mode
));
788 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
789 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
791 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
794 emit_move_insn (to
, tmp
);
799 /* Support special truncate insns for certain modes. */
800 if (convert_optab_handler (trunc_optab
, to_mode
,
801 from_mode
) != CODE_FOR_nothing
)
803 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
808 /* Handle truncation of volatile memrefs, and so on;
809 the things that couldn't be truncated directly,
810 and for which there was no special instruction.
812 ??? Code above formerly short-circuited this, for most integer
813 mode pairs, with a force_reg in from_mode followed by a recursive
814 call to this routine. Appears always to have been wrong. */
815 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
817 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
818 emit_move_insn (to
, temp
);
822 /* Mode combination is not recognized. */
826 /* Return an rtx for a value that would result
827 from converting X to mode MODE.
828 Both X and MODE may be floating, or both integer.
829 UNSIGNEDP is nonzero if X is an unsigned value.
830 This can be done by referring to a part of X in place
831 or by copying to a new temporary with conversion. */
834 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
836 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
839 /* Return an rtx for a value that would result
840 from converting X from mode OLDMODE to mode MODE.
841 Both modes may be floating, or both integer.
842 UNSIGNEDP is nonzero if X is an unsigned value.
844 This can be done by referring to a part of X in place
845 or by copying to a new temporary with conversion.
847 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
850 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
853 scalar_int_mode int_mode
;
855 /* If FROM is a SUBREG that indicates that we have already done at least
856 the required extension, strip it. */
858 if (GET_CODE (x
) == SUBREG
859 && SUBREG_PROMOTED_VAR_P (x
)
860 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
861 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
862 >= GET_MODE_PRECISION (int_mode
))
863 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
865 scalar_int_mode int_orig_mode
;
866 scalar_int_mode int_inner_mode
;
867 machine_mode orig_mode
= GET_MODE (x
);
868 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
870 /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
871 the original mode, but narrower than the inner mode. */
872 if (GET_CODE (x
) == SUBREG
873 && is_a
<scalar_int_mode
> (orig_mode
, &int_orig_mode
)
874 && GET_MODE_PRECISION (int_mode
)
875 > GET_MODE_PRECISION (int_orig_mode
)
876 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (x
)),
878 && GET_MODE_PRECISION (int_inner_mode
)
879 > GET_MODE_PRECISION (int_mode
))
881 SUBREG_PROMOTED_VAR_P (x
) = 1;
882 SUBREG_PROMOTED_SET (x
, unsignedp
);
886 if (GET_MODE (x
) != VOIDmode
)
887 oldmode
= GET_MODE (x
);
892 if (CONST_SCALAR_INT_P (x
)
893 && is_a
<scalar_int_mode
> (mode
, &int_mode
))
895 /* If the caller did not tell us the old mode, then there is not
896 much to do with respect to canonicalization. We have to
897 assume that all the bits are significant. */
898 if (!is_a
<scalar_int_mode
> (oldmode
))
899 oldmode
= MAX_MODE_INT
;
900 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
901 GET_MODE_PRECISION (int_mode
),
902 unsignedp
? UNSIGNED
: SIGNED
);
903 return immed_wide_int_const (w
, int_mode
);
906 /* We can do this with a gen_lowpart if both desired and current modes
907 are integer, and this is either a constant integer, a register, or a
909 scalar_int_mode int_oldmode
;
910 if (is_int_mode (mode
, &int_mode
)
911 && is_int_mode (oldmode
, &int_oldmode
)
912 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
913 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
914 || CONST_POLY_INT_P (x
)
916 && (!HARD_REGISTER_P (x
)
917 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
918 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
919 return gen_lowpart (int_mode
, x
);
921 /* Converting from integer constant into mode is always equivalent to an
923 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
925 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
926 GET_MODE_BITSIZE (oldmode
)));
927 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
930 temp
= gen_reg_rtx (mode
);
931 convert_move (temp
, x
, unsignedp
);
935 /* Variant of convert_modes for ABI parameter passing/return.
936 Return an rtx for a value that would result from converting X from
937 a floating point mode FMODE to wider integer mode MODE. */
940 convert_float_to_wider_int (machine_mode mode
, machine_mode fmode
, rtx x
)
942 gcc_assert (SCALAR_INT_MODE_P (mode
) && SCALAR_FLOAT_MODE_P (fmode
));
943 scalar_int_mode tmp_mode
= int_mode_for_mode (fmode
).require ();
944 rtx tmp
= force_reg (tmp_mode
, gen_lowpart (tmp_mode
, x
));
945 return convert_modes (mode
, tmp_mode
, tmp
, 1);
948 /* Variant of convert_modes for ABI parameter passing/return.
949 Return an rtx for a value that would result from converting X from
950 an integer mode IMODE to a narrower floating point mode MODE. */
953 convert_wider_int_to_float (machine_mode mode
, machine_mode imode
, rtx x
)
955 gcc_assert (SCALAR_FLOAT_MODE_P (mode
) && SCALAR_INT_MODE_P (imode
));
956 scalar_int_mode tmp_mode
= int_mode_for_mode (mode
).require ();
957 rtx tmp
= force_reg (tmp_mode
, gen_lowpart (tmp_mode
, x
));
958 return gen_lowpart_SUBREG (mode
, tmp
);
961 /* Return the largest alignment we can use for doing a move (or store)
962 of MAX_PIECES. ALIGN is the largest alignment we could use. */
965 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
967 scalar_int_mode tmode
968 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 0).require ();
970 if (align
>= GET_MODE_ALIGNMENT (tmode
))
971 align
= GET_MODE_ALIGNMENT (tmode
);
974 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
975 opt_scalar_int_mode mode_iter
;
976 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
978 tmode
= mode_iter
.require ();
979 if (GET_MODE_SIZE (tmode
) > max_pieces
980 || targetm
.slow_unaligned_access (tmode
, align
))
985 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
991 /* Return the widest QI vector, if QI_MODE is true, or integer mode
992 that is narrower than SIZE bytes. */
994 static fixed_size_mode
995 widest_fixed_size_mode_for_size (unsigned int size
, bool qi_vector
)
997 fixed_size_mode result
= NARROWEST_INT_MODE
;
999 gcc_checking_assert (size
> 1);
1001 /* Use QI vector only if size is wider than a WORD. */
1002 if (qi_vector
&& size
> UNITS_PER_WORD
)
1005 fixed_size_mode candidate
;
1006 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_INT
)
1007 if (is_a
<fixed_size_mode
> (mode
, &candidate
)
1008 && GET_MODE_INNER (candidate
) == QImode
)
1010 if (GET_MODE_SIZE (candidate
) >= size
)
1012 if (optab_handler (vec_duplicate_optab
, candidate
)
1013 != CODE_FOR_nothing
)
1017 if (result
!= NARROWEST_INT_MODE
)
1021 opt_scalar_int_mode tmode
;
1022 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
1023 if (GET_MODE_SIZE (tmode
.require ()) < size
)
1024 result
= tmode
.require ();
1029 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
1030 and should be performed piecewise. */
1033 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
1034 enum by_pieces_operation op
)
1036 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
1037 optimize_insn_for_speed_p ());
1040 /* Determine whether the LEN bytes can be moved by using several move
1041 instructions. Return nonzero if a call to move_by_pieces should
1045 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
1047 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
1050 /* Return number of insns required to perform operation OP by pieces
1051 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
1053 unsigned HOST_WIDE_INT
1054 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
1055 unsigned int max_size
, by_pieces_operation op
)
1057 unsigned HOST_WIDE_INT n_insns
= 0;
1058 fixed_size_mode mode
;
1060 if (targetm
.overlap_op_by_pieces_p () && op
!= COMPARE_BY_PIECES
)
1062 /* NB: Round up L and ALIGN to the widest integer mode for
1064 mode
= widest_fixed_size_mode_for_size (max_size
,
1065 op
== SET_BY_PIECES
);
1066 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
1068 unsigned HOST_WIDE_INT up
= ROUND_UP (l
, GET_MODE_SIZE (mode
));
1071 align
= GET_MODE_ALIGNMENT (mode
);
1075 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1077 while (max_size
> 1 && l
> 0)
1079 mode
= widest_fixed_size_mode_for_size (max_size
,
1080 op
== SET_BY_PIECES
);
1081 enum insn_code icode
;
1083 unsigned int modesize
= GET_MODE_SIZE (mode
);
1085 icode
= optab_handler (mov_optab
, mode
);
1086 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
1088 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
1093 n_insns
+= n_pieces
;
1096 case COMPARE_BY_PIECES
:
1097 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1098 int batch_ops
= 4 * batch
- 1;
1099 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
1100 n_insns
+= full
* batch_ops
;
1101 if (n_pieces
% batch
!= 0)
1107 max_size
= modesize
;
1114 /* Used when performing piecewise block operations, holds information
1115 about one of the memory objects involved. The member functions
1116 can be used to generate code for loading from the object and
1117 updating the address when iterating. */
1121 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
1124 /* The address of the object. Can differ from that seen in the
1125 MEM rtx if we copied the address to a register. */
1127 /* Nonzero if the address on the object has an autoincrement already,
1128 signifies whether that was an increment or decrement. */
1129 signed char m_addr_inc
;
1130 /* Nonzero if we intend to use autoinc without the address already
1131 having autoinc form. We will insert add insns around each memory
1132 reference, expecting later passes to form autoinc addressing modes.
1133 The only supported options are predecrement and postincrement. */
1134 signed char m_explicit_inc
;
1135 /* True if we have either of the two possible cases of using
1138 /* True if this is an address to be used for load operations rather
1142 /* Optionally, a function to obtain constants for any given offset into
1143 the objects, and data associated with it. */
1144 by_pieces_constfn m_constfn
;
1147 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
1148 rtx
adjust (fixed_size_mode
, HOST_WIDE_INT
, by_pieces_prev
* = nullptr);
1149 void increment_address (HOST_WIDE_INT
);
1150 void maybe_predec (HOST_WIDE_INT
);
1151 void maybe_postinc (HOST_WIDE_INT
);
1152 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
1159 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
1160 true if the operation to be performed on this object is a load
1161 rather than a store. For stores, OBJ can be NULL, in which case we
1162 assume the operation is a stack push. For loads, the optional
1163 CONSTFN and its associated CFNDATA can be used in place of the
1166 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
1168 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
1174 rtx addr
= XEXP (obj
, 0);
1175 rtx_code code
= GET_CODE (addr
);
1177 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
1178 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
1179 m_auto
= inc
|| dec
;
1181 m_addr_inc
= dec
? -1 : 1;
1183 /* While we have always looked for these codes here, the code
1184 implementing the memory operation has never handled them.
1185 Support could be added later if necessary or beneficial. */
1186 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
1194 if (STACK_GROWS_DOWNWARD
)
1200 gcc_assert (constfn
!= NULL
);
1204 gcc_assert (is_load
);
1207 /* Decide whether to use autoinc for an address involved in a memory op.
1208 MODE is the mode of the accesses, REVERSE is true if we've decided to
1209 perform the operation starting from the end, and LEN is the length of
1210 the operation. Don't override an earlier decision to set m_auto. */
1213 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
1216 if (m_auto
|| m_obj
== NULL_RTX
)
1219 bool use_predec
= (m_is_load
1220 ? USE_LOAD_PRE_DECREMENT (mode
)
1221 : USE_STORE_PRE_DECREMENT (mode
));
1222 bool use_postinc
= (m_is_load
1223 ? USE_LOAD_POST_INCREMENT (mode
)
1224 : USE_STORE_POST_INCREMENT (mode
));
1225 machine_mode addr_mode
= get_address_mode (m_obj
);
1227 if (use_predec
&& reverse
)
1229 m_addr
= copy_to_mode_reg (addr_mode
,
1230 plus_constant (addr_mode
,
1233 m_explicit_inc
= -1;
1235 else if (use_postinc
&& !reverse
)
1237 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
1241 else if (CONSTANT_P (m_addr
))
1242 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
1245 /* Adjust the address to refer to the data at OFFSET in MODE. If we
1246 are using autoincrement for this address, we don't add the offset,
1247 but we still modify the MEM's properties. */
1250 pieces_addr::adjust (fixed_size_mode mode
, HOST_WIDE_INT offset
,
1251 by_pieces_prev
*prev
)
1254 /* Pass the previous data to m_constfn. */
1255 return m_constfn (m_cfndata
, prev
, offset
, mode
);
1256 if (m_obj
== NULL_RTX
)
1259 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1261 return adjust_address (m_obj
, mode
, offset
);
1264 /* Emit an add instruction to increment the address by SIZE. */
1267 pieces_addr::increment_address (HOST_WIDE_INT size
)
1269 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1270 emit_insn (gen_add2_insn (m_addr
, amount
));
1273 /* If we are supposed to decrement the address after each access, emit code
1274 to do so now. Increment by SIZE (which has should have the correct sign
1278 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1280 if (m_explicit_inc
>= 0)
1282 gcc_assert (HAVE_PRE_DECREMENT
);
1283 increment_address (size
);
1286 /* If we are supposed to decrement the address after each access, emit code
1287 to do so now. Increment by SIZE. */
1290 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1292 if (m_explicit_inc
<= 0)
1294 gcc_assert (HAVE_POST_INCREMENT
);
1295 increment_address (size
);
1298 /* This structure is used by do_op_by_pieces to describe the operation
1301 class op_by_pieces_d
1304 fixed_size_mode
get_usable_mode (fixed_size_mode
, unsigned int);
1305 fixed_size_mode
smallest_fixed_size_mode_for_size (unsigned int);
1308 pieces_addr m_to
, m_from
;
1309 /* Make m_len read-only so that smallest_fixed_size_mode_for_size can
1310 use it to check the valid mode size. */
1311 const unsigned HOST_WIDE_INT m_len
;
1312 HOST_WIDE_INT m_offset
;
1313 unsigned int m_align
;
1314 unsigned int m_max_size
;
1316 /* True if this is a stack push. */
1318 /* True if targetm.overlap_op_by_pieces_p () returns true. */
1319 bool m_overlap_op_by_pieces
;
1320 /* True if QI vector mode can be used. */
1321 bool m_qi_vector_mode
;
1323 /* Virtual functions, overriden by derived classes for the specific
1325 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1326 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1327 virtual void finish_mode (machine_mode
)
1332 op_by_pieces_d (unsigned int, rtx
, bool, rtx
, bool, by_pieces_constfn
,
1333 void *, unsigned HOST_WIDE_INT
, unsigned int, bool,
1338 /* The constructor for an op_by_pieces_d structure. We require two
1339 objects named TO and FROM, which are identified as loads or stores
1340 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1341 and its associated FROM_CFN_DATA can be used to replace loads with
1342 constant values. MAX_PIECES describes the maximum number of bytes
1343 at a time which can be moved efficiently. LEN describes the length
1344 of the operation. */
1346 op_by_pieces_d::op_by_pieces_d (unsigned int max_pieces
, rtx to
,
1347 bool to_load
, rtx from
, bool from_load
,
1348 by_pieces_constfn from_cfn
,
1349 void *from_cfn_data
,
1350 unsigned HOST_WIDE_INT len
,
1351 unsigned int align
, bool push
,
1352 bool qi_vector_mode
)
1353 : m_to (to
, to_load
, NULL
, NULL
),
1354 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1355 m_len (len
), m_max_size (max_pieces
+ 1),
1356 m_push (push
), m_qi_vector_mode (qi_vector_mode
)
1358 int toi
= m_to
.get_addr_inc ();
1359 int fromi
= m_from
.get_addr_inc ();
1360 if (toi
>= 0 && fromi
>= 0)
1362 else if (toi
<= 0 && fromi
<= 0)
1367 m_offset
= m_reverse
? len
: 0;
1368 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1369 from
? MEM_ALIGN (from
) : align
);
1371 /* If copying requires more than two move insns,
1372 copy addresses to registers (to make displacements shorter)
1373 and use post-increment if available. */
1374 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1376 /* Find the mode of the largest comparison. */
1377 fixed_size_mode mode
1378 = widest_fixed_size_mode_for_size (m_max_size
,
1381 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1382 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1385 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1388 m_overlap_op_by_pieces
= targetm
.overlap_op_by_pieces_p ();
1391 /* This function returns the largest usable integer mode for LEN bytes
1392 whose size is no bigger than size of MODE. */
1395 op_by_pieces_d::get_usable_mode (fixed_size_mode mode
, unsigned int len
)
1400 size
= GET_MODE_SIZE (mode
);
1401 if (len
>= size
&& prepare_mode (mode
, m_align
))
1403 /* widest_fixed_size_mode_for_size checks SIZE > 1. */
1404 mode
= widest_fixed_size_mode_for_size (size
, m_qi_vector_mode
);
1410 /* Return the smallest integer or QI vector mode that is not narrower
1414 op_by_pieces_d::smallest_fixed_size_mode_for_size (unsigned int size
)
1416 /* Use QI vector only for > size of WORD. */
1417 if (m_qi_vector_mode
&& size
> UNITS_PER_WORD
)
1420 fixed_size_mode candidate
;
1421 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_INT
)
1422 if (is_a
<fixed_size_mode
> (mode
, &candidate
)
1423 && GET_MODE_INNER (candidate
) == QImode
)
1425 /* Don't return a mode wider than M_LEN. */
1426 if (GET_MODE_SIZE (candidate
) > m_len
)
1429 if (GET_MODE_SIZE (candidate
) >= size
1430 && (optab_handler (vec_duplicate_optab
, candidate
)
1431 != CODE_FOR_nothing
))
1436 return smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
1439 /* This function contains the main loop used for expanding a block
1440 operation. First move what we can in the largest integer mode,
1441 then go to successively smaller modes. For every access, call
1442 GENFUN with the two operands and the EXTRA_DATA. */
1445 op_by_pieces_d::run ()
1450 unsigned HOST_WIDE_INT length
= m_len
;
1452 /* widest_fixed_size_mode_for_size checks M_MAX_SIZE > 1. */
1453 fixed_size_mode mode
1454 = widest_fixed_size_mode_for_size (m_max_size
, m_qi_vector_mode
);
1455 mode
= get_usable_mode (mode
, length
);
1457 by_pieces_prev to_prev
= { nullptr, mode
};
1458 by_pieces_prev from_prev
= { nullptr, mode
};
1462 unsigned int size
= GET_MODE_SIZE (mode
);
1463 rtx to1
= NULL_RTX
, from1
;
1465 while (length
>= size
)
1470 to1
= m_to
.adjust (mode
, m_offset
, &to_prev
);
1472 to_prev
.mode
= mode
;
1473 from1
= m_from
.adjust (mode
, m_offset
, &from_prev
);
1474 from_prev
.data
= from1
;
1475 from_prev
.mode
= mode
;
1477 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1478 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1480 generate (to1
, from1
, mode
);
1482 m_to
.maybe_postinc (size
);
1483 m_from
.maybe_postinc (size
);
1496 if (!m_push
&& m_overlap_op_by_pieces
)
1498 /* NB: Generate overlapping operations if it is not a stack
1499 push since stack push must not overlap. Get the smallest
1500 fixed size mode for M_LEN bytes. */
1501 mode
= smallest_fixed_size_mode_for_size (length
);
1502 mode
= get_usable_mode (mode
, GET_MODE_SIZE (mode
));
1503 int gap
= GET_MODE_SIZE (mode
) - length
;
1506 /* If size of MODE > M_LEN, generate the last operation
1507 in MODE for the remaining bytes with ovelapping memory
1508 from the previois operation. */
1518 /* widest_fixed_size_mode_for_size checks SIZE > 1. */
1519 mode
= widest_fixed_size_mode_for_size (size
,
1521 mode
= get_usable_mode (mode
, length
);
1527 /* Derived class from op_by_pieces_d, providing support for block move
1530 #ifdef PUSH_ROUNDING
1531 #define PUSHG_P(to) ((to) == nullptr)
1533 #define PUSHG_P(to) false
1536 class move_by_pieces_d
: public op_by_pieces_d
1538 insn_gen_fn m_gen_fun
;
1539 void generate (rtx
, rtx
, machine_mode
) final override
;
1540 bool prepare_mode (machine_mode
, unsigned int) final override
;
1543 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1545 : op_by_pieces_d (MOVE_MAX_PIECES
, to
, false, from
, true, NULL
,
1546 NULL
, len
, align
, PUSHG_P (to
))
1549 rtx
finish_retmode (memop_ret
);
1552 /* Return true if MODE can be used for a set of copies, given an
1553 alignment ALIGN. Prepare whatever data is necessary for later
1554 calls to generate. */
1557 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1559 insn_code icode
= optab_handler (mov_optab
, mode
);
1560 m_gen_fun
= GEN_FCN (icode
);
1561 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1564 /* A callback used when iterating for a compare_by_pieces_operation.
1565 OP0 and OP1 are the values that have been loaded and should be
1566 compared in MODE. If OP0 is NULL, this means we should generate a
1567 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1568 gen function that should be used to generate the mode. */
1571 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1572 machine_mode mode ATTRIBUTE_UNUSED
)
1574 #ifdef PUSH_ROUNDING
1575 if (op0
== NULL_RTX
)
1577 emit_single_push_insn (mode
, op1
, NULL
);
1581 emit_insn (m_gen_fun (op0
, op1
));
1584 /* Perform the final adjustment at the end of a string to obtain the
1585 correct return value for the block operation.
1586 Return value is based on RETMODE argument. */
1589 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1591 gcc_assert (!m_reverse
);
1592 if (retmode
== RETURN_END_MINUS_ONE
)
1594 m_to
.maybe_postinc (-1);
1597 return m_to
.adjust (QImode
, m_offset
);
1600 /* Generate several move instructions to copy LEN bytes from block FROM to
1601 block TO. (These are MEM rtx's with BLKmode).
1603 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1604 used to push FROM to the stack.
1606 ALIGN is maximum stack alignment we can assume.
1608 Return value is based on RETMODE argument. */
1611 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1612 unsigned int align
, memop_ret retmode
)
1614 #ifndef PUSH_ROUNDING
1619 move_by_pieces_d
data (to
, from
, len
, align
);
1623 if (retmode
!= RETURN_BEGIN
)
1624 return data
.finish_retmode (retmode
);
1629 /* Derived class from op_by_pieces_d, providing support for block move
1632 class store_by_pieces_d
: public op_by_pieces_d
1634 insn_gen_fn m_gen_fun
;
1635 void generate (rtx
, rtx
, machine_mode
) final override
;
1636 bool prepare_mode (machine_mode
, unsigned int) final override
;
1639 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1640 unsigned HOST_WIDE_INT len
, unsigned int align
,
1641 bool qi_vector_mode
)
1642 : op_by_pieces_d (STORE_MAX_PIECES
, to
, false, NULL_RTX
, true, cfn
,
1643 cfn_data
, len
, align
, false, qi_vector_mode
)
1646 rtx
finish_retmode (memop_ret
);
1649 /* Return true if MODE can be used for a set of stores, given an
1650 alignment ALIGN. Prepare whatever data is necessary for later
1651 calls to generate. */
1654 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1656 insn_code icode
= optab_handler (mov_optab
, mode
);
1657 m_gen_fun
= GEN_FCN (icode
);
1658 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1661 /* A callback used when iterating for a store_by_pieces_operation.
1662 OP0 and OP1 are the values that have been loaded and should be
1663 compared in MODE. If OP0 is NULL, this means we should generate a
1664 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1665 gen function that should be used to generate the mode. */
1668 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1670 emit_insn (m_gen_fun (op0
, op1
));
1673 /* Perform the final adjustment at the end of a string to obtain the
1674 correct return value for the block operation.
1675 Return value is based on RETMODE argument. */
1678 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1680 gcc_assert (!m_reverse
);
1681 if (retmode
== RETURN_END_MINUS_ONE
)
1683 m_to
.maybe_postinc (-1);
1686 return m_to
.adjust (QImode
, m_offset
);
1689 /* Determine whether the LEN bytes generated by CONSTFUN can be
1690 stored to memory using several move instructions. CONSTFUNDATA is
1691 a pointer which will be passed as argument in every CONSTFUN call.
1692 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1693 a memset operation and false if it's a copy of a constant string.
1694 Return true if a call to store_by_pieces should succeed. */
1697 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1698 by_pieces_constfn constfun
,
1699 void *constfundata
, unsigned int align
, bool memsetp
)
1701 unsigned HOST_WIDE_INT l
;
1702 unsigned int max_size
;
1703 HOST_WIDE_INT offset
= 0;
1704 enum insn_code icode
;
1706 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1707 rtx cst ATTRIBUTE_UNUSED
;
1712 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1716 optimize_insn_for_speed_p ()))
1719 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1721 /* We would first store what we can in the largest integer mode, then go to
1722 successively smaller modes. */
1725 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1729 max_size
= STORE_MAX_PIECES
+ 1;
1730 while (max_size
> 1 && l
> 0)
1732 fixed_size_mode mode
1733 = widest_fixed_size_mode_for_size (max_size
, memsetp
);
1735 icode
= optab_handler (mov_optab
, mode
);
1736 if (icode
!= CODE_FOR_nothing
1737 && align
>= GET_MODE_ALIGNMENT (mode
))
1739 unsigned int size
= GET_MODE_SIZE (mode
);
1746 cst
= (*constfun
) (constfundata
, nullptr, offset
, mode
);
1747 /* All CONST_VECTORs can be loaded for memset since
1748 vec_duplicate_optab is a precondition to pick a
1749 vector mode for the memset expander. */
1750 if (!((memsetp
&& VECTOR_MODE_P (mode
))
1751 || targetm
.legitimate_constant_p (mode
, cst
)))
1761 max_size
= GET_MODE_SIZE (mode
);
1764 /* The code above should have handled everything. */
1771 /* Generate several move instructions to store LEN bytes generated by
1772 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1773 pointer which will be passed as argument in every CONSTFUN call.
1774 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1775 a memset operation and false if it's a copy of a constant string.
1776 Return value is based on RETMODE argument. */
1779 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1780 by_pieces_constfn constfun
,
1781 void *constfundata
, unsigned int align
, bool memsetp
,
1786 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1790 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1792 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1793 optimize_insn_for_speed_p ()));
1795 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
,
1799 if (retmode
!= RETURN_BEGIN
)
1800 return data
.finish_retmode (retmode
);
1805 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1806 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1809 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1814 /* Use builtin_memset_read_str to support vector mode broadcast. */
1816 store_by_pieces_d
data (to
, builtin_memset_read_str
, &c
, len
, align
,
1821 /* Context used by compare_by_pieces_genfn. It stores the fail label
1822 to jump to in case of miscomparison, and for branch ratios greater than 1,
1823 it stores an accumulator and the current and maximum counts before
1824 emitting another branch. */
1826 class compare_by_pieces_d
: public op_by_pieces_d
1828 rtx_code_label
*m_fail_label
;
1830 int m_count
, m_batch
;
1832 void generate (rtx
, rtx
, machine_mode
) final override
;
1833 bool prepare_mode (machine_mode
, unsigned int) final override
;
1834 void finish_mode (machine_mode
) final override
;
1836 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1837 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1838 rtx_code_label
*fail_label
)
1839 : op_by_pieces_d (COMPARE_MAX_PIECES
, op0
, true, op1
, true, op1_cfn
,
1840 op1_cfn_data
, len
, align
, false)
1842 m_fail_label
= fail_label
;
1846 /* A callback used when iterating for a compare_by_pieces_operation.
1847 OP0 and OP1 are the values that have been loaded and should be
1848 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1849 context structure. */
1852 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1856 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1857 true, OPTAB_LIB_WIDEN
);
1859 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1860 true, OPTAB_LIB_WIDEN
);
1861 m_accumulator
= temp
;
1863 if (++m_count
< m_batch
)
1867 op0
= m_accumulator
;
1869 m_accumulator
= NULL_RTX
;
1871 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1872 m_fail_label
, profile_probability::uninitialized ());
1875 /* Return true if MODE can be used for a set of moves and comparisons,
1876 given an alignment ALIGN. Prepare whatever data is necessary for
1877 later calls to generate. */
1880 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1882 insn_code icode
= optab_handler (mov_optab
, mode
);
1883 if (icode
== CODE_FOR_nothing
1884 || align
< GET_MODE_ALIGNMENT (mode
)
1885 || !can_compare_p (EQ
, mode
, ccp_jump
))
1887 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1890 m_accumulator
= NULL_RTX
;
1895 /* Called after expanding a series of comparisons in MODE. If we have
1896 accumulated results for which we haven't emitted a branch yet, do
1900 compare_by_pieces_d::finish_mode (machine_mode mode
)
1902 if (m_accumulator
!= NULL_RTX
)
1903 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1904 NULL_RTX
, NULL
, m_fail_label
,
1905 profile_probability::uninitialized ());
1908 /* Generate several move instructions to compare LEN bytes from blocks
1909 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1911 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1912 used to push FROM to the stack.
1914 ALIGN is maximum stack alignment we can assume.
1916 Optionally, the caller can pass a constfn and associated data in A1_CFN
1917 and A1_CFN_DATA. describing that the second operand being compared is a
1918 known constant and how to obtain its data. */
1921 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1922 rtx target
, unsigned int align
,
1923 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1925 rtx_code_label
*fail_label
= gen_label_rtx ();
1926 rtx_code_label
*end_label
= gen_label_rtx ();
1928 if (target
== NULL_RTX
1929 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1930 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1932 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1937 emit_move_insn (target
, const0_rtx
);
1938 emit_jump (end_label
);
1940 emit_label (fail_label
);
1941 emit_move_insn (target
, const1_rtx
);
1942 emit_label (end_label
);
1947 /* Emit code to move a block Y to a block X. This may be done with
1948 string-move instructions, with multiple scalar move instructions,
1949 or with a library call.
1951 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1952 SIZE is an rtx that says how long they are.
1953 ALIGN is the maximum alignment we can assume they have.
1954 METHOD describes what kind of copy this is, and what mechanisms may be used.
1955 MIN_SIZE is the minimal size of block to move
1956 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1957 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1959 Return the address of the new block, if memcpy is called and returns it,
1963 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1964 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1965 unsigned HOST_WIDE_INT min_size
,
1966 unsigned HOST_WIDE_INT max_size
,
1967 unsigned HOST_WIDE_INT probable_max_size
,
1968 bool bail_out_libcall
, bool *is_move_done
,
1976 *is_move_done
= true;
1979 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1984 case BLOCK_OP_NORMAL
:
1985 case BLOCK_OP_TAILCALL
:
1989 case BLOCK_OP_CALL_PARM
:
1990 may_use_call
= block_move_libcall_safe_for_call_parm ();
1992 /* Make inhibit_defer_pop nonzero around the library call
1993 to force it to pop the arguments right away. */
1997 case BLOCK_OP_NO_LIBCALL
:
2001 case BLOCK_OP_NO_LIBCALL_RET
:
2009 gcc_assert (MEM_P (x
) && MEM_P (y
));
2010 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2011 gcc_assert (align
>= BITS_PER_UNIT
);
2013 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
2014 block copy is more efficient for other large modes, e.g. DCmode. */
2015 x
= adjust_address (x
, BLKmode
, 0);
2016 y
= adjust_address (y
, BLKmode
, 0);
2018 /* If source and destination are the same, no need to copy anything. */
2019 if (rtx_equal_p (x
, y
)
2020 && !MEM_VOLATILE_P (x
)
2021 && !MEM_VOLATILE_P (y
))
2024 /* Set MEM_SIZE as appropriate for this block copy. The main place this
2025 can be incorrect is coming from __builtin_memcpy. */
2026 poly_int64 const_size
;
2027 if (poly_int_rtx_p (size
, &const_size
))
2029 x
= shallow_copy_rtx (x
);
2030 y
= shallow_copy_rtx (y
);
2031 set_mem_size (x
, const_size
);
2032 set_mem_size (y
, const_size
);
2035 bool pieces_ok
= CONST_INT_P (size
)
2036 && can_move_by_pieces (INTVAL (size
), align
);
2037 bool pattern_ok
= false;
2039 if (!pieces_ok
|| might_overlap
)
2042 = emit_block_move_via_pattern (x
, y
, size
, align
,
2043 expected_align
, expected_size
,
2044 min_size
, max_size
, probable_max_size
,
2046 if (!pattern_ok
&& might_overlap
)
2048 /* Do not try any of the other methods below as they are not safe
2049 for overlapping moves. */
2050 *is_move_done
= false;
2058 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
2059 else if (may_use_call
&& !might_overlap
2060 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
2061 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
2063 if (bail_out_libcall
)
2066 *is_move_done
= false;
2070 if (may_use_call
< 0)
2073 retval
= emit_block_copy_via_libcall (x
, y
, size
,
2074 method
== BLOCK_OP_TAILCALL
);
2076 else if (might_overlap
)
2077 *is_move_done
= false;
2079 emit_block_move_via_loop (x
, y
, size
, align
);
2081 if (method
== BLOCK_OP_CALL_PARM
)
2088 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
2090 unsigned HOST_WIDE_INT max
, min
= 0;
2091 if (GET_CODE (size
) == CONST_INT
)
2092 min
= max
= UINTVAL (size
);
2094 max
= GET_MODE_MASK (GET_MODE (size
));
2095 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
2099 /* A subroutine of emit_block_move. Returns true if calling the
2100 block move libcall will not clobber any parameters which may have
2101 already been placed on the stack. */
2104 block_move_libcall_safe_for_call_parm (void)
2108 /* If arguments are pushed on the stack, then they're safe. */
2109 if (targetm
.calls
.push_argument (0))
2112 /* If registers go on the stack anyway, any argument is sure to clobber
2113 an outgoing argument. */
2114 #if defined (REG_PARM_STACK_SPACE)
2115 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
2116 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
2117 depend on its argument. */
2119 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
2120 && REG_PARM_STACK_SPACE (fn
) != 0)
2124 /* If any argument goes in memory, then it might clobber an outgoing
2127 CUMULATIVE_ARGS args_so_far_v
;
2128 cumulative_args_t args_so_far
;
2131 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
2132 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
2133 args_so_far
= pack_cumulative_args (&args_so_far_v
);
2135 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
2136 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
2138 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
2139 function_arg_info
arg_info (mode
, /*named=*/true);
2140 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
2141 if (!tmp
|| !REG_P (tmp
))
2143 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
2145 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
2151 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
2152 return true if successful.
2154 X is the destination of the copy or move.
2155 Y is the source of the copy or move.
2156 SIZE is the size of the block to be moved.
2158 MIGHT_OVERLAP indicates this originated with expansion of a
2159 builtin_memmove() and the source and destination blocks may
2164 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
2165 unsigned int expected_align
,
2166 HOST_WIDE_INT expected_size
,
2167 unsigned HOST_WIDE_INT min_size
,
2168 unsigned HOST_WIDE_INT max_size
,
2169 unsigned HOST_WIDE_INT probable_max_size
,
2172 if (expected_align
< align
)
2173 expected_align
= align
;
2174 if (expected_size
!= -1)
2176 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
2177 expected_size
= probable_max_size
;
2178 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
2179 expected_size
= min_size
;
2182 /* Since this is a move insn, we don't care about volatility. */
2183 temporary_volatile_ok
v (true);
2185 /* Try the most limited insn first, because there's no point
2186 including more than one in the machine description unless
2187 the more limited one has some advantage. */
2189 opt_scalar_int_mode mode_iter
;
2190 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2192 scalar_int_mode mode
= mode_iter
.require ();
2193 enum insn_code code
;
2195 code
= direct_optab_handler (movmem_optab
, mode
);
2197 code
= direct_optab_handler (cpymem_optab
, mode
);
2199 if (code
!= CODE_FOR_nothing
2200 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2201 here because if SIZE is less than the mode mask, as it is
2202 returned by the macro, it will definitely be less than the
2203 actual mode mask. Since SIZE is within the Pmode address
2204 space, we limit MODE to Pmode. */
2205 && ((CONST_INT_P (size
)
2206 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
2207 <= (GET_MODE_MASK (mode
) >> 1)))
2208 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
2209 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
2211 class expand_operand ops
[9];
2214 /* ??? When called via emit_block_move_for_call, it'd be
2215 nice if there were some way to inform the backend, so
2216 that it doesn't fail the expansion because it thinks
2217 emitting the libcall would be more efficient. */
2218 nops
= insn_data
[(int) code
].n_generator_args
;
2219 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
2221 create_fixed_operand (&ops
[0], x
);
2222 create_fixed_operand (&ops
[1], y
);
2223 /* The check above guarantees that this size conversion is valid. */
2224 create_convert_operand_to (&ops
[2], size
, mode
, true);
2225 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
2228 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
2229 create_integer_operand (&ops
[5], expected_size
);
2233 create_integer_operand (&ops
[6], min_size
);
2234 /* If we cannot represent the maximal size,
2235 make parameter NULL. */
2236 if ((HOST_WIDE_INT
) max_size
!= -1)
2237 create_integer_operand (&ops
[7], max_size
);
2239 create_fixed_operand (&ops
[7], NULL
);
2243 /* If we cannot represent the maximal size,
2244 make parameter NULL. */
2245 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
2246 create_integer_operand (&ops
[8], probable_max_size
);
2248 create_fixed_operand (&ops
[8], NULL
);
2250 if (maybe_expand_insn (code
, nops
, ops
))
2258 /* A subroutine of emit_block_move. Copy the data via an explicit
2259 loop. This is used only when libcalls are forbidden. */
2260 /* ??? It'd be nice to copy in hunks larger than QImode. */
2263 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
2264 unsigned int align ATTRIBUTE_UNUSED
)
2266 rtx_code_label
*cmp_label
, *top_label
;
2267 rtx iter
, x_addr
, y_addr
, tmp
;
2268 machine_mode x_addr_mode
= get_address_mode (x
);
2269 machine_mode y_addr_mode
= get_address_mode (y
);
2270 machine_mode iter_mode
;
2272 iter_mode
= GET_MODE (size
);
2273 if (iter_mode
== VOIDmode
)
2274 iter_mode
= word_mode
;
2276 top_label
= gen_label_rtx ();
2277 cmp_label
= gen_label_rtx ();
2278 iter
= gen_reg_rtx (iter_mode
);
2280 emit_move_insn (iter
, const0_rtx
);
2282 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
2283 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
2284 do_pending_stack_adjust ();
2286 emit_jump (cmp_label
);
2287 emit_label (top_label
);
2289 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
2290 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
2292 if (x_addr_mode
!= y_addr_mode
)
2293 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
2294 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
2296 x
= change_address (x
, QImode
, x_addr
);
2297 y
= change_address (y
, QImode
, y_addr
);
2299 emit_move_insn (x
, y
);
2301 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
2302 true, OPTAB_LIB_WIDEN
);
2304 emit_move_insn (iter
, tmp
);
2306 emit_label (cmp_label
);
2308 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
2310 profile_probability::guessed_always ()
2311 .apply_scale (9, 10));
2314 /* Expand a call to memcpy or memmove or memcmp, and return the result.
2315 TAILCALL is true if this is a tail call. */
2318 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
2319 rtx size
, bool tailcall
)
2321 rtx dst_addr
, src_addr
;
2322 tree call_expr
, dst_tree
, src_tree
, size_tree
;
2323 machine_mode size_mode
;
2325 /* Since dst and src are passed to a libcall, mark the corresponding
2326 tree EXPR as addressable. */
2327 tree dst_expr
= MEM_EXPR (dst
);
2328 tree src_expr
= MEM_EXPR (src
);
2330 mark_addressable (dst_expr
);
2332 mark_addressable (src_expr
);
2334 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
2335 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
2336 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
2338 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
2339 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
2340 src_tree
= make_tree (ptr_type_node
, src_addr
);
2342 size_mode
= TYPE_MODE (sizetype
);
2343 size
= convert_to_mode (size_mode
, size
, 1);
2344 size
= copy_to_mode_reg (size_mode
, size
);
2345 size_tree
= make_tree (sizetype
, size
);
2347 /* It is incorrect to use the libcall calling conventions for calls to
2348 memcpy/memmove/memcmp because they can be provided by the user. */
2349 tree fn
= builtin_decl_implicit (fncode
);
2350 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
2351 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
2353 return expand_call (call_expr
, NULL_RTX
, false);
2356 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
2357 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
2358 otherwise return null. */
2361 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
2362 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
2363 HOST_WIDE_INT align
)
2365 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
2367 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
2370 class expand_operand ops
[5];
2371 create_output_operand (&ops
[0], target
, insn_mode
);
2372 create_fixed_operand (&ops
[1], arg1_rtx
);
2373 create_fixed_operand (&ops
[2], arg2_rtx
);
2374 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
2375 TYPE_UNSIGNED (arg3_type
));
2376 create_integer_operand (&ops
[4], align
);
2377 if (maybe_expand_insn (icode
, 5, ops
))
2378 return ops
[0].value
;
2382 /* Expand a block compare between X and Y with length LEN using the
2383 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2384 of the expression that was used to calculate the length. ALIGN
2385 gives the known minimum common alignment. */
2388 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2391 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2392 implementing memcmp because it will stop if it encounters two
2394 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2396 if (icode
== CODE_FOR_nothing
)
2399 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2402 /* Emit code to compare a block Y to a block X. This may be done with
2403 string-compare instructions, with multiple scalar instructions,
2404 or with a library call.
2406 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2407 they are. LEN_TYPE is the type of the expression that was used to
2410 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2411 value of a normal memcmp call, instead we can just compare for equality.
2412 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2415 Optionally, the caller can pass a constfn and associated data in Y_CFN
2416 and Y_CFN_DATA. describing that the second operand being compared is a
2417 known constant and how to obtain its data.
2418 Return the result of the comparison, or NULL_RTX if we failed to
2419 perform the operation. */
2422 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2423 bool equality_only
, by_pieces_constfn y_cfn
,
2428 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2431 gcc_assert (MEM_P (x
) && MEM_P (y
));
2432 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2433 gcc_assert (align
>= BITS_PER_UNIT
);
2435 x
= adjust_address (x
, BLKmode
, 0);
2436 y
= adjust_address (y
, BLKmode
, 0);
2439 && CONST_INT_P (len
)
2440 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2441 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2444 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2449 /* Copy all or part of a value X into registers starting at REGNO.
2450 The number of registers to be filled is NREGS. */
2453 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2458 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2459 x
= validize_mem (force_const_mem (mode
, x
));
2461 /* See if the machine can do this with a load multiple insn. */
2462 if (targetm
.have_load_multiple ())
2464 rtx_insn
*last
= get_last_insn ();
2465 rtx first
= gen_rtx_REG (word_mode
, regno
);
2466 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2473 delete_insns_since (last
);
2476 for (int i
= 0; i
< nregs
; i
++)
2477 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2478 operand_subword_force (x
, i
, mode
));
2481 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2482 The number of registers to be filled is NREGS. */
2485 move_block_from_reg (int regno
, rtx x
, int nregs
)
2490 /* See if the machine can do this with a store multiple insn. */
2491 if (targetm
.have_store_multiple ())
2493 rtx_insn
*last
= get_last_insn ();
2494 rtx first
= gen_rtx_REG (word_mode
, regno
);
2495 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2502 delete_insns_since (last
);
2505 for (int i
= 0; i
< nregs
; i
++)
2507 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2511 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2515 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2516 ORIG, where ORIG is a non-consecutive group of registers represented by
2517 a PARALLEL. The clone is identical to the original except in that the
2518 original set of registers is replaced by a new set of pseudo registers.
2519 The new set has the same modes as the original set. */
2522 gen_group_rtx (rtx orig
)
2527 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2529 length
= XVECLEN (orig
, 0);
2530 tmps
= XALLOCAVEC (rtx
, length
);
2532 /* Skip a NULL entry in first slot. */
2533 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2538 for (; i
< length
; i
++)
2540 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2541 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2543 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2546 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2549 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2550 except that values are placed in TMPS[i], and must later be moved
2551 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2554 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2559 machine_mode m
= GET_MODE (orig_src
);
2561 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2564 && !SCALAR_INT_MODE_P (m
)
2565 && !MEM_P (orig_src
)
2566 && GET_CODE (orig_src
) != CONCAT
)
2568 scalar_int_mode imode
;
2569 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2571 src
= gen_reg_rtx (imode
);
2572 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2576 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2577 emit_move_insn (src
, orig_src
);
2579 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2583 /* Check for a NULL entry, used to indicate that the parameter goes
2584 both on the stack and in registers. */
2585 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2590 /* Process the pieces. */
2591 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2593 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2594 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2595 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2596 poly_int64 shift
= 0;
2598 /* Handle trailing fragments that run over the size of the struct.
2599 It's the target's responsibility to make sure that the fragment
2600 cannot be strictly smaller in some cases and strictly larger
2602 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2603 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2605 /* Arrange to shift the fragment to where it belongs.
2606 extract_bit_field loads to the lsb of the reg. */
2608 #ifdef BLOCK_REG_PADDING
2609 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2610 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2615 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2616 bytelen
= ssize
- bytepos
;
2617 gcc_assert (maybe_gt (bytelen
, 0));
2620 /* If we won't be loading directly from memory, protect the real source
2621 from strange tricks we might play; but make sure that the source can
2622 be loaded directly into the destination. */
2624 if (!MEM_P (orig_src
)
2625 && (!REG_P (orig_src
) || HARD_REGISTER_P (orig_src
))
2626 && !CONSTANT_P (orig_src
))
2628 gcc_assert (GET_MODE (orig_src
) != VOIDmode
);
2629 src
= force_reg (GET_MODE (orig_src
), orig_src
);
2632 /* Optimize the access just a bit. */
2634 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2635 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2636 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2637 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2639 tmps
[i
] = gen_reg_rtx (mode
);
2640 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2642 else if (COMPLEX_MODE_P (mode
)
2643 && GET_MODE (src
) == mode
2644 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2645 /* Let emit_move_complex do the bulk of the work. */
2647 else if (GET_CODE (src
) == CONCAT
)
2649 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2650 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2654 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2655 && known_le (subpos
+ bytelen
, slen0
))
2657 /* The following assumes that the concatenated objects all
2658 have the same size. In this case, a simple calculation
2659 can be used to determine the object and the bit field
2661 tmps
[i
] = XEXP (src
, elt
);
2662 if (maybe_ne (subpos
, 0)
2663 || maybe_ne (subpos
+ bytelen
, slen0
)
2664 || (!CONSTANT_P (tmps
[i
])
2665 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2666 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2667 subpos
* BITS_PER_UNIT
,
2668 1, NULL_RTX
, mode
, mode
, false,
2675 gcc_assert (known_eq (bytepos
, 0));
2676 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2677 emit_move_insn (mem
, src
);
2678 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2679 0, 1, NULL_RTX
, mode
, mode
, false,
2683 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2684 && XVECLEN (dst
, 0) > 1)
2685 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2686 else if (CONSTANT_P (src
))
2688 if (known_eq (bytelen
, ssize
))
2694 /* TODO: const_wide_int can have sizes other than this... */
2695 gcc_assert (known_eq (2 * bytelen
, ssize
));
2696 split_double (src
, &first
, &second
);
2703 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2706 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2707 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2708 mode
, mode
, false, NULL
);
2710 if (maybe_ne (shift
, 0))
2711 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2716 /* Emit code to move a block SRC of type TYPE to a block DST,
2717 where DST is non-consecutive registers represented by a PARALLEL.
2718 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2722 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2727 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2728 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2730 /* Copy the extracted pieces into the proper (probable) hard regs. */
2731 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2733 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2736 emit_move_insn (d
, tmps
[i
]);
2740 /* Similar, but load SRC into new pseudos in a format that looks like
2741 PARALLEL. This can later be fed to emit_group_move to get things
2742 in the right place. */
2745 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2750 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2751 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2753 /* Convert the vector to look just like the original PARALLEL, except
2754 with the computed values. */
2755 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2757 rtx e
= XVECEXP (parallel
, 0, i
);
2758 rtx d
= XEXP (e
, 0);
2762 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2763 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2765 RTVEC_ELT (vec
, i
) = e
;
2768 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2771 /* Emit code to move a block SRC to block DST, where SRC and DST are
2772 non-consecutive groups of registers, each represented by a PARALLEL. */
2775 emit_group_move (rtx dst
, rtx src
)
2779 gcc_assert (GET_CODE (src
) == PARALLEL
2780 && GET_CODE (dst
) == PARALLEL
2781 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2783 /* Skip first entry if NULL. */
2784 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2785 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2786 XEXP (XVECEXP (src
, 0, i
), 0));
2789 /* Move a group of registers represented by a PARALLEL into pseudos. */
2792 emit_group_move_into_temps (rtx src
)
2794 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2797 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2799 rtx e
= XVECEXP (src
, 0, i
);
2800 rtx d
= XEXP (e
, 0);
2803 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2804 RTVEC_ELT (vec
, i
) = e
;
2807 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2810 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2811 where SRC is non-consecutive registers represented by a PARALLEL.
2812 SSIZE represents the total size of block ORIG_DST, or -1 if not
2816 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2820 int start
, finish
, i
;
2821 machine_mode m
= GET_MODE (orig_dst
);
2823 gcc_assert (GET_CODE (src
) == PARALLEL
);
2825 if (!SCALAR_INT_MODE_P (m
)
2826 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2828 scalar_int_mode imode
;
2829 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2831 dst
= gen_reg_rtx (imode
);
2832 emit_group_store (dst
, src
, type
, ssize
);
2833 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2837 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2838 emit_group_store (dst
, src
, type
, ssize
);
2840 emit_move_insn (orig_dst
, dst
);
2844 /* Check for a NULL entry, used to indicate that the parameter goes
2845 both on the stack and in registers. */
2846 if (XEXP (XVECEXP (src
, 0, 0), 0))
2850 finish
= XVECLEN (src
, 0);
2852 tmps
= XALLOCAVEC (rtx
, finish
);
2854 /* Copy the (probable) hard regs into pseudos. */
2855 for (i
= start
; i
< finish
; i
++)
2857 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2858 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2860 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2861 emit_move_insn (tmps
[i
], reg
);
2867 /* If we won't be storing directly into memory, protect the real destination
2868 from strange tricks we might play. */
2870 if (GET_CODE (dst
) == PARALLEL
)
2874 /* We can get a PARALLEL dst if there is a conditional expression in
2875 a return statement. In that case, the dst and src are the same,
2876 so no action is necessary. */
2877 if (rtx_equal_p (dst
, src
))
2880 /* It is unclear if we can ever reach here, but we may as well handle
2881 it. Allocate a temporary, and split this into a store/load to/from
2883 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2884 emit_group_store (temp
, src
, type
, ssize
);
2885 emit_group_load (dst
, temp
, type
, ssize
);
2888 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2890 machine_mode outer
= GET_MODE (dst
);
2896 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2897 dst
= gen_reg_rtx (outer
);
2899 /* Make life a bit easier for combine: if the first element of the
2900 vector is the low part of the destination mode, use a paradoxical
2901 subreg to initialize the destination. */
2904 inner
= GET_MODE (tmps
[start
]);
2905 bytepos
= subreg_lowpart_offset (inner
, outer
);
2906 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2909 temp
= simplify_gen_subreg (outer
, tmps
[start
], inner
, 0);
2912 emit_move_insn (dst
, temp
);
2919 /* If the first element wasn't the low part, try the last. */
2921 && start
< finish
- 1)
2923 inner
= GET_MODE (tmps
[finish
- 1]);
2924 bytepos
= subreg_lowpart_offset (inner
, outer
);
2925 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2929 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1], inner
, 0);
2932 emit_move_insn (dst
, temp
);
2939 /* Otherwise, simply initialize the result to zero. */
2941 emit_move_insn (dst
, CONST0_RTX (outer
));
2944 /* Process the pieces. */
2945 for (i
= start
; i
< finish
; i
++)
2947 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2948 machine_mode mode
= GET_MODE (tmps
[i
]);
2949 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2950 poly_uint64 adj_bytelen
;
2953 /* Handle trailing fragments that run over the size of the struct.
2954 It's the target's responsibility to make sure that the fragment
2955 cannot be strictly smaller in some cases and strictly larger
2957 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2958 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2959 adj_bytelen
= ssize
- bytepos
;
2961 adj_bytelen
= bytelen
;
2963 /* Deal with destination CONCATs by either storing into one of the parts
2964 or doing a copy after storing into a register or stack temporary. */
2965 if (GET_CODE (dst
) == CONCAT
)
2967 if (known_le (bytepos
+ adj_bytelen
,
2968 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2969 dest
= XEXP (dst
, 0);
2971 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2973 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2974 dest
= XEXP (dst
, 1);
2979 machine_mode dest_mode
= GET_MODE (dest
);
2980 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2981 scalar_int_mode dest_imode
;
2983 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2985 /* If the source is a single scalar integer register, and the
2986 destination has a complex mode for which a same-sized integer
2987 mode exists, then we can take the left-justified part of the
2988 source in the complex mode. */
2989 if (finish
== start
+ 1
2991 && SCALAR_INT_MODE_P (tmp_mode
)
2992 && COMPLEX_MODE_P (dest_mode
)
2993 && int_mode_for_mode (dest_mode
).exists (&dest_imode
))
2995 const scalar_int_mode tmp_imode
2996 = as_a
<scalar_int_mode
> (tmp_mode
);
2998 if (GET_MODE_BITSIZE (dest_imode
)
2999 < GET_MODE_BITSIZE (tmp_imode
))
3001 dest
= gen_reg_rtx (dest_imode
);
3002 if (BYTES_BIG_ENDIAN
)
3003 tmps
[i
] = expand_shift (RSHIFT_EXPR
, tmp_mode
, tmps
[i
],
3004 GET_MODE_BITSIZE (tmp_imode
)
3005 - GET_MODE_BITSIZE (dest_imode
),
3007 emit_move_insn (dest
, gen_lowpart (dest_imode
, tmps
[i
]));
3008 dst
= gen_lowpart (dest_mode
, dest
);
3011 dst
= gen_lowpart (dest_mode
, tmps
[i
]);
3014 /* Otherwise spill the source onto the stack using the more
3015 aligned of the two modes. */
3016 else if (GET_MODE_ALIGNMENT (dest_mode
)
3017 >= GET_MODE_ALIGNMENT (tmp_mode
))
3019 dest
= assign_stack_temp (dest_mode
,
3020 GET_MODE_SIZE (dest_mode
));
3021 emit_move_insn (adjust_address (dest
, tmp_mode
, bytepos
),
3028 dest
= assign_stack_temp (tmp_mode
,
3029 GET_MODE_SIZE (tmp_mode
));
3030 emit_move_insn (dest
, tmps
[i
]);
3031 dst
= adjust_address (dest
, dest_mode
, bytepos
);
3038 /* Handle trailing fragments that run over the size of the struct. */
3039 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
3041 /* store_bit_field always takes its value from the lsb.
3042 Move the fragment to the lsb if it's not already there. */
3044 #ifdef BLOCK_REG_PADDING
3045 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
3046 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
3052 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
3053 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
3057 /* Make sure not to write past the end of the struct. */
3058 store_bit_field (dest
,
3059 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
3060 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
3061 VOIDmode
, tmps
[i
], false, false);
3064 /* Optimize the access just a bit. */
3065 else if (MEM_P (dest
)
3066 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
3067 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
3068 && multiple_p (bytepos
* BITS_PER_UNIT
,
3069 GET_MODE_ALIGNMENT (mode
))
3070 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
3071 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
3074 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
3075 0, 0, mode
, tmps
[i
], false, false);
3078 /* Copy from the pseudo into the (probable) hard reg. */
3079 if (orig_dst
!= dst
)
3080 emit_move_insn (orig_dst
, dst
);
3083 /* Return a form of X that does not use a PARALLEL. TYPE is the type
3084 of the value stored in X. */
3087 maybe_emit_group_store (rtx x
, tree type
)
3089 machine_mode mode
= TYPE_MODE (type
);
3090 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
3091 if (GET_CODE (x
) == PARALLEL
)
3093 rtx result
= gen_reg_rtx (mode
);
3094 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
3100 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
3102 This is used on targets that return BLKmode values in registers. */
3105 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
3107 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
3108 rtx src
= NULL
, dst
= NULL
;
3109 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
3110 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
3111 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
3112 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
3113 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
3114 fixed_size_mode copy_mode
;
3116 /* BLKmode registers created in the back-end shouldn't have survived. */
3117 gcc_assert (mode
!= BLKmode
);
3119 /* If the structure doesn't take up a whole number of words, see whether
3120 SRCREG is padded on the left or on the right. If it's on the left,
3121 set PADDING_CORRECTION to the number of bits to skip.
3123 In most ABIs, the structure will be returned at the least end of
3124 the register, which translates to right padding on little-endian
3125 targets and left padding on big-endian targets. The opposite
3126 holds if the structure is returned at the most significant
3127 end of the register. */
3128 if (bytes
% UNITS_PER_WORD
!= 0
3129 && (targetm
.calls
.return_in_msb (type
)
3131 : BYTES_BIG_ENDIAN
))
3133 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
3135 /* We can use a single move if we have an exact mode for the size. */
3136 else if (MEM_P (target
)
3137 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
3138 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
3139 && bytes
== GET_MODE_SIZE (mode
))
3141 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
3145 /* And if we additionally have the same mode for a register. */
3146 else if (REG_P (target
)
3147 && GET_MODE (target
) == mode
3148 && bytes
== GET_MODE_SIZE (mode
))
3150 emit_move_insn (target
, srcreg
);
3154 /* This code assumes srcreg is at least a full word. If it isn't, copy it
3155 into a new pseudo which is a full word. */
3156 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
3158 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
3162 /* Copy the structure BITSIZE bits at a time. If the target lives in
3163 memory, take care of not reading/writing past its end by selecting
3164 a copy mode suited to BITSIZE. This should always be possible given
3167 If the target lives in register, make sure not to select a copy mode
3168 larger than the mode of the register.
3170 We could probably emit more efficient code for machines which do not use
3171 strict alignment, but it doesn't seem worth the effort at the current
3174 copy_mode
= word_mode
;
3177 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
3178 if (mem_mode
.exists ())
3179 copy_mode
= mem_mode
.require ();
3181 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
3184 for (bitpos
= 0, xbitpos
= padding_correction
;
3185 bitpos
< bytes
* BITS_PER_UNIT
;
3186 bitpos
+= bitsize
, xbitpos
+= bitsize
)
3188 /* We need a new source operand each time xbitpos is on a
3189 word boundary and when xbitpos == padding_correction
3190 (the first time through). */
3191 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
3192 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
3194 /* We need a new destination operand each time bitpos is on
3196 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
3198 else if (bitpos
% BITS_PER_WORD
== 0)
3199 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
3201 /* Use xbitpos for the source extraction (right justified) and
3202 bitpos for the destination store (left justified). */
3203 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
3204 extract_bit_field (src
, bitsize
,
3205 xbitpos
% BITS_PER_WORD
, 1,
3206 NULL_RTX
, copy_mode
, copy_mode
,
3212 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
3213 register if it contains any data, otherwise return null.
3215 This is used on targets that return BLKmode values in registers. */
3218 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
3221 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
3222 unsigned int bitsize
;
3223 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
3224 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
3225 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
3226 fixed_size_mode dst_mode
;
3227 scalar_int_mode min_mode
;
3229 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
3231 x
= expand_normal (src
);
3233 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
3237 /* If the structure doesn't take up a whole number of words, see
3238 whether the register value should be padded on the left or on
3239 the right. Set PADDING_CORRECTION to the number of padding
3240 bits needed on the left side.
3242 In most ABIs, the structure will be returned at the least end of
3243 the register, which translates to right padding on little-endian
3244 targets and left padding on big-endian targets. The opposite
3245 holds if the structure is returned at the most significant
3246 end of the register. */
3247 if (bytes
% UNITS_PER_WORD
!= 0
3248 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
3250 : BYTES_BIG_ENDIAN
))
3251 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
3254 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
3255 dst_words
= XALLOCAVEC (rtx
, n_regs
);
3256 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
3257 min_mode
= smallest_int_mode_for_size (bitsize
);
3259 /* Copy the structure BITSIZE bits at a time. */
3260 for (bitpos
= 0, xbitpos
= padding_correction
;
3261 bitpos
< bytes
* BITS_PER_UNIT
;
3262 bitpos
+= bitsize
, xbitpos
+= bitsize
)
3264 /* We need a new destination pseudo each time xbitpos is
3265 on a word boundary and when xbitpos == padding_correction
3266 (the first time through). */
3267 if (xbitpos
% BITS_PER_WORD
== 0
3268 || xbitpos
== padding_correction
)
3270 /* Generate an appropriate register. */
3271 dst_word
= gen_reg_rtx (word_mode
);
3272 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
3274 /* Clear the destination before we move anything into it. */
3275 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
3278 /* Find the largest integer mode that can be used to copy all or as
3279 many bits as possible of the structure if the target supports larger
3280 copies. There are too many corner cases here w.r.t to alignments on
3281 the read/writes. So if there is any padding just use single byte
3283 opt_scalar_int_mode mode_iter
;
3284 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
3286 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
3288 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
3289 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
3290 && msize
<= BITS_PER_WORD
)
3297 /* We need a new source operand each time bitpos is on a word
3299 if (bitpos
% BITS_PER_WORD
== 0)
3300 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
3302 /* Use bitpos for the source extraction (left justified) and
3303 xbitpos for the destination store (right justified). */
3304 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
3306 extract_bit_field (src_word
, bitsize
,
3307 bitpos
% BITS_PER_WORD
, 1,
3308 NULL_RTX
, word_mode
, word_mode
,
3313 if (mode
== BLKmode
)
3315 /* Find the smallest integer mode large enough to hold the
3316 entire structure. */
3317 opt_scalar_int_mode mode_iter
;
3318 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3319 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
3322 /* A suitable mode should have been found. */
3323 mode
= mode_iter
.require ();
3326 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
3327 dst_mode
= word_mode
;
3330 dst
= gen_reg_rtx (dst_mode
);
3332 for (i
= 0; i
< n_regs
; i
++)
3333 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
3335 if (mode
!= dst_mode
)
3336 dst
= gen_lowpart (mode
, dst
);
3341 /* Add a USE expression for REG to the (possibly empty) list pointed
3342 to by CALL_FUSAGE. REG must denote a hard register. */
3345 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
3347 gcc_assert (REG_P (reg
));
3349 if (!HARD_REGISTER_P (reg
))
3353 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
3356 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
3357 to by CALL_FUSAGE. REG must denote a hard register. */
3360 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
3362 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
3365 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
3368 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
3369 starting at REGNO. All of these registers must be hard registers. */
3372 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
3376 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
3378 for (i
= 0; i
< nregs
; i
++)
3379 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
3382 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
3383 PARALLEL REGS. This is for calls that pass values in multiple
3384 non-contiguous locations. The Irix 6 ABI has examples of this. */
3387 use_group_regs (rtx
*call_fusage
, rtx regs
)
3391 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
3393 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
3395 /* A NULL entry means the parameter goes both on the stack and in
3396 registers. This can also be a MEM for targets that pass values
3397 partially on the stack and partially in registers. */
3398 if (reg
!= 0 && REG_P (reg
))
3399 use_reg (call_fusage
, reg
);
3403 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3404 assigment and the code of the expresion on the RHS is CODE. Return
3408 get_def_for_expr (tree name
, enum tree_code code
)
3412 if (TREE_CODE (name
) != SSA_NAME
)
3415 def_stmt
= get_gimple_for_ssa_name (name
);
3417 || gimple_assign_rhs_code (def_stmt
) != code
)
3423 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3424 assigment and the class of the expresion on the RHS is CLASS. Return
3428 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3432 if (TREE_CODE (name
) != SSA_NAME
)
3435 def_stmt
= get_gimple_for_ssa_name (name
);
3437 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3443 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3444 its length in bytes. */
3447 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3448 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3449 unsigned HOST_WIDE_INT min_size
,
3450 unsigned HOST_WIDE_INT max_size
,
3451 unsigned HOST_WIDE_INT probable_max_size
,
3454 machine_mode mode
= GET_MODE (object
);
3457 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3459 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3460 just move a zero. Otherwise, do this a piece at a time. */
3461 poly_int64 size_val
;
3463 && poly_int_rtx_p (size
, &size_val
)
3464 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3466 rtx zero
= CONST0_RTX (mode
);
3469 emit_move_insn (object
, zero
);
3473 if (COMPLEX_MODE_P (mode
))
3475 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3478 write_complex_part (object
, zero
, 0, true);
3479 write_complex_part (object
, zero
, 1, false);
3485 if (size
== const0_rtx
)
3488 align
= MEM_ALIGN (object
);
3490 if (CONST_INT_P (size
)
3491 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3493 optimize_insn_for_speed_p ()))
3494 clear_by_pieces (object
, INTVAL (size
), align
);
3495 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3496 expected_align
, expected_size
,
3497 min_size
, max_size
, probable_max_size
))
3499 else if (try_store_by_multiple_pieces (object
, size
, ctz_size
,
3501 NULL_RTX
, 0, align
))
3503 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3504 return set_storage_via_libcall (object
, size
, const0_rtx
,
3505 method
== BLOCK_OP_TAILCALL
);
3513 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3515 unsigned HOST_WIDE_INT max
, min
= 0;
3516 if (GET_CODE (size
) == CONST_INT
)
3517 min
= max
= UINTVAL (size
);
3519 max
= GET_MODE_MASK (GET_MODE (size
));
3520 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
, 0);
3524 /* A subroutine of clear_storage. Expand a call to memset.
3525 Return the return value of memset, 0 otherwise. */
3528 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3530 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3531 machine_mode size_mode
;
3533 object
= copy_addr_to_reg (XEXP (object
, 0));
3534 object_tree
= make_tree (ptr_type_node
, object
);
3536 if (!CONST_INT_P (val
))
3537 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3538 val_tree
= make_tree (integer_type_node
, val
);
3540 size_mode
= TYPE_MODE (sizetype
);
3541 size
= convert_to_mode (size_mode
, size
, 1);
3542 size
= copy_to_mode_reg (size_mode
, size
);
3543 size_tree
= make_tree (sizetype
, size
);
3545 /* It is incorrect to use the libcall calling conventions for calls to
3546 memset because it can be provided by the user. */
3547 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3548 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3549 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3551 return expand_call (call_expr
, NULL_RTX
, false);
3554 /* Expand a setmem pattern; return true if successful. */
3557 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3558 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3559 unsigned HOST_WIDE_INT min_size
,
3560 unsigned HOST_WIDE_INT max_size
,
3561 unsigned HOST_WIDE_INT probable_max_size
)
3563 /* Try the most limited insn first, because there's no point
3564 including more than one in the machine description unless
3565 the more limited one has some advantage. */
3567 if (expected_align
< align
)
3568 expected_align
= align
;
3569 if (expected_size
!= -1)
3571 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3572 expected_size
= max_size
;
3573 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3574 expected_size
= min_size
;
3577 opt_scalar_int_mode mode_iter
;
3578 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3580 scalar_int_mode mode
= mode_iter
.require ();
3581 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3583 if (code
!= CODE_FOR_nothing
3584 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3585 here because if SIZE is less than the mode mask, as it is
3586 returned by the macro, it will definitely be less than the
3587 actual mode mask. Since SIZE is within the Pmode address
3588 space, we limit MODE to Pmode. */
3589 && ((CONST_INT_P (size
)
3590 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3591 <= (GET_MODE_MASK (mode
) >> 1)))
3592 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3593 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3595 class expand_operand ops
[9];
3598 nops
= insn_data
[(int) code
].n_generator_args
;
3599 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3601 create_fixed_operand (&ops
[0], object
);
3602 /* The check above guarantees that this size conversion is valid. */
3603 create_convert_operand_to (&ops
[1], size
, mode
, true);
3604 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3605 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3608 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3609 create_integer_operand (&ops
[5], expected_size
);
3613 create_integer_operand (&ops
[6], min_size
);
3614 /* If we cannot represent the maximal size,
3615 make parameter NULL. */
3616 if ((HOST_WIDE_INT
) max_size
!= -1)
3617 create_integer_operand (&ops
[7], max_size
);
3619 create_fixed_operand (&ops
[7], NULL
);
3623 /* If we cannot represent the maximal size,
3624 make parameter NULL. */
3625 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3626 create_integer_operand (&ops
[8], probable_max_size
);
3628 create_fixed_operand (&ops
[8], NULL
);
3630 if (maybe_expand_insn (code
, nops
, ops
))
3639 /* Write to one of the components of the complex value CPLX. Write VAL to
3640 the real part if IMAG_P is false, and the imaginary part if its true.
3641 If UNDEFINED_P then the value in CPLX is currently undefined. */
3644 write_complex_part (rtx cplx
, rtx val
, bool imag_p
, bool undefined_p
)
3650 if (GET_CODE (cplx
) == CONCAT
)
3652 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3656 cmode
= GET_MODE (cplx
);
3657 imode
= GET_MODE_INNER (cmode
);
3658 ibitsize
= GET_MODE_BITSIZE (imode
);
3660 /* For MEMs simplify_gen_subreg may generate an invalid new address
3661 because, e.g., the original address is considered mode-dependent
3662 by the target, which restricts simplify_subreg from invoking
3663 adjust_address_nv. Instead of preparing fallback support for an
3664 invalid address, we call adjust_address_nv directly. */
3667 emit_move_insn (adjust_address_nv (cplx
, imode
,
3668 imag_p
? GET_MODE_SIZE (imode
) : 0),
3673 /* If the sub-object is at least word sized, then we know that subregging
3674 will work. This special case is important, since store_bit_field
3675 wants to operate on integer modes, and there's rarely an OImode to
3676 correspond to TCmode. */
3677 if (ibitsize
>= BITS_PER_WORD
3678 /* For hard regs we have exact predicates. Assume we can split
3679 the original object if it spans an even number of hard regs.
3680 This special case is important for SCmode on 64-bit platforms
3681 where the natural size of floating-point regs is 32-bit. */
3683 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3684 && REG_NREGS (cplx
) % 2 == 0))
3686 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3687 imag_p
? GET_MODE_SIZE (imode
) : 0);
3690 emit_move_insn (part
, val
);
3694 /* simplify_gen_subreg may fail for sub-word MEMs. */
3695 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3698 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3699 false, undefined_p
);
3702 /* Extract one of the components of the complex value CPLX. Extract the
3703 real part if IMAG_P is false, and the imaginary part if it's true. */
3706 read_complex_part (rtx cplx
, bool imag_p
)
3712 if (GET_CODE (cplx
) == CONCAT
)
3713 return XEXP (cplx
, imag_p
);
3715 cmode
= GET_MODE (cplx
);
3716 imode
= GET_MODE_INNER (cmode
);
3717 ibitsize
= GET_MODE_BITSIZE (imode
);
3719 /* Special case reads from complex constants that got spilled to memory. */
3720 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3722 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3723 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3725 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3726 if (CONSTANT_CLASS_P (part
))
3727 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3731 /* For MEMs simplify_gen_subreg may generate an invalid new address
3732 because, e.g., the original address is considered mode-dependent
3733 by the target, which restricts simplify_subreg from invoking
3734 adjust_address_nv. Instead of preparing fallback support for an
3735 invalid address, we call adjust_address_nv directly. */
3737 return adjust_address_nv (cplx
, imode
,
3738 imag_p
? GET_MODE_SIZE (imode
) : 0);
3740 /* If the sub-object is at least word sized, then we know that subregging
3741 will work. This special case is important, since extract_bit_field
3742 wants to operate on integer modes, and there's rarely an OImode to
3743 correspond to TCmode. */
3744 if (ibitsize
>= BITS_PER_WORD
3745 /* For hard regs we have exact predicates. Assume we can split
3746 the original object if it spans an even number of hard regs.
3747 This special case is important for SCmode on 64-bit platforms
3748 where the natural size of floating-point regs is 32-bit. */
3750 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3751 && REG_NREGS (cplx
) % 2 == 0))
3753 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3754 imag_p
? GET_MODE_SIZE (imode
) : 0);
3758 /* simplify_gen_subreg may fail for sub-word MEMs. */
3759 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3762 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3763 true, NULL_RTX
, imode
, imode
, false, NULL
);
3766 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3767 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3768 represented in NEW_MODE. If FORCE is true, this will never happen, as
3769 we'll force-create a SUBREG if needed. */
3772 emit_move_change_mode (machine_mode new_mode
,
3773 machine_mode old_mode
, rtx x
, bool force
)
3777 if (push_operand (x
, GET_MODE (x
)))
3779 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3780 MEM_COPY_ATTRIBUTES (ret
, x
);
3784 /* We don't have to worry about changing the address since the
3785 size in bytes is supposed to be the same. */
3786 if (reload_in_progress
)
3788 /* Copy the MEM to change the mode and move any
3789 substitutions from the old MEM to the new one. */
3790 ret
= adjust_address_nv (x
, new_mode
, 0);
3791 copy_replacements (x
, ret
);
3794 ret
= adjust_address (x
, new_mode
, 0);
3798 /* Note that we do want simplify_subreg's behavior of validating
3799 that the new mode is ok for a hard register. If we were to use
3800 simplify_gen_subreg, we would create the subreg, but would
3801 probably run into the target not being able to implement it. */
3802 /* Except, of course, when FORCE is true, when this is exactly what
3803 we want. Which is needed for CCmodes on some targets. */
3805 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3807 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3813 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3814 an integer mode of the same size as MODE. Returns the instruction
3815 emitted, or NULL if such a move could not be generated. */
3818 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3820 scalar_int_mode imode
;
3821 enum insn_code code
;
3823 /* There must exist a mode of the exact size we require. */
3824 if (!int_mode_for_mode (mode
).exists (&imode
))
3827 /* The target must support moves in this mode. */
3828 code
= optab_handler (mov_optab
, imode
);
3829 if (code
== CODE_FOR_nothing
)
3832 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3835 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3838 return emit_insn (GEN_FCN (code
) (x
, y
));
3841 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3842 Return an equivalent MEM that does not use an auto-increment. */
3845 emit_move_resolve_push (machine_mode mode
, rtx x
)
3847 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3850 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3851 #ifdef PUSH_ROUNDING
3852 adjust
= PUSH_ROUNDING (adjust
);
3854 if (code
== PRE_DEC
|| code
== POST_DEC
)
3856 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3858 rtx expr
= XEXP (XEXP (x
, 0), 1);
3860 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3861 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3862 if (GET_CODE (expr
) == MINUS
)
3864 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3868 /* Do not use anti_adjust_stack, since we don't want to update
3869 stack_pointer_delta. */
3870 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3871 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3872 0, OPTAB_LIB_WIDEN
);
3873 if (temp
!= stack_pointer_rtx
)
3874 emit_move_insn (stack_pointer_rtx
, temp
);
3881 temp
= stack_pointer_rtx
;
3886 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3892 return replace_equiv_address (x
, temp
);
3895 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3896 X is known to satisfy push_operand, and MODE is known to be complex.
3897 Returns the last instruction emitted. */
3900 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3902 scalar_mode submode
= GET_MODE_INNER (mode
);
3905 #ifdef PUSH_ROUNDING
3906 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3908 /* In case we output to the stack, but the size is smaller than the
3909 machine can push exactly, we need to use move instructions. */
3910 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3912 x
= emit_move_resolve_push (mode
, x
);
3913 return emit_move_insn (x
, y
);
3917 /* Note that the real part always precedes the imag part in memory
3918 regardless of machine's endianness. */
3919 switch (GET_CODE (XEXP (x
, 0)))
3933 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3934 read_complex_part (y
, imag_first
));
3935 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3936 read_complex_part (y
, !imag_first
));
3939 /* A subroutine of emit_move_complex. Perform the move from Y to X
3940 via two moves of the parts. Returns the last instruction emitted. */
3943 emit_move_complex_parts (rtx x
, rtx y
)
3945 /* Show the output dies here. This is necessary for SUBREGs
3946 of pseudos since we cannot track their lifetimes correctly;
3947 hard regs shouldn't appear here except as return values. */
3948 if (!reload_completed
&& !reload_in_progress
3949 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3952 write_complex_part (x
, read_complex_part (y
, false), false, true);
3953 write_complex_part (x
, read_complex_part (y
, true), true, false);
3955 return get_last_insn ();
3958 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3959 MODE is known to be complex. Returns the last instruction emitted. */
3962 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3966 /* Need to take special care for pushes, to maintain proper ordering
3967 of the data, and possibly extra padding. */
3968 if (push_operand (x
, mode
))
3969 return emit_move_complex_push (mode
, x
, y
);
3971 /* See if we can coerce the target into moving both values at once, except
3972 for floating point where we favor moving as parts if this is easy. */
3973 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3974 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3976 && HARD_REGISTER_P (x
)
3977 && REG_NREGS (x
) == 1)
3979 && HARD_REGISTER_P (y
)
3980 && REG_NREGS (y
) == 1))
3982 /* Not possible if the values are inherently not adjacent. */
3983 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3985 /* Is possible if both are registers (or subregs of registers). */
3986 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3988 /* If one of the operands is a memory, and alignment constraints
3989 are friendly enough, we may be able to do combined memory operations.
3990 We do not attempt this if Y is a constant because that combination is
3991 usually better with the by-parts thing below. */
3992 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3993 && (!STRICT_ALIGNMENT
3994 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
4003 /* For memory to memory moves, optimal behavior can be had with the
4004 existing block move logic. But use normal expansion if optimizing
4006 if (MEM_P (x
) && MEM_P (y
))
4008 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
4009 (optimize_insn_for_speed_p()
4010 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
4011 return get_last_insn ();
4014 ret
= emit_move_via_integer (mode
, x
, y
, true);
4019 return emit_move_complex_parts (x
, y
);
4022 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
4023 MODE is known to be MODE_CC. Returns the last instruction emitted. */
4026 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
4030 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
4033 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
4034 if (code
!= CODE_FOR_nothing
)
4036 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
4037 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
4038 return emit_insn (GEN_FCN (code
) (x
, y
));
4042 /* Otherwise, find the MODE_INT mode of the same width. */
4043 ret
= emit_move_via_integer (mode
, x
, y
, false);
4044 gcc_assert (ret
!= NULL
);
4048 /* Return true if word I of OP lies entirely in the
4049 undefined bits of a paradoxical subreg. */
4052 undefined_operand_subword_p (const_rtx op
, int i
)
4054 if (GET_CODE (op
) != SUBREG
)
4056 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
4057 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
4058 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
4059 || known_le (offset
, -UNITS_PER_WORD
));
4062 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
4063 MODE is any multi-word or full-word mode that lacks a move_insn
4064 pattern. Note that you will get better code if you define such
4065 patterns, even if they must turn into multiple assembler instructions. */
4068 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
4070 rtx_insn
*last_insn
= 0;
4076 /* This function can only handle cases where the number of words is
4077 known at compile time. */
4078 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
4079 gcc_assert (mode_size
>= UNITS_PER_WORD
);
4081 /* If X is a push on the stack, do the push now and replace
4082 X with a reference to the stack pointer. */
4083 if (push_operand (x
, mode
))
4084 x
= emit_move_resolve_push (mode
, x
);
4086 /* If we are in reload, see if either operand is a MEM whose address
4087 is scheduled for replacement. */
4088 if (reload_in_progress
&& MEM_P (x
)
4089 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
4090 x
= replace_equiv_address_nv (x
, inner
);
4091 if (reload_in_progress
&& MEM_P (y
)
4092 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
4093 y
= replace_equiv_address_nv (y
, inner
);
4097 need_clobber
= false;
4098 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
4100 /* Do not generate code for a move if it would go entirely
4101 to the non-existing bits of a paradoxical subreg. */
4102 if (undefined_operand_subword_p (x
, i
))
4105 rtx xpart
= operand_subword (x
, i
, 1, mode
);
4108 /* Do not generate code for a move if it would come entirely
4109 from the undefined bits of a paradoxical subreg. */
4110 if (undefined_operand_subword_p (y
, i
))
4113 ypart
= operand_subword (y
, i
, 1, mode
);
4115 /* If we can't get a part of Y, put Y into memory if it is a
4116 constant. Otherwise, force it into a register. Then we must
4117 be able to get a part of Y. */
4118 if (ypart
== 0 && CONSTANT_P (y
))
4120 y
= use_anchored_address (force_const_mem (mode
, y
));
4121 ypart
= operand_subword (y
, i
, 1, mode
);
4123 else if (ypart
== 0)
4124 ypart
= operand_subword_force (y
, i
, mode
);
4126 gcc_assert (xpart
&& ypart
);
4128 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
4130 last_insn
= emit_move_insn (xpart
, ypart
);
4136 /* Show the output dies here. This is necessary for SUBREGs
4137 of pseudos since we cannot track their lifetimes correctly;
4138 hard regs shouldn't appear here except as return values.
4139 We never want to emit such a clobber after reload. */
4141 && ! (reload_in_progress
|| reload_completed
)
4142 && need_clobber
!= 0)
4150 /* Low level part of emit_move_insn.
4151 Called just like emit_move_insn, but assumes X and Y
4152 are basically valid. */
4155 emit_move_insn_1 (rtx x
, rtx y
)
4157 machine_mode mode
= GET_MODE (x
);
4158 enum insn_code code
;
4160 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
4162 code
= optab_handler (mov_optab
, mode
);
4163 if (code
!= CODE_FOR_nothing
)
4164 return emit_insn (GEN_FCN (code
) (x
, y
));
4166 /* Expand complex moves by moving real part and imag part. */
4167 if (COMPLEX_MODE_P (mode
))
4168 return emit_move_complex (mode
, x
, y
);
4170 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
4171 || ALL_FIXED_POINT_MODE_P (mode
))
4173 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
4175 /* If we can't find an integer mode, use multi words. */
4179 return emit_move_multi_word (mode
, x
, y
);
4182 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4183 return emit_move_ccmode (mode
, x
, y
);
4185 /* Try using a move pattern for the corresponding integer mode. This is
4186 only safe when simplify_subreg can convert MODE constants into integer
4187 constants. At present, it can only do this reliably if the value
4188 fits within a HOST_WIDE_INT. */
4190 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
4192 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
4196 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
4201 return emit_move_multi_word (mode
, x
, y
);
4204 /* Generate code to copy Y into X.
4205 Both Y and X must have the same mode, except that
4206 Y can be a constant with VOIDmode.
4207 This mode cannot be BLKmode; use emit_block_move for that.
4209 Return the last instruction emitted. */
4212 emit_move_insn (rtx x
, rtx y
)
4214 machine_mode mode
= GET_MODE (x
);
4215 rtx y_cst
= NULL_RTX
;
4216 rtx_insn
*last_insn
;
4219 gcc_assert (mode
!= BLKmode
4220 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
4222 /* If we have a copy that looks like one of the following patterns:
4223 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
4224 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
4225 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
4226 (set (subreg:M1 (reg:M2 ...)) (constant C))
4227 where mode M1 is equal in size to M2, try to detect whether the
4228 mode change involves an implicit round trip through memory.
4229 If so, see if we can avoid that by removing the subregs and
4230 doing the move in mode M2 instead. */
4232 rtx x_inner
= NULL_RTX
;
4233 rtx y_inner
= NULL_RTX
;
4235 auto candidate_subreg_p
= [&](rtx subreg
) {
4236 return (REG_P (SUBREG_REG (subreg
))
4237 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
4238 GET_MODE_SIZE (GET_MODE (subreg
)))
4239 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
4240 != CODE_FOR_nothing
);
4243 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
4244 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
4245 && !push_operand (mem
, GET_MODE (mem
))
4246 /* Not a candiate if innermode requires too much alignment. */
4247 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
4248 || targetm
.slow_unaligned_access (GET_MODE (mem
),
4250 || !targetm
.slow_unaligned_access (innermode
,
4254 if (SUBREG_P (x
) && candidate_subreg_p (x
))
4255 x_inner
= SUBREG_REG (x
);
4257 if (SUBREG_P (y
) && candidate_subreg_p (y
))
4258 y_inner
= SUBREG_REG (y
);
4260 if (x_inner
!= NULL_RTX
4261 && y_inner
!= NULL_RTX
4262 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
4263 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
4267 mode
= GET_MODE (x_inner
);
4269 else if (x_inner
!= NULL_RTX
4271 && candidate_mem_p (GET_MODE (x_inner
), y
))
4274 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
4275 mode
= GET_MODE (x_inner
);
4277 else if (y_inner
!= NULL_RTX
4279 && candidate_mem_p (GET_MODE (y_inner
), x
))
4281 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
4283 mode
= GET_MODE (y_inner
);
4285 else if (x_inner
!= NULL_RTX
4287 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
4289 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
4293 mode
= GET_MODE (x_inner
);
4299 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
4300 && (last_insn
= compress_float_constant (x
, y
)))
4305 if (!targetm
.legitimate_constant_p (mode
, y
))
4307 y
= force_const_mem (mode
, y
);
4309 /* If the target's cannot_force_const_mem prevented the spill,
4310 assume that the target's move expanders will also take care
4311 of the non-legitimate constant. */
4315 y
= use_anchored_address (y
);
4319 /* If X or Y are memory references, verify that their addresses are valid
4322 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
4324 && ! push_operand (x
, GET_MODE (x
))))
4325 x
= validize_mem (x
);
4328 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
4329 MEM_ADDR_SPACE (y
)))
4330 y
= validize_mem (y
);
4332 gcc_assert (mode
!= BLKmode
);
4334 last_insn
= emit_move_insn_1 (x
, y
);
4336 if (y_cst
&& REG_P (x
)
4337 && (set
= single_set (last_insn
)) != NULL_RTX
4338 && SET_DEST (set
) == x
4339 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
4340 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
4345 /* Generate the body of an instruction to copy Y into X.
4346 It may be a list of insns, if one insn isn't enough. */
4349 gen_move_insn (rtx x
, rtx y
)
4354 emit_move_insn_1 (x
, y
);
4360 /* If Y is representable exactly in a narrower mode, and the target can
4361 perform the extension directly from constant or memory, then emit the
4362 move as an extension. */
4365 compress_float_constant (rtx x
, rtx y
)
4367 machine_mode dstmode
= GET_MODE (x
);
4368 machine_mode orig_srcmode
= GET_MODE (y
);
4369 machine_mode srcmode
;
4370 const REAL_VALUE_TYPE
*r
;
4371 int oldcost
, newcost
;
4372 bool speed
= optimize_insn_for_speed_p ();
4374 r
= CONST_DOUBLE_REAL_VALUE (y
);
4376 if (targetm
.legitimate_constant_p (dstmode
, y
))
4377 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
4379 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
4381 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
4385 rtx_insn
*last_insn
;
4387 /* Skip if the target can't extend this way. */
4388 ic
= can_extend_p (dstmode
, srcmode
, 0);
4389 if (ic
== CODE_FOR_nothing
)
4392 /* Skip if the narrowed value isn't exact. */
4393 if (! exact_real_truncate (srcmode
, r
))
4396 trunc_y
= const_double_from_real_value (*r
, srcmode
);
4398 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
4400 /* Skip if the target needs extra instructions to perform
4402 if (!insn_operand_matches (ic
, 1, trunc_y
))
4404 /* This is valid, but may not be cheaper than the original. */
4405 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4407 if (oldcost
< newcost
)
4410 else if (float_extend_from_mem
[dstmode
][srcmode
])
4412 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4413 /* This is valid, but may not be cheaper than the original. */
4414 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4416 if (oldcost
< newcost
)
4418 trunc_y
= validize_mem (trunc_y
);
4423 /* For CSE's benefit, force the compressed constant pool entry
4424 into a new pseudo. This constant may be used in different modes,
4425 and if not, combine will put things back together for us. */
4426 trunc_y
= force_reg (srcmode
, trunc_y
);
4428 /* If x is a hard register, perform the extension into a pseudo,
4429 so that e.g. stack realignment code is aware of it. */
4431 if (REG_P (x
) && HARD_REGISTER_P (x
))
4432 target
= gen_reg_rtx (dstmode
);
4434 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4435 last_insn
= get_last_insn ();
4438 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4441 return emit_move_insn (x
, target
);
4448 /* Pushing data onto the stack. */
4450 /* Push a block of length SIZE (perhaps variable)
4451 and return an rtx to address the beginning of the block.
4452 The value may be virtual_outgoing_args_rtx.
4454 EXTRA is the number of bytes of padding to push in addition to SIZE.
4455 BELOW nonzero means this padding comes at low addresses;
4456 otherwise, the padding comes at high addresses. */
4459 push_block (rtx size
, poly_int64 extra
, int below
)
4463 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4464 if (CONSTANT_P (size
))
4465 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4466 else if (REG_P (size
) && known_eq (extra
, 0))
4467 anti_adjust_stack (size
);
4470 temp
= copy_to_mode_reg (Pmode
, size
);
4471 if (maybe_ne (extra
, 0))
4472 temp
= expand_binop (Pmode
, add_optab
, temp
,
4473 gen_int_mode (extra
, Pmode
),
4474 temp
, 0, OPTAB_LIB_WIDEN
);
4475 anti_adjust_stack (temp
);
4478 if (STACK_GROWS_DOWNWARD
)
4480 temp
= virtual_outgoing_args_rtx
;
4481 if (maybe_ne (extra
, 0) && below
)
4482 temp
= plus_constant (Pmode
, temp
, extra
);
4487 if (poly_int_rtx_p (size
, &csize
))
4488 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4489 -csize
- (below
? 0 : extra
));
4490 else if (maybe_ne (extra
, 0) && !below
)
4491 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4492 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4495 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4496 negate_rtx (Pmode
, size
));
4499 return memory_address (NARROWEST_INT_MODE
, temp
);
4502 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4505 mem_autoinc_base (rtx mem
)
4509 rtx addr
= XEXP (mem
, 0);
4510 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4511 return XEXP (addr
, 0);
4516 /* A utility routine used here, in reload, and in try_split. The insns
4517 after PREV up to and including LAST are known to adjust the stack,
4518 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4519 placing notes as appropriate. PREV may be NULL, indicating the
4520 entire insn sequence prior to LAST should be scanned.
4522 The set of allowed stack pointer modifications is small:
4523 (1) One or more auto-inc style memory references (aka pushes),
4524 (2) One or more addition/subtraction with the SP as destination,
4525 (3) A single move insn with the SP as destination,
4526 (4) A call_pop insn,
4527 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4529 Insns in the sequence that do not modify the SP are ignored,
4530 except for noreturn calls.
4532 The return value is the amount of adjustment that can be trivially
4533 verified, via immediate operand or auto-inc. If the adjustment
4534 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4537 find_args_size_adjust (rtx_insn
*insn
)
4542 pat
= PATTERN (insn
);
4545 /* Look for a call_pop pattern. */
4548 /* We have to allow non-call_pop patterns for the case
4549 of emit_single_push_insn of a TLS address. */
4550 if (GET_CODE (pat
) != PARALLEL
)
4553 /* All call_pop have a stack pointer adjust in the parallel.
4554 The call itself is always first, and the stack adjust is
4555 usually last, so search from the end. */
4556 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4558 set
= XVECEXP (pat
, 0, i
);
4559 if (GET_CODE (set
) != SET
)
4561 dest
= SET_DEST (set
);
4562 if (dest
== stack_pointer_rtx
)
4565 /* We'd better have found the stack pointer adjust. */
4568 /* Fall through to process the extracted SET and DEST
4569 as if it was a standalone insn. */
4571 else if (GET_CODE (pat
) == SET
)
4573 else if ((set
= single_set (insn
)) != NULL
)
4575 else if (GET_CODE (pat
) == PARALLEL
)
4577 /* ??? Some older ports use a parallel with a stack adjust
4578 and a store for a PUSH_ROUNDING pattern, rather than a
4579 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4580 /* ??? See h8300 and m68k, pushqi1. */
4581 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4583 set
= XVECEXP (pat
, 0, i
);
4584 if (GET_CODE (set
) != SET
)
4586 dest
= SET_DEST (set
);
4587 if (dest
== stack_pointer_rtx
)
4590 /* We do not expect an auto-inc of the sp in the parallel. */
4591 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4592 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4593 != stack_pointer_rtx
);
4601 dest
= SET_DEST (set
);
4603 /* Look for direct modifications of the stack pointer. */
4604 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4606 /* Look for a trivial adjustment, otherwise assume nothing. */
4607 /* Note that the SPU restore_stack_block pattern refers to
4608 the stack pointer in V4SImode. Consider that non-trivial. */
4610 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4611 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4613 /* ??? Reload can generate no-op moves, which will be cleaned
4614 up later. Recognize it and continue searching. */
4615 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4618 return HOST_WIDE_INT_MIN
;
4624 /* Otherwise only think about autoinc patterns. */
4625 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4628 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4629 != stack_pointer_rtx
);
4631 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4632 mem
= SET_SRC (set
);
4636 addr
= XEXP (mem
, 0);
4637 switch (GET_CODE (addr
))
4641 return GET_MODE_SIZE (GET_MODE (mem
));
4644 return -GET_MODE_SIZE (GET_MODE (mem
));
4647 addr
= XEXP (addr
, 1);
4648 gcc_assert (GET_CODE (addr
) == PLUS
);
4649 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4650 return rtx_to_poly_int64 (XEXP (addr
, 1));
4658 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4659 poly_int64 end_args_size
)
4661 poly_int64 args_size
= end_args_size
;
4662 bool saw_unknown
= false;
4665 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4667 if (!NONDEBUG_INSN_P (insn
))
4670 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4671 a call argument containing a TLS address that itself requires
4672 a call to __tls_get_addr. The handling of stack_pointer_delta
4673 in emit_single_push_insn is supposed to ensure that any such
4674 notes are already correct. */
4675 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4676 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4678 poly_int64 this_delta
= find_args_size_adjust (insn
);
4679 if (known_eq (this_delta
, 0))
4682 || ACCUMULATE_OUTGOING_ARGS
4683 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4687 gcc_assert (!saw_unknown
);
4688 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4692 add_args_size_note (insn
, args_size
);
4693 if (STACK_GROWS_DOWNWARD
)
4694 this_delta
= -poly_uint64 (this_delta
);
4697 args_size
= HOST_WIDE_INT_MIN
;
4699 args_size
-= this_delta
;
4705 #ifdef PUSH_ROUNDING
4706 /* Emit single push insn. */
4709 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4712 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4714 enum insn_code icode
;
4716 /* If there is push pattern, use it. Otherwise try old way of throwing
4717 MEM representing push operation to move expander. */
4718 icode
= optab_handler (push_optab
, mode
);
4719 if (icode
!= CODE_FOR_nothing
)
4721 class expand_operand ops
[1];
4723 create_input_operand (&ops
[0], x
, mode
);
4724 if (maybe_expand_insn (icode
, 1, ops
))
4727 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4728 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4729 /* If we are to pad downward, adjust the stack pointer first and
4730 then store X into the stack location using an offset. This is
4731 because emit_move_insn does not know how to pad; it does not have
4733 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4735 emit_move_insn (stack_pointer_rtx
,
4736 expand_binop (Pmode
,
4737 STACK_GROWS_DOWNWARD
? sub_optab
4740 gen_int_mode (rounded_size
, Pmode
),
4741 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4743 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4744 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4745 /* We have already decremented the stack pointer, so get the
4747 offset
+= rounded_size
;
4749 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4750 /* We have already incremented the stack pointer, so get the
4752 offset
-= rounded_size
;
4754 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4758 if (STACK_GROWS_DOWNWARD
)
4759 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4760 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4762 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4763 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4765 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4768 dest
= gen_rtx_MEM (mode
, dest_addr
);
4772 set_mem_attributes (dest
, type
, 1);
4774 if (cfun
->tail_call_marked
)
4775 /* Function incoming arguments may overlap with sibling call
4776 outgoing arguments and we cannot allow reordering of reads
4777 from function arguments with stores to outgoing arguments
4778 of sibling calls. */
4779 set_mem_alias_set (dest
, 0);
4781 emit_move_insn (dest
, x
);
4784 /* Emit and annotate a single push insn. */
4787 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4789 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4790 rtx_insn
*prev
= get_last_insn ();
4793 emit_single_push_insn_1 (mode
, x
, type
);
4795 /* Adjust stack_pointer_delta to describe the situation after the push
4796 we just performed. Note that we must do this after the push rather
4797 than before the push in case calculating X needs pushes and pops of
4798 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4799 for such pushes and pops must not include the effect of the future
4801 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4803 last
= get_last_insn ();
4805 /* Notice the common case where we emitted exactly one insn. */
4806 if (PREV_INSN (last
) == prev
)
4808 add_args_size_note (last
, stack_pointer_delta
);
4812 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4813 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4814 || known_eq (delta
, old_delta
));
4818 /* If reading SIZE bytes from X will end up reading from
4819 Y return the number of bytes that overlap. Return -1
4820 if there is no overlap or -2 if we can't determine
4821 (for example when X and Y have different base registers). */
4824 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4826 rtx tmp
= plus_constant (Pmode
, x
, size
);
4827 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4829 if (!CONST_INT_P (sub
))
4832 HOST_WIDE_INT val
= INTVAL (sub
);
4834 return IN_RANGE (val
, 1, size
) ? val
: -1;
4837 /* Generate code to push X onto the stack, assuming it has mode MODE and
4839 MODE is redundant except when X is a CONST_INT (since they don't
4841 SIZE is an rtx for the size of data to be copied (in bytes),
4842 needed only if X is BLKmode.
4843 Return true if successful. May return false if asked to push a
4844 partial argument during a sibcall optimization (as specified by
4845 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4848 ALIGN (in bits) is maximum alignment we can assume.
4850 If PARTIAL and REG are both nonzero, then copy that many of the first
4851 bytes of X into registers starting with REG, and push the rest of X.
4852 The amount of space pushed is decreased by PARTIAL bytes.
4853 REG must be a hard register in this case.
4854 If REG is zero but PARTIAL is not, take any all others actions for an
4855 argument partially in registers, but do not actually load any
4858 EXTRA is the amount in bytes of extra space to leave next to this arg.
4859 This is ignored if an argument block has already been allocated.
4861 On a machine that lacks real push insns, ARGS_ADDR is the address of
4862 the bottom of the argument block for this call. We use indexing off there
4863 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4864 argument block has not been preallocated.
4866 ARGS_SO_FAR is the size of args previously pushed for this call.
4868 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4869 for arguments passed in registers. If nonzero, it will be the number
4870 of bytes required. */
4873 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4874 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4875 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4876 rtx alignment_pad
, bool sibcall_p
)
4879 pad_direction stack_direction
4880 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4882 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4883 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4884 Default is below for small data on big-endian machines; else above. */
4885 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4887 /* Invert direction if stack is post-decrement.
4889 if (STACK_PUSH_CODE
== POST_DEC
)
4890 if (where_pad
!= PAD_NONE
)
4891 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4895 int nregs
= partial
/ UNITS_PER_WORD
;
4896 rtx
*tmp_regs
= NULL
;
4897 int overlapping
= 0;
4900 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4902 /* Copy a block into the stack, entirely or partially. */
4909 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4910 used
= partial
- offset
;
4912 if (mode
!= BLKmode
)
4914 /* A value is to be stored in an insufficiently aligned
4915 stack slot; copy via a suitably aligned slot if
4917 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4918 if (!MEM_P (xinner
))
4920 temp
= assign_temp (type
, 1, 1);
4921 emit_move_insn (temp
, xinner
);
4928 /* USED is now the # of bytes we need not copy to the stack
4929 because registers will take care of them. */
4932 xinner
= adjust_address (xinner
, BLKmode
, used
);
4934 /* If the partial register-part of the arg counts in its stack size,
4935 skip the part of stack space corresponding to the registers.
4936 Otherwise, start copying to the beginning of the stack space,
4937 by setting SKIP to 0. */
4938 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4940 #ifdef PUSH_ROUNDING
4941 /* NB: Let the backend known the number of bytes to push and
4942 decide if push insns should be generated. */
4943 unsigned int push_size
;
4944 if (CONST_INT_P (size
))
4945 push_size
= INTVAL (size
);
4949 /* Do it with several push insns if that doesn't take lots of insns
4950 and if there is no difficulty with push insns that skip bytes
4951 on the stack for alignment purposes. */
4953 && targetm
.calls
.push_argument (push_size
)
4954 && CONST_INT_P (size
)
4956 && MEM_ALIGN (xinner
) >= align
4957 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4958 /* Here we avoid the case of a structure whose weak alignment
4959 forces many pushes of a small amount of data,
4960 and such small pushes do rounding that causes trouble. */
4961 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4962 || align
>= BIGGEST_ALIGNMENT
4963 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4964 align
/ BITS_PER_UNIT
))
4965 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4967 /* Push padding now if padding above and stack grows down,
4968 or if padding below and stack grows up.
4969 But if space already allocated, this has already been done. */
4970 if (maybe_ne (extra
, 0)
4972 && where_pad
!= PAD_NONE
4973 && where_pad
!= stack_direction
)
4974 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4976 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4980 #endif /* PUSH_ROUNDING */
4984 /* Otherwise make space on the stack and copy the data
4985 to the address of that space. */
4987 /* Deduct words put into registers from the size we must copy. */
4990 if (CONST_INT_P (size
))
4991 size
= GEN_INT (INTVAL (size
) - used
);
4993 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4994 gen_int_mode (used
, GET_MODE (size
)),
4995 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4998 /* Get the address of the stack space.
4999 In this case, we do not deal with EXTRA separately.
5000 A single stack adjust will do. */
5001 poly_int64 const_args_so_far
;
5004 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
5007 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
5008 temp
= memory_address (BLKmode
,
5009 plus_constant (Pmode
, args_addr
,
5010 skip
+ const_args_so_far
));
5012 temp
= memory_address (BLKmode
,
5013 plus_constant (Pmode
,
5014 gen_rtx_PLUS (Pmode
,
5019 if (!ACCUMULATE_OUTGOING_ARGS
)
5021 /* If the source is referenced relative to the stack pointer,
5022 copy it to another register to stabilize it. We do not need
5023 to do this if we know that we won't be changing sp. */
5025 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
5026 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
5027 temp
= copy_to_reg (temp
);
5030 target
= gen_rtx_MEM (BLKmode
, temp
);
5032 /* We do *not* set_mem_attributes here, because incoming arguments
5033 may overlap with sibling call outgoing arguments and we cannot
5034 allow reordering of reads from function arguments with stores
5035 to outgoing arguments of sibling calls. We do, however, want
5036 to record the alignment of the stack slot. */
5037 /* ALIGN may well be better aligned than TYPE, e.g. due to
5038 PARM_BOUNDARY. Assume the caller isn't lying. */
5039 set_mem_align (target
, align
);
5041 /* If part should go in registers and pushing to that part would
5042 overwrite some of the values that need to go into regs, load the
5043 overlapping values into temporary pseudos to be moved into the hard
5044 regs at the end after the stack pushing has completed.
5045 We cannot load them directly into the hard regs here because
5046 they can be clobbered by the block move expansions.
5049 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
5050 && GET_CODE (reg
) != PARALLEL
)
5052 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
5053 if (overlapping
> 0)
5055 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
5056 overlapping
/= UNITS_PER_WORD
;
5058 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
5060 for (int i
= 0; i
< overlapping
; i
++)
5061 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
5063 for (int i
= 0; i
< overlapping
; i
++)
5064 emit_move_insn (tmp_regs
[i
],
5065 operand_subword_force (target
, i
, mode
));
5067 else if (overlapping
== -1)
5069 /* Could not determine whether there is overlap.
5070 Fail the sibcall. */
5079 /* If source is a constant VAR_DECL with a simple constructor,
5080 store the constructor to the stack instead of moving it. */
5084 && SYMBOL_REF_P (XEXP (xinner
, 0))
5085 && (decl
= SYMBOL_REF_DECL (XEXP (xinner
, 0))) != NULL_TREE
5087 && TREE_READONLY (decl
)
5088 && !TREE_SIDE_EFFECTS (decl
)
5089 && immediate_const_ctor_p (DECL_INITIAL (decl
), 2))
5090 store_constructor (DECL_INITIAL (decl
), target
, 0,
5091 int_expr_size (DECL_INITIAL (decl
)), false);
5093 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
5096 else if (partial
> 0)
5098 /* Scalar partly in registers. This case is only supported
5099 for fixed-wdth modes. */
5100 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
5101 num_words
/= UNITS_PER_WORD
;
5104 /* # bytes of start of argument
5105 that we must make space for but need not store. */
5106 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
5107 int args_offset
= INTVAL (args_so_far
);
5110 /* Push padding now if padding above and stack grows down,
5111 or if padding below and stack grows up.
5112 But if space already allocated, this has already been done. */
5113 if (maybe_ne (extra
, 0)
5115 && where_pad
!= PAD_NONE
5116 && where_pad
!= stack_direction
)
5117 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5119 /* If we make space by pushing it, we might as well push
5120 the real data. Otherwise, we can leave OFFSET nonzero
5121 and leave the space uninitialized. */
5125 /* Now NOT_STACK gets the number of words that we don't need to
5126 allocate on the stack. Convert OFFSET to words too. */
5127 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
5128 offset
/= UNITS_PER_WORD
;
5130 /* If the partial register-part of the arg counts in its stack size,
5131 skip the part of stack space corresponding to the registers.
5132 Otherwise, start copying to the beginning of the stack space,
5133 by setting SKIP to 0. */
5134 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
5136 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
5137 x
= validize_mem (force_const_mem (mode
, x
));
5139 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
5140 SUBREGs of such registers are not allowed. */
5141 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
5142 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
5143 x
= copy_to_reg (x
);
5145 /* Loop over all the words allocated on the stack for this arg. */
5146 /* We can do it by words, because any scalar bigger than a word
5147 has a size a multiple of a word. */
5148 for (i
= num_words
- 1; i
>= not_stack
; i
--)
5149 if (i
>= not_stack
+ offset
)
5150 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
5151 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
5153 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
5155 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
5163 /* Push padding now if padding above and stack grows down,
5164 or if padding below and stack grows up.
5165 But if space already allocated, this has already been done. */
5166 if (maybe_ne (extra
, 0)
5168 && where_pad
!= PAD_NONE
5169 && where_pad
!= stack_direction
)
5170 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5172 #ifdef PUSH_ROUNDING
5173 if (args_addr
== 0 && targetm
.calls
.push_argument (0))
5174 emit_single_push_insn (mode
, x
, type
);
5178 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
5179 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
5181 /* We do *not* set_mem_attributes here, because incoming arguments
5182 may overlap with sibling call outgoing arguments and we cannot
5183 allow reordering of reads from function arguments with stores
5184 to outgoing arguments of sibling calls. We do, however, want
5185 to record the alignment of the stack slot. */
5186 /* ALIGN may well be better aligned than TYPE, e.g. due to
5187 PARM_BOUNDARY. Assume the caller isn't lying. */
5188 set_mem_align (dest
, align
);
5190 emit_move_insn (dest
, x
);
5194 /* Move the partial arguments into the registers and any overlapping
5195 values that we moved into the pseudos in tmp_regs. */
5196 if (partial
> 0 && reg
!= 0)
5198 /* Handle calls that pass values in multiple non-contiguous locations.
5199 The Irix 6 ABI has examples of this. */
5200 if (GET_CODE (reg
) == PARALLEL
)
5201 emit_group_load (reg
, x
, type
, -1);
5204 gcc_assert (partial
% UNITS_PER_WORD
== 0);
5205 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
5207 for (int i
= 0; i
< overlapping
; i
++)
5208 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
5209 + nregs
- overlapping
+ i
),
5215 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
5216 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5218 if (alignment_pad
&& args_addr
== 0)
5219 anti_adjust_stack (alignment_pad
);
5224 /* Return X if X can be used as a subtarget in a sequence of arithmetic
5228 get_subtarget (rtx x
)
5232 /* Only registers can be subtargets. */
5234 /* Don't use hard regs to avoid extending their life. */
5235 || REGNO (x
) < FIRST_PSEUDO_REGISTER
5239 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
5240 FIELD is a bitfield. Returns true if the optimization was successful,
5241 and there's nothing else to do. */
5244 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
5245 poly_uint64 pbitpos
,
5246 poly_uint64 pbitregion_start
,
5247 poly_uint64 pbitregion_end
,
5248 machine_mode mode1
, rtx str_rtx
,
5249 tree to
, tree src
, bool reverse
)
5251 /* str_mode is not guaranteed to be a scalar type. */
5252 machine_mode str_mode
= GET_MODE (str_rtx
);
5253 unsigned int str_bitsize
;
5258 enum tree_code code
;
5260 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
5261 if (mode1
!= VOIDmode
5262 || !pbitsize
.is_constant (&bitsize
)
5263 || !pbitpos
.is_constant (&bitpos
)
5264 || !pbitregion_start
.is_constant (&bitregion_start
)
5265 || !pbitregion_end
.is_constant (&bitregion_end
)
5266 || bitsize
>= BITS_PER_WORD
5267 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
5268 || str_bitsize
> BITS_PER_WORD
5269 || TREE_SIDE_EFFECTS (to
)
5270 || TREE_THIS_VOLATILE (to
))
5274 if (TREE_CODE (src
) != SSA_NAME
)
5276 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
5279 srcstmt
= get_gimple_for_ssa_name (src
);
5281 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
5284 code
= gimple_assign_rhs_code (srcstmt
);
5286 op0
= gimple_assign_rhs1 (srcstmt
);
5288 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
5289 to find its initialization. Hopefully the initialization will
5290 be from a bitfield load. */
5291 if (TREE_CODE (op0
) == SSA_NAME
)
5293 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
5295 /* We want to eventually have OP0 be the same as TO, which
5296 should be a bitfield. */
5298 || !is_gimple_assign (op0stmt
)
5299 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
5301 op0
= gimple_assign_rhs1 (op0stmt
);
5304 op1
= gimple_assign_rhs2 (srcstmt
);
5306 if (!operand_equal_p (to
, op0
, 0))
5309 if (MEM_P (str_rtx
))
5311 unsigned HOST_WIDE_INT offset1
;
5313 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
5314 str_bitsize
= BITS_PER_WORD
;
5316 scalar_int_mode best_mode
;
5317 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
5318 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
5320 str_mode
= best_mode
;
5321 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
5324 bitpos
%= str_bitsize
;
5325 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
5326 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
5328 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
5331 /* If the bit field covers the whole REG/MEM, store_field
5332 will likely generate better code. */
5333 if (bitsize
>= str_bitsize
)
5336 /* We can't handle fields split across multiple entities. */
5337 if (bitpos
+ bitsize
> str_bitsize
)
5340 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
5341 bitpos
= str_bitsize
- bitpos
- bitsize
;
5347 /* For now, just optimize the case of the topmost bitfield
5348 where we don't need to do any masking and also
5349 1 bit bitfields where xor can be used.
5350 We might win by one instruction for the other bitfields
5351 too if insv/extv instructions aren't used, so that
5352 can be added later. */
5353 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
5354 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
5357 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
5358 value
= convert_modes (str_mode
,
5359 TYPE_MODE (TREE_TYPE (op1
)), value
,
5360 TYPE_UNSIGNED (TREE_TYPE (op1
)));
5362 /* We may be accessing data outside the field, which means
5363 we can alias adjacent data. */
5364 if (MEM_P (str_rtx
))
5366 str_rtx
= shallow_copy_rtx (str_rtx
);
5367 set_mem_alias_set (str_rtx
, 0);
5368 set_mem_expr (str_rtx
, 0);
5371 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
5373 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
5377 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
5379 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
5381 value
= flip_storage_order (str_mode
, value
);
5382 result
= expand_binop (str_mode
, binop
, str_rtx
,
5383 value
, str_rtx
, 1, OPTAB_WIDEN
);
5384 if (result
!= str_rtx
)
5385 emit_move_insn (str_rtx
, result
);
5390 if (TREE_CODE (op1
) != INTEGER_CST
)
5392 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
5393 value
= convert_modes (str_mode
,
5394 TYPE_MODE (TREE_TYPE (op1
)), value
,
5395 TYPE_UNSIGNED (TREE_TYPE (op1
)));
5397 /* We may be accessing data outside the field, which means
5398 we can alias adjacent data. */
5399 if (MEM_P (str_rtx
))
5401 str_rtx
= shallow_copy_rtx (str_rtx
);
5402 set_mem_alias_set (str_rtx
, 0);
5403 set_mem_expr (str_rtx
, 0);
5406 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
5407 if (bitpos
+ bitsize
!= str_bitsize
)
5409 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
5411 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
5413 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
5415 value
= flip_storage_order (str_mode
, value
);
5416 result
= expand_binop (str_mode
, binop
, str_rtx
,
5417 value
, str_rtx
, 1, OPTAB_WIDEN
);
5418 if (result
!= str_rtx
)
5419 emit_move_insn (str_rtx
, result
);
5429 /* In the C++ memory model, consecutive bit fields in a structure are
5430 considered one memory location.
5432 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5433 returns the bit range of consecutive bits in which this COMPONENT_REF
5434 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5435 and *OFFSET may be adjusted in the process.
5437 If the access does not need to be restricted, 0 is returned in both
5438 *BITSTART and *BITEND. */
5441 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
5442 poly_int64_pod
*bitpos
, tree
*offset
)
5444 poly_int64 bitoffset
;
5447 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5449 field
= TREE_OPERAND (exp
, 1);
5450 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5451 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5452 need to limit the range we can access. */
5455 *bitstart
= *bitend
= 0;
5459 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5460 part of a larger bit field, then the representative does not serve any
5461 useful purpose. This can occur in Ada. */
5462 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5465 poly_int64 rbitsize
, rbitpos
;
5467 int unsignedp
, reversep
, volatilep
= 0;
5468 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5469 &roffset
, &rmode
, &unsignedp
, &reversep
,
5471 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5473 *bitstart
= *bitend
= 0;
5478 /* Compute the adjustment to bitpos from the offset of the field
5479 relative to the representative. DECL_FIELD_OFFSET of field and
5480 repr are the same by construction if they are not constants,
5481 see finish_bitfield_layout. */
5482 poly_uint64 field_offset
, repr_offset
;
5483 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5484 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5485 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5488 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5489 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5491 /* If the adjustment is larger than bitpos, we would have a negative bit
5492 position for the lower bound and this may wreak havoc later. Adjust
5493 offset and bitpos to make the lower bound non-negative in that case. */
5494 if (maybe_gt (bitoffset
, *bitpos
))
5496 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5497 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5499 *bitpos
+= adjust_bits
;
5500 if (*offset
== NULL_TREE
)
5501 *offset
= size_int (-adjust_bytes
);
5503 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5507 *bitstart
= *bitpos
- bitoffset
;
5509 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5512 /* Returns true if BASE is a DECL that does not reside in memory and
5513 has non-BLKmode. DECL_RTL must not be a MEM; if
5514 DECL_RTL was not set yet, return false. */
5517 non_mem_decl_p (tree base
)
5520 || TREE_ADDRESSABLE (base
)
5521 || DECL_MODE (base
) == BLKmode
)
5524 if (!DECL_RTL_SET_P (base
))
5527 return (!MEM_P (DECL_RTL (base
)));
5530 /* Returns true if REF refers to an object that does not
5531 reside in memory and has non-BLKmode. */
5534 mem_ref_refers_to_non_mem_p (tree ref
)
5538 if (TREE_CODE (ref
) == MEM_REF
5539 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5541 tree addr
= TREE_OPERAND (ref
, 0);
5543 if (TREE_CODE (addr
) != ADDR_EXPR
)
5546 base
= TREE_OPERAND (addr
, 0);
5551 return non_mem_decl_p (base
);
5554 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5555 is true, try generating a nontemporal store. */
5558 expand_assignment (tree to
, tree from
, bool nontemporal
)
5564 enum insn_code icode
;
5566 /* Don't crash if the lhs of the assignment was erroneous. */
5567 if (TREE_CODE (to
) == ERROR_MARK
)
5569 expand_normal (from
);
5573 /* Optimize away no-op moves without side-effects. */
5574 if (operand_equal_p (to
, from
, 0))
5577 /* Handle misaligned stores. */
5578 mode
= TYPE_MODE (TREE_TYPE (to
));
5579 if ((TREE_CODE (to
) == MEM_REF
5580 || TREE_CODE (to
) == TARGET_MEM_REF
5583 && !mem_ref_refers_to_non_mem_p (to
)
5584 && ((align
= get_object_alignment (to
))
5585 < GET_MODE_ALIGNMENT (mode
))
5586 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5587 != CODE_FOR_nothing
)
5588 || targetm
.slow_unaligned_access (mode
, align
)))
5592 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5593 /* Handle PARALLEL. */
5594 reg
= maybe_emit_group_store (reg
, TREE_TYPE (from
));
5595 reg
= force_not_mem (reg
);
5596 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5597 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5598 reg
= flip_storage_order (mode
, reg
);
5600 if (icode
!= CODE_FOR_nothing
)
5602 class expand_operand ops
[2];
5604 create_fixed_operand (&ops
[0], mem
);
5605 create_input_operand (&ops
[1], reg
, mode
);
5606 /* The movmisalign<mode> pattern cannot fail, else the assignment
5607 would silently be omitted. */
5608 expand_insn (icode
, 2, ops
);
5611 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5616 /* Assignment of a structure component needs special treatment
5617 if the structure component's rtx is not simply a MEM.
5618 Assignment of an array element at a constant index, and assignment of
5619 an array element in an unaligned packed structure field, has the same
5620 problem. Same for (partially) storing into a non-memory object. */
5621 if (handled_component_p (to
)
5622 || (TREE_CODE (to
) == MEM_REF
5623 && (REF_REVERSE_STORAGE_ORDER (to
)
5624 || mem_ref_refers_to_non_mem_p (to
)))
5625 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5628 poly_int64 bitsize
, bitpos
;
5629 poly_uint64 bitregion_start
= 0;
5630 poly_uint64 bitregion_end
= 0;
5632 int unsignedp
, reversep
, volatilep
= 0;
5636 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5637 &unsignedp
, &reversep
, &volatilep
);
5639 /* Make sure bitpos is not negative, it can wreak havoc later. */
5640 if (maybe_lt (bitpos
, 0))
5642 gcc_assert (offset
== NULL_TREE
);
5643 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5644 bitpos
= num_trailing_bits (bitpos
);
5647 if (TREE_CODE (to
) == COMPONENT_REF
5648 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5649 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5650 /* The C++ memory model naturally applies to byte-aligned fields.
5651 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5652 BITSIZE are not byte-aligned, there is no need to limit the range
5653 we can access. This can occur with packed structures in Ada. */
5654 else if (maybe_gt (bitsize
, 0)
5655 && multiple_p (bitsize
, BITS_PER_UNIT
)
5656 && multiple_p (bitpos
, BITS_PER_UNIT
))
5658 bitregion_start
= bitpos
;
5659 bitregion_end
= bitpos
+ bitsize
- 1;
5662 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5664 /* If the field has a mode, we want to access it in the
5665 field's mode, not the computed mode.
5666 If a MEM has VOIDmode (external with incomplete type),
5667 use BLKmode for it instead. */
5670 if (mode1
!= VOIDmode
)
5671 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5672 else if (GET_MODE (to_rtx
) == VOIDmode
)
5673 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5678 machine_mode address_mode
;
5681 if (!MEM_P (to_rtx
))
5683 /* We can get constant negative offsets into arrays with broken
5684 user code. Translate this to a trap instead of ICEing. */
5685 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5686 expand_builtin_trap ();
5687 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5690 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5691 address_mode
= get_address_mode (to_rtx
);
5692 if (GET_MODE (offset_rtx
) != address_mode
)
5694 /* We cannot be sure that the RTL in offset_rtx is valid outside
5695 of a memory address context, so force it into a register
5696 before attempting to convert it to the desired mode. */
5697 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5698 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5701 /* If we have an expression in OFFSET_RTX and a non-zero
5702 byte offset in BITPOS, adding the byte offset before the
5703 OFFSET_RTX results in better intermediate code, which makes
5704 later rtl optimization passes perform better.
5706 We prefer intermediate code like this:
5708 r124:DI=r123:DI+0x18
5713 r124:DI=r123:DI+0x10
5714 [r124:DI+0x8]=r121:DI
5716 This is only done for aligned data values, as these can
5717 be expected to result in single move instructions. */
5719 if (mode1
!= VOIDmode
5720 && maybe_ne (bitpos
, 0)
5721 && maybe_gt (bitsize
, 0)
5722 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5723 && multiple_p (bitpos
, bitsize
)
5724 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5725 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5727 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5728 bitregion_start
= 0;
5729 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5730 bitregion_end
-= bitpos
;
5734 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5735 highest_pow2_factor_for_target (to
,
5739 /* No action is needed if the target is not a memory and the field
5740 lies completely outside that target. This can occur if the source
5741 code contains an out-of-bounds access to a small array. */
5743 && GET_MODE (to_rtx
) != BLKmode
5744 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5746 expand_normal (from
);
5749 /* Handle expand_expr of a complex value returning a CONCAT. */
5750 else if (GET_CODE (to_rtx
) == CONCAT
)
5752 machine_mode to_mode
= GET_MODE (to_rtx
);
5753 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5754 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5755 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5756 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5757 && known_eq (bitpos
, 0)
5758 && known_eq (bitsize
, mode_bitsize
))
5759 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5760 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5761 && known_eq (bitsize
, inner_bitsize
)
5762 && (known_eq (bitpos
, 0)
5763 || known_eq (bitpos
, inner_bitsize
)))
5764 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5765 false, nontemporal
, reversep
);
5766 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5767 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5768 bitregion_start
, bitregion_end
,
5769 mode1
, from
, get_alias_set (to
),
5770 nontemporal
, reversep
);
5771 else if (known_ge (bitpos
, inner_bitsize
))
5772 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5773 bitpos
- inner_bitsize
,
5774 bitregion_start
, bitregion_end
,
5775 mode1
, from
, get_alias_set (to
),
5776 nontemporal
, reversep
);
5777 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5779 result
= expand_normal (from
);
5780 if (GET_CODE (result
) == CONCAT
)
5782 to_mode
= GET_MODE_INNER (to_mode
);
5783 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5785 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5788 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5790 if (!from_real
|| !from_imag
)
5791 goto concat_store_slow
;
5792 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5793 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5797 machine_mode from_mode
5798 = GET_MODE (result
) == VOIDmode
5799 ? TYPE_MODE (TREE_TYPE (from
))
5800 : GET_MODE (result
);
5803 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5806 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5809 emit_move_insn (XEXP (to_rtx
, 0),
5810 read_complex_part (from_rtx
, false));
5811 emit_move_insn (XEXP (to_rtx
, 1),
5812 read_complex_part (from_rtx
, true));
5816 to_mode
= GET_MODE_INNER (to_mode
);
5818 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5820 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5821 GET_MODE_SIZE (to_mode
));
5822 if (!from_real
|| !from_imag
)
5823 goto concat_store_slow
;
5824 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5825 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5832 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5833 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5834 write_complex_part (temp
, XEXP (to_rtx
, 0), false, true);
5835 write_complex_part (temp
, XEXP (to_rtx
, 1), true, false);
5836 result
= store_field (temp
, bitsize
, bitpos
,
5837 bitregion_start
, bitregion_end
,
5838 mode1
, from
, get_alias_set (to
),
5839 nontemporal
, reversep
);
5840 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5841 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5844 /* For calls to functions returning variable length structures, if TO_RTX
5845 is not a MEM, go through a MEM because we must not create temporaries
5847 else if (!MEM_P (to_rtx
)
5848 && TREE_CODE (from
) == CALL_EXPR
5849 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5850 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5852 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5853 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5854 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5855 bitregion_end
, mode1
, from
, get_alias_set (to
),
5856 nontemporal
, reversep
);
5857 emit_move_insn (to_rtx
, temp
);
5863 /* If the field is at offset zero, we could have been given the
5864 DECL_RTX of the parent struct. Don't munge it. */
5865 to_rtx
= shallow_copy_rtx (to_rtx
);
5866 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5868 MEM_VOLATILE_P (to_rtx
) = 1;
5871 gcc_checking_assert (known_ge (bitpos
, 0));
5872 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5873 bitregion_start
, bitregion_end
,
5874 mode1
, to_rtx
, to
, from
,
5877 else if (SUBREG_P (to_rtx
)
5878 && SUBREG_PROMOTED_VAR_P (to_rtx
))
5880 /* If to_rtx is a promoted subreg, we need to zero or sign
5881 extend the value afterwards. */
5882 if (TREE_CODE (to
) == MEM_REF
5883 && TYPE_MODE (TREE_TYPE (from
)) != BLKmode
5884 && !REF_REVERSE_STORAGE_ORDER (to
)
5885 && known_eq (bitpos
, 0)
5886 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (to_rtx
))))
5887 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5891 = lowpart_subreg (subreg_unpromoted_mode (to_rtx
),
5892 SUBREG_REG (to_rtx
),
5893 subreg_promoted_mode (to_rtx
));
5894 result
= store_field (to_rtx1
, bitsize
, bitpos
,
5895 bitregion_start
, bitregion_end
,
5896 mode1
, from
, get_alias_set (to
),
5897 nontemporal
, reversep
);
5898 convert_move (SUBREG_REG (to_rtx
), to_rtx1
,
5899 SUBREG_PROMOTED_SIGN (to_rtx
));
5903 result
= store_field (to_rtx
, bitsize
, bitpos
,
5904 bitregion_start
, bitregion_end
,
5905 mode1
, from
, get_alias_set (to
),
5906 nontemporal
, reversep
);
5910 preserve_temp_slots (result
);
5915 /* If the rhs is a function call and its value is not an aggregate,
5916 call the function before we start to compute the lhs.
5917 This is needed for correct code for cases such as
5918 val = setjmp (buf) on machines where reference to val
5919 requires loading up part of an address in a separate insn.
5921 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5922 since it might be a promoted variable where the zero- or sign- extension
5923 needs to be done. Handling this in the normal way is safe because no
5924 computation is done before the call. The same is true for SSA names. */
5925 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5926 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5927 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5929 || TREE_CODE (to
) == PARM_DECL
5930 || TREE_CODE (to
) == RESULT_DECL
)
5931 && REG_P (DECL_RTL (to
)))
5932 || TREE_CODE (to
) == SSA_NAME
))
5937 value
= expand_normal (from
);
5940 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5942 /* Handle calls that return values in multiple non-contiguous locations.
5943 The Irix 6 ABI has examples of this. */
5944 if (GET_CODE (to_rtx
) == PARALLEL
)
5946 if (GET_CODE (value
) == PARALLEL
)
5947 emit_group_move (to_rtx
, value
);
5949 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5950 int_size_in_bytes (TREE_TYPE (from
)));
5952 else if (GET_CODE (value
) == PARALLEL
)
5953 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5954 int_size_in_bytes (TREE_TYPE (from
)));
5955 else if (GET_MODE (to_rtx
) == BLKmode
)
5957 /* Handle calls that return BLKmode values in registers. */
5959 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5961 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5965 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5966 value
= convert_memory_address_addr_space
5967 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5968 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5970 emit_move_insn (to_rtx
, value
);
5973 preserve_temp_slots (to_rtx
);
5978 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5979 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5981 /* Don't move directly into a return register. */
5982 if (TREE_CODE (to
) == RESULT_DECL
5983 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5989 /* If the source is itself a return value, it still is in a pseudo at
5990 this point so we can move it back to the return register directly. */
5992 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5993 && TREE_CODE (from
) != CALL_EXPR
)
5994 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5996 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5998 /* Handle calls that return values in multiple non-contiguous locations.
5999 The Irix 6 ABI has examples of this. */
6000 if (GET_CODE (to_rtx
) == PARALLEL
)
6002 if (GET_CODE (temp
) == PARALLEL
)
6003 emit_group_move (to_rtx
, temp
);
6005 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
6006 int_size_in_bytes (TREE_TYPE (from
)));
6009 emit_move_insn (to_rtx
, temp
);
6011 preserve_temp_slots (to_rtx
);
6016 /* In case we are returning the contents of an object which overlaps
6017 the place the value is being stored, use a safe function when copying
6018 a value through a pointer into a structure value return block. */
6019 if (TREE_CODE (to
) == RESULT_DECL
6020 && TREE_CODE (from
) == INDIRECT_REF
6021 && ADDR_SPACE_GENERIC_P
6022 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
6023 && refs_may_alias_p (to
, from
)
6024 && cfun
->returns_struct
6025 && !cfun
->returns_pcc_struct
)
6030 size
= expr_size (from
);
6031 from_rtx
= expand_normal (from
);
6033 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
6035 preserve_temp_slots (to_rtx
);
6040 /* Compute FROM and store the value in the rtx we got. */
6043 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
6044 preserve_temp_slots (result
);
6049 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
6050 succeeded, false otherwise. */
6053 emit_storent_insn (rtx to
, rtx from
)
6055 class expand_operand ops
[2];
6056 machine_mode mode
= GET_MODE (to
);
6057 enum insn_code code
= optab_handler (storent_optab
, mode
);
6059 if (code
== CODE_FOR_nothing
)
6062 create_fixed_operand (&ops
[0], to
);
6063 create_input_operand (&ops
[1], from
, mode
);
6064 return maybe_expand_insn (code
, 2, ops
);
6067 /* Helper function for store_expr storing of STRING_CST. */
6070 string_cst_read_str (void *data
, void *, HOST_WIDE_INT offset
,
6071 fixed_size_mode mode
)
6073 tree str
= (tree
) data
;
6075 gcc_assert (offset
>= 0);
6076 if (offset
>= TREE_STRING_LENGTH (str
))
6079 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
6080 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
6082 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
6083 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
6084 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
6085 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
6086 return c_readstr (p
, as_a
<scalar_int_mode
> (mode
), false);
6089 /* The by-pieces infrastructure does not try to pick a vector mode
6090 for storing STRING_CST. */
6091 return c_readstr (TREE_STRING_POINTER (str
) + offset
,
6092 as_a
<scalar_int_mode
> (mode
), false);
6095 /* Generate code for computing expression EXP,
6096 and storing the value into TARGET.
6098 If the mode is BLKmode then we may return TARGET itself.
6099 It turns out that in BLKmode it doesn't cause a problem.
6100 because C has no operators that could combine two different
6101 assignments into the same BLKmode object with different values
6102 with no sequence point. Will other languages need this to
6105 If CALL_PARAM_P is nonzero, this is a store into a call param on the
6106 stack, and block moves may need to be treated specially.
6108 If NONTEMPORAL is true, try using a nontemporal store instruction.
6110 If REVERSE is true, the store is to be done in reverse order. */
6113 store_expr (tree exp
, rtx target
, int call_param_p
,
6114 bool nontemporal
, bool reverse
)
6117 rtx alt_rtl
= NULL_RTX
;
6118 location_t loc
= curr_insn_location ();
6119 bool shortened_string_cst
= false;
6121 if (VOID_TYPE_P (TREE_TYPE (exp
)))
6123 /* C++ can generate ?: expressions with a throw expression in one
6124 branch and an rvalue in the other. Here, we resolve attempts to
6125 store the throw expression's nonexistent result. */
6126 gcc_assert (!call_param_p
);
6127 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6130 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
6132 /* Perform first part of compound expression, then assign from second
6134 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
6135 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
6136 return store_expr (TREE_OPERAND (exp
, 1), target
,
6137 call_param_p
, nontemporal
, reverse
);
6139 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
6141 /* For conditional expression, get safe form of the target. Then
6142 test the condition, doing the appropriate assignment on either
6143 side. This avoids the creation of unnecessary temporaries.
6144 For non-BLKmode, it is more efficient not to do this. */
6146 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
6148 do_pending_stack_adjust ();
6150 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
6151 profile_probability::uninitialized ());
6152 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
6153 nontemporal
, reverse
);
6154 emit_jump_insn (targetm
.gen_jump (lab2
));
6157 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
6158 nontemporal
, reverse
);
6164 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
6165 /* If this is a scalar in a register that is stored in a wider mode
6166 than the declared mode, compute the result into its declared mode
6167 and then convert to the wider mode. Our value is the computed
6170 rtx inner_target
= 0;
6171 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
6172 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
6174 /* We can do the conversion inside EXP, which will often result
6175 in some optimizations. Do the conversion in two steps: first
6176 change the signedness, if needed, then the extend. But don't
6177 do this if the type of EXP is a subtype of something else
6178 since then the conversion might involve more than just
6179 converting modes. */
6180 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
6181 && TREE_TYPE (TREE_TYPE (exp
)) == 0
6182 && GET_MODE_PRECISION (outer_mode
)
6183 == TYPE_PRECISION (TREE_TYPE (exp
)))
6185 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
6186 TYPE_UNSIGNED (TREE_TYPE (exp
))))
6188 /* Some types, e.g. Fortran's logical*4, won't have a signed
6189 version, so use the mode instead. */
6191 = (signed_or_unsigned_type_for
6192 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
6194 ntype
= lang_hooks
.types
.type_for_mode
6195 (TYPE_MODE (TREE_TYPE (exp
)),
6196 SUBREG_PROMOTED_SIGN (target
));
6198 exp
= fold_convert_loc (loc
, ntype
, exp
);
6201 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
6202 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
6205 inner_target
= SUBREG_REG (target
);
6208 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
6209 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
6212 /* If TEMP is a VOIDmode constant, use convert_modes to make
6213 sure that we properly convert it. */
6214 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
6216 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
6217 temp
, SUBREG_PROMOTED_SIGN (target
));
6218 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
6219 SUBREG_PROMOTED_SIGN (target
));
6221 else if (!SCALAR_INT_MODE_P (GET_MODE (temp
)))
6222 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
6223 temp
, SUBREG_PROMOTED_SIGN (target
));
6225 convert_move (SUBREG_REG (target
), temp
,
6226 SUBREG_PROMOTED_SIGN (target
));
6230 else if ((TREE_CODE (exp
) == STRING_CST
6231 || (TREE_CODE (exp
) == MEM_REF
6232 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6233 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6235 && integer_zerop (TREE_OPERAND (exp
, 1))))
6236 && !nontemporal
&& !call_param_p
6239 /* Optimize initialization of an array with a STRING_CST. */
6240 HOST_WIDE_INT exp_len
, str_copy_len
;
6242 tree str
= TREE_CODE (exp
) == STRING_CST
6243 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
6245 exp_len
= int_expr_size (exp
);
6249 if (TREE_STRING_LENGTH (str
) <= 0)
6252 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
6253 MEM_ALIGN (target
), false))
6255 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
6256 MEM_ALIGN (target
), false, RETURN_BEGIN
);
6260 str_copy_len
= TREE_STRING_LENGTH (str
);
6262 /* Trailing NUL bytes in EXP will be handled by the call to
6263 clear_storage, which is more efficient than copying them from
6264 the STRING_CST, so trim those from STR_COPY_LEN. */
6265 while (str_copy_len
)
6267 if (TREE_STRING_POINTER (str
)[str_copy_len
- 1])
6272 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
6274 str_copy_len
+= STORE_MAX_PIECES
- 1;
6275 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
6277 if (str_copy_len
>= exp_len
)
6280 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
6281 (void *) str
, MEM_ALIGN (target
), false))
6284 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
6285 (void *) str
, MEM_ALIGN (target
), false,
6287 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
6288 exp_len
- str_copy_len
),
6289 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
6297 /* If we want to use a nontemporal or a reverse order store, force the
6298 value into a register first. */
6299 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
6301 if (TREE_CODE (exp
) == STRING_CST
6302 && tmp_target
== target
6303 && GET_MODE (target
) == BLKmode
6304 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
6306 rtx size
= expr_size (exp
);
6307 if (CONST_INT_P (size
)
6308 && size
!= const0_rtx
6310 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
6312 /* If the STRING_CST has much larger array type than
6313 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
6314 it into the rodata section as the code later on will use
6315 memset zero for the remainder anyway. See PR95052. */
6316 tmp_target
= NULL_RTX
;
6317 rexp
= copy_node (exp
);
6319 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
6320 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
6322 shortened_string_cst
= true;
6325 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
6327 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
6329 if (shortened_string_cst
)
6331 gcc_assert (MEM_P (temp
));
6332 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
6336 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
6337 the same as that of TARGET, adjust the constant. This is needed, for
6338 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
6339 only a word-sized value. */
6340 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
6341 && TREE_CODE (exp
) != ERROR_MARK
6342 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
6344 gcc_assert (!shortened_string_cst
);
6345 if (GET_MODE_CLASS (GET_MODE (target
))
6346 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
6347 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
6348 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
6350 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
6351 TYPE_MODE (TREE_TYPE (exp
)), 0);
6355 if (GET_MODE (temp
) == VOIDmode
)
6356 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
6357 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
6360 /* If value was not generated in the target, store it there.
6361 Convert the value to TARGET's type first if necessary and emit the
6362 pending incrementations that have been queued when expanding EXP.
6363 Note that we cannot emit the whole queue blindly because this will
6364 effectively disable the POST_INC optimization later.
6366 If TEMP and TARGET compare equal according to rtx_equal_p, but
6367 one or both of them are volatile memory refs, we have to distinguish
6369 - expand_expr has used TARGET. In this case, we must not generate
6370 another copy. This can be detected by TARGET being equal according
6372 - expand_expr has not used TARGET - that means that the source just
6373 happens to have the same RTX form. Since temp will have been created
6374 by expand_expr, it will compare unequal according to == .
6375 We must generate a copy in this case, to reach the correct number
6376 of volatile memory references. */
6378 if ((! rtx_equal_p (temp
, target
)
6379 || (temp
!= target
&& (side_effects_p (temp
)
6380 || side_effects_p (target
)
6382 && !mems_same_for_tbaa_p (temp
, target
)))))
6383 && TREE_CODE (exp
) != ERROR_MARK
6384 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
6385 but TARGET is not valid memory reference, TEMP will differ
6386 from TARGET although it is really the same location. */
6388 && rtx_equal_p (alt_rtl
, target
)
6389 && !side_effects_p (alt_rtl
)
6390 && !side_effects_p (target
))
6391 /* If there's nothing to copy, don't bother. Don't call
6392 expr_size unless necessary, because some front-ends (C++)
6393 expr_size-hook must not be given objects that are not
6394 supposed to be bit-copied or bit-initialized. */
6395 && expr_size (exp
) != const0_rtx
)
6397 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
6399 gcc_assert (!shortened_string_cst
);
6400 if (GET_MODE (target
) == BLKmode
)
6402 /* Handle calls that return BLKmode values in registers. */
6403 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6404 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
6406 store_bit_field (target
,
6407 rtx_to_poly_int64 (expr_size (exp
))
6409 0, 0, 0, GET_MODE (temp
), temp
, reverse
,
6413 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
6416 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
6418 /* Handle copying a string constant into an array. The string
6419 constant may be shorter than the array. So copy just the string's
6420 actual length, and clear the rest. First get the size of the data
6421 type of the string, which is actually the size of the target. */
6422 rtx size
= expr_size (exp
);
6424 if (CONST_INT_P (size
)
6425 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
6426 emit_block_move (target
, temp
, size
,
6428 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6431 machine_mode pointer_mode
6432 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
6433 machine_mode address_mode
= get_address_mode (target
);
6435 /* Compute the size of the data to copy from the string. */
6437 = size_binop_loc (loc
, MIN_EXPR
,
6438 make_tree (sizetype
, size
),
6439 size_int (TREE_STRING_LENGTH (exp
)));
6441 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
6443 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
6444 rtx_code_label
*label
= 0;
6446 /* Copy that much. */
6447 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
6448 TYPE_UNSIGNED (sizetype
));
6449 emit_block_move (target
, temp
, copy_size_rtx
,
6451 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6453 /* Figure out how much is left in TARGET that we have to clear.
6454 Do all calculations in pointer_mode. */
6455 poly_int64 const_copy_size
;
6456 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
6458 size
= plus_constant (address_mode
, size
, -const_copy_size
);
6459 target
= adjust_address (target
, BLKmode
, const_copy_size
);
6463 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
6464 copy_size_rtx
, NULL_RTX
, 0,
6467 if (GET_MODE (copy_size_rtx
) != address_mode
)
6468 copy_size_rtx
= convert_to_mode (address_mode
,
6470 TYPE_UNSIGNED (sizetype
));
6472 target
= offset_address (target
, copy_size_rtx
,
6473 highest_pow2_factor (copy_size
));
6474 label
= gen_label_rtx ();
6475 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6476 GET_MODE (size
), 0, label
);
6479 if (size
!= const0_rtx
)
6480 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6486 else if (shortened_string_cst
)
6488 /* Handle calls that return values in multiple non-contiguous locations.
6489 The Irix 6 ABI has examples of this. */
6490 else if (GET_CODE (target
) == PARALLEL
)
6492 if (GET_CODE (temp
) == PARALLEL
)
6493 emit_group_move (target
, temp
);
6495 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6496 int_size_in_bytes (TREE_TYPE (exp
)));
6498 else if (GET_CODE (temp
) == PARALLEL
)
6499 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6500 int_size_in_bytes (TREE_TYPE (exp
)));
6501 else if (GET_MODE (temp
) == BLKmode
)
6502 emit_block_move (target
, temp
, expr_size (exp
),
6504 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6505 /* If we emit a nontemporal store, there is nothing else to do. */
6506 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6511 temp
= flip_storage_order (GET_MODE (target
), temp
);
6512 temp
= force_operand (temp
, target
);
6514 emit_move_insn (target
, temp
);
6518 gcc_assert (!shortened_string_cst
);
6523 /* Return true if field F of structure TYPE is a flexible array. */
6526 flexible_array_member_p (const_tree f
, const_tree type
)
6531 return (DECL_CHAIN (f
) == NULL
6532 && TREE_CODE (tf
) == ARRAY_TYPE
6534 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6535 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6536 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6537 && int_size_in_bytes (type
) >= 0);
6540 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6541 must have in order for it to completely initialize a value of type TYPE.
6542 Return -1 if the number isn't known.
6544 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6546 static HOST_WIDE_INT
6547 count_type_elements (const_tree type
, bool for_ctor_p
)
6549 switch (TREE_CODE (type
))
6555 nelts
= array_type_nelts (type
);
6556 if (nelts
&& tree_fits_uhwi_p (nelts
))
6558 unsigned HOST_WIDE_INT n
;
6560 n
= tree_to_uhwi (nelts
) + 1;
6561 if (n
== 0 || for_ctor_p
)
6564 return n
* count_type_elements (TREE_TYPE (type
), false);
6566 return for_ctor_p
? -1 : 1;
6571 unsigned HOST_WIDE_INT n
;
6575 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6576 if (TREE_CODE (f
) == FIELD_DECL
)
6579 n
+= count_type_elements (TREE_TYPE (f
), false);
6580 else if (!flexible_array_member_p (f
, type
))
6581 /* Don't count flexible arrays, which are not supposed
6582 to be initialized. */
6590 case QUAL_UNION_TYPE
:
6595 gcc_assert (!for_ctor_p
);
6596 /* Estimate the number of scalars in each field and pick the
6597 maximum. Other estimates would do instead; the idea is simply
6598 to make sure that the estimate is not sensitive to the ordering
6601 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6602 if (TREE_CODE (f
) == FIELD_DECL
)
6604 m
= count_type_elements (TREE_TYPE (f
), false);
6605 /* If the field doesn't span the whole union, add an extra
6606 scalar for the rest. */
6607 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6608 TYPE_SIZE (type
)) != 1)
6621 unsigned HOST_WIDE_INT nelts
;
6622 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6630 case FIXED_POINT_TYPE
:
6635 case REFERENCE_TYPE
:
6652 /* Helper for categorize_ctor_elements. Identical interface. */
6655 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6656 HOST_WIDE_INT
*p_unique_nz_elts
,
6657 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6659 unsigned HOST_WIDE_INT idx
;
6660 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6661 tree value
, purpose
, elt_type
;
6663 /* Whether CTOR is a valid constant initializer, in accordance with what
6664 initializer_constant_valid_p does. If inferred from the constructor
6665 elements, true until proven otherwise. */
6666 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6667 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6673 elt_type
= NULL_TREE
;
6675 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6677 HOST_WIDE_INT mult
= 1;
6679 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6681 tree lo_index
= TREE_OPERAND (purpose
, 0);
6682 tree hi_index
= TREE_OPERAND (purpose
, 1);
6684 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6685 mult
= (tree_to_uhwi (hi_index
)
6686 - tree_to_uhwi (lo_index
) + 1);
6689 elt_type
= TREE_TYPE (value
);
6691 switch (TREE_CODE (value
))
6695 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6697 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6700 nz_elts
+= mult
* nz
;
6701 unique_nz_elts
+= unz
;
6702 init_elts
+= mult
* ic
;
6704 if (const_from_elts_p
&& const_p
)
6705 const_p
= const_elt_p
;
6712 if (!initializer_zerop (value
))
6721 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6722 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6723 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6727 if (!initializer_zerop (TREE_REALPART (value
)))
6732 if (!initializer_zerop (TREE_IMAGPART (value
)))
6737 init_elts
+= 2 * mult
;
6742 /* We can only construct constant-length vectors using
6744 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6745 for (unsigned int i
= 0; i
< nunits
; ++i
)
6747 tree v
= VECTOR_CST_ELT (value
, i
);
6748 if (!initializer_zerop (v
))
6760 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6761 nz_elts
+= mult
* tc
;
6762 unique_nz_elts
+= tc
;
6763 init_elts
+= mult
* tc
;
6765 if (const_from_elts_p
&& const_p
)
6767 = initializer_constant_valid_p (value
,
6769 TYPE_REVERSE_STORAGE_ORDER
6777 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6778 num_fields
, elt_type
))
6779 *p_complete
= false;
6781 *p_nz_elts
+= nz_elts
;
6782 *p_unique_nz_elts
+= unique_nz_elts
;
6783 *p_init_elts
+= init_elts
;
6788 /* Examine CTOR to discover:
6789 * how many scalar fields are set to nonzero values,
6790 and place it in *P_NZ_ELTS;
6791 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6792 high - low + 1 (this can be useful for callers to determine ctors
6793 that could be cheaply initialized with - perhaps nested - loops
6794 compared to copied from huge read-only data),
6795 and place it in *P_UNIQUE_NZ_ELTS;
6796 * how many scalar fields in total are in CTOR,
6797 and place it in *P_ELT_COUNT.
6798 * whether the constructor is complete -- in the sense that every
6799 meaningful byte is explicitly given a value --
6800 and place it in *P_COMPLETE.
6802 Return whether or not CTOR is a valid static constant initializer, the same
6803 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6806 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6807 HOST_WIDE_INT
*p_unique_nz_elts
,
6808 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6811 *p_unique_nz_elts
= 0;
6815 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6816 p_init_elts
, p_complete
);
6819 /* Return true if constructor CTOR is simple enough to be materialized
6820 in an integer mode register. Limit the size to WORDS words, which
6824 immediate_const_ctor_p (const_tree ctor
, unsigned int words
)
6826 /* Allow function to be called with a VAR_DECL's DECL_INITIAL. */
6827 if (!ctor
|| TREE_CODE (ctor
) != CONSTRUCTOR
)
6830 return TREE_CONSTANT (ctor
)
6831 && !TREE_ADDRESSABLE (ctor
)
6832 && CONSTRUCTOR_NELTS (ctor
)
6833 && TREE_CODE (TREE_TYPE (ctor
)) != ARRAY_TYPE
6834 && int_expr_size (ctor
) <= words
* UNITS_PER_WORD
6835 && initializer_constant_valid_for_bitfield_p (ctor
);
6838 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6839 of which had type LAST_TYPE. Each element was itself a complete
6840 initializer, in the sense that every meaningful byte was explicitly
6841 given a value. Return true if the same is true for the constructor
6845 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6846 const_tree last_type
)
6848 if (TREE_CODE (type
) == UNION_TYPE
6849 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6854 gcc_assert (num_elts
== 1 && last_type
);
6856 /* ??? We could look at each element of the union, and find the
6857 largest element. Which would avoid comparing the size of the
6858 initialized element against any tail padding in the union.
6859 Doesn't seem worth the effort... */
6860 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6863 return count_type_elements (type
, true) == num_elts
;
6866 /* Return true if EXP contains mostly (3/4) zeros. */
6869 mostly_zeros_p (const_tree exp
)
6871 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6873 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6876 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6878 return !complete_p
|| nz_elts
< init_elts
/ 4;
6881 return initializer_zerop (exp
);
6884 /* Return true if EXP contains all zeros. */
6887 all_zeros_p (const_tree exp
)
6889 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6891 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6894 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6896 return nz_elts
== 0;
6899 return initializer_zerop (exp
);
6902 /* Helper function for store_constructor.
6903 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6904 CLEARED is as for store_constructor.
6905 ALIAS_SET is the alias set to use for any stores.
6906 If REVERSE is true, the store is to be done in reverse order.
6908 This provides a recursive shortcut back to store_constructor when it isn't
6909 necessary to go through store_field. This is so that we can pass through
6910 the cleared field to let store_constructor know that we may not have to
6911 clear a substructure if the outer structure has already been cleared. */
6914 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6915 poly_uint64 bitregion_start
,
6916 poly_uint64 bitregion_end
,
6918 tree exp
, int cleared
,
6919 alias_set_type alias_set
, bool reverse
)
6922 poly_uint64 bytesize
;
6923 if (TREE_CODE (exp
) == CONSTRUCTOR
6924 /* We can only call store_constructor recursively if the size and
6925 bit position are on a byte boundary. */
6926 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6927 && maybe_ne (bitsize
, 0U)
6928 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6929 /* If we have a nonzero bitpos for a register target, then we just
6930 let store_field do the bitfield handling. This is unlikely to
6931 generate unnecessary clear instructions anyways. */
6932 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6936 machine_mode target_mode
= GET_MODE (target
);
6937 if (target_mode
!= BLKmode
6938 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6939 target_mode
= BLKmode
;
6940 target
= adjust_address (target
, target_mode
, bytepos
);
6944 /* Update the alias set, if required. */
6945 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6946 && MEM_ALIAS_SET (target
) != 0)
6948 target
= copy_rtx (target
);
6949 set_mem_alias_set (target
, alias_set
);
6952 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6955 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6956 exp
, alias_set
, false, reverse
);
6960 /* Returns the number of FIELD_DECLs in TYPE. */
6963 fields_length (const_tree type
)
6965 tree t
= TYPE_FIELDS (type
);
6968 for (; t
; t
= DECL_CHAIN (t
))
6969 if (TREE_CODE (t
) == FIELD_DECL
)
6976 /* Store the value of constructor EXP into the rtx TARGET.
6977 TARGET is either a REG or a MEM; we know it cannot conflict, since
6978 safe_from_p has been called.
6979 CLEARED is true if TARGET is known to have been zero'd.
6980 SIZE is the number of bytes of TARGET we are allowed to modify: this
6981 may not be the same as the size of EXP if we are assigning to a field
6982 which has been packed to exclude padding bits.
6983 If REVERSE is true, the store is to be done in reverse order. */
6986 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6989 tree type
= TREE_TYPE (exp
);
6990 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6991 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6993 switch (TREE_CODE (type
))
6997 case QUAL_UNION_TYPE
:
6999 unsigned HOST_WIDE_INT idx
;
7002 /* The storage order is specified for every aggregate type. */
7003 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
7005 /* If size is zero or the target is already cleared, do nothing. */
7006 if (known_eq (size
, 0) || cleared
)
7008 /* We either clear the aggregate or indicate the value is dead. */
7009 else if ((TREE_CODE (type
) == UNION_TYPE
7010 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
7011 && ! CONSTRUCTOR_ELTS (exp
))
7012 /* If the constructor is empty, clear the union. */
7014 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7018 /* If we are building a static constructor into a register,
7019 set the initial value as zero so we can fold the value into
7020 a constant. But if more than one register is involved,
7021 this probably loses. */
7022 else if (REG_P (target
) && TREE_STATIC (exp
)
7023 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
7024 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
7026 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
7030 /* If the constructor has fewer fields than the structure or
7031 if we are initializing the structure to mostly zeros, clear
7032 the whole structure first. Don't do this if TARGET is a
7033 register whose mode size isn't equal to SIZE since
7034 clear_storage can't handle this case. */
7035 else if (known_size_p (size
)
7036 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
7037 || mostly_zeros_p (exp
))
7039 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
7041 clear_storage (target
, gen_int_mode (size
, Pmode
),
7046 if (REG_P (target
) && !cleared
)
7047 emit_clobber (target
);
7049 /* Store each element of the constructor into the
7050 corresponding field of TARGET. */
7051 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
7054 HOST_WIDE_INT bitsize
;
7055 HOST_WIDE_INT bitpos
= 0;
7057 rtx to_rtx
= target
;
7059 /* Just ignore missing fields. We cleared the whole
7060 structure, above, if any fields are missing. */
7064 if (cleared
&& initializer_zerop (value
))
7067 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
7068 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
7072 mode
= DECL_MODE (field
);
7073 if (DECL_BIT_FIELD (field
))
7076 offset
= DECL_FIELD_OFFSET (field
);
7077 if (tree_fits_shwi_p (offset
)
7078 && tree_fits_shwi_p (bit_position (field
)))
7080 bitpos
= int_bit_position (field
);
7086 /* If this initializes a field that is smaller than a
7087 word, at the start of a word, try to widen it to a full
7088 word. This special case allows us to output C++ member
7089 function initializations in a form that the optimizers
7091 if (WORD_REGISTER_OPERATIONS
7093 && bitsize
< BITS_PER_WORD
7094 && bitpos
% BITS_PER_WORD
== 0
7095 && GET_MODE_CLASS (mode
) == MODE_INT
7096 && TREE_CODE (value
) == INTEGER_CST
7098 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
7100 type
= TREE_TYPE (value
);
7102 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
7104 type
= lang_hooks
.types
.type_for_mode
7105 (word_mode
, TYPE_UNSIGNED (type
));
7106 value
= fold_convert (type
, value
);
7107 /* Make sure the bits beyond the original bitsize are zero
7108 so that we can correctly avoid extra zeroing stores in
7109 later constructor elements. */
7111 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
7113 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
7116 if (BYTES_BIG_ENDIAN
)
7118 = fold_build2 (LSHIFT_EXPR
, type
, value
,
7119 build_int_cst (type
,
7120 BITS_PER_WORD
- bitsize
));
7121 bitsize
= BITS_PER_WORD
;
7125 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
7126 && DECL_NONADDRESSABLE_P (field
))
7128 to_rtx
= copy_rtx (to_rtx
);
7129 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
7132 store_constructor_field (to_rtx
, bitsize
, bitpos
,
7133 0, bitregion_end
, mode
,
7135 get_alias_set (TREE_TYPE (field
)),
7143 unsigned HOST_WIDE_INT i
;
7146 tree elttype
= TREE_TYPE (type
);
7147 bool const_bounds_p
;
7148 HOST_WIDE_INT minelt
= 0;
7149 HOST_WIDE_INT maxelt
= 0;
7151 /* The storage order is specified for every aggregate type. */
7152 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
7154 domain
= TYPE_DOMAIN (type
);
7155 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
7156 && TYPE_MAX_VALUE (domain
)
7157 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
7158 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
7160 /* If we have constant bounds for the range of the type, get them. */
7163 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
7164 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
7167 /* If the constructor has fewer elements than the array, clear
7168 the whole array first. Similarly if this is static
7169 constructor of a non-BLKmode object. */
7171 need_to_clear
= false;
7172 else if (REG_P (target
) && TREE_STATIC (exp
))
7173 need_to_clear
= true;
7176 unsigned HOST_WIDE_INT idx
;
7177 HOST_WIDE_INT count
= 0, zero_count
= 0;
7178 need_to_clear
= ! const_bounds_p
;
7180 /* This loop is a more accurate version of the loop in
7181 mostly_zeros_p (it handles RANGE_EXPR in an index). It
7182 is also needed to check for missing elements. */
7183 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
7185 HOST_WIDE_INT this_node_count
;
7190 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
7192 tree lo_index
= TREE_OPERAND (index
, 0);
7193 tree hi_index
= TREE_OPERAND (index
, 1);
7195 if (! tree_fits_uhwi_p (lo_index
)
7196 || ! tree_fits_uhwi_p (hi_index
))
7198 need_to_clear
= true;
7202 this_node_count
= (tree_to_uhwi (hi_index
)
7203 - tree_to_uhwi (lo_index
) + 1);
7206 this_node_count
= 1;
7208 count
+= this_node_count
;
7209 if (mostly_zeros_p (value
))
7210 zero_count
+= this_node_count
;
7213 /* Clear the entire array first if there are any missing
7214 elements, or if the incidence of zero elements is >=
7217 && (count
< maxelt
- minelt
+ 1
7218 || 4 * zero_count
>= 3 * count
))
7219 need_to_clear
= true;
7222 if (need_to_clear
&& maybe_gt (size
, 0))
7225 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
7227 clear_storage (target
, gen_int_mode (size
, Pmode
),
7232 if (!cleared
&& REG_P (target
))
7233 /* Inform later passes that the old value is dead. */
7234 emit_clobber (target
);
7236 /* Store each element of the constructor into the
7237 corresponding element of TARGET, determined by counting the
7239 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
7243 HOST_WIDE_INT bitpos
;
7244 rtx xtarget
= target
;
7246 if (cleared
&& initializer_zerop (value
))
7249 mode
= TYPE_MODE (elttype
);
7250 if (mode
!= BLKmode
)
7251 bitsize
= GET_MODE_BITSIZE (mode
);
7252 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
7255 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
7257 tree lo_index
= TREE_OPERAND (index
, 0);
7258 tree hi_index
= TREE_OPERAND (index
, 1);
7259 rtx index_r
, pos_rtx
;
7260 HOST_WIDE_INT lo
, hi
, count
;
7263 /* If the range is constant and "small", unroll the loop. */
7265 && tree_fits_shwi_p (lo_index
)
7266 && tree_fits_shwi_p (hi_index
)
7267 && (lo
= tree_to_shwi (lo_index
),
7268 hi
= tree_to_shwi (hi_index
),
7269 count
= hi
- lo
+ 1,
7272 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
7273 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
7276 lo
-= minelt
; hi
-= minelt
;
7277 for (; lo
<= hi
; lo
++)
7279 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
7282 && !MEM_KEEP_ALIAS_SET_P (target
)
7283 && TREE_CODE (type
) == ARRAY_TYPE
7284 && TYPE_NONALIASED_COMPONENT (type
))
7286 target
= copy_rtx (target
);
7287 MEM_KEEP_ALIAS_SET_P (target
) = 1;
7290 store_constructor_field
7291 (target
, bitsize
, bitpos
, 0, bitregion_end
,
7292 mode
, value
, cleared
,
7293 get_alias_set (elttype
), reverse
);
7298 rtx_code_label
*loop_start
= gen_label_rtx ();
7299 rtx_code_label
*loop_end
= gen_label_rtx ();
7302 expand_normal (hi_index
);
7304 index
= build_decl (EXPR_LOCATION (exp
),
7305 VAR_DECL
, NULL_TREE
, domain
);
7306 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
7307 SET_DECL_RTL (index
, index_r
);
7308 store_expr (lo_index
, index_r
, 0, false, reverse
);
7310 /* Build the head of the loop. */
7311 do_pending_stack_adjust ();
7312 emit_label (loop_start
);
7314 /* Assign value to element index. */
7316 fold_convert (ssizetype
,
7317 fold_build2 (MINUS_EXPR
,
7320 TYPE_MIN_VALUE (domain
)));
7323 size_binop (MULT_EXPR
, position
,
7324 fold_convert (ssizetype
,
7325 TYPE_SIZE_UNIT (elttype
)));
7327 pos_rtx
= expand_normal (position
);
7328 xtarget
= offset_address (target
, pos_rtx
,
7329 highest_pow2_factor (position
));
7330 xtarget
= adjust_address (xtarget
, mode
, 0);
7331 if (TREE_CODE (value
) == CONSTRUCTOR
)
7332 store_constructor (value
, xtarget
, cleared
,
7333 exact_div (bitsize
, BITS_PER_UNIT
),
7336 store_expr (value
, xtarget
, 0, false, reverse
);
7338 /* Generate a conditional jump to exit the loop. */
7339 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
7341 jumpif (exit_cond
, loop_end
,
7342 profile_probability::uninitialized ());
7344 /* Update the loop counter, and jump to the head of
7346 expand_assignment (index
,
7347 build2 (PLUS_EXPR
, TREE_TYPE (index
),
7348 index
, integer_one_node
),
7351 emit_jump (loop_start
);
7353 /* Build the end of the loop. */
7354 emit_label (loop_end
);
7357 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
7358 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
7363 index
= ssize_int (1);
7366 index
= fold_convert (ssizetype
,
7367 fold_build2 (MINUS_EXPR
,
7370 TYPE_MIN_VALUE (domain
)));
7373 size_binop (MULT_EXPR
, index
,
7374 fold_convert (ssizetype
,
7375 TYPE_SIZE_UNIT (elttype
)));
7376 xtarget
= offset_address (target
,
7377 expand_normal (position
),
7378 highest_pow2_factor (position
));
7379 xtarget
= adjust_address (xtarget
, mode
, 0);
7380 store_expr (value
, xtarget
, 0, false, reverse
);
7385 bitpos
= ((tree_to_shwi (index
) - minelt
)
7386 * tree_to_uhwi (TYPE_SIZE (elttype
)));
7388 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
7390 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
7391 && TREE_CODE (type
) == ARRAY_TYPE
7392 && TYPE_NONALIASED_COMPONENT (type
))
7394 target
= copy_rtx (target
);
7395 MEM_KEEP_ALIAS_SET_P (target
) = 1;
7397 store_constructor_field (target
, bitsize
, bitpos
, 0,
7398 bitregion_end
, mode
, value
,
7399 cleared
, get_alias_set (elttype
),
7408 unsigned HOST_WIDE_INT idx
;
7409 constructor_elt
*ce
;
7412 insn_code icode
= CODE_FOR_nothing
;
7414 tree elttype
= TREE_TYPE (type
);
7415 int elt_size
= vector_element_bits (type
);
7416 machine_mode eltmode
= TYPE_MODE (elttype
);
7417 HOST_WIDE_INT bitsize
;
7418 HOST_WIDE_INT bitpos
;
7419 rtvec vector
= NULL
;
7421 unsigned HOST_WIDE_INT const_n_elts
;
7422 alias_set_type alias
;
7423 bool vec_vec_init_p
= false;
7424 machine_mode mode
= GET_MODE (target
);
7426 gcc_assert (eltmode
!= BLKmode
);
7428 /* Try using vec_duplicate_optab for uniform vectors. */
7429 if (!TREE_SIDE_EFFECTS (exp
)
7430 && VECTOR_MODE_P (mode
)
7431 && eltmode
== GET_MODE_INNER (mode
)
7432 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
7433 != CODE_FOR_nothing
)
7434 && (elt
= uniform_vector_p (exp
))
7435 && !VECTOR_TYPE_P (TREE_TYPE (elt
)))
7437 class expand_operand ops
[2];
7438 create_output_operand (&ops
[0], target
, mode
);
7439 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
7440 expand_insn (icode
, 2, ops
);
7441 if (!rtx_equal_p (target
, ops
[0].value
))
7442 emit_move_insn (target
, ops
[0].value
);
7445 /* Use sign-extension for uniform boolean vectors with
7447 if (!TREE_SIDE_EFFECTS (exp
)
7448 && VECTOR_BOOLEAN_TYPE_P (type
)
7449 && SCALAR_INT_MODE_P (mode
)
7450 && (elt
= uniform_vector_p (exp
))
7451 && !VECTOR_TYPE_P (TREE_TYPE (elt
)))
7453 rtx op0
= force_reg (TYPE_MODE (TREE_TYPE (elt
)),
7454 expand_normal (elt
));
7455 convert_move (target
, op0
, 0);
7459 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
7461 && VECTOR_MODE_P (mode
)
7462 && n_elts
.is_constant (&const_n_elts
))
7464 machine_mode emode
= eltmode
;
7465 bool vector_typed_elts_p
= false;
7467 if (CONSTRUCTOR_NELTS (exp
)
7468 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
7471 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
7472 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
7473 * TYPE_VECTOR_SUBPARTS (etype
),
7475 emode
= TYPE_MODE (etype
);
7476 vector_typed_elts_p
= true;
7478 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
7479 if (icode
!= CODE_FOR_nothing
)
7481 unsigned int n
= const_n_elts
;
7483 if (vector_typed_elts_p
)
7485 n
= CONSTRUCTOR_NELTS (exp
);
7486 vec_vec_init_p
= true;
7488 vector
= rtvec_alloc (n
);
7489 for (unsigned int k
= 0; k
< n
; k
++)
7490 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
7494 /* Compute the size of the elements in the CTOR. It differs
7495 from the size of the vector type elements only when the
7496 CTOR elements are vectors themselves. */
7497 tree val_type
= (CONSTRUCTOR_NELTS (exp
) != 0
7498 ? TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
)
7500 if (VECTOR_TYPE_P (val_type
))
7501 bitsize
= tree_to_uhwi (TYPE_SIZE (val_type
));
7505 /* If the constructor has fewer elements than the vector,
7506 clear the whole array first. Similarly if this is static
7507 constructor of a non-BLKmode object. */
7509 need_to_clear
= false;
7510 else if (REG_P (target
) && TREE_STATIC (exp
))
7511 need_to_clear
= true;
7514 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
7517 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
7519 int n_elts_here
= bitsize
/ elt_size
;
7520 count
+= n_elts_here
;
7521 if (mostly_zeros_p (value
))
7522 zero_count
+= n_elts_here
;
7525 /* Clear the entire vector first if there are any missing elements,
7526 or if the incidence of zero elements is >= 75%. */
7527 need_to_clear
= (maybe_lt (count
, n_elts
)
7528 || 4 * zero_count
>= 3 * count
);
7531 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7534 emit_move_insn (target
, CONST0_RTX (mode
));
7536 clear_storage (target
, gen_int_mode (size
, Pmode
),
7541 /* Inform later passes that the old value is dead. */
7542 if (!cleared
&& !vector
&& REG_P (target
) && maybe_gt (n_elts
, 1u))
7544 emit_move_insn (target
, CONST0_RTX (mode
));
7549 alias
= MEM_ALIAS_SET (target
);
7551 alias
= get_alias_set (elttype
);
7553 /* Store each element of the constructor into the corresponding
7554 element of TARGET, determined by counting the elements. */
7555 for (idx
= 0, i
= 0;
7556 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7557 idx
++, i
+= bitsize
/ elt_size
)
7559 HOST_WIDE_INT eltpos
;
7560 tree value
= ce
->value
;
7562 if (cleared
&& initializer_zerop (value
))
7566 eltpos
= tree_to_uhwi (ce
->index
);
7574 gcc_assert (ce
->index
== NULL_TREE
);
7575 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7579 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7580 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7584 machine_mode value_mode
7585 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7586 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7587 bitpos
= eltpos
* elt_size
;
7588 store_constructor_field (target
, bitsize
, bitpos
, 0,
7589 bitregion_end
, value_mode
,
7590 value
, cleared
, alias
, reverse
);
7595 emit_insn (GEN_FCN (icode
) (target
,
7596 gen_rtx_PARALLEL (mode
, vector
)));
7605 /* Store the value of EXP (an expression tree)
7606 into a subfield of TARGET which has mode MODE and occupies
7607 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7608 If MODE is VOIDmode, it means that we are storing into a bit-field.
7610 BITREGION_START is bitpos of the first bitfield in this region.
7611 BITREGION_END is the bitpos of the ending bitfield in this region.
7612 These two fields are 0, if the C++ memory model does not apply,
7613 or we are not interested in keeping track of bitfield regions.
7615 Always return const0_rtx unless we have something particular to
7618 ALIAS_SET is the alias set for the destination. This value will
7619 (in general) be different from that for TARGET, since TARGET is a
7620 reference to the containing structure.
7622 If NONTEMPORAL is true, try generating a nontemporal store.
7624 If REVERSE is true, the store is to be done in reverse order. */
7627 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7628 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7629 machine_mode mode
, tree exp
,
7630 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7632 if (TREE_CODE (exp
) == ERROR_MARK
)
7635 /* If we have nothing to store, do nothing unless the expression has
7636 side-effects. Don't do that for zero sized addressable lhs of
7638 if (known_eq (bitsize
, 0)
7639 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7640 || TREE_CODE (exp
) != CALL_EXPR
))
7641 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7643 if (GET_CODE (target
) == CONCAT
)
7645 /* We're storing into a struct containing a single __complex. */
7647 gcc_assert (known_eq (bitpos
, 0));
7648 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7651 /* If the structure is in a register or if the component
7652 is a bit field, we cannot use addressing to access it.
7653 Use bit-field techniques or SUBREG to store in it. */
7655 poly_int64 decl_bitsize
;
7656 if (mode
== VOIDmode
7657 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7658 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7659 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7661 || GET_CODE (target
) == SUBREG
7662 /* If the field isn't aligned enough to store as an ordinary memref,
7663 store it as a bit field. */
7665 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7666 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7667 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7668 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7669 || (known_size_p (bitsize
)
7671 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7672 /* If the RHS and field are a constant size and the size of the
7673 RHS isn't the same size as the bitfield, we must use bitfield
7675 || (known_size_p (bitsize
)
7676 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7677 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7679 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7680 we will handle specially below. */
7681 && !(TREE_CODE (exp
) == CONSTRUCTOR
7682 && multiple_p (bitsize
, BITS_PER_UNIT
))
7683 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7684 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7685 includes some extra padding. store_expr / expand_expr will in
7686 that case call get_inner_reference that will have the bitsize
7687 we check here and thus the block move will not clobber the
7688 padding that shouldn't be clobbered. In the future we could
7689 replace the TREE_ADDRESSABLE check with a check that
7690 get_base_address needs to live in memory. */
7691 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7692 || TREE_CODE (exp
) != COMPONENT_REF
7693 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7694 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7695 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7697 || maybe_ne (decl_bitsize
, bitsize
))
7698 /* A call with an addressable return type and return-slot
7699 optimization must not need bitfield operations but we must
7700 pass down the original target. */
7701 && (TREE_CODE (exp
) != CALL_EXPR
7702 || !TREE_ADDRESSABLE (TREE_TYPE (exp
))
7703 || !CALL_EXPR_RETURN_SLOT_OPT (exp
)))
7704 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7705 decl we must use bitfield operations. */
7706 || (known_size_p (bitsize
)
7707 && TREE_CODE (exp
) == MEM_REF
7708 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7709 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7710 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7711 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7716 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7717 implies a mask operation. If the precision is the same size as
7718 the field we're storing into, that mask is redundant. This is
7719 particularly common with bit field assignments generated by the
7721 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7724 tree type
= TREE_TYPE (exp
);
7725 if (INTEGRAL_TYPE_P (type
)
7726 && maybe_ne (TYPE_PRECISION (type
),
7727 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7728 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7730 tree op
= gimple_assign_rhs1 (nop_def
);
7731 type
= TREE_TYPE (op
);
7732 if (INTEGRAL_TYPE_P (type
)
7733 && known_ge (TYPE_PRECISION (type
), bitsize
))
7738 temp
= expand_normal (exp
);
7740 /* We don't support variable-sized BLKmode bitfields, since our
7741 handling of BLKmode is bound up with the ability to break
7742 things into words. */
7743 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7745 /* Handle calls that return values in multiple non-contiguous locations.
7746 The Irix 6 ABI has examples of this. */
7747 if (GET_CODE (temp
) == PARALLEL
)
7749 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7750 machine_mode temp_mode
= GET_MODE (temp
);
7751 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7752 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7753 rtx temp_target
= gen_reg_rtx (temp_mode
);
7754 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7758 /* Handle calls that return BLKmode values in registers. */
7759 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7761 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7762 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7766 /* If the value has aggregate type and an integral mode then, if BITSIZE
7767 is narrower than this mode and this is for big-endian data, we first
7768 need to put the value into the low-order bits for store_bit_field,
7769 except when MODE is BLKmode and BITSIZE larger than the word size
7770 (see the handling of fields larger than a word in store_bit_field).
7771 Moreover, the field may be not aligned on a byte boundary; in this
7772 case, if it has reverse storage order, it needs to be accessed as a
7773 scalar field with reverse storage order and we must first put the
7774 value into target order. */
7775 scalar_int_mode temp_mode
;
7776 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7777 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7779 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7781 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7784 temp
= flip_storage_order (temp_mode
, temp
);
7786 gcc_checking_assert (known_le (bitsize
, size
));
7787 if (maybe_lt (bitsize
, size
)
7788 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7789 /* Use of to_constant for BLKmode was checked above. */
7790 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7791 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7792 size
- bitsize
, NULL_RTX
, 1);
7795 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7796 if (mode
!= VOIDmode
&& mode
!= BLKmode
7797 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7798 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7800 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7801 and BITPOS must be aligned on a byte boundary. If so, we simply do
7802 a block copy. Likewise for a BLKmode-like TARGET. */
7803 if (GET_MODE (temp
) == BLKmode
7804 && (GET_MODE (target
) == BLKmode
7806 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7807 && multiple_p (bitpos
, BITS_PER_UNIT
)
7808 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7810 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7811 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7812 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7814 target
= adjust_address (target
, VOIDmode
, bytepos
);
7815 emit_block_move (target
, temp
,
7816 gen_int_mode (bytesize
, Pmode
),
7822 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7823 word size, we need to load the value (see again store_bit_field). */
7824 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7826 temp_mode
= smallest_int_mode_for_size (bitsize
);
7827 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7828 temp_mode
, false, NULL
);
7831 /* Store the value in the bitfield. */
7832 gcc_checking_assert (known_ge (bitpos
, 0));
7833 store_bit_field (target
, bitsize
, bitpos
,
7834 bitregion_start
, bitregion_end
,
7835 mode
, temp
, reverse
, false);
7841 /* Now build a reference to just the desired component. */
7842 rtx to_rtx
= adjust_address (target
, mode
,
7843 exact_div (bitpos
, BITS_PER_UNIT
));
7845 if (to_rtx
== target
)
7846 to_rtx
= copy_rtx (to_rtx
);
7848 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7849 set_mem_alias_set (to_rtx
, alias_set
);
7851 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7852 into a target smaller than its type; handle that case now. */
7853 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7855 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7856 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7860 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7864 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7865 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7866 codes and find the ultimate containing object, which we return.
7868 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7869 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7870 storage order of the field.
7871 If the position of the field is variable, we store a tree
7872 giving the variable offset (in units) in *POFFSET.
7873 This offset is in addition to the bit position.
7874 If the position is not variable, we store 0 in *POFFSET.
7876 If any of the extraction expressions is volatile,
7877 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7879 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7880 Otherwise, it is a mode that can be used to access the field.
7882 If the field describes a variable-sized object, *PMODE is set to
7883 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7884 this case, but the address of the object can be found. */
7887 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7888 poly_int64_pod
*pbitpos
, tree
*poffset
,
7889 machine_mode
*pmode
, int *punsignedp
,
7890 int *preversep
, int *pvolatilep
)
7893 machine_mode mode
= VOIDmode
;
7894 bool blkmode_bitfield
= false;
7895 tree offset
= size_zero_node
;
7896 poly_offset_int bit_offset
= 0;
7898 /* First get the mode, signedness, storage order and size. We do this from
7899 just the outermost expression. */
7901 if (TREE_CODE (exp
) == COMPONENT_REF
)
7903 tree field
= TREE_OPERAND (exp
, 1);
7904 size_tree
= DECL_SIZE (field
);
7905 if (flag_strict_volatile_bitfields
> 0
7906 && TREE_THIS_VOLATILE (exp
)
7907 && DECL_BIT_FIELD_TYPE (field
)
7908 && DECL_MODE (field
) != BLKmode
)
7909 /* Volatile bitfields should be accessed in the mode of the
7910 field's type, not the mode computed based on the bit
7912 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7913 else if (!DECL_BIT_FIELD (field
))
7915 mode
= DECL_MODE (field
);
7916 /* For vector fields re-check the target flags, as DECL_MODE
7917 could have been set with different target flags than
7918 the current function has. */
7919 if (VECTOR_TYPE_P (TREE_TYPE (field
))
7920 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7921 mode
= TYPE_MODE (TREE_TYPE (field
));
7923 else if (DECL_MODE (field
) == BLKmode
)
7924 blkmode_bitfield
= true;
7926 *punsignedp
= DECL_UNSIGNED (field
);
7928 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7930 size_tree
= TREE_OPERAND (exp
, 1);
7931 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7932 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7934 /* For vector element types with the correct size of access or for
7935 vector typed accesses use the mode of the access type. */
7936 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7937 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7938 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7939 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7940 mode
= TYPE_MODE (TREE_TYPE (exp
));
7944 mode
= TYPE_MODE (TREE_TYPE (exp
));
7945 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7947 if (mode
== BLKmode
)
7948 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7950 *pbitsize
= GET_MODE_BITSIZE (mode
);
7955 if (! tree_fits_uhwi_p (size_tree
))
7956 mode
= BLKmode
, *pbitsize
= -1;
7958 *pbitsize
= tree_to_uhwi (size_tree
);
7961 *preversep
= reverse_storage_order_for_component_p (exp
);
7963 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7964 and find the ultimate containing object. */
7967 switch (TREE_CODE (exp
))
7970 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7975 tree field
= TREE_OPERAND (exp
, 1);
7976 tree this_offset
= component_ref_field_offset (exp
);
7978 /* If this field hasn't been filled in yet, don't go past it.
7979 This should only happen when folding expressions made during
7980 type construction. */
7981 if (this_offset
== 0)
7984 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7985 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7987 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7992 case ARRAY_RANGE_REF
:
7994 tree index
= TREE_OPERAND (exp
, 1);
7995 tree low_bound
= array_ref_low_bound (exp
);
7996 tree unit_size
= array_ref_element_size (exp
);
7998 /* We assume all arrays have sizes that are a multiple of a byte.
7999 First subtract the lower bound, if any, in the type of the
8000 index, then convert to sizetype and multiply by the size of
8001 the array element. */
8002 if (! integer_zerop (low_bound
))
8003 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
8006 offset
= size_binop (PLUS_EXPR
, offset
,
8007 size_binop (MULT_EXPR
,
8008 fold_convert (sizetype
, index
),
8017 bit_offset
+= *pbitsize
;
8020 case VIEW_CONVERT_EXPR
:
8024 /* Hand back the decl for MEM[&decl, off]. */
8025 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
8027 tree off
= TREE_OPERAND (exp
, 1);
8028 if (!integer_zerop (off
))
8030 poly_offset_int boff
= mem_ref_offset (exp
);
8031 boff
<<= LOG2_BITS_PER_UNIT
;
8034 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
8042 /* If any reference in the chain is volatile, the effect is volatile. */
8043 if (TREE_THIS_VOLATILE (exp
))
8046 exp
= TREE_OPERAND (exp
, 0);
8050 /* If OFFSET is constant, see if we can return the whole thing as a
8051 constant bit position. Make sure to handle overflow during
8053 if (poly_int_tree_p (offset
))
8055 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
8056 TYPE_PRECISION (sizetype
));
8057 tem
<<= LOG2_BITS_PER_UNIT
;
8059 if (tem
.to_shwi (pbitpos
))
8060 *poffset
= offset
= NULL_TREE
;
8063 /* Otherwise, split it up. */
8066 /* Avoid returning a negative bitpos as this may wreak havoc later. */
8067 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
8069 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
8070 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
8071 offset
= size_binop (PLUS_EXPR
, offset
,
8072 build_int_cst (sizetype
, bytes
.force_shwi ()));
8078 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
8079 if (mode
== VOIDmode
8081 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
8082 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
8090 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
8092 static unsigned HOST_WIDE_INT
8093 target_align (const_tree target
)
8095 /* We might have a chain of nested references with intermediate misaligning
8096 bitfields components, so need to recurse to find out. */
8098 unsigned HOST_WIDE_INT this_align
, outer_align
;
8100 switch (TREE_CODE (target
))
8106 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
8107 outer_align
= target_align (TREE_OPERAND (target
, 0));
8108 return MIN (this_align
, outer_align
);
8111 case ARRAY_RANGE_REF
:
8112 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
8113 outer_align
= target_align (TREE_OPERAND (target
, 0));
8114 return MIN (this_align
, outer_align
);
8117 case NON_LVALUE_EXPR
:
8118 case VIEW_CONVERT_EXPR
:
8119 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
8120 outer_align
= target_align (TREE_OPERAND (target
, 0));
8121 return MAX (this_align
, outer_align
);
8124 return TYPE_ALIGN (TREE_TYPE (target
));
8129 /* Given an rtx VALUE that may contain additions and multiplications, return
8130 an equivalent value that just refers to a register, memory, or constant.
8131 This is done by generating instructions to perform the arithmetic and
8132 returning a pseudo-register containing the value.
8134 The returned value may be a REG, SUBREG, MEM or constant. */
8137 force_operand (rtx value
, rtx target
)
8140 /* Use subtarget as the target for operand 0 of a binary operation. */
8141 rtx subtarget
= get_subtarget (target
);
8142 enum rtx_code code
= GET_CODE (value
);
8144 /* Check for subreg applied to an expression produced by loop optimizer. */
8146 && !REG_P (SUBREG_REG (value
))
8147 && !MEM_P (SUBREG_REG (value
)))
8150 = simplify_gen_subreg (GET_MODE (value
),
8151 force_reg (GET_MODE (SUBREG_REG (value
)),
8152 force_operand (SUBREG_REG (value
),
8154 GET_MODE (SUBREG_REG (value
)),
8155 SUBREG_BYTE (value
));
8156 code
= GET_CODE (value
);
8159 /* Check for a PIC address load. */
8160 if ((code
== PLUS
|| code
== MINUS
)
8161 && XEXP (value
, 0) == pic_offset_table_rtx
8162 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
8163 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
8164 || GET_CODE (XEXP (value
, 1)) == CONST
))
8167 subtarget
= gen_reg_rtx (GET_MODE (value
));
8168 emit_move_insn (subtarget
, value
);
8172 if (ARITHMETIC_P (value
))
8174 op2
= XEXP (value
, 1);
8175 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
8177 if (code
== MINUS
&& CONST_INT_P (op2
))
8180 op2
= negate_rtx (GET_MODE (value
), op2
);
8183 /* Check for an addition with OP2 a constant integer and our first
8184 operand a PLUS of a virtual register and something else. In that
8185 case, we want to emit the sum of the virtual register and the
8186 constant first and then add the other value. This allows virtual
8187 register instantiation to simply modify the constant rather than
8188 creating another one around this addition. */
8189 if (code
== PLUS
&& CONST_INT_P (op2
)
8190 && GET_CODE (XEXP (value
, 0)) == PLUS
8191 && REG_P (XEXP (XEXP (value
, 0), 0))
8192 && VIRTUAL_REGISTER_P (XEXP (XEXP (value
, 0), 0)))
8194 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
8195 XEXP (XEXP (value
, 0), 0), op2
,
8196 subtarget
, 0, OPTAB_LIB_WIDEN
);
8197 return expand_simple_binop (GET_MODE (value
), code
, temp
,
8198 force_operand (XEXP (XEXP (value
,
8200 target
, 0, OPTAB_LIB_WIDEN
);
8203 op1
= force_operand (XEXP (value
, 0), subtarget
);
8204 op2
= force_operand (op2
, NULL_RTX
);
8208 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
8210 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
8211 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8212 target
, 1, OPTAB_LIB_WIDEN
);
8214 return expand_divmod (0,
8215 FLOAT_MODE_P (GET_MODE (value
))
8216 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
8217 GET_MODE (value
), op1
, op2
, target
, 0);
8219 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
8222 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
8225 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
8228 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8229 target
, 0, OPTAB_LIB_WIDEN
);
8231 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8232 target
, 1, OPTAB_LIB_WIDEN
);
8235 if (UNARY_P (value
))
8238 target
= gen_reg_rtx (GET_MODE (value
));
8239 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
8246 case FLOAT_TRUNCATE
:
8247 convert_move (target
, op1
, code
== ZERO_EXTEND
);
8252 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
8256 case UNSIGNED_FLOAT
:
8257 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
8261 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
8265 #ifdef INSN_SCHEDULING
8266 /* On machines that have insn scheduling, we want all memory reference to be
8267 explicit, so we need to deal with such paradoxical SUBREGs. */
8268 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
8270 = simplify_gen_subreg (GET_MODE (value
),
8271 force_reg (GET_MODE (SUBREG_REG (value
)),
8272 force_operand (SUBREG_REG (value
),
8274 GET_MODE (SUBREG_REG (value
)),
8275 SUBREG_BYTE (value
));
8281 /* Subroutine of expand_expr: return true iff there is no way that
8282 EXP can reference X, which is being modified. TOP_P is nonzero if this
8283 call is going to be used to determine whether we need a temporary
8284 for EXP, as opposed to a recursive call to this function.
8286 It is always safe for this routine to return false since it merely
8287 searches for optimization opportunities. */
8290 safe_from_p (const_rtx x
, tree exp
, int top_p
)
8296 /* If EXP has varying size, we MUST use a target since we currently
8297 have no way of allocating temporaries of variable size
8298 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
8299 So we assume here that something at a higher level has prevented a
8300 clash. This is somewhat bogus, but the best we can do. Only
8301 do this when X is BLKmode and when we are at the top level. */
8302 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
8303 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
8304 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
8305 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
8306 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
8308 && GET_MODE (x
) == BLKmode
)
8309 /* If X is in the outgoing argument area, it is always safe. */
8311 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
8312 || (GET_CODE (XEXP (x
, 0)) == PLUS
8313 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
8316 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
8317 find the underlying pseudo. */
8318 if (GET_CODE (x
) == SUBREG
)
8321 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
8325 /* Now look at our tree code and possibly recurse. */
8326 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
8328 case tcc_declaration
:
8329 exp_rtl
= DECL_RTL_IF_SET (exp
);
8335 case tcc_exceptional
:
8336 if (TREE_CODE (exp
) == TREE_LIST
)
8340 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
8342 exp
= TREE_CHAIN (exp
);
8345 if (TREE_CODE (exp
) != TREE_LIST
)
8346 return safe_from_p (x
, exp
, 0);
8349 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
8351 constructor_elt
*ce
;
8352 unsigned HOST_WIDE_INT idx
;
8354 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
8355 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
8356 || !safe_from_p (x
, ce
->value
, 0))
8360 else if (TREE_CODE (exp
) == ERROR_MARK
)
8361 return true; /* An already-visited SAVE_EXPR? */
8366 /* The only case we look at here is the DECL_INITIAL inside a
8368 return (TREE_CODE (exp
) != DECL_EXPR
8369 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
8370 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
8371 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
8374 case tcc_comparison
:
8375 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
8380 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
8382 case tcc_expression
:
8385 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
8386 the expression. If it is set, we conflict iff we are that rtx or
8387 both are in memory. Otherwise, we check all operands of the
8388 expression recursively. */
8390 switch (TREE_CODE (exp
))
8393 /* If the operand is static or we are static, we can't conflict.
8394 Likewise if we don't conflict with the operand at all. */
8395 if (staticp (TREE_OPERAND (exp
, 0))
8396 || TREE_STATIC (exp
)
8397 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
8400 /* Otherwise, the only way this can conflict is if we are taking
8401 the address of a DECL a that address if part of X, which is
8403 exp
= TREE_OPERAND (exp
, 0);
8406 if (!DECL_RTL_SET_P (exp
)
8407 || !MEM_P (DECL_RTL (exp
)))
8410 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
8416 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
8417 get_alias_set (exp
)))
8422 /* Assume that the call will clobber all hard registers and
8424 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
8429 case WITH_CLEANUP_EXPR
:
8430 case CLEANUP_POINT_EXPR
:
8431 /* Lowered by gimplify.cc. */
8435 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
8441 /* If we have an rtx, we do not need to scan our operands. */
8445 nops
= TREE_OPERAND_LENGTH (exp
);
8446 for (i
= 0; i
< nops
; i
++)
8447 if (TREE_OPERAND (exp
, i
) != 0
8448 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
8454 /* Should never get a type here. */
8458 /* If we have an rtl, find any enclosed object. Then see if we conflict
8462 if (GET_CODE (exp_rtl
) == SUBREG
)
8464 exp_rtl
= SUBREG_REG (exp_rtl
);
8466 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
8470 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
8471 are memory and they conflict. */
8472 return ! (rtx_equal_p (x
, exp_rtl
)
8473 || (MEM_P (x
) && MEM_P (exp_rtl
)
8474 && true_dependence (exp_rtl
, VOIDmode
, x
)));
8477 /* If we reach here, it is safe. */
8482 /* Return the highest power of two that EXP is known to be a multiple of.
8483 This is used in updating alignment of MEMs in array references. */
8485 unsigned HOST_WIDE_INT
8486 highest_pow2_factor (const_tree exp
)
8488 unsigned HOST_WIDE_INT ret
;
8489 int trailing_zeros
= tree_ctz (exp
);
8490 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
8491 return BIGGEST_ALIGNMENT
;
8492 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
8493 if (ret
> BIGGEST_ALIGNMENT
)
8494 return BIGGEST_ALIGNMENT
;
8498 /* Similar, except that the alignment requirements of TARGET are
8499 taken into account. Assume it is at least as aligned as its
8500 type, unless it is a COMPONENT_REF in which case the layout of
8501 the structure gives the alignment. */
8503 static unsigned HOST_WIDE_INT
8504 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
8506 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
8507 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
8509 return MAX (factor
, talign
);
8512 /* Convert the tree comparison code TCODE to the rtl one where the
8513 signedness is UNSIGNEDP. */
8515 static enum rtx_code
8516 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8528 code
= unsignedp
? LTU
: LT
;
8531 code
= unsignedp
? LEU
: LE
;
8534 code
= unsignedp
? GTU
: GT
;
8537 code
= unsignedp
? GEU
: GE
;
8539 case UNORDERED_EXPR
:
8570 /* Subroutine of expand_expr. Expand the two operands of a binary
8571 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8572 The value may be stored in TARGET if TARGET is nonzero. The
8573 MODIFIER argument is as documented by expand_expr. */
8576 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8577 enum expand_modifier modifier
)
8579 if (! safe_from_p (target
, exp1
, 1))
8581 if (operand_equal_p (exp0
, exp1
, 0))
8583 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8584 *op1
= copy_rtx (*op0
);
8588 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8589 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
8594 /* Return a MEM that contains constant EXP. DEFER is as for
8595 output_constant_def and MODIFIER is as for expand_expr. */
8598 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8602 mem
= output_constant_def (exp
, defer
);
8603 if (modifier
!= EXPAND_INITIALIZER
)
8604 mem
= use_anchored_address (mem
);
8608 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8609 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8612 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8613 enum expand_modifier modifier
, addr_space_t as
)
8615 rtx result
, subtarget
;
8617 poly_int64 bitsize
, bitpos
;
8618 int unsignedp
, reversep
, volatilep
= 0;
8621 /* If we are taking the address of a constant and are at the top level,
8622 we have to use output_constant_def since we can't call force_const_mem
8624 /* ??? This should be considered a front-end bug. We should not be
8625 generating ADDR_EXPR of something that isn't an LVALUE. The only
8626 exception here is STRING_CST. */
8627 if (CONSTANT_CLASS_P (exp
))
8629 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8630 if (modifier
< EXPAND_SUM
)
8631 result
= force_operand (result
, target
);
8635 /* Everything must be something allowed by is_gimple_addressable. */
8636 switch (TREE_CODE (exp
))
8639 /* This case will happen via recursion for &a->b. */
8640 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8644 tree tem
= TREE_OPERAND (exp
, 0);
8645 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8646 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8647 return expand_expr (tem
, target
, tmode
, modifier
);
8650 case TARGET_MEM_REF
:
8651 return addr_for_mem_ref (exp
, as
, true);
8654 /* Expand the initializer like constants above. */
8655 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8657 if (modifier
< EXPAND_SUM
)
8658 result
= force_operand (result
, target
);
8662 /* The real part of the complex number is always first, therefore
8663 the address is the same as the address of the parent object. */
8666 inner
= TREE_OPERAND (exp
, 0);
8670 /* The imaginary part of the complex number is always second.
8671 The expression is therefore always offset by the size of the
8674 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8675 inner
= TREE_OPERAND (exp
, 0);
8678 case COMPOUND_LITERAL_EXPR
:
8679 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8680 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8681 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8682 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8683 the initializers aren't gimplified. */
8684 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8685 && is_global_var (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8686 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8687 target
, tmode
, modifier
, as
);
8690 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8691 expand_expr, as that can have various side effects; LABEL_DECLs for
8692 example, may not have their DECL_RTL set yet. Expand the rtl of
8693 CONSTRUCTORs too, which should yield a memory reference for the
8694 constructor's contents. Assume language specific tree nodes can
8695 be expanded in some interesting way. */
8696 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8698 || TREE_CODE (exp
) == CONSTRUCTOR
8699 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8701 result
= expand_expr (exp
, target
, tmode
,
8702 modifier
== EXPAND_INITIALIZER
8703 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8705 /* If the DECL isn't in memory, then the DECL wasn't properly
8706 marked TREE_ADDRESSABLE, which will be either a front-end
8707 or a tree optimizer bug. */
8709 gcc_assert (MEM_P (result
));
8710 result
= XEXP (result
, 0);
8712 /* ??? Is this needed anymore? */
8714 TREE_USED (exp
) = 1;
8716 if (modifier
!= EXPAND_INITIALIZER
8717 && modifier
!= EXPAND_CONST_ADDRESS
8718 && modifier
!= EXPAND_SUM
)
8719 result
= force_operand (result
, target
);
8723 /* Pass FALSE as the last argument to get_inner_reference although
8724 we are expanding to RTL. The rationale is that we know how to
8725 handle "aligning nodes" here: we can just bypass them because
8726 they won't change the final object whose address will be returned
8727 (they actually exist only for that purpose). */
8728 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8729 &unsignedp
, &reversep
, &volatilep
);
8733 /* We must have made progress. */
8734 gcc_assert (inner
!= exp
);
8736 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8737 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8738 inner alignment, force the inner to be sufficiently aligned. */
8739 if (CONSTANT_CLASS_P (inner
)
8740 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8742 inner
= copy_node (inner
);
8743 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8744 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8745 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8747 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8753 if (modifier
!= EXPAND_NORMAL
)
8754 result
= force_operand (result
, NULL
);
8755 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8756 modifier
== EXPAND_INITIALIZER
8757 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8759 /* expand_expr is allowed to return an object in a mode other
8760 than TMODE. If it did, we need to convert. */
8761 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8762 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8763 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8764 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8765 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8767 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8768 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8771 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8772 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8773 1, OPTAB_LIB_WIDEN
);
8777 if (maybe_ne (bitpos
, 0))
8779 /* Someone beforehand should have rejected taking the address
8780 of an object that isn't byte-aligned. */
8781 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8782 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8783 result
= plus_constant (tmode
, result
, bytepos
);
8784 if (modifier
< EXPAND_SUM
)
8785 result
= force_operand (result
, target
);
8791 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8792 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8795 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8796 enum expand_modifier modifier
)
8798 addr_space_t as
= ADDR_SPACE_GENERIC
;
8799 scalar_int_mode address_mode
= Pmode
;
8800 scalar_int_mode pointer_mode
= ptr_mode
;
8804 /* Target mode of VOIDmode says "whatever's natural". */
8805 if (tmode
== VOIDmode
)
8806 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8808 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8810 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8811 address_mode
= targetm
.addr_space
.address_mode (as
);
8812 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8815 /* We can get called with some Weird Things if the user does silliness
8816 like "(short) &a". In that case, convert_memory_address won't do
8817 the right thing, so ignore the given target mode. */
8818 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8822 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8823 new_tmode
, modifier
, as
);
8825 /* Despite expand_expr claims concerning ignoring TMODE when not
8826 strictly convenient, stuff breaks if we don't honor it. Note
8827 that combined with the above, we only do this for pointer modes. */
8828 rmode
= GET_MODE (result
);
8829 if (rmode
== VOIDmode
)
8831 if (rmode
!= new_tmode
)
8832 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8837 /* Generate code for computing CONSTRUCTOR EXP.
8838 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8839 is TRUE, instead of creating a temporary variable in memory
8840 NULL is returned and the caller needs to handle it differently. */
8843 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8844 bool avoid_temp_mem
)
8846 tree type
= TREE_TYPE (exp
);
8847 machine_mode mode
= TYPE_MODE (type
);
8849 /* Try to avoid creating a temporary at all. This is possible
8850 if all of the initializer is zero.
8851 FIXME: try to handle all [0..255] initializers we can handle
8853 if (TREE_STATIC (exp
)
8854 && !TREE_ADDRESSABLE (exp
)
8855 && target
!= 0 && mode
== BLKmode
8856 && all_zeros_p (exp
))
8858 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8862 /* All elts simple constants => refer to a constant in memory. But
8863 if this is a non-BLKmode mode, let it store a field at a time
8864 since that should make a CONST_INT, CONST_WIDE_INT or
8865 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8866 use, it is best to store directly into the target unless the type
8867 is large enough that memcpy will be used. If we are making an
8868 initializer and all operands are constant, put it in memory as
8871 FIXME: Avoid trying to fill vector constructors piece-meal.
8872 Output them with output_constant_def below unless we're sure
8873 they're zeros. This should go away when vector initializers
8874 are treated like VECTOR_CST instead of arrays. */
8875 if ((TREE_STATIC (exp
)
8876 && ((mode
== BLKmode
8877 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8878 || TREE_ADDRESSABLE (exp
)
8879 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8880 && (! can_move_by_pieces
8881 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8883 && ! mostly_zeros_p (exp
))))
8884 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8885 && TREE_CONSTANT (exp
)))
8892 constructor
= expand_expr_constant (exp
, 1, modifier
);
8894 if (modifier
!= EXPAND_CONST_ADDRESS
8895 && modifier
!= EXPAND_INITIALIZER
8896 && modifier
!= EXPAND_SUM
)
8897 constructor
= validize_mem (constructor
);
8902 /* If the CTOR is available in static storage and not mostly
8903 zeros and we can move it by pieces prefer to do so since
8904 that's usually more efficient than performing a series of
8905 stores from immediates. */
8907 && TREE_STATIC (exp
)
8908 && TREE_CONSTANT (exp
)
8909 && tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8910 && can_move_by_pieces (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8912 && ! mostly_zeros_p (exp
))
8915 /* Handle calls that pass values in multiple non-contiguous
8916 locations. The Irix 6 ABI has examples of this. */
8917 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8918 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
8919 /* Also make a temporary if the store is to volatile memory, to
8920 avoid individual accesses to aggregate members. */
8921 || (GET_CODE (target
) == MEM
8922 && MEM_VOLATILE_P (target
)
8923 && !TREE_ADDRESSABLE (TREE_TYPE (exp
))))
8928 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8931 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8936 /* expand_expr: generate code for computing expression EXP.
8937 An rtx for the computed value is returned. The value is never null.
8938 In the case of a void EXP, const0_rtx is returned.
8940 The value may be stored in TARGET if TARGET is nonzero.
8941 TARGET is just a suggestion; callers must assume that
8942 the rtx returned may not be the same as TARGET.
8944 If TARGET is CONST0_RTX, it means that the value will be ignored.
8946 If TMODE is not VOIDmode, it suggests generating the
8947 result in mode TMODE. But this is done only when convenient.
8948 Otherwise, TMODE is ignored and the value generated in its natural mode.
8949 TMODE is just a suggestion; callers must assume that
8950 the rtx returned may not have mode TMODE.
8952 Note that TARGET may have neither TMODE nor MODE. In that case, it
8953 probably will not be used.
8955 If MODIFIER is EXPAND_SUM then when EXP is an addition
8956 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8957 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8958 products as above, or REG or MEM, or constant.
8959 Ordinarily in such cases we would output mul or add instructions
8960 and then return a pseudo reg containing the sum.
8962 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8963 it also marks a label as absolutely required (it can't be dead).
8964 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8965 This is used for outputting expressions used in initializers.
8967 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8968 with a constant address even if that address is not normally legitimate.
8969 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8971 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8972 a call parameter. Such targets require special care as we haven't yet
8973 marked TARGET so that it's safe from being trashed by libcalls. We
8974 don't want to use TARGET for anything but the final result;
8975 Intermediate values must go elsewhere. Additionally, calls to
8976 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8978 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8979 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8980 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8981 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8983 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8984 then *ALT_RTL is set to TARGET (before legitimziation).
8986 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8987 In this case, we don't adjust a returned MEM rtx that wouldn't be
8988 sufficiently aligned for its mode; instead, it's up to the caller
8989 to deal with it afterwards. This is used to make sure that unaligned
8990 base objects for which out-of-bounds accesses are supported, for
8991 example record types with trailing arrays, aren't realigned behind
8992 the back of the caller.
8993 The normal operating mode is to pass FALSE for this parameter. */
8996 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8997 enum expand_modifier modifier
, rtx
*alt_rtl
,
8998 bool inner_reference_p
)
9002 /* Handle ERROR_MARK before anybody tries to access its type. */
9003 if (TREE_CODE (exp
) == ERROR_MARK
9004 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
9006 ret
= CONST0_RTX (tmode
);
9007 return ret
? ret
: const0_rtx
;
9010 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
9015 /* Try to expand the conditional expression which is represented by
9016 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
9017 return the rtl reg which represents the result. Otherwise return
9021 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
9022 tree treeop1 ATTRIBUTE_UNUSED
,
9023 tree treeop2 ATTRIBUTE_UNUSED
)
9026 rtx op00
, op01
, op1
, op2
;
9027 enum rtx_code comparison_code
;
9028 machine_mode comparison_mode
;
9031 tree type
= TREE_TYPE (treeop1
);
9032 int unsignedp
= TYPE_UNSIGNED (type
);
9033 machine_mode mode
= TYPE_MODE (type
);
9034 machine_mode orig_mode
= mode
;
9035 static bool expanding_cond_expr_using_cmove
= false;
9037 /* Conditional move expansion can end up TERing two operands which,
9038 when recursively hitting conditional expressions can result in
9039 exponential behavior if the cmove expansion ultimatively fails.
9040 It's hardly profitable to TER a cmove into a cmove so avoid doing
9041 that by failing early if we end up recursing. */
9042 if (expanding_cond_expr_using_cmove
)
9045 /* If we cannot do a conditional move on the mode, try doing it
9046 with the promoted mode. */
9047 if (!can_conditionally_move_p (mode
))
9049 mode
= promote_mode (type
, mode
, &unsignedp
);
9050 if (!can_conditionally_move_p (mode
))
9052 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
9055 temp
= assign_temp (type
, 0, 1);
9057 expanding_cond_expr_using_cmove
= true;
9059 expand_operands (treeop1
, treeop2
,
9060 mode
== orig_mode
? temp
: NULL_RTX
, &op1
, &op2
,
9063 if (TREE_CODE (treeop0
) == SSA_NAME
9064 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
9066 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
9067 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
9068 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
9069 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
9070 comparison_mode
= TYPE_MODE (type
);
9071 unsignedp
= TYPE_UNSIGNED (type
);
9072 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
9074 else if (COMPARISON_CLASS_P (treeop0
))
9076 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
9077 enum tree_code cmpcode
= TREE_CODE (treeop0
);
9078 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
9079 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
9080 unsignedp
= TYPE_UNSIGNED (type
);
9081 comparison_mode
= TYPE_MODE (type
);
9082 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
9086 op00
= expand_normal (treeop0
);
9088 comparison_code
= NE
;
9089 comparison_mode
= GET_MODE (op00
);
9090 if (comparison_mode
== VOIDmode
)
9091 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9093 expanding_cond_expr_using_cmove
= false;
9095 if (GET_MODE (op1
) != mode
)
9096 op1
= gen_lowpart (mode
, op1
);
9098 if (GET_MODE (op2
) != mode
)
9099 op2
= gen_lowpart (mode
, op2
);
9101 /* Try to emit the conditional move. */
9102 insn
= emit_conditional_move (temp
,
9103 { comparison_code
, op00
, op01
,
9108 /* If we could do the conditional move, emit the sequence,
9112 rtx_insn
*seq
= get_insns ();
9115 return convert_modes (orig_mode
, mode
, temp
, 0);
9118 /* Otherwise discard the sequence and fall back to code with
9124 /* A helper function for expand_expr_real_2 to be used with a
9125 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
9126 is nonzero, with alignment ALIGN in bits.
9127 Store the value at TARGET if possible (if TARGET is nonzero).
9128 Regardless of TARGET, we return the rtx for where the value is placed.
9129 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
9130 then *ALT_RTL is set to TARGET (before legitimziation). */
9133 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
9134 unsigned int align
, rtx target
, rtx
*alt_rtl
)
9136 enum insn_code icode
;
9138 if ((icode
= optab_handler (movmisalign_optab
, mode
))
9139 != CODE_FOR_nothing
)
9141 class expand_operand ops
[2];
9143 /* We've already validated the memory, and we're creating a
9144 new pseudo destination. The predicates really can't fail,
9145 nor can the generator. */
9146 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9147 create_fixed_operand (&ops
[1], temp
);
9148 expand_insn (icode
, 2, ops
);
9149 temp
= ops
[0].value
;
9151 else if (targetm
.slow_unaligned_access (mode
, align
))
9152 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
9153 0, unsignedp
, target
,
9154 mode
, mode
, false, alt_rtl
);
9158 /* Helper function of expand_expr_2, expand a division or modulo.
9159 op0 and op1 should be already expanded treeop0 and treeop1, using
9163 expand_expr_divmod (tree_code code
, machine_mode mode
, tree treeop0
,
9164 tree treeop1
, rtx op0
, rtx op1
, rtx target
, int unsignedp
)
9166 bool mod_p
= (code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9167 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
);
9168 if (SCALAR_INT_MODE_P (mode
)
9170 && get_range_pos_neg (treeop0
) == 1
9171 && get_range_pos_neg (treeop1
) == 1)
9173 /* If both arguments are known to be positive when interpreted
9174 as signed, we can expand it as both signed and unsigned
9175 division or modulo. Choose the cheaper sequence in that case. */
9176 bool speed_p
= optimize_insn_for_speed_p ();
9177 do_pending_stack_adjust ();
9179 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9180 rtx_insn
*uns_insns
= get_insns ();
9183 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9184 rtx_insn
*sgn_insns
= get_insns ();
9186 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9187 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9189 /* If costs are the same then use as tie breaker the other other
9191 if (uns_cost
== sgn_cost
)
9193 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9194 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9197 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9199 emit_insn (uns_insns
);
9202 emit_insn (sgn_insns
);
9205 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9209 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
9210 enum expand_modifier modifier
)
9212 rtx op0
, op1
, op2
, temp
;
9213 rtx_code_label
*lab
;
9217 scalar_int_mode int_mode
;
9218 enum tree_code code
= ops
->code
;
9220 rtx subtarget
, original_target
;
9222 bool reduce_bit_field
;
9223 location_t loc
= ops
->location
;
9224 tree treeop0
, treeop1
, treeop2
;
9225 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
9226 ? reduce_to_bit_field_precision ((expr), \
9232 mode
= TYPE_MODE (type
);
9233 unsignedp
= TYPE_UNSIGNED (type
);
9239 /* We should be called only on simple (binary or unary) expressions,
9240 exactly those that are valid in gimple expressions that aren't
9241 GIMPLE_SINGLE_RHS (or invalid). */
9242 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
9243 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
9244 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
9246 ignore
= (target
== const0_rtx
9247 || ((CONVERT_EXPR_CODE_P (code
)
9248 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9249 && TREE_CODE (type
) == VOID_TYPE
));
9251 /* We should be called only if we need the result. */
9252 gcc_assert (!ignore
);
9254 /* An operation in what may be a bit-field type needs the
9255 result to be reduced to the precision of the bit-field type,
9256 which is narrower than that of the type's mode. */
9257 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
9258 && !type_has_mode_precision_p (type
));
9260 if (reduce_bit_field
9261 && (modifier
== EXPAND_STACK_PARM
9262 || (target
&& GET_MODE (target
) != mode
)))
9265 /* Use subtarget as the target for operand 0 of a binary operation. */
9266 subtarget
= get_subtarget (target
);
9267 original_target
= target
;
9271 case NON_LVALUE_EXPR
:
9274 if (treeop0
== error_mark_node
)
9277 if (TREE_CODE (type
) == UNION_TYPE
)
9279 tree valtype
= TREE_TYPE (treeop0
);
9281 /* If both input and output are BLKmode, this conversion isn't doing
9282 anything except possibly changing memory attribute. */
9283 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
9285 rtx result
= expand_expr (treeop0
, target
, tmode
,
9288 result
= copy_rtx (result
);
9289 set_mem_attributes (result
, type
, 0);
9295 if (TYPE_MODE (type
) != BLKmode
)
9296 target
= gen_reg_rtx (TYPE_MODE (type
));
9298 target
= assign_temp (type
, 1, 1);
9302 /* Store data into beginning of memory target. */
9303 store_expr (treeop0
,
9304 adjust_address (target
, TYPE_MODE (valtype
), 0),
9305 modifier
== EXPAND_STACK_PARM
,
9306 false, TYPE_REVERSE_STORAGE_ORDER (type
));
9310 gcc_assert (REG_P (target
)
9311 && !TYPE_REVERSE_STORAGE_ORDER (type
));
9313 /* Store this field into a union of the proper type. */
9314 poly_uint64 op0_size
9315 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
9316 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
9317 store_field (target
,
9318 /* The conversion must be constructed so that
9319 we know at compile time how many bits
9321 ordered_min (op0_size
, union_size
),
9322 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
9326 /* Return the entire union. */
9330 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
9332 op0
= expand_expr (treeop0
, target
, VOIDmode
,
9335 /* If the signedness of the conversion differs and OP0 is
9336 a promoted SUBREG, clear that indication since we now
9337 have to do the proper extension. */
9338 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
9339 && GET_CODE (op0
) == SUBREG
)
9340 SUBREG_PROMOTED_VAR_P (op0
) = 0;
9342 return REDUCE_BIT_FIELD (op0
);
9345 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
9346 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
9347 if (GET_MODE (op0
) == mode
)
9350 /* If OP0 is a constant, just convert it into the proper mode. */
9351 else if (CONSTANT_P (op0
))
9353 tree inner_type
= TREE_TYPE (treeop0
);
9354 machine_mode inner_mode
= GET_MODE (op0
);
9356 if (inner_mode
== VOIDmode
)
9357 inner_mode
= TYPE_MODE (inner_type
);
9359 if (modifier
== EXPAND_INITIALIZER
)
9360 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
9362 op0
= convert_modes (mode
, inner_mode
, op0
,
9363 TYPE_UNSIGNED (inner_type
));
9366 else if (modifier
== EXPAND_INITIALIZER
)
9367 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9368 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
9370 else if (target
== 0)
9371 op0
= convert_to_mode (mode
, op0
,
9372 TYPE_UNSIGNED (TREE_TYPE
9376 convert_move (target
, op0
,
9377 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9381 return REDUCE_BIT_FIELD (op0
);
9383 case ADDR_SPACE_CONVERT_EXPR
:
9385 tree treeop0_type
= TREE_TYPE (treeop0
);
9387 gcc_assert (POINTER_TYPE_P (type
));
9388 gcc_assert (POINTER_TYPE_P (treeop0_type
));
9390 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
9391 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
9393 /* Conversions between pointers to the same address space should
9394 have been implemented via CONVERT_EXPR / NOP_EXPR. */
9395 gcc_assert (as_to
!= as_from
);
9397 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9399 /* Ask target code to handle conversion between pointers
9400 to overlapping address spaces. */
9401 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
9402 || targetm
.addr_space
.subset_p (as_from
, as_to
))
9404 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
9408 /* For disjoint address spaces, converting anything but a null
9409 pointer invokes undefined behavior. We truncate or extend the
9410 value as if we'd converted via integers, which handles 0 as
9411 required, and all others as the programmer likely expects. */
9412 #ifndef POINTERS_EXTEND_UNSIGNED
9413 const int POINTERS_EXTEND_UNSIGNED
= 1;
9415 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
9416 op0
, POINTERS_EXTEND_UNSIGNED
);
9422 case POINTER_PLUS_EXPR
:
9423 /* Even though the sizetype mode and the pointer's mode can be different
9424 expand is able to handle this correctly and get the correct result out
9425 of the PLUS_EXPR code. */
9426 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
9427 if sizetype precision is smaller than pointer precision. */
9428 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
9429 treeop1
= fold_convert_loc (loc
, type
,
9430 fold_convert_loc (loc
, ssizetype
,
9432 /* If sizetype precision is larger than pointer precision, truncate the
9433 offset to have matching modes. */
9434 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
9435 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
9439 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
9440 something else, make sure we add the register to the constant and
9441 then to the other thing. This case can occur during strength
9442 reduction and doing it this way will produce better code if the
9443 frame pointer or argument pointer is eliminated.
9445 fold-const.cc will ensure that the constant is always in the inner
9446 PLUS_EXPR, so the only case we need to do anything about is if
9447 sp, ap, or fp is our second argument, in which case we must swap
9448 the innermost first argument and our second argument. */
9450 if (TREE_CODE (treeop0
) == PLUS_EXPR
9451 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
9453 && (DECL_RTL (treeop1
) == frame_pointer_rtx
9454 || DECL_RTL (treeop1
) == stack_pointer_rtx
9455 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
9460 /* If the result is to be ptr_mode and we are adding an integer to
9461 something, we might be forming a constant. So try to use
9462 plus_constant. If it produces a sum and we can't accept it,
9463 use force_operand. This allows P = &ARR[const] to generate
9464 efficient code on machines where a SYMBOL_REF is not a valid
9467 If this is an EXPAND_SUM call, always return the sum. */
9468 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
9469 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
9471 if (modifier
== EXPAND_STACK_PARM
)
9473 if (TREE_CODE (treeop0
) == INTEGER_CST
9474 && HWI_COMPUTABLE_MODE_P (mode
)
9475 && TREE_CONSTANT (treeop1
))
9479 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
9481 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
9483 /* Use wi::shwi to ensure that the constant is
9484 truncated according to the mode of OP1, then sign extended
9485 to a HOST_WIDE_INT. Using the constant directly can result
9486 in non-canonical RTL in a 64x32 cross compile. */
9487 wc
= TREE_INT_CST_LOW (treeop0
);
9489 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
9490 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
9491 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
9492 op1
= force_operand (op1
, target
);
9493 return REDUCE_BIT_FIELD (op1
);
9496 else if (TREE_CODE (treeop1
) == INTEGER_CST
9497 && HWI_COMPUTABLE_MODE_P (mode
)
9498 && TREE_CONSTANT (treeop0
))
9502 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
9504 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9505 (modifier
== EXPAND_INITIALIZER
9506 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
9507 if (! CONSTANT_P (op0
))
9509 op1
= expand_expr (treeop1
, NULL_RTX
,
9510 VOIDmode
, modifier
);
9511 /* Return a PLUS if modifier says it's OK. */
9512 if (modifier
== EXPAND_SUM
9513 || modifier
== EXPAND_INITIALIZER
)
9514 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
9517 /* Use wi::shwi to ensure that the constant is
9518 truncated according to the mode of OP1, then sign extended
9519 to a HOST_WIDE_INT. Using the constant directly can result
9520 in non-canonical RTL in a 64x32 cross compile. */
9521 wc
= TREE_INT_CST_LOW (treeop1
);
9523 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
9524 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
9525 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
9526 op0
= force_operand (op0
, target
);
9527 return REDUCE_BIT_FIELD (op0
);
9531 /* Use TER to expand pointer addition of a negated value
9532 as pointer subtraction. */
9533 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
9534 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
9535 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
9536 && TREE_CODE (treeop1
) == SSA_NAME
9537 && TYPE_MODE (TREE_TYPE (treeop0
))
9538 == TYPE_MODE (TREE_TYPE (treeop1
)))
9540 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
9543 treeop1
= gimple_assign_rhs1 (def
);
9549 /* No sense saving up arithmetic to be done
9550 if it's all in the wrong mode to form part of an address.
9551 And force_operand won't know whether to sign-extend or
9553 if (modifier
!= EXPAND_INITIALIZER
9554 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9556 expand_operands (treeop0
, treeop1
,
9557 subtarget
, &op0
, &op1
, modifier
);
9558 if (op0
== const0_rtx
)
9560 if (op1
== const0_rtx
)
9565 expand_operands (treeop0
, treeop1
,
9566 subtarget
, &op0
, &op1
, modifier
);
9567 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9570 case POINTER_DIFF_EXPR
:
9572 /* For initializers, we are allowed to return a MINUS of two
9573 symbolic constants. Here we handle all cases when both operands
9575 /* Handle difference of two symbolic constants,
9576 for the sake of an initializer. */
9577 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9578 && really_constant_p (treeop0
)
9579 && really_constant_p (treeop1
))
9581 expand_operands (treeop0
, treeop1
,
9582 NULL_RTX
, &op0
, &op1
, modifier
);
9583 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
9586 /* No sense saving up arithmetic to be done
9587 if it's all in the wrong mode to form part of an address.
9588 And force_operand won't know whether to sign-extend or
9590 if (modifier
!= EXPAND_INITIALIZER
9591 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9594 expand_operands (treeop0
, treeop1
,
9595 subtarget
, &op0
, &op1
, modifier
);
9597 /* Convert A - const to A + (-const). */
9598 if (CONST_INT_P (op1
))
9600 op1
= negate_rtx (mode
, op1
);
9601 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9606 case WIDEN_MULT_PLUS_EXPR
:
9607 case WIDEN_MULT_MINUS_EXPR
:
9608 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9609 op2
= expand_normal (treeop2
);
9610 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9614 case WIDEN_MULT_EXPR
:
9615 /* If first operand is constant, swap them.
9616 Thus the following special case checks need only
9617 check the second operand. */
9618 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9619 std::swap (treeop0
, treeop1
);
9621 /* First, check if we have a multiplication of one signed and one
9622 unsigned operand. */
9623 if (TREE_CODE (treeop1
) != INTEGER_CST
9624 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9625 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
9627 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
9628 this_optab
= usmul_widen_optab
;
9629 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9630 != CODE_FOR_nothing
)
9632 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9633 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9636 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
9638 /* op0 and op1 might still be constant, despite the above
9639 != INTEGER_CST check. Handle it. */
9640 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9642 op0
= convert_modes (mode
, innermode
, op0
, true);
9643 op1
= convert_modes (mode
, innermode
, op1
, false);
9644 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9645 target
, unsignedp
));
9650 /* Check for a multiplication with matching signedness. */
9651 else if ((TREE_CODE (treeop1
) == INTEGER_CST
9652 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
9653 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
9654 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
9656 tree op0type
= TREE_TYPE (treeop0
);
9657 machine_mode innermode
= TYPE_MODE (op0type
);
9658 bool zextend_p
= TYPE_UNSIGNED (op0type
);
9659 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
9660 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
9662 if (TREE_CODE (treeop0
) != INTEGER_CST
)
9664 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9665 != CODE_FOR_nothing
)
9667 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9669 /* op0 and op1 might still be constant, despite the above
9670 != INTEGER_CST check. Handle it. */
9671 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9674 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9676 = convert_modes (mode
, innermode
, op1
,
9677 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9678 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9682 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9683 unsignedp
, this_optab
);
9684 return REDUCE_BIT_FIELD (temp
);
9686 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9688 && innermode
== word_mode
)
9691 op0
= expand_normal (treeop0
);
9692 op1
= expand_normal (treeop1
);
9693 /* op0 and op1 might be constants, despite the above
9694 != INTEGER_CST check. Handle it. */
9695 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9696 goto widen_mult_const
;
9697 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9698 unsignedp
, OPTAB_LIB_WIDEN
);
9699 hipart
= gen_highpart (word_mode
, temp
);
9700 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9704 emit_move_insn (hipart
, htem
);
9705 return REDUCE_BIT_FIELD (temp
);
9709 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9710 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9711 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9712 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9715 /* If this is a fixed-point operation, then we cannot use the code
9716 below because "expand_mult" doesn't support sat/no-sat fixed-point
9718 if (ALL_FIXED_POINT_MODE_P (mode
))
9721 /* If first operand is constant, swap them.
9722 Thus the following special case checks need only
9723 check the second operand. */
9724 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9725 std::swap (treeop0
, treeop1
);
9727 /* Attempt to return something suitable for generating an
9728 indexed address, for machines that support that. */
9730 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9731 && tree_fits_shwi_p (treeop1
))
9733 tree exp1
= treeop1
;
9735 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9739 op0
= force_operand (op0
, NULL_RTX
);
9741 op0
= copy_to_mode_reg (mode
, op0
);
9743 op1
= gen_int_mode (tree_to_shwi (exp1
),
9744 TYPE_MODE (TREE_TYPE (exp1
)));
9745 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
, op1
));
9748 if (modifier
== EXPAND_STACK_PARM
)
9751 if (SCALAR_INT_MODE_P (mode
) && optimize
>= 2)
9753 gimple
*def_stmt0
= get_def_for_expr (treeop0
, TRUNC_DIV_EXPR
);
9754 gimple
*def_stmt1
= get_def_for_expr (treeop1
, TRUNC_DIV_EXPR
);
9756 && !operand_equal_p (treeop1
, gimple_assign_rhs2 (def_stmt0
), 0))
9759 && !operand_equal_p (treeop0
, gimple_assign_rhs2 (def_stmt1
), 0))
9762 if (def_stmt0
|| def_stmt1
)
9764 /* X / Y * Y can be expanded as X - X % Y too.
9765 Choose the cheaper sequence of those two. */
9767 treeop0
= gimple_assign_rhs1 (def_stmt0
);
9771 treeop0
= gimple_assign_rhs1 (def_stmt1
);
9773 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
,
9775 bool speed_p
= optimize_insn_for_speed_p ();
9776 do_pending_stack_adjust ();
9779 = expand_expr_divmod (TRUNC_DIV_EXPR
, mode
, treeop0
, treeop1
,
9780 op0
, op1
, NULL_RTX
, unsignedp
);
9781 divmul_ret
= expand_mult (mode
, divmul_ret
, op1
, target
,
9783 rtx_insn
*divmul_insns
= get_insns ();
9787 = expand_expr_divmod (TRUNC_MOD_EXPR
, mode
, treeop0
, treeop1
,
9788 op0
, op1
, NULL_RTX
, unsignedp
);
9789 this_optab
= optab_for_tree_code (MINUS_EXPR
, type
,
9791 modsub_ret
= expand_binop (mode
, this_optab
, op0
, modsub_ret
,
9792 target
, unsignedp
, OPTAB_LIB_WIDEN
);
9793 rtx_insn
*modsub_insns
= get_insns ();
9795 unsigned divmul_cost
= seq_cost (divmul_insns
, speed_p
);
9796 unsigned modsub_cost
= seq_cost (modsub_insns
, speed_p
);
9797 /* If costs are the same then use as tie breaker the other other
9799 if (divmul_cost
== modsub_cost
)
9801 divmul_cost
= seq_cost (divmul_insns
, !speed_p
);
9802 modsub_cost
= seq_cost (modsub_insns
, !speed_p
);
9805 if (divmul_cost
<= modsub_cost
)
9807 emit_insn (divmul_insns
);
9808 return REDUCE_BIT_FIELD (divmul_ret
);
9810 emit_insn (modsub_insns
);
9811 return REDUCE_BIT_FIELD (modsub_ret
);
9815 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9817 /* Expand X*Y as X&-Y when Y must be zero or one. */
9818 if (SCALAR_INT_MODE_P (mode
))
9820 bool bit0_p
= tree_nonzero_bits (treeop0
) == 1;
9821 bool bit1_p
= tree_nonzero_bits (treeop1
) == 1;
9823 /* Expand X*Y as X&Y when both X and Y must be zero or one. */
9824 if (bit0_p
&& bit1_p
)
9825 return REDUCE_BIT_FIELD (expand_and (mode
, op0
, op1
, target
));
9827 if (bit0_p
|| bit1_p
)
9829 bool speed
= optimize_insn_for_speed_p ();
9830 int cost
= add_cost (speed
, mode
) + neg_cost (speed
, mode
);
9831 struct algorithm algorithm
;
9832 enum mult_variant variant
;
9833 if (CONST_INT_P (op1
)
9834 ? !choose_mult_variant (mode
, INTVAL (op1
),
9835 &algorithm
, &variant
, cost
)
9836 : cost
< mul_cost (speed
, mode
))
9838 target
= bit0_p
? expand_and (mode
, negate_rtx (mode
, op0
),
9840 : expand_and (mode
, op0
,
9841 negate_rtx (mode
, op1
),
9843 return REDUCE_BIT_FIELD (target
);
9848 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9850 case TRUNC_MOD_EXPR
:
9851 case FLOOR_MOD_EXPR
:
9853 case ROUND_MOD_EXPR
:
9855 case TRUNC_DIV_EXPR
:
9856 case FLOOR_DIV_EXPR
:
9858 case ROUND_DIV_EXPR
:
9859 case EXACT_DIV_EXPR
:
9860 /* If this is a fixed-point operation, then we cannot use the code
9861 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9863 if (ALL_FIXED_POINT_MODE_P (mode
))
9866 if (modifier
== EXPAND_STACK_PARM
)
9868 /* Possible optimization: compute the dividend with EXPAND_SUM
9869 then if the divisor is constant can optimize the case
9870 where some terms of the dividend have coeffs divisible by it. */
9871 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9872 return expand_expr_divmod (code
, mode
, treeop0
, treeop1
, op0
, op1
,
9878 case MULT_HIGHPART_EXPR
:
9879 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9880 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9884 case FIXED_CONVERT_EXPR
:
9885 op0
= expand_normal (treeop0
);
9886 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9887 target
= gen_reg_rtx (mode
);
9889 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9890 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9891 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9892 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9894 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9897 case FIX_TRUNC_EXPR
:
9898 op0
= expand_normal (treeop0
);
9899 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9900 target
= gen_reg_rtx (mode
);
9901 expand_fix (target
, op0
, unsignedp
);
9905 op0
= expand_normal (treeop0
);
9906 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9907 target
= gen_reg_rtx (mode
);
9908 /* expand_float can't figure out what to do if FROM has VOIDmode.
9909 So give it the correct mode. With -O, cse will optimize this. */
9910 if (GET_MODE (op0
) == VOIDmode
)
9911 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9913 expand_float (target
, op0
,
9914 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9918 op0
= expand_expr (treeop0
, subtarget
,
9919 VOIDmode
, EXPAND_NORMAL
);
9920 if (modifier
== EXPAND_STACK_PARM
)
9922 temp
= expand_unop (mode
,
9923 optab_for_tree_code (NEGATE_EXPR
, type
,
9927 return REDUCE_BIT_FIELD (temp
);
9931 op0
= expand_expr (treeop0
, subtarget
,
9932 VOIDmode
, EXPAND_NORMAL
);
9933 if (modifier
== EXPAND_STACK_PARM
)
9936 /* ABS_EXPR is not valid for complex arguments. */
9937 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9938 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9940 /* Unsigned abs is simply the operand. Testing here means we don't
9941 risk generating incorrect code below. */
9942 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9945 return expand_abs (mode
, op0
, target
, unsignedp
,
9946 safe_from_p (target
, treeop0
, 1));
9950 target
= original_target
;
9952 || modifier
== EXPAND_STACK_PARM
9953 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9954 || GET_MODE (target
) != mode
9956 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9957 target
= gen_reg_rtx (mode
);
9958 expand_operands (treeop0
, treeop1
,
9959 target
, &op0
, &op1
, EXPAND_NORMAL
);
9961 /* First try to do it with a special MIN or MAX instruction.
9962 If that does not win, use a conditional jump to select the proper
9964 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9965 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9970 if (VECTOR_TYPE_P (type
))
9973 /* At this point, a MEM target is no longer useful; we will get better
9976 if (! REG_P (target
))
9977 target
= gen_reg_rtx (mode
);
9979 /* If op1 was placed in target, swap op0 and op1. */
9980 if (target
!= op0
&& target
== op1
)
9981 std::swap (op0
, op1
);
9983 /* We generate better code and avoid problems with op1 mentioning
9984 target by forcing op1 into a pseudo if it isn't a constant. */
9985 if (! CONSTANT_P (op1
))
9986 op1
= force_reg (mode
, op1
);
9989 enum rtx_code comparison_code
;
9992 if (code
== MAX_EXPR
)
9993 comparison_code
= unsignedp
? GEU
: GE
;
9995 comparison_code
= unsignedp
? LEU
: LE
;
9997 /* Canonicalize to comparisons against 0. */
9998 if (op1
== const1_rtx
)
10000 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
10001 or (a != 0 ? a : 1) for unsigned.
10002 For MIN we are safe converting (a <= 1 ? a : 1)
10003 into (a <= 0 ? a : 1) */
10004 cmpop1
= const0_rtx
;
10005 if (code
== MAX_EXPR
)
10006 comparison_code
= unsignedp
? NE
: GT
;
10008 if (op1
== constm1_rtx
&& !unsignedp
)
10010 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
10011 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
10012 cmpop1
= const0_rtx
;
10013 if (code
== MIN_EXPR
)
10014 comparison_code
= LT
;
10017 /* Use a conditional move if possible. */
10018 if (can_conditionally_move_p (mode
))
10024 /* Try to emit the conditional move. */
10025 insn
= emit_conditional_move (target
,
10027 op0
, cmpop1
, mode
},
10031 /* If we could do the conditional move, emit the sequence,
10035 rtx_insn
*seq
= get_insns ();
10041 /* Otherwise discard the sequence and fall back to code with
10047 emit_move_insn (target
, op0
);
10049 lab
= gen_label_rtx ();
10050 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
10051 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
10052 profile_probability::uninitialized ());
10054 emit_move_insn (target
, op1
);
10059 op0
= expand_expr (treeop0
, subtarget
,
10060 VOIDmode
, EXPAND_NORMAL
);
10061 if (modifier
== EXPAND_STACK_PARM
)
10063 /* In case we have to reduce the result to bitfield precision
10064 for unsigned bitfield expand this as XOR with a proper constant
10066 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
10068 int_mode
= SCALAR_INT_TYPE_MODE (type
);
10069 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
10070 false, GET_MODE_PRECISION (int_mode
));
10072 temp
= expand_binop (int_mode
, xor_optab
, op0
,
10073 immed_wide_int_const (mask
, int_mode
),
10074 target
, 1, OPTAB_LIB_WIDEN
);
10077 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
10081 /* ??? Can optimize bitwise operations with one arg constant.
10082 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
10083 and (a bitwise1 b) bitwise2 b (etc)
10084 but that is probably not worth while. */
10093 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
10094 || type_has_mode_precision_p (type
));
10100 /* If this is a fixed-point operation, then we cannot use the code
10101 below because "expand_shift" doesn't support sat/no-sat fixed-point
10103 if (ALL_FIXED_POINT_MODE_P (mode
))
10106 if (! safe_from_p (subtarget
, treeop1
, 1))
10108 if (modifier
== EXPAND_STACK_PARM
)
10110 op0
= expand_expr (treeop0
, subtarget
,
10111 VOIDmode
, EXPAND_NORMAL
);
10113 /* Left shift optimization when shifting across word_size boundary.
10115 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
10116 there isn't native instruction to support this wide mode
10117 left shift. Given below scenario:
10119 Type A = (Type) B << C
10122 | dest_high | dest_low |
10126 If the shift amount C caused we shift B to across the word
10127 size boundary, i.e part of B shifted into high half of
10128 destination register, and part of B remains in the low
10129 half, then GCC will use the following left shift expand
10132 1. Initialize dest_low to B.
10133 2. Initialize every bit of dest_high to the sign bit of B.
10134 3. Logic left shift dest_low by C bit to finalize dest_low.
10135 The value of dest_low before this shift is kept in a temp D.
10136 4. Logic left shift dest_high by C.
10137 5. Logic right shift D by (word_size - C).
10138 6. Or the result of 4 and 5 to finalize dest_high.
10140 While, by checking gimple statements, if operand B is
10141 coming from signed extension, then we can simplify above
10144 1. dest_high = src_low >> (word_size - C).
10145 2. dest_low = src_low << C.
10147 We can use one arithmetic right shift to finish all the
10148 purpose of steps 2, 4, 5, 6, thus we reduce the steps
10149 needed from 6 into 2.
10151 The case is similar for zero extension, except that we
10152 initialize dest_high to zero rather than copies of the sign
10153 bit from B. Furthermore, we need to use a logical right shift
10156 The choice of sign-extension versus zero-extension is
10157 determined entirely by whether or not B is signed and is
10158 independent of the current setting of unsignedp. */
10161 if (code
== LSHIFT_EXPR
10164 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
10165 && mode
== int_mode
10166 && TREE_CONSTANT (treeop1
)
10167 && TREE_CODE (treeop0
) == SSA_NAME
)
10169 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
10170 if (is_gimple_assign (def
)
10171 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
10173 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
10174 (TREE_TYPE (gimple_assign_rhs1 (def
)));
10176 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
10177 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
10178 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
10179 >= GET_MODE_BITSIZE (word_mode
)))
10181 rtx_insn
*seq
, *seq_old
;
10182 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
10184 bool extend_unsigned
10185 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
10186 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
10187 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
10188 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
10189 int_mode
, high_off
);
10190 HOST_WIDE_INT ramount
= (BITS_PER_WORD
10191 - TREE_INT_CST_LOW (treeop1
));
10192 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
10195 /* dest_high = src_low >> (word_size - C). */
10196 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
10199 if (temp
!= dest_high
)
10200 emit_move_insn (dest_high
, temp
);
10202 /* dest_low = src_low << C. */
10203 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
10204 treeop1
, dest_low
, unsignedp
);
10205 if (temp
!= dest_low
)
10206 emit_move_insn (dest_low
, temp
);
10208 seq
= get_insns ();
10212 if (have_insn_for (ASHIFT
, int_mode
))
10214 bool speed_p
= optimize_insn_for_speed_p ();
10216 rtx ret_old
= expand_variable_shift (code
, int_mode
,
10221 seq_old
= get_insns ();
10223 if (seq_cost (seq
, speed_p
)
10224 >= seq_cost (seq_old
, speed_p
))
10235 if (temp
== NULL_RTX
)
10236 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
10238 if (code
== LSHIFT_EXPR
)
10239 temp
= REDUCE_BIT_FIELD (temp
);
10243 /* Could determine the answer when only additive constants differ. Also,
10244 the addition of one can be handled by changing the condition. */
10251 case UNORDERED_EXPR
:
10260 temp
= do_store_flag (ops
,
10261 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
10262 tmode
!= VOIDmode
? tmode
: mode
);
10266 /* Use a compare and a jump for BLKmode comparisons, or for function
10267 type comparisons is have_canonicalize_funcptr_for_compare. */
10270 || modifier
== EXPAND_STACK_PARM
10271 || ! safe_from_p (target
, treeop0
, 1)
10272 || ! safe_from_p (target
, treeop1
, 1)
10273 /* Make sure we don't have a hard reg (such as function's return
10274 value) live across basic blocks, if not optimizing. */
10275 || (!optimize
&& REG_P (target
)
10276 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
10277 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10279 emit_move_insn (target
, const0_rtx
);
10281 rtx_code_label
*lab1
= gen_label_rtx ();
10282 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
10283 profile_probability::uninitialized ());
10285 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
10286 emit_move_insn (target
, constm1_rtx
);
10288 emit_move_insn (target
, const1_rtx
);
10294 /* Get the rtx code of the operands. */
10295 op0
= expand_normal (treeop0
);
10296 op1
= expand_normal (treeop1
);
10299 target
= gen_reg_rtx (TYPE_MODE (type
));
10301 /* If target overlaps with op1, then either we need to force
10302 op1 into a pseudo (if target also overlaps with op0),
10303 or write the complex parts in reverse order. */
10304 switch (GET_CODE (target
))
10307 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
10309 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
10311 complex_expr_force_op1
:
10312 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
10313 emit_move_insn (temp
, op1
);
10317 complex_expr_swap_order
:
10318 /* Move the imaginary (op1) and real (op0) parts to their
10320 write_complex_part (target
, op1
, true, true);
10321 write_complex_part (target
, op0
, false, false);
10327 temp
= adjust_address_nv (target
,
10328 GET_MODE_INNER (GET_MODE (target
)), 0);
10329 if (reg_overlap_mentioned_p (temp
, op1
))
10331 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
10332 temp
= adjust_address_nv (target
, imode
,
10333 GET_MODE_SIZE (imode
));
10334 if (reg_overlap_mentioned_p (temp
, op0
))
10335 goto complex_expr_force_op1
;
10336 goto complex_expr_swap_order
;
10340 if (reg_overlap_mentioned_p (target
, op1
))
10342 if (reg_overlap_mentioned_p (target
, op0
))
10343 goto complex_expr_force_op1
;
10344 goto complex_expr_swap_order
;
10349 /* Move the real (op0) and imaginary (op1) parts to their location. */
10350 write_complex_part (target
, op0
, false, true);
10351 write_complex_part (target
, op1
, true, false);
10355 case WIDEN_SUM_EXPR
:
10357 tree oprnd0
= treeop0
;
10358 tree oprnd1
= treeop1
;
10360 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10361 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
10362 target
, unsignedp
);
10366 case VEC_UNPACK_HI_EXPR
:
10367 case VEC_UNPACK_LO_EXPR
:
10368 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
10369 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
10371 op0
= expand_normal (treeop0
);
10372 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
10373 target
, unsignedp
);
10378 case VEC_UNPACK_FLOAT_HI_EXPR
:
10379 case VEC_UNPACK_FLOAT_LO_EXPR
:
10381 op0
= expand_normal (treeop0
);
10382 /* The signedness is determined from input operand. */
10383 temp
= expand_widen_pattern_expr
10384 (ops
, op0
, NULL_RTX
, NULL_RTX
,
10385 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10391 case VEC_WIDEN_MULT_HI_EXPR
:
10392 case VEC_WIDEN_MULT_LO_EXPR
:
10393 case VEC_WIDEN_MULT_EVEN_EXPR
:
10394 case VEC_WIDEN_MULT_ODD_EXPR
:
10395 case VEC_WIDEN_LSHIFT_HI_EXPR
:
10396 case VEC_WIDEN_LSHIFT_LO_EXPR
:
10397 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10398 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
10399 target
, unsignedp
);
10400 gcc_assert (target
);
10403 case VEC_PACK_SAT_EXPR
:
10404 case VEC_PACK_FIX_TRUNC_EXPR
:
10405 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10406 subtarget
= NULL_RTX
;
10409 case VEC_PACK_TRUNC_EXPR
:
10410 if (VECTOR_BOOLEAN_TYPE_P (type
)
10411 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
10412 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
10413 && SCALAR_INT_MODE_P (mode
))
10415 class expand_operand eops
[4];
10416 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
10417 expand_operands (treeop0
, treeop1
,
10418 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10419 this_optab
= vec_pack_sbool_trunc_optab
;
10420 enum insn_code icode
= optab_handler (this_optab
, imode
);
10421 create_output_operand (&eops
[0], target
, mode
);
10422 create_convert_operand_from (&eops
[1], op0
, imode
, false);
10423 create_convert_operand_from (&eops
[2], op1
, imode
, false);
10424 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
10425 create_input_operand (&eops
[3], temp
, imode
);
10426 expand_insn (icode
, 4, eops
);
10427 return eops
[0].value
;
10429 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10430 subtarget
= NULL_RTX
;
10433 case VEC_PACK_FLOAT_EXPR
:
10434 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10435 expand_operands (treeop0
, treeop1
,
10436 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10437 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
10439 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
10440 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
10442 gcc_assert (target
);
10445 case VEC_PERM_EXPR
:
10447 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
10448 vec_perm_builder sel
;
10449 if (TREE_CODE (treeop2
) == VECTOR_CST
10450 && tree_to_vec_perm_builder (&sel
, treeop2
))
10452 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
10453 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
10458 op2
= expand_normal (treeop2
);
10459 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
10465 case DOT_PROD_EXPR
:
10467 tree oprnd0
= treeop0
;
10468 tree oprnd1
= treeop1
;
10469 tree oprnd2
= treeop2
;
10471 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10472 op2
= expand_normal (oprnd2
);
10473 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
10474 target
, unsignedp
);
10480 tree oprnd0
= treeop0
;
10481 tree oprnd1
= treeop1
;
10482 tree oprnd2
= treeop2
;
10484 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10485 op2
= expand_normal (oprnd2
);
10486 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
10487 target
, unsignedp
);
10491 case REALIGN_LOAD_EXPR
:
10493 tree oprnd0
= treeop0
;
10494 tree oprnd1
= treeop1
;
10495 tree oprnd2
= treeop2
;
10497 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
10498 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10499 op2
= expand_normal (oprnd2
);
10500 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
10501 target
, unsignedp
);
10508 /* A COND_EXPR with its type being VOID_TYPE represents a
10509 conditional jump and is handled in
10510 expand_gimple_cond_expr. */
10511 gcc_assert (!VOID_TYPE_P (type
));
10513 /* Note that COND_EXPRs whose type is a structure or union
10514 are required to be constructed to contain assignments of
10515 a temporary variable, so that we can evaluate them here
10516 for side effect only. If type is void, we must do likewise. */
10518 gcc_assert (!TREE_ADDRESSABLE (type
)
10520 && TREE_TYPE (treeop1
) != void_type_node
10521 && TREE_TYPE (treeop2
) != void_type_node
);
10523 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
10527 /* If we are not to produce a result, we have no target. Otherwise,
10528 if a target was specified use it; it will not be used as an
10529 intermediate target unless it is safe. If no target, use a
10532 if (modifier
!= EXPAND_STACK_PARM
10534 && safe_from_p (original_target
, treeop0
, 1)
10535 && GET_MODE (original_target
) == mode
10536 && !MEM_P (original_target
))
10537 temp
= original_target
;
10539 temp
= assign_temp (type
, 0, 1);
10541 do_pending_stack_adjust ();
10543 rtx_code_label
*lab0
= gen_label_rtx ();
10544 rtx_code_label
*lab1
= gen_label_rtx ();
10545 jumpifnot (treeop0
, lab0
,
10546 profile_probability::uninitialized ());
10547 store_expr (treeop1
, temp
,
10548 modifier
== EXPAND_STACK_PARM
,
10551 emit_jump_insn (targetm
.gen_jump (lab1
));
10554 store_expr (treeop2
, temp
,
10555 modifier
== EXPAND_STACK_PARM
,
10563 case VEC_DUPLICATE_EXPR
:
10564 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
10565 target
= expand_vector_broadcast (mode
, op0
);
10566 gcc_assert (target
);
10569 case VEC_SERIES_EXPR
:
10570 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
10571 return expand_vec_series_expr (mode
, op0
, op1
, target
);
10573 case BIT_INSERT_EXPR
:
10575 unsigned bitpos
= tree_to_uhwi (treeop2
);
10577 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
10578 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
10580 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
10581 op0
= expand_normal (treeop0
);
10582 op1
= expand_normal (treeop1
);
10583 rtx dst
= gen_reg_rtx (mode
);
10584 emit_move_insn (dst
, op0
);
10585 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
10586 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false, false);
10591 gcc_unreachable ();
10594 /* Here to do an ordinary binary operator. */
10596 expand_operands (treeop0
, treeop1
,
10597 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10599 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
10601 if (modifier
== EXPAND_STACK_PARM
)
10603 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
10604 unsignedp
, OPTAB_LIB_WIDEN
);
10606 /* Bitwise operations do not need bitfield reduction as we expect their
10607 operands being properly truncated. */
10608 if (code
== BIT_XOR_EXPR
10609 || code
== BIT_AND_EXPR
10610 || code
== BIT_IOR_EXPR
)
10612 return REDUCE_BIT_FIELD (temp
);
10614 #undef REDUCE_BIT_FIELD
10617 /* Return TRUE if expression STMT is suitable for replacement.
10618 Never consider memory loads as replaceable, because those don't ever lead
10619 into constant expressions. */
10622 stmt_is_replaceable_p (gimple
*stmt
)
10624 if (ssa_is_replaceable_p (stmt
))
10626 /* Don't move around loads. */
10627 if (!gimple_assign_single_p (stmt
)
10628 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
10635 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
10636 enum expand_modifier modifier
, rtx
*alt_rtl
,
10637 bool inner_reference_p
)
10639 rtx op0
, op1
, temp
, decl_rtl
;
10642 machine_mode mode
, dmode
;
10643 enum tree_code code
= TREE_CODE (exp
);
10644 rtx subtarget
, original_target
;
10646 bool reduce_bit_field
;
10647 location_t loc
= EXPR_LOCATION (exp
);
10648 struct separate_ops ops
;
10649 tree treeop0
, treeop1
, treeop2
;
10650 tree ssa_name
= NULL_TREE
;
10653 /* Some ABIs define padding bits in _BitInt uninitialized. Normally, RTL
10654 expansion sign/zero extends integral types with less than mode precision
10655 when reading from bit-fields and after arithmetic operations (see
10656 REDUCE_BIT_FIELD in expand_expr_real_2) and on subsequent loads relies
10657 on those extensions to have been already performed, but because of the
10658 above for _BitInt they need to be sign/zero extended when reading from
10659 locations that could be exposed to ABI boundaries (when loading from
10660 objects in memory, or function arguments, return value). Because we
10661 internally extend after arithmetic operations, we can avoid doing that
10662 when reading from SSA_NAMEs of vars. */
10663 #define EXTEND_BITINT(expr) \
10664 ((TREE_CODE (type) == BITINT_TYPE \
10665 && reduce_bit_field \
10666 && mode != BLKmode \
10667 && modifier != EXPAND_MEMORY \
10668 && modifier != EXPAND_WRITE \
10669 && modifier != EXPAND_CONST_ADDRESS) \
10670 ? reduce_to_bit_field_precision ((expr), NULL_RTX, type) : (expr))
10672 type
= TREE_TYPE (exp
);
10673 mode
= TYPE_MODE (type
);
10674 unsignedp
= TYPE_UNSIGNED (type
);
10676 treeop0
= treeop1
= treeop2
= NULL_TREE
;
10677 if (!VL_EXP_CLASS_P (exp
))
10678 switch (TREE_CODE_LENGTH (code
))
10681 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
10682 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
10683 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
10691 ops
.location
= loc
;
10693 ignore
= (target
== const0_rtx
10694 || ((CONVERT_EXPR_CODE_P (code
)
10695 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
10696 && TREE_CODE (type
) == VOID_TYPE
));
10698 /* An operation in what may be a bit-field type needs the
10699 result to be reduced to the precision of the bit-field type,
10700 which is narrower than that of the type's mode. */
10701 reduce_bit_field
= (!ignore
10702 && INTEGRAL_TYPE_P (type
)
10703 && !type_has_mode_precision_p (type
));
10705 /* If we are going to ignore this result, we need only do something
10706 if there is a side-effect somewhere in the expression. If there
10707 is, short-circuit the most common cases here. Note that we must
10708 not call expand_expr with anything but const0_rtx in case this
10709 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
10713 if (! TREE_SIDE_EFFECTS (exp
))
10716 /* Ensure we reference a volatile object even if value is ignored, but
10717 don't do this if all we are doing is taking its address. */
10718 if (TREE_THIS_VOLATILE (exp
)
10719 && TREE_CODE (exp
) != FUNCTION_DECL
10720 && mode
!= VOIDmode
&& mode
!= BLKmode
10721 && modifier
!= EXPAND_CONST_ADDRESS
)
10723 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
10725 copy_to_reg (temp
);
10729 if (TREE_CODE_CLASS (code
) == tcc_unary
10730 || code
== BIT_FIELD_REF
10731 || code
== COMPONENT_REF
10732 || code
== INDIRECT_REF
)
10733 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10736 else if (TREE_CODE_CLASS (code
) == tcc_binary
10737 || TREE_CODE_CLASS (code
) == tcc_comparison
10738 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10740 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10741 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10748 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10751 /* Use subtarget as the target for operand 0 of a binary operation. */
10752 subtarget
= get_subtarget (target
);
10753 original_target
= target
;
10759 tree function
= decl_function_context (exp
);
10761 temp
= label_rtx (exp
);
10762 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10764 if (function
!= current_function_decl
10766 LABEL_REF_NONLOCAL_P (temp
) = 1;
10768 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10773 /* ??? ivopts calls expander, without any preparation from
10774 out-of-ssa. So fake instructions as if this was an access to the
10775 base variable. This unnecessarily allocates a pseudo, see how we can
10776 reuse it, if partition base vars have it set already. */
10777 if (!currently_expanding_to_rtl
)
10779 tree var
= SSA_NAME_VAR (exp
);
10780 if (var
&& DECL_RTL_SET_P (var
))
10781 return DECL_RTL (var
);
10782 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10783 LAST_VIRTUAL_REGISTER
+ 1);
10786 g
= get_gimple_for_ssa_name (exp
);
10787 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10789 && modifier
== EXPAND_INITIALIZER
10790 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10791 && (optimize
|| !SSA_NAME_VAR (exp
)
10792 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10793 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10794 g
= SSA_NAME_DEF_STMT (exp
);
10798 location_t saved_loc
= curr_insn_location ();
10799 loc
= gimple_location (g
);
10800 if (loc
!= UNKNOWN_LOCATION
)
10801 set_curr_insn_location (loc
);
10802 ops
.code
= gimple_assign_rhs_code (g
);
10803 switch (get_gimple_rhs_class (ops
.code
))
10805 case GIMPLE_TERNARY_RHS
:
10806 ops
.op2
= gimple_assign_rhs3 (g
);
10808 case GIMPLE_BINARY_RHS
:
10809 ops
.op1
= gimple_assign_rhs2 (g
);
10811 /* Try to expand conditonal compare. */
10812 if (targetm
.gen_ccmp_first
)
10814 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10815 r
= expand_ccmp_expr (g
, mode
);
10820 case GIMPLE_UNARY_RHS
:
10821 ops
.op0
= gimple_assign_rhs1 (g
);
10822 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10823 ops
.location
= loc
;
10824 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10826 case GIMPLE_SINGLE_RHS
:
10828 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10829 tmode
, modifier
, alt_rtl
,
10830 inner_reference_p
);
10834 gcc_unreachable ();
10836 set_curr_insn_location (saved_loc
);
10837 if (REG_P (r
) && !REG_EXPR (r
))
10838 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10843 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10844 exp
= SSA_NAME_VAR (ssa_name
);
10845 /* Optimize and avoid to EXTEND_BITINIT doing anything if it is an
10846 SSA_NAME computed within the current function. In such case the
10847 value have been already extended before. While if it is a function
10848 parameter, result or some memory location, we need to be prepared
10849 for some other compiler leaving the bits uninitialized. */
10850 if (!exp
|| VAR_P (exp
))
10851 reduce_bit_field
= false;
10852 goto expand_decl_rtl
;
10855 /* Allow accel compiler to handle variables that require special
10856 treatment, e.g. if they have been modified in some way earlier in
10857 compilation by the adjust_private_decl OpenACC hook. */
10858 if (flag_openacc
&& targetm
.goacc
.expand_var_decl
)
10860 temp
= targetm
.goacc
.expand_var_decl (exp
);
10864 /* Expand const VAR_DECLs with CONSTRUCTOR initializers that
10865 have scalar integer modes to a reg via store_constructor. */
10866 if (TREE_READONLY (exp
)
10867 && !TREE_SIDE_EFFECTS (exp
)
10868 && (modifier
== EXPAND_NORMAL
|| modifier
== EXPAND_STACK_PARM
)
10869 && immediate_const_ctor_p (DECL_INITIAL (exp
))
10870 && SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (exp
)))
10871 && crtl
->emit
.regno_pointer_align_length
10874 target
= gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp
)));
10875 store_constructor (DECL_INITIAL (exp
), target
, 0,
10876 int_expr_size (DECL_INITIAL (exp
)), false);
10879 /* ... fall through ... */
10882 /* If a static var's type was incomplete when the decl was written,
10883 but the type is complete now, lay out the decl now. */
10884 if (DECL_SIZE (exp
) == 0
10885 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10886 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10887 layout_decl (exp
, 0);
10891 case FUNCTION_DECL
:
10893 decl_rtl
= DECL_RTL (exp
);
10895 gcc_assert (decl_rtl
);
10897 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10898 settings for VECTOR_TYPE_P that might switch for the function. */
10899 if (currently_expanding_to_rtl
10900 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10901 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10902 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10904 decl_rtl
= copy_rtx (decl_rtl
);
10906 /* Record writes to register variables. */
10907 if (modifier
== EXPAND_WRITE
10908 && REG_P (decl_rtl
)
10909 && HARD_REGISTER_P (decl_rtl
))
10910 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10911 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10913 /* Ensure variable marked as used even if it doesn't go through
10914 a parser. If it hasn't be used yet, write out an external
10917 TREE_USED (exp
) = 1;
10919 /* Show we haven't gotten RTL for this yet. */
10922 /* Variables inherited from containing functions should have
10923 been lowered by this point. */
10926 tree context
= decl_function_context (exp
);
10927 gcc_assert (SCOPE_FILE_SCOPE_P (context
)
10928 || context
== current_function_decl
10929 || TREE_STATIC (exp
)
10930 || DECL_EXTERNAL (exp
)
10931 /* ??? C++ creates functions that are not
10933 || TREE_CODE (exp
) == FUNCTION_DECL
);
10936 /* This is the case of an array whose size is to be determined
10937 from its initializer, while the initializer is still being parsed.
10938 ??? We aren't parsing while expanding anymore. */
10940 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10941 temp
= validize_mem (decl_rtl
);
10943 /* If DECL_RTL is memory, we are in the normal case and the
10944 address is not valid, get the address into a register. */
10946 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10949 *alt_rtl
= decl_rtl
;
10950 decl_rtl
= use_anchored_address (decl_rtl
);
10951 if (modifier
!= EXPAND_CONST_ADDRESS
10952 && modifier
!= EXPAND_SUM
10953 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10954 : GET_MODE (decl_rtl
),
10955 XEXP (decl_rtl
, 0),
10956 MEM_ADDR_SPACE (decl_rtl
)))
10957 temp
= replace_equiv_address (decl_rtl
,
10958 copy_rtx (XEXP (decl_rtl
, 0)));
10961 /* If we got something, return it. But first, set the alignment
10962 if the address is a register. */
10965 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10966 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10968 else if (MEM_P (decl_rtl
))
10974 && modifier
!= EXPAND_WRITE
10975 && modifier
!= EXPAND_MEMORY
10976 && modifier
!= EXPAND_INITIALIZER
10977 && modifier
!= EXPAND_CONST_ADDRESS
10978 && modifier
!= EXPAND_SUM
10979 && !inner_reference_p
10981 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10982 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10983 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10985 return EXTEND_BITINT (temp
);
10989 dmode
= DECL_MODE (exp
);
10991 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10993 /* If the mode of DECL_RTL does not match that of the decl,
10994 there are two cases: we are dealing with a BLKmode value
10995 that is returned in a register, or we are dealing with
10996 a promoted value. In the latter case, return a SUBREG
10997 of the wanted mode, but mark it so that we know that it
10998 was already extended. */
10999 if (REG_P (decl_rtl
)
11000 && dmode
!= BLKmode
11001 && GET_MODE (decl_rtl
) != dmode
)
11003 machine_mode pmode
;
11005 /* Get the signedness to be used for this variable. Ensure we get
11006 the same mode we got when the variable was declared. */
11007 if (code
!= SSA_NAME
)
11008 pmode
= promote_decl_mode (exp
, &unsignedp
);
11009 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
11010 && gimple_code (g
) == GIMPLE_CALL
11011 && !gimple_call_internal_p (g
))
11012 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
11013 gimple_call_fntype (g
),
11016 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
11017 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
11019 /* Some ABIs require scalar floating point modes to be passed
11020 in a wider scalar integer mode. We need to explicitly
11021 truncate to an integer mode of the correct precision before
11022 using a SUBREG to reinterpret as a floating point value. */
11023 if (SCALAR_FLOAT_MODE_P (mode
)
11024 && SCALAR_INT_MODE_P (pmode
)
11025 && known_lt (GET_MODE_SIZE (mode
), GET_MODE_SIZE (pmode
)))
11026 return convert_wider_int_to_float (mode
, pmode
, decl_rtl
);
11028 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
11029 SUBREG_PROMOTED_VAR_P (temp
) = 1;
11030 SUBREG_PROMOTED_SET (temp
, unsignedp
);
11031 return EXTEND_BITINT (temp
);
11034 return EXTEND_BITINT (decl_rtl
);
11038 if (TREE_CODE (type
) == BITINT_TYPE
)
11040 unsigned int prec
= TYPE_PRECISION (type
);
11041 struct bitint_info info
;
11042 bool ok
= targetm
.c
.bitint_type_info (prec
, &info
);
11044 scalar_int_mode limb_mode
11045 = as_a
<scalar_int_mode
> (info
.limb_mode
);
11046 unsigned int limb_prec
= GET_MODE_PRECISION (limb_mode
);
11047 if (prec
> limb_prec
)
11049 scalar_int_mode arith_mode
11050 = (targetm
.scalar_mode_supported_p (TImode
)
11051 ? TImode
: DImode
);
11052 if (prec
> GET_MODE_PRECISION (arith_mode
))
11054 /* Emit large/huge _BitInt INTEGER_CSTs into memory. */
11055 exp
= tree_output_constant_def (exp
);
11056 return expand_expr (exp
, target
, VOIDmode
, modifier
);
11061 /* Given that TYPE_PRECISION (type) is not always equal to
11062 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
11063 the former to the latter according to the signedness of the
11065 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
11066 temp
= immed_wide_int_const
11067 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
11073 tree tmp
= NULL_TREE
;
11074 if (VECTOR_MODE_P (mode
))
11075 return const_vector_from_tree (exp
);
11076 scalar_int_mode int_mode
;
11077 if (is_int_mode (mode
, &int_mode
))
11079 tree type_for_mode
= lang_hooks
.types
.type_for_mode (int_mode
, 1);
11081 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
11082 type_for_mode
, exp
);
11086 vec
<constructor_elt
, va_gc
> *v
;
11087 /* Constructors need to be fixed-length. FIXME. */
11088 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11089 vec_alloc (v
, nunits
);
11090 for (unsigned int i
= 0; i
< nunits
; ++i
)
11091 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
11092 tmp
= build_constructor (type
, v
);
11094 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
11099 if (modifier
== EXPAND_WRITE
)
11101 /* Writing into CONST_DECL is always invalid, but handle it
11103 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
11104 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
11105 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
11106 EXPAND_NORMAL
, as
);
11107 op0
= memory_address_addr_space (mode
, op0
, as
);
11108 temp
= gen_rtx_MEM (mode
, op0
);
11109 set_mem_addr_space (temp
, as
);
11112 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
11115 /* If optimized, generate immediate CONST_DOUBLE
11116 which will be turned into memory by reload if necessary.
11118 We used to force a register so that loop.c could see it. But
11119 this does not allow gen_* patterns to perform optimizations with
11120 the constants. It also produces two insns in cases like "x = 1.0;".
11121 On most machines, floating-point constants are not permitted in
11122 many insns, so we'd end up copying it to a register in any case.
11124 Now, we do the copying in expand_binop, if appropriate. */
11125 return const_double_from_real_value (TREE_REAL_CST (exp
),
11126 TYPE_MODE (TREE_TYPE (exp
)));
11129 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
11130 TYPE_MODE (TREE_TYPE (exp
)));
11133 /* Handle evaluating a complex constant in a CONCAT target. */
11134 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
11138 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
11139 rtarg
= XEXP (original_target
, 0);
11140 itarg
= XEXP (original_target
, 1);
11142 /* Move the real and imaginary parts separately. */
11143 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
11144 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
11147 emit_move_insn (rtarg
, op0
);
11149 emit_move_insn (itarg
, op1
);
11151 return original_target
;
11157 temp
= expand_expr_constant (exp
, 1, modifier
);
11159 /* temp contains a constant address.
11160 On RISC machines where a constant address isn't valid,
11161 make some insns to get that address into a register. */
11162 if (modifier
!= EXPAND_CONST_ADDRESS
11163 && modifier
!= EXPAND_INITIALIZER
11164 && modifier
!= EXPAND_SUM
11165 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
11166 MEM_ADDR_SPACE (temp
)))
11167 return replace_equiv_address (temp
,
11168 copy_rtx (XEXP (temp
, 0)));
11172 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
11176 tree val
= treeop0
;
11177 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
11178 inner_reference_p
);
11180 if (!SAVE_EXPR_RESOLVED_P (exp
))
11182 /* We can indeed still hit this case, typically via builtin
11183 expanders calling save_expr immediately before expanding
11184 something. Assume this means that we only have to deal
11185 with non-BLKmode values. */
11186 gcc_assert (GET_MODE (ret
) != BLKmode
);
11188 val
= build_decl (curr_insn_location (),
11189 VAR_DECL
, NULL
, TREE_TYPE (exp
));
11190 DECL_ARTIFICIAL (val
) = 1;
11191 DECL_IGNORED_P (val
) = 1;
11193 TREE_OPERAND (exp
, 0) = treeop0
;
11194 SAVE_EXPR_RESOLVED_P (exp
) = 1;
11196 if (!CONSTANT_P (ret
))
11197 ret
= copy_to_reg (ret
);
11198 SET_DECL_RTL (val
, ret
);
11206 /* If we don't need the result, just ensure we evaluate any
11210 unsigned HOST_WIDE_INT idx
;
11213 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
11214 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
11219 return expand_constructor (exp
, target
, modifier
, false);
11221 case TARGET_MEM_REF
:
11224 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
11225 unsigned int align
;
11227 op0
= addr_for_mem_ref (exp
, as
, true);
11228 op0
= memory_address_addr_space (mode
, op0
, as
);
11229 temp
= gen_rtx_MEM (mode
, op0
);
11230 set_mem_attributes (temp
, exp
, 0);
11231 set_mem_addr_space (temp
, as
);
11232 align
= get_object_alignment (exp
);
11233 if (modifier
!= EXPAND_WRITE
11234 && modifier
!= EXPAND_MEMORY
11236 && align
< GET_MODE_ALIGNMENT (mode
))
11237 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
11238 align
, NULL_RTX
, NULL
);
11239 return EXTEND_BITINT (temp
);
11244 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
11246 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
11247 machine_mode address_mode
;
11248 tree base
= TREE_OPERAND (exp
, 0);
11251 /* Handle expansion of non-aliased memory with non-BLKmode. That
11252 might end up in a register. */
11253 if (mem_ref_refers_to_non_mem_p (exp
))
11255 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
11256 base
= TREE_OPERAND (base
, 0);
11257 poly_uint64 type_size
;
11258 if (known_eq (offset
, 0)
11260 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
11261 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
11262 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
11263 target
, tmode
, modifier
);
11264 if (TYPE_MODE (type
) == BLKmode
)
11266 temp
= assign_stack_temp (DECL_MODE (base
),
11267 GET_MODE_SIZE (DECL_MODE (base
)));
11268 store_expr (base
, temp
, 0, false, false);
11269 temp
= adjust_address (temp
, BLKmode
, offset
);
11270 set_mem_size (temp
, int_size_in_bytes (type
));
11273 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
11274 bitsize_int (offset
* BITS_PER_UNIT
));
11275 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
11276 return expand_expr (exp
, target
, tmode
, modifier
);
11278 address_mode
= targetm
.addr_space
.address_mode (as
);
11279 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
11281 tree mask
= gimple_assign_rhs2 (def_stmt
);
11282 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
11283 gimple_assign_rhs1 (def_stmt
), mask
);
11284 TREE_OPERAND (exp
, 0) = base
;
11286 align
= get_object_alignment (exp
);
11287 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
11288 op0
= memory_address_addr_space (mode
, op0
, as
);
11289 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
11291 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
11292 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
11293 op0
= memory_address_addr_space (mode
, op0
, as
);
11295 temp
= gen_rtx_MEM (mode
, op0
);
11296 set_mem_attributes (temp
, exp
, 0);
11297 set_mem_addr_space (temp
, as
);
11298 if (TREE_THIS_VOLATILE (exp
))
11299 MEM_VOLATILE_P (temp
) = 1;
11300 if (modifier
== EXPAND_WRITE
|| modifier
== EXPAND_MEMORY
)
11302 if (!inner_reference_p
11304 && align
< GET_MODE_ALIGNMENT (mode
))
11305 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
11306 modifier
== EXPAND_STACK_PARM
11307 ? NULL_RTX
: target
, alt_rtl
);
11309 temp
= flip_storage_order (mode
, temp
);
11310 return EXTEND_BITINT (temp
);
11316 tree array
= treeop0
;
11317 tree index
= treeop1
;
11320 /* Fold an expression like: "foo"[2].
11321 This is not done in fold so it won't happen inside &.
11322 Don't fold if this is for wide characters since it's too
11323 difficult to do correctly and this is a very rare case. */
11325 if (modifier
!= EXPAND_CONST_ADDRESS
11326 && modifier
!= EXPAND_INITIALIZER
11327 && modifier
!= EXPAND_MEMORY
)
11329 tree t
= fold_read_from_constant_string (exp
);
11332 return expand_expr (t
, target
, tmode
, modifier
);
11335 /* If this is a constant index into a constant array,
11336 just get the value from the array. Handle both the cases when
11337 we have an explicit constructor and when our operand is a variable
11338 that was declared const. */
11340 if (modifier
!= EXPAND_CONST_ADDRESS
11341 && modifier
!= EXPAND_INITIALIZER
11342 && modifier
!= EXPAND_MEMORY
11343 && TREE_CODE (array
) == CONSTRUCTOR
11344 && ! TREE_SIDE_EFFECTS (array
)
11345 && TREE_CODE (index
) == INTEGER_CST
)
11347 unsigned HOST_WIDE_INT ix
;
11350 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
11352 if (tree_int_cst_equal (field
, index
))
11354 if (!TREE_SIDE_EFFECTS (value
))
11355 return expand_expr (fold (value
), target
, tmode
, modifier
);
11360 else if (optimize
>= 1
11361 && modifier
!= EXPAND_CONST_ADDRESS
11362 && modifier
!= EXPAND_INITIALIZER
11363 && modifier
!= EXPAND_MEMORY
11364 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
11365 && TREE_CODE (index
) == INTEGER_CST
11366 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11367 && (init
= ctor_for_folding (array
)) != error_mark_node
)
11369 if (init
== NULL_TREE
)
11371 tree value
= build_zero_cst (type
);
11372 if (TREE_CODE (value
) == CONSTRUCTOR
)
11374 /* If VALUE is a CONSTRUCTOR, this optimization is only
11375 useful if this doesn't store the CONSTRUCTOR into
11376 memory. If it does, it is more efficient to just
11377 load the data from the array directly. */
11378 rtx ret
= expand_constructor (value
, target
,
11380 if (ret
== NULL_RTX
)
11385 return expand_expr (value
, target
, tmode
, modifier
);
11387 else if (TREE_CODE (init
) == CONSTRUCTOR
)
11389 unsigned HOST_WIDE_INT ix
;
11392 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
11394 if (tree_int_cst_equal (field
, index
))
11396 if (TREE_SIDE_EFFECTS (value
))
11399 if (TREE_CODE (value
) == CONSTRUCTOR
)
11401 /* If VALUE is a CONSTRUCTOR, this
11402 optimization is only useful if
11403 this doesn't store the CONSTRUCTOR
11404 into memory. If it does, it is more
11405 efficient to just load the data from
11406 the array directly. */
11407 rtx ret
= expand_constructor (value
, target
,
11409 if (ret
== NULL_RTX
)
11414 expand_expr (fold (value
), target
, tmode
, modifier
);
11417 else if (TREE_CODE (init
) == STRING_CST
)
11419 tree low_bound
= array_ref_low_bound (exp
);
11420 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
11422 /* Optimize the special case of a zero lower bound.
11424 We convert the lower bound to sizetype to avoid problems
11425 with constant folding. E.g. suppose the lower bound is
11426 1 and its mode is QI. Without the conversion
11427 (ARRAY + (INDEX - (unsigned char)1))
11429 (ARRAY + (-(unsigned char)1) + INDEX)
11431 (ARRAY + 255 + INDEX). Oops! */
11432 if (!integer_zerop (low_bound
))
11433 index1
= size_diffop_loc (loc
, index1
,
11434 fold_convert_loc (loc
, sizetype
,
11437 if (tree_fits_uhwi_p (index1
)
11438 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
11440 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
11441 scalar_int_mode char_mode
;
11443 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
11444 && GET_MODE_SIZE (char_mode
) == 1)
11445 return gen_int_mode (TREE_STRING_POINTER (init
)
11446 [TREE_INT_CST_LOW (index1
)],
11452 goto normal_inner_ref
;
11454 case COMPONENT_REF
:
11455 gcc_assert (TREE_CODE (treeop0
) != CONSTRUCTOR
);
11456 /* Fall through. */
11457 case BIT_FIELD_REF
:
11458 case ARRAY_RANGE_REF
:
11461 machine_mode mode1
, mode2
;
11462 poly_int64 bitsize
, bitpos
, bytepos
;
11464 int reversep
, volatilep
= 0;
11466 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
11467 &unsignedp
, &reversep
, &volatilep
);
11468 rtx orig_op0
, memloc
;
11469 bool clear_mem_expr
= false;
11470 bool must_force_mem
;
11472 /* If we got back the original object, something is wrong. Perhaps
11473 we are evaluating an expression too early. In any event, don't
11474 infinitely recurse. */
11475 gcc_assert (tem
!= exp
);
11477 /* Make sure bitpos is not negative, this can wreak havoc later. */
11478 if (maybe_lt (bitpos
, 0))
11480 gcc_checking_assert (offset
== NULL_TREE
);
11481 offset
= size_int (bits_to_bytes_round_down (bitpos
));
11482 bitpos
= num_trailing_bits (bitpos
);
11485 /* If we have either an offset, a BLKmode result, or a reference
11486 outside the underlying object, we must force it to memory.
11487 Such a case can occur in Ada if we have unchecked conversion
11488 of an expression from a scalar type to an aggregate type or
11489 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
11490 passed a partially uninitialized object or a view-conversion
11491 to a larger size. */
11492 must_force_mem
= offset
!= NULL_TREE
11493 || mode1
== BLKmode
11494 || (mode
== BLKmode
11495 && !int_mode_for_size (bitsize
, 1).exists ());
11497 const enum expand_modifier tem_modifier
11500 : modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
;
11502 /* If TEM's type is a union of variable size, pass TARGET to the inner
11503 computation, since it will need a temporary and TARGET is known
11504 to have to do. This occurs in unchecked conversion in Ada. */
11505 const rtx tem_target
11506 = TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11507 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
11508 && TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
))) != INTEGER_CST
11509 && modifier
!= EXPAND_STACK_PARM
11514 = expand_expr_real (tem
, tem_target
, VOIDmode
, tem_modifier
, NULL
,
11517 /* If the field has a mode, we want to access it in the
11518 field's mode, not the computed mode.
11519 If a MEM has VOIDmode (external with incomplete type),
11520 use BLKmode for it instead. */
11523 if (mode1
!= VOIDmode
)
11524 op0
= adjust_address (op0
, mode1
, 0);
11525 else if (GET_MODE (op0
) == VOIDmode
)
11526 op0
= adjust_address (op0
, BLKmode
, 0);
11530 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
11532 /* See above for the rationale. */
11533 if (maybe_gt (bitpos
+ bitsize
, GET_MODE_BITSIZE (mode2
)))
11534 must_force_mem
= true;
11536 /* Handle CONCAT first. */
11537 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
11539 if (known_eq (bitpos
, 0)
11540 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
11541 && COMPLEX_MODE_P (mode1
)
11542 && COMPLEX_MODE_P (GET_MODE (op0
))
11543 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
11544 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
11547 op0
= flip_storage_order (GET_MODE (op0
), op0
);
11548 if (mode1
!= GET_MODE (op0
))
11551 for (int i
= 0; i
< 2; i
++)
11553 rtx op
= read_complex_part (op0
, i
!= 0);
11554 if (GET_CODE (op
) == SUBREG
)
11555 op
= force_reg (GET_MODE (op
), op
);
11556 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
11561 if (!REG_P (op
) && !MEM_P (op
))
11562 op
= force_reg (GET_MODE (op
), op
);
11563 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
11567 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
11571 if (known_eq (bitpos
, 0)
11572 && known_eq (bitsize
,
11573 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
11574 && maybe_ne (bitsize
, 0))
11576 op0
= XEXP (op0
, 0);
11577 mode2
= GET_MODE (op0
);
11579 else if (known_eq (bitpos
,
11580 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
11581 && known_eq (bitsize
,
11582 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
11583 && maybe_ne (bitpos
, 0)
11584 && maybe_ne (bitsize
, 0))
11586 op0
= XEXP (op0
, 1);
11588 mode2
= GET_MODE (op0
);
11591 /* Otherwise force into memory. */
11592 must_force_mem
= true;
11595 /* If this is a constant, put it in a register if it is a legitimate
11596 constant and we don't need a memory reference. */
11597 if (CONSTANT_P (op0
)
11598 && mode2
!= BLKmode
11599 && targetm
.legitimate_constant_p (mode2
, op0
)
11600 && !must_force_mem
)
11601 op0
= force_reg (mode2
, op0
);
11603 /* Otherwise, if this is a constant, try to force it to the constant
11604 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
11605 is a legitimate constant. */
11606 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
11607 op0
= validize_mem (memloc
);
11609 /* Otherwise, if this is a constant or the object is not in memory
11610 and need be, put it there. */
11611 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
11613 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
11614 emit_move_insn (memloc
, op0
);
11616 clear_mem_expr
= true;
11621 machine_mode address_mode
;
11622 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
11625 gcc_assert (MEM_P (op0
));
11627 address_mode
= get_address_mode (op0
);
11628 if (GET_MODE (offset_rtx
) != address_mode
)
11630 /* We cannot be sure that the RTL in offset_rtx is valid outside
11631 of a memory address context, so force it into a register
11632 before attempting to convert it to the desired mode. */
11633 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
11634 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
11637 /* See the comment in expand_assignment for the rationale. */
11638 if (mode1
!= VOIDmode
11639 && maybe_ne (bitpos
, 0)
11640 && maybe_gt (bitsize
, 0)
11641 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11642 && multiple_p (bitpos
, bitsize
)
11643 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
11644 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
11646 op0
= adjust_address (op0
, mode1
, bytepos
);
11650 op0
= offset_address (op0
, offset_rtx
,
11651 highest_pow2_factor (offset
));
11654 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
11655 record its alignment as BIGGEST_ALIGNMENT. */
11657 && known_eq (bitpos
, 0)
11659 && is_aligning_offset (offset
, tem
))
11660 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
11662 /* Don't forget about volatility even if this is a bitfield. */
11663 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
11665 if (op0
== orig_op0
)
11666 op0
= copy_rtx (op0
);
11668 MEM_VOLATILE_P (op0
) = 1;
11671 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
11673 if (op0
== orig_op0
)
11674 op0
= copy_rtx (op0
);
11676 set_mem_align (op0
, BITS_PER_UNIT
);
11679 /* In cases where an aligned union has an unaligned object
11680 as a field, we might be extracting a BLKmode value from
11681 an integer-mode (e.g., SImode) object. Handle this case
11682 by doing the extract into an object as wide as the field
11683 (which we know to be the width of a basic mode), then
11684 storing into memory, and changing the mode to BLKmode. */
11685 if (mode1
== VOIDmode
11686 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
11687 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
11688 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
11689 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
11690 && modifier
!= EXPAND_CONST_ADDRESS
11691 && modifier
!= EXPAND_INITIALIZER
11692 && modifier
!= EXPAND_MEMORY
)
11693 /* If the bitfield is volatile and the bitsize
11694 is narrower than the access size of the bitfield,
11695 we need to extract bitfields from the access. */
11696 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
11697 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
11698 && mode1
!= BLKmode
11699 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
11700 /* If the field isn't aligned enough to fetch as a memref,
11701 fetch it as a bit field. */
11702 || (mode1
!= BLKmode
11704 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
11705 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
11706 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
11707 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
11708 && modifier
!= EXPAND_MEMORY
11709 && ((modifier
== EXPAND_CONST_ADDRESS
11710 || modifier
== EXPAND_INITIALIZER
)
11712 : targetm
.slow_unaligned_access (mode1
,
11714 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
11715 /* If the type and the field are a constant size and the
11716 size of the type isn't the same size as the bitfield,
11717 we must use bitfield operations. */
11718 || (known_size_p (bitsize
)
11719 && TYPE_SIZE (TREE_TYPE (exp
))
11720 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
11721 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
11724 machine_mode ext_mode
= mode
;
11726 if (ext_mode
== BLKmode
11727 && ! (target
!= 0 && MEM_P (op0
)
11729 && multiple_p (bitpos
, BITS_PER_UNIT
)))
11730 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
11732 if (ext_mode
== BLKmode
)
11735 target
= assign_temp (type
, 1, 1);
11737 /* ??? Unlike the similar test a few lines below, this one is
11738 very likely obsolete. */
11739 if (known_eq (bitsize
, 0))
11742 /* In this case, BITPOS must start at a byte boundary and
11743 TARGET, if specified, must be a MEM. */
11744 gcc_assert (MEM_P (op0
)
11745 && (!target
|| MEM_P (target
)));
11747 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11748 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11749 emit_block_move (target
,
11750 adjust_address (op0
, VOIDmode
, bytepos
),
11751 gen_int_mode (bytesize
, Pmode
),
11752 (modifier
== EXPAND_STACK_PARM
11753 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11758 /* If we have nothing to extract, the result will be 0 for targets
11759 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11760 return 0 for the sake of consistency, as reading a zero-sized
11761 bitfield is valid in Ada and the value is fully specified. */
11762 if (known_eq (bitsize
, 0))
11765 op0
= validize_mem (op0
);
11767 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11768 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11770 /* If the result has aggregate type and the extraction is done in
11771 an integral mode, then the field may be not aligned on a byte
11772 boundary; in this case, if it has reverse storage order, it
11773 needs to be extracted as a scalar field with reverse storage
11774 order and put back into memory order afterwards. */
11775 if (AGGREGATE_TYPE_P (type
)
11776 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11777 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11779 gcc_checking_assert (known_ge (bitpos
, 0));
11780 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11781 (modifier
== EXPAND_STACK_PARM
11782 ? NULL_RTX
: target
),
11783 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11785 /* If the result has aggregate type and the mode of OP0 is an
11786 integral mode then, if BITSIZE is narrower than this mode
11787 and this is for big-endian data, we must put the field
11788 into the high-order bits. And we must also put it back
11789 into memory order if it has been previously reversed. */
11790 scalar_int_mode op0_mode
;
11791 if (AGGREGATE_TYPE_P (type
)
11792 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11794 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11796 gcc_checking_assert (known_le (bitsize
, size
));
11797 if (maybe_lt (bitsize
, size
)
11798 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11799 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11800 size
- bitsize
, op0
, 1);
11803 op0
= flip_storage_order (op0_mode
, op0
);
11806 /* If the result type is BLKmode, store the data into a temporary
11807 of the appropriate type, but with the mode corresponding to the
11808 mode for the data we have (op0's mode). */
11809 if (mode
== BLKmode
)
11812 = assign_stack_temp_for_type (ext_mode
,
11813 GET_MODE_BITSIZE (ext_mode
),
11815 emit_move_insn (new_rtx
, op0
);
11816 op0
= copy_rtx (new_rtx
);
11817 PUT_MODE (op0
, BLKmode
);
11823 /* If the result is BLKmode, use that to access the object
11825 if (mode
== BLKmode
)
11828 /* Get a reference to just this component. */
11829 bytepos
= bits_to_bytes_round_down (bitpos
);
11830 if (modifier
== EXPAND_CONST_ADDRESS
11831 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11832 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11834 op0
= adjust_address (op0
, mode1
, bytepos
);
11836 if (op0
== orig_op0
)
11837 op0
= copy_rtx (op0
);
11839 /* Don't set memory attributes if the base expression is
11840 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11841 we should just honor its original memory attributes. */
11842 if (!(TREE_CODE (tem
) == SSA_NAME
11843 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11844 set_mem_attributes (op0
, exp
, 0);
11846 if (REG_P (XEXP (op0
, 0)))
11847 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11849 /* If op0 is a temporary because the original expressions was forced
11850 to memory, clear MEM_EXPR so that the original expression cannot
11851 be marked as addressable through MEM_EXPR of the temporary. */
11852 if (clear_mem_expr
)
11853 set_mem_expr (op0
, NULL_TREE
);
11855 MEM_VOLATILE_P (op0
) |= volatilep
;
11858 && modifier
!= EXPAND_MEMORY
11859 && modifier
!= EXPAND_WRITE
)
11860 op0
= flip_storage_order (mode1
, op0
);
11862 op0
= EXTEND_BITINT (op0
);
11864 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11865 || modifier
== EXPAND_CONST_ADDRESS
11866 || modifier
== EXPAND_INITIALIZER
)
11870 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11872 convert_move (target
, op0
, unsignedp
);
11877 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11880 /* All valid uses of __builtin_va_arg_pack () are removed during
11882 if (CALL_EXPR_VA_ARG_PACK (exp
))
11883 error ("invalid use of %<__builtin_va_arg_pack ()%>");
11885 tree fndecl
= get_callee_fndecl (exp
), attr
;
11888 /* Don't diagnose the error attribute in thunks, those are
11889 artificially created. */
11890 && !CALL_FROM_THUNK_P (exp
)
11891 && (attr
= lookup_attribute ("error",
11892 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11894 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11895 error ("call to %qs declared with attribute error: %s",
11896 identifier_to_locale (ident
),
11897 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11900 /* Don't diagnose the warning attribute in thunks, those are
11901 artificially created. */
11902 && !CALL_FROM_THUNK_P (exp
)
11903 && (attr
= lookup_attribute ("warning",
11904 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11906 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11907 warning_at (EXPR_LOCATION (exp
),
11908 OPT_Wattribute_warning
,
11909 "call to %qs declared with attribute warning: %s",
11910 identifier_to_locale (ident
),
11911 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11914 /* Check for a built-in function. */
11915 if (fndecl
&& fndecl_built_in_p (fndecl
))
11917 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11918 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11921 return expand_call (exp
, target
, ignore
);
11923 case VIEW_CONVERT_EXPR
:
11926 /* If we are converting to BLKmode, try to avoid an intermediate
11927 temporary by fetching an inner memory reference. */
11928 if (mode
== BLKmode
11929 && poly_int_tree_p (TYPE_SIZE (type
))
11930 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11931 && handled_component_p (treeop0
))
11933 machine_mode mode1
;
11934 poly_int64 bitsize
, bitpos
, bytepos
;
11936 int reversep
, volatilep
= 0;
11938 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11939 &unsignedp
, &reversep
, &volatilep
);
11941 /* ??? We should work harder and deal with non-zero offsets. */
11943 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11945 && known_size_p (bitsize
)
11946 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11948 /* See the normal_inner_ref case for the rationale. */
11950 = expand_expr_real (tem
,
11951 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11952 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11954 && modifier
!= EXPAND_STACK_PARM
11955 ? target
: NULL_RTX
),
11957 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11960 if (MEM_P (orig_op0
))
11964 /* Get a reference to just this component. */
11965 if (modifier
== EXPAND_CONST_ADDRESS
11966 || modifier
== EXPAND_SUM
11967 || modifier
== EXPAND_INITIALIZER
)
11968 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11970 op0
= adjust_address (op0
, mode
, bytepos
);
11972 if (op0
== orig_op0
)
11973 op0
= copy_rtx (op0
);
11975 set_mem_attributes (op0
, treeop0
, 0);
11976 if (REG_P (XEXP (op0
, 0)))
11977 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11979 MEM_VOLATILE_P (op0
) |= volatilep
;
11985 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11986 NULL
, inner_reference_p
);
11988 /* If the input and output modes are both the same, we are done. */
11989 if (mode
== GET_MODE (op0
))
11991 /* If neither mode is BLKmode, and both modes are the same size
11992 then we can use gen_lowpart. */
11993 else if (mode
!= BLKmode
11994 && GET_MODE (op0
) != BLKmode
11995 && known_eq (GET_MODE_PRECISION (mode
),
11996 GET_MODE_PRECISION (GET_MODE (op0
)))
11997 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11999 if (GET_CODE (op0
) == SUBREG
)
12000 op0
= force_reg (GET_MODE (op0
), op0
);
12001 temp
= gen_lowpart_common (mode
, op0
);
12006 if (!REG_P (op0
) && !MEM_P (op0
))
12007 op0
= force_reg (GET_MODE (op0
), op0
);
12008 op0
= gen_lowpart (mode
, op0
);
12011 /* If both types are integral, convert from one mode to the other. */
12012 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
12013 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
12014 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
12015 /* If the output type is a bit-field type, do an extraction. */
12016 else if (reduce_bit_field
)
12017 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
12018 TYPE_UNSIGNED (type
), NULL_RTX
,
12019 mode
, mode
, false, NULL
);
12020 /* As a last resort, spill op0 to memory, and reload it in a
12022 else if (!MEM_P (op0
))
12024 /* If the operand is not a MEM, force it into memory. Since we
12025 are going to be changing the mode of the MEM, don't call
12026 force_const_mem for constants because we don't allow pool
12027 constants to change mode. */
12028 tree inner_type
= TREE_TYPE (treeop0
);
12030 gcc_assert (!TREE_ADDRESSABLE (exp
));
12032 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
12034 = assign_stack_temp_for_type
12035 (TYPE_MODE (inner_type
),
12036 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
12038 emit_move_insn (target
, op0
);
12042 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
12043 output type is such that the operand is known to be aligned, indicate
12044 that it is. Otherwise, we need only be concerned about alignment for
12045 non-BLKmode results. */
12048 enum insn_code icode
;
12050 if (modifier
!= EXPAND_WRITE
12051 && modifier
!= EXPAND_MEMORY
12052 && !inner_reference_p
12054 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
12056 /* If the target does have special handling for unaligned
12057 loads of mode then use them. */
12058 if ((icode
= optab_handler (movmisalign_optab
, mode
))
12059 != CODE_FOR_nothing
)
12063 op0
= adjust_address (op0
, mode
, 0);
12064 /* We've already validated the memory, and we're creating a
12065 new pseudo destination. The predicates really can't
12067 reg
= gen_reg_rtx (mode
);
12069 /* Nor can the insn generator. */
12070 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
12074 else if (STRICT_ALIGNMENT
)
12076 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
12077 poly_uint64 temp_size
= mode_size
;
12078 if (GET_MODE (op0
) != BLKmode
)
12079 temp_size
= upper_bound (temp_size
,
12080 GET_MODE_SIZE (GET_MODE (op0
)));
12082 = assign_stack_temp_for_type (mode
, temp_size
, type
);
12083 rtx new_with_op0_mode
12084 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
12086 gcc_assert (!TREE_ADDRESSABLE (exp
));
12088 if (GET_MODE (op0
) == BLKmode
)
12090 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
12091 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
12092 (modifier
== EXPAND_STACK_PARM
12093 ? BLOCK_OP_CALL_PARM
12094 : BLOCK_OP_NORMAL
));
12097 emit_move_insn (new_with_op0_mode
, op0
);
12103 op0
= adjust_address (op0
, mode
, 0);
12110 tree lhs
= treeop0
;
12111 tree rhs
= treeop1
;
12112 gcc_assert (ignore
);
12114 /* Check for |= or &= of a bitfield of size one into another bitfield
12115 of size 1. In this case, (unless we need the result of the
12116 assignment) we can do this more efficiently with a
12117 test followed by an assignment, if necessary.
12119 ??? At this point, we can't get a BIT_FIELD_REF here. But if
12120 things change so we do, this code should be enhanced to
12122 if (TREE_CODE (lhs
) == COMPONENT_REF
12123 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
12124 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
12125 && TREE_OPERAND (rhs
, 0) == lhs
12126 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
12127 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
12128 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
12130 rtx_code_label
*label
= gen_label_rtx ();
12131 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
12132 profile_probability prob
= profile_probability::uninitialized ();
12134 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
12136 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
12137 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
12139 do_pending_stack_adjust ();
12140 emit_label (label
);
12144 expand_assignment (lhs
, rhs
, false);
12149 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
12151 case REALPART_EXPR
:
12152 op0
= expand_normal (treeop0
);
12153 return read_complex_part (op0
, false);
12155 case IMAGPART_EXPR
:
12156 op0
= expand_normal (treeop0
);
12157 return read_complex_part (op0
, true);
12164 /* Expanded in cfgexpand.cc. */
12165 gcc_unreachable ();
12167 case TRY_CATCH_EXPR
:
12169 case EH_FILTER_EXPR
:
12170 case TRY_FINALLY_EXPR
:
12172 /* Lowered by tree-eh.cc. */
12173 gcc_unreachable ();
12175 case WITH_CLEANUP_EXPR
:
12176 case CLEANUP_POINT_EXPR
:
12178 case CASE_LABEL_EXPR
:
12183 case COMPOUND_EXPR
:
12184 case PREINCREMENT_EXPR
:
12185 case PREDECREMENT_EXPR
:
12186 case POSTINCREMENT_EXPR
:
12187 case POSTDECREMENT_EXPR
:
12190 case COMPOUND_LITERAL_EXPR
:
12191 /* Lowered by gimplify.cc. */
12192 gcc_unreachable ();
12195 /* Function descriptors are not valid except for as
12196 initialization constants, and should not be expanded. */
12197 gcc_unreachable ();
12199 case WITH_SIZE_EXPR
:
12200 /* WITH_SIZE_EXPR expands to its first argument. The caller should
12201 have pulled out the size to use in whatever context it needed. */
12202 return expand_expr_real (treeop0
, original_target
, tmode
,
12203 modifier
, alt_rtl
, inner_reference_p
);
12206 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
12209 #undef EXTEND_BITINT
12211 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
12212 signedness of TYPE), possibly returning the result in TARGET.
12213 TYPE is known to be a partial integer type. */
12215 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
12217 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
12218 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
12219 gcc_assert ((GET_MODE (exp
) == VOIDmode
|| GET_MODE (exp
) == mode
)
12220 && (!target
|| GET_MODE (target
) == mode
));
12222 /* For constant values, reduce using wide_int_to_tree. */
12223 if (poly_int_rtx_p (exp
))
12225 auto value
= wi::to_poly_wide (exp
, mode
);
12226 tree t
= wide_int_to_tree (type
, value
);
12227 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
12229 else if (TYPE_UNSIGNED (type
))
12231 rtx mask
= immed_wide_int_const
12232 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
12233 return expand_and (mode
, exp
, mask
, target
);
12237 int count
= GET_MODE_PRECISION (mode
) - prec
;
12238 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
12239 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
12243 /* Subroutine of above: returns true if OFFSET corresponds to an offset that
12244 when applied to the address of EXP produces an address known to be
12245 aligned more than BIGGEST_ALIGNMENT. */
12248 is_aligning_offset (const_tree offset
, const_tree exp
)
12250 /* Strip off any conversions. */
12251 while (CONVERT_EXPR_P (offset
))
12252 offset
= TREE_OPERAND (offset
, 0);
12254 /* We must now have a BIT_AND_EXPR with a constant that is one less than
12255 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
12256 if (TREE_CODE (offset
) != BIT_AND_EXPR
12257 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
12258 || compare_tree_int (TREE_OPERAND (offset
, 1),
12259 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
12260 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
12263 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
12264 It must be NEGATE_EXPR. Then strip any more conversions. */
12265 offset
= TREE_OPERAND (offset
, 0);
12266 while (CONVERT_EXPR_P (offset
))
12267 offset
= TREE_OPERAND (offset
, 0);
12269 if (TREE_CODE (offset
) != NEGATE_EXPR
)
12272 offset
= TREE_OPERAND (offset
, 0);
12273 while (CONVERT_EXPR_P (offset
))
12274 offset
= TREE_OPERAND (offset
, 0);
12276 /* This must now be the address of EXP. */
12277 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
12280 /* Return a STRING_CST corresponding to ARG's constant initializer either
12281 if it's a string constant, or, when VALREP is set, any other constant,
12283 On success, set *PTR_OFFSET to the (possibly non-constant) byte offset
12284 within the byte string that ARG is references. If nonnull set *MEM_SIZE
12285 to the size of the byte string. If nonnull, set *DECL to the constant
12286 declaration ARG refers to. */
12289 constant_byte_string (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
,
12290 bool valrep
= false)
12292 tree dummy
= NULL_TREE
;
12296 /* Store the type of the original expression before conversions
12297 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
12299 tree argtype
= TREE_TYPE (arg
);
12304 /* Non-constant index into the character array in an ARRAY_REF
12305 expression or null. */
12306 tree varidx
= NULL_TREE
;
12308 poly_int64 base_off
= 0;
12310 if (TREE_CODE (arg
) == ADDR_EXPR
)
12312 arg
= TREE_OPERAND (arg
, 0);
12314 if (TREE_CODE (arg
) == ARRAY_REF
)
12316 tree idx
= TREE_OPERAND (arg
, 1);
12317 if (TREE_CODE (idx
) != INTEGER_CST
)
12319 /* From a pointer (but not array) argument extract the variable
12320 index to prevent get_addr_base_and_unit_offset() from failing
12321 due to it. Use it later to compute the non-constant offset
12322 into the string and return it to the caller. */
12324 ref
= TREE_OPERAND (arg
, 0);
12326 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
12329 if (!integer_zerop (array_ref_low_bound (arg
)))
12332 if (!integer_onep (array_ref_element_size (arg
)))
12336 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
12338 || (TREE_CODE (array
) != VAR_DECL
12339 && TREE_CODE (array
) != CONST_DECL
12340 && TREE_CODE (array
) != STRING_CST
))
12343 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
12345 tree arg0
= TREE_OPERAND (arg
, 0);
12346 tree arg1
= TREE_OPERAND (arg
, 1);
12349 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
12352 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
12358 /* Avoid pointers to arrays (see bug 86622). */
12359 if (POINTER_TYPE_P (TREE_TYPE (arg
))
12360 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
12361 && !(decl
&& !*decl
)
12362 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
12363 && tree_fits_uhwi_p (*mem_size
)
12364 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
12367 tree type
= TREE_TYPE (offset
);
12368 arg1
= fold_convert (type
, arg1
);
12369 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
12374 else if (TREE_CODE (arg
) == SSA_NAME
)
12376 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
12377 if (!is_gimple_assign (stmt
))
12380 tree rhs1
= gimple_assign_rhs1 (stmt
);
12381 tree_code code
= gimple_assign_rhs_code (stmt
);
12382 if (code
== ADDR_EXPR
)
12383 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
12384 else if (code
!= POINTER_PLUS_EXPR
)
12388 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
12390 /* Avoid pointers to arrays (see bug 86622). */
12391 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
12392 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
12393 && !(decl
&& !*decl
)
12394 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
12395 && tree_fits_uhwi_p (*mem_size
)
12396 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
12399 tree rhs2
= gimple_assign_rhs2 (stmt
);
12400 tree type
= TREE_TYPE (offset
);
12401 rhs2
= fold_convert (type
, rhs2
);
12402 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
12407 else if (DECL_P (arg
))
12412 tree offset
= wide_int_to_tree (sizetype
, base_off
);
12415 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
12418 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
12419 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
12420 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
12423 offset
= fold_convert (sizetype
, varidx
);
12426 if (TREE_CODE (array
) == STRING_CST
)
12428 *ptr_offset
= fold_convert (sizetype
, offset
);
12429 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
12432 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
12433 >= TREE_STRING_LENGTH (array
));
12437 tree init
= ctor_for_folding (array
);
12438 if (!init
|| init
== error_mark_node
)
12443 HOST_WIDE_INT cstoff
;
12444 if (!base_off
.is_constant (&cstoff
))
12447 /* Check that the host and target are sane. */
12448 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
12451 HOST_WIDE_INT typesz
= int_size_in_bytes (TREE_TYPE (init
));
12452 if (typesz
<= 0 || (int) typesz
!= typesz
)
12455 HOST_WIDE_INT size
= typesz
;
12457 && DECL_SIZE_UNIT (array
)
12458 && tree_fits_shwi_p (DECL_SIZE_UNIT (array
)))
12460 size
= tree_to_shwi (DECL_SIZE_UNIT (array
));
12461 gcc_checking_assert (size
>= typesz
);
12464 /* If value representation was requested convert the initializer
12465 for the whole array or object into a string of bytes forming
12466 its value representation and return it. */
12467 unsigned char *bytes
= XNEWVEC (unsigned char, size
);
12468 int r
= native_encode_initializer (init
, bytes
, size
);
12471 XDELETEVEC (bytes
);
12476 memset (bytes
+ r
, '\0', size
- r
);
12478 const char *p
= reinterpret_cast<const char *>(bytes
);
12479 init
= build_string_literal (size
, p
, char_type_node
);
12480 init
= TREE_OPERAND (init
, 0);
12481 init
= TREE_OPERAND (init
, 0);
12484 *mem_size
= size_int (TREE_STRING_LENGTH (init
));
12485 *ptr_offset
= wide_int_to_tree (ssizetype
, base_off
);
12493 if (TREE_CODE (init
) == CONSTRUCTOR
)
12495 /* Convert the 64-bit constant offset to a wider type to avoid
12496 overflow and use it to obtain the initializer for the subobject
12499 if (!base_off
.is_constant (&wioff
))
12502 wioff
*= BITS_PER_UNIT
;
12503 if (!wi::fits_uhwi_p (wioff
))
12506 base_off
= wioff
.to_uhwi ();
12507 unsigned HOST_WIDE_INT fieldoff
= 0;
12508 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
12510 if (!init
|| init
== error_mark_node
)
12513 HOST_WIDE_INT cstoff
;
12514 if (!base_off
.is_constant (&cstoff
))
12517 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
12518 tree off
= build_int_cst (sizetype
, cstoff
);
12520 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
12525 *ptr_offset
= offset
;
12527 tree inittype
= TREE_TYPE (init
);
12529 if (TREE_CODE (init
) == INTEGER_CST
12530 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
12531 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
12533 /* Check that the host and target are sane. */
12534 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
12537 /* For a reference to (address of) a single constant character,
12538 store the native representation of the character in CHARBUF.
12539 If the reference is to an element of an array or a member
12540 of a struct, only consider narrow characters until ctors
12541 for wide character arrays are transformed to STRING_CSTs
12542 like those for narrow arrays. */
12543 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
12544 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
12547 /* Construct a string literal with elements of INITTYPE and
12548 the representation above. Then strip
12549 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
12550 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
12551 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
12555 tree initsize
= TYPE_SIZE_UNIT (inittype
);
12557 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
12559 /* Fold an empty/zero constructor for an implicitly initialized
12560 object or subobject into the empty string. */
12562 /* Determine the character type from that of the original
12564 tree chartype
= argtype
;
12565 if (POINTER_TYPE_P (chartype
))
12566 chartype
= TREE_TYPE (chartype
);
12567 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
12568 chartype
= TREE_TYPE (chartype
);
12570 if (INTEGRAL_TYPE_P (chartype
)
12571 && TYPE_PRECISION (chartype
) == TYPE_PRECISION (char_type_node
))
12573 /* Convert a char array to an empty STRING_CST having an array
12574 of the expected type and size. */
12576 initsize
= integer_zero_node
;
12578 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
12579 if (size
> (unsigned HOST_WIDE_INT
) INT_MAX
)
12582 init
= build_string_literal (size
, NULL
, chartype
, size
);
12583 init
= TREE_OPERAND (init
, 0);
12584 init
= TREE_OPERAND (init
, 0);
12586 *ptr_offset
= integer_zero_node
;
12593 if (TREE_CODE (init
) != STRING_CST
)
12596 *mem_size
= initsize
;
12598 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
12603 /* Return STRING_CST if an ARG corresponds to a string constant or zero
12604 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
12605 non-constant) offset in bytes within the string that ARG is accessing.
12606 If MEM_SIZE is non-zero the storage size of the memory is returned.
12607 If DECL is non-zero the constant declaration is returned if available. */
12610 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
12612 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, false);
12615 /* Similar to string_constant, return a STRING_CST corresponding
12616 to the value representation of the first argument if it's
12620 byte_representation (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
12622 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, true);
12625 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
12626 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
12627 for C2 > 0 to x & C3 == C2
12628 for C2 < 0 to x & C3 == (C2 & C3). */
12630 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12632 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12633 tree treeop0
= gimple_assign_rhs1 (stmt
);
12634 tree treeop1
= gimple_assign_rhs2 (stmt
);
12635 tree type
= TREE_TYPE (*arg0
);
12636 scalar_int_mode mode
;
12637 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12639 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12640 || TYPE_PRECISION (type
) <= 1
12641 || TYPE_UNSIGNED (type
)
12642 /* Signed x % c == 0 should have been optimized into unsigned modulo
12644 || integer_zerop (*arg1
)
12645 /* If c is known to be non-negative, modulo will be expanded as unsigned
12647 || get_range_pos_neg (treeop0
) == 1)
12650 /* x % c == d where d < 0 && d <= -c should be always false. */
12651 if (tree_int_cst_sgn (*arg1
) == -1
12652 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
12655 int prec
= TYPE_PRECISION (type
);
12656 wide_int w
= wi::to_wide (treeop1
) - 1;
12657 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
12658 tree c3
= wide_int_to_tree (type
, w
);
12660 if (tree_int_cst_sgn (*arg1
) == -1)
12661 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
12663 rtx op0
= expand_normal (treeop0
);
12664 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12666 bool speed_p
= optimize_insn_for_speed_p ();
12668 do_pending_stack_adjust ();
12670 location_t loc
= gimple_location (stmt
);
12671 struct separate_ops ops
;
12672 ops
.code
= TRUNC_MOD_EXPR
;
12673 ops
.location
= loc
;
12674 ops
.type
= TREE_TYPE (treeop0
);
12677 ops
.op2
= NULL_TREE
;
12679 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12681 rtx_insn
*moinsns
= get_insns ();
12684 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12685 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12686 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12688 ops
.code
= BIT_AND_EXPR
;
12689 ops
.location
= loc
;
12690 ops
.type
= TREE_TYPE (treeop0
);
12693 ops
.op2
= NULL_TREE
;
12695 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12697 rtx_insn
*muinsns
= get_insns ();
12700 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12701 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
12702 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
12704 if (mocost
<= mucost
)
12706 emit_insn (moinsns
);
12707 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12711 emit_insn (muinsns
);
12712 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
12717 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
12719 (X - C2) * C3 <= C4 (or >), where
12720 C3 is modular multiplicative inverse of C1 and 1<<prec and
12721 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
12722 if C2 > ((1<<prec) - 1) % C1).
12723 If C1 is even, S = ctz (C1) and C2 is 0, use
12724 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
12725 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
12727 For signed (X % C1) == 0 if C1 is odd to (all operations in it
12729 (X * C3) + C4 <= 2 * C4, where
12730 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
12731 C4 is ((1<<(prec - 1) - 1) / C1).
12732 If C1 is even, S = ctz(C1), use
12733 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
12734 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
12735 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
12737 See the Hacker's Delight book, section 10-17. */
12739 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12741 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
12742 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
12747 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12751 tree treeop0
= gimple_assign_rhs1 (stmt
);
12752 tree treeop1
= gimple_assign_rhs2 (stmt
);
12753 if (TREE_CODE (treeop0
) != SSA_NAME
12754 || TREE_CODE (treeop1
) != INTEGER_CST
12755 /* Don't optimize the undefined behavior case x % 0;
12756 x % 1 should have been optimized into zero, punt if
12757 it makes it here for whatever reason;
12758 x % -c should have been optimized into x % c. */
12759 || compare_tree_int (treeop1
, 2) <= 0
12760 /* Likewise x % c == d where d >= c should be always false. */
12761 || tree_int_cst_le (treeop1
, *arg1
))
12764 /* Unsigned x % pow2 is handled right already, for signed
12765 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
12766 if (integer_pow2p (treeop1
))
12767 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
12769 tree type
= TREE_TYPE (*arg0
);
12770 scalar_int_mode mode
;
12771 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12773 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12774 || TYPE_PRECISION (type
) <= 1)
12777 signop sgn
= UNSIGNED
;
12778 /* If both operands are known to have the sign bit clear, handle
12779 even the signed modulo case as unsigned. treeop1 is always
12780 positive >= 2, checked above. */
12781 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
12784 if (!TYPE_UNSIGNED (type
))
12786 if (tree_int_cst_sgn (*arg1
) == -1)
12788 type
= unsigned_type_for (type
);
12789 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
12793 int prec
= TYPE_PRECISION (type
);
12794 wide_int w
= wi::to_wide (treeop1
);
12795 int shift
= wi::ctz (w
);
12796 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
12797 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
12798 If C1 is odd, we can handle all cases by subtracting
12799 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
12800 e.g. by testing for overflow on the subtraction, punt on that for now
12802 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12806 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12807 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12811 imm_use_iterator imm_iter
;
12812 use_operand_p use_p
;
12813 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12815 gimple
*use_stmt
= USE_STMT (use_p
);
12816 /* Punt if treeop0 is used in the same bb in a division
12817 or another modulo with the same divisor. We should expect
12818 the division and modulo combined together. */
12819 if (use_stmt
== stmt
12820 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12822 if (!is_gimple_assign (use_stmt
)
12823 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12824 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12826 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12827 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12832 w
= wi::lrshift (w
, shift
);
12833 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12834 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12835 wide_int m
= wide_int::from (wi::mod_inv (a
, b
), prec
, UNSIGNED
);
12836 tree c3
= wide_int_to_tree (type
, m
);
12837 tree c5
= NULL_TREE
;
12839 if (sgn
== UNSIGNED
)
12841 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12842 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12843 otherwise use < or subtract one from C4. E.g. for
12844 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12845 x % 3U == 1 already needs to be
12846 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12847 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12850 d
= wi::lrshift (d
, shift
);
12854 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12856 d
= wi::lshift (e
, 1);
12859 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12860 d
= wi::lrshift (e
, shift
- 1);
12862 c5
= wide_int_to_tree (type
, e
);
12864 tree c4
= wide_int_to_tree (type
, d
);
12866 rtx op0
= expand_normal (treeop0
);
12867 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12869 bool speed_p
= optimize_insn_for_speed_p ();
12871 do_pending_stack_adjust ();
12873 location_t loc
= gimple_location (stmt
);
12874 struct separate_ops ops
;
12875 ops
.code
= TRUNC_MOD_EXPR
;
12876 ops
.location
= loc
;
12877 ops
.type
= TREE_TYPE (treeop0
);
12880 ops
.op2
= NULL_TREE
;
12882 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12884 rtx_insn
*moinsns
= get_insns ();
12887 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12888 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12889 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12891 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12892 if (!integer_zerop (*arg1
))
12893 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12894 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12896 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12899 tree s
= build_int_cst (NULL_TREE
, shift
);
12900 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12904 rtx mur
= expand_normal (t
);
12905 rtx_insn
*muinsns
= get_insns ();
12908 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12909 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12910 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12912 if (mocost
<= mucost
)
12914 emit_insn (moinsns
);
12915 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12919 emit_insn (muinsns
);
12920 *arg0
= make_tree (type
, mur
);
12922 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12925 /* Optimize x - y < 0 into x < 0 if x - y has undefined overflow. */
12928 maybe_optimize_sub_cmp_0 (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12930 gcc_checking_assert (code
== GT_EXPR
|| code
== GE_EXPR
12931 || code
== LT_EXPR
|| code
== LE_EXPR
);
12932 gcc_checking_assert (integer_zerop (*arg1
));
12937 gimple
*stmt
= get_def_for_expr (*arg0
, MINUS_EXPR
);
12941 tree treeop0
= gimple_assign_rhs1 (stmt
);
12942 tree treeop1
= gimple_assign_rhs2 (stmt
);
12943 if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (treeop0
)))
12946 if (issue_strict_overflow_warning (WARN_STRICT_OVERFLOW_COMPARISON
))
12947 warning_at (gimple_location (stmt
), OPT_Wstrict_overflow
,
12948 "assuming signed overflow does not occur when "
12949 "simplifying %<X - Y %s 0%> to %<X %s Y%>",
12950 op_symbol_code (code
), op_symbol_code (code
));
12957 /* Expand CODE with arguments INNER & (1<<BITNUM) and 0 that represents
12958 a single bit equality/inequality test, returns where the result is located. */
12961 expand_single_bit_test (location_t loc
, enum tree_code code
,
12962 tree inner
, int bitnum
,
12963 tree result_type
, rtx target
,
12966 gcc_assert (code
== NE_EXPR
|| code
== EQ_EXPR
);
12968 tree type
= TREE_TYPE (inner
);
12969 scalar_int_mode operand_mode
= SCALAR_INT_TYPE_MODE (type
);
12971 tree signed_type
, unsigned_type
, intermediate_type
;
12974 /* First, see if we can fold the single bit test into a sign-bit
12976 if (bitnum
== TYPE_PRECISION (type
) - 1
12977 && type_has_mode_precision_p (type
))
12979 tree stype
= signed_type_for (type
);
12980 tree tmp
= fold_build2_loc (loc
, code
== EQ_EXPR
? GE_EXPR
: LT_EXPR
,
12982 fold_convert_loc (loc
, stype
, inner
),
12983 build_int_cst (stype
, 0));
12984 return expand_expr (tmp
, target
, VOIDmode
, EXPAND_NORMAL
);
12987 /* Otherwise we have (A & C) != 0 where C is a single bit,
12988 convert that into ((A >> C2) & 1). Where C2 = log2(C).
12989 Similarly for (A & C) == 0. */
12991 /* If INNER is a right shift of a constant and it plus BITNUM does
12992 not overflow, adjust BITNUM and INNER. */
12993 if ((inner_def
= get_def_for_expr (inner
, RSHIFT_EXPR
))
12994 && TREE_CODE (gimple_assign_rhs2 (inner_def
)) == INTEGER_CST
12995 && bitnum
< TYPE_PRECISION (type
)
12996 && wi::ltu_p (wi::to_wide (gimple_assign_rhs2 (inner_def
)),
12997 TYPE_PRECISION (type
) - bitnum
))
12999 bitnum
+= tree_to_uhwi (gimple_assign_rhs2 (inner_def
));
13000 inner
= gimple_assign_rhs1 (inner_def
);
13003 /* If we are going to be able to omit the AND below, we must do our
13004 operations as unsigned. If we must use the AND, we have a choice.
13005 Normally unsigned is faster, but for some machines signed is. */
13006 ops_unsigned
= (load_extend_op (operand_mode
) == SIGN_EXTEND
13007 && !flag_syntax_only
) ? 0 : 1;
13009 signed_type
= lang_hooks
.types
.type_for_mode (operand_mode
, 0);
13010 unsigned_type
= lang_hooks
.types
.type_for_mode (operand_mode
, 1);
13011 intermediate_type
= ops_unsigned
? unsigned_type
: signed_type
;
13012 inner
= fold_convert_loc (loc
, intermediate_type
, inner
);
13014 rtx inner0
= expand_expr (inner
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
13016 if (CONST_SCALAR_INT_P (inner0
))
13018 wide_int t
= rtx_mode_t (inner0
, operand_mode
);
13019 bool setp
= (wi::lrshift (t
, bitnum
) & 1) != 0;
13020 return (setp
^ (code
== EQ_EXPR
)) ? const1_rtx
: const0_rtx
;
13022 int bitpos
= bitnum
;
13024 if (BYTES_BIG_ENDIAN
)
13025 bitpos
= GET_MODE_BITSIZE (operand_mode
) - 1 - bitpos
;
13027 inner0
= extract_bit_field (inner0
, 1, bitpos
, 1, target
,
13028 operand_mode
, mode
, 0, NULL
);
13030 if (code
== EQ_EXPR
)
13031 inner0
= expand_binop (GET_MODE (inner0
), xor_optab
, inner0
, const1_rtx
,
13032 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
13033 if (GET_MODE (inner0
) != mode
)
13035 rtx t
= gen_reg_rtx (mode
);
13036 convert_move (t
, inner0
, 0);
13042 /* Generate code to calculate OPS, and exploded expression
13043 using a store-flag instruction and return an rtx for the result.
13044 OPS reflects a comparison.
13046 If TARGET is nonzero, store the result there if convenient.
13048 Return zero if there is no suitable set-flag instruction
13049 available on this machine.
13051 Once expand_expr has been called on the arguments of the comparison,
13052 we are committed to doing the store flag, since it is not safe to
13053 re-evaluate the expression. We emit the store-flag insn by calling
13054 emit_store_flag, but only expand the arguments if we have a reason
13055 to believe that emit_store_flag will be successful. If we think that
13056 it will, but it isn't, we have to simulate the store-flag with a
13057 set/jump/set sequence. */
13060 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
13062 enum rtx_code code
;
13063 tree arg0
, arg1
, type
;
13064 machine_mode operand_mode
;
13067 rtx subtarget
= target
;
13068 location_t loc
= ops
->location
;
13073 /* Don't crash if the comparison was erroneous. */
13074 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
13077 type
= TREE_TYPE (arg0
);
13078 operand_mode
= TYPE_MODE (type
);
13079 unsignedp
= TYPE_UNSIGNED (type
);
13081 /* We won't bother with BLKmode store-flag operations because it would mean
13082 passing a lot of information to emit_store_flag. */
13083 if (operand_mode
== BLKmode
)
13086 /* We won't bother with store-flag operations involving function pointers
13087 when function pointers must be canonicalized before comparisons. */
13088 if (targetm
.have_canonicalize_funcptr_for_compare ()
13089 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
13090 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
13091 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
13092 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
13098 /* For vector typed comparisons emit code to generate the desired
13099 all-ones or all-zeros mask. */
13100 if (VECTOR_TYPE_P (ops
->type
))
13102 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
13103 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
13104 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
13105 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
13107 gcc_unreachable ();
13110 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
13111 into (x - C2) * C3 < C4. */
13112 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
13113 && TREE_CODE (arg0
) == SSA_NAME
13114 && TREE_CODE (arg1
) == INTEGER_CST
)
13116 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
13118 if (new_code
!= ops
->code
)
13120 struct separate_ops nops
= *ops
;
13121 nops
.code
= ops
->code
= new_code
;
13124 nops
.type
= TREE_TYPE (arg0
);
13125 return do_store_flag (&nops
, target
, mode
);
13129 /* Optimize (x - y) < 0 into x < y if x - y has undefined overflow. */
13131 && (ops
->code
== LT_EXPR
|| ops
->code
== LE_EXPR
13132 || ops
->code
== GT_EXPR
|| ops
->code
== GE_EXPR
)
13133 && integer_zerop (arg1
)
13134 && TREE_CODE (arg0
) == SSA_NAME
)
13135 maybe_optimize_sub_cmp_0 (ops
->code
, &arg0
, &arg1
);
13137 /* Get the rtx comparison code to use. We know that EXP is a comparison
13138 operation of some type. Some comparisons against 1 and -1 can be
13139 converted to comparisons with zero. Do so here so that the tests
13140 below will be aware that we have a comparison with zero. These
13141 tests will not catch constants in the first operand, but constants
13142 are rarely passed as the first operand. */
13153 if (integer_onep (arg1
))
13154 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
13156 code
= unsignedp
? LTU
: LT
;
13159 if (! unsignedp
&& integer_all_onesp (arg1
))
13160 arg1
= integer_zero_node
, code
= LT
;
13162 code
= unsignedp
? LEU
: LE
;
13165 if (! unsignedp
&& integer_all_onesp (arg1
))
13166 arg1
= integer_zero_node
, code
= GE
;
13168 code
= unsignedp
? GTU
: GT
;
13171 if (integer_onep (arg1
))
13172 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
13174 code
= unsignedp
? GEU
: GE
;
13177 case UNORDERED_EXPR
:
13203 gcc_unreachable ();
13206 /* Put a constant second. */
13207 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
13208 || TREE_CODE (arg0
) == FIXED_CST
)
13210 std::swap (arg0
, arg1
);
13211 code
= swap_condition (code
);
13214 /* If this is an equality or inequality test of a single bit, we can
13215 do this by shifting the bit being tested to the low-order bit and
13216 masking the result with the constant 1. If the condition was EQ,
13217 we xor it with 1. This does not require an scc insn and is faster
13218 than an scc insn even if we have it. */
13220 if ((code
== NE
|| code
== EQ
)
13221 && (integer_zerop (arg1
)
13222 || integer_pow2p (arg1
))
13223 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
13225 wide_int nz
= tree_nonzero_bits (arg0
);
13226 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
13227 /* If the defining statement was (x & POW2), then use that instead of
13228 the non-zero bits. */
13229 if (srcstmt
&& integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
13231 nz
= wi::to_wide (gimple_assign_rhs2 (srcstmt
));
13232 arg0
= gimple_assign_rhs1 (srcstmt
);
13235 if (wi::popcount (nz
) == 1
13236 && (integer_zerop (arg1
)
13237 || wi::to_wide (arg1
) == nz
))
13239 int bitnum
= wi::exact_log2 (nz
);
13240 enum tree_code tcode
= EQ_EXPR
;
13241 if ((code
== NE
) ^ !integer_zerop (arg1
))
13244 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
13245 return expand_single_bit_test (loc
, tcode
,
13247 bitnum
, type
, target
, mode
);
13252 if (! get_subtarget (target
)
13253 || GET_MODE (subtarget
) != operand_mode
)
13256 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
13259 target
= gen_reg_rtx (mode
);
13261 /* Try a cstore if possible. */
13262 return emit_store_flag_force (target
, code
, op0
, op1
,
13263 operand_mode
, unsignedp
,
13264 (TYPE_PRECISION (ops
->type
) == 1
13265 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
13268 /* Attempt to generate a casesi instruction. Returns true if successful,
13269 false otherwise (i.e. if there is no casesi instruction).
13271 DEFAULT_PROBABILITY is the probability of jumping to the default
13274 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
13275 rtx table_label
, rtx default_label
, rtx fallback_label
,
13276 profile_probability default_probability
)
13278 class expand_operand ops
[5];
13279 scalar_int_mode index_mode
= SImode
;
13280 rtx op1
, op2
, index
;
13282 if (! targetm
.have_casesi ())
13285 /* The index must be some form of integer. Convert it to SImode. */
13286 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
13287 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
13289 rtx rangertx
= expand_normal (range
);
13291 /* We must handle the endpoints in the original mode. */
13292 index_expr
= build2 (MINUS_EXPR
, index_type
,
13293 index_expr
, minval
);
13294 minval
= integer_zero_node
;
13295 index
= expand_normal (index_expr
);
13297 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
13298 omode
, 1, default_label
,
13299 default_probability
);
13300 /* Now we can safely truncate. */
13301 index
= convert_to_mode (index_mode
, index
, 0);
13305 if (omode
!= index_mode
)
13307 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
13308 index_expr
= fold_convert (index_type
, index_expr
);
13311 index
= expand_normal (index_expr
);
13314 do_pending_stack_adjust ();
13316 op1
= expand_normal (minval
);
13317 op2
= expand_normal (range
);
13319 create_input_operand (&ops
[0], index
, index_mode
);
13320 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
13321 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
13322 create_fixed_operand (&ops
[3], table_label
);
13323 create_fixed_operand (&ops
[4], (default_label
13325 : fallback_label
));
13326 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
13330 /* Attempt to generate a tablejump instruction; same concept. */
13331 /* Subroutine of the next function.
13333 INDEX is the value being switched on, with the lowest value
13334 in the table already subtracted.
13335 MODE is its expected mode (needed if INDEX is constant).
13336 RANGE is the length of the jump table.
13337 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
13339 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
13340 index value is out of range.
13341 DEFAULT_PROBABILITY is the probability of jumping to
13342 the default label. */
13345 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
13346 rtx default_label
, profile_probability default_probability
)
13350 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
13351 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
13353 /* Do an unsigned comparison (in the proper mode) between the index
13354 expression and the value which represents the length of the range.
13355 Since we just finished subtracting the lower bound of the range
13356 from the index expression, this comparison allows us to simultaneously
13357 check that the original index expression value is both greater than
13358 or equal to the minimum value of the range and less than or equal to
13359 the maximum value of the range. */
13362 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
13363 default_label
, default_probability
);
13365 /* If index is in range, it must fit in Pmode.
13366 Convert to Pmode so we can index with it. */
13369 unsigned int width
;
13371 /* We know the value of INDEX is between 0 and RANGE. If we have a
13372 sign-extended subreg, and RANGE does not have the sign bit set, then
13373 we have a value that is valid for both sign and zero extension. In
13374 this case, we get better code if we sign extend. */
13375 if (GET_CODE (index
) == SUBREG
13376 && SUBREG_PROMOTED_VAR_P (index
)
13377 && SUBREG_PROMOTED_SIGNED_P (index
)
13378 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
13379 <= HOST_BITS_PER_WIDE_INT
)
13380 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
13381 index
= convert_to_mode (Pmode
, index
, 0);
13383 index
= convert_to_mode (Pmode
, index
, 1);
13386 /* Don't let a MEM slip through, because then INDEX that comes
13387 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
13388 and break_out_memory_refs will go to work on it and mess it up. */
13389 #ifdef PIC_CASE_VECTOR_ADDRESS
13390 if (flag_pic
&& !REG_P (index
))
13391 index
= copy_to_mode_reg (Pmode
, index
);
13394 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
13395 GET_MODE_SIZE, because this indicates how large insns are. The other
13396 uses should all be Pmode, because they are addresses. This code
13397 could fail if addresses and insns are not the same size. */
13398 index
= simplify_gen_binary (MULT
, Pmode
, index
,
13399 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
13401 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
13402 gen_rtx_LABEL_REF (Pmode
, table_label
));
13404 #ifdef PIC_CASE_VECTOR_ADDRESS
13406 index
= PIC_CASE_VECTOR_ADDRESS (index
);
13409 index
= memory_address (CASE_VECTOR_MODE
, index
);
13410 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
13411 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
13412 convert_move (temp
, vector
, 0);
13414 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
13416 /* If we are generating PIC code or if the table is PC-relative, the
13417 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
13418 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
13423 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
13424 rtx table_label
, rtx default_label
,
13425 profile_probability default_probability
)
13429 if (! targetm
.have_tablejump ())
13432 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
13433 fold_convert (index_type
, index_expr
),
13434 fold_convert (index_type
, minval
));
13435 index
= expand_normal (index_expr
);
13436 do_pending_stack_adjust ();
13438 do_tablejump (index
, TYPE_MODE (index_type
),
13439 convert_modes (TYPE_MODE (index_type
),
13440 TYPE_MODE (TREE_TYPE (range
)),
13441 expand_normal (range
),
13442 TYPE_UNSIGNED (TREE_TYPE (range
))),
13443 table_label
, default_label
, default_probability
);
13447 /* Return a CONST_VECTOR rtx representing vector mask for
13448 a VECTOR_CST of booleans. */
13450 const_vector_mask_from_tree (tree exp
)
13452 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
13453 machine_mode inner
= GET_MODE_INNER (mode
);
13455 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
13456 VECTOR_CST_NELTS_PER_PATTERN (exp
));
13457 unsigned int count
= builder
.encoded_nelts ();
13458 for (unsigned int i
= 0; i
< count
; ++i
)
13460 tree elt
= VECTOR_CST_ELT (exp
, i
);
13461 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
13462 if (integer_zerop (elt
))
13463 builder
.quick_push (CONST0_RTX (inner
));
13464 else if (integer_onep (elt
)
13465 || integer_minus_onep (elt
))
13466 builder
.quick_push (CONSTM1_RTX (inner
));
13468 gcc_unreachable ();
13470 return builder
.build ();
13473 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
13475 const_vector_from_tree (tree exp
)
13477 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
13479 if (initializer_zerop (exp
))
13480 return CONST0_RTX (mode
);
13482 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
13483 return const_vector_mask_from_tree (exp
);
13485 machine_mode inner
= GET_MODE_INNER (mode
);
13487 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
13488 VECTOR_CST_NELTS_PER_PATTERN (exp
));
13489 unsigned int count
= builder
.encoded_nelts ();
13490 for (unsigned int i
= 0; i
< count
; ++i
)
13492 tree elt
= VECTOR_CST_ELT (exp
, i
);
13493 if (TREE_CODE (elt
) == REAL_CST
)
13494 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
13496 else if (TREE_CODE (elt
) == FIXED_CST
)
13497 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
13500 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
13503 return builder
.build ();
13506 /* Build a decl for a personality function given a language prefix. */
13509 build_personality_function (const char *lang
)
13511 const char *unwind_and_version
;
13515 switch (targetm_common
.except_unwind_info (&global_options
))
13520 unwind_and_version
= "_sj0";
13524 unwind_and_version
= "_v0";
13527 unwind_and_version
= "_seh0";
13530 gcc_unreachable ();
13533 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
13535 type
= build_function_type_list (unsigned_type_node
,
13536 integer_type_node
, integer_type_node
,
13537 long_long_unsigned_type_node
,
13538 ptr_type_node
, ptr_type_node
, NULL_TREE
);
13539 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
13540 get_identifier (name
), type
);
13541 DECL_ARTIFICIAL (decl
) = 1;
13542 DECL_EXTERNAL (decl
) = 1;
13543 TREE_PUBLIC (decl
) = 1;
13545 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
13546 are the flags assigned by targetm.encode_section_info. */
13547 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
13552 /* Extracts the personality function of DECL and returns the corresponding
13556 get_personality_function (tree decl
)
13558 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
13559 enum eh_personality_kind pk
;
13561 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
13562 if (pk
== eh_personality_none
)
13566 && pk
== eh_personality_any
)
13567 personality
= lang_hooks
.eh_personality ();
13569 if (pk
== eh_personality_lang
)
13570 gcc_assert (personality
!= NULL_TREE
);
13572 return XEXP (DECL_RTL (personality
), 0);
13575 /* Returns a tree for the size of EXP in bytes. */
13578 tree_expr_size (const_tree exp
)
13581 && DECL_SIZE_UNIT (exp
) != 0)
13582 return DECL_SIZE_UNIT (exp
);
13584 return size_in_bytes (TREE_TYPE (exp
));
13587 /* Return an rtx for the size in bytes of the value of EXP. */
13590 expr_size (tree exp
)
13594 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
13595 size
= TREE_OPERAND (exp
, 1);
13598 size
= tree_expr_size (exp
);
13600 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
13603 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
13606 /* Return a wide integer for the size in bytes of the value of EXP, or -1
13607 if the size can vary or is larger than an integer. */
13610 int_expr_size (const_tree exp
)
13614 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
13615 size
= TREE_OPERAND (exp
, 1);
13618 size
= tree_expr_size (exp
);
13622 if (size
== 0 || !tree_fits_shwi_p (size
))
13625 return tree_to_shwi (size
);