1 /* Analyze RTL for C-Compiler
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
40 /* Forward declarations */
41 static int global_reg_mentioned_p_1 (rtx
*, void *);
42 static void set_of_1 (rtx
, rtx
, void *);
43 static bool covers_regno_p (rtx
, unsigned int);
44 static bool covers_regno_no_parallel_p (rtx
, unsigned int);
45 static int rtx_referenced_p_1 (rtx
*, void *);
46 static int computed_jump_p_1 (rtx
);
47 static void parms_set (rtx
, rtx
, void *);
49 static unsigned HOST_WIDE_INT
cached_nonzero_bits (rtx
, enum machine_mode
,
50 rtx
, enum machine_mode
,
51 unsigned HOST_WIDE_INT
);
52 static unsigned HOST_WIDE_INT
nonzero_bits1 (rtx
, enum machine_mode
, rtx
,
54 unsigned HOST_WIDE_INT
);
55 static unsigned int cached_num_sign_bit_copies (rtx
, enum machine_mode
, rtx
,
58 static unsigned int num_sign_bit_copies1 (rtx
, enum machine_mode
, rtx
,
59 enum machine_mode
, unsigned int);
61 /* Bit flags that specify the machine subtype we are compiling for.
62 Bits are tested using macros TARGET_... defined in the tm.h file
63 and set by `-m...' switches. Must be defined in rtlanal.c. */
67 /* Return 1 if the value of X is unstable
68 (would be different at a different point in the program).
69 The frame pointer, arg pointer, etc. are considered stable
70 (within one function) and so is anything marked `unchanging'. */
73 rtx_unstable_p (rtx x
)
75 RTX_CODE code
= GET_CODE (x
);
82 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
93 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
94 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
95 /* The arg pointer varies if it is not a fixed register. */
96 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
98 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
99 /* ??? When call-clobbered, the value is stable modulo the restore
100 that must happen after a call. This currently screws up local-alloc
101 into believing that the restore is not needed. */
102 if (x
== pic_offset_table_rtx
)
108 if (MEM_VOLATILE_P (x
))
117 fmt
= GET_RTX_FORMAT (code
);
118 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
121 if (rtx_unstable_p (XEXP (x
, i
)))
124 else if (fmt
[i
] == 'E')
127 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
128 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
135 /* Return 1 if X has a value that can vary even between two
136 executions of the program. 0 means X can be compared reliably
137 against certain constants or near-constants.
138 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
139 zero, we are slightly more conservative.
140 The frame pointer and the arg pointer are considered constant. */
143 rtx_varies_p (rtx x
, int for_alias
)
156 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
167 /* Note that we have to test for the actual rtx used for the frame
168 and arg pointers and not just the register number in case we have
169 eliminated the frame and/or arg pointer and are using it
171 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
172 /* The arg pointer varies if it is not a fixed register. */
173 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
175 if (x
== pic_offset_table_rtx
176 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
177 /* ??? When call-clobbered, the value is stable modulo the restore
178 that must happen after a call. This currently screws up
179 local-alloc into believing that the restore is not needed, so we
180 must return 0 only if we are called from alias analysis. */
188 /* The operand 0 of a LO_SUM is considered constant
189 (in fact it is related specifically to operand 1)
190 during alias analysis. */
191 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
192 || rtx_varies_p (XEXP (x
, 1), for_alias
);
195 if (MEM_VOLATILE_P (x
))
204 fmt
= GET_RTX_FORMAT (code
);
205 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
208 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
211 else if (fmt
[i
] == 'E')
214 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
215 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
222 /* Return 0 if the use of X as an address in a MEM can cause a trap. */
225 rtx_addr_can_trap_p (rtx x
)
227 enum rtx_code code
= GET_CODE (x
);
232 return SYMBOL_REF_WEAK (x
);
238 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
239 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
240 || x
== stack_pointer_rtx
241 /* The arg pointer varies if it is not a fixed register. */
242 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
244 /* All of the virtual frame registers are stack references. */
245 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
246 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
251 return rtx_addr_can_trap_p (XEXP (x
, 0));
254 /* An address is assumed not to trap if it is an address that can't
255 trap plus a constant integer or it is the pic register plus a
257 return ! ((! rtx_addr_can_trap_p (XEXP (x
, 0))
258 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
259 || (XEXP (x
, 0) == pic_offset_table_rtx
260 && CONSTANT_P (XEXP (x
, 1))));
264 return rtx_addr_can_trap_p (XEXP (x
, 1));
271 return rtx_addr_can_trap_p (XEXP (x
, 0));
277 /* If it isn't one of the case above, it can cause a trap. */
281 /* Return true if X is an address that is known to not be zero. */
284 nonzero_address_p (rtx x
)
286 enum rtx_code code
= GET_CODE (x
);
291 return !SYMBOL_REF_WEAK (x
);
297 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
298 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
299 || x
== stack_pointer_rtx
300 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
302 /* All of the virtual frame registers are stack references. */
303 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
304 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
309 return nonzero_address_p (XEXP (x
, 0));
312 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
314 /* Pointers aren't allowed to wrap. If we've got a register
315 that is known to be a pointer, and a positive offset, then
316 the composite can't be zero. */
317 if (INTVAL (XEXP (x
, 1)) > 0
318 && REG_P (XEXP (x
, 0))
319 && REG_POINTER (XEXP (x
, 0)))
322 return nonzero_address_p (XEXP (x
, 0));
324 /* Handle PIC references. */
325 else if (XEXP (x
, 0) == pic_offset_table_rtx
326 && CONSTANT_P (XEXP (x
, 1)))
331 /* Similar to the above; allow positive offsets. Further, since
332 auto-inc is only allowed in memories, the register must be a
334 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
335 && INTVAL (XEXP (x
, 1)) > 0)
337 return nonzero_address_p (XEXP (x
, 0));
340 /* Similarly. Further, the offset is always positive. */
347 return nonzero_address_p (XEXP (x
, 0));
350 return nonzero_address_p (XEXP (x
, 1));
356 /* If it isn't one of the case above, might be zero. */
360 /* Return 1 if X refers to a memory location whose address
361 cannot be compared reliably with constant addresses,
362 or if X refers to a BLKmode memory object.
363 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
364 zero, we are slightly more conservative. */
367 rtx_addr_varies_p (rtx x
, int for_alias
)
378 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
380 fmt
= GET_RTX_FORMAT (code
);
381 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
384 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
387 else if (fmt
[i
] == 'E')
390 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
391 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
397 /* Return the value of the integer term in X, if one is apparent;
399 Only obvious integer terms are detected.
400 This is used in cse.c with the `related_value' field. */
403 get_integer_term (rtx x
)
405 if (GET_CODE (x
) == CONST
)
408 if (GET_CODE (x
) == MINUS
409 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
410 return - INTVAL (XEXP (x
, 1));
411 if (GET_CODE (x
) == PLUS
412 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
413 return INTVAL (XEXP (x
, 1));
417 /* If X is a constant, return the value sans apparent integer term;
419 Only obvious integer terms are detected. */
422 get_related_value (rtx x
)
424 if (GET_CODE (x
) != CONST
)
427 if (GET_CODE (x
) == PLUS
428 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
430 else if (GET_CODE (x
) == MINUS
431 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
436 /* A subroutine of global_reg_mentioned_p, returns 1 if *LOC mentions
437 a global register. */
440 global_reg_mentioned_p_1 (rtx
*loc
, void *data ATTRIBUTE_UNUSED
)
448 switch (GET_CODE (x
))
451 if (REG_P (SUBREG_REG (x
)))
453 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
454 && global_regs
[subreg_regno (x
)])
462 if (regno
< FIRST_PSEUDO_REGISTER
&& global_regs
[regno
])
476 /* A non-constant call might use a global register. */
486 /* Returns nonzero if X mentions a global register. */
489 global_reg_mentioned_p (rtx x
)
495 if (! CONST_OR_PURE_CALL_P (x
))
497 x
= CALL_INSN_FUNCTION_USAGE (x
);
505 return for_each_rtx (&x
, global_reg_mentioned_p_1
, NULL
);
508 /* Return the number of places FIND appears within X. If COUNT_DEST is
509 zero, we do not count occurrences inside the destination of a SET. */
512 count_occurrences (rtx x
, rtx find
, int count_dest
)
516 const char *format_ptr
;
537 if (MEM_P (find
) && rtx_equal_p (x
, find
))
542 if (SET_DEST (x
) == find
&& ! count_dest
)
543 return count_occurrences (SET_SRC (x
), find
, count_dest
);
550 format_ptr
= GET_RTX_FORMAT (code
);
553 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
555 switch (*format_ptr
++)
558 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
562 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
563 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
570 /* Nonzero if register REG appears somewhere within IN.
571 Also works if REG is not a register; in this case it checks
572 for a subexpression of IN that is Lisp "equal" to REG. */
575 reg_mentioned_p (rtx reg
, rtx in
)
587 if (GET_CODE (in
) == LABEL_REF
)
588 return reg
== XEXP (in
, 0);
590 code
= GET_CODE (in
);
594 /* Compare registers by number. */
596 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
598 /* These codes have no constituent expressions
608 /* These are kept unique for a given value. */
615 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
618 fmt
= GET_RTX_FORMAT (code
);
620 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
625 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
626 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
629 else if (fmt
[i
] == 'e'
630 && reg_mentioned_p (reg
, XEXP (in
, i
)))
636 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
637 no CODE_LABEL insn. */
640 no_labels_between_p (rtx beg
, rtx end
)
645 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
651 /* Nonzero if register REG is used in an insn between
652 FROM_INSN and TO_INSN (exclusive of those two). */
655 reg_used_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
659 if (from_insn
== to_insn
)
662 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
664 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
666 && (find_reg_fusage (insn
, USE
, reg
)
667 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
672 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
673 is entirely replaced by a new value and the only use is as a SET_DEST,
674 we do not consider it a reference. */
677 reg_referenced_p (rtx x
, rtx body
)
681 switch (GET_CODE (body
))
684 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
687 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
688 of a REG that occupies all of the REG, the insn references X if
689 it is mentioned in the destination. */
690 if (GET_CODE (SET_DEST (body
)) != CC0
691 && GET_CODE (SET_DEST (body
)) != PC
692 && !REG_P (SET_DEST (body
))
693 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
694 && REG_P (SUBREG_REG (SET_DEST (body
)))
695 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
696 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
697 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
698 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
699 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
704 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
705 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
712 return reg_overlap_mentioned_p (x
, body
);
715 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
718 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
721 case UNSPEC_VOLATILE
:
722 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
723 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
728 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
729 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
734 if (MEM_P (XEXP (body
, 0)))
735 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
740 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
742 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
749 /* Nonzero if register REG is set or clobbered in an insn between
750 FROM_INSN and TO_INSN (exclusive of those two). */
753 reg_set_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
757 if (from_insn
== to_insn
)
760 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
761 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
766 /* Internals of reg_set_between_p. */
768 reg_set_p (rtx reg
, rtx insn
)
770 /* We can be passed an insn or part of one. If we are passed an insn,
771 check if a side-effect of the insn clobbers REG. */
773 && (FIND_REG_INC_NOTE (insn
, reg
)
776 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
777 && TEST_HARD_REG_BIT (regs_invalidated_by_call
,
780 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
783 return set_of (reg
, insn
) != NULL_RTX
;
786 /* Similar to reg_set_between_p, but check all registers in X. Return 0
787 only if none of them are modified between START and END. Return 1 if
788 X contains a MEM; this routine does usememory aliasing. */
791 modified_between_p (rtx x
, rtx start
, rtx end
)
793 enum rtx_code code
= GET_CODE (x
);
816 if (MEM_READONLY_P (x
))
818 if (modified_between_p (XEXP (x
, 0), start
, end
))
820 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
821 if (memory_modified_in_insn_p (x
, insn
))
827 return reg_set_between_p (x
, start
, end
);
833 fmt
= GET_RTX_FORMAT (code
);
834 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
836 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
839 else if (fmt
[i
] == 'E')
840 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
841 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
848 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
849 of them are modified in INSN. Return 1 if X contains a MEM; this routine
850 does use memory aliasing. */
853 modified_in_p (rtx x
, rtx insn
)
855 enum rtx_code code
= GET_CODE (x
);
874 if (MEM_READONLY_P (x
))
876 if (modified_in_p (XEXP (x
, 0), insn
))
878 if (memory_modified_in_insn_p (x
, insn
))
884 return reg_set_p (x
, insn
);
890 fmt
= GET_RTX_FORMAT (code
);
891 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
893 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
896 else if (fmt
[i
] == 'E')
897 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
898 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
905 /* Helper function for set_of. */
913 set_of_1 (rtx x
, rtx pat
, void *data1
)
915 struct set_of_data
*data
= (struct set_of_data
*) (data1
);
916 if (rtx_equal_p (x
, data
->pat
)
917 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
921 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
922 (either directly or via STRICT_LOW_PART and similar modifiers). */
924 set_of (rtx pat
, rtx insn
)
926 struct set_of_data data
;
927 data
.found
= NULL_RTX
;
929 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
933 /* Given an INSN, return a SET expression if this insn has only a single SET.
934 It may also have CLOBBERs, USEs, or SET whose output
935 will not be used, which we ignore. */
938 single_set_2 (rtx insn
, rtx pat
)
941 int set_verified
= 1;
944 if (GET_CODE (pat
) == PARALLEL
)
946 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
948 rtx sub
= XVECEXP (pat
, 0, i
);
949 switch (GET_CODE (sub
))
956 /* We can consider insns having multiple sets, where all
957 but one are dead as single set insns. In common case
958 only single set is present in the pattern so we want
959 to avoid checking for REG_UNUSED notes unless necessary.
961 When we reach set first time, we just expect this is
962 the single set we are looking for and only when more
963 sets are found in the insn, we check them. */
966 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
967 && !side_effects_p (set
))
973 set
= sub
, set_verified
= 0;
974 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
975 || side_effects_p (sub
))
987 /* Given an INSN, return nonzero if it has more than one SET, else return
991 multiple_sets (rtx insn
)
996 /* INSN must be an insn. */
1000 /* Only a PARALLEL can have multiple SETs. */
1001 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1003 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1004 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1006 /* If we have already found a SET, then return now. */
1014 /* Either zero or one SET. */
1018 /* Return nonzero if the destination of SET equals the source
1019 and there are no side effects. */
1022 set_noop_p (rtx set
)
1024 rtx src
= SET_SRC (set
);
1025 rtx dst
= SET_DEST (set
);
1027 if (dst
== pc_rtx
&& src
== pc_rtx
)
1030 if (MEM_P (dst
) && MEM_P (src
))
1031 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1033 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1034 return rtx_equal_p (XEXP (dst
, 0), src
)
1035 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1036 && !side_effects_p (src
);
1038 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1039 dst
= XEXP (dst
, 0);
1041 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1043 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1045 src
= SUBREG_REG (src
);
1046 dst
= SUBREG_REG (dst
);
1049 return (REG_P (src
) && REG_P (dst
)
1050 && REGNO (src
) == REGNO (dst
));
1053 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1057 noop_move_p (rtx insn
)
1059 rtx pat
= PATTERN (insn
);
1061 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1064 /* Insns carrying these notes are useful later on. */
1065 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1068 /* For now treat an insn with a REG_RETVAL note as a
1069 a special insn which should not be considered a no-op. */
1070 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
1073 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1076 if (GET_CODE (pat
) == PARALLEL
)
1079 /* If nothing but SETs of registers to themselves,
1080 this insn can also be deleted. */
1081 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1083 rtx tem
= XVECEXP (pat
, 0, i
);
1085 if (GET_CODE (tem
) == USE
1086 || GET_CODE (tem
) == CLOBBER
)
1089 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1099 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1100 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1101 If the object was modified, if we hit a partial assignment to X, or hit a
1102 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1103 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1107 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1111 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1115 rtx set
= single_set (p
);
1116 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1118 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1120 rtx src
= SET_SRC (set
);
1122 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1123 src
= XEXP (note
, 0);
1125 if ((valid_to
== NULL_RTX
1126 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1127 /* Reject hard registers because we don't usually want
1128 to use them; we'd rather use a pseudo. */
1130 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1137 /* If set in non-simple way, we don't have a value. */
1138 if (reg_set_p (x
, p
))
1145 /* Return nonzero if register in range [REGNO, ENDREGNO)
1146 appears either explicitly or implicitly in X
1147 other than being stored into.
1149 References contained within the substructure at LOC do not count.
1150 LOC may be zero, meaning don't ignore anything. */
1153 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, rtx x
,
1157 unsigned int x_regno
;
1162 /* The contents of a REG_NONNEG note is always zero, so we must come here
1163 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1167 code
= GET_CODE (x
);
1172 x_regno
= REGNO (x
);
1174 /* If we modifying the stack, frame, or argument pointer, it will
1175 clobber a virtual register. In fact, we could be more precise,
1176 but it isn't worth it. */
1177 if ((x_regno
== STACK_POINTER_REGNUM
1178 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1179 || x_regno
== ARG_POINTER_REGNUM
1181 || x_regno
== FRAME_POINTER_REGNUM
)
1182 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1185 return (endregno
> x_regno
1186 && regno
< x_regno
+ (x_regno
< FIRST_PSEUDO_REGISTER
1187 ? hard_regno_nregs
[x_regno
][GET_MODE (x
)]
1191 /* If this is a SUBREG of a hard reg, we can see exactly which
1192 registers are being modified. Otherwise, handle normally. */
1193 if (REG_P (SUBREG_REG (x
))
1194 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1196 unsigned int inner_regno
= subreg_regno (x
);
1197 unsigned int inner_endregno
1198 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1199 ? hard_regno_nregs
[inner_regno
][GET_MODE (x
)] : 1);
1201 return endregno
> inner_regno
&& regno
< inner_endregno
;
1207 if (&SET_DEST (x
) != loc
1208 /* Note setting a SUBREG counts as referring to the REG it is in for
1209 a pseudo but not for hard registers since we can
1210 treat each word individually. */
1211 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1212 && loc
!= &SUBREG_REG (SET_DEST (x
))
1213 && REG_P (SUBREG_REG (SET_DEST (x
)))
1214 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1215 && refers_to_regno_p (regno
, endregno
,
1216 SUBREG_REG (SET_DEST (x
)), loc
))
1217 || (!REG_P (SET_DEST (x
))
1218 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1221 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1230 /* X does not match, so try its subexpressions. */
1232 fmt
= GET_RTX_FORMAT (code
);
1233 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1235 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1243 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1246 else if (fmt
[i
] == 'E')
1249 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1250 if (loc
!= &XVECEXP (x
, i
, j
)
1251 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1258 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1259 we check if any register number in X conflicts with the relevant register
1260 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1261 contains a MEM (we don't bother checking for memory addresses that can't
1262 conflict because we expect this to be a rare case. */
1265 reg_overlap_mentioned_p (rtx x
, rtx in
)
1267 unsigned int regno
, endregno
;
1269 /* If either argument is a constant, then modifying X can not
1270 affect IN. Here we look at IN, we can profitably combine
1271 CONSTANT_P (x) with the switch statement below. */
1272 if (CONSTANT_P (in
))
1276 switch (GET_CODE (x
))
1278 case STRICT_LOW_PART
:
1281 /* Overly conservative. */
1286 regno
= REGNO (SUBREG_REG (x
));
1287 if (regno
< FIRST_PSEUDO_REGISTER
)
1288 regno
= subreg_regno (x
);
1294 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1295 ? hard_regno_nregs
[regno
][GET_MODE (x
)] : 1);
1296 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1306 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1307 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1308 if (fmt
[i
] == 'e' && reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1317 return reg_mentioned_p (x
, in
);
1323 /* If any register in here refers to it we return true. */
1324 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1325 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1326 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1332 gcc_assert (CONSTANT_P (x
));
1337 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1338 (X would be the pattern of an insn).
1339 FUN receives two arguments:
1340 the REG, MEM, CC0 or PC being stored in or clobbered,
1341 the SET or CLOBBER rtx that does the store.
1343 If the item being stored in or clobbered is a SUBREG of a hard register,
1344 the SUBREG will be passed. */
1347 note_stores (rtx x
, void (*fun
) (rtx
, rtx
, void *), void *data
)
1351 if (GET_CODE (x
) == COND_EXEC
)
1352 x
= COND_EXEC_CODE (x
);
1354 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1356 rtx dest
= SET_DEST (x
);
1358 while ((GET_CODE (dest
) == SUBREG
1359 && (!REG_P (SUBREG_REG (dest
))
1360 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1361 || GET_CODE (dest
) == ZERO_EXTRACT
1362 || GET_CODE (dest
) == STRICT_LOW_PART
)
1363 dest
= XEXP (dest
, 0);
1365 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1366 each of whose first operand is a register. */
1367 if (GET_CODE (dest
) == PARALLEL
)
1369 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1370 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1371 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1374 (*fun
) (dest
, x
, data
);
1377 else if (GET_CODE (x
) == PARALLEL
)
1378 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1379 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1382 /* Like notes_stores, but call FUN for each expression that is being
1383 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1384 FUN for each expression, not any interior subexpressions. FUN receives a
1385 pointer to the expression and the DATA passed to this function.
1387 Note that this is not quite the same test as that done in reg_referenced_p
1388 since that considers something as being referenced if it is being
1389 partially set, while we do not. */
1392 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1397 switch (GET_CODE (body
))
1400 (*fun
) (&COND_EXEC_TEST (body
), data
);
1401 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1405 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1406 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1410 (*fun
) (&XEXP (body
, 0), data
);
1414 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1415 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1419 (*fun
) (&TRAP_CONDITION (body
), data
);
1423 (*fun
) (&XEXP (body
, 0), data
);
1427 case UNSPEC_VOLATILE
:
1428 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1429 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1433 if (MEM_P (XEXP (body
, 0)))
1434 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1439 rtx dest
= SET_DEST (body
);
1441 /* For sets we replace everything in source plus registers in memory
1442 expression in store and operands of a ZERO_EXTRACT. */
1443 (*fun
) (&SET_SRC (body
), data
);
1445 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1447 (*fun
) (&XEXP (dest
, 1), data
);
1448 (*fun
) (&XEXP (dest
, 2), data
);
1451 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1452 dest
= XEXP (dest
, 0);
1455 (*fun
) (&XEXP (dest
, 0), data
);
1460 /* All the other possibilities never store. */
1461 (*fun
) (pbody
, data
);
1466 /* Return nonzero if X's old contents don't survive after INSN.
1467 This will be true if X is (cc0) or if X is a register and
1468 X dies in INSN or because INSN entirely sets X.
1470 "Entirely set" means set directly and not through a SUBREG, or
1471 ZERO_EXTRACT, so no trace of the old contents remains.
1472 Likewise, REG_INC does not count.
1474 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1475 but for this use that makes no difference, since regs don't overlap
1476 during their lifetimes. Therefore, this function may be used
1477 at any time after deaths have been computed (in flow.c).
1479 If REG is a hard reg that occupies multiple machine registers, this
1480 function will only return 1 if each of those registers will be replaced
1484 dead_or_set_p (rtx insn
, rtx x
)
1486 unsigned int regno
, last_regno
;
1489 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1490 if (GET_CODE (x
) == CC0
)
1493 gcc_assert (REG_P (x
));
1496 last_regno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
1497 : regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)] - 1);
1499 for (i
= regno
; i
<= last_regno
; i
++)
1500 if (! dead_or_set_regno_p (insn
, i
))
1506 /* Return TRUE iff DEST is a register or subreg of a register and
1507 doesn't change the number of words of the inner register, and any
1508 part of the register is TEST_REGNO. */
1511 covers_regno_no_parallel_p (rtx dest
, unsigned int test_regno
)
1513 unsigned int regno
, endregno
;
1515 if (GET_CODE (dest
) == SUBREG
1516 && (((GET_MODE_SIZE (GET_MODE (dest
))
1517 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1518 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1519 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1520 dest
= SUBREG_REG (dest
);
1525 regno
= REGNO (dest
);
1526 endregno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
+ 1
1527 : regno
+ hard_regno_nregs
[regno
][GET_MODE (dest
)]);
1528 return (test_regno
>= regno
&& test_regno
< endregno
);
1531 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1532 any member matches the covers_regno_no_parallel_p criteria. */
1535 covers_regno_p (rtx dest
, unsigned int test_regno
)
1537 if (GET_CODE (dest
) == PARALLEL
)
1539 /* Some targets place small structures in registers for return
1540 values of functions, and those registers are wrapped in
1541 PARALLELs that we may see as the destination of a SET. */
1544 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1546 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1547 if (inner
!= NULL_RTX
1548 && covers_regno_no_parallel_p (inner
, test_regno
))
1555 return covers_regno_no_parallel_p (dest
, test_regno
);
1558 /* Utility function for dead_or_set_p to check an individual register. Also
1559 called from flow.c. */
1562 dead_or_set_regno_p (rtx insn
, unsigned int test_regno
)
1566 /* See if there is a death note for something that includes TEST_REGNO. */
1567 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1571 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1574 pattern
= PATTERN (insn
);
1576 if (GET_CODE (pattern
) == COND_EXEC
)
1577 pattern
= COND_EXEC_CODE (pattern
);
1579 if (GET_CODE (pattern
) == SET
)
1580 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1581 else if (GET_CODE (pattern
) == PARALLEL
)
1585 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1587 rtx body
= XVECEXP (pattern
, 0, i
);
1589 if (GET_CODE (body
) == COND_EXEC
)
1590 body
= COND_EXEC_CODE (body
);
1592 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1593 && covers_regno_p (SET_DEST (body
), test_regno
))
1601 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1602 If DATUM is nonzero, look for one whose datum is DATUM. */
1605 find_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1609 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1610 if (! INSN_P (insn
))
1614 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1615 if (REG_NOTE_KIND (link
) == kind
)
1620 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1621 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1626 /* Return the reg-note of kind KIND in insn INSN which applies to register
1627 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1628 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1629 it might be the case that the note overlaps REGNO. */
1632 find_regno_note (rtx insn
, enum reg_note kind
, unsigned int regno
)
1636 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1637 if (! INSN_P (insn
))
1640 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1641 if (REG_NOTE_KIND (link
) == kind
1642 /* Verify that it is a register, so that scratch and MEM won't cause a
1644 && REG_P (XEXP (link
, 0))
1645 && REGNO (XEXP (link
, 0)) <= regno
1646 && ((REGNO (XEXP (link
, 0))
1647 + (REGNO (XEXP (link
, 0)) >= FIRST_PSEUDO_REGISTER
? 1
1648 : hard_regno_nregs
[REGNO (XEXP (link
, 0))]
1649 [GET_MODE (XEXP (link
, 0))]))
1655 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1659 find_reg_equal_equiv_note (rtx insn
)
1665 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1666 if (REG_NOTE_KIND (link
) == REG_EQUAL
1667 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1669 if (single_set (insn
) == 0)
1676 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1677 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1680 find_reg_fusage (rtx insn
, enum rtx_code code
, rtx datum
)
1682 /* If it's not a CALL_INSN, it can't possibly have a
1683 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1693 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1695 link
= XEXP (link
, 1))
1696 if (GET_CODE (XEXP (link
, 0)) == code
1697 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1702 unsigned int regno
= REGNO (datum
);
1704 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1705 to pseudo registers, so don't bother checking. */
1707 if (regno
< FIRST_PSEUDO_REGISTER
)
1709 unsigned int end_regno
1710 = regno
+ hard_regno_nregs
[regno
][GET_MODE (datum
)];
1713 for (i
= regno
; i
< end_regno
; i
++)
1714 if (find_regno_fusage (insn
, code
, i
))
1722 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1723 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1726 find_regno_fusage (rtx insn
, enum rtx_code code
, unsigned int regno
)
1730 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1731 to pseudo registers, so don't bother checking. */
1733 if (regno
>= FIRST_PSEUDO_REGISTER
1737 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1739 unsigned int regnote
;
1742 if (GET_CODE (op
= XEXP (link
, 0)) == code
1743 && REG_P (reg
= XEXP (op
, 0))
1744 && (regnote
= REGNO (reg
)) <= regno
1745 && regnote
+ hard_regno_nregs
[regnote
][GET_MODE (reg
)] > regno
)
1752 /* Return true if INSN is a call to a pure function. */
1755 pure_call_p (rtx insn
)
1759 if (!CALL_P (insn
) || ! CONST_OR_PURE_CALL_P (insn
))
1762 /* Look for the note that differentiates const and pure functions. */
1763 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1767 if (GET_CODE (u
= XEXP (link
, 0)) == USE
1768 && MEM_P (m
= XEXP (u
, 0)) && GET_MODE (m
) == BLKmode
1769 && GET_CODE (XEXP (m
, 0)) == SCRATCH
)
1776 /* Remove register note NOTE from the REG_NOTES of INSN. */
1779 remove_note (rtx insn
, rtx note
)
1783 if (note
== NULL_RTX
)
1786 if (REG_NOTES (insn
) == note
)
1788 REG_NOTES (insn
) = XEXP (note
, 1);
1792 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1793 if (XEXP (link
, 1) == note
)
1795 XEXP (link
, 1) = XEXP (note
, 1);
1802 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1803 return 1 if it is found. A simple equality test is used to determine if
1807 in_expr_list_p (rtx listp
, rtx node
)
1811 for (x
= listp
; x
; x
= XEXP (x
, 1))
1812 if (node
== XEXP (x
, 0))
1818 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1819 remove that entry from the list if it is found.
1821 A simple equality test is used to determine if NODE matches. */
1824 remove_node_from_expr_list (rtx node
, rtx
*listp
)
1827 rtx prev
= NULL_RTX
;
1831 if (node
== XEXP (temp
, 0))
1833 /* Splice the node out of the list. */
1835 XEXP (prev
, 1) = XEXP (temp
, 1);
1837 *listp
= XEXP (temp
, 1);
1843 temp
= XEXP (temp
, 1);
1847 /* Nonzero if X contains any volatile instructions. These are instructions
1848 which may cause unpredictable machine state instructions, and thus no
1849 instructions should be moved or combined across them. This includes
1850 only volatile asms and UNSPEC_VOLATILE instructions. */
1853 volatile_insn_p (rtx x
)
1857 code
= GET_CODE (x
);
1877 case UNSPEC_VOLATILE
:
1878 /* case TRAP_IF: This isn't clear yet. */
1883 if (MEM_VOLATILE_P (x
))
1890 /* Recursively scan the operands of this expression. */
1893 const char *fmt
= GET_RTX_FORMAT (code
);
1896 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1900 if (volatile_insn_p (XEXP (x
, i
)))
1903 else if (fmt
[i
] == 'E')
1906 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1907 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
1915 /* Nonzero if X contains any volatile memory references
1916 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1919 volatile_refs_p (rtx x
)
1923 code
= GET_CODE (x
);
1941 case UNSPEC_VOLATILE
:
1947 if (MEM_VOLATILE_P (x
))
1954 /* Recursively scan the operands of this expression. */
1957 const char *fmt
= GET_RTX_FORMAT (code
);
1960 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1964 if (volatile_refs_p (XEXP (x
, i
)))
1967 else if (fmt
[i
] == 'E')
1970 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1971 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
1979 /* Similar to above, except that it also rejects register pre- and post-
1983 side_effects_p (rtx x
)
1987 code
= GET_CODE (x
);
2005 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2006 when some combination can't be done. If we see one, don't think
2007 that we can simplify the expression. */
2008 return (GET_MODE (x
) != VOIDmode
);
2017 case UNSPEC_VOLATILE
:
2018 /* case TRAP_IF: This isn't clear yet. */
2024 if (MEM_VOLATILE_P (x
))
2031 /* Recursively scan the operands of this expression. */
2034 const char *fmt
= GET_RTX_FORMAT (code
);
2037 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2041 if (side_effects_p (XEXP (x
, i
)))
2044 else if (fmt
[i
] == 'E')
2047 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2048 if (side_effects_p (XVECEXP (x
, i
, j
)))
2056 /* Return nonzero if evaluating rtx X might cause a trap. */
2067 code
= GET_CODE (x
);
2070 /* Handle these cases quickly. */
2084 case UNSPEC_VOLATILE
:
2089 return MEM_VOLATILE_P (x
);
2091 /* Memory ref can trap unless it's a static var or a stack slot. */
2093 if (MEM_NOTRAP_P (x
))
2095 return rtx_addr_can_trap_p (XEXP (x
, 0));
2097 /* Division by a non-constant might trap. */
2102 if (HONOR_SNANS (GET_MODE (x
)))
2104 if (! CONSTANT_P (XEXP (x
, 1))
2105 || (GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
2106 && flag_trapping_math
))
2108 if (XEXP (x
, 1) == const0_rtx
)
2113 /* An EXPR_LIST is used to represent a function call. This
2114 certainly may trap. */
2123 /* Some floating point comparisons may trap. */
2124 if (!flag_trapping_math
)
2126 /* ??? There is no machine independent way to check for tests that trap
2127 when COMPARE is used, though many targets do make this distinction.
2128 For instance, sparc uses CCFPE for compares which generate exceptions
2129 and CCFP for compares which do not generate exceptions. */
2130 if (HONOR_NANS (GET_MODE (x
)))
2132 /* But often the compare has some CC mode, so check operand
2134 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2135 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2141 if (HONOR_SNANS (GET_MODE (x
)))
2143 /* Often comparison is CC mode, so check operand modes. */
2144 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2145 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2150 /* Conversion of floating point might trap. */
2151 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2157 /* These operations don't trap even with floating point. */
2161 /* Any floating arithmetic may trap. */
2162 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
2163 && flag_trapping_math
)
2167 fmt
= GET_RTX_FORMAT (code
);
2168 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2172 if (may_trap_p (XEXP (x
, i
)))
2175 else if (fmt
[i
] == 'E')
2178 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2179 if (may_trap_p (XVECEXP (x
, i
, j
)))
2186 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2187 i.e., an inequality. */
2190 inequality_comparisons_p (rtx x
)
2194 enum rtx_code code
= GET_CODE (x
);
2224 len
= GET_RTX_LENGTH (code
);
2225 fmt
= GET_RTX_FORMAT (code
);
2227 for (i
= 0; i
< len
; i
++)
2231 if (inequality_comparisons_p (XEXP (x
, i
)))
2234 else if (fmt
[i
] == 'E')
2237 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2238 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2246 /* Replace any occurrence of FROM in X with TO. The function does
2247 not enter into CONST_DOUBLE for the replace.
2249 Note that copying is not done so X must not be shared unless all copies
2250 are to be modified. */
2253 replace_rtx (rtx x
, rtx from
, rtx to
)
2258 /* The following prevents loops occurrence when we change MEM in
2259 CONST_DOUBLE onto the same CONST_DOUBLE. */
2260 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2266 /* Allow this function to make replacements in EXPR_LISTs. */
2270 if (GET_CODE (x
) == SUBREG
)
2272 rtx
new = replace_rtx (SUBREG_REG (x
), from
, to
);
2274 if (GET_CODE (new) == CONST_INT
)
2276 x
= simplify_subreg (GET_MODE (x
), new,
2277 GET_MODE (SUBREG_REG (x
)),
2282 SUBREG_REG (x
) = new;
2286 else if (GET_CODE (x
) == ZERO_EXTEND
)
2288 rtx
new = replace_rtx (XEXP (x
, 0), from
, to
);
2290 if (GET_CODE (new) == CONST_INT
)
2292 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2293 new, GET_MODE (XEXP (x
, 0)));
2302 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2303 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2306 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2307 else if (fmt
[i
] == 'E')
2308 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2309 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2315 /* Throughout the rtx X, replace many registers according to REG_MAP.
2316 Return the replacement for X (which may be X with altered contents).
2317 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
2318 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
2320 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
2321 should not be mapped to pseudos or vice versa since validate_change
2324 If REPLACE_DEST is 1, replacements are also done in destinations;
2325 otherwise, only sources are replaced. */
2328 replace_regs (rtx x
, rtx
*reg_map
, unsigned int nregs
, int replace_dest
)
2337 code
= GET_CODE (x
);
2352 /* Verify that the register has an entry before trying to access it. */
2353 if (REGNO (x
) < nregs
&& reg_map
[REGNO (x
)] != 0)
2355 /* SUBREGs can't be shared. Always return a copy to ensure that if
2356 this replacement occurs more than once then each instance will
2357 get distinct rtx. */
2358 if (GET_CODE (reg_map
[REGNO (x
)]) == SUBREG
)
2359 return copy_rtx (reg_map
[REGNO (x
)]);
2360 return reg_map
[REGNO (x
)];
2365 /* Prevent making nested SUBREGs. */
2366 if (REG_P (SUBREG_REG (x
)) && REGNO (SUBREG_REG (x
)) < nregs
2367 && reg_map
[REGNO (SUBREG_REG (x
))] != 0
2368 && GET_CODE (reg_map
[REGNO (SUBREG_REG (x
))]) == SUBREG
)
2370 rtx map_val
= reg_map
[REGNO (SUBREG_REG (x
))];
2371 return simplify_gen_subreg (GET_MODE (x
), map_val
,
2372 GET_MODE (SUBREG_REG (x
)),
2379 SET_DEST (x
) = replace_regs (SET_DEST (x
), reg_map
, nregs
, 0);
2381 else if (MEM_P (SET_DEST (x
))
2382 || GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
)
2383 /* Even if we are not to replace destinations, replace register if it
2384 is CONTAINED in destination (destination is memory or
2385 STRICT_LOW_PART). */
2386 XEXP (SET_DEST (x
), 0) = replace_regs (XEXP (SET_DEST (x
), 0),
2388 else if (GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
2389 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2392 SET_SRC (x
) = replace_regs (SET_SRC (x
), reg_map
, nregs
, 0);
2399 fmt
= GET_RTX_FORMAT (code
);
2400 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2403 XEXP (x
, i
) = replace_regs (XEXP (x
, i
), reg_map
, nregs
, replace_dest
);
2404 else if (fmt
[i
] == 'E')
2407 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2408 XVECEXP (x
, i
, j
) = replace_regs (XVECEXP (x
, i
, j
), reg_map
,
2409 nregs
, replace_dest
);
2415 /* Replace occurrences of the old label in *X with the new one.
2416 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2419 replace_label (rtx
*x
, void *data
)
2422 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2423 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2424 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2429 if (GET_CODE (l
) == SYMBOL_REF
2430 && CONSTANT_POOL_ADDRESS_P (l
))
2432 rtx c
= get_pool_constant (l
);
2433 if (rtx_referenced_p (old_label
, c
))
2436 replace_label_data
*d
= (replace_label_data
*) data
;
2438 /* Create a copy of constant C; replace the label inside
2439 but do not update LABEL_NUSES because uses in constant pool
2441 new_c
= copy_rtx (c
);
2442 d
->update_label_nuses
= false;
2443 for_each_rtx (&new_c
, replace_label
, data
);
2444 d
->update_label_nuses
= update_label_nuses
;
2446 /* Add the new constant NEW_C to constant pool and replace
2447 the old reference to constant by new reference. */
2448 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2449 *x
= replace_rtx (l
, l
, new_l
);
2454 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2455 field. This is not handled by for_each_rtx because it doesn't
2456 handle unprinted ('0') fields. */
2457 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2458 JUMP_LABEL (l
) = new_label
;
2460 if ((GET_CODE (l
) == LABEL_REF
2461 || GET_CODE (l
) == INSN_LIST
)
2462 && XEXP (l
, 0) == old_label
)
2464 XEXP (l
, 0) = new_label
;
2465 if (update_label_nuses
)
2467 ++LABEL_NUSES (new_label
);
2468 --LABEL_NUSES (old_label
);
2476 /* When *BODY is equal to X or X is directly referenced by *BODY
2477 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2478 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2481 rtx_referenced_p_1 (rtx
*body
, void *x
)
2485 if (*body
== NULL_RTX
)
2486 return y
== NULL_RTX
;
2488 /* Return true if a label_ref *BODY refers to label Y. */
2489 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2490 return XEXP (*body
, 0) == y
;
2492 /* If *BODY is a reference to pool constant traverse the constant. */
2493 if (GET_CODE (*body
) == SYMBOL_REF
2494 && CONSTANT_POOL_ADDRESS_P (*body
))
2495 return rtx_referenced_p (y
, get_pool_constant (*body
));
2497 /* By default, compare the RTL expressions. */
2498 return rtx_equal_p (*body
, y
);
2501 /* Return true if X is referenced in BODY. */
2504 rtx_referenced_p (rtx x
, rtx body
)
2506 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2509 /* If INSN is a tablejump return true and store the label (before jump table) to
2510 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2513 tablejump_p (rtx insn
, rtx
*labelp
, rtx
*tablep
)
2518 && (label
= JUMP_LABEL (insn
)) != NULL_RTX
2519 && (table
= next_active_insn (label
)) != NULL_RTX
2521 && (GET_CODE (PATTERN (table
)) == ADDR_VEC
2522 || GET_CODE (PATTERN (table
)) == ADDR_DIFF_VEC
))
2533 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2534 constant that is not in the constant pool and not in the condition
2535 of an IF_THEN_ELSE. */
2538 computed_jump_p_1 (rtx x
)
2540 enum rtx_code code
= GET_CODE (x
);
2559 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2560 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2563 return (computed_jump_p_1 (XEXP (x
, 1))
2564 || computed_jump_p_1 (XEXP (x
, 2)));
2570 fmt
= GET_RTX_FORMAT (code
);
2571 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2574 && computed_jump_p_1 (XEXP (x
, i
)))
2577 else if (fmt
[i
] == 'E')
2578 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2579 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2586 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2588 Tablejumps and casesi insns are not considered indirect jumps;
2589 we can recognize them by a (use (label_ref)). */
2592 computed_jump_p (rtx insn
)
2597 rtx pat
= PATTERN (insn
);
2599 if (find_reg_note (insn
, REG_LABEL
, NULL_RTX
))
2601 else if (GET_CODE (pat
) == PARALLEL
)
2603 int len
= XVECLEN (pat
, 0);
2604 int has_use_labelref
= 0;
2606 for (i
= len
- 1; i
>= 0; i
--)
2607 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2608 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2610 has_use_labelref
= 1;
2612 if (! has_use_labelref
)
2613 for (i
= len
- 1; i
>= 0; i
--)
2614 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2615 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2616 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2619 else if (GET_CODE (pat
) == SET
2620 && SET_DEST (pat
) == pc_rtx
2621 && computed_jump_p_1 (SET_SRC (pat
)))
2627 /* Traverse X via depth-first search, calling F for each
2628 sub-expression (including X itself). F is also passed the DATA.
2629 If F returns -1, do not traverse sub-expressions, but continue
2630 traversing the rest of the tree. If F ever returns any other
2631 nonzero value, stop the traversal, and return the value returned
2632 by F. Otherwise, return 0. This function does not traverse inside
2633 tree structure that contains RTX_EXPRs, or into sub-expressions
2634 whose format code is `0' since it is not known whether or not those
2635 codes are actually RTL.
2637 This routine is very general, and could (should?) be used to
2638 implement many of the other routines in this file. */
2641 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2649 result
= (*f
) (x
, data
);
2651 /* Do not traverse sub-expressions. */
2653 else if (result
!= 0)
2654 /* Stop the traversal. */
2658 /* There are no sub-expressions. */
2661 length
= GET_RTX_LENGTH (GET_CODE (*x
));
2662 format
= GET_RTX_FORMAT (GET_CODE (*x
));
2664 for (i
= 0; i
< length
; ++i
)
2669 result
= for_each_rtx (&XEXP (*x
, i
), f
, data
);
2676 if (XVEC (*x
, i
) != 0)
2679 for (j
= 0; j
< XVECLEN (*x
, i
); ++j
)
2681 result
= for_each_rtx (&XVECEXP (*x
, i
, j
), f
, data
);
2689 /* Nothing to do. */
2698 /* Searches X for any reference to REGNO, returning the rtx of the
2699 reference found if any. Otherwise, returns NULL_RTX. */
2702 regno_use_in (unsigned int regno
, rtx x
)
2708 if (REG_P (x
) && REGNO (x
) == regno
)
2711 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2712 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2716 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
2719 else if (fmt
[i
] == 'E')
2720 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2721 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
2728 /* Return a value indicating whether OP, an operand of a commutative
2729 operation, is preferred as the first or second operand. The higher
2730 the value, the stronger the preference for being the first operand.
2731 We use negative values to indicate a preference for the first operand
2732 and positive values for the second operand. */
2735 commutative_operand_precedence (rtx op
)
2737 enum rtx_code code
= GET_CODE (op
);
2739 /* Constants always come the second operand. Prefer "nice" constants. */
2740 if (code
== CONST_INT
)
2742 if (code
== CONST_DOUBLE
)
2744 op
= avoid_constant_pool_reference (op
);
2745 code
= GET_CODE (op
);
2747 switch (GET_RTX_CLASS (code
))
2750 if (code
== CONST_INT
)
2752 if (code
== CONST_DOUBLE
)
2757 /* SUBREGs of objects should come second. */
2758 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
2761 if (!CONSTANT_P (op
))
2764 /* As for RTX_CONST_OBJ. */
2768 /* Complex expressions should be the first, so decrease priority
2772 case RTX_COMM_ARITH
:
2773 /* Prefer operands that are themselves commutative to be first.
2774 This helps to make things linear. In particular,
2775 (and (and (reg) (reg)) (not (reg))) is canonical. */
2779 /* If only one operand is a binary expression, it will be the first
2780 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2781 is canonical, although it will usually be further simplified. */
2785 /* Then prefer NEG and NOT. */
2786 if (code
== NEG
|| code
== NOT
)
2794 /* Return 1 iff it is necessary to swap operands of commutative operation
2795 in order to canonicalize expression. */
2798 swap_commutative_operands_p (rtx x
, rtx y
)
2800 return (commutative_operand_precedence (x
)
2801 < commutative_operand_precedence (y
));
2804 /* Return 1 if X is an autoincrement side effect and the register is
2805 not the stack pointer. */
2809 switch (GET_CODE (x
))
2817 /* There are no REG_INC notes for SP. */
2818 if (XEXP (x
, 0) != stack_pointer_rtx
)
2826 /* Return 1 if the sequence of instructions beginning with FROM and up
2827 to and including TO is safe to move. If NEW_TO is non-NULL, and
2828 the sequence is not already safe to move, but can be easily
2829 extended to a sequence which is safe, then NEW_TO will point to the
2830 end of the extended sequence.
2832 For now, this function only checks that the region contains whole
2833 exception regions, but it could be extended to check additional
2834 conditions as well. */
2837 insns_safe_to_move_p (rtx from
, rtx to
, rtx
*new_to
)
2839 int eh_region_count
= 0;
2843 /* By default, assume the end of the region will be what was
2852 switch (NOTE_LINE_NUMBER (r
))
2854 case NOTE_INSN_EH_REGION_BEG
:
2858 case NOTE_INSN_EH_REGION_END
:
2859 if (eh_region_count
== 0)
2860 /* This sequence of instructions contains the end of
2861 an exception region, but not he beginning. Moving
2862 it will cause chaos. */
2873 /* If we've passed TO, and we see a non-note instruction, we
2874 can't extend the sequence to a movable sequence. */
2880 /* It's OK to move the sequence if there were matched sets of
2881 exception region notes. */
2882 return eh_region_count
== 0;
2887 /* It's OK to move the sequence if there were matched sets of
2888 exception region notes. */
2889 if (past_to_p
&& eh_region_count
== 0)
2895 /* Go to the next instruction. */
2902 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2904 loc_mentioned_in_p (rtx
*loc
, rtx in
)
2906 enum rtx_code code
= GET_CODE (in
);
2907 const char *fmt
= GET_RTX_FORMAT (code
);
2910 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2912 if (loc
== &in
->u
.fld
[i
].rt_rtx
)
2916 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
2919 else if (fmt
[i
] == 'E')
2920 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
2921 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
2927 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
2928 and SUBREG_BYTE, return the bit offset where the subreg begins
2929 (counting from the least significant bit of the operand). */
2932 subreg_lsb_1 (enum machine_mode outer_mode
,
2933 enum machine_mode inner_mode
,
2934 unsigned int subreg_byte
)
2936 unsigned int bitpos
;
2940 /* A paradoxical subreg begins at bit position 0. */
2941 if (GET_MODE_BITSIZE (outer_mode
) > GET_MODE_BITSIZE (inner_mode
))
2944 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
2945 /* If the subreg crosses a word boundary ensure that
2946 it also begins and ends on a word boundary. */
2947 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
2948 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
2949 && (subreg_byte
% UNITS_PER_WORD
2950 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
2952 if (WORDS_BIG_ENDIAN
)
2953 word
= (GET_MODE_SIZE (inner_mode
)
2954 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
2956 word
= subreg_byte
/ UNITS_PER_WORD
;
2957 bitpos
= word
* BITS_PER_WORD
;
2959 if (BYTES_BIG_ENDIAN
)
2960 byte
= (GET_MODE_SIZE (inner_mode
)
2961 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
2963 byte
= subreg_byte
% UNITS_PER_WORD
;
2964 bitpos
+= byte
* BITS_PER_UNIT
;
2969 /* Given a subreg X, return the bit offset where the subreg begins
2970 (counting from the least significant bit of the reg). */
2975 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
2979 /* This function returns the regno offset of a subreg expression.
2980 xregno - A regno of an inner hard subreg_reg (or what will become one).
2981 xmode - The mode of xregno.
2982 offset - The byte offset.
2983 ymode - The mode of a top level SUBREG (or what may become one).
2984 RETURN - The regno offset which would be used. */
2986 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
2987 unsigned int offset
, enum machine_mode ymode
)
2989 int nregs_xmode
, nregs_ymode
;
2990 int mode_multiple
, nregs_multiple
;
2993 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
2995 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
2996 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
2998 /* If this is a big endian paradoxical subreg, which uses more actual
2999 hard registers than the original register, we must return a negative
3000 offset so that we find the proper highpart of the register. */
3002 && nregs_ymode
> nregs_xmode
3003 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3004 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3005 return nregs_xmode
- nregs_ymode
;
3007 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3010 /* size of ymode must not be greater than the size of xmode. */
3011 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3012 gcc_assert (mode_multiple
!= 0);
3014 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3015 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3016 return (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3019 /* This function returns true when the offset is representable via
3020 subreg_offset in the given regno.
3021 xregno - A regno of an inner hard subreg_reg (or what will become one).
3022 xmode - The mode of xregno.
3023 offset - The byte offset.
3024 ymode - The mode of a top level SUBREG (or what may become one).
3025 RETURN - The regno offset which would be used. */
3027 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3028 unsigned int offset
, enum machine_mode ymode
)
3030 int nregs_xmode
, nregs_ymode
;
3031 int mode_multiple
, nregs_multiple
;
3034 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3036 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3037 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3039 /* Paradoxical subregs are always valid. */
3041 && nregs_ymode
> nregs_xmode
3042 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3043 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3046 /* Lowpart subregs are always valid. */
3047 if (offset
== subreg_lowpart_offset (ymode
, xmode
))
3050 /* This should always pass, otherwise we don't know how to verify the
3051 constraint. These conditions may be relaxed but subreg_offset would
3052 need to be redesigned. */
3053 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3054 gcc_assert ((GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0);
3055 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3057 /* The XMODE value can be seen as a vector of NREGS_XMODE
3058 values. The subreg must represent a lowpart of given field.
3059 Compute what field it is. */
3060 offset
-= subreg_lowpart_offset (ymode
,
3061 mode_for_size (GET_MODE_BITSIZE (xmode
)
3065 /* size of ymode must not be greater than the size of xmode. */
3066 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3067 gcc_assert (mode_multiple
!= 0);
3069 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3070 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3072 gcc_assert ((offset
% GET_MODE_SIZE (ymode
)) == 0);
3073 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3075 return (!(y_offset
% (mode_multiple
/ nregs_multiple
)));
3078 /* Return the final regno that a subreg expression refers to. */
3080 subreg_regno (rtx x
)
3083 rtx subreg
= SUBREG_REG (x
);
3084 int regno
= REGNO (subreg
);
3086 ret
= regno
+ subreg_regno_offset (regno
,
3093 struct parms_set_data
3099 /* Helper function for noticing stores to parameter registers. */
3101 parms_set (rtx x
, rtx pat ATTRIBUTE_UNUSED
, void *data
)
3103 struct parms_set_data
*d
= data
;
3104 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3105 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3107 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3112 /* Look backward for first parameter to be loaded.
3113 Do not skip BOUNDARY. */
3115 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3117 struct parms_set_data parm
;
3120 /* Since different machines initialize their parameter registers
3121 in different orders, assume nothing. Collect the set of all
3122 parameter registers. */
3123 CLEAR_HARD_REG_SET (parm
.regs
);
3125 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3126 if (GET_CODE (XEXP (p
, 0)) == USE
3127 && REG_P (XEXP (XEXP (p
, 0), 0)))
3129 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3131 /* We only care about registers which can hold function
3133 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3136 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3141 /* Search backward for the first set of a register in this set. */
3142 while (parm
.nregs
&& before
!= boundary
)
3144 before
= PREV_INSN (before
);
3146 /* It is possible that some loads got CSEed from one call to
3147 another. Stop in that case. */
3148 if (CALL_P (before
))
3151 /* Our caller needs either ensure that we will find all sets
3152 (in case code has not been optimized yet), or take care
3153 for possible labels in a way by setting boundary to preceding
3155 if (LABEL_P (before
))
3157 gcc_assert (before
== boundary
);
3161 if (INSN_P (before
))
3162 note_stores (PATTERN (before
), parms_set
, &parm
);
3167 /* Return true if we should avoid inserting code between INSN and preceding
3168 call instruction. */
3171 keep_with_call_p (rtx insn
)
3175 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3177 if (REG_P (SET_DEST (set
))
3178 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3179 && fixed_regs
[REGNO (SET_DEST (set
))]
3180 && general_operand (SET_SRC (set
), VOIDmode
))
3182 if (REG_P (SET_SRC (set
))
3183 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set
)))
3184 && REG_P (SET_DEST (set
))
3185 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3187 /* There may be a stack pop just after the call and before the store
3188 of the return register. Search for the actual store when deciding
3189 if we can break or not. */
3190 if (SET_DEST (set
) == stack_pointer_rtx
)
3192 rtx i2
= next_nonnote_insn (insn
);
3193 if (i2
&& keep_with_call_p (i2
))
3200 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3201 to non-complex jumps. That is, direct unconditional, conditional,
3202 and tablejumps, but not computed jumps or returns. It also does
3203 not apply to the fallthru case of a conditional jump. */
3206 label_is_jump_target_p (rtx label
, rtx jump_insn
)
3208 rtx tmp
= JUMP_LABEL (jump_insn
);
3213 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3215 rtvec vec
= XVEC (PATTERN (tmp
),
3216 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3217 int i
, veclen
= GET_NUM_ELEM (vec
);
3219 for (i
= 0; i
< veclen
; ++i
)
3220 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3228 /* Return an estimate of the cost of computing rtx X.
3229 One use is in cse, to decide which expression to keep in the hash table.
3230 Another is in rtl generation, to pick the cheapest way to multiply.
3231 Other uses like the latter are expected in the future. */
3234 rtx_cost (rtx x
, enum rtx_code outer_code ATTRIBUTE_UNUSED
)
3244 /* Compute the default costs of certain things.
3245 Note that targetm.rtx_costs can override the defaults. */
3247 code
= GET_CODE (x
);
3251 total
= COSTS_N_INSNS (5);
3257 total
= COSTS_N_INSNS (7);
3260 /* Used in loop.c and combine.c as a marker. */
3264 total
= COSTS_N_INSNS (1);
3274 /* If we can't tie these modes, make this expensive. The larger
3275 the mode, the more expensive it is. */
3276 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3277 return COSTS_N_INSNS (2
3278 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
3282 if (targetm
.rtx_costs (x
, code
, outer_code
, &total
))
3287 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3288 which is already in total. */
3290 fmt
= GET_RTX_FORMAT (code
);
3291 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3293 total
+= rtx_cost (XEXP (x
, i
), code
);
3294 else if (fmt
[i
] == 'E')
3295 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3296 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
3301 /* Return cost of address expression X.
3302 Expect that X is properly formed address reference. */
3305 address_cost (rtx x
, enum machine_mode mode
)
3307 /* We may be asked for cost of various unusual addresses, such as operands
3308 of push instruction. It is not worthwhile to complicate writing
3309 of the target hook by such cases. */
3311 if (!memory_address_p (mode
, x
))
3314 return targetm
.address_cost (x
);
3317 /* If the target doesn't override, compute the cost as with arithmetic. */
3320 default_address_cost (rtx x
)
3322 return rtx_cost (x
, MEM
);
3326 unsigned HOST_WIDE_INT
3327 nonzero_bits (rtx x
, enum machine_mode mode
)
3329 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3333 num_sign_bit_copies (rtx x
, enum machine_mode mode
)
3335 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3338 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3339 It avoids exponential behavior in nonzero_bits1 when X has
3340 identical subexpressions on the first or the second level. */
3342 static unsigned HOST_WIDE_INT
3343 cached_nonzero_bits (rtx x
, enum machine_mode mode
, rtx known_x
,
3344 enum machine_mode known_mode
,
3345 unsigned HOST_WIDE_INT known_ret
)
3347 if (x
== known_x
&& mode
== known_mode
)
3350 /* Try to find identical subexpressions. If found call
3351 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3352 precomputed value for the subexpression as KNOWN_RET. */
3354 if (ARITHMETIC_P (x
))
3356 rtx x0
= XEXP (x
, 0);
3357 rtx x1
= XEXP (x
, 1);
3359 /* Check the first level. */
3361 return nonzero_bits1 (x
, mode
, x0
, mode
,
3362 cached_nonzero_bits (x0
, mode
, known_x
,
3363 known_mode
, known_ret
));
3365 /* Check the second level. */
3366 if (ARITHMETIC_P (x0
)
3367 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3368 return nonzero_bits1 (x
, mode
, x1
, mode
,
3369 cached_nonzero_bits (x1
, mode
, known_x
,
3370 known_mode
, known_ret
));
3372 if (ARITHMETIC_P (x1
)
3373 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3374 return nonzero_bits1 (x
, mode
, x0
, mode
,
3375 cached_nonzero_bits (x0
, mode
, known_x
,
3376 known_mode
, known_ret
));
3379 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3382 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3383 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3384 is less useful. We can't allow both, because that results in exponential
3385 run time recursion. There is a nullstone testcase that triggered
3386 this. This macro avoids accidental uses of num_sign_bit_copies. */
3387 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3389 /* Given an expression, X, compute which bits in X can be nonzero.
3390 We don't care about bits outside of those defined in MODE.
3392 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3393 an arithmetic operation, we can do better. */
3395 static unsigned HOST_WIDE_INT
3396 nonzero_bits1 (rtx x
, enum machine_mode mode
, rtx known_x
,
3397 enum machine_mode known_mode
,
3398 unsigned HOST_WIDE_INT known_ret
)
3400 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3401 unsigned HOST_WIDE_INT inner_nz
;
3403 unsigned int mode_width
= GET_MODE_BITSIZE (mode
);
3405 /* For floating-point values, assume all bits are needed. */
3406 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
))
3409 /* If X is wider than MODE, use its mode instead. */
3410 if (GET_MODE_BITSIZE (GET_MODE (x
)) > mode_width
)
3412 mode
= GET_MODE (x
);
3413 nonzero
= GET_MODE_MASK (mode
);
3414 mode_width
= GET_MODE_BITSIZE (mode
);
3417 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3418 /* Our only callers in this case look for single bit values. So
3419 just return the mode mask. Those tests will then be false. */
3422 #ifndef WORD_REGISTER_OPERATIONS
3423 /* If MODE is wider than X, but both are a single word for both the host
3424 and target machines, we can compute this from which bits of the
3425 object might be nonzero in its own mode, taking into account the fact
3426 that on many CISC machines, accessing an object in a wider mode
3427 causes the high-order bits to become undefined. So they are
3428 not known to be zero. */
3430 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3431 && GET_MODE_BITSIZE (GET_MODE (x
)) <= BITS_PER_WORD
3432 && GET_MODE_BITSIZE (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3433 && GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (GET_MODE (x
)))
3435 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3436 known_x
, known_mode
, known_ret
);
3437 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3442 code
= GET_CODE (x
);
3446 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3447 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3448 all the bits above ptr_mode are known to be zero. */
3449 if (POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3451 nonzero
&= GET_MODE_MASK (ptr_mode
);
3454 /* Include declared information about alignment of pointers. */
3455 /* ??? We don't properly preserve REG_POINTER changes across
3456 pointer-to-integer casts, so we can't trust it except for
3457 things that we know must be pointers. See execute/960116-1.c. */
3458 if ((x
== stack_pointer_rtx
3459 || x
== frame_pointer_rtx
3460 || x
== arg_pointer_rtx
)
3461 && REGNO_POINTER_ALIGN (REGNO (x
)))
3463 unsigned HOST_WIDE_INT alignment
3464 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3466 #ifdef PUSH_ROUNDING
3467 /* If PUSH_ROUNDING is defined, it is possible for the
3468 stack to be momentarily aligned only to that amount,
3469 so we pick the least alignment. */
3470 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3471 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3475 nonzero
&= ~(alignment
- 1);
3479 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3480 rtx
new = rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3481 known_mode
, known_ret
,
3485 nonzero_for_hook
&= cached_nonzero_bits (new, mode
, known_x
,
3486 known_mode
, known_ret
);
3488 return nonzero_for_hook
;
3492 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3493 /* If X is negative in MODE, sign-extend the value. */
3494 if (INTVAL (x
) > 0 && mode_width
< BITS_PER_WORD
3495 && 0 != (INTVAL (x
) & ((HOST_WIDE_INT
) 1 << (mode_width
- 1))))
3496 return (INTVAL (x
) | ((HOST_WIDE_INT
) (-1) << mode_width
));
3502 #ifdef LOAD_EXTEND_OP
3503 /* In many, if not most, RISC machines, reading a byte from memory
3504 zeros the rest of the register. Noticing that fact saves a lot
3505 of extra zero-extends. */
3506 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
3507 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
3512 case UNEQ
: case LTGT
:
3513 case GT
: case GTU
: case UNGT
:
3514 case LT
: case LTU
: case UNLT
:
3515 case GE
: case GEU
: case UNGE
:
3516 case LE
: case LEU
: case UNLE
:
3517 case UNORDERED
: case ORDERED
:
3519 /* If this produces an integer result, we know which bits are set.
3520 Code here used to clear bits outside the mode of X, but that is
3523 if (GET_MODE_CLASS (mode
) == MODE_INT
3524 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
3525 nonzero
= STORE_FLAG_VALUE
;
3530 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3531 and num_sign_bit_copies. */
3532 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3533 == GET_MODE_BITSIZE (GET_MODE (x
)))
3537 if (GET_MODE_SIZE (GET_MODE (x
)) < mode_width
)
3538 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
3543 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3544 and num_sign_bit_copies. */
3545 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3546 == GET_MODE_BITSIZE (GET_MODE (x
)))
3552 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
3553 known_x
, known_mode
, known_ret
)
3554 & GET_MODE_MASK (mode
));
3558 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3559 known_x
, known_mode
, known_ret
);
3560 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3561 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3565 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3566 Otherwise, show all the bits in the outer mode but not the inner
3568 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
3569 known_x
, known_mode
, known_ret
);
3570 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3572 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3574 & (((HOST_WIDE_INT
) 1
3575 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0))) - 1))))
3576 inner_nz
|= (GET_MODE_MASK (mode
)
3577 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
3580 nonzero
&= inner_nz
;
3584 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3585 known_x
, known_mode
, known_ret
)
3586 & cached_nonzero_bits (XEXP (x
, 1), mode
,
3587 known_x
, known_mode
, known_ret
);
3591 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
3593 unsigned HOST_WIDE_INT nonzero0
=
3594 cached_nonzero_bits (XEXP (x
, 0), mode
,
3595 known_x
, known_mode
, known_ret
);
3597 /* Don't call nonzero_bits for the second time if it cannot change
3599 if ((nonzero
& nonzero0
) != nonzero
)
3601 | cached_nonzero_bits (XEXP (x
, 1), mode
,
3602 known_x
, known_mode
, known_ret
);
3606 case PLUS
: case MINUS
:
3608 case DIV
: case UDIV
:
3609 case MOD
: case UMOD
:
3610 /* We can apply the rules of arithmetic to compute the number of
3611 high- and low-order zero bits of these operations. We start by
3612 computing the width (position of the highest-order nonzero bit)
3613 and the number of low-order zero bits for each value. */
3615 unsigned HOST_WIDE_INT nz0
=
3616 cached_nonzero_bits (XEXP (x
, 0), mode
,
3617 known_x
, known_mode
, known_ret
);
3618 unsigned HOST_WIDE_INT nz1
=
3619 cached_nonzero_bits (XEXP (x
, 1), mode
,
3620 known_x
, known_mode
, known_ret
);
3621 int sign_index
= GET_MODE_BITSIZE (GET_MODE (x
)) - 1;
3622 int width0
= floor_log2 (nz0
) + 1;
3623 int width1
= floor_log2 (nz1
) + 1;
3624 int low0
= floor_log2 (nz0
& -nz0
);
3625 int low1
= floor_log2 (nz1
& -nz1
);
3626 HOST_WIDE_INT op0_maybe_minusp
3627 = (nz0
& ((HOST_WIDE_INT
) 1 << sign_index
));
3628 HOST_WIDE_INT op1_maybe_minusp
3629 = (nz1
& ((HOST_WIDE_INT
) 1 << sign_index
));
3630 unsigned int result_width
= mode_width
;
3636 result_width
= MAX (width0
, width1
) + 1;
3637 result_low
= MIN (low0
, low1
);
3640 result_low
= MIN (low0
, low1
);
3643 result_width
= width0
+ width1
;
3644 result_low
= low0
+ low1
;
3649 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3650 result_width
= width0
;
3655 result_width
= width0
;
3660 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3661 result_width
= MIN (width0
, width1
);
3662 result_low
= MIN (low0
, low1
);
3667 result_width
= MIN (width0
, width1
);
3668 result_low
= MIN (low0
, low1
);
3674 if (result_width
< mode_width
)
3675 nonzero
&= ((HOST_WIDE_INT
) 1 << result_width
) - 1;
3678 nonzero
&= ~(((HOST_WIDE_INT
) 1 << result_low
) - 1);
3680 #ifdef POINTERS_EXTEND_UNSIGNED
3681 /* If pointers extend unsigned and this is an addition or subtraction
3682 to a pointer in Pmode, all the bits above ptr_mode are known to be
3684 if (POINTERS_EXTEND_UNSIGNED
> 0 && GET_MODE (x
) == Pmode
3685 && (code
== PLUS
|| code
== MINUS
)
3686 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
3687 nonzero
&= GET_MODE_MASK (ptr_mode
);
3693 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3694 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3695 nonzero
&= ((HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
3699 /* If this is a SUBREG formed for a promoted variable that has
3700 been zero-extended, we know that at least the high-order bits
3701 are zero, though others might be too. */
3703 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
3704 nonzero
= GET_MODE_MASK (GET_MODE (x
))
3705 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
3706 known_x
, known_mode
, known_ret
);
3708 /* If the inner mode is a single word for both the host and target
3709 machines, we can compute this from which bits of the inner
3710 object might be nonzero. */
3711 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) <= BITS_PER_WORD
3712 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
3713 <= HOST_BITS_PER_WIDE_INT
))
3715 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
3716 known_x
, known_mode
, known_ret
);
3718 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3719 /* If this is a typical RISC machine, we only have to worry
3720 about the way loads are extended. */
3721 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
3723 & (((unsigned HOST_WIDE_INT
) 1
3724 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) - 1))))
3726 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) != ZERO_EXTEND
)
3727 || !MEM_P (SUBREG_REG (x
)))
3730 /* On many CISC machines, accessing an object in a wider mode
3731 causes the high-order bits to become undefined. So they are
3732 not known to be zero. */
3733 if (GET_MODE_SIZE (GET_MODE (x
))
3734 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3735 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
3736 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x
))));
3745 /* The nonzero bits are in two classes: any bits within MODE
3746 that aren't in GET_MODE (x) are always significant. The rest of the
3747 nonzero bits are those that are significant in the operand of
3748 the shift when shifted the appropriate number of bits. This
3749 shows that high-order bits are cleared by the right shift and
3750 low-order bits by left shifts. */
3751 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3752 && INTVAL (XEXP (x
, 1)) >= 0
3753 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3755 enum machine_mode inner_mode
= GET_MODE (x
);
3756 unsigned int width
= GET_MODE_BITSIZE (inner_mode
);
3757 int count
= INTVAL (XEXP (x
, 1));
3758 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
3759 unsigned HOST_WIDE_INT op_nonzero
=
3760 cached_nonzero_bits (XEXP (x
, 0), mode
,
3761 known_x
, known_mode
, known_ret
);
3762 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
3763 unsigned HOST_WIDE_INT outer
= 0;
3765 if (mode_width
> width
)
3766 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
3768 if (code
== LSHIFTRT
)
3770 else if (code
== ASHIFTRT
)
3774 /* If the sign bit may have been nonzero before the shift, we
3775 need to mark all the places it could have been copied to
3776 by the shift as possibly nonzero. */
3777 if (inner
& ((HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
3778 inner
|= (((HOST_WIDE_INT
) 1 << count
) - 1) << (width
- count
);
3780 else if (code
== ASHIFT
)
3783 inner
= ((inner
<< (count
% width
)
3784 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
3786 nonzero
&= (outer
| inner
);
3792 /* This is at most the number of bits in the mode. */
3793 nonzero
= ((HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
3797 /* If CLZ has a known value at zero, then the nonzero bits are
3798 that value, plus the number of bits in the mode minus one. */
3799 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3800 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3806 /* If CTZ has a known value at zero, then the nonzero bits are
3807 that value, plus the number of bits in the mode minus one. */
3808 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3809 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3820 unsigned HOST_WIDE_INT nonzero_true
=
3821 cached_nonzero_bits (XEXP (x
, 1), mode
,
3822 known_x
, known_mode
, known_ret
);
3824 /* Don't call nonzero_bits for the second time if it cannot change
3826 if ((nonzero
& nonzero_true
) != nonzero
)
3827 nonzero
&= nonzero_true
3828 | cached_nonzero_bits (XEXP (x
, 2), mode
,
3829 known_x
, known_mode
, known_ret
);
3840 /* See the macro definition above. */
3841 #undef cached_num_sign_bit_copies
3844 /* The function cached_num_sign_bit_copies is a wrapper around
3845 num_sign_bit_copies1. It avoids exponential behavior in
3846 num_sign_bit_copies1 when X has identical subexpressions on the
3847 first or the second level. */
3850 cached_num_sign_bit_copies (rtx x
, enum machine_mode mode
, rtx known_x
,
3851 enum machine_mode known_mode
,
3852 unsigned int known_ret
)
3854 if (x
== known_x
&& mode
== known_mode
)
3857 /* Try to find identical subexpressions. If found call
3858 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
3859 the precomputed value for the subexpression as KNOWN_RET. */
3861 if (ARITHMETIC_P (x
))
3863 rtx x0
= XEXP (x
, 0);
3864 rtx x1
= XEXP (x
, 1);
3866 /* Check the first level. */
3869 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
3870 cached_num_sign_bit_copies (x0
, mode
, known_x
,
3874 /* Check the second level. */
3875 if (ARITHMETIC_P (x0
)
3876 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3878 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
3879 cached_num_sign_bit_copies (x1
, mode
, known_x
,
3883 if (ARITHMETIC_P (x1
)
3884 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3886 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
3887 cached_num_sign_bit_copies (x0
, mode
, known_x
,
3892 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
3895 /* Return the number of bits at the high-order end of X that are known to
3896 be equal to the sign bit. X will be used in mode MODE; if MODE is
3897 VOIDmode, X will be used in its own mode. The returned value will always
3898 be between 1 and the number of bits in MODE. */
3901 num_sign_bit_copies1 (rtx x
, enum machine_mode mode
, rtx known_x
,
3902 enum machine_mode known_mode
,
3903 unsigned int known_ret
)
3905 enum rtx_code code
= GET_CODE (x
);
3906 unsigned int bitwidth
= GET_MODE_BITSIZE (mode
);
3907 int num0
, num1
, result
;
3908 unsigned HOST_WIDE_INT nonzero
;
3910 /* If we weren't given a mode, use the mode of X. If the mode is still
3911 VOIDmode, we don't know anything. Likewise if one of the modes is
3914 if (mode
== VOIDmode
)
3915 mode
= GET_MODE (x
);
3917 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
)))
3920 /* For a smaller object, just ignore the high bits. */
3921 if (bitwidth
< GET_MODE_BITSIZE (GET_MODE (x
)))
3923 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
3924 known_x
, known_mode
, known_ret
);
3926 num0
- (int) (GET_MODE_BITSIZE (GET_MODE (x
)) - bitwidth
));
3929 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_BITSIZE (GET_MODE (x
)))
3931 #ifndef WORD_REGISTER_OPERATIONS
3932 /* If this machine does not do all register operations on the entire
3933 register and MODE is wider than the mode of X, we can say nothing
3934 at all about the high-order bits. */
3937 /* Likewise on machines that do, if the mode of the object is smaller
3938 than a word and loads of that size don't sign extend, we can say
3939 nothing about the high order bits. */
3940 if (GET_MODE_BITSIZE (GET_MODE (x
)) < BITS_PER_WORD
3941 #ifdef LOAD_EXTEND_OP
3942 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
3953 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3954 /* If pointers extend signed and this is a pointer in Pmode, say that
3955 all the bits above ptr_mode are known to be sign bit copies. */
3956 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
&& mode
== Pmode
3958 return GET_MODE_BITSIZE (Pmode
) - GET_MODE_BITSIZE (ptr_mode
) + 1;
3962 unsigned int copies_for_hook
= 1, copies
= 1;
3963 rtx
new = rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
3964 known_mode
, known_ret
,
3968 copies
= cached_num_sign_bit_copies (new, mode
, known_x
,
3969 known_mode
, known_ret
);
3971 if (copies
> 1 || copies_for_hook
> 1)
3972 return MAX (copies
, copies_for_hook
);
3974 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
3979 #ifdef LOAD_EXTEND_OP
3980 /* Some RISC machines sign-extend all loads of smaller than a word. */
3981 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
3982 return MAX (1, ((int) bitwidth
3983 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1));
3988 /* If the constant is negative, take its 1's complement and remask.
3989 Then see how many zero bits we have. */
3990 nonzero
= INTVAL (x
) & GET_MODE_MASK (mode
);
3991 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
3992 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
3993 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
3995 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
3998 /* If this is a SUBREG for a promoted object that is sign-extended
3999 and we are looking at it in a wider mode, we know that at least the
4000 high-order bits are known to be sign bit copies. */
4002 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4004 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4005 known_x
, known_mode
, known_ret
);
4006 return MAX ((int) bitwidth
4007 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1,
4011 /* For a smaller object, just ignore the high bits. */
4012 if (bitwidth
<= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))))
4014 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4015 known_x
, known_mode
, known_ret
);
4016 return MAX (1, (num0
4017 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4021 #ifdef WORD_REGISTER_OPERATIONS
4022 #ifdef LOAD_EXTEND_OP
4023 /* For paradoxical SUBREGs on machines where all register operations
4024 affect the entire register, just look inside. Note that we are
4025 passing MODE to the recursive call, so the number of sign bit copies
4026 will remain relative to that mode, not the inner mode. */
4028 /* This works only if loads sign extend. Otherwise, if we get a
4029 reload for the inner part, it may be loaded from the stack, and
4030 then we lose all sign bit copies that existed before the store
4033 if ((GET_MODE_SIZE (GET_MODE (x
))
4034 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4035 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4036 && MEM_P (SUBREG_REG (x
)))
4037 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4038 known_x
, known_mode
, known_ret
);
4044 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4045 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4049 return (bitwidth
- GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4050 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4051 known_x
, known_mode
, known_ret
));
4054 /* For a smaller object, just ignore the high bits. */
4055 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4056 known_x
, known_mode
, known_ret
);
4057 return MAX (1, (num0
- (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4061 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4062 known_x
, known_mode
, known_ret
);
4064 case ROTATE
: case ROTATERT
:
4065 /* If we are rotating left by a number of bits less than the number
4066 of sign bit copies, we can just subtract that amount from the
4068 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4069 && INTVAL (XEXP (x
, 1)) >= 0
4070 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4072 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4073 known_x
, known_mode
, known_ret
);
4074 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4075 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4080 /* In general, this subtracts one sign bit copy. But if the value
4081 is known to be positive, the number of sign bit copies is the
4082 same as that of the input. Finally, if the input has just one bit
4083 that might be nonzero, all the bits are copies of the sign bit. */
4084 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4085 known_x
, known_mode
, known_ret
);
4086 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4087 return num0
> 1 ? num0
- 1 : 1;
4089 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4094 && (((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4099 case IOR
: case AND
: case XOR
:
4100 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4101 /* Logical operations will preserve the number of sign-bit copies.
4102 MIN and MAX operations always return one of the operands. */
4103 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4104 known_x
, known_mode
, known_ret
);
4105 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4106 known_x
, known_mode
, known_ret
);
4107 return MIN (num0
, num1
);
4109 case PLUS
: case MINUS
:
4110 /* For addition and subtraction, we can have a 1-bit carry. However,
4111 if we are subtracting 1 from a positive number, there will not
4112 be such a carry. Furthermore, if the positive number is known to
4113 be 0 or 1, we know the result is either -1 or 0. */
4115 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4116 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4118 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4119 if ((((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4120 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4121 : bitwidth
- floor_log2 (nonzero
) - 1);
4124 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4125 known_x
, known_mode
, known_ret
);
4126 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4127 known_x
, known_mode
, known_ret
);
4128 result
= MAX (1, MIN (num0
, num1
) - 1);
4130 #ifdef POINTERS_EXTEND_UNSIGNED
4131 /* If pointers extend signed and this is an addition or subtraction
4132 to a pointer in Pmode, all the bits above ptr_mode are known to be
4134 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4135 && (code
== PLUS
|| code
== MINUS
)
4136 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4137 result
= MAX ((int) (GET_MODE_BITSIZE (Pmode
)
4138 - GET_MODE_BITSIZE (ptr_mode
) + 1),
4144 /* The number of bits of the product is the sum of the number of
4145 bits of both terms. However, unless one of the terms if known
4146 to be positive, we must allow for an additional bit since negating
4147 a negative number can remove one sign bit copy. */
4149 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4150 known_x
, known_mode
, known_ret
);
4151 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4152 known_x
, known_mode
, known_ret
);
4154 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4156 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4157 || (((nonzero_bits (XEXP (x
, 0), mode
)
4158 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4159 && ((nonzero_bits (XEXP (x
, 1), mode
)
4160 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))))
4163 return MAX (1, result
);
4166 /* The result must be <= the first operand. If the first operand
4167 has the high bit set, we know nothing about the number of sign
4169 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4171 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4172 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4175 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4176 known_x
, known_mode
, known_ret
);
4179 /* The result must be <= the second operand. */
4180 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4181 known_x
, known_mode
, known_ret
);
4184 /* Similar to unsigned division, except that we have to worry about
4185 the case where the divisor is negative, in which case we have
4187 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4188 known_x
, known_mode
, known_ret
);
4190 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4191 || (nonzero_bits (XEXP (x
, 1), mode
)
4192 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4198 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4199 known_x
, known_mode
, known_ret
);
4201 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4202 || (nonzero_bits (XEXP (x
, 1), mode
)
4203 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4209 /* Shifts by a constant add to the number of bits equal to the
4211 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4212 known_x
, known_mode
, known_ret
);
4213 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4214 && INTVAL (XEXP (x
, 1)) > 0)
4215 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4220 /* Left shifts destroy copies. */
4221 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
4222 || INTVAL (XEXP (x
, 1)) < 0
4223 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
)
4226 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4227 known_x
, known_mode
, known_ret
);
4228 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4231 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4232 known_x
, known_mode
, known_ret
);
4233 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4234 known_x
, known_mode
, known_ret
);
4235 return MIN (num0
, num1
);
4237 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4238 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4239 case GEU
: case GTU
: case LEU
: case LTU
:
4240 case UNORDERED
: case ORDERED
:
4241 /* If the constant is negative, take its 1's complement and remask.
4242 Then see how many zero bits we have. */
4243 nonzero
= STORE_FLAG_VALUE
;
4244 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4245 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4246 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4248 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4254 /* If we haven't been able to figure it out by one of the above rules,
4255 see if some of the high-order bits are known to be zero. If so,
4256 count those bits and return one less than that amount. If we can't
4257 safely compute the mask for this mode, always return BITWIDTH. */
4259 bitwidth
= GET_MODE_BITSIZE (mode
);
4260 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4263 nonzero
= nonzero_bits (x
, mode
);
4264 return nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4265 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4268 /* Calculate the rtx_cost of a single instruction. A return value of
4269 zero indicates an instruction pattern without a known cost. */
4272 insn_rtx_cost (rtx pat
)
4277 /* Extract the single set rtx from the instruction pattern.
4278 We can't use single_set since we only have the pattern. */
4279 if (GET_CODE (pat
) == SET
)
4281 else if (GET_CODE (pat
) == PARALLEL
)
4284 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4286 rtx x
= XVECEXP (pat
, 0, i
);
4287 if (GET_CODE (x
) == SET
)
4300 cost
= rtx_cost (SET_SRC (set
), SET
);
4301 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4304 /* Given an insn INSN and condition COND, return the condition in a
4305 canonical form to simplify testing by callers. Specifically:
4307 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4308 (2) Both operands will be machine operands; (cc0) will have been replaced.
4309 (3) If an operand is a constant, it will be the second operand.
4310 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4311 for GE, GEU, and LEU.
4313 If the condition cannot be understood, or is an inequality floating-point
4314 comparison which needs to be reversed, 0 will be returned.
4316 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4318 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4319 insn used in locating the condition was found. If a replacement test
4320 of the condition is desired, it should be placed in front of that
4321 insn and we will be sure that the inputs are still valid.
4323 If WANT_REG is nonzero, we wish the condition to be relative to that
4324 register, if possible. Therefore, do not canonicalize the condition
4325 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4326 to be a compare to a CC mode register.
4328 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4332 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4333 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4340 int reverse_code
= 0;
4341 enum machine_mode mode
;
4343 code
= GET_CODE (cond
);
4344 mode
= GET_MODE (cond
);
4345 op0
= XEXP (cond
, 0);
4346 op1
= XEXP (cond
, 1);
4349 code
= reversed_comparison_code (cond
, insn
);
4350 if (code
== UNKNOWN
)
4356 /* If we are comparing a register with zero, see if the register is set
4357 in the previous insn to a COMPARE or a comparison operation. Perform
4358 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4361 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4362 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4363 && op1
== CONST0_RTX (GET_MODE (op0
))
4366 /* Set nonzero when we find something of interest. */
4370 /* If comparison with cc0, import actual comparison from compare
4374 if ((prev
= prev_nonnote_insn (prev
)) == 0
4375 || !NONJUMP_INSN_P (prev
)
4376 || (set
= single_set (prev
)) == 0
4377 || SET_DEST (set
) != cc0_rtx
)
4380 op0
= SET_SRC (set
);
4381 op1
= CONST0_RTX (GET_MODE (op0
));
4387 /* If this is a COMPARE, pick up the two things being compared. */
4388 if (GET_CODE (op0
) == COMPARE
)
4390 op1
= XEXP (op0
, 1);
4391 op0
= XEXP (op0
, 0);
4394 else if (!REG_P (op0
))
4397 /* Go back to the previous insn. Stop if it is not an INSN. We also
4398 stop if it isn't a single set or if it has a REG_INC note because
4399 we don't want to bother dealing with it. */
4401 if ((prev
= prev_nonnote_insn (prev
)) == 0
4402 || !NONJUMP_INSN_P (prev
)
4403 || FIND_REG_INC_NOTE (prev
, NULL_RTX
))
4406 set
= set_of (op0
, prev
);
4409 && (GET_CODE (set
) != SET
4410 || !rtx_equal_p (SET_DEST (set
), op0
)))
4413 /* If this is setting OP0, get what it sets it to if it looks
4417 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4418 #ifdef FLOAT_STORE_FLAG_VALUE
4419 REAL_VALUE_TYPE fsfv
;
4422 /* ??? We may not combine comparisons done in a CCmode with
4423 comparisons not done in a CCmode. This is to aid targets
4424 like Alpha that have an IEEE compliant EQ instruction, and
4425 a non-IEEE compliant BEQ instruction. The use of CCmode is
4426 actually artificial, simply to prevent the combination, but
4427 should not affect other platforms.
4429 However, we must allow VOIDmode comparisons to match either
4430 CCmode or non-CCmode comparison, because some ports have
4431 modeless comparisons inside branch patterns.
4433 ??? This mode check should perhaps look more like the mode check
4434 in simplify_comparison in combine. */
4436 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4439 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4440 && (GET_MODE_BITSIZE (inner_mode
)
4441 <= HOST_BITS_PER_WIDE_INT
)
4442 && (STORE_FLAG_VALUE
4443 & ((HOST_WIDE_INT
) 1
4444 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4445 #ifdef FLOAT_STORE_FLAG_VALUE
4447 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
4448 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4449 REAL_VALUE_NEGATIVE (fsfv
)))
4452 && COMPARISON_P (SET_SRC (set
))))
4453 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4454 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4455 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4457 else if (((code
== EQ
4459 && (GET_MODE_BITSIZE (inner_mode
)
4460 <= HOST_BITS_PER_WIDE_INT
)
4461 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4462 && (STORE_FLAG_VALUE
4463 & ((HOST_WIDE_INT
) 1
4464 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4465 #ifdef FLOAT_STORE_FLAG_VALUE
4467 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
4468 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4469 REAL_VALUE_NEGATIVE (fsfv
)))
4472 && COMPARISON_P (SET_SRC (set
))
4473 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4474 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4475 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4485 else if (reg_set_p (op0
, prev
))
4486 /* If this sets OP0, but not directly, we have to give up. */
4491 /* If the caller is expecting the condition to be valid at INSN,
4492 make sure X doesn't change before INSN. */
4493 if (valid_at_insn_p
)
4494 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
4496 if (COMPARISON_P (x
))
4497 code
= GET_CODE (x
);
4500 code
= reversed_comparison_code (x
, prev
);
4501 if (code
== UNKNOWN
)
4506 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
4512 /* If constant is first, put it last. */
4513 if (CONSTANT_P (op0
))
4514 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
4516 /* If OP0 is the result of a comparison, we weren't able to find what
4517 was really being compared, so fail. */
4519 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
4522 /* Canonicalize any ordered comparison with integers involving equality
4523 if we can do computations in the relevant mode and we do not
4526 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
4527 && GET_CODE (op1
) == CONST_INT
4528 && GET_MODE (op0
) != VOIDmode
4529 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
4531 HOST_WIDE_INT const_val
= INTVAL (op1
);
4532 unsigned HOST_WIDE_INT uconst_val
= const_val
;
4533 unsigned HOST_WIDE_INT max_val
4534 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
4539 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
4540 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
4543 /* When cross-compiling, const_val might be sign-extended from
4544 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4546 if ((HOST_WIDE_INT
) (const_val
& max_val
)
4547 != (((HOST_WIDE_INT
) 1
4548 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
4549 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
4553 if (uconst_val
< max_val
)
4554 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
4558 if (uconst_val
!= 0)
4559 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
4567 /* Never return CC0; return zero instead. */
4571 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
4574 /* Given a jump insn JUMP, return the condition that will cause it to branch
4575 to its JUMP_LABEL. If the condition cannot be understood, or is an
4576 inequality floating-point comparison which needs to be reversed, 0 will
4579 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4580 insn used in locating the condition was found. If a replacement test
4581 of the condition is desired, it should be placed in front of that
4582 insn and we will be sure that the inputs are still valid. If EARLIEST
4583 is null, the returned condition will be valid at INSN.
4585 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4586 compare CC mode register.
4588 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4591 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
4597 /* If this is not a standard conditional jump, we can't parse it. */
4599 || ! any_condjump_p (jump
))
4601 set
= pc_set (jump
);
4603 cond
= XEXP (SET_SRC (set
), 0);
4605 /* If this branches to JUMP_LABEL when the condition is false, reverse
4608 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
4609 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
4611 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
4612 allow_cc_mode
, valid_at_insn_p
);