1 /* Test vneg works correctly. */
3 /* { dg-options "--save-temps" } */
7 #define FLT_EPSILON __FLT_EPSILON__
8 #define DBL_EPSILON __DBL_EPSILON__
9 #define FLT_MAX __FLT_MAX__
10 #define FLT_MIN __FLT_MIN__
11 #define DBL_MAX __DBL_MAX__
12 #define DBL_MIN __DBL_MIN__
18 #define TEST2 -2.71828
19 /* 2^25, float has 24 significand bits
20 according to Single-precision floating-point format. */
21 #define TEST3_FLT 33554432
22 /* 2^54, double has 53 significand bits
23 according to Double-precision floating-point format. */
24 #define TEST3_DBL 18014398509481984
26 extern void abort (void);
28 #define FLT_INFINITY (__builtin_inff ())
29 #define DBL_INFINITY (__builtin_inf ())
32 #define NAN (0.0 / 0.0)
35 #define CONCAT(a, b) a##b
36 #define CONCAT1(a, b) CONCAT (a, b)
38 #define REG_INFEX128 q_
39 #define REG_INFEX(reg_len) REG_INFEX##reg_len
40 #define POSTFIX(reg_len, data_len) \
41 CONCAT1 (REG_INFEX (reg_len), f##data_len)
43 #define DATA_TYPE_32 float
44 #define DATA_TYPE_64 double
45 #define DATA_TYPE(data_len) DATA_TYPE_##data_len
47 #define STORE_INST(reg_len, data_len) \
48 CONCAT1 (vst1, POSTFIX (reg_len, data_len))
49 #define LOAD_INST(reg_len, data_len) \
50 CONCAT1 (vld1, POSTFIX (reg_len, data_len))
51 #define NEG_INST(reg_len, data_len) \
52 CONCAT1 (vneg, POSTFIX (reg_len, data_len))
54 #define INHIB_OPTIMIZATION asm volatile ("" : : : "memory")
55 #define RUN_TEST(test_set, reg_len, data_len, n, a, b, c) \
58 (a) = LOAD_INST (reg_len, data_len) (test_set); \
59 (b) = NEG_INST (reg_len, data_len) (a); \
60 STORE_INST (reg_len, data_len) (c, b); \
61 for (i = 0; i < n; i++) \
63 DATA_TYPE (data_len) diff; \
65 diff = test_set[i] + c[i]; \
71 #define TEST3 TEST3_FLT
72 #define EPSILON FLT_EPSILON
73 #define VAR_MIN FLT_MIN
74 #define VAR_MAX FLT_MAX
75 #define INFINITY FLT_INFINITY
84 float32_t test_set0
[2] = { TEST0
, TEST1
};
85 float32_t test_set1
[2] = { TEST2
, TEST3
};
86 float32_t test_set2
[2] = { VAR_MAX
, VAR_MIN
};
87 float32_t test_set3
[2] = { INFINITY
, NAN
};
89 RUN_TEST (test_set0
, 64, 32, 2, a
, b
, c
);
90 RUN_TEST (test_set1
, 64, 32, 2, a
, b
, c
);
91 RUN_TEST (test_set2
, 64, 32, 2, a
, b
, c
);
92 RUN_TEST (test_set3
, 64, 32, 0, a
, b
, c
);
94 /* Since last test cannot be checked in a uniform way by adding
95 negation result to original value, the number of lanes to be
96 checked in RUN_TEST is 0 (last argument). Instead, result
97 will be checked manually. */
99 if (c
[0] != -INFINITY
)
102 if (!__builtin_isnan (c
[1]))
108 /* { dg-final { scan-assembler-times "fneg\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s" 4 } } */
116 #define TEST3 TEST3_DBL
117 #define EPSILON DBL_EPSILON
118 #define VAR_MIN DBL_MIN
119 #define VAR_MAX DBL_MAX
120 #define INFINITY DBL_INFINITY
129 float64_t test_set0
[1] = { TEST0
};
130 float64_t test_set1
[1] = { TEST1
};
131 float64_t test_set2
[1] = { TEST2
};
132 float64_t test_set3
[1] = { TEST3
};
133 float64_t test_set4
[1] = { VAR_MAX
};
134 float64_t test_set5
[1] = { VAR_MIN
};
135 float64_t test_set6
[1] = { INFINITY
};
136 float64_t test_set7
[1] = { NAN
};
138 RUN_TEST (test_set0
, 64, 64, 1, a
, b
, c
);
139 RUN_TEST (test_set1
, 64, 64, 1, a
, b
, c
);
140 RUN_TEST (test_set2
, 64, 64, 1, a
, b
, c
);
141 RUN_TEST (test_set3
, 64, 64, 1, a
, b
, c
);
142 RUN_TEST (test_set4
, 64, 64, 1, a
, b
, c
);
143 RUN_TEST (test_set5
, 64, 64, 1, a
, b
, c
);
144 RUN_TEST (test_set6
, 64, 64, 0, a
, b
, c
);
146 /* Since last test cannot be checked in a uniform way by adding
147 negation result to original value, the number of lanes to be
148 checked in RUN_TEST is 0 (last argument). Instead, result
149 will be checked manually. */
151 if (c
[0] != -INFINITY
)
156 RUN_TEST (test_set7
, 64, 64, 0, a
, b
, c
);
158 if (!__builtin_isnan (c
[0]))
164 /* { dg-final { scan-assembler-times "fneg\\td\[0-9\]+, d\[0-9\]+" 8 } } */
172 #define TEST3 TEST3_FLT
173 #define EPSILON FLT_EPSILON
174 #define VAR_MIN FLT_MIN
175 #define VAR_MAX FLT_MAX
176 #define INFINITY FLT_INFINITY
185 float32_t test_set0
[4] = { TEST0
, TEST1
, TEST2
, TEST3
};
186 float32_t test_set1
[4] = { FLT_MAX
, FLT_MIN
, INFINITY
, NAN
};
188 RUN_TEST (test_set0
, 128, 32, 4, a
, b
, c
);
189 RUN_TEST (test_set1
, 128, 32, 2, a
, b
, c
);
191 /* Since last test cannot be fully checked in a uniform way by
192 adding negation result to original value, the number of lanes
193 to be checked in RUN_TEST is 0 (last argument). Instead, result
194 will be checked manually. */
196 if (c
[2] != -INFINITY
)
199 if (!__builtin_isnan (c
[3]))
205 /* { dg-final { scan-assembler-times "fneg\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s" 2 } } */
213 #define TEST3 TEST3_DBL
214 #define EPSILON DBL_EPSILON
215 #define VAR_MIN DBL_MIN
216 #define VAR_MAX DBL_MAX
217 #define INFINITY DBL_INFINITY
226 float64_t test_set0
[2] = { TEST0
, TEST1
};
227 float64_t test_set1
[2] = { TEST2
, TEST3
};
228 float64_t test_set2
[2] = { FLT_MAX
, FLT_MIN
};
229 float64_t test_set3
[2] = { INFINITY
, NAN
};
231 RUN_TEST (test_set0
, 128, 64, 2, a
, b
, c
);
232 RUN_TEST (test_set1
, 128, 64, 2, a
, b
, c
);
233 RUN_TEST (test_set2
, 128, 64, 2, a
, b
, c
);
234 RUN_TEST (test_set3
, 128, 64, 0, a
, b
, c
);
236 /* Since last test cannot be checked in a uniform way by adding
237 negation result to original value, the number of lanes to be
238 checked in RUN_TEST is 0 (last argument). Instead, result
239 will be checked manually. */
241 if (c
[0] != -INFINITY
)
244 if (!__builtin_isnan (c
[1]))
250 /* { dg-final { scan-assembler-times "fneg\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d" 4 } } */
253 main (int argc
, char **argv
)
255 if (test_vneg_f32 ())
258 if (test_vneg_f64 ())
261 if (test_vnegq_f32 ())
264 if (test_vnegq_f64 ())