Restore definition of STRUCT_VALUE_REGNUM,
[official-gcc.git] / gcc / config / i370 / i370.h
blob61418cfce8e99a49d3227868a01d0f38547cc7b1
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
29 extern int target_flags;
31 /* The sizes of the code and literals on the current page. */
33 extern int mvs_page_code, mvs_page_lit;
35 /* The current page number and the base page number for the function. */
37 extern int mvs_page_num, function_base_page;
39 /* The name of the current function. */
41 extern char *mvs_function_name;
43 /* The length of the function name malloc'd area. */
45 extern int mvs_function_name_length;
47 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
48 these are more than twice as fast as load-op-store.
49 On 3090 don't use this since load-op-store is much faster. */
51 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
53 /* Default target switches */
55 #define TARGET_DEFAULT 1
57 /* Macro to define tables used to set the flags. This is a list in braces
58 of pairs in braces, each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
62 #define TARGET_SWITCHES \
63 { { "char-instructions", 1, N_("Generate char instructions")}, \
64 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
65 { "", TARGET_DEFAULT, 0} }
67 /* To use IBM supplied macro function prologue and epilogue, define the
68 following to 1. Should only be needed if IBM changes the definition
69 of their prologue and epilogue. */
71 #define MACROPROLOGUE 0
72 #define MACROEPILOGUE 0
74 /* Target machine storage layout */
76 /* Define this if most significant bit is lowest numbered in instructions
77 that operate on numbered bit-fields. */
79 #define BITS_BIG_ENDIAN 1
81 /* Define this if most significant byte of a word is the lowest numbered. */
83 #define BYTES_BIG_ENDIAN 1
85 /* Define this if MS word of a multiword is the lowest numbered. */
87 #define WORDS_BIG_ENDIAN 1
89 /* Number of bits in an addressable storage unit. */
91 #define BITS_PER_UNIT 8
93 /* Width in bits of a "word", which is the contents of a machine register. */
95 #define BITS_PER_WORD 32
97 /* Width of a word, in units (bytes). */
99 #define UNITS_PER_WORD 4
101 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
103 #define POINTER_SIZE 32
105 /* Allocation boundary (in *bits*) for storing pointers in memory. */
107 #define POINTER_BOUNDARY 32
109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
111 #define PARM_BOUNDARY 32
113 /* Boundary (in *bits*) on which stack pointer should be aligned. */
115 #define STACK_BOUNDARY 32
117 /* Allocation boundary (in *bits*) for the code of a function. */
119 #define FUNCTION_BOUNDARY 32
121 /* There is no point aligning anything to a rounder boundary than this. */
123 #define BIGGEST_ALIGNMENT 64
125 /* Alignment of field after `int : 0' in a structure. */
127 #define EMPTY_FIELD_BOUNDARY 32
129 /* Define this if move instructions will actually fail to work when given
130 unaligned data. */
132 #define STRICT_ALIGNMENT 0
134 /* Define target floating point format. */
136 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
138 /* Define character mapping for cross-compiling. */
139 /* but only define it if really needed, since otherwise it will break builds */
141 #ifdef TARGET_EBCDIC
142 #ifdef HOST_EBCDIC
143 #define MAP_CHARACTER(c) ((char)(c))
144 #else
145 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
146 #endif
147 #endif
149 #ifdef TARGET_HLASM
150 /* HLASM requires #pragma map. */
151 #define REGISTER_TARGET_PRAGMAS(PFILE) \
152 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
153 #endif /* TARGET_HLASM */
155 /* Define maximum length of page minus page escape overhead. */
157 #define MAX_MVS_PAGE_LENGTH 4080
159 /* Define special register allocation order desired.
160 Don't fiddle with this. I did, and I got all sorts of register
161 spill errors when compiling even relatively simple programs...
162 I have no clue why ...
163 E.g. this one is bad:
164 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
167 #define REG_ALLOC_ORDER \
168 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
170 /* Standard register usage. */
172 /* Number of actual hardware registers. The hardware registers are
173 assigned numbers for the compiler from 0 to just below
174 FIRST_PSEUDO_REGISTER.
175 All registers that the compiler knows about must be given numbers,
176 even those that are not normally considered general registers.
177 For the 370, we give the data registers numbers 0-15,
178 and the floating point registers numbers 16-19. */
180 #define FIRST_PSEUDO_REGISTER 20
182 /* Define base and page registers. */
184 #define BASE_REGISTER 3
185 #define PAGE_REGISTER 4
187 #ifdef TARGET_HLASM
188 /* 1 for registers that have pervasive standard uses and are not available
189 for the register allocator. These are registers that must have fixed,
190 valid values stored in them for the entire length of the subroutine call,
191 and must not in any way be moved around, jiggered with, etc. That is,
192 they must never be clobbered, and, if clobbered, the register allocator
193 will never restore them back.
195 We use five registers in this special way:
196 -- R3 which is used as the base register
197 -- R4 the page origin table pointer used to load R3,
198 -- R11 the arg pointer.
199 -- R12 the TCA pointer
200 -- R13 the stack (DSA) pointer
202 A fifth register is also exceptional: R14 is used in many branch
203 instructions to hold the target of the branch. Technically, this
204 does not qualify R14 as a register with a long-term meaning; it should
205 be enough, theoretically, to note that these instructions clobber
206 R14, and let the compiler deal with that. In practice, however,
207 the "clobber" directive acts as a barrier to optimization, and the
208 optimizer appears to be unable to perform optimizations around branches.
209 Thus, a much better strategy appears to give R14 a pervasive use;
210 this eliminates it from the register pool witout hurting optimization.
212 There are other registers which have special meanings, but its OK
213 for them to get clobbered, since other allocator config below will
214 make sure that they always have the right value. These are for
215 example:
216 -- R1 the returned structure pointer.
217 -- R10 the static chain reg.
218 -- R15 holds the value a subroutine returns.
220 Notice that it is *almost* safe to mark R11 as available to the allocator.
221 By marking it as a call_used_register, in most cases, the compiler
222 can handle it being clobbered. However, there are a few rare
223 circumstances where the register allocator will allocate r11 and
224 also try to use it as the arg pointer ... thus it must be marked fixed.
225 I think this is a bug, but I can't track it down...
228 #define FIXED_REGISTERS \
229 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
232 /* 1 for registers not available across function calls. These must include
233 the FIXED_REGISTERS and also any registers that can be used without being
234 saved.
235 The latter must include the registers where values are returned
236 and the register where structure-value addresses are passed.
237 NOTE: all floating registers are undefined across calls.
240 #define CALL_USED_REGISTERS \
241 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
242 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
244 /* Return number of consecutive hard regs needed starting at reg REGNO
245 to hold something of mode MODE.
246 This is ordinarily the length in words of a value of mode MODE
247 but can be less for certain modes in special long registers.
248 Note that DCmode (complex double) needs two regs.
250 #endif /* TARGET_HLASM */
252 /* ================= */
253 #ifdef TARGET_ELF_ABI
254 /* The Linux/ELF ABI uses the same register layout as the
255 * the MVS/OE version, with the following exceptions:
256 * -- r12 (rtca) is not used.
259 #define FIXED_REGISTERS \
260 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
261 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
263 #define CALL_USED_REGISTERS \
264 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
265 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
267 #endif /* TARGET_ELF_ABI */
268 /* ================= */
271 #define HARD_REGNO_NREGS(REGNO, MODE) \
272 ((REGNO) > 15 ? \
273 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
274 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
276 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
277 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
278 even registers can hold DI. The floating point registers can hold
279 either SF, DF, SC or DC. */
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
282 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
283 (((MODE) != DImode) && ((MODE) != DFmode))) \
284 : ((MODE) == SFmode || (MODE) == DFmode) || \
285 (MODE) == SCmode || (MODE) == DCmode)
287 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
288 mode MODE1 and one has mode MODE2.
289 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
290 for any hard reg, then this must be 0 for correct output. */
292 #define MODES_TIEABLE_P(MODE1, MODE2) \
293 (((MODE1) == SFmode || (MODE1) == DFmode) \
294 == ((MODE2) == SFmode || (MODE2) == DFmode))
296 /* Mark external references. */
298 #define ENCODE_SECTION_INFO(decl) \
299 if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
300 SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
302 /* Specify the registers used for certain standard purposes.
303 The values of these macros are register numbers. */
305 /* 370 PC isn't overloaded on a register. */
307 /* #define PC_REGNUM */
309 /* Register to use for pushing function arguments. */
311 #define STACK_POINTER_REGNUM 13
313 /* Base register for access to local variables of the function. */
315 #define FRAME_POINTER_REGNUM 13
317 /* Value should be nonzero if functions must have frame pointers.
318 Zero means the frame pointer need not be set up (and parms may be
319 accessed via the stack pointer) in functions that seem suitable.
320 This is computed in `reload', in reload1.c. */
322 #define FRAME_POINTER_REQUIRED 1
324 /* Base register for access to arguments of the function. */
326 #define ARG_POINTER_REGNUM 11
328 /* R10 is register in which static-chain is passed to a function.
329 Static-chaining is done when a nested function references as a global
330 a stack variable of its parent: e.g.
331 int parent_func (int arg) {
332 int x; // x is in parents stack
333 void child_func (void) { x++: } // child references x as global var
334 ...
338 #define STATIC_CHAIN_REGNUM 10
340 /* R1 is register in which address to store a structure value is passed to
341 a function. This is used only when returning 64-bit long-long in a 32-bit arch
342 and when calling functions that return structs by value. e.g.
343 typedef struct A_s { int a,b,c; } A_t;
344 A_t fun_returns_value (void) {
345 A_t a; a.a=1; a.b=2 a.c=3;
346 return a;
348 In the above, the storage for the return value is in the callers stack, and
349 the R1 points at that mem location.
352 #define STRUCT_VALUE_REGNUM 1
354 /* Define the classes of registers for register constraints in the
355 machine description. Also define ranges of constants.
357 One of the classes must always be named ALL_REGS and include all hard regs.
358 If there is more than one class, another class must be named NO_REGS
359 and contain no registers.
361 The name GENERAL_REGS must be the name of a class (or an alias for
362 another name such as ALL_REGS). This is the class of registers
363 that is allowed by "g" or "r" in a register constraint.
364 Also, registers outside this class are allocated only when
365 instructions express preferences for them.
367 The classes must be numbered in nondecreasing order; that is,
368 a larger-numbered class must never be contained completely
369 in a smaller-numbered class.
371 For any two classes, it is very desirable that there be another
372 class that represents their union. */
374 enum reg_class
376 NO_REGS, ADDR_REGS, DATA_REGS,
377 FP_REGS, ALL_REGS, LIM_REG_CLASSES
380 #define GENERAL_REGS DATA_REGS
381 #define N_REG_CLASSES (int) LIM_REG_CLASSES
383 /* Give names of register classes as strings for dump file. */
385 #define REG_CLASS_NAMES \
386 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
388 /* Define which registers fit in which classes. This is an initializer for
389 a vector of HARD_REG_SET of length N_REG_CLASSES. */
391 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
393 /* The same information, inverted:
394 Return the class number of the smallest class containing
395 reg number REGNO. This could be a conditional expression
396 or could index an array. */
398 #define REGNO_REG_CLASS(REGNO) \
399 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
401 /* The class value for index registers, and the one for base regs. */
403 #define INDEX_REG_CLASS ADDR_REGS
404 #define BASE_REG_CLASS ADDR_REGS
406 /* Get reg_class from a letter such as appears in the machine description. */
408 #define REG_CLASS_FROM_LETTER(C) \
409 ((C) == 'a' ? ADDR_REGS : \
410 ((C) == 'd' ? DATA_REGS : \
411 ((C) == 'f' ? FP_REGS : NO_REGS)))
413 /* The letters I, J, K, L and M in a register constraint string can be used
414 to stand for particular ranges of immediate operands.
415 This macro defines what the ranges are.
416 C is the letter, and VALUE is a constant value.
417 Return 1 if VALUE is in the range specified by C. */
419 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
420 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
421 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
422 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
424 /* Similar, but for floating constants, and defining letters G and H.
425 Here VALUE is the CONST_DOUBLE rtx itself. */
427 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
429 /* see recog.c for details */
430 #define EXTRA_CONSTRAINT(OP,C) \
431 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
432 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
434 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
435 return the class of reg to actually use. In general this is just CLASS;
436 but on some machines in some cases it is preferable to use a more
437 restrictive class.
439 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
440 rare occasions when lots of egisters are spilled, reload() will try
441 to put a const int into r0 and then use r0 as an index register.
444 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
445 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
446 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
447 GET_CODE(X) == LABEL_REF || \
448 GET_CODE(X) == SYMBOL_REF || \
449 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
451 /* Return the maximum number of consecutive registers needed to represent
452 mode MODE in a register of class CLASS.
453 Note that DCmode (complex double) needs two regs.
456 #define CLASS_MAX_NREGS(CLASS, MODE) \
457 ((CLASS) == FP_REGS ? \
458 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
459 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
461 /* Stack layout; function entry, exit and calling. */
463 /* Define this if pushing a word on the stack makes the stack pointer a
464 smaller address. */
465 /* ------------------------------------------------------------------- */
467 /* ================= */
468 #ifdef TARGET_HLASM
469 /* #define STACK_GROWS_DOWNWARD */
471 /* Define this if the nominal address of the stack frame is at the
472 high-address end of the local variables; that is, each additional local
473 variable allocated goes at a more negative offset in the frame. */
475 /* #define FRAME_GROWS_DOWNWARD */
477 /* Offset within stack frame to start allocating local variables at.
478 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
479 first local allocated. Otherwise, it is the offset to the BEGINNING
480 of the first local allocated. */
482 #define STARTING_FRAME_OFFSET \
483 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
485 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
487 /* If we generate an insn to push BYTES bytes, this says how many the stack
488 pointer really advances by. On the 370, we have no push instruction. */
490 #endif /* TARGET_HLASM */
492 /* ================= */
493 #ifdef TARGET_ELF_ABI
495 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
496 But we want the compiler to generate posistive displacements from the
497 stack pointer, and so we make the frame lie above the stack. */
499 #define STACK_GROWS_DOWNWARD
500 /* #define FRAME_GROWS_DOWNWARD */
502 /* Offset within stack frame to start allocating local variables at.
503 This is the offset to the BEGINNING of the first local allocated. */
505 #define STARTING_FRAME_OFFSET \
506 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
508 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
510 #endif /* TARGET_ELF_ABI */
511 /* ================= */
513 /* #define PUSH_ROUNDING(BYTES) */
515 /* Accumulate the outgoing argument count so we can request the right
516 DSA size and determine stack offset. */
518 #define ACCUMULATE_OUTGOING_ARGS 1
520 /* Define offset from stack pointer, to location where a parm can be
521 pushed. */
523 #define STACK_POINTER_OFFSET 148
525 /* Offset of first parameter from the argument pointer register value. */
527 #define FIRST_PARM_OFFSET(FNDECL) 0
529 /* 1 if N is a possible register number for function argument passing.
530 On the 370, no registers are used in this way. */
532 #define FUNCTION_ARG_REGNO_P(N) 0
534 /* Define a data type for recording info about an argument list during
535 the scan of that argument list. This data type should hold all
536 necessary information about the function itself and about the args
537 processed so far, enough to enable macros such as FUNCTION_ARG to
538 determine where the next arg should go. */
540 #define CUMULATIVE_ARGS int
542 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
543 a function whose data type is FNTYPE.
544 For a library call, FNTYPE is 0. */
546 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
548 /* Update the data in CUM to advance over an argument of mode MODE and
549 data type TYPE. (TYPE is null for libcalls where that information
550 may not be available.) */
552 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
553 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
554 ? 256 \
555 : (MODE) != BLKmode \
556 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
557 : (int_size_in_bytes (TYPE) + 3) / 4))
559 /* Define where to put the arguments to a function. Value is zero to push
560 the argument on the stack, or a hard register in which to store the
561 argument. */
563 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
565 /* For an arg passed partly in registers and partly in memory, this is the
566 number of registers used. For args passed entirely in registers or
567 entirely in memory, zero. */
569 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
571 /* Define if returning from a function call automatically pops the
572 arguments described by the number-of-args field in the call. */
574 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
576 /* The FUNCTION_VALUE macro defines how to find the value returned by a
577 function. VALTYPE is the data type of the value (as a tree).
578 If the precise function being called is known, FUNC is its FUNCTION_DECL;
579 otherwise, FUNC is NULL.
581 On the 370 the return value is in R15 or R16. However,
582 DImode (64-bit ints) scalars need to get returned on the stack,
583 with r15 pointing to the location. To accomplish this, we define
584 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
585 and the DImode scalars.
588 #define RET_REG(MODE) \
589 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
591 #define FUNCTION_VALUE(VALTYPE, FUNC) \
592 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
594 #define RETURN_IN_MEMORY(VALTYPE) \
595 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
597 /* Define how to find the value returned by a library function assuming
598 the value has mode MODE. */
600 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
602 /* 1 if N is a possible register number for a function value.
603 On the 370 under C/370, R15 and R16 are thus used. */
605 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
607 /* This macro definition sets up a default value for `main' to return. */
609 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
612 /* Output assembler code for a block containing the constant parts of a
613 trampoline, leaving space for the variable parts.
615 On the 370, the trampoline contains these instructions:
617 BALR 14,0
618 USING *,14
619 L STATIC_CHAIN_REGISTER,X
620 L 15,Y
621 BR 15
622 X DS 0F
623 Y DS 0F */
625 I am confused as to why this emitting raw binary, instead of instructions ...
626 see for example, rs6000/rs000.c for an example of a different way to
627 do this ... especially since BASR should probably be substituted for BALR.
630 #define TRAMPOLINE_TEMPLATE(FILE) \
632 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \
633 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
634 ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \
635 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \
636 ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \
637 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \
638 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
639 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
640 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
641 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
644 /* Length in units of the trampoline for entering a nested function. */
646 #define TRAMPOLINE_SIZE 20
648 /* Emit RTL insns to initialize the variable parts of a trampoline. */
650 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
652 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
653 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
656 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
657 pointer does not matter (provided there is a frame pointer). */
659 #define EXIT_IGNORE_STACK 1
661 /* Addressing modes, and classification of registers for them. */
663 /* #define HAVE_POST_INCREMENT */
664 /* #define HAVE_POST_DECREMENT */
666 /* #define HAVE_PRE_DECREMENT */
667 /* #define HAVE_PRE_INCREMENT */
669 /* These assume that REGNO is a hard or pseudo reg number. They give
670 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
671 reg currently allocated to a suitable hard reg.
672 These definitions are NOT overridden anywhere. */
674 #define REGNO_OK_FOR_INDEX_P(REGNO) \
675 (((REGNO) > 0 && (REGNO) < 16) \
676 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
678 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
680 #define REGNO_OK_FOR_DATA_P(REGNO) \
681 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
683 #define REGNO_OK_FOR_FP_P(REGNO) \
684 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
686 /* Now macros that check whether X is a register and also,
687 strictly, whether it is in a specified class. */
689 /* 1 if X is a data register. */
691 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
693 /* 1 if X is an fp register. */
695 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
697 /* 1 if X is an address register. */
699 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
701 /* Maximum number of registers that can appear in a valid memory address. */
703 #define MAX_REGS_PER_ADDRESS 2
705 /* Recognize any constant value that is a valid address. */
707 #define CONSTANT_ADDRESS_P(X) \
708 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
709 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
710 || (GET_CODE (X) == CONST \
711 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
712 || (GET_CODE (X) == CONST \
713 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
714 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
716 /* Nonzero if the constant value X is a legitimate general operand.
717 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
719 #define LEGITIMATE_CONSTANT_P(X) 1
721 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
722 its validity for a certain class. We have two alternate definitions
723 for each of them. The usual definition accepts all pseudo regs; the
724 other rejects them all. The symbol REG_OK_STRICT causes the latter
725 definition to be used.
727 Most source files want to accept pseudo regs in the hope that they will
728 get allocated to the class that the insn wants them to be in.
729 Some source files that are used after register allocation
730 need to be strict. */
732 #ifndef REG_OK_STRICT
734 /* Nonzero if X is a hard reg that can be used as an index or if it is
735 a pseudo reg. */
737 #define REG_OK_FOR_INDEX_P(X) \
738 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
740 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
741 a pseudo reg. */
743 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
745 #else /* REG_OK_STRICT */
747 /* Nonzero if X is a hard reg that can be used as an index. */
749 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
751 /* Nonzero if X is a hard reg that can be used as a base reg. */
753 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
755 #endif /* REG_OK_STRICT */
757 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
758 valid memory address for an instruction.
759 The MODE argument is the machine mode for the MEM expression
760 that wants to use this address.
762 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
763 except for CONSTANT_ADDRESS_P which is actually machine-independent.
766 #define COUNT_REGS(X, REGS, FAIL) \
767 if (REG_P (X)) { \
768 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
769 else goto FAIL; \
771 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
772 goto FAIL;
774 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
776 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
777 goto ADDR; \
778 if (GET_CODE (X) == PLUS) \
780 int regs = 0; \
781 rtx x0 = XEXP (X, 0); \
782 rtx x1 = XEXP (X, 1); \
783 if (GET_CODE (x0) == PLUS) \
785 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
786 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
787 COUNT_REGS (x1, regs, FAIL); \
788 if (regs == 2) \
789 goto ADDR; \
791 else if (GET_CODE (x1) == PLUS) \
793 COUNT_REGS (x0, regs, FAIL); \
794 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
795 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
796 if (regs == 2) \
797 goto ADDR; \
799 else \
801 COUNT_REGS (x0, regs, FAIL); \
802 COUNT_REGS (x1, regs, FAIL); \
803 if (regs != 0) \
804 goto ADDR; \
807 FAIL: ; \
810 /* The 370 has no mode dependent addresses. */
812 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
814 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
815 Try machine-dependent ways of modifying an illegitimate address
816 to be legitimate. If we find one, return the new, valid address.
817 This macro is used in only one place: `memory_address' in explow.c.
819 Several comments:
820 (1) It's not obvious that this macro results in better code
821 than its omission does. For historical reasons we leave it in.
823 (2) This macro may be (???) implicated in the accidental promotion
824 or RS operand to RX operands, which bombs out any RS, SI, SS
825 instruction that was expecting a simple address. Note that
826 this occurs fairly rarely ...
828 (3) There is a bug somewhere that causes either r4 to be spilled,
829 or causes r0 to be used as a base register. Changeing the macro
830 below will make the bug move around, but will not make it go away
831 ... Note that this is a rare bug ...
835 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
837 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
838 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
839 copy_to_mode_reg (SImode, XEXP (X, 1))); \
840 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
841 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
842 copy_to_mode_reg (SImode, XEXP (X, 0))); \
843 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
844 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
845 force_operand (XEXP (X, 0), 0)); \
846 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
847 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
848 force_operand (XEXP (X, 1), 0)); \
849 if (memory_address_p (MODE, X)) \
850 goto WIN; \
853 /* Specify the machine mode that this machine uses for the index in the
854 tablejump instruction. */
856 #define CASE_VECTOR_MODE SImode
858 /* Define this if the tablejump instruction expects the table to contain
859 offsets from the address of the table.
860 Do not define this if the table should contain absolute addresses. */
862 /* #define CASE_VECTOR_PC_RELATIVE */
864 /* Specify the tree operation to be used to convert reals to integers. */
866 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
868 /* Define this if fixuns_trunc is the same as fix_trunc. */
870 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
872 /* We use "unsigned char" as default. */
874 #define DEFAULT_SIGNED_CHAR 0
876 /* This is the kind of divide that is easiest to do in the general case. */
878 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
880 /* Max number of bytes we can move from memory to memory in one reasonably
881 fast instruction. */
883 #define MOVE_MAX 256
885 /* Define this if zero-extension is slow (more than one real instruction). */
887 #define SLOW_ZERO_EXTEND 1
889 /* Nonzero if access to memory by bytes is slow and undesirable. */
891 #define SLOW_BYTE_ACCESS 1
893 /* Define if shifts truncate the shift count which implies one can omit
894 a sign-extension or zero-extension of a shift count. */
896 /* #define SHIFT_COUNT_TRUNCATED */
898 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
899 is done just by pretending it is already truncated. */
901 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
903 /* We assume that the store-condition-codes instructions store 0 for false
904 and some other value for true. This is the value stored for true. */
906 /* #define STORE_FLAG_VALUE (-1) */
908 /* When a prototype says `char' or `short', really pass an `int'. */
910 #define PROMOTE_PROTOTYPES 1
912 /* Don't perform CSE on function addresses. */
914 #define NO_FUNCTION_CSE
916 /* Specify the machine mode that pointers have.
917 After generation of rtl, the compiler makes no further distinction
918 between pointers and any other objects of this machine mode. */
920 #define Pmode SImode
922 /* A function address in a call instruction is a byte address (for
923 indexing purposes) so give the MEM rtx a byte's mode. */
925 #define FUNCTION_MODE QImode
927 /* Compute the cost of computing a constant rtl expression RTX whose
928 rtx-code is CODE. The body of this macro is a portion of a switch
929 statement. If the code is computed here, return it with a return
930 statement. Otherwise, break from the switch. */
932 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
933 case CONST_INT: \
934 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
935 case CONST: \
936 case LABEL_REF: \
937 case SYMBOL_REF: \
938 return 2; \
939 case CONST_DOUBLE: \
940 return 4;
942 /* A C statement (sans semicolon) to update the integer variable COST
943 based on the relationship between INSN that is dependent on
944 DEP_INSN through the dependence LINK. The default is to make no
945 adjustment to COST. This can be used for example to specify to
946 the scheduler that an output- or anti-dependence does not incur
947 the same cost as a data-dependence.
949 We will want to use this to indicate that there is a cost associated
950 with the loading, followed by use of base registers ...
951 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
954 /* Tell final.c how to eliminate redundant test instructions. */
956 /* Here we define machine-dependent flags and fields in cc_status
957 (see `conditions.h'). */
959 /* Store in cc_status the expressions that the condition codes will
960 describe after execution of an instruction whose pattern is EXP.
961 Do not alter them if the instruction would not alter the cc's.
963 On the 370, load insns do not alter the cc's. However, in some
964 cases these instructions can make it possibly invalid to use the
965 saved cc's. In those cases we clear out some or all of the saved
966 cc's so they won't be used.
968 Note that only some arith instructions set the CC. These include
969 add, subtract, complement, various shifts. Note that multiply
970 and divide do *not* set set the CC. Therefore, in the code below,
971 don't set the status for MUL, DIV, etc.
973 Note that the bitwise ops set the condition code, but not in a
974 way that we can make use of it. So we treat these as clobbering,
975 rather than setting the CC. These are clobbered in the individual
976 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
979 #define NOTICE_UPDATE_CC(EXP, INSN) \
981 rtx exp = (EXP); \
982 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
983 exp = XVECEXP (exp, 0, 0); \
984 if (GET_CODE (exp) != SET) \
985 CC_STATUS_INIT; \
986 else \
988 if (XEXP (exp, 0) == cc0_rtx) \
990 cc_status.value1 = XEXP (exp, 0); \
991 cc_status.value2 = XEXP (exp, 1); \
992 cc_status.flags = 0; \
994 else \
996 if (cc_status.value1 \
997 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
998 cc_status.value1 = 0; \
999 if (cc_status.value2 \
1000 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
1001 cc_status.value2 = 0; \
1002 switch (GET_CODE (XEXP (exp, 1))) \
1004 case PLUS: case MINUS: case NEG: \
1005 case NOT: case ABS: \
1006 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
1008 /* mult and div don't set any cc codes !! */ \
1009 case MULT: /* case UMULT: */ case DIV: case UDIV: \
1010 /* and, or and xor set the cc's the wrong way !! */ \
1011 case AND: case IOR: case XOR: \
1012 /* some shifts set the CC some don't. */ \
1013 case ASHIFT: case ASHIFTRT: \
1014 do {} while (0); \
1015 default: \
1016 break; \
1023 #define CC_STATUS_SET(V1, V2) \
1025 cc_status.flags = 0; \
1026 cc_status.value1 = (V1); \
1027 cc_status.value2 = (V2); \
1028 if (cc_status.value1 \
1029 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1030 cc_status.value2 = 0; \
1033 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1034 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1036 /* ------------------------------------------ */
1037 /* Control the assembler format that we output. */
1039 /* Define standard character escape sequences for non-ASCII targets
1040 only. */
1042 #ifdef TARGET_EBCDIC
1043 #define TARGET_ESC 39
1044 #define TARGET_BELL 47
1045 #define TARGET_BS 22
1046 #define TARGET_TAB 5
1047 #define TARGET_NEWLINE 21
1048 #define TARGET_VT 11
1049 #define TARGET_FF 12
1050 #define TARGET_CR 13
1051 #endif
1053 /* ======================================================== */
1055 #ifdef TARGET_HLASM
1056 #define TEXT_SECTION_ASM_OP "* Program text area"
1057 #define DATA_SECTION_ASM_OP "* Program data area"
1058 #define INIT_SECTION_ASM_OP "* Program initialization area"
1059 #define SHARED_SECTION_ASM_OP "* Program shared data"
1060 #define CTOR_LIST_BEGIN /* NO OP */
1061 #define CTOR_LIST_END /* NO OP */
1062 #define MAX_MVS_LABEL_SIZE 8
1064 /* How to refer to registers in assembler output. This sequence is
1065 indexed by compiler's hard-register-number (see above). */
1067 #define REGISTER_NAMES \
1068 { "0", "1", "2", "3", "4", "5", "6", "7", \
1069 "8", "9", "10", "11", "12", "13", "14", "15", \
1070 "0", "2", "4", "6" \
1073 #define ASM_FILE_START(FILE) \
1074 { fputs ("\tRMODE\tANY\n", FILE); \
1075 fputs ("\tCSECT\n", FILE); }
1077 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1078 #define ASM_COMMENT_START "*"
1079 #define ASM_APP_OFF ""
1080 #define ASM_APP_ON ""
1082 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1083 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1085 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1087 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1088 if (mvs_check_alias (NAME, temp) == 2) \
1090 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1094 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1096 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1097 if (mvs_check_alias (NAME, temp) == 2) \
1099 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1101 fputs ("\tENTRY\t", FILE); \
1102 assemble_name (FILE, NAME); \
1103 fputs ("\n", FILE); \
1106 /* MVS externals are limited to 8 characters, upper case only.
1107 The '_' is mapped to '@', except for MVS functions, then '#'. */
1110 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1112 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1113 if (!mvs_get_alias (NAME, temp)) \
1114 strcpy (temp, NAME); \
1115 if (!strcmp (temp,"main")) \
1116 strcpy (temp,"gccmain"); \
1117 if (mvs_function_check (temp)) \
1118 ch = '#'; \
1119 else \
1120 ch = '@'; \
1121 for (bp = temp; *bp; bp++) \
1122 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1123 fprintf (FILE, "%s", temp); \
1126 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1127 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1129 /* Generate internal label. Since we can branch here from off page, we
1130 must reload the base register. */
1132 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1134 if (!strcmp (PREFIX,"L")) \
1136 mvs_add_label(NUM); \
1138 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1141 /* Generate case label. For HLASM we can change to the data CSECT
1142 and put the vectors out of the code body. The assembler just
1143 concatenates CSECTs with the same name. */
1145 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1146 fprintf (FILE, "\tDS\t0F\n"); \
1147 fprintf (FILE,"\tCSECT\n"); \
1148 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1150 /* Put the CSECT back to the code body */
1152 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1153 assemble_name (FILE, mvs_function_name); \
1154 fputs ("\tCSECT\n", FILE);
1156 /* This is how to output an element of a case-vector that is absolute. */
1158 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1159 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1161 /* This is how to output an element of a case-vector that is relative. */
1163 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1164 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1166 /* This is how to output an insn to push a register on the stack.
1167 It need not be very fast code.
1168 Right now, PUSH & POP are used only when profiling is enabled,
1169 and then, only to push the static chain reg and the function struct
1170 value reg, and only if those are used. Since profiling is not
1171 supported anyway, punt on this. */
1173 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1174 mvs_check_page (FILE, 8, 4); \
1175 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1176 reg_names[REGNO], STACK_POINTER_OFFSET)
1178 /* This is how to output an insn to pop a register from the stack.
1179 It need not be very fast code. */
1181 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1182 mvs_check_page (FILE, 8, 0); \
1183 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1184 reg_names[REGNO], STACK_POINTER_OFFSET)
1186 /* This is how to output an assembler line defining a `double' constant. */
1187 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1188 fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
1190 /* This is how to output an assembler line defining a `float' constant. */
1191 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1192 fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
1194 /* This outputs an integer, if not a CONST_INT must be address constant. */
1196 #define ASM_OUTPUT_INT(FILE, EXP) \
1198 if (GET_CODE (EXP) == CONST_INT) \
1200 fprintf (FILE, "\tDC\tF'"); \
1201 output_addr_const (FILE, EXP); \
1202 fprintf (FILE, "'\n"); \
1204 else \
1206 fprintf (FILE, "\tDC\tA("); \
1207 output_addr_const (FILE, EXP); \
1208 fprintf (FILE, ")\n"); \
1212 /* This outputs a short integer. */
1214 #define ASM_OUTPUT_SHORT(FILE, EXP) \
1216 fprintf (FILE, "\tDC\tX'%04X'\n", INTVAL(EXP) & 0xFFFF); \
1219 /* This outputs a byte sized integer. */
1221 #define ASM_OUTPUT_CHAR(FILE, EXP) \
1222 fprintf (FILE, "\tDC\tX'%02X'\n", INTVAL (EXP) )
1224 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1225 fprintf (FILE, "\tDC\tX'%02X'\n", VALUE)
1227 /* This outputs a text string. The string are chopped up to fit into
1228 an 80 byte record. Also, control and special characters, interpreted
1229 by the IBM assembler, are output numerically. */
1231 #define MVS_ASCII_TEXT_LENGTH 48
1233 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1235 int i, j; \
1236 int c; \
1237 for (j = 0, i = 0; i < LEN; j++, i++) \
1239 c = PTR[i]; \
1240 if (ISCNTRL (c) || c == '&') \
1242 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1243 fprintf (FILE, "'\n"); \
1244 j = -1; \
1245 if (c == '&') c = MAP_CHARACTER (c); \
1246 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1248 else \
1250 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1251 fprintf (FILE, "\tDC\tC'"); \
1252 if ( c == '\'' ) \
1253 fprintf (FILE, "%c%c", c, c); \
1254 else \
1255 fprintf (FILE, "%c", c); \
1256 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1257 fprintf (FILE, "'\n" ); \
1260 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1261 fprintf (FILE, "'\n"); \
1264 /* This is how to output an assembler line that says to advance the
1265 location counter to a multiple of 2**LOG bytes. */
1267 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1268 if (LOG) \
1270 if ((LOG) == 1) \
1271 fprintf (FILE, "\tDS\t0H\n" ); \
1272 else \
1273 fprintf (FILE, "\tDS\t0F\n" ); \
1276 /* The maximum length of memory that the IBM assembler will allow in one
1277 DS operation. */
1279 #define MAX_CHUNK 32767
1281 /* A C statement to output to the stdio stream FILE an assembler
1282 instruction to advance the location counter by SIZE bytes. Those
1283 bytes should be zero when loaded. */
1285 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1287 int s, k; \
1288 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1290 if (s > MAX_CHUNK) \
1291 k = MAX_CHUNK; \
1292 else \
1293 k = s; \
1294 fprintf (FILE, "\tDS\tXL%d\n", k); \
1298 /* A C statement (sans semicolon) to output to the stdio stream
1299 FILE the assembler definition of a common-label named NAME whose
1300 size is SIZE bytes. The variable ROUNDED is the size rounded up
1301 to whatever alignment the caller wants. */
1303 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1305 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1306 if (mvs_check_alias(NAME, temp) == 2) \
1308 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1310 fputs ("\tENTRY\t", FILE); \
1311 assemble_name (FILE, NAME); \
1312 fputs ("\n", FILE); \
1313 fprintf (FILE, "\tDS\t0F\n"); \
1314 ASM_OUTPUT_LABEL (FILE,NAME); \
1315 ASM_OUTPUT_SKIP (FILE,SIZE); \
1318 /* A C statement (sans semicolon) to output to the stdio stream
1319 FILE the assembler definition of a local-common-label named NAME
1320 whose size is SIZE bytes. The variable ROUNDED is the size
1321 rounded up to whatever alignment the caller wants. */
1323 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1325 fprintf (FILE, "\tDS\t0F\n"); \
1326 ASM_OUTPUT_LABEL (FILE,NAME); \
1327 ASM_OUTPUT_SKIP (FILE,SIZE); \
1330 /* Store in OUTPUT a string (made with alloca) containing an
1331 assembler-name for a local static variable named NAME.
1332 LABELNO is an integer which is different for each call. */
1334 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1336 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1337 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1340 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1341 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1342 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1344 #define PRINT_OPERAND(FILE, XV, CODE) \
1346 switch (GET_CODE (XV)) \
1348 static char curreg[4]; \
1349 case REG: \
1350 if (CODE == 'N') \
1351 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1352 else \
1353 strcpy (curreg, reg_names[REGNO (XV)]); \
1354 fprintf (FILE, "%s", curreg); \
1355 break; \
1356 case MEM: \
1358 rtx addr = XEXP (XV, 0); \
1359 if (CODE == 'O') \
1361 if (GET_CODE (addr) == PLUS) \
1362 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1363 else \
1364 fprintf (FILE, "0"); \
1366 else if (CODE == 'R') \
1368 if (GET_CODE (addr) == PLUS) \
1369 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1370 else \
1371 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1373 else \
1374 output_address (XEXP (XV, 0)); \
1376 break; \
1377 case SYMBOL_REF: \
1378 case LABEL_REF: \
1379 mvs_page_lit += 4; \
1380 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1381 else fprintf (FILE, "=A("); \
1382 output_addr_const (FILE, XV); \
1383 fprintf (FILE, ")"); \
1384 break; \
1385 case CONST_INT: \
1386 if (CODE == 'B') \
1387 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1388 else if (CODE == 'X') \
1389 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1390 else if (CODE == 'h') \
1391 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1392 else if (CODE == 'H') \
1394 mvs_page_lit += 2; \
1395 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1397 else if (CODE == 'K') \
1399 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1400 mvs_page_lit += 4; \
1401 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1403 else if (CODE == 'W') \
1405 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1406 mvs_page_lit += 8; \
1407 if (0 <= INTVAL (XV)) { \
1408 fprintf (FILE, "=XL8'00000000"); \
1409 } else { \
1410 fprintf (FILE, "=XL8'FFFFFFFF"); \
1412 fprintf (FILE, "%08X'", INTVAL (XV)); \
1414 else \
1416 mvs_page_lit += 4; \
1417 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1419 break; \
1420 case CONST_DOUBLE: \
1421 if (GET_MODE (XV) == DImode) \
1423 if (CODE == 'M') \
1425 mvs_page_lit += 4; \
1426 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1428 else if (CODE == 'L') \
1430 mvs_page_lit += 4; \
1431 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1433 else \
1435 mvs_page_lit += 8; \
1436 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1437 CONST_DOUBLE_HIGH (XV)); \
1440 else \
1442 /* hack alert -- this prints wildly incorrect values */ \
1443 /* when run in cross-compiler mode. See ELF section */ \
1444 /* for suggested fix */ \
1445 union { double d; int i[2]; } u; \
1446 u.i[0] = CONST_DOUBLE_LOW (XV); \
1447 u.i[1] = CONST_DOUBLE_HIGH (XV); \
1448 if (GET_MODE (XV) == SFmode) \
1450 mvs_page_lit += 4; \
1451 fprintf (FILE, "=E'%.9G'", u.d); \
1453 else \
1455 mvs_page_lit += 8; \
1456 fprintf (FILE, "=D'%.18G'", u.d); \
1459 break; \
1460 case CONST: \
1461 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1462 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1464 mvs_page_lit += 4; \
1465 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1467 fprintf (FILE, "=V("); \
1468 ASM_OUTPUT_LABELREF (FILE, \
1469 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1470 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1471 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1473 else \
1475 fprintf (FILE, "=A("); \
1476 output_addr_const (FILE, XV); \
1477 fprintf (FILE, ")"); \
1480 else \
1482 mvs_page_lit += 4; \
1483 fprintf (FILE, "=F'"); \
1484 output_addr_const (FILE, XV); \
1485 fprintf (FILE, "'"); \
1487 break; \
1488 default: \
1489 abort(); \
1493 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1495 rtx breg, xreg, offset, plus; \
1497 switch (GET_CODE (ADDR)) \
1499 case REG: \
1500 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1501 break; \
1502 case PLUS: \
1503 breg = 0; \
1504 xreg = 0; \
1505 offset = 0; \
1506 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1508 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1509 breg = XEXP (ADDR, 1); \
1510 else \
1511 offset = XEXP (ADDR, 1); \
1512 plus = XEXP (ADDR, 0); \
1514 else \
1516 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1517 breg = XEXP (ADDR, 0); \
1518 else \
1519 offset = XEXP (ADDR, 0); \
1520 plus = XEXP (ADDR, 1); \
1522 if (GET_CODE (plus) == PLUS) \
1524 if (GET_CODE (XEXP (plus, 0)) == REG) \
1526 if (breg) \
1527 xreg = XEXP (plus, 0); \
1528 else \
1529 breg = XEXP (plus, 0); \
1531 else \
1533 offset = XEXP (plus, 0); \
1535 if (GET_CODE (XEXP (plus, 1)) == REG) \
1537 if (breg) \
1538 xreg = XEXP (plus, 1); \
1539 else \
1540 breg = XEXP (plus, 1); \
1542 else \
1544 offset = XEXP (plus, 1); \
1547 else if (GET_CODE (plus) == REG) \
1549 if (breg) \
1550 xreg = plus; \
1551 else \
1552 breg = plus; \
1554 else \
1556 offset = plus; \
1558 if (offset) \
1560 if (GET_CODE (offset) == LABEL_REF) \
1561 fprintf (FILE, "L%d", \
1562 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1563 else \
1564 output_addr_const (FILE, offset); \
1566 else \
1567 fprintf (FILE, "0"); \
1568 if (xreg) \
1569 fprintf (FILE, "(%s,%s)", \
1570 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1571 else \
1572 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1573 break; \
1574 default: \
1575 mvs_page_lit += 4; \
1576 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1577 else fprintf (FILE, "=A("); \
1578 output_addr_const (FILE, ADDR); \
1579 fprintf (FILE, ")"); \
1580 break; \
1584 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1586 if (strlen (NAME) + 1 > mvs_function_name_length) \
1588 if (mvs_function_name) \
1589 free (mvs_function_name); \
1590 mvs_function_name = 0; \
1592 if (!mvs_function_name) \
1594 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1595 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1597 if (!strcmp (NAME, "main")) \
1598 strcpy (mvs_function_name, "gccmain"); \
1599 else \
1600 strcpy (mvs_function_name, NAME); \
1601 fprintf (FILE, "\tDS\t0F\n"); \
1602 assemble_name (FILE, mvs_function_name); \
1603 fputs ("\tRMODE\tANY\n", FILE); \
1604 assemble_name (FILE, mvs_function_name); \
1605 fputs ("\tCSECT\n", FILE); \
1608 /* Output assembler code to FILE to increment profiler label # LABELNO
1609 for profiling a function entry. */
1611 #define FUNCTION_PROFILER(FILE, LABELNO) \
1612 fprintf (FILE, "Error: No profiling available.\n")
1614 #endif /* TARGET_HLASM */
1616 /* ======================================================== */
1618 #ifdef TARGET_ELF_ABI
1620 /* How to refer to registers in assembler output. This sequence is
1621 indexed by compiler's hard-register-number (see above). */
1623 #define REGISTER_NAMES \
1624 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1625 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1626 "f0", "f2", "f4", "f6" \
1629 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1630 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1631 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1633 #define PRINT_OPERAND(FILE, XV, CODE) \
1635 switch (GET_CODE (XV)) \
1637 static char curreg[4]; \
1638 case REG: \
1639 if (CODE == 'N') \
1640 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1641 else \
1642 strcpy (curreg, reg_names[REGNO (XV)]); \
1643 fprintf (FILE, "%s", curreg); \
1644 break; \
1645 case MEM: \
1647 rtx addr = XEXP (XV, 0); \
1648 if (CODE == 'O') \
1650 if (GET_CODE (addr) == PLUS) \
1651 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1652 else \
1653 fprintf (FILE, "0"); \
1655 else if (CODE == 'R') \
1657 if (GET_CODE (addr) == PLUS) \
1658 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1659 else \
1660 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1662 else \
1663 output_address (XEXP (XV, 0)); \
1665 break; \
1666 case SYMBOL_REF: \
1667 case LABEL_REF: \
1668 mvs_page_lit += 4; \
1669 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1670 else fprintf (FILE, "=A("); \
1671 output_addr_const (FILE, XV); \
1672 fprintf (FILE, ")"); \
1673 break; \
1674 case CONST_INT: \
1675 if (CODE == 'B') \
1676 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1677 else if (CODE == 'X') \
1678 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1679 else if (CODE == 'h') \
1680 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1681 else if (CODE == 'H') \
1683 mvs_page_lit += 2; \
1684 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1686 else if (CODE == 'K') \
1688 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1689 mvs_page_lit += 4; \
1690 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1692 else if (CODE == 'W') \
1694 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1695 mvs_page_lit += 8; \
1696 if (0 <= INTVAL (XV)) { \
1697 fprintf (FILE, "=XL8'00000000"); \
1698 } else { \
1699 fprintf (FILE, "=XL8'FFFFFFFF"); \
1701 fprintf (FILE, "%08X'", INTVAL (XV)); \
1703 else \
1705 mvs_page_lit += 4; \
1706 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1708 break; \
1709 case CONST_DOUBLE: \
1710 if (GET_MODE (XV) == DImode) \
1712 if (CODE == 'M') \
1714 mvs_page_lit += 4; \
1715 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1717 else if (CODE == 'L') \
1719 mvs_page_lit += 4; \
1720 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1722 else \
1724 mvs_page_lit += 8; \
1725 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1726 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1729 else \
1731 char buf[50]; \
1732 REAL_VALUE_TYPE rval; \
1733 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1734 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1735 if (GET_MODE (XV) == SFmode) \
1737 mvs_page_lit += 4; \
1738 fprintf (FILE, "=E'%s'", buf); \
1740 else \
1741 if (GET_MODE (XV) == DFmode) \
1743 mvs_page_lit += 8; \
1744 fprintf (FILE, "=D'%s'", buf); \
1746 else /* VOIDmode !?!? strange but true ... */ \
1748 mvs_page_lit += 8; \
1749 fprintf (FILE, "=XL8'%08X%08X'", \
1750 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1753 break; \
1754 case CONST: \
1755 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1756 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1758 mvs_page_lit += 4; \
1759 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1761 fprintf (FILE, "=V("); \
1762 ASM_OUTPUT_LABELREF (FILE, \
1763 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1764 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1765 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1767 else \
1769 fprintf (FILE, "=A("); \
1770 output_addr_const (FILE, XV); \
1771 fprintf (FILE, ")"); \
1774 else \
1776 mvs_page_lit += 4; \
1777 fprintf (FILE, "=bogus_bad_F'"); \
1778 output_addr_const (FILE, XV); \
1779 fprintf (FILE, "'"); \
1780 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1781 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1782 debug_rtx (XV); \
1783 abort(); \
1785 break; \
1786 default: \
1787 abort(); \
1791 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1793 rtx breg, xreg, offset, plus; \
1795 switch (GET_CODE (ADDR)) \
1797 case REG: \
1798 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1799 break; \
1800 case PLUS: \
1801 breg = 0; \
1802 xreg = 0; \
1803 offset = 0; \
1804 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1806 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1807 breg = XEXP (ADDR, 1); \
1808 else \
1809 offset = XEXP (ADDR, 1); \
1810 plus = XEXP (ADDR, 0); \
1812 else \
1814 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1815 breg = XEXP (ADDR, 0); \
1816 else \
1817 offset = XEXP (ADDR, 0); \
1818 plus = XEXP (ADDR, 1); \
1820 if (GET_CODE (plus) == PLUS) \
1822 if (GET_CODE (XEXP (plus, 0)) == REG) \
1824 if (breg) \
1825 xreg = XEXP (plus, 0); \
1826 else \
1827 breg = XEXP (plus, 0); \
1829 else \
1831 offset = XEXP (plus, 0); \
1833 if (GET_CODE (XEXP (plus, 1)) == REG) \
1835 if (breg) \
1836 xreg = XEXP (plus, 1); \
1837 else \
1838 breg = XEXP (plus, 1); \
1840 else \
1842 offset = XEXP (plus, 1); \
1845 else if (GET_CODE (plus) == REG) \
1847 if (breg) \
1848 xreg = plus; \
1849 else \
1850 breg = plus; \
1852 else \
1854 offset = plus; \
1856 if (offset) \
1858 if (GET_CODE (offset) == LABEL_REF) \
1859 fprintf (FILE, "L%d", \
1860 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1861 else \
1862 output_addr_const (FILE, offset); \
1864 else \
1865 fprintf (FILE, "0"); \
1866 if (xreg) \
1867 fprintf (FILE, "(%s,%s)", \
1868 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1869 else \
1870 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1871 break; \
1872 default: \
1873 mvs_page_lit += 4; \
1874 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1875 else fprintf (FILE, "=A("); \
1876 output_addr_const (FILE, ADDR); \
1877 fprintf (FILE, ")"); \
1878 break; \
1882 /* Output assembler code to FILE to increment profiler label # LABELNO
1883 for profiling a function entry. */
1884 /* Make it a no-op for now, so we can at least compile glibc */
1885 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1886 mvs_check_page (FILE, 24, 4); \
1887 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1888 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1889 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1890 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1891 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1892 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1895 /* Don't bother to output .extern pseudo-ops. They are not needed by
1896 ELF assemblers. */
1898 #undef ASM_OUTPUT_EXTERNAL
1900 #define ASM_DOUBLE "\t.double"
1901 #define ASM_LONG "\t.long"
1902 #define ASM_SHORT "\t.short"
1903 #define ASM_BYTE "\t.byte"
1905 /* Argument to the flt pt. macros is a REAL_VALUE_TYPE which
1906 may or may not be a float/double, depending on whther we
1907 are running in cross-compiler mode. */
1908 /* This is how to output an assembler line defining a `double' constant. */
1909 #define ASM_OUTPUT_DOUBLE(FILE, RVAL) { \
1910 char buf[50]; \
1911 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DOUBLE_HEX, buf); \
1912 fprintf (FILE, "\tDC\tD'%s'\n", buf); \
1915 /* This is how to output an assembler line defining a `float' constant. */
1916 #define ASM_OUTPUT_FLOAT(FILE, RVAL) { \
1917 char buf[50]; \
1918 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DEC, buf); \
1919 fprintf (FILE, "\tDC\tE'%s'\n", buf); \
1923 /* This is how to output an assembler line defining an `int' constant. */
1924 #define ASM_OUTPUT_INT(FILE,VALUE) \
1925 ( fprintf (FILE, "%s ", ASM_LONG), \
1926 output_addr_const (FILE,(VALUE)), \
1927 putc('\n',FILE))
1929 /* Likewise for `char' and `short' constants. */
1930 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1931 ( fprintf (FILE, "%s ", ASM_SHORT), \
1932 output_addr_const (FILE,(VALUE)), \
1933 putc('\n',FILE))
1936 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1937 ( fprintf (FILE, "%s", ASM_BYTE_OP), \
1938 output_addr_const (FILE, (VALUE)), \
1939 putc ('\n', FILE))
1941 /* This is how to output an assembler line for a numeric constant byte. */
1942 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1943 fprintf ((FILE), "%s0x%x\n", ASM_BYTE_OP, (VALUE))
1945 /* This is how to output the definition of a user-level label named NAME,
1946 such as the label on a static function or variable NAME. */
1947 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1948 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1950 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1952 /* Generate internal label. Since we can branch here from off page, we
1953 must reload the base register. Note that internal labels are generated
1954 for loops, goto's and case labels. */
1955 #undef ASM_OUTPUT_INTERNAL_LABEL
1956 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1958 if (!strcmp (PREFIX,"L")) \
1960 mvs_add_label(NUM); \
1962 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1965 /* let config/svr4.h define this ...
1966 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1967 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1970 /* This is how to output an element of a case-vector that is absolute. */
1971 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1972 mvs_check_page (FILE, 4, 0); \
1973 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1975 /* This is how to output an element of a case-vector that is relative. */
1976 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1977 mvs_check_page (FILE, 4, 0); \
1978 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1980 /* Right now, PUSH & POP are used only when profiling is enabled,
1981 and then, only to push the static chain reg and the function struct
1982 value reg, and only if those are used by the function being profiled.
1983 We don't need this for profiling, so punt. */
1984 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1985 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1988 /* Indicate that jump tables go in the text section. This is
1989 necessary when compiling PIC code. */
1990 #define JUMP_TABLES_IN_TEXT_SECTION 1
1992 /* Define macro used to output shift-double opcodes when the shift
1993 count is in %cl. Some assemblers require %cl as an argument;
1994 some don't.
1996 GAS requires the %cl argument, so override i386/unix.h. */
1998 #undef SHIFT_DOUBLE_OMITS_COUNT
1999 #define SHIFT_DOUBLE_OMITS_COUNT 0
2001 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2002 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2003 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2005 /* Allow #sccs in preprocessor. */
2006 #define SCCS_DIRECTIVE
2008 /* Implicit library calls should use memcpy, not bcopy, etc. */
2009 #define TARGET_MEM_FUNCTIONS
2011 /* Output before read-only data. */
2012 #define TEXT_SECTION_ASM_OP "\t.text"
2014 /* Output before writable (initialized) data. */
2015 #define DATA_SECTION_ASM_OP "\t.data"
2017 /* Output before writable (uninitialized) data. */
2018 #define BSS_SECTION_ASM_OP "\t.bss"
2020 /* In the past there was confusion as to what the argument to .align was
2021 in GAS. For the last several years the rule has been this: for a.out
2022 file formats that argument is LOG, and for all other file formats the
2023 argument is 1<<LOG.
2025 However, GAS now has .p2align and .balign pseudo-ops so to remove any
2026 doubt or guess work, and since this file is used for both a.out and other
2027 file formats, we use one of them. */
2029 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2030 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
2032 /* This is how to output a command to make the user-level label named NAME
2033 defined for reference from other files. */
2035 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2036 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
2038 /* This says how to output an assembler line
2039 to define a global common symbol. */
2041 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2042 ( fputs (".comm ", (FILE)), \
2043 assemble_name ((FILE), (NAME)), \
2044 fprintf ((FILE), ",%u\n", (ROUNDED)))
2046 /* This says how to output an assembler line
2047 to define a local common symbol. */
2049 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2050 ( fputs (".lcomm ", (FILE)), \
2051 assemble_name ((FILE), (NAME)), \
2052 fprintf ((FILE), ",%u\n", (ROUNDED)))
2054 #endif /* TARGET_ELF_ABI */
2055 #endif /* ! GCC_I370_H */