1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 #ifndef TARGET_NO_PROTOTYPE
41 #define TARGET_NO_PROTOTYPE 0
44 extern char *language_string
;
45 extern int profile_block_flag
;
47 #define min(A,B) ((A) < (B) ? (A) : (B))
48 #define max(A,B) ((A) > (B) ? (A) : (B))
52 enum processor_type rs6000_cpu
;
53 struct rs6000_cpu_select rs6000_select
[3] =
55 /* switch name, tune arch */
56 { (char *)0, "--with-cpu=", 1, 1 },
57 { (char *)0, "-mcpu=", 1, 1 },
58 { (char *)0, "-mtune=", 1, 0 },
61 /* Set to non-zero by "fix" operation to indicate that itrunc and
62 uitrunc must be defined. */
64 int rs6000_trunc_used
;
66 /* Set to non-zero once they have been defined. */
68 static int trunc_defined
;
70 /* Set to non-zero once AIX common-mode calls have been defined. */
71 static int common_mode_defined
;
72 /* Save information from a "cmpxx" operation until the branch or scc is
75 rtx rs6000_compare_op0
, rs6000_compare_op1
;
76 int rs6000_compare_fp_p
;
79 /* Label number of label created for -mrelocatable, to call to so we can
80 get the address of the GOT section */
81 int rs6000_pic_labelno
;
84 /* Whether a System V.4 varargs area was created. */
85 int rs6000_sysv_varargs_p
;
87 /* Whether we need to save the TOC register. */
88 int rs6000_save_toc_p
;
90 /* ABI enumeration available for subtarget to use. */
91 enum rs6000_abi rs6000_current_abi
;
93 /* Temporary memory used to convert integer -> float */
94 static rtx stack_temps
[NUM_MACHINE_MODES
];
97 /* Print the options used in the assembly file. */
99 extern char *version_string
, *language_string
;
111 output_option (file
, type
, name
, pos
)
117 int type_len
= strlen (type
);
118 int name_len
= strlen (name
);
120 if (1 + type_len
+ name_len
+ pos
> MAX_LINE
)
122 fprintf (file
, "\n # %s%s", type
, name
);
123 return 3 + type_len
+ name_len
;
125 fprintf (file
, " %s%s", type
, name
);
126 return pos
+ 1 + type_len
+ name_len
;
129 static struct { char *name
; int value
; } m_options
[] = TARGET_SWITCHES
;
132 output_options (file
, f_options
, f_len
, W_options
, W_len
)
134 struct asm_option
*f_options
;
136 struct asm_option
*W_options
;
140 int flags
= target_flags
;
143 fprintf (file
, " # %s %s", language_string
, version_string
);
148 sprintf (opt_string
, "%d", optimize
);
149 pos
= output_option (file
, "-O", opt_string
, pos
);
153 pos
= output_option (file
, "-p", "", pos
);
155 if (profile_block_flag
)
156 pos
= output_option (file
, "-a", "", pos
);
158 if (inhibit_warnings
)
159 pos
= output_option (file
, "-w", "", pos
);
161 for (j
= 0; j
< f_len
; j
++)
163 if (*f_options
[j
].variable
== f_options
[j
].on_value
)
164 pos
= output_option (file
, "-f", f_options
[j
].string
, pos
);
167 for (j
= 0; j
< W_len
; j
++)
169 if (*W_options
[j
].variable
== W_options
[j
].on_value
)
170 pos
= output_option (file
, "-W", W_options
[j
].string
, pos
);
173 for (j
= 0; j
< sizeof m_options
/ sizeof m_options
[0]; j
++)
175 if (m_options
[j
].name
[0] != '\0'
176 && m_options
[j
].value
> 0
177 && ((m_options
[j
].value
& flags
) == m_options
[j
].value
))
179 pos
= output_option (file
, "-m", m_options
[j
].name
, pos
);
180 flags
&= ~ m_options
[j
].value
;
184 for (j
= 0; j
< sizeof (rs6000_select
) / sizeof(rs6000_select
[0]); j
++)
185 if (rs6000_select
[j
].string
!= (char *)0)
186 pos
= output_option (file
, rs6000_select
[j
].name
, rs6000_select
[j
].string
, pos
);
188 fputs ("\n\n", file
);
192 /* Override command line options. Mostly we process the processor
193 type and sometimes adjust other TARGET_ options. */
196 rs6000_override_options (default_cpu
)
200 struct rs6000_cpu_select
*ptr
;
202 /* Simplify the entries below by making a mask for any POWER
203 variant and any PowerPC variant. */
205 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
206 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
207 | MASK_PPC_GFXOPT | MASK_POWERPC64)
208 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
212 char *name
; /* Canonical processor name. */
213 enum processor_type processor
; /* Processor type enum value. */
214 int target_enable
; /* Target flags to enable. */
215 int target_disable
; /* Target flags to disable. */
216 } processor_target_table
[]
217 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
218 POWER_MASKS
| POWERPC_MASKS
},
219 {"power", PROCESSOR_POWER
,
220 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
221 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
222 {"power2", PROCESSOR_POWER
,
223 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
224 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
225 {"powerpc", PROCESSOR_POWERPC
,
226 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
227 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
228 {"rios", PROCESSOR_RIOS1
,
229 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
230 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
231 {"rios1", PROCESSOR_RIOS1
,
232 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
233 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
234 {"rsc", PROCESSOR_PPC601
,
235 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
236 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
237 {"rsc1", PROCESSOR_PPC601
,
238 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
239 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
240 {"rios2", PROCESSOR_RIOS2
,
241 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
242 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
243 {"403", PROCESSOR_PPC403
,
244 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
245 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
246 {"505", PROCESSOR_MPCCORE
,
247 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
248 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
249 {"601", PROCESSOR_PPC601
,
250 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
251 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
252 {"602", PROCESSOR_PPC602
,
253 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
254 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
255 {"603", PROCESSOR_PPC603
,
256 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
257 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
258 {"603e", PROCESSOR_PPC603
,
259 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
260 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
261 {"604", PROCESSOR_PPC604
,
262 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
263 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
264 {"620", PROCESSOR_PPC620
,
265 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
266 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
267 {"821", PROCESSOR_MPCCORE
,
268 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
269 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
270 {"860", PROCESSOR_MPCCORE
,
271 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
272 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
274 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
276 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
277 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
279 profile_block_flag
= 0;
281 /* Identify the processor type */
282 rs6000_select
[0].string
= default_cpu
;
283 rs6000_cpu
= PROCESSOR_DEFAULT
;
285 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
287 ptr
= &rs6000_select
[i
];
288 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
290 for (j
= 0; j
< ptt_size
; j
++)
291 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
294 rs6000_cpu
= processor_target_table
[j
].processor
;
298 target_flags
|= processor_target_table
[j
].target_enable
;
299 target_flags
&= ~processor_target_table
[j
].target_disable
;
305 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
309 /* If -mmultiple or -mno-multiple was explicitly used, don't
310 override with the processor default */
311 if (TARGET_MULTIPLE_SET
)
312 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
314 /* If -mstring or -mno-string was explicitly used, don't
315 override with the processor default */
316 if (TARGET_STRING_SET
)
317 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
319 /* Don't allow -mmultiple or -mstring on little endian systems, because the
320 hardware doesn't support the instructions used in little endian mode */
321 if (!BYTES_BIG_ENDIAN
)
325 target_flags
&= ~MASK_MULTIPLE
;
326 if (TARGET_MULTIPLE_SET
)
327 warning ("-mmultiple is not supported on little endian systems");
332 target_flags
&= ~MASK_STRING
;
333 if (TARGET_STRING_SET
)
334 warning ("-mstring is not supported on little endian systems");
338 #ifdef SUBTARGET_OVERRIDE_OPTIONS
339 SUBTARGET_OVERRIDE_OPTIONS
;
343 /* Create a CONST_DOUBLE from a string. */
346 rs6000_float_const (string
, mode
)
348 enum machine_mode mode
;
350 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
351 return immed_real_const_1 (value
, mode
);
355 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
356 two parts of the constant if the target is little endian. */
359 rs6000_immed_double_const (i0
, i1
, mode
)
360 HOST_WIDE_INT i0
, i1
;
361 enum machine_mode mode
;
363 if (! WORDS_BIG_ENDIAN
)
364 return immed_double_const (i1
, i0
, mode
);
366 return immed_double_const (i0
, i1
, mode
);
370 /* Return non-zero if this function is known to have a null epilogue. */
375 if (reload_completed
)
377 rs6000_stack_t
*info
= rs6000_stack_info ();
379 if (info
->first_gp_reg_save
== 32
380 && info
->first_fp_reg_save
== 64
390 /* Returns 1 always. */
393 any_operand (op
, mode
)
395 enum machine_mode mode
;
400 /* Returns 1 if op is the count register */
401 int count_register_operand(op
, mode
)
403 enum machine_mode mode
;
405 if (GET_CODE (op
) != REG
)
408 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
411 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
417 /* Return 1 if OP is a constant that can fit in a D field. */
420 short_cint_operand (op
, mode
)
422 enum machine_mode mode
;
424 return (GET_CODE (op
) == CONST_INT
425 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
428 /* Similar for a unsigned D field. */
431 u_short_cint_operand (op
, mode
)
433 enum machine_mode mode
;
435 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
438 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
441 non_short_cint_operand (op
, mode
)
443 enum machine_mode mode
;
445 return (GET_CODE (op
) == CONST_INT
446 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
449 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
453 gpc_reg_operand (op
, mode
)
455 enum machine_mode mode
;
457 return (register_operand (op
, mode
)
458 && (GET_CODE (op
) != REG
|| REGNO (op
) >= 67 || REGNO (op
) < 64));
461 /* Returns 1 if OP is either a pseudo-register or a register denoting a
465 cc_reg_operand (op
, mode
)
467 enum machine_mode mode
;
469 return (register_operand (op
, mode
)
470 && (GET_CODE (op
) != REG
471 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
472 || CR_REGNO_P (REGNO (op
))));
475 /* Returns 1 if OP is either a constant integer valid for a D-field or a
476 non-special register. If a register, it must be in the proper mode unless
480 reg_or_short_operand (op
, mode
)
482 enum machine_mode mode
;
484 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
487 /* Similar, except check if the negation of the constant would be valid for
491 reg_or_neg_short_operand (op
, mode
)
493 enum machine_mode mode
;
495 if (GET_CODE (op
) == CONST_INT
)
496 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
498 return gpc_reg_operand (op
, mode
);
501 /* Return 1 if the operand is either a register or an integer whose high-order
505 reg_or_u_short_operand (op
, mode
)
507 enum machine_mode mode
;
509 if (GET_CODE (op
) == CONST_INT
510 && (INTVAL (op
) & 0xffff0000) == 0)
513 return gpc_reg_operand (op
, mode
);
516 /* Return 1 is the operand is either a non-special register or ANY
520 reg_or_cint_operand (op
, mode
)
522 enum machine_mode mode
;
524 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
527 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
528 with one instruction per word. We only do this if we can safely read
529 CONST_DOUBLE_{LOW,HIGH}. */
532 easy_fp_constant (op
, mode
)
534 register enum machine_mode mode
;
538 if (GET_CODE (op
) != CONST_DOUBLE
539 || GET_MODE (op
) != mode
540 || GET_MODE_CLASS (mode
) != MODE_FLOAT
)
543 /* Consider all constants with -msoft-float to be easy */
544 if (TARGET_SOFT_FLOAT
)
547 high
= operand_subword (op
, 0, 0, mode
);
548 low
= operand_subword (op
, 1, 0, mode
);
550 if (high
== 0 || ! input_operand (high
, word_mode
))
553 return (mode
== SFmode
554 || (low
!= 0 && input_operand (low
, word_mode
)));
557 /* Return 1 if the operand is in volatile memory. Note that during the
558 RTL generation phase, memory_operand does not return TRUE for
559 volatile memory references. So this function allows us to
560 recognize volatile references where its safe. */
563 volatile_mem_operand (op
, mode
)
565 enum machine_mode mode
;
567 if (GET_CODE (op
) != MEM
)
570 if (!MEM_VOLATILE_P (op
))
573 if (mode
!= GET_MODE (op
))
576 if (reload_completed
)
577 return memory_operand (op
, mode
);
579 if (reload_in_progress
)
580 return strict_memory_address_p (mode
, XEXP (op
, 0));
582 return memory_address_p (mode
, XEXP (op
, 0));
585 /* Return 1 if the operand is an offsettable memory address. */
588 offsettable_addr_operand (op
, mode
)
590 enum machine_mode mode
;
592 return offsettable_address_p (reload_completed
| reload_in_progress
,
596 /* Return 1 if the operand is either a floating-point register, a pseudo
597 register, or memory. */
600 fp_reg_or_mem_operand (op
, mode
)
602 enum machine_mode mode
;
604 return (memory_operand (op
, mode
)
605 || volatile_mem_operand (op
, mode
)
606 || (register_operand (op
, mode
)
607 && (GET_CODE (op
) != REG
608 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
609 || FP_REGNO_P (REGNO (op
)))));
612 /* Return 1 if the operand is either an easy FP constant (see above) or
616 mem_or_easy_const_operand (op
, mode
)
618 enum machine_mode mode
;
620 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
623 /* Return 1 if the operand is either a non-special register or an item
624 that can be used as the operand of an SI add insn. */
627 add_operand (op
, mode
)
629 enum machine_mode mode
;
631 return (reg_or_short_operand (op
, mode
)
632 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
635 /* Return 1 if OP is a constant but not a valid add_operand. */
638 non_add_cint_operand (op
, mode
)
640 enum machine_mode mode
;
642 return (GET_CODE (op
) == CONST_INT
643 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
644 && (INTVAL (op
) & 0xffff) != 0);
647 /* Return 1 if the operand is a non-special register or a constant that
648 can be used as the operand of an OR or XOR insn on the RS/6000. */
651 logical_operand (op
, mode
)
653 enum machine_mode mode
;
655 return (gpc_reg_operand (op
, mode
)
656 || (GET_CODE (op
) == CONST_INT
657 && ((INTVAL (op
) & 0xffff0000) == 0
658 || (INTVAL (op
) & 0xffff) == 0)));
661 /* Return 1 if C is a constant that is not a logical operand (as
665 non_logical_cint_operand (op
, mode
)
667 enum machine_mode mode
;
669 return (GET_CODE (op
) == CONST_INT
670 && (INTVAL (op
) & 0xffff0000) != 0
671 && (INTVAL (op
) & 0xffff) != 0);
674 /* Return 1 if C is a constant that can be encoded in a mask on the
675 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
676 Reject all ones and all zeros, since these should have been optimized
677 away and confuse the making of MB and ME. */
687 if (c
== 0 || c
== ~0)
690 last_bit_value
= c
& 1;
692 for (i
= 1; i
< 32; i
++)
693 if (((c
>>= 1) & 1) != last_bit_value
)
694 last_bit_value
^= 1, transitions
++;
696 return transitions
<= 2;
699 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
702 mask_operand (op
, mode
)
704 enum machine_mode mode
;
706 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
709 /* Return 1 if the operand is either a non-special register or a
710 constant that can be used as the operand of an RS/6000 logical AND insn. */
713 and_operand (op
, mode
)
715 enum machine_mode mode
;
717 return (reg_or_short_operand (op
, mode
)
718 || logical_operand (op
, mode
)
719 || mask_operand (op
, mode
));
722 /* Return 1 if the operand is a constant but not a valid operand for an AND
726 non_and_cint_operand (op
, mode
)
728 enum machine_mode mode
;
730 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
733 /* Return 1 if the operand is a general register or memory operand. */
736 reg_or_mem_operand (op
, mode
)
738 register enum machine_mode mode
;
740 return (gpc_reg_operand (op
, mode
)
741 || memory_operand (op
, mode
)
742 || volatile_mem_operand (op
, mode
));
745 /* Return 1 if the operand is a general register or memory operand without
746 pre-inc or pre_dec which produces invalid form of PowerPC lwa
750 lwa_operand (op
, mode
)
752 register enum machine_mode mode
;
756 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
757 inner
= SUBREG_REG (inner
);
759 return gpc_reg_operand (inner
, mode
)
760 || (memory_operand (inner
, mode
)
761 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
762 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
765 /* Return 1 if the operand, used inside a MEM, is a valid first argument
766 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
770 call_operand (op
, mode
)
772 enum machine_mode mode
;
774 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
777 return (GET_CODE (op
) == SYMBOL_REF
778 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
782 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
786 current_file_function_operand (op
, mode
)
788 enum machine_mode mode
;
790 return (GET_CODE (op
) == SYMBOL_REF
791 && (SYMBOL_REF_FLAG (op
)
792 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
796 /* Return 1 if this operand is a valid input for a move insn. */
799 input_operand (op
, mode
)
801 enum machine_mode mode
;
803 /* Memory is always valid. */
804 if (memory_operand (op
, mode
))
807 /* For floating-point, easy constants are valid. */
808 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
810 && easy_fp_constant (op
, mode
))
813 /* For floating-point or multi-word mode, the only remaining valid type
815 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
816 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
817 return register_operand (op
, mode
);
819 /* The only cases left are integral modes one word or smaller (we
820 do not get called for MODE_CC values). These can be in any
822 if (register_operand (op
, mode
))
825 /* For integer modes, any constant is ok. */
826 if (GET_CODE (op
) == CONST_INT
)
829 /* A SYMBOL_REF referring to the TOC is valid. */
830 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
833 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
834 directly in the instruction stream */
835 if (DEFAULT_ABI
== ABI_NT
836 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
839 /* Otherwise, we will be doing this SET with an add, so anything valid
840 for an add will be valid. */
841 return add_operand (op
, mode
);
844 /* Return 1 for an operand in small memory on V.4/eabi */
847 small_data_operand (op
, mode
)
849 enum machine_mode mode
;
851 rtx sym_ref
, const_part
;
853 if (DEFAULT_ABI
!= ABI_V4
)
856 if (GET_CODE (op
) != SYMBOL_REF
&& GET_CODE (op
) != CONST
)
859 sym_ref
= eliminate_constant_term (op
, &const_part
);
860 if (!sym_ref
|| GET_CODE (sym_ref
) != SYMBOL_REF
|| *XSTR (sym_ref
, 0) != '@')
867 /* Initialize a variable CUM of type CUMULATIVE_ARGS
868 for a call to a function whose data type is FNTYPE.
869 For a library call, FNTYPE is 0.
871 For incoming args we set the number of arguments in the prototype large
872 so we never return an EXPR_LIST. */
875 init_cumulative_args (cum
, fntype
, libname
, incoming
)
876 CUMULATIVE_ARGS
*cum
;
881 static CUMULATIVE_ARGS zero_cumulative
;
882 enum rs6000_abi abi
= DEFAULT_ABI
;
884 *cum
= zero_cumulative
;
886 cum
->fregno
= FP_ARG_MIN_REG
;
887 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
888 cum
->call_cookie
= CALL_NORMAL
;
892 cum
->nargs_prototype
= 1000; /* don't return an EXPR_LIST */
894 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
897 else if (cum
->prototype
)
898 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
899 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
900 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
903 cum
->nargs_prototype
= 0;
905 cum
->orig_nargs
= cum
->nargs_prototype
;
907 /* Check for DLL import functions */
910 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
911 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
913 if (TARGET_DEBUG_ARG
)
915 fprintf (stderr
, "\ninit_cumulative_args:");
918 tree ret_type
= TREE_TYPE (fntype
);
919 fprintf (stderr
, " ret code = %s,",
920 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
923 if (abi
== ABI_V4
&& incoming
)
924 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
926 if (cum
->call_cookie
== CALL_NT_DLLIMPORT
)
927 fprintf (stderr
, " dllimport,");
929 fprintf (stderr
, " proto = %d, nargs = %d\n",
930 cum
->prototype
, cum
->nargs_prototype
);
934 /* If defined, a C expression that gives the alignment boundary, in bits,
935 of an argument with the specified mode and type. If it is not defined,
936 PARM_BOUNDARY is used for all arguments.
938 Windows NT wants anything >= 8 bytes to be double word aligned.
940 V.4 wants long longs to be double word aligned. */
943 function_arg_boundary (mode
, type
)
944 enum machine_mode mode
;
947 if (DEFAULT_ABI
== ABI_V4
&& mode
== DImode
)
950 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
951 return PARM_BOUNDARY
;
954 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
956 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
959 /* Update the data in CUM to advance over an argument
960 of mode MODE and data type TYPE.
961 (TYPE is null for libcalls where that information may not be available.) */
964 function_arg_advance (cum
, mode
, type
, named
)
965 CUMULATIVE_ARGS
*cum
;
966 enum machine_mode mode
;
970 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
972 cum
->nargs_prototype
--;
974 if (DEFAULT_ABI
== ABI_V4
)
976 /* Long longs must not be split between registers and stack */
977 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
978 && type
&& !AGGREGATE_TYPE_P (type
)
979 && cum
->words
< GP_ARG_NUM_REG
980 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
982 cum
->words
= GP_ARG_NUM_REG
;
985 /* Aggregates get passed as pointers */
986 if (type
&& AGGREGATE_TYPE_P (type
))
989 /* Floats go in registers, & don't occupy space in the GP registers
990 like they do for AIX unless software floating point. */
991 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
993 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
997 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1002 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1003 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1007 if (TARGET_DEBUG_ARG
)
1009 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1010 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1013 /* Determine where to put an argument to a function.
1014 Value is zero to push the argument on the stack,
1015 or a hard register in which to store the argument.
1017 MODE is the argument's machine mode.
1018 TYPE is the data type of the argument (as a tree).
1019 This is null for libcalls where that information may
1021 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1022 the preceding args and about the function being called.
1023 NAMED is nonzero if this argument is a named parameter
1024 (otherwise it is an extra parameter matching an ellipsis).
1026 On RS/6000 the first eight words of non-FP are normally in registers
1027 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1028 Under V.4, the first 8 FP args are in registers.
1030 If this is floating-point and no prototype is specified, we use
1031 both an FP and integer register (or possibly FP reg and stack). Library
1032 functions (when TYPE is zero) always have the proper types for args,
1033 so we can pass the FP value just in one register. emit_library_function
1034 doesn't support EXPR_LIST anyway. */
1037 function_arg (cum
, mode
, type
, named
)
1038 CUMULATIVE_ARGS
*cum
;
1039 enum machine_mode mode
;
1043 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1044 int align_words
= cum
->words
+ align
;
1046 if (TARGET_DEBUG_ARG
)
1048 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1049 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1051 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1052 uses to say fp args were passed in registers. Assume that we don't need the
1053 marker for software floating point, or compiler generated library calls. */
1054 if (mode
== VOIDmode
)
1056 enum rs6000_abi abi
= DEFAULT_ABI
;
1059 && TARGET_HARD_FLOAT
1060 && cum
->nargs_prototype
< 0
1061 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1063 if (cum
->call_cookie
!= CALL_NORMAL
)
1066 return GEN_INT ((cum
->fregno
== FP_ARG_MIN_REG
)
1067 ? CALL_V4_SET_FP_ARGS
1068 : CALL_V4_CLEAR_FP_ARGS
);
1071 return GEN_INT (cum
->call_cookie
);
1076 if (DEFAULT_ABI
!= ABI_V4
)
1080 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1083 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1085 if ((cum
->nargs_prototype
> 0)
1086 || (DEFAULT_ABI
== ABI_V4
) /* V.4 never passes FP values in GP registers */
1088 return gen_rtx (REG
, mode
, cum
->fregno
);
1090 return gen_rtx (EXPR_LIST
, VOIDmode
,
1091 ((align_words
< GP_ARG_NUM_REG
)
1092 ? gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
)
1094 gen_rtx (REG
, mode
, cum
->fregno
));
1097 /* Long longs won't be split between register and stack */
1098 else if (DEFAULT_ABI
== ABI_V4
&&
1099 align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1104 else if (align_words
< GP_ARG_NUM_REG
)
1105 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1110 /* For an arg passed partly in registers and partly in memory,
1111 this is the number of registers used.
1112 For args passed entirely in registers or entirely in memory, zero. */
1115 function_arg_partial_nregs (cum
, mode
, type
, named
)
1116 CUMULATIVE_ARGS
*cum
;
1117 enum machine_mode mode
;
1124 if (DEFAULT_ABI
== ABI_V4
)
1127 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1129 if (cum
->nargs_prototype
>= 0)
1133 if (cum
->words
< GP_ARG_NUM_REG
1134 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1136 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1137 if (ret
&& TARGET_DEBUG_ARG
)
1138 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1146 /* A C expression that indicates when an argument must be passed by
1147 reference. If nonzero for an argument, a copy of that argument is
1148 made in memory and a pointer to the argument is passed instead of
1149 the argument itself. The pointer is passed in whatever way is
1150 appropriate for passing a pointer to that type.
1152 Under V.4, structures and unions are passed by reference. */
1155 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1156 CUMULATIVE_ARGS
*cum
;
1157 enum machine_mode mode
;
1161 if (DEFAULT_ABI
== ABI_V4
&& type
&& AGGREGATE_TYPE_P (type
))
1163 if (TARGET_DEBUG_ARG
)
1164 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1173 /* Perform any needed actions needed for a function that is receiving a
1174 variable number of arguments.
1178 MODE and TYPE are the mode and type of the current parameter.
1180 PRETEND_SIZE is a variable that should be set to the amount of stack
1181 that must be pushed by the prolog to pretend that our caller pushed
1184 Normally, this macro will push all remaining incoming registers on the
1185 stack and set PRETEND_SIZE to the length of the registers pushed. */
1188 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1189 CUMULATIVE_ARGS
*cum
;
1190 enum machine_mode mode
;
1196 rtx save_area
= virtual_incoming_args_rtx
;
1197 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1199 if (TARGET_DEBUG_ARG
)
1201 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1202 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1204 if (DEFAULT_ABI
== ABI_V4
&& !no_rtl
)
1206 rs6000_sysv_varargs_p
= 1;
1207 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1212 int first_reg_offset
= cum
->words
;
1214 if (MUST_PASS_IN_STACK (mode
, type
))
1215 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1217 if (first_reg_offset
> GP_ARG_NUM_REG
)
1218 first_reg_offset
= GP_ARG_NUM_REG
;
1220 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1222 (GP_ARG_MIN_REG
+ first_reg_offset
,
1223 gen_rtx (MEM
, BLKmode
,
1224 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1225 GP_ARG_NUM_REG
- first_reg_offset
,
1226 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1228 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1231 /* Save FP registers if needed. */
1232 if (DEFAULT_ABI
== ABI_V4
&& TARGET_HARD_FLOAT
&& !no_rtl
)
1234 int fregno
= cum
->fregno
;
1235 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1237 if (num_fp_reg
>= 0)
1239 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1240 rtx lab
= gen_label_rtx ();
1241 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1243 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1245 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1246 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1247 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1250 while ( num_fp_reg
-- >= 0)
1252 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1253 gen_rtx (REG
, DFmode
, fregno
++));
1262 /* If defined, is a C expression that produces the machine-specific
1263 code for a call to `__builtin_saveregs'. This code will be moved
1264 to the very beginning of the function, before any parameter access
1265 are made. The return value of this function should be an RTX that
1266 contains the value to use as the return of `__builtin_saveregs'.
1268 The argument ARGS is a `tree_list' containing the arguments that
1269 were passed to `__builtin_saveregs'.
1271 If this macro is not defined, the compiler will output an ordinary
1272 call to the library function `__builtin_saveregs'.
1274 On the Power/PowerPC return the address of the area on the stack
1275 used to hold arguments. Under AIX, this includes the 8 word register
1276 save area. Under V.4 this does not. */
1279 expand_builtin_saveregs (args
)
1282 return virtual_incoming_args_rtx
;
1286 /* Allocate a stack temp. Only allocate one stack temp per type for a
1290 rs6000_stack_temp (mode
, size
)
1291 enum machine_mode mode
;
1294 rtx temp
= stack_temps
[ (int)mode
];
1297 if (temp
== NULL_RTX
)
1299 temp
= assign_stack_local (mode
, size
, 0);
1300 addr
= XEXP (temp
, 0);
1302 if ((size
> 4 && !offsettable_address_p (0, mode
, addr
))
1303 || (size
<= 4 && !memory_address_p (mode
, addr
)))
1305 XEXP (temp
, 0) = copy_addr_to_reg (addr
);
1308 stack_temps
[ (int)mode
] = temp
;
1315 /* Generate a memory reference for expand_block_move, copying volatile,
1316 and other bits from an original memory reference. */
1319 expand_block_move_mem (mode
, addr
, orig_mem
)
1320 enum machine_mode mode
;
1324 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1326 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1327 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1328 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1329 #ifdef MEM_UNALIGNED_P
1330 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1335 /* Expand a block move operation, and return 1 if successful. Return 0
1336 if we should let the compiler generate normal code.
1338 operands[0] is the destination
1339 operands[1] is the source
1340 operands[2] is the length
1341 operands[3] is the alignment */
1343 #define MAX_MOVE_REG 4
1346 expand_block_move (operands
)
1349 rtx orig_dest
= operands
[0];
1350 rtx orig_src
= operands
[1];
1351 rtx bytes_rtx
= operands
[2];
1352 rtx align_rtx
= operands
[3];
1353 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1354 int align
= XINT (align_rtx
, 0);
1364 rtx stores
[MAX_MOVE_REG
];
1367 /* If this is not a fixed size move, just call memcpy */
1371 /* Anything to move? */
1372 bytes
= INTVAL (bytes_rtx
);
1376 /* Don't support real large moves. If string instructions are not used,
1377 then don't generate more than 8 loads. */
1383 else if (!STRICT_ALIGNMENT
)
1388 else if (bytes
> 8*align
)
1391 /* Move the address into scratch registers. */
1392 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1393 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1395 if (TARGET_STRING
) /* string instructions are available */
1397 for ( ; bytes
> 0; bytes
-= move_bytes
)
1399 if (bytes
> 24 /* move up to 32 bytes at a time */
1409 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1410 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1411 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1412 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1415 else if (bytes
> 16 /* move up to 24 bytes at a time */
1423 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1424 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1425 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1426 GEN_INT (move_bytes
),
1429 else if (bytes
> 8 /* move up to 16 bytes at a time */
1435 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1436 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1437 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1438 GEN_INT (move_bytes
),
1441 else if (bytes
> 4 && !TARGET_64BIT
)
1442 { /* move up to 8 bytes at a time */
1443 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1444 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1445 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1446 GEN_INT (move_bytes
),
1449 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1450 { /* move 4 bytes */
1452 tmp_reg
= gen_reg_rtx (SImode
);
1453 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1454 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1456 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1457 { /* move 2 bytes */
1459 tmp_reg
= gen_reg_rtx (HImode
);
1460 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1461 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1463 else if (bytes
== 1) /* move 1 byte */
1466 tmp_reg
= gen_reg_rtx (QImode
);
1467 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1468 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1471 { /* move up to 4 bytes at a time */
1472 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1473 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1474 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1475 GEN_INT (move_bytes
),
1479 if (bytes
> move_bytes
)
1481 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1482 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1487 else /* string instructions not available */
1489 num_reg
= offset
= 0;
1490 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1492 /* Calculate the correct offset for src/dest */
1496 dest_addr
= dest_reg
;
1500 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1501 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1504 /* Generate the appropriate load and store, saving the stores for later */
1505 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1508 tmp_reg
= gen_reg_rtx (DImode
);
1509 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1510 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1512 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1515 tmp_reg
= gen_reg_rtx (SImode
);
1516 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1517 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1519 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1522 tmp_reg
= gen_reg_rtx (HImode
);
1523 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1524 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1529 tmp_reg
= gen_reg_rtx (QImode
);
1530 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1531 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1534 if (num_reg
>= MAX_MOVE_REG
)
1536 for (i
= 0; i
< num_reg
; i
++)
1537 emit_insn (stores
[i
]);
1542 for (i
= 0; i
< num_reg
; i
++)
1543 emit_insn (stores
[i
]);
1550 /* Return 1 if OP is a load multiple operation. It is known to be a
1551 PARALLEL and the first section will be tested. */
1554 load_multiple_operation (op
, mode
)
1556 enum machine_mode mode
;
1558 int count
= XVECLEN (op
, 0);
1563 /* Perform a quick check so we don't blow up below. */
1565 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1566 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1567 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1570 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1571 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1573 for (i
= 1; i
< count
; i
++)
1575 rtx elt
= XVECEXP (op
, 0, i
);
1577 if (GET_CODE (elt
) != SET
1578 || GET_CODE (SET_DEST (elt
)) != REG
1579 || GET_MODE (SET_DEST (elt
)) != SImode
1580 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1581 || GET_CODE (SET_SRC (elt
)) != MEM
1582 || GET_MODE (SET_SRC (elt
)) != SImode
1583 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1584 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1585 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1586 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1593 /* Similar, but tests for store multiple. Here, the second vector element
1594 is a CLOBBER. It will be tested later. */
1597 store_multiple_operation (op
, mode
)
1599 enum machine_mode mode
;
1601 int count
= XVECLEN (op
, 0) - 1;
1606 /* Perform a quick check so we don't blow up below. */
1608 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1609 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1610 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1613 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1614 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1616 for (i
= 1; i
< count
; i
++)
1618 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1620 if (GET_CODE (elt
) != SET
1621 || GET_CODE (SET_SRC (elt
)) != REG
1622 || GET_MODE (SET_SRC (elt
)) != SImode
1623 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1624 || GET_CODE (SET_DEST (elt
)) != MEM
1625 || GET_MODE (SET_DEST (elt
)) != SImode
1626 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1627 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1628 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1629 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1636 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1637 We only check the opcode against the mode of the CC value here. */
1640 branch_comparison_operator (op
, mode
)
1642 enum machine_mode mode
;
1644 enum rtx_code code
= GET_CODE (op
);
1645 enum machine_mode cc_mode
;
1647 if (GET_RTX_CLASS (code
) != '<')
1650 cc_mode
= GET_MODE (XEXP (op
, 0));
1651 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1654 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1655 && cc_mode
== CCUNSmode
)
1658 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1659 && (cc_mode
!= CCUNSmode
))
1665 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1666 We check the opcode against the mode of the CC value and disallow EQ or
1667 NE comparisons for integers. */
1670 scc_comparison_operator (op
, mode
)
1672 enum machine_mode mode
;
1674 enum rtx_code code
= GET_CODE (op
);
1675 enum machine_mode cc_mode
;
1677 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1680 if (GET_RTX_CLASS (code
) != '<')
1683 cc_mode
= GET_MODE (XEXP (op
, 0));
1684 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1687 if (code
== NE
&& cc_mode
!= CCFPmode
)
1690 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1691 && cc_mode
== CCUNSmode
)
1694 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1695 && (cc_mode
!= CCUNSmode
))
1698 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1704 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1705 mask required to convert the result of a rotate insn into a shift
1706 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1709 includes_lshift_p (shiftop
, andop
)
1710 register rtx shiftop
;
1713 int shift_mask
= (~0 << INTVAL (shiftop
));
1715 return (INTVAL (andop
) & ~shift_mask
) == 0;
1718 /* Similar, but for right shift. */
1721 includes_rshift_p (shiftop
, andop
)
1722 register rtx shiftop
;
1725 unsigned shift_mask
= ~0;
1727 shift_mask
>>= INTVAL (shiftop
);
1729 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1732 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1733 for lfq and stfq insns.
1735 Note reg1 and reg2 *must* be hard registers. To be sure we will
1736 abort if we are passed pseudo registers. */
1739 registers_ok_for_quad_peep (reg1
, reg2
)
1742 /* We might have been passed a SUBREG. */
1743 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
1746 return (REGNO (reg1
) == REGNO (reg2
) - 1);
1749 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1750 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1753 addrs_ok_for_quad_peep (addr1
, addr2
)
1760 /* Extract an offset (if used) from the first addr. */
1761 if (GET_CODE (addr1
) == PLUS
)
1763 /* If not a REG, return zero. */
1764 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
1768 reg1
= REGNO (XEXP (addr1
, 0));
1769 /* The offset must be constant! */
1770 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
1772 offset1
= INTVAL (XEXP (addr1
, 1));
1775 else if (GET_CODE (addr1
) != REG
)
1779 reg1
= REGNO (addr1
);
1780 /* This was a simple (mem (reg)) expression. Offset is 0. */
1784 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1785 if (GET_CODE (addr2
) != PLUS
)
1788 if (GET_CODE (XEXP (addr2
, 0)) != REG
1789 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
1792 if (reg1
!= REGNO (XEXP (addr2
, 0)))
1795 /* The offset for the second addr must be 8 more than the first addr. */
1796 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
1799 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1804 /* Return the register class of a scratch register needed to copy IN into
1805 or out of a register in CLASS in MODE. If it can be done directly,
1806 NO_REGS is returned. */
1809 secondary_reload_class (class, mode
, in
)
1810 enum reg_class
class;
1811 enum machine_mode mode
;
1814 int regno
= true_regnum (in
);
1816 if (regno
>= FIRST_PSEUDO_REGISTER
)
1819 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1821 if (class == GENERAL_REGS
|| class == BASE_REGS
1822 || (regno
>= 0 && INT_REGNO_P (regno
)))
1825 /* Constants, memory, and FP registers can go into FP registers. */
1826 if ((regno
== -1 || FP_REGNO_P (regno
))
1827 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
1830 /* We can copy among the CR registers. */
1831 if ((class == CR_REGS
|| class == CR0_REGS
)
1832 && regno
>= 0 && CR_REGNO_P (regno
))
1835 /* Otherwise, we need GENERAL_REGS. */
1836 return GENERAL_REGS
;
1839 /* Given a comparison operation, return the bit number in CCR to test. We
1840 know this is a valid comparison.
1842 SCC_P is 1 if this is for an scc. That means that %D will have been
1843 used instead of %C, so the bits will be in different places.
1845 Return -1 if OP isn't a valid comparison for some reason. */
1852 enum rtx_code code
= GET_CODE (op
);
1853 enum machine_mode cc_mode
;
1857 if (GET_RTX_CLASS (code
) != '<')
1860 cc_mode
= GET_MODE (XEXP (op
, 0));
1861 cc_regnum
= REGNO (XEXP (op
, 0));
1862 base_bit
= 4 * (cc_regnum
- 68);
1864 /* In CCEQmode cases we have made sure that the result is always in the
1865 third bit of the CR field. */
1867 if (cc_mode
== CCEQmode
)
1868 return base_bit
+ 3;
1873 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
1875 return base_bit
+ 2;
1877 return base_bit
+ 1;
1882 /* If floating-point, we will have done a cror to put the bit in the
1883 unordered position. So test that bit. For integer, this is ! LT
1884 unless this is an scc insn. */
1885 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
1888 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
1895 /* Print an operand. Recognize special options, documented below. */
1898 print_operand (file
, x
, code
)
1906 /* These macros test for integers and extract the low-order bits. */
1908 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1909 && GET_MODE (X) == VOIDmode)
1911 #define INT_LOWPART(X) \
1912 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1917 /* Write out an instruction after the call which may be replaced
1918 with glue code by the loader. This depends on the AIX version. */
1919 asm_fprintf (file
, RS6000_CALL_GLUE
);
1923 /* Write the register number of the TOC register. */
1924 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
1928 /* If X is a constant integer whose low-order 5 bits are zero,
1929 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1930 in the AIX assembler where "sri" with a zero shift count
1931 write a trash instruction. */
1932 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
1939 /* Low-order 16 bits of constant, unsigned. */
1941 output_operand_lossage ("invalid %%b value");
1943 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1947 /* This is an optional cror needed for LE or GE floating-point
1948 comparisons. Otherwise write nothing. */
1949 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
1950 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
1952 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1954 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1955 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
1960 /* Similar, except that this is for an scc, so we must be able to
1961 encode the test in a single bit that is one. We do the above
1962 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1963 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
1964 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
1966 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1968 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1970 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
1973 else if (GET_CODE (x
) == NE
)
1975 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1977 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
1978 base_bit
+ 2, base_bit
+ 2);
1983 /* X is a CR register. Print the number of the third bit of the CR */
1984 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1985 output_operand_lossage ("invalid %%E value");
1987 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
1991 /* X is a CR register. Print the shift count needed to move it
1992 to the high-order four bits. */
1993 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1994 output_operand_lossage ("invalid %%f value");
1996 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2000 /* Similar, but print the count for the rotate in the opposite
2002 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2003 output_operand_lossage ("invalid %%F value");
2005 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2009 /* X is a constant integer. If it is negative, print "m",
2010 otherwise print "z". This is to make a aze or ame insn. */
2011 if (GET_CODE (x
) != CONST_INT
)
2012 output_operand_lossage ("invalid %%G value");
2013 else if (INTVAL (x
) >= 0)
2020 /* If constant, output low-order five bits. Otherwise,
2023 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
2025 print_operand (file
, x
, 0);
2029 /* Print `i' if this is a constant, else nothing. */
2035 /* Write the bit number in CCR for jump. */
2038 output_operand_lossage ("invalid %%j code");
2040 fprintf (file
, "%d", i
);
2044 /* Similar, but add one for shift count in rlinm for scc and pass
2045 scc flag to `ccr_bit'. */
2048 output_operand_lossage ("invalid %%J code");
2050 /* If we want bit 31, write a shift count of zero, not 32. */
2051 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2055 /* X must be a constant. Write the 1's complement of the
2058 output_operand_lossage ("invalid %%k value");
2060 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2064 /* Write second word of DImode or DFmode reference. Works on register
2065 or non-indexed memory only. */
2066 if (GET_CODE (x
) == REG
)
2067 fprintf (file
, "%d", REGNO (x
) + 1);
2068 else if (GET_CODE (x
) == MEM
)
2070 /* Handle possible auto-increment. Since it is pre-increment and
2071 we have already done it, we can just use an offset of four. */
2072 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2073 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2074 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2076 output_address (plus_constant (XEXP (x
, 0), 4));
2081 /* MB value for a mask operand. */
2082 if (! mask_operand (x
, VOIDmode
))
2083 output_operand_lossage ("invalid %%m value");
2085 val
= INT_LOWPART (x
);
2087 /* If the high bit is set and the low bit is not, the value is zero.
2088 If the high bit is zero, the value is the first 1 bit we find from
2090 if (val
< 0 && (val
& 1) == 0)
2097 for (i
= 1; i
< 32; i
++)
2098 if ((val
<<= 1) < 0)
2100 fprintf (file
, "%d", i
);
2104 /* Otherwise, look for the first 0 bit from the right. The result is its
2105 number plus 1. We know the low-order bit is one. */
2106 for (i
= 0; i
< 32; i
++)
2107 if (((val
>>= 1) & 1) == 0)
2110 /* If we ended in ...01, I would be 0. The correct value is 31, so
2112 fprintf (file
, "%d", 31 - i
);
2116 /* ME value for a mask operand. */
2117 if (! mask_operand (x
, VOIDmode
))
2118 output_operand_lossage ("invalid %%m value");
2120 val
= INT_LOWPART (x
);
2122 /* If the low bit is set and the high bit is not, the value is 31.
2123 If the low bit is zero, the value is the first 1 bit we find from
2125 if ((val
& 1) && val
>= 0)
2130 else if ((val
& 1) == 0)
2132 for (i
= 0; i
< 32; i
++)
2133 if ((val
>>= 1) & 1)
2136 /* If we had ....10, I would be 0. The result should be
2137 30, so we need 30 - i. */
2138 fprintf (file
, "%d", 30 - i
);
2142 /* Otherwise, look for the first 0 bit from the left. The result is its
2143 number minus 1. We know the high-order bit is one. */
2144 for (i
= 0; i
< 32; i
++)
2145 if ((val
<<= 1) >= 0)
2148 fprintf (file
, "%d", i
);
2152 /* Write the number of elements in the vector times 4. */
2153 if (GET_CODE (x
) != PARALLEL
)
2154 output_operand_lossage ("invalid %%N value");
2156 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2160 /* Similar, but subtract 1 first. */
2161 if (GET_CODE (x
) != PARALLEL
)
2162 output_operand_lossage ("invalid %%N value");
2164 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2168 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2170 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2171 output_operand_lossage ("invalid %%p value");
2173 fprintf (file
, "%d", i
);
2177 /* The operand must be an indirect memory reference. The result
2178 is the register number. */
2179 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2180 || REGNO (XEXP (x
, 0)) >= 32)
2181 output_operand_lossage ("invalid %%P value");
2183 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2187 /* X is a CR register. Print the mask for `mtcrf'. */
2188 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2189 output_operand_lossage ("invalid %%R value");
2191 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2195 /* Low 5 bits of 32 - value */
2197 output_operand_lossage ("invalid %%s value");
2199 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2203 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2204 All floating-point operations except NE branch true and integer
2205 EQ, LT, GT, LTU and GTU also branch true. */
2206 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2207 output_operand_lossage ("invalid %%t value");
2209 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2210 && GET_CODE (x
) != NE
)
2211 || GET_CODE (x
) == EQ
2212 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2213 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2220 /* Opposite of 't': write 4 if this jump operation will branch if true,
2222 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2223 output_operand_lossage ("invalid %%t value");
2225 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2226 && GET_CODE (x
) != NE
)
2227 || GET_CODE (x
) == EQ
2228 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2229 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2236 /* High-order 16 bits of constant. */
2238 output_operand_lossage ("invalid %%u value");
2240 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2244 /* Print `u' if this has an auto-increment or auto-decrement. */
2245 if (GET_CODE (x
) == MEM
2246 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2247 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2252 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2255 fprintf (file
, "%d",
2256 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2258 print_operand (file
, x
, 0);
2262 /* If constant, low-order 16 bits of constant, unsigned.
2263 Otherwise, write normally. */
2265 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2267 print_operand (file
, x
, 0);
2271 if (GET_CODE (x
) == MEM
2272 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2277 /* Like 'L', for third word of TImode */
2278 if (GET_CODE (x
) == REG
)
2279 fprintf (file
, "%d", REGNO (x
) + 2);
2280 else if (GET_CODE (x
) == MEM
)
2282 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2283 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2284 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2286 output_address (plus_constant (XEXP (x
, 0), 8));
2291 /* X is a SYMBOL_REF. Write out the name preceded by a
2292 period and without any trailing data in brackets. Used for function
2293 names. If we are configured for System V (or the embedded ABI) on
2294 the PowerPC, do not emit the period, since those systems do not use
2295 TOCs and the like. */
2296 if (GET_CODE (x
) != SYMBOL_REF
)
2299 if (XSTR (x
, 0)[0] != '.')
2301 switch (DEFAULT_ABI
)
2311 case ABI_AIX_NODESC
:
2319 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2323 /* Like 'L', for last word of TImode. */
2324 if (GET_CODE (x
) == REG
)
2325 fprintf (file
, "%d", REGNO (x
) + 3);
2326 else if (GET_CODE (x
) == MEM
)
2328 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2329 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2330 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2332 output_address (plus_constant (XEXP (x
, 0), 12));
2337 if (GET_CODE (x
) == REG
)
2338 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2339 else if (GET_CODE (x
) == MEM
)
2341 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2342 know the width from the mode. */
2343 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2344 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2345 REGNO (XEXP (XEXP (x
, 0), 0)));
2346 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2347 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2348 REGNO (XEXP (XEXP (x
, 0), 0)));
2350 output_address (XEXP (x
, 0));
2353 output_addr_const (file
, x
);
2357 output_operand_lossage ("invalid %%xn code");
2361 /* Print the address of an operand. */
2364 print_operand_address (file
, x
)
2368 if (GET_CODE (x
) == REG
)
2369 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2370 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
)
2372 output_addr_const (file
, x
);
2373 if (DEFAULT_ABI
== ABI_V4
&& small_data_operand (x
, GET_MODE (x
)))
2374 fprintf (file
, "@sda21(%s)", reg_names
[0]);
2376 #ifdef TARGET_NO_TOC
2377 else if (TARGET_NO_TOC
)
2381 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2383 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2385 if (REGNO (XEXP (x
, 0)) == 0)
2386 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2387 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2389 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2390 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2392 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2393 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2394 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2395 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2397 output_addr_const (file
, XEXP (x
, 1));
2398 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2404 /* This page contains routines that are used to determine what the function
2405 prologue and epilogue code will do and write them out. */
2407 /* Return the first fixed-point register that is required to be saved. 32 if
2411 first_reg_to_save ()
2415 /* Find lowest numbered live register. */
2416 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2417 if (regs_ever_live
[first_reg
])
2420 /* If profiling, then we must save/restore every register that contains
2421 a parameter before/after the .mcount call. Use registers from 30 down
2422 to 23 to do this. Don't use the frame pointer in reg 31.
2424 For now, save enough room for all of the parameter registers. */
2425 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2432 /* Similar, for FP regs. */
2435 first_fp_reg_to_save ()
2439 /* Find lowest numbered live register. */
2440 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2441 if (regs_ever_live
[first_reg
])
2447 /* Return non-zero if this function makes calls. */
2450 rs6000_makes_calls ()
2454 /* If we are profiling, we will be making a call to mcount. */
2458 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2459 if (GET_CODE (insn
) == CALL_INSN
)
2466 /* Calculate the stack information for the current function. This is
2467 complicated by having two separate calling sequences, the AIX calling
2468 sequence and the V.4 calling sequence.
2470 AIX stack frames look like:
2472 SP----> +---------------------------------------+
2473 | back chain to caller | 0
2474 +---------------------------------------+
2476 +---------------------------------------+
2478 +---------------------------------------+
2479 | reserved for compilers | 12
2480 +---------------------------------------+
2481 | reserved for binders | 16
2482 +---------------------------------------+
2483 | saved TOC pointer | 20
2484 +---------------------------------------+
2485 | Parameter save area (P) | 24
2486 +---------------------------------------+
2487 | Alloca space (A) | 24+P
2488 +---------------------------------------+
2489 | Local variable space (L) | 24+P+A
2490 +---------------------------------------+
2491 | Save area for GP registers (G) | 24+P+A+L
2492 +---------------------------------------+
2493 | Save area for FP registers (F) | 24+P+A+L+G
2494 +---------------------------------------+
2495 old SP->| back chain to caller's caller |
2496 +---------------------------------------+
2498 V.4 stack frames look like:
2500 SP----> +---------------------------------------+
2501 | back chain to caller | 0
2502 +---------------------------------------+
2503 | caller's saved LR | 4
2504 +---------------------------------------+
2505 | Parameter save area (P) | 8
2506 +---------------------------------------+
2507 | Alloca space (A) | 8+P
2508 +---------------------------------------+
2509 | Varargs save area (V) | 8+P+A
2510 +---------------------------------------+
2511 | Local variable space (L) | 8+P+A+V
2512 +---------------------------------------+
2513 | saved CR (C) | 8+P+A+V+L
2514 +---------------------------------------+
2515 | Save area for GP registers (G) | 8+P+A+V+L+C
2516 +---------------------------------------+
2517 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2518 +---------------------------------------+
2519 old SP->| back chain to caller's caller |
2520 +---------------------------------------+
2523 A PowerPC Windows/NT frame looks like:
2525 SP----> +---------------------------------------+
2526 | back chain to caller | 0
2527 +---------------------------------------+
2529 +---------------------------------------+
2531 +---------------------------------------+
2533 +---------------------------------------+
2535 +---------------------------------------+
2537 +---------------------------------------+
2538 | Parameter save area (P) | 24
2539 +---------------------------------------+
2540 | Alloca space (A) | 24+P
2541 +---------------------------------------+
2542 | Local variable space (L) | 24+P+A
2543 +---------------------------------------+
2544 | Save area for FP registers (F) | 24+P+A+L
2545 +---------------------------------------+
2546 | Possible alignment area (X) | 24+P+A+L+F
2547 +---------------------------------------+
2548 | Save area for GP registers (G) | 24+P+A+L+F+X
2549 +---------------------------------------+
2550 | Save area for CR (C) | 24+P+A+L+F+X+G
2551 +---------------------------------------+
2552 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2553 +---------------------------------------+
2554 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2555 +---------------------------------------+
2556 old SP->| back chain to caller's caller |
2557 +---------------------------------------+
2559 For NT, there is no specific order to save the registers, but in
2560 order to support __builtin_return_address, the save area for the
2561 link register needs to be in a known place, so we use -4 off of the
2562 old SP. To support calls through pointers, we also allocate a
2563 fixed slot to store the TOC, -8 off the old SP. */
2566 rs6000_stack_info ()
2568 static rs6000_stack_t info
, zero_info
;
2569 rs6000_stack_t
*info_ptr
= &info
;
2570 int reg_size
= TARGET_64BIT
? 8 : 4;
2571 enum rs6000_abi abi
;
2574 /* Zero all fields portably */
2577 /* Select which calling sequence */
2578 info_ptr
->abi
= abi
= DEFAULT_ABI
;
2580 /* Calculate which registers need to be saved & save area size */
2581 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
2582 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
2584 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
2585 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
2587 /* Does this function call anything? */
2588 info_ptr
->calls_p
= rs6000_makes_calls ();
2590 /* Do we need to allocate space to save the toc? */
2591 if (rs6000_save_toc_p
)
2593 info_ptr
->toc_save_p
= 1;
2594 info_ptr
->toc_size
= reg_size
;
2597 /* If this is main and we need to call a function to set things up,
2598 save main's arguments around the call. */
2599 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0)
2601 info_ptr
->main_p
= 1;
2604 info_ptr
->calls_p
= 1;
2606 if (DECL_ARGUMENTS (current_function_decl
))
2611 info_ptr
->main_save_p
= 1;
2612 info_ptr
->main_size
= 0;
2614 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
2615 arg
!= NULL_TREE
&& i
< 8;
2616 (arg
= TREE_CHAIN (arg
)), i
++)
2618 info_ptr
->main_size
+= reg_size
;
2624 /* Determine if we need to save the link register */
2625 if (regs_ever_live
[65] || profile_flag
2626 #ifdef TARGET_RELOCATABLE
2627 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
2629 || (info_ptr
->first_fp_reg_save
!= 64
2630 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
2631 || (abi
== ABI_V4
&& current_function_calls_alloca
)
2632 || info_ptr
->calls_p
)
2634 info_ptr
->lr_save_p
= 1;
2635 regs_ever_live
[65] = 1;
2637 info_ptr
->lr_size
= reg_size
;
2640 /* Determine if we need to save the condition code registers */
2641 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
2643 info_ptr
->cr_save_p
= 1;
2644 if (abi
== ABI_V4
|| abi
== ABI_NT
)
2645 info_ptr
->cr_size
= reg_size
;
2648 /* Determine various sizes */
2649 info_ptr
->reg_size
= reg_size
;
2650 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
2651 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
2652 info_ptr
->vars_size
= ALIGN (get_frame_size (), 8);
2653 info_ptr
->parm_size
= ALIGN (current_function_outgoing_args_size
, 8);
2654 info_ptr
->save_size
= ALIGN (info_ptr
->fp_size
2658 + info_ptr
->toc_size
2659 + info_ptr
->main_size
, 8);
2661 total_raw_size
= (info_ptr
->vars_size
2662 + info_ptr
->parm_size
2663 + info_ptr
->save_size
2664 + info_ptr
->varargs_size
2665 + info_ptr
->fixed_size
);
2667 info_ptr
->total_size
= ALIGN (total_raw_size
, STACK_BOUNDARY
/ BITS_PER_UNIT
);
2669 /* Determine if we need to allocate any stack frame.
2670 For AIX We need to push the stack if a frame pointer is needed (because
2671 the stack might be dynamically adjusted), if we are debugging, if the
2672 total stack size is more than 220 bytes, or if we make calls.
2674 For V.4 we don't have the stack cushion that AIX uses, but assume that
2675 the debugger can handle stackless frames. */
2677 if (info_ptr
->calls_p
)
2678 info_ptr
->push_p
= 1;
2680 else if (abi
== ABI_V4
|| abi
== ABI_NT
)
2681 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
2682 || info_ptr
->lr_save_p
);
2685 info_ptr
->push_p
= (frame_pointer_needed
2686 || write_symbols
!= NO_DEBUG
2687 || info_ptr
->total_size
> 220);
2689 /* Calculate the offsets */
2697 case ABI_AIX_NODESC
:
2698 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2699 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2700 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
2701 info_ptr
->cr_save_offset
= 4;
2702 info_ptr
->lr_save_offset
= 8;
2706 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2707 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2708 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- reg_size
;
2709 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
;
2710 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2711 info_ptr
->lr_save_offset
= reg_size
;
2715 info_ptr
->lr_save_offset
= -4;
2716 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
2717 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2718 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
2719 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
2720 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
2721 info_ptr
->fp_save_offset
-= 4;
2723 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
2727 /* Zero offsets if we're not saving those registers */
2728 if (!info_ptr
->fp_size
)
2729 info_ptr
->fp_save_offset
= 0;
2731 if (!info_ptr
->gp_size
)
2732 info_ptr
->gp_save_offset
= 0;
2734 if (!info_ptr
->lr_save_p
)
2735 info_ptr
->lr_save_offset
= 0;
2737 if (!info_ptr
->cr_save_p
)
2738 info_ptr
->cr_save_offset
= 0;
2740 if (!info_ptr
->toc_save_p
)
2741 info_ptr
->toc_save_offset
= 0;
2743 if (!info_ptr
->main_save_p
)
2744 info_ptr
->main_save_offset
= 0;
2750 debug_stack_info (info
)
2751 rs6000_stack_t
*info
;
2756 info
= rs6000_stack_info ();
2758 fprintf (stderr
, "\nStack information for function %s:\n",
2759 ((current_function_decl
&& DECL_NAME (current_function_decl
))
2760 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
2765 default: abi_string
= "Unknown"; break;
2766 case ABI_NONE
: abi_string
= "NONE"; break;
2767 case ABI_AIX
: abi_string
= "AIX"; break;
2768 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
2769 case ABI_V4
: abi_string
= "V.4"; break;
2770 case ABI_NT
: abi_string
= "NT"; break;
2773 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
2775 if (info
->first_gp_reg_save
!= 32)
2776 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
2778 if (info
->first_fp_reg_save
!= 64)
2779 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
2781 if (info
->lr_save_p
)
2782 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
2784 if (info
->cr_save_p
)
2785 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
2787 if (info
->toc_save_p
)
2788 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
2791 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
2794 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
2797 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
2799 if (info
->main_save_p
)
2800 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
2802 if (info
->gp_save_offset
)
2803 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
2805 if (info
->fp_save_offset
)
2806 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
2808 if (info
->lr_save_offset
)
2809 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
2811 if (info
->cr_save_offset
)
2812 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
2814 if (info
->toc_save_offset
)
2815 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
2817 if (info
->varargs_save_offset
)
2818 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
2820 if (info
->main_save_offset
)
2821 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
2823 if (info
->total_size
)
2824 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
2826 if (info
->varargs_size
)
2827 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
2829 if (info
->vars_size
)
2830 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
2832 if (info
->parm_size
)
2833 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
2835 if (info
->fixed_size
)
2836 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
2839 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
2842 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
2845 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
2848 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
2851 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
2853 if (info
->main_size
)
2854 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
2856 if (info
->save_size
)
2857 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
2859 if (info
->reg_size
!= 4)
2860 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
2862 fprintf (stderr
, "\n");
2866 /* Write function prologue. */
2868 output_prolog (file
, size
)
2872 rs6000_stack_t
*info
= rs6000_stack_info ();
2873 int reg_size
= info
->reg_size
;
2879 store_reg
= "\tstd %s,%d(%s)";
2880 load_reg
= "\tlld %s,%d(%s)";
2884 store_reg
= "\t{st|stw} %s,%d(%s)\n";
2885 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
2888 if (TARGET_DEBUG_STACK
)
2889 debug_stack_info (info
);
2891 /* Write .extern for any function we will call to save and restore fp
2893 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
2894 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2895 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
2896 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
2898 /* Write .extern for truncation routines, if needed. */
2899 if (rs6000_trunc_used
&& ! trunc_defined
)
2901 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
2902 RS6000_ITRUNC
, RS6000_UITRUNC
);
2906 /* Write .extern for AIX common mode routines, if needed. */
2907 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
2909 fputs ("\t.extern __mulh\n", file
);
2910 fputs ("\t.extern __mull\n", file
);
2911 fputs ("\t.extern __divss\n", file
);
2912 fputs ("\t.extern __divus\n", file
);
2913 fputs ("\t.extern __quoss\n", file
);
2914 fputs ("\t.extern __quous\n", file
);
2915 common_mode_defined
= 1;
2918 /* If we use the link register, get it into r0. */
2919 if (info
->lr_save_p
)
2920 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
2922 /* If we need to save CR, put it into r12. */
2923 if (info
->cr_save_p
)
2924 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
2926 /* Do any required saving of fpr's. If only one or two to save, do it
2927 ourself. Otherwise, call function. Note that since they are statically
2928 linked, we do not need a nop following them. */
2929 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
2931 int regno
= info
->first_fp_reg_save
;
2932 int loc
= info
->fp_save_offset
;
2934 for ( ; regno
< 64; regno
++, loc
+= 8)
2935 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
2937 else if (info
->first_fp_reg_save
!= 64)
2938 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
2939 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
2941 /* Now save gpr's. */
2942 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
2944 int regno
= info
->first_gp_reg_save
;
2945 int loc
= info
->gp_save_offset
;
2947 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
2948 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2951 else if (info
->first_gp_reg_save
!= 32)
2952 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
2953 reg_names
[info
->first_gp_reg_save
],
2954 info
->gp_save_offset
,
2957 /* Save main's arguments if we need to call a function */
2959 if (info
->main_save_p
)
2962 int loc
= info
->main_save_offset
;
2963 int size
= info
->main_size
;
2965 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
2966 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2970 /* Save lr if we used it. */
2971 if (info
->lr_save_p
)
2972 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
2974 /* Save CR if we use any that must be preserved. */
2975 if (info
->cr_save_p
)
2976 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
2978 if (info
->toc_save_p
)
2979 asm_fprintf (file
, store_reg
, reg_names
[2], info
->toc_save_offset
, reg_names
[1]);
2981 /* Update stack and set back pointer. */
2984 if (info
->total_size
< 32767)
2986 (TARGET_64BIT
) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n",
2987 reg_names
[1], - info
->total_size
, reg_names
[1]);
2990 int neg_size
= - info
->total_size
;
2991 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2992 reg_names
[0], (neg_size
>> 16) & 0xffff,
2993 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
2995 (TARGET_64BIT
) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n",
2996 reg_names
[1], reg_names
[1], reg_names
[0]);
3000 /* Set frame pointer, if needed. */
3001 if (frame_pointer_needed
)
3002 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
3005 /* If we need to call a function to set things up for main, do so now
3006 before dealing with the TOC. */
3011 switch (DEFAULT_ABI
)
3013 case ABI_AIX
: prefix
= "."; break;
3014 case ABI_NT
: prefix
= ".."; break;
3017 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
3018 #ifdef RS6000_CALL_GLUE2
3019 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
3021 #ifdef RS6000_CALL_GLUE
3022 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
3023 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
3027 if (info
->main_save_p
)
3031 int size
= info
->main_size
;
3033 if (info
->total_size
< 32767)
3035 loc
= info
->total_size
+ info
->main_save_offset
;
3036 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3037 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3040 { /* for large frames, reg 0 above contains -frame size */
3041 loc
= info
->main_save_offset
;
3042 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3045 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3046 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3053 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3054 TOC_TABLE address into register 30. */
3055 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3059 #ifdef TARGET_RELOCATABLE
3060 if (TARGET_RELOCATABLE
)
3062 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3063 fputs ("\tbl ", file
);
3064 assemble_name (file
, buf
);
3067 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3068 fprintf (file
, "\tmflr %s\n", reg_names
[30]);
3070 asm_fprintf (file
, TARGET_64BIT
? "\tld" : "\t{l|lwz}");
3071 fprintf (file
, " %s,(", reg_names
[0]);
3072 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3073 assemble_name (file
, buf
);
3075 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3076 assemble_name (file
, buf
);
3077 fprintf (file
, ")(%s)\n", reg_names
[30]);
3078 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3079 reg_names
[30], reg_names
[0], reg_names
[30]);
3080 rs6000_pic_labelno
++;
3085 switch (DEFAULT_ABI
)
3088 case ABI_AIX_NODESC
:
3091 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3092 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[30], reg_names
[0]);
3093 assemble_name (file
, buf
);
3094 asm_fprintf (file
, "@ha\n");
3095 if (TARGET_NEW_MNEMONICS
)
3097 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[30], reg_names
[30]);
3098 assemble_name (file
, buf
);
3099 asm_fprintf (file
, "@l\n");
3103 asm_fprintf (file
, "\tcal %s,", reg_names
[30]);
3104 assemble_name (file
, buf
);
3105 asm_fprintf (file
, "@l(%s)\n", reg_names
[30]);
3115 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3116 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[30]);
3117 assemble_name (file
, buf
);
3118 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3123 if (DEFAULT_ABI
== ABI_NT
)
3125 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3126 fputs (".b:\n", file
);
3130 /* Write function epilogue. */
3133 output_epilog (file
, size
)
3137 rs6000_stack_t
*info
= rs6000_stack_info ();
3138 char *load_reg
= (TARGET_64BIT
) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n";
3139 rtx insn
= get_last_insn ();
3142 /* Forget about any temporaries created */
3143 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3144 stack_temps
[i
] = NULL_RTX
;
3146 /* If the last insn was a BARRIER, we don't have to write anything except
3148 if (GET_CODE (insn
) == NOTE
)
3149 insn
= prev_nonnote_insn (insn
);
3150 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3152 /* If we have a frame pointer, a call to alloca, or a large stack
3153 frame, restore the old stack pointer using the backchain. Otherwise,
3154 we know what size to update it with. */
3155 if (frame_pointer_needed
|| current_function_calls_alloca
3156 || info
->total_size
> 32767)
3157 asm_fprintf (file
, load_reg
, reg_names
[1], 0, reg_names
[1]);
3158 else if (info
->push_p
)
3160 if (TARGET_NEW_MNEMONICS
)
3161 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3163 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3166 /* Get the old lr if we saved it. */
3167 if (info
->lr_save_p
)
3168 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
3170 /* Get the old cr if we saved it. */
3171 if (info
->cr_save_p
)
3172 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
3174 /* Set LR here to try to overlap restores below. */
3175 if (info
->lr_save_p
)
3176 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3178 /* Restore gpr's. */
3179 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3181 int regno
= info
->first_gp_reg_save
;
3182 int loc
= info
->gp_save_offset
;
3183 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
3185 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3186 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3189 else if (info
->first_gp_reg_save
!= 32)
3190 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3191 reg_names
[info
->first_gp_reg_save
],
3192 info
->gp_save_offset
,
3195 /* Restore fpr's if we can do it without calling a function. */
3196 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3198 int regno
= info
->first_fp_reg_save
;
3199 int loc
= info
->fp_save_offset
;
3201 for ( ; regno
< 64; regno
++, loc
+= 8)
3202 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
3205 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3207 if (info
->cr_save_p
)
3208 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3209 (regs_ever_live
[70] != 0) * 0x20
3210 + (regs_ever_live
[71] != 0) * 0x10
3211 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3213 /* If we have to restore more than two FP registers, branch to the
3214 restore function. It will return to our caller. */
3215 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3216 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3217 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3219 asm_fprintf (file
, "\t{br|blr}\n");
3222 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3225 We don't output a traceback table if -finhibit-size-directive was
3226 used. The documentation for -finhibit-size-directive reads
3227 ``don't output a @code{.size} assembler directive, or anything
3228 else that would cause trouble if the function is split in the
3229 middle, and the two halves are placed at locations far apart in
3230 memory.'' The traceback table has this property, since it
3231 includes the offset from the start of the function to the
3232 traceback table itself.
3234 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3235 different traceback table. */
3236 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3238 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3239 int fixed_parms
, float_parms
, parm_info
;
3242 while (*fname
== '.') /* V.4 encodes . in the name */
3245 /* Need label immediately before tbtab, so we can compute its offset
3246 from the function start. */
3249 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3250 ASM_OUTPUT_LABEL (file
, fname
);
3252 /* The .tbtab pseudo-op can only be used for the first eight
3253 expressions, since it can't handle the possibly variable
3254 length fields that follow. However, if you omit the optional
3255 fields, the assembler outputs zeros for all optional fields
3256 anyways, giving each variable length field is minimum length
3257 (as defined in sys/debug.h). Thus we can not use the .tbtab
3258 pseudo-op at all. */
3260 /* An all-zero word flags the start of the tbtab, for debuggers
3261 that have to find it by searching forward from the entry
3262 point or from the current pc. */
3263 fputs ("\t.long 0\n", file
);
3265 /* Tbtab format type. Use format type 0. */
3266 fputs ("\t.byte 0,", file
);
3268 /* Language type. Unfortunately, there doesn't seem to be any
3269 official way to get this info, so we use language_string. C
3270 is 0. C++ is 9. No number defined for Obj-C, so use the
3271 value for C for now. */
3272 if (! strcmp (language_string
, "GNU C")
3273 || ! strcmp (language_string
, "GNU Obj-C"))
3275 else if (! strcmp (language_string
, "GNU F77"))
3277 else if (! strcmp (language_string
, "GNU Ada"))
3279 else if (! strcmp (language_string
, "GNU PASCAL"))
3281 else if (! strcmp (language_string
, "GNU C++"))
3285 fprintf (file
, "%d,", i
);
3287 /* 8 single bit fields: global linkage (not set for C extern linkage,
3288 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3289 from start of procedure stored in tbtab, internal function, function
3290 has controlled storage, function has no toc, function uses fp,
3291 function logs/aborts fp operations. */
3292 /* Assume that fp operations are used if any fp reg must be saved. */
3293 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
3295 /* 6 bitfields: function is interrupt handler, name present in
3296 proc table, function calls alloca, on condition directives
3297 (controls stack walks, 3 bits), saves condition reg, saves
3299 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3300 set up as a frame pointer, even when there is no alloca call. */
3301 fprintf (file
, "%d,",
3302 ((1 << 6) | (frame_pointer_needed
<< 5)
3303 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
3305 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3307 fprintf (file
, "%d,",
3308 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
3310 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3311 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
3314 /* Compute the parameter info from the function decl argument
3317 int next_parm_info_bit
;
3319 next_parm_info_bit
= 31;
3324 for (decl
= DECL_ARGUMENTS (current_function_decl
);
3325 decl
; decl
= TREE_CHAIN (decl
))
3327 rtx parameter
= DECL_INCOMING_RTL (decl
);
3328 enum machine_mode mode
= GET_MODE (parameter
);
3330 if (GET_CODE (parameter
) == REG
)
3332 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3340 else if (mode
== DFmode
)
3345 /* If only one bit will fit, don't or in this entry. */
3346 if (next_parm_info_bit
> 0)
3347 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
3348 next_parm_info_bit
-= 2;
3352 fixed_parms
+= ((GET_MODE_SIZE (mode
)
3353 + (UNITS_PER_WORD
- 1))
3355 next_parm_info_bit
-= 1;
3361 /* Number of fixed point parameters. */
3362 /* This is actually the number of words of fixed point parameters; thus
3363 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3364 fprintf (file
, "%d,", fixed_parms
);
3366 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3368 /* This is actually the number of fp registers that hold parameters;
3369 and thus the maximum value is 13. */
3370 /* Set parameters on stack bit if parameters are not in their original
3371 registers, regardless of whether they are on the stack? Xlc
3372 seems to set the bit when not optimizing. */
3373 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
3375 /* Optional fields follow. Some are variable length. */
3377 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3379 /* There is an entry for each parameter in a register, in the order that
3380 they occur in the parameter list. Any intervening arguments on the
3381 stack are ignored. If the list overflows a long (max possible length
3382 34 bits) then completely leave off all elements that don't fit. */
3383 /* Only emit this long if there was at least one parameter. */
3384 if (fixed_parms
|| float_parms
)
3385 fprintf (file
, "\t.long %d\n", parm_info
);
3387 /* Offset from start of code to tb table. */
3388 fputs ("\t.long ", file
);
3389 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3390 RS6000_OUTPUT_BASENAME (file
, fname
);
3392 RS6000_OUTPUT_BASENAME (file
, fname
);
3395 /* Interrupt handler mask. */
3396 /* Omit this long, since we never set the interrupt handler bit
3399 /* Number of CTL (controlled storage) anchors. */
3400 /* Omit this long, since the has_ctl bit is never set above. */
3402 /* Displacement into stack of each CTL anchor. */
3403 /* Omit this list of longs, because there are no CTL anchors. */
3405 /* Length of function name. */
3406 fprintf (file
, "\t.short %d\n", strlen (fname
));
3408 /* Function name. */
3409 assemble_string (fname
, strlen (fname
));
3411 /* Register for alloca automatic storage; this is always reg 31.
3412 Only emit this if the alloca bit was set above. */
3413 if (frame_pointer_needed
)
3414 fputs ("\t.byte 31\n", file
);
3417 /* Reset varargs and save TOC indicator */
3418 rs6000_sysv_varargs_p
= 0;
3419 rs6000_save_toc_p
= 0;
3421 if (DEFAULT_ABI
== ABI_NT
)
3423 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3424 fputs (".e:\nFE_MOT_RESVD..", file
);
3425 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3426 fputs (":\n", file
);
3430 /* Output a TOC entry. We derive the entry name from what is
3434 output_toc (file
, x
, labelno
)
3448 /* if we're going to put a double constant in the TOC, make sure it's
3449 aligned properly when strict alignment is on. */
3450 if (GET_CODE (x
) == CONST_DOUBLE
3452 && GET_MODE (x
) == DFmode
3453 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
3454 ASM_OUTPUT_ALIGN (file
, 3);
3458 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
3460 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
3461 fprintf (file
, "%d = .-", labelno
);
3462 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
3463 fputs ("1\n", file
);
3466 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
3468 /* Handle FP constants specially. Note that if we have a minimal
3469 TOC, things we put here aren't actually in the TOC, so we can allow
3471 if (GET_CODE (x
) == CONST_DOUBLE
3472 && GET_MODE (x
) == DFmode
3473 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3478 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
3479 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3480 if (TARGET_MINIMAL_TOC
)
3481 fprintf (file
, "\t.long %ld\n\t.long %ld\n", l
[0], l
[1]);
3483 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3484 l
[0], l
[1], l
[0], l
[1]);
3487 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
3488 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3490 rtx val
= operand_subword (x
, 0, 0, SFmode
);
3492 if (val
== 0 || GET_CODE (val
) != CONST_INT
)
3495 if (TARGET_MINIMAL_TOC
)
3496 fprintf (file
, "\t.long %d\n", INTVAL (val
));
3498 fprintf (file
, "\t.tc FS_%x[TC],%d\n", INTVAL (val
), INTVAL (val
));
3502 if (GET_CODE (x
) == CONST
)
3504 base
= XEXP (XEXP (x
, 0), 0);
3505 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
3508 if (GET_CODE (base
) == SYMBOL_REF
)
3509 name
= XSTR (base
, 0);
3510 else if (GET_CODE (base
) == LABEL_REF
)
3511 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
3512 else if (GET_CODE (base
) == CODE_LABEL
)
3513 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
3517 if (TARGET_MINIMAL_TOC
)
3518 fputs ("\t.long ", file
);
3521 STRIP_NAME_ENCODING (real_name
, name
);
3522 fprintf (file
, "\t.tc %s", real_name
);
3525 fprintf (file
, ".N%d", - offset
);
3527 fprintf (file
, ".P%d", offset
);
3529 fputs ("[TC],", file
);
3531 output_addr_const (file
, x
);
3535 /* Output an assembler pseudo-op to write an ASCII string of N characters
3536 starting at P to FILE.
3538 On the RS/6000, we have to do this using the .byte operation and
3539 write out special characters outside the quoted string.
3540 Also, the assembler is broken; very long strings are truncated,
3541 so we must artificially break them up early. */
3544 output_ascii (file
, p
, n
)
3550 int i
, count_string
;
3551 char *for_string
= "\t.byte \"";
3552 char *for_decimal
= "\t.byte ";
3553 char *to_close
= NULL
;
3556 for (i
= 0; i
< n
; i
++)
3559 if (c
>= ' ' && c
< 0177)
3562 fputs (for_string
, file
);
3565 /* Write two quotes to get one. */
3573 for_decimal
= "\"\n\t.byte ";
3577 if (count_string
>= 512)
3579 fputs (to_close
, file
);
3581 for_string
= "\t.byte \"";
3582 for_decimal
= "\t.byte ";
3590 fputs (for_decimal
, file
);
3591 fprintf (file
, "%d", c
);
3593 for_string
= "\n\t.byte \"";
3600 /* Now close the string if we have written one. Then end the line. */
3602 fprintf (file
, to_close
);
3605 /* Generate a unique section name for FILENAME for a section type
3606 represented by SECTION_DESC. Output goes into BUF.
3608 SECTION_DESC can be any string, as long as it is different for each
3609 possible section type.
3611 We name the section in the same manner as xlc. The name begins with an
3612 underscore followed by the filename (after stripping any leading directory
3613 names) with the last period replaced by the string SECTION_DESC. If
3614 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3618 rs6000_gen_section_name (buf
, filename
, section_desc
)
3623 char *q
, *after_last_slash
, *last_period
;
3627 after_last_slash
= filename
;
3628 for (q
= filename
; *q
; q
++)
3631 after_last_slash
= q
+ 1;
3636 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
3637 *buf
= (char *) permalloc (len
);
3642 for (q
= after_last_slash
; *q
; q
++)
3644 if (q
== last_period
)
3646 strcpy (p
, section_desc
);
3647 p
+= strlen (section_desc
);
3650 else if (isalnum (*q
))
3654 if (last_period
== 0)
3655 strcpy (p
, section_desc
);
3660 /* Write function profiler code. */
3663 output_function_profiler (file
, labelno
)
3667 /* The last used parameter register. */
3672 if (DEFAULT_ABI
!= ABI_AIX
)
3675 /* Set up a TOC entry for the profiler label. */
3677 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
3678 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
3679 if (TARGET_MINIMAL_TOC
)
3681 fputs ("\t.long ", file
);
3682 assemble_name (file
, buf
);
3687 fputs ("\t.tc\t", file
);
3688 assemble_name (file
, buf
);
3689 fputs ("[TC],", file
);
3690 assemble_name (file
, buf
);
3695 /* Figure out last used parameter register. The proper thing to do is
3696 to walk incoming args of the function. A function might have live
3697 parameter registers even if it has no incoming args. */
3699 for (last_parm_reg
= 10;
3700 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
3704 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3705 it might be set up as the frame pointer. */
3707 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3708 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
3710 /* Load location address into r3, and call mcount. */
3712 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
3713 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
3714 assemble_name (file
, buf
);
3715 asm_fprintf (file
, "(%s)\n\tbl .mcount\n", reg_names
[2]);
3717 /* Restore parameter registers. */
3719 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3720 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
3723 /* Adjust the cost of a scheduling dependency. Return the new cost of
3724 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3727 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
3733 if (! recog_memoized (insn
))
3736 if (REG_NOTE_KIND (link
) != 0)
3739 if (REG_NOTE_KIND (link
) == 0)
3741 /* Data dependency; DEP_INSN writes a register that INSN reads some
3744 /* Tell the first scheduling pass about the latency between a mtctr
3745 and bctr (and mtlr and br/blr). The first scheduling pass will not
3746 know about this latency since the mtctr instruction, which has the
3747 latency associated to it, will be generated by reload. */
3748 if (get_attr_type (insn
) == TYPE_JMPREG
)
3749 return TARGET_POWER
? 5 : 4;
3751 /* Fall out to return default cost. */
3757 /* Return how many instructions the machine can issue per cycle */
3758 int get_issue_rate()
3760 switch (rs6000_cpu_attr
) {
3781 /* Output insns to flush the {data|instruction} caches after building a
3785 rs6000_sync_trampoline (addr
)
3788 enum machine_mode pmode
= Pmode
;
3789 rtx reg
= gen_reg_rtx (pmode
);
3792 int size
= rs6000_trampoline_size ();
3793 rtx (*sub_fcn
) PROTO ((rtx
, rtx
, rtx
));
3794 rtx (*cmp_fcn
) PROTO ((rtx
, rtx
));
3799 abort (); /* no cmpdi function yet */
3803 sub_fcn
= gen_subsi3
;
3804 cmp_fcn
= gen_cmpsi
;
3807 addr
= force_reg (pmode
, addr
);
3808 mem2
= gen_rtx (MEM
, pmode
, gen_rtx (PLUS
, pmode
, addr
, reg
));
3809 mem1
= gen_rtx (MEM
, pmode
, addr
);
3811 /* Issue a loop of dcbst's to flush the data cache */
3812 emit_move_insn (reg
, GEN_INT (size
-4));
3813 label
= gen_label_rtx ();
3815 emit_insn (gen_dcbst (mem2
, addr
, reg
));
3816 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3817 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3818 emit_jump_insn (gen_bgt (label
));
3820 /* Issue a sync after the dcbst's to let things settle down */
3821 emit_insn (gen_sync (mem1
));
3823 /* Issue a loop of icbi's to flush the instruction cache */
3824 emit_move_insn (reg
, GEN_INT (size
-4));
3825 label
= gen_label_rtx ();
3827 emit_insn (gen_icbi (mem2
, addr
, reg
));
3828 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3829 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3830 emit_jump_insn (gen_bgt (label
));
3832 /* Issue a sync after the icbi's to let things settle down */
3833 emit_insn (gen_sync (mem1
));
3835 /* Finally issue an isync to synchronize the icache */
3836 emit_insn (gen_isync (mem1
));
3840 /* Output assembler code for a block containing the constant parts
3841 of a trampoline, leaving space for the variable parts.
3843 The trampoline should set the static chain pointer to value placed
3844 into the trampoline and should branch to the specified routine. */
3847 rs6000_trampoline_template (file
)
3850 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
3851 char *r0
= reg_names
[0];
3853 switch (DEFAULT_ABI
)
3858 /* Under AIX, this is not code at all, but merely a data area,
3859 since that is the way all functions are called. The first word is
3860 the address of the function, the second word is the TOC pointer (r2),
3861 and the third word is the static chain value. */
3863 fprintf (file
, "\t.long %s\n", (TARGET_64BIT
) ? "0,0,0,0,0,0" : "0,0,0");
3867 /* V.4/eabi function pointers are just a single pointer, so we need to
3868 do the full gory code to load up the static chain. */
3870 case ABI_AIX_NODESC
:
3871 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
)
3876 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3877 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3878 fprintf (file
, "\t.long 0,0,0,0\n"); /* offset 8 */
3879 fprintf (file
, ".LTRAMP1:\n");
3880 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3881 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3882 fprintf (file
, "\tld %s,0(%s)\n", r0
, sc
); /* offset 36 */
3883 fprintf (file
, "\tld %s,8(%s)\n", sc
, sc
); /* offset 40 */
3884 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3885 fprintf (file
, "\tbctr\n"); /* offset 48 */
3889 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3890 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3891 fprintf (file
, "\t.long 0,0\n"); /* offset 8 */
3892 fprintf (file
, ".LTRAMP1:\n");
3893 fprintf (file
, "\tmflr %s\n", sc
); /* offset 20 */
3894 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 24 */
3895 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 28 */
3896 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 32 */
3897 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 36 */
3898 fprintf (file
, "\tbctr\n"); /* offset 40 */
3902 /* NT function pointers point to a two word area (real address, TOC)
3903 which unfortunately does not include a static chain field. So we
3904 need to have a 2 word area followed by the code to load up the
3907 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
|| TARGET_64BIT
)
3910 fprintf (file
, "\t.ualong 0,0\n"); /* offset 0 */
3911 fprintf (file
, "\tmflr %s\n", r0
); /* offset 8 */
3912 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 12 */
3913 fprintf (file
, "\t.ualong 0,0\n"); /* offset 16 */
3914 fprintf (file
, ".LTRAMP1:\n");
3915 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3916 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3917 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 36 */
3918 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 40 */
3919 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3920 fprintf (file
, "\tbctr\n"); /* offset 48 */
3927 /* Length in units of the trampoline for entering a nested function. */
3930 rs6000_trampoline_size ()
3934 switch (DEFAULT_ABI
)
3940 ret
= (TARGET_64BIT
) ? 24 : 12;
3944 case ABI_AIX_NODESC
:
3945 ret
= (TARGET_64BIT
? 48 : 40);
3956 /* Emit RTL insns to initialize the variable parts of a trampoline.
3957 FNADDR is an RTX for the address of the function's pure code.
3958 CXT is an RTX for the static chain value for the function. */
3961 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
3966 rtx reg
, reg2
, reg3
;
3968 switch (DEFAULT_ABI
)
3973 /* Under AIX, just build the 3 word function descriptor */
3975 emit_move_insn (gen_rtx (MEM
, Pmode
,
3976 memory_address (Pmode
, (addr
))),
3977 gen_rtx (MEM
, Pmode
,
3978 memory_address (Pmode
, (fnaddr
))));
3979 emit_move_insn (gen_rtx (MEM
, Pmode
,
3980 memory_address (Pmode
,
3981 plus_constant ((addr
), 4))),
3982 gen_rtx (MEM
, Pmode
,
3983 memory_address (Pmode
,
3984 plus_constant ((fnaddr
), 4))));
3985 emit_move_insn (gen_rtx (MEM
, Pmode
,
3986 memory_address (Pmode
,
3987 plus_constant ((addr
), 8))),
3988 force_reg (Pmode
, (cxt
)));
3991 /* Under V.4/eabi, update the two words after the bl to have the real
3992 function address and the static chain. */
3994 case ABI_AIX_NODESC
:
3995 reg
= gen_reg_rtx (Pmode
);
3997 emit_move_insn (reg
, fnaddr
);
3998 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 8)), reg
);
3999 emit_move_insn (gen_rtx (MEM
, Pmode
,
4000 plus_constant (addr
, (TARGET_64BIT
? 16 : 12))),
4003 rs6000_sync_trampoline (addr
);
4006 /* Under NT, update the first 2 words to look like a normal descriptor, and
4007 then fill in the fields with the function address and static chain after
4008 the bl instruction. */
4010 reg
= gen_reg_rtx (Pmode
);
4011 reg2
= gen_reg_rtx (Pmode
);
4012 reg3
= gen_reg_rtx (Pmode
);
4014 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 4)),
4015 gen_rtx (REG
, Pmode
, 2));
4016 emit_move_insn (reg
, fnaddr
);
4017 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg
));
4018 emit_move_insn (reg3
, plus_constant (addr
, 8));
4019 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 16)), reg
);
4020 emit_move_insn (gen_rtx (MEM
, Pmode
, addr
), reg3
);
4021 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 20)), cxt
);
4022 rs6000_sync_trampoline (addr
);
4030 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4031 with arguments ARGS is a valid machine specific attribute for DECL.
4032 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4035 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
4044 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4045 with arguments ARGS is a valid machine specific attribute for TYPE.
4046 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4049 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
4055 if (TREE_CODE (type
) != FUNCTION_TYPE
4056 && TREE_CODE (type
) != FIELD_DECL
4057 && TREE_CODE (type
) != TYPE_DECL
)
4060 if (DEFAULT_ABI
== ABI_NT
)
4062 /* Stdcall attribute says callee is responsible for popping arguments
4063 if they are not variable. */
4064 if (is_attribute_p ("stdcall", identifier
))
4065 return (args
== NULL_TREE
);
4067 /* Cdecl attribute says the callee is a normal C declaration */
4068 if (is_attribute_p ("cdecl", identifier
))
4069 return (args
== NULL_TREE
);
4071 /* Dllimport attribute says says the caller is to call the function
4072 indirectly through a __imp_<name> pointer. */
4073 if (is_attribute_p ("dllimport", identifier
))
4074 return (args
== NULL_TREE
);
4076 /* Dllexport attribute says says the callee is to create a __imp_<name>
4078 if (is_attribute_p ("dllexport", identifier
))
4079 return (args
== NULL_TREE
);
4085 /* If defined, a C expression whose value is zero if the attributes on
4086 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4087 two if they are nearly compatible (which causes a warning to be
4091 rs6000_comp_type_attributes (type1
, type2
)
4098 /* If defined, a C statement that assigns default attributes to newly
4102 rs6000_set_default_type_attributes (type
)
4107 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4109 rs6000_dll_import_ref (call_ref
)
4118 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4121 call_name
= XSTR (call_ref
, 0);
4122 len
= sizeof ("__imp_") + strlen (call_name
);
4124 reg2
= gen_reg_rtx (Pmode
);
4126 strcpy (p
, "__imp_");
4127 strcat (p
, call_name
);
4128 node
= get_identifier (p
);
4130 reg1
= force_reg (Pmode
, gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
)));
4131 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg1
));
4137 /* A C statement or statements to switch to the appropriate section
4138 for output of RTX in mode MODE. You can assume that RTX is some
4139 kind of constant in RTL. The argument MODE is redundant except in
4140 the case of a `const_int' rtx. Select the section by calling
4141 `text_section' or one of the alternatives for other sections.
4143 Do not define this macro if you put all constants in the read-only
4149 rs6000_select_rtx_section (mode
, x
)
4150 enum machine_mode mode
;
4153 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
4155 else if (TARGET_SDATA
&& GET_MODE_SIZE (mode
) > 0 && GET_MODE_SIZE (mode
) <= 8)
4161 /* A C statement or statements to switch to the appropriate
4162 section for output of DECL. DECL is either a `VAR_DECL' node
4163 or a constant of some sort. RELOC indicates whether forming
4164 the initial value of DECL requires link-time relocations. */
4167 rs6000_select_section (decl
, reloc
)
4171 int size
= int_size_in_bytes (TREE_TYPE (decl
));
4173 if (TREE_CODE (decl
) == STRING_CST
)
4175 if ((! flag_writable_strings
) && TARGET_SDATA
&& (size
<= 8))
4177 else if (! flag_writable_strings
)
4179 else if (TARGET_SDATA
&& (size
<= 8))
4184 else if (TREE_CODE (decl
) == VAR_DECL
)
4186 if ((flag_pic
&& reloc
)
4187 || !TREE_READONLY (decl
)
4188 || TREE_SIDE_EFFECTS (decl
)
4189 || !DECL_INITIAL (decl
)
4190 || (DECL_INITIAL (decl
) != error_mark_node
4191 && !TREE_CONSTANT (DECL_INITIAL (decl
))))
4193 if (TARGET_SDATA
&& (size
<= 8) && (size
> 0))
4200 if (TARGET_SDATA
&& (size
<= 8) && (size
> 0))
4209 #endif /* USING_SVR4_H */