2 Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
25 #include "diagnostic-core.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
33 /* Define a set of ISAs which are available when a given ISA is
34 enabled. MMX and SSE ISAs are handled separately. */
36 #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
37 #define OPTION_MASK_ISA_3DNOW_SET \
38 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
40 #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
41 #define OPTION_MASK_ISA_SSE2_SET \
42 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
43 #define OPTION_MASK_ISA_SSE3_SET \
44 (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
45 #define OPTION_MASK_ISA_SSSE3_SET \
46 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
47 #define OPTION_MASK_ISA_SSE4_1_SET \
48 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
49 #define OPTION_MASK_ISA_SSE4_2_SET \
50 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
51 #define OPTION_MASK_ISA_AVX_SET \
52 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET)
53 #define OPTION_MASK_ISA_FMA_SET \
54 (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
55 #define OPTION_MASK_ISA_AVX2_SET \
56 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
57 #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
58 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
60 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
62 #define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
64 #define OPTION_MASK_ISA_SSE4A_SET \
65 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
66 #define OPTION_MASK_ISA_FMA4_SET \
67 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
68 | OPTION_MASK_ISA_AVX_SET)
69 #define OPTION_MASK_ISA_XOP_SET \
70 (OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
71 #define OPTION_MASK_ISA_LWP_SET \
74 /* AES and PCLMUL need SSE2 because they use xmm registers */
75 #define OPTION_MASK_ISA_AES_SET \
76 (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
77 #define OPTION_MASK_ISA_PCLMUL_SET \
78 (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
80 #define OPTION_MASK_ISA_ABM_SET \
81 (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
83 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
84 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
85 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
86 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
87 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
88 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
89 #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
90 #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
92 #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
93 #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
94 #define OPTION_MASK_ISA_F16C_SET \
95 (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
97 /* Define a set of ISAs which aren't available when a given ISA is
98 disabled. MMX and SSE ISAs are handled separately. */
100 #define OPTION_MASK_ISA_MMX_UNSET \
101 (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
102 #define OPTION_MASK_ISA_3DNOW_UNSET \
103 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
104 #define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
106 #define OPTION_MASK_ISA_SSE_UNSET \
107 (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
108 #define OPTION_MASK_ISA_SSE2_UNSET \
109 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
110 #define OPTION_MASK_ISA_SSE3_UNSET \
111 (OPTION_MASK_ISA_SSE3 \
112 | OPTION_MASK_ISA_SSSE3_UNSET \
113 | OPTION_MASK_ISA_SSE4A_UNSET )
114 #define OPTION_MASK_ISA_SSSE3_UNSET \
115 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
116 #define OPTION_MASK_ISA_SSE4_1_UNSET \
117 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
118 #define OPTION_MASK_ISA_SSE4_2_UNSET \
119 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
120 #define OPTION_MASK_ISA_AVX_UNSET \
121 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
122 | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
123 | OPTION_MASK_ISA_AVX2_UNSET)
124 #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
125 #define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2
126 #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
127 #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
129 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
131 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
133 #define OPTION_MASK_ISA_SSE4A_UNSET \
134 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
136 #define OPTION_MASK_ISA_FMA4_UNSET \
137 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
138 #define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
139 #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
141 #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
142 #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
143 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
144 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
145 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
146 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
147 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
148 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
149 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
150 #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
151 #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
153 #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
154 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
155 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
157 /* Implement TARGET_HANDLE_OPTION. */
160 ix86_handle_option (struct gcc_options
*opts
,
161 struct gcc_options
*opts_set ATTRIBUTE_UNUSED
,
162 const struct cl_decoded_option
*decoded
,
165 size_t code
= decoded
->opt_index
;
166 int value
= decoded
->value
;
173 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_MMX_SET
;
174 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_MMX_SET
;
178 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_MMX_UNSET
;
179 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_MMX_UNSET
;
186 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_3DNOW_SET
;
187 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_3DNOW_SET
;
191 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_3DNOW_UNSET
;
192 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_3DNOW_UNSET
;
202 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE_SET
;
203 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE_SET
;
207 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE_UNSET
;
208 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE_UNSET
;
215 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE2_SET
;
216 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE2_SET
;
220 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE2_UNSET
;
221 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE2_UNSET
;
228 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE3_SET
;
229 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE3_SET
;
233 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE3_UNSET
;
234 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE3_UNSET
;
241 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSSE3_SET
;
242 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSSE3_SET
;
246 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSSE3_UNSET
;
247 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSSE3_UNSET
;
254 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE4_1_SET
;
255 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_1_SET
;
259 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE4_1_UNSET
;
260 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_1_UNSET
;
267 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE4_2_SET
;
268 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_2_SET
;
272 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE4_2_UNSET
;
273 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_2_UNSET
;
280 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_AVX_SET
;
281 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AVX_SET
;
285 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_AVX_UNSET
;
286 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AVX_UNSET
;
293 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_AVX2_SET
;
294 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AVX2_SET
;
298 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_AVX2_UNSET
;
299 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AVX2_UNSET
;
306 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_FMA_SET
;
307 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FMA_SET
;
311 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_FMA_UNSET
;
312 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FMA_UNSET
;
319 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_RTM_SET
;
320 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_RTM_SET
;
324 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_RTM_UNSET
;
325 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_RTM_UNSET
;
330 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE4_SET
;
331 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_SET
;
335 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE4_UNSET
;
336 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4_UNSET
;
342 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SSE4A_SET
;
343 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4A_SET
;
347 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SSE4A_UNSET
;
348 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SSE4A_UNSET
;
355 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_FMA4_SET
;
356 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FMA4_SET
;
360 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_FMA4_UNSET
;
361 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FMA4_UNSET
;
368 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_XOP_SET
;
369 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_XOP_SET
;
373 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_XOP_UNSET
;
374 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_XOP_UNSET
;
381 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_LWP_SET
;
382 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_LWP_SET
;
386 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_LWP_UNSET
;
387 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_LWP_UNSET
;
394 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_ABM_SET
;
395 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_ABM_SET
;
399 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_ABM_UNSET
;
400 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_ABM_UNSET
;
407 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_BMI_SET
;
408 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_BMI_SET
;
412 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_BMI_UNSET
;
413 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_BMI_UNSET
;
420 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_BMI2_SET
;
421 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_BMI2_SET
;
425 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_BMI2_UNSET
;
426 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_BMI2_UNSET
;
433 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_TBM_SET
;
434 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_TBM_SET
;
438 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_TBM_UNSET
;
439 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_TBM_UNSET
;
446 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_POPCNT_SET
;
447 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_POPCNT_SET
;
451 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_POPCNT_UNSET
;
452 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_POPCNT_UNSET
;
459 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_SAHF_SET
;
460 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SAHF_SET
;
464 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_SAHF_UNSET
;
465 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_SAHF_UNSET
;
472 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_CX16_SET
;
473 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_CX16_SET
;
477 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_CX16_UNSET
;
478 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_CX16_UNSET
;
485 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_MOVBE_SET
;
486 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_MOVBE_SET
;
490 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_MOVBE_UNSET
;
491 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_MOVBE_UNSET
;
498 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_CRC32_SET
;
499 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_CRC32_SET
;
503 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_CRC32_UNSET
;
504 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_CRC32_UNSET
;
511 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_AES_SET
;
512 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AES_SET
;
516 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_AES_UNSET
;
517 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_AES_UNSET
;
524 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_PCLMUL_SET
;
525 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_PCLMUL_SET
;
529 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_PCLMUL_UNSET
;
530 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_PCLMUL_UNSET
;
537 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_FSGSBASE_SET
;
538 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FSGSBASE_SET
;
542 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_FSGSBASE_UNSET
;
543 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_FSGSBASE_UNSET
;
550 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_RDRND_SET
;
551 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_RDRND_SET
;
555 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_RDRND_UNSET
;
556 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_RDRND_UNSET
;
563 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_F16C_SET
;
564 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_F16C_SET
;
568 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_F16C_UNSET
;
569 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_F16C_UNSET
;
576 opts
->x_ix86_isa_flags
|= OPTION_MASK_ISA_PRFCHW_SET
;
577 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_PRFCHW_SET
;
581 opts
->x_ix86_isa_flags
&= ~OPTION_MASK_ISA_PRFCHW_UNSET
;
582 opts
->x_ix86_isa_flags_explicit
|= OPTION_MASK_ISA_PRFCHW_UNSET
;
586 /* Comes from final.c -- no real reason to change it. */
587 #define MAX_CODE_ALIGN 16
589 case OPT_malign_loops_
:
590 warning_at (loc
, 0, "-malign-loops is obsolete, use -falign-loops");
591 if (value
> MAX_CODE_ALIGN
)
592 error_at (loc
, "-malign-loops=%d is not between 0 and %d",
593 value
, MAX_CODE_ALIGN
);
595 opts
->x_align_loops
= 1 << value
;
598 case OPT_malign_jumps_
:
599 warning_at (loc
, 0, "-malign-jumps is obsolete, use -falign-jumps");
600 if (value
> MAX_CODE_ALIGN
)
601 error_at (loc
, "-malign-jumps=%d is not between 0 and %d",
602 value
, MAX_CODE_ALIGN
);
604 opts
->x_align_jumps
= 1 << value
;
607 case OPT_malign_functions_
:
609 "-malign-functions is obsolete, use -falign-functions");
610 if (value
> MAX_CODE_ALIGN
)
611 error_at (loc
, "-malign-functions=%d is not between 0 and %d",
612 value
, MAX_CODE_ALIGN
);
614 opts
->x_align_functions
= 1 << value
;
617 case OPT_mbranch_cost_
:
620 error_at (loc
, "-mbranch-cost=%d is not between 0 and 5", value
);
621 opts
->x_ix86_branch_cost
= 5;
630 static const struct default_options ix86_option_optimization_table
[] =
632 /* Enable redundant extension instructions removal at -O2 and higher. */
633 { OPT_LEVELS_2_PLUS
, OPT_free
, NULL
, 1 },
634 /* Turn off -fschedule-insns by default. It tends to make the
635 problem with not enough registers even worse. */
636 { OPT_LEVELS_ALL
, OPT_fschedule_insns
, NULL
, 0 },
638 #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
639 SUBTARGET_OPTIMIZATION_OPTIONS
,
641 { OPT_LEVELS_NONE
, 0, NULL
, 0 }
644 /* Implement TARGET_OPTION_INIT_STRUCT. */
647 ix86_option_init_struct (struct gcc_options
*opts
)
650 /* The Darwin libraries never set errno, so we might as well
651 avoid calling them when that's the only reason we would. */
652 opts
->x_flag_errno_math
= 0;
654 opts
->x_flag_pcc_struct_return
= 2;
655 opts
->x_flag_asynchronous_unwind_tables
= 2;
656 opts
->x_flag_vect_cost_model
= 1;
659 /* On the x86 -fsplit-stack and -fstack-protector both use the same
660 field in the TCB, so they can not be used together. */
663 ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED
,
664 struct gcc_options
*opts ATTRIBUTE_UNUSED
)
668 #ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
670 error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
673 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
676 error ("%<-fsplit-stack%> requires "
677 "assembler support for CFI directives");
685 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
687 static enum unwind_info_type
688 i386_except_unwind_info (struct gcc_options
*opts
)
690 /* Honor the --enable-sjlj-exceptions configure switch. */
691 #ifdef CONFIG_SJLJ_EXCEPTIONS
692 if (CONFIG_SJLJ_EXCEPTIONS
)
696 /* On windows 64, prefer SEH exceptions over anything else. */
697 if (TARGET_64BIT
&& DEFAULT_ABI
== MS_ABI
&& opts
->x_flag_unwind_tables
)
700 if (DWARF2_UNWIND_INFO
)
706 #undef TARGET_EXCEPT_UNWIND_INFO
707 #define TARGET_EXCEPT_UNWIND_INFO i386_except_unwind_info
709 #undef TARGET_DEFAULT_TARGET_FLAGS
710 #define TARGET_DEFAULT_TARGET_FLAGS \
712 | TARGET_SUBTARGET_DEFAULT \
713 | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
715 #undef TARGET_HANDLE_OPTION
716 #define TARGET_HANDLE_OPTION ix86_handle_option
718 #undef TARGET_OPTION_OPTIMIZATION_TABLE
719 #define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
720 #undef TARGET_OPTION_INIT_STRUCT
721 #define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
723 #undef TARGET_SUPPORTS_SPLIT_STACK
724 #define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
726 struct gcc_targetm_common targetm_common
= TARGETM_COMMON_INITIALIZER
;