1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* True if X is a constant that can be forced into the constant pool. */
119 #define CONST_POOL_OK_P(X) \
121 && GET_CODE (X) != HIGH \
122 && !targetm.cannot_force_const_mem (X))
124 /* All reloads of the current insn are recorded here. See reload.h for
127 struct reload rld
[MAX_RELOADS
];
129 /* All the "earlyclobber" operands of the current insn
130 are recorded here. */
132 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
134 int reload_n_operands
;
136 /* Replacing reloads.
138 If `replace_reloads' is nonzero, then as each reload is recorded
139 an entry is made for it in the table `replacements'.
140 Then later `subst_reloads' can look through that table and
141 perform all the replacements needed. */
143 /* Nonzero means record the places to replace. */
144 static int replace_reloads
;
146 /* Each replacement is recorded with a structure like this. */
149 rtx
*where
; /* Location to store in */
150 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
151 a SUBREG; 0 otherwise. */
152 int what
; /* which reload this is for */
153 enum machine_mode mode
; /* mode it must have */
156 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
158 /* Number of replacements currently recorded. */
159 static int n_replacements
;
161 /* Used to track what is modified by an operand. */
164 int reg_flag
; /* Nonzero if referencing a register. */
165 int safe
; /* Nonzero if this can't conflict with anything. */
166 rtx base
; /* Base address for MEM. */
167 HOST_WIDE_INT start
; /* Starting offset or register number. */
168 HOST_WIDE_INT end
; /* Ending offset or register number. */
171 #ifdef SECONDARY_MEMORY_NEEDED
173 /* Save MEMs needed to copy from one class of registers to another. One MEM
174 is used per mode, but normally only one or two modes are ever used.
176 We keep two versions, before and after register elimination. The one
177 after register elimination is record separately for each operand. This
178 is done in case the address is not valid to be sure that we separately
181 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
182 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
183 static int secondary_memlocs_elim_used
= 0;
186 /* The instruction we are doing reloads for;
187 so we can test whether a register dies in it. */
188 static rtx this_insn
;
190 /* Nonzero if this instruction is a user-specified asm with operands. */
191 static int this_insn_is_asm
;
193 /* If hard_regs_live_known is nonzero,
194 we can tell which hard regs are currently live,
195 at least enough to succeed in choosing dummy reloads. */
196 static int hard_regs_live_known
;
198 /* Indexed by hard reg number,
199 element is nonnegative if hard reg has been spilled.
200 This vector is passed to `find_reloads' as an argument
201 and is not changed here. */
202 static short *static_reload_reg_p
;
204 /* Set to 1 in subst_reg_equivs if it changes anything. */
205 static int subst_reg_equivs_changed
;
207 /* On return from push_reload, holds the reload-number for the OUT
208 operand, which can be different for that from the input operand. */
209 static int output_reloadnum
;
211 /* Compare two RTX's. */
212 #define MATCHES(x, y) \
213 (x == y || (x != 0 && (GET_CODE (x) == REG \
214 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
215 : rtx_equal_p (x, y) && ! side_effects_p (x))))
217 /* Indicates if two reloads purposes are for similar enough things that we
218 can merge their reloads. */
219 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
220 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
221 || ((when1) == (when2) && (op1) == (op2)) \
222 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
223 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
224 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
225 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
226 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
228 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
229 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
230 ((when1) != (when2) \
231 || ! ((op1) == (op2) \
232 || (when1) == RELOAD_FOR_INPUT \
233 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
234 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
236 /* If we are going to reload an address, compute the reload type to
238 #define ADDR_TYPE(type) \
239 ((type) == RELOAD_FOR_INPUT_ADDRESS \
240 ? RELOAD_FOR_INPADDR_ADDRESS \
241 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
242 ? RELOAD_FOR_OUTADDR_ADDRESS \
245 #ifdef HAVE_SECONDARY_RELOADS
246 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
247 enum machine_mode
, enum reload_type
,
250 static enum reg_class
find_valid_class (enum machine_mode
, int, unsigned int);
251 static int reload_inner_reg_of_subreg (rtx
, enum machine_mode
, int);
252 static void push_replacement (rtx
*, int, enum machine_mode
);
253 static void dup_replacements (rtx
*, rtx
*);
254 static void combine_reloads (void);
255 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
256 enum reload_type
, int, int);
257 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
258 enum machine_mode
, enum reg_class
, int, int);
259 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
260 static struct decomposition
decompose (rtx
);
261 static int immune_p (rtx
, rtx
, struct decomposition
);
262 static int alternative_allows_memconst (const char *, int);
263 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
265 static rtx
make_memloc (rtx
, int);
266 static int maybe_memory_address_p (enum machine_mode
, rtx
, rtx
*);
267 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
268 int, enum reload_type
, int, rtx
);
269 static rtx
subst_reg_equivs (rtx
, rtx
);
270 static rtx
subst_indexed_address (rtx
);
271 static void update_auto_inc_notes (rtx
, int, int);
272 static int find_reloads_address_1 (enum machine_mode
, rtx
, int, rtx
*,
273 int, enum reload_type
,int, rtx
);
274 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
275 enum machine_mode
, int,
276 enum reload_type
, int);
277 static rtx
find_reloads_subreg_address (rtx
, int, int, enum reload_type
,
279 static void copy_replacements_1 (rtx
*, rtx
*, int);
280 static int find_inc_amount (rtx
, rtx
);
282 #ifdef HAVE_SECONDARY_RELOADS
284 /* Determine if any secondary reloads are needed for loading (if IN_P is
285 nonzero) or storing (if IN_P is zero) X to or from a reload register of
286 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
287 are needed, push them.
289 Return the reload number of the secondary reload we made, or -1 if
290 we didn't need one. *PICODE is set to the insn_code to use if we do
291 need a secondary reload. */
294 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
295 enum reg_class reload_class
,
296 enum machine_mode reload_mode
, enum reload_type type
,
297 enum insn_code
*picode
)
299 enum reg_class
class = NO_REGS
;
300 enum machine_mode mode
= reload_mode
;
301 enum insn_code icode
= CODE_FOR_nothing
;
302 enum reg_class t_class
= NO_REGS
;
303 enum machine_mode t_mode
= VOIDmode
;
304 enum insn_code t_icode
= CODE_FOR_nothing
;
305 enum reload_type secondary_type
;
306 int s_reload
, t_reload
= -1;
308 if (type
== RELOAD_FOR_INPUT_ADDRESS
309 || type
== RELOAD_FOR_OUTPUT_ADDRESS
310 || type
== RELOAD_FOR_INPADDR_ADDRESS
311 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
312 secondary_type
= type
;
314 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
316 *picode
= CODE_FOR_nothing
;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x
) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x
))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
325 reload_mode
= GET_MODE (x
);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem
[REGNO (x
)] != 0)
336 x
= reg_equiv_mem
[REGNO (x
)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_data
[(int) icode
].operand
[in_p
].predicate
360 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is nonzero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 enum reg_class insn_class
;
378 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
379 insn_class
= ALL_REGS
;
382 const char *insn_constraint
383 = &insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
384 char insn_letter
= *insn_constraint
;
386 = (insn_letter
== 'r' ? GENERAL_REGS
387 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter
,
390 if (insn_class
== NO_REGS
)
393 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
397 /* The scratch register's constraint must start with "=&". */
398 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
399 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
402 if (reg_class_subset_p (reload_class
, insn_class
))
403 mode
= insn_data
[(int) icode
].operand
[2].mode
;
406 const char *t_constraint
407 = &insn_data
[(int) icode
].operand
[2].constraint
[2];
408 char t_letter
= *t_constraint
;
410 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
411 t_class
= (t_letter
== 'r' ? GENERAL_REGS
412 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter
,
415 icode
= CODE_FOR_nothing
;
419 /* This case isn't valid, so fail. Reload is allowed to use the same
420 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
421 in the case of a secondary register, we actually need two different
422 registers for correct code. We fail here to prevent the possibility of
423 silently generating incorrect code later.
425 The convention is that secondary input reloads are valid only if the
426 secondary_class is different from class. If you have such a case, you
427 can not use secondary reloads, you must work around the problem some
430 Allow this when a reload_in/out pattern is being used. I.e. assume
431 that the generated code handles this case. */
433 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
434 && t_icode
== CODE_FOR_nothing
)
437 /* If we need a tertiary reload, see if we have one we can reuse or else
440 if (t_class
!= NO_REGS
)
442 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
443 if (rld
[t_reload
].secondary_p
444 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
445 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
446 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
447 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
448 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
449 == CODE_FOR_nothing
))
450 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
451 == CODE_FOR_nothing
)))
452 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
453 && MERGABLE_RELOADS (secondary_type
,
454 rld
[t_reload
].when_needed
,
455 opnum
, rld
[t_reload
].opnum
))
458 rld
[t_reload
].inmode
= t_mode
;
460 rld
[t_reload
].outmode
= t_mode
;
462 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
463 rld
[t_reload
].class = t_class
;
465 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
466 rld
[t_reload
].optional
&= optional
;
467 rld
[t_reload
].secondary_p
= 1;
468 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
469 opnum
, rld
[t_reload
].opnum
))
470 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
473 if (t_reload
== n_reloads
)
475 /* We need to make a new tertiary reload for this register class. */
476 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
477 rld
[t_reload
].class = t_class
;
478 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
479 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
480 rld
[t_reload
].reg_rtx
= 0;
481 rld
[t_reload
].optional
= optional
;
482 rld
[t_reload
].inc
= 0;
483 /* Maybe we could combine these, but it seems too tricky. */
484 rld
[t_reload
].nocombine
= 1;
485 rld
[t_reload
].in_reg
= 0;
486 rld
[t_reload
].out_reg
= 0;
487 rld
[t_reload
].opnum
= opnum
;
488 rld
[t_reload
].when_needed
= secondary_type
;
489 rld
[t_reload
].secondary_in_reload
= -1;
490 rld
[t_reload
].secondary_out_reload
= -1;
491 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
492 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
493 rld
[t_reload
].secondary_p
= 1;
499 /* See if we can reuse an existing secondary reload. */
500 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
501 if (rld
[s_reload
].secondary_p
502 && (reg_class_subset_p (class, rld
[s_reload
].class)
503 || reg_class_subset_p (rld
[s_reload
].class, class))
504 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
505 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
506 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
507 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
508 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
509 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
510 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
511 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
512 opnum
, rld
[s_reload
].opnum
))
515 rld
[s_reload
].inmode
= mode
;
517 rld
[s_reload
].outmode
= mode
;
519 if (reg_class_subset_p (class, rld
[s_reload
].class))
520 rld
[s_reload
].class = class;
522 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
523 rld
[s_reload
].optional
&= optional
;
524 rld
[s_reload
].secondary_p
= 1;
525 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
526 opnum
, rld
[s_reload
].opnum
))
527 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
530 if (s_reload
== n_reloads
)
532 #ifdef SECONDARY_MEMORY_NEEDED
533 /* If we need a memory location to copy between the two reload regs,
534 set it up now. Note that we do the input case before making
535 the reload and the output case after. This is due to the
536 way reloads are output. */
538 if (in_p
&& icode
== CODE_FOR_nothing
539 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
541 get_secondary_mem (x
, reload_mode
, opnum
, type
);
543 /* We may have just added new reloads. Make sure we add
544 the new reload at the end. */
545 s_reload
= n_reloads
;
549 /* We need to make a new secondary reload for this register class. */
550 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
551 rld
[s_reload
].class = class;
553 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
554 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
555 rld
[s_reload
].reg_rtx
= 0;
556 rld
[s_reload
].optional
= optional
;
557 rld
[s_reload
].inc
= 0;
558 /* Maybe we could combine these, but it seems too tricky. */
559 rld
[s_reload
].nocombine
= 1;
560 rld
[s_reload
].in_reg
= 0;
561 rld
[s_reload
].out_reg
= 0;
562 rld
[s_reload
].opnum
= opnum
;
563 rld
[s_reload
].when_needed
= secondary_type
;
564 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
565 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
566 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
567 rld
[s_reload
].secondary_out_icode
568 = ! in_p
? t_icode
: CODE_FOR_nothing
;
569 rld
[s_reload
].secondary_p
= 1;
573 #ifdef SECONDARY_MEMORY_NEEDED
574 if (! in_p
&& icode
== CODE_FOR_nothing
575 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
576 get_secondary_mem (x
, mode
, opnum
, type
);
583 #endif /* HAVE_SECONDARY_RELOADS */
585 #ifdef SECONDARY_MEMORY_NEEDED
587 /* Return a memory location that will be used to copy X in mode MODE.
588 If we haven't already made a location for this mode in this insn,
589 call find_reloads_address on the location being returned. */
592 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
593 int opnum
, enum reload_type type
)
598 /* By default, if MODE is narrower than a word, widen it to a word.
599 This is required because most machines that require these memory
600 locations do not support short load and stores from all registers
601 (e.g., FP registers). */
603 #ifdef SECONDARY_MEMORY_NEEDED_MODE
604 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
606 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
607 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
610 /* If we already have made a MEM for this operand in MODE, return it. */
611 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
612 return secondary_memlocs_elim
[(int) mode
][opnum
];
614 /* If this is the first time we've tried to get a MEM for this mode,
615 allocate a new one. `something_changed' in reload will get set
616 by noticing that the frame size has changed. */
618 if (secondary_memlocs
[(int) mode
] == 0)
620 #ifdef SECONDARY_MEMORY_NEEDED_RTX
621 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
623 secondary_memlocs
[(int) mode
]
624 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
628 /* Get a version of the address doing any eliminations needed. If that
629 didn't give us a new MEM, make a new one if it isn't valid. */
631 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
632 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
634 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
635 loc
= copy_rtx (loc
);
637 /* The only time the call below will do anything is if the stack
638 offset is too large. In that case IND_LEVELS doesn't matter, so we
639 can just pass a zero. Adjust the type to be the address of the
640 corresponding object. If the address was valid, save the eliminated
641 address. If it wasn't valid, we need to make a reload each time, so
646 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
647 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
650 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
654 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
655 if (secondary_memlocs_elim_used
<= (int)mode
)
656 secondary_memlocs_elim_used
= (int)mode
+ 1;
660 /* Clear any secondary memory locations we've made. */
663 clear_secondary_mem (void)
665 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
667 #endif /* SECONDARY_MEMORY_NEEDED */
669 /* Find the largest class for which every register number plus N is valid in
670 M1 (if in range) and is cheap to move into REGNO.
671 Abort if no such class exists. */
673 static enum reg_class
674 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED
, int n
,
675 unsigned int dest_regno ATTRIBUTE_UNUSED
)
680 enum reg_class best_class
= NO_REGS
;
681 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
682 unsigned int best_size
= 0;
685 for (class = 1; class < N_REG_CLASSES
; class++)
688 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
689 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
690 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
691 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
696 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
698 if ((reg_class_size
[class] > best_size
699 && (best_cost
< 0 || best_cost
>= cost
))
703 best_size
= reg_class_size
[class];
704 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
714 /* Return the number of a previously made reload that can be combined with
715 a new one, or n_reloads if none of the existing reloads can be used.
716 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
717 push_reload, they determine the kind of the new reload that we try to
718 combine. P_IN points to the corresponding value of IN, which can be
719 modified by this function.
720 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
723 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class
class,
724 enum reload_type type
, int opnum
, int dont_share
)
728 /* We can't merge two reloads if the output of either one is
731 if (earlyclobber_operand_p (out
))
734 /* We can use an existing reload if the class is right
735 and at least one of IN and OUT is a match
736 and the other is at worst neutral.
737 (A zero compared against anything is neutral.)
739 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
740 for the same thing since that can cause us to need more reload registers
741 than we otherwise would. */
743 for (i
= 0; i
< n_reloads
; i
++)
744 if ((reg_class_subset_p (class, rld
[i
].class)
745 || reg_class_subset_p (rld
[i
].class, class))
746 /* If the existing reload has a register, it must fit our class. */
747 && (rld
[i
].reg_rtx
== 0
748 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
749 true_regnum (rld
[i
].reg_rtx
)))
750 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
751 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
752 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
753 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
754 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
755 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
756 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
764 for (i
= 0; i
< n_reloads
; i
++)
765 if ((reg_class_subset_p (class, rld
[i
].class)
766 || reg_class_subset_p (rld
[i
].class, class))
767 /* If the existing reload has a register, it must fit our
769 && (rld
[i
].reg_rtx
== 0
770 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
771 true_regnum (rld
[i
].reg_rtx
)))
772 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
773 && ((GET_CODE (in
) == REG
774 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
775 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
776 || (GET_CODE (rld
[i
].in
) == REG
777 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
778 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
779 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
780 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
781 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
782 opnum
, rld
[i
].opnum
))
784 /* Make sure reload_in ultimately has the increment,
785 not the plain register. */
786 if (GET_CODE (in
) == REG
)
793 /* Return nonzero if X is a SUBREG which will require reloading of its
794 SUBREG_REG expression. */
797 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, int output
)
801 /* Only SUBREGs are problematical. */
802 if (GET_CODE (x
) != SUBREG
)
805 inner
= SUBREG_REG (x
);
807 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
808 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
811 /* If INNER is not a hard register, then INNER will not need to
813 if (GET_CODE (inner
) != REG
814 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
817 /* If INNER is not ok for MODE, then INNER will need reloading. */
818 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
821 /* If the outer part is a word or smaller, INNER larger than a
822 word and the number of regs for INNER is not the same as the
823 number of words in INNER, then INNER will need reloading. */
824 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
826 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
827 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
828 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
831 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
832 requiring an extra reload register. The caller has already found that
833 IN contains some reference to REGNO, so check that we can produce the
834 new value in a single step. E.g. if we have
835 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
836 instruction that adds one to a register, this should succeed.
837 However, if we have something like
838 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
839 needs to be loaded into a register first, we need a separate reload
841 Such PLUS reloads are generated by find_reload_address_part.
842 The out-of-range PLUS expressions are usually introduced in the instruction
843 patterns by register elimination and substituting pseudos without a home
844 by their function-invariant equivalences. */
846 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
850 struct recog_data save_recog_data
;
852 /* For matching constraints, we often get notional input reloads where
853 we want to use the original register as the reload register. I.e.
854 technically this is a non-optional input-output reload, but IN is
855 already a valid register, and has been chosen as the reload register.
856 Speed this up, since it trivially works. */
857 if (GET_CODE (in
) == REG
)
860 /* To test MEMs properly, we'd have to take into account all the reloads
861 that are already scheduled, which can become quite complicated.
862 And since we've already handled address reloads for this MEM, it
863 should always succeed anyway. */
864 if (GET_CODE (in
) == MEM
)
867 /* If we can make a simple SET insn that does the job, everything should
869 dst
= gen_rtx_REG (mode
, regno
);
870 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
871 save_recog_data
= recog_data
;
872 if (recog_memoized (test_insn
) >= 0)
874 extract_insn (test_insn
);
875 r
= constrain_operands (1);
877 recog_data
= save_recog_data
;
881 /* Record one reload that needs to be performed.
882 IN is an rtx saying where the data are to be found before this instruction.
883 OUT says where they must be stored after the instruction.
884 (IN is zero for data not read, and OUT is zero for data not written.)
885 INLOC and OUTLOC point to the places in the instructions where
886 IN and OUT were found.
887 If IN and OUT are both nonzero, it means the same register must be used
888 to reload both IN and OUT.
890 CLASS is a register class required for the reloaded data.
891 INMODE is the machine mode that the instruction requires
892 for the reg that replaces IN and OUTMODE is likewise for OUT.
894 If IN is zero, then OUT's location and mode should be passed as
897 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
899 OPTIONAL nonzero means this reload does not need to be performed:
900 it can be discarded if that is more convenient.
902 OPNUM and TYPE say what the purpose of this reload is.
904 The return value is the reload-number for this reload.
906 If both IN and OUT are nonzero, in some rare cases we might
907 want to make two separate reloads. (Actually we never do this now.)
908 Therefore, the reload-number for OUT is stored in
909 output_reloadnum when we return; the return value applies to IN.
910 Usually (presently always), when IN and OUT are nonzero,
911 the two reload-numbers are equal, but the caller should be careful to
915 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
916 enum reg_class
class, enum machine_mode inmode
,
917 enum machine_mode outmode
, int strict_low
, int optional
,
918 int opnum
, enum reload_type type
)
922 int dont_remove_subreg
= 0;
923 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
924 int secondary_in_reload
= -1, secondary_out_reload
= -1;
925 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
926 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
928 /* INMODE and/or OUTMODE could be VOIDmode if no mode
929 has been specified for the operand. In that case,
930 use the operand's mode as the mode to reload. */
931 if (inmode
== VOIDmode
&& in
!= 0)
932 inmode
= GET_MODE (in
);
933 if (outmode
== VOIDmode
&& out
!= 0)
934 outmode
= GET_MODE (out
);
936 /* If IN is a pseudo register everywhere-equivalent to a constant, and
937 it is not in a hard register, reload straight from the constant,
938 since we want to get rid of such pseudo registers.
939 Often this is done earlier, but not always in find_reloads_address. */
940 if (in
!= 0 && GET_CODE (in
) == REG
)
942 int regno
= REGNO (in
);
944 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
945 && reg_equiv_constant
[regno
] != 0)
946 in
= reg_equiv_constant
[regno
];
949 /* Likewise for OUT. Of course, OUT will never be equivalent to
950 an actual constant, but it might be equivalent to a memory location
951 (in the case of a parameter). */
952 if (out
!= 0 && GET_CODE (out
) == REG
)
954 int regno
= REGNO (out
);
956 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
957 && reg_equiv_constant
[regno
] != 0)
958 out
= reg_equiv_constant
[regno
];
961 /* If we have a read-write operand with an address side-effect,
962 change either IN or OUT so the side-effect happens only once. */
963 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
964 switch (GET_CODE (XEXP (in
, 0)))
966 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
967 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
970 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
971 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
978 /* If we are reloading a (SUBREG constant ...), really reload just the
979 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
980 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
981 a pseudo and hence will become a MEM) with M1 wider than M2 and the
982 register is a pseudo, also reload the inside expression.
983 For machines that extend byte loads, do this for any SUBREG of a pseudo
984 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
985 M2 is an integral mode that gets extended when loaded.
986 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
987 either M1 is not valid for R or M2 is wider than a word but we only
988 need one word to store an M2-sized quantity in R.
989 (However, if OUT is nonzero, we need to reload the reg *and*
990 the subreg, so do nothing here, and let following statement handle it.)
992 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
993 we can't handle it here because CONST_INT does not indicate a mode.
995 Similarly, we must reload the inside expression if we have a
996 STRICT_LOW_PART (presumably, in == out in the cas).
998 Also reload the inner expression if it does not require a secondary
999 reload but the SUBREG does.
1001 Finally, reload the inner expression if it is a register that is in
1002 the class whose registers cannot be referenced in a different size
1003 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1004 cannot reload just the inside since we might end up with the wrong
1005 register class. But if it is inside a STRICT_LOW_PART, we have
1006 no choice, so we hope we do get the right register class there. */
1008 if (in
!= 0 && GET_CODE (in
) == SUBREG
1009 && (subreg_lowpart_p (in
) || strict_low
)
1010 #ifdef CANNOT_CHANGE_MODE_CLASS
1011 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
1013 && (CONSTANT_P (SUBREG_REG (in
))
1014 || GET_CODE (SUBREG_REG (in
)) == PLUS
1016 || (((GET_CODE (SUBREG_REG (in
)) == REG
1017 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1018 || GET_CODE (SUBREG_REG (in
)) == MEM
)
1019 && ((GET_MODE_SIZE (inmode
)
1020 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1021 #ifdef LOAD_EXTEND_OP
1022 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1023 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1025 && (GET_MODE_SIZE (inmode
)
1026 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1027 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1028 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
1030 #ifdef WORD_REGISTER_OPERATIONS
1031 || ((GET_MODE_SIZE (inmode
)
1032 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1033 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1034 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1038 || (GET_CODE (SUBREG_REG (in
)) == REG
1039 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1040 /* The case where out is nonzero
1041 is handled differently in the following statement. */
1042 && (out
== 0 || subreg_lowpart_p (in
))
1043 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1044 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1046 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1048 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1049 [GET_MODE (SUBREG_REG (in
))]))
1050 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1051 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1052 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1053 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1054 GET_MODE (SUBREG_REG (in
)),
1058 #ifdef CANNOT_CHANGE_MODE_CLASS
1059 || (GET_CODE (SUBREG_REG (in
)) == REG
1060 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1061 && REG_CANNOT_CHANGE_MODE_P
1062 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1066 in_subreg_loc
= inloc
;
1067 inloc
= &SUBREG_REG (in
);
1069 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1070 if (GET_CODE (in
) == MEM
)
1071 /* This is supposed to happen only for paradoxical subregs made by
1072 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1073 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1076 inmode
= GET_MODE (in
);
1079 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1080 either M1 is not valid for R or M2 is wider than a word but we only
1081 need one word to store an M2-sized quantity in R.
1083 However, we must reload the inner reg *as well as* the subreg in
1086 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1087 code above. This can happen if SUBREG_BYTE != 0. */
1089 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1091 enum reg_class in_class
= class;
1093 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1095 = find_valid_class (inmode
,
1096 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1097 GET_MODE (SUBREG_REG (in
)),
1100 REGNO (SUBREG_REG (in
)));
1102 /* This relies on the fact that emit_reload_insns outputs the
1103 instructions for input reloads of type RELOAD_OTHER in the same
1104 order as the reloads. Thus if the outer reload is also of type
1105 RELOAD_OTHER, we are guaranteed that this inner reload will be
1106 output before the outer reload. */
1107 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1108 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1109 dont_remove_subreg
= 1;
1112 /* Similarly for paradoxical and problematical SUBREGs on the output.
1113 Note that there is no reason we need worry about the previous value
1114 of SUBREG_REG (out); even if wider than out,
1115 storing in a subreg is entitled to clobber it all
1116 (except in the case of STRICT_LOW_PART,
1117 and in that case the constraint should label it input-output.) */
1118 if (out
!= 0 && GET_CODE (out
) == SUBREG
1119 && (subreg_lowpart_p (out
) || strict_low
)
1120 #ifdef CANNOT_CHANGE_MODE_CLASS
1121 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1123 && (CONSTANT_P (SUBREG_REG (out
))
1125 || (((GET_CODE (SUBREG_REG (out
)) == REG
1126 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1127 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1128 && ((GET_MODE_SIZE (outmode
)
1129 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1130 #ifdef WORD_REGISTER_OPERATIONS
1131 || ((GET_MODE_SIZE (outmode
)
1132 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1133 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1134 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1138 || (GET_CODE (SUBREG_REG (out
)) == REG
1139 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1140 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1141 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1143 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1145 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (out
))]
1146 [GET_MODE (SUBREG_REG (out
))]))
1147 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1148 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1149 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1150 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1151 GET_MODE (SUBREG_REG (out
)),
1155 #ifdef CANNOT_CHANGE_MODE_CLASS
1156 || (GET_CODE (SUBREG_REG (out
)) == REG
1157 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1158 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1159 GET_MODE (SUBREG_REG (out
)),
1164 out_subreg_loc
= outloc
;
1165 outloc
= &SUBREG_REG (out
);
1167 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1168 if (GET_CODE (out
) == MEM
1169 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1172 outmode
= GET_MODE (out
);
1175 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1176 either M1 is not valid for R or M2 is wider than a word but we only
1177 need one word to store an M2-sized quantity in R.
1179 However, we must reload the inner reg *as well as* the subreg in
1180 that case. In this case, the inner reg is an in-out reload. */
1182 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1184 /* This relies on the fact that emit_reload_insns outputs the
1185 instructions for output reloads of type RELOAD_OTHER in reverse
1186 order of the reloads. Thus if the outer reload is also of type
1187 RELOAD_OTHER, we are guaranteed that this inner reload will be
1188 output after the outer reload. */
1189 dont_remove_subreg
= 1;
1190 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1192 find_valid_class (outmode
,
1193 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1194 GET_MODE (SUBREG_REG (out
)),
1197 REGNO (SUBREG_REG (out
))),
1198 VOIDmode
, VOIDmode
, 0, 0,
1199 opnum
, RELOAD_OTHER
);
1202 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1203 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1204 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1205 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1208 /* If IN is a SUBREG of a hard register, make a new REG. This
1209 simplifies some of the cases below. */
1211 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1212 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1213 && ! dont_remove_subreg
)
1214 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1216 /* Similarly for OUT. */
1217 if (out
!= 0 && GET_CODE (out
) == SUBREG
1218 && GET_CODE (SUBREG_REG (out
)) == REG
1219 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1220 && ! dont_remove_subreg
)
1221 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1223 /* Narrow down the class of register wanted if that is
1224 desirable on this machine for efficiency. */
1226 class = PREFERRED_RELOAD_CLASS (in
, class);
1228 /* Output reloads may need analogous treatment, different in detail. */
1229 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1231 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1234 /* Make sure we use a class that can handle the actual pseudo
1235 inside any subreg. For example, on the 386, QImode regs
1236 can appear within SImode subregs. Although GENERAL_REGS
1237 can handle SImode, QImode needs a smaller class. */
1238 #ifdef LIMIT_RELOAD_CLASS
1240 class = LIMIT_RELOAD_CLASS (inmode
, class);
1241 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1242 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1245 class = LIMIT_RELOAD_CLASS (outmode
, class);
1246 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1247 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1250 /* Verify that this class is at least possible for the mode that
1252 if (this_insn_is_asm
)
1254 enum machine_mode mode
;
1255 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1259 if (mode
== VOIDmode
)
1261 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1266 outmode
= word_mode
;
1268 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1269 if (HARD_REGNO_MODE_OK (i
, mode
)
1270 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1272 int nregs
= hard_regno_nregs
[i
][mode
];
1275 for (j
= 1; j
< nregs
; j
++)
1276 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1281 if (i
== FIRST_PSEUDO_REGISTER
)
1283 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1288 /* Optional output reloads are always OK even if we have no register class,
1289 since the function of these reloads is only to have spill_reg_store etc.
1290 set, so that the storing insn can be deleted later. */
1291 if (class == NO_REGS
1292 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1295 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1299 /* See if we need a secondary reload register to move between CLASS
1300 and IN or CLASS and OUT. Get the icode and push any required reloads
1301 needed for each of them if so. */
1303 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1306 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1307 &secondary_in_icode
);
1310 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1311 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1312 secondary_out_reload
1313 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1314 type
, &secondary_out_icode
);
1317 /* We found no existing reload suitable for re-use.
1318 So add an additional reload. */
1320 #ifdef SECONDARY_MEMORY_NEEDED
1321 /* If a memory location is needed for the copy, make one. */
1322 if (in
!= 0 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == SUBREG
)
1323 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1324 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1326 get_secondary_mem (in
, inmode
, opnum
, type
);
1332 rld
[i
].class = class;
1333 rld
[i
].inmode
= inmode
;
1334 rld
[i
].outmode
= outmode
;
1336 rld
[i
].optional
= optional
;
1338 rld
[i
].nocombine
= 0;
1339 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1340 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1341 rld
[i
].opnum
= opnum
;
1342 rld
[i
].when_needed
= type
;
1343 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1344 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1345 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1346 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1347 rld
[i
].secondary_p
= 0;
1351 #ifdef SECONDARY_MEMORY_NEEDED
1352 if (out
!= 0 && (GET_CODE (out
) == REG
|| GET_CODE (out
) == SUBREG
)
1353 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (class,
1355 REGNO_REG_CLASS (reg_or_subregno (out
)),
1357 get_secondary_mem (out
, outmode
, opnum
, type
);
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode
!= VOIDmode
1370 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1371 rld
[i
].inmode
= inmode
;
1372 if (outmode
!= VOIDmode
1373 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1374 rld
[i
].outmode
= outmode
;
1377 rtx in_reg
= inloc
? *inloc
: 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1392 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1393 && ! (rld
[i
].optional
&& optional
))
1395 /* We must keep the address reload with the lower operand
1397 if (opnum
> rld
[i
].opnum
)
1399 remove_address_replacements (in
);
1401 in_reg
= rld
[i
].in_reg
;
1404 remove_address_replacements (rld
[i
].in
);
1407 rld
[i
].in_reg
= in_reg
;
1412 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1414 if (reg_class_subset_p (class, rld
[i
].class))
1415 rld
[i
].class = class;
1416 rld
[i
].optional
&= optional
;
1417 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1418 opnum
, rld
[i
].opnum
))
1419 rld
[i
].when_needed
= RELOAD_OTHER
;
1420 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1423 /* If the ostensible rtx being reloaded differs from the rtx found
1424 in the location to substitute, this reload is not safe to combine
1425 because we cannot reliably tell whether it appears in the insn. */
1427 if (in
!= 0 && in
!= *inloc
)
1428 rld
[i
].nocombine
= 1;
1431 /* This was replaced by changes in find_reloads_address_1 and the new
1432 function inc_for_reload, which go with a new meaning of reload_inc. */
1434 /* If this is an IN/OUT reload in an insn that sets the CC,
1435 it must be for an autoincrement. It doesn't work to store
1436 the incremented value after the insn because that would clobber the CC.
1437 So we must do the increment of the value reloaded from,
1438 increment it, store it back, then decrement again. */
1439 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1443 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1444 /* If we did not find a nonzero amount-to-increment-by,
1445 that contradicts the belief that IN is being incremented
1446 in an address in this insn. */
1447 if (rld
[i
].inc
== 0)
1452 /* If we will replace IN and OUT with the reload-reg,
1453 record where they are located so that substitution need
1454 not do a tree walk. */
1456 if (replace_reloads
)
1460 struct replacement
*r
= &replacements
[n_replacements
++];
1462 r
->subreg_loc
= in_subreg_loc
;
1466 if (outloc
!= 0 && outloc
!= inloc
)
1468 struct replacement
*r
= &replacements
[n_replacements
++];
1471 r
->subreg_loc
= out_subreg_loc
;
1476 /* If this reload is just being introduced and it has both
1477 an incoming quantity and an outgoing quantity that are
1478 supposed to be made to match, see if either one of the two
1479 can serve as the place to reload into.
1481 If one of them is acceptable, set rld[i].reg_rtx
1484 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1486 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1489 earlyclobber_operand_p (out
));
1491 /* If the outgoing register already contains the same value
1492 as the incoming one, we can dispense with loading it.
1493 The easiest way to tell the caller that is to give a phony
1494 value for the incoming operand (same as outgoing one). */
1495 if (rld
[i
].reg_rtx
== out
1496 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1497 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1498 static_reload_reg_p
, i
, inmode
))
1502 /* If this is an input reload and the operand contains a register that
1503 dies in this insn and is used nowhere else, see if it is the right class
1504 to be used for this reload. Use it if so. (This occurs most commonly
1505 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1506 this if it is also an output reload that mentions the register unless
1507 the output is a SUBREG that clobbers an entire register.
1509 Note that the operand might be one of the spill regs, if it is a
1510 pseudo reg and we are in a block where spilling has not taken place.
1511 But if there is no spilling in this block, that is OK.
1512 An explicitly used hard reg cannot be a spill reg. */
1514 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1518 enum machine_mode rel_mode
= inmode
;
1520 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1523 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1524 if (REG_NOTE_KIND (note
) == REG_DEAD
1525 && GET_CODE (XEXP (note
, 0)) == REG
1526 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1527 && reg_mentioned_p (XEXP (note
, 0), in
)
1528 && ! refers_to_regno_for_reload_p (regno
,
1530 + hard_regno_nregs
[regno
]
1532 PATTERN (this_insn
), inloc
)
1533 /* If this is also an output reload, IN cannot be used as
1534 the reload register if it is set in this insn unless IN
1536 && (out
== 0 || in
== out
1537 || ! hard_reg_set_here_p (regno
,
1539 + hard_regno_nregs
[regno
]
1541 PATTERN (this_insn
)))
1542 /* ??? Why is this code so different from the previous?
1543 Is there any simple coherent way to describe the two together?
1544 What's going on here. */
1546 || (GET_CODE (in
) == SUBREG
1547 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1549 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1550 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1551 /* Make sure the operand fits in the reg that dies. */
1552 && (GET_MODE_SIZE (rel_mode
)
1553 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1554 && HARD_REGNO_MODE_OK (regno
, inmode
)
1555 && HARD_REGNO_MODE_OK (regno
, outmode
))
1558 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1559 hard_regno_nregs
[regno
][outmode
]);
1561 for (offs
= 0; offs
< nregs
; offs
++)
1562 if (fixed_regs
[regno
+ offs
]
1563 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1568 && (! (refers_to_regno_for_reload_p
1569 (regno
, (regno
+ hard_regno_nregs
[regno
][inmode
]),
1571 || can_reload_into (in
, regno
, inmode
)))
1573 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1580 output_reloadnum
= i
;
1585 /* Record an additional place we must replace a value
1586 for which we have already recorded a reload.
1587 RELOADNUM is the value returned by push_reload
1588 when the reload was recorded.
1589 This is used in insn patterns that use match_dup. */
1592 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1594 if (replace_reloads
)
1596 struct replacement
*r
= &replacements
[n_replacements
++];
1597 r
->what
= reloadnum
;
1604 /* Duplicate any replacement we have recorded to apply at
1605 location ORIG_LOC to also be performed at DUP_LOC.
1606 This is used in insn patterns that use match_dup. */
1609 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1611 int i
, n
= n_replacements
;
1613 for (i
= 0; i
< n
; i
++)
1615 struct replacement
*r
= &replacements
[i
];
1616 if (r
->where
== orig_loc
)
1617 push_replacement (dup_loc
, r
->what
, r
->mode
);
1621 /* Transfer all replacements that used to be in reload FROM to be in
1625 transfer_replacements (int to
, int from
)
1629 for (i
= 0; i
< n_replacements
; i
++)
1630 if (replacements
[i
].what
== from
)
1631 replacements
[i
].what
= to
;
1634 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1635 or a subpart of it. If we have any replacements registered for IN_RTX,
1636 cancel the reloads that were supposed to load them.
1637 Return nonzero if we canceled any reloads. */
1639 remove_address_replacements (rtx in_rtx
)
1642 char reload_flags
[MAX_RELOADS
];
1643 int something_changed
= 0;
1645 memset (reload_flags
, 0, sizeof reload_flags
);
1646 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1648 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1649 reload_flags
[replacements
[i
].what
] |= 1;
1652 replacements
[j
++] = replacements
[i
];
1653 reload_flags
[replacements
[i
].what
] |= 2;
1656 /* Note that the following store must be done before the recursive calls. */
1659 for (i
= n_reloads
- 1; i
>= 0; i
--)
1661 if (reload_flags
[i
] == 1)
1663 deallocate_reload_reg (i
);
1664 remove_address_replacements (rld
[i
].in
);
1666 something_changed
= 1;
1669 return something_changed
;
1672 /* If there is only one output reload, and it is not for an earlyclobber
1673 operand, try to combine it with a (logically unrelated) input reload
1674 to reduce the number of reload registers needed.
1676 This is safe if the input reload does not appear in
1677 the value being output-reloaded, because this implies
1678 it is not needed any more once the original insn completes.
1680 If that doesn't work, see we can use any of the registers that
1681 die in this insn as a reload register. We can if it is of the right
1682 class and does not appear in the value being output-reloaded. */
1685 combine_reloads (void)
1688 int output_reload
= -1;
1689 int secondary_out
= -1;
1692 /* Find the output reload; return unless there is exactly one
1693 and that one is mandatory. */
1695 for (i
= 0; i
< n_reloads
; i
++)
1696 if (rld
[i
].out
!= 0)
1698 if (output_reload
>= 0)
1703 if (output_reload
< 0 || rld
[output_reload
].optional
)
1706 /* An input-output reload isn't combinable. */
1708 if (rld
[output_reload
].in
!= 0)
1711 /* If this reload is for an earlyclobber operand, we can't do anything. */
1712 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1715 /* If there is a reload for part of the address of this operand, we would
1716 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1717 its life to the point where doing this combine would not lower the
1718 number of spill registers needed. */
1719 for (i
= 0; i
< n_reloads
; i
++)
1720 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1721 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1722 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1725 /* Check each input reload; can we combine it? */
1727 for (i
= 0; i
< n_reloads
; i
++)
1728 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1729 /* Life span of this reload must not extend past main insn. */
1730 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1731 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1732 && rld
[i
].when_needed
!= RELOAD_OTHER
1733 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1734 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1735 rld
[output_reload
].outmode
))
1737 && rld
[i
].reg_rtx
== 0
1738 #ifdef SECONDARY_MEMORY_NEEDED
1739 /* Don't combine two reloads with different secondary
1740 memory locations. */
1741 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1742 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1743 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1744 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1746 && (SMALL_REGISTER_CLASSES
1747 ? (rld
[i
].class == rld
[output_reload
].class)
1748 : (reg_class_subset_p (rld
[i
].class,
1749 rld
[output_reload
].class)
1750 || reg_class_subset_p (rld
[output_reload
].class,
1752 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1753 /* Args reversed because the first arg seems to be
1754 the one that we imagine being modified
1755 while the second is the one that might be affected. */
1756 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1758 /* However, if the input is a register that appears inside
1759 the output, then we also can't share.
1760 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1761 If the same reload reg is used for both reg 69 and the
1762 result to be stored in memory, then that result
1763 will clobber the address of the memory ref. */
1764 && ! (GET_CODE (rld
[i
].in
) == REG
1765 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1766 rld
[output_reload
].out
))))
1767 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1768 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1769 && (reg_class_size
[(int) rld
[i
].class]
1770 || SMALL_REGISTER_CLASSES
)
1771 /* We will allow making things slightly worse by combining an
1772 input and an output, but no worse than that. */
1773 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1774 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1778 /* We have found a reload to combine with! */
1779 rld
[i
].out
= rld
[output_reload
].out
;
1780 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1781 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1782 /* Mark the old output reload as inoperative. */
1783 rld
[output_reload
].out
= 0;
1784 /* The combined reload is needed for the entire insn. */
1785 rld
[i
].when_needed
= RELOAD_OTHER
;
1786 /* If the output reload had a secondary reload, copy it. */
1787 if (rld
[output_reload
].secondary_out_reload
!= -1)
1789 rld
[i
].secondary_out_reload
1790 = rld
[output_reload
].secondary_out_reload
;
1791 rld
[i
].secondary_out_icode
1792 = rld
[output_reload
].secondary_out_icode
;
1795 #ifdef SECONDARY_MEMORY_NEEDED
1796 /* Copy any secondary MEM. */
1797 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1798 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1799 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1801 /* If required, minimize the register class. */
1802 if (reg_class_subset_p (rld
[output_reload
].class,
1804 rld
[i
].class = rld
[output_reload
].class;
1806 /* Transfer all replacements from the old reload to the combined. */
1807 for (j
= 0; j
< n_replacements
; j
++)
1808 if (replacements
[j
].what
== output_reload
)
1809 replacements
[j
].what
= i
;
1814 /* If this insn has only one operand that is modified or written (assumed
1815 to be the first), it must be the one corresponding to this reload. It
1816 is safe to use anything that dies in this insn for that output provided
1817 that it does not occur in the output (we already know it isn't an
1818 earlyclobber. If this is an asm insn, give up. */
1820 if (INSN_CODE (this_insn
) == -1)
1823 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1824 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1825 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1828 /* See if some hard register that dies in this insn and is not used in
1829 the output is the right class. Only works if the register we pick
1830 up can fully hold our output reload. */
1831 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1832 if (REG_NOTE_KIND (note
) == REG_DEAD
1833 && GET_CODE (XEXP (note
, 0)) == REG
1834 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1835 rld
[output_reload
].out
)
1836 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1837 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1838 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1839 REGNO (XEXP (note
, 0)))
1840 && (hard_regno_nregs
[REGNO (XEXP (note
, 0))][rld
[output_reload
].outmode
]
1841 <= hard_regno_nregs
[REGNO (XEXP (note
, 0))][GET_MODE (XEXP (note
, 0))])
1842 /* Ensure that a secondary or tertiary reload for this output
1843 won't want this register. */
1844 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1845 || (! (TEST_HARD_REG_BIT
1846 (reg_class_contents
[(int) rld
[secondary_out
].class],
1847 REGNO (XEXP (note
, 0))))
1848 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1849 || ! (TEST_HARD_REG_BIT
1850 (reg_class_contents
[(int) rld
[secondary_out
].class],
1851 REGNO (XEXP (note
, 0)))))))
1852 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1854 rld
[output_reload
].reg_rtx
1855 = gen_rtx_REG (rld
[output_reload
].outmode
,
1856 REGNO (XEXP (note
, 0)));
1861 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1862 See if one of IN and OUT is a register that may be used;
1863 this is desirable since a spill-register won't be needed.
1864 If so, return the register rtx that proves acceptable.
1866 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1867 CLASS is the register class required for the reload.
1869 If FOR_REAL is >= 0, it is the number of the reload,
1870 and in some cases when it can be discovered that OUT doesn't need
1871 to be computed, clear out rld[FOR_REAL].out.
1873 If FOR_REAL is -1, this should not be done, because this call
1874 is just to see if a register can be found, not to find and install it.
1876 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1877 puts an additional constraint on being able to use IN for OUT since
1878 IN must not appear elsewhere in the insn (it is assumed that IN itself
1879 is safe from the earlyclobber). */
1882 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1883 enum machine_mode inmode
, enum machine_mode outmode
,
1884 enum reg_class
class, int for_real
, int earlyclobber
)
1892 /* If operands exceed a word, we can't use either of them
1893 unless they have the same size. */
1894 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1895 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1896 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1899 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1900 respectively refers to a hard register. */
1902 /* Find the inside of any subregs. */
1903 while (GET_CODE (out
) == SUBREG
)
1905 if (GET_CODE (SUBREG_REG (out
)) == REG
1906 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1907 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1908 GET_MODE (SUBREG_REG (out
)),
1911 out
= SUBREG_REG (out
);
1913 while (GET_CODE (in
) == SUBREG
)
1915 if (GET_CODE (SUBREG_REG (in
)) == REG
1916 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1917 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1918 GET_MODE (SUBREG_REG (in
)),
1921 in
= SUBREG_REG (in
);
1924 /* Narrow down the reg class, the same way push_reload will;
1925 otherwise we might find a dummy now, but push_reload won't. */
1926 class = PREFERRED_RELOAD_CLASS (in
, class);
1928 /* See if OUT will do. */
1929 if (GET_CODE (out
) == REG
1930 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1932 unsigned int regno
= REGNO (out
) + out_offset
;
1933 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
1936 /* When we consider whether the insn uses OUT,
1937 ignore references within IN. They don't prevent us
1938 from copying IN into OUT, because those refs would
1939 move into the insn that reloads IN.
1941 However, we only ignore IN in its role as this reload.
1942 If the insn uses IN elsewhere and it contains OUT,
1943 that counts. We can't be sure it's the "same" operand
1944 so it might not go through this reload. */
1946 *inloc
= const0_rtx
;
1948 if (regno
< FIRST_PSEUDO_REGISTER
1949 && HARD_REGNO_MODE_OK (regno
, outmode
)
1950 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1951 PATTERN (this_insn
), outloc
))
1955 for (i
= 0; i
< nwords
; i
++)
1956 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1962 if (GET_CODE (real_out
) == REG
)
1965 value
= gen_rtx_REG (outmode
, regno
);
1972 /* Consider using IN if OUT was not acceptable
1973 or if OUT dies in this insn (like the quotient in a divmod insn).
1974 We can't use IN unless it is dies in this insn,
1975 which means we must know accurately which hard regs are live.
1976 Also, the result can't go in IN if IN is used within OUT,
1977 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1978 if (hard_regs_live_known
1979 && GET_CODE (in
) == REG
1980 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1982 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1983 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1984 && !fixed_regs
[REGNO (in
)]
1985 && HARD_REGNO_MODE_OK (REGNO (in
),
1986 /* The only case where out and real_out might
1987 have different modes is where real_out
1988 is a subreg, and in that case, out
1990 (GET_MODE (out
) != VOIDmode
1991 ? GET_MODE (out
) : outmode
)))
1993 unsigned int regno
= REGNO (in
) + in_offset
;
1994 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
1996 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1997 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1998 PATTERN (this_insn
))
2000 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2001 PATTERN (this_insn
), inloc
)))
2005 for (i
= 0; i
< nwords
; i
++)
2006 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2012 /* If we were going to use OUT as the reload reg
2013 and changed our mind, it means OUT is a dummy that
2014 dies here. So don't bother copying value to it. */
2015 if (for_real
>= 0 && value
== real_out
)
2016 rld
[for_real
].out
= 0;
2017 if (GET_CODE (real_in
) == REG
)
2020 value
= gen_rtx_REG (inmode
, regno
);
2028 /* This page contains subroutines used mainly for determining
2029 whether the IN or an OUT of a reload can serve as the
2032 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2035 earlyclobber_operand_p (rtx x
)
2039 for (i
= 0; i
< n_earlyclobbers
; i
++)
2040 if (reload_earlyclobbers
[i
] == x
)
2046 /* Return 1 if expression X alters a hard reg in the range
2047 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2048 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2049 X should be the body of an instruction. */
2052 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2054 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2056 rtx op0
= SET_DEST (x
);
2058 while (GET_CODE (op0
) == SUBREG
)
2059 op0
= SUBREG_REG (op0
);
2060 if (GET_CODE (op0
) == REG
)
2062 unsigned int r
= REGNO (op0
);
2064 /* See if this reg overlaps range under consideration. */
2066 && r
+ hard_regno_nregs
[r
][GET_MODE (op0
)] > beg_regno
)
2070 else if (GET_CODE (x
) == PARALLEL
)
2072 int i
= XVECLEN (x
, 0) - 1;
2075 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2082 /* Return 1 if ADDR is a valid memory address for mode MODE,
2083 and check that each pseudo reg has the proper kind of
2087 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx addr
)
2089 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2096 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2097 if they are the same hard reg, and has special hacks for
2098 autoincrement and autodecrement.
2099 This is specifically intended for find_reloads to use
2100 in determining whether two operands match.
2101 X is the operand whose number is the lower of the two.
2103 The value is 2 if Y contains a pre-increment that matches
2104 a non-incrementing address in X. */
2106 /* ??? To be completely correct, we should arrange to pass
2107 for X the output operand and for Y the input operand.
2108 For now, we assume that the output operand has the lower number
2109 because that is natural in (SET output (... input ...)). */
2112 operands_match_p (rtx x
, rtx y
)
2115 RTX_CODE code
= GET_CODE (x
);
2121 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2122 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2123 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2129 i
= REGNO (SUBREG_REG (x
));
2130 if (i
>= FIRST_PSEUDO_REGISTER
)
2132 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2133 GET_MODE (SUBREG_REG (x
)),
2140 if (GET_CODE (y
) == SUBREG
)
2142 j
= REGNO (SUBREG_REG (y
));
2143 if (j
>= FIRST_PSEUDO_REGISTER
)
2145 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2146 GET_MODE (SUBREG_REG (y
)),
2153 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2154 multiple hard register group, so that for example (reg:DI 0) and
2155 (reg:SI 1) will be considered the same register. */
2156 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2157 && i
< FIRST_PSEUDO_REGISTER
)
2158 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2159 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2160 && j
< FIRST_PSEUDO_REGISTER
)
2161 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2165 /* If two operands must match, because they are really a single
2166 operand of an assembler insn, then two postincrements are invalid
2167 because the assembler insn would increment only once.
2168 On the other hand, a postincrement matches ordinary indexing
2169 if the postincrement is the output operand. */
2170 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2171 return operands_match_p (XEXP (x
, 0), y
);
2172 /* Two preincrements are invalid
2173 because the assembler insn would increment only once.
2174 On the other hand, a preincrement matches ordinary indexing
2175 if the preincrement is the input operand.
2176 In this case, return 2, since some callers need to do special
2177 things when this happens. */
2178 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2179 || GET_CODE (y
) == PRE_MODIFY
)
2180 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2184 /* Now we have disposed of all the cases
2185 in which different rtx codes can match. */
2186 if (code
!= GET_CODE (y
))
2188 if (code
== LABEL_REF
)
2189 return XEXP (x
, 0) == XEXP (y
, 0);
2190 if (code
== SYMBOL_REF
)
2191 return XSTR (x
, 0) == XSTR (y
, 0);
2193 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2195 if (GET_MODE (x
) != GET_MODE (y
))
2198 /* Compare the elements. If any pair of corresponding elements
2199 fail to match, return 0 for the whole things. */
2202 fmt
= GET_RTX_FORMAT (code
);
2203 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2209 if (XWINT (x
, i
) != XWINT (y
, i
))
2214 if (XINT (x
, i
) != XINT (y
, i
))
2219 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2222 /* If any subexpression returns 2,
2223 we should return 2 if we are successful. */
2232 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2234 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2236 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2244 /* It is believed that rtx's at this level will never
2245 contain anything but integers and other rtx's,
2246 except for within LABEL_REFs and SYMBOL_REFs. */
2251 return 1 + success_2
;
2254 /* Describe the range of registers or memory referenced by X.
2255 If X is a register, set REG_FLAG and put the first register
2256 number into START and the last plus one into END.
2257 If X is a memory reference, put a base address into BASE
2258 and a range of integer offsets into START and END.
2259 If X is pushing on the stack, we can assume it causes no trouble,
2260 so we set the SAFE field. */
2262 static struct decomposition
2265 struct decomposition val
;
2268 memset (&val
, 0, sizeof (val
));
2270 if (GET_CODE (x
) == MEM
)
2272 rtx base
= NULL_RTX
, offset
= 0;
2273 rtx addr
= XEXP (x
, 0);
2275 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2276 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2278 val
.base
= XEXP (addr
, 0);
2279 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2280 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2281 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2285 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2287 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2288 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2289 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2291 val
.base
= XEXP (addr
, 0);
2292 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2293 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2294 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2299 if (GET_CODE (addr
) == CONST
)
2301 addr
= XEXP (addr
, 0);
2304 if (GET_CODE (addr
) == PLUS
)
2306 if (CONSTANT_P (XEXP (addr
, 0)))
2308 base
= XEXP (addr
, 1);
2309 offset
= XEXP (addr
, 0);
2311 else if (CONSTANT_P (XEXP (addr
, 1)))
2313 base
= XEXP (addr
, 0);
2314 offset
= XEXP (addr
, 1);
2321 offset
= const0_rtx
;
2323 if (GET_CODE (offset
) == CONST
)
2324 offset
= XEXP (offset
, 0);
2325 if (GET_CODE (offset
) == PLUS
)
2327 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2329 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2330 offset
= XEXP (offset
, 0);
2332 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2334 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2335 offset
= XEXP (offset
, 1);
2339 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2340 offset
= const0_rtx
;
2343 else if (GET_CODE (offset
) != CONST_INT
)
2345 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2346 offset
= const0_rtx
;
2349 if (all_const
&& GET_CODE (base
) == PLUS
)
2350 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2352 if (GET_CODE (offset
) != CONST_INT
)
2355 val
.start
= INTVAL (offset
);
2356 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2360 else if (GET_CODE (x
) == REG
)
2363 val
.start
= true_regnum (x
);
2366 /* A pseudo with no hard reg. */
2367 val
.start
= REGNO (x
);
2368 val
.end
= val
.start
+ 1;
2372 val
.end
= val
.start
+ hard_regno_nregs
[val
.start
][GET_MODE (x
)];
2374 else if (GET_CODE (x
) == SUBREG
)
2376 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2377 /* This could be more precise, but it's good enough. */
2378 return decompose (SUBREG_REG (x
));
2380 val
.start
= true_regnum (x
);
2382 return decompose (SUBREG_REG (x
));
2385 val
.end
= val
.start
+ hard_regno_nregs
[val
.start
][GET_MODE (x
)];
2387 else if (CONSTANT_P (x
)
2388 /* This hasn't been assigned yet, so it can't conflict yet. */
2389 || GET_CODE (x
) == SCRATCH
)
2396 /* Return 1 if altering Y will not modify the value of X.
2397 Y is also described by YDATA, which should be decompose (Y). */
2400 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2402 struct decomposition xdata
;
2405 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2409 if (GET_CODE (y
) != MEM
)
2411 /* If Y is memory and X is not, Y can't affect X. */
2412 if (GET_CODE (x
) != MEM
)
2415 xdata
= decompose (x
);
2417 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2419 /* If bases are distinct symbolic constants, there is no overlap. */
2420 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2422 /* Constants and stack slots never overlap. */
2423 if (CONSTANT_P (xdata
.base
)
2424 && (ydata
.base
== frame_pointer_rtx
2425 || ydata
.base
== hard_frame_pointer_rtx
2426 || ydata
.base
== stack_pointer_rtx
))
2428 if (CONSTANT_P (ydata
.base
)
2429 && (xdata
.base
== frame_pointer_rtx
2430 || xdata
.base
== hard_frame_pointer_rtx
2431 || xdata
.base
== stack_pointer_rtx
))
2433 /* If either base is variable, we don't know anything. */
2437 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2440 /* Similar, but calls decompose. */
2443 safe_from_earlyclobber (rtx op
, rtx clobber
)
2445 struct decomposition early_data
;
2447 early_data
= decompose (clobber
);
2448 return immune_p (op
, clobber
, early_data
);
2451 /* Main entry point of this file: search the body of INSN
2452 for values that need reloading and record them with push_reload.
2453 REPLACE nonzero means record also where the values occur
2454 so that subst_reloads can be used.
2456 IND_LEVELS says how many levels of indirection are supported by this
2457 machine; a value of zero means that a memory reference is not a valid
2460 LIVE_KNOWN says we have valid information about which hard
2461 regs are live at each point in the program; this is true when
2462 we are called from global_alloc but false when stupid register
2463 allocation has been done.
2465 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2466 which is nonnegative if the reg has been commandeered for reloading into.
2467 It is copied into STATIC_RELOAD_REG_P and referenced from there
2468 by various subroutines.
2470 Return TRUE if some operands need to be changed, because of swapping
2471 commutative operands, reg_equiv_address substitution, or whatever. */
2474 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2475 short *reload_reg_p
)
2477 int insn_code_number
;
2480 /* These start out as the constraints for the insn
2481 and they are chewed up as we consider alternatives. */
2482 char *constraints
[MAX_RECOG_OPERANDS
];
2483 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2485 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2486 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2487 /* Nonzero for a MEM operand whose entire address needs a reload. */
2488 int address_reloaded
[MAX_RECOG_OPERANDS
];
2489 /* Nonzero for an address operand that needs to be completely reloaded. */
2490 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2491 /* Value of enum reload_type to use for operand. */
2492 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2493 /* Value of enum reload_type to use within address of operand. */
2494 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2495 /* Save the usage of each operand. */
2496 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2497 int no_input_reloads
= 0, no_output_reloads
= 0;
2499 int this_alternative
[MAX_RECOG_OPERANDS
];
2500 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2501 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2502 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2503 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2504 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2506 int goal_alternative
[MAX_RECOG_OPERANDS
];
2507 int this_alternative_number
;
2508 int goal_alternative_number
= 0;
2509 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2510 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2511 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2512 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2513 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2514 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2515 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2516 int goal_alternative_swapped
;
2519 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2520 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2521 rtx body
= PATTERN (insn
);
2522 rtx set
= single_set (insn
);
2523 int goal_earlyclobber
= 0, this_earlyclobber
;
2524 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2530 n_earlyclobbers
= 0;
2531 replace_reloads
= replace
;
2532 hard_regs_live_known
= live_known
;
2533 static_reload_reg_p
= reload_reg_p
;
2535 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2536 neither are insns that SET cc0. Insns that use CC0 are not allowed
2537 to have any input reloads. */
2538 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2539 no_output_reloads
= 1;
2542 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2543 no_input_reloads
= 1;
2544 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2545 no_output_reloads
= 1;
2548 #ifdef SECONDARY_MEMORY_NEEDED
2549 /* The eliminated forms of any secondary memory locations are per-insn, so
2550 clear them out here. */
2552 if (secondary_memlocs_elim_used
)
2554 memset (secondary_memlocs_elim
, 0,
2555 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2556 secondary_memlocs_elim_used
= 0;
2560 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2561 is cheap to move between them. If it is not, there may not be an insn
2562 to do the copy, so we may need a reload. */
2563 if (GET_CODE (body
) == SET
2564 && GET_CODE (SET_DEST (body
)) == REG
2565 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2566 && GET_CODE (SET_SRC (body
)) == REG
2567 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2568 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2569 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2570 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2573 extract_insn (insn
);
2575 noperands
= reload_n_operands
= recog_data
.n_operands
;
2576 n_alternatives
= recog_data
.n_alternatives
;
2578 /* Just return "no reloads" if insn has no operands with constraints. */
2579 if (noperands
== 0 || n_alternatives
== 0)
2582 insn_code_number
= INSN_CODE (insn
);
2583 this_insn_is_asm
= insn_code_number
< 0;
2585 memcpy (operand_mode
, recog_data
.operand_mode
,
2586 noperands
* sizeof (enum machine_mode
));
2587 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2591 /* If we will need to know, later, whether some pair of operands
2592 are the same, we must compare them now and save the result.
2593 Reloading the base and index registers will clobber them
2594 and afterward they will fail to match. */
2596 for (i
= 0; i
< noperands
; i
++)
2601 substed_operand
[i
] = recog_data
.operand
[i
];
2604 modified
[i
] = RELOAD_READ
;
2606 /* Scan this operand's constraint to see if it is an output operand,
2607 an in-out operand, is commutative, or should match another. */
2611 p
+= CONSTRAINT_LEN (c
, p
);
2615 modified
[i
] = RELOAD_WRITE
;
2618 modified
[i
] = RELOAD_READ_WRITE
;
2622 /* The last operand should not be marked commutative. */
2623 if (i
== noperands
- 1)
2626 /* We currently only support one commutative pair of
2627 operands. Some existing asm code currently uses more
2628 than one pair. Previously, that would usually work,
2629 but sometimes it would crash the compiler. We
2630 continue supporting that case as well as we can by
2631 silently ignoring all but the first pair. In the
2632 future we may handle it correctly. */
2633 if (commutative
< 0)
2635 else if (!this_insn_is_asm
)
2639 /* Use of ISDIGIT is tempting here, but it may get expensive because
2640 of locale support we don't want. */
2641 case '0': case '1': case '2': case '3': case '4':
2642 case '5': case '6': case '7': case '8': case '9':
2644 c
= strtoul (p
- 1, &p
, 10);
2646 operands_match
[c
][i
]
2647 = operands_match_p (recog_data
.operand
[c
],
2648 recog_data
.operand
[i
]);
2650 /* An operand may not match itself. */
2654 /* If C can be commuted with C+1, and C might need to match I,
2655 then C+1 might also need to match I. */
2656 if (commutative
>= 0)
2658 if (c
== commutative
|| c
== commutative
+ 1)
2660 int other
= c
+ (c
== commutative
? 1 : -1);
2661 operands_match
[other
][i
]
2662 = operands_match_p (recog_data
.operand
[other
],
2663 recog_data
.operand
[i
]);
2665 if (i
== commutative
|| i
== commutative
+ 1)
2667 int other
= i
+ (i
== commutative
? 1 : -1);
2668 operands_match
[c
][other
]
2669 = operands_match_p (recog_data
.operand
[c
],
2670 recog_data
.operand
[other
]);
2672 /* Note that C is supposed to be less than I.
2673 No need to consider altering both C and I because in
2674 that case we would alter one into the other. */
2681 /* Examine each operand that is a memory reference or memory address
2682 and reload parts of the addresses into index registers.
2683 Also here any references to pseudo regs that didn't get hard regs
2684 but are equivalent to constants get replaced in the insn itself
2685 with those constants. Nobody will ever see them again.
2687 Finally, set up the preferred classes of each operand. */
2689 for (i
= 0; i
< noperands
; i
++)
2691 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2693 address_reloaded
[i
] = 0;
2694 address_operand_reloaded
[i
] = 0;
2695 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2696 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2699 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2700 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2703 if (*constraints
[i
] == 0)
2704 /* Ignore things like match_operator operands. */
2706 else if (constraints
[i
][0] == 'p'
2707 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2709 address_operand_reloaded
[i
]
2710 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2711 recog_data
.operand
[i
],
2712 recog_data
.operand_loc
[i
],
2713 i
, operand_type
[i
], ind_levels
, insn
);
2715 /* If we now have a simple operand where we used to have a
2716 PLUS or MULT, re-recognize and try again. */
2717 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2718 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2719 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2720 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2722 INSN_CODE (insn
) = -1;
2723 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2728 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2729 substed_operand
[i
] = recog_data
.operand
[i
];
2731 /* Address operands are reloaded in their existing mode,
2732 no matter what is specified in the machine description. */
2733 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2735 else if (code
== MEM
)
2738 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2739 recog_data
.operand_loc
[i
],
2740 XEXP (recog_data
.operand
[i
], 0),
2741 &XEXP (recog_data
.operand
[i
], 0),
2742 i
, address_type
[i
], ind_levels
, insn
);
2743 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2744 substed_operand
[i
] = recog_data
.operand
[i
];
2746 else if (code
== SUBREG
)
2748 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2750 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2753 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2755 &address_reloaded
[i
]);
2757 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2758 that didn't get a hard register, emit a USE with a REG_EQUAL
2759 note in front so that we might inherit a previous, possibly
2763 && GET_CODE (op
) == MEM
2764 && GET_CODE (reg
) == REG
2765 && (GET_MODE_SIZE (GET_MODE (reg
))
2766 >= GET_MODE_SIZE (GET_MODE (op
))))
2767 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2769 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2771 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2773 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2774 /* We can get a PLUS as an "operand" as a result of register
2775 elimination. See eliminate_regs and gen_reload. We handle
2776 a unary operator by reloading the operand. */
2777 substed_operand
[i
] = recog_data
.operand
[i
]
2778 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2779 ind_levels
, 0, insn
,
2780 &address_reloaded
[i
]);
2781 else if (code
== REG
)
2783 /* This is equivalent to calling find_reloads_toplev.
2784 The code is duplicated for speed.
2785 When we find a pseudo always equivalent to a constant,
2786 we replace it by the constant. We must be sure, however,
2787 that we don't try to replace it in the insn in which it
2789 int regno
= REGNO (recog_data
.operand
[i
]);
2790 if (reg_equiv_constant
[regno
] != 0
2791 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2793 /* Record the existing mode so that the check if constants are
2794 allowed will work when operand_mode isn't specified. */
2796 if (operand_mode
[i
] == VOIDmode
)
2797 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2799 substed_operand
[i
] = recog_data
.operand
[i
]
2800 = reg_equiv_constant
[regno
];
2802 if (reg_equiv_memory_loc
[regno
] != 0
2803 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2804 /* We need not give a valid is_set_dest argument since the case
2805 of a constant equivalence was checked above. */
2806 substed_operand
[i
] = recog_data
.operand
[i
]
2807 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2808 ind_levels
, 0, insn
,
2809 &address_reloaded
[i
]);
2811 /* If the operand is still a register (we didn't replace it with an
2812 equivalent), get the preferred class to reload it into. */
2813 code
= GET_CODE (recog_data
.operand
[i
]);
2815 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2816 >= FIRST_PSEUDO_REGISTER
)
2817 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2821 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2822 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2825 /* If this is simply a copy from operand 1 to operand 0, merge the
2826 preferred classes for the operands. */
2827 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2828 && recog_data
.operand
[1] == SET_SRC (set
))
2830 preferred_class
[0] = preferred_class
[1]
2831 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2832 pref_or_nothing
[0] |= pref_or_nothing
[1];
2833 pref_or_nothing
[1] |= pref_or_nothing
[0];
2836 /* Now see what we need for pseudo-regs that didn't get hard regs
2837 or got the wrong kind of hard reg. For this, we must consider
2838 all the operands together against the register constraints. */
2840 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2843 goal_alternative_swapped
= 0;
2846 /* The constraints are made of several alternatives.
2847 Each operand's constraint looks like foo,bar,... with commas
2848 separating the alternatives. The first alternatives for all
2849 operands go together, the second alternatives go together, etc.
2851 First loop over alternatives. */
2853 for (this_alternative_number
= 0;
2854 this_alternative_number
< n_alternatives
;
2855 this_alternative_number
++)
2857 /* Loop over operands for one constraint alternative. */
2858 /* LOSERS counts those that don't fit this alternative
2859 and would require loading. */
2861 /* BAD is set to 1 if it some operand can't fit this alternative
2862 even after reloading. */
2864 /* REJECT is a count of how undesirable this alternative says it is
2865 if any reloading is required. If the alternative matches exactly
2866 then REJECT is ignored, but otherwise it gets this much
2867 counted against it in addition to the reloading needed. Each
2868 ? counts three times here since we want the disparaging caused by
2869 a bad register class to only count 1/3 as much. */
2872 this_earlyclobber
= 0;
2874 for (i
= 0; i
< noperands
; i
++)
2876 char *p
= constraints
[i
];
2881 /* 0 => this operand can be reloaded somehow for this alternative. */
2883 /* 0 => this operand can be reloaded if the alternative allows regs. */
2887 rtx operand
= recog_data
.operand
[i
];
2889 /* Nonzero means this is a MEM that must be reloaded into a reg
2890 regardless of what the constraint says. */
2891 int force_reload
= 0;
2893 /* Nonzero if a constant forced into memory would be OK for this
2896 int earlyclobber
= 0;
2898 /* If the predicate accepts a unary operator, it means that
2899 we need to reload the operand, but do not do this for
2900 match_operator and friends. */
2901 if (UNARY_P (operand
) && *p
!= 0)
2902 operand
= XEXP (operand
, 0);
2904 /* If the operand is a SUBREG, extract
2905 the REG or MEM (or maybe even a constant) within.
2906 (Constants can occur as a result of reg_equiv_constant.) */
2908 while (GET_CODE (operand
) == SUBREG
)
2910 /* Offset only matters when operand is a REG and
2911 it is a hard reg. This is because it is passed
2912 to reg_fits_class_p if it is a REG and all pseudos
2913 return 0 from that function. */
2914 if (GET_CODE (SUBREG_REG (operand
)) == REG
2915 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2917 if (!subreg_offset_representable_p
2918 (REGNO (SUBREG_REG (operand
)),
2919 GET_MODE (SUBREG_REG (operand
)),
2920 SUBREG_BYTE (operand
),
2921 GET_MODE (operand
)))
2923 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2924 GET_MODE (SUBREG_REG (operand
)),
2925 SUBREG_BYTE (operand
),
2926 GET_MODE (operand
));
2928 operand
= SUBREG_REG (operand
);
2929 /* Force reload if this is a constant or PLUS or if there may
2930 be a problem accessing OPERAND in the outer mode. */
2931 if (CONSTANT_P (operand
)
2932 || GET_CODE (operand
) == PLUS
2933 /* We must force a reload of paradoxical SUBREGs
2934 of a MEM because the alignment of the inner value
2935 may not be enough to do the outer reference. On
2936 big-endian machines, it may also reference outside
2939 On machines that extend byte operations and we have a
2940 SUBREG where both the inner and outer modes are no wider
2941 than a word and the inner mode is narrower, is integral,
2942 and gets extended when loaded from memory, combine.c has
2943 made assumptions about the behavior of the machine in such
2944 register access. If the data is, in fact, in memory we
2945 must always load using the size assumed to be in the
2946 register and let the insn do the different-sized
2949 This is doubly true if WORD_REGISTER_OPERATIONS. In
2950 this case eliminate_regs has left non-paradoxical
2951 subregs for push_reload to see. Make sure it does
2952 by forcing the reload.
2954 ??? When is it right at this stage to have a subreg
2955 of a mem that is _not_ to be handled specially? IMO
2956 those should have been reduced to just a mem. */
2957 || ((GET_CODE (operand
) == MEM
2958 || (GET_CODE (operand
)== REG
2959 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2960 #ifndef WORD_REGISTER_OPERATIONS
2961 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2962 < BIGGEST_ALIGNMENT
)
2963 && (GET_MODE_SIZE (operand_mode
[i
])
2964 > GET_MODE_SIZE (GET_MODE (operand
))))
2965 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2966 #ifdef LOAD_EXTEND_OP
2967 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2968 && (GET_MODE_SIZE (GET_MODE (operand
))
2970 && (GET_MODE_SIZE (operand_mode
[i
])
2971 > GET_MODE_SIZE (GET_MODE (operand
)))
2972 && INTEGRAL_MODE_P (GET_MODE (operand
))
2973 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2982 this_alternative
[i
] = (int) NO_REGS
;
2983 this_alternative_win
[i
] = 0;
2984 this_alternative_match_win
[i
] = 0;
2985 this_alternative_offmemok
[i
] = 0;
2986 this_alternative_earlyclobber
[i
] = 0;
2987 this_alternative_matches
[i
] = -1;
2989 /* An empty constraint or empty alternative
2990 allows anything which matched the pattern. */
2991 if (*p
== 0 || *p
== ',')
2994 /* Scan this alternative's specs for this operand;
2995 set WIN if the operand fits any letter in this alternative.
2996 Otherwise, clear BADOP if this operand could
2997 fit some letter after reloads,
2998 or set WINREG if this operand could fit after reloads
2999 provided the constraint allows some registers. */
3002 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3011 case '=': case '+': case '*':
3015 /* We only support one commutative marker, the first
3016 one. We already set commutative above. */
3028 /* Ignore rest of this alternative as far as
3029 reloading is concerned. */
3032 while (*p
&& *p
!= ',');
3036 case '0': case '1': case '2': case '3': case '4':
3037 case '5': case '6': case '7': case '8': case '9':
3038 m
= strtoul (p
, &end
, 10);
3042 this_alternative_matches
[i
] = m
;
3043 /* We are supposed to match a previous operand.
3044 If we do, we win if that one did.
3045 If we do not, count both of the operands as losers.
3046 (This is too conservative, since most of the time
3047 only a single reload insn will be needed to make
3048 the two operands win. As a result, this alternative
3049 may be rejected when it is actually desirable.) */
3050 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3051 /* If we are matching as if two operands were swapped,
3052 also pretend that operands_match had been computed
3054 But if I is the second of those and C is the first,
3055 don't exchange them, because operands_match is valid
3056 only on one side of its diagonal. */
3058 [(m
== commutative
|| m
== commutative
+ 1)
3059 ? 2 * commutative
+ 1 - m
: m
]
3060 [(i
== commutative
|| i
== commutative
+ 1)
3061 ? 2 * commutative
+ 1 - i
: i
])
3062 : operands_match
[m
][i
])
3064 /* If we are matching a non-offsettable address where an
3065 offsettable address was expected, then we must reject
3066 this combination, because we can't reload it. */
3067 if (this_alternative_offmemok
[m
]
3068 && GET_CODE (recog_data
.operand
[m
]) == MEM
3069 && this_alternative
[m
] == (int) NO_REGS
3070 && ! this_alternative_win
[m
])
3073 did_match
= this_alternative_win
[m
];
3077 /* Operands don't match. */
3079 /* Retroactively mark the operand we had to match
3080 as a loser, if it wasn't already. */
3081 if (this_alternative_win
[m
])
3083 this_alternative_win
[m
] = 0;
3084 if (this_alternative
[m
] == (int) NO_REGS
)
3086 /* But count the pair only once in the total badness of
3087 this alternative, if the pair can be a dummy reload. */
3089 = find_dummy_reload (recog_data
.operand
[i
],
3090 recog_data
.operand
[m
],
3091 recog_data
.operand_loc
[i
],
3092 recog_data
.operand_loc
[m
],
3093 operand_mode
[i
], operand_mode
[m
],
3094 this_alternative
[m
], -1,
3095 this_alternative_earlyclobber
[m
]);
3100 /* This can be fixed with reloads if the operand
3101 we are supposed to match can be fixed with reloads. */
3103 this_alternative
[i
] = this_alternative
[m
];
3105 /* If we have to reload this operand and some previous
3106 operand also had to match the same thing as this
3107 operand, we don't know how to do that. So reject this
3109 if (! did_match
|| force_reload
)
3110 for (j
= 0; j
< i
; j
++)
3111 if (this_alternative_matches
[j
]
3112 == this_alternative_matches
[i
])
3117 /* All necessary reloads for an address_operand
3118 were handled in find_reloads_address. */
3119 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3127 if (GET_CODE (operand
) == MEM
3128 || (GET_CODE (operand
) == REG
3129 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3130 && reg_renumber
[REGNO (operand
)] < 0))
3132 if (CONST_POOL_OK_P (operand
))
3138 if (GET_CODE (operand
) == MEM
3139 && ! address_reloaded
[i
]
3140 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3141 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3146 if (GET_CODE (operand
) == MEM
3147 && ! address_reloaded
[i
]
3148 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3149 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3153 /* Memory operand whose address is not offsettable. */
3157 if (GET_CODE (operand
) == MEM
3158 && ! (ind_levels
? offsettable_memref_p (operand
)
3159 : offsettable_nonstrict_memref_p (operand
))
3160 /* Certain mem addresses will become offsettable
3161 after they themselves are reloaded. This is important;
3162 we don't want our own handling of unoffsettables
3163 to override the handling of reg_equiv_address. */
3164 && !(GET_CODE (XEXP (operand
, 0)) == REG
3166 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3170 /* Memory operand whose address is offsettable. */
3174 if ((GET_CODE (operand
) == MEM
3175 /* If IND_LEVELS, find_reloads_address won't reload a
3176 pseudo that didn't get a hard reg, so we have to
3177 reject that case. */
3178 && ((ind_levels
? offsettable_memref_p (operand
)
3179 : offsettable_nonstrict_memref_p (operand
))
3180 /* A reloaded address is offsettable because it is now
3181 just a simple register indirect. */
3182 || address_reloaded
[i
]))
3183 || (GET_CODE (operand
) == REG
3184 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3185 && reg_renumber
[REGNO (operand
)] < 0
3186 /* If reg_equiv_address is nonzero, we will be
3187 loading it into a register; hence it will be
3188 offsettable, but we cannot say that reg_equiv_mem
3189 is offsettable without checking. */
3190 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3191 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3192 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3194 if (CONST_POOL_OK_P (operand
)
3195 || GET_CODE (operand
) == MEM
)
3202 /* Output operand that is stored before the need for the
3203 input operands (and their index registers) is over. */
3204 earlyclobber
= 1, this_earlyclobber
= 1;
3209 if (GET_CODE (operand
) == CONST_DOUBLE
3210 || (GET_CODE (operand
) == CONST_VECTOR
3211 && (GET_MODE_CLASS (GET_MODE (operand
))
3212 == MODE_VECTOR_FLOAT
)))
3218 if (GET_CODE (operand
) == CONST_DOUBLE
3219 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3224 if (GET_CODE (operand
) == CONST_INT
3225 || (GET_CODE (operand
) == CONST_DOUBLE
3226 && GET_MODE (operand
) == VOIDmode
))
3229 if (CONSTANT_P (operand
)
3230 #ifdef LEGITIMATE_PIC_OPERAND_P
3231 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3238 if (GET_CODE (operand
) == CONST_INT
3239 || (GET_CODE (operand
) == CONST_DOUBLE
3240 && GET_MODE (operand
) == VOIDmode
))
3252 if (GET_CODE (operand
) == CONST_INT
3253 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3263 /* A PLUS is never a valid operand, but reload can make
3264 it from a register when eliminating registers. */
3265 && GET_CODE (operand
) != PLUS
3266 /* A SCRATCH is not a valid operand. */
3267 && GET_CODE (operand
) != SCRATCH
3268 #ifdef LEGITIMATE_PIC_OPERAND_P
3269 && (! CONSTANT_P (operand
)
3271 || LEGITIMATE_PIC_OPERAND_P (operand
))
3273 && (GENERAL_REGS
== ALL_REGS
3274 || GET_CODE (operand
) != REG
3275 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3276 && reg_renumber
[REGNO (operand
)] < 0)))
3278 /* Drop through into 'r' case. */
3282 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3286 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3288 #ifdef EXTRA_CONSTRAINT_STR
3289 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3293 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3295 /* If the address was already reloaded,
3297 else if (GET_CODE (operand
) == MEM
3298 && address_reloaded
[i
])
3300 /* Likewise if the address will be reloaded because
3301 reg_equiv_address is nonzero. For reg_equiv_mem
3302 we have to check. */
3303 else if (GET_CODE (operand
) == REG
3304 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3305 && reg_renumber
[REGNO (operand
)] < 0
3306 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3307 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3308 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3311 /* If we didn't already win, we can reload
3312 constants via force_const_mem, and other
3313 MEMs by reloading the address like for 'o'. */
3314 if (CONST_POOL_OK_P (operand
)
3315 || GET_CODE (operand
) == MEM
)
3321 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3323 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3326 /* If we didn't already win, we can reload
3327 the address into a base register. */
3328 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3333 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3340 = (int) (reg_class_subunion
3341 [this_alternative
[i
]]
3342 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3344 if (GET_MODE (operand
) == BLKmode
)
3347 if (GET_CODE (operand
) == REG
3348 && reg_fits_class_p (operand
, this_alternative
[i
],
3349 offset
, GET_MODE (recog_data
.operand
[i
])))
3353 while ((p
+= len
), c
);
3357 /* If this operand could be handled with a reg,
3358 and some reg is allowed, then this operand can be handled. */
3359 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3362 /* Record which operands fit this alternative. */
3363 this_alternative_earlyclobber
[i
] = earlyclobber
;
3364 if (win
&& ! force_reload
)
3365 this_alternative_win
[i
] = 1;
3366 else if (did_match
&& ! force_reload
)
3367 this_alternative_match_win
[i
] = 1;
3370 int const_to_mem
= 0;
3372 this_alternative_offmemok
[i
] = offmemok
;
3376 /* Alternative loses if it has no regs for a reg operand. */
3377 if (GET_CODE (operand
) == REG
3378 && this_alternative
[i
] == (int) NO_REGS
3379 && this_alternative_matches
[i
] < 0)
3382 /* If this is a constant that is reloaded into the desired
3383 class by copying it to memory first, count that as another
3384 reload. This is consistent with other code and is
3385 required to avoid choosing another alternative when
3386 the constant is moved into memory by this function on
3387 an early reload pass. Note that the test here is
3388 precisely the same as in the code below that calls
3390 if (CONST_POOL_OK_P (operand
)
3391 && ((PREFERRED_RELOAD_CLASS (operand
,
3392 (enum reg_class
) this_alternative
[i
])
3394 || no_input_reloads
)
3395 && operand_mode
[i
] != VOIDmode
)
3398 if (this_alternative
[i
] != (int) NO_REGS
)
3402 /* If we can't reload this value at all, reject this
3403 alternative. Note that we could also lose due to
3404 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3407 if (! CONSTANT_P (operand
)
3408 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3409 && (PREFERRED_RELOAD_CLASS (operand
,
3410 (enum reg_class
) this_alternative
[i
])
3414 /* Alternative loses if it requires a type of reload not
3415 permitted for this insn. We can always reload SCRATCH
3416 and objects with a REG_UNUSED note. */
3417 else if (GET_CODE (operand
) != SCRATCH
3418 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3419 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3421 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3425 /* We prefer to reload pseudos over reloading other things,
3426 since such reloads may be able to be eliminated later.
3427 If we are reloading a SCRATCH, we won't be generating any
3428 insns, just using a register, so it is also preferred.
3429 So bump REJECT in other cases. Don't do this in the
3430 case where we are forcing a constant into memory and
3431 it will then win since we don't want to have a different
3432 alternative match then. */
3433 if (! (GET_CODE (operand
) == REG
3434 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3435 && GET_CODE (operand
) != SCRATCH
3436 && ! (const_to_mem
&& constmemok
))
3439 /* Input reloads can be inherited more often than output
3440 reloads can be removed, so penalize output reloads. */
3441 if (operand_type
[i
] != RELOAD_FOR_INPUT
3442 && GET_CODE (operand
) != SCRATCH
)
3446 /* If this operand is a pseudo register that didn't get a hard
3447 reg and this alternative accepts some register, see if the
3448 class that we want is a subset of the preferred class for this
3449 register. If not, but it intersects that class, use the
3450 preferred class instead. If it does not intersect the preferred
3451 class, show that usage of this alternative should be discouraged;
3452 it will be discouraged more still if the register is `preferred
3453 or nothing'. We do this because it increases the chance of
3454 reusing our spill register in a later insn and avoiding a pair
3455 of memory stores and loads.
3457 Don't bother with this if this alternative will accept this
3460 Don't do this for a multiword operand, since it is only a
3461 small win and has the risk of requiring more spill registers,
3462 which could cause a large loss.
3464 Don't do this if the preferred class has only one register
3465 because we might otherwise exhaust the class. */
3467 if (! win
&& ! did_match
3468 && this_alternative
[i
] != (int) NO_REGS
3469 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3470 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3472 if (! reg_class_subset_p (this_alternative
[i
],
3473 preferred_class
[i
]))
3475 /* Since we don't have a way of forming the intersection,
3476 we just do something special if the preferred class
3477 is a subset of the class we have; that's the most
3478 common case anyway. */
3479 if (reg_class_subset_p (preferred_class
[i
],
3480 this_alternative
[i
]))
3481 this_alternative
[i
] = (int) preferred_class
[i
];
3483 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3488 /* Now see if any output operands that are marked "earlyclobber"
3489 in this alternative conflict with any input operands
3490 or any memory addresses. */
3492 for (i
= 0; i
< noperands
; i
++)
3493 if (this_alternative_earlyclobber
[i
]
3494 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3496 struct decomposition early_data
;
3498 early_data
= decompose (recog_data
.operand
[i
]);
3500 if (modified
[i
] == RELOAD_READ
)
3503 if (this_alternative
[i
] == NO_REGS
)
3505 this_alternative_earlyclobber
[i
] = 0;
3506 if (this_insn_is_asm
)
3507 error_for_asm (this_insn
,
3508 "`&' constraint used with no register class");
3513 for (j
= 0; j
< noperands
; j
++)
3514 /* Is this an input operand or a memory ref? */
3515 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3516 || modified
[j
] != RELOAD_WRITE
)
3518 /* Ignore things like match_operator operands. */
3519 && *recog_data
.constraints
[j
] != 0
3520 /* Don't count an input operand that is constrained to match
3521 the early clobber operand. */
3522 && ! (this_alternative_matches
[j
] == i
3523 && rtx_equal_p (recog_data
.operand
[i
],
3524 recog_data
.operand
[j
]))
3525 /* Is it altered by storing the earlyclobber operand? */
3526 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3529 /* If the output is in a single-reg class,
3530 it's costly to reload it, so reload the input instead. */
3531 if (reg_class_size
[this_alternative
[i
]] == 1
3532 && (GET_CODE (recog_data
.operand
[j
]) == REG
3533 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3536 this_alternative_win
[j
] = 0;
3537 this_alternative_match_win
[j
] = 0;
3542 /* If an earlyclobber operand conflicts with something,
3543 it must be reloaded, so request this and count the cost. */
3547 this_alternative_win
[i
] = 0;
3548 this_alternative_match_win
[j
] = 0;
3549 for (j
= 0; j
< noperands
; j
++)
3550 if (this_alternative_matches
[j
] == i
3551 && this_alternative_match_win
[j
])
3553 this_alternative_win
[j
] = 0;
3554 this_alternative_match_win
[j
] = 0;
3560 /* If one alternative accepts all the operands, no reload required,
3561 choose that alternative; don't consider the remaining ones. */
3564 /* Unswap these so that they are never swapped at `finish'. */
3565 if (commutative
>= 0)
3567 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3568 recog_data
.operand
[commutative
+ 1]
3569 = substed_operand
[commutative
+ 1];
3571 for (i
= 0; i
< noperands
; i
++)
3573 goal_alternative_win
[i
] = this_alternative_win
[i
];
3574 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3575 goal_alternative
[i
] = this_alternative
[i
];
3576 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3577 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3578 goal_alternative_earlyclobber
[i
]
3579 = this_alternative_earlyclobber
[i
];
3581 goal_alternative_number
= this_alternative_number
;
3582 goal_alternative_swapped
= swapped
;
3583 goal_earlyclobber
= this_earlyclobber
;
3587 /* REJECT, set by the ! and ? constraint characters and when a register
3588 would be reloaded into a non-preferred class, discourages the use of
3589 this alternative for a reload goal. REJECT is incremented by six
3590 for each ? and two for each non-preferred class. */
3591 losers
= losers
* 6 + reject
;
3593 /* If this alternative can be made to work by reloading,
3594 and it needs less reloading than the others checked so far,
3595 record it as the chosen goal for reloading. */
3596 if (! bad
&& best
> losers
)
3598 for (i
= 0; i
< noperands
; i
++)
3600 goal_alternative
[i
] = this_alternative
[i
];
3601 goal_alternative_win
[i
] = this_alternative_win
[i
];
3602 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3603 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3604 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3605 goal_alternative_earlyclobber
[i
]
3606 = this_alternative_earlyclobber
[i
];
3608 goal_alternative_swapped
= swapped
;
3610 goal_alternative_number
= this_alternative_number
;
3611 goal_earlyclobber
= this_earlyclobber
;
3615 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3616 then we need to try each alternative twice,
3617 the second time matching those two operands
3618 as if we had exchanged them.
3619 To do this, really exchange them in operands.
3621 If we have just tried the alternatives the second time,
3622 return operands to normal and drop through. */
3624 if (commutative
>= 0)
3629 enum reg_class tclass
;
3632 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3633 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3634 /* Swap the duplicates too. */
3635 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3636 if (recog_data
.dup_num
[i
] == commutative
3637 || recog_data
.dup_num
[i
] == commutative
+ 1)
3638 *recog_data
.dup_loc
[i
]
3639 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3641 tclass
= preferred_class
[commutative
];
3642 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3643 preferred_class
[commutative
+ 1] = tclass
;
3645 t
= pref_or_nothing
[commutative
];
3646 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3647 pref_or_nothing
[commutative
+ 1] = t
;
3649 memcpy (constraints
, recog_data
.constraints
,
3650 noperands
* sizeof (char *));
3655 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3656 recog_data
.operand
[commutative
+ 1]
3657 = substed_operand
[commutative
+ 1];
3658 /* Unswap the duplicates too. */
3659 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3660 if (recog_data
.dup_num
[i
] == commutative
3661 || recog_data
.dup_num
[i
] == commutative
+ 1)
3662 *recog_data
.dup_loc
[i
]
3663 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3667 /* The operands don't meet the constraints.
3668 goal_alternative describes the alternative
3669 that we could reach by reloading the fewest operands.
3670 Reload so as to fit it. */
3672 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3674 /* No alternative works with reloads?? */
3675 if (insn_code_number
>= 0)
3676 fatal_insn ("unable to generate reloads for:", insn
);
3677 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3678 /* Avoid further trouble with this insn. */
3679 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3684 /* Jump to `finish' from above if all operands are valid already.
3685 In that case, goal_alternative_win is all 1. */
3688 /* Right now, for any pair of operands I and J that are required to match,
3690 goal_alternative_matches[J] is I.
3691 Set up goal_alternative_matched as the inverse function:
3692 goal_alternative_matched[I] = J. */
3694 for (i
= 0; i
< noperands
; i
++)
3695 goal_alternative_matched
[i
] = -1;
3697 for (i
= 0; i
< noperands
; i
++)
3698 if (! goal_alternative_win
[i
]
3699 && goal_alternative_matches
[i
] >= 0)
3700 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3702 for (i
= 0; i
< noperands
; i
++)
3703 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3705 /* If the best alternative is with operands 1 and 2 swapped,
3706 consider them swapped before reporting the reloads. Update the
3707 operand numbers of any reloads already pushed. */
3709 if (goal_alternative_swapped
)
3713 tem
= substed_operand
[commutative
];
3714 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3715 substed_operand
[commutative
+ 1] = tem
;
3716 tem
= recog_data
.operand
[commutative
];
3717 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3718 recog_data
.operand
[commutative
+ 1] = tem
;
3719 tem
= *recog_data
.operand_loc
[commutative
];
3720 *recog_data
.operand_loc
[commutative
]
3721 = *recog_data
.operand_loc
[commutative
+ 1];
3722 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3724 for (i
= 0; i
< n_reloads
; i
++)
3726 if (rld
[i
].opnum
== commutative
)
3727 rld
[i
].opnum
= commutative
+ 1;
3728 else if (rld
[i
].opnum
== commutative
+ 1)
3729 rld
[i
].opnum
= commutative
;
3733 for (i
= 0; i
< noperands
; i
++)
3735 operand_reloadnum
[i
] = -1;
3737 /* If this is an earlyclobber operand, we need to widen the scope.
3738 The reload must remain valid from the start of the insn being
3739 reloaded until after the operand is stored into its destination.
3740 We approximate this with RELOAD_OTHER even though we know that we
3741 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3743 One special case that is worth checking is when we have an
3744 output that is earlyclobber but isn't used past the insn (typically
3745 a SCRATCH). In this case, we only need have the reload live
3746 through the insn itself, but not for any of our input or output
3748 But we must not accidentally narrow the scope of an existing
3749 RELOAD_OTHER reload - leave these alone.
3751 In any case, anything needed to address this operand can remain
3752 however they were previously categorized. */
3754 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3756 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3757 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3760 /* Any constants that aren't allowed and can't be reloaded
3761 into registers are here changed into memory references. */
3762 for (i
= 0; i
< noperands
; i
++)
3763 if (! goal_alternative_win
[i
]
3764 && CONST_POOL_OK_P (recog_data
.operand
[i
])
3765 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3766 (enum reg_class
) goal_alternative
[i
])
3768 || no_input_reloads
)
3769 && operand_mode
[i
] != VOIDmode
)
3771 substed_operand
[i
] = recog_data
.operand
[i
]
3772 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3773 recog_data
.operand
[i
]),
3774 i
, address_type
[i
], ind_levels
, 0, insn
,
3776 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3777 goal_alternative_number
))
3778 goal_alternative_win
[i
] = 1;
3781 /* Record the values of the earlyclobber operands for the caller. */
3782 if (goal_earlyclobber
)
3783 for (i
= 0; i
< noperands
; i
++)
3784 if (goal_alternative_earlyclobber
[i
])
3785 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3787 /* Now record reloads for all the operands that need them. */
3788 for (i
= 0; i
< noperands
; i
++)
3789 if (! goal_alternative_win
[i
])
3791 /* Operands that match previous ones have already been handled. */
3792 if (goal_alternative_matches
[i
] >= 0)
3794 /* Handle an operand with a nonoffsettable address
3795 appearing where an offsettable address will do
3796 by reloading the address into a base register.
3798 ??? We can also do this when the operand is a register and
3799 reg_equiv_mem is not offsettable, but this is a bit tricky,
3800 so we don't bother with it. It may not be worth doing. */
3801 else if (goal_alternative_matched
[i
] == -1
3802 && goal_alternative_offmemok
[i
]
3803 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3805 operand_reloadnum
[i
]
3806 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3807 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3808 MODE_BASE_REG_CLASS (VOIDmode
),
3809 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3810 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3811 rld
[operand_reloadnum
[i
]].inc
3812 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3814 /* If this operand is an output, we will have made any
3815 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3816 now we are treating part of the operand as an input, so
3817 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3819 if (modified
[i
] == RELOAD_WRITE
)
3821 for (j
= 0; j
< n_reloads
; j
++)
3823 if (rld
[j
].opnum
== i
)
3825 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3826 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3827 else if (rld
[j
].when_needed
3828 == RELOAD_FOR_OUTADDR_ADDRESS
)
3829 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3834 else if (goal_alternative_matched
[i
] == -1)
3836 operand_reloadnum
[i
]
3837 = push_reload ((modified
[i
] != RELOAD_WRITE
3838 ? recog_data
.operand
[i
] : 0),
3839 (modified
[i
] != RELOAD_READ
3840 ? recog_data
.operand
[i
] : 0),
3841 (modified
[i
] != RELOAD_WRITE
3842 ? recog_data
.operand_loc
[i
] : 0),
3843 (modified
[i
] != RELOAD_READ
3844 ? recog_data
.operand_loc
[i
] : 0),
3845 (enum reg_class
) goal_alternative
[i
],
3846 (modified
[i
] == RELOAD_WRITE
3847 ? VOIDmode
: operand_mode
[i
]),
3848 (modified
[i
] == RELOAD_READ
3849 ? VOIDmode
: operand_mode
[i
]),
3850 (insn_code_number
< 0 ? 0
3851 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3852 0, i
, operand_type
[i
]);
3854 /* In a matching pair of operands, one must be input only
3855 and the other must be output only.
3856 Pass the input operand as IN and the other as OUT. */
3857 else if (modified
[i
] == RELOAD_READ
3858 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3860 operand_reloadnum
[i
]
3861 = push_reload (recog_data
.operand
[i
],
3862 recog_data
.operand
[goal_alternative_matched
[i
]],
3863 recog_data
.operand_loc
[i
],
3864 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3865 (enum reg_class
) goal_alternative
[i
],
3867 operand_mode
[goal_alternative_matched
[i
]],
3868 0, 0, i
, RELOAD_OTHER
);
3869 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3871 else if (modified
[i
] == RELOAD_WRITE
3872 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3874 operand_reloadnum
[goal_alternative_matched
[i
]]
3875 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3876 recog_data
.operand
[i
],
3877 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3878 recog_data
.operand_loc
[i
],
3879 (enum reg_class
) goal_alternative
[i
],
3880 operand_mode
[goal_alternative_matched
[i
]],
3882 0, 0, i
, RELOAD_OTHER
);
3883 operand_reloadnum
[i
] = output_reloadnum
;
3885 else if (insn_code_number
>= 0)
3889 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3890 /* Avoid further trouble with this insn. */
3891 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3896 else if (goal_alternative_matched
[i
] < 0
3897 && goal_alternative_matches
[i
] < 0
3898 && !address_operand_reloaded
[i
]
3901 /* For each non-matching operand that's a MEM or a pseudo-register
3902 that didn't get a hard register, make an optional reload.
3903 This may get done even if the insn needs no reloads otherwise. */
3905 rtx operand
= recog_data
.operand
[i
];
3907 while (GET_CODE (operand
) == SUBREG
)
3908 operand
= SUBREG_REG (operand
);
3909 if ((GET_CODE (operand
) == MEM
3910 || (GET_CODE (operand
) == REG
3911 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3912 /* If this is only for an output, the optional reload would not
3913 actually cause us to use a register now, just note that
3914 something is stored here. */
3915 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3916 || modified
[i
] == RELOAD_WRITE
)
3917 && ! no_input_reloads
3918 /* An optional output reload might allow to delete INSN later.
3919 We mustn't make in-out reloads on insns that are not permitted
3921 If this is an asm, we can't delete it; we must not even call
3922 push_reload for an optional output reload in this case,
3923 because we can't be sure that the constraint allows a register,
3924 and push_reload verifies the constraints for asms. */
3925 && (modified
[i
] == RELOAD_READ
3926 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3927 operand_reloadnum
[i
]
3928 = push_reload ((modified
[i
] != RELOAD_WRITE
3929 ? recog_data
.operand
[i
] : 0),
3930 (modified
[i
] != RELOAD_READ
3931 ? recog_data
.operand
[i
] : 0),
3932 (modified
[i
] != RELOAD_WRITE
3933 ? recog_data
.operand_loc
[i
] : 0),
3934 (modified
[i
] != RELOAD_READ
3935 ? recog_data
.operand_loc
[i
] : 0),
3936 (enum reg_class
) goal_alternative
[i
],
3937 (modified
[i
] == RELOAD_WRITE
3938 ? VOIDmode
: operand_mode
[i
]),
3939 (modified
[i
] == RELOAD_READ
3940 ? VOIDmode
: operand_mode
[i
]),
3941 (insn_code_number
< 0 ? 0
3942 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3943 1, i
, operand_type
[i
]);
3944 /* If a memory reference remains (either as a MEM or a pseudo that
3945 did not get a hard register), yet we can't make an optional
3946 reload, check if this is actually a pseudo register reference;
3947 we then need to emit a USE and/or a CLOBBER so that reload
3948 inheritance will do the right thing. */
3950 && (GET_CODE (operand
) == MEM
3951 || (GET_CODE (operand
) == REG
3952 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3953 && reg_renumber
[REGNO (operand
)] < 0)))
3955 operand
= *recog_data
.operand_loc
[i
];
3957 while (GET_CODE (operand
) == SUBREG
)
3958 operand
= SUBREG_REG (operand
);
3959 if (GET_CODE (operand
) == REG
)
3961 if (modified
[i
] != RELOAD_WRITE
)
3962 /* We mark the USE with QImode so that we recognize
3963 it as one that can be safely deleted at the end
3965 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3967 if (modified
[i
] != RELOAD_READ
)
3968 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3972 else if (goal_alternative_matches
[i
] >= 0
3973 && goal_alternative_win
[goal_alternative_matches
[i
]]
3974 && modified
[i
] == RELOAD_READ
3975 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3976 && ! no_input_reloads
&& ! no_output_reloads
3979 /* Similarly, make an optional reload for a pair of matching
3980 objects that are in MEM or a pseudo that didn't get a hard reg. */
3982 rtx operand
= recog_data
.operand
[i
];
3984 while (GET_CODE (operand
) == SUBREG
)
3985 operand
= SUBREG_REG (operand
);
3986 if ((GET_CODE (operand
) == MEM
3987 || (GET_CODE (operand
) == REG
3988 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3989 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3991 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3992 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3993 recog_data
.operand
[i
],
3994 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3995 recog_data
.operand_loc
[i
],
3996 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3997 operand_mode
[goal_alternative_matches
[i
]],
3999 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4002 /* Perform whatever substitutions on the operands we are supposed
4003 to make due to commutativity or replacement of registers
4004 with equivalent constants or memory slots. */
4006 for (i
= 0; i
< noperands
; i
++)
4008 /* We only do this on the last pass through reload, because it is
4009 possible for some data (like reg_equiv_address) to be changed during
4010 later passes. Moreover, we loose the opportunity to get a useful
4011 reload_{in,out}_reg when we do these replacements. */
4015 rtx substitution
= substed_operand
[i
];
4017 *recog_data
.operand_loc
[i
] = substitution
;
4019 /* If we're replacing an operand with a LABEL_REF, we need
4020 to make sure that there's a REG_LABEL note attached to
4021 this instruction. */
4022 if (GET_CODE (insn
) != JUMP_INSN
4023 && GET_CODE (substitution
) == LABEL_REF
4024 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4025 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4026 XEXP (substitution
, 0),
4030 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4033 /* If this insn pattern contains any MATCH_DUP's, make sure that
4034 they will be substituted if the operands they match are substituted.
4035 Also do now any substitutions we already did on the operands.
4037 Don't do this if we aren't making replacements because we might be
4038 propagating things allocated by frame pointer elimination into places
4039 it doesn't expect. */
4041 if (insn_code_number
>= 0 && replace
)
4042 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4044 int opno
= recog_data
.dup_num
[i
];
4045 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4046 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4050 /* This loses because reloading of prior insns can invalidate the equivalence
4051 (or at least find_equiv_reg isn't smart enough to find it any more),
4052 causing this insn to need more reload regs than it needed before.
4053 It may be too late to make the reload regs available.
4054 Now this optimization is done safely in choose_reload_regs. */
4056 /* For each reload of a reg into some other class of reg,
4057 search for an existing equivalent reg (same value now) in the right class.
4058 We can use it as long as we don't need to change its contents. */
4059 for (i
= 0; i
< n_reloads
; i
++)
4060 if (rld
[i
].reg_rtx
== 0
4062 && GET_CODE (rld
[i
].in
) == REG
4066 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4067 static_reload_reg_p
, 0, rld
[i
].inmode
);
4068 /* Prevent generation of insn to load the value
4069 because the one we found already has the value. */
4071 rld
[i
].in
= rld
[i
].reg_rtx
;
4075 /* Perhaps an output reload can be combined with another
4076 to reduce needs by one. */
4077 if (!goal_earlyclobber
)
4080 /* If we have a pair of reloads for parts of an address, they are reloading
4081 the same object, the operands themselves were not reloaded, and they
4082 are for two operands that are supposed to match, merge the reloads and
4083 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4085 for (i
= 0; i
< n_reloads
; i
++)
4089 for (j
= i
+ 1; j
< n_reloads
; j
++)
4090 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4091 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4092 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4093 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4094 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4095 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4096 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4097 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4098 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4099 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4100 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4101 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4102 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4103 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4104 || (goal_alternative_matches
[rld
[j
].opnum
]
4107 for (k
= 0; k
< n_replacements
; k
++)
4108 if (replacements
[k
].what
== j
)
4109 replacements
[k
].what
= i
;
4111 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4112 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4113 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4115 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4120 /* Scan all the reloads and update their type.
4121 If a reload is for the address of an operand and we didn't reload
4122 that operand, change the type. Similarly, change the operand number
4123 of a reload when two operands match. If a reload is optional, treat it
4124 as though the operand isn't reloaded.
4126 ??? This latter case is somewhat odd because if we do the optional
4127 reload, it means the object is hanging around. Thus we need only
4128 do the address reload if the optional reload was NOT done.
4130 Change secondary reloads to be the address type of their operand, not
4133 If an operand's reload is now RELOAD_OTHER, change any
4134 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4135 RELOAD_FOR_OTHER_ADDRESS. */
4137 for (i
= 0; i
< n_reloads
; i
++)
4139 if (rld
[i
].secondary_p
4140 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4141 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4143 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4144 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4145 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4146 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4147 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4148 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4150 /* If we have a secondary reload to go along with this reload,
4151 change its type to RELOAD_FOR_OPADDR_ADDR. */
4153 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4154 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4155 && rld
[i
].secondary_in_reload
!= -1)
4157 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4159 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4161 /* If there's a tertiary reload we have to change it also. */
4162 if (secondary_in_reload
> 0
4163 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4164 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4165 = RELOAD_FOR_OPADDR_ADDR
;
4168 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4169 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4170 && rld
[i
].secondary_out_reload
!= -1)
4172 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4174 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4176 /* If there's a tertiary reload we have to change it also. */
4177 if (secondary_out_reload
4178 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4179 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4180 = RELOAD_FOR_OPADDR_ADDR
;
4183 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4184 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4185 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4187 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4190 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4191 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4192 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4193 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4195 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4197 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4198 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4201 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4202 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4203 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4205 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4206 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4207 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4208 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4209 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4210 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4211 This is complicated by the fact that a single operand can have more
4212 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4213 choose_reload_regs without affecting code quality, and cases that
4214 actually fail are extremely rare, so it turns out to be better to fix
4215 the problem here by not generating cases that choose_reload_regs will
4217 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4218 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4220 We can reduce the register pressure by exploiting that a
4221 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4222 does not conflict with any of them, if it is only used for the first of
4223 the RELOAD_FOR_X_ADDRESS reloads. */
4225 int first_op_addr_num
= -2;
4226 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4227 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4228 int need_change
= 0;
4229 /* We use last_op_addr_reload and the contents of the above arrays
4230 first as flags - -2 means no instance encountered, -1 means exactly
4231 one instance encountered.
4232 If more than one instance has been encountered, we store the reload
4233 number of the first reload of the kind in question; reload numbers
4234 are known to be non-negative. */
4235 for (i
= 0; i
< noperands
; i
++)
4236 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4237 for (i
= n_reloads
- 1; i
>= 0; i
--)
4239 switch (rld
[i
].when_needed
)
4241 case RELOAD_FOR_OPERAND_ADDRESS
:
4242 if (++first_op_addr_num
>= 0)
4244 first_op_addr_num
= i
;
4248 case RELOAD_FOR_INPUT_ADDRESS
:
4249 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4251 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4255 case RELOAD_FOR_OUTPUT_ADDRESS
:
4256 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4258 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4269 for (i
= 0; i
< n_reloads
; i
++)
4272 enum reload_type type
;
4274 switch (rld
[i
].when_needed
)
4276 case RELOAD_FOR_OPADDR_ADDR
:
4277 first_num
= first_op_addr_num
;
4278 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4280 case RELOAD_FOR_INPADDR_ADDRESS
:
4281 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4282 type
= RELOAD_FOR_INPUT_ADDRESS
;
4284 case RELOAD_FOR_OUTADDR_ADDRESS
:
4285 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4286 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4293 else if (i
> first_num
)
4294 rld
[i
].when_needed
= type
;
4297 /* Check if the only TYPE reload that uses reload I is
4298 reload FIRST_NUM. */
4299 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4301 if (rld
[j
].when_needed
== type
4302 && (rld
[i
].secondary_p
4303 ? rld
[j
].secondary_in_reload
== i
4304 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4306 rld
[i
].when_needed
= type
;
4315 /* See if we have any reloads that are now allowed to be merged
4316 because we've changed when the reload is needed to
4317 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4318 check for the most common cases. */
4320 for (i
= 0; i
< n_reloads
; i
++)
4321 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4322 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4323 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4324 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4325 for (j
= 0; j
< n_reloads
; j
++)
4326 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4327 && rld
[j
].when_needed
== rld
[i
].when_needed
4328 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4329 && rld
[i
].class == rld
[j
].class
4330 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4331 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4333 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4334 transfer_replacements (i
, j
);
4339 /* If we made any reloads for addresses, see if they violate a
4340 "no input reloads" requirement for this insn. But loads that we
4341 do after the insn (such as for output addresses) are fine. */
4342 if (no_input_reloads
)
4343 for (i
= 0; i
< n_reloads
; i
++)
4345 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4346 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4350 /* Compute reload_mode and reload_nregs. */
4351 for (i
= 0; i
< n_reloads
; i
++)
4354 = (rld
[i
].inmode
== VOIDmode
4355 || (GET_MODE_SIZE (rld
[i
].outmode
)
4356 > GET_MODE_SIZE (rld
[i
].inmode
)))
4357 ? rld
[i
].outmode
: rld
[i
].inmode
;
4359 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4362 /* Special case a simple move with an input reload and a
4363 destination of a hard reg, if the hard reg is ok, use it. */
4364 for (i
= 0; i
< n_reloads
; i
++)
4365 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4366 && GET_CODE (PATTERN (insn
)) == SET
4367 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4368 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4370 rtx dest
= SET_DEST (PATTERN (insn
));
4371 unsigned int regno
= REGNO (dest
);
4373 if (regno
< FIRST_PSEUDO_REGISTER
4374 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4375 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4377 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4380 for (nri
= 1; nri
< nr
; nri
++)
4381 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
+ nri
))
4385 rld
[i
].reg_rtx
= dest
;
4392 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4393 accepts a memory operand with constant address. */
4396 alternative_allows_memconst (const char *constraint
, int altnum
)
4399 /* Skip alternatives before the one requested. */
4402 while (*constraint
++ != ',');
4405 /* Scan the requested alternative for 'm' or 'o'.
4406 If one of them is present, this alternative accepts memory constants. */
4407 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4408 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4409 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4414 /* Scan X for memory references and scan the addresses for reloading.
4415 Also checks for references to "constant" regs that we want to eliminate
4416 and replaces them with the values they stand for.
4417 We may alter X destructively if it contains a reference to such.
4418 If X is just a constant reg, we return the equivalent value
4421 IND_LEVELS says how many levels of indirect addressing this machine
4424 OPNUM and TYPE identify the purpose of the reload.
4426 IS_SET_DEST is true if X is the destination of a SET, which is not
4427 appropriate to be replaced by a constant.
4429 INSN, if nonzero, is the insn in which we do the reload. It is used
4430 to determine if we may generate output reloads, and where to put USEs
4431 for pseudos that we have to replace with stack slots.
4433 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4434 result of find_reloads_address. */
4437 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4438 int ind_levels
, int is_set_dest
, rtx insn
,
4439 int *address_reloaded
)
4441 RTX_CODE code
= GET_CODE (x
);
4443 const char *fmt
= GET_RTX_FORMAT (code
);
4449 /* This code is duplicated for speed in find_reloads. */
4450 int regno
= REGNO (x
);
4451 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4452 x
= reg_equiv_constant
[regno
];
4454 /* This creates (subreg (mem...)) which would cause an unnecessary
4455 reload of the mem. */
4456 else if (reg_equiv_mem
[regno
] != 0)
4457 x
= reg_equiv_mem
[regno
];
4459 else if (reg_equiv_memory_loc
[regno
]
4460 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4462 rtx mem
= make_memloc (x
, regno
);
4463 if (reg_equiv_address
[regno
]
4464 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4466 /* If this is not a toplevel operand, find_reloads doesn't see
4467 this substitution. We have to emit a USE of the pseudo so
4468 that delete_output_reload can see it. */
4469 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4470 /* We mark the USE with QImode so that we recognize it
4471 as one that can be safely deleted at the end of
4473 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4476 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4477 opnum
, type
, ind_levels
, insn
);
4478 if (address_reloaded
)
4479 *address_reloaded
= i
;
4488 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4489 opnum
, type
, ind_levels
, insn
);
4490 if (address_reloaded
)
4491 *address_reloaded
= i
;
4496 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4498 /* Check for SUBREG containing a REG that's equivalent to a constant.
4499 If the constant has a known value, truncate it right now.
4500 Similarly if we are extracting a single-word of a multi-word
4501 constant. If the constant is symbolic, allow it to be substituted
4502 normally. push_reload will strip the subreg later. If the
4503 constant is VOIDmode, abort because we will lose the mode of
4504 the register (this should never happen because one of the cases
4505 above should handle it). */
4507 int regno
= REGNO (SUBREG_REG (x
));
4510 if (subreg_lowpart_p (x
)
4511 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4512 && reg_equiv_constant
[regno
] != 0
4513 && (tem
= gen_lowpart_common (GET_MODE (x
),
4514 reg_equiv_constant
[regno
])) != 0)
4517 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4518 && reg_equiv_constant
[regno
] != 0)
4521 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4522 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4528 /* If the subreg contains a reg that will be converted to a mem,
4529 convert the subreg to a narrower memref now.
4530 Otherwise, we would get (subreg (mem ...) ...),
4531 which would force reload of the mem.
4533 We also need to do this if there is an equivalent MEM that is
4534 not offsettable. In that case, alter_subreg would produce an
4535 invalid address on big-endian machines.
4537 For machines that extend byte loads, we must not reload using
4538 a wider mode if we have a paradoxical SUBREG. find_reloads will
4539 force a reload in that case. So we should not do anything here. */
4541 else if (regno
>= FIRST_PSEUDO_REGISTER
4542 #ifdef LOAD_EXTEND_OP
4543 && (GET_MODE_SIZE (GET_MODE (x
))
4544 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4546 && (reg_equiv_address
[regno
] != 0
4547 || (reg_equiv_mem
[regno
] != 0
4548 && (! strict_memory_address_p (GET_MODE (x
),
4549 XEXP (reg_equiv_mem
[regno
], 0))
4550 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4551 || num_not_at_initial_offset
))))
4552 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4556 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4560 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4561 ind_levels
, is_set_dest
, insn
,
4563 /* If we have replaced a reg with it's equivalent memory loc -
4564 that can still be handled here e.g. if it's in a paradoxical
4565 subreg - we must make the change in a copy, rather than using
4566 a destructive change. This way, find_reloads can still elect
4567 not to do the change. */
4568 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4570 x
= shallow_copy_rtx (x
);
4573 XEXP (x
, i
) = new_part
;
4579 /* Return a mem ref for the memory equivalent of reg REGNO.
4580 This mem ref is not shared with anything. */
4583 make_memloc (rtx ad
, int regno
)
4585 /* We must rerun eliminate_regs, in case the elimination
4586 offsets have changed. */
4588 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4590 /* If TEM might contain a pseudo, we must copy it to avoid
4591 modifying it when we do the substitution for the reload. */
4592 if (rtx_varies_p (tem
, 0))
4593 tem
= copy_rtx (tem
);
4595 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4596 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4598 /* Copy the result if it's still the same as the equivalence, to avoid
4599 modifying it when we do the substitution for the reload. */
4600 if (tem
== reg_equiv_memory_loc
[regno
])
4601 tem
= copy_rtx (tem
);
4605 /* Returns true if AD could be turned into a valid memory reference
4606 to mode MODE by reloading the part pointed to by PART into a
4610 maybe_memory_address_p (enum machine_mode mode
, rtx ad
, rtx
*part
)
4614 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4617 retv
= memory_address_p (mode
, ad
);
4623 /* Record all reloads needed for handling memory address AD
4624 which appears in *LOC in a memory reference to mode MODE
4625 which itself is found in location *MEMREFLOC.
4626 Note that we take shortcuts assuming that no multi-reg machine mode
4627 occurs as part of an address.
4629 OPNUM and TYPE specify the purpose of this reload.
4631 IND_LEVELS says how many levels of indirect addressing this machine
4634 INSN, if nonzero, is the insn in which we do the reload. It is used
4635 to determine if we may generate output reloads, and where to put USEs
4636 for pseudos that we have to replace with stack slots.
4638 Value is nonzero if this address is reloaded or replaced as a whole.
4639 This is interesting to the caller if the address is an autoincrement.
4641 Note that there is no verification that the address will be valid after
4642 this routine does its work. Instead, we rely on the fact that the address
4643 was valid when reload started. So we need only undo things that reload
4644 could have broken. These are wrong register types, pseudos not allocated
4645 to a hard register, and frame pointer elimination. */
4648 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4649 rtx
*loc
, int opnum
, enum reload_type type
,
4650 int ind_levels
, rtx insn
)
4653 int removed_and
= 0;
4656 /* If the address is a register, see if it is a legitimate address and
4657 reload if not. We first handle the cases where we need not reload
4658 or where we must reload in a non-standard way. */
4660 if (GET_CODE (ad
) == REG
)
4664 /* If the register is equivalent to an invariant expression, substitute
4665 the invariant, and eliminate any eliminable register references. */
4666 tem
= reg_equiv_constant
[regno
];
4668 && (tem
= eliminate_regs (tem
, mode
, insn
))
4669 && strict_memory_address_p (mode
, tem
))
4675 tem
= reg_equiv_memory_loc
[regno
];
4678 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4680 tem
= make_memloc (ad
, regno
);
4681 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4683 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4684 &XEXP (tem
, 0), opnum
,
4685 ADDR_TYPE (type
), ind_levels
, insn
);
4687 /* We can avoid a reload if the register's equivalent memory
4688 expression is valid as an indirect memory address.
4689 But not all addresses are valid in a mem used as an indirect
4690 address: only reg or reg+constant. */
4693 && strict_memory_address_p (mode
, tem
)
4694 && (GET_CODE (XEXP (tem
, 0)) == REG
4695 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4696 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4697 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4699 /* TEM is not the same as what we'll be replacing the
4700 pseudo with after reload, put a USE in front of INSN
4701 in the final reload pass. */
4703 && num_not_at_initial_offset
4704 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4707 /* We mark the USE with QImode so that we
4708 recognize it as one that can be safely
4709 deleted at the end of reload. */
4710 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4713 /* This doesn't really count as replacing the address
4714 as a whole, since it is still a memory access. */
4722 /* The only remaining case where we can avoid a reload is if this is a
4723 hard register that is valid as a base register and which is not the
4724 subject of a CLOBBER in this insn. */
4726 else if (regno
< FIRST_PSEUDO_REGISTER
4727 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4728 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4731 /* If we do not have one of the cases above, we must do the reload. */
4732 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4733 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4737 if (strict_memory_address_p (mode
, ad
))
4739 /* The address appears valid, so reloads are not needed.
4740 But the address may contain an eliminable register.
4741 This can happen because a machine with indirect addressing
4742 may consider a pseudo register by itself a valid address even when
4743 it has failed to get a hard reg.
4744 So do a tree-walk to find and eliminate all such regs. */
4746 /* But first quickly dispose of a common case. */
4747 if (GET_CODE (ad
) == PLUS
4748 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4749 && GET_CODE (XEXP (ad
, 0)) == REG
4750 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4753 subst_reg_equivs_changed
= 0;
4754 *loc
= subst_reg_equivs (ad
, insn
);
4756 if (! subst_reg_equivs_changed
)
4759 /* Check result for validity after substitution. */
4760 if (strict_memory_address_p (mode
, ad
))
4764 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4769 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4774 *memrefloc
= copy_rtx (*memrefloc
);
4775 XEXP (*memrefloc
, 0) = ad
;
4776 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4782 /* The address is not valid. We have to figure out why. First see if
4783 we have an outer AND and remove it if so. Then analyze what's inside. */
4785 if (GET_CODE (ad
) == AND
)
4788 loc
= &XEXP (ad
, 0);
4792 /* One possibility for why the address is invalid is that it is itself
4793 a MEM. This can happen when the frame pointer is being eliminated, a
4794 pseudo is not allocated to a hard register, and the offset between the
4795 frame and stack pointers is not its initial value. In that case the
4796 pseudo will have been replaced by a MEM referring to the
4798 if (GET_CODE (ad
) == MEM
)
4800 /* First ensure that the address in this MEM is valid. Then, unless
4801 indirect addresses are valid, reload the MEM into a register. */
4803 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4804 opnum
, ADDR_TYPE (type
),
4805 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4807 /* If tem was changed, then we must create a new memory reference to
4808 hold it and store it back into memrefloc. */
4809 if (tem
!= ad
&& memrefloc
)
4811 *memrefloc
= copy_rtx (*memrefloc
);
4812 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4813 loc
= &XEXP (*memrefloc
, 0);
4815 loc
= &XEXP (*loc
, 0);
4818 /* Check similar cases as for indirect addresses as above except
4819 that we can allow pseudos and a MEM since they should have been
4820 taken care of above. */
4823 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4824 || GET_CODE (XEXP (tem
, 0)) == MEM
4825 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4826 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4827 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4828 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4830 /* Must use TEM here, not AD, since it is the one that will
4831 have any subexpressions reloaded, if needed. */
4832 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4833 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4836 return ! removed_and
;
4842 /* If we have address of a stack slot but it's not valid because the
4843 displacement is too large, compute the sum in a register.
4844 Handle all base registers here, not just fp/ap/sp, because on some
4845 targets (namely SH) we can also get too large displacements from
4846 big-endian corrections. */
4847 else if (GET_CODE (ad
) == PLUS
4848 && GET_CODE (XEXP (ad
, 0)) == REG
4849 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4850 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4851 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4853 /* Unshare the MEM rtx so we can safely alter it. */
4856 *memrefloc
= copy_rtx (*memrefloc
);
4857 loc
= &XEXP (*memrefloc
, 0);
4859 loc
= &XEXP (*loc
, 0);
4862 if (double_reg_address_ok
)
4864 /* Unshare the sum as well. */
4865 *loc
= ad
= copy_rtx (ad
);
4867 /* Reload the displacement into an index reg.
4868 We assume the frame pointer or arg pointer is a base reg. */
4869 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4870 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4876 /* If the sum of two regs is not necessarily valid,
4877 reload the sum into a base reg.
4878 That will at least work. */
4879 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4880 Pmode
, opnum
, type
, ind_levels
);
4882 return ! removed_and
;
4885 /* If we have an indexed stack slot, there are three possible reasons why
4886 it might be invalid: The index might need to be reloaded, the address
4887 might have been made by frame pointer elimination and hence have a
4888 constant out of range, or both reasons might apply.
4890 We can easily check for an index needing reload, but even if that is the
4891 case, we might also have an invalid constant. To avoid making the
4892 conservative assumption and requiring two reloads, we see if this address
4893 is valid when not interpreted strictly. If it is, the only problem is
4894 that the index needs a reload and find_reloads_address_1 will take care
4897 Handle all base registers here, not just fp/ap/sp, because on some
4898 targets (namely SPARC) we can also get invalid addresses from preventive
4899 subreg big-endian corrections made by find_reloads_toplev.
4901 If we decide to do something, it must be that `double_reg_address_ok'
4902 is true. We generate a reload of the base register + constant and
4903 rework the sum so that the reload register will be added to the index.
4904 This is safe because we know the address isn't shared.
4906 We check for the base register as both the first and second operand of
4907 the innermost PLUS. */
4909 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4910 && GET_CODE (XEXP (ad
, 0)) == PLUS
4911 && GET_CODE (XEXP (XEXP (ad
, 0), 0)) == REG
4912 && REGNO (XEXP (XEXP (ad
, 0), 0)) < FIRST_PSEUDO_REGISTER
4913 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad
, 0), 0), mode
)
4914 || XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4915 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4916 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4918 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4919 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4921 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4922 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 1)))
4924 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4925 plus_constant (XEXP (XEXP (ad
, 0), 0),
4926 INTVAL (XEXP (ad
, 1))),
4927 XEXP (XEXP (ad
, 0), 1));
4928 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4929 MODE_BASE_REG_CLASS (mode
),
4930 GET_MODE (ad
), opnum
, type
, ind_levels
);
4931 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4937 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4938 && GET_CODE (XEXP (ad
, 0)) == PLUS
4939 && GET_CODE (XEXP (XEXP (ad
, 0), 1)) == REG
4940 && REGNO (XEXP (XEXP (ad
, 0), 1)) < FIRST_PSEUDO_REGISTER
4941 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad
, 0), 1), mode
)
4942 || XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4943 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4944 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4946 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4947 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4949 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4950 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 0)))
4952 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4953 XEXP (XEXP (ad
, 0), 0),
4954 plus_constant (XEXP (XEXP (ad
, 0), 1),
4955 INTVAL (XEXP (ad
, 1))));
4956 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4957 MODE_BASE_REG_CLASS (mode
),
4958 GET_MODE (ad
), opnum
, type
, ind_levels
);
4959 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4965 /* See if address becomes valid when an eliminable register
4966 in a sum is replaced. */
4969 if (GET_CODE (ad
) == PLUS
)
4970 tem
= subst_indexed_address (ad
);
4971 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4973 /* Ok, we win that way. Replace any additional eliminable
4976 subst_reg_equivs_changed
= 0;
4977 tem
= subst_reg_equivs (tem
, insn
);
4979 /* Make sure that didn't make the address invalid again. */
4981 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4988 /* If constants aren't valid addresses, reload the constant address
4990 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4992 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4993 Unshare it so we can safely alter it. */
4994 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4995 && CONSTANT_POOL_ADDRESS_P (ad
))
4997 *memrefloc
= copy_rtx (*memrefloc
);
4998 loc
= &XEXP (*memrefloc
, 0);
5000 loc
= &XEXP (*loc
, 0);
5003 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
5004 Pmode
, opnum
, type
, ind_levels
);
5005 return ! removed_and
;
5008 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
5012 /* Find all pseudo regs appearing in AD
5013 that are eliminable in favor of equivalent values
5014 and do not have hard regs; replace them by their equivalents.
5015 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5016 front of it for pseudos that we have to replace with stack slots. */
5019 subst_reg_equivs (rtx ad
, rtx insn
)
5021 RTX_CODE code
= GET_CODE (ad
);
5040 int regno
= REGNO (ad
);
5042 if (reg_equiv_constant
[regno
] != 0)
5044 subst_reg_equivs_changed
= 1;
5045 return reg_equiv_constant
[regno
];
5047 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5049 rtx mem
= make_memloc (ad
, regno
);
5050 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5052 subst_reg_equivs_changed
= 1;
5053 /* We mark the USE with QImode so that we recognize it
5054 as one that can be safely deleted at the end of
5056 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5065 /* Quickly dispose of a common case. */
5066 if (XEXP (ad
, 0) == frame_pointer_rtx
5067 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5075 fmt
= GET_RTX_FORMAT (code
);
5076 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5078 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5082 /* Compute the sum of X and Y, making canonicalizations assumed in an
5083 address, namely: sum constant integers, surround the sum of two
5084 constants with a CONST, put the constant as the second operand, and
5085 group the constant on the outermost sum.
5087 This routine assumes both inputs are already in canonical form. */
5090 form_sum (rtx x
, rtx y
)
5093 enum machine_mode mode
= GET_MODE (x
);
5095 if (mode
== VOIDmode
)
5096 mode
= GET_MODE (y
);
5098 if (mode
== VOIDmode
)
5101 if (GET_CODE (x
) == CONST_INT
)
5102 return plus_constant (y
, INTVAL (x
));
5103 else if (GET_CODE (y
) == CONST_INT
)
5104 return plus_constant (x
, INTVAL (y
));
5105 else if (CONSTANT_P (x
))
5106 tem
= x
, x
= y
, y
= tem
;
5108 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5109 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5111 /* Note that if the operands of Y are specified in the opposite
5112 order in the recursive calls below, infinite recursion will occur. */
5113 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5114 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5116 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5117 constant will have been placed second. */
5118 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5120 if (GET_CODE (x
) == CONST
)
5122 if (GET_CODE (y
) == CONST
)
5125 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5128 return gen_rtx_PLUS (mode
, x
, y
);
5131 /* If ADDR is a sum containing a pseudo register that should be
5132 replaced with a constant (from reg_equiv_constant),
5133 return the result of doing so, and also apply the associative
5134 law so that the result is more likely to be a valid address.
5135 (But it is not guaranteed to be one.)
5137 Note that at most one register is replaced, even if more are
5138 replaceable. Also, we try to put the result into a canonical form
5139 so it is more likely to be a valid address.
5141 In all other cases, return ADDR. */
5144 subst_indexed_address (rtx addr
)
5146 rtx op0
= 0, op1
= 0, op2
= 0;
5150 if (GET_CODE (addr
) == PLUS
)
5152 /* Try to find a register to replace. */
5153 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5154 if (GET_CODE (op0
) == REG
5155 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5156 && reg_renumber
[regno
] < 0
5157 && reg_equiv_constant
[regno
] != 0)
5158 op0
= reg_equiv_constant
[regno
];
5159 else if (GET_CODE (op1
) == REG
5160 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5161 && reg_renumber
[regno
] < 0
5162 && reg_equiv_constant
[regno
] != 0)
5163 op1
= reg_equiv_constant
[regno
];
5164 else if (GET_CODE (op0
) == PLUS
5165 && (tem
= subst_indexed_address (op0
)) != op0
)
5167 else if (GET_CODE (op1
) == PLUS
5168 && (tem
= subst_indexed_address (op1
)) != op1
)
5173 /* Pick out up to three things to add. */
5174 if (GET_CODE (op1
) == PLUS
)
5175 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5176 else if (GET_CODE (op0
) == PLUS
)
5177 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5179 /* Compute the sum. */
5181 op1
= form_sum (op1
, op2
);
5183 op0
= form_sum (op0
, op1
);
5190 /* Update the REG_INC notes for an insn. It updates all REG_INC
5191 notes for the instruction which refer to REGNO the to refer
5192 to the reload number.
5194 INSN is the insn for which any REG_INC notes need updating.
5196 REGNO is the register number which has been reloaded.
5198 RELOADNUM is the reload number. */
5201 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5202 int reloadnum ATTRIBUTE_UNUSED
)
5207 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5208 if (REG_NOTE_KIND (link
) == REG_INC
5209 && (int) REGNO (XEXP (link
, 0)) == regno
)
5210 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5214 /* Record the pseudo registers we must reload into hard registers in a
5215 subexpression of a would-be memory address, X referring to a value
5216 in mode MODE. (This function is not called if the address we find
5219 CONTEXT = 1 means we are considering regs as index regs,
5220 = 0 means we are considering them as base regs.
5222 OPNUM and TYPE specify the purpose of any reloads made.
5224 IND_LEVELS says how many levels of indirect addressing are
5225 supported at this point in the address.
5227 INSN, if nonzero, is the insn in which we do the reload. It is used
5228 to determine if we may generate output reloads.
5230 We return nonzero if X, as a whole, is reloaded or replaced. */
5232 /* Note that we take shortcuts assuming that no multi-reg machine mode
5233 occurs as part of an address.
5234 Also, this is not fully machine-customizable; it works for machines
5235 such as VAXen and 68000's and 32000's, but other possible machines
5236 could have addressing modes that this does not handle right. */
5239 find_reloads_address_1 (enum machine_mode mode
, rtx x
, int context
,
5240 rtx
*loc
, int opnum
, enum reload_type type
,
5241 int ind_levels
, rtx insn
)
5243 RTX_CODE code
= GET_CODE (x
);
5249 rtx orig_op0
= XEXP (x
, 0);
5250 rtx orig_op1
= XEXP (x
, 1);
5251 RTX_CODE code0
= GET_CODE (orig_op0
);
5252 RTX_CODE code1
= GET_CODE (orig_op1
);
5256 if (GET_CODE (op0
) == SUBREG
)
5258 op0
= SUBREG_REG (op0
);
5259 code0
= GET_CODE (op0
);
5260 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5261 op0
= gen_rtx_REG (word_mode
,
5263 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5264 GET_MODE (SUBREG_REG (orig_op0
)),
5265 SUBREG_BYTE (orig_op0
),
5266 GET_MODE (orig_op0
))));
5269 if (GET_CODE (op1
) == SUBREG
)
5271 op1
= SUBREG_REG (op1
);
5272 code1
= GET_CODE (op1
);
5273 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5274 /* ??? Why is this given op1's mode and above for
5275 ??? op0 SUBREGs we use word_mode? */
5276 op1
= gen_rtx_REG (GET_MODE (op1
),
5278 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5279 GET_MODE (SUBREG_REG (orig_op1
)),
5280 SUBREG_BYTE (orig_op1
),
5281 GET_MODE (orig_op1
))));
5283 /* Plus in the index register may be created only as a result of
5284 register remateralization for expression like &localvar*4. Reload it.
5285 It may be possible to combine the displacement on the outer level,
5286 but it is probably not worthwhile to do so. */
5289 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5290 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5291 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5292 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5293 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5297 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5298 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5300 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5301 type
, ind_levels
, insn
);
5302 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5303 type
, ind_levels
, insn
);
5306 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5307 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5309 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5310 type
, ind_levels
, insn
);
5311 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5312 type
, ind_levels
, insn
);
5315 else if (code0
== CONST_INT
|| code0
== CONST
5316 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5317 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5318 type
, ind_levels
, insn
);
5320 else if (code1
== CONST_INT
|| code1
== CONST
5321 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5322 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5323 type
, ind_levels
, insn
);
5325 else if (code0
== REG
&& code1
== REG
)
5327 if (REG_OK_FOR_INDEX_P (op0
)
5328 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5330 else if (REG_OK_FOR_INDEX_P (op1
)
5331 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5333 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5334 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5335 type
, ind_levels
, insn
);
5336 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5337 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5338 type
, ind_levels
, insn
);
5339 else if (REG_OK_FOR_INDEX_P (op1
))
5340 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5341 type
, ind_levels
, insn
);
5342 else if (REG_OK_FOR_INDEX_P (op0
))
5343 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5344 type
, ind_levels
, insn
);
5347 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5348 type
, ind_levels
, insn
);
5349 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5350 type
, ind_levels
, insn
);
5354 else if (code0
== REG
)
5356 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5357 type
, ind_levels
, insn
);
5358 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5359 type
, ind_levels
, insn
);
5362 else if (code1
== REG
)
5364 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5365 type
, ind_levels
, insn
);
5366 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5367 type
, ind_levels
, insn
);
5376 rtx op0
= XEXP (x
, 0);
5377 rtx op1
= XEXP (x
, 1);
5379 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5382 /* Currently, we only support {PRE,POST}_MODIFY constructs
5383 where a base register is {inc,dec}remented by the contents
5384 of another register or by a constant value. Thus, these
5385 operands must match. */
5386 if (op0
!= XEXP (op1
, 0))
5389 /* Require index register (or constant). Let's just handle the
5390 register case in the meantime... If the target allows
5391 auto-modify by a constant then we could try replacing a pseudo
5392 register with its equivalent constant where applicable. */
5393 if (REG_P (XEXP (op1
, 1)))
5394 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5395 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5396 opnum
, type
, ind_levels
, insn
);
5398 if (REG_P (XEXP (op1
, 0)))
5400 int regno
= REGNO (XEXP (op1
, 0));
5403 /* A register that is incremented cannot be constant! */
5404 if (regno
>= FIRST_PSEUDO_REGISTER
5405 && reg_equiv_constant
[regno
] != 0)
5408 /* Handle a register that is equivalent to a memory location
5409 which cannot be addressed directly. */
5410 if (reg_equiv_memory_loc
[regno
] != 0
5411 && (reg_equiv_address
[regno
] != 0
5412 || num_not_at_initial_offset
))
5414 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5416 if (reg_equiv_address
[regno
]
5417 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5419 /* First reload the memory location's address.
5420 We can't use ADDR_TYPE (type) here, because we need to
5421 write back the value after reading it, hence we actually
5422 need two registers. */
5423 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5424 &XEXP (tem
, 0), opnum
,
5428 /* Then reload the memory location into a base
5430 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5432 MODE_BASE_REG_CLASS (mode
),
5433 GET_MODE (x
), GET_MODE (x
), 0,
5434 0, opnum
, RELOAD_OTHER
);
5436 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5441 if (reg_renumber
[regno
] >= 0)
5442 regno
= reg_renumber
[regno
];
5444 /* We require a base register here... */
5445 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5447 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5448 &XEXP (op1
, 0), &XEXP (x
, 0),
5449 MODE_BASE_REG_CLASS (mode
),
5450 GET_MODE (x
), GET_MODE (x
), 0, 0,
5451 opnum
, RELOAD_OTHER
);
5453 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5466 if (GET_CODE (XEXP (x
, 0)) == REG
)
5468 int regno
= REGNO (XEXP (x
, 0));
5472 /* A register that is incremented cannot be constant! */
5473 if (regno
>= FIRST_PSEUDO_REGISTER
5474 && reg_equiv_constant
[regno
] != 0)
5477 /* Handle a register that is equivalent to a memory location
5478 which cannot be addressed directly. */
5479 if (reg_equiv_memory_loc
[regno
] != 0
5480 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5482 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5483 if (reg_equiv_address
[regno
]
5484 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5486 /* First reload the memory location's address.
5487 We can't use ADDR_TYPE (type) here, because we need to
5488 write back the value after reading it, hence we actually
5489 need two registers. */
5490 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5491 &XEXP (tem
, 0), opnum
, type
,
5493 /* Put this inside a new increment-expression. */
5494 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5495 /* Proceed to reload that, as if it contained a register. */
5499 /* If we have a hard register that is ok as an index,
5500 don't make a reload. If an autoincrement of a nice register
5501 isn't "valid", it must be that no autoincrement is "valid".
5502 If that is true and something made an autoincrement anyway,
5503 this must be a special context where one is allowed.
5504 (For example, a "push" instruction.)
5505 We can't improve this address, so leave it alone. */
5507 /* Otherwise, reload the autoincrement into a suitable hard reg
5508 and record how much to increment by. */
5510 if (reg_renumber
[regno
] >= 0)
5511 regno
= reg_renumber
[regno
];
5512 if ((regno
>= FIRST_PSEUDO_REGISTER
5513 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5514 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5518 /* If we can output the register afterwards, do so, this
5519 saves the extra update.
5520 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5521 CALL_INSN - and it does not set CC0.
5522 But don't do this if we cannot directly address the
5523 memory location, since this will make it harder to
5524 reuse address reloads, and increases register pressure.
5525 Also don't do this if we can probably update x directly. */
5526 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5528 : reg_equiv_mem
[regno
]);
5529 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5530 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5531 && memory_operand (equiv
, GET_MODE (equiv
))
5533 && ! sets_cc0_p (PATTERN (insn
))
5535 && ! (icode
!= CODE_FOR_nothing
5536 && ((*insn_data
[icode
].operand
[0].predicate
)
5538 && ((*insn_data
[icode
].operand
[1].predicate
)
5541 /* We use the original pseudo for loc, so that
5542 emit_reload_insns() knows which pseudo this
5543 reload refers to and updates the pseudo rtx, not
5544 its equivalent memory location, as well as the
5545 corresponding entry in reg_last_reload_reg. */
5546 loc
= &XEXP (x_orig
, 0);
5549 = push_reload (x
, x
, loc
, loc
,
5550 (context
? INDEX_REG_CLASS
:
5551 MODE_BASE_REG_CLASS (mode
)),
5552 GET_MODE (x
), GET_MODE (x
), 0, 0,
5553 opnum
, RELOAD_OTHER
);
5558 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5559 (context
? INDEX_REG_CLASS
:
5560 MODE_BASE_REG_CLASS (mode
)),
5561 GET_MODE (x
), GET_MODE (x
), 0, 0,
5564 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5569 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5575 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5577 /* This is probably the result of a substitution, by eliminate_regs,
5578 of an equivalent address for a pseudo that was not allocated to a
5579 hard register. Verify that the specified address is valid and
5580 reload it into a register. */
5581 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5582 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5586 /* Since we know we are going to reload this item, don't decrement
5587 for the indirection level.
5589 Note that this is actually conservative: it would be slightly
5590 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5592 /* We can't use ADDR_TYPE (type) here, because we need to
5593 write back the value after reading it, hence we actually
5594 need two registers. */
5595 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5596 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5597 opnum
, type
, ind_levels
, insn
);
5599 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5600 (context
? INDEX_REG_CLASS
:
5601 MODE_BASE_REG_CLASS (mode
)),
5602 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5604 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5606 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5608 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5615 /* This is probably the result of a substitution, by eliminate_regs, of
5616 an equivalent address for a pseudo that was not allocated to a hard
5617 register. Verify that the specified address is valid and reload it
5620 Since we know we are going to reload this item, don't decrement for
5621 the indirection level.
5623 Note that this is actually conservative: it would be slightly more
5624 efficient to use the value of SPILL_INDIRECT_LEVELS from
5627 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5628 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5629 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5630 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5631 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5636 int regno
= REGNO (x
);
5638 if (reg_equiv_constant
[regno
] != 0)
5640 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5641 (context
? INDEX_REG_CLASS
:
5642 MODE_BASE_REG_CLASS (mode
)),
5643 GET_MODE (x
), opnum
, type
, ind_levels
);
5647 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5648 that feeds this insn. */
5649 if (reg_equiv_mem
[regno
] != 0)
5651 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5652 (context
? INDEX_REG_CLASS
:
5653 MODE_BASE_REG_CLASS (mode
)),
5654 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5659 if (reg_equiv_memory_loc
[regno
]
5660 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5662 rtx tem
= make_memloc (x
, regno
);
5663 if (reg_equiv_address
[regno
] != 0
5664 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5667 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5668 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5673 if (reg_renumber
[regno
] >= 0)
5674 regno
= reg_renumber
[regno
];
5676 if ((regno
>= FIRST_PSEUDO_REGISTER
5677 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5678 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5680 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5681 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5682 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5686 /* If a register appearing in an address is the subject of a CLOBBER
5687 in this insn, reload it into some other register to be safe.
5688 The CLOBBER is supposed to make the register unavailable
5689 from before this insn to after it. */
5690 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5692 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5693 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5694 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5701 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5703 /* If this is a SUBREG of a hard register and the resulting register
5704 is of the wrong class, reload the whole SUBREG. This avoids
5705 needless copies if SUBREG_REG is multi-word. */
5706 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5708 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5710 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5711 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5713 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5714 (context
? INDEX_REG_CLASS
:
5715 MODE_BASE_REG_CLASS (mode
)),
5716 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5720 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5721 is larger than the class size, then reload the whole SUBREG. */
5724 enum reg_class
class = (context
? INDEX_REG_CLASS
5725 : MODE_BASE_REG_CLASS (mode
));
5726 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5727 > reg_class_size
[class])
5729 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5731 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5732 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5744 const char *fmt
= GET_RTX_FORMAT (code
);
5747 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5750 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5751 opnum
, type
, ind_levels
, insn
);
5758 /* X, which is found at *LOC, is a part of an address that needs to be
5759 reloaded into a register of class CLASS. If X is a constant, or if
5760 X is a PLUS that contains a constant, check that the constant is a
5761 legitimate operand and that we are supposed to be able to load
5762 it into the register.
5764 If not, force the constant into memory and reload the MEM instead.
5766 MODE is the mode to use, in case X is an integer constant.
5768 OPNUM and TYPE describe the purpose of any reloads made.
5770 IND_LEVELS says how many levels of indirect addressing this machine
5774 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class
class,
5775 enum machine_mode mode
, int opnum
,
5776 enum reload_type type
, int ind_levels
)
5779 && (! LEGITIMATE_CONSTANT_P (x
)
5780 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5784 tem
= x
= force_const_mem (mode
, x
);
5785 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5786 opnum
, type
, ind_levels
, 0);
5789 else if (GET_CODE (x
) == PLUS
5790 && CONSTANT_P (XEXP (x
, 1))
5791 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5792 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5796 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5797 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5798 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5799 opnum
, type
, ind_levels
, 0);
5802 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5803 mode
, VOIDmode
, 0, 0, opnum
, type
);
5806 /* X, a subreg of a pseudo, is a part of an address that needs to be
5809 If the pseudo is equivalent to a memory location that cannot be directly
5810 addressed, make the necessary address reloads.
5812 If address reloads have been necessary, or if the address is changed
5813 by register elimination, return the rtx of the memory location;
5814 otherwise, return X.
5816 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5819 OPNUM and TYPE identify the purpose of the reload.
5821 IND_LEVELS says how many levels of indirect addressing are
5822 supported at this point in the address.
5824 INSN, if nonzero, is the insn in which we do the reload. It is used
5825 to determine where to put USEs for pseudos that we have to replace with
5829 find_reloads_subreg_address (rtx x
, int force_replace
, int opnum
,
5830 enum reload_type type
, int ind_levels
, rtx insn
)
5832 int regno
= REGNO (SUBREG_REG (x
));
5834 if (reg_equiv_memory_loc
[regno
])
5836 /* If the address is not directly addressable, or if the address is not
5837 offsettable, then it must be replaced. */
5839 && (reg_equiv_address
[regno
]
5840 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5843 if (force_replace
|| num_not_at_initial_offset
)
5845 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5847 /* If the address changes because of register elimination, then
5848 it must be replaced. */
5850 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5852 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5853 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5856 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5857 hold the correct (negative) byte offset. */
5858 if (BYTES_BIG_ENDIAN
&& outer_size
> inner_size
)
5859 offset
= inner_size
- outer_size
;
5861 offset
= SUBREG_BYTE (x
);
5863 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5864 PUT_MODE (tem
, GET_MODE (x
));
5866 /* If this was a paradoxical subreg that we replaced, the
5867 resulting memory must be sufficiently aligned to allow
5868 us to widen the mode of the memory. */
5869 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5873 base
= XEXP (tem
, 0);
5874 if (GET_CODE (base
) == PLUS
)
5876 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5877 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5879 base
= XEXP (base
, 0);
5881 if (GET_CODE (base
) != REG
5882 || (REGNO_POINTER_ALIGN (REGNO (base
))
5883 < outer_size
* BITS_PER_UNIT
))
5887 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5888 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5891 /* If this is not a toplevel operand, find_reloads doesn't see
5892 this substitution. We have to emit a USE of the pseudo so
5893 that delete_output_reload can see it. */
5894 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5895 /* We mark the USE with QImode so that we recognize it
5896 as one that can be safely deleted at the end of
5898 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5908 /* Substitute into the current INSN the registers into which we have reloaded
5909 the things that need reloading. The array `replacements'
5910 contains the locations of all pointers that must be changed
5911 and says what to replace them with.
5913 Return the rtx that X translates into; usually X, but modified. */
5916 subst_reloads (rtx insn
)
5920 for (i
= 0; i
< n_replacements
; i
++)
5922 struct replacement
*r
= &replacements
[i
];
5923 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5926 #ifdef ENABLE_CHECKING
5927 /* Internal consistency test. Check that we don't modify
5928 anything in the equivalence arrays. Whenever something from
5929 those arrays needs to be reloaded, it must be unshared before
5930 being substituted into; the equivalence must not be modified.
5931 Otherwise, if the equivalence is used after that, it will
5932 have been modified, and the thing substituted (probably a
5933 register) is likely overwritten and not a usable equivalence. */
5936 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5938 #define CHECK_MODF(ARRAY) \
5939 if (ARRAY[check_regno] \
5940 && loc_mentioned_in_p (r->where, \
5941 ARRAY[check_regno])) \
5944 CHECK_MODF (reg_equiv_constant
);
5945 CHECK_MODF (reg_equiv_memory_loc
);
5946 CHECK_MODF (reg_equiv_address
);
5947 CHECK_MODF (reg_equiv_mem
);
5950 #endif /* ENABLE_CHECKING */
5952 /* If we're replacing a LABEL_REF with a register, add a
5953 REG_LABEL note to indicate to flow which label this
5954 register refers to. */
5955 if (GET_CODE (*r
->where
) == LABEL_REF
5956 && GET_CODE (insn
) == JUMP_INSN
)
5957 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5958 XEXP (*r
->where
, 0),
5961 /* Encapsulate RELOADREG so its machine mode matches what
5962 used to be there. Note that gen_lowpart_common will
5963 do the wrong thing if RELOADREG is multi-word. RELOADREG
5964 will always be a REG here. */
5965 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5966 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
5968 /* If we are putting this into a SUBREG and RELOADREG is a
5969 SUBREG, we would be making nested SUBREGs, so we have to fix
5970 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5972 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5974 if (GET_MODE (*r
->subreg_loc
)
5975 == GET_MODE (SUBREG_REG (reloadreg
)))
5976 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5980 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5982 /* When working with SUBREGs the rule is that the byte
5983 offset must be a multiple of the SUBREG's mode. */
5984 final_offset
= (final_offset
/
5985 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5986 final_offset
= (final_offset
*
5987 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5989 *r
->where
= SUBREG_REG (reloadreg
);
5990 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5994 *r
->where
= reloadreg
;
5996 /* If reload got no reg and isn't optional, something's wrong. */
5997 else if (! rld
[r
->what
].optional
)
6002 /* Make a copy of any replacements being done into X and move those
6003 copies to locations in Y, a copy of X. */
6006 copy_replacements (rtx x
, rtx y
)
6008 /* We can't support X being a SUBREG because we might then need to know its
6009 location if something inside it was replaced. */
6010 if (GET_CODE (x
) == SUBREG
)
6013 copy_replacements_1 (&x
, &y
, n_replacements
);
6017 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6021 struct replacement
*r
;
6025 for (j
= 0; j
< orig_replacements
; j
++)
6027 if (replacements
[j
].subreg_loc
== px
)
6029 r
= &replacements
[n_replacements
++];
6030 r
->where
= replacements
[j
].where
;
6032 r
->what
= replacements
[j
].what
;
6033 r
->mode
= replacements
[j
].mode
;
6035 else if (replacements
[j
].where
== px
)
6037 r
= &replacements
[n_replacements
++];
6040 r
->what
= replacements
[j
].what
;
6041 r
->mode
= replacements
[j
].mode
;
6047 code
= GET_CODE (x
);
6048 fmt
= GET_RTX_FORMAT (code
);
6050 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6053 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6054 else if (fmt
[i
] == 'E')
6055 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6056 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6061 /* Change any replacements being done to *X to be done to *Y. */
6064 move_replacements (rtx
*x
, rtx
*y
)
6068 for (i
= 0; i
< n_replacements
; i
++)
6069 if (replacements
[i
].subreg_loc
== x
)
6070 replacements
[i
].subreg_loc
= y
;
6071 else if (replacements
[i
].where
== x
)
6073 replacements
[i
].where
= y
;
6074 replacements
[i
].subreg_loc
= 0;
6078 /* If LOC was scheduled to be replaced by something, return the replacement.
6079 Otherwise, return *LOC. */
6082 find_replacement (rtx
*loc
)
6084 struct replacement
*r
;
6086 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6088 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6090 if (reloadreg
&& r
->where
== loc
)
6092 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6093 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6097 else if (reloadreg
&& r
->subreg_loc
== loc
)
6099 /* RELOADREG must be either a REG or a SUBREG.
6101 ??? Is it actually still ever a SUBREG? If so, why? */
6103 if (GET_CODE (reloadreg
) == REG
)
6104 return gen_rtx_REG (GET_MODE (*loc
),
6105 (REGNO (reloadreg
) +
6106 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6107 GET_MODE (SUBREG_REG (*loc
)),
6110 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6114 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6116 /* When working with SUBREGs the rule is that the byte
6117 offset must be a multiple of the SUBREG's mode. */
6118 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6119 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6120 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6126 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6127 what's inside and make a new rtl if so. */
6128 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6129 || GET_CODE (*loc
) == MULT
)
6131 rtx x
= find_replacement (&XEXP (*loc
, 0));
6132 rtx y
= find_replacement (&XEXP (*loc
, 1));
6134 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6135 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6141 /* Return nonzero if register in range [REGNO, ENDREGNO)
6142 appears either explicitly or implicitly in X
6143 other than being stored into (except for earlyclobber operands).
6145 References contained within the substructure at LOC do not count.
6146 LOC may be zero, meaning don't ignore anything.
6148 This is similar to refers_to_regno_p in rtlanal.c except that we
6149 look at equivalences for pseudos that didn't get hard registers. */
6152 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6164 code
= GET_CODE (x
);
6171 /* If this is a pseudo, a hard register must not have been allocated.
6172 X must therefore either be a constant or be in memory. */
6173 if (r
>= FIRST_PSEUDO_REGISTER
)
6175 if (reg_equiv_memory_loc
[r
])
6176 return refers_to_regno_for_reload_p (regno
, endregno
,
6177 reg_equiv_memory_loc
[r
],
6180 if (reg_equiv_constant
[r
])
6186 return (endregno
> r
6187 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6188 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6192 /* If this is a SUBREG of a hard reg, we can see exactly which
6193 registers are being modified. Otherwise, handle normally. */
6194 if (GET_CODE (SUBREG_REG (x
)) == REG
6195 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6197 unsigned int inner_regno
= subreg_regno (x
);
6198 unsigned int inner_endregno
6199 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6200 ? hard_regno_nregs
[inner_regno
][GET_MODE (x
)] : 1);
6202 return endregno
> inner_regno
&& regno
< inner_endregno
;
6208 if (&SET_DEST (x
) != loc
6209 /* Note setting a SUBREG counts as referring to the REG it is in for
6210 a pseudo but not for hard registers since we can
6211 treat each word individually. */
6212 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6213 && loc
!= &SUBREG_REG (SET_DEST (x
))
6214 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6215 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6216 && refers_to_regno_for_reload_p (regno
, endregno
,
6217 SUBREG_REG (SET_DEST (x
)),
6219 /* If the output is an earlyclobber operand, this is
6221 || ((GET_CODE (SET_DEST (x
)) != REG
6222 || earlyclobber_operand_p (SET_DEST (x
)))
6223 && refers_to_regno_for_reload_p (regno
, endregno
,
6224 SET_DEST (x
), loc
))))
6227 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6236 /* X does not match, so try its subexpressions. */
6238 fmt
= GET_RTX_FORMAT (code
);
6239 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6241 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6249 if (refers_to_regno_for_reload_p (regno
, endregno
,
6253 else if (fmt
[i
] == 'E')
6256 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6257 if (loc
!= &XVECEXP (x
, i
, j
)
6258 && refers_to_regno_for_reload_p (regno
, endregno
,
6259 XVECEXP (x
, i
, j
), loc
))
6266 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6267 we check if any register number in X conflicts with the relevant register
6268 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6269 contains a MEM (we don't bother checking for memory addresses that can't
6270 conflict because we expect this to be a rare case.
6272 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6273 that we look at equivalences for pseudos that didn't get hard registers. */
6276 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6278 int regno
, endregno
;
6280 /* Overly conservative. */
6281 if (GET_CODE (x
) == STRICT_LOW_PART
6282 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6285 /* If either argument is a constant, then modifying X can not affect IN. */
6286 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6288 else if (GET_CODE (x
) == SUBREG
)
6290 regno
= REGNO (SUBREG_REG (x
));
6291 if (regno
< FIRST_PSEUDO_REGISTER
)
6292 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6293 GET_MODE (SUBREG_REG (x
)),
6297 else if (GET_CODE (x
) == REG
)
6301 /* If this is a pseudo, it must not have been assigned a hard register.
6302 Therefore, it must either be in memory or be a constant. */
6304 if (regno
>= FIRST_PSEUDO_REGISTER
)
6306 if (reg_equiv_memory_loc
[regno
])
6307 return refers_to_mem_for_reload_p (in
);
6308 else if (reg_equiv_constant
[regno
])
6313 else if (GET_CODE (x
) == MEM
)
6314 return refers_to_mem_for_reload_p (in
);
6315 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6316 || GET_CODE (x
) == CC0
)
6317 return reg_mentioned_p (x
, in
);
6318 else if (GET_CODE (x
) == PLUS
)
6320 /* We actually want to know if X is mentioned somewhere inside IN.
6321 We must not say that (plus (sp) (const_int 124)) is in
6322 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6323 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6324 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6325 while (GET_CODE (in
) == MEM
)
6327 if (GET_CODE (in
) == REG
)
6329 else if (GET_CODE (in
) == PLUS
)
6330 return (reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6331 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6332 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6333 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6338 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6339 ? hard_regno_nregs
[regno
][GET_MODE (x
)] : 1);
6341 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6344 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6348 refers_to_mem_for_reload_p (rtx x
)
6353 if (GET_CODE (x
) == MEM
)
6356 if (GET_CODE (x
) == REG
)
6357 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6358 && reg_equiv_memory_loc
[REGNO (x
)]);
6360 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6361 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6363 && (GET_CODE (XEXP (x
, i
)) == MEM
6364 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6370 /* Check the insns before INSN to see if there is a suitable register
6371 containing the same value as GOAL.
6372 If OTHER is -1, look for a register in class CLASS.
6373 Otherwise, just see if register number OTHER shares GOAL's value.
6375 Return an rtx for the register found, or zero if none is found.
6377 If RELOAD_REG_P is (short *)1,
6378 we reject any hard reg that appears in reload_reg_rtx
6379 because such a hard reg is also needed coming into this insn.
6381 If RELOAD_REG_P is any other nonzero value,
6382 it is a vector indexed by hard reg number
6383 and we reject any hard reg whose element in the vector is nonnegative
6384 as well as any that appears in reload_reg_rtx.
6386 If GOAL is zero, then GOALREG is a register number; we look
6387 for an equivalent for that register.
6389 MODE is the machine mode of the value we want an equivalence for.
6390 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6392 This function is used by jump.c as well as in the reload pass.
6394 If GOAL is the sum of the stack pointer and a constant, we treat it
6395 as if it were a constant except that sp is required to be unchanging. */
6398 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class
class, int other
,
6399 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6402 rtx goaltry
, valtry
, value
, where
;
6408 int goal_mem_addr_varies
= 0;
6409 int need_stable_sp
= 0;
6416 else if (GET_CODE (goal
) == REG
)
6417 regno
= REGNO (goal
);
6418 else if (GET_CODE (goal
) == MEM
)
6420 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6421 if (MEM_VOLATILE_P (goal
))
6423 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6425 /* An address with side effects must be reexecuted. */
6440 else if (CONSTANT_P (goal
))
6442 else if (GET_CODE (goal
) == PLUS
6443 && XEXP (goal
, 0) == stack_pointer_rtx
6444 && CONSTANT_P (XEXP (goal
, 1)))
6445 goal_const
= need_stable_sp
= 1;
6446 else if (GET_CODE (goal
) == PLUS
6447 && XEXP (goal
, 0) == frame_pointer_rtx
6448 && CONSTANT_P (XEXP (goal
, 1)))
6454 /* Scan insns back from INSN, looking for one that copies
6455 a value into or out of GOAL.
6456 Stop and give up if we reach a label. */
6462 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
6463 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6466 if (GET_CODE (p
) == INSN
6467 /* If we don't want spill regs ... */
6468 && (! (reload_reg_p
!= 0
6469 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6470 /* ... then ignore insns introduced by reload; they aren't
6471 useful and can cause results in reload_as_needed to be
6472 different from what they were when calculating the need for
6473 spills. If we notice an input-reload insn here, we will
6474 reject it below, but it might hide a usable equivalent.
6475 That makes bad code. It may even abort: perhaps no reg was
6476 spilled for this insn because it was assumed we would find
6478 || INSN_UID (p
) < reload_first_uid
))
6481 pat
= single_set (p
);
6483 /* First check for something that sets some reg equal to GOAL. */
6486 && true_regnum (SET_SRC (pat
)) == regno
6487 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6490 && true_regnum (SET_DEST (pat
)) == regno
6491 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6493 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6494 /* When looking for stack pointer + const,
6495 make sure we don't use a stack adjust. */
6496 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6497 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6499 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6500 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6502 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6503 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6504 /* If we are looking for a constant,
6505 and something equivalent to that constant was copied
6506 into a reg, we can use that reg. */
6507 || (goal_const
&& REG_NOTES (p
) != 0
6508 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6509 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6511 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6512 || (GET_CODE (SET_DEST (pat
)) == REG
6513 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6514 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6516 && GET_CODE (goal
) == CONST_INT
6518 = operand_subword (XEXP (tem
, 0), 0, 0,
6520 && rtx_equal_p (goal
, goaltry
)
6522 = operand_subword (SET_DEST (pat
), 0, 0,
6524 && (valueno
= true_regnum (valtry
)) >= 0)))
6525 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6527 && GET_CODE (SET_DEST (pat
)) == REG
6528 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6529 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6531 && GET_CODE (goal
) == CONST_INT
6532 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6534 && rtx_equal_p (goal
, goaltry
)
6536 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6537 && (valueno
= true_regnum (valtry
)) >= 0)))
6541 if (valueno
!= other
)
6544 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6550 for (i
= hard_regno_nregs
[valueno
][mode
] - 1; i
>= 0; i
--)
6551 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6564 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6565 (or copying VALUE into GOAL, if GOAL is also a register).
6566 Now verify that VALUE is really valid. */
6568 /* VALUENO is the register number of VALUE; a hard register. */
6570 /* Don't try to re-use something that is killed in this insn. We want
6571 to be able to trust REG_UNUSED notes. */
6572 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6575 /* If we propose to get the value from the stack pointer or if GOAL is
6576 a MEM based on the stack pointer, we need a stable SP. */
6577 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6578 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6582 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6583 if (GET_MODE (value
) != mode
)
6586 /* Reject VALUE if it was loaded from GOAL
6587 and is also a register that appears in the address of GOAL. */
6589 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6590 && refers_to_regno_for_reload_p (valueno
,
6592 + hard_regno_nregs
[valueno
][mode
]),
6596 /* Reject registers that overlap GOAL. */
6598 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6599 nregs
= hard_regno_nregs
[regno
][mode
];
6602 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6604 if (!goal_mem
&& !goal_const
6605 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6608 /* Reject VALUE if it is one of the regs reserved for reloads.
6609 Reload1 knows how to reuse them anyway, and it would get
6610 confused if we allocated one without its knowledge.
6611 (Now that insns introduced by reload are ignored above,
6612 this case shouldn't happen, but I'm not positive.) */
6614 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6617 for (i
= 0; i
< valuenregs
; ++i
)
6618 if (reload_reg_p
[valueno
+ i
] >= 0)
6622 /* Reject VALUE if it is a register being used for an input reload
6623 even if it is not one of those reserved. */
6625 if (reload_reg_p
!= 0)
6628 for (i
= 0; i
< n_reloads
; i
++)
6629 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6631 int regno1
= REGNO (rld
[i
].reg_rtx
);
6632 int nregs1
= hard_regno_nregs
[regno1
]
6633 [GET_MODE (rld
[i
].reg_rtx
)];
6634 if (regno1
< valueno
+ valuenregs
6635 && regno1
+ nregs1
> valueno
)
6641 /* We must treat frame pointer as varying here,
6642 since it can vary--in a nonlocal goto as generated by expand_goto. */
6643 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6645 /* Now verify that the values of GOAL and VALUE remain unaltered
6646 until INSN is reached. */
6655 /* Don't trust the conversion past a function call
6656 if either of the two is in a call-clobbered register, or memory. */
6657 if (GET_CODE (p
) == CALL_INSN
)
6661 if (goal_mem
|| need_stable_sp
)
6664 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6665 for (i
= 0; i
< nregs
; ++i
)
6666 if (call_used_regs
[regno
+ i
])
6669 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6670 for (i
= 0; i
< valuenregs
; ++i
)
6671 if (call_used_regs
[valueno
+ i
])
6673 #ifdef NON_SAVING_SETJMP
6674 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6683 /* Watch out for unspec_volatile, and volatile asms. */
6684 if (volatile_insn_p (pat
))
6687 /* If this insn P stores in either GOAL or VALUE, return 0.
6688 If GOAL is a memory ref and this insn writes memory, return 0.
6689 If GOAL is a memory ref and its address is not constant,
6690 and this insn P changes a register used in GOAL, return 0. */
6692 if (GET_CODE (pat
) == COND_EXEC
)
6693 pat
= COND_EXEC_CODE (pat
);
6694 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6696 rtx dest
= SET_DEST (pat
);
6697 while (GET_CODE (dest
) == SUBREG
6698 || GET_CODE (dest
) == ZERO_EXTRACT
6699 || GET_CODE (dest
) == SIGN_EXTRACT
6700 || GET_CODE (dest
) == STRICT_LOW_PART
)
6701 dest
= XEXP (dest
, 0);
6702 if (GET_CODE (dest
) == REG
)
6704 int xregno
= REGNO (dest
);
6706 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6707 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6710 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6712 if (xregno
< valueno
+ valuenregs
6713 && xregno
+ xnregs
> valueno
)
6715 if (goal_mem_addr_varies
6716 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6718 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6721 else if (goal_mem
&& GET_CODE (dest
) == MEM
6722 && ! push_operand (dest
, GET_MODE (dest
)))
6724 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6725 && reg_equiv_memory_loc
[regno
] != 0)
6727 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6730 else if (GET_CODE (pat
) == PARALLEL
)
6733 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6735 rtx v1
= XVECEXP (pat
, 0, i
);
6736 if (GET_CODE (v1
) == COND_EXEC
)
6737 v1
= COND_EXEC_CODE (v1
);
6738 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6740 rtx dest
= SET_DEST (v1
);
6741 while (GET_CODE (dest
) == SUBREG
6742 || GET_CODE (dest
) == ZERO_EXTRACT
6743 || GET_CODE (dest
) == SIGN_EXTRACT
6744 || GET_CODE (dest
) == STRICT_LOW_PART
)
6745 dest
= XEXP (dest
, 0);
6746 if (GET_CODE (dest
) == REG
)
6748 int xregno
= REGNO (dest
);
6750 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6751 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6754 if (xregno
< regno
+ nregs
6755 && xregno
+ xnregs
> regno
)
6757 if (xregno
< valueno
+ valuenregs
6758 && xregno
+ xnregs
> valueno
)
6760 if (goal_mem_addr_varies
6761 && reg_overlap_mentioned_for_reload_p (dest
,
6764 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6767 else if (goal_mem
&& GET_CODE (dest
) == MEM
6768 && ! push_operand (dest
, GET_MODE (dest
)))
6770 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6771 && reg_equiv_memory_loc
[regno
] != 0)
6773 else if (need_stable_sp
6774 && push_operand (dest
, GET_MODE (dest
)))
6780 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6784 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6785 link
= XEXP (link
, 1))
6787 pat
= XEXP (link
, 0);
6788 if (GET_CODE (pat
) == CLOBBER
)
6790 rtx dest
= SET_DEST (pat
);
6792 if (GET_CODE (dest
) == REG
)
6794 int xregno
= REGNO (dest
);
6796 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6798 if (xregno
< regno
+ nregs
6799 && xregno
+ xnregs
> regno
)
6801 else if (xregno
< valueno
+ valuenregs
6802 && xregno
+ xnregs
> valueno
)
6804 else if (goal_mem_addr_varies
6805 && reg_overlap_mentioned_for_reload_p (dest
,
6810 else if (goal_mem
&& GET_CODE (dest
) == MEM
6811 && ! push_operand (dest
, GET_MODE (dest
)))
6813 else if (need_stable_sp
6814 && push_operand (dest
, GET_MODE (dest
)))
6821 /* If this insn auto-increments or auto-decrements
6822 either regno or valueno, return 0 now.
6823 If GOAL is a memory ref and its address is not constant,
6824 and this insn P increments a register used in GOAL, return 0. */
6828 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6829 if (REG_NOTE_KIND (link
) == REG_INC
6830 && GET_CODE (XEXP (link
, 0)) == REG
)
6832 int incno
= REGNO (XEXP (link
, 0));
6833 if (incno
< regno
+ nregs
&& incno
>= regno
)
6835 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6837 if (goal_mem_addr_varies
6838 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6848 /* Find a place where INCED appears in an increment or decrement operator
6849 within X, and return the amount INCED is incremented or decremented by.
6850 The value is always positive. */
6853 find_inc_amount (rtx x
, rtx inced
)
6855 enum rtx_code code
= GET_CODE (x
);
6861 rtx addr
= XEXP (x
, 0);
6862 if ((GET_CODE (addr
) == PRE_DEC
6863 || GET_CODE (addr
) == POST_DEC
6864 || GET_CODE (addr
) == PRE_INC
6865 || GET_CODE (addr
) == POST_INC
)
6866 && XEXP (addr
, 0) == inced
)
6867 return GET_MODE_SIZE (GET_MODE (x
));
6868 else if ((GET_CODE (addr
) == PRE_MODIFY
6869 || GET_CODE (addr
) == POST_MODIFY
)
6870 && GET_CODE (XEXP (addr
, 1)) == PLUS
6871 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6872 && XEXP (addr
, 0) == inced
6873 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6875 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6876 return i
< 0 ? -i
: i
;
6880 fmt
= GET_RTX_FORMAT (code
);
6881 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6885 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6892 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6894 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6904 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6905 If SETS is nonzero, also consider SETs. */
6908 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
6911 unsigned int nregs
= hard_regno_nregs
[regno
][mode
];
6912 unsigned int endregno
= regno
+ nregs
;
6914 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6915 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6916 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6918 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6920 return test
>= regno
&& test
< endregno
;
6923 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6925 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6929 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6930 if ((GET_CODE (elt
) == CLOBBER
6931 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6932 && GET_CODE (XEXP (elt
, 0)) == REG
)
6934 unsigned int test
= REGNO (XEXP (elt
, 0));
6936 if (test
>= regno
&& test
< endregno
)
6945 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6947 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
6951 if (GET_MODE (reloadreg
) == mode
)
6954 regno
= REGNO (reloadreg
);
6956 if (WORDS_BIG_ENDIAN
)
6957 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
6958 - (int) hard_regno_nregs
[regno
][mode
];
6960 return gen_rtx_REG (mode
, regno
);
6963 static const char *const reload_when_needed_name
[] =
6966 "RELOAD_FOR_OUTPUT",
6968 "RELOAD_FOR_INPUT_ADDRESS",
6969 "RELOAD_FOR_INPADDR_ADDRESS",
6970 "RELOAD_FOR_OUTPUT_ADDRESS",
6971 "RELOAD_FOR_OUTADDR_ADDRESS",
6972 "RELOAD_FOR_OPERAND_ADDRESS",
6973 "RELOAD_FOR_OPADDR_ADDR",
6975 "RELOAD_FOR_OTHER_ADDRESS"
6978 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6980 /* These functions are used to print the variables set by 'find_reloads' */
6983 debug_reload_to_stream (FILE *f
)
6990 for (r
= 0; r
< n_reloads
; r
++)
6992 fprintf (f
, "Reload %d: ", r
);
6996 fprintf (f
, "reload_in (%s) = ",
6997 GET_MODE_NAME (rld
[r
].inmode
));
6998 print_inline_rtx (f
, rld
[r
].in
, 24);
6999 fprintf (f
, "\n\t");
7002 if (rld
[r
].out
!= 0)
7004 fprintf (f
, "reload_out (%s) = ",
7005 GET_MODE_NAME (rld
[r
].outmode
));
7006 print_inline_rtx (f
, rld
[r
].out
, 24);
7007 fprintf (f
, "\n\t");
7010 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7012 fprintf (f
, "%s (opnum = %d)",
7013 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7016 if (rld
[r
].optional
)
7017 fprintf (f
, ", optional");
7019 if (rld
[r
].nongroup
)
7020 fprintf (f
, ", nongroup");
7022 if (rld
[r
].inc
!= 0)
7023 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7025 if (rld
[r
].nocombine
)
7026 fprintf (f
, ", can't combine");
7028 if (rld
[r
].secondary_p
)
7029 fprintf (f
, ", secondary_reload_p");
7031 if (rld
[r
].in_reg
!= 0)
7033 fprintf (f
, "\n\treload_in_reg: ");
7034 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7037 if (rld
[r
].out_reg
!= 0)
7039 fprintf (f
, "\n\treload_out_reg: ");
7040 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7043 if (rld
[r
].reg_rtx
!= 0)
7045 fprintf (f
, "\n\treload_reg_rtx: ");
7046 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7050 if (rld
[r
].secondary_in_reload
!= -1)
7052 fprintf (f
, "%ssecondary_in_reload = %d",
7053 prefix
, rld
[r
].secondary_in_reload
);
7057 if (rld
[r
].secondary_out_reload
!= -1)
7058 fprintf (f
, "%ssecondary_out_reload = %d\n",
7059 prefix
, rld
[r
].secondary_out_reload
);
7062 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7064 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7065 insn_data
[rld
[r
].secondary_in_icode
].name
);
7069 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7070 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7071 insn_data
[rld
[r
].secondary_out_icode
].name
);
7080 debug_reload_to_stream (stderr
);