MIPS32R6 and MIPS64R6 support
[official-gcc.git] / gcc / testsuite / gcc.target / mips / unaligned-1.c
blob4888ca8b51f7d6fc5d5187b09c795c88e915429c
1 /* { dg-options "isa_rev<=5 -mgp64" } */
2 /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
3 /* { dg-final { scan-assembler-times "\tsdl\t" 1 } } */
4 /* { dg-final { scan-assembler-times "\tsdr\t" 1 } } */
5 /* { dg-final { scan-assembler-times "\tldl\t" 1 } } */
6 /* { dg-final { scan-assembler-times "\tldr\t" 1 } } */
7 /* { dg-final { scan-assembler-times "\tswl\t" 1 } } */
8 /* { dg-final { scan-assembler-times "\tswr\t" 1 } } */
9 /* { dg-final { scan-assembler-times "\tlwl\t" 1 } } */
10 /* { dg-final { scan-assembler-times "\tlwr\t" 1 } } */
11 /* { dg-final { scan-assembler-not "\tnop" } } */
13 /* Test to make sure we produce the unaligned load/store for
14 both 64bit and 32bits sized accesses. */
16 struct s
18 char c;
19 int i;
20 long long l;
21 } __attribute__ ((packed)) s __attribute__((aligned(1) ));
23 NOMIPS16 void
24 sd (long long l)
26 s.l = l;
29 NOMIPS16 long long
30 ld ()
32 return s.l;
35 NOMIPS16 void
36 sw (int i)
38 s.i = i;
41 NOMIPS16 int
42 lw ()
44 return s.i;