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IBM Z: Fix bootstrap breakage due to HAVE_TF macro
[official-gcc.git] / gcc / config / s390 / s390.h
blobbc579a3dadd12ad5911e63aed617ea4d15ef9a4a
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999-2020 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 #ifndef _S390_H
24 #define _S390_H
25
26 /* Optional architectural facilities supported by the processor. */
27
28 enum processor_flags
29 {
30 PF_IEEE_FLOAT = 1,
31 PF_ZARCH = 2,
32 PF_LONG_DISPLACEMENT = 4,
33 PF_EXTIMM = 8,
34 PF_DFP = 16,
35 PF_Z10 = 32,
36 PF_Z196 = 64,
37 PF_ZEC12 = 128,
38 PF_TX = 256,
39 PF_Z13 = 512,
40 PF_VX = 1024,
41 PF_Z14 = 2048,
42 PF_VXE = 4096,
43 PF_VXE2 = 8192,
44 PF_Z15 = 16384
45 };
46
47 /* This is necessary to avoid a warning about comparing different enum
48 types. */
49 #define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_8561_Z15 ? PROCESSOR_8561_Z15 : s390_tune ))
50
51 /* These flags indicate that the generated code should run on a cpu
52 providing the respective hardware facility regardless of the
53 current cpu mode (ESA or z/Architecture). */
54
55 #define TARGET_CPU_IEEE_FLOAT \
56 (s390_arch_flags & PF_IEEE_FLOAT)
57 #define TARGET_CPU_IEEE_FLOAT_P(opts) \
58 (opts->x_s390_arch_flags & PF_IEEE_FLOAT)
59 #define TARGET_CPU_LONG_DISPLACEMENT \
60 (s390_arch_flags & PF_LONG_DISPLACEMENT)
61 #define TARGET_CPU_LONG_DISPLACEMENT_P(opts) \
62 (opts->x_s390_arch_flags & PF_LONG_DISPLACEMENT)
63 #define TARGET_CPU_EXTIMM \
64 (s390_arch_flags & PF_EXTIMM)
65 #define TARGET_CPU_EXTIMM_P(opts) \
66 (opts->x_s390_arch_flags & PF_EXTIMM)
67 #define TARGET_CPU_DFP \
68 (s390_arch_flags & PF_DFP)
69 #define TARGET_CPU_DFP_P(opts) \
70 (opts->x_s390_arch_flags & PF_DFP)
71 #define TARGET_CPU_Z10 \
72 (s390_arch_flags & PF_Z10)
73 #define TARGET_CPU_Z10_P(opts) \
74 (opts->x_s390_arch_flags & PF_Z10)
75 #define TARGET_CPU_Z196 \
76 (s390_arch_flags & PF_Z196)
77 #define TARGET_CPU_Z196_P(opts) \
78 (opts->x_s390_arch_flags & PF_Z196)
79 #define TARGET_CPU_ZEC12 \
80 (s390_arch_flags & PF_ZEC12)
81 #define TARGET_CPU_ZEC12_P(opts) \
82 (opts->x_s390_arch_flags & PF_ZEC12)
83 #define TARGET_CPU_HTM \
84 (s390_arch_flags & PF_TX)
85 #define TARGET_CPU_HTM_P(opts) \
86 (opts->x_s390_arch_flags & PF_TX)
87 #define TARGET_CPU_Z13 \
88 (s390_arch_flags & PF_Z13)
89 #define TARGET_CPU_Z13_P(opts) \
90 (opts->x_s390_arch_flags & PF_Z13)
91 #define TARGET_CPU_VX \
92 (s390_arch_flags & PF_VX)
93 #define TARGET_CPU_VX_P(opts) \
94 (opts->x_s390_arch_flags & PF_VX)
95 #define TARGET_CPU_Z14 \
96 (s390_arch_flags & PF_Z14)
97 #define TARGET_CPU_Z14_P(opts) \
98 (opts->x_s390_arch_flags & PF_Z14)
99 #define TARGET_CPU_VXE \
100 (s390_arch_flags & PF_VXE)
101 #define TARGET_CPU_VXE_P(opts) \
102 (opts->x_s390_arch_flags & PF_VXE)
103 #define TARGET_CPU_Z15 \
104 (s390_arch_flags & PF_Z15)
105 #define TARGET_CPU_Z15_P(opts) \
106 (opts->x_s390_arch_flags & PF_Z15)
107 #define TARGET_CPU_VXE2 \
108 (s390_arch_flags & PF_VXE2)
109 #define TARGET_CPU_VXE2_P(opts) \
110 (opts->x_s390_arch_flags & PF_VXE2)
111
112 #define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts))
113
114 /* These flags indicate that the generated code should run on a cpu
115 providing the respective hardware facility when run in
116 z/Architecture mode. */
117
118 #define TARGET_LONG_DISPLACEMENT \
119 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
120 #define TARGET_LONG_DISPLACEMENT_P(opts) \
121 (TARGET_ZARCH_P (opts->x_target_flags) \
122 && TARGET_CPU_LONG_DISPLACEMENT_P (opts))
123 #define TARGET_EXTIMM \
124 (TARGET_ZARCH && TARGET_CPU_EXTIMM)
125 #define TARGET_EXTIMM_P(opts) \
126 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_EXTIMM_P (opts))
127 #define TARGET_DFP \
128 (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT)
129 #define TARGET_DFP_P(opts) \
130 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_DFP_P (opts) \
131 && TARGET_HARD_FLOAT_P (opts->x_target_flags))
132 #define TARGET_Z10 \
133 (TARGET_ZARCH && TARGET_CPU_Z10)
134 #define TARGET_Z10_P(opts) \
135 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z10_P (opts))
136 #define TARGET_Z196 \
137 (TARGET_ZARCH && TARGET_CPU_Z196)
138 #define TARGET_Z196_P(opts) \
139 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z196_P (opts))
140 #define TARGET_ZEC12 \
141 (TARGET_ZARCH && TARGET_CPU_ZEC12)
142 #define TARGET_ZEC12_P(opts) \
143 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ZEC12_P (opts))
144 #define TARGET_HTM (TARGET_OPT_HTM)
145 #define TARGET_HTM_P(opts) (TARGET_OPT_HTM_P (opts->x_target_flags))
146 #define TARGET_Z13 \
147 (TARGET_ZARCH && TARGET_CPU_Z13)
148 #define TARGET_Z13_P(opts) \
149 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z13_P (opts))
150 #define TARGET_VX \
151 (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
152 #define TARGET_VX_P(opts) \
153 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \
154 && TARGET_OPT_VX_P (opts->x_target_flags) \
155 && TARGET_HARD_FLOAT_P (opts->x_target_flags))
156 #define TARGET_Z14 (TARGET_ZARCH && TARGET_CPU_Z14)
157 #define TARGET_Z14_P(opts) \
158 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z14_P (opts))
159 #define TARGET_VXE \
160 (TARGET_VX && TARGET_CPU_VXE)
161 #define TARGET_VXE_P(opts) \
162 (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
163 #define TARGET_Z15 (TARGET_ZARCH && TARGET_CPU_Z15)
164 #define TARGET_Z15_P(opts) \
165 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z15_P (opts))
166 #define TARGET_VXE2 \
167 (TARGET_VX && TARGET_CPU_VXE2)
168 #define TARGET_VXE2_P(opts) \
169 (TARGET_VX_P (opts) && TARGET_CPU_VXE2_P (opts))
170 #if defined(HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13)
171 #define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS TARGET_Z13
172 #elif defined(HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS)
173 #define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS TARGET_Z14
174 #else
175 #define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS 0
176 #endif
177
178 /* Evaluate to true if it is ok to emit a non-signaling vector
179 comparison. */
180 #define TARGET_NONSIGNALING_VECTOR_COMPARE_OK \
181 (TARGET_VX && !TARGET_VXE && (flag_finite_math_only || !flag_trapping_math))
182
183 #ifdef HAVE_AS_MACHINE_MACHINEMODE
184 #define S390_USE_TARGET_ATTRIBUTE 1
185 #else
186 #define S390_USE_TARGET_ATTRIBUTE 0
187 #endif
188
189 #ifdef HAVE_AS_ARCHITECTURE_MODIFIERS
190 #define S390_USE_ARCHITECTURE_MODIFIERS 1
191 #else
192 #define S390_USE_ARCHITECTURE_MODIFIERS 0
193 #endif
194
195 #if S390_USE_TARGET_ATTRIBUTE
196 /* For switching between functions with different target attributes. */
197 #define SWITCHABLE_TARGET 1
198 #endif
199
200 #define TARGET_SUPPORTS_WIDE_INT 1
201
202 /* Use the ABI introduced with IBM z13:
203 - pass vector arguments <= 16 bytes in VRs
204 - align *all* vector types to 8 bytes */
205 #define TARGET_VX_ABI TARGET_VX
206
207 #define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196)
208
209 /* Issue a write prefetch for the +4 cache line. */
210 #define TARGET_SETMEM_PREFETCH_DISTANCE 1024
211
212 /* Expand to a C expressions evaluating to true if a setmem to VAL of
213 length LEN should be emitted using prefetch instructions. */
214 #define TARGET_SETMEM_PFD(VAL,LEN) \
215 (TARGET_Z10 \
216 && (s390_tune < PROCESSOR_2964_Z13 || (VAL) != const0_rtx) \
217 && (!CONST_INT_P (LEN) || INTVAL ((LEN)) > TARGET_SETMEM_PREFETCH_DISTANCE))
218
219 /* Run-time target specification. */
220
221 /* Defaults for option flags defined only on some subtargets. */
222 #ifndef TARGET_TPF_PROFILING
223 #define TARGET_TPF_PROFILING 0
224 #endif
225
226 /* This will be overridden by OS headers. */
227 #define TARGET_TPF 0
228
229 /* Target CPU builtins. */
230 #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile)
231
232 /* Target CPU versions for D. */
233 #define TARGET_D_CPU_VERSIONS s390_d_target_versions
234
235 #ifdef DEFAULT_TARGET_64BIT
236 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \
237 | MASK_OPT_HTM | MASK_OPT_VX)
238 #else
239 #define TARGET_DEFAULT 0
240 #endif
241
242 /* Support for configure-time defaults.
243 The order here is important so that -march doesn't squash the
244 tune values. */
245 #define OPTION_DEFAULT_SPECS \
246 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
247 { "tune", "%{!mtune=*:%{!march=*:-mtune=%(VALUE)}}" }, \
248 { "arch", "%{!march=*:-march=%(VALUE)}" }
249
250 #ifdef __s390__
251 extern const char *s390_host_detect_local_cpu (int argc, const char **argv);
252 # define EXTRA_SPEC_FUNCTIONS \
253 { "local_cpu_detect", s390_host_detect_local_cpu },
254
255 #define MARCH_MTUNE_NATIVE_SPECS \
256 "%{mtune=native:%<mtune=native %:local_cpu_detect(tune)} " \
257 "%{march=native:%<march=native" \
258 " %:local_cpu_detect(arch %{mesa|mzarch:mesa_mzarch})}"
259 #else
260 # define MARCH_MTUNE_NATIVE_SPECS ""
261 #endif
262
263 #ifdef DEFAULT_TARGET_64BIT
264 #define S390_TARGET_BITS_STRING "64"
265 #else
266 #define S390_TARGET_BITS_STRING "31"
267 #endif
268
269 /* Defaulting rules. */
270 #define DRIVER_SELF_SPECS \
271 MARCH_MTUNE_NATIVE_SPECS, \
272 "%{!m31:%{!m64:-m" S390_TARGET_BITS_STRING "}}", \
273 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
274 "%{!march=*:-march=z900}"
275
276 /* Constants needed to control the TEST DATA CLASS (TDC) instruction. */
277 #define S390_TDC_POSITIVE_ZERO (1 << 11)
278 #define S390_TDC_NEGATIVE_ZERO (1 << 10)
279 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER (1 << 9)
280 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER (1 << 8)
281 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER (1 << 7)
282 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER (1 << 6)
283 #define S390_TDC_POSITIVE_INFINITY (1 << 5)
284 #define S390_TDC_NEGATIVE_INFINITY (1 << 4)
285 #define S390_TDC_POSITIVE_QUIET_NAN (1 << 3)
286 #define S390_TDC_NEGATIVE_QUIET_NAN (1 << 2)
287 #define S390_TDC_POSITIVE_SIGNALING_NAN (1 << 1)
288 #define S390_TDC_NEGATIVE_SIGNALING_NAN (1 << 0)
289
290 /* The following values are different for DFP. */
291 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9)
292 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8)
293 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7)
294 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6)
295
296 /* For signbit, the BFP-DFP-difference makes no difference. */
297 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
298 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
299 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
300 | S390_TDC_NEGATIVE_INFINITY \
301 | S390_TDC_NEGATIVE_QUIET_NAN \
302 | S390_TDC_NEGATIVE_SIGNALING_NAN )
303
304 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
305 | S390_TDC_NEGATIVE_INFINITY )
306
307 /* Target machine storage layout. */
308
309 /* Everything is big-endian. */
310 #define BITS_BIG_ENDIAN 1
311 #define BYTES_BIG_ENDIAN 1
312 #define WORDS_BIG_ENDIAN 1
313
314 #define STACK_SIZE_MODE (Pmode)
315
316 #ifndef IN_LIBGCC2
317
318 /* Width of a word, in units (bytes). */
319 #define UNITS_PER_WORD (TARGET_ZARCH ? 8 : 4)
320
321 /* Width of a pointer. To be used instead of UNITS_PER_WORD in
322 ABI-relevant contexts. This always matches
323 GET_MODE_SIZE (Pmode). */
324 #define UNITS_PER_LONG (TARGET_64BIT ? 8 : 4)
325 #define MIN_UNITS_PER_WORD 4
326 #define MAX_BITS_PER_WORD 64
327 #else
328
329 /* In libgcc, UNITS_PER_WORD has ABI-relevant effects, e.g. whether
330 the library should export TImode functions or not. Thus, we have
331 to redefine UNITS_PER_WORD depending on __s390x__ for libgcc. */
332 #ifdef __s390x__
333 #define UNITS_PER_WORD 8
334 #else
335 #define UNITS_PER_WORD 4
336 #endif
337 #endif
338
339 /* Width of a pointer, in bits. */
340 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
341
342 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
343 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
344
345 /* Boundary (in *bits*) on which stack pointer should be aligned. */
346 #define STACK_BOUNDARY 64
347
348 /* Allocation boundary (in *bits*) for the code of a function. */
349 #define FUNCTION_BOUNDARY 64
350
351 /* There is no point aligning anything to a rounder boundary than this. */
352 #define BIGGEST_ALIGNMENT 64
353
354 /* Alignment of field after `int : 0' in a structure. */
355 #define EMPTY_FIELD_BOUNDARY 32
356
357 /* Alignment on even addresses for LARL instruction. */
358 #define DATA_ABI_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
359
360 /* Alignment is not required by the hardware. */
361 #define STRICT_ALIGNMENT 0
362
363 /* Mode of stack savearea.
364 FUNCTION is VOIDmode because calling convention maintains SP.
365 BLOCK needs Pmode for SP.
366 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
367 #define STACK_SAVEAREA_MODE(LEVEL) \
368 ((LEVEL) == SAVE_FUNCTION ? VOIDmode \
369 : (LEVEL) == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
370
371
372 /* Type layout. */
373
374 /* Sizes in bits of the source language data types. */
375 #define SHORT_TYPE_SIZE 16
376 #define INT_TYPE_SIZE 32
377 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
378 #define LONG_LONG_TYPE_SIZE 64
379 #define FLOAT_TYPE_SIZE 32
380 #define DOUBLE_TYPE_SIZE 64
381 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
382
383 /* Work around target_flags dependency in ada/targtyps.c. */
384 #define WIDEST_HARDWARE_FP_SIZE 64
385
386 /* We use "unsigned char" as default. */
387 #define DEFAULT_SIGNED_CHAR 0
388
389
390 /* Register usage. */
391
392 /* We have 16 general purpose registers (registers 0-15),
393 and 16 floating point registers (registers 16-31).
394 (On non-IEEE machines, we have only 4 fp registers.)
395
396 Amongst the general purpose registers, some are used
397 for specific purposes:
398 GPR 11: Hard frame pointer (if needed)
399 GPR 12: Global offset table pointer (if needed)
400 GPR 13: Literal pool base register
401 GPR 14: Return address register
402 GPR 15: Stack pointer
403
404 Registers 32-35 are 'fake' hard registers that do not
405 correspond to actual hardware:
406 Reg 32: Argument pointer
407 Reg 33: Condition code
408 Reg 34: Frame pointer
409 Reg 35: Return address pointer
410
411 Registers 36 and 37 are mapped to access registers
412 0 and 1, used to implement thread-local storage.
413
414 Reg 38-53: Vector registers v16-v31 */
415
416 #define FIRST_PSEUDO_REGISTER 54
417
418 /* Standard register usage. */
419 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
420 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
421 #define FP_REGNO_P(N) ((N) >= 16 && (N) < 32)
422 #define CC_REGNO_P(N) ((N) == 33)
423 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
424 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
425 #define VECTOR_NOFP_REGNO_P(N) ((N) >= 38 && (N) <= 53)
426 #define VECTOR_REGNO_P(N) (FP_REGNO_P (N) || VECTOR_NOFP_REGNO_P (N))
427
428 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
429 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
430 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
431 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
432 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
433 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
434 #define VECTOR_NOFP_REG_P(X) (REG_P (X) && VECTOR_NOFP_REGNO_P (REGNO (X)))
435 #define VECTOR_REG_P(X) (REG_P (X) && VECTOR_REGNO_P (REGNO (X)))
436
437 /* Set up fixed registers and calling convention:
438
439 GPRs 0-5 are always call-clobbered,
440 GPRs 6-15 are always call-saved.
441 GPR 12 is fixed if used as GOT pointer.
442 GPR 13 is always fixed (as literal pool pointer).
443 GPR 14 is always fixed on S/390 machines (as return address).
444 GPR 15 is always fixed (as stack pointer).
445 The 'fake' hard registers are call-clobbered and fixed.
446 The access registers are call-saved and fixed.
447
448 On 31-bit, FPRs 18-19 are call-clobbered;
449 on 64-bit, FPRs 24-31 are call-clobbered.
450 The remaining FPRs are call-saved.
451
452 All non-FP vector registers are call-clobbered v16-v31. */
453
454 #define FIXED_REGISTERS \
455 { 0, 0, 0, 0, \
456 0, 0, 0, 0, \
457 0, 0, 0, 0, \
458 0, 1, 1, 1, \
459 0, 0, 0, 0, \
460 0, 0, 0, 0, \
461 0, 0, 0, 0, \
462 0, 0, 0, 0, \
463 1, 1, 1, 1, \
464 1, 1, \
465 0, 0, 0, 0, \
466 0, 0, 0, 0, \
467 0, 0, 0, 0, \
468 0, 0, 0, 0 }
469
470 #define CALL_REALLY_USED_REGISTERS \
471 { 1, 1, 1, 1, /* r0 - r15 */ \
472 1, 1, 0, 0, \
473 0, 0, 0, 0, \
474 0, 0, 0, 0, \
475 1, 1, 1, 1, /* f0 (16) - f15 (31) */ \
476 1, 1, 1, 1, \
477 1, 1, 1, 1, \
478 1, 1, 1, 1, \
479 1, 1, 1, 1, /* arg, cc, fp, ret addr */ \
480 0, 0, /* a0 (36), a1 (37) */ \
481 1, 1, 1, 1, /* v16 (38) - v23 (45) */ \
482 1, 1, 1, 1, \
483 1, 1, 1, 1, /* v24 (46) - v31 (53) */ \
484 1, 1, 1, 1 }
485
486 /* Preferred register allocation order. */
487 #define REG_ALLOC_ORDER \
488 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
489 16, 17, 18, 19, 20, 21, 22, 23, \
490 24, 25, 26, 27, 28, 29, 30, 31, \
491 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \
492 15, 32, 33, 34, 35, 36, 37 }
493
494
495 #define HARD_REGNO_RENAME_OK(FROM, TO) \
496 s390_hard_regno_rename_ok ((FROM), (TO))
497
498 /* Maximum number of registers to represent a value of mode MODE
499 in a register of class CLASS. */
500 #define CLASS_MAX_NREGS(CLASS, MODE) \
501 s390_class_max_nregs ((CLASS), (MODE))
502
503 /* We can reverse a CC mode safely if we know whether it comes from a
504 floating point compare or not. With the vector modes it is encoded
505 as part of the mode.
506 FIXME: It might make sense to do this for other cc modes as well. */
507 #define REVERSIBLE_CC_MODE(MODE) \
508 ((MODE) == CCVIALLmode || (MODE) == CCVIANYmode \
509 || (MODE) == CCVFALLmode || (MODE) == CCVFANYmode)
510
511 /* Given a condition code and a mode, return the inverse condition. */
512 #define REVERSE_CONDITION(CODE, MODE) s390_reverse_condition (MODE, CODE)
513
514
515 /* Register classes. */
516
517 /* We use the following register classes:
518 GENERAL_REGS All general purpose registers
519 ADDR_REGS All general purpose registers except %r0
520 (These registers can be used in address generation)
521 FP_REGS All floating point registers
522 CC_REGS The condition code register
523 ACCESS_REGS The access registers
524
525 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
526 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
527 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
528 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
529
530 NO_REGS No registers
531 ALL_REGS All registers
532
533 Note that the 'fake' frame pointer and argument pointer registers
534 are included amongst the address registers here. */
535
536 enum reg_class
537 {
538 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
539 ADDR_CC_REGS, GENERAL_CC_REGS,
540 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
541 VEC_REGS, ADDR_VEC_REGS, GENERAL_VEC_REGS,
542 ALL_REGS, LIM_REG_CLASSES
543 };
544 #define N_REG_CLASSES (int) LIM_REG_CLASSES
545
546 #define REG_CLASS_NAMES \
547 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
548 "ADDR_CC_REGS", "GENERAL_CC_REGS", \
549 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", \
550 "VEC_REGS", "ADDR_VEC_REGS", "GENERAL_VEC_REGS", \
551 "ALL_REGS" }
552
553 /* Class -> register mapping. */
554 #define REG_CLASS_CONTENTS \
555 { \
556 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
557 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
558 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
559 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
560 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
561 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
562 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
563 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
564 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
565 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
566 { 0xffff0000, 0x003fffc0 }, /* VEC_REGS */ \
567 { 0xfffffffe, 0x003fffcd }, /* ADDR_VEC_REGS */ \
568 { 0xffffffff, 0x003fffcd }, /* GENERAL_VEC_REGS */ \
569 { 0xffffffff, 0x003fffff }, /* ALL_REGS */ \
570 }
571
572 /* In some case register allocation order is not enough for IRA to
573 generate a good code. The following macro (if defined) increases
574 cost of REGNO for a pseudo approximately by pseudo usage frequency
575 multiplied by the macro value.
576
577 We avoid usage of BASE_REGNUM by nonzero macro value because the
578 reload can decide not to use the hard register because some
579 constant was forced to be in memory. */
580 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno) \
581 ((regno) != BASE_REGNUM ? 0.0 : 0.5)
582
583 /* Register -> class mapping. */
584 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
585 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
586
587 /* ADDR_REGS can be used as base or index register. */
588 #define INDEX_REG_CLASS ADDR_REGS
589 #define BASE_REG_CLASS ADDR_REGS
590
591 /* Check whether REGNO is a hard register of the suitable class
592 or a pseudo register currently allocated to one such. */
593 #define REGNO_OK_FOR_INDEX_P(REGNO) \
594 (((REGNO) < FIRST_PSEUDO_REGISTER \
595 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
596 || ADDR_REGNO_P (reg_renumber[REGNO]))
597 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
598
599
600 /* Stack layout and calling conventions. */
601
602 /* Our stack grows from higher to lower addresses. However, local variables
603 are accessed by positive offsets, and function arguments are stored at
604 increasing addresses. */
605 #define STACK_GROWS_DOWNWARD 1
606 #define FRAME_GROWS_DOWNWARD 1
607 /* #undef ARGS_GROW_DOWNWARD */
608
609 /* The basic stack layout looks like this: the stack pointer points
610 to the register save area for called functions. Above that area
611 is the location to place outgoing arguments. Above those follow
612 dynamic allocations (alloca), and finally the local variables. */
613
614 /* Offset from stack-pointer to first location of outgoing args. */
615 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
616
617 /* Offset from the stack pointer register to an item dynamically
618 allocated on the stack, e.g., by `alloca'. */
619 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
620 (STACK_POINTER_OFFSET + crtl->outgoing_args_size)
621
622 /* Offset of first parameter from the argument pointer register value.
623 We have a fake argument pointer register that points directly to
624 the argument area. */
625 #define FIRST_PARM_OFFSET(FNDECL) 0
626
627 /* Defining this macro makes __builtin_frame_address(0) and
628 __builtin_return_address(0) work with -fomit-frame-pointer. */
629 #define INITIAL_FRAME_ADDRESS_RTX \
630 (plus_constant (Pmode, arg_pointer_rtx, -STACK_POINTER_OFFSET))
631
632 /* The return address of the current frame is retrieved
633 from the initial value of register RETURN_REGNUM.
634 For frames farther back, we use the stack slot where
635 the corresponding RETURN_REGNUM register was saved. */
636 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
637 (TARGET_PACKED_STACK ? \
638 plus_constant (Pmode, (FRAME), \
639 STACK_POINTER_OFFSET - UNITS_PER_LONG) : (FRAME))
640
641 /* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of
642 builtin_frame_address. Otherwise arg pointer -
643 STACK_POINTER_OFFSET would be returned for
644 __builtin_frame_address(0) what might result in an address pointing
645 somewhere into the middle of the local variables since the packed
646 stack layout generally does not need all the bytes in the register
647 save area. */
648 #define FRAME_ADDR_RTX(FRAME) \
649 DYNAMIC_CHAIN_ADDRESS ((FRAME))
650
651 #define RETURN_ADDR_RTX(COUNT, FRAME) \
652 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
653
654 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
655 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
656
657
658 /* Exception handling. */
659
660 /* Describe calling conventions for DWARF-2 exception handling. */
661 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
662 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
663 #define DWARF_FRAME_RETURN_COLUMN 14
664
665 /* Describe how we implement __builtin_eh_return. */
666 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
667 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
668
669 /* Select a format to encode pointers in exception handling data. */
670 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
671 (flag_pic \
672 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
673 : DW_EH_PE_absptr)
674
675 /* Register save slot alignment. */
676 #define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_LONG)
677
678 /* Let the assembler generate debug line info. */
679 #define DWARF2_ASM_LINE_DEBUG_INFO 1
680
681 /* Define the dwarf register mapping.
682 v16-v31 -> 68-83
683 rX -> X otherwise */
684 #define DBX_REGISTER_NUMBER(regno) \
685 (((regno) >= 38 && (regno) <= 53) ? (regno) + 30 : (regno))
686
687 /* Frame registers. */
688
689 #define STACK_POINTER_REGNUM 15
690 #define FRAME_POINTER_REGNUM 34
691 #define HARD_FRAME_POINTER_REGNUM 11
692 #define ARG_POINTER_REGNUM 32
693 #define RETURN_ADDRESS_POINTER_REGNUM 35
694
695 /* The static chain must be call-clobbered, but not used for
696 function argument passing. As register 1 is clobbered by
697 the trampoline code, we only have one option. */
698 #define STATIC_CHAIN_REGNUM 0
699
700 /* Number of hardware registers that go into the DWARF-2 unwind info.
701 To avoid ABI incompatibility, this number must not change even as
702 'fake' hard registers are added or removed. */
703 #define DWARF_FRAME_REGISTERS 34
704
705
706 /* Frame pointer and argument pointer elimination. */
707
708 #define ELIMINABLE_REGS \
709 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
710 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
711 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
712 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
713 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
714 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
715 { BASE_REGNUM, BASE_REGNUM }}
716
717 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
718 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
719
720
721 /* Stack arguments. */
722
723 /* We need current_function_outgoing_args to be valid. */
724 #define ACCUMULATE_OUTGOING_ARGS 1
725
726
727 /* Register arguments. */
728
729 typedef struct s390_arg_structure
730 {
731 int gprs; /* gpr so far */
732 int fprs; /* fpr so far */
733 int vrs; /* vr so far */
734 }
735 CUMULATIVE_ARGS;
736
737 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
738 ((CUM).gprs=0, (CUM).fprs=0, (CUM).vrs=0)
739
740 #define FIRST_VEC_ARG_REGNO 46
741 #define LAST_VEC_ARG_REGNO 53
742
743 /* Arguments can be placed in general registers 2 to 6, or in floating
744 point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
745 bit. */
746 #define FUNCTION_ARG_REGNO_P(N) \
747 (((N) >=2 && (N) < 7) || (N) == 16 || (N) == 17 \
748 || (TARGET_64BIT && ((N) == 18 || (N) == 19)) \
749 || (TARGET_VX && ((N) >= FIRST_VEC_ARG_REGNO && (N) <= LAST_VEC_ARG_REGNO)))
750
751
752 /* Only gpr 2, fpr 0, and v24 are ever used as return registers. */
753 #define FUNCTION_VALUE_REGNO_P(N) \
754 ((N) == 2 || (N) == 16 \
755 || (TARGET_VX && (N) == FIRST_VEC_ARG_REGNO))
756
757
758 /* Function entry and exit. */
759
760 /* When returning from a function, the stack pointer does not matter. */
761 #define EXIT_IGNORE_STACK 1
762
763
764 /* Profiling. */
765
766 #define FUNCTION_PROFILER(FILE, LABELNO) \
767 s390_function_profiler ((FILE), ((LABELNO)))
768
769 #define PROFILE_BEFORE_PROLOGUE 1
770
771
772 /* Trampolines for nested functions. */
773
774 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
775 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
776
777 /* Addressing modes, and classification of registers for them. */
778
779 /* Recognize any constant value that is a valid address. */
780 #define CONSTANT_ADDRESS_P(X) 0
781
782 /* Maximum number of registers that can appear in a valid memory address. */
783 #define MAX_REGS_PER_ADDRESS 2
784
785 /* This definition replaces the formerly used 'm' constraint with a
786 different constraint letter in order to avoid changing semantics of
787 the 'm' constraint when accepting new address formats in
788 TARGET_LEGITIMATE_ADDRESS_P. The constraint letter defined here
789 must not be used in insn definitions or inline assemblies. */
790 #define TARGET_MEM_CONSTRAINT 'e'
791
792 /* Try a machine-dependent way of reloading an illegitimate address
793 operand. If we find one, push the reload and jump to WIN. This
794 macro is used in only one place: `find_reloads_address' in reload.c. */
795 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
796 do { \
797 rtx new_rtx = legitimize_reload_address ((AD), (MODE), \
798 (OPNUM), (int)(TYPE)); \
799 if (new_rtx) \
800 { \
801 (AD) = new_rtx; \
802 goto WIN; \
803 } \
804 } while (0)
805
806 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
807 #define SYMBOLIC_CONST(X) \
808 (GET_CODE (X) == SYMBOL_REF \
809 || GET_CODE (X) == LABEL_REF \
810 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
811
812 #define TLS_SYMBOLIC_CONST(X) \
813 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
814 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
815
816
817 /* Condition codes. */
818
819 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
820 return the mode to be used for the comparison. */
821 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
822
823 /* Relative costs of operations. */
824
825 /* A C expression for the cost of a branch instruction. A value of 1
826 is the default; other values are interpreted relative to that. */
827 #define BRANCH_COST(speed_p, predictable_p) s390_branch_cost
828
829 /* Nonzero if access to memory by bytes is slow and undesirable. */
830 #define SLOW_BYTE_ACCESS 1
831
832 /* An integer expression for the size in bits of the largest integer machine
833 mode that should actually be used. We allow pairs of registers. */
834 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
835
836 /* The maximum number of bytes that a single instruction can move quickly
837 between memory and registers or between two memory locations. */
838 #define MOVE_MAX (TARGET_ZARCH ? 16 : 8)
839 #define MOVE_MAX_PIECES (TARGET_ZARCH ? 8 : 4)
840 #define MAX_MOVE_MAX 16
841
842 /* Don't perform CSE on function addresses. */
843 #define NO_FUNCTION_CSE 1
844
845 /* This value is used in tree-sra to decide whether it might benefical
846 to split a struct move into several word-size moves. For S/390
847 only small values make sense here since struct moves are relatively
848 cheap thanks to mvc so the small default value chosen for archs
849 with memmove patterns should be ok. But this value is multiplied
850 in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
851 here to compensate for that factor since mvc costs exactly the same
852 on 31 and 64 bit. */
853 #define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4)
854
855
856 /* Sections. */
857
858 /* Output before read-only data. */
859 #define TEXT_SECTION_ASM_OP ".text"
860
861 /* Output before writable (initialized) data. */
862 #define DATA_SECTION_ASM_OP ".data"
863
864 /* Output before writable (uninitialized) data. */
865 #define BSS_SECTION_ASM_OP ".bss"
866
867 /* S/390 constant pool breaks the devices in crtstuff.c to control section
868 in where code resides. We have to write it as asm code. */
869 #ifndef __s390x__
870 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
871 asm (SECTION_OP "\n\
872 bras\t%r2,1f\n\
873 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
874 1: l\t%r3,0(%r2)\n\
875 bas\t%r14,0(%r3,%r2)\n\
876 .previous");
877 #endif
878
879
880 /* Position independent code. */
881
882 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
883
884 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
885
886 #ifndef TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE
887 #define TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE 1
888 #endif
889
890
891 /* Assembler file format. */
892
893 /* Character to start a comment. */
894 #define ASM_COMMENT_START "#"
895
896 /* Declare an uninitialized external linkage data object. */
897 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
898 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
899
900 /* Globalizing directive for a label. */
901 #define GLOBAL_ASM_OP ".globl "
902
903 /* Advance the location counter to a multiple of 2**LOG bytes. */
904 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
905 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
906
907 /* Advance the location counter by SIZE bytes. */
908 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
909 fprintf ((FILE), "\t.set\t.,.+" HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
910
911 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
912 #define LOCAL_LABEL_PREFIX "."
913
914 #define LABEL_ALIGN(LABEL) \
915 s390_label_align ((LABEL))
916
917 /* How to refer to registers in assembler output. This sequence is
918 indexed by compiler's hard-register-number (see above). */
919 #define REGISTER_NAMES \
920 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
921 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
922 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
923 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
924 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1", \
925 "%v16", "%v18", "%v20", "%v22", "%v17", "%v19", "%v21", "%v23", \
926 "%v24", "%v26", "%v28", "%v30", "%v25", "%v27", "%v29", "%v31" \
927 }
928
929 #define ADDITIONAL_REGISTER_NAMES \
930 { { "v0", 16 }, { "v2", 17 }, { "v4", 18 }, { "v6", 19 }, \
931 { "v1", 20 }, { "v3", 21 }, { "v5", 22 }, { "v7", 23 }, \
932 { "v8", 24 }, { "v10", 25 }, { "v12", 26 }, { "v14", 27 }, \
933 { "v9", 28 }, { "v11", 29 }, { "v13", 30 }, { "v15", 31 } };
934
935 /* Print operand X (an rtx) in assembler syntax to file FILE. */
936 #define PRINT_OPERAND(FILE, X, CODE) print_operand ((FILE), (X), (CODE))
937 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address ((FILE), (ADDR))
938
939 /* Output an element of a case-vector that is absolute. */
940 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
941 do { \
942 char buf[32]; \
943 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
944 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
945 assemble_name ((FILE), buf); \
946 fputc ('\n', (FILE)); \
947 } while (0)
948
949 /* Output an element of a case-vector that is relative. */
950 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
951 do { \
952 char buf[32]; \
953 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
954 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
955 assemble_name ((FILE), buf); \
956 fputc ('-', (FILE)); \
957 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
958 assemble_name ((FILE), buf); \
959 fputc ('\n', (FILE)); \
960 } while (0)
961
962 /* Mark the return register as used by the epilogue so that we can
963 use it in unadorned (return) and (simple_return) instructions. */
964 #define EPILOGUE_USES(REGNO) ((REGNO) == RETURN_REGNUM)
965
966 #undef ASM_OUTPUT_FUNCTION_LABEL
967 #define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \
968 s390_asm_output_function_label ((FILE), (NAME), (DECL))
969
970 #if S390_USE_TARGET_ATTRIBUTE
971 /* Hook to output .machine and .machinemode at start of function. */
972 #undef ASM_OUTPUT_FUNCTION_PREFIX
973 #define ASM_OUTPUT_FUNCTION_PREFIX s390_asm_output_function_prefix
974
975 /* Hook to output .machine and .machinemode at end of function. */
976 #undef ASM_DECLARE_FUNCTION_SIZE
977 #define ASM_DECLARE_FUNCTION_SIZE s390_asm_declare_function_size
978 #endif
979
980 /* Miscellaneous parameters. */
981
982 /* Specify the machine mode that this machine uses for the index in the
983 tablejump instruction. */
984 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
985
986 /* Specify the machine mode that pointers have.
987 After generation of rtl, the compiler makes no further distinction
988 between pointers and any other objects of this machine mode. */
989 #define Pmode (TARGET_64BIT ? DImode : SImode)
990
991 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
992 #define POINTERS_EXTEND_UNSIGNED -1
993
994 /* A function address in a call instruction is a byte address (for
995 indexing purposes) so give the MEM rtx a byte's mode. */
996 #define FUNCTION_MODE QImode
997
998 /* Specify the value which is used when clz operand is zero. */
999 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
1000
1001 /* Machine-specific symbol_ref flags. */
1002 #define SYMBOL_FLAG_ALIGN_SHIFT SYMBOL_FLAG_MACH_DEP_SHIFT
1003 #define SYMBOL_FLAG_ALIGN_MASK \
1004 ((SYMBOL_FLAG_MACH_DEP << 0) | (SYMBOL_FLAG_MACH_DEP << 1))
1005
1006 #define SYMBOL_FLAG_SET_ALIGN(X, A) \
1007 (SYMBOL_REF_FLAGS (X) = (SYMBOL_REF_FLAGS (X) & ~SYMBOL_FLAG_ALIGN_MASK) \
1008 | (A << SYMBOL_FLAG_ALIGN_SHIFT))
1009
1010 #define SYMBOL_FLAG_GET_ALIGN(X) \
1011 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN_MASK) >> SYMBOL_FLAG_ALIGN_SHIFT)
1012
1013 /* Helpers to access symbol_ref flags. They are used in
1014 check_symref_alignment() and larl_operand to detect if the
1015 available alignment matches the required one. We do not use
1016 a positive check like _ALIGN2 because in that case we would have
1017 to annotate every symbol_ref. However, we only want to touch
1018 the symbol_refs that can be misaligned and assume that the others
1019 are correctly aligned. Hence, if a symbol_ref does not have
1020 a _NOTALIGN flag it is supposed to be correctly aligned. */
1021 #define SYMBOL_FLAG_SET_NOTALIGN2(X) SYMBOL_FLAG_SET_ALIGN((X), 1)
1022 #define SYMBOL_FLAG_SET_NOTALIGN4(X) SYMBOL_FLAG_SET_ALIGN((X), 2)
1023 #define SYMBOL_FLAG_SET_NOTALIGN8(X) SYMBOL_FLAG_SET_ALIGN((X), 3)
1024
1025 #define SYMBOL_FLAG_NOTALIGN2_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 1)
1026 #define SYMBOL_FLAG_NOTALIGN4_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 2 \
1027 || SYMBOL_FLAG_GET_ALIGN(X) == 1)
1028 #define SYMBOL_FLAG_NOTALIGN8_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 3 \
1029 || SYMBOL_FLAG_GET_ALIGN(X) == 2 \
1030 || SYMBOL_FLAG_GET_ALIGN(X) == 1)
1031
1032 /* Check whether integer displacement is in range for a short displacement. */
1033 #define SHORT_DISP_IN_RANGE(d) ((d) >= 0 && (d) <= 4095)
1034
1035 /* Check whether integer displacement is in range. */
1036 #define DISP_IN_RANGE(d) \
1037 (TARGET_LONG_DISPLACEMENT \
1038 ? ((d) >= -524288 && (d) <= 524287) \
1039 : SHORT_DISP_IN_RANGE(d))
1040
1041 /* Reads can reuse write prefetches, used by tree-ssa-prefetch-loops.c. */
1042 #define READ_CAN_USE_WRITE_PREFETCH 1
1043
1044 extern const int processor_flags_table[];
1045
1046 struct s390_processor
1047 {
1048 /* The preferred name to be used in user visible output. */
1049 const char *const name;
1050 /* CPU name as it should be passed to Binutils via .machine */
1051 const char *const binutils_name;
1052 const enum processor_type processor;
1053 const struct processor_costs *cost;
1054 int arch_level;
1055 };
1056
1057 extern const struct s390_processor processor_table[];
1058
1059 /* The truth element value for vector comparisons. Our instructions
1060 always generate -1 in that case. */
1061 #define VECTOR_STORE_FLAG_VALUE(MODE) CONSTM1_RTX (GET_MODE_INNER (MODE))
1062
1063 /* Target pragma. */
1064
1065 /* resolve_overloaded_builtin cannot be defined the normal way since
1066 it is defined in code which technically belongs to the
1067 front-end. */
1068 #define REGISTER_TARGET_PRAGMAS() \
1069 do { \
1070 s390_register_target_pragmas (); \
1071 } while (0)
1072
1073 #ifndef USED_FOR_TARGET
1074 /* The following structure is embedded in the machine
1075 specific part of struct function. */
1076
1077 struct GTY (()) s390_frame_layout
1078 {
1079 /* Offset within stack frame. */
1080 HOST_WIDE_INT gprs_offset;
1081 HOST_WIDE_INT f0_offset;
1082 HOST_WIDE_INT f4_offset;
1083 HOST_WIDE_INT f8_offset;
1084 HOST_WIDE_INT backchain_offset;
1085
1086 /* Number of first and last gpr where slots in the register
1087 save area are reserved for. */
1088 int first_save_gpr_slot;
1089 int last_save_gpr_slot;
1090
1091 /* Location (FP register number) where GPRs (r0-r15) should
1092 be saved to.
1093 0 - does not need to be saved at all
1094 -1 - stack slot */
1095 #define SAVE_SLOT_NONE 0
1096 #define SAVE_SLOT_STACK -1
1097 signed char gpr_save_slots[16];
1098
1099 /* Number of first and last gpr to be saved, restored. */
1100 int first_save_gpr;
1101 int first_restore_gpr;
1102 int last_save_gpr;
1103 int last_restore_gpr;
1104
1105 /* Bits standing for floating point registers. Set, if the
1106 respective register has to be saved. Starting with reg 16 (f0)
1107 at the rightmost bit.
1108 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1109 fpr 15 13 11 9 14 12 10 8 7 5 3 1 6 4 2 0
1110 reg 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 */
1111 unsigned int fpr_bitmap;
1112
1113 /* Number of floating point registers f8-f15 which must be saved. */
1114 int high_fprs;
1115
1116 /* Set if return address needs to be saved.
1117 This flag is set by s390_return_addr_rtx if it could not use
1118 the initial value of r14 and therefore depends on r14 saved
1119 to the stack. */
1120 bool save_return_addr_p;
1121
1122 /* Size of stack frame. */
1123 HOST_WIDE_INT frame_size;
1124 };
1125
1126
1127 /* Define the structure for the machine field in struct function. */
1128
1129 struct GTY(()) machine_function
1130 {
1131 struct s390_frame_layout frame_layout;
1132
1133 /* Literal pool base register. */
1134 rtx base_reg;
1135
1136 bool has_landing_pad_p;
1137
1138 /* True if the current function may contain a tbegin clobbering
1139 FPRs. */
1140 bool tbegin_p;
1141
1142 /* For -fsplit-stack support: A stack local which holds a pointer to
1143 the stack arguments for a function with a variable number of
1144 arguments. This is set at the start of the function and is used
1145 to initialize the overflow_arg_area field of the va_list
1146 structure. */
1147 rtx split_stack_varargs_pointer;
1148
1149 enum indirect_branch indirect_branch_jump;
1150 enum indirect_branch indirect_branch_call;
1151
1152 enum indirect_branch function_return_mem;
1153 enum indirect_branch function_return_reg;
1154 };
1155 #endif
1156
1157 #define TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION \
1158 (cfun->machine->function_return_reg != indirect_branch_keep \
1159 || cfun->machine->function_return_mem != indirect_branch_keep)
1160
1161 #define TARGET_INDIRECT_BRANCH_NOBP_RET \
1162 ((cfun->machine->function_return_reg != indirect_branch_keep \
1163 && !s390_return_addr_from_memory ()) \
1164 || (cfun->machine->function_return_mem != indirect_branch_keep \
1165 && s390_return_addr_from_memory ()))
1166
1167 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP \
1168 (cfun->machine->indirect_branch_jump != indirect_branch_keep)
1169
1170 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK \
1171 (cfun->machine->indirect_branch_jump == indirect_branch_thunk \
1172 || cfun->machine->indirect_branch_jump == indirect_branch_thunk_extern)
1173
1174 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK \
1175 (cfun->machine->indirect_branch_jump == indirect_branch_thunk_inline)
1176
1177 #define TARGET_INDIRECT_BRANCH_NOBP_CALL \
1178 (cfun->machine->indirect_branch_call != indirect_branch_keep)
1179
1180 #ifndef TARGET_DEFAULT_INDIRECT_BRANCH_TABLE
1181 #define TARGET_DEFAULT_INDIRECT_BRANCH_TABLE 0
1182 #endif
1183
1184 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL "__s390_indirect_jump_r%d"
1185 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EX "__s390_indirect_jump_r%duse_r%d"
1186
1187 #define TARGET_INDIRECT_BRANCH_TABLE s390_indirect_branch_table
1188
1189 #ifdef GENERATOR_FILE
1190 /* gencondmd.c is built before insn-flags.h. Use an arbitrary opaque value
1191 that cannot be optimized away by gen_insn. */
1192 #define HAVE_TF(icode) TARGET_HARD_FLOAT
1193 #else
1194 #define HAVE_TF(icode) (HAVE_##icode##_fpr || HAVE_##icode##_vr)
1195 #endif
1196
1197 /* Dispatcher for movtf. */
1198 #define EXPAND_MOVTF(icode) \
1199 do \
1200 { \
1201 if (TARGET_VXE) \
1202 emit_insn (gen_##icode##_vr (operands[0], operands[1])); \
1203 else \
1204 emit_insn (gen_##icode##_fpr (operands[0], operands[1])); \
1205 DONE; \
1206 } \
1207 while (false)
1208
1209 /* Like EXPAND_MOVTF, but also legitimizes operands. */
1210 #define EXPAND_TF(icode, nops) \
1211 do \
1212 { \
1213 const size_t __nops = (nops); \
1214 expand_operand ops[__nops]; \
1215 create_output_operand (&ops[0], operands[0], GET_MODE (operands[0])); \
1216 for (size_t i = 1; i < __nops; i++) \
1217 create_input_operand (&ops[i], operands[i], GET_MODE (operands[i])); \
1218 if (TARGET_VXE) \
1219 expand_insn (CODE_FOR_##icode##_vr, __nops, ops); \
1220 else \
1221 expand_insn (CODE_FOR_##icode##_fpr, __nops, ops); \
1222 DONE; \
1223 } \
1224 while (false)
1225
1226 #endif /* S390_H */
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