PR target/59794
[official-gcc.git] / gcc / reginfo.c
blobbdb980da3e11a8b5f93997e32ec7e8b5585a2d66
1 /* Compute different info about registers.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* This file contains regscan pass of the compiler and passes for
22 dealing with info about modes of pseudo-registers inside
23 subregisters. It also defines some tables of information about the
24 hardware registers, function init_reg_sets to initialize the
25 tables, and other auxiliary functions to deal with info about
26 registers and their classes. */
28 #include "config.h"
29 #include "system.h"
30 #include "coretypes.h"
31 #include "tm.h"
32 #include "hard-reg-set.h"
33 #include "tree.h"
34 #include "rtl.h"
35 #include "expr.h"
36 #include "tm_p.h"
37 #include "flags.h"
38 #include "basic-block.h"
39 #include "regs.h"
40 #include "addresses.h"
41 #include "function.h"
42 #include "insn-config.h"
43 #include "recog.h"
44 #include "reload.h"
45 #include "diagnostic-core.h"
46 #include "output.h"
47 #include "hashtab.h"
48 #include "target.h"
49 #include "tree-pass.h"
50 #include "df.h"
51 #include "ira.h"
53 /* Maximum register number used in this function, plus one. */
55 int max_regno;
58 struct target_hard_regs default_target_hard_regs;
59 struct target_regs default_target_regs;
60 #if SWITCHABLE_TARGET
61 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
62 struct target_regs *this_target_regs = &default_target_regs;
63 #endif
65 /* Data for initializing fixed_regs. */
66 static const char initial_fixed_regs[] = FIXED_REGISTERS;
68 /* Data for initializing call_used_regs. */
69 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
71 #ifdef CALL_REALLY_USED_REGISTERS
72 /* Data for initializing call_really_used_regs. */
73 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
74 #endif
76 #ifdef CALL_REALLY_USED_REGISTERS
77 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
78 #else
79 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
80 #endif
82 /* Indexed by hard register number, contains 1 for registers
83 that are being used for global register decls.
84 These must be exempt from ordinary flow analysis
85 and are also considered fixed. */
86 char global_regs[FIRST_PSEUDO_REGISTER];
88 /* Declaration for the global register. */
89 tree global_regs_decl[FIRST_PSEUDO_REGISTER];
91 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
92 in dataflow more conveniently. */
93 regset regs_invalidated_by_call_regset;
95 /* Same information as FIXED_REG_SET but in regset form. */
96 regset fixed_reg_set_regset;
98 /* The bitmap_obstack is used to hold some static variables that
99 should not be reset after each function is compiled. */
100 static bitmap_obstack persistent_obstack;
102 /* Used to initialize reg_alloc_order. */
103 #ifdef REG_ALLOC_ORDER
104 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
105 #endif
107 /* The same information, but as an array of unsigned ints. We copy from
108 these unsigned ints to the table above. We do this so the tm.h files
109 do not have to be aware of the wordsize for machines with <= 64 regs.
110 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
111 #define N_REG_INTS \
112 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
114 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
115 = REG_CLASS_CONTENTS;
117 /* Array containing all of the register names. */
118 static const char *const initial_reg_names[] = REGISTER_NAMES;
120 /* Array containing all of the register class names. */
121 const char * reg_class_names[] = REG_CLASS_NAMES;
123 /* No more global register variables may be declared; true once
124 reginfo has been initialized. */
125 static int no_global_reg_vars = 0;
127 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
128 correspond to the hard registers, if any, set in that map. This
129 could be done far more efficiently by having all sorts of special-cases
130 with moving single words, but probably isn't worth the trouble. */
131 void
132 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
134 unsigned i;
135 bitmap_iterator bi;
137 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
139 if (i >= FIRST_PSEUDO_REGISTER)
140 return;
141 SET_HARD_REG_BIT (*to, i);
145 /* Function called only once per target_globals to initialize the
146 target_hard_regs structure. Once this is done, various switches
147 may override. */
148 void
149 init_reg_sets (void)
151 int i, j;
153 /* First copy the register information from the initial int form into
154 the regsets. */
156 for (i = 0; i < N_REG_CLASSES; i++)
158 CLEAR_HARD_REG_SET (reg_class_contents[i]);
160 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
161 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
162 if (int_reg_class_contents[i][j / 32]
163 & ((unsigned) 1 << (j % 32)))
164 SET_HARD_REG_BIT (reg_class_contents[i], j);
167 /* Sanity check: make sure the target macros FIXED_REGISTERS and
168 CALL_USED_REGISTERS had the right number of initializers. */
169 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
170 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
171 #ifdef CALL_REALLY_USED_REGISTERS
172 gcc_assert (sizeof call_really_used_regs
173 == sizeof initial_call_really_used_regs);
174 #endif
175 #ifdef REG_ALLOC_ORDER
176 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
177 #endif
178 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
180 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
181 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
182 #ifdef CALL_REALLY_USED_REGISTERS
183 memcpy (call_really_used_regs, initial_call_really_used_regs,
184 sizeof call_really_used_regs);
185 #endif
186 #ifdef REG_ALLOC_ORDER
187 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
188 #endif
189 memcpy (reg_names, initial_reg_names, sizeof reg_names);
191 SET_HARD_REG_SET (accessible_reg_set);
192 SET_HARD_REG_SET (operand_reg_set);
195 /* We need to save copies of some of the register information which
196 can be munged by command-line switches so we can restore it during
197 subsequent back-end reinitialization. */
198 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
199 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
200 #ifdef CALL_REALLY_USED_REGISTERS
201 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
202 #endif
203 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
204 static HARD_REG_SET saved_accessible_reg_set;
205 static HARD_REG_SET saved_operand_reg_set;
207 /* Save the register information. */
208 void
209 save_register_info (void)
211 /* Sanity check: make sure the target macros FIXED_REGISTERS and
212 CALL_USED_REGISTERS had the right number of initializers. */
213 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
214 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
215 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
216 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
218 /* Likewise for call_really_used_regs. */
219 #ifdef CALL_REALLY_USED_REGISTERS
220 gcc_assert (sizeof call_really_used_regs
221 == sizeof saved_call_really_used_regs);
222 memcpy (saved_call_really_used_regs, call_really_used_regs,
223 sizeof call_really_used_regs);
224 #endif
226 /* And similarly for reg_names. */
227 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
228 memcpy (saved_reg_names, reg_names, sizeof reg_names);
229 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
230 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
233 /* Restore the register information. */
234 static void
235 restore_register_info (void)
237 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
238 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
240 #ifdef CALL_REALLY_USED_REGISTERS
241 memcpy (call_really_used_regs, saved_call_really_used_regs,
242 sizeof call_really_used_regs);
243 #endif
245 memcpy (reg_names, saved_reg_names, sizeof reg_names);
246 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
247 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
250 /* After switches have been processed, which perhaps alter
251 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
252 static void
253 init_reg_sets_1 (void)
255 unsigned int i, j;
256 unsigned int /* enum machine_mode */ m;
258 restore_register_info ();
260 #ifdef REG_ALLOC_ORDER
261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
262 inv_reg_alloc_order[reg_alloc_order[i]] = i;
263 #endif
265 /* Let the target tweak things if necessary. */
267 targetm.conditional_register_usage ();
269 /* Compute number of hard regs in each class. */
271 memset (reg_class_size, 0, sizeof reg_class_size);
272 for (i = 0; i < N_REG_CLASSES; i++)
274 bool any_nonfixed = false;
275 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
276 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
278 reg_class_size[i]++;
279 if (!fixed_regs[j])
280 any_nonfixed = true;
282 class_only_fixed_regs[i] = !any_nonfixed;
285 /* Initialize the table of subunions.
286 reg_class_subunion[I][J] gets the largest-numbered reg-class
287 that is contained in the union of classes I and J. */
289 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
290 for (i = 0; i < N_REG_CLASSES; i++)
292 for (j = 0; j < N_REG_CLASSES; j++)
294 HARD_REG_SET c;
295 int k;
297 COPY_HARD_REG_SET (c, reg_class_contents[i]);
298 IOR_HARD_REG_SET (c, reg_class_contents[j]);
299 for (k = 0; k < N_REG_CLASSES; k++)
300 if (hard_reg_set_subset_p (reg_class_contents[k], c)
301 && !hard_reg_set_subset_p (reg_class_contents[k],
302 reg_class_contents
303 [(int) reg_class_subunion[i][j]]))
304 reg_class_subunion[i][j] = (enum reg_class) k;
308 /* Initialize the table of superunions.
309 reg_class_superunion[I][J] gets the smallest-numbered reg-class
310 containing the union of classes I and J. */
312 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
313 for (i = 0; i < N_REG_CLASSES; i++)
315 for (j = 0; j < N_REG_CLASSES; j++)
317 HARD_REG_SET c;
318 int k;
320 COPY_HARD_REG_SET (c, reg_class_contents[i]);
321 IOR_HARD_REG_SET (c, reg_class_contents[j]);
322 for (k = 0; k < N_REG_CLASSES; k++)
323 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
324 break;
326 reg_class_superunion[i][j] = (enum reg_class) k;
330 /* Initialize the tables of subclasses and superclasses of each reg class.
331 First clear the whole table, then add the elements as they are found. */
333 for (i = 0; i < N_REG_CLASSES; i++)
335 for (j = 0; j < N_REG_CLASSES; j++)
336 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
339 for (i = 0; i < N_REG_CLASSES; i++)
341 if (i == (int) NO_REGS)
342 continue;
344 for (j = i + 1; j < N_REG_CLASSES; j++)
345 if (hard_reg_set_subset_p (reg_class_contents[i],
346 reg_class_contents[j]))
348 /* Reg class I is a subclass of J.
349 Add J to the table of superclasses of I. */
350 enum reg_class *p;
352 /* Add I to the table of superclasses of J. */
353 p = &reg_class_subclasses[j][0];
354 while (*p != LIM_REG_CLASSES) p++;
355 *p = (enum reg_class) i;
359 /* Initialize "constant" tables. */
361 CLEAR_HARD_REG_SET (fixed_reg_set);
362 CLEAR_HARD_REG_SET (call_used_reg_set);
363 CLEAR_HARD_REG_SET (call_fixed_reg_set);
364 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
365 if (!regs_invalidated_by_call_regset)
367 bitmap_obstack_initialize (&persistent_obstack);
368 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
370 else
371 CLEAR_REG_SET (regs_invalidated_by_call_regset);
372 if (!fixed_reg_set_regset)
373 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
374 else
375 CLEAR_REG_SET (fixed_reg_set_regset);
377 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
378 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
380 /* As a special exception, registers whose class is NO_REGS are
381 not accepted by `register_operand'. The reason for this change
382 is to allow the representation of special architecture artifacts
383 (such as a condition code register) without extending the rtl
384 definitions. Since registers of class NO_REGS cannot be used
385 as registers in any case where register classes are examined,
386 it is better to apply this exception in a target-independent way. */
387 if (REGNO_REG_CLASS (i) == NO_REGS)
388 CLEAR_HARD_REG_BIT (operand_reg_set, i);
390 /* If a register is too limited to be treated as a register operand,
391 then it should never be allocated to a pseudo. */
392 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
394 fixed_regs[i] = 1;
395 call_used_regs[i] = 1;
398 /* call_used_regs must include fixed_regs. */
399 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
400 #ifdef CALL_REALLY_USED_REGISTERS
401 /* call_used_regs must include call_really_used_regs. */
402 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
403 #endif
405 if (fixed_regs[i])
407 SET_HARD_REG_BIT (fixed_reg_set, i);
408 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
411 if (call_used_regs[i])
412 SET_HARD_REG_BIT (call_used_reg_set, i);
414 /* There are a couple of fixed registers that we know are safe to
415 exclude from being clobbered by calls:
417 The frame pointer is always preserved across calls. The arg
418 pointer is if it is fixed. The stack pointer usually is,
419 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
420 CLOBBER will be present. If we are generating PIC code, the
421 PIC offset table register is preserved across calls, though the
422 target can override that. */
424 if (i == STACK_POINTER_REGNUM)
426 else if (global_regs[i])
428 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
429 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
431 else if (i == FRAME_POINTER_REGNUM)
433 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
434 else if (i == HARD_FRAME_POINTER_REGNUM)
436 #endif
437 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
438 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
440 #endif
441 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
442 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
444 else if (CALL_REALLY_USED_REGNO_P (i))
446 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
447 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
451 COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
453 /* Preserve global registers if called more than once. */
454 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
456 if (global_regs[i])
458 fixed_regs[i] = call_used_regs[i] = 1;
459 SET_HARD_REG_BIT (fixed_reg_set, i);
460 SET_HARD_REG_BIT (call_used_reg_set, i);
461 SET_HARD_REG_BIT (call_fixed_reg_set, i);
465 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
466 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
467 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
469 HARD_REG_SET ok_regs;
470 CLEAR_HARD_REG_SET (ok_regs);
471 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
472 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
473 SET_HARD_REG_BIT (ok_regs, j);
475 for (i = 0; i < N_REG_CLASSES; i++)
476 if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
477 <= reg_class_size[i])
478 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
480 contains_reg_of_mode [i][m] = 1;
481 have_regs_of_mode [m] = 1;
486 /* Compute the table of register modes.
487 These values are used to record death information for individual registers
488 (as opposed to a multi-register mode).
489 This function might be invoked more than once, if the target has support
490 for changing register usage conventions on a per-function basis.
492 void
493 init_reg_modes_target (void)
495 int i, j;
497 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
498 for (j = 0; j < MAX_MACHINE_MODE; j++)
499 hard_regno_nregs[i][j] = HARD_REGNO_NREGS (i, (enum machine_mode)j);
501 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
503 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
505 /* If we couldn't find a valid mode, just use the previous mode
506 if it is suitable, otherwise fall back on word_mode. */
507 if (reg_raw_mode[i] == VOIDmode)
509 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
510 reg_raw_mode[i] = reg_raw_mode[i - 1];
511 else
512 reg_raw_mode[i] = word_mode;
517 /* Finish initializing the register sets and initialize the register modes.
518 This function might be invoked more than once, if the target has support
519 for changing register usage conventions on a per-function basis.
521 void
522 init_regs (void)
524 /* This finishes what was started by init_reg_sets, but couldn't be done
525 until after register usage was specified. */
526 init_reg_sets_1 ();
529 /* The same as previous function plus initializing IRA. */
530 void
531 reinit_regs (void)
533 init_regs ();
534 /* caller_save needs to be re-initialized. */
535 caller_save_initialized_p = false;
536 ira_init ();
539 /* Initialize some fake stack-frame MEM references for use in
540 memory_move_secondary_cost. */
541 void
542 init_fake_stack_mems (void)
544 int i;
546 for (i = 0; i < MAX_MACHINE_MODE; i++)
547 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
551 /* Compute cost of moving data from a register of class FROM to one of
552 TO, using MODE. */
555 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
557 return targetm.register_move_cost (mode, from, to);
560 /* Compute cost of moving registers to/from memory. */
563 memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
565 return targetm.memory_move_cost (mode, rclass, in);
568 /* Compute extra cost of moving registers to/from memory due to reloads.
569 Only needed if secondary reloads are required for memory moves. */
571 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
572 bool in)
574 reg_class_t altclass;
575 int partial_cost = 0;
576 /* We need a memory reference to feed to SECONDARY... macros. */
577 /* mem may be unused even if the SECONDARY_ macros are defined. */
578 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
580 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
582 if (altclass == NO_REGS)
583 return 0;
585 if (in)
586 partial_cost = register_move_cost (mode, altclass, rclass);
587 else
588 partial_cost = register_move_cost (mode, rclass, altclass);
590 if (rclass == altclass)
591 /* This isn't simply a copy-to-temporary situation. Can't guess
592 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
593 calling here in that case.
595 I'm tempted to put in an assert here, but returning this will
596 probably only give poor estimates, which is what we would've
597 had before this code anyways. */
598 return partial_cost;
600 /* Check if the secondary reload register will also need a
601 secondary reload. */
602 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
605 /* Return a machine mode that is legitimate for hard reg REGNO and large
606 enough to save nregs. If we can't find one, return VOIDmode.
607 If CALL_SAVED is true, only consider modes that are call saved. */
608 enum machine_mode
609 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
610 unsigned int nregs, bool call_saved)
612 unsigned int /* enum machine_mode */ m;
613 enum machine_mode found_mode = VOIDmode, mode;
615 /* We first look for the largest integer mode that can be validly
616 held in REGNO. If none, we look for the largest floating-point mode.
617 If we still didn't find a valid mode, try CCmode. */
619 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
620 mode != VOIDmode;
621 mode = GET_MODE_WIDER_MODE (mode))
622 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
623 && HARD_REGNO_MODE_OK (regno, mode)
624 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
625 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
626 found_mode = mode;
628 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
629 mode != VOIDmode;
630 mode = GET_MODE_WIDER_MODE (mode))
631 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
632 && HARD_REGNO_MODE_OK (regno, mode)
633 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
634 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
635 found_mode = mode;
637 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
638 mode != VOIDmode;
639 mode = GET_MODE_WIDER_MODE (mode))
640 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
641 && HARD_REGNO_MODE_OK (regno, mode)
642 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
643 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
644 found_mode = mode;
646 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
647 mode != VOIDmode;
648 mode = GET_MODE_WIDER_MODE (mode))
649 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
650 && HARD_REGNO_MODE_OK (regno, mode)
651 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
652 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
653 found_mode = mode;
655 if (found_mode != VOIDmode)
656 return found_mode;
658 /* Iterate over all of the CCmodes. */
659 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
661 mode = (enum machine_mode) m;
662 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
663 && HARD_REGNO_MODE_OK (regno, mode)
664 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
665 return mode;
668 /* We can't find a mode valid for this register. */
669 return VOIDmode;
672 /* Specify the usage characteristics of the register named NAME.
673 It should be a fixed register if FIXED and a
674 call-used register if CALL_USED. */
675 void
676 fix_register (const char *name, int fixed, int call_used)
678 int i;
679 int reg, nregs;
681 /* Decode the name and update the primary form of
682 the register info. */
684 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
686 gcc_assert (nregs >= 1);
687 for (i = reg; i < reg + nregs; i++)
689 if ((i == STACK_POINTER_REGNUM
690 #ifdef HARD_FRAME_POINTER_REGNUM
691 || i == HARD_FRAME_POINTER_REGNUM
692 #else
693 || i == FRAME_POINTER_REGNUM
694 #endif
696 && (fixed == 0 || call_used == 0))
698 switch (fixed)
700 case 0:
701 switch (call_used)
703 case 0:
704 error ("can%'t use %qs as a call-saved register", name);
705 break;
707 case 1:
708 error ("can%'t use %qs as a call-used register", name);
709 break;
711 default:
712 gcc_unreachable ();
714 break;
716 case 1:
717 switch (call_used)
719 case 1:
720 error ("can%'t use %qs as a fixed register", name);
721 break;
723 case 0:
724 default:
725 gcc_unreachable ();
727 break;
729 default:
730 gcc_unreachable ();
733 else
735 fixed_regs[i] = fixed;
736 call_used_regs[i] = call_used;
737 #ifdef CALL_REALLY_USED_REGISTERS
738 if (fixed == 0)
739 call_really_used_regs[i] = call_used;
740 #endif
744 else
746 warning (0, "unknown register name: %s", name);
750 /* Mark register number I as global. */
751 void
752 globalize_reg (tree decl, int i)
754 location_t loc = DECL_SOURCE_LOCATION (decl);
756 #ifdef STACK_REGS
757 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
759 error ("stack register used for global register variable");
760 return;
762 #endif
764 if (fixed_regs[i] == 0 && no_global_reg_vars)
765 error_at (loc, "global register variable follows a function definition");
767 if (global_regs[i])
769 warning_at (loc, 0,
770 "register of %qD used for multiple global register variables",
771 decl);
772 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
773 "conflicts with %qD", global_regs_decl[i]);
774 return;
777 if (call_used_regs[i] && ! fixed_regs[i])
778 warning_at (loc, 0, "call-clobbered register used for global register variable");
780 global_regs[i] = 1;
781 global_regs_decl[i] = decl;
783 /* If we're globalizing the frame pointer, we need to set the
784 appropriate regs_invalidated_by_call bit, even if it's already
785 set in fixed_regs. */
786 if (i != STACK_POINTER_REGNUM)
788 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
789 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
792 /* If already fixed, nothing else to do. */
793 if (fixed_regs[i])
794 return;
796 fixed_regs[i] = call_used_regs[i] = 1;
797 #ifdef CALL_REALLY_USED_REGISTERS
798 call_really_used_regs[i] = 1;
799 #endif
801 SET_HARD_REG_BIT (fixed_reg_set, i);
802 SET_HARD_REG_BIT (call_used_reg_set, i);
803 SET_HARD_REG_BIT (call_fixed_reg_set, i);
805 reinit_regs ();
809 /* Structure used to record preferences of given pseudo. */
810 struct reg_pref
812 /* (enum reg_class) prefclass is the preferred class. May be
813 NO_REGS if no class is better than memory. */
814 char prefclass;
816 /* altclass is a register class that we should use for allocating
817 pseudo if no register in the preferred class is available.
818 If no register in this class is available, memory is preferred.
820 It might appear to be more general to have a bitmask of classes here,
821 but since it is recommended that there be a class corresponding to the
822 union of most major pair of classes, that generality is not required. */
823 char altclass;
825 /* allocnoclass is a register class that IRA uses for allocating
826 the pseudo. */
827 char allocnoclass;
830 /* Record preferences of each pseudo. This is available after RA is
831 run. */
832 static struct reg_pref *reg_pref;
834 /* Current size of reg_info. */
835 static int reg_info_size;
836 /* Max_reg_num still last resize_reg_info call. */
837 static int max_regno_since_last_resize;
839 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
840 This function is sometimes called before the info has been computed.
841 When that happens, just return GENERAL_REGS, which is innocuous. */
842 enum reg_class
843 reg_preferred_class (int regno)
845 if (reg_pref == 0)
846 return GENERAL_REGS;
848 gcc_assert (regno < reg_info_size);
849 return (enum reg_class) reg_pref[regno].prefclass;
852 enum reg_class
853 reg_alternate_class (int regno)
855 if (reg_pref == 0)
856 return ALL_REGS;
858 gcc_assert (regno < reg_info_size);
859 return (enum reg_class) reg_pref[regno].altclass;
862 /* Return the reg_class which is used by IRA for its allocation. */
863 enum reg_class
864 reg_allocno_class (int regno)
866 if (reg_pref == 0)
867 return NO_REGS;
869 gcc_assert (regno < reg_info_size);
870 return (enum reg_class) reg_pref[regno].allocnoclass;
875 /* Allocate space for reg info and initilize it. */
876 static void
877 allocate_reg_info (void)
879 int i;
881 max_regno_since_last_resize = max_reg_num ();
882 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
883 gcc_assert (! reg_pref && ! reg_renumber);
884 reg_renumber = XNEWVEC (short, reg_info_size);
885 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
886 memset (reg_renumber, -1, reg_info_size * sizeof (short));
887 for (i = 0; i < reg_info_size; i++)
889 reg_pref[i].prefclass = GENERAL_REGS;
890 reg_pref[i].altclass = ALL_REGS;
891 reg_pref[i].allocnoclass = GENERAL_REGS;
896 /* Resize reg info. The new elements will be initialized. Return TRUE
897 if new pseudos were added since the last call. */
898 bool
899 resize_reg_info (void)
901 int old, i;
902 bool change_p;
904 if (reg_pref == NULL)
906 allocate_reg_info ();
907 return true;
909 change_p = max_regno_since_last_resize != max_reg_num ();
910 max_regno_since_last_resize = max_reg_num ();
911 if (reg_info_size >= max_reg_num ())
912 return change_p;
913 old = reg_info_size;
914 reg_info_size = max_reg_num () * 3 / 2 + 1;
915 gcc_assert (reg_pref && reg_renumber);
916 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
917 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
918 memset (reg_pref + old, -1,
919 (reg_info_size - old) * sizeof (struct reg_pref));
920 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
921 for (i = old; i < reg_info_size; i++)
923 reg_pref[i].prefclass = GENERAL_REGS;
924 reg_pref[i].altclass = ALL_REGS;
925 reg_pref[i].allocnoclass = GENERAL_REGS;
927 return true;
931 /* Free up the space allocated by allocate_reg_info. */
932 void
933 free_reg_info (void)
935 if (reg_pref)
937 free (reg_pref);
938 reg_pref = NULL;
941 if (reg_renumber)
943 free (reg_renumber);
944 reg_renumber = NULL;
948 /* Initialize some global data for this pass. */
949 static unsigned int
950 reginfo_init (void)
952 if (df)
953 df_compute_regs_ever_live (true);
955 /* This prevents dump_reg_info from losing if called
956 before reginfo is run. */
957 reg_pref = NULL;
958 reg_info_size = max_regno_since_last_resize = 0;
959 /* No more global register variables may be declared. */
960 no_global_reg_vars = 1;
961 return 1;
964 namespace {
966 const pass_data pass_data_reginfo_init =
968 RTL_PASS, /* type */
969 "reginfo", /* name */
970 OPTGROUP_NONE, /* optinfo_flags */
971 false, /* has_gate */
972 true, /* has_execute */
973 TV_NONE, /* tv_id */
974 0, /* properties_required */
975 0, /* properties_provided */
976 0, /* properties_destroyed */
977 0, /* todo_flags_start */
978 0, /* todo_flags_finish */
981 class pass_reginfo_init : public rtl_opt_pass
983 public:
984 pass_reginfo_init (gcc::context *ctxt)
985 : rtl_opt_pass (pass_data_reginfo_init, ctxt)
988 /* opt_pass methods: */
989 unsigned int execute () { return reginfo_init (); }
991 }; // class pass_reginfo_init
993 } // anon namespace
995 rtl_opt_pass *
996 make_pass_reginfo_init (gcc::context *ctxt)
998 return new pass_reginfo_init (ctxt);
1003 /* Set up preferred, alternate, and allocno classes for REGNO as
1004 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
1005 void
1006 setup_reg_classes (int regno,
1007 enum reg_class prefclass, enum reg_class altclass,
1008 enum reg_class allocnoclass)
1010 if (reg_pref == NULL)
1011 return;
1012 gcc_assert (reg_info_size >= max_reg_num ());
1013 reg_pref[regno].prefclass = prefclass;
1014 reg_pref[regno].altclass = altclass;
1015 reg_pref[regno].allocnoclass = allocnoclass;
1019 /* This is the `regscan' pass of the compiler, run just before cse and
1020 again just before loop. It finds the first and last use of each
1021 pseudo-register. */
1023 static void reg_scan_mark_refs (rtx, rtx);
1025 void
1026 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1028 rtx insn;
1030 timevar_push (TV_REG_SCAN);
1032 for (insn = f; insn; insn = NEXT_INSN (insn))
1033 if (INSN_P (insn))
1035 reg_scan_mark_refs (PATTERN (insn), insn);
1036 if (REG_NOTES (insn))
1037 reg_scan_mark_refs (REG_NOTES (insn), insn);
1040 timevar_pop (TV_REG_SCAN);
1044 /* X is the expression to scan. INSN is the insn it appears in.
1045 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1046 We should only record information for REGs with numbers
1047 greater than or equal to MIN_REGNO. */
1048 static void
1049 reg_scan_mark_refs (rtx x, rtx insn)
1051 enum rtx_code code;
1052 rtx dest;
1053 rtx note;
1055 if (!x)
1056 return;
1057 code = GET_CODE (x);
1058 switch (code)
1060 case CONST:
1061 CASE_CONST_ANY:
1062 case CC0:
1063 case PC:
1064 case SYMBOL_REF:
1065 case LABEL_REF:
1066 case ADDR_VEC:
1067 case ADDR_DIFF_VEC:
1068 case REG:
1069 return;
1071 case EXPR_LIST:
1072 if (XEXP (x, 0))
1073 reg_scan_mark_refs (XEXP (x, 0), insn);
1074 if (XEXP (x, 1))
1075 reg_scan_mark_refs (XEXP (x, 1), insn);
1076 break;
1078 case INSN_LIST:
1079 case INT_LIST:
1080 if (XEXP (x, 1))
1081 reg_scan_mark_refs (XEXP (x, 1), insn);
1082 break;
1084 case CLOBBER:
1085 if (MEM_P (XEXP (x, 0)))
1086 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1087 break;
1089 case SET:
1090 /* Count a set of the destination if it is a register. */
1091 for (dest = SET_DEST (x);
1092 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1093 || GET_CODE (dest) == ZERO_EXTEND;
1094 dest = XEXP (dest, 0))
1097 /* If this is setting a pseudo from another pseudo or the sum of a
1098 pseudo and a constant integer and the other pseudo is known to be
1099 a pointer, set the destination to be a pointer as well.
1101 Likewise if it is setting the destination from an address or from a
1102 value equivalent to an address or to the sum of an address and
1103 something else.
1105 But don't do any of this if the pseudo corresponds to a user
1106 variable since it should have already been set as a pointer based
1107 on the type. */
1109 if (REG_P (SET_DEST (x))
1110 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1111 /* If the destination pseudo is set more than once, then other
1112 sets might not be to a pointer value (consider access to a
1113 union in two threads of control in the presence of global
1114 optimizations). So only set REG_POINTER on the destination
1115 pseudo if this is the only set of that pseudo. */
1116 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1117 && ! REG_USERVAR_P (SET_DEST (x))
1118 && ! REG_POINTER (SET_DEST (x))
1119 && ((REG_P (SET_SRC (x))
1120 && REG_POINTER (SET_SRC (x)))
1121 || ((GET_CODE (SET_SRC (x)) == PLUS
1122 || GET_CODE (SET_SRC (x)) == LO_SUM)
1123 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1124 && REG_P (XEXP (SET_SRC (x), 0))
1125 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1126 || GET_CODE (SET_SRC (x)) == CONST
1127 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1128 || GET_CODE (SET_SRC (x)) == LABEL_REF
1129 || (GET_CODE (SET_SRC (x)) == HIGH
1130 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1131 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1132 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1133 || ((GET_CODE (SET_SRC (x)) == PLUS
1134 || GET_CODE (SET_SRC (x)) == LO_SUM)
1135 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1136 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1137 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1138 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1139 && (GET_CODE (XEXP (note, 0)) == CONST
1140 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1141 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1142 REG_POINTER (SET_DEST (x)) = 1;
1144 /* If this is setting a register from a register or from a simple
1145 conversion of a register, propagate REG_EXPR. */
1146 if (REG_P (dest) && !REG_ATTRS (dest))
1147 set_reg_attrs_from_value (dest, SET_SRC (x));
1149 /* ... fall through ... */
1151 default:
1153 const char *fmt = GET_RTX_FORMAT (code);
1154 int i;
1155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1157 if (fmt[i] == 'e')
1158 reg_scan_mark_refs (XEXP (x, i), insn);
1159 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1161 int j;
1162 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1163 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1171 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1172 is also in C2. */
1174 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1176 return (c1 == c2
1177 || c2 == ALL_REGS
1178 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1179 reg_class_contents[(int) c2]));
1182 /* Return nonzero if there is a register that is in both C1 and C2. */
1184 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1186 return (c1 == c2
1187 || c1 == ALL_REGS
1188 || c2 == ALL_REGS
1189 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1190 reg_class_contents[(int) c2]));
1195 /* Passes for keeping and updating info about modes of registers
1196 inside subregisters. */
1198 #ifdef CANNOT_CHANGE_MODE_CLASS
1200 static bitmap invalid_mode_changes;
1202 static void
1203 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1205 enum machine_mode mode;
1206 unsigned int regno;
1208 if (!REG_P (SUBREG_REG (subreg)))
1209 return;
1211 regno = REGNO (SUBREG_REG (subreg));
1212 mode = GET_MODE (subreg);
1214 if (regno < FIRST_PSEUDO_REGISTER)
1215 return;
1217 if (bitmap_set_bit (subregs_of_mode,
1218 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1220 unsigned int rclass;
1221 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1222 if (!bitmap_bit_p (invalid_mode_changes,
1223 regno * N_REG_CLASSES + rclass)
1224 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1225 mode, (enum reg_class) rclass))
1226 bitmap_set_bit (invalid_mode_changes,
1227 regno * N_REG_CLASSES + rclass);
1231 /* Call record_subregs_of_mode for all the subregs in X. */
1232 static void
1233 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1235 enum rtx_code code = GET_CODE (x);
1236 const char * const fmt = GET_RTX_FORMAT (code);
1237 int i;
1239 if (code == SUBREG)
1240 record_subregs_of_mode (x, subregs_of_mode);
1242 /* Time for some deep diving. */
1243 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1245 if (fmt[i] == 'e')
1246 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1247 else if (fmt[i] == 'E')
1249 int j;
1250 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1251 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1256 void
1257 init_subregs_of_mode (void)
1259 basic_block bb;
1260 rtx insn;
1261 bitmap_obstack srom_obstack;
1262 bitmap subregs_of_mode;
1264 gcc_assert (invalid_mode_changes == NULL);
1265 invalid_mode_changes = BITMAP_ALLOC (NULL);
1266 bitmap_obstack_initialize (&srom_obstack);
1267 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1269 FOR_EACH_BB_FN (bb, cfun)
1270 FOR_BB_INSNS (bb, insn)
1271 if (NONDEBUG_INSN_P (insn))
1272 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1274 BITMAP_FREE (subregs_of_mode);
1275 bitmap_obstack_release (&srom_obstack);
1278 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1279 mode. */
1280 bool
1281 invalid_mode_change_p (unsigned int regno,
1282 enum reg_class rclass)
1284 return bitmap_bit_p (invalid_mode_changes,
1285 regno * N_REG_CLASSES + (unsigned) rclass);
1288 void
1289 finish_subregs_of_mode (void)
1291 BITMAP_FREE (invalid_mode_changes);
1293 #else
1294 void
1295 init_subregs_of_mode (void)
1298 void
1299 finish_subregs_of_mode (void)
1303 #endif /* CANNOT_CHANGE_MODE_CLASS */