1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
63 #include "hard-reg-set.h"
70 #include "basic-block.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
81 #ifdef XCOFF_DEBUGGING_INFO
82 #include "xcoffout.h" /* Needed for external data
83 declarations for e.g. AIX 4.x. */
86 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
87 #include "dwarf2out.h"
90 #ifdef DBX_DEBUGGING_INFO
94 #ifdef SDB_DEBUGGING_INFO
98 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
99 null default for it to save conditionalization later. */
100 #ifndef CC_STATUS_INIT
101 #define CC_STATUS_INIT
104 /* How to start an assembler comment. */
105 #ifndef ASM_COMMENT_START
106 #define ASM_COMMENT_START ";#"
109 /* Is the given character a logical line separator for the assembler? */
110 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
111 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
114 #ifndef JUMP_TABLES_IN_TEXT_SECTION
115 #define JUMP_TABLES_IN_TEXT_SECTION 0
118 /* Bitflags used by final_scan_insn. */
121 #define SEEN_EMITTED 4
123 /* Last insn processed by final_scan_insn. */
124 static rtx debug_insn
;
125 rtx current_output_insn
;
127 /* Line number of last NOTE. */
128 static int last_linenum
;
130 /* Highest line number in current block. */
131 static int high_block_linenum
;
133 /* Likewise for function. */
134 static int high_function_linenum
;
136 /* Filename of last NOTE. */
137 static const char *last_filename
;
139 /* Whether to force emission of a line note before the next insn. */
140 static bool force_source_line
= false;
142 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
144 /* Nonzero while outputting an `asm' with operands.
145 This means that inconsistencies are the user's fault, so don't die.
146 The precise value is the insn being output, to pass to error_for_asm. */
147 rtx this_is_asm_operands
;
149 /* Number of operands of this insn, for an `asm' with operands. */
150 static unsigned int insn_noperands
;
152 /* Compare optimization flag. */
154 static rtx last_ignored_compare
= 0;
156 /* Assign a unique number to each insn that is output.
157 This can be used to generate unique local labels. */
159 static int insn_counter
= 0;
162 /* This variable contains machine-dependent flags (defined in tm.h)
163 set and examined by output routines
164 that describe how to interpret the condition codes properly. */
168 /* During output of an insn, this contains a copy of cc_status
169 from before the insn. */
171 CC_STATUS cc_prev_status
;
174 /* Indexed by hardware reg number, is 1 if that register is ever
175 used in the current function.
177 In life_analysis, or in stupid_life_analysis, this is set
178 up to record the hard regs used explicitly. Reload adds
179 in the hard regs used for holding pseudo regs. Final uses
180 it to generate the code in the function prologue and epilogue
181 to save and restore registers as needed. */
183 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
185 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
186 Unlike regs_ever_live, elements of this array corresponding to
187 eliminable regs like the frame pointer are set if an asm sets them. */
189 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
191 /* Nonzero means current function must be given a frame pointer.
192 Initialized in function.c to 0. Set only in reload1.c as per
193 the needs of the function. */
195 int frame_pointer_needed
;
197 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
199 static int block_depth
;
201 /* Nonzero if have enabled APP processing of our assembler output. */
205 /* If we are outputting an insn sequence, this contains the sequence rtx.
210 #ifdef ASSEMBLER_DIALECT
212 /* Number of the assembler dialect to use, starting at 0. */
213 static int dialect_number
;
216 #ifdef HAVE_conditional_execution
217 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
218 rtx current_insn_predicate
;
221 #ifdef HAVE_ATTR_length
222 static int asm_insn_count (rtx
);
224 static void profile_function (FILE *);
225 static void profile_after_prologue (FILE *);
226 static bool notice_source_line (rtx
);
227 static rtx
walk_alter_subreg (rtx
*);
228 static void output_asm_name (void);
229 static void output_alternate_entry_point (FILE *, rtx
);
230 static tree
get_mem_expr_from_op (rtx
, int *);
231 static void output_asm_operand_names (rtx
*, int *, int);
232 static void output_operand (rtx
, int);
233 #ifdef LEAF_REGISTERS
234 static void leaf_renumber_regs (rtx
);
237 static int alter_cond (rtx
);
239 #ifndef ADDR_VEC_ALIGN
240 static int final_addr_vec_align (rtx
);
242 #ifdef HAVE_ATTR_length
243 static int align_fuzz (rtx
, rtx
, int, unsigned);
246 /* Initialize data in final at the beginning of a compilation. */
249 init_final (const char *filename ATTRIBUTE_UNUSED
)
254 #ifdef ASSEMBLER_DIALECT
255 dialect_number
= ASSEMBLER_DIALECT
;
259 /* Default target function prologue and epilogue assembler output.
261 If not overridden for epilogue code, then the function body itself
262 contains return instructions wherever needed. */
264 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
265 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
269 /* Default target hook that outputs nothing to a stream. */
271 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
275 /* Enable APP processing of subsequent output.
276 Used before the output from an `asm' statement. */
283 fputs (ASM_APP_ON
, asm_out_file
);
288 /* Disable APP processing of subsequent output.
289 Called from varasm.c before most kinds of output. */
296 fputs (ASM_APP_OFF
, asm_out_file
);
301 /* Return the number of slots filled in the current
302 delayed branch sequence (we don't count the insn needing the
303 delay slot). Zero if not in a delayed branch sequence. */
307 dbr_sequence_length (void)
309 if (final_sequence
!= 0)
310 return XVECLEN (final_sequence
, 0) - 1;
316 /* The next two pages contain routines used to compute the length of an insn
317 and to shorten branches. */
319 /* Arrays for insn lengths, and addresses. The latter is referenced by
320 `insn_current_length'. */
322 static int *insn_lengths
;
324 VEC(int,heap
) *insn_addresses_
;
326 /* Max uid for which the above arrays are valid. */
327 static int insn_lengths_max_uid
;
329 /* Address of insn being processed. Used by `insn_current_length'. */
330 int insn_current_address
;
332 /* Address of insn being processed in previous iteration. */
333 int insn_last_address
;
335 /* known invariant alignment of insn being processed. */
336 int insn_current_align
;
338 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
339 gives the next following alignment insn that increases the known
340 alignment, or NULL_RTX if there is no such insn.
341 For any alignment obtained this way, we can again index uid_align with
342 its uid to obtain the next following align that in turn increases the
343 alignment, till we reach NULL_RTX; the sequence obtained this way
344 for each insn we'll call the alignment chain of this insn in the following
347 struct label_alignment
353 static rtx
*uid_align
;
354 static int *uid_shuid
;
355 static struct label_alignment
*label_align
;
357 /* Indicate that branch shortening hasn't yet been done. */
360 init_insn_lengths (void)
371 insn_lengths_max_uid
= 0;
373 #ifdef HAVE_ATTR_length
374 INSN_ADDRESSES_FREE ();
383 /* Obtain the current length of an insn. If branch shortening has been done,
384 get its actual length. Otherwise, use FALLBACK_FN to calculate the
387 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
388 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
390 #ifdef HAVE_ATTR_length
395 if (insn_lengths_max_uid
> INSN_UID (insn
))
396 return insn_lengths
[INSN_UID (insn
)];
398 switch (GET_CODE (insn
))
406 length
= fallback_fn (insn
);
410 body
= PATTERN (insn
);
411 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
413 /* Alignment is machine-dependent and should be handled by
417 length
= fallback_fn (insn
);
421 body
= PATTERN (insn
);
422 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
425 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
426 length
= asm_insn_count (body
) * fallback_fn (insn
);
427 else if (GET_CODE (body
) == SEQUENCE
)
428 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
429 length
+= get_attr_length (XVECEXP (body
, 0, i
));
431 length
= fallback_fn (insn
);
438 #ifdef ADJUST_INSN_LENGTH
439 ADJUST_INSN_LENGTH (insn
, length
);
442 #else /* not HAVE_ATTR_length */
444 #define insn_default_length 0
445 #define insn_min_length 0
446 #endif /* not HAVE_ATTR_length */
449 /* Obtain the current length of an insn. If branch shortening has been done,
450 get its actual length. Otherwise, get its maximum length. */
452 get_attr_length (rtx insn
)
454 return get_attr_length_1 (insn
, insn_default_length
);
457 /* Obtain the current length of an insn. If branch shortening has been done,
458 get its actual length. Otherwise, get its minimum length. */
460 get_attr_min_length (rtx insn
)
462 return get_attr_length_1 (insn
, insn_min_length
);
465 /* Code to handle alignment inside shorten_branches. */
467 /* Here is an explanation how the algorithm in align_fuzz can give
470 Call a sequence of instructions beginning with alignment point X
471 and continuing until the next alignment point `block X'. When `X'
472 is used in an expression, it means the alignment value of the
475 Call the distance between the start of the first insn of block X, and
476 the end of the last insn of block X `IX', for the `inner size of X'.
477 This is clearly the sum of the instruction lengths.
479 Likewise with the next alignment-delimited block following X, which we
482 Call the distance between the start of the first insn of block X, and
483 the start of the first insn of block Y `OX', for the `outer size of X'.
485 The estimated padding is then OX - IX.
487 OX can be safely estimated as
492 OX = round_up(IX, X) + Y - X
494 Clearly est(IX) >= real(IX), because that only depends on the
495 instruction lengths, and those being overestimated is a given.
497 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
498 we needn't worry about that when thinking about OX.
500 When X >= Y, the alignment provided by Y adds no uncertainty factor
501 for branch ranges starting before X, so we can just round what we have.
502 But when X < Y, we don't know anything about the, so to speak,
503 `middle bits', so we have to assume the worst when aligning up from an
504 address mod X to one mod Y, which is Y - X. */
507 #define LABEL_ALIGN(LABEL) align_labels_log
510 #ifndef LABEL_ALIGN_MAX_SKIP
511 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
515 #define LOOP_ALIGN(LABEL) align_loops_log
518 #ifndef LOOP_ALIGN_MAX_SKIP
519 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
522 #ifndef LABEL_ALIGN_AFTER_BARRIER
523 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
526 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
527 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
531 #define JUMP_ALIGN(LABEL) align_jumps_log
534 #ifndef JUMP_ALIGN_MAX_SKIP
535 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
538 #ifndef ADDR_VEC_ALIGN
540 final_addr_vec_align (rtx addr_vec
)
542 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
544 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
545 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
546 return exact_log2 (align
);
550 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
553 #ifndef INSN_LENGTH_ALIGNMENT
554 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
557 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
559 static int min_labelno
, max_labelno
;
561 #define LABEL_TO_ALIGNMENT(LABEL) \
562 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
564 #define LABEL_TO_MAX_SKIP(LABEL) \
565 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
567 /* For the benefit of port specific code do this also as a function. */
570 label_to_alignment (rtx label
)
572 return LABEL_TO_ALIGNMENT (label
);
575 #ifdef HAVE_ATTR_length
576 /* The differences in addresses
577 between a branch and its target might grow or shrink depending on
578 the alignment the start insn of the range (the branch for a forward
579 branch or the label for a backward branch) starts out on; if these
580 differences are used naively, they can even oscillate infinitely.
581 We therefore want to compute a 'worst case' address difference that
582 is independent of the alignment the start insn of the range end
583 up on, and that is at least as large as the actual difference.
584 The function align_fuzz calculates the amount we have to add to the
585 naively computed difference, by traversing the part of the alignment
586 chain of the start insn of the range that is in front of the end insn
587 of the range, and considering for each alignment the maximum amount
588 that it might contribute to a size increase.
590 For casesi tables, we also want to know worst case minimum amounts of
591 address difference, in case a machine description wants to introduce
592 some common offset that is added to all offsets in a table.
593 For this purpose, align_fuzz with a growth argument of 0 computes the
594 appropriate adjustment. */
596 /* Compute the maximum delta by which the difference of the addresses of
597 START and END might grow / shrink due to a different address for start
598 which changes the size of alignment insns between START and END.
599 KNOWN_ALIGN_LOG is the alignment known for START.
600 GROWTH should be ~0 if the objective is to compute potential code size
601 increase, and 0 if the objective is to compute potential shrink.
602 The return value is undefined for any other value of GROWTH. */
605 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
607 int uid
= INSN_UID (start
);
609 int known_align
= 1 << known_align_log
;
610 int end_shuid
= INSN_SHUID (end
);
613 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
615 int align_addr
, new_align
;
617 uid
= INSN_UID (align_label
);
618 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
619 if (uid_shuid
[uid
] > end_shuid
)
621 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
622 new_align
= 1 << known_align_log
;
623 if (new_align
< known_align
)
625 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
626 known_align
= new_align
;
631 /* Compute a worst-case reference address of a branch so that it
632 can be safely used in the presence of aligned labels. Since the
633 size of the branch itself is unknown, the size of the branch is
634 not included in the range. I.e. for a forward branch, the reference
635 address is the end address of the branch as known from the previous
636 branch shortening pass, minus a value to account for possible size
637 increase due to alignment. For a backward branch, it is the start
638 address of the branch as known from the current pass, plus a value
639 to account for possible size increase due to alignment.
640 NB.: Therefore, the maximum offset allowed for backward branches needs
641 to exclude the branch size. */
644 insn_current_reference_address (rtx branch
)
649 if (! INSN_ADDRESSES_SET_P ())
652 seq
= NEXT_INSN (PREV_INSN (branch
));
653 seq_uid
= INSN_UID (seq
);
654 if (!JUMP_P (branch
))
655 /* This can happen for example on the PA; the objective is to know the
656 offset to address something in front of the start of the function.
657 Thus, we can treat it like a backward branch.
658 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
659 any alignment we'd encounter, so we skip the call to align_fuzz. */
660 return insn_current_address
;
661 dest
= JUMP_LABEL (branch
);
663 /* BRANCH has no proper alignment chain set, so use SEQ.
664 BRANCH also has no INSN_SHUID. */
665 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
667 /* Forward branch. */
668 return (insn_last_address
+ insn_lengths
[seq_uid
]
669 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
673 /* Backward branch. */
674 return (insn_current_address
675 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
678 #endif /* HAVE_ATTR_length */
680 /* Compute branch alignments based on frequency information in the
684 compute_alignments (void)
686 int log
, max_skip
, max_log
;
695 max_labelno
= max_label_num ();
696 min_labelno
= get_first_label_num ();
697 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
699 /* If not optimizing or optimizing for size, don't assign any alignments. */
700 if (! optimize
|| optimize_size
)
705 rtx label
= BB_HEAD (bb
);
706 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
711 || probably_never_executed_bb_p (bb
))
713 max_log
= LABEL_ALIGN (label
);
714 max_skip
= LABEL_ALIGN_MAX_SKIP
;
716 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
718 if (e
->flags
& EDGE_FALLTHRU
)
719 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
721 branch_frequency
+= EDGE_FREQUENCY (e
);
724 /* There are two purposes to align block with no fallthru incoming edge:
725 1) to avoid fetch stalls when branch destination is near cache boundary
726 2) to improve cache efficiency in case the previous block is not executed
727 (so it does not need to be in the cache).
729 We to catch first case, we align frequently executed blocks.
730 To catch the second, we align blocks that are executed more frequently
731 than the predecessor and the predecessor is likely to not be executed
732 when function is called. */
735 && (branch_frequency
> BB_FREQ_MAX
/ 10
736 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
737 && (bb
->prev_bb
->frequency
738 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
740 log
= JUMP_ALIGN (label
);
744 max_skip
= JUMP_ALIGN_MAX_SKIP
;
747 /* In case block is frequent and reached mostly by non-fallthru edge,
748 align it. It is most likely a first block of loop. */
750 && maybe_hot_bb_p (bb
)
751 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
752 && branch_frequency
> fallthru_frequency
* 2)
754 log
= LOOP_ALIGN (label
);
758 max_skip
= LOOP_ALIGN_MAX_SKIP
;
761 LABEL_TO_ALIGNMENT (label
) = max_log
;
762 LABEL_TO_MAX_SKIP (label
) = max_skip
;
767 struct tree_opt_pass pass_compute_alignments
=
771 compute_alignments
, /* execute */
774 0, /* static_pass_number */
776 0, /* properties_required */
777 0, /* properties_provided */
778 0, /* properties_destroyed */
779 0, /* todo_flags_start */
780 0, /* todo_flags_finish */
785 /* Make a pass over all insns and compute their actual lengths by shortening
786 any branches of variable length if possible. */
788 /* shorten_branches might be called multiple times: for example, the SH
789 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
790 In order to do this, it needs proper length information, which it obtains
791 by calling shorten_branches. This cannot be collapsed with
792 shorten_branches itself into a single pass unless we also want to integrate
793 reorg.c, since the branch splitting exposes new instructions with delay
797 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
804 #ifdef HAVE_ATTR_length
805 #define MAX_CODE_ALIGN 16
807 int something_changed
= 1;
808 char *varying_length
;
811 rtx align_tab
[MAX_CODE_ALIGN
];
815 /* Compute maximum UID and allocate label_align / uid_shuid. */
816 max_uid
= get_max_uid ();
818 /* Free uid_shuid before reallocating it. */
821 uid_shuid
= XNEWVEC (int, max_uid
);
823 if (max_labelno
!= max_label_num ())
825 int old
= max_labelno
;
829 max_labelno
= max_label_num ();
831 n_labels
= max_labelno
- min_labelno
+ 1;
832 n_old_labels
= old
- min_labelno
+ 1;
834 label_align
= xrealloc (label_align
,
835 n_labels
* sizeof (struct label_alignment
));
837 /* Range of labels grows monotonically in the function. Failing here
838 means that the initialization of array got lost. */
839 gcc_assert (n_old_labels
<= n_labels
);
841 memset (label_align
+ n_old_labels
, 0,
842 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
845 /* Initialize label_align and set up uid_shuid to be strictly
846 monotonically rising with insn order. */
847 /* We use max_log here to keep track of the maximum alignment we want to
848 impose on the next CODE_LABEL (or the current one if we are processing
849 the CODE_LABEL itself). */
854 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
858 INSN_SHUID (insn
) = i
++;
866 /* Merge in alignments computed by compute_alignments. */
867 log
= LABEL_TO_ALIGNMENT (insn
);
871 max_skip
= LABEL_TO_MAX_SKIP (insn
);
874 log
= LABEL_ALIGN (insn
);
878 max_skip
= LABEL_ALIGN_MAX_SKIP
;
880 next
= next_nonnote_insn (insn
);
881 /* ADDR_VECs only take room if read-only data goes into the text
883 if (JUMP_TABLES_IN_TEXT_SECTION
884 || readonly_data_section
== text_section
)
885 if (next
&& JUMP_P (next
))
887 rtx nextbody
= PATTERN (next
);
888 if (GET_CODE (nextbody
) == ADDR_VEC
889 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
891 log
= ADDR_VEC_ALIGN (next
);
895 max_skip
= LABEL_ALIGN_MAX_SKIP
;
899 LABEL_TO_ALIGNMENT (insn
) = max_log
;
900 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
904 else if (BARRIER_P (insn
))
908 for (label
= insn
; label
&& ! INSN_P (label
);
909 label
= NEXT_INSN (label
))
912 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
916 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
922 #ifdef HAVE_ATTR_length
924 /* Allocate the rest of the arrays. */
925 insn_lengths
= XNEWVEC (int, max_uid
);
926 insn_lengths_max_uid
= max_uid
;
927 /* Syntax errors can lead to labels being outside of the main insn stream.
928 Initialize insn_addresses, so that we get reproducible results. */
929 INSN_ADDRESSES_ALLOC (max_uid
);
931 varying_length
= XCNEWVEC (char, max_uid
);
933 /* Initialize uid_align. We scan instructions
934 from end to start, and keep in align_tab[n] the last seen insn
935 that does an alignment of at least n+1, i.e. the successor
936 in the alignment chain for an insn that does / has a known
938 uid_align
= XCNEWVEC (rtx
, max_uid
);
940 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
941 align_tab
[i
] = NULL_RTX
;
942 seq
= get_last_insn ();
943 for (; seq
; seq
= PREV_INSN (seq
))
945 int uid
= INSN_UID (seq
);
947 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
948 uid_align
[uid
] = align_tab
[0];
951 /* Found an alignment label. */
952 uid_align
[uid
] = align_tab
[log
];
953 for (i
= log
- 1; i
>= 0; i
--)
957 #ifdef CASE_VECTOR_SHORTEN_MODE
960 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
963 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
964 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
967 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
969 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
970 int len
, i
, min
, max
, insn_shuid
;
972 addr_diff_vec_flags flags
;
975 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
977 pat
= PATTERN (insn
);
978 len
= XVECLEN (pat
, 1);
979 gcc_assert (len
> 0);
980 min_align
= MAX_CODE_ALIGN
;
981 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
983 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
984 int shuid
= INSN_SHUID (lab
);
995 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
996 min_align
= LABEL_TO_ALIGNMENT (lab
);
998 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
999 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1000 insn_shuid
= INSN_SHUID (insn
);
1001 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1002 memset (&flags
, 0, sizeof (flags
));
1003 flags
.min_align
= min_align
;
1004 flags
.base_after_vec
= rel
> insn_shuid
;
1005 flags
.min_after_vec
= min
> insn_shuid
;
1006 flags
.max_after_vec
= max
> insn_shuid
;
1007 flags
.min_after_base
= min
> rel
;
1008 flags
.max_after_base
= max
> rel
;
1009 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1012 #endif /* CASE_VECTOR_SHORTEN_MODE */
1014 /* Compute initial lengths, addresses, and varying flags for each insn. */
1015 for (insn_current_address
= 0, insn
= first
;
1017 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1019 uid
= INSN_UID (insn
);
1021 insn_lengths
[uid
] = 0;
1025 int log
= LABEL_TO_ALIGNMENT (insn
);
1028 int align
= 1 << log
;
1029 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1030 insn_lengths
[uid
] = new_address
- insn_current_address
;
1034 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1036 if (NOTE_P (insn
) || BARRIER_P (insn
)
1039 if (INSN_DELETED_P (insn
))
1042 body
= PATTERN (insn
);
1043 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1045 /* This only takes room if read-only data goes into the text
1047 if (JUMP_TABLES_IN_TEXT_SECTION
1048 || readonly_data_section
== text_section
)
1049 insn_lengths
[uid
] = (XVECLEN (body
,
1050 GET_CODE (body
) == ADDR_DIFF_VEC
)
1051 * GET_MODE_SIZE (GET_MODE (body
)));
1052 /* Alignment is handled by ADDR_VEC_ALIGN. */
1054 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1055 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1056 else if (GET_CODE (body
) == SEQUENCE
)
1059 int const_delay_slots
;
1061 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1063 const_delay_slots
= 0;
1065 /* Inside a delay slot sequence, we do not do any branch shortening
1066 if the shortening could change the number of delay slots
1068 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1070 rtx inner_insn
= XVECEXP (body
, 0, i
);
1071 int inner_uid
= INSN_UID (inner_insn
);
1074 if (GET_CODE (body
) == ASM_INPUT
1075 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1076 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1077 * insn_default_length (inner_insn
));
1079 inner_length
= insn_default_length (inner_insn
);
1081 insn_lengths
[inner_uid
] = inner_length
;
1082 if (const_delay_slots
)
1084 if ((varying_length
[inner_uid
]
1085 = insn_variable_length_p (inner_insn
)) != 0)
1086 varying_length
[uid
] = 1;
1087 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1088 + insn_lengths
[uid
]);
1091 varying_length
[inner_uid
] = 0;
1092 insn_lengths
[uid
] += inner_length
;
1095 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1097 insn_lengths
[uid
] = insn_default_length (insn
);
1098 varying_length
[uid
] = insn_variable_length_p (insn
);
1101 /* If needed, do any adjustment. */
1102 #ifdef ADJUST_INSN_LENGTH
1103 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1104 if (insn_lengths
[uid
] < 0)
1105 fatal_insn ("negative insn length", insn
);
1109 /* Now loop over all the insns finding varying length insns. For each,
1110 get the current insn length. If it has changed, reflect the change.
1111 When nothing changes for a full pass, we are done. */
1113 while (something_changed
)
1115 something_changed
= 0;
1116 insn_current_align
= MAX_CODE_ALIGN
- 1;
1117 for (insn_current_address
= 0, insn
= first
;
1119 insn
= NEXT_INSN (insn
))
1122 #ifdef ADJUST_INSN_LENGTH
1127 uid
= INSN_UID (insn
);
1131 int log
= LABEL_TO_ALIGNMENT (insn
);
1132 if (log
> insn_current_align
)
1134 int align
= 1 << log
;
1135 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1136 insn_lengths
[uid
] = new_address
- insn_current_address
;
1137 insn_current_align
= log
;
1138 insn_current_address
= new_address
;
1141 insn_lengths
[uid
] = 0;
1142 INSN_ADDRESSES (uid
) = insn_current_address
;
1146 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1147 if (length_align
< insn_current_align
)
1148 insn_current_align
= length_align
;
1150 insn_last_address
= INSN_ADDRESSES (uid
);
1151 INSN_ADDRESSES (uid
) = insn_current_address
;
1153 #ifdef CASE_VECTOR_SHORTEN_MODE
1154 if (optimize
&& JUMP_P (insn
)
1155 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1157 rtx body
= PATTERN (insn
);
1158 int old_length
= insn_lengths
[uid
];
1159 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1160 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1161 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1162 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1163 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1164 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1167 addr_diff_vec_flags flags
;
1169 /* Avoid automatic aggregate initialization. */
1170 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1172 /* Try to find a known alignment for rel_lab. */
1173 for (prev
= rel_lab
;
1175 && ! insn_lengths
[INSN_UID (prev
)]
1176 && ! (varying_length
[INSN_UID (prev
)] & 1);
1177 prev
= PREV_INSN (prev
))
1178 if (varying_length
[INSN_UID (prev
)] & 2)
1180 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1184 /* See the comment on addr_diff_vec_flags in rtl.h for the
1185 meaning of the flags values. base: REL_LAB vec: INSN */
1186 /* Anything after INSN has still addresses from the last
1187 pass; adjust these so that they reflect our current
1188 estimate for this pass. */
1189 if (flags
.base_after_vec
)
1190 rel_addr
+= insn_current_address
- insn_last_address
;
1191 if (flags
.min_after_vec
)
1192 min_addr
+= insn_current_address
- insn_last_address
;
1193 if (flags
.max_after_vec
)
1194 max_addr
+= insn_current_address
- insn_last_address
;
1195 /* We want to know the worst case, i.e. lowest possible value
1196 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1197 its offset is positive, and we have to be wary of code shrink;
1198 otherwise, it is negative, and we have to be vary of code
1200 if (flags
.min_after_base
)
1202 /* If INSN is between REL_LAB and MIN_LAB, the size
1203 changes we are about to make can change the alignment
1204 within the observed offset, therefore we have to break
1205 it up into two parts that are independent. */
1206 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1208 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1209 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1212 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1216 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1218 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1219 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1222 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1224 /* Likewise, determine the highest lowest possible value
1225 for the offset of MAX_LAB. */
1226 if (flags
.max_after_base
)
1228 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1230 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1231 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1234 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1238 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1240 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1241 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1244 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1246 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1247 max_addr
- rel_addr
,
1249 if (JUMP_TABLES_IN_TEXT_SECTION
1250 || readonly_data_section
== text_section
)
1253 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1254 insn_current_address
+= insn_lengths
[uid
];
1255 if (insn_lengths
[uid
] != old_length
)
1256 something_changed
= 1;
1261 #endif /* CASE_VECTOR_SHORTEN_MODE */
1263 if (! (varying_length
[uid
]))
1265 if (NONJUMP_INSN_P (insn
)
1266 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1270 body
= PATTERN (insn
);
1271 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1273 rtx inner_insn
= XVECEXP (body
, 0, i
);
1274 int inner_uid
= INSN_UID (inner_insn
);
1276 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1278 insn_current_address
+= insn_lengths
[inner_uid
];
1282 insn_current_address
+= insn_lengths
[uid
];
1287 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1291 body
= PATTERN (insn
);
1293 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1295 rtx inner_insn
= XVECEXP (body
, 0, i
);
1296 int inner_uid
= INSN_UID (inner_insn
);
1299 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1301 /* insn_current_length returns 0 for insns with a
1302 non-varying length. */
1303 if (! varying_length
[inner_uid
])
1304 inner_length
= insn_lengths
[inner_uid
];
1306 inner_length
= insn_current_length (inner_insn
);
1308 if (inner_length
!= insn_lengths
[inner_uid
])
1310 insn_lengths
[inner_uid
] = inner_length
;
1311 something_changed
= 1;
1313 insn_current_address
+= insn_lengths
[inner_uid
];
1314 new_length
+= inner_length
;
1319 new_length
= insn_current_length (insn
);
1320 insn_current_address
+= new_length
;
1323 #ifdef ADJUST_INSN_LENGTH
1324 /* If needed, do any adjustment. */
1325 tmp_length
= new_length
;
1326 ADJUST_INSN_LENGTH (insn
, new_length
);
1327 insn_current_address
+= (new_length
- tmp_length
);
1330 if (new_length
!= insn_lengths
[uid
])
1332 insn_lengths
[uid
] = new_length
;
1333 something_changed
= 1;
1336 /* For a non-optimizing compile, do only a single pass. */
1341 free (varying_length
);
1343 #endif /* HAVE_ATTR_length */
1346 #ifdef HAVE_ATTR_length
1347 /* Given the body of an INSN known to be generated by an ASM statement, return
1348 the number of machine instructions likely to be generated for this insn.
1349 This is used to compute its length. */
1352 asm_insn_count (rtx body
)
1354 const char *template;
1357 if (GET_CODE (body
) == ASM_INPUT
)
1358 template = XSTR (body
, 0);
1360 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1362 for (; *template; template++)
1363 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1370 /* Output assembler code for the start of a function,
1371 and initialize some of the variables in this file
1372 for the new function. The label for the function and associated
1373 assembler pseudo-ops have already been output in `assemble_start_function'.
1375 FIRST is the first insn of the rtl for the function being compiled.
1376 FILE is the file to write assembler code to.
1377 OPTIMIZE is nonzero if we should eliminate redundant
1378 test and compare insns. */
1381 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1382 int optimize ATTRIBUTE_UNUSED
)
1386 this_is_asm_operands
= 0;
1388 last_filename
= locator_file (prologue_locator
);
1389 last_linenum
= locator_line (prologue_locator
);
1391 high_block_linenum
= high_function_linenum
= last_linenum
;
1393 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1395 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1396 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1397 dwarf2out_begin_prologue (0, NULL
);
1400 #ifdef LEAF_REG_REMAP
1401 if (current_function_uses_only_leaf_regs
)
1402 leaf_renumber_regs (first
);
1405 /* The Sun386i and perhaps other machines don't work right
1406 if the profiling code comes after the prologue. */
1407 #ifdef PROFILE_BEFORE_PROLOGUE
1408 if (current_function_profile
)
1409 profile_function (file
);
1410 #endif /* PROFILE_BEFORE_PROLOGUE */
1412 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1413 if (dwarf2out_do_frame ())
1414 dwarf2out_frame_debug (NULL_RTX
, false);
1417 /* If debugging, assign block numbers to all of the blocks in this
1421 reemit_insn_block_notes ();
1422 number_blocks (current_function_decl
);
1423 /* We never actually put out begin/end notes for the top-level
1424 block in the function. But, conceptually, that block is
1426 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1429 /* First output the function prologue: code to set up the stack frame. */
1430 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1432 /* If the machine represents the prologue as RTL, the profiling code must
1433 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1434 #ifdef HAVE_prologue
1435 if (! HAVE_prologue
)
1437 profile_after_prologue (file
);
1441 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1443 #ifndef PROFILE_BEFORE_PROLOGUE
1444 if (current_function_profile
)
1445 profile_function (file
);
1446 #endif /* not PROFILE_BEFORE_PROLOGUE */
1450 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1452 #ifndef NO_PROFILE_COUNTERS
1453 # define NO_PROFILE_COUNTERS 0
1455 #if defined(ASM_OUTPUT_REG_PUSH)
1456 int sval
= current_function_returns_struct
;
1457 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1458 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1459 int cxt
= cfun
->static_chain_decl
!= NULL
;
1461 #endif /* ASM_OUTPUT_REG_PUSH */
1463 if (! NO_PROFILE_COUNTERS
)
1465 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1466 switch_to_section (data_section
);
1467 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1468 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1469 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1472 switch_to_section (current_function_section ());
1474 #if defined(ASM_OUTPUT_REG_PUSH)
1475 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1476 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1479 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1481 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1483 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1486 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1491 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1493 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1495 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1497 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1500 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1505 #if defined(ASM_OUTPUT_REG_PUSH)
1506 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1507 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1511 /* Output assembler code for the end of a function.
1512 For clarity, args are same as those of `final_start_function'
1513 even though not all of them are needed. */
1516 final_end_function (void)
1520 (*debug_hooks
->end_function
) (high_function_linenum
);
1522 /* Finally, output the function epilogue:
1523 code to restore the stack frame and return to the caller. */
1524 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1526 /* And debug output. */
1527 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1529 #if defined (DWARF2_UNWIND_INFO)
1530 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1531 && dwarf2out_do_frame ())
1532 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1536 /* Output assembler code for some insns: all or part of a function.
1537 For description of args, see `final_start_function', above. */
1540 final (rtx first
, FILE *file
, int optimize
)
1546 last_ignored_compare
= 0;
1548 #ifdef SDB_DEBUGGING_INFO
1549 /* When producing SDB debugging info, delete troublesome line number
1550 notes from inlined functions in other files as well as duplicate
1551 line number notes. */
1552 if (write_symbols
== SDB_DEBUG
)
1555 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1556 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1559 #ifdef USE_MAPPED_LOCATION
1560 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1562 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1563 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1567 delete_insn (insn
); /* Use delete_note. */
1575 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1577 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1578 max_uid
= INSN_UID (insn
);
1580 /* If CC tracking across branches is enabled, record the insn which
1581 jumps to each branch only reached from one place. */
1582 if (optimize
&& JUMP_P (insn
))
1584 rtx lab
= JUMP_LABEL (insn
);
1585 if (lab
&& LABEL_NUSES (lab
) == 1)
1587 LABEL_REFS (lab
) = insn
;
1597 /* Output the insns. */
1598 for (insn
= first
; insn
;)
1600 #ifdef HAVE_ATTR_length
1601 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1603 /* This can be triggered by bugs elsewhere in the compiler if
1604 new insns are created after init_insn_lengths is called. */
1605 gcc_assert (NOTE_P (insn
));
1606 insn_current_address
= -1;
1609 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1610 #endif /* HAVE_ATTR_length */
1612 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1617 get_insn_template (int code
, rtx insn
)
1619 switch (insn_data
[code
].output_format
)
1621 case INSN_OUTPUT_FORMAT_SINGLE
:
1622 return insn_data
[code
].output
.single
;
1623 case INSN_OUTPUT_FORMAT_MULTI
:
1624 return insn_data
[code
].output
.multi
[which_alternative
];
1625 case INSN_OUTPUT_FORMAT_FUNCTION
:
1627 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1634 /* Emit the appropriate declaration for an alternate-entry-point
1635 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1636 LABEL_KIND != LABEL_NORMAL.
1638 The case fall-through in this function is intentional. */
1640 output_alternate_entry_point (FILE *file
, rtx insn
)
1642 const char *name
= LABEL_NAME (insn
);
1644 switch (LABEL_KIND (insn
))
1646 case LABEL_WEAK_ENTRY
:
1647 #ifdef ASM_WEAKEN_LABEL
1648 ASM_WEAKEN_LABEL (file
, name
);
1650 case LABEL_GLOBAL_ENTRY
:
1651 targetm
.asm_out
.globalize_label (file
, name
);
1652 case LABEL_STATIC_ENTRY
:
1653 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1654 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1656 ASM_OUTPUT_LABEL (file
, name
);
1665 /* The final scan for one insn, INSN.
1666 Args are same as in `final', except that INSN
1667 is the insn being scanned.
1668 Value returned is the next insn to be scanned.
1670 NOPEEPHOLES is the flag to disallow peephole processing (currently
1671 used for within delayed branch sequence output).
1673 SEEN is used to track the end of the prologue, for emitting
1674 debug information. We force the emission of a line note after
1675 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1676 at the beginning of the second basic block, whichever comes
1680 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1681 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1690 /* Ignore deleted insns. These can occur when we split insns (due to a
1691 template of "#") while not optimizing. */
1692 if (INSN_DELETED_P (insn
))
1693 return NEXT_INSN (insn
);
1695 switch (GET_CODE (insn
))
1698 switch (NOTE_LINE_NUMBER (insn
))
1700 case NOTE_INSN_DELETED
:
1703 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1704 in_cold_section_p
= !in_cold_section_p
;
1705 (*debug_hooks
->switch_text_section
) ();
1706 switch_to_section (current_function_section ());
1709 case NOTE_INSN_BASIC_BLOCK
:
1710 #ifdef TARGET_UNWIND_INFO
1711 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1715 fprintf (asm_out_file
, "\t%s basic block %d\n",
1716 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1718 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1720 *seen
|= SEEN_EMITTED
;
1721 force_source_line
= true;
1728 case NOTE_INSN_EH_REGION_BEG
:
1729 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1730 NOTE_EH_HANDLER (insn
));
1733 case NOTE_INSN_EH_REGION_END
:
1734 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1735 NOTE_EH_HANDLER (insn
));
1738 case NOTE_INSN_PROLOGUE_END
:
1739 targetm
.asm_out
.function_end_prologue (file
);
1740 profile_after_prologue (file
);
1742 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1744 *seen
|= SEEN_EMITTED
;
1745 force_source_line
= true;
1752 case NOTE_INSN_EPILOGUE_BEG
:
1753 targetm
.asm_out
.function_begin_epilogue (file
);
1756 case NOTE_INSN_FUNCTION_BEG
:
1758 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1760 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1762 *seen
|= SEEN_EMITTED
;
1763 force_source_line
= true;
1770 case NOTE_INSN_BLOCK_BEG
:
1771 if (debug_info_level
== DINFO_LEVEL_NORMAL
1772 || debug_info_level
== DINFO_LEVEL_VERBOSE
1773 || write_symbols
== DWARF2_DEBUG
1774 || write_symbols
== VMS_AND_DWARF2_DEBUG
1775 || write_symbols
== VMS_DEBUG
)
1777 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1781 high_block_linenum
= last_linenum
;
1783 /* Output debugging info about the symbol-block beginning. */
1784 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1786 /* Mark this block as output. */
1787 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1791 case NOTE_INSN_BLOCK_END
:
1792 if (debug_info_level
== DINFO_LEVEL_NORMAL
1793 || debug_info_level
== DINFO_LEVEL_VERBOSE
1794 || write_symbols
== DWARF2_DEBUG
1795 || write_symbols
== VMS_AND_DWARF2_DEBUG
1796 || write_symbols
== VMS_DEBUG
)
1798 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1802 /* End of a symbol-block. */
1804 gcc_assert (block_depth
>= 0);
1806 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1810 case NOTE_INSN_DELETED_LABEL
:
1811 /* Emit the label. We may have deleted the CODE_LABEL because
1812 the label could be proved to be unreachable, though still
1813 referenced (in the form of having its address taken. */
1814 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1817 case NOTE_INSN_VAR_LOCATION
:
1818 (*debug_hooks
->var_location
) (insn
);
1825 gcc_assert (NOTE_LINE_NUMBER (insn
) > 0);
1831 #if defined (DWARF2_UNWIND_INFO)
1832 if (dwarf2out_do_frame ())
1833 dwarf2out_frame_debug (insn
, false);
1838 /* The target port might emit labels in the output function for
1839 some insn, e.g. sh.c output_branchy_insn. */
1840 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1842 int align
= LABEL_TO_ALIGNMENT (insn
);
1843 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1844 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1847 if (align
&& NEXT_INSN (insn
))
1849 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1850 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1852 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1853 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1855 ASM_OUTPUT_ALIGN (file
, align
);
1862 /* If this label is reached from only one place, set the condition
1863 codes from the instruction just before the branch. */
1865 /* Disabled because some insns set cc_status in the C output code
1866 and NOTICE_UPDATE_CC alone can set incorrect status. */
1867 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1869 rtx jump
= LABEL_REFS (insn
);
1870 rtx barrier
= prev_nonnote_insn (insn
);
1872 /* If the LABEL_REFS field of this label has been set to point
1873 at a branch, the predecessor of the branch is a regular
1874 insn, and that branch is the only way to reach this label,
1875 set the condition codes based on the branch and its
1877 if (barrier
&& BARRIER_P (barrier
)
1878 && jump
&& JUMP_P (jump
)
1879 && (prev
= prev_nonnote_insn (jump
))
1880 && NONJUMP_INSN_P (prev
))
1882 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1883 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1888 if (LABEL_NAME (insn
))
1889 (*debug_hooks
->label
) (insn
);
1893 fputs (ASM_APP_OFF
, file
);
1897 next
= next_nonnote_insn (insn
);
1898 if (next
!= 0 && JUMP_P (next
))
1900 rtx nextbody
= PATTERN (next
);
1902 /* If this label is followed by a jump-table,
1903 make sure we put the label in the read-only section. Also
1904 possibly write the label and jump table together. */
1906 if (GET_CODE (nextbody
) == ADDR_VEC
1907 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1909 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1910 /* In this case, the case vector is being moved by the
1911 target, so don't output the label at all. Leave that
1912 to the back end macros. */
1914 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1918 switch_to_section (targetm
.asm_out
.function_rodata_section
1919 (current_function_decl
));
1921 #ifdef ADDR_VEC_ALIGN
1922 log_align
= ADDR_VEC_ALIGN (next
);
1924 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1926 ASM_OUTPUT_ALIGN (file
, log_align
);
1929 switch_to_section (current_function_section ());
1931 #ifdef ASM_OUTPUT_CASE_LABEL
1932 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1935 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1941 if (LABEL_ALT_ENTRY_P (insn
))
1942 output_alternate_entry_point (file
, insn
);
1944 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1949 rtx body
= PATTERN (insn
);
1950 int insn_code_number
;
1951 const char *template;
1953 #ifdef HAVE_conditional_execution
1954 /* Reset this early so it is correct for ASM statements. */
1955 current_insn_predicate
= NULL_RTX
;
1957 /* An INSN, JUMP_INSN or CALL_INSN.
1958 First check for special kinds that recog doesn't recognize. */
1960 if (GET_CODE (body
) == USE
/* These are just declarations. */
1961 || GET_CODE (body
) == CLOBBER
)
1966 /* If there is a REG_CC_SETTER note on this insn, it means that
1967 the setting of the condition code was done in the delay slot
1968 of the insn that branched here. So recover the cc status
1969 from the insn that set it. */
1971 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1974 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1975 cc_prev_status
= cc_status
;
1980 /* Detect insns that are really jump-tables
1981 and output them as such. */
1983 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1985 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1989 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1990 switch_to_section (targetm
.asm_out
.function_rodata_section
1991 (current_function_decl
));
1993 switch_to_section (current_function_section ());
1997 fputs (ASM_APP_OFF
, file
);
2001 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2002 if (GET_CODE (body
) == ADDR_VEC
)
2004 #ifdef ASM_OUTPUT_ADDR_VEC
2005 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2012 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2013 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2019 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2020 for (idx
= 0; idx
< vlen
; idx
++)
2022 if (GET_CODE (body
) == ADDR_VEC
)
2024 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2025 ASM_OUTPUT_ADDR_VEC_ELT
2026 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2033 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2034 ASM_OUTPUT_ADDR_DIFF_ELT
2037 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2038 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2044 #ifdef ASM_OUTPUT_CASE_END
2045 ASM_OUTPUT_CASE_END (file
,
2046 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2051 switch_to_section (current_function_section ());
2055 /* Output this line note if it is the first or the last line
2057 if (notice_source_line (insn
))
2059 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2062 if (GET_CODE (body
) == ASM_INPUT
)
2064 const char *string
= XSTR (body
, 0);
2066 /* There's no telling what that did to the condition codes. */
2075 fputs (ASM_APP_ON
, file
);
2078 #ifdef USE_MAPPED_LOCATION
2079 loc
= ASM_INPUT_SOURCE_LOCATION (body
);
2081 loc
.file
= ASM_INPUT_SOURCE_FILE (body
);
2082 loc
.line
= ASM_INPUT_SOURCE_LINE (body
);
2084 if (*loc
.file
&& loc
.line
)
2085 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2086 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2087 fprintf (asm_out_file
, "\t%s\n", string
);
2088 #if HAVE_AS_LINE_ZERO
2089 if (*loc
.file
&& loc
.line
)
2090 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2096 /* Detect `asm' construct with operands. */
2097 if (asm_noperands (body
) >= 0)
2099 unsigned int noperands
= asm_noperands (body
);
2100 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2104 /* There's no telling what that did to the condition codes. */
2107 /* Get out the operand values. */
2108 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2109 /* Inhibit dieing on what would otherwise be compiler bugs. */
2110 insn_noperands
= noperands
;
2111 this_is_asm_operands
= insn
;
2113 #ifdef FINAL_PRESCAN_INSN
2114 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2117 /* Output the insn using them. */
2122 fputs (ASM_APP_ON
, file
);
2125 if (loc
.file
&& loc
.line
)
2126 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2127 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2128 output_asm_insn (string
, ops
);
2129 #if HAVE_AS_LINE_ZERO
2130 if (loc
.file
&& loc
.line
)
2131 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2135 this_is_asm_operands
= 0;
2141 fputs (ASM_APP_OFF
, file
);
2145 if (GET_CODE (body
) == SEQUENCE
)
2147 /* A delayed-branch sequence */
2150 final_sequence
= body
;
2152 /* Record the delay slots' frame information before the branch.
2153 This is needed for delayed calls: see execute_cfa_program(). */
2154 #if defined (DWARF2_UNWIND_INFO)
2155 if (dwarf2out_do_frame ())
2156 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2157 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2160 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2161 force the restoration of a comparison that was previously
2162 thought unnecessary. If that happens, cancel this sequence
2163 and cause that insn to be restored. */
2165 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2166 if (next
!= XVECEXP (body
, 0, 1))
2172 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2174 rtx insn
= XVECEXP (body
, 0, i
);
2175 rtx next
= NEXT_INSN (insn
);
2176 /* We loop in case any instruction in a delay slot gets
2179 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2180 while (insn
!= next
);
2182 #ifdef DBR_OUTPUT_SEQEND
2183 DBR_OUTPUT_SEQEND (file
);
2187 /* If the insn requiring the delay slot was a CALL_INSN, the
2188 insns in the delay slot are actually executed before the
2189 called function. Hence we don't preserve any CC-setting
2190 actions in these insns and the CC must be marked as being
2191 clobbered by the function. */
2192 if (CALL_P (XVECEXP (body
, 0, 0)))
2199 /* We have a real machine instruction as rtl. */
2201 body
= PATTERN (insn
);
2204 set
= single_set (insn
);
2206 /* Check for redundant test and compare instructions
2207 (when the condition codes are already set up as desired).
2208 This is done only when optimizing; if not optimizing,
2209 it should be possible for the user to alter a variable
2210 with the debugger in between statements
2211 and the next statement should reexamine the variable
2212 to compute the condition codes. */
2217 && GET_CODE (SET_DEST (set
)) == CC0
2218 && insn
!= last_ignored_compare
)
2220 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2221 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2222 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2224 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2225 XEXP (SET_SRC (set
), 0)
2226 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2227 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2228 XEXP (SET_SRC (set
), 1)
2229 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2231 if ((cc_status
.value1
!= 0
2232 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2233 || (cc_status
.value2
!= 0
2234 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2236 /* Don't delete insn if it has an addressing side-effect. */
2237 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2238 /* or if anything in it is volatile. */
2239 && ! volatile_refs_p (PATTERN (insn
)))
2241 /* We don't really delete the insn; just ignore it. */
2242 last_ignored_compare
= insn
;
2251 /* If this is a conditional branch, maybe modify it
2252 if the cc's are in a nonstandard state
2253 so that it accomplishes the same thing that it would
2254 do straightforwardly if the cc's were set up normally. */
2256 if (cc_status
.flags
!= 0
2258 && GET_CODE (body
) == SET
2259 && SET_DEST (body
) == pc_rtx
2260 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2261 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2262 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2264 /* This function may alter the contents of its argument
2265 and clear some of the cc_status.flags bits.
2266 It may also return 1 meaning condition now always true
2267 or -1 meaning condition now always false
2268 or 2 meaning condition nontrivial but altered. */
2269 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2270 /* If condition now has fixed value, replace the IF_THEN_ELSE
2271 with its then-operand or its else-operand. */
2273 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2275 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2277 /* The jump is now either unconditional or a no-op.
2278 If it has become a no-op, don't try to output it.
2279 (It would not be recognized.) */
2280 if (SET_SRC (body
) == pc_rtx
)
2285 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2286 /* Replace (set (pc) (return)) with (return). */
2287 PATTERN (insn
) = body
= SET_SRC (body
);
2289 /* Rerecognize the instruction if it has changed. */
2291 INSN_CODE (insn
) = -1;
2294 /* Make same adjustments to instructions that examine the
2295 condition codes without jumping and instructions that
2296 handle conditional moves (if this machine has either one). */
2298 if (cc_status
.flags
!= 0
2301 rtx cond_rtx
, then_rtx
, else_rtx
;
2304 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2306 cond_rtx
= XEXP (SET_SRC (set
), 0);
2307 then_rtx
= XEXP (SET_SRC (set
), 1);
2308 else_rtx
= XEXP (SET_SRC (set
), 2);
2312 cond_rtx
= SET_SRC (set
);
2313 then_rtx
= const_true_rtx
;
2314 else_rtx
= const0_rtx
;
2317 switch (GET_CODE (cond_rtx
))
2331 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2333 result
= alter_cond (cond_rtx
);
2335 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2336 else if (result
== -1)
2337 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2338 else if (result
== 2)
2339 INSN_CODE (insn
) = -1;
2340 if (SET_DEST (set
) == SET_SRC (set
))
2352 #ifdef HAVE_peephole
2353 /* Do machine-specific peephole optimizations if desired. */
2355 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2357 rtx next
= peephole (insn
);
2358 /* When peepholing, if there were notes within the peephole,
2359 emit them before the peephole. */
2360 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2362 rtx note
, prev
= PREV_INSN (insn
);
2364 for (note
= NEXT_INSN (insn
); note
!= next
;
2365 note
= NEXT_INSN (note
))
2366 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2368 /* Put the notes in the proper position for a later
2369 rescan. For example, the SH target can do this
2370 when generating a far jump in a delayed branch
2372 note
= NEXT_INSN (insn
);
2373 PREV_INSN (note
) = prev
;
2374 NEXT_INSN (prev
) = note
;
2375 NEXT_INSN (PREV_INSN (next
)) = insn
;
2376 PREV_INSN (insn
) = PREV_INSN (next
);
2377 NEXT_INSN (insn
) = next
;
2378 PREV_INSN (next
) = insn
;
2381 /* PEEPHOLE might have changed this. */
2382 body
= PATTERN (insn
);
2386 /* Try to recognize the instruction.
2387 If successful, verify that the operands satisfy the
2388 constraints for the instruction. Crash if they don't,
2389 since `reload' should have changed them so that they do. */
2391 insn_code_number
= recog_memoized (insn
);
2392 cleanup_subreg_operands (insn
);
2394 /* Dump the insn in the assembly for debugging. */
2395 if (flag_dump_rtl_in_asm
)
2397 print_rtx_head
= ASM_COMMENT_START
;
2398 print_rtl_single (asm_out_file
, insn
);
2399 print_rtx_head
= "";
2402 if (! constrain_operands_cached (1))
2403 fatal_insn_not_found (insn
);
2405 /* Some target machines need to prescan each insn before
2408 #ifdef FINAL_PRESCAN_INSN
2409 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2412 #ifdef HAVE_conditional_execution
2413 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2414 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2418 cc_prev_status
= cc_status
;
2420 /* Update `cc_status' for this instruction.
2421 The instruction's output routine may change it further.
2422 If the output routine for a jump insn needs to depend
2423 on the cc status, it should look at cc_prev_status. */
2425 NOTICE_UPDATE_CC (body
, insn
);
2428 current_output_insn
= debug_insn
= insn
;
2430 #if defined (DWARF2_UNWIND_INFO)
2431 if (CALL_P (insn
) && dwarf2out_do_frame ())
2432 dwarf2out_frame_debug (insn
, false);
2435 /* Find the proper template for this insn. */
2436 template = get_insn_template (insn_code_number
, insn
);
2438 /* If the C code returns 0, it means that it is a jump insn
2439 which follows a deleted test insn, and that test insn
2440 needs to be reinserted. */
2445 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2447 /* We have already processed the notes between the setter and
2448 the user. Make sure we don't process them again, this is
2449 particularly important if one of the notes is a block
2450 scope note or an EH note. */
2452 prev
!= last_ignored_compare
;
2453 prev
= PREV_INSN (prev
))
2456 delete_insn (prev
); /* Use delete_note. */
2462 /* If the template is the string "#", it means that this insn must
2464 if (template[0] == '#' && template[1] == '\0')
2466 rtx
new = try_split (body
, insn
, 0);
2468 /* If we didn't split the insn, go away. */
2469 if (new == insn
&& PATTERN (new) == body
)
2470 fatal_insn ("could not split insn", insn
);
2472 #ifdef HAVE_ATTR_length
2473 /* This instruction should have been split in shorten_branches,
2474 to ensure that we would have valid length info for the
2482 #ifdef TARGET_UNWIND_INFO
2483 /* ??? This will put the directives in the wrong place if
2484 get_insn_template outputs assembly directly. However calling it
2485 before get_insn_template breaks if the insns is split. */
2486 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2489 /* Output assembler code from the template. */
2490 output_asm_insn (template, recog_data
.operand
);
2492 /* If necessary, report the effect that the instruction has on
2493 the unwind info. We've already done this for delay slots
2494 and call instructions. */
2495 #if defined (DWARF2_UNWIND_INFO)
2496 if (final_sequence
== 0
2497 #if !defined (HAVE_prologue)
2498 && !ACCUMULATE_OUTGOING_ARGS
2500 && dwarf2out_do_frame ())
2501 dwarf2out_frame_debug (insn
, true);
2504 current_output_insn
= debug_insn
= 0;
2507 return NEXT_INSN (insn
);
2510 /* Return whether a source line note needs to be emitted before INSN. */
2513 notice_source_line (rtx insn
)
2515 const char *filename
= insn_file (insn
);
2516 int linenum
= insn_line (insn
);
2519 && (force_source_line
2520 || filename
!= last_filename
2521 || last_linenum
!= linenum
))
2523 force_source_line
= false;
2524 last_filename
= filename
;
2525 last_linenum
= linenum
;
2526 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2527 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2533 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2534 directly to the desired hard register. */
2537 cleanup_subreg_operands (rtx insn
)
2540 extract_insn_cached (insn
);
2541 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2543 /* The following test cannot use recog_data.operand when testing
2544 for a SUBREG: the underlying object might have been changed
2545 already if we are inside a match_operator expression that
2546 matches the else clause. Instead we test the underlying
2547 expression directly. */
2548 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2549 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2550 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2551 || GET_CODE (recog_data
.operand
[i
]) == MULT
2552 || MEM_P (recog_data
.operand
[i
]))
2553 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2556 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2558 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2559 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2560 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2561 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2562 || MEM_P (*recog_data
.dup_loc
[i
]))
2563 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2567 /* If X is a SUBREG, replace it with a REG or a MEM,
2568 based on the thing it is a subreg of. */
2571 alter_subreg (rtx
*xp
)
2574 rtx y
= SUBREG_REG (x
);
2576 /* simplify_subreg does not remove subreg from volatile references.
2577 We are required to. */
2580 int offset
= SUBREG_BYTE (x
);
2582 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2583 contains 0 instead of the proper offset. See simplify_subreg. */
2585 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2587 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2588 - GET_MODE_SIZE (GET_MODE (x
));
2589 if (WORDS_BIG_ENDIAN
)
2590 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2591 if (BYTES_BIG_ENDIAN
)
2592 offset
+= difference
% UNITS_PER_WORD
;
2595 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2599 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2606 /* Simplify_subreg can't handle some REG cases, but we have to. */
2607 unsigned int regno
= subreg_regno (x
);
2608 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2615 /* Do alter_subreg on all the SUBREGs contained in X. */
2618 walk_alter_subreg (rtx
*xp
)
2621 switch (GET_CODE (x
))
2626 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2627 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2632 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2636 return alter_subreg (xp
);
2647 /* Given BODY, the body of a jump instruction, alter the jump condition
2648 as required by the bits that are set in cc_status.flags.
2649 Not all of the bits there can be handled at this level in all cases.
2651 The value is normally 0.
2652 1 means that the condition has become always true.
2653 -1 means that the condition has become always false.
2654 2 means that COND has been altered. */
2657 alter_cond (rtx cond
)
2661 if (cc_status
.flags
& CC_REVERSED
)
2664 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2667 if (cc_status
.flags
& CC_INVERTED
)
2670 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2673 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2674 switch (GET_CODE (cond
))
2679 /* Jump becomes unconditional. */
2685 /* Jump becomes no-op. */
2689 PUT_CODE (cond
, EQ
);
2694 PUT_CODE (cond
, NE
);
2702 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2703 switch (GET_CODE (cond
))
2707 /* Jump becomes unconditional. */
2712 /* Jump becomes no-op. */
2717 PUT_CODE (cond
, EQ
);
2723 PUT_CODE (cond
, NE
);
2731 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2732 switch (GET_CODE (cond
))
2735 /* Jump becomes unconditional. */
2739 PUT_CODE (cond
, EQ
);
2744 PUT_CODE (cond
, NE
);
2749 /* Jump becomes no-op. */
2756 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2757 switch (GET_CODE (cond
))
2763 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2768 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2773 if (cc_status
.flags
& CC_NOT_SIGNED
)
2774 /* The flags are valid if signed condition operators are converted
2776 switch (GET_CODE (cond
))
2779 PUT_CODE (cond
, LEU
);
2784 PUT_CODE (cond
, LTU
);
2789 PUT_CODE (cond
, GTU
);
2794 PUT_CODE (cond
, GEU
);
2806 /* Report inconsistency between the assembler template and the operands.
2807 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2810 output_operand_lossage (const char *cmsgid
, ...)
2814 const char *pfx_str
;
2817 va_start (ap
, cmsgid
);
2819 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2820 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2821 vasprintf (&new_message
, fmt_string
, ap
);
2823 if (this_is_asm_operands
)
2824 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2826 internal_error ("%s", new_message
);
2833 /* Output of assembler code from a template, and its subroutines. */
2835 /* Annotate the assembly with a comment describing the pattern and
2836 alternative used. */
2839 output_asm_name (void)
2843 int num
= INSN_CODE (debug_insn
);
2844 fprintf (asm_out_file
, "\t%s %d\t%s",
2845 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2846 insn_data
[num
].name
);
2847 if (insn_data
[num
].n_alternatives
> 1)
2848 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2849 #ifdef HAVE_ATTR_length
2850 fprintf (asm_out_file
, "\t[length = %d]",
2851 get_attr_length (debug_insn
));
2853 /* Clear this so only the first assembler insn
2854 of any rtl insn will get the special comment for -dp. */
2859 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2860 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2861 corresponds to the address of the object and 0 if to the object. */
2864 get_mem_expr_from_op (rtx op
, int *paddressp
)
2872 return REG_EXPR (op
);
2873 else if (!MEM_P (op
))
2876 if (MEM_EXPR (op
) != 0)
2877 return MEM_EXPR (op
);
2879 /* Otherwise we have an address, so indicate it and look at the address. */
2883 /* First check if we have a decl for the address, then look at the right side
2884 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2885 But don't allow the address to itself be indirect. */
2886 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2888 else if (GET_CODE (op
) == PLUS
2889 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2892 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2893 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2896 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2897 return inner_addressp
? 0 : expr
;
2900 /* Output operand names for assembler instructions. OPERANDS is the
2901 operand vector, OPORDER is the order to write the operands, and NOPS
2902 is the number of operands to write. */
2905 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2910 for (i
= 0; i
< nops
; i
++)
2913 rtx op
= operands
[oporder
[i
]];
2914 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2916 fprintf (asm_out_file
, "%c%s",
2917 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2921 fprintf (asm_out_file
, "%s",
2922 addressp
? "*" : "");
2923 print_mem_expr (asm_out_file
, expr
);
2926 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2927 && ORIGINAL_REGNO (op
) != REGNO (op
))
2928 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2932 /* Output text from TEMPLATE to the assembler output file,
2933 obeying %-directions to substitute operands taken from
2934 the vector OPERANDS.
2936 %N (for N a digit) means print operand N in usual manner.
2937 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2938 and print the label name with no punctuation.
2939 %cN means require operand N to be a constant
2940 and print the constant expression with no punctuation.
2941 %aN means expect operand N to be a memory address
2942 (not a memory reference!) and print a reference
2944 %nN means expect operand N to be a constant
2945 and print a constant expression for minus the value
2946 of the operand, with no other punctuation. */
2949 output_asm_insn (const char *template, rtx
*operands
)
2953 #ifdef ASSEMBLER_DIALECT
2956 int oporder
[MAX_RECOG_OPERANDS
];
2957 char opoutput
[MAX_RECOG_OPERANDS
];
2960 /* An insn may return a null string template
2961 in a case where no assembler code is needed. */
2965 memset (opoutput
, 0, sizeof opoutput
);
2967 putc ('\t', asm_out_file
);
2969 #ifdef ASM_OUTPUT_OPCODE
2970 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2977 if (flag_verbose_asm
)
2978 output_asm_operand_names (operands
, oporder
, ops
);
2979 if (flag_print_asm_name
)
2983 memset (opoutput
, 0, sizeof opoutput
);
2985 putc (c
, asm_out_file
);
2986 #ifdef ASM_OUTPUT_OPCODE
2987 while ((c
= *p
) == '\t')
2989 putc (c
, asm_out_file
);
2992 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2996 #ifdef ASSEMBLER_DIALECT
3002 output_operand_lossage ("nested assembly dialect alternatives");
3006 /* If we want the first dialect, do nothing. Otherwise, skip
3007 DIALECT_NUMBER of strings ending with '|'. */
3008 for (i
= 0; i
< dialect_number
; i
++)
3010 while (*p
&& *p
!= '}' && *p
++ != '|')
3019 output_operand_lossage ("unterminated assembly dialect alternative");
3026 /* Skip to close brace. */
3031 output_operand_lossage ("unterminated assembly dialect alternative");
3035 while (*p
++ != '}');
3039 putc (c
, asm_out_file
);
3044 putc (c
, asm_out_file
);
3050 /* %% outputs a single %. */
3054 putc (c
, asm_out_file
);
3056 /* %= outputs a number which is unique to each insn in the entire
3057 compilation. This is useful for making local labels that are
3058 referred to more than once in a given insn. */
3062 fprintf (asm_out_file
, "%d", insn_counter
);
3064 /* % followed by a letter and some digits
3065 outputs an operand in a special way depending on the letter.
3066 Letters `acln' are implemented directly.
3067 Other letters are passed to `output_operand' so that
3068 the PRINT_OPERAND macro can define them. */
3069 else if (ISALPHA (*p
))
3072 unsigned long opnum
;
3075 opnum
= strtoul (p
, &endptr
, 10);
3078 output_operand_lossage ("operand number missing "
3080 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3081 output_operand_lossage ("operand number out of range");
3082 else if (letter
== 'l')
3083 output_asm_label (operands
[opnum
]);
3084 else if (letter
== 'a')
3085 output_address (operands
[opnum
]);
3086 else if (letter
== 'c')
3088 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3089 output_addr_const (asm_out_file
, operands
[opnum
]);
3091 output_operand (operands
[opnum
], 'c');
3093 else if (letter
== 'n')
3095 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3096 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3097 - INTVAL (operands
[opnum
]));
3100 putc ('-', asm_out_file
);
3101 output_addr_const (asm_out_file
, operands
[opnum
]);
3105 output_operand (operands
[opnum
], letter
);
3107 if (!opoutput
[opnum
])
3108 oporder
[ops
++] = opnum
;
3109 opoutput
[opnum
] = 1;
3114 /* % followed by a digit outputs an operand the default way. */
3115 else if (ISDIGIT (*p
))
3117 unsigned long opnum
;
3120 opnum
= strtoul (p
, &endptr
, 10);
3121 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3122 output_operand_lossage ("operand number out of range");
3124 output_operand (operands
[opnum
], 0);
3126 if (!opoutput
[opnum
])
3127 oporder
[ops
++] = opnum
;
3128 opoutput
[opnum
] = 1;
3133 /* % followed by punctuation: output something for that
3134 punctuation character alone, with no operand.
3135 The PRINT_OPERAND macro decides what is actually done. */
3136 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3137 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3138 output_operand (NULL_RTX
, *p
++);
3141 output_operand_lossage ("invalid %%-code");
3145 putc (c
, asm_out_file
);
3148 /* Write out the variable names for operands, if we know them. */
3149 if (flag_verbose_asm
)
3150 output_asm_operand_names (operands
, oporder
, ops
);
3151 if (flag_print_asm_name
)
3154 putc ('\n', asm_out_file
);
3157 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3160 output_asm_label (rtx x
)
3164 if (GET_CODE (x
) == LABEL_REF
)
3168 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3169 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3171 output_operand_lossage ("'%%l' operand isn't a label");
3173 assemble_name (asm_out_file
, buf
);
3176 /* Print operand X using machine-dependent assembler syntax.
3177 The macro PRINT_OPERAND is defined just to control this function.
3178 CODE is a non-digit that preceded the operand-number in the % spec,
3179 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3180 between the % and the digits.
3181 When CODE is a non-letter, X is 0.
3183 The meanings of the letters are machine-dependent and controlled
3184 by PRINT_OPERAND. */
3187 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3189 if (x
&& GET_CODE (x
) == SUBREG
)
3190 x
= alter_subreg (&x
);
3192 /* X must not be a pseudo reg. */
3193 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3195 PRINT_OPERAND (asm_out_file
, x
, code
);
3198 /* Print a memory reference operand for address X
3199 using machine-dependent assembler syntax.
3200 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3203 output_address (rtx x
)
3205 walk_alter_subreg (&x
);
3206 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3209 /* Print an integer constant expression in assembler syntax.
3210 Addition and subtraction are the only arithmetic
3211 that may appear in these expressions. */
3214 output_addr_const (FILE *file
, rtx x
)
3219 switch (GET_CODE (x
))
3226 if (SYMBOL_REF_DECL (x
))
3227 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3228 #ifdef ASM_OUTPUT_SYMBOL_REF
3229 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3231 assemble_name (file
, XSTR (x
, 0));
3239 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3240 #ifdef ASM_OUTPUT_LABEL_REF
3241 ASM_OUTPUT_LABEL_REF (file
, buf
);
3243 assemble_name (file
, buf
);
3248 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3252 /* This used to output parentheses around the expression,
3253 but that does not work on the 386 (either ATT or BSD assembler). */
3254 output_addr_const (file
, XEXP (x
, 0));
3258 if (GET_MODE (x
) == VOIDmode
)
3260 /* We can use %d if the number is one word and positive. */
3261 if (CONST_DOUBLE_HIGH (x
))
3262 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3263 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3264 else if (CONST_DOUBLE_LOW (x
) < 0)
3265 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3267 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3270 /* We can't handle floating point constants;
3271 PRINT_OPERAND must handle them. */
3272 output_operand_lossage ("floating constant misused");
3276 /* Some assemblers need integer constants to appear last (eg masm). */
3277 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3279 output_addr_const (file
, XEXP (x
, 1));
3280 if (INTVAL (XEXP (x
, 0)) >= 0)
3281 fprintf (file
, "+");
3282 output_addr_const (file
, XEXP (x
, 0));
3286 output_addr_const (file
, XEXP (x
, 0));
3287 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3288 || INTVAL (XEXP (x
, 1)) >= 0)
3289 fprintf (file
, "+");
3290 output_addr_const (file
, XEXP (x
, 1));
3295 /* Avoid outputting things like x-x or x+5-x,
3296 since some assemblers can't handle that. */
3297 x
= simplify_subtraction (x
);
3298 if (GET_CODE (x
) != MINUS
)
3301 output_addr_const (file
, XEXP (x
, 0));
3302 fprintf (file
, "-");
3303 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3304 || GET_CODE (XEXP (x
, 1)) == PC
3305 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3306 output_addr_const (file
, XEXP (x
, 1));
3309 fputs (targetm
.asm_out
.open_paren
, file
);
3310 output_addr_const (file
, XEXP (x
, 1));
3311 fputs (targetm
.asm_out
.close_paren
, file
);
3318 output_addr_const (file
, XEXP (x
, 0));
3322 #ifdef OUTPUT_ADDR_CONST_EXTRA
3323 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3328 output_operand_lossage ("invalid expression as operand");
3332 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3333 %R prints the value of REGISTER_PREFIX.
3334 %L prints the value of LOCAL_LABEL_PREFIX.
3335 %U prints the value of USER_LABEL_PREFIX.
3336 %I prints the value of IMMEDIATE_PREFIX.
3337 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3338 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3340 We handle alternate assembler dialects here, just like output_asm_insn. */
3343 asm_fprintf (FILE *file
, const char *p
, ...)
3349 va_start (argptr
, p
);
3356 #ifdef ASSEMBLER_DIALECT
3361 /* If we want the first dialect, do nothing. Otherwise, skip
3362 DIALECT_NUMBER of strings ending with '|'. */
3363 for (i
= 0; i
< dialect_number
; i
++)
3365 while (*p
&& *p
++ != '|')
3375 /* Skip to close brace. */
3376 while (*p
&& *p
++ != '}')
3387 while (strchr ("-+ #0", c
))
3392 while (ISDIGIT (c
) || c
== '.')
3403 case 'd': case 'i': case 'u':
3404 case 'x': case 'X': case 'o':
3408 fprintf (file
, buf
, va_arg (argptr
, int));
3412 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3413 'o' cases, but we do not check for those cases. It
3414 means that the value is a HOST_WIDE_INT, which may be
3415 either `long' or `long long'. */
3416 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3417 q
+= strlen (HOST_WIDE_INT_PRINT
);
3420 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3425 #ifdef HAVE_LONG_LONG
3431 fprintf (file
, buf
, va_arg (argptr
, long long));
3438 fprintf (file
, buf
, va_arg (argptr
, long));
3446 fprintf (file
, buf
, va_arg (argptr
, char *));
3450 #ifdef ASM_OUTPUT_OPCODE
3451 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3456 #ifdef REGISTER_PREFIX
3457 fprintf (file
, "%s", REGISTER_PREFIX
);
3462 #ifdef IMMEDIATE_PREFIX
3463 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3468 #ifdef LOCAL_LABEL_PREFIX
3469 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3474 fputs (user_label_prefix
, file
);
3477 #ifdef ASM_FPRINTF_EXTENSIONS
3478 /* Uppercase letters are reserved for general use by asm_fprintf
3479 and so are not available to target specific code. In order to
3480 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3481 they are defined here. As they get turned into real extensions
3482 to asm_fprintf they should be removed from this list. */
3483 case 'A': case 'B': case 'C': case 'D': case 'E':
3484 case 'F': case 'G': case 'H': case 'J': case 'K':
3485 case 'M': case 'N': case 'P': case 'Q': case 'S':
3486 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3489 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3502 /* Split up a CONST_DOUBLE or integer constant rtx
3503 into two rtx's for single words,
3504 storing in *FIRST the word that comes first in memory in the target
3505 and in *SECOND the other. */
3508 split_double (rtx value
, rtx
*first
, rtx
*second
)
3510 if (GET_CODE (value
) == CONST_INT
)
3512 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3514 /* In this case the CONST_INT holds both target words.
3515 Extract the bits from it into two word-sized pieces.
3516 Sign extend each half to HOST_WIDE_INT. */
3517 unsigned HOST_WIDE_INT low
, high
;
3518 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3520 /* Set sign_bit to the most significant bit of a word. */
3522 sign_bit
<<= BITS_PER_WORD
- 1;
3524 /* Set mask so that all bits of the word are set. We could
3525 have used 1 << BITS_PER_WORD instead of basing the
3526 calculation on sign_bit. However, on machines where
3527 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3528 compiler warning, even though the code would never be
3530 mask
= sign_bit
<< 1;
3533 /* Set sign_extend as any remaining bits. */
3534 sign_extend
= ~mask
;
3536 /* Pick the lower word and sign-extend it. */
3537 low
= INTVAL (value
);
3542 /* Pick the higher word, shifted to the least significant
3543 bits, and sign-extend it. */
3544 high
= INTVAL (value
);
3545 high
>>= BITS_PER_WORD
- 1;
3548 if (high
& sign_bit
)
3549 high
|= sign_extend
;
3551 /* Store the words in the target machine order. */
3552 if (WORDS_BIG_ENDIAN
)
3554 *first
= GEN_INT (high
);
3555 *second
= GEN_INT (low
);
3559 *first
= GEN_INT (low
);
3560 *second
= GEN_INT (high
);
3565 /* The rule for using CONST_INT for a wider mode
3566 is that we regard the value as signed.
3567 So sign-extend it. */
3568 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3569 if (WORDS_BIG_ENDIAN
)
3581 else if (GET_CODE (value
) != CONST_DOUBLE
)
3583 if (WORDS_BIG_ENDIAN
)
3585 *first
= const0_rtx
;
3591 *second
= const0_rtx
;
3594 else if (GET_MODE (value
) == VOIDmode
3595 /* This is the old way we did CONST_DOUBLE integers. */
3596 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3598 /* In an integer, the words are defined as most and least significant.
3599 So order them by the target's convention. */
3600 if (WORDS_BIG_ENDIAN
)
3602 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3603 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3607 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3608 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3615 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3617 /* Note, this converts the REAL_VALUE_TYPE to the target's
3618 format, splits up the floating point double and outputs
3619 exactly 32 bits of it into each of l[0] and l[1] --
3620 not necessarily BITS_PER_WORD bits. */
3621 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3623 /* If 32 bits is an entire word for the target, but not for the host,
3624 then sign-extend on the host so that the number will look the same
3625 way on the host that it would on the target. See for instance
3626 simplify_unary_operation. The #if is needed to avoid compiler
3629 #if HOST_BITS_PER_LONG > 32
3630 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3632 if (l
[0] & ((long) 1 << 31))
3633 l
[0] |= ((long) (-1) << 32);
3634 if (l
[1] & ((long) 1 << 31))
3635 l
[1] |= ((long) (-1) << 32);
3639 *first
= GEN_INT (l
[0]);
3640 *second
= GEN_INT (l
[1]);
3644 /* Return nonzero if this function has no function calls. */
3647 leaf_function_p (void)
3652 if (current_function_profile
|| profile_arc_flag
)
3655 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3658 && ! SIBLING_CALL_P (insn
))
3660 if (NONJUMP_INSN_P (insn
)
3661 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3662 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3663 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3666 for (link
= current_function_epilogue_delay_list
;
3668 link
= XEXP (link
, 1))
3670 insn
= XEXP (link
, 0);
3673 && ! SIBLING_CALL_P (insn
))
3675 if (NONJUMP_INSN_P (insn
)
3676 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3677 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3678 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3685 /* Return 1 if branch is a forward branch.
3686 Uses insn_shuid array, so it works only in the final pass. May be used by
3687 output templates to customary add branch prediction hints.
3690 final_forward_branch_p (rtx insn
)
3692 int insn_id
, label_id
;
3694 gcc_assert (uid_shuid
);
3695 insn_id
= INSN_SHUID (insn
);
3696 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3697 /* We've hit some insns that does not have id information available. */
3698 gcc_assert (insn_id
&& label_id
);
3699 return insn_id
< label_id
;
3702 /* On some machines, a function with no call insns
3703 can run faster if it doesn't create its own register window.
3704 When output, the leaf function should use only the "output"
3705 registers. Ordinarily, the function would be compiled to use
3706 the "input" registers to find its arguments; it is a candidate
3707 for leaf treatment if it uses only the "input" registers.
3708 Leaf function treatment means renumbering so the function
3709 uses the "output" registers instead. */
3711 #ifdef LEAF_REGISTERS
3713 /* Return 1 if this function uses only the registers that can be
3714 safely renumbered. */
3717 only_leaf_regs_used (void)
3720 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3722 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3723 if ((regs_ever_live
[i
] || global_regs
[i
])
3724 && ! permitted_reg_in_leaf_functions
[i
])
3727 if (current_function_uses_pic_offset_table
3728 && pic_offset_table_rtx
!= 0
3729 && REG_P (pic_offset_table_rtx
)
3730 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3736 /* Scan all instructions and renumber all registers into those
3737 available in leaf functions. */
3740 leaf_renumber_regs (rtx first
)
3744 /* Renumber only the actual patterns.
3745 The reg-notes can contain frame pointer refs,
3746 and renumbering them could crash, and should not be needed. */
3747 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3749 leaf_renumber_regs_insn (PATTERN (insn
));
3750 for (insn
= current_function_epilogue_delay_list
;
3752 insn
= XEXP (insn
, 1))
3753 if (INSN_P (XEXP (insn
, 0)))
3754 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3757 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3758 available in leaf functions. */
3761 leaf_renumber_regs_insn (rtx in_rtx
)
3764 const char *format_ptr
;
3769 /* Renumber all input-registers into output-registers.
3770 renumbered_regs would be 1 for an output-register;
3777 /* Don't renumber the same reg twice. */
3781 newreg
= REGNO (in_rtx
);
3782 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3783 to reach here as part of a REG_NOTE. */
3784 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3789 newreg
= LEAF_REG_REMAP (newreg
);
3790 gcc_assert (newreg
>= 0);
3791 regs_ever_live
[REGNO (in_rtx
)] = 0;
3792 regs_ever_live
[newreg
] = 1;
3793 REGNO (in_rtx
) = newreg
;
3797 if (INSN_P (in_rtx
))
3799 /* Inside a SEQUENCE, we find insns.
3800 Renumber just the patterns of these insns,
3801 just as we do for the top-level insns. */
3802 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3806 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3808 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3809 switch (*format_ptr
++)
3812 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3816 if (NULL
!= XVEC (in_rtx
, i
))
3818 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3819 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3839 /* When -gused is used, emit debug info for only used symbols. But in
3840 addition to the standard intercepted debug_hooks there are some direct
3841 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3842 Those routines may also be called from a higher level intercepted routine. So
3843 to prevent recording data for an inner call to one of these for an intercept,
3844 we maintain an intercept nesting counter (debug_nesting). We only save the
3845 intercepted arguments if the nesting is 1. */
3846 int debug_nesting
= 0;
3848 static tree
*symbol_queue
;
3849 int symbol_queue_index
= 0;
3850 static int symbol_queue_size
= 0;
3852 /* Generate the symbols for any queued up type symbols we encountered
3853 while generating the type info for some originally used symbol.
3854 This might generate additional entries in the queue. Only when
3855 the nesting depth goes to 0 is this routine called. */
3858 debug_flush_symbol_queue (void)
3862 /* Make sure that additionally queued items are not flushed
3867 for (i
= 0; i
< symbol_queue_index
; ++i
)
3869 /* If we pushed queued symbols then such symbols must be
3870 output no matter what anyone else says. Specifically,
3871 we need to make sure dbxout_symbol() thinks the symbol was
3872 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3873 which may be set for outside reasons. */
3874 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3875 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3876 TREE_USED (symbol_queue
[i
]) = 1;
3877 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3879 #ifdef DBX_DEBUGGING_INFO
3880 dbxout_symbol (symbol_queue
[i
], 0);
3883 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3884 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3887 symbol_queue_index
= 0;
3891 /* Queue a type symbol needed as part of the definition of a decl
3892 symbol. These symbols are generated when debug_flush_symbol_queue()
3896 debug_queue_symbol (tree decl
)
3898 if (symbol_queue_index
>= symbol_queue_size
)
3900 symbol_queue_size
+= 10;
3901 symbol_queue
= xrealloc (symbol_queue
,
3902 symbol_queue_size
* sizeof (tree
));
3905 symbol_queue
[symbol_queue_index
++] = decl
;
3908 /* Free symbol queue. */
3910 debug_free_queue (void)
3914 free (symbol_queue
);
3915 symbol_queue
= NULL
;
3916 symbol_queue_size
= 0;
3920 /* Turn the RTL into assembly. */
3922 rest_of_handle_final (void)
3927 /* Get the function's name, as described by its RTL. This may be
3928 different from the DECL_NAME name used in the source file. */
3930 x
= DECL_RTL (current_function_decl
);
3931 gcc_assert (MEM_P (x
));
3933 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
3934 fnname
= XSTR (x
, 0);
3936 assemble_start_function (current_function_decl
, fnname
);
3937 final_start_function (get_insns (), asm_out_file
, optimize
);
3938 final (get_insns (), asm_out_file
, optimize
);
3939 final_end_function ();
3941 #ifdef TARGET_UNWIND_INFO
3942 /* ??? The IA-64 ".handlerdata" directive must be issued before
3943 the ".endp" directive that closes the procedure descriptor. */
3944 output_function_exception_table (fnname
);
3947 assemble_end_function (current_function_decl
, fnname
);
3949 #ifndef TARGET_UNWIND_INFO
3950 /* Otherwise, it feels unclean to switch sections in the middle. */
3951 output_function_exception_table (fnname
);
3954 user_defined_section_attribute
= false;
3957 fflush (asm_out_file
);
3959 /* Release all memory allocated by flow. */
3960 free_basic_block_vars ();
3962 /* Write DBX symbols if requested. */
3964 /* Note that for those inline functions where we don't initially
3965 know for certain that we will be generating an out-of-line copy,
3966 the first invocation of this routine (rest_of_compilation) will
3967 skip over this code by doing a `goto exit_rest_of_compilation;'.
3968 Later on, wrapup_global_declarations will (indirectly) call
3969 rest_of_compilation again for those inline functions that need
3970 to have out-of-line copies generated. During that call, we
3971 *will* be routed past here. */
3973 timevar_push (TV_SYMOUT
);
3974 (*debug_hooks
->function_decl
) (current_function_decl
);
3975 timevar_pop (TV_SYMOUT
);
3979 struct tree_opt_pass pass_final
=
3983 rest_of_handle_final
, /* execute */
3986 0, /* static_pass_number */
3987 TV_FINAL
, /* tv_id */
3988 0, /* properties_required */
3989 0, /* properties_provided */
3990 0, /* properties_destroyed */
3991 0, /* todo_flags_start */
3992 TODO_ggc_collect
, /* todo_flags_finish */
3998 rest_of_handle_shorten_branches (void)
4000 /* Shorten branches. */
4001 shorten_branches (get_insns ());
4005 struct tree_opt_pass pass_shorten_branches
=
4007 "shorten", /* name */
4009 rest_of_handle_shorten_branches
, /* execute */
4012 0, /* static_pass_number */
4013 TV_FINAL
, /* tv_id */
4014 0, /* properties_required */
4015 0, /* properties_provided */
4016 0, /* properties_destroyed */
4017 0, /* todo_flags_start */
4018 TODO_dump_func
, /* todo_flags_finish */
4024 rest_of_clean_state (void)
4028 /* It is very important to decompose the RTL instruction chain here:
4029 debug information keeps pointing into CODE_LABEL insns inside the function
4030 body. If these remain pointing to the other insns, we end up preserving
4031 whole RTL chain and attached detailed debug info in memory. */
4032 for (insn
= get_insns (); insn
; insn
= next
)
4034 next
= NEXT_INSN (insn
);
4035 NEXT_INSN (insn
) = NULL
;
4036 PREV_INSN (insn
) = NULL
;
4039 /* In case the function was not output,
4040 don't leave any temporary anonymous types
4041 queued up for sdb output. */
4042 #ifdef SDB_DEBUGGING_INFO
4043 if (write_symbols
== SDB_DEBUG
)
4044 sdbout_types (NULL_TREE
);
4047 reload_completed
= 0;
4048 epilogue_completed
= 0;
4049 flow2_completed
= 0;
4052 regstack_completed
= 0;
4055 /* Clear out the insn_length contents now that they are no
4057 init_insn_lengths ();
4059 /* Show no temporary slots allocated. */
4062 free_basic_block_vars ();
4063 free_bb_for_insn ();
4066 if (targetm
.binds_local_p (current_function_decl
))
4068 int pref
= cfun
->preferred_stack_boundary
;
4069 if (cfun
->stack_alignment_needed
> cfun
->preferred_stack_boundary
)
4070 pref
= cfun
->stack_alignment_needed
;
4071 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4075 /* Make sure volatile mem refs aren't considered valid operands for
4076 arithmetic insns. We must call this here if this is a nested inline
4077 function, since the above code leaves us in the init_recog state,
4078 and the function context push/pop code does not save/restore volatile_ok.
4080 ??? Maybe it isn't necessary for expand_start_function to call this
4081 anymore if we do it here? */
4083 init_recog_no_volatile ();
4085 /* We're done with this function. Free up memory if we can. */
4086 free_after_parsing (cfun
);
4087 free_after_compilation (cfun
);
4091 struct tree_opt_pass pass_clean_state
=
4095 rest_of_clean_state
, /* execute */
4098 0, /* static_pass_number */
4099 TV_FINAL
, /* tv_id */
4100 0, /* properties_required */
4101 0, /* properties_provided */
4102 PROP_rtl
, /* properties_destroyed */
4103 0, /* todo_flags_start */
4104 0, /* todo_flags_finish */