2012-09-17 Janus Weil <janus@gcc.gnu.org>
[official-gcc.git] / gcc / reginfo.c
blobcdd85001b165f0d70178a22584fdb36881fb521c
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010, 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "diagnostic-core.h"
47 #include "output.h"
48 #include "hashtab.h"
49 #include "target.h"
50 #include "tree-pass.h"
51 #include "df.h"
52 #include "ira.h"
54 /* Maximum register number used in this function, plus one. */
56 int max_regno;
59 struct target_hard_regs default_target_hard_regs;
60 struct target_regs default_target_regs;
61 #if SWITCHABLE_TARGET
62 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
63 struct target_regs *this_target_regs = &default_target_regs;
64 #endif
66 /* Data for initializing fixed_regs. */
67 static const char initial_fixed_regs[] = FIXED_REGISTERS;
69 /* Data for initializing call_used_regs. */
70 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
72 #ifdef CALL_REALLY_USED_REGISTERS
73 /* Data for initializing call_really_used_regs. */
74 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
75 #endif
77 #ifdef CALL_REALLY_USED_REGISTERS
78 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
79 #else
80 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
81 #endif
83 /* Indexed by hard register number, contains 1 for registers
84 that are being used for global register decls.
85 These must be exempt from ordinary flow analysis
86 and are also considered fixed. */
87 char global_regs[FIRST_PSEUDO_REGISTER];
89 /* Declaration for the global register. */
90 static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
92 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
93 in dataflow more conveniently. */
94 regset regs_invalidated_by_call_regset;
96 /* Same information as FIXED_REG_SET but in regset form. */
97 regset fixed_reg_set_regset;
99 /* The bitmap_obstack is used to hold some static variables that
100 should not be reset after each function is compiled. */
101 static bitmap_obstack persistent_obstack;
103 /* Used to initialize reg_alloc_order. */
104 #ifdef REG_ALLOC_ORDER
105 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
106 #endif
108 /* The same information, but as an array of unsigned ints. We copy from
109 these unsigned ints to the table above. We do this so the tm.h files
110 do not have to be aware of the wordsize for machines with <= 64 regs.
111 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
112 #define N_REG_INTS \
113 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
115 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
116 = REG_CLASS_CONTENTS;
118 /* Array containing all of the register names. */
119 static const char *const initial_reg_names[] = REGISTER_NAMES;
121 /* Array containing all of the register class names. */
122 const char * reg_class_names[] = REG_CLASS_NAMES;
124 /* No more global register variables may be declared; true once
125 reginfo has been initialized. */
126 static int no_global_reg_vars = 0;
128 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
129 correspond to the hard registers, if any, set in that map. This
130 could be done far more efficiently by having all sorts of special-cases
131 with moving single words, but probably isn't worth the trouble. */
132 void
133 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
135 unsigned i;
136 bitmap_iterator bi;
138 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
140 if (i >= FIRST_PSEUDO_REGISTER)
141 return;
142 SET_HARD_REG_BIT (*to, i);
146 /* Function called only once per target_globals to initialize the
147 target_hard_regs structure. Once this is done, various switches
148 may override. */
149 void
150 init_reg_sets (void)
152 int i, j;
154 /* First copy the register information from the initial int form into
155 the regsets. */
157 for (i = 0; i < N_REG_CLASSES; i++)
159 CLEAR_HARD_REG_SET (reg_class_contents[i]);
161 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
162 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
163 if (int_reg_class_contents[i][j / 32]
164 & ((unsigned) 1 << (j % 32)))
165 SET_HARD_REG_BIT (reg_class_contents[i], j);
168 /* Sanity check: make sure the target macros FIXED_REGISTERS and
169 CALL_USED_REGISTERS had the right number of initializers. */
170 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
171 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
172 #ifdef CALL_REALLY_USED_REGISTERS
173 gcc_assert (sizeof call_really_used_regs
174 == sizeof initial_call_really_used_regs);
175 #endif
176 #ifdef REG_ALLOC_ORDER
177 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
178 #endif
179 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
181 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
182 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
183 #ifdef CALL_REALLY_USED_REGISTERS
184 memcpy (call_really_used_regs, initial_call_really_used_regs,
185 sizeof call_really_used_regs);
186 #endif
187 #ifdef REG_ALLOC_ORDER
188 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
189 #endif
190 memcpy (reg_names, initial_reg_names, sizeof reg_names);
192 SET_HARD_REG_SET (accessible_reg_set);
193 SET_HARD_REG_SET (operand_reg_set);
196 /* We need to save copies of some of the register information which
197 can be munged by command-line switches so we can restore it during
198 subsequent back-end reinitialization. */
199 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
200 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
201 #ifdef CALL_REALLY_USED_REGISTERS
202 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
203 #endif
204 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
205 static HARD_REG_SET saved_accessible_reg_set;
206 static HARD_REG_SET saved_operand_reg_set;
208 /* Save the register information. */
209 void
210 save_register_info (void)
212 /* Sanity check: make sure the target macros FIXED_REGISTERS and
213 CALL_USED_REGISTERS had the right number of initializers. */
214 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
215 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
216 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
217 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
219 /* Likewise for call_really_used_regs. */
220 #ifdef CALL_REALLY_USED_REGISTERS
221 gcc_assert (sizeof call_really_used_regs
222 == sizeof saved_call_really_used_regs);
223 memcpy (saved_call_really_used_regs, call_really_used_regs,
224 sizeof call_really_used_regs);
225 #endif
227 /* And similarly for reg_names. */
228 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
229 memcpy (saved_reg_names, reg_names, sizeof reg_names);
230 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
231 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
234 /* Restore the register information. */
235 static void
236 restore_register_info (void)
238 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
239 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
241 #ifdef CALL_REALLY_USED_REGISTERS
242 memcpy (call_really_used_regs, saved_call_really_used_regs,
243 sizeof call_really_used_regs);
244 #endif
246 memcpy (reg_names, saved_reg_names, sizeof reg_names);
247 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
248 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
251 /* After switches have been processed, which perhaps alter
252 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
253 static void
254 init_reg_sets_1 (void)
256 unsigned int i, j;
257 unsigned int /* enum machine_mode */ m;
259 restore_register_info ();
261 #ifdef REG_ALLOC_ORDER
262 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
263 inv_reg_alloc_order[reg_alloc_order[i]] = i;
264 #endif
266 /* Let the target tweak things if necessary. */
268 targetm.conditional_register_usage ();
270 /* Compute number of hard regs in each class. */
272 memset (reg_class_size, 0, sizeof reg_class_size);
273 for (i = 0; i < N_REG_CLASSES; i++)
275 bool any_nonfixed = false;
276 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
277 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
279 reg_class_size[i]++;
280 if (!fixed_regs[j])
281 any_nonfixed = true;
283 class_only_fixed_regs[i] = !any_nonfixed;
286 /* Initialize the table of subunions.
287 reg_class_subunion[I][J] gets the largest-numbered reg-class
288 that is contained in the union of classes I and J. */
290 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
291 for (i = 0; i < N_REG_CLASSES; i++)
293 for (j = 0; j < N_REG_CLASSES; j++)
295 HARD_REG_SET c;
296 int k;
298 COPY_HARD_REG_SET (c, reg_class_contents[i]);
299 IOR_HARD_REG_SET (c, reg_class_contents[j]);
300 for (k = 0; k < N_REG_CLASSES; k++)
301 if (hard_reg_set_subset_p (reg_class_contents[k], c)
302 && !hard_reg_set_subset_p (reg_class_contents[k],
303 reg_class_contents
304 [(int) reg_class_subunion[i][j]]))
305 reg_class_subunion[i][j] = (enum reg_class) k;
309 /* Initialize the table of superunions.
310 reg_class_superunion[I][J] gets the smallest-numbered reg-class
311 containing the union of classes I and J. */
313 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
314 for (i = 0; i < N_REG_CLASSES; i++)
316 for (j = 0; j < N_REG_CLASSES; j++)
318 HARD_REG_SET c;
319 int k;
321 COPY_HARD_REG_SET (c, reg_class_contents[i]);
322 IOR_HARD_REG_SET (c, reg_class_contents[j]);
323 for (k = 0; k < N_REG_CLASSES; k++)
324 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
325 break;
327 reg_class_superunion[i][j] = (enum reg_class) k;
331 /* Initialize the tables of subclasses and superclasses of each reg class.
332 First clear the whole table, then add the elements as they are found. */
334 for (i = 0; i < N_REG_CLASSES; i++)
336 for (j = 0; j < N_REG_CLASSES; j++)
337 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
340 for (i = 0; i < N_REG_CLASSES; i++)
342 if (i == (int) NO_REGS)
343 continue;
345 for (j = i + 1; j < N_REG_CLASSES; j++)
346 if (hard_reg_set_subset_p (reg_class_contents[i],
347 reg_class_contents[j]))
349 /* Reg class I is a subclass of J.
350 Add J to the table of superclasses of I. */
351 enum reg_class *p;
353 /* Add I to the table of superclasses of J. */
354 p = &reg_class_subclasses[j][0];
355 while (*p != LIM_REG_CLASSES) p++;
356 *p = (enum reg_class) i;
360 /* Initialize "constant" tables. */
362 CLEAR_HARD_REG_SET (fixed_reg_set);
363 CLEAR_HARD_REG_SET (call_used_reg_set);
364 CLEAR_HARD_REG_SET (call_fixed_reg_set);
365 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
366 if (!regs_invalidated_by_call_regset)
368 bitmap_obstack_initialize (&persistent_obstack);
369 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
371 else
372 CLEAR_REG_SET (regs_invalidated_by_call_regset);
373 if (!fixed_reg_set_regset)
374 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
375 else
376 CLEAR_REG_SET (fixed_reg_set_regset);
378 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
379 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
381 /* As a special exception, registers whose class is NO_REGS are
382 not accepted by `register_operand'. The reason for this change
383 is to allow the representation of special architecture artifacts
384 (such as a condition code register) without extending the rtl
385 definitions. Since registers of class NO_REGS cannot be used
386 as registers in any case where register classes are examined,
387 it is better to apply this exception in a target-independent way. */
388 if (REGNO_REG_CLASS (i) == NO_REGS)
389 CLEAR_HARD_REG_BIT (operand_reg_set, i);
391 /* If a register is too limited to be treated as a register operand,
392 then it should never be allocated to a pseudo. */
393 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
395 fixed_regs[i] = 1;
396 call_used_regs[i] = 1;
399 /* call_used_regs must include fixed_regs. */
400 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
401 #ifdef CALL_REALLY_USED_REGISTERS
402 /* call_used_regs must include call_really_used_regs. */
403 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
404 #endif
406 if (fixed_regs[i])
408 SET_HARD_REG_BIT (fixed_reg_set, i);
409 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
412 if (call_used_regs[i])
413 SET_HARD_REG_BIT (call_used_reg_set, i);
415 /* There are a couple of fixed registers that we know are safe to
416 exclude from being clobbered by calls:
418 The frame pointer is always preserved across calls. The arg
419 pointer is if it is fixed. The stack pointer usually is,
420 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
421 CLOBBER will be present. If we are generating PIC code, the
422 PIC offset table register is preserved across calls, though the
423 target can override that. */
425 if (i == STACK_POINTER_REGNUM)
427 else if (global_regs[i])
429 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
430 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
432 else if (i == FRAME_POINTER_REGNUM)
434 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
435 else if (i == HARD_FRAME_POINTER_REGNUM)
437 #endif
438 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
439 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
441 #endif
442 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
443 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
445 else if (CALL_REALLY_USED_REGNO_P (i))
447 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
448 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
452 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
454 /* Preserve global registers if called more than once. */
455 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
457 if (global_regs[i])
459 fixed_regs[i] = call_used_regs[i] = 1;
460 SET_HARD_REG_BIT (fixed_reg_set, i);
461 SET_HARD_REG_BIT (call_used_reg_set, i);
462 SET_HARD_REG_BIT (call_fixed_reg_set, i);
466 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
467 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
468 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
470 HARD_REG_SET ok_regs;
471 CLEAR_HARD_REG_SET (ok_regs);
472 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
473 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
474 SET_HARD_REG_BIT (ok_regs, j);
476 for (i = 0; i < N_REG_CLASSES; i++)
477 if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
478 <= reg_class_size[i])
479 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
481 contains_reg_of_mode [i][m] = 1;
482 have_regs_of_mode [m] = 1;
487 /* Compute the table of register modes.
488 These values are used to record death information for individual registers
489 (as opposed to a multi-register mode).
490 This function might be invoked more than once, if the target has support
491 for changing register usage conventions on a per-function basis.
493 void
494 init_reg_modes_target (void)
496 int i, j;
498 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
499 for (j = 0; j < MAX_MACHINE_MODE; j++)
500 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
502 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
504 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
506 /* If we couldn't find a valid mode, just use the previous mode
507 if it is suitable, otherwise fall back on word_mode. */
508 if (reg_raw_mode[i] == VOIDmode)
510 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
511 reg_raw_mode[i] = reg_raw_mode[i - 1];
512 else
513 reg_raw_mode[i] = word_mode;
518 /* Finish initializing the register sets and initialize the register modes.
519 This function might be invoked more than once, if the target has support
520 for changing register usage conventions on a per-function basis.
522 void
523 init_regs (void)
525 /* This finishes what was started by init_reg_sets, but couldn't be done
526 until after register usage was specified. */
527 init_reg_sets_1 ();
530 /* The same as previous function plus initializing IRA. */
531 void
532 reinit_regs (void)
534 init_regs ();
535 /* caller_save needs to be re-initialized. */
536 caller_save_initialized_p = false;
537 ira_init ();
540 /* Initialize some fake stack-frame MEM references for use in
541 memory_move_secondary_cost. */
542 void
543 init_fake_stack_mems (void)
545 int i;
547 for (i = 0; i < MAX_MACHINE_MODE; i++)
548 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
552 /* Compute cost of moving data from a register of class FROM to one of
553 TO, using MODE. */
556 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
558 return targetm.register_move_cost (mode, from, to);
561 /* Compute cost of moving registers to/from memory. */
564 memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
566 return targetm.memory_move_cost (mode, rclass, in);
569 /* Compute extra cost of moving registers to/from memory due to reloads.
570 Only needed if secondary reloads are required for memory moves. */
572 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
573 bool in)
575 reg_class_t altclass;
576 int partial_cost = 0;
577 /* We need a memory reference to feed to SECONDARY... macros. */
578 /* mem may be unused even if the SECONDARY_ macros are defined. */
579 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
581 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
583 if (altclass == NO_REGS)
584 return 0;
586 if (in)
587 partial_cost = register_move_cost (mode, altclass, rclass);
588 else
589 partial_cost = register_move_cost (mode, rclass, altclass);
591 if (rclass == altclass)
592 /* This isn't simply a copy-to-temporary situation. Can't guess
593 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
594 calling here in that case.
596 I'm tempted to put in an assert here, but returning this will
597 probably only give poor estimates, which is what we would've
598 had before this code anyways. */
599 return partial_cost;
601 /* Check if the secondary reload register will also need a
602 secondary reload. */
603 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
606 /* Return a machine mode that is legitimate for hard reg REGNO and large
607 enough to save nregs. If we can't find one, return VOIDmode.
608 If CALL_SAVED is true, only consider modes that are call saved. */
609 enum machine_mode
610 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
611 unsigned int nregs, bool call_saved)
613 unsigned int /* enum machine_mode */ m;
614 enum machine_mode found_mode = VOIDmode, mode;
616 /* We first look for the largest integer mode that can be validly
617 held in REGNO. If none, we look for the largest floating-point mode.
618 If we still didn't find a valid mode, try CCmode. */
620 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
621 mode != VOIDmode;
622 mode = GET_MODE_WIDER_MODE (mode))
623 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
624 && HARD_REGNO_MODE_OK (regno, mode)
625 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
626 found_mode = mode;
628 if (found_mode != VOIDmode)
629 return found_mode;
631 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
632 mode != VOIDmode;
633 mode = GET_MODE_WIDER_MODE (mode))
634 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
635 && HARD_REGNO_MODE_OK (regno, mode)
636 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
637 found_mode = mode;
639 if (found_mode != VOIDmode)
640 return found_mode;
642 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
643 mode != VOIDmode;
644 mode = GET_MODE_WIDER_MODE (mode))
645 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
646 && HARD_REGNO_MODE_OK (regno, mode)
647 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
648 found_mode = mode;
650 if (found_mode != VOIDmode)
651 return found_mode;
653 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
654 mode != VOIDmode;
655 mode = GET_MODE_WIDER_MODE (mode))
656 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
657 && HARD_REGNO_MODE_OK (regno, mode)
658 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
659 found_mode = mode;
661 if (found_mode != VOIDmode)
662 return found_mode;
664 /* Iterate over all of the CCmodes. */
665 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
667 mode = (enum machine_mode) m;
668 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
669 && HARD_REGNO_MODE_OK (regno, mode)
670 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
671 return mode;
674 /* We can't find a mode valid for this register. */
675 return VOIDmode;
678 /* Specify the usage characteristics of the register named NAME.
679 It should be a fixed register if FIXED and a
680 call-used register if CALL_USED. */
681 void
682 fix_register (const char *name, int fixed, int call_used)
684 int i;
685 int reg, nregs;
687 /* Decode the name and update the primary form of
688 the register info. */
690 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
692 gcc_assert (nregs >= 1);
693 for (i = reg; i < reg + nregs; i++)
695 if ((i == STACK_POINTER_REGNUM
696 #ifdef HARD_FRAME_POINTER_REGNUM
697 || i == HARD_FRAME_POINTER_REGNUM
698 #else
699 || i == FRAME_POINTER_REGNUM
700 #endif
702 && (fixed == 0 || call_used == 0))
704 switch (fixed)
706 case 0:
707 switch (call_used)
709 case 0:
710 error ("can%'t use %qs as a call-saved register", name);
711 break;
713 case 1:
714 error ("can%'t use %qs as a call-used register", name);
715 break;
717 default:
718 gcc_unreachable ();
720 break;
722 case 1:
723 switch (call_used)
725 case 1:
726 error ("can%'t use %qs as a fixed register", name);
727 break;
729 case 0:
730 default:
731 gcc_unreachable ();
733 break;
735 default:
736 gcc_unreachable ();
739 else
741 fixed_regs[i] = fixed;
742 call_used_regs[i] = call_used;
743 #ifdef CALL_REALLY_USED_REGISTERS
744 if (fixed == 0)
745 call_really_used_regs[i] = call_used;
746 #endif
750 else
752 warning (0, "unknown register name: %s", name);
756 /* Mark register number I as global. */
757 void
758 globalize_reg (tree decl, int i)
760 location_t loc = DECL_SOURCE_LOCATION (decl);
762 #ifdef STACK_REGS
763 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
765 error ("stack register used for global register variable");
766 return;
768 #endif
770 if (fixed_regs[i] == 0 && no_global_reg_vars)
771 error_at (loc, "global register variable follows a function definition");
773 if (global_regs[i])
775 warning_at (loc, 0,
776 "register of %qD used for multiple global register variables",
777 decl);
778 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
779 "conflicts with %qD", global_regs_decl[i]);
780 return;
783 if (call_used_regs[i] && ! fixed_regs[i])
784 warning_at (loc, 0, "call-clobbered register used for global register variable");
786 global_regs[i] = 1;
787 global_regs_decl[i] = decl;
789 /* If we're globalizing the frame pointer, we need to set the
790 appropriate regs_invalidated_by_call bit, even if it's already
791 set in fixed_regs. */
792 if (i != STACK_POINTER_REGNUM)
794 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
795 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
798 /* If already fixed, nothing else to do. */
799 if (fixed_regs[i])
800 return;
802 fixed_regs[i] = call_used_regs[i] = 1;
803 #ifdef CALL_REALLY_USED_REGISTERS
804 call_really_used_regs[i] = 1;
805 #endif
807 SET_HARD_REG_BIT (fixed_reg_set, i);
808 SET_HARD_REG_BIT (call_used_reg_set, i);
809 SET_HARD_REG_BIT (call_fixed_reg_set, i);
811 reinit_regs ();
815 /* Structure used to record preferences of given pseudo. */
816 struct reg_pref
818 /* (enum reg_class) prefclass is the preferred class. May be
819 NO_REGS if no class is better than memory. */
820 char prefclass;
822 /* altclass is a register class that we should use for allocating
823 pseudo if no register in the preferred class is available.
824 If no register in this class is available, memory is preferred.
826 It might appear to be more general to have a bitmask of classes here,
827 but since it is recommended that there be a class corresponding to the
828 union of most major pair of classes, that generality is not required. */
829 char altclass;
831 /* allocnoclass is a register class that IRA uses for allocating
832 the pseudo. */
833 char allocnoclass;
836 /* Record preferences of each pseudo. This is available after RA is
837 run. */
838 static struct reg_pref *reg_pref;
840 /* Current size of reg_info. */
841 static int reg_info_size;
843 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
844 This function is sometimes called before the info has been computed.
845 When that happens, just return GENERAL_REGS, which is innocuous. */
846 enum reg_class
847 reg_preferred_class (int regno)
849 if (reg_pref == 0)
850 return GENERAL_REGS;
852 return (enum reg_class) reg_pref[regno].prefclass;
855 enum reg_class
856 reg_alternate_class (int regno)
858 if (reg_pref == 0)
859 return ALL_REGS;
861 return (enum reg_class) reg_pref[regno].altclass;
864 /* Return the reg_class which is used by IRA for its allocation. */
865 enum reg_class
866 reg_allocno_class (int regno)
868 if (reg_pref == 0)
869 return NO_REGS;
871 return (enum reg_class) reg_pref[regno].allocnoclass;
876 /* Allocate space for reg info. */
877 static void
878 allocate_reg_info (void)
880 reg_info_size = max_reg_num ();
881 gcc_assert (! reg_pref && ! reg_renumber);
882 reg_renumber = XNEWVEC (short, reg_info_size);
883 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
884 memset (reg_renumber, -1, reg_info_size * sizeof (short));
888 /* Resize reg info. The new elements will be uninitialized. Return
889 TRUE if new elements (for new pseudos) were added. */
890 bool
891 resize_reg_info (void)
893 int old;
895 if (reg_pref == NULL)
897 allocate_reg_info ();
898 return true;
900 if (reg_info_size == max_reg_num ())
901 return false;
902 old = reg_info_size;
903 reg_info_size = max_reg_num ();
904 gcc_assert (reg_pref && reg_renumber);
905 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
906 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
907 memset (reg_pref + old, -1,
908 (reg_info_size - old) * sizeof (struct reg_pref));
909 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
910 return true;
914 /* Free up the space allocated by allocate_reg_info. */
915 void
916 free_reg_info (void)
918 if (reg_pref)
920 free (reg_pref);
921 reg_pref = NULL;
924 if (reg_renumber)
926 free (reg_renumber);
927 reg_renumber = NULL;
931 /* Initialize some global data for this pass. */
932 static unsigned int
933 reginfo_init (void)
935 if (df)
936 df_compute_regs_ever_live (true);
938 /* This prevents dump_reg_info from losing if called
939 before reginfo is run. */
940 reg_pref = NULL;
941 /* No more global register variables may be declared. */
942 no_global_reg_vars = 1;
943 return 1;
946 struct rtl_opt_pass pass_reginfo_init =
949 RTL_PASS,
950 "reginfo", /* name */
951 NULL, /* gate */
952 reginfo_init, /* execute */
953 NULL, /* sub */
954 NULL, /* next */
955 0, /* static_pass_number */
956 TV_NONE, /* tv_id */
957 0, /* properties_required */
958 0, /* properties_provided */
959 0, /* properties_destroyed */
960 0, /* todo_flags_start */
961 0 /* todo_flags_finish */
967 /* Set up preferred, alternate, and cover classes for REGNO as
968 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
969 void
970 setup_reg_classes (int regno,
971 enum reg_class prefclass, enum reg_class altclass,
972 enum reg_class allocnoclass)
974 if (reg_pref == NULL)
975 return;
976 gcc_assert (reg_info_size == max_reg_num ());
977 reg_pref[regno].prefclass = prefclass;
978 reg_pref[regno].altclass = altclass;
979 reg_pref[regno].allocnoclass = allocnoclass;
983 /* This is the `regscan' pass of the compiler, run just before cse and
984 again just before loop. It finds the first and last use of each
985 pseudo-register. */
987 static void reg_scan_mark_refs (rtx, rtx);
989 void
990 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
992 rtx insn;
994 timevar_push (TV_REG_SCAN);
996 for (insn = f; insn; insn = NEXT_INSN (insn))
997 if (INSN_P (insn))
999 reg_scan_mark_refs (PATTERN (insn), insn);
1000 if (REG_NOTES (insn))
1001 reg_scan_mark_refs (REG_NOTES (insn), insn);
1004 timevar_pop (TV_REG_SCAN);
1008 /* X is the expression to scan. INSN is the insn it appears in.
1009 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1010 We should only record information for REGs with numbers
1011 greater than or equal to MIN_REGNO. */
1012 static void
1013 reg_scan_mark_refs (rtx x, rtx insn)
1015 enum rtx_code code;
1016 rtx dest;
1017 rtx note;
1019 if (!x)
1020 return;
1021 code = GET_CODE (x);
1022 switch (code)
1024 case CONST:
1025 CASE_CONST_ANY:
1026 case CC0:
1027 case PC:
1028 case SYMBOL_REF:
1029 case LABEL_REF:
1030 case ADDR_VEC:
1031 case ADDR_DIFF_VEC:
1032 case REG:
1033 return;
1035 case EXPR_LIST:
1036 if (XEXP (x, 0))
1037 reg_scan_mark_refs (XEXP (x, 0), insn);
1038 if (XEXP (x, 1))
1039 reg_scan_mark_refs (XEXP (x, 1), insn);
1040 break;
1042 case INSN_LIST:
1043 if (XEXP (x, 1))
1044 reg_scan_mark_refs (XEXP (x, 1), insn);
1045 break;
1047 case CLOBBER:
1048 if (MEM_P (XEXP (x, 0)))
1049 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1050 break;
1052 case SET:
1053 /* Count a set of the destination if it is a register. */
1054 for (dest = SET_DEST (x);
1055 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1056 || GET_CODE (dest) == ZERO_EXTEND;
1057 dest = XEXP (dest, 0))
1060 /* If this is setting a pseudo from another pseudo or the sum of a
1061 pseudo and a constant integer and the other pseudo is known to be
1062 a pointer, set the destination to be a pointer as well.
1064 Likewise if it is setting the destination from an address or from a
1065 value equivalent to an address or to the sum of an address and
1066 something else.
1068 But don't do any of this if the pseudo corresponds to a user
1069 variable since it should have already been set as a pointer based
1070 on the type. */
1072 if (REG_P (SET_DEST (x))
1073 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1074 /* If the destination pseudo is set more than once, then other
1075 sets might not be to a pointer value (consider access to a
1076 union in two threads of control in the presence of global
1077 optimizations). So only set REG_POINTER on the destination
1078 pseudo if this is the only set of that pseudo. */
1079 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1080 && ! REG_USERVAR_P (SET_DEST (x))
1081 && ! REG_POINTER (SET_DEST (x))
1082 && ((REG_P (SET_SRC (x))
1083 && REG_POINTER (SET_SRC (x)))
1084 || ((GET_CODE (SET_SRC (x)) == PLUS
1085 || GET_CODE (SET_SRC (x)) == LO_SUM)
1086 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1087 && REG_P (XEXP (SET_SRC (x), 0))
1088 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1089 || GET_CODE (SET_SRC (x)) == CONST
1090 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1091 || GET_CODE (SET_SRC (x)) == LABEL_REF
1092 || (GET_CODE (SET_SRC (x)) == HIGH
1093 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1094 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1095 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1096 || ((GET_CODE (SET_SRC (x)) == PLUS
1097 || GET_CODE (SET_SRC (x)) == LO_SUM)
1098 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1099 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1100 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1101 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1102 && (GET_CODE (XEXP (note, 0)) == CONST
1103 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1104 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1105 REG_POINTER (SET_DEST (x)) = 1;
1107 /* If this is setting a register from a register or from a simple
1108 conversion of a register, propagate REG_EXPR. */
1109 if (REG_P (dest) && !REG_ATTRS (dest))
1110 set_reg_attrs_from_value (dest, SET_SRC (x));
1112 /* ... fall through ... */
1114 default:
1116 const char *fmt = GET_RTX_FORMAT (code);
1117 int i;
1118 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1120 if (fmt[i] == 'e')
1121 reg_scan_mark_refs (XEXP (x, i), insn);
1122 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1124 int j;
1125 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1126 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1134 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1135 is also in C2. */
1137 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1139 return (c1 == c2
1140 || c2 == ALL_REGS
1141 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1142 reg_class_contents[(int) c2]));
1145 /* Return nonzero if there is a register that is in both C1 and C2. */
1147 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1149 return (c1 == c2
1150 || c1 == ALL_REGS
1151 || c2 == ALL_REGS
1152 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1153 reg_class_contents[(int) c2]));
1158 /* Passes for keeping and updating info about modes of registers
1159 inside subregisters. */
1161 #ifdef CANNOT_CHANGE_MODE_CLASS
1163 static bitmap invalid_mode_changes;
1165 static void
1166 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1168 enum machine_mode mode;
1169 unsigned int regno;
1171 if (!REG_P (SUBREG_REG (subreg)))
1172 return;
1174 regno = REGNO (SUBREG_REG (subreg));
1175 mode = GET_MODE (subreg);
1177 if (regno < FIRST_PSEUDO_REGISTER)
1178 return;
1180 if (bitmap_set_bit (subregs_of_mode,
1181 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1183 unsigned int rclass;
1184 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1185 if (!bitmap_bit_p (invalid_mode_changes,
1186 regno * N_REG_CLASSES + rclass)
1187 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1188 mode, (enum reg_class) rclass))
1189 bitmap_set_bit (invalid_mode_changes,
1190 regno * N_REG_CLASSES + rclass);
1194 /* Call record_subregs_of_mode for all the subregs in X. */
1195 static void
1196 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1198 enum rtx_code code = GET_CODE (x);
1199 const char * const fmt = GET_RTX_FORMAT (code);
1200 int i;
1202 if (code == SUBREG)
1203 record_subregs_of_mode (x, subregs_of_mode);
1205 /* Time for some deep diving. */
1206 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1208 if (fmt[i] == 'e')
1209 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1210 else if (fmt[i] == 'E')
1212 int j;
1213 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1214 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1219 void
1220 init_subregs_of_mode (void)
1222 basic_block bb;
1223 rtx insn;
1224 bitmap_obstack srom_obstack;
1225 bitmap subregs_of_mode;
1227 gcc_assert (invalid_mode_changes == NULL);
1228 invalid_mode_changes = BITMAP_ALLOC (NULL);
1229 bitmap_obstack_initialize (&srom_obstack);
1230 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1232 FOR_EACH_BB (bb)
1233 FOR_BB_INSNS (bb, insn)
1234 if (NONDEBUG_INSN_P (insn))
1235 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1237 BITMAP_FREE (subregs_of_mode);
1238 bitmap_obstack_release (&srom_obstack);
1241 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1242 mode. */
1243 bool
1244 invalid_mode_change_p (unsigned int regno,
1245 enum reg_class rclass)
1247 return bitmap_bit_p (invalid_mode_changes,
1248 regno * N_REG_CLASSES + (unsigned) rclass);
1251 void
1252 finish_subregs_of_mode (void)
1254 BITMAP_FREE (invalid_mode_changes);
1256 #else
1257 void
1258 init_subregs_of_mode (void)
1261 void
1262 finish_subregs_of_mode (void)
1266 #endif /* CANNOT_CHANGE_MODE_CLASS */