1 /* Copyright (C) 2006-2017 Free Software Foundation, Inc.
3 This file is free software; you can redistribute it and/or modify it under
4 the terms of the GNU General Public License as published by the Free
5 Software Foundation; either version 3 of the License, or (at your option)
8 This file is distributed in the hope that it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 You should have received a copy of the GNU General Public License
14 along with GCC; see the file COPYING3. If not see
15 <http://www.gnu.org/licenses/>. */
19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile)
21 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
23 #define INIT_EXPANDERS spu_init_expanders()
25 /* Which processor to generate code or schedule for. */
32 extern GTY(()) int spu_arch
;
33 extern GTY(()) int spu_tune
;
35 /* Support for a compile-time default architecture and tuning. The rules are:
36 --with-arch is ignored if -march is specified.
37 --with-tune is ignored if -mtune is specified. */
38 #define OPTION_DEFAULT_SPECS \
39 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
40 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
42 /* Default target_flags if no switches specified. */
43 #ifndef TARGET_DEFAULT
44 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
45 | MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION)
51 #define BITS_BIG_ENDIAN 1
53 #define BYTES_BIG_ENDIAN 1
55 #define WORDS_BIG_ENDIAN 1
57 /* GCC uses word_mode in many places, assuming that it is the fastest
58 integer mode. That is not the case for SPU though. We can't use
59 32 here because (of some reason I can't remember.) */
60 #define BITS_PER_WORD 128
62 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
64 /* When building libgcc, we need to assume 4 words per units even
65 though UNITS_PER_WORD is 16, because the SPU has basically a 32-bit
66 instruction set although register size is 128 bits. In particular,
67 this causes libgcc to contain __divdi3 instead of __divti3 etc.
68 However, we allow this default to be re-defined on the command
69 line, so that we can use the LIB2_SIDITI_CONV_FUNCS mechanism
70 to get (in addition) TImode versions of some routines. */
71 #ifndef LIBGCC2_UNITS_PER_WORD
72 #define LIBGCC2_UNITS_PER_WORD 4
75 #define POINTER_SIZE 32
77 #define PARM_BOUNDARY 128
79 #define STACK_BOUNDARY 128
81 /* We want it 8-byte aligned so we can properly use dual-issue
82 instructions, which can only happen on an 8-byte aligned address. */
83 #define FUNCTION_BOUNDARY 64
85 /* We would like to allow a larger alignment for data objects (for DMA)
86 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't
87 define BIGGEST_ALIGNMENT as larger because it is used in other places
88 and would end up wasting space. (Is this still true?) */
89 #define BIGGEST_ALIGNMENT 128
91 #define MINIMUM_ATOMIC_ALIGNMENT 128
93 /* Make all static objects 16-byte aligned. This allows us to assume
94 they are also padded to 16-bytes, which means we can use a single
95 load or store instruction to access them. Do the same for objects
96 on the stack. (Except a bug (?) allows some stack objects to be
98 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
99 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
100 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
102 #define EMPTY_FIELD_BOUNDARY 32
104 #define STRICT_ALIGNMENT 1
106 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
107 #define ALIGNED_SYMBOL_REF_P(X) \
108 (GET_CODE (X) == SYMBOL_REF \
109 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
110 && (! SYMBOL_REF_FUNCTION_P (X) \
111 || align_functions >= 16))
113 #define PCC_BITFIELD_TYPE_MATTERS 1
115 #define MAX_FIXED_MODE_SIZE 128
117 #define STACK_SAVEAREA_MODE(save_level) \
118 (save_level == SAVE_FUNCTION ? VOIDmode \
119 : save_level == SAVE_NONLOCAL ? SImode \
122 #define STACK_SIZE_MODE SImode
127 #define INT_TYPE_SIZE 32
129 #define LONG_TYPE_SIZE 32
131 #define LONG_LONG_TYPE_SIZE 64
133 #define FLOAT_TYPE_SIZE 32
135 #define DOUBLE_TYPE_SIZE 64
137 #define LONG_DOUBLE_TYPE_SIZE 64
139 #define DEFAULT_SIGNED_CHAR 0
141 #define STDINT_LONG32 0
144 /* Register Basics */
146 /* 128-130 are special registers that never appear in assembly code. */
147 #define FIRST_PSEUDO_REGISTER 131
149 #define FIXED_REGISTERS { \
150 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
151 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
161 #define CALL_USED_REGISTERS { \
162 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
163 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
164 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
165 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
166 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
167 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
168 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
169 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
174 /* Register Classes */
183 #define N_REG_CLASSES (int) LIM_REG_CLASSES
185 #define REG_CLASS_NAMES \
191 #define REG_CLASS_CONTENTS { \
192 {0, 0, 0, 0, 0}, /* no regs */ \
193 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
194 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
196 #define REGNO_REG_CLASS(REGNO) ((void)(REGNO), GENERAL_REGS)
199 #define BASE_REG_CLASS GENERAL_REGS
201 #define INDEX_REG_CLASS GENERAL_REGS
203 #define REGNO_OK_FOR_BASE_P(regno) \
204 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
206 #define REGNO_OK_FOR_INDEX_P(regno) \
207 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
209 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
210 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
211 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
212 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
214 /* GCC assumes that modes are in the lowpart of a register, which is
215 only true for SPU. */
216 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
217 ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
218 && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \
219 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
221 #define REGISTER_TARGET_PRAGMAS() do { \
222 c_register_addr_space ("__ea", ADDR_SPACE_EA); \
223 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \
229 #define STACK_GROWS_DOWNWARD 1
231 #define FRAME_GROWS_DOWNWARD 1
233 #define STARTING_FRAME_OFFSET (0)
235 #define STACK_POINTER_OFFSET 32
237 #define FIRST_PARM_OFFSET(FNDECL) (0)
239 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant (Pmode, (FP), -16)
241 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
243 /* Should this be defined? Would it simplify our implementation. */
244 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
246 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
248 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
250 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
251 (crtl->args.pretend_args_size - STACK_POINTER_OFFSET)
256 /* We store the Available Stack Size in the second slot of the stack
257 register. We emit stack checking code during the prologue. */
258 #define STACK_CHECK_BUILTIN 1
261 /* Frame Registers, and other registers */
263 #define STACK_POINTER_REGNUM 1
265 /* Will be eliminated. */
266 #define FRAME_POINTER_REGNUM 128
268 /* This is not specified in any ABI, so could be set to anything. */
269 #define HARD_FRAME_POINTER_REGNUM 127
271 /* Will be eliminated. */
272 #define ARG_POINTER_REGNUM 129
274 #define STATIC_CHAIN_REGNUM 2
276 #define LINK_REGISTER_REGNUM 0
278 /* Used to keep track of instructions that have clobbered the hint
279 * buffer. Users can also specify it in inline asm. */
280 #define HBR_REGNUM 130
282 #define MAX_REGISTER_ARGS 72
283 #define FIRST_ARG_REGNUM 3
284 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
286 #define MAX_REGISTER_RETURN 72
287 #define FIRST_RETURN_REGNUM 3
288 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
293 #define ELIMINABLE_REGS \
294 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
295 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
296 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
297 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
299 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
300 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
303 /* Stack Arguments */
305 #define ACCUMULATE_OUTGOING_ARGS 1
307 #define REG_PARM_STACK_SPACE(FNDECL) 0
309 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
312 /* Register Arguments */
314 #define CUMULATIVE_ARGS int
316 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
319 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the
320 stack. 8/16-bit types should be at offsets 3/2 respectively. */
321 #define FUNCTION_ARG_OFFSET(MODE, TYPE) \
322 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4) \
323 ? (4 - GET_MODE_SIZE (MODE)) \
326 #define PAD_VARARGS_DOWN 0
328 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
332 #define FUNCTION_VALUE(VALTYPE, FUNC) \
333 (spu_function_value((VALTYPE),(FUNC)))
335 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
337 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
340 /* Machine-specific symbol_ref flags. */
341 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
343 /* Aggregate Return */
345 #define DEFAULT_PCC_STRUCT_RETURN 0
350 #define EXIT_IGNORE_STACK 0
352 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
357 #define FUNCTION_PROFILER(FILE, LABELNO) \
358 spu_function_profiler ((FILE), (LABELNO));
360 #define NO_PROFILE_COUNTERS 1
362 #define PROFILE_BEFORE_PROLOGUE 1
367 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
369 #define TRAMPOLINE_ALIGNMENT 128
371 /* Addressing Modes */
373 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X)
375 #define MAX_REGS_PER_ADDRESS 2
377 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
379 rtx new_rtx = spu_legitimize_reload_address (AD, MODE, OPNUM, \
391 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost
393 #define SLOW_BYTE_ACCESS 0
395 #define MOVE_RATIO(speed) ((speed)? 32 : 4)
397 #define NO_FUNCTION_CSE 1
402 #define TEXT_SECTION_ASM_OP ".text"
404 #define DATA_SECTION_ASM_OP ".data"
406 #define JUMP_TABLES_IN_TEXT_SECTION 1
410 #define PIC_OFFSET_TABLE_REGNUM 126
415 #define ASM_APP_ON ""
417 #define ASM_APP_OFF ""
420 /* Uninitialized Data */
421 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
422 ( fputs (".comm ", (FILE)), \
423 assemble_name ((FILE), (NAME)), \
424 fprintf ((FILE), ",%d\n", (ROUNDED)))
426 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
427 ( fputs (".lcomm ", (FILE)), \
428 assemble_name ((FILE), (NAME)), \
429 fprintf ((FILE), ",%d\n", (ROUNDED)))
433 #define ASM_OUTPUT_LABEL(FILE,NAME) \
434 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
436 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
437 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
439 #define ASM_OUTPUT_SYMBOL_REF(FILE, X) \
443 assemble_name (FILE, XSTR ((X), 0)); \
444 if ((decl = SYMBOL_REF_DECL ((X))) != 0 \
445 && TREE_CODE (decl) == VAR_DECL \
446 && TYPE_ADDR_SPACE (TREE_TYPE (decl))) \
447 fputs ("@ppu", FILE); \
451 /* Instruction Output */
452 #define REGISTER_NAMES \
453 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
454 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
455 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
456 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
457 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
458 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
459 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
460 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
461 "$vfp", "$vap", "hbr" \
464 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
466 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
467 print_operand_address (FILE, ADDR)
469 #define LOCAL_LABEL_PREFIX "."
471 #define USER_LABEL_PREFIX ""
473 #define ASM_COMMENT_START "#"
476 /* Dispatch Tables */
478 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
479 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
481 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
482 fprintf (FILE, "\t.word .L%d\n", VALUE)
485 /* Alignment Output */
487 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
488 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
493 #define CASE_VECTOR_MODE SImode
497 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
499 #define STORE_FLAG_VALUE -1
503 #define FUNCTION_MODE QImode
505 #define NO_IMPLICIT_EXTERN_C 1
508 /* Address spaces. */
509 #define ADDR_SPACE_EA 1
514 enum spu_builtin_type
525 struct spu_builtin_description
530 enum spu_builtin_type type
;
532 /* The first element of parm is always the return type. The rest
533 are a zero terminated list of parameters. */
537 extern struct spu_builtin_description spu_builtins
[];