1 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
3 * config/mmix/mmix.md (MM): New mode_iterator.
4 ("mov<mode>"): New expander to expand for all MM-modes.
5 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
6 ("*movsf_expanded", "*movdf_expanded"): Rename from the
7 corresponding mov<M> named pattern. Add to the condition that
8 either operand must be a register_operand.
9 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
11 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
14 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
16 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
18 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
21 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
22 Disable split for zero constant source operand.
23 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
25 2020-08-06 Jakub Jelinek <jakub@redhat.com>
27 PR tree-optimization/96480
28 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
29 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
30 through an empty bb to that block too, if PHI args don't match, retry
31 them through the other path from TEST_BB.
32 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
33 through inversion of the condition.
35 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
37 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
38 (KERNEL_VERSION): Remove.
39 * config/bpf/bpf-helpers.def: Delete.
40 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
41 (bpf_attribute_table): Define.
42 (bpf_helper_names): Delete.
43 (bpf_helper_code): Likewise.
44 (enum bpf_builtins): Adjust to new helpers mechanism.
45 (bpf_output_call): Likewise.
46 (bpf_init_builtins): Likewise.
47 (bpf_init_builtins): Likewise.
48 * doc/extend.texi (BPF Function Attributes): New section.
49 (BPF Kernel Helpers): Delete section.
51 2020-08-06 Richard Biener <rguenther@suse.de>
53 PR tree-optimization/96491
54 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
55 sinking across abnormal edges.
57 2020-08-06 Richard Biener <rguenther@suse.de>
59 PR tree-optimization/96483
60 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
63 2020-08-06 Richard Biener <rguenther@suse.de>
65 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
67 (ivs_params_clear): Adjust.
68 (gcc_expression_from_isl_ast_expr_id): Likewise.
69 (graphite_create_new_loop): Likewise.
70 (add_parameters_to_ivs_params): Likewise.
72 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
73 Uroš Bizjak <ubizjak@gmail.com>
75 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
76 (<maxmin><mode>3): Support SWI248 and general_operand for
77 second operand, when TARGET_CMOVE.
78 (<maxmin><mode>3_1 splitter): Optimize comparisons against
79 0, 1 and -1 to use "test" instead of "cmp".
80 (*<maxmin>di3_doubleword): Likewise, allow general_operand
81 and enable on TARGET_CMOVE.
82 (peephole2): Convert clearing a register after a flag setting
83 instruction into an xor followed by the original flag setter.
85 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
87 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
88 Remove direct inclusion of <vector>.
90 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
92 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
94 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
95 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
96 modeling for vector with length.
97 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
98 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
99 Update function comment.
100 * tree-vect-stmts.c (vect_gen_len): Update function comment.
101 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
103 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
105 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
108 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
110 PR tree-optimization/95906
112 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
113 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
114 (op (c ? a : b)): Update to match the new transformations.
116 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
119 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
120 CC register directly, instead of a GPR. Replace the original GPR
121 destination with an extra scratch register. Zero out operand 3
123 (stack_protect_test): Update accordingly.
125 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
127 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
128 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
129 (store_pair_sw_<SX:mode><SX2:mode>)
130 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
131 (*load_pair_extendsidi2_aarch64)
132 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
133 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
134 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
135 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
137 2020-08-05 Richard Biener <rguenther@suse.de>
139 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
140 (invariantness_dom_walker::before_dom_children): Move to ...
141 (compute_invariantness): ... this function.
142 (move_computations): Inline ...
143 (tree_ssa_lim): ... here, share RPO order and avoid some
145 (analyze_memory_references): Remove sorting of location
146 lists, instead assert they are sorted already when checking.
147 (prev_flag_edges): Remove.
148 (execute_sm_if_changed): Pass down and adjust prev edge state.
149 (execute_sm_exit): Likewise.
150 (hoist_memory_references): Likewise. Commit edge insertions
151 of each processed exit.
152 (store_motion_loop): Do not commit edge insertions on all
153 edges in the function.
154 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
155 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
157 2020-08-05 Richard Biener <rguenther@suse.de>
159 * genmatch.c (fail_label): New global.
160 (expr::gen_transform): Branch to fail_label instead of
161 returning. Fix indent of call argument checking.
162 (dt_simplify::gen_1): Compute and emit fail_label, branch
163 to it instead of returning early.
165 2020-08-05 Jakub Jelinek <jakub@redhat.com>
167 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
170 2020-08-05 Jakub Jelinek <jakub@redhat.com>
173 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
176 2020-08-05 Jakub Jelinek <jakub@redhat.com>
178 * omp-expand.c (expand_omp_for_init_counts): Remember
179 first_inner_iterations, factor and n1o from the number of iterations
181 (expand_omp_for_init_vars): Use more efficient logical iteration number
182 to actual iterator values computation even for non-rectangular loops
183 where number of loop iterations could not be computed at compile time.
185 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
187 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
188 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
190 (VM3): New define_mode.
191 (VM3_char): New define_attr.
192 (xxblend_<mode> mode VM3): New define_insn.
193 (xxpermx): New define_expand.
194 (xxpermx_inst): New define_insn.
195 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
196 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
197 BU_P10V_3 definitions.
198 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
199 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
200 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
201 (P10_BUILTIN_VXXPERMX): Add if statement.
202 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
203 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
204 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
205 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
206 overloaded arguments.
207 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
208 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
209 variables, add case statement for P10_BUILTIN_VXXPERMX.
210 (builtin_function_type): Add case statements for
211 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
212 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
213 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
215 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
217 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
219 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
220 UNSPEC_XXSPLTI32DX): New.
221 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
222 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
223 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
224 vxxsplti32dx_v4sf.): New define_expands.
225 * config/rs6000/predicates.md (u1bit_cint_operand,
226 s32bit_cint_operand, c32bit_cint_operand): New predicates.
227 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
228 VXXSPLTID): New definitions.
229 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
231 (XXSPLTIW, XXSPLTID): New definitions.
232 (XXSPLTI32DX): Add definitions.
233 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
234 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
236 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
238 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
239 * doc/extend.texi: Add documentation for vec_splati,
240 vec_splatid, and vec_splati_ins.
242 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
244 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
245 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
246 (SLDB_lr): New attribute.
247 (VSHIFT_DBL_LR): New iterator.
248 (vs<SLDB_lr>db_<mode>): New define_insn.
249 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
250 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
251 VSRDB_V2DI): New BU_P10V_3 definitions.
252 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
253 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
254 P10_BUILTIN_VEC_SRDB): New definitions.
255 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
256 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
257 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
258 CODE_FOR_vsrdb_v2di]: Add clauses.
259 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
261 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
263 * config/rs6000/altivec.h: Add define for vec_replace_elt and
264 vec_replace_unaligned.
265 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
267 (REPLACE_ELT): New mode iterator.
268 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
269 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
270 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
271 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
272 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
273 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
274 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
276 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
277 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
278 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
279 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
280 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
281 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
282 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
283 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
284 * doc/extend.texi: Add description for vec_replace_elt and
285 vec_replace_unaligned builtins.
287 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
289 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
290 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
291 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
292 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
293 VINSERTVPRHR, VINSERTVPRWR): New builtins.
294 (INSERTL, INSERTH): New builtins.
295 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
296 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
297 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
298 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
299 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
300 P10_BUILTIN_VINSERTVPRWL): Add case entries.
301 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
303 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
304 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
305 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
306 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
307 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
309 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
311 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
312 (vextractl<mode>, vextractr<mode>)
313 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
315 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
316 (vextractl<mode>, vextractr<mode>)
317 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
319 * doc/extend.texi: Update documentation for vec_extractl.
320 Replace builtin name vec_extractr with vec_extracth. Update
321 description of vec_extracth.
323 2020-08-04 Jim Wilson <jimw@sifive.com>
325 * doc/invoke.texi (AArch64 Options): Delete duplicate
326 -mstack-protector-guard docs.
328 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
330 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
331 (umulhi3_highpart, umulsi3_highpart): New instructions.
333 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
335 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
336 (R_AMDGPU_ABS32_LO): Delete.
337 (R_AMDGPU_ABS32_HI): Delete.
338 (R_AMDGPU_ABS64): Delete.
339 (R_AMDGPU_REL32): Delete.
340 (R_AMDGPU_REL64): Delete.
341 (R_AMDGPU_ABS32): Delete.
342 (R_AMDGPU_GOTPCREL): Delete.
343 (R_AMDGPU_GOTPCREL32_LO): Delete.
344 (R_AMDGPU_GOTPCREL32_HI): Delete.
345 (R_AMDGPU_REL32_LO): Delete.
346 (R_AMDGPU_REL32_HI): Delete.
348 (R_AMDGPU_RELATIVE64): Delete.
350 2020-08-04 Omar Tahir <omar.tahir@arm.com>
352 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
354 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
356 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
357 redundant extra_cost variable.
359 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
361 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
362 Use FLOAT_MODE_P macro instead of enumerating all floating-point
363 modes and add global flag FLAG_AUTO_FP.
365 2020-08-04 Jakub Jelinek <jakub@redhat.com>
367 * doc/extend.texi (symver): Add @cindex for symver function attribute.
369 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
371 PR tree-optimization/95433
372 * match.pd (X * C1 == C2): New transformation.
374 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
376 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
377 (format_integer): Same.
378 (handle_printf_call): Same.
380 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
382 * config/gcn/gcn.md ("<expander>ti3"): New.
384 2020-08-04 Richard Biener <rguenther@suse.de>
386 PR tree-optimization/88240
387 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
388 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
389 (vn_reference_insert_pieces): Likewise.
390 (visit_reference_op_call): Likewise.
391 (visit_reference_op_load): Track whether a ref was punned.
392 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
393 insertion on punned floating point loads.
395 2020-08-04 Sudakshina Das <sudi.das@arm.com>
397 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
399 (aarch64_gen_load_pair): Likewise.
400 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
401 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
404 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
406 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
408 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
409 target supports option.
411 2020-08-04 Tom de Vries <tdevries@suse.de>
414 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
416 2020-08-04 Jakub Jelinek <jakub@redhat.com>
419 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
420 call with GIMPLE_NOP if there is no lhs.
422 2020-08-04 Jakub Jelinek <jakub@redhat.com>
425 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
426 argument. Return false instead of gcc_unreachable if it is true and
427 get_addr_base_and_unit_offset returns NULL.
428 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
430 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
432 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
433 Call is_gimple_min_invariant dropped from previous patch.
435 2020-08-04 Jakub Jelinek <jakub@redhat.com>
437 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
438 compute number of iterations at runtime more efficiently.
439 (expand_omp_for_init_vars): Adjust immediate dominators.
440 (extract_omp_for_update_vars): Likewise.
442 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
444 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
447 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
449 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
451 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
453 * vr-values.c (test_for_singularity): Use irange API.
454 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
455 special case VR_RANGE.
457 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
459 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
462 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
464 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
467 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
469 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
470 * tree-ssanames.h (get_range_info): Same.
472 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
474 * fold-const.c (expr_not_equal_to): Adjust for irange API.
476 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
478 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
480 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
482 PR rtl-optimization/71309
483 * dse.c (find_shift_sequence): Use subreg of shifted from high part
484 register to avoid loading from address.
486 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
488 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
491 2020-08-03 Nathan Sidwell <nathan@acm.org>
493 * doc/invoke.texi: Refer to c++20
495 2020-08-03 Julian Brown <julian@codesourcery.com>
496 Thomas Schwinge <thomas@codesourcery.com>
498 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
499 without a preceding data-movement mapping.
501 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
503 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
505 (DEF_MIN_OSX_VERSION): Only define if there's no existing
508 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
510 * config/darwin.c (IN_TARGET_CODE): Remove.
511 (darwin_mergeable_constant_section): Handle poly-int machine modes.
512 (machopic_select_rtx_section): Likewise.
514 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
516 PR tree-optimization/96430
517 * range-op.cc (operator_tests): Do not shift by 31 on targets with
518 integer's smaller than 32 bits.
520 2020-08-03 Martin Jambor <mjambor@suse.cz>
522 * hsa-brig-format.h: Moved to brig/brigfrontend.
523 * hsa-brig.c: Removed.
524 * hsa-builtins.def: Likewise.
525 * hsa-common.c: Likewise.
526 * hsa-common.h: Likewise.
527 * hsa-dump.c: Likewise.
528 * hsa-gen.c: Likewise.
529 * hsa-regalloc.c: Likewise.
530 * ipa-hsa.c: Likewise.
531 * omp-grid.c: Likewise.
532 * omp-grid.h: Likewise.
533 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
534 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
535 hsa-dump.o, ipa-hsa.c and omp-grid.o.
536 (GTFILES): Removed hsa-common.c and omp-expand.c.
537 * builtins.def: Remove processing of hsa-builtins.def.
538 (DEF_HSA_BUILTIN): Remove.
539 * common.opt (flag_disable_hsa): Remove.
541 * config.in (ENABLE_HSA): Removed.
542 * configure.ac: Removed handling configuration for hsa offloading.
543 (ENABLE_HSA): Removed.
544 * configure: Regenerated.
545 * doc/install.texi (--enable-offload-targets): Remove hsa from the
547 (--with-hsa-runtime): Reword to reference any HSA run-time, not
548 specifically HSA offloading.
549 * doc/invoke.texi (Option Summary): Remove -Whsa.
550 (Warning Options): Likewise.
551 (Optimize Options): Remove hsa-gen-debug-stores.
552 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
554 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
555 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
556 (dump_gimple_omp_block): Likewise.
557 (pp_gimple_stmt_1): Likewise.
558 * gimple-walk.c (walk_gimple_stmt): Likewise.
559 * gimple.c (gimple_build_omp_grid_body): Removed function.
560 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
561 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
562 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
563 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
564 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
565 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
567 (gimple_build_omp_grid_body): Removed declaration.
568 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
569 (gimple_omp_for_grid_phony): Removed.
570 (gimple_omp_for_set_grid_phony): Likewise.
571 (gimple_omp_for_grid_intra_group): Likewise.
572 (gimple_omp_for_grid_intra_group): Likewise.
573 (gimple_omp_for_grid_group_iter): Likewise.
574 (gimple_omp_for_set_grid_group_iter): Likewise.
575 (gimple_omp_parallel_grid_phony): Likewise.
576 (gimple_omp_parallel_set_grid_phony): Likewise.
577 (gimple_omp_teams_grid_phony): Likewise.
578 (gimple_omp_teams_set_grid_phony): Likewise.
579 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
580 * lto-section-in.c (lto_section_name): Removed hsa.
581 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
582 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
584 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
585 (parallel_needs_hsa_kernel_p): Removed.
586 (grid_launch_attributes_trees): Likewise.
587 (grid_launch_attributes_trees): Likewise.
588 (grid_create_kernel_launch_attr_types): Likewise.
589 (grid_insert_store_range_dim): Likewise.
590 (grid_get_kernel_launch_attributes): Likewise.
591 (get_target_arguments): Remove code passing HSA grid sizes.
592 (grid_expand_omp_for_loop): Remove.
593 (grid_arg_decl_map): Likewise.
594 (grid_remap_kernel_arg_accesses): Likewise.
595 (grid_expand_target_grid_body): Likewise.
596 (expand_omp): Remove call to grid_expand_target_grid_body.
597 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
598 * omp-general.c: Do not include hsa-common.h.
599 (omp_maybe_offloaded): Do not check for HSA offloading.
600 (omp_context_selector_matches): Likewise.
601 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
602 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
603 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
604 (scan_omp_parallel): Remove handling of the phoney variant.
605 (check_omp_nesting_restrictions): Remove handling of
606 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
607 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
608 (lower_omp_for_lastprivate): Remove handling of gridified loops.
609 (lower_omp_for): Remove phony loop handling.
610 (lower_omp_taskreg): Remove phony construct handling.
611 (lower_omp_teams): Likewise.
612 (lower_omp_grid_body): Removed.
613 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
614 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
615 * opts.c (common_handle_option): Do not handle hsa when processing
617 * params.opt (hsa-gen-debug-stores): Remove.
618 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
619 * timevar.def: Remove TV_IPA_HSA.
620 * toplev.c: Do not include hsa-common.h.
621 (compile_file): Do not call hsa_output_brig.
622 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
623 (tree_omp_clause): Remove union field dimension.
624 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
625 OMP_CLAUSE__GRIDDIM_ case.
626 (convert_local_omp_clauses): Likewise.
627 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
628 (make_pass_ipa_hsa): Likewise.
629 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
631 * tree.c (omp_clause_num_ops): Remove the element corresponding to
632 OMP_CLAUSE__GRIDDIM_.
633 (omp_clause_code_name): Likewise.
634 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
635 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
636 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
637 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
639 2020-08-03 Bu Le <bule1@huawei.com>
641 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
644 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
646 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
648 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
650 PR rtl-optimization/95696
651 * regrename.c (regrename_analyze): New param include_all_block_p
652 with default value TRUE. If set to false, avoid disrupting SMS
654 * regrename.h (regrename_analyze): Adjust prototype.
656 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
658 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
659 * doc/tm.texi: Regenerate.
661 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
663 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
665 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
667 * config/aarch64/aarch64-cores.def (a64fx): New core.
668 * config/aarch64/aarch64-tune.md: Regenerated.
669 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
670 * doc/invoke.texi: Add a64fx to the list.
672 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
674 PR rtl-optimization/61494
675 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
676 simplify x - 0.0 with -fsignaling-nans.
678 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
680 * genmatch.c (decision_tree::gen): Emit stub functions for
681 tree code operand counts that have no simplifications.
682 (main): Correct comment typo.
684 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
686 * gimple-ssa-sprintf.c: Fix typos in comments.
688 2020-08-03 Tamar Christina <tamar.christina@arm.com>
690 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
692 2020-08-03 Richard Biener <rguenther@suse.de>
694 * doc/match-and-simplify.texi: Amend accordingly.
696 2020-08-03 Richard Biener <rguenther@suse.de>
698 * genmatch.c (parser::gimple): New.
699 (parser::parser): Initialize gimple flag member.
700 (parser::parse_expr): Error on ! operator modifier when
701 not targeting GIMPLE.
702 (main): Pass down gimple flag to parser ctor.
704 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
706 * Makefile.in (GTFILES): Move value-range.h up.
707 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
708 * ipa-cp.c (initialize_node_lattices): Call value_range
710 (ipcp_propagate_stage): Use in-place new so value_range construct
712 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
713 vec instead of GCC's vec<>.
714 (evaluate_properties_for_edge): Adjust for std vec.
715 (ipa_fn_summary_t::duplicate): Same.
716 (estimate_ipcp_clone_size_and_time): Same.
717 * ipa-prop.c (ipa_get_value_range): Use in-place new for
719 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
720 * range-op.cc (empty_range_check): Rename to...
721 (empty_range_varying): ...this and adjust for varying.
722 (undefined_shift_range_check): Adjust for irange.
723 (range_operator::wi_fold): Same.
724 (range_operator::fold_range): Adjust for irange. Special case
725 single pairs for performance.
726 (range_operator::op1_range): Adjust for irange.
727 (range_operator::op2_range): Same.
728 (value_range_from_overflowed_bounds): Same.
729 (value_range_with_overflow): Same.
730 (create_possibly_reversed_range): Same.
733 (range_true_and_false): Same.
734 (get_bool_state): Adjust for irange and tweak for performance.
735 (operator_equal::fold_range): Adjust for irange.
736 (operator_equal::op1_range): Same.
737 (operator_equal::op2_range): Same.
738 (operator_not_equal::fold_range): Same.
739 (operator_not_equal::op1_range): Same.
740 (operator_not_equal::op2_range): Same.
745 (operator_lt::fold_range): Same.
746 (operator_lt::op1_range): Same.
747 (operator_lt::op2_range): Same.
748 (operator_le::fold_range): Same.
749 (operator_le::op1_range): Same.
750 (operator_le::op2_range): Same.
751 (operator_gt::fold_range): Same.
752 (operator_gt::op1_range): Same.
753 (operator_gt::op2_range): Same.
754 (operator_ge::fold_range): Same.
755 (operator_ge::op1_range): Same.
756 (operator_ge::op2_range): Same.
757 (operator_plus::wi_fold): Same.
758 (operator_plus::op1_range): Same.
759 (operator_plus::op2_range): Same.
760 (operator_minus::wi_fold): Same.
761 (operator_minus::op1_range): Same.
762 (operator_minus::op2_range): Same.
763 (operator_min::wi_fold): Same.
764 (operator_max::wi_fold): Same.
765 (cross_product_operator::wi_cross_product): Same.
766 (operator_mult::op1_range): New.
767 (operator_mult::op2_range): New.
768 (operator_mult::wi_fold): Adjust for irange.
769 (operator_div::wi_fold): Same.
770 (operator_exact_divide::op1_range): Same.
771 (operator_lshift::fold_range): Same.
772 (operator_lshift::wi_fold): Same.
773 (operator_lshift::op1_range): New.
774 (operator_rshift::op1_range): New.
775 (operator_rshift::fold_range): Adjust for irange.
776 (operator_rshift::wi_fold): Same.
777 (operator_cast::truncating_cast_p): Abstract out from
778 operator_cast::fold_range.
779 (operator_cast::fold_range): Adjust for irange and tweak for
781 (operator_cast::inside_domain_p): Abstract out from fold_range.
782 (operator_cast::fold_pair): Same.
783 (operator_cast::op1_range): Use abstracted methods above. Adjust
784 for irange and tweak for performance.
785 (operator_logical_and::fold_range): Adjust for irange.
786 (operator_logical_and::op1_range): Same.
787 (operator_logical_and::op2_range): Same.
788 (unsigned_singleton_p): New.
789 (operator_bitwise_and::remove_impossible_ranges): New.
790 (operator_bitwise_and::fold_range): New.
791 (wi_optimize_and_or): Adjust for irange.
792 (operator_bitwise_and::wi_fold): Same.
793 (set_nonzero_range_from_mask): New.
794 (operator_bitwise_and::simple_op1_range_solver): New.
795 (operator_bitwise_and::op1_range): Adjust for irange.
796 (operator_bitwise_and::op2_range): Same.
797 (operator_logical_or::fold_range): Same.
798 (operator_logical_or::op1_range): Same.
799 (operator_logical_or::op2_range): Same.
800 (operator_bitwise_or::wi_fold): Same.
801 (operator_bitwise_or::op1_range): Same.
802 (operator_bitwise_or::op2_range): Same.
803 (operator_bitwise_xor::wi_fold): Same.
804 (operator_bitwise_xor::op1_range): New.
805 (operator_bitwise_xor::op2_range): New.
806 (operator_trunc_mod::wi_fold): Adjust for irange.
807 (operator_logical_not::fold_range): Same.
808 (operator_logical_not::op1_range): Same.
809 (operator_bitwise_not::fold_range): Same.
810 (operator_bitwise_not::op1_range): Same.
811 (operator_cst::fold_range): Same.
812 (operator_identity::fold_range): Same.
813 (operator_identity::op1_range): Same.
814 (class operator_unknown): New.
815 (operator_unknown::fold_range): New.
816 (class operator_abs): Adjust for irange.
817 (operator_abs::wi_fold): Same.
818 (operator_abs::op1_range): Same.
819 (operator_absu::wi_fold): Same.
820 (class operator_negate): Same.
821 (operator_negate::fold_range): Same.
822 (operator_negate::op1_range): Same.
823 (operator_addr_expr::fold_range): Same.
824 (operator_addr_expr::op1_range): Same.
825 (pointer_plus_operator::wi_fold): Same.
826 (pointer_min_max_operator::wi_fold): Same.
827 (pointer_and_operator::wi_fold): Same.
828 (pointer_or_operator::op1_range): New.
829 (pointer_or_operator::op2_range): New.
830 (pointer_or_operator::wi_fold): Adjust for irange.
831 (integral_table::integral_table): Add entries for IMAGPART_EXPR
832 and POINTER_DIFF_EXPR.
833 (range_cast): Adjust for irange.
836 (widest_irange_tests): New.
837 (multi_precision_range_tests): New.
838 (operator_tests): New.
840 * range-op.h (class range_operator): Adjust for irange.
842 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
843 tweak for performance.
844 (range_fold_binary_expr): Same.
845 (masked_increment): Change to extern.
846 * tree-vrp.h (masked_increment): New.
847 * tree.c (cache_wide_int_in_type_cache): New function abstracted
848 out from wide_int_to_tree_1.
849 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
850 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
852 (value_range_equiv::move): Same.
853 (value_range_equiv::check): Adjust for irange.
854 (value_range_equiv::intersect): Same.
855 (value_range_equiv::union_): Same.
856 (value_range_equiv::dump): Same.
857 * value-range.cc (irange::operator=): Same.
858 (irange::maybe_anti_range): New.
859 (irange::copy_legacy_range): New.
860 (irange::set_undefined): Adjust for irange.
861 (irange::swap_out_of_order_endpoints): Abstract out from set().
862 (irange::set_varying): Adjust for irange.
863 (irange::irange_set): New.
864 (irange::irange_set_anti_range): New.
865 (irange::set): Adjust for irange.
866 (value_range::set_nonzero): Move to header file.
867 (value_range::set_zero): Move to header file.
868 (value_range::check): Rename to...
869 (irange::verify_range): ...this.
870 (value_range::num_pairs): Rename to...
871 (irange::legacy_num_pairs): ...this, and adjust for irange.
872 (value_range::lower_bound): Rename to...
873 (irange::legacy_lower_bound): ...this, and adjust for irange.
874 (value_range::upper_bound): Rename to...
875 (irange::legacy_upper_bound): ...this, and adjust for irange.
876 (value_range::equal_p): Rename to...
877 (irange::legacy_equal_p): ...this.
878 (value_range::operator==): Move to header file.
879 (irange::equal_p): New.
880 (irange::symbolic_p): Adjust for irange.
881 (irange::constant_p): Same.
882 (irange::singleton_p): Same.
883 (irange::value_inside_range): Same.
884 (irange::may_contain_p): Same.
885 (irange::contains_p): Same.
886 (irange::normalize_addresses): Same.
887 (irange::normalize_symbolics): Same.
888 (irange::legacy_intersect): Same.
889 (irange::legacy_union): Same.
890 (irange::union_): Same.
891 (irange::intersect): Same.
892 (irange::irange_union): New.
893 (irange::irange_intersect): New.
895 (irange::invert): Adjust for irange.
896 (dump_bound_with_infinite_markers): New.
897 (irange::dump): Adjust for irange.
898 (debug): Add irange versions.
899 (range_has_numeric_bounds_p): Adjust for irange.
900 (vrp_val_max): Move to header file.
901 (vrp_val_min): Move to header file.
902 (DEFINE_INT_RANGE_GC_STUBS): New.
903 (DEFINE_INT_RANGE_INSTANCE): New.
904 * value-range.h (class irange): New.
905 (class int_range): New.
906 (class value_range): Rename to a instantiation of int_range.
907 (irange::legacy_mode_p): New.
908 (value_range::value_range): Remove.
910 (irange::num_pairs): Adjust for irange.
911 (irange::type): Adjust for irange.
912 (irange::tree_lower_bound): New.
913 (irange::tree_upper_bound): New.
914 (irange::type): Adjust for irange.
917 (irange::varying_p): Same.
918 (irange::undefined_p): Same.
919 (irange::zero_p): Same.
920 (irange::nonzero_p): Same.
921 (irange::supports_type_p): Same.
922 (range_includes_zero_p): Same.
925 (irange::irange): New.
926 (int_range::int_range): New.
927 (int_range::operator=): New.
928 (irange::set): Moved from value-range.cc and adjusted for irange.
929 (irange::set_undefined): Same.
930 (irange::set_varying): Same.
931 (irange::operator==): Same.
932 (irange::lower_bound): Same.
933 (irange::upper_bound): Same.
934 (irange::union_): Same.
935 (irange::intersect): Same.
936 (irange::set_nonzero): Same.
937 (irange::set_zero): Same.
938 (irange::normalize_min_max): New.
939 (vrp_val_max): Move from value-range.cc.
941 * vr-values.c (vr_values::get_lattice_entry): Call value_range
944 2020-08-02 Sergei Trofimovich <siarheit@google.com>
947 * var-tracking.c (vt_find_locations): Fully initialize
948 all 'in_pending' bits.
950 2020-08-01 Jan Hubicka <jh@suse.cz>
952 * symtab.c (symtab_node::verify_base): Verify order.
953 (symtab_node::verify_symtab_nodes): Verify order.
955 2020-08-01 Jan Hubicka <jh@suse.cz>
957 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
959 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
961 * config/csky/csky_opts.h (float_abi_type): New.
962 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
963 (TARGET_HARD_FLOAT): New.
964 (TARGET_HARD_FLOAT_ABI): New.
965 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
966 * config/csky/csky.opt (mfloat-abi): New.
967 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
969 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
971 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
973 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
974 Tom de Vries <tdevries@suse.de>
977 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
978 (TARGET_TRULY_NOOP_TRUNCATION): Define.
980 2020-07-31 Richard Biener <rguenther@suse.de>
983 * langhooks-def.h (lhd_finalize_early_debug): Declare.
984 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
985 (LANG_HOOKS_INITIALIZER): Amend.
986 * langhooks.c: Include cgraph.h and debug.h.
987 (lhd_finalize_early_debug): Default implementation from
988 former code in finalize_compilation_unit.
989 * langhooks.h (lang_hooks::finalize_early_debug): Add.
990 * cgraphunit.c (symbol_table::finalize_compilation_unit):
991 Call the finalize_early_debug langhook.
993 2020-07-31 Richard Biener <rguenther@suse.de>
995 * genmatch.c (expr::force_leaf): Add and initialize.
996 (expr::gen_transform): Honor force_leaf by passing
997 NULL as sequence argument to maybe_push_res_to_seq.
998 (parser::parse_expr): Allow ! marker on result expression
1000 * doc/match-and-simplify.texi: Amend.
1002 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
1004 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
1005 taken costs for prologue and epilogue if they don't exist.
1006 (vect_estimate_min_profitable_iters): Likewise.
1008 2020-07-31 Martin Liska <mliska@suse.cz>
1010 * cgraph.h: Remove leading empty lines.
1011 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
1013 (struct cgraph_order_sort): Add constructors.
1014 (cgraph_order_sort::process): New.
1015 (cgraph_order_cmp): New.
1016 (output_in_order): Simplify and push nodes to vector.
1018 2020-07-31 Richard Biener <rguenther@suse.de>
1021 * fold-const.c (fold_range_test): Special-case constant
1022 LHS for short-circuiting operations.
1024 2020-07-31 Martin Liska <mliska@suse.cz>
1026 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
1028 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
1030 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
1031 Add new argument ATTRS.
1032 (aarch64_call_properties): New function.
1033 (aarch64_modifies_global_state_p): Likewise.
1034 (aarch64_reads_global_state_p): Likewise.
1035 (aarch64_could_trap_p): Likewise.
1036 (aarch64_add_attribute): Likewise.
1037 (aarch64_get_attributes): Likewise.
1038 (aarch64_init_simd_builtins): Add attributes for each built-in function.
1040 2020-07-31 Richard Biener <rguenther@suse.de>
1043 * var-tracking.c (vt_find_locations): Use
1044 rev_post_order_and_mark_dfs_back_seme and separately iterate
1047 2020-07-31 Richard Biener <rguenther@suse.de>
1049 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
1051 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
1052 (tag_header): New helper.
1053 (cmp_edge_dest_pre): Likewise.
1054 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
1055 find SCC exits and perform a DFS walk with extra edges to
1056 compute a RPO with adjacent SCC members when requesting an
1057 iteration optimized order and populate the toplevel SCC array.
1058 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
1059 of max_rpo and fill it in from SCC extent info instead.
1061 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
1063 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
1064 (vec_test_lsbb_all_zeros): New define.
1065 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
1067 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
1068 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
1069 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
1070 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
1071 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
1072 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
1073 (xvtlsbbo, xvtlsbbz): New instruction expands.
1075 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
1077 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
1078 * config/riscv/riscv.c (riscv_option_override): Handle
1080 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
1081 flexible stack protector guard settings.
1082 (stack_protect_set_<mode>): Ditto.
1083 (stack_protect_test): Ditto.
1084 (stack_protect_test_<mode>): Ditto.
1085 * config/riscv/riscv.opt (mstack-protector-guard=,
1086 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
1088 * doc/invoke.texi (Option Summary) [RISC-V Options]:
1089 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
1090 -mstack-protector-guard-offset=.
1091 (RISC-V Options): Ditto.
1093 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
1096 * configure: Regenerated.
1098 2020-07-30 Richard Biener <rguenther@suse.de>
1100 PR tree-optimization/96370
1101 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
1102 code parameter and use it instead of picking it up from
1103 the stmt that is being rewritten.
1104 (reassociate_bb): Pass down the operation code.
1106 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
1107 Tom de Vries <tdevries@suse.de>
1109 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
1110 (VECELEM): New mode attribute for a vector's uppercase element mode.
1111 (Vecelem): New mode attribute for a vector's lowercase element mode.
1112 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
1113 (*vec_set<mode>_3): New instructions.
1114 (vec_set<mode>): New expander to generate one of the above insns.
1115 (vec_extract<mode><Vecelem>): New instruction.
1117 2020-07-30 Martin Liska <mliska@suse.cz>
1120 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
1121 -m32. Start using libcall from 128+ bytes.
1123 2020-07-30 Martin Liska <mliska@suse.cz>
1125 * config/i386/x86-tune-costs.h: Change code formatting.
1127 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
1129 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
1131 2020-07-29 Fangrui Song <maskray@google.com>
1134 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
1135 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
1137 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
1139 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
1141 (arm_mve_mode_and_operands_type_check): Declare prototype.
1142 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
1143 _arm_coproc_mem_operand.
1144 (arm_coproc_mem_operand_wb): New function to cover full, limited
1146 (arm_coproc_mem_operand_no_writeback): New constraint for memory
1147 operand with no writeback.
1148 (arm_print_operand): Extend 'E' specifier for memory operand
1149 that does not support writeback.
1150 (arm_mve_mode_and_operands_type_check): New constraint check for
1151 MVE memory operands.
1152 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
1154 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
1156 (*mov_store_vfp_hf16): New pattern for vstr.16.
1157 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
1159 2020-07-29 Richard Biener <rguenther@suse.de>
1161 PR tree-optimization/96349
1162 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
1163 condition runs into a loop PHI with an abnormal entry value give up.
1165 2020-07-29 Richard Biener <rguenther@suse.de>
1167 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
1168 cache if we removed any SIMD UID SSA defs.
1169 * gimple-loop-interchange.cc (pass_linterchange::execute):
1170 Reset the scev cache if we interchanged a loop.
1172 2020-07-29 Richard Biener <rguenther@suse.de>
1174 PR tree-optimization/95679
1175 * tree-ssa-propagate.h
1176 (substitute_and_fold_engine::propagate_into_phi_args): Return
1177 whether anything changed.
1178 * tree-ssa-propagate.c
1179 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
1180 (substitute_and_fold_dom_walker::before_dom_children): Update
1183 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1185 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
1186 Ensure that loop variable npeel_tmp advances in each iteration.
1188 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
1190 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
1192 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
1194 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
1195 default_elf_asm_output_external.
1197 2020-07-28 Sergei Trofimovich <siarheit@google.com>
1200 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
1201 unoptimized callers as undead.
1203 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
1204 Richard Biener <rguenther@suse.de>
1206 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
1207 (parity(~x) -> parity(x)): New simplification.
1208 (parity(x)^parity(y) -> parity(x^y)): New simplification.
1209 (parity(x&1) -> x&1): New simplification.
1210 (popcount(x) -> x>>C): New simplification.
1212 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
1213 Tom de Vries <tdevries@suse.de>
1215 * config/nvptx/nvptx.md (extendqihi2): New instruction.
1216 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
1218 2020-07-28 Jakub Jelinek <jakub@redhat.com>
1221 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
1222 instead of trying to rediscover them in the body.
1223 (initialize_argument_information): Adjust caller.
1225 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
1227 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
1228 to determine peel_iters_epilogue to...
1229 (vect_get_peel_iters_epilogue): ...this new function.
1230 (vect_estimate_min_profitable_iters): Refactor cost calculation on
1231 peel_iters_prologue and peel_iters_epilogue.
1233 2020-07-27 Martin Sebor <msebor@redhat.com>
1235 PR tree-optimization/84079
1236 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
1237 Only allow just-past-the-end references for the most significant
1240 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
1243 * opts.c (check_alignment_argument): Set the -falign-Name
1244 on/off flag on and set the -falign-Name string value null,
1245 when the command-line specified argument is zero.
1247 2020-07-27 Martin Liska <mliska@suse.cz>
1249 PR tree-optimization/96058
1250 * expr.c (string_constant): Build string_constant only
1251 for a type that has same precision as char_type_node
1252 and is an integral type.
1254 2020-07-27 Richard Biener <rguenther@suse.de>
1256 * var-tracking.c (variable_tracking_main_1): Remove call
1257 to mark_dfs_back_edges.
1259 2020-07-27 Martin Liska <mliska@suse.cz>
1261 PR tree-optimization/96128
1262 * tree-vect-generic.c (expand_vector_comparison): Do not expand
1263 vector comparison with VEC_COND_EXPR.
1265 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
1268 * common.opt: Add -fcf-protection=check.
1269 * flag-types.h (cf_protection_level): Add CF_CHECK.
1270 * lto-wrapper.c (merge_and_complain): Issue an error for
1271 mismatching -fcf-protection values with -fcf-protection=check.
1272 Otherwise, merge -fcf-protection values.
1273 * doc/invoke.texi: Document -fcf-protection=check.
1275 2020-07-27 Martin Liska <mliska@suse.cz>
1278 * symbol-summary.h: Call vec_safe_reserve before grow is called
1279 in order to grow to a reasonable size.
1280 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
1283 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
1285 * configure.ac (out-of-tree linker .hidden support): Don't turn off
1286 for mmix-knuth-mmixware.
1287 * configure: Regenerate.
1289 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
1291 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1292 Set the default value for -mblock-ops-unaligned-vsx.
1293 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
1294 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
1296 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
1298 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
1299 with default_asm_output_ident_directive.
1301 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
1303 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
1304 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
1306 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
1307 Clement Chigot <clement.chigot@atos.net>
1309 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
1311 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
1314 (ASM_CPU_SPEC): Remove vsx and altivec options.
1315 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
1318 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
1319 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
1320 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
1323 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
1326 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
1327 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
1329 (CPLUSPLUS_CPP_SPEC): Same.
1332 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
1333 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
1334 * config/rs6000/defaultaix64.h: Delete.
1336 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
1338 * config/rs6000/rs6000.opt: Delete -mpower10.
1340 2020-07-24 Alexandre Oliva <oliva@adacore.com>
1342 * config/i386/intelmic-mkoffload.c
1343 (generate_target_descr_file): Use dumppfx for save_temps
1344 files. Pass -dumpbase et al down to the compiler.
1345 (generate_target_offloadend_file): Likewise.
1346 (generate_host_descr_file): Likewise.
1347 (prepare_target_image): Likewise. Move out_obj_filename
1349 (main): ... here. Detect -dumpbase, set dumppfx too.
1351 2020-07-24 Alexandre Oliva <oliva@adacore.com>
1354 * gcc.c (process_command): Adjust and document conditions to
1357 2020-07-24 Matthias Klose <doko@ubuntu.com>
1359 * config/aarch64/aarch64.c (+aarch64_offload_options,
1360 TARGET_OFFLOAD_OPTIONS): New.
1362 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
1365 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
1367 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
1369 PR rtl-optimization/96298
1370 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
1371 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
1373 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
1375 PR gcov-profile/96267
1376 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
1378 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
1380 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
1381 (rs6000_adjust_vect_cost_per_stmt): ... here.
1382 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
1383 rs6000_adjust_vect_cost_per_stmt.
1385 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
1387 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
1388 IFN_LEN_LOAD and IFN_LEN_STORE.
1389 (get_alias_ptr_type_for_ptr_address): Likewise.
1391 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
1394 * asan.c (asan_shadow_offset_set_p): New.
1395 * asan.h (asan_shadow_offset_set_p): Ditto.
1396 * toplev.c (process_options): Allow -fsanitize=kernel-address
1397 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
1398 asan stack protection is enabled.
1400 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
1403 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
1404 little-endian memory ordering.
1406 2020-07-22 Nathan Sidwell <nathan@acm.org>
1408 * dumpfile.c (parse_dump_option): Deal with filenames
1411 2020-07-22 Nathan Sidwell <nathan@acm.org>
1413 * incpath.c (add_path): Avoid multiple strlen calls.
1415 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1417 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
1418 is not NULL_RTX before use.
1420 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1422 * expr.c (convert_modes): Allow a constant integer to be converted to
1423 any scalar int mode.
1425 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
1427 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
1428 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
1429 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
1430 Change mode parameter to machine_mode.
1431 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
1433 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
1434 Change mode parameter to machine_mode.
1435 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
1436 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
1438 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1440 * doc/languages.texi: Fix “then”/“than” typo.
1442 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
1445 * config/i386/i386-protos.h (ix86_local_alignment): Add
1446 another function parameter may_lower alignment. Default is
1448 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
1450 (ix86_local_alignment): Amend ix86_local_alignment to accept
1451 another parameter may_lower. If may_lower is true, new align
1452 may be lower than incoming alignment. If may_lower is false,
1453 new align will be greater or equal to incoming alignment.
1454 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
1455 * doc/tm.texi: Regenerate.
1456 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
1458 * target.def (lower_local_decl_alignment): New hook.
1460 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
1463 * config/i386/sync.md (mfence_sse2): Enable for
1464 TARGET_64BIT and TARGET_SSE2.
1465 (mfence_nosse): Always enable.
1467 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1469 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
1471 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
1472 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
1473 msp430_do_not_relax_short_jumps.
1475 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1477 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
1479 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1481 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
1484 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
1486 PR rtl-optimization/89310
1487 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
1489 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
1491 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
1492 allocated size and set current_function_static_stack_size, if
1493 flag_stack_usage_info.
1495 2020-07-20 Sergei Trofimovich <siarheit@google.com>
1498 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
1499 to get crtendS.o for !no-pie mode.
1500 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
1502 2020-07-20 Yang Yang <yangyang305@huawei.com>
1504 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
1505 VIEW_CONVERT_EXPRs if the arguments types and return type
1506 of simd clone function are distinct with the vectype of stmt.
1508 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
1511 * config/i386/i386.h (TARGET_AVOID_MFENCE):
1512 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
1513 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
1514 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
1515 referred memory in word_mode.
1516 (mem_thread_fence): Do not generate mfence_sse2 pattern when
1517 TARGET_AVOID_MFENCE is true.
1518 (atomic_store<mode>): Update for rename.
1519 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
1520 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
1522 2020-07-20 Martin Sebor <msebor@redhat.com>
1526 * builtins.c (inline_expand_builtin_string_cmp): Rename...
1527 (inline_expand_builtin_bytecmp): ...to this.
1528 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
1529 (expand_builtin_memory_copy_args): Handle object representations
1530 with embedded nul bytes.
1531 (expand_builtin_memcmp): Same.
1532 (expand_builtin_strcmp): Adjust call to naming change.
1533 (expand_builtin_strncmp): Same.
1534 * expr.c (string_constant): Create empty strings with nonzero size.
1535 * fold-const.c (c_getstr): Rename locals and update comments.
1536 * tree.c (build_string): Accept null pointer argument.
1537 (build_string_literal): Same.
1538 * tree.h (build_string): Provide a default.
1539 (build_string_literal): Same.
1541 2020-07-20 Richard Biener <rguenther@suse.de>
1543 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
1544 write-only post array.
1546 2020-07-20 Jakub Jelinek <jakub@redhat.com>
1549 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
1550 of a bitfield not aligned on byte boundaries try to
1551 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
1552 adjust it depending on endianity.
1554 2020-07-20 Jakub Jelinek <jakub@redhat.com>
1557 * fold-const.c (native_encode_initializer): Handle bit-fields.
1559 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
1561 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1562 Set param_vect_partial_vector_usage to 0 explicitly.
1563 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
1564 * optabs-query.c (get_len_load_store_mode): New function.
1565 * optabs-query.h (get_len_load_store_mode): New declare.
1566 * params.opt (vect-partial-vector-usage): New.
1567 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
1568 handlings for vectorization using length-based partial vectors, call
1569 vect_gen_len for length generation, and rename some variables with
1570 items instead of scalars.
1571 (vect_set_loop_condition_partial_vectors): Add the handlings for
1572 vectorization using length-based partial vectors.
1573 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
1574 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1575 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
1576 epil_using_partial_vectors_p.
1577 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
1578 for lengths destruction.
1579 (vect_verify_loop_lens): New function.
1580 (vect_analyze_loop): Add handlings for epilogue of loop when it's
1581 marked to use vectorization using partial vectors.
1582 (vect_analyze_loop_2): Add the check to allow only one vectorization
1583 approach using partial vectorization at the same time. Check param
1584 vect-partial-vector-usage for partial vectors decision. Mark
1585 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
1586 considerable to use partial vectors. Call release_vec_loop_controls
1587 for lengths destruction.
1588 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
1589 using length-based partial vectors.
1590 (vect_record_loop_mask): Init factor to 1 for vectorization using
1591 mask-based partial vectors.
1592 (vect_record_loop_len): New function.
1593 (vect_get_loop_len): Likewise.
1594 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
1595 checks for vectorization using length-based partial vectors. Factor
1596 some code to lambda function get_valid_nvectors.
1597 (vectorizable_store): Add handlings when using length-based partial
1599 (vectorizable_load): Likewise.
1600 (vect_gen_len): New function.
1601 * tree-vectorizer.h (struct rgroup_controls): Add field factor
1602 mainly for length-based partial vectors.
1603 (vec_loop_lens): New typedef.
1604 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
1605 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
1606 (LOOP_VINFO_LENS): Likewise.
1607 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
1608 (vect_record_loop_len): New declare.
1609 (vect_get_loop_len): Likewise.
1610 (vect_gen_len): Likewise.
1612 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
1614 * config/mmix/mmix.c (mmix_option_override): Reinstate default
1615 integer-emitting targetm.asm_out pseudos when dumping detailed
1617 (mmix_assemble_integer): Update comment.
1619 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
1623 * config/i386/cpuid.h: Add include guard.
1626 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
1629 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
1631 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
1634 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
1635 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
1636 (define_attr "enabled"): Handle p9.
1638 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
1640 * function.c (assign_parm_setup_block): Use the macro
1641 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
1642 targetm.truly_noop_truncation directly.
1644 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
1648 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
1649 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
1650 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
1651 VF1_AVX512ER_128_256.
1653 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1655 * doc/sourcebuild.texi (dg-set-compiler-env-var,
1656 dg-set-target-env-var): Document.
1658 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1660 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
1662 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1664 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
1667 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1669 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
1670 (parse_field): Use std::string.
1671 (split_words, readline, find_field): New.
1672 (host_detect_local_cpu): Fix truncation issues.
1674 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
1676 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
1677 (ELFOSABI_AMDGPU_HSA): Likewise.
1678 (ELFABIVERSION_AMDGPU_HSA): Likewise.
1679 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
1680 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
1681 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
1684 2020-07-17 Andrew Pinski <apinksi@marvell.com>
1685 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
1688 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
1689 (aarch64_expand_vec_perm_const_1): Call it.
1690 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
1691 public, and add a "@" prefix.
1693 2020-07-17 Andrew Pinski <apinksi@marvell.com>
1694 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
1697 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
1698 (aarch64_expand_vec_perm_const_1): Call it.
1700 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
1702 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
1703 Add new field flags.
1704 (VAR1): Add new field FLAG in macro.
1720 (aarch64_general_fold_builtin): Likewise.
1721 (aarch64_general_gimple_fold_builtin): Likewise.
1722 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
1723 each built-in function.
1724 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
1726 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
1729 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
1730 expanders to generate the pattern.
1731 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
1732 '*' to have callable expanders.
1734 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
1735 Segher Boessenkool <segher@kernel.crashing.org>
1738 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
1741 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
1744 * config/i386/sync.md
1745 (peephole2 to remove unneded compare after CMPXCHG):
1746 New pattern, also handle XOR zeroing and load of -1 by OR.
1748 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
1750 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
1751 (ix86_adjust_stack_and_probe): Delete.
1752 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
1753 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
1754 a small dope beyond SIZE bytes.
1755 (ix86_emit_probe_stack_range): Use local variable.
1756 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
1757 and tidy up the stack checking code.
1758 * explow.c (get_stack_check_protect): Fix head comment.
1759 (anti_adjust_stack_and_probe_stack_clash): Likewise.
1760 (allocate_dynamic_stack_space): Add comment.
1761 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
1762 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
1764 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
1766 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
1767 (EM_AMDGPU): New macro.
1768 (ELFOSABI_AMDGPU_HSA): New macro.
1769 (ELFABIVERSION_AMDGPU_HSA): New macro.
1770 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
1771 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
1772 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
1773 (R_AMDGPU_NONE): New macro.
1774 (R_AMDGPU_ABS32_LO): New macro.
1775 (R_AMDGPU_ABS32_HI): New macro.
1776 (R_AMDGPU_ABS64): New macro.
1777 (R_AMDGPU_REL32): New macro.
1778 (R_AMDGPU_REL64): New macro.
1779 (R_AMDGPU_ABS32): New macro.
1780 (R_AMDGPU_GOTPCREL): New macro.
1781 (R_AMDGPU_GOTPCREL32_LO): New macro.
1782 (R_AMDGPU_GOTPCREL32_HI): New macro.
1783 (R_AMDGPU_REL32_LO): New macro.
1784 (R_AMDGPU_REL32_HI): New macro.
1785 (reserved): New macro.
1786 (R_AMDGPU_RELATIVE64): New macro.
1787 (gcn_s1_name): Delete global variable.
1788 (gcn_s2_name): Delete global variable.
1789 (gcn_o_name): Delete global variable.
1790 (gcn_cfile_name): Delete global variable.
1791 (files_to_cleanup): New global variable.
1792 (offload_abi): New global variable.
1793 (tool_cleanup): Use files_to_cleanup, not explicit list.
1794 (copy_early_debug_info): New function.
1795 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
1797 Create files_to_cleanup obstack.
1798 Recognize -march options.
1799 Copy early debug info from input .o files.
1801 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
1803 * Makefile.in (TAGS): Remove 'params.def'.
1805 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
1807 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
1808 targets that return false, indicating SUBREGs shouldn't be
1809 used, also need to provide a trunc?i?i2 optab that performs this
1811 * doc/tm.texi: Regenerate.
1813 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
1816 * config/i386/sync.md
1817 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
1819 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1822 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
1823 member to first_inner_iterations, adjust comment.
1824 * omp-general.c (omp_extract_for_data): Adjust for the above change.
1825 Always use n1first and n2first to compute it, rather than depending
1826 on single_nonrect_cond_code. Similarly, always compute factor
1827 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
1828 depending on single_nonrect_cond_code.
1829 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
1830 to first_inner_iterations and min_inner_iterationsd to
1831 first_inner_iterationsd.
1833 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1836 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
1837 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
1838 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
1839 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
1840 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
1841 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
1842 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
1843 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
1844 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
1845 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
1846 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
1847 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
1848 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
1849 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
1850 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
1851 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
1852 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
1855 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1858 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
1860 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
1861 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
1864 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
1866 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
1868 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
1870 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
1872 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
1873 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
1875 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
1877 PR preprocessor/49973
1879 * common.opt: Handle -ftabstop here instead of in c-family
1880 options. Add -fdiagnostics-column-unit= and
1881 -fdiagnostics-column-origin= options.
1882 * opts.c (common_handle_option): Handle the new options.
1883 * diagnostic-format-json.cc (json_from_expanded_location): Add
1884 diagnostic_context argument. Use it to convert column numbers as per
1886 (json_from_location_range): Likewise.
1887 (json_from_fixit_hint): Likewise.
1888 (json_end_diagnostic): Pass the new context argument to helper
1889 functions above. Add "column-origin" field to the output.
1890 (test_unknown_location): Add the new context argument to calls to
1892 (test_bad_endpoints): Likewise.
1893 * diagnostic-show-locus.c
1894 (exploc_with_display_col::exploc_with_display_col): Support
1896 (layout_point::layout_point): Make use of class
1897 exploc_with_display_col.
1898 (layout_range::layout_range): Likewise.
1899 (struct line_bounds): Clarify that the units are now always
1900 display columns. Rename members accordingly. Add constructor.
1901 (layout::print_source_line): Add support for tab expansion.
1902 (make_range): Adapt to class layout_range changes.
1903 (layout::maybe_add_location_range): Likewise.
1904 (layout::layout): Adapt to class exploc_with_display_col changes.
1905 (layout::calculate_x_offset_display): Support tabstop parameter.
1906 (layout::print_annotation_line): Adapt to struct line_bounds changes.
1907 (layout::print_line): Likewise.
1908 (line_label::line_label): Add diagnostic_context argument.
1909 (get_affected_range): Likewise.
1910 (get_printed_columns): Likewise.
1911 (layout::print_any_labels): Adapt to struct line_label changes.
1912 (class correction): Add m_tabstop member.
1913 (correction::correction): Add tabstop argument.
1914 (correction::compute_display_cols): Use m_tabstop.
1915 (class line_corrections): Add m_context member.
1916 (line_corrections::line_corrections): Add diagnostic_context argument.
1917 (line_corrections::add_hint): Use m_context to handle tabstops.
1918 (layout::print_trailing_fixits): Adapt to class line_corrections
1920 (test_layout_x_offset_display_utf8): Support tabstop parameter.
1921 (test_layout_x_offset_display_tab): New selftest.
1922 (test_one_liner_colorized_utf8): Likewise.
1923 (test_tab_expansion): Likewise.
1924 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
1925 (diagnostic_show_locus_c_tests): Likewise.
1926 (test_overlapped_fixit_printing): Adapt to helper class and
1928 (test_overlapped_fixit_printing_utf8): Likewise.
1929 (test_overlapped_fixit_printing_2): Likewise.
1930 * diagnostic.h (enum diagnostics_column_unit): New enum.
1931 (struct diagnostic_context): Add members for the new options.
1932 (diagnostic_converted_column): Declare.
1933 (json_from_expanded_location): Add new context argument.
1934 * diagnostic.c (diagnostic_initialize): Initialize new members.
1935 (diagnostic_converted_column): New function.
1936 (maybe_line_and_column): Be willing to output a column of 0.
1937 (diagnostic_get_location_text): Convert column number as per the new
1939 (diagnostic_report_current_module): Likewise.
1940 (assert_location_text): Add origin and column_unit arguments for
1941 testing the new functionality.
1942 (test_diagnostic_get_location_text): Test the new functionality.
1943 * doc/invoke.texi: Document the new options and behavior.
1944 * input.h (location_compute_display_column): Add tabstop argument.
1945 * input.c (location_compute_display_column): Likewise.
1946 (test_cpp_utf8): Add selftests for tab expansion.
1947 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
1948 new context argument to json_from_expanded_location().
1950 2020-07-14 Jakub Jelinek <jakub@redhat.com>
1953 * expr.c (expand_constructor): Don't create temporary for store to
1954 volatile MEM if exp has an addressable type.
1956 2020-07-14 Nathan Sidwell <nathan@acm.org>
1958 * hash-map.h (hash_map::get): Note it is a pointer to value.
1959 * incpath.h (incpath_kind): Align comments.
1961 2020-07-14 Nathan Sidwell <nathan@acm.org>
1963 * tree-core.h (tree_decl_with_vis, tree_function_decl):
1964 Note additional padding on 64-bits
1965 * tree.c (cache_integer_cst): Note why no caching of enum literals.
1966 (get_tree_code_name): Robustify error case.
1968 2020-07-14 Nathan Sidwell <nathan@acm.org>
1970 * doc/gty.texi: Fic gt_cleare_cache name.
1971 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
1973 2020-07-14 Jakub Jelinek <jakub@redhat.com>
1975 * omp-general.h (struct omp_for_data): Add adjn1 member.
1976 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
1977 count computing if n1, n2 or step are not INTEGER_CST earlier.
1978 Narrow the outer iterator range if needed so that non-rect loop
1979 has at least one iteration for each outer range iteration. Compute
1981 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
1982 instead of the outer loop's n1.
1984 2020-07-14 Matthias Klose <doko@ubuntu.com>
1987 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
1988 error on different values for -fcf-protection.
1989 (append_compiler_options): Pass -fcf-protection option.
1990 (find_and_merge_options): Add decoded options as parameter,
1991 pass decoded_options to merge_and_complain.
1992 (run_gcc): Pass decoded options to find_and_merge_options.
1993 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
1995 2020-07-13 Alan Modra <amodra@gmail.com>
1997 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
1998 and sibcall_local64.
1999 (sibcall_value_local): Similarly.
2001 2020-07-13 Nathan Sidwell <nathan@acm.org>
2003 * Makefile.in (distclean): Remove long gone cxxmain.c
2005 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
2008 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
2009 length to cmpstrnqi patterns.
2011 2020-07-13 Jakub Jelinek <jakub@redhat.com>
2014 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
2017 2020-07-13 Richard Biener <rguenther@suse.de>
2019 PR tree-optimization/96163
2020 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
2021 at least after region begin.
2023 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2025 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
2026 __ARM_FEATURE_PAC_DEFAULT support.
2028 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2031 * doc/extend.texi: Update the text for __builtin_return_address.
2033 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2036 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
2037 Disable return address signing if __builtin_eh_return is used.
2039 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2043 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
2044 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
2045 (aarch64_return_addr): Use aarch64_return_addr_rtx.
2046 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
2048 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
2051 * tree.h (virtual_method_call_p): Add a default-false parameter
2052 that indicates whether the function is being called from dump
2054 (obj_type_ref_class): Likewise.
2055 * tree.c (virtual_method_call_p): Likewise.
2056 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
2057 type information for the type when the parameter is false.
2058 * tree-pretty-print.c (dump_generic_node): Update calls to
2059 virtual_method_call_p and obj_type_ref_class accordingly.
2061 2020-07-13 Julian Brown <julian@codesourcery.com>
2062 Thomas Schwinge <thomas@codesourcery.com>
2064 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
2065 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
2066 directives (see also PR92929).
2068 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
2070 * convert.c (convert_to_integer_1): Narrow integer operations
2071 even on targets that require explicit truncation instructions.
2073 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2076 * config/cris/cris-passes.def: New file.
2077 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
2078 * config/cris/cris.c: Add infrastructure bits and pass execute
2079 function cris_postdbr_cmpelim.
2080 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
2082 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2084 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
2086 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2089 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
2090 ("*addi_b_<mode>"): New pattern.
2091 ("*addsi3<setnz>"): Remove stale %-related comment.
2093 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2095 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
2096 Use match_dup in output template, not match_operand.
2098 2020-07-13 Richard Biener <rguenther@suse.de>
2100 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
2101 (vt_find_locations): Eliminate visited bitmap in favor of
2102 RPO order check. Dump statistics about the number of
2103 local BB dataflow computes.
2105 2020-07-13 Richard Biener <rguenther@suse.de>
2108 * expr.c (expand_constructor): Make a temporary also if we're
2109 storing to volatile memory.
2111 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
2113 * config/rs6000/rs6000.md (rotl_unspec): New
2114 define_insn_and_split.
2116 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
2118 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
2119 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
2121 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
2123 * internal-fn.c (expand_mul_overflow): When checking for signed
2124 overflow from a widening multiplication, we access the truncated
2125 lowpart RES twice, so keep this value in a pseudo register.
2127 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
2129 PR tree-optimization/96146
2130 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
2131 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
2132 involving POLY_INT_CSTs.
2134 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
2137 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
2138 create named section for VAR_DECL or FUNCTION_DECL.
2140 2020-07-10 Joseph Myers <joseph@codesourcery.com>
2142 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
2145 2020-07-10 Alexander Popov <alex.popov@linux.com>
2147 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
2149 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
2152 * expr.c (expand_expr_real_2): When reducing bit fields,
2153 clear the target if it has a different mode from the expression.
2154 (reduce_to_bit_field_precision): Don't do that here. Instead
2155 assert that the target already has the correct mode.
2157 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
2161 * config/arm/arm.c (arm_attribute_table): Add
2162 "Advanced SIMD type".
2163 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
2164 attributes are equal.
2165 * config/arm/arm-builtins.c: Include stringpool.h and
2167 (arm_mangle_builtin_vector_type): Use the mangling recorded
2168 in the "Advanced SIMD type" attribute.
2169 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
2170 attribute to each Advanced SIMD type, using the mangled type
2171 as the attribute's single argument.
2173 2020-07-10 Carl Love <cel@us.ibm.com>
2175 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
2176 (VSX_MM4): New define_mode_iterator.
2177 (vec_mtvsrbmi): New define_insn.
2178 (vec_mtvsr_<mode>): New define_insn.
2179 (vec_cntmb_<mode>): New define_insn.
2180 (vec_extract_<mode>): New define_insn.
2181 (vec_expand_<mode>): New define_insn.
2182 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
2183 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
2184 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
2185 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
2187 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
2188 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
2189 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
2190 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
2191 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
2192 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
2193 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
2194 (BU_P10_OVERLOAD_2): Add defition for cntm.
2195 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
2196 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
2197 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
2198 (altivec_overloaded_builtins): Add overloaded argument entries for
2199 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
2200 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
2201 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
2202 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
2203 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
2204 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
2205 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
2206 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
2207 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
2208 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
2209 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
2210 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
2211 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
2212 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
2213 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
2214 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
2215 P10_BUILTIN_VEXPANDMQ.
2216 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
2217 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
2218 VEXPANDM, VEXTRACTM.
2220 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
2223 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
2224 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
2225 v16qi_ftype_pcvoid with correct number of parameters.
2227 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
2230 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
2231 TARGET_AVX512VL when enabling FMA.
2233 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
2234 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2235 Iain Apreotesei <iain.apreotesei@arm.com>
2237 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
2239 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
2240 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
2241 (arm_target_insn_ok_for_lob): New function.
2242 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
2243 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
2244 (dls_insn): Add new patterns.
2245 (doloop_end): Modify to select LR when LOB is available.
2246 * config/arm/unspecs.md: Add new unspec.
2247 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
2248 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
2251 2020-07-10 Richard Biener <rguenther@suse.de>
2253 PR tree-optimization/96133
2254 * gimple-fold.c (fold_array_ctor_reference): Do not
2255 recurse to folding a CTOR that does not fully cover the
2258 2020-07-10 Cui,Lili <lili.cui@intel.com>
2260 * common/config/i386/cpuinfo.h
2261 (get_intel_cpu): Handle sapphirerapids.
2262 * common/config/i386/i386-common.c
2263 (processor_names): Add sapphirerapids and alderlake.
2264 (processor_alias_table): Add sapphirerapids and alderlake.
2265 * common/config/i386/i386-cpuinfo.h
2266 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
2267 INTEL_COREI7_ALDERLAKE.
2268 * config.gcc: Add -march=sapphirerapids and alderlake.
2269 * config/i386/driver-i386.c
2270 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
2271 * config/i386/i386-c.c
2272 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
2273 * config/i386/i386-options.c
2274 (m_SAPPHIRERAPIDS) : Define.
2275 (m_ALDERLAKE): Ditto.
2276 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
2277 (processor_cost_table): Add sapphirerapids and alderlake.
2278 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
2279 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
2280 * config/i386/i386.h
2281 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
2282 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
2283 PROCESSOR_ALDERLAKE.
2285 (PTA_CLDEMOTE): Ditto.
2286 (PTA_SERIALIZE): Ditto.
2287 (PTA_TSXLDTRK): New.
2288 (PTA_SAPPHIRERAPIDS): Ditto.
2289 (PTA_ALDERLAKE): Ditto.
2290 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
2291 PROCESSOR_ALDERLAKE.
2292 * doc/extend.texi: Add sapphirerapids and alderlake.
2293 * doc/invoke.texi: Add sapphirerapids and alderlake.
2295 2020-07-10 Martin Liska <mliska@suse.cz>
2297 * dumpfile.c [profile-report]: Add new profile dump.
2298 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
2299 * passes.c (pass_manager::dump_profile_report): Change stderr
2302 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
2304 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
2305 is adjusted by considering peeled prologue for non
2306 vect_use_loop_mask_for_alignment_p cases.
2308 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
2311 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
2312 specific types __vector_quad and __vector_pair, and initialize the
2313 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
2314 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
2315 Remove now unneeded mask variable.
2316 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
2317 OPTION_MASK_MMA flag for power10 if not already set.
2319 2020-07-09 Richard Biener <rguenther@suse.de>
2321 PR tree-optimization/96133
2322 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
2323 status between stmts.
2325 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
2328 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
2329 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
2330 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
2331 (rsqrtv16sf2): Removed.
2333 2020-07-09 Richard Biener <rguenther@suse.de>
2335 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
2336 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
2337 (vect_slp_analyze_instance_alignment): ... this.
2338 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
2339 (vect_verify_datarefs_alignment): Likewise.
2340 (vect_enhance_data_refs_alignment): Do not call
2341 vect_verify_datarefs_alignment.
2342 (vect_slp_analyze_node_alignment): Rename from
2343 vect_slp_analyze_and_verify_node_alignment and do not
2344 call verify_data_ref_alignment.
2345 (vect_slp_analyze_instance_alignment): Rename from
2346 vect_slp_analyze_and_verify_instance_alignment.
2347 * tree-vect-stmts.c (vectorizable_store): Dump when
2348 we vectorize an unaligned access.
2349 (vectorizable_load): Likewise.
2350 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
2351 vect_verify_datarefs_alignment.
2352 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
2354 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
2356 PR tree-optimization/95804
2357 * tree-loop-distribution.c (break_alias_scc_partitions): Force
2358 negative post order to reduction partition.
2360 2020-07-09 Jakub Jelinek <jakub@redhat.com>
2362 * omp-general.h (struct omp_for_data): Add min_inner_iterations
2364 * omp-general.c (omp_extract_for_data): Initialize them and remember
2365 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
2366 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
2367 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
2368 (expand_omp_for_init_vars): For
2369 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
2370 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
2371 using fallback method when possible.
2373 2020-07-09 Omar Tahir <omar.tahir@arm.com>
2375 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
2376 last_moveable_pseudo before returning.
2378 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
2380 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
2381 __ARM_FEATURE_BTI_DEFAULT support.
2383 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2385 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
2387 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
2388 stub registers class.
2389 (aarch64_class_max_nregs): Likewise.
2390 (aarch64_register_move_cost): Likewise.
2391 (aarch64_sls_shared_thunks): Global array to store stub labels.
2392 (aarch64_sls_emit_function_stub): New.
2393 (aarch64_create_blr_label): New.
2394 (aarch64_sls_emit_blr_function_thunks): New.
2395 (aarch64_sls_emit_shared_blr_thunks): New.
2396 (aarch64_asm_file_end): New.
2397 (aarch64_indirect_call_asm): New.
2398 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
2399 (TARGET_ASM_FUNCTION_EPILOGUE): Use
2400 aarch64_sls_emit_blr_function_thunks.
2401 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
2402 (enum reg_class): Add STUB_REGS class.
2403 (machine_function): Introduce `call_via` array for
2404 function-local stub labels.
2405 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
2406 aarch64_indirect_call_asm to emit code when hardening BLR
2408 * config/aarch64/constraints.md (Ucr): New constraint
2409 representing registers for indirect calls. Is GENERAL_REGS
2410 usually, and STUB_REGS when hardening BLR instruction against
2412 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
2413 is also a general register.
2415 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2417 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
2418 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
2419 speculation barrier after BR instruction if needs be.
2420 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
2422 (aarch64_sls_barrier): New.
2423 (aarch64_asm_trampoline_template): Add needed barriers.
2424 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
2426 (TRAMPOLINE_SIZE): Account for barrier.
2427 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
2428 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
2429 Emit barrier if needs be, also account for possible barrier using
2430 "sls_length" attribute.
2431 (sls_length): New attribute.
2432 (length): Determine default using any non-default sls_length
2435 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2437 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
2439 (aarch64_harden_sls_blr_p): New.
2440 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
2442 (aarch64_harden_sls_retbr_p): New.
2443 (aarch64_harden_sls_blr_p): New.
2444 (aarch64_validate_sls_mitigation): New.
2445 (aarch64_override_options): Parse options for SLS mitigation.
2446 * config/aarch64/aarch64.opt (-mharden-sls): New option.
2447 * doc/invoke.texi: Document new option.
2449 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
2451 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
2452 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
2453 or nested-cycle reduction.
2455 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
2457 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
2458 for fully masking to be more common.
2460 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
2462 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
2464 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
2465 Document __builtin_thread_pointer.
2467 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
2469 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
2470 Abort if any arguments on stack.
2472 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
2474 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
2475 either type has reverse scalar storage order.
2476 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
2477 a memory copy if either type has reverse scalar storage order.
2479 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
2481 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
2482 on to the native compiler, if used.
2483 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
2485 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
2487 * config/rs6000/altivec.h (vec_vmsumudm): New define.
2488 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
2489 (altivec_vmsumudm): New define_insn.
2490 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
2491 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
2492 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
2493 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
2494 * doc/extend.texi: Add document for vmsumudm behind vmsum.
2496 2020-07-08 Richard Biener <rguenther@suse.de>
2498 * tree-vect-stmts.c (get_group_load_store_type): Pass
2499 in the SLP node and the alignment support scheme output.
2501 (get_load_store_type): Likewise.
2502 (vectorizable_store): Adjust.
2503 (vectorizable_load): Likewise.
2505 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
2508 * expr.c (expand_expr_real_2): Get the mode from the type rather
2509 than the rtx, and assert that it is consistent with the mode of
2510 the rtx (where known). Optimize all constant integers, not just
2511 those that can be represented in poly_int64.
2513 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
2515 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
2516 (len_store_v16qi): Likewise.
2518 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
2520 * doc/md.texi (len_load_@var{m}): Document.
2521 (len_store_@var{m}): Likewise.
2522 * internal-fn.c (len_load_direct): New macro.
2523 (len_store_direct): Likewise.
2524 (expand_len_load_optab_fn): Likewise.
2525 (expand_len_store_optab_fn): Likewise.
2526 (direct_len_load_optab_supported_p): Likewise.
2527 (direct_len_store_optab_supported_p): Likewise.
2528 (expand_mask_load_optab_fn): New macro. Original renamed to ...
2529 (expand_partial_load_optab_fn): ... here. Add handlings for
2531 (expand_mask_store_optab_fn): New macro. Original renamed to ...
2532 (expand_partial_store_optab_fn): ... here. Add handlings for
2534 (internal_load_fn_p): Handle IFN_LEN_LOAD.
2535 (internal_store_fn_p): Handle IFN_LEN_STORE.
2536 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
2537 * internal-fn.def (LEN_LOAD): New internal function.
2538 (LEN_STORE): Likewise.
2539 * optabs.def (len_load_optab, len_store_optab): New optab.
2541 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
2543 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
2544 thunderx2t99_vector_cost): Likewise.
2546 2020-07-07 Richard Biener <rguenther@suse.de>
2548 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
2549 group overlap condition to allow negative step DR groups.
2550 * tree-vect-stmts.c (get_group_load_store_type): For
2551 multi element SLP groups force VMAT_STRIDED_SLP when the step
2554 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
2556 * doc/generic.texi: Fix typo.
2558 2020-07-07 Richard Biener <rguenther@suse.de>
2560 * lto-streamer-out.c (cmp_symbol_files): Use the computed
2561 order map to sort symbols from the same sub-file together.
2562 (lto_output): Compute a map of sub-file to an order number
2563 it appears in the symbol output array.
2565 2020-07-06 Richard Biener <rguenther@suse.de>
2567 PR tree-optimization/96075
2568 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
2569 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
2570 for the misalignment calculation for negative step.
2572 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
2574 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
2575 (*vsub_addsi4): New instruction.
2577 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
2579 * config/cris/cris.md (movulsr): New peephole2.
2581 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
2583 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
2584 Correct gcc_assert of overlapping operands.
2586 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
2588 * config/cris/cris.c (cris_select_cc_mode): Always return
2589 CC_NZmode for matching comparisons. Clarify comments.
2590 * config/cris/cris-modes.def: Clarify mode comment.
2591 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
2593 (addsub, addsubbo, nd): New code iterator attributes.
2594 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
2595 iterator constructs instead of match_operator constructs.
2596 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
2597 "*extop<mode>si<setnz>".
2598 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
2599 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
2600 "*extop<mode>si<setnz>_swap".
2602 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
2604 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
2605 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
2607 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
2609 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
2610 were initially created for the assignment of a variable-sized
2611 object and whose source is now a string constant.
2612 * gimple-ssa-store-merging.c (struct merged_store_group): Document
2613 STRING_CST for rhs_code field.
2614 Add string_concatenation boolean field.
2615 (merged_store_group::merged_store_group): Initialize it as well as
2617 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
2618 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
2619 (merged_store_group::apply_stores): Clear it for small regions.
2620 Do not create a power-of-2-sized buffer if it is still true.
2621 And do not set bit_insertion here again.
2622 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
2623 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
2624 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
2625 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
2626 (count_multiple_uses): Return 0 for STRING_CST.
2627 (split_group): Do not split the group for a string concatenation.
2628 (imm_store_chain_info::output_merged_store): Constify and rename
2629 some local variables. Build an array type as destination type
2630 for a string concatenation, as well as a zero mask, and call
2631 build_string to build the source.
2632 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
2633 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
2634 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
2635 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
2636 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
2638 2020-07-03 Martin Jambor <mjambor@suse.cz>
2641 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
2642 mismatched accesses.
2644 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
2646 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
2647 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
2649 2020-07-03 Martin Liska <mliska@suse.cz>
2650 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2653 * gcov-dump.c (tag_function): Use gcov_position_t
2656 2020-07-03 Richard Biener <rguenther@suse.de>
2658 PR tree-optimization/96037
2659 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
2661 2020-07-03 Richard Biener <rguenther@suse.de>
2663 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
2664 original non-pattern stmts, look at the pattern stmt
2665 vectorization status.
2667 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
2669 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
2671 2020-07-03 Richard Biener <rguenther@suse.de>
2673 * tree-vectorizer.h (vec_info::insert_on_entry): New.
2674 (vec_info::insert_seq_on_entry): Likewise.
2675 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
2676 (vec_info::insert_seq_on_entry): Likewise.
2677 * tree-vect-stmts.c (vect_init_vector_1): Use
2678 vec_info::insert_on_entry.
2679 (vect_finish_stmt_generation): Set modified bit after
2681 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
2682 by using vec_info::insert_seq_on_entry and bypassing
2684 (vect_schedule_slp_instance): Deal with all-constant
2687 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
2688 Tom de Vries <tdevries@suse.de>
2691 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
2692 to access TYPE_SIZE (type). Return at least the mode's alignment.
2694 2020-07-02 Richard Biener <rguenther@suse.de>
2696 PR tree-optimization/96028
2697 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
2698 we have scalar stmts to use.
2699 (vect_slp_analyze_node_operations): When analyzing a child
2700 failed try externalizing the parent node.
2702 2020-07-02 Martin Jambor <mjambor@suse.cz>
2705 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
2706 argument index if necessary.
2708 2020-07-02 Martin Liska <mliska@suse.cz>
2711 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
2712 (expand_vector_comparison): Do not expand a comparison if all
2713 uses are consumed by a VEC_COND_EXPR.
2714 (expand_vector_operation): Change void return type to bool.
2715 (expand_vector_operations_1): Pass dce_ssa_names.
2717 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
2720 * system.h (NULL): Redefine to nullptr.
2722 2020-07-02 Jakub Jelinek <jakub@redhat.com>
2724 PR tree-optimization/95857
2725 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
2726 base_bb, remember all forced and non-local labels on it and later
2727 treat those as if they have NULL label_to_block. Formatting fix.
2730 2020-07-02 Richard Biener <rguenther@suse.de>
2732 PR tree-optimization/96022
2733 * tree-vect-stmts.c (vectorizable_shift): Only use the
2734 first vector stmt when extracting the scalar shift amount.
2735 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
2736 nodes with all-scalar children from scalars but not stores.
2737 (vect_analyze_slp_instance): Mark the node not failed.
2739 2020-07-02 Felix Yang <felix.yang@huawei.com>
2741 PR tree-optimization/95961
2742 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
2743 number of scalars instead of the number of vectors as an upper bound
2744 for the loop saving info about DR in the hash table. Remove unused
2747 2020-07-02 Jakub Jelinek <jakub@redhat.com>
2749 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
2750 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
2751 OpenMP non-rectangular loops. Use XALLOCAVEC.
2753 2020-07-02 Martin Liska <mliska@suse.cz>
2755 PR gcov-profile/95348
2756 * coverage.c (read_counts_file): Read only COUNTERS that are
2758 * gcov-dump.c (tag_function): Change signature from unsigned to
2760 (tag_blocks): Likewise.
2761 (tag_arcs): Likewise.
2762 (tag_lines): Likewise.
2763 (tag_counters): Likewise.
2764 (tag_summary): Likewise.
2765 * gcov.c (read_count_file): Read all non-zero counters
2768 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
2770 * config/riscv/multilib-generator (arch_canonicalize): Handle
2771 multi-letter extension.
2772 Using underline as separator between different extensions.
2774 2020-07-01 Pip Cet <pipcet@gmail.com>
2776 * spellcheck.c (test_data): Add problematic strings.
2777 (test_metric_conditions): Don't test the triangle inequality
2778 condition, which our distance function does not satisfy.
2780 2020-07-01 Omar Tahir <omar.tahir@arm.com>
2782 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
2783 generate a BTI instruction.
2785 2020-07-01 Jeff Law <law@redhat.com>
2787 PR tree-optimization/94882
2788 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
2790 2020-07-01 Jeff Law <law@redhat.com>
2792 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
2793 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
2795 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
2797 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
2798 for 64bits fpsr/fpcr getter setters builtin variants.
2799 (aarch64_init_fpsr_fpcr_builtins): New function.
2800 (aarch64_general_init_builtins): Modify to make use of the later.
2801 (aarch64_expand_fpsr_fpcr_setter): New function.
2802 (aarch64_general_expand_builtin): Modify to make use of the later.
2803 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
2804 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
2805 generalizing 'get_fpcr', 'set_fpsr'.
2806 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
2808 (fpscr_name): New int attribute.
2809 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
2810 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
2811 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
2814 2020-07-01 Martin Liska <mliska@suse.cz>
2816 * gcov.c (print_usage): Avoid trailing space for -j option.
2818 2020-07-01 Richard Biener <rguenther@suse.de>
2820 PR tree-optimization/95839
2821 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
2822 vectors are not uniform.
2823 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
2825 (vect_build_slp_tree_2): For groups of lane extracts
2826 from a vector register generate a permute node
2827 with a special child representing the pre-existing vector.
2828 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
2829 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
2830 (vectorizable_slp_permutation): Do not generate or cost identity
2832 (vect_schedule_slp_instance): Handle pre-existing vector
2833 that are function arguments.
2835 2020-07-01 Richard Biener <rguenther@suse.de>
2837 * system.h (INCLUDE_ISL): New guarded include.
2838 * graphite-dependences.c: Use it.
2839 * graphite-isl-ast-to-gimple.c: Likewise.
2840 * graphite-optimize-isl.c: Likewise.
2841 * graphite-poly.c: Likewise.
2842 * graphite-scop-detection.c: Likewise.
2843 * graphite-sese-to-poly.c: Likewise.
2844 * graphite.c: Likewise.
2845 * graphite.h: Drop the includes here.
2847 2020-07-01 Martin Liska <mliska@suse.cz>
2849 * gcov.c (print_usage): Shorted option description for -j
2852 2020-07-01 Martin Liska <mliska@suse.cz>
2854 * doc/gcov.texi: Rename 2 options.
2855 * gcov.c (print_usage): Rename -i,--json-format to
2856 -j,--json-format and -j,--human-readable to -H,--human-readable.
2857 (process_args): Fix up parsing. Document obsolete options and
2858 how are they changed.
2860 2020-07-01 Jeff Law <law@redhat.com>
2862 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
2863 (pa_output_ascii): Likewise.
2865 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
2867 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
2869 (riscv_subset_list::parsing_subset_version): Add parameter for
2870 indicate explicitly version, and handle explicitly version.
2871 (riscv_subset_list::handle_implied_ext): Ditto.
2872 (riscv_subset_list::add): Ditto.
2873 (riscv_subset_t::riscv_subset_t): Init new field.
2874 (riscv_subset_list::to_string): Always output version info if version
2875 explicitly specified.
2876 (riscv_subset_list::parsing_subset_version): Handle explicitly
2878 (riscv_subset_list::parse_std_ext): Ditto.
2879 (riscv_subset_list::parse_multiletter_ext): Ditto.
2881 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
2885 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
2886 "Advanced SIMD type".
2887 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
2888 attributes are equal.
2889 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
2891 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
2892 in the "Advanced SIMD type" attribute.
2893 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
2894 attribute to each Advanced SIMD type, using the mangled type
2895 as the attribute's single argument.
2897 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
2900 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
2901 -mgeneral-regs-only is not used.
2903 2020-06-30 Yang Yang <yangyang305@huawei.com>
2905 PR tree-optimization/95855
2906 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
2907 checks to recognize a missed if-conversion opportunity when
2908 judging whether to duplicate a block.
2910 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
2912 * doc/extend.texi: Change references to "future architecture" to
2913 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
2914 references to "future" (because the future is now).
2916 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
2918 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
2920 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
2922 * simplify-rtx.c (simplify_distributive_operation): New function
2923 to un-distribute a binary operation of two binary operations.
2924 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
2925 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
2927 (test_scalar_int_ops): New function for unit self-testing
2928 scalar integer transformations in simplify-rtx.c.
2929 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
2930 (simplify_rtx_c_tests): Call test_scalar_ops.
2932 2020-06-29 Richard Biener <rguenther@suse.de>
2934 PR tree-optimization/95916
2935 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
2936 the case of not vectorized externals.
2938 2020-06-29 Richard Biener <rguenther@suse.de>
2940 * tree-vectorizer.h: Do not include <utility>.
2942 2020-06-29 Martin Liska <mliska@suse.cz>
2944 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
2945 instead of gimple_stmt_iterator::bb.
2946 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
2947 * tree-vectorizer.h: Likewise.
2949 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
2951 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
2952 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
2953 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
2954 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
2955 (gcn_dwarf_register_number): New function.
2956 (gcn_dwarf_register_span): New function.
2957 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
2959 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
2961 PR tree-optimization/95854
2962 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
2963 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
2964 unsigned HOST_WIDE_INT.
2966 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2968 * config/sparc/sparc.c (epilogue_renumber): Remove register.
2969 (sparc_print_operand_address): Likewise.
2970 (sparc_type_code): Likewise.
2971 (set_extends): Likewise.
2973 2020-06-29 Martin Liska <mliska@suse.cz>
2975 PR tree-optimization/92860
2976 * optc-save-gen.awk: Add exceptions for arc target.
2978 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
2980 * doc/sourcebuild.texi: Describe globbing of the
2981 dump file scanning commands "suffix" argument.
2983 2020-06-28 Martin Sebor <msebor@redhat.com>
2986 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
2988 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
2990 * tree.c (get_nonnull_args): Consider the this pointer implicitly
2992 * var-tracking.c (deps_vec): New type.
2993 (var_loc_dep_vec): New function.
2994 (VAR_LOC_DEP_VEC): Use it.
2996 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
2998 * internal-fn.c (direct_mask_load_optab_supported_p): Use
2999 convert_optab_supported_p instead of direct_optab_supported_p.
3000 (direct_mask_store_optab_supported_p): Likewise.
3002 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
3004 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
3005 simplify_using_ranges class.
3006 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
3007 field. Adjust all methods to use new field.
3008 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
3009 simplify_using_ranges class.
3010 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
3011 field. Adjust all methods to use new field.
3012 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
3013 (vrp_prop::vrp_finalize): New vrp_folder argument.
3014 (execute_vrp): Pass folder to vrp_finalize. Use
3015 simplify_using_ranges class.
3016 Remove cleanup_edges_and_switches call.
3017 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
3018 value_range_equiv uses to value_range.
3019 (simplify_using_ranges::op_with_boolean_value_range_p): Use
3020 simplify_using_ranges class.
3021 (check_for_binary_op_overflow): Make static.
3022 (vr_values::extract_range_basic): Pass this to
3023 check_for_binary_op_overflow.
3024 (compare_range_with_value): Change value_range_equiv uses to
3026 (vr_values::vr_values): Initialize simplifier field.
3027 Remove uses of to_remove_edges and to_update_switch_stmts.
3028 (vr_values::~vr_values): Remove uses of to_remove_edges and
3029 to_update_switch_stmts.
3030 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
3032 (vr_values::compare_name_with_value): Same.
3033 (vr_values::compare_names): Same.
3034 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
3035 (vr_values::vrp_evaluate_conditional): Same.
3036 (vr_values::vrp_visit_cond_stmt): Same.
3037 (find_case_label_ranges): Change value_range_equiv uses to
3039 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
3040 (vr_values::simplify_truth_ops_using_ranges): Move to
3041 simplify_using_ranges class.
3042 (vr_values::simplify_div_or_mod_using_ranges): Same.
3043 (vr_values::simplify_min_or_max_using_ranges): Same.
3044 (vr_values::simplify_abs_using_ranges): Same.
3045 (vr_values::simplify_bit_ops_using_ranges): Same.
3046 (test_for_singularity): Change value_range_equiv uses to
3048 (range_fits_type_p): Same.
3049 (vr_values::simplify_cond_using_ranges_1): Same.
3050 (vr_values::simplify_cond_using_ranges_2): Make extern.
3051 (vr_values::fold_cond): Move to simplify_using_ranges class.
3052 (vr_values::simplify_switch_using_ranges): Same.
3053 (vr_values::cleanup_edges_and_switches): Same.
3054 (vr_values::simplify_float_conversion_using_ranges): Same.
3055 (vr_values::simplify_internal_call_using_ranges): Same.
3056 (vr_values::two_valued_val_range_p): Same.
3057 (vr_values::simplify_stmt_using_ranges): Move to...
3058 (simplify_using_ranges::simplify): ...here.
3059 * vr-values.h (class vr_values): Move all the simplification of
3060 statements using ranges methods and code from here...
3061 (class simplify_using_ranges): ...to here.
3062 (simplify_cond_using_ranges_2): New extern prototype.
3064 2020-06-27 Jakub Jelinek <jakub@redhat.com>
3066 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
3067 member, move outer member.
3068 (struct omp_for_data): Add first_nonrect and last_nonrect members.
3069 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
3070 last_nonrect and non_rect_referenced members.
3071 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
3073 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
3074 non-rectangular loops.
3075 (extract_omp_for_update_vars): Likewise.
3076 (expand_omp_for_generic, expand_omp_for_static_nochunk,
3077 expand_omp_for_static_chunk, expand_omp_simd,
3078 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
3079 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
3080 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
3083 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
3086 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
3088 * config/i386/i386.c (ix86_frame_pointer_required): Update
3091 2020-06-26 Yichao Yu <yyc1992@gmail.com>
3093 * multiple_target.c (redirect_to_specific_clone): Fix tests
3094 to check individual attribute rather than an attribute list.
3096 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
3098 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
3099 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
3102 2020-06-26 Marek Polacek <polacek@redhat.com>
3104 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
3105 * doc/standards.texi (C Language): Correct the default dialect.
3106 (C++ Language): Update the default for C++ to gnu++17.
3108 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
3110 * tree-ssa-reassoc.c (dump_range_entry): New function.
3111 (debug_range_entry): New debug function.
3112 (update_range_test): Invoke dump_range_entry for dumping.
3113 (optimize_range_tests_to_bit_test): Merge the entry test in the
3114 bit test when possible and lower the profitability threshold.
3116 2020-06-26 Richard Biener <rguenther@suse.de>
3118 PR tree-optimization/95897
3119 * tree-vectorizer.h (vectorizable_induction): Remove
3120 unused gimple_stmt_iterator * parameter.
3121 * tree-vect-loop.c (vectorizable_induction): Likewise.
3122 (vect_analyze_loop_operations): Adjust.
3123 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
3124 (vect_transform_stmt): Likewise.
3125 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
3126 for fold-left reductions, clarify existing reduction case.
3128 2020-06-25 Nick Clifton <nickc@redhat.com>
3130 * config/m32r/m32r.md (movsicc): Disable pattern.
3132 2020-06-25 Richard Biener <rguenther@suse.de>
3134 PR tree-optimization/95839
3135 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
3136 check on the number of datarefs.
3138 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
3140 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
3141 the insn_data n_operands value to unsigned.
3143 2020-06-25 Richard Biener <rguenther@suse.de>
3145 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
3146 vector defs to determine insertion place.
3148 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
3151 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
3152 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
3153 (PTA_TIGERLAKE): Add PTA_CLWB.
3155 2020-06-25 Richard Biener <rguenther@suse.de>
3157 PR tree-optimization/95866
3158 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
3159 vectorized shift operands. For scalar shifts use lane zero
3160 of a vectorized shift operand.
3162 2020-06-25 Martin Liska <mliska@suse.cz>
3164 PR tree-optimization/95745
3166 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
3167 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
3169 * tree-vect-generic.c (expand_vector_condition): Remove dead
3170 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
3172 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
3175 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
3176 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
3177 (convert_4f32_8f16): New define_expand
3178 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
3180 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
3181 overloaded builtin entry.
3182 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
3183 (vsx_xvcvsphp): New define_insn.
3185 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
3186 Segher Boessenkool <segher@kernel.crashing.org>
3188 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
3190 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
3192 * simplify-rtx.c (simplify_unary_operation_1): Simplify
3193 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
3195 2020-06-24 Richard Biener <rguenther@suse.de>
3197 PR tree-optimization/95866
3198 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
3199 (vect_build_slp_tree_2): Properly reset matches[0],
3200 ignore uniform constants.
3202 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3205 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
3206 (cpu_indicator_init): Likewise.
3207 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
3209 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3212 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
3213 detection with AVX512BF16.
3215 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3218 * common/config/i386/i386-isas.h: New file. Extracted from
3219 gcc/config/i386/i386-builtins.c.
3220 (_isa_names_table): Add option.
3221 (ISA_NAMES_TABLE_START): New.
3222 (ISA_NAMES_TABLE_END): Likewise.
3223 (ISA_NAMES_TABLE_ENTRY): Likewise.
3224 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
3225 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
3226 from enum processor_features.
3227 * config/i386/driver-i386.c: Include
3228 "common/config/i386/cpuinfo.h" and
3229 "common/config/i386/i386-isas.h".
3230 (has_feature): New macro.
3231 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
3232 features. Use has_feature to detect processor features. Call
3233 Call get_intel_cpu to get the newer Intel CPU name. Use
3234 isa_names_table to generate command-line options.
3235 * config/i386/i386-builtins.c: Include
3236 "common/config/i386/i386-isas.h".
3237 (_arch_names_table): Removed.
3238 (isa_names_table): Likewise.
3240 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3243 * common/config/i386/cpuinfo.h: New file.
3244 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
3245 (__processor_model2): New.
3246 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
3247 (has_cpu_feature): New function.
3248 (set_cpu_feature): Likewise.
3249 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
3250 CHECK___builtin_cpu_is. Return AMD CPU name.
3251 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
3252 Use CHECK___builtin_cpu_is. Return Intel CPU name.
3253 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
3254 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
3255 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
3256 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
3257 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
3258 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
3259 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
3260 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
3261 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
3262 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
3263 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
3264 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
3265 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
3266 FEATURE_XSAVEOPT and FEATURE_XSAVES
3267 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
3268 Also update cpu_model2.
3269 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
3270 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
3271 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
3272 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
3273 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
3274 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
3275 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
3276 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
3277 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
3278 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
3279 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
3280 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
3281 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
3282 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
3283 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
3284 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
3285 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
3286 (SIZE_OF_CPU_FEATURES): New.
3287 * config/i386/i386-builtins.c (processor_features): Removed.
3288 (isa_names_table): Replace F_XXX with FEATURE_XXX.
3289 (fold_builtin_cpu): Change __cpu_features2 to an array.
3291 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3294 * common/config/i386/i386-common.c (processor_alias_table): Add
3295 processor model and priority to each entry.
3296 (pta_size): Updated with -6.
3297 (num_arch_names): New.
3298 * common/config/i386/i386-cpuinfo.h: New file.
3299 * config/i386/i386-builtins.c (feature_priority): Removed.
3300 (processor_model): Likewise.
3301 (_arch_names_table): Likewise.
3302 (arch_names_table): Likewise.
3303 (_isa_names_table): Replace P_ZERO with P_NONE.
3304 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
3305 processor_alias_table.
3306 (fold_builtin_cpu): Replace arch_names_table with
3307 processor_alias_table.
3308 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
3309 (pta): Add model and priority.
3310 (num_arch_names): New.
3312 2020-06-24 Richard Biener <rguenther@suse.de>
3314 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
3316 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
3317 Simplify for new position of vectorized SLP loads.
3318 (vect_slp_analyze_node_dependences): Adjust for it.
3319 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
3320 for the first stmts dataref.
3321 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
3322 (vect_schedule_slp_instance): Emit loads before the
3324 * tree-vect-stmts.c (vectorizable_load): Do what the comment
3325 says and use vect_find_first_scalar_stmt_in_slp.
3327 2020-06-24 Richard Biener <rguenther@suse.de>
3329 PR tree-optimization/95856
3330 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
3333 2020-06-24 Jakub Jelinek <jakub@redhat.com>
3336 * fold-const.c (fold_cond_expr_with_comparison): Optimize
3337 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
3339 2020-06-24 Jakub Jelinek <jakub@redhat.com>
3341 * omp-low.c (lower_omp_for): Fix two pastos.
3343 2020-06-24 Martin Liska <mliska@suse.cz>
3345 * optc-save-gen.awk: Compare string options in cl_optimization_compare
3348 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
3350 * config.gcc: Identify power10 as a 64-bit processor and as valid
3351 for --with-cpu and --with-tune.
3353 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
3355 * Makefile.in (LANG_MAKEFRAGS): Same.
3356 (tmake_file): Use -include.
3359 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
3361 * REVISION: Delete file meant for a private branch.
3363 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
3366 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
3367 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
3369 2020-06-23 Alexandre Oliva <oliva@adacore.com>
3371 * collect-utils.h (dumppfx): New.
3372 * collect-utils.c (dumppfx): Likewise.
3373 * lto-wrapper.c (run_gcc): Set global dumppfx.
3374 (compile_offload_image): Pass a -dumpbase on to mkoffload.
3375 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
3376 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
3378 (compile_native): Pass -dumpbase et al to compiler.
3379 * config/gcn/mkoffload.c (gcn_dumpbase): New.
3380 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
3381 save_temps. Pass -dumpbase et al to offload target compiler.
3382 (compile_native): Pass -dumpbase et al to compiler.
3384 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
3386 * REVISION: New file.
3388 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
3390 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
3391 Update comment for ISA 3.1.
3392 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
3393 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
3394 on AIX, and -mpower10 elsewhere.
3395 * config/rs6000/future.md: Delete.
3396 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
3398 * config/rs6000/power10.md: New file.
3399 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
3400 PPC_PLATFORM_FUTURE.
3401 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
3402 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
3403 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
3404 Use BU_P10_* instead of BU_FUTURE_*.
3405 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
3406 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
3407 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
3408 FUTURE_BUILTIN_VEC_XXEVAL.
3409 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
3410 Update compiler messages.
3411 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
3412 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
3413 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
3415 * config/rs6000/rs6000-string.c: Ditto.
3416 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
3417 instead of "future", reorder it to right after "power9".
3418 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
3419 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
3420 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
3421 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
3422 not ISA_FUTURE_MASKS_SERVER.
3423 (rs6000_opt_masks): Use "power10" instead of "future".
3424 (rs6000_builtin_mask_names): Ditto.
3425 (rs6000_disable_incompatible_switches): Ditto.
3426 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
3427 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
3428 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
3429 not RS6000_BTM_FUTURE.
3430 * config/rs6000/rs6000.md: Use "power10", not "future". Use
3431 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
3433 * config/rs6000/rs6000.opt (mfuture): Delete.
3435 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
3436 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
3438 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
3440 * coretypes.h (first_type): Delete.
3441 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
3443 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3445 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
3446 (arm_mve_hw): Likewise.
3448 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
3451 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
3454 2020-06-22 Richard Biener <rguenther@suse.de>
3456 PR tree-optimization/95770
3457 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
3460 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
3462 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
3463 (gcn_return_in_memory): Return vectors in memory.
3465 2020-06-22 Jakub Jelinek <jakub@redhat.com>
3467 * omp-general.c (omp_extract_for_data): For triangular loops with
3468 all loop invariant expressions constant where the innermost loop is
3469 executed at least once compute number of iterations at compile time.
3471 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
3473 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
3474 (DRIVER_SELF_SPECS): New.
3476 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
3478 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
3479 (RISCV_FTYPE_ATYPES0): New.
3480 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
3481 * config/riscv/riscv-ftypes.def: Remove VOID argument.
3483 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
3485 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
3486 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
3489 (ASM_CPU_SPEC): Remove vsx and altivec options.
3490 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
3493 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
3494 (TARGET_DEFAULT): Only define if not BIARCH.
3495 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
3498 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
3501 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
3502 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
3504 (CPLUSPLUS_CPP_SPEC): Same.
3507 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
3508 * config/rs6000/defaultaix64.h: New file.
3509 * config/rs6000/t-aix64: New file.
3511 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
3513 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
3514 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
3515 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
3517 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
3518 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
3519 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
3520 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
3521 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
3522 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
3523 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
3524 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
3525 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
3526 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
3527 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
3528 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
3529 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
3530 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
3531 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
3532 Allow zero constants.
3533 (print_operand) <case 'A'>: New output modifier.
3534 (rs6000_split_multireg_move): Add support for inserting accumulator
3535 priming and depriming instructions. Add support for splitting an
3536 assemble accumulator pattern.
3537 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
3538 rs6000_gimple_fold_mma_builtin): New functions.
3539 (RS6000_BUILTIN_M): New macro.
3540 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
3541 (bdesc_mma): Add new MMA built-in support.
3542 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
3543 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
3545 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
3546 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
3547 and rs6000_gimple_fold_mma_builtin.
3548 (rs6000_expand_builtin): Call mma_expand_builtin.
3549 Use RS6000_BTC_OPND_MASK.
3550 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
3551 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
3552 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
3553 VSX_BUILTIN_XVCVBF16SP.
3554 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
3555 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
3556 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
3557 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
3558 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
3559 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
3560 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
3561 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
3562 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
3563 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
3564 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
3565 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
3566 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
3567 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
3568 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
3569 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
3570 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
3571 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
3572 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
3573 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
3574 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
3575 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
3576 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
3577 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
3578 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
3579 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
3580 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
3581 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
3582 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
3583 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
3584 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
3585 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
3586 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
3587 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
3588 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
3589 MMA_AVVI4I4I4): New define_int_iterator.
3590 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
3591 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
3592 avvi4i4i4): New define_int_attr.
3593 (*movpxi): Add zero constant alternative.
3594 (mma_assemble_pair, mma_assemble_acc): New define_expand.
3595 (*mma_assemble_acc): New define_insn_and_split.
3596 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
3597 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
3598 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
3599 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
3600 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
3601 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
3602 (UNSPEC_VSX_XVCVSPBF16): Likewise.
3603 (XVCVBF16): New define_int_iterator.
3604 (xvcvbf16): New define_int_attr.
3605 (vsx_<xvcvbf16>): New define_insn.
3606 * doc/extend.texi: Document the mma built-ins.
3608 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
3609 Michael Meissner <meissner@linux.ibm.com>
3611 * config/rs6000/mma.md: New file.
3612 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
3614 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
3615 for __vector_pair and __vector_quad types.
3616 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
3618 (POWERPC_MASKS): Likewise.
3619 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
3620 (POI, PXI): New partial integer modes.
3621 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
3622 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
3623 (rs6000_hard_regno_mode_ok_uncached): Likewise.
3624 Add support for POImode being allowed in VSX registers and PXImode
3625 being allowed in FP registers.
3626 (rs6000_modes_tieable_p): Adjust comment.
3627 Add support for POImode and PXImode.
3628 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
3629 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
3630 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
3631 Set up appropriate addr_masks for vector pair and vector quad addresses.
3632 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
3633 vector quad registers. Setup reload handlers for POImode and PXImode.
3634 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
3635 (rs6000_option_override_internal): Error if -mmma is specified
3636 without -mcpu=future.
3637 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
3638 (quad_address_p): Change size test to less than 16 bytes.
3639 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
3640 and vector quad instructions.
3641 (avoiding_indexed_address_p): Likewise.
3642 (rs6000_emit_move): Disallow POImode and PXImode moves involving
3644 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
3645 and FP registers for PXImode.
3646 (rs6000_split_multireg_move): Support splitting POImode and PXImode
3648 (rs6000_mangle_type): Adjust comment. Add support for mangling
3649 __vector_pair and __vector_quad types.
3650 (rs6000_opt_masks): Add entry for mma.
3651 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
3652 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
3653 (address_to_insn_form): Likewise.
3654 (reg_to_non_prefixed): Likewise.
3655 (rs6000_invalid_conversion): New function.
3656 * config/rs6000/rs6000.h (MASK_MMA): Define.
3657 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
3658 (VECTOR_ALIGNMENT_P): New helper macro.
3659 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
3660 (RS6000_BTM_MMA): Define.
3661 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
3662 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
3663 RS6000_BTI_vector_quad.
3664 (vector_pair_type_node): New.
3665 (vector_quad_type_node): New.
3666 * config/rs6000/rs6000.md: Include mma.md.
3667 (define_mode_iterator RELOAD): Add POI and PXI.
3668 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
3669 * config/rs6000/rs6000.opt (-mmma): New.
3670 * doc/invoke.texi: Document -mmma.
3672 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
3674 PR tree-optimization/95638
3675 * tree-loop-distribution.c (pg_edge_callback_data): New field.
3676 (loop_distribution::break_alias_scc_partitions): Record and restore
3677 postorder information. Fix memory leak.
3679 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
3681 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
3682 (output_file_start): Use const 'char *'.
3684 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
3686 PR tree-optimization/94880
3687 * match.pd (A | B) - B -> (A & ~B): New simplification.
3689 2020-06-19 Richard Biener <rguenther@suse.de>
3691 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
3692 for lane permutations.
3694 2020-06-19 Richard Biener <rguenther@suse.de>
3696 PR tree-optimization/95761
3697 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
3698 vectorized stmts for finding the last one.
3700 2020-06-18 Felix Yang <felix.yang@huawei.com>
3702 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
3703 vect_relevant_for_alignment_p to filter out data references in
3704 the loop whose alignment is irrelevant when trying loop peeling
3707 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
3709 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
3710 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3711 mode iterator for the first operand of ZERO_EXTRACT RTX.
3712 Change ext_register_operand predicate to register_operand.
3713 Rename from *cmpqi_ext_1.
3714 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
3715 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
3716 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
3717 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3718 (*extv<mode>): Use SWI24 mode iterator for the first operand
3719 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3720 to register_operand.
3721 (*extzv<mode>): Use SWI248 mode iterator for the first operand
3722 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3723 to register_operand.
3724 (*extzvqi): Use SWI248 mode iterator instead of SImode for
3725 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
3726 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
3728 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
3729 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3730 mode iterator for the first operand of ZERO_EXTRACT RTX.
3731 Change ext_register_operand predicate to register_operand.
3732 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
3733 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
3735 (*insvqi_1): Use SWI248 mode iterator instead of SImode
3736 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
3737 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
3738 predicate to register_operand.
3741 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
3742 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3743 mode iterator for the first operand of ZERO_EXTRACT RTX.
3744 Change ext_register_operand predicate to register_operand.
3745 (addqi_ext_1): New expander.
3746 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3747 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3748 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3749 to register_operand. Rename from *addqi_ext_1.
3750 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
3751 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3752 (udivmodqi4): Ditto.
3753 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3754 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3755 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3756 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3757 to register_operand. Rename from *testqi_ext_1.
3758 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
3759 (andqi_ext_1): New expander.
3760 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3761 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3762 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3763 to register_operand. Rename from andqi_ext_1.
3764 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
3765 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
3766 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
3767 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
3768 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3769 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
3770 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3771 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3772 to register_operand. Rename from *xorqi_ext_1_cc.
3773 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
3774 in mode, matching its first operand.
3775 (promote_duplicated_reg): Update for renamed insv<mode>_1.
3776 * config/i386/predicates.md (ext_register_operand): Remove predicate.
3778 2020-06-18 Martin Sebor <msebor@redhat.com>
3782 * builtins.c (compute_objsize): Remove call to
3783 compute_builtin_object_size and instead compute conservative sizes
3786 2020-06-18 Martin Liska <mliska@suse.cz>
3788 * coretypes.h (struct iterator_range): New type.
3789 * tree-vect-patterns.c (vect_determine_precisions): Use
3790 range-based iterator.
3791 (vect_pattern_recog): Likewise.
3792 * tree-vect-slp.c (_bb_vec_info): Likewise.
3793 (_bb_vec_info::~_bb_vec_info): Likewise.
3794 (vect_slp_check_for_constructors): Likewise.
3795 * tree-vectorizer.h:Add new iterators
3796 and functions that use it.
3798 2020-06-18 Martin Liska <mliska@suse.cz>
3800 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
3801 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
3802 of a VEC_COND_EXPR cannot be tcc_comparison and so that
3803 a SSA_NAME needs to be created before we use it for the first
3804 argument of the VEC_COND_EXPR.
3805 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
3807 2020-06-18 Richard Biener <rguenther@suse.de>
3810 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
3811 to the target if necessary.
3812 (expand_vect_cond_mask_optab_fn): Likewise.
3814 2020-06-18 Martin Liska <mliska@suse.cz>
3816 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
3817 vcond as we check for NULL pointer.
3819 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
3821 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
3822 silence empty-body warning with gcc_fallthrough.
3824 2020-06-18 Jakub Jelinek <jakub@redhat.com>
3826 PR tree-optimization/95699
3827 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
3828 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
3829 declarations to the statements that set them where possible.
3831 2020-06-18 Jakub Jelinek <jakub@redhat.com>
3834 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
3835 scalar mode halfvectype other than vector boolean for
3836 VEC_PACK_TRUNC_EXPR.
3838 2020-06-18 Richard Biener <rguenther@suse.de>
3840 * varasm.c (assemble_variable): Make sure to not
3841 defer output when outputting addressed constants.
3842 (output_constant_def_contents): Likewise.
3843 (add_constant_to_table): Take and pass on whether to
3845 (output_addressed_constants): Likewise.
3846 (output_constant_def): Pass on whether to defer output
3847 to add_constant_to_table.
3848 (tree_output_constant_def): Defer output of constants.
3850 2020-06-18 Richard Biener <rguenther@suse.de>
3852 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
3853 (_slp_tree::lane_permutation): New member.
3854 (_slp_tree::code): Likewise.
3855 (SLP_TREE_TWO_OPERATORS): Remove.
3856 (SLP_TREE_LANE_PERMUTATION): New.
3857 (SLP_TREE_CODE): Likewise.
3858 (vect_stmt_dominates_stmt_p): Declare.
3859 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
3860 * tree-vect-stmts.c (vect_model_simple_cost): Remove
3861 SLP_TREE_TWO_OPERATORS handling.
3862 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
3863 (_slp_tree::~_slp_tree): Likewise.
3864 (vect_two_operations_perm_ok_p): Remove.
3865 (vect_build_slp_tree_1): Remove verification of two-operator
3867 (vect_build_slp_tree_2): When we have two different operators
3868 build two computation SLP nodes and a blend.
3869 (vect_print_slp_tree): Print the lane permutation if it exists.
3870 (slp_copy_subtree): Copy it.
3871 (vect_slp_rearrange_stmts): Re-arrange it.
3872 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
3873 VEC_PERM_EXPR explicitely.
3874 (vect_schedule_slp_instance): Likewise. Remove old
3875 SLP_TREE_TWO_OPERATORS code.
3876 (vectorizable_slp_permutation): New function.
3878 2020-06-18 Martin Liska <mliska@suse.cz>
3880 * tree-vect-generic.c (expand_vector_condition): Check
3881 for gassign before inspecting RHS.
3883 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
3885 * gimplify.c (omp_notice_threadprivate_variable)
3886 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
3887 diagnostic. Adjust all users.
3889 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
3891 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
3892 NULL_TREE' check earlier.
3894 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
3896 * doc/extend.texi (attribute access): Fix a typo.
3898 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
3899 Kaipeng Zhou <zhoukaipeng3@huawei.com>
3901 PR tree-optimization/95199
3902 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
3903 strided load/store operations and remove redundant code.
3905 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
3907 * coretypes.h (first_type): New alias template.
3908 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
3909 Remove spurious “...” and split the function type out into a typedef.
3911 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
3913 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
3916 2020-06-17 Richard Biener <rguenther@suse.de>
3918 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
3919 in *vectype parameter.
3920 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
3921 vect_build_slp_tree_1 computed.
3922 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
3923 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
3924 (vect_schedule_slp_instance): Likewise.
3925 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
3926 from SLP_TREE_VECTYPE.
3928 2020-06-17 Richard Biener <rguenther@suse.de>
3930 PR tree-optimization/95717
3931 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
3932 Move BB SSA updating before exit/latch PHI current def copying.
3934 2020-06-17 Martin Liska <mliska@suse.cz>
3936 * Makefile.in: Add new file.
3937 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
3938 not meet this condition.
3939 (do_store_flag): Likewise.
3940 * gimplify.c (gimplify_expr): Gimplify first argument of
3941 VEC_COND_EXPR to be a SSA name.
3942 * internal-fn.c (vec_cond_mask_direct): New.
3943 (vec_cond_direct): Likewise.
3944 (vec_condu_direct): Likewise.
3945 (vec_condeq_direct): Likewise.
3946 (expand_vect_cond_optab_fn): New.
3947 (expand_vec_cond_optab_fn): Likewise.
3948 (expand_vec_condu_optab_fn): Likewise.
3949 (expand_vec_condeq_optab_fn): Likewise.
3950 (expand_vect_cond_mask_optab_fn): Likewise.
3951 (expand_vec_cond_mask_optab_fn): Likewise.
3952 (direct_vec_cond_mask_optab_supported_p): Likewise.
3953 (direct_vec_cond_optab_supported_p): Likewise.
3954 (direct_vec_condu_optab_supported_p): Likewise.
3955 (direct_vec_condeq_optab_supported_p): Likewise.
3956 * internal-fn.def (VCOND): New OPTAB.
3958 (VCONDEQ): Likewise.
3959 (VCOND_MASK): Likewise.
3960 * optabs.c (get_rtx_code): Make it global.
3961 (expand_vec_cond_mask_expr): Removed.
3962 (expand_vec_cond_expr): Removed.
3963 * optabs.h (expand_vec_cond_expr): Likewise.
3964 (vector_compare_rtx): Make it global.
3965 * passes.def: Add new pass_gimple_isel pass.
3966 * tree-cfg.c (verify_gimple_assign_ternary): Add check
3967 for VEC_COND_EXPR about first argument.
3968 * tree-pass.h (make_pass_gimple_isel): New.
3969 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
3970 propagation of the first argument of a VEC_COND_EXPR.
3971 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
3972 first argument of a VEC_COND_EXPR.
3973 (optimize_vec_cond_expr): Likewise.
3974 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
3975 for a first argument of created VEC_COND_EXPR.
3976 (expand_vector_condition): Fix coding style.
3977 * tree-vect-stmts.c (vectorizable_condition): Gimplify
3979 * gimple-isel.cc: New file.
3981 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
3983 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
3984 (BSS_SECTION_ASM_OP): Use ".bss".
3985 (ASM_SPEC): Remove "-mattr=-code-object-v3".
3986 (LINK_SPEC): Add "--export-dynamic".
3987 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
3988 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
3989 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
3990 (load_image): Remove obsolete relocation handling.
3991 Add ".kd" suffix to the symbol names.
3992 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
3993 (gcn_option_override): Update gcn_isa test.
3994 (gcn_kernel_arg_types): Update all the assembler directives.
3995 Remove the obsolete options.
3996 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
3997 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
3999 (output_file_start): Rework assembler file header.
4000 (gcn_hsa_declare_function_name): Rework kernel metadata.
4001 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
4002 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
4003 (PROCESSOR_VEGA10): New enum value.
4004 (PROCESSOR_VEGA20): New enum value.
4006 2020-06-17 Martin Liska <mliska@suse.cz>
4008 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
4010 * gcov-tool.c (print_version): Likewise.
4011 * gcov.c (print_version): Likewise.
4013 2020-06-17 liuhongt <hongtao.liu@intel.com>
4016 * config/i386/i386-expand.c
4017 (ix86_expand_vec_shift_qihi_constant): New function.
4018 * config/i386/i386-protos.h
4019 (ix86_expand_vec_shift_qihi_constant): Declare.
4020 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
4021 V*QImode by constant.
4023 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
4025 PR tree-optimization/95649
4026 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
4027 value is a constant.
4029 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4031 * config.in: Regenerate.
4032 * config/s390/s390.c (print_operand): Emit vector alignment hints
4033 for target z13, if AS accepts them. For other targets the logic
4035 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
4037 * configure: Regenerate.
4038 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
4040 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4042 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
4044 (__arm_vaddq_m_n_s32): Likewise.
4045 (__arm_vaddq_m_n_s16): Likewise.
4046 (__arm_vaddq_m_n_u8): Likewise.
4047 (__arm_vaddq_m_n_u32): Likewise.
4048 (__arm_vaddq_m_n_u16): Likewise.
4049 (__arm_vaddq_m): Modify polymorphic variant.
4051 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4053 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
4054 and constraint of all the operands.
4055 (mve_sqrshrl_sat<supf>_di): Likewise.
4056 (mve_uqrshl_si): Likewise.
4057 (mve_sqrshr_si): Likewise.
4058 (mve_uqshll_di): Likewise.
4059 (mve_urshrl_di): Likewise.
4060 (mve_uqshl_si): Likewise.
4061 (mve_urshr_si): Likewise.
4062 (mve_sqshl_si): Likewise.
4063 (mve_srshr_si): Likewise.
4064 (mve_srshrl_di): Likewise.
4065 (mve_sqshll_di): Likewise.
4066 * config/arm/predicates.md (arm_low_register_operand): Define.
4068 2020-06-16 Jakub Jelinek <jakub@redhat.com>
4070 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
4071 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
4072 or dist_schedule clause on non-rectangular loops. Handle
4073 gimplification of non-rectangular lb/b expressions. When changing
4074 iteration variable, adjust also non-rectangular lb/b expressions
4076 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
4078 (struct omp_for_data): Add non_rect member.
4079 * omp-general.c (omp_extract_for_data): Handle non-rectangular
4080 loops. Fill in non_rect, m1, m2 and outer.
4081 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
4082 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
4083 non-rectangular loop cases and assert for cases that can't be
4085 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
4086 (dump_omp_loop_non_rect_expr): New function.
4087 (dump_generic_node): Handle non-rectangular OpenMP loops.
4088 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
4089 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
4092 2020-06-16 Richard Biener <rguenther@suse.de>
4095 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
4097 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
4100 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
4101 assertion and turn it into a early exit check.
4103 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
4105 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
4106 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
4107 true and all elements are zero, then always clear. Return GS_ERROR
4108 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
4109 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
4110 the type is aggregate non-addressable, ask gimplify_init_constructor
4111 whether it can generate a single access to the target.
4113 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
4115 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
4116 access on the LHS is replaced with a scalar access, propagate the
4117 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
4119 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4121 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
4122 TARGET_THREADPTR reference.
4123 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
4124 targetm.have_tls instead of TARGET_HAVE_TLS.
4125 (xtensa_option_override): Set targetm.have_tls to false in
4126 configurations without THREADPTR.
4128 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4130 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
4132 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
4133 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
4134 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
4135 xtensa_windowed_abi if needed.
4136 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
4138 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
4139 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
4141 (mabi=call0, mabi=windowed): New options.
4142 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
4144 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4146 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
4147 (TARGET_CAN_ELIMINATE): New macro.
4148 * config/xtensa/xtensa.h
4149 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
4150 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
4151 (HARD_FRAME_POINTER_REGNUM): Define using
4152 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
4153 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
4154 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
4155 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
4157 2020-06-15 Felix Yang <felix.yang@huawei.com>
4159 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
4160 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
4162 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
4164 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
4165 LOOP_VINFO_DATAREFS when possible.
4166 (update_epilogue_loop_vinfo): Likewise.
4168 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
4170 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
4172 (riscv_gpr_save_operation_p): Change type to unsigned for i and
4175 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
4178 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
4180 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
4181 * config/i386/sse.md (mul<mode>3): Drop mask_name since
4182 there's no real simd int8 multiplication instruction with
4183 mask. Also optimize it under TARGET_AVX512BW.
4184 (mulv8qi3): New expander.
4186 2020-06-12 Marco Elver <elver@google.com>
4188 * gimplify.c (gimplify_function_tree): Optimize and do not emit
4189 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
4190 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
4191 * tsan.c (instrument_memory_accesses): Make
4192 fentry_exit_instrument bool depend on new param.
4194 2020-06-12 Felix Yang <felix.yang@huawei.com>
4196 PR tree-optimization/95570
4197 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
4198 (vect_verify_datarefs_alignment): Call it to filter out data references
4199 in the loop whose alignment is irrelevant.
4200 (vect_get_peeling_costs_all_drs): Likewise.
4201 (vect_peeling_supportable): Likewise.
4202 (vect_enhance_data_refs_alignment): Likewise.
4204 2020-06-12 Richard Biener <rguenther@suse.de>
4206 PR tree-optimization/95633
4207 * tree-vect-stmts.c (vectorizable_condition): Properly
4208 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
4210 2020-06-12 Martin Liška <mliska@suse.cz>
4212 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
4213 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
4215 * lto-wrapper.c (merge_and_complain): Wrap option names.
4217 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
4219 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
4220 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
4221 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
4222 (vect_set_loop_condition_masked): Renamed to ...
4223 (vect_set_loop_condition_partial_vectors): ... this. Rename
4224 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
4225 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
4226 (vect_set_loop_condition_unmasked): Renamed to ...
4227 (vect_set_loop_condition_normal): ... this.
4228 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
4229 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
4230 to vect_set_loop_condition_partial_vectors.
4231 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
4232 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
4233 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
4235 (vect_analyze_loop_costing): ... this.
4236 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
4238 (vect_min_prec_for_max_niters): New, factored out from ...
4239 (vect_verify_full_masking): ... this. Rename
4240 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
4241 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
4242 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
4243 (vectorizable_reduction): Update some dumpings with partial
4244 vectors instead of fully-masked.
4245 (vectorizable_live_operation): Likewise.
4246 (vect_iv_limit_for_full_masking): Renamed to ...
4247 (vect_iv_limit_for_partial_vectors): ... this.
4248 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
4249 (check_load_store_for_partial_vectors): ... this. Update some
4250 dumpings with partial vectors instead of fully-masked.
4251 (vectorizable_store): Rename check_load_store_masking to
4252 check_load_store_for_partial_vectors.
4253 (vectorizable_load): Likewise.
4254 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
4255 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
4256 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
4257 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
4258 (vect_iv_limit_for_full_masking): Renamed to ...
4259 (vect_iv_limit_for_partial_vectors): this.
4260 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
4261 Rename iv_type to rgroup_iv_type.
4263 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
4265 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
4266 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
4267 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
4268 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
4269 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
4270 (insn_gen_fn::operator()): Replace overloaded definitions with
4271 a parameter-pack version.
4273 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
4276 * config/i386/i386-features.c (rest_of_insert_endbranch):
4278 (rest_of_insert_endbr_and_patchable_area): Change return type
4279 to void. Add need_endbr and patchable_area_size arguments.
4280 Don't call timevar_push nor timevar_pop. Replace
4281 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
4282 UNSPECV_PATCHABLE_AREA for patchable area.
4283 (pass_data_insert_endbranch): Renamed to ...
4284 (pass_data_insert_endbr_and_patchable_area): This. Change
4285 pass name to endbr_and_patchable_area.
4286 (pass_insert_endbranch): Renamed to ...
4287 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
4288 and patchable_area_size;.
4289 (pass_insert_endbr_and_patchable_area::gate): Set and check
4290 need_endbr and patchable_area_size.
4291 (pass_insert_endbr_and_patchable_area::execute): Call
4292 timevar_push and timevar_pop. Pass need_endbr and
4293 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
4294 (make_pass_insert_endbranch): Renamed to ...
4295 (make_pass_insert_endbr_and_patchable_area): This.
4296 * config/i386/i386-passes.def: Replace pass_insert_endbranch
4297 with pass_insert_endbr_and_patchable_area.
4298 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
4299 (make_pass_insert_endbranch): Renamed to ...
4300 (make_pass_insert_endbr_and_patchable_area): This.
4301 * config/i386/i386.c (ix86_asm_output_function_label): Set
4302 function_label_emitted to true.
4303 (ix86_print_patchable_function_entry): New function.
4304 (ix86_output_patchable_area): Likewise.
4305 (x86_function_profiler): Replace endbr_queued_at_entrance with
4306 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
4307 Call ix86_output_patchable_area to generate patchable area if
4309 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
4310 * config/i386/i386.h (queued_insn_type): New.
4311 (machine_function): Add function_label_emitted. Replace
4312 endbr_queued_at_entrance with insn_queued_at_entrance.
4313 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
4314 (patchable_area): New.
4316 2020-06-11 Martin Liska <mliska@suse.cz>
4318 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
4321 2020-06-11 Martin Liska <mliska@suse.cz>
4324 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
4327 2020-06-11 Martin Liska <mliska@suse.cz>
4328 Jakub Jelinek <jakub@redhat.com>
4331 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
4332 by using Pmode instead of ptr_mode.
4334 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4336 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
4337 (vect_set_loop_control): ... this.
4338 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
4339 (vect_set_loop_masks_directly): Renamed to ...
4340 (vect_set_loop_controls_directly): ... this. Also rename some
4341 variables with ctrl instead of mask. Rename vect_set_loop_mask to
4342 vect_set_loop_control.
4343 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
4344 Also rename some variables with ctrl instead of mask.
4345 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
4346 (release_vec_loop_controls): ... this. Rename rgroup_masks related
4348 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
4349 release_vec_loop_controls.
4350 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
4351 (vect_get_max_nscalars_per_iter): Likewise.
4352 (vect_estimate_min_profitable_iters): Likewise.
4353 (vect_record_loop_mask): Likewise.
4354 (vect_get_loop_mask): Likewise.
4355 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
4356 (struct rgroup_controls): ... this. Also rename mask_type
4357 to type and rename masks to controls.
4359 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4361 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
4362 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
4363 (vect_gen_vector_loop_niters): Likewise.
4364 (vect_do_peeling): Likewise.
4365 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
4366 fully_masked_p to using_partial_vectors_p.
4367 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
4368 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
4369 (determine_peel_for_niter): Likewise.
4370 (vect_estimate_min_profitable_iters): Likewise.
4371 (vect_transform_loop): Likewise.
4372 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
4373 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
4375 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4377 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
4378 can_fully_mask_p to can_use_partial_vectors_p.
4379 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
4380 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
4381 to saved_can_use_partial_vectors_p.
4382 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
4383 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
4384 (vectorizable_live_operation): Likewise.
4385 * tree-vect-stmts.c (permute_vec_elements): Likewise.
4386 (check_load_store_masking): Likewise.
4387 (vectorizable_operation): Likewise.
4388 (vectorizable_store): Likewise.
4389 (vectorizable_load): Likewise.
4390 (vectorizable_condition): Likewise.
4391 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
4392 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
4393 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
4395 2020-06-11 Martin Liska <mliska@suse.cz>
4397 * optc-save-gen.awk: Quote error string.
4399 2020-06-11 Alexandre Oliva <oliva@adacore.com>
4401 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
4403 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
4405 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
4406 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
4408 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
4409 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
4411 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
4413 * config/riscv/predicates.md (gpr_save_operation): New.
4414 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
4415 (riscv_gpr_save_operation_p): Ditto.
4416 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4417 Ignore USEs for gpr_save patter.
4418 * config/riscv/riscv.c (gpr_save_reg_order): New.
4419 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
4420 (riscv_gen_gpr_save_insn): New.
4421 (riscv_gpr_save_operation_p): Ditto.
4422 * config/riscv/riscv.md (S3_REGNUM): New.
4429 (S10_REGNUM): Ditto.
4430 (S11_REGNUM): Ditto.
4431 (gpr_save): Model USEs correctly.
4433 2020-06-10 Martin Sebor <msebor@redhat.com>
4437 * builtins.c (inform_access): New function.
4438 (check_access): Call it. Add argument.
4439 (addr_decl_size): Remove.
4440 (get_range): New function.
4441 (compute_objsize): New overload. Only use compute_builtin_object_size
4442 with raw memory function.
4443 (check_memop_access): Pass new argument to compute_objsize and
4445 (expand_builtin_memchr, expand_builtin_strcat): Same.
4446 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
4447 (expand_builtin_stpncpy, check_strncat_sizes): Same.
4448 (expand_builtin_strncat, expand_builtin_strncpy): Same.
4449 (expand_builtin_memcmp): Same.
4450 * builtins.h (check_nul_terminated_array): Declare extern.
4451 (check_access): Add argument.
4452 (struct access_ref, struct access_data): New structs.
4453 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
4454 (builtin_access::overlap): Call it.
4455 * tree-object-size.c (decl_init_size): Declare extern.
4456 (addr_object_size): Correct offset computation.
4457 * tree-object-size.h (decl_init_size): Declare.
4458 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
4459 to maybe_warn_overflow when assigning to an SSA_NAME.
4461 2020-06-10 Richard Biener <rguenther@suse.de>
4463 * tree-vect-loop.c (vect_determine_vectorization_factor):
4465 (_loop_vec_info::_loop_vec_info): Likewise.
4466 (vect_update_vf_for_slp): Likewise.
4467 (vect_analyze_loop_operations): Likewise.
4468 (update_epilogue_loop_vinfo): Likewise.
4469 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
4470 (vect_pattern_recog): Likewise.
4471 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
4472 (_bb_vec_info::_bb_vec_info): Likewise.
4473 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
4476 2020-06-10 Richard Biener <rguenther@suse.de>
4478 PR tree-optimization/95576
4479 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
4481 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
4484 * config/aarch64/aarch64-sve-builtins.h
4485 (sve_switcher::m_old_maximum_field_alignment): New member.
4486 * config/aarch64/aarch64-sve-builtins.cc
4487 (sve_switcher::sve_switcher): Save maximum_field_alignment in
4488 m_old_maximum_field_alignment and clear maximum_field_alignment.
4489 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
4491 2020-06-10 Richard Biener <rguenther@suse.de>
4493 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
4495 (_stmt_vec_info::vec_stmts): Likewise.
4496 (vec_info::stmt_vec_info_ro): New flag.
4497 (vect_finish_replace_stmt): Adjust declaration.
4498 (vect_finish_stmt_generation): Likewise.
4499 (vectorizable_induction): Likewise.
4500 (vect_transform_reduction): Likewise.
4501 (vectorizable_lc_phi): Likewise.
4502 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
4503 allocate stmt infos for increments.
4504 (vect_record_grouped_load_vectors): Adjust.
4505 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
4506 (vectorize_fold_left_reduction): Likewise.
4507 (vect_transform_reduction): Likewise.
4508 (vect_transform_cycle_phi): Likewise.
4509 (vectorizable_lc_phi): Likewise.
4510 (vectorizable_induction): Likewise.
4511 (vectorizable_live_operation): Likewise.
4512 (vect_transform_loop): Likewise.
4513 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
4514 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
4515 (vect_get_slp_defs): Likewise.
4516 (vect_transform_slp_perm_load): Likewise.
4517 (vect_schedule_slp_instance): Likewise.
4518 (vectorize_slp_instance_root_stmt): Likewise.
4519 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
4520 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
4521 (vect_finish_replace_stmt): Do not return anything.
4522 (vect_finish_stmt_generation): Likewise.
4523 (vect_build_gather_load_calls): Adjust.
4524 (vectorizable_bswap): Likewise.
4525 (vectorizable_call): Likewise.
4526 (vectorizable_simd_clone_call): Likewise.
4527 (vect_create_vectorized_demotion_stmts): Likewise.
4528 (vectorizable_conversion): Likewise.
4529 (vectorizable_assignment): Likewise.
4530 (vectorizable_shift): Likewise.
4531 (vectorizable_operation): Likewise.
4532 (vectorizable_scan_store): Likewise.
4533 (vectorizable_store): Likewise.
4534 (vectorizable_load): Likewise.
4535 (vectorizable_condition): Likewise.
4536 (vectorizable_comparison): Likewise.
4537 (vect_transform_stmt): Likewise.
4538 * tree-vectorizer.c (vec_info::vec_info): Initialize
4540 (vec_info::replace_stmt): Copy over stmt UID rather than
4541 unsetting/setting a stmt info allocating a new UID.
4542 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
4544 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
4546 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
4548 * gimple-ssa-evrp.c (class evrp_folder): New.
4549 (class evrp_dom_walker): Remove.
4550 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
4551 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
4552 * tree-ssa-copy.c (copy_folder::get_value): Same.
4553 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
4554 Pass stmt to get_value.
4555 (substitute_and_fold_engine::replace_phi_args_in): Same.
4556 (substitute_and_fold_dom_walker::after_dom_children): Call
4558 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
4559 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
4560 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
4561 call virtual functions for folding, pre_folding, and post folding.
4562 Call get_value with PHI. Tweak dump.
4563 * tree-ssa-propagate.h (class substitute_and_fold_engine):
4564 New argument to get_value.
4565 New virtual function pre_fold_bb.
4566 New virtual function post_fold_bb.
4567 New virtual function pre_fold_stmt.
4568 New virtual function post_new_stmt.
4569 New function propagate_into_phi_args.
4570 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
4571 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
4573 (vr_values::fold_cond): New.
4574 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
4575 * vr-values.h (class vr_values): Add
4576 simplify_cond_using_ranges_when_edge_is_known.
4578 2020-06-10 Martin Liska <mliska@suse.cz>
4581 * asan.c (asan_emit_stack_protection): Emit
4582 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
4585 2020-06-10 Tamar Christina <tamar.christina@arm.com>
4587 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
4589 2020-06-10 Richard Biener <rguenther@suse.de>
4591 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
4592 (vect_record_grouped_load_vectors): Likewise.
4593 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
4594 (vectorize_fold_left_reduction): Likewise.
4595 (vect_transform_reduction): Likewise.
4596 (vect_transform_cycle_phi): Likewise.
4597 (vectorizable_lc_phi): Likewise.
4598 (vectorizable_induction): Likewise.
4599 (vectorizable_live_operation): Likewise.
4600 (vect_transform_loop): Likewise.
4601 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
4603 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
4604 (vect_get_vec_def_for_operand): Likewise.
4605 (vect_get_vec_def_for_stmt_copy): Likewise.
4606 (vect_get_vec_defs_for_stmt_copy): Likewise.
4607 (vect_get_vec_defs_for_operand): New function.
4608 (vect_get_vec_defs): Likewise.
4609 (vect_build_gather_load_calls): Adjust.
4610 (vect_get_gather_scatter_ops): Likewise.
4611 (vectorizable_bswap): Likewise.
4612 (vectorizable_call): Likewise.
4613 (vectorizable_simd_clone_call): Likewise.
4614 (vect_get_loop_based_defs): Remove.
4615 (vect_create_vectorized_demotion_stmts): Adjust.
4616 (vectorizable_conversion): Likewise.
4617 (vectorizable_assignment): Likewise.
4618 (vectorizable_shift): Likewise.
4619 (vectorizable_operation): Likewise.
4620 (vectorizable_scan_store): Likewise.
4621 (vectorizable_store): Likewise.
4622 (vectorizable_load): Likewise.
4623 (vectorizable_condition): Likewise.
4624 (vectorizable_comparison): Likewise.
4625 (vect_transform_stmt): Adjust and remove no longer applicable
4627 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
4628 STMT_VINFO_VEC_STMTS.
4629 (vec_info::free_stmt_vec_info): Relase it.
4630 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
4631 (_stmt_vec_info::vec_stmts): Add.
4632 (STMT_VINFO_VEC_STMT): Remove.
4633 (STMT_VINFO_VEC_STMTS): New.
4634 (vect_get_vec_def_for_operand_1): Remove.
4635 (vect_get_vec_def_for_operand): Likewise.
4636 (vect_get_vec_defs_for_stmt_copy): Likewise.
4637 (vect_get_vec_def_for_stmt_copy): Likewise.
4638 (vect_get_vec_defs): New overloads.
4639 (vect_get_vec_defs_for_operand): New.
4640 (vect_get_slp_defs): Declare.
4642 2020-06-10 Qian Chao <qianchao9@huawei.com>
4644 PR tree-optimization/95569
4645 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
4647 2020-06-10 Martin Liska <mliska@suse.cz>
4649 PR tree-optimization/92860
4650 * optc-save-gen.awk: Generate new function cl_optimization_compare.
4651 * opth-gen.awk: Generate declaration of the function.
4653 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
4655 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
4656 'future' PowerPC platform.
4657 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
4658 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
4659 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
4661 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
4662 (rs6000_clone_map): Add 'future' system target_clones support.
4664 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
4666 * Makefile.in (ZSTD_INC): Define.
4667 (ZSTD_LIB): Include ZSTD_LDFLAGS.
4668 (CFLAGS-lto-compress.o): Add ZSTD_INC.
4669 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
4671 * configure: Rebuilt.
4673 2020-06-09 Jason Merrill <jason@redhat.com>
4676 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
4678 2020-06-09 Marco Elver <elver@google.com>
4680 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
4681 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
4682 builtin for volatile instrumentation of reads/writes.
4683 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
4684 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
4685 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
4686 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
4687 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
4688 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
4689 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
4690 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
4691 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
4692 * tsan.c (get_memory_access_decl): Argument if access is
4693 volatile. If param tsan-distinguish-volatile is non-zero, and
4694 access if volatile, return volatile instrumentation decl.
4695 (instrument_expr): Check if access is volatile.
4697 2020-06-09 Richard Biener <rguenther@suse.de>
4699 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
4701 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
4703 * omp-offload.c (add_decls_addresses_to_decl_constructor,
4704 omp_finish_file): With in_lto_p, stream out all offload-table
4705 items even if the symtab_node does not exist.
4707 2020-06-09 Richard Biener <rguenther@suse.de>
4709 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
4711 2020-06-09 Martin Liska <mliska@suse.cz>
4713 * gcov-dump.c (print_usage): Fix spacing for --raw option
4716 2020-06-09 Martin Liska <mliska@suse.cz>
4718 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
4719 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
4720 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
4721 Handle all sanitizer options.
4722 (can_inline_edge_p): Use renamed CIF_* enum value.
4724 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
4726 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
4728 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
4729 (@aarch64_bic<mode>): Enable unpacked BIC.
4730 (*bic<mode>3): Enable unpacked BIC.
4732 2020-06-09 Martin Liska <mliska@suse.cz>
4734 PR gcov-profile/95365
4735 * doc/gcov.texi: Compile and link one example in 2 steps.
4737 2020-06-09 Jakub Jelinek <jakub@redhat.com>
4739 PR tree-optimization/95527
4740 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
4742 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
4744 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
4745 'future' PowerPC platform.
4746 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
4747 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
4748 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
4750 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
4751 (rs6000_clone_map): Add 'future' system target_clones support.
4753 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
4757 * omp-offload.c (add_decls_addresses_to_decl_constructor,
4758 omp_finish_file): Skip removed items.
4759 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
4760 to this node for variables and functions.
4762 2020-06-08 Jason Merrill <jason@redhat.com>
4764 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
4765 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
4766 * configure: Regenerate.
4768 2020-06-08 Martin Sebor <msebor@redhat.com>
4770 * postreload.c (reload_cse_simplify_operands): Clear first array element
4771 before using it. Assert a precondition.
4773 2020-06-08 Jakub Jelinek <jakub@redhat.com>
4776 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
4777 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
4778 type is vector boolean.
4780 2020-06-08 Tamar Christina <tamar.christina@arm.com>
4782 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
4784 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
4786 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
4787 instead of VFP_REGS.
4789 2020-06-08 Martin Liska <mliska@suse.cz>
4791 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
4792 in all vcond* patterns.
4794 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
4796 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
4797 Define. No longer include <algorithm>.
4799 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
4801 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
4802 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
4803 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
4804 (parityhi2, parityqi2): New expanders.
4805 (parityhi2_cmp): Implement set parity flag with xorb insn.
4806 (parityqi2_cmp): Implement set parity flag with testb insn.
4807 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
4809 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
4812 * config/rs6000/rs6000.c (rs6000_option_override_internal):
4813 Override flag_cunroll_grow_size.
4815 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
4817 * common.opt (flag_cunroll_grow_size): New flag.
4818 * toplev.c (process_options): Set flag_cunroll_grow_size.
4819 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
4820 Use flag_cunroll_grow_size.
4822 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
4825 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
4826 (ipa_odr_summary_write): Update streaming.
4827 (ipa_odr_read_section): Update streaming.
4829 2020-06-06 Alexandre Oliva <oliva@adacore.com>
4832 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
4834 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
4835 Julian Brown <julian@codesourcery.com>
4837 * gimplify.c (gimplify_adjust_omp_clauses): Remove
4838 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
4840 2020-06-05 Richard Biener <rguenther@suse.de>
4842 PR tree-optimization/95539
4843 * tree-vect-data-refs.c
4844 (vect_slp_analyze_and_verify_instance_alignment): Use
4845 SLP_TREE_REPRESENTATIVE for the data-ref check.
4846 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
4847 back to the first scalar stmt rather than the
4848 SLP_TREE_REPRESENTATIVE to match previous behavior.
4850 2020-06-05 Felix Yang <felix.yang@huawei.com>
4853 * expr.c (emit_move_insn): Check src and dest of the copy to see
4854 if one or both of them are subregs, try to remove the subregs when
4855 innermode and outermode are equal in size and the mode change involves
4856 an implicit round trip through memory.
4858 2020-06-05 Jakub Jelinek <jakub@redhat.com>
4861 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
4862 define_insn_and_split patterns.
4863 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
4864 define_insn patterns.
4866 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
4868 * alloc-pool.h (object_allocator::remove_raw): New.
4869 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
4870 (occurrence::occurrence): Add.
4871 (occurrence::~occurrence): Likewise.
4872 (occurrence::new): Likewise.
4873 (occurrence::delete): Likewise.
4875 (insert_bb): Use new occurence (...) instead of occ_new.
4876 (register_division_in): Likewise.
4877 (free_bb): Use delete occ instead of manually removing
4880 2020-06-05 Richard Biener <rguenther@suse.de>
4883 * cfgexpand.c (expand_debug_expr): Avoid calling
4884 set_mem_attributes_minus_bitpos when we were expanding
4886 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
4887 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
4888 special-cases we do not want MEM_EXPRs for. Assert
4889 we end up with reasonable MEM_EXPRs.
4891 2020-06-05 Lili Cui <lili.cui@intel.com>
4894 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
4896 2020-06-04 Martin Sebor <msebor@redhat.com>
4900 * attribs.c (init_attr_rdwr_indices): Move function here.
4901 * attribs.h (rdwr_access_hash, rdwr_map): Define.
4902 (attr_access): Add 'none'.
4903 (init_attr_rdwr_indices): Declared function.
4904 * builtins.c (warn_for_access)): New function.
4905 (check_access): Call it.
4906 * builtins.h (checK-access): Add an optional argument.
4907 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
4908 (init_attr_rdwr_indices): Declare extern.
4909 (append_attrname): Handle attr_access::none.
4910 (maybe_warn_rdwr_sizes): Same.
4911 (initialize_argument_information): Update comments.
4912 * doc/extend.texi (attribute access): Document 'none'.
4913 * tree-ssa-uninit.c (struct wlimits): New.
4914 (maybe_warn_operand): New function.
4915 (maybe_warn_pass_by_reference): Same.
4916 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
4917 Also call for function calls.
4918 (pass_late_warn_uninitialized::execute): Adjust comments.
4919 (execute_early_warn_uninitialized): Same.
4921 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
4924 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
4925 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
4926 reload if the original insn has it too.
4928 2020-06-04 Richard Biener <rguenther@suse.de>
4930 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
4931 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
4933 2020-06-04 Martin Jambor <mjambor@suse.cz>
4936 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
4937 exceptions check to...
4938 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
4940 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
4941 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
4944 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4947 * config/arm/predicates.md (mve_scatter_memory): Define to
4948 match (mem (reg)) for scatter store memory.
4949 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
4950 define_insn to define_expand.
4951 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
4952 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
4953 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
4954 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
4955 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
4956 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
4957 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
4958 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
4959 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
4960 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
4961 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
4962 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
4963 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
4964 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
4965 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
4966 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
4967 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
4968 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
4969 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
4970 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
4971 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
4973 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
4974 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
4975 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
4976 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
4977 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
4978 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
4979 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
4980 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
4981 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
4982 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
4983 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
4984 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
4985 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
4986 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
4987 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
4988 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
4989 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
4990 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
4991 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
4992 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
4994 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4996 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
4998 (__arm_vbicq_n_s16): Likewise.
4999 (__arm_vbicq_n_u32): Likewise.
5000 (__arm_vbicq_n_s32): Likewise.
5001 (__arm_vbicq): Modify polymorphic variant.
5003 2020-06-04 Richard Biener <rguenther@suse.de>
5005 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
5006 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5007 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
5008 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
5009 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
5011 (vect_get_slp_defs): ... here.
5012 (vect_get_slp_vect_def): New function.
5014 2020-06-04 Richard Biener <rguenther@suse.de>
5016 * tree-vectorizer.h (_slp_tree::lanes): New.
5017 (SLP_TREE_LANES): Likewise.
5018 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5019 (vectorizable_reduction): Likewise.
5020 (vect_transform_cycle_phi): Likewise.
5021 (vectorizable_induction): Likewise.
5022 (vectorizable_live_operation): Likewise.
5023 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
5024 (vect_create_new_slp_node): Likewise.
5025 (slp_copy_subtree): Copy it.
5026 (vect_optimize_slp): Use it.
5027 (vect_slp_analyze_node_operations_1): Likewise.
5028 (vect_slp_convert_to_external): Likewise.
5029 (vect_bb_vectorization_profitable_p): Likewise.
5030 * tree-vect-stmts.c (vectorizable_load): Likewise.
5031 (get_vectype_for_scalar_type): Likewise.
5033 2020-06-04 Richard Biener <rguenther@suse.de>
5035 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
5036 (vect_build_slp_tree_2): Simplify building all external op
5038 (vect_slp_analyze_node_operations): Remove push/pop of
5039 STMT_VINFO_DEF_TYPE.
5040 (vect_schedule_slp_instance): Likewise.
5041 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
5042 stmt_info, use the vect_is_simple_use overload combining
5043 SLP and stmt_info analysis.
5044 (vect_is_simple_cond): Likewise.
5045 (vectorizable_store): Adjust.
5046 (vectorizable_condition): Likewise.
5047 (vect_is_simple_use): Fully handle invariant SLP nodes
5048 here. Amend stmt_info operand extraction with COND_EXPR
5050 * tree-vect-loop.c (vectorizable_reduction): Deal with
5051 COND_EXPR representation ugliness.
5053 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
5056 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
5057 Refine from *vcvtps2ph_store<mask_name>.
5058 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
5059 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
5060 (*vcvtps2ph256<merge_mask_name>): New define_insn.
5061 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
5062 * config/i386/subst.md (merge_mask): New define_subst.
5063 (merge_mask_name): New define_subst_attr.
5064 (merge_mask_operand3): Ditto.
5066 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
5068 PR tree-optimization/89430
5070 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
5071 remove ssa_name_ver, store, offset fields.
5072 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
5073 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
5074 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
5077 2020-06-04 Andreas Schwab <schwab@suse.de>
5080 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
5082 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
5084 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
5085 (trunc<mode><pmov_dst_3_lower>2): Refine from
5086 trunc<mode><pmov_dst_3>2.
5088 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
5090 * match.pd (tanh/sinh -> 1/cosh): New simplification.
5092 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
5095 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
5096 is_lfs_stfs_insn and make it recognize lfs as well.
5097 (prefixed_store_p): Use is_lfs_stfs_insn().
5098 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
5100 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
5102 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
5104 (odr_enums): New static var.
5105 (struct odr_enum_val): New struct.
5106 (class odr_enum): New struct.
5107 (odr_enum_map): New hashtable.
5108 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
5109 (add_type_duplicate): Likewise.
5110 (free_odr_warning_data): Do not free TYPE_VALUES.
5111 (register_odr_enum): New function.
5112 (ipa_odr_summary_write): New function.
5113 (ipa_odr_read_section): New function.
5114 (ipa_odr_summary_read): New function.
5115 (class pass_ipa_odr): New pass.
5116 (make_pass_ipa_odr): New function.
5117 * ipa-utils.h (register_odr_enum): Declare.
5118 * lto-section-in.c: (lto_section_name): Add odr_types section.
5119 * lto-streamer.h (enum lto_section_type): Add odr_types section.
5120 * passes.def: Add odr_types pass.
5121 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
5123 (hash_tree): Likewise.
5124 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
5126 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
5128 * timevar.def (TV_IPA_ODR): New timervar.
5129 * tree-pass.h (make_pass_ipa_odr): Declare.
5130 * tree.c (free_lang_data_in_type): Regiser ODR types.
5132 2020-06-03 Romain Naour <romain.naour@gmail.com>
5134 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
5137 2020-06-03 Richard Biener <rguenther@suse.de>
5139 PR tree-optimization/95487
5140 * tree-vect-stmts.c (vectorizable_store): Use a truth type
5141 for the scatter mask.
5143 2020-06-03 Richard Biener <rguenther@suse.de>
5145 PR tree-optimization/95495
5146 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
5147 SLP_TREE_REPRESENTATIVE in the shift assertion.
5149 2020-06-03 Tom Tromey <tromey@adacore.com>
5151 * spellcheck.c (CASE_COST): New define.
5152 (BASE_COST): New define.
5153 (get_edit_distance): Recognize case changes.
5154 (get_edit_distance_cutoff): Update.
5155 (test_edit_distances): Update.
5156 (get_old_cutoff): Update.
5157 (test_find_closest_string): Add case sensitivity test.
5159 2020-06-03 Richard Biener <rguenther@suse.de>
5161 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
5162 the cost vector to unset the visited flag on stmts.
5164 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
5166 * gimplify.c (omp_notice_variable): Use new hook.
5167 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
5168 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
5169 (LANG_HOOKS_DECLS): Add it.
5170 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
5171 (lhd_omp_predetermined_mapping): New.
5172 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
5174 2020-06-03 Jan Hubicka <jh@suse.cz>
5176 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
5177 add LTO_first_tree_tag and LTO_first_gimple_tag.
5178 (lto_tag_is_tree_code_p): Update.
5179 (lto_tag_is_gimple_code_p): Update.
5180 (lto_gimple_code_to_tag): Update.
5181 (lto_tag_to_gimple_code): Update.
5182 (lto_tree_code_to_tag): Update.
5183 (lto_tag_to_tree_code): Update.
5185 2020-06-02 Felix Yang <felix.yang@huawei.com>
5188 * config/aarch64/aarch64.c (aarch64_short_vector_p):
5189 Leave later code to report an error if SVE is disabled.
5191 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5193 * config/aarch64/aarch64-cores.def (zeus): Define.
5194 * config/aarch64/aarch64-tune.md: Regenerate.
5195 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
5197 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
5200 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
5202 (is_stfs_insn): New helper function.
5204 2020-06-02 Jan Hubicka <jh@suse.cz>
5206 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
5208 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
5210 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
5212 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
5213 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
5214 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
5216 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
5219 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
5220 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
5222 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5224 * config/s390/s390.c (print_operand): Emit vector alignment
5227 2020-06-02 Martin Liska <mliska@suse.cz>
5229 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
5230 as they have variable number of counters.
5231 * gcov-dump.c (main): Add new option -r.
5232 (print_usage): Likewise.
5233 (tag_counters): All new raw format.
5234 * gcov-io.h (struct gcov_kvp): New.
5235 (GCOV_TOPN_VALUES): Remove.
5236 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
5237 (GCOV_TOPN_MEM_COUNTERS): New.
5238 (GCOV_TOPN_DISK_COUNTERS): Likewise.
5239 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
5240 * ipa-profile.c (ipa_profile_generate_summary): Use
5241 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
5242 (ipa_profile_write_edge_summary): Likewise.
5243 (ipa_profile_read_edge_summary): Likewise.
5244 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
5245 * profile.c (sort_hist_values): Sort variable number
5247 (compute_value_histograms): Special case for TOP N counters
5248 that have dynamic number of key-value pairs.
5249 * value-prof.c (dump_histogram_value): Dump variable number
5251 (stream_in_histogram_value): Stream in variable number
5252 of key-value pairs for TOP N counter.
5253 (get_nth_most_common_value): Deal with variable number
5255 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
5257 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
5259 * doc/gcov-dump.texi: Document new -r option.
5261 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
5264 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
5266 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
5268 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
5269 returns (const_int 0) for the destination, then emit nothing.
5271 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
5273 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
5274 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
5275 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
5276 LTO_const_decl_ref, LTO_imported_decl_ref,
5277 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
5278 LTO_namelist_decl_ref; add LTO_global_stream_ref.
5279 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
5280 (lto_input_scc): Update.
5281 (lto_input_tree_1): Update.
5282 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
5283 * lto-streamer.c (lto_tag_name): Update.
5285 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
5287 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
5288 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
5289 * lto-cgraph.c (lto_output_node): Likewise.
5290 (lto_output_varpool_node): Likewise.
5291 (output_offload_tables): Likewise.
5292 (input_node): Likewise.
5293 (input_varpool_node): Likewise.
5294 (input_offload_tables): Likewise.
5295 * lto-streamer-in.c (lto_input_tree_ref): Declare.
5296 (lto_input_var_decl_ref): Declare.
5297 (lto_input_fn_decl_ref): Declare.
5298 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
5299 (lto_output_var_decl_index): Rename to ..
5300 (lto_output_var_decl_ref): ... this.
5301 (lto_output_fn_decl_index): Rename to ...
5302 (lto_output_fn_decl_ref): ... this.
5303 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
5304 (DEFINE_DECL_STREAM_FUNCS): Remove.
5305 (lto_output_var_decl_index): Remove.
5306 (lto_output_fn_decl_index): Remove.
5307 (lto_output_var_decl_ref): Declare.
5308 (lto_output_fn_decl_ref): Declare.
5309 (lto_input_var_decl_ref): Declare.
5310 (lto_input_fn_decl_ref): Declare.
5312 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
5314 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
5315 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
5316 dump infomation if there is no adjusted parameter.
5317 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
5319 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
5321 * Makefile.in (gimple-array-bounds.o): New.
5322 * tree-vrp.c: Move array bounds code...
5323 * gimple-array-bounds.cc: ...here...
5324 * gimple-array-bounds.h: ...and here.
5326 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
5328 * Makefile.in (OBJS): Add value-range-equiv.o.
5329 * tree-vrp.c (*value_range_equiv*): Move to...
5330 * value-range-equiv.cc: ...here.
5331 * tree-vrp.h (class value_range_equiv): Move to...
5332 * value-range-equiv.h: ...here.
5333 * vr-values.h: Include value-range-equiv.h.
5335 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
5338 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
5339 lattice for simple pass-through by-ref argument.
5341 2020-05-31 Jeff Law <law@redhat.com>
5343 * lra.c (add_auto_inc_notes): Remove function.
5344 * reload1.c (add_auto_inc_notes): Similarly. Move into...
5345 * rtlanal.c (add_auto_inc_notes): New function.
5346 * rtl.h (add_auto_inc_notes): Add prototype.
5347 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
5350 2020-05-31 Jan Hubicka <jh@suse.cz>
5352 * lto-section-out.c (lto_output_decl_index): Remove.
5353 (lto_output_field_decl_index): Move to lto-streamer-out.c
5354 (lto_output_fn_decl_index): Move to lto-streamer-out.c
5355 (lto_output_namespace_decl_index): Remove.
5356 (lto_output_var_decl_index): Remove.
5357 (lto_output_type_decl_index): Remove.
5358 (lto_output_type_ref_index): Remove.
5359 * lto-streamer-out.c (output_type_ref): Remove.
5360 (lto_get_index): New function.
5361 (lto_output_tree_ref): Remove.
5362 (lto_indexable_tree_ref): New function.
5363 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
5364 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
5365 (stream_write_tree_ref): Update.
5366 (lto_output_tree): Update.
5367 * lto-streamer.h (lto_output_decl_index): Remove prototype.
5368 (lto_output_field_decl_index): Remove prototype.
5369 (lto_output_namespace_decl_index): Remove prototype.
5370 (lto_output_type_decl_index): Remove prototype.
5371 (lto_output_type_ref_index): Remove prototype.
5372 (lto_output_var_decl_index): Move.
5373 (lto_output_fn_decl_index): Move
5375 2020-05-31 Jakub Jelinek <jakub@redhat.com>
5378 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
5381 2020-05-31 Jeff Law <law@redhat.com>
5383 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
5385 2020-05-31 Jim Wilson <jimw@sifive.com>
5387 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
5389 2020-05-30 Jonathan Yong <10walls@gmail.com>
5391 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
5392 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
5393 import library, but also contains some functions that invoke
5394 others in KERNEL32.DLL.
5396 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
5398 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
5399 (altivec_vmrglw_direct): Ditto.
5400 (altivec_vperm_<mode>_direct): Ditto.
5401 (altivec_vperm_v8hiv16qi): Ditto.
5402 (*altivec_vperm_<mode>_uns_internal): Ditto.
5403 (*altivec_vpermr_<mode>_internal): Ditto.
5404 (vperm_v8hiv4si): Ditto.
5405 (vperm_v16qiv8hi): Ditto.
5407 2020-05-29 Jan Hubicka <jh@suse.cz>
5409 * lto-streamer-in.c (streamer_read_chain): Move here from
5411 (stream_read_tree_ref): New.
5412 (lto_input_tree_1): Simplify.
5413 * lto-streamer-out.c (stream_write_tree_ref): New.
5414 (lto_write_tree_1): Simplify.
5415 (lto_output_tree_1): Simplify.
5416 (DFS::DFS_write_tree): Simplify.
5417 (streamer_write_chain): Move here from tree-stremaer-out.c.
5418 * lto-streamer.h (lto_output_tree_ref): Update prototype.
5419 (stream_read_tree_ref): Declare
5420 (stream_write_tree_ref): Declare
5421 * tree-streamer-in.c (streamer_read_chain): Update to use
5422 stream_read_tree_ref.
5423 (lto_input_ts_common_tree_pointers): Likewise.
5424 (lto_input_ts_vector_tree_pointers): Likewise.
5425 (lto_input_ts_poly_tree_pointers): Likewise.
5426 (lto_input_ts_complex_tree_pointers): Likewise.
5427 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
5428 (lto_input_ts_decl_common_tree_pointers): Likewise.
5429 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
5430 (lto_input_ts_field_decl_tree_pointers): Likewise.
5431 (lto_input_ts_function_decl_tree_pointers): Likewise.
5432 (lto_input_ts_type_common_tree_pointers): Likewise.
5433 (lto_input_ts_type_non_common_tree_pointers): Likewise.
5434 (lto_input_ts_list_tree_pointers): Likewise.
5435 (lto_input_ts_vec_tree_pointers): Likewise.
5436 (lto_input_ts_exp_tree_pointers): Likewise.
5437 (lto_input_ts_block_tree_pointers): Likewise.
5438 (lto_input_ts_binfo_tree_pointers): Likewise.
5439 (lto_input_ts_constructor_tree_pointers): Likewise.
5440 (lto_input_ts_omp_clause_tree_pointers): Likewise.
5441 * tree-streamer-out.c (streamer_write_chain): Update to use
5442 stream_write_tree_ref.
5443 (write_ts_common_tree_pointers): Likewise.
5444 (write_ts_vector_tree_pointers): Likewise.
5445 (write_ts_poly_tree_pointers): Likewise.
5446 (write_ts_complex_tree_pointers): Likewise.
5447 (write_ts_decl_minimal_tree_pointers): Likewise.
5448 (write_ts_decl_common_tree_pointers): Likewise.
5449 (write_ts_decl_non_common_tree_pointers): Likewise.
5450 (write_ts_decl_with_vis_tree_pointers): Likewise.
5451 (write_ts_field_decl_tree_pointers): Likewise.
5452 (write_ts_function_decl_tree_pointers): Likewise.
5453 (write_ts_type_common_tree_pointers): Likewise.
5454 (write_ts_type_non_common_tree_pointers): Likewise.
5455 (write_ts_list_tree_pointers): Likewise.
5456 (write_ts_vec_tree_pointers): Likewise.
5457 (write_ts_exp_tree_pointers): Likewise.
5458 (write_ts_block_tree_pointers): Likewise.
5459 (write_ts_binfo_tree_pointers): Likewise.
5460 (write_ts_constructor_tree_pointers): Likewise.
5461 (write_ts_omp_clause_tree_pointers): Likewise.
5462 (streamer_write_tree_body): Likewise.
5463 (streamer_write_integer_cst): Likewise.
5464 * tree-streamer.h (streamer_read_chain):Declare.
5465 (streamer_write_chain):Declare.
5466 (streamer_write_tree_body): Update prototype.
5467 (streamer_write_integer_cst): Update prototype.
5469 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
5472 * configure: Regenerated.
5474 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
5476 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
5477 (add<mode>3_vcc_zext_dup_exec): Likewise.
5478 (add<mode>3_vcc_zext_dup2): Likewise.
5479 (add<mode>3_vcc_zext_dup2_exec): Likewise.
5481 2020-05-29 Richard Biener <rguenther@suse.de>
5483 PR tree-optimization/95272
5484 * tree-vectorizer.h (_slp_tree::representative): Add.
5485 (SLP_TREE_REPRESENTATIVE): Likewise.
5486 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
5488 (vectorizable_live_operation): Use the representative to
5489 attach the reduction info to.
5490 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
5491 SLP_TREE_REPRESENTATIVE.
5492 (vect_create_new_slp_node): Likewise.
5493 (slp_copy_subtree): Copy it.
5494 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
5495 (vect_slp_analyze_node_operations_1): Pass the representative
5496 to vect_analyze_stmt.
5497 (vect_schedule_slp_instance): Pass the representative to
5498 vect_transform_stmt.
5500 2020-05-29 Richard Biener <rguenther@suse.de>
5502 PR tree-optimization/95356
5503 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
5504 node hacking during analysis.
5506 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
5509 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
5511 2020-05-29 Richard Biener <rguenther@suse.de>
5513 PR tree-optimization/95403
5514 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
5517 2020-05-29 Jakub Jelinek <jakub@redhat.com>
5520 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
5521 declare variant cgraph node removal callback.
5523 2020-05-29 Jakub Jelinek <jakub@redhat.com>
5526 * expr.c (store_expr): If expr_size is constant and significantly
5527 larger than TREE_STRING_LENGTH, set temp to just the
5528 TREE_STRING_LENGTH portion of the STRING_CST.
5530 2020-05-29 Richard Biener <rguenther@suse.de>
5532 PR tree-optimization/95393
5533 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
5534 to build the min/max expression so we simplify cases like
5535 MAX(0, s) immediately.
5537 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
5539 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
5540 for unpacked EOR, ORR, AND.
5542 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
5544 * Makefile.in: don't look for libiberty in the "pic" subdirectory
5545 when building for Mingw. Add dependency on xgcc with the proper
5548 2020-05-28 Jeff Law <law@redhat.com>
5550 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
5552 2020-05-28 Jeff Law <law@redhat.com>
5554 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
5555 make a nonzero adjustment to the memory offset.
5556 (b<ior,xor>hi_msx): Turn into a splitter.
5558 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
5560 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
5561 Fix off-by-one error.
5563 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
5565 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
5566 wb_candidate1 and wb_candidate2.
5567 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
5568 wb_candidate1 and wb_candidate2 if we decided not to use them.
5570 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
5573 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
5574 we have at least some CFI operations when using a frame pointer.
5575 Only redefine the CFA if we have CFI operations.
5577 2020-05-28 Richard Biener <rguenther@suse.de>
5579 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
5580 case for !SLP_TREE_VECTYPE.
5581 (vect_slp_analyze_node_operations): Adjust.
5583 2020-05-28 Richard Biener <rguenther@suse.de>
5585 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
5586 (SLP_TREE_VEC_DEFS): Likewise.
5587 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
5588 (_slp_tree::~_slp_tree): Likewise.
5589 (vect_mask_constant_operand_p): Remove unused function.
5590 (vect_get_constant_vectors): Rename to...
5591 (vect_create_constant_vectors): ... this. Take the
5592 invariant node as argument and code generate it. Remove
5593 dead code, remove temporary asserts. Pass a NULL stmt_info
5594 to vect_init_vector.
5595 (vect_get_slp_defs): Simplify.
5596 (vect_schedule_slp_instance): Code-generate externals and
5597 invariants using vect_create_constant_vectors.
5599 2020-05-28 Richard Biener <rguenther@suse.de>
5601 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
5602 Conditionalize stmt_info use, assert the new stmt cannot throw
5604 (vect_finish_stmt_generation): Adjust assert.
5606 2020-05-28 Richard Biener <rguenther@suse.de>
5608 PR tree-optimization/95273
5609 PR tree-optimization/95356
5610 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
5611 what we set the vector type of the shift operand SLP node
5614 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
5616 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
5619 2020-05-28 Martin Liska <mliska@suse.cz>
5622 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
5623 rename ipcp-unit-growth to ipa-cp-unit-growth.
5625 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
5627 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
5628 from *avx512vl_<code>v2div2qi_store and refine memory size of
5630 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
5631 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
5632 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
5633 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
5634 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
5635 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
5636 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
5637 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
5638 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
5639 (*avx512vl_<code>v2div2si2_store_1): Ditto.
5640 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
5641 (*avx512f_<code>v8div16qi2_store_1): Ditto.
5642 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
5643 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
5644 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
5645 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
5646 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
5647 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
5648 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
5649 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
5650 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
5651 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
5652 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
5653 (*avx512vl_<code>v2div2si2_store_2): Ditto.
5654 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
5655 (*avx512f_<code>v8div16qi2_store_2): Ditto.
5656 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
5657 * config/i386/i386-builtin-types.def: Adjust builtin type.
5658 * config/i386/i386-expand.c: Ditto.
5659 * config/i386/i386-builtin.def: Adjust builtin.
5660 * config/i386/avx512fintrin.h: Ditto.
5661 * config/i386/avx512vlbwintrin.h: Ditto.
5662 * config/i386/avx512vlintrin.h: Ditto.
5664 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
5666 PR gcov-profile/95332
5667 * gcov-io.c (gcov_var::endian): Move field.
5668 (from_file): Add IN_GCOV_TOOL check.
5669 * gcov-io.h (gcov_magic): Ditto.
5671 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
5673 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
5675 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
5677 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
5679 * builtin-types.def (BT_UINT128): New primitive type.
5680 (BT_FN_UINT128_UINT128): New function type.
5681 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
5682 * doc/extend.texi (__builtin_bswap128): Document it.
5683 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
5684 (is_inexpensive_builtin): Likewise.
5685 * fold-const-call.c (fold_const_call_ss): Likewise.
5686 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
5687 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
5688 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
5689 (vectorizable_call): Likewise.
5690 * optabs.c (expand_unop): Always use the double word path for it.
5691 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
5692 * tree.h (uint128_type_node): New global type.
5693 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
5695 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5697 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
5698 (mmx_hsubv2sf3): Ditto.
5699 (mmx_haddsubv2sf3): New expander.
5700 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
5701 RTL template to model horizontal subtraction and addition.
5702 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
5705 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5708 * config/i386/sse.md
5709 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
5710 Remove %q operand modifier from insn template.
5711 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
5713 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5715 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
5716 Enable insn pattern for TARGET_MMX_WITH_SSE.
5717 (*mmx_movshdup): New insn pattern.
5718 (*mmx_movsldup): Ditto.
5719 (*mmx_movss): Ditto.
5720 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
5722 (expand_vec_perm_movs): Handle E_V2SFmode.
5723 (expand_vec_perm_even_odd): Ditto.
5724 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
5725 is already handled by standard shuffle patterns.
5727 2020-05-27 Richard Biener <rguenther@suse.de>
5729 PR tree-optimization/95295
5730 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
5731 merging stores from paths.
5733 2020-05-27 Richard Biener <rguenther@suse.de>
5735 PR tree-optimization/95356
5736 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
5737 type for the shift operand.
5739 2020-05-27 Richard Biener <rguenther@suse.de>
5741 PR tree-optimization/95335
5742 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
5743 lvisited for nodes made external.
5745 2020-05-27 Richard Biener <rguenther@suse.de>
5747 * dump-context.h (debug_dump_context): New class.
5748 (dump_context): Make it friend.
5749 * dumpfile.c (debug_dump_context::debug_dump_context):
5751 (debug_dump_context::~debug_dump_context): Likewise.
5752 * tree-vect-slp.c: Include dump-context.h.
5753 (vect_print_slp_tree): Dump a single SLP node.
5754 (debug): New overload for slp_tree.
5755 (vect_print_slp_graph): Rename from vect_print_slp_tree and
5757 (vect_analyze_slp_instance): Adjust.
5759 2020-05-27 Jakub Jelinek <jakub@redhat.com>
5762 * omp-general.c (omp_declare_variant_remove_hook): New function.
5763 (omp_resolve_declare_variant): Always return base if it is already
5764 declare_variant_alt magic decl itself. Register
5765 omp_declare_variant_remove_hook as cgraph node removal hook.
5767 2020-05-27 Jeff Law <law@redhat.com>
5769 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
5770 for the primary input operand.
5771 (tstsi_variable_bit_qi): Similarly.
5773 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
5775 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
5777 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
5780 * ipa-utils.h (odr_type_p): Also permit calls with
5781 only flag_generate_offload set.
5783 2020-05-26 Alexandre Oliva <oliva@adacore.com>
5785 * gcc.c (validate_switches): Add braced parameter. Adjust all
5786 callers. Expected and skip trailing brace only if braced.
5787 Return after handling one atom otherwise.
5788 (DUMPS_OPTIONS): New.
5789 (cpp_debug_options): Define in terms of it.
5791 2020-05-26 Richard Biener <rguenther@suse.de>
5793 PR tree-optimization/95327
5794 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
5795 when we are not using a scalar shift.
5797 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
5799 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
5800 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
5801 Handle E_V2SImode and E_V4HImode.
5802 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
5803 Assert that E_V2SImode is already handled.
5804 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
5805 is already handled by standard shuffle patterns.
5807 2020-05-26 Jan Hubicka <jh@suse.cz>
5809 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
5812 2020-05-26 Jakub Jelinek <jakub@redhat.com>
5815 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
5816 * omp-general.h (find_combined_omp_for): Declare.
5817 * omp-general.c: Include tree-iterator.h.
5818 (find_combined_omp_for): New function, moved from gimplify.c.
5820 2020-05-26 Alexandre Oliva <oliva@adacore.com>
5822 * common.opt (aux_base_name): Define.
5823 (dumpbase, dumpdir): Mark as Driver options.
5824 (-dumpbase, -dumpdir): Likewise.
5825 (dumpbase-ext, -dumpbase-ext): New.
5826 (auxbase, auxbase-strip): Drop.
5827 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
5829 (-o): Introduce the notion of primary output, mention it
5830 influences auxiliary and dump output names as well, add
5832 (-save-temps): Adjust, move examples into -dump*.
5833 (-save-temps=cwd, -save-temps=obj): Likewise.
5834 (-fdump-final-insns): Adjust.
5835 * dwarf2out.c (gen_producer_string): Drop auxbase and
5836 auxbase_strip; add dumpbase_ext.
5837 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
5838 (save_temps_prefix, save_temps_length): Drop.
5839 (save_temps_overrides_dumpdir): New.
5840 (dumpdir, dumpbase, dumpbase_ext): New.
5841 (dumpdir_length, dumpdir_trailing_dash_added): New.
5842 (outbase, outbase_length): New.
5843 (The Specs Language): Introduce %". Adjust %b and %B.
5844 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
5845 Precede object file with %w when it's the primary output.
5846 (cpp_debug_options): Do not pass on incoming -dumpdir,
5847 -dumpbase and -dumpbase-ext options; recompute them with
5849 (cc1_options): Drop auxbase with and without compare-debug;
5850 use cpp_debug_options instead of dumpbase. Mark asm output
5851 with %w when it's the primary output.
5852 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
5853 %:replace-exception. Add %:dumps.
5854 (driver_handle_option): Implement -save-temps=*/-dumpdir
5855 mutual overriding logic. Save dumpdir, dumpbase and
5856 dumpbase-ext options. Do not save output_file in
5858 (adds_single_suffix_p): New.
5859 (single_input_file_index): New.
5860 (process_command): Combine output dir, output base name, and
5861 dumpbase into dumpdir and outbase.
5862 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
5863 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
5864 and outbase instead of input_basename in %b, %B and in
5865 -save-temps aux files. Handle empty argument %".
5866 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
5867 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
5868 naming. Spec-quote the computed -fdump-final-insns file name.
5869 (debug_auxbase_opt): Drop.
5870 (compare_debug_self_opt_spec_function): Drop auxbase-strip
5872 (compare_debug_auxbase_opt_spec_function): Drop.
5873 (not_actual_file_p): New.
5874 (replace_extension_spec_func): Drop.
5875 (dumps_spec_func): New.
5876 (convert_white_space): Split-out parts into...
5877 (quote_string, whitespace_to_convert_p): ... these. New.
5878 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
5879 (driver::finalize): Release and reset new variables; drop
5881 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
5882 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
5883 empty string otherwise.
5884 (DUMPBASE_SUFFIX): Drop leading period.
5885 (debug_objcopy): Use concat.
5886 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
5887 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
5888 component. Simplify temp file names.
5889 * opts.c (finish_options): Drop aux base name handling.
5890 (common_handle_option): Drop auxbase-strip handling.
5891 * toplev.c (print_switch_values): Drop auxbase, add
5893 (process_options): Derive aux_base_name from dump_base_name
5895 (lang_dependent_init): Compute dump_base_ext along with
5896 dump_base_name. Disable stack usage and callgraph-info during
5897 lto generation and compare-debug recompilation.
5899 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
5900 Uroš Bizjak <ubizjak@gmail.com>
5904 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
5905 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5906 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
5907 float<floatunssuffix>v2div2sf2.
5908 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5909 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
5910 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
5911 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
5912 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5913 * config/i386/i386-builtin.def: Ditto.
5914 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
5915 subregs when both omode and imode are vector mode and
5916 have the same inner mode.
5918 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
5920 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
5921 Only turn MEM_REFs into bit-field stores for small bit-field regions.
5922 (imm_store_chain_info::output_merged_store): Be prepared for sources
5923 with non-integral type in the bit-field insertion case.
5924 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
5925 the largest size for the bit-field case.
5927 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
5929 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
5930 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
5931 (*vec_dupv4hi): Redefine as define_insn.
5932 Remove alternative with general register input.
5933 (*vec_dupv2si): Ditto.
5935 2020-05-25 Richard Biener <rguenther@suse.de>
5937 PR tree-optimization/95309
5938 * tree-vect-slp.c (vect_get_constant_vectors): Move number
5939 of vector computation ...
5940 (vect_slp_analyze_node_operations): ... to analysis phase.
5942 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
5944 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
5945 * lto-streamer.h (streamer_debugging): New constant
5946 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
5947 streamer_debugging check.
5948 (streamer_get_pickled_tree): Likewise.
5949 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
5951 2020-05-25 Richard Biener <rguenther@suse.de>
5953 PR tree-optimization/95308
5954 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
5955 test for TARGET_MEM_REFs.
5957 2020-05-25 Richard Biener <rguenther@suse.de>
5959 PR tree-optimization/95295
5960 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
5961 RHSes and drop to full sm_other if they are not equal.
5963 2020-05-25 Richard Biener <rguenther@suse.de>
5965 PR tree-optimization/95271
5966 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
5967 children vector type.
5968 (vectorizable_call): Pass down slp ops.
5970 2020-05-25 Richard Biener <rguenther@suse.de>
5972 PR tree-optimization/95297
5973 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
5974 skip updating operand 1 vector type.
5976 2020-05-25 Richard Biener <rguenther@suse.de>
5978 PR tree-optimization/95284
5979 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
5982 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
5985 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
5986 (trunc<mode><sf2dfmode_lower>2) New expander.
5987 (extend<sf2dfmode_lower><mode>2): Ditto.
5989 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
5991 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
5992 ubsan_{data,type},ASAN symbols linker-visible.
5994 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5996 * lto-streamer-out.c (DFS::DFS): Silence warning.
5998 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
6001 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
6002 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
6004 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6006 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
6009 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6011 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
6012 * lto-streamer-out.c (create_output_block): Fix whitespace
6013 (lto_write_tree_1): Add (debug) dump.
6014 (DFS::DFS): Add dump.
6015 (DFS::DFS_write_tree_body): Do not dump here.
6016 (lto_output_tree): Improve dumping; do not stream ref when not needed.
6017 (produce_asm_for_decls): Fix whitespace.
6018 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
6019 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
6021 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
6024 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
6025 (truncv32hiv32qi2): Ditto.
6026 (trunc<ssedoublemodelower><mode>2): Ditto.
6027 (trunc<mode><pmov_dst_3>2): Ditto.
6028 (trunc<mode><pmov_dst_mode_4>2): Ditto.
6029 (truncv2div2si2): Ditto.
6030 (truncv8div8qi2): Ditto.
6031 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
6032 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
6033 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
6034 *avx512vl_<code><mode>v<ssescalarnum>qi2.
6036 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
6039 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6042 2020-05-22 Richard Biener <rguenther@suse.de>
6044 PR tree-optimization/95268
6045 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
6048 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6050 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
6053 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6055 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
6056 (lto_input_scc): Optimize streaming of entry lengths.
6057 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
6058 (DFS::DFS): Optimize stremaing of entry lengths
6060 2020-05-22 Richard Biener <rguenther@suse.de>
6063 * doc/invoke.texi (flto): Document behavior of diagnostic
6066 2020-05-22 Richard Biener <rguenther@suse.de>
6068 * tree-vectorizer.h (vect_is_simple_use): New overload.
6069 (vect_maybe_update_slp_op_vectype): New.
6070 * tree-vect-stmts.c (vect_is_simple_use): New overload
6071 accessing operands of SLP vs. non-SLP operation transparently.
6072 (vect_maybe_update_slp_op_vectype): New function updating
6073 the possibly shared SLP operands vector type.
6074 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
6075 using the new vect_is_simple_use overload; update SLP invariant
6076 operand nodes vector type.
6077 (vectorizable_comparison): Likewise.
6078 (vectorizable_call): Likewise.
6079 (vectorizable_conversion): Likewise.
6080 (vectorizable_shift): Likewise.
6081 (vectorizable_store): Likewise.
6082 (vectorizable_condition): Likewise.
6083 (vectorizable_assignment): Likewise.
6084 * tree-vect-loop.c (vectorizable_reduction): Likewise.
6085 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
6086 present SLP_TREE_VECTYPE and check it matches previous
6089 2020-05-22 Richard Biener <rguenther@suse.de>
6091 PR tree-optimization/95248
6092 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
6094 2020-05-22 Richard Biener <rguenther@suse.de>
6096 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
6097 (_slp_tree::~_slp_tree): Likewise.
6098 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
6100 (_slp_tree::~_slp_tree): Implement.
6101 (vect_free_slp_tree): Simplify.
6102 (vect_create_new_slp_node): Likewise. Add nops parameter.
6103 (vect_build_slp_tree_2): Adjust.
6104 (vect_analyze_slp_instance): Likewise.
6106 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6108 * adjust-alignment.c: Include memmodel.h.
6110 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
6113 * config/i386/cpuid.h: Use hexadecimal in comments.
6115 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
6118 * config/i386/i386-builtins.c (processor_features): Move
6119 F_AVX512VP2INTERSECT after F_AVX512BF16.
6120 (isa_names_table): Likewise.
6122 2020-05-21 Martin Liska <mliska@suse.cz>
6124 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
6125 Handle OPT_moutline_atomics.
6126 * config/aarch64/aarch64.c: Add outline-atomics to
6128 * doc/extend.texi: Document the newly added target attribute.
6130 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
6134 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
6135 operands 1 and 2 commutative. Manually swap operands.
6136 (*mmx_nabsv2sf2): Ditto.
6139 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6141 * config/i386/i386.md (*<code>tf2_1):
6142 Mark operands 1 and 2 commutative.
6143 (*nabstf2_1): Ditto.
6144 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
6145 commutative. Do not swap operands.
6146 (*nabs<mode>2): Ditto.
6148 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
6151 * config/i386/sse.md (<code>v8qiv8hi2): Use
6152 simplify_gen_subreg instead of simplify_subreg.
6153 (<code>v8qiv8si2): Ditto.
6154 (<code>v4qiv4si2): Ditto.
6155 (<code>v4hiv4si2): Ditto.
6156 (<code>v8qiv8di2): Ditto.
6157 (<code>v4qiv4di2): Ditto.
6158 (<code>v2qiv2di2): Ditto.
6159 (<code>v4hiv4di2): Ditto.
6160 (<code>v2hiv2di2): Ditto.
6161 (<code>v2siv2di2): Ditto.
6163 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
6166 * config/i386/i386.md (*pushsi2_rex64):
6167 Use "e" constraint instead of "i".
6169 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
6171 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
6172 (lto_input_tree_1): Strenghten sanity check.
6173 (lto_input_tree): Update call of lto_input_scc.
6174 * lto-streamer-out.c: Include ipa-utils.h
6175 (create_output_block): Initialize local_trees if merigng is going
6177 (destroy_output_block): Destroy local_trees.
6178 (DFS): Add max_local_entry.
6179 (local_tree_p): New function.
6180 (DFS::DFS): Initialize and maintain it.
6181 (DFS::DFS_write_tree): Decide on streaming format.
6182 (lto_output_tree): Stream inline singleton SCCs
6183 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
6184 (struct output_block): Add local_trees.
6185 (lto_input_scc): Update prototype.
6187 2020-05-20 Patrick Palka <ppalka@redhat.com>
6190 * hash-table.h (hash_table::find_with_hash): Move up the call to
6193 2020-05-20 Martin Liska <mliska@suse.cz>
6195 * lto-compress.c (lto_compression_zstd): Fill up
6196 num_compressed_il_bytes.
6197 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
6199 2020-05-20 Richard Biener <rguenther@suse.de>
6201 PR tree-optimization/95219
6202 * tree-vect-loop.c (vectorizable_induction): Reduce
6203 group_size before computing the number of required IVs.
6205 2020-05-20 Richard Biener <rguenther@suse.de>
6208 * tree-inline.c (remap_gimple_stmt): Revert adjusting
6209 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
6211 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6212 Andre Vieira <andre.simoesdiasvieira@arm.com>
6215 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
6217 (mve_vector_mem_operand): Likewise.
6218 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
6219 the load from memory to a core register is legitimate for give mode.
6220 (mve_vector_mem_operand): Define function.
6221 (arm_print_operand): Modify comment.
6222 (arm_mode_base_reg_class): Define.
6223 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
6224 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
6225 * config/arm/constraints.md (Ux): Likewise.
6227 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
6228 add support for missing Vector Store Register and Vector Load Register.
6229 Add a new alternative to support load from memory to PC (or label) in
6231 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
6232 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
6233 mve_memory_operand and also modify the MVE instructions to emit.
6234 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
6235 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
6236 mve_memory_operand and also modify the MVE instructions to emit.
6237 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
6238 mve_memory_operand and also modify the MVE instructions to emit.
6239 (mve_vldrhq_z_fv8hf): Likewise.
6240 (mve_vldrhq_z_<supf><mode>): Likewise.
6241 (mve_vldrwq_fv4sf): Likewise.
6242 (mve_vldrwq_<supf>v4si): Likewise.
6243 (mve_vldrwq_z_fv4sf): Likewise.
6244 (mve_vldrwq_z_<supf>v4si): Likewise.
6245 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
6246 (mve_vld1q_<supf><mode>): Likewise.
6247 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
6249 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
6250 mve_memory_operand and also modify the MVE instructions to emit.
6251 (mve_vstrhq_p_<supf><mode>): Likewise.
6252 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
6254 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
6255 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
6256 instructions to emit.
6257 (mve_vstrwq_p_<supf>v4si): Likewise.
6258 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
6259 * config/arm/predicates.md (mve_memory_operand): Define.
6261 2020-05-30 Richard Biener <rguenther@suse.de>
6264 * c-fold.c (c_fully_fold_internal): Enhance guard on
6267 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
6270 * Makefile.in (OBJS): Add adjust-alignment.o.
6271 * adjust-alignment.c (pass_data_adjust_alignment): New.
6272 (pass_adjust_alignment): New.
6273 (pass_adjust_alignment::execute): New.
6274 (make_pass_adjust_alignment): New.
6275 * tree-pass.h (make_pass_adjust_alignment): New.
6276 * passes.def: Add pass_adjust_alignment.
6278 2020-05-19 Alex Coplan <alex.coplan@arm.com>
6281 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
6282 identity permutation.
6284 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6286 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
6287 msp430_small, msp430_large and size24plus DejaGNU effective
6289 Improve grammar in descriptions for size20plus and size32plus effective
6292 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
6294 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
6295 callee saved registers only in xBPF.
6296 (bpf_expand_prologue): Save callee saved registers only in xBPF.
6297 (bpf_expand_epilogue): Likewise for restoring.
6298 * doc/invoke.texi (eBPF Options): Document this is activated by
6301 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
6303 * config/bpf/bpf.opt (mxbpf): New option.
6304 * doc/invoke.texi (Option Summary): Add -mxbpf.
6305 (eBPF Options): Document -mxbbpf.
6307 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
6310 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
6311 (<code>v32qiv32hi2): Ditto.
6312 (<code>v8qiv8hi2): Ditto.
6313 (<code>v16qiv16si2): Ditto.
6314 (<code>v8qiv8si2): Ditto.
6315 (<code>v4qiv4si2): Ditto.
6316 (<code>v16hiv16si2): Ditto.
6317 (<code>v8hiv8si2): Ditto.
6318 (<code>v4hiv4si2): Ditto.
6319 (<code>v8qiv8di2): Ditto.
6320 (<code>v4qiv4di2): Ditto.
6321 (<code>v2qiv2di2): Ditto.
6322 (<code>v8hiv8di2): Ditto.
6323 (<code>v4hiv4di2): Ditto.
6324 (<code>v2hiv2di2): Ditto.
6325 (<code>v8siv8di2): Ditto.
6326 (<code>v4siv4di2): Ditto.
6327 (<code>v2siv2di2): Ditto.
6329 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
6331 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
6332 (riscv_implied_info): New.
6333 (riscv_subset_list): Add handle_implied_ext.
6334 (riscv_subset_list::to_string): New parameter version_p to
6335 control output format.
6336 (riscv_subset_list::handle_implied_ext): New.
6337 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
6338 (riscv_arch_str): New parameter version_p to control output format.
6339 (riscv_expand_arch): New.
6340 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
6342 * config/riscv/riscv.h (riscv_expand_arch): New,
6343 (EXTRA_SPEC_FUNCTIONS): Define.
6344 (ASM_SPEC): Transform -march= via riscv_expand_arch.
6346 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
6348 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
6349 parse_multiletter_ext.
6350 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
6351 adjust parsing order for 's' and 'x'.
6353 2020-05-19 Richard Biener <rguenther@suse.de>
6355 * tree-vectorizer.h (_slp_tree::vectype): Add field.
6356 (SLP_TREE_VECTYPE): New.
6357 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
6359 (vect_create_new_slp_node): Likewise.
6360 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
6362 (vect_slp_analyze_node_operations): Walk nodes children for
6364 (vect_get_constant_vectors): Use local scope op variable.
6365 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
6366 (vect_model_simple_cost): Adjust.
6367 (vect_model_store_cost): Likewise.
6368 (vectorizable_store): Likewise.
6370 2020-05-18 Martin Sebor <msebor@redhat.com>
6373 * tree-object-size.c (decl_init_size): New function.
6374 (addr_object_size): Call it.
6375 * tree.h (last_field): Declare.
6376 (first_field): Add attribute nonnull.
6378 2020-05-18 Martin Sebor <msebor@redhat.com>
6381 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
6382 * tree.c (component_ref_size): Correct the handling or array members
6384 Drop a pointless test.
6385 Rename a local variable.
6387 2020-05-18 Jason Merrill <jason@redhat.com>
6389 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
6390 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
6392 2020-05-14 Jason Merrill <jason@redhat.com>
6394 * doc/install.texi (Prerequisites): Update boostrap compiler
6395 requirement to C++11/GCC 4.8.
6397 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6399 PR tree-optimization/94952
6400 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
6401 Initialize variables bitpos, bitregion_start, and bitregion_end in
6402 order to silence warnings about use of uninitialized variables.
6404 2020-05-18 Carl Love <cel@us.ibm.com>
6407 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
6408 first_match_index_<mode>.
6409 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
6410 additional test cases with zero vector elements.
6412 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6415 * config/i386/i386-expand.c (ix86_expand_int_movcc):
6416 Avoid reversing a non-trapping comparison to a trapping one.
6418 2020-05-18 Alex Coplan <alex.coplan@arm.com>
6420 * config/arm/arm.c (output_move_double): Fix codegen when loading into
6421 a register pair with an odd base register.
6423 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6425 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
6426 Do not emit FLAGS_REG clobber for TFmode.
6427 * config/i386/i386.md (*<code>tf2_1): Rewrite as
6428 define_insn_and_split. Mark operands 1 and 2 commutative.
6429 (*nabstf2_1): Ditto.
6430 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
6431 Do not swap memory operands. Simplify RTX generation.
6432 (neg abs SSE splitter): Ditto.
6433 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
6434 commutative. Do not swap operands. Simplify RTX generation.
6435 (*nabs<mode>2): Ditto.
6437 2020-05-18 Richard Biener <rguenther@suse.de>
6439 * tree-vect-slp.c (vect_slp_bb): Start after labels.
6440 (vect_get_constant_vectors): Really place init stmt after scalar defs.
6441 * tree-vect-stmts.c (vect_init_vector_1): Insert before
6444 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
6446 * config/i386/driver-i386.c (host_detect_local_cpu): Support
6447 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
6450 2020-05-18 Richard Biener <rguenther@suse.de>
6453 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
6454 when inlining into a non-call EH function.
6456 2020-05-18 Richard Biener <rguenther@suse.de>
6458 PR tree-optimization/95172
6459 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
6460 eventually need the conditional processing.
6461 (execute_sm_exit): When processing an orderd sequence
6462 avoid doing any conditional processing.
6463 (hoist_memory_references): Pass down whether all edges
6464 have ordered processing for a ref to execute_sm.
6466 2020-05-17 Jeff Law <law@redhat.com>
6468 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
6469 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
6470 into a single pattern using pc_or_label_operand.
6471 * config/h8300/combiner.md (bit branch patterns): Likewise.
6472 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
6474 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
6477 * config/i386/i386-features.c (has_non_address_hard_reg):
6479 (pseudo_reg_set): This. Return the SET expression. Ignore
6480 pseudo register push.
6481 (general_scalar_to_vector_candidate_p): Combine single_set and
6482 has_non_address_hard_reg calls to pseudo_reg_set.
6483 (timode_scalar_to_vector_candidate_p): Likewise.
6484 * config/i386/i386.md (*pushv1ti2): New pattern.
6486 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6489 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6491 * tree-vrp.c (operand_less_p): Move to...
6492 * vr-values.c (operand_less_p): ...here.
6493 * tree-vrp.h (operand_less_p): Remove.
6495 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6497 * tree-vrp.c (operand_less_p): Move to...
6498 * vr-values.c (operand_less_p): ...here.
6499 * tree-vrp.h (operand_less_p): Remove.
6501 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6503 * tree-vrp.c (class vrp_insert): Remove prototype for
6506 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6508 * tree-vrp.c (class live_names): New.
6509 (live_on_edge): Move into live_names.
6510 (build_assert_expr_for): Move into vrp_insert.
6511 (find_assert_locations_in_bb): Rename from
6512 find_assert_locations_1.
6513 (process_assert_insertions_for): Move into vrp_insert.
6514 (compare_assert_loc): Same.
6515 (remove_range_assertions): Same.
6516 (dump_asserts_for): Rename to vrp_insert::dump.
6517 (debug_asserts_for): Rename to vrp_insert::debug.
6518 (dump_all_asserts): Rename to vrp_insert::dump.
6519 (debug_all_asserts): Rename to vrp_insert::debug.
6521 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6523 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
6524 check_array_ref, check_mem_ref, and search_for_addr_array
6526 (class array_bounds_checker): ...here.
6527 (class check_array_bounds_dom_walker): Adjust to use
6528 array_bounds_checker.
6529 (check_all_array_refs): Move into array_bounds_checker and rename
6531 (class vrp_folder): Make fold_predicate_in private.
6533 2020-05-15 Jeff Law <law@redhat.com>
6535 * config/h8300/h8300.md (SFI iterator): New iterator for
6537 * config/h8300/peepholes.md (memory comparison): Use mode
6538 iterator to consolidate 3 patterns into one.
6539 (stack allocation and stack store): Handle SFmode. Handle
6542 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
6544 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
6545 RS6000_BTM_POWERPC64.
6547 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
6549 * config/i386/i386.md (SWI48DWI): New mode iterator.
6550 (*push<mode>2): Allow XMM registers.
6551 (*pushdi2_rex64): Ditto.
6552 (*pushsi2_rex64): Ditto.
6554 (push XMM reg splitter): New splitter
6556 (*pushdf) Change "x" operand constraint to "v".
6557 (*pushsf_rex64): Ditto.
6560 2020-05-15 Richard Biener <rguenther@suse.de>
6562 PR tree-optimization/92260
6563 * tree-vect-slp.c (vect_get_constant_vectors): Compute
6564 the number of vector stmts in a canonical way.
6566 2020-05-15 Martin Liska <mliska@suse.cz>
6568 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
6571 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
6573 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
6575 2020-05-15 Richard Biener <rguenther@suse.de>
6577 PR tree-optimization/95133
6578 * gimple-ssa-split-paths.c
6579 (find_block_to_duplicate_for_splitting_paths): Check for
6582 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
6584 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
6586 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
6588 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
6591 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
6592 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
6595 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
6598 * config/i386/i386.md (isa): Add sse3_noavx.
6599 (enabled): Handle sse3_noavx.
6601 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
6602 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
6603 alternatives. Match commutative vec_select selector operands.
6604 (*mmx_haddv2sf3_low): New insn pattern.
6606 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
6607 (*mmx_hsubv2sf3_low): New insn pattern.
6609 2020-05-15 Richard Biener <rguenther@suse.de>
6611 PR tree-optimization/33315
6612 * tree-ssa-sink.c: Include tree-eh.h.
6613 (sink_stats): Add commoned member.
6614 (sink_common_stores_to_bb): New function implementing store
6615 commoning by sinking to the successor.
6616 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
6617 (pass_sink_code::execute): Likewise. Record commoned stores
6620 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
6622 PR rtl-optimization/37451, part of PR target/61837
6623 * loop-doloop.c (doloop_simplify_count): New function. Simplify
6624 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
6625 (doloop_modify): Call doloop_simplify_count.
6627 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
6630 * doc/sourcebuild.texi: Document effective target lgccjit.
6632 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
6634 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
6635 define_expand, and rename the original to ...
6636 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
6637 (add<mode>3_zext_dup_exec): Likewise, with ...
6638 (add<mode>3_vcc_zext_dup_exec): ... this.
6639 (add<mode>3_zext_dup2): Likewise, with ...
6640 (add<mode>3_zext_dup_exec): ... this.
6641 (add<mode>3_zext_dup2_exec): Likewise, with ...
6642 (add<mode>3_zext_dup2): ... this.
6643 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
6644 addv64di3_zext* calls to use addv64di3_vcc_zext*.
6646 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6649 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
6650 (extendv2sfv2df2): Ditto.
6652 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
6654 * configure: Regenerated.
6656 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
6658 * config/arm/arm.c (reg_needs_saving_p): New function.
6659 (use_return_insn): Use reg_needs_saving_p.
6660 (arm_get_vfp_saved_size): Likewise.
6661 (arm_compute_frame_layout): Likewise.
6662 (arm_save_coproc_regs): Likewise.
6663 (thumb1_expand_epilogue): Likewise.
6664 (arm_expand_epilogue_apcs_frame): Likewise.
6665 (arm_expand_epilogue): Likewise.
6667 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
6669 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
6671 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6674 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
6676 (floatv2siv2df2): New expander.
6677 (floatunsv2siv2df2): New insn pattern.
6679 (fix_truncv2dfv2si2): New expander.
6680 (fixuns_truncv2dfv2si2): New insn pattern.
6682 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
6685 * config/aarch64/aarch64-sve-builtins.cc
6686 (handle_arm_sve_vector_bits_attribute): Create a copy of the
6687 original type's TYPE_MAIN_VARIANT, then reapply all the differences
6688 between the original type and its main variant.
6690 2020-05-14 Richard Biener <rguenther@suse.de>
6693 * real.c (real_to_decimal_for_mode): Make sure we handle
6694 a zero with nonzero exponent.
6696 2020-05-14 Jakub Jelinek <jakub@redhat.com>
6698 * Makefile.in (GTFILES): Add omp-general.c.
6699 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
6700 calls_declare_variant_alt members and initialize them in the
6702 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
6703 calls to declare_variant_alt nodes.
6704 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
6705 and calls_declare_variant_alt.
6706 (input_overwrite_node): Read them back.
6707 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
6709 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
6711 (tree_function_versioning): Copy calls_declare_variant_alt bit.
6712 * omp-offload.c (execute_omp_device_lower): Call
6713 omp_resolve_declare_variant on direct function calls.
6714 (pass_omp_device_lower::gate): Also enable for
6715 calls_declare_variant_alt functions.
6716 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
6717 (omp_context_selector_matches): Handle the case when
6718 cfun->curr_properties has PROP_gimple_any bit set.
6719 (struct omp_declare_variant_entry): New type.
6720 (struct omp_declare_variant_base_entry): New type.
6721 (struct omp_declare_variant_hasher): New type.
6722 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
6724 (omp_declare_variants): New variable.
6725 (struct omp_declare_variant_alt_hasher): New type.
6726 (omp_declare_variant_alt_hasher::hash,
6727 omp_declare_variant_alt_hasher::equal): New methods.
6728 (omp_declare_variant_alt): New variables.
6729 (omp_resolve_late_declare_variant): New function.
6730 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
6731 when called late. Create a magic declare_variant_alt fndecl and
6732 cgraph node and return that if decision needs to be deferred until
6733 after gimplification.
6734 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
6738 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
6739 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
6740 entry block if info->after_stmt is NULL, otherwise add after that stmt
6741 and update it after adding each stmt.
6742 (ipa_simd_modify_function_body): Initialize info.after_stmt.
6744 * function.h (struct function): Add has_omp_target bit.
6745 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
6747 (omp_discover_declare_target_tgt_fn_r): ... this.
6748 (omp_discover_declare_target_var_r): Call
6749 omp_discover_declare_target_tgt_fn_r instead of
6750 omp_discover_declare_target_fn_r.
6751 (omp_discover_implicit_declare_target): Also queue functions with
6752 has_omp_target bit set, for those walk with
6753 omp_discover_declare_target_fn_r, for declare target to functions
6754 walk with omp_discover_declare_target_tgt_fn_r.
6756 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6759 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
6760 Add SSE/AVX alternative. Change operand predicates from
6761 nonimmediate_operand to register_mmxmem_operand.
6762 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6763 (fix_truncv2sfv2si2): New expander.
6764 (fixuns_truncv2sfv2si2): New insn pattern.
6766 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
6767 Add SSE/AVX alternative. Change operand predicates from
6768 nonimmediate_operand to register_mmxmem_operand.
6769 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6770 (floatv2siv2sf2): New expander.
6771 (floatunsv2siv2sf2): New insn pattern.
6773 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
6775 (IX86_BUILTIN_PI2FD): Ditto.
6777 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6779 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
6781 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
6784 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6786 * config/s390/s390.c (allocate_stack_space): Add missing updates
6787 of last_probe_offset.
6789 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6791 * config/s390/s390.md ("allocate_stack"): Call
6792 anti_adjust_stack_and_probe_stack_clash when stack clash
6793 protection is enabled.
6794 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
6795 prototype. Remove static.
6796 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
6799 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
6801 * config/rs6000/altivec.h (vec_extractl): New #define.
6802 (vec_extracth): Likewise.
6803 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
6804 (UNSPEC_EXTRACTR): Likewise.
6805 (vextractl<mode>): New expansion.
6806 (vextractl<mode>_internal): New insn.
6807 (vextractr<mode>): New expansion.
6808 (vextractr<mode>_internal): New insn.
6809 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
6810 New built-in function.
6811 (__builtin_altivec_vextduhvlx): Likewise.
6812 (__builtin_altivec_vextduwvlx): Likewise.
6813 (__builtin_altivec_vextddvlx): Likewise.
6814 (__builtin_altivec_vextdubvhx): Likewise.
6815 (__builtin_altivec_vextduhvhx): Likewise.
6816 (__builtin_altivec_vextduwvhx): Likewise.
6817 (__builtin_altivec_vextddvhx): Likewise.
6818 (__builtin_vec_extractl): New overloaded built-in function.
6819 (__builtin_vec_extracth): Likewise.
6820 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6821 Define overloaded forms of __builtin_vec_extractl and
6822 __builtin_vec_extracth.
6823 (builtin_function_type): Add cases to mark arguments of new
6824 built-in functions as unsigned.
6825 (rs6000_common_init_builtins): Add
6826 opaque_ftype_opaque_opaque_opaque_opaque.
6827 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
6828 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6829 for a Future Architecture): Add description of vec_extractl and
6830 vec_extractr built-in functions.
6832 2020-05-13 Richard Biener <rguenther@suse.de>
6834 * target.def (add_stmt_cost): Add new vectype parameter.
6835 * targhooks.c (default_add_stmt_cost): Adjust.
6836 * targhooks.h (default_add_stmt_cost): Likewise.
6837 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
6839 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
6840 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
6841 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
6843 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
6844 (dump_stmt_cost): Add new vectype parameter.
6845 (add_stmt_cost): Likewise.
6846 (record_stmt_cost): Likewise.
6847 (record_stmt_cost): Add overload with old signature.
6848 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
6850 (vect_get_known_peeling_cost): Likewise.
6851 (vect_estimate_min_profitable_iters): Likewise.
6852 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
6853 * tree-vect-stmts.c (record_stmt_cost): Likewise.
6854 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
6855 and pass down correct vectype and NULL stmt_info.
6856 (vect_model_simple_cost): Adjust.
6857 (vect_model_store_cost): Likewise.
6859 2020-05-13 Richard Biener <rguenther@suse.de>
6861 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
6862 (_slp_instance::group_size): Likewise.
6863 * tree-vect-loop.c (vectorizable_reduction): The group size
6864 is the number of lanes in the node.
6865 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
6866 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
6867 verify it matches the instance trees number of lanes.
6868 (vect_slp_analyze_node_operations_1): Use the numer of lanes
6869 in the node as group size.
6870 (vect_bb_vectorization_profitable_p): Use the instance root
6871 number of lanes for the size of life.
6872 (vect_schedule_slp_instance): Use the number of lanes as
6874 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
6875 parameter. Use the number of lanes of the load for the group
6876 size in the gap adjustment code.
6877 (vect_analyze_stmt): Adjust.
6878 (vect_transform_stmt): Likewise.
6880 2020-05-13 Jakub Jelinek <jakub@redhat.com>
6883 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
6884 if the last insn is a note.
6886 PR tree-optimization/95060
6887 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
6888 if it is the single use of the FMA internal builtin.
6890 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
6892 PR tree-optimization/94969
6893 * tree-data-dependence.c (constant_access_functions): Rename to...
6894 (invariant_access_functions): ...this. Add parameter. Check for
6895 invariant access function, rather than constant.
6896 (build_classic_dist_vector): Call above function.
6897 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
6899 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
6902 * doc/extend.texi (x86Operandmodifiers): Document more x86
6904 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
6906 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
6908 * tree-vrp.c (class vrp_insert): New.
6909 (insert_range_assertions): Move to class vrp_insert.
6910 (dump_all_asserts): Same as above.
6911 (dump_asserts_for): Same as above.
6912 (live): Same as above.
6913 (need_assert_for): Same as above.
6914 (live_on_edge): Same as above.
6915 (finish_register_edge_assert_for): Same as above.
6916 (find_switch_asserts): Same as above.
6917 (find_assert_locations): Same as above.
6918 (find_assert_locations_1): Same as above.
6919 (find_conditional_asserts): Same as above.
6920 (process_assert_insertions): Same as above.
6921 (register_new_assert_for): Same as above.
6922 (vrp_prop): New variable fun.
6923 (vrp_initialize): New parameter.
6924 (identify_jump_threads): Same as above.
6925 (execute_vrp): Same as above.
6928 2020-05-12 Keith Packard <keith.packard@sifive.com>
6930 * config/riscv/riscv.c (riscv_unique_section): New.
6931 (TARGET_ASM_UNIQUE_SECTION): New.
6933 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
6935 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
6936 * config/riscv/riscv-passes.def: New file.
6937 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
6938 * config/riscv/riscv-shorten-memrefs.c: New file.
6939 * config/riscv/riscv.c (tree-pass.h): New include.
6940 (riscv_compressed_reg_p): New Function
6941 (riscv_compressed_lw_offset_p): Likewise.
6942 (riscv_compressed_lw_address_p): Likewise.
6943 (riscv_shorten_lw_offset): Likewise.
6944 (riscv_legitimize_address): Attempt to convert base + large_offset
6945 to compressible new_base + small_offset.
6946 (riscv_address_cost): Make anticipated compressed load/stores
6947 cheaper for code size than uncompressed load/stores.
6948 (riscv_register_priority): Move compressed register check to
6949 riscv_compressed_reg_p.
6950 * config/riscv/riscv.h (C_S_BITS): Define.
6951 (CSW_MAX_OFFSET): Define.
6952 * config/riscv/riscv.opt (mshorten-memefs): New option.
6953 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
6954 (PASSES_EXTRA): Add riscv-passes.def.
6955 * doc/invoke.texi: Document -mshorten-memrefs.
6957 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
6958 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
6959 * doc/tm.texi: Regenerate.
6960 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
6961 * sched-deps.c (attempt_change): Use old address if it is cheaper than
6963 * target.def (new_address_profitable_p): New hook.
6964 * targhooks.c (default_new_address_profitable_p): New function.
6965 * targhooks.h (default_new_address_profitable_p): Declare.
6967 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6970 * config/i386/mmx.md (copysignv2sf3): New expander.
6971 (xorsignv2sf3): Ditto.
6972 (signbitv2sf3): Ditto.
6974 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6977 * config/i386/mmx.md (fmav2sf4): New insn pattern.
6982 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
6984 * Makefile.in (CET_HOST_FLAGS): New.
6985 (COMPILER): Add $(CET_HOST_FLAGS).
6986 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
6987 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
6989 * aclocal.m4: Regenerated.
6990 * configure: Likewise.
6992 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6995 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
6996 (*mmx_<code>v2sf2): New insn_and_split pattern.
6997 (*mmx_nabsv2sf2): Ditto.
6998 (*mmx_andnotv2sf3): New insn pattern.
6999 (*mmx_<code>v2sf3): Ditto.
7000 * config/i386/i386.md (absneg_op): New code attribute.
7001 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
7002 (ix86_build_signbit_mask): Ditto.
7004 2020-05-12 Richard Biener <rguenther@suse.de>
7006 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
7009 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7011 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
7012 Update prototype to include "local" argument.
7013 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
7014 "local" argument. Handle local common decls.
7015 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
7016 msp430_output_aligned_decl_common call with 0 for "local" argument.
7017 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
7019 2020-05-12 Richard Biener <rguenther@suse.de>
7021 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
7023 2020-05-12 Martin Liska <mliska@suse.cz>
7027 * sanopt.c (sanitize_rewrite_addressable_params):
7028 Clear DECL_NOT_GIMPLE_REG_P for argument.
7030 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7032 PR tree-optimization/94980
7033 * tree-vect-generic.c (expand_vector_comparison): Use
7034 vector_element_bits_tree to get the element size in bits,
7035 rather than using TYPE_SIZE.
7036 (expand_vector_condition, vector_element): Likewise.
7038 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7040 PR tree-optimization/94980
7041 * tree-vect-generic.c (build_replicated_const): Take the number
7042 of bits as a parameter, instead of the type of the elements.
7043 (do_plus_minus): Update accordingly, using vector_element_bits
7044 to calculate the correct number of bits.
7045 (do_negate): Likewise.
7047 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7049 PR tree-optimization/94980
7050 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
7051 * tree.c (vector_element_bits, vector_element_bits_tree): New.
7052 * match.pd: Use the new functions instead of determining the
7053 vector element size directly from TYPE_SIZE(_UNIT).
7054 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
7055 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
7056 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
7057 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
7058 (expand_vector_conversion): Likewise.
7059 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
7060 a divisor. Convert the dividend to bits to compensate.
7061 * tree-vect-loop.c (vectorizable_live_operation): Call
7062 vector_element_bits instead of open-coding it.
7064 2020-05-12 Jakub Jelinek <jakub@redhat.com>
7066 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
7067 * omp-offload.c: Include context.h.
7068 (omp_declare_target_fn_p, omp_declare_target_var_p,
7069 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
7070 omp_discover_implicit_declare_target): New functions.
7071 * cgraphunit.c (analyze_functions): Call
7072 omp_discover_implicit_declare_target.
7074 2020-05-12 Richard Biener <rguenther@suse.de>
7076 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
7077 literal constant &MEM[..] to a constant literal.
7079 2020-05-12 Richard Biener <rguenther@suse.de>
7081 PR tree-optimization/95045
7082 * dbgcnt.def (lim): Add debug-counter.
7083 * tree-ssa-loop-im.c: Include dbgcnt.h.
7084 (find_refs_for_sm): Use lim debug counter for store motion
7086 (do_store_motion): Rename form store_motion. Commit edge
7088 (store_motion_loop): ... here.
7089 (tree_ssa_lim): Adjust.
7091 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7093 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
7094 (vec_ctzm): Rename to vec_cnttzm.
7095 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
7096 Change fourth operand for vec_ternarylogic to require
7097 compatibility with unsigned SImode rather than unsigned QImode.
7098 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7099 Remove overloaded forms of vec_gnb that are no longer needed.
7100 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7101 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
7102 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
7103 vec_gnb; move vec_ternarylogic documentation into this section
7104 and replace const unsigned char with const unsigned int as its
7107 2020-05-11 Carl Love <cel@us.ibm.com>
7109 * config/rs6000/altivec.h (vec_genpcvm): New #define.
7110 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
7112 (XXGENPCVM_V8HI): Likewise.
7113 (XXGENPCVM_V4SI): Likewise.
7114 (XXGENPCVM_V2DI): Likewise.
7115 (XXGENPCVM): New overloaded built-in instantiation.
7116 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
7117 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
7118 (altivec_expand_builtin): Add special handling for
7119 FUTURE_BUILTIN_VEC_XXGENPCVM.
7120 (builtin_function_type): Add handling for
7121 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
7122 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
7123 (UNSPEC_XXGENPCV): New constant.
7124 (xxgenpcvm_<mode>_internal): New insn.
7125 (xxgenpcvm_<mode>): New expansion.
7126 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
7128 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7130 * config/rs6000/altivec.h (vec_strir): New #define.
7131 (vec_stril): Likewise.
7132 (vec_strir_p): Likewise.
7133 (vec_stril_p): Likewise.
7134 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
7135 (UNSPEC_VSTRIL): Likewise.
7136 (vstrir_<mode>): New expansion.
7137 (vstrir_code_<mode>): New insn.
7138 (vstrir_p_<mode>): New expansion.
7139 (vstrir_p_code_<mode>): New insn.
7140 (vstril_<mode>): New expansion.
7141 (vstril_code_<mode>): New insn.
7142 (vstril_p_<mode>): New expansion.
7143 (vstril_p_code_<mode>): New insn.
7144 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
7145 New built-in function.
7146 (__builtin_altivec_vstrihr): Likewise.
7147 (__builtin_altivec_vstribl): Likewise.
7148 (__builtin_altivec_vstrihl): Likewise.
7149 (__builtin_altivec_vstribr_p): Likewise.
7150 (__builtin_altivec_vstrihr_p): Likewise.
7151 (__builtin_altivec_vstribl_p): Likewise.
7152 (__builtin_altivec_vstrihl_p): Likewise.
7153 (__builtin_vec_strir): New overloaded built-in function.
7154 (__builtin_vec_stril): Likewise.
7155 (__builtin_vec_strir_p): Likewise.
7156 (__builtin_vec_stril_p): Likewise.
7157 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7158 Define overloaded forms of __builtin_vec_strir,
7159 __builtin_vec_stril, __builtin_vec_strir_p, and
7160 __builtin_vec_stril_p.
7161 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7162 for a Future Architecture): Add description of vec_stril,
7163 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
7165 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
7167 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
7168 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
7170 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
7171 * config/rs6000/rs6000-builtin.def: Add handling of new macro
7173 (BU_FUTURE_V_4): New macro. Use it.
7174 (BU_FUTURE_OVERLOAD_4): Likewise.
7175 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
7176 handling for quaternary built-in functions.
7177 (altivec_resolve_overloaded_builtin): Add special-case handling
7178 for __builtin_vec_xxeval.
7179 * config/rs6000/rs6000-call.c: Add handling of new macro
7180 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
7181 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
7182 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
7183 (altivec_overloaded_builtins): Add definitions for
7184 FUTURE_BUILTIN_VEC_XXEVAL.
7185 (bdesc_4arg): New array.
7186 (htm_expand_builtin): Add handling for quaternary built-in
7188 (rs6000_expand_quaternop_builtin): New function.
7189 (rs6000_expand_builtin): Add handling for quaternary built-in
7191 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
7192 for unsigned QImode and unsigned HImode.
7193 (builtin_quaternary_function_type): New function.
7194 (rs6000_common_init_builtins): Add handling of quaternary
7196 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
7198 (RS6000_BTC_PREDICATE): Change value of constant.
7199 (RS6000_BTC_ABS): Likewise.
7200 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
7201 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
7202 for a Future Architecture): Add description of vec_ternarylogic
7205 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7207 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
7209 (__builtin_pextd): Likewise.
7210 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
7211 (UNSPEC_PEXTD): Likewise.
7214 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
7215 a Future Architecture): Add descriptions of __builtin_pdepd and
7216 __builtin_pextd functions.
7218 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7220 * config/rs6000/altivec.h (vec_clrl): New #define.
7221 (vec_clrr): Likewise.
7222 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
7223 (UNSPEC_VCLRRB): Likewise.
7226 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
7228 (__builtin_altivec_vclrrb): Likewise.
7229 (__builtin_vec_clrl): New overloaded built-in function.
7230 (__builtin_vec_clrr): Likewise.
7231 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7232 Define overloaded forms of __builtin_vec_clrl and
7234 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7235 for a Future Architecture): Add descriptions of vec_clrl and
7238 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7240 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
7241 built-in function definition.
7242 (__builtin_cnttzdm): Likewise.
7243 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
7244 (UNSPEC_CNTTZDM): Likewise.
7245 (cntlzdm): New insn.
7246 (cnttzdm): Likewise.
7247 * doc/extend.texi (Basic PowerPC Built-in Functions available for
7248 a Future Architecture): Add descriptions of __builtin_cntlzdm and
7249 __builtin_cnttzdm functions.
7251 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7254 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
7256 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7258 * config/rs6000/altivec.h (vec_cfuge): New #define.
7259 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
7260 (vcfuged): New insn.
7261 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
7262 New built-in function.
7263 * config/rs6000/rs6000-call.c (builtin_function_type): Add
7264 handling for FUTURE_BUILTIN_VCFUGED case.
7265 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7266 for a Future Architecture): Add description of vec_cfuge built-in
7269 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7271 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
7273 (BU_FUTURE_MISC_1): Likewise.
7274 (BU_FUTURE_MISC_2): Likewise.
7275 (BU_FUTURE_MISC_3): Likewise.
7276 (__builtin_cfuged): New built-in function definition.
7277 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
7279 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
7280 a Future Architecture): New subsubsection.
7282 2020-05-11 Richard Biener <rguenther@suse.de>
7284 PR tree-optimization/95049
7285 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
7286 between different constants.
7288 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
7290 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
7292 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7293 Bill Schmidt <wschmidt@linux.ibm.com>
7295 * config/rs6000/altivec.h (vec_gnb): New #define.
7296 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
7298 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
7300 (BU_FUTURE_OVERLOAD_2): Likewise.
7301 (BU_FUTURE_OVERLOAD_3): Likewise.
7302 (__builtin_altivec_gnb): New built-in function.
7303 (__buiiltin_vec_gnb): New overloaded built-in function.
7304 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7305 Define overloaded forms of __builtin_vec_gnb.
7306 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
7307 of __builtin_vec_gnb.
7308 (builtin_function_type): Mark return value and arguments unsigned
7309 for FUTURE_BUILTIN_VGNB.
7310 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7311 for a Future Architecture): Add description of vec_gnb built-in
7314 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7315 Bill Schmidt <wschmidt@linux.ibm.com>
7317 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
7319 (vec_pext): Likewise.
7320 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
7321 (UNSPEC_VPEXTD): Likewise.
7324 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
7326 (__builtin_altivec_vpextd): Likewise.
7327 * config/rs6000/rs6000-call.c (builtin_function_type): Add
7328 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
7330 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
7331 for a Future Architecture): Add description of vec_pdep and
7332 vec_pext built-in functions.
7334 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7335 Bill Schmidt <wschmidt@linux.ibm.com>
7337 * config/rs6000/altivec.h (vec_clzm): New macro.
7338 (vec_ctzm): Likewise.
7339 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
7340 (UNSPEC_VCTZDM): Likewise.
7343 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
7344 (BU_FUTURE_V_1): Likewise.
7345 (BU_FUTURE_V_2): Likewise.
7346 (BU_FUTURE_V_3): Likewise.
7347 (__builtin_altivec_vclzdm): New builtin definition.
7348 (__builtin_altivec_vctzdm): Likewise.
7349 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
7350 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
7352 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
7353 value and parameter types to be unsigned for VCLZDM and VCTZDM.
7354 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
7355 support for TARGET_FUTURE flag.
7356 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
7357 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
7358 for a Future Architecture): New subsubsection.
7360 2020-05-11 Richard Biener <rguenther@suse.de>
7362 PR tree-optimization/94988
7363 PR tree-optimization/95025
7364 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
7365 (sm_seq_push_down): Take extra parameter denoting where we
7367 (execute_sm_exit): Re-issue sm_other stores in the correct
7369 (sm_seq_valid_bb): When always executed, allow sm_other to
7370 prevail inbetween sm_ord and record their stored value.
7371 (hoist_memory_references): Adjust refs_not_supported propagation
7372 and prune sm_other from the end of the ordered sequences.
7374 2020-05-11 Felix Yang <felix.yang@huawei.com>
7377 * config/aarch64/aarch64.md (mov<mode>):
7378 Bitcasts to the equivalent integer mode using gen_lowpart
7379 instead of doing FAIL for scalar floating point move.
7381 2020-05-11 Alex Coplan <alex.coplan@arm.com>
7383 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
7384 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
7385 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
7386 (*csinv3_uxtw_insn2): New.
7387 (*csinv3_uxtw_insn3): New.
7388 * config/aarch64/iterators.md (neg_not_cs): New.
7390 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7393 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
7394 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
7395 (*mmx_addv2sf3): Ditto.
7396 (*mmx_subv2sf3): Ditto.
7397 (*mmx_mulv2sf3): Ditto.
7398 (*mmx_<code>v2sf3): Ditto.
7399 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
7401 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7404 * config/i386/i386.c (ix86_vector_mode_supported_p):
7405 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
7406 * config/i386/mmx.md (*mov<mode>_internal): Do not set
7407 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
7409 (mmx_addv2sf3): Change operand predicates from
7410 nonimmediate_operand to register_mmxmem_operand.
7411 (addv2sf3): New expander.
7412 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
7413 predicates from nonimmediate_operand to register_mmxmem_operand.
7414 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7416 (mmx_subv2sf3): Change operand predicate from
7417 nonimmediate_operand to register_mmxmem_operand.
7418 (mmx_subrv2sf3): Ditto.
7419 (subv2sf3): New expander.
7420 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
7421 predicates from nonimmediate_operand to register_mmxmem_operand.
7422 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7424 (mmx_mulv2sf3): Change operand predicates from
7425 nonimmediate_operand to register_mmxmem_operand.
7426 (mulv2sf3): New expander.
7427 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
7428 predicates from nonimmediate_operand to register_mmxmem_operand.
7429 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7431 (mmx_<code>v2sf3): Change operand predicates from
7432 nonimmediate_operand to register_mmxmem_operand.
7433 (<code>v2sf3): New expander.
7434 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
7435 predicates from nonimmediate_operand to register_mmxmem_operand.
7436 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7437 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
7439 2020-05-11 Martin Liska <mliska@suse.cz>
7442 * common.opt: Fix typo in option description.
7444 2020-05-11 Martin Liska <mliska@suse.cz>
7446 PR gcov-profile/94928
7447 * gcov-io.h: Add caveat about coverage format parsing and
7448 possible outdated documentation.
7450 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
7452 PR tree-optimization/83403
7453 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
7454 determine_value_range, Add fold conversion of MULT_EXPR, fix the
7457 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
7459 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
7460 __ILP32__ for 32-bit targets.
7462 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
7464 * tree.h (expr_align): Delete.
7465 * tree.c (expr_align): Likewise.
7467 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
7469 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
7470 from end_of_function_needs.
7472 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
7473 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
7475 * config/cris/t-elfmulti: Remove crisv32 multilib.
7476 * config/cris: Remove shared-library and CRIS v32 support.
7478 Move trivially from cc0 to reg:CC model, removing most optimizations.
7479 * config/cris/cris.md: Remove all side-effect patterns and their
7480 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
7481 to all but post-reload control-flow and movem insns. Remove
7482 constraints on all modified expanders. Remove obsoleted cc0-related
7484 (attr "cc"): Remove alternative "rev".
7485 (mode_iterator BWDD, DI_, SI_): New.
7486 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
7487 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
7488 ("mstep_shift", "mstep_mul"): Remove patterns.
7489 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
7490 * config/cris/cris.c: Change all non-condition-code,
7491 non-control-flow emitted insns to add a parallel with clobber of
7492 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
7493 emit_insn to use of emit_move_insn, gen_add2_insn or
7494 cris_emit_insn, as convenient.
7495 (cris_reg_overlap_mentioned_p)
7496 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
7497 (cris_movem_load_rest_p): Don't assume all elements in a
7499 (cris_store_multiple_op_p): Ditto.
7500 (cris_emit_insn): New function.
7501 * cris/cris-protos.h (cris_emit_insn): Declare.
7504 * config/cris/cris.md (zcond): New code_iterator.
7505 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
7507 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
7509 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
7511 * config/cris/cris.md ("movsi"): For memory destination
7512 post-reload, generate clobberless variant. Similarly for a
7513 zero-source post-reload.
7514 ("*mov_tomem<mode>_split"): New split.
7515 ("*mov_tomem<mode>"): New insn.
7516 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
7517 "Q>m" for less-than-SImode.
7518 ("*mov_fromzero<mode>_split"): New split.
7519 ("*mov_fromzero<mode>"): New insn.
7521 Prepare for cmpelim pass to eliminate redundant compare insns.
7522 * config/cris/cris-modes.def: New file.
7523 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
7524 (cris_notice_update_cc): Remove left-over declaration.
7525 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
7526 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
7527 * config/cris/cris.h (SELECT_CC_MODE): Define.
7528 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
7530 (cond): New code_iterator.
7531 (nzcond): Replacement for incorrect ncond. All callers changed.
7532 (nzvccond): Replacement for ocond. All callers changed.
7533 (rnzcond): Replacement for rcond. All callers changed.
7534 (xCC): New code_attr.
7535 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
7537 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
7538 CCmode with iteration over NZVCSET.
7539 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
7541 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
7542 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
7543 ("*btst<mode>"): Similarly, from "*btst".
7544 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
7545 iterating over cond instead of matching the comparison with
7546 ordered_comparison_operator.
7547 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
7548 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
7550 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
7551 NZVCUSE. Remove FIXME.
7552 ("*b<nzcond:code>_reversed<mode>"): Similarly from
7553 "*b<ncond:code>_reversed", over NZUSE.
7554 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
7555 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
7556 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
7557 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
7558 depending on CC_NZmode vs. CCmode. Remove FIXME.
7559 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
7560 "*b<rcond:code>_reversed", over NZUSE.
7561 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
7562 iterating over cond instead of matching the comparison with
7563 ordered_comparison_operator.
7564 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
7565 iterating over NZUSE.
7566 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
7567 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
7568 depending on CC_NZmode vs. CCmode.
7569 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
7570 NZVCUSE. Remove FIXME.
7571 ("cc"): Comment on new use.
7572 ("cc_enabled"): New attribute.
7573 ("enabled"): Make default fall back to cc_enabled.
7574 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
7575 default_subst_attrs.
7576 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
7577 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
7578 "*movsi_internal". Correct contents of, and rename attribute
7579 "cc" to "cc<cccc><ccnz><ccnzvc>".
7580 ("anz", "anzvc", "acc"): New define_subst_attrs.
7581 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
7582 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
7583 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
7584 "movqi". Correct contents of, and rename "cc" attribute to
7585 "cc<cccc><ccnz><ccnzvc>".
7586 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
7587 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
7588 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
7589 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
7590 Rename from "extend<mode>si2".
7591 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
7592 Similar, from "zero_extend<mode>si2".
7593 ("*adddi3<setnz>"): Rename from "*adddi3".
7594 ("*subdi3<setnz>"): Similarly from "*subdi3".
7595 ("*addsi3<setnz>"): Similarly from "*addsi3".
7596 ("*subsi3<setnz>"): Similarly from "*subsi3".
7597 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
7598 "cc" attribute to "cc<ccnz>".
7599 ("*addqi3<setnz>"): Similarly from "*addqi3".
7600 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
7601 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
7603 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
7604 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
7605 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
7606 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
7607 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
7608 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
7609 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
7610 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
7612 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
7614 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
7616 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
7618 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
7620 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
7622 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
7623 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
7624 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
7625 (znnCC, rznnCC): New code_attrs.
7626 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
7627 obseolete comment. Add belt-and-suspenders mode-test to condition.
7628 Add fixme regarding remaining matched-but-not-generated case.
7629 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
7630 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
7631 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
7632 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
7633 Handle output of CC_ZnNmode.
7634 ("*b<nzcond:code>_reversed<mode>"): Ditto.
7636 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
7637 NEG too. Correct comment.
7638 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
7641 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
7643 * ira-color.c (update_costs_from_allocno): Remove
7644 conflict_cost_update_p argument. Propagate costs only along
7645 threads. Always do conflict cost update. Add printing debugging
7647 (update_costs_from_copies): Add printing debugging info.
7648 (restore_costs_from_copies): Ditto.
7649 (assign_hard_reg): Improve debug info.
7650 (push_only_colorable): Ditto. Call update_costs_from_prefs.
7651 (color_allocnos): Remove update_costs_from_prefs.
7653 2020-05-08 Richard Biener <rguenther@suse.de>
7655 * tree-vectorizer.h (vec_info::slp_loads): New.
7656 (vect_optimize_slp): Declare.
7657 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
7658 nothing when there are no loads.
7659 (vect_gather_slp_loads): Gather loads into a vector.
7660 (vect_supported_load_permutation_p): Remove.
7661 (vect_analyze_slp_instance): Do not verify permutation
7663 (vect_analyze_slp): Optimize permutations of reductions
7664 after all SLP instances have been gathered and gather
7666 (vect_optimize_slp): New function split out from
7667 vect_supported_load_permutation_p. Elide some permutations.
7668 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
7669 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
7670 * tree-vect-stmts.c (vectorizable_load): Check whether
7671 the load can be permuted. When generating code assert we can.
7673 2020-05-08 Richard Biener <rguenther@suse.de>
7675 * tree-ssa-sccvn.c (rpo_avail): Change type to
7676 eliminate_dom_walker *.
7677 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
7678 use the DOM walker availability.
7679 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
7680 with vn_valueize as valueization callback.
7681 (vn_reference_maybe_forwprop_address): Likewise.
7682 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
7683 array_ref_low_bound.
7685 2020-05-08 Jakub Jelinek <jakub@redhat.com>
7687 PR tree-optimization/94786
7688 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
7692 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
7696 * tree.c (get_narrower): Reuse the op temporary instead of
7699 PR tree-optimization/94783
7700 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
7703 PR tree-optimization/94956
7704 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
7705 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
7707 PR tree-optimization/94913
7708 * match.pd (A - B + -1 >= A to B >= A): New simplification.
7709 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
7710 true for TYPE_UNSIGNED integral types.
7713 PR rtl-optimization/94516
7714 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
7716 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
7717 Call df_notes_rescan if that argument is not true and returning true.
7718 * combine.c (adjust_for_new_dest): Pass true as second argument to
7719 remove_reg_equal_equiv_notes.
7720 * postreload.c (reload_combine_recognize_pattern): Don't call
7723 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
7725 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
7727 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
7728 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
7729 (*neg_ne_<mode>): Likewise.
7731 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
7733 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
7735 (*setbcr_<un>signed_<GPR:mode>): Likewise.
7736 (cstore<mode>4): Use setbc[r] if available.
7737 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
7738 (eq<mode>3): Use setbc for TARGET_FUTURE.
7739 (*eq<mode>3): Avoid for TARGET_FUTURE.
7740 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
7741 else for non-Pmode, use gen_eq and gen_xor.
7742 (*ne<mode>3): Avoid for TARGET_FUTURE.
7743 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
7745 2020-05-07 Jeff Law <law@redhat.com>
7747 * config/h8300/h8300.md: Move expanders and patterns into
7748 files based on functionality.
7749 * config/h8300/addsub.md: New file.
7750 * config/h8300/bitfield.md: New file
7751 * config/h8300/combiner.md: New file
7752 * config/h8300/divmod.md: New file
7753 * config/h8300/extensions.md: New file
7754 * config/h8300/jumpcall.md: New file
7755 * config/h8300/logical.md: New file
7756 * config/h8300/movepush.md: New file
7757 * config/h8300/multiply.md: New file
7758 * config/h8300/other.md: New file
7759 * config/h8300/proepi.md: New file
7760 * config/h8300/shiftrotate.md: New file
7761 * config/h8300/testcompare.md: New file
7763 * config/h8300/h8300.md (adds/subs splitters): Merge into single
7765 (negation expanders and patterns): Simplify and combine using
7767 (one_cmpl expanders and patterns): Likewise.
7768 (tablejump, indirect_jump patterns ): Likewise.
7769 (shift and rotate expanders and patterns): Likewise.
7770 (absolute value expander and pattern): Drop expander, rename pattern
7772 (peephole2 patterns): Move into...
7773 * config/h8300/peepholes.md: New file.
7775 * config/h8300/constraints.md (L and N): Simplify now that we're not
7776 longer supporting the original H8/300 chip.
7777 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
7778 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
7779 (shift_alg_hi, shift_alg_si): Similarly.
7780 (h8300_option_overrides): Similarly. Default to H8/300H. If
7781 compiling for H8/S, then turn off H8/300H. Do not update the
7782 shift_alg tables for H8/300 port.
7783 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
7785 (push, split_adds_subs, h8300_rtx_costs): Likewise.
7786 (h8300_print_operand, compute_mov_length): Likewise.
7787 (output_plussi, compute_plussi_length): Likewise.
7788 (compute_plussi_cc, output_logical_op): Likewise.
7789 (compute_logical_op_length, compute_logical_op_cc): Likewise.
7790 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
7791 (output_a_shift, compute_a_shift_length): Likewise.
7792 (output_a_rotate, compute_a_rotate_length): Likewise.
7793 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
7794 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
7795 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
7796 (attr_cpu, TARGET_H8300): Remove.
7797 (TARGET_DEFAULT): Update.
7798 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
7799 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
7800 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
7801 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
7802 * config/h8300/h8300.md: Simplify patterns throughout.
7803 * config/h8300/t-h8300: Update multilib configuration.
7805 * config/h8300/h8300.h (LINK_SPEC): Remove.
7806 (USER_LABEL_PREFIX): Likewise.
7808 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
7809 (h8300_option_override): Remove remnants of COFF support.
7811 2020-05-07 Alan Modra <amodra@gmail.com>
7813 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
7814 set_rtx_cost with set_src_cost.
7815 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
7817 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
7819 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
7820 redundant half vector handlings for no peeling gaps.
7822 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
7824 * tree-ssa-operands.c (operands_scanner): New class.
7825 (operands_bitmap_obstack): Remove.
7826 (n_initialized): Remove.
7827 (build_uses): Move to operands_scanner class.
7828 (build_vuse): Same as above.
7829 (build_vdef): Same as above.
7830 (verify_ssa_operands): Same as above.
7831 (finalize_ssa_uses): Same as above.
7832 (cleanup_build_arrays): Same as above.
7833 (finalize_ssa_stmt_operands): Same as above.
7834 (start_ssa_stmt_operands): Same as above.
7835 (append_use): Same as above.
7836 (append_vdef): Same as above.
7837 (add_virtual_operand): Same as above.
7838 (add_stmt_operand): Same as above.
7839 (get_mem_ref_operands): Same as above.
7840 (get_tmr_operands): Same as above.
7841 (maybe_add_call_vops): Same as above.
7842 (get_asm_stmt_operands): Same as above.
7843 (get_expr_operands): Same as above.
7844 (parse_ssa_operands): Same as above.
7845 (finalize_ssa_defs): Same as above.
7846 (build_ssa_operands): Same as above, plus create a C-like wrapper.
7847 (update_stmt_operands): Create an instance of operands_scanner.
7849 2020-05-07 Richard Biener <rguenther@suse.de>
7852 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
7853 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
7854 (refered_from_nonlocal_var): Likewise.
7855 (ipa_pta_execute): Likewise.
7857 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
7859 * gcc/tree-ssa-struct-alias.c: Fix comments
7861 2020-05-07 Martin Liska <mliska@suse.cz>
7863 * doc/invoke.texi: Fix 2 optindex entries.
7865 2020-05-07 Richard Biener <rguenther@suse.de>
7868 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
7869 (tree_decl_common::not_gimple_reg_flag): ... to this.
7870 * tree.h (DECL_GIMPLE_REG_P): Rename ...
7871 (DECL_NOT_GIMPLE_REG_P): ... to this.
7872 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
7873 (create_tmp_reg): Simplify.
7874 (create_tmp_reg_fn): Likewise.
7875 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
7876 * gimplify.c (create_tmp_from_val): Simplify.
7877 (gimplify_bind_expr): Likewise.
7878 (gimplify_compound_literal_expr): Likewise.
7879 (gimplify_function_tree): Likewise.
7880 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
7881 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
7882 (asan_add_global): Copy it.
7883 * cgraphunit.c (cgraph_node::expand_thunk): Force args
7885 * function.c (gimplify_parameters): Copy
7886 DECL_NOT_GIMPLE_REG_P.
7887 * ipa-param-manipulation.c
7888 (ipa_param_body_adjustments::common_initialization): Simplify.
7889 (ipa_param_body_adjustments::reset_debug_stmts): Copy
7890 DECL_NOT_GIMPLE_REG_P.
7891 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
7892 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
7893 * tree-cfg.c (make_blocks_1): Simplify.
7894 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
7895 * tree-eh.c (lower_eh_constructs_2): Simplify.
7896 * tree-inline.c (declare_return_variable): Adjust and
7898 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
7899 (copy_result_decl_to_var): Likewise.
7900 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
7901 * tree-nested.c (create_tmp_var_for): Simplify.
7902 * tree-parloops.c (separate_decls_in_region_name): Copy
7903 DECL_NOT_GIMPLE_REG_P.
7904 * tree-sra.c (create_access_replacement): Adjust and
7905 generalize partial def support.
7906 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
7907 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
7908 * tree-ssa.c (maybe_optimize_var): Handle clearing of
7909 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
7911 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
7912 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
7913 DECL_NOT_GIMPLE_REG_P.
7914 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
7915 * cfgexpand.c (avoid_type_punning_on_regs): New.
7916 (discover_nonconstant_array_refs): Call
7917 avoid_type_punning_on_regs to avoid unsupported mode punning.
7919 2020-05-07 Alex Coplan <alex.coplan@arm.com>
7921 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
7924 2020-05-07 Richard Biener <rguenther@suse.de>
7926 PR tree-optimization/57359
7927 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
7928 (in_mem_ref::dep_loop): Repurpose.
7929 (LOOP_DEP_BIT): Remove.
7930 (enum dep_kind): New.
7931 (enum dep_state): Likewise.
7932 (record_loop_dependence): New function to populate the
7934 (query_loop_dependence): New function to query the dependence
7936 (memory_accesses::refs_in_loop): Rename to ...
7937 (memory_accesses::refs_loaded_in_loop): ... this and change to
7939 (outermost_indep_loop): Adjust.
7940 (mem_ref_alloc): Likewise.
7941 (gather_mem_refs_stmt): Likewise.
7942 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
7943 (struct sm_aux): New.
7944 (execute_sm): Split code generation on exits, record state
7946 (enum sm_kind): New.
7947 (execute_sm_exit): Exit code generation part.
7948 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
7949 dependence checking on stores reached from exits.
7950 (sm_seq_valid_bb): New function gathering SM stores on exits.
7951 (hoist_memory_references): Re-implement.
7952 (refs_independent_p): Add tbaa_p parameter and pass it down.
7953 (record_dep_loop): Remove.
7954 (ref_indep_loop_p_1): Fold into ...
7955 (ref_indep_loop_p): ... this and generalize for three kinds
7956 of dependence queries.
7957 (can_sm_ref_p): Adjust according to hoist_memory_references
7959 (store_motion_loop): Don't do anything if the set of SM
7960 candidates is empty.
7961 (tree_ssa_lim_initialize): Adjust.
7962 (tree_ssa_lim_finalize): Likewise.
7964 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
7965 Pierre-Marie de Rodat <derodat@adacore.com>
7967 * dwarf2out.c (add_data_member_location_attribute): Take into account
7968 the variant part offset in the computation of the data bit offset.
7969 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
7970 in the call to field_byte_offset.
7971 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
7972 confusing assertion.
7973 (analyze_variant_discr): Deal with boolean subtypes.
7975 2020-05-07 Martin Liska <mliska@suse.cz>
7977 * lto-wrapper.c: Split arguments of MAKE environment
7980 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
7982 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
7983 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
7984 fenv_var and new_fenv_var.
7986 2020-05-06 Jakub Jelinek <jakub@redhat.com>
7989 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
7991 (avx512dq_vextract<shuffletype>64x2_1_maskm,
7992 avx512f_vextract<shuffletype>32x4_1_maskm,
7993 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
7994 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
7996 (*avx512dq_vextract<shuffletype>64x2_1,
7997 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
7998 define_insns. Even in the masked variant allow memory output but in
7999 that case use 0 rather than 0C constraint on the source of masked-out
8001 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
8003 (*avx512f_vextract<shuffletype>32x4_1,
8004 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
8005 Even in the masked variant allow memory output but in that case use
8006 0 rather than 0C constraint on the source of masked-out elts.
8007 (vec_extract_lo_<mode><mask_name>): Split into ...
8008 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
8009 define_insns. Even in the masked variant allow memory output but in
8010 that case use 0 rather than 0C constraint on the source of masked-out
8012 (vec_extract_hi_<mode><mask_name>): Split into ...
8013 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
8014 define_insns. Even in the masked variant allow memory output but in
8015 that case use 0 rather than 0C constraint on the source of masked-out
8018 2020-05-06 qing zhao <qing.zhao@oracle.com>
8021 * common.opt: Add -flarge-source-files.
8022 * doc/invoke.texi: Document it.
8023 * toplev.c (process_options): set line_table->default_range_bits
8024 to 0 when flag_large_source_files is true.
8026 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
8029 * config/i386/predicates.md (add_comparison_operator): New predicate.
8030 * config/i386/i386.md (compare->add splitter): New splitters.
8032 2020-05-06 Richard Biener <rguenther@suse.de>
8034 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
8035 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
8036 Remove slp_instance parameter, just iterate over all scalar stmts.
8037 (vect_slp_analyze_instance_dependence): Adjust and likewise.
8038 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
8040 (vect_schedule_slp): Just iterate over all scalar stmts.
8041 (vect_supported_load_permutation_p): Adjust.
8042 (vect_transform_slp_perm_load): Remove slp_instance parameter,
8043 instead use the number of lanes in the node as group size.
8044 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
8045 factor instead of slp_instance as parameter.
8046 (vectorizable_load): Adjust.
8048 2020-05-06 Andreas Schwab <schwab@suse.de>
8050 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
8051 (aarch64_get_extension_string_for_isa_flags): Don't declare.
8053 2020-05-06 Richard Biener <rguenther@suse.de>
8056 * cfgloopmanip.c (create_preheader): Require non-complex
8057 preheader edge for CP_SIMPLE_PREHEADERS.
8059 2020-05-06 Richard Biener <rguenther@suse.de>
8061 PR tree-optimization/94963
8062 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
8063 no-warning marking of the conditional store.
8064 (execute_sm): Instead mark the uninitialized state
8065 on loop entry to be not warned about.
8067 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
8069 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
8070 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
8071 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
8072 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8074 * config/i386/i386-builtin.def: Add new builtins.
8075 * config/i386/i386-c.c (ix86_target_macros_internal): Define
8077 * config/i386/i386-options.c (ix86_target_string): Add
8079 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
8080 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
8082 * config/i386/i386.md (define_c_enum "unspec"): Add
8083 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
8084 (TSXLDTRK): New define_int_iterator.
8085 ("<tsxldtrk>"): New define_insn.
8086 * config/i386/i386.opt: Add -mtsxldtrk.
8087 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
8088 * config/i386/tsxldtrkintrin.h: New.
8089 * doc/invoke.texi: Document -mtsxldtrk.
8091 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8093 PR tree-optimization/94921
8094 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
8097 2020-05-06 Richard Biener <rguenther@suse.de>
8099 PR tree-optimization/94965
8100 * tree-vect-stmts.c (vectorizable_load): Fix typo.
8102 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8104 * doc/install.texi: Replace Sun with Solaris as appropriate.
8105 (Tools/packages necessary for building GCC, Perl version between
8106 5.6.1 and 5.6.24): Remove Solaris 8 reference.
8107 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
8109 (Specific, i?86-*-solaris2*): Update version references for
8110 Solaris 11.3 and later. Remove gas 2.26 caveat.
8111 (Specific, *-*-solaris2*): Update version references for
8112 Solaris 11.3 and later. Remove boehm-gc reference.
8113 Document GMP, MPFR caveats on Solaris 11.3.
8114 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
8115 (Specific, sparc64-*-solaris2*): Likewise.
8116 Document --build requirement.
8118 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8121 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
8122 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
8124 PR rtl-optimization/94873
8125 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
8126 note if SET_SRC (set) has side-effects.
8128 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
8129 Wei Xiao <wei3.xiao@intel.com>
8131 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
8132 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
8133 (ix86_handle_option): Handle -mserialize.
8134 * config.gcc (serializeintrin.h): New header file.
8135 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
8136 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8138 * config/i386/i386-builtin.def: Add new builtin.
8139 * config/i386/i386-c.c (__SERIALIZE__): New macro.
8140 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
8142 * (ix86_valid_target_attribute_inner_p): Add target attribute
8144 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
8146 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
8147 (serialize): New define_insn.
8148 * config/i386/i386.opt (mserialize): New option
8149 * config/i386/immintrin.h: Include serailizeintrin.h.
8150 * config/i386/serializeintrin.h: New header file.
8151 * doc/invoke.texi: Add documents for -mserialize.
8153 2020-05-06 Richard Biener <rguenther@suse.de>
8155 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
8156 to/from pointer conversion checking.
8158 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
8160 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
8162 * config/rs6000/rs6000-c.c: Likewise.
8163 * config/rs6000/rs6000-call.c: Likewise.
8164 * config/rs6000/rs6000.c: Likewise.
8166 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
8168 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
8169 (RTEMS_ENDFILE_SPEC): Likewise.
8170 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
8171 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
8172 (LIB_SPECS): Support -nodefaultlibs option.
8173 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
8174 (RTEMS_ENDFILE_SPEC): Likewise.
8175 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
8176 (RTEMS_ENDFILE_SPEC): Likewise.
8177 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
8178 (RTEMS_ENDFILE_SPEC): Likewise.
8180 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8182 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
8183 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
8185 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8187 * config/pru/pru.h: Mark R3.w0 as caller saved.
8189 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8191 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
8192 and gen_doloop_begin_internal.
8193 (pru_reorg_loop): Use gen_pruloop with mode.
8194 * config/pru/pru.md: Use new @insn syntax.
8196 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8198 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
8200 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
8202 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
8203 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
8204 (addqi3_cconly_overflow): Ditto.
8205 (umulv<mode>4): Ditto.
8206 (<s>mul<mode>3_highpart): Ditto.
8207 (tls_global_dynamic_32): Ditto.
8208 (tls_local_dynamic_base_32): Ditto.
8215 (*adddi_4): Remove "m" constraint from scratch operand.
8216 (*add<mode>_4): Ditto.
8218 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8220 PR rtl-optimization/94516
8221 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
8222 with sp = reg, add REG_EQUAL note with sp + const.
8223 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
8224 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
8225 postreload sp = sp + const to sp = reg optimization if needed and
8227 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
8228 reg = sp insn with sp + const REG_EQUAL note. Adjust
8229 try_apply_stack_adjustment caller, call
8230 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
8231 (combine_stack_adjustments): Allocate and free LIVE bitmap,
8232 adjust combine_stack_adjustments_for_block caller.
8234 2020-05-05 Martin Liska <mliska@suse.cz>
8236 PR gcov-profile/93623
8237 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
8240 2020-05-05 Martin Liska <mliska@suse.cz>
8242 * opt-functions.awk (opt_args_non_empty): New function.
8243 * opt-read.awk: Use the function for various option arguments.
8245 2020-05-05 Martin Liska <mliska@suse.cz>
8248 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
8249 report warning when the jobserver is not detected.
8251 2020-05-05 Martin Liska <mliska@suse.cz>
8253 PR gcov-profile/94636
8254 * gcov.c (main): Print total lines summary at the end.
8255 (generate_results): Expect file_name always being non-null.
8256 Print newline after intermediate file is printed in order to align with
8257 what we do for normal files.
8259 2020-05-05 Martin Liska <mliska@suse.cz>
8261 * dumpfile.c (dump_switch_p): Change return type
8262 and print option suggestion.
8263 * dumpfile.h: Change return type.
8264 * opts-global.c (handle_common_deferred_options):
8265 Move error into dump_switch_p function.
8267 2020-05-05 Martin Liska <mliska@suse.cz>
8270 * alloc-pool.h: Use const for some arguments.
8271 * bitmap.h: Likewise.
8272 * mem-stats.h: Likewise.
8273 * sese.h (get_entry_bb): Likewise.
8274 (get_exit_bb): Likewise.
8276 2020-05-05 Richard Biener <rguenther@suse.de>
8278 * tree-vect-slp.c (struct vdhs_data): New.
8279 (vect_detect_hybrid_slp): New walker.
8280 (vect_detect_hybrid_slp): Rewrite.
8282 2020-05-05 Richard Biener <rguenther@suse.de>
8285 * tree-ssa-structalias.c (ipa_pta_execute): Use
8286 varpool_node::externally_visible_p ().
8287 (refered_from_nonlocal_var): Likewise.
8289 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
8291 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
8292 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
8293 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
8295 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
8297 * gimplify.c (gimplify_init_constructor): Do not put the constructor
8298 into static memory if it is not complete.
8300 2020-05-05 Richard Biener <rguenther@suse.de>
8302 PR tree-optimization/94949
8303 * tree-ssa-loop-im.c (execute_sm): Check whether we use
8304 the multithreaded model or always compute the stored value
8305 before eliding a load.
8307 2020-05-05 Alex Coplan <alex.coplan@arm.com>
8309 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
8311 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8313 PR tree-optimization/94800
8314 * match.pd (X + (X << C) to X * (1 + (1 << C)),
8315 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
8319 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
8321 PR tree-optimization/94914
8322 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
8325 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
8327 * config/i386/i386.md (*testqi_ext_3): Use
8328 int_nonimmediate_operand instead of manual mode checks.
8329 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
8330 Use int_nonimmediate_operand predicate. Rewrite
8331 define_insn_and_split pattern to a combine pass splitter.
8333 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8335 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
8336 * configure: Regenerate.
8338 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8341 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
8342 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
8343 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
8344 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
8346 2020-05-04 Clement Chigot <clement.chigot@atos.net>
8347 David Edelsohn <dje.gcc@gmail.com>
8349 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
8350 for fmodl, frexpl, ldexpl and modfl builtins.
8352 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
8355 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
8356 chosen lhs is different from the gcall lhs.
8357 (expand_mask_load_optab_fn): Likewise.
8358 (expand_gather_load_optab_fn): Likewise.
8360 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
8363 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
8364 (EQ compare->LTU compare splitter): New splitter.
8365 (NE compare->NEG splitter): Ditto.
8367 2020-05-04 Marek Polacek <polacek@redhat.com>
8370 2020-04-30 Marek Polacek <polacek@redhat.com>
8373 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
8374 (check_aligned_type): Check if TYPE_USER_ALIGN match.
8376 2020-05-04 Richard Biener <rguenther@suse.de>
8378 PR tree-optimization/93891
8379 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
8380 the original reference tree for assessing access alignment.
8382 2020-05-04 Richard Biener <rguenther@suse.de>
8384 PR tree-optimization/39612
8385 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
8386 (set_ref_loaded_in_loop): New.
8387 (mark_ref_loaded): Likewise.
8388 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
8389 (execute_sm): Avoid issueing a load when it was not there.
8390 (execute_sm_if_changed): Avoid issueing warnings for the
8393 2020-05-04 Martin Jambor <mjambor@suse.cz>
8396 * tree-inline.c (tree_function_versioning): Leave any type conversion
8397 of replacements to setup_one_parameter and its friend
8398 force_value_to_type.
8400 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
8403 * config/i386/predicates.md (shr_comparison_operator): New predicate.
8404 * config/i386/i386.md (compare->shr splitter): New splitters.
8406 2020-05-04 Jakub Jelinek <jakub@redhat.com>
8408 PR tree-optimization/94718
8409 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
8411 PR tree-optimization/94718
8412 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
8413 replace two nop conversions on bit_{and,ior,xor} argument
8414 and result with just one conversion on the result or another argument.
8416 PR tree-optimization/94718
8417 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
8418 -> (X ^ Y) & C eqne 0 optimization to ...
8419 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
8421 * opts.c (get_option_html_page): Instead of hardcoding a list of
8422 options common between C/C++ and Fortran only use gfortran/
8423 documentation for warnings that have CL_Fortran set but not
8426 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
8428 * config/i386/i386-expand.c (ix86_expand_int_movcc):
8429 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
8430 (emit_memmov): Ditto.
8431 (emit_memset): Ditto.
8432 (ix86_expand_strlensi_unroll_1): Ditto.
8433 (release_scratch_register_on_entry): Ditto.
8434 (gen_frame_set): Ditto.
8435 (ix86_emit_restore_reg_using_pop): Ditto.
8436 (ix86_emit_outlined_ms2sysv_restore): Ditto.
8437 (ix86_expand_epilogue): Ditto.
8438 (ix86_expand_split_stack_prologue): Ditto.
8439 * config/i386/i386.md (push immediate splitter): Ditto.
8443 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
8445 PR translation/93861
8446 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
8449 2020-05-02 Jakub Jelinek <jakub@redhat.com>
8451 * config/tilegx/tilegx.md
8452 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
8453 rather than just <n>.
8455 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
8458 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
8459 and crtl->patch_area_entry.
8460 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
8461 * opts.c (common_handle_option): Limit
8462 function_entry_patch_area_size and function_entry_patch_area_start
8463 to USHRT_MAX. Fix a typo in error message.
8464 * varasm.c (assemble_start_function): Use crtl->patch_area_size
8465 and crtl->patch_area_entry.
8466 * doc/invoke.texi: Document the maximum value for
8467 -fpatchable-function-entry.
8469 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
8471 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
8472 Override SUBTARGET_SHADOW_OFFSET macro.
8474 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
8476 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
8477 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
8478 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
8479 * config/i386/freebsd.h: Likewise.
8480 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
8481 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
8483 2020-04-30 Alexandre Oliva <oliva@adacore.com>
8485 * doc/sourcebuild.texi (Effective-Target Keywords): Document
8486 the newly-introduced fileio effective target.
8488 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
8490 PR rtl-optimization/94740
8491 * cse.c (cse_process_notes_1): Replace with...
8492 (cse_process_note_1): ...this new function, acting as a
8493 simplify_replace_fn_rtx callback to process_note. Handle only
8494 REGs and MEMs directly. Validate the MEM if cse_process_note
8495 changes its address.
8496 (cse_process_notes): Replace with...
8497 (cse_process_note): ...this new function.
8498 (cse_extended_basic_block): Update accordingly, iterating over
8499 the register notes and passing individual notes to cse_process_note.
8501 2020-04-30 Carl Love <cel@us.ibm.com>
8503 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
8505 2020-04-30 Martin Jambor <mjambor@suse.cz>
8508 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
8509 saved by the inliner and thunks which had their call inlined.
8510 * ipa-inline-transform.c (save_inline_function_body): Fill in
8511 former_clone_of of new body holders.
8513 2020-04-30 Jakub Jelinek <jakub@redhat.com>
8515 * BASE-VER: Set to 11.0.0.
8517 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
8519 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
8521 2020-04-30 Marek Polacek <polacek@redhat.com>
8524 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
8525 (check_aligned_type): Check if TYPE_USER_ALIGN match.
8527 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8529 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
8530 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
8531 * doc/invoke.texi (moutline-atomics): Document as on by default.
8533 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
8536 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
8537 the check for NOTE_INSN_DELETED_LABEL.
8539 2020-04-30 Jakub Jelinek <jakub@redhat.com>
8541 * configure.ac (--with-documentation-root-url,
8542 --with-changes-root-url): Diagnose URL not ending with /,
8543 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
8544 * opts.h (get_changes_url): Remove.
8545 * opts.c (get_changes_url): Remove.
8546 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
8547 or -DCHANGES_ROOT_URL.
8548 * doc/install.texi (--with-documentation-root-url,
8549 --with-changes-root-url): Document.
8550 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
8551 get_changes_url and free, change url variable type to const char * and
8552 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
8553 * config/s390/s390.c (s390_function_arg_vector,
8554 s390_function_arg_float): Likewise.
8555 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
8557 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
8559 * config.in: Regenerate.
8560 * configure: Regenerate.
8562 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
8565 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
8567 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
8569 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
8570 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
8572 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
8574 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
8575 Change constraint for vlrl/vstrl to jb4.
8577 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8579 * var-tracking.c (vt_initialize): Move variables pre and post
8580 into inner block and initialize both in order to fix warning
8581 about uninitialized use. Remove unnecessary checks for
8582 frame_pointer_needed.
8584 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8586 * toplev.c (output_stack_usage_1): Ensure that first
8587 argument to fprintf is not null.
8589 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8591 * configure.ac (-with-changes-root-url): New configure option,
8592 defaulting to https://gcc.gnu.org/.
8593 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
8595 * pretty-print.c (get_end_url_string): New function.
8596 (pp_format): Handle %{ and %} for URLs.
8597 (pp_begin_url): Use pp_string instead of pp_printf.
8598 (pp_end_url): Use get_end_url_string.
8599 * opts.h (get_changes_url): Declare.
8600 * opts.c (get_changes_url): New function.
8601 * config/rs6000/rs6000-call.c: Include opts.h.
8602 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
8603 of just in GCC 10.1 in diagnostics and add URL.
8604 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
8605 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
8607 * config/s390/s390.c (s390_function_arg_vector,
8608 s390_function_arg_float): Likewise.
8609 * configure: Regenerated.
8612 * config/s390/s390.c (s390_function_arg_vector,
8613 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
8614 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
8615 passed to the function rather than the type of the single element.
8616 Rename cxx17_empty_base_seen variable to empty_base_seen, change
8617 type to int, and adjust diagnostics depending on if the field
8618 has [[no_unique_attribute]] or not.
8621 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
8622 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
8623 used in casts into parens.
8624 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
8625 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
8626 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
8627 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
8628 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
8629 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
8630 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
8631 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
8632 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
8633 _mm256_mask_cmp_epu8_mask): Likewise.
8634 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
8635 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
8636 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
8637 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
8640 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
8641 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
8642 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
8643 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
8644 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
8645 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
8646 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
8647 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
8648 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
8649 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
8650 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
8651 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
8652 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
8654 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
8655 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
8656 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
8657 as mask vector containing -1.0 or -1.0f elts, but instead vector
8658 with all bits set using _mm*_cmpeq_p? with zero operands.
8659 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
8660 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
8661 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
8662 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
8663 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
8664 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
8665 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
8666 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
8667 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
8668 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
8669 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
8670 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
8671 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
8672 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
8673 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
8674 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
8675 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
8677 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
8678 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
8679 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
8680 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
8681 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
8682 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
8683 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
8684 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
8685 _mm512_mask_prefetch_i64scatter_ps): Likewise.
8686 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
8687 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
8688 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
8689 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
8690 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
8691 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
8692 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
8693 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
8694 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
8695 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
8696 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
8697 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
8698 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
8699 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
8700 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
8701 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
8702 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
8703 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
8704 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
8705 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
8706 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
8707 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
8708 _mm_mask_i64scatter_epi64): Likewise.
8710 2020-04-29 Jeff Law <law@redhat.com>
8712 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
8713 division instructions are 4 bytes long.
8715 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8718 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
8719 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
8720 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
8721 take address of TARGET_EXPR of fenv_var with void_node initializer.
8724 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8726 PR tree-optimization/94774
8727 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
8730 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8732 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
8733 * calls.c (cxx17_empty_base_field_p): New function. Check
8734 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
8737 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
8740 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
8741 Allow -fcf-protection with -mindirect-branch=thunk-extern and
8742 -mfunction-return=thunk-extern.
8743 * doc/invoke.texi: Update notes for -fcf-protection=branch with
8744 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
8746 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8748 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
8750 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8752 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
8753 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
8754 fenv_var and new_fenv_var.
8756 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8758 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
8759 effective-target keyword.
8760 (arm_arch_v8a_hard_multilib): Likewise.
8761 (arm_arch_v8a_hard): Document new dg-add-options keyword.
8762 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
8763 code is deprecated and has not been updated to handle
8764 DECL_FIELD_ABI_IGNORED.
8765 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
8766 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
8767 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
8768 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
8769 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
8770 something actually is a HFA or HVA. Record whether we see a
8771 [[no_unique_address]] field that previous GCCs would not have
8772 ignored in this way.
8773 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
8774 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
8775 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
8776 diagnostic messages.
8777 (arm_needs_doubleword_align): Add a comment explaining why we
8778 consider even zero-sized fields.
8780 2020-04-29 Richard Biener <rguenther@suse.de>
8781 Li Zekun <lizekun1@huawei.com>
8784 * tree.c (component_ref_size): Guard against error_mark_node
8785 DECL_INITIAL as it happens with LTO.
8787 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8789 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
8790 comment explaining why we consider even zero-sized fields.
8791 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
8792 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
8793 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
8794 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
8795 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
8796 something actually is a HFA or HVA. Record whether we see a
8797 [[no_unique_address]] field that previous GCCs would not have
8798 ignored in this way.
8799 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
8800 whether diagnostics should be suppressed. Update the calls to
8801 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
8802 [[no_unique_address]] case.
8803 (aarch64_return_in_msb): Update call accordingly, never silencing
8805 (aarch64_function_value): Likewise.
8806 (aarch64_return_in_memory_1): Likewise.
8807 (aarch64_init_cumulative_args): Likewise.
8808 (aarch64_gimplify_va_arg_expr): Likewise.
8809 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
8810 use it to decide whether arch64_vfp_is_call_or_return_candidate
8812 (aarch64_pass_by_reference): Update calls accordingly.
8813 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
8814 to decide whether arch64_vfp_is_call_or_return_candidate should be
8817 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
8820 * config/aarch64/aarch64-builtins.c
8821 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
8822 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
8825 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
8827 * configure.ac <$enable_offload_targets>: Do parsing as done
8829 * configure: Regenerate.
8831 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
8832 * configure: Regenerate.
8835 * rtlanal.c (set_noop_p): Handle non-constant selectors.
8838 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
8840 (TARGET_EXCEPT_UNWIND_INFO): Define.
8842 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8845 * config/gcn/gcn.md (*mov<mode>_insn): Use
8846 'reg_overlap_mentioned_p' to check for overlap.
8849 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
8850 instead of cxx17_empty_base_field_p.
8853 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
8854 DECL_FIELD_ABI_IGNORED.
8855 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
8856 * calls.h (cxx17_empty_base_field_p): Change into a temporary
8857 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
8859 * calls.c (cxx17_empty_base_field_p): Remove.
8860 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
8861 DECL_FIELD_ABI_IGNORED.
8862 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
8863 * lto-streamer-out.c (hash_tree): Likewise.
8864 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
8865 cxx17_empty_base_seen to empty_base_seen, change type to int *,
8866 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
8867 cxx17_empty_base_field_p, if "no_unique_address" attribute is
8868 present, propagate that to the caller too.
8869 (rs6000_discover_homogeneous_aggregate): Adjust
8870 rs6000_aggregate_candidate caller, emit different diagnostics
8871 when c++17 empty base fields are present and when empty
8872 [[no_unique_address]] fields are present.
8873 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
8874 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
8877 2020-04-29 Richard Biener <rguenther@suse.de>
8879 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
8880 Just check whether the stmt stores.
8882 2020-04-28 Alexandre Oliva <oliva@adacore.com>
8885 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
8886 output operand in emulation. Don't overwrite pseudos.
8888 2020-04-28 Jeff Law <law@redhat.com>
8890 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
8891 multiply patterns are 4 bytes long.
8893 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8895 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
8896 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
8898 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
8899 Jakub Jelinek <jakub@redhat.com>
8902 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
8903 base class artificial fields.
8904 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
8905 decision is different after this fix.
8907 2020-04-28 David Malcolm <dmalcolm@redhat.com>
8913 * doc/invoke.texi (Static Analyzer Options): Remove
8914 -Wanalyzer-use-of-uninitialized-value.
8915 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
8917 2020-04-28 Jakub Jelinek <jakub@redhat.com>
8919 PR tree-optimization/94809
8920 * tree.c (build_call_expr_internal_loc_array): Call
8921 process_call_operands.
8923 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
8925 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
8926 * config/aarch64/aarch64-tune.md: Regenerate.
8927 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
8928 (thunderx3t110_regmove_cost): Likewise.
8929 (thunderx3t110_vector_cost): Likewise.
8930 (thunderx3t110_prefetch_tune): Likewise.
8931 (thunderx3t110_tunings): Likewise.
8932 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
8934 * config/aarch64/thunderx3t110.md: New file.
8935 * config/aarch64/aarch64.md: Include thunderx3t110.md.
8936 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
8938 2020-04-28 Jakub Jelinek <jakub@redhat.com>
8941 * config/s390/s390.c (s390_function_arg_vector,
8942 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
8944 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
8946 PR tree-optimization/94727
8947 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
8948 operands are invariant booleans, use the mask type associated with the
8949 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
8950 (vectorizable_condition): Pass vectype unconditionally to
8951 vect_is_simple_cond.
8953 2020-04-27 Jakub Jelinek <jakub@redhat.com>
8956 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
8957 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
8958 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
8960 2020-04-27 David Malcolm <dmalcolm@redhat.com>
8963 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
8964 default value, so that it can by supplied by get_option_html_page.
8965 * configure: Regenerate.
8966 * opts.c: Include "selftest.h".
8967 (get_option_html_page): New function.
8968 (get_option_url): Use it. Reformat to place comments next to the
8969 expressions they refer to.
8970 (selftest::test_get_option_html_page): New.
8971 (selftest::opts_c_tests): New.
8972 * selftest-run-tests.c (selftest::run_tests): Call
8973 selftest::opts_c_tests.
8974 * selftest.h (selftest::opts_c_tests): New decl.
8976 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
8978 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
8979 UINTVAL to CONST_INTs.
8981 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8983 * config/arm/constraints.md (e): Remove constraint.
8984 (Te): Define constraint.
8985 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
8986 operand 0 from "e" to "Te".
8987 (vaddvaq_<supf><mode>): Likewise.
8988 (vaddvq_p_<supf><mode>): Likewise.
8989 (vmladavq_<supf><mode>): Likewise.
8990 (vmladavxq_s<mode>): Likewise.
8991 (vmlsdavq_s<mode>): Likewise.
8992 (vmlsdavxq_s<mode>): Likewise.
8993 (vaddvaq_p_<supf><mode>): Likewise.
8994 (vmladavaq_<supf><mode>): Likewise.
8995 (vmladavq_p_<supf><mode>): Likewise.
8996 (vmladavxq_p_s<mode>): Likewise.
8997 (vmlsdavq_p_s<mode>): Likewise.
8998 (vmlsdavxq_p_s<mode>): Likewise.
8999 (vmlsdavaxq_s<mode>): Likewise.
9000 (vmlsdavaq_s<mode>): Likewise.
9001 (vmladavaxq_s<mode>): Likewise.
9002 (vmladavaq_p_<supf><mode>): Likewise.
9003 (vmladavaxq_p_s<mode>): Likewise.
9004 (vmlsdavaq_p_s<mode>): Likewise.
9005 (vmlsdavaxq_p_s<mode>): Likewise.
9007 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
9009 * config/arm/arm.c (output_move_neon): Only get the first operand if
9012 2020-04-27 Felix Yang <felix.yang@huawei.com>
9014 PR tree-optimization/94784
9015 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
9016 assert around so that it checks that the two vectors have equal
9017 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
9018 types is a useless_type_conversion_p.
9020 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
9023 * dwarf2cfi.c (struct GTY): Add ra_mangled.
9024 (cfi_row_equal_p): Check ra_mangled.
9025 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
9026 this only handles the sparc logic now.
9027 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
9028 the aarch64 specific logic.
9029 (dwarf2out_frame_debug): Update to use the new subroutines.
9030 (change_cfi_row): Check ra_mangled.
9032 2020-04-27 Jakub Jelinek <jakub@redhat.com>
9035 * config/s390/s390.c (s390_function_arg_vector,
9036 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
9038 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
9040 * common/config/rs6000/rs6000-common.c
9041 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
9043 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
9046 2020-04-27 Martin Liska <mliska@suse.cz>
9049 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
9050 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
9052 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
9055 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
9057 (rs6000_emit_prologue_components):
9058 Check with frame_pointer_needed_indeed.
9059 (rs6000_emit_epilogue_components): Likewise.
9060 (rs6000_emit_prologue): Likewise.
9061 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
9063 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
9065 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
9066 stack frame when debugging and flag_compare_debug is enabled.
9068 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
9070 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
9071 enable PC-relative addressing for -mcpu=future.
9072 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
9073 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
9074 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
9075 suppress PC-relative addressing.
9076 (rs6000_option_override_internal): Split up error messages
9077 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
9080 2020-04-25 Jakub Jelinek <jakub@redhat.com>
9081 Richard Biener <rguenther@suse.de>
9083 PR tree-optimization/94734
9084 PR tree-optimization/89430
9085 * tree-ssa-phiopt.c: Include tree-eh.h.
9086 (cond_store_replacement): Return false if an automatic variable
9087 access could trap. If -fstore-data-races, don't return false
9088 just because an automatic variable is addressable.
9090 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
9092 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
9094 (add<mode>_sext_dup2_exec): Likewise.
9096 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
9099 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
9100 endian byteshift_val calculation.
9102 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
9104 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
9106 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
9108 * config/aarch64/arm_sve.h: Add a comment.
9110 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
9112 PR rtl-optimization/94708
9113 * combine.c (simplify_if_then_else): Add check for
9114 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
9116 2020-04-23 Martin Sebor <msebor@redhat.com>
9119 * common.opt (-Wno-frame-larger-than): New option.
9120 (-Wno-larger-than, -Wno-stack-usage): Same.
9122 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
9124 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
9126 (mov<mode>_exec): Likewise.
9127 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
9128 (<convop><mode><vndi>2_exec): Likewise.
9130 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
9132 PR tree-optimization/94717
9133 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
9134 of the stores doesn't have the same landing pad number as the first.
9135 (coalesce_immediate_stores): Do not try to coalesce the store using
9136 bswap if it doesn't have the same landing pad number as the first.
9138 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
9140 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
9141 Replace outdated link to ELFv2 ABI.
9143 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9146 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
9150 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
9151 temporarily with non-final second operand and updating it later,
9152 push COMPOUND_EXPRs into a vector and process it in reverse,
9153 creating COMPOUND_EXPRs with the final operands.
9155 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
9158 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
9159 bti c and bti j handling.
9161 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
9162 Thomas Schwinge <thomas@codesourcery.com>
9166 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
9167 t_async and the wait arguments.
9169 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
9171 PR tree-optimization/94727
9172 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
9173 comparing invariant scalar booleans.
9175 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
9176 Jakub Jelinek <jakub@redhat.com>
9179 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
9180 empty base class artificial fields.
9181 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
9182 different after this fix.
9184 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9187 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
9188 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
9189 if the same type has been diagnosed most recently already.
9191 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9193 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
9195 (__arm_vbicq_n_s16): Likewise.
9196 (__arm_vbicq_n_u32): Likewise.
9197 (__arm_vbicq_n_s32): Likewise.
9198 (__arm_vbicq): Likewise.
9199 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
9200 (__arm_vbicq_n_s32): Likewise.
9201 (__arm_vbicq_n_u16): Likewise.
9202 (__arm_vbicq_n_u32): Likewise.
9203 (__arm_vdupq_m_n_s8): Likewise.
9204 (__arm_vdupq_m_n_s16): Likewise.
9205 (__arm_vdupq_m_n_s32): Likewise.
9206 (__arm_vdupq_m_n_u8): Likewise.
9207 (__arm_vdupq_m_n_u16): Likewise.
9208 (__arm_vdupq_m_n_u32): Likewise.
9209 (__arm_vdupq_m_n_f16): Likewise.
9210 (__arm_vdupq_m_n_f32): Likewise.
9211 (__arm_vldrhq_gather_offset_s16): Likewise.
9212 (__arm_vldrhq_gather_offset_s32): Likewise.
9213 (__arm_vldrhq_gather_offset_u16): Likewise.
9214 (__arm_vldrhq_gather_offset_u32): Likewise.
9215 (__arm_vldrhq_gather_offset_f16): Likewise.
9216 (__arm_vldrhq_gather_offset_z_s16): Likewise.
9217 (__arm_vldrhq_gather_offset_z_s32): Likewise.
9218 (__arm_vldrhq_gather_offset_z_u16): Likewise.
9219 (__arm_vldrhq_gather_offset_z_u32): Likewise.
9220 (__arm_vldrhq_gather_offset_z_f16): Likewise.
9221 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
9222 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
9223 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
9224 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
9225 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
9226 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
9227 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
9228 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
9229 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
9230 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
9231 (__arm_vldrwq_gather_offset_s32): Likewise.
9232 (__arm_vldrwq_gather_offset_u32): Likewise.
9233 (__arm_vldrwq_gather_offset_f32): Likewise.
9234 (__arm_vldrwq_gather_offset_z_s32): Likewise.
9235 (__arm_vldrwq_gather_offset_z_u32): Likewise.
9236 (__arm_vldrwq_gather_offset_z_f32): Likewise.
9237 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
9238 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
9239 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
9240 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
9241 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
9242 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
9243 (__arm_vdwdupq_x_n_u8): Likewise.
9244 (__arm_vdwdupq_x_n_u16): Likewise.
9245 (__arm_vdwdupq_x_n_u32): Likewise.
9246 (__arm_viwdupq_x_n_u8): Likewise.
9247 (__arm_viwdupq_x_n_u16): Likewise.
9248 (__arm_viwdupq_x_n_u32): Likewise.
9249 (__arm_vidupq_x_n_u8): Likewise.
9250 (__arm_vddupq_x_n_u8): Likewise.
9251 (__arm_vidupq_x_n_u16): Likewise.
9252 (__arm_vddupq_x_n_u16): Likewise.
9253 (__arm_vidupq_x_n_u32): Likewise.
9254 (__arm_vddupq_x_n_u32): Likewise.
9255 (__arm_vldrdq_gather_offset_s64): Likewise.
9256 (__arm_vldrdq_gather_offset_u64): Likewise.
9257 (__arm_vldrdq_gather_offset_z_s64): Likewise.
9258 (__arm_vldrdq_gather_offset_z_u64): Likewise.
9259 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
9260 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
9261 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
9262 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
9263 (__arm_vidupq_m_n_u8): Likewise.
9264 (__arm_vidupq_m_n_u16): Likewise.
9265 (__arm_vidupq_m_n_u32): Likewise.
9266 (__arm_vddupq_m_n_u8): Likewise.
9267 (__arm_vddupq_m_n_u16): Likewise.
9268 (__arm_vddupq_m_n_u32): Likewise.
9269 (__arm_vidupq_n_u16): Likewise.
9270 (__arm_vidupq_n_u32): Likewise.
9271 (__arm_vidupq_n_u8): Likewise.
9272 (__arm_vddupq_n_u16): Likewise.
9273 (__arm_vddupq_n_u32): Likewise.
9274 (__arm_vddupq_n_u8): Likewise.
9276 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
9278 * doc/install.texi (D-Specific Options): Document
9279 --enable-libphobos-checking and --with-libphobos-druntime-only.
9281 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9284 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
9285 cxx17_empty_base_seen argument. Pass it to recursive calls.
9286 Ignore cxx17_empty_base_field_p fields after setting
9287 *cxx17_empty_base_seen to true.
9288 (rs6000_discover_homogeneous_aggregate): Adjust
9289 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
9290 aggregates with C++17 empty base fields.
9293 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
9294 if last_decl is error_mark_node or has such a TREE_TYPE.
9297 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
9298 if last_decl is error_mark_node or has such a TREE_TYPE.
9300 2020-04-22 Felix Yang <felix.yang@huawei.com>
9303 * config/aarch64/aarch64.h (TARGET_SVE):
9304 Add && !TARGET_GENERAL_REGS_ONLY.
9305 (TARGET_SVE2): Add && TARGET_SVE.
9306 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
9307 TARGET_SVE2_SM4): Add && TARGET_SVE2.
9308 * config/aarch64/aarch64-sve-builtins.h
9309 (sve_switcher::m_old_general_regs_only): New member.
9310 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
9312 (reported_missing_registers_p): New variable.
9313 (check_required_extensions): Call check_required_registers before
9314 return if all required extenstions are present.
9315 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
9316 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
9317 global_options.x_target_flags.
9318 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
9319 global_options.x_target_flags if m_old_general_regs_only is true.
9321 2020-04-22 Zackery Spytz <zspytz@gmail.com>
9323 * doc/extend.exi: Add "free" to list of other builtin functions
9326 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
9329 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
9331 (store_quadpti): Ditto.
9332 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
9333 plq will be used and doesn't need it.
9334 (atomic_store<mode>): Ditto, for pstq.
9336 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9338 * doc/invoke.texi: Update flags turned on by -O3.
9340 2020-04-22 Jakub Jelinek <jakub@redhat.com>
9343 * config/ia64/ia64.c (hfa_element_mode): Ignore
9344 cxx17_empty_base_field_p fields.
9347 * calls.h (cxx17_empty_base_field_p): Declare.
9348 * calls.c (cxx17_empty_base_field_p): Define.
9350 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
9352 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
9354 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9355 Andre Vieira <andre.simoesdiasvieira@arm.com>
9356 Mihail Ionescu <mihail.ionescu@arm.com>
9358 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
9359 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
9360 (ALL_QUIRKS): Add quirk_no_asmcpu.
9361 (cortex-m55): Define new cpu.
9362 * config/arm/arm-tables.opt: Regenerate.
9363 * config/arm/arm-tune.md: Likewise.
9364 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
9366 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
9368 PR tree-optimization/94700
9369 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
9370 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
9371 of similarly-structured but distinct vector types.
9373 2020-04-21 Martin Sebor <msebor@redhat.com>
9376 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
9377 the computation of the lower bound of the source access size.
9378 (builtin_access::generic_overlap): Remove a hack for setting ranges
9381 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
9383 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
9384 (ASM_WEAKEN_DECL): New define.
9385 (HAVE_GAS_WEAKREF): Undefine.
9387 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
9389 PR tree-optimization/94683
9390 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
9391 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
9392 but distinct vector types.
9394 2020-04-21 Jakub Jelinek <jakub@redhat.com>
9397 * stor-layout.c (place_field, finalize_record_size): Don't emit
9398 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
9399 * ubsan.c (ubsan_get_type_descriptor_type,
9400 ubsan_get_source_location_type, ubsan_create_data): Set
9402 * asan.c (asan_global_struct): Likewise.
9404 2020-04-21 Duan bo <duanbo3@huawei.com>
9407 * config/aarch64/aarch64.c: Add an error message for option conflict.
9408 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
9409 incompatible with -fpic, -fPIC and -mabi=ilp32.
9411 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
9414 * omp-low.c (new_omp_context): Remove assignments to
9415 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
9417 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
9419 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
9420 ("popcountv2di2_vx"): Use simplify_gen_subreg.
9422 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
9425 * config/s390/s390-builtin-types.def: Add 3 new function modes.
9426 * config/s390/s390-builtins.def: Add mode dependent low-level
9427 builtin and map the overloaded builtins to these.
9428 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
9429 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
9431 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
9433 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
9434 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
9435 estimated VF and is no worse at double the estimated VF.
9437 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
9440 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
9441 order of arguments to rtx_vector_builder.
9442 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
9443 When extending the trailing constants to a full vector, replace any
9444 variables with zeros.
9446 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
9449 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
9452 2020-04-20 Martin Liska <mliska@suse.cz>
9454 * symtab.c (symtab_node::dump_references): Add space after
9456 (symtab_node::dump_referring): Likewise.
9458 2020-04-18 Jeff Law <law@redhat.com>
9461 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
9464 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
9466 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
9467 attributes): Document d_runtime_has_std_library.
9469 2020-04-17 Jeff Law <law@redhat.com>
9471 PR rtl-optimization/90275
9472 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
9473 when the destination has a REG_UNUSED note.
9475 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
9478 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
9481 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
9483 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
9484 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
9485 cost of load and store insns if one loop iteration has enough scalar
9486 elements to use an Advanced SIMD LDP or STP.
9487 (aarch64_add_stmt_cost): Update call accordingly.
9489 2020-04-17 Jakub Jelinek <jakub@redhat.com>
9490 Jeff Law <law@redhat.com>
9493 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
9494 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
9495 or pos + len >= 32, or pos + len is equal to operands[2] precision
9496 and operands[2] is not a register operand. During splitting perform
9497 SImode AND if operands[0] doesn't have CCZmode and pos + len is
9498 equal to mode precision.
9500 2020-04-17 Richard Biener <rguenther@suse.de>
9503 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
9505 * dwarf2out.c (dw_val_equal_p): Fix pasto in
9506 dw_val_class_vms_delta comparison.
9507 * optabs.c (expand_binop_directly): Fix pasto in commutation
9509 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
9512 2020-04-17 Jakub Jelinek <jakub@redhat.com>
9514 PR rtl-optimization/94618
9515 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
9516 insn is the BB_END of its block, but also when it is only followed
9517 by DEBUG_INSNs in its block.
9519 PR tree-optimization/94621
9520 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
9521 Move id->adjust_array_error_bounds check first in the condition.
9523 2020-04-17 Martin Liska <mliska@suse.cz>
9524 Jonathan Yong <10walls@gmail.com>
9526 PR gcov-profile/94570
9527 * coverage.c (coverage_init): Use separator properly.
9529 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
9531 PR rtl-optimization/93974
9532 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
9533 (rs6000_cannot_substitute_mem_equiv_p): New function.
9535 2020-04-16 Martin Jambor <mjambor@suse.cz>
9538 * ipa-inline.h (ipa_saved_clone_sources): Declare.
9539 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
9540 (save_inline_function_body): Link the new body holder with the
9542 * cgraph.c: Include ipa-inline.h.
9543 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
9544 the statement in ipa_saved_clone_sources.
9545 * cgraphunit.c: Include ipa-inline.h.
9546 (expand_all_functions): Free ipa_saved_clone_sources.
9548 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
9551 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
9552 the VNx16BI lowpart of the recursively-generated constant.
9554 2020-04-16 Martin Liska <mliska@suse.cz>
9555 Jakub Jelinek <jakub@redhat.com>
9558 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
9559 DECL_IS_REPLACEABLE_OPERATOR during cloning.
9560 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
9561 (propagate_necessity): Check operator names.
9563 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
9565 PR rtl-optimization/94605
9566 * early-remat.c (early_remat::process_block): Handle insns that
9567 set multiple candidate registers.
9568 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
9570 PR gcov-profile/93401
9571 * common.opt (profile-prefix-path): New option.
9572 * coverae.c: Include diagnostics.h.
9573 (coverage_init): Strip profile prefix path.
9574 * doc/invoke.texi (-fprofile-prefix-path): Document.
9576 2020-04-16 Richard Biener <rguenther@suse.de>
9579 * expr.c (emit_move_multi_word): Do not generate code when
9580 the destination part is undefined_operand_subword_p.
9581 * lower-subreg.c (resolve_clobber): Look through a paradoxica
9584 2020-04-16 Martin Jambor <mjambor@suse.cz>
9586 PR tree-optimization/94598
9587 * tree-sra.c (verify_sra_access_forest): Fix verification of total
9588 scalarization accesses under access to one-element arrays.
9590 2020-04-16 Jakub Jelinek <jakub@redhat.com>
9593 * function.c (assign_parm_find_data_types): Add workaround for
9594 BROKEN_VALUE_INITIALIZATION compilers.
9596 2020-04-16 Richard Biener <rguenther@suse.de>
9598 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
9601 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
9604 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
9605 Require OPTION_MASK_ISA_SSE2.
9607 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
9610 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
9611 Don't construct a dump_context temporary to call static method.
9613 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
9615 * config/aarch64/falkor-tag-collision-avoidance.c
9616 (valid_src_p): Check for aarch64_address_info type before
9617 accessing base field.
9619 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
9621 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
9622 (V_sz_elem2): Remove unused mode attribute.
9624 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
9626 * config/arm/arm.md (arm_movdi): Disallow for MVE.
9628 2020-04-15 Richard Biener <rguenther@suse.de>
9631 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
9632 alias_sets_conflict_p for pointers.
9634 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
9637 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
9638 (extendhisi2_internal): Add %v1 before the load instructions.
9640 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
9643 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
9644 use PC-relative addressing for TLS references.
9646 2020-04-14 Martin Jambor <mjambor@suse.cz>
9649 * ipa-sra.c: Include internal-fn.h.
9650 (enum isra_scan_context): Update comment.
9651 (scan_function): Treat calls to internal_functions like loads or stores.
9653 2020-04-14 Yang Yang <yangyang305@huawei.com>
9655 PR tree-optimization/94574
9656 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
9657 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
9659 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
9662 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
9664 2020-04-13 Martin Sebor <msebor@redhat.com>
9666 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
9667 -Wformat-truncation. Move -Wzero-length-bounds last.
9668 (-Wrestrict): Document positive form of option enabled by -Wall.
9670 2020-04-13 Zachary Spytz <zspytz@gmail.com>
9672 * doc/extend.texi: Add realloc to list of built-in functions
9673 are recognized by the compiler.
9675 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
9678 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
9679 pointer in word_mode for eh_return epilogues.
9681 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9683 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
9684 memory references in %B, %C and %D operand selectors when the inner
9685 operand is a post increment address.
9687 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9689 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
9690 reference by 4 bytes, and %D memory reference by 6 bytes.
9692 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
9695 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
9696 condition for V4SI, V8HI and V16QI modes.
9698 2020-04-11 Jakub Jelinek <jakub@redhat.com>
9702 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
9705 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
9709 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
9710 "#pragma omp declare target" has also been applied.
9712 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9714 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
9715 when to emit the epilogue_helper insn.
9716 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
9719 2020-04-09 Jakub Jelinek <jakub@redhat.com>
9722 * cselib.h (cselib_record_sp_cfa_base_equiv,
9723 cselib_sp_derived_value_p): Declare.
9724 * cselib.c (cselib_record_sp_cfa_base_equiv,
9725 cselib_sp_derived_value_p): New functions.
9726 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
9727 cselib_sp_derived_value_p values.
9728 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
9729 start of extended basic blocks other than the first one
9730 for !frame_pointer_needed functions.
9732 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9734 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
9735 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
9736 (aarch64_sve2048_hw): Document.
9737 * config/aarch64/aarch64-protos.h
9738 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
9739 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
9740 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
9741 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
9743 (find_type_suffix_for_scalar_type): Use it instead of comparing
9745 (function_resolver::infer_vector_or_tuple_type): Likewise.
9746 (function_resolver::require_vector_type): Likewise.
9747 (handle_arm_sve_vector_bits_attribute): New function.
9748 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
9749 (aarch64_attribute_table): Add arm_sve_vector_bits.
9750 (aarch64_return_in_memory_1):
9751 (pure_scalable_type_info::piece::get_rtx): New function.
9752 (pure_scalable_type_info::num_zr): Likewise.
9753 (pure_scalable_type_info::num_pr): Likewise.
9754 (pure_scalable_type_info::get_rtx): Likewise.
9755 (pure_scalable_type_info::analyze): Likewise.
9756 (pure_scalable_type_info::analyze_registers): Likewise.
9757 (pure_scalable_type_info::analyze_array): Likewise.
9758 (pure_scalable_type_info::analyze_record): Likewise.
9759 (pure_scalable_type_info::add_piece): Likewise.
9760 (aarch64_some_values_include_pst_objects_p): Likewise.
9761 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
9762 to analyze whether the type is returned in SVE registers.
9763 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
9764 is passed in SVE registers.
9765 (aarch64_pass_by_reference_1): New function, extracted from...
9766 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
9767 to analyze whether the type is a pure scalable type and, if so,
9768 whether it should be passed by reference.
9769 (aarch64_return_in_msb): Return false for pure scalable types.
9770 (aarch64_function_value_1): Fold back into...
9771 (aarch64_function_value): ...this function. Use
9772 pure_scalable_type_info to analyze whether the type is a pure
9773 scalable type and, if so, which registers it should use. Handle
9774 types that include pure scalable types but are not themselves
9775 pure scalable types.
9776 (aarch64_return_in_memory_1): New function, split out from...
9777 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
9778 to analyze whether the type is a pure scalable type and, if so,
9779 whether it should be returned by reference.
9780 (aarch64_layout_arg): Remove orig_mode argument. Use
9781 pure_scalable_type_info to analyze whether the type is a pure
9782 scalable type and, if so, which registers it should use. Handle
9783 types that include pure scalable types but are not themselves
9784 pure scalable types.
9785 (aarch64_function_arg): Update call accordingly.
9786 (aarch64_function_arg_advance): Likewise.
9787 (aarch64_pad_reg_upward): On big-endian targets, return false for
9788 pure scalable types that are smaller than 16 bytes.
9789 (aarch64_member_type_forces_blk): New function.
9790 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
9791 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
9792 correspond to built-in SVE types. Do not rely on a vector mode
9793 if the type includes an pure scalable type. When returning true,
9794 assert that the mode is not an SVE mode.
9795 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
9796 built-in types here. When returning true, assert that the type
9797 does not have an SVE mode.
9798 (aarch64_can_change_mode_class): Don't allow anything to change
9799 between a predicate mode and a non-predicate mode. Also don't
9800 allow changes between SVE vector modes and other modes that
9801 might be bigger than 128 bits.
9802 (aarch64_invalid_binary_op): Reject binary operations that mix
9803 SVE and GNU vector types.
9804 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
9806 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9808 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
9809 "SVE sizeless type".
9810 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
9811 (sizeless_type_p): New functions.
9812 (register_builtin_types): Apply make_type_sizeless to the type.
9813 (register_tuple_type): Likewise.
9814 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
9816 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
9818 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
9821 2020-04-09 Martin Jambor <mjambor@suse.cz>
9822 Richard Biener <rguenther@suse.de>
9824 PR tree-optimization/94482
9825 * tree-sra.c (create_access_replacement): Dump new replacement with
9827 (sra_modify_expr): Fix handling of cases when the original EXPR writes
9828 to only part of the replacement.
9829 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
9830 the first operand of combinations into REAL/IMAGPART_EXPR and
9833 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9835 * doc/sourcebuild.texi (check-function-bodies): Treat the third
9836 parameter as a list of option regexps and require each regexp
9839 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
9842 * config/aarch64/falkor-tag-collision-avoidance.c
9843 (valid_src_p): Fix missing rtx type check.
9845 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
9846 Richard Biener <rguenther@suse.de>
9848 PR tree-optimization/93674
9849 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
9850 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
9851 or non-mode precision type, add candidate in unsigned type with the
9854 2020-04-08 Clement Chigot <clement.chigot@atos.net>
9856 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
9857 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
9858 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
9860 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9863 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
9865 * reload1.c (eliminate_regs_1): Avoid creating
9866 (plus (reg) (const_int 0)) in DEBUG_INSNs.
9868 PR tree-optimization/94524
9869 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
9870 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
9871 op1 rather than op1 itself at the end. Punt for signed modulo by
9872 most negative constant.
9873 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
9874 modulo by most negative constant.
9876 2020-04-08 Richard Biener <rguenther@suse.de>
9878 PR rtl-optimization/93946
9879 * cse.c (cse_insn): Record the tabled expression in
9880 src_related. Verify a redundant store removal is valid.
9882 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
9885 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
9886 ENDBR at function entry if function will be called indirectly.
9888 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9891 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
9894 2020-04-08 Martin Liska <mliska@suse.cz>
9897 * gimple.c (gimple_call_operator_delete_p): Rename to...
9898 (gimple_call_replaceable_operator_delete_p): ... this.
9899 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
9900 * gimple.h (gimple_call_operator_delete_p): Rename to ...
9901 (gimple_call_replaceable_operator_delete_p): ... this.
9902 * tree-core.h (tree_function_decl): Add replaceable_operator
9904 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
9905 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
9906 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
9907 (eliminate_unnecessary_stmts): Likewise.
9908 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
9909 Pack DECL_IS_REPLACEABLE_OPERATOR.
9910 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
9911 Unpack the field here.
9912 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
9913 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
9914 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
9915 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
9916 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
9917 replaceable operator flags.
9919 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
9920 Matthew Malcomson <matthew.malcomson@arm.com>
9922 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
9923 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
9924 (CX_TERNARY_QUALIFIERS): Likewise.
9925 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
9926 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
9927 (arm_init_acle_builtins): Initialize CDE builtins.
9928 (arm_expand_acle_builtin): Check CDE constant operands.
9929 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
9930 of CDE constant operand.
9931 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
9933 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
9934 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
9935 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
9936 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
9937 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
9938 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
9939 * config/arm/arm_cde_builtins.def: New file.
9940 * config/arm/iterators.md (V_reg): New attribute of SI.
9941 * config/arm/predicates.md (const_int_coproc_operand): New.
9942 (const_int_vcde1_operand, const_int_vcde2_operand): New.
9943 (const_int_vcde3_operand): New.
9944 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
9945 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
9946 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
9947 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
9949 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
9951 * config.gcc: Add arm_cde.h.
9952 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
9953 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
9954 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
9955 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
9956 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
9957 * config/arm/arm.h (TARGET_CDE): New macro.
9958 * config/arm/arm_cde.h: New file.
9959 * doc/invoke.texi: Document CDE options +cdecp[0-7].
9960 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
9962 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
9964 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9966 PR rtl-optimization/94516
9967 * postreload.c: Include rtl-iter.h.
9968 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
9969 looking for all MEMs with RTX_AUTOINC operand.
9970 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
9972 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
9974 * omp-grid.c (grid_eliminate_combined_simd_part): Use
9975 OMP_CLAUSE_CODE to access the omp clause code.
9977 2020-04-07 Jeff Law <law@redhat.com>
9979 PR rtl-optimization/92264
9980 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
9981 the destination is the stack pointer.
9983 2020-04-07 Jakub Jelinek <jakub@redhat.com>
9985 PR rtl-optimization/94291
9986 PR rtl-optimization/84169
9987 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
9988 must be a REG or SUBREG of REG; if it is not one of these, don't
9991 2020-04-07 Richard Biener <rguenther@suse.de>
9994 * gimplify.c (gimplify_addr_expr): Also consider generated
9997 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9999 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
10001 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10003 * config/arm/arm_mve.h: Cast some pointers to expected types.
10005 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10007 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
10008 same with '__arm_' prefix.
10010 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10012 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
10014 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10016 * config/arm/arm.c (arm_mve_immediate_check): Removed.
10017 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
10018 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
10019 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
10020 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
10021 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
10022 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
10024 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10026 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
10028 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10030 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
10031 * config/arm/mve/md: Fix v[id]wdup patterns.
10033 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10035 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
10036 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
10038 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10040 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
10041 and remove const_ptr enums.
10043 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10045 * config/arm/arm_mve.h (vsubq_n): Merge with...
10047 (vmulq_n): Merge with...
10049 (__ARM_mve_typeid): Simplify scalar and constant detection.
10051 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10054 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
10055 for inter-lane permutation for 64-byte modes.
10058 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
10059 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
10060 Assume it is a REG after that instead of testing it and doing FAIL
10061 otherwise. Formatting fix.
10063 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
10065 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
10067 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10070 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
10071 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
10073 2020-04-06 Jakub Jelinek <jakub@redhat.com>
10075 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
10076 + const0_rtx return the SP_DERIVED_VALUE_P.
10078 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
10080 PR rtl-optimization/92989
10081 * lra-lives.c (process_bb_lives): Do not treat eh_return data
10082 registers as being live at the beginning of the EH receiver.
10084 2020-04-05 Zachary Spytz <zspytz@gmail.com>
10086 * extend.texi: Add free to list of ISO C90 functions that
10087 are recognized by the compiler.
10089 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
10091 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
10092 for fast_interrupt.
10094 * config/microblaze/microblaze.md (trap): Update output pattern.
10096 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
10097 Jakub Jelinek <jakub@redhat.com>
10100 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
10101 arrays, pointer-to-members, function types and qualifiers when
10102 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
10103 to emit type again on definition.
10105 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
10108 * ipa-fnsummary.c (vrp_will_run_p): New function.
10109 (fre_will_run_p): New function.
10110 (evaluate_properties_for_edge): Use it.
10111 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
10112 !optimize_debug to optimize_debug.
10114 2020-04-04 Jakub Jelinek <jakub@redhat.com>
10116 PR rtl-optimization/94468
10117 * cselib.c (references_value_p): Formatting fix.
10118 (cselib_useless_value_p): New function.
10119 (discard_useless_locs, discard_useless_values,
10120 cselib_invalidate_regno_val, cselib_invalidate_mem,
10121 cselib_record_set): Use it instead of
10122 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
10125 * tree-iterator.h (expr_single): Declare.
10126 * tree-iterator.c (expr_single): New function.
10127 * tree.h (protected_set_expr_location_if_unset): Declare.
10128 * tree.c (protected_set_expr_location): Use expr_single.
10129 (protected_set_expr_location_if_unset): New function.
10131 2020-04-03 Jeff Law <law@redhat.com>
10133 PR rtl-optimization/92264
10134 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
10135 reloading of auto-increment addressing modes.
10137 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
10140 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
10143 2020-04-03 Jeff Law <law@redhat.com>
10145 PR rtl-optimization/92264
10146 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
10147 post-increment addressing of source operands as well as residuals
10148 when computing any adjustments to the input pointer.
10150 2020-04-03 Jakub Jelinek <jakub@redhat.com>
10153 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
10154 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
10155 second half of first lane from first lane of second operand and
10156 first half of second lane from second lane of first operand.
10158 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
10160 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
10162 2020-04-03 Tamar Christina <tamar.christina@arm.com>
10165 * common/config/aarch64/aarch64-common.c
10166 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
10168 2020-04-03 Richard Biener <rguenther@suse.de>
10170 PR middle-end/94465
10171 * tree.c (array_ref_low_bound): Deal with released SSA names
10174 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
10176 * config/gcn/gcn.c (print_operand): Handle unordered comparison
10178 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
10179 comparison operators.
10181 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
10183 PR tree-optimization/94443
10184 * tree-vect-loop.c (vectorizable_live_operation): Use
10185 gsi_insert_seq_before to replace gsi_insert_before.
10187 2020-04-03 Martin Liska <mliska@suse.cz>
10190 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
10191 Compare type attributes for gimple_call_fntypes.
10193 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
10195 * alias.c (get_alias_set): Fix comment typos.
10197 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
10200 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
10201 attribute checking used by TYPE.
10203 2020-04-02 Martin Jambor <mjambor@suse.cz>
10206 * ipa-sra.c (struct caller_issues): New fields candidate and
10207 call_from_outside_comdat.
10208 (check_for_caller_issues): Check for calls from outsied of
10209 candidate's same_comdat_group.
10210 (check_all_callers_for_issues): Set up issues.candidate, check result
10212 (mark_callers_calls_comdat_local): New function.
10213 (process_isra_node_results): Set calls_comdat_local of callers if
10216 2020-04-02 Richard Biener <rguenther@suse.de>
10219 * common.opt (ffinite-loops): Initialize to zero.
10220 * opts.c (default_options_table): Remove OPT_ffinite_loops
10222 * cfgloop.h (loop::finite_p): New member.
10223 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
10224 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
10226 * lto-streamer-in.c (input_cfg): Stream finite_p.
10227 * lto-streamer-out.c (output_cfg): Likewise.
10228 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
10229 from flag_finite_loops at CFG build time.
10230 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
10231 finite_p flag instead of flag_finite_loops.
10232 * doc/invoke.texi (ffinite-loops): Adjust documentation of
10235 2020-04-02 Richard Biener <rguenther@suse.de>
10238 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
10239 DW_TAG_imported_unit.
10241 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
10243 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
10244 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
10247 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
10249 PR tree-optimization/94401
10250 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
10251 access type when loading halves of vector to avoid peeling for gaps.
10253 2020-04-02 Jakub Jelinek <jakub@redhat.com>
10255 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
10256 between a string literal and MIPS_SYSVERSION_SPEC macro.
10258 2020-04-02 Martin Jambor <mjambor@suse.cz>
10260 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
10262 2020-04-02 Jakub Jelinek <jakub@redhat.com>
10264 PR rtl-optimization/92264
10265 * params.opt (-param=max-find-base-term-values=): Decrease default
10268 PR rtl-optimization/92264
10269 * rtl.h (struct rtx_def): Mention that call bit is used as
10270 SP_DERIVED_VALUE_P in cselib.c.
10271 * cselib.c (SP_DERIVED_VALUE_P): Define.
10272 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
10273 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
10274 val_rtx and sp based expression where offsets cancel each other.
10275 (preserve_constants_and_equivs): Formatting fix.
10276 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
10277 locs list for cfa_base_preserved_val if needed. Formatting fix.
10278 (autoinc_split): If the to be returned value is a REG, MEM or
10279 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
10280 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
10281 (rtx_equal_for_cselib_1): Call autoinc_split even if both
10282 expressions are PLUS in Pmode with CONST_INT second operands.
10283 Handle SP_DERIVED_VALUE_P cases.
10284 (cselib_hash_plus_const_int): New function.
10285 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
10286 second operand, as well as for PRE_DEC etc. that ought to be
10287 hashed the same way.
10288 (cselib_subst_to_values): Substitute PLUS with Pmode and
10289 CONST_INT operand if the first operand is a VALUE which has
10290 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
10291 SP_DERIVED_VALUE_P + adjusted offset.
10292 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
10293 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
10294 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
10295 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
10296 on the sp value before calling cselib_add_permanent_equiv on the
10298 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
10299 in the insn without REG_INC note.
10300 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
10301 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
10304 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
10305 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
10307 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10310 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
10311 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
10312 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
10313 intrinsic defintion by adding a new builtin call to writeback into base
10315 (__arm_vldrdq_gather_base_wb_u64): Likewise.
10316 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
10317 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
10318 (__arm_vldrwq_gather_base_wb_s32): Likewise.
10319 (__arm_vldrwq_gather_base_wb_u32): Likewise.
10320 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
10321 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
10322 (__arm_vldrwq_gather_base_wb_f32): Likewise.
10323 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
10324 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
10325 builtin's qualifier.
10326 (vldrdq_gather_base_wb_z_u): Likewise.
10327 (vldrwq_gather_base_wb_u): Likewise.
10328 (vldrdq_gather_base_wb_u): Likewise.
10329 (vldrwq_gather_base_wb_z_s): Likewise.
10330 (vldrwq_gather_base_wb_z_f): Likewise.
10331 (vldrdq_gather_base_wb_z_s): Likewise.
10332 (vldrwq_gather_base_wb_s): Likewise.
10333 (vldrwq_gather_base_wb_f): Likewise.
10334 (vldrdq_gather_base_wb_s): Likewise.
10335 (vldrwq_gather_base_nowb_z_u): Define builtin.
10336 (vldrdq_gather_base_nowb_z_u): Likewise.
10337 (vldrwq_gather_base_nowb_u): Likewise.
10338 (vldrdq_gather_base_nowb_u): Likewise.
10339 (vldrwq_gather_base_nowb_z_s): Likewise.
10340 (vldrwq_gather_base_nowb_z_f): Likewise.
10341 (vldrdq_gather_base_nowb_z_s): Likewise.
10342 (vldrwq_gather_base_nowb_s): Likewise.
10343 (vldrwq_gather_base_nowb_f): Likewise.
10344 (vldrdq_gather_base_nowb_s): Likewise.
10345 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
10347 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
10348 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
10349 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
10350 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
10351 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
10352 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
10353 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
10354 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
10355 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
10356 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
10357 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
10359 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
10361 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
10362 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
10363 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
10364 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
10365 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
10366 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
10367 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
10368 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
10369 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
10371 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
10372 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
10373 Remove constraints from expander.
10374 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
10375 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
10376 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
10377 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
10378 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
10379 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
10381 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
10383 PR rtl-optimization/94123
10384 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
10385 flag_split_wide_types_early.
10387 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
10389 * doc/extend.texi (Common Function Attributes): Fix typo.
10391 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
10394 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
10397 2020-04-01 Zackery Spytz <zspytz@gmail.com>
10399 * doc/extend.texi: Fix a typo in the documentation of the
10400 copy function attribute.
10402 2020-04-01 Jakub Jelinek <jakub@redhat.com>
10404 PR middle-end/94423
10405 * tree-object-size.c (pass_object_sizes::execute): Don't call
10406 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
10407 call replace_call_with_value.
10409 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
10411 PR tree-optimization/94043
10412 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
10413 phi for vec_lhs and use it for lane extraction.
10415 2020-03-31 Felix Yang <felix.yang@huawei.com>
10417 PR tree-optimization/94398
10418 * tree-vect-stmts.c (vectorizable_store): Instead of calling
10419 vect_supportable_dr_alignment, set alignment_support_scheme to
10420 dr_unaligned_supported for gather-scatter accesses.
10421 (vectorizable_load): Likewise.
10423 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
10425 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
10426 New mode iterators.
10427 (vnsi, VnSI, vndi, VnDI): New mode attributes.
10428 (mov<mode>): Use <VnDI> in place of V64DI.
10429 (mov<mode>_exec): Likewise.
10430 (mov<mode>_sgprbase): Likewise.
10431 (reload_out<mode>): Likewise.
10432 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
10433 (gather_load<mode>v64si): Rename to ...
10434 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
10435 and <VnDI> in place of V64DI.
10436 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
10437 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
10438 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
10439 (scatter_store<mode>v64si): Rename to ...
10440 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10441 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
10442 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
10443 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
10444 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
10445 (ds_bpermute<mode>): Use <VnSI>.
10446 (addv64si3_vcc<exec_vcc>): Rename to ...
10447 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
10448 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
10449 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
10450 (addcv64si3<exec_vcc>): Rename to ...
10451 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
10452 (subv64si3_vcc<exec_vcc>): Rename to ...
10453 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
10454 (subcv64si3<exec_vcc>): Rename to ...
10455 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
10456 (addv64di3): Rename to ...
10457 (add<mode>3): ... this, and use V_DI.
10458 (addv64di3_exec): Rename to ...
10459 (add<mode>3_exec): ... this, and use V_DI.
10460 (subv64di3): Rename to ...
10461 (sub<mode>3): ... this, and use V_DI.
10462 (subv64di3_exec): Rename to ...
10463 (sub<mode>3_exec): ... this, and use V_DI.
10464 (addv64di3_zext): Rename to ...
10465 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
10466 (addv64di3_zext_exec): Rename to ...
10467 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
10468 (addv64di3_zext_dup): Rename to ...
10469 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
10470 (addv64di3_zext_dup_exec): Rename to ...
10471 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
10472 (addv64di3_zext_dup2): Rename to ...
10473 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
10474 (addv64di3_zext_dup2_exec): Rename to ...
10475 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
10476 (addv64di3_sext_dup2): Rename to ...
10477 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
10478 (addv64di3_sext_dup2_exec): Rename to ...
10479 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
10480 (<su>mulv64si3_highpart<exec>): Rename to ...
10481 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
10482 (mulv64di3): Rename to ...
10483 (mul<mode>3): ... this, and use V_DI and <VnSI>.
10484 (mulv64di3_exec): Rename to ...
10485 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
10486 (mulv64di3_zext): Rename to ...
10487 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
10488 (mulv64di3_zext_exec): Rename to ...
10489 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
10490 (mulv64di3_zext_dup2): Rename to ...
10491 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
10492 (mulv64di3_zext_dup2_exec): Rename to ...
10493 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
10494 (<expander>v64di3): Rename to ...
10495 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
10496 (<expander>v64di3_exec): Rename to ...
10497 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
10498 (<expander>v64si3<exec>): Rename to ...
10499 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
10500 (v<expander>v64si3<exec>): Rename to ...
10501 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
10502 (<expander>v64si3<exec>): Rename to ...
10503 (<expander><vnsi>3<exec>): ... this, and use V_SI.
10504 (subv64df3<exec>): Rename to ...
10505 (sub<mode>3<exec>): ... this, and use V_DF.
10506 (truncv64di<mode>2): Rename to ...
10507 (trunc<vndi><mode>2): ... this, and use <VnDI>.
10508 (truncv64di<mode>2_exec): Rename to ...
10509 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
10510 (<convop><mode>v64di2): Rename to ...
10511 (<convop><mode><vndi>2): ... this, and use <VnDI>.
10512 (<convop><mode>v64di2_exec): Rename to ...
10513 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
10514 (vec_cmp<u>v64qidi): Rename to ...
10515 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
10516 (vec_cmp<u>v64qidi_exec): Rename to ...
10517 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
10518 (vcond_mask_<mode>di): Use <VnDI>.
10519 (maskload<mode>di): Likewise.
10520 (maskstore<mode>di): Likewise.
10521 (mask_gather_load<mode>v64si): Rename to ...
10522 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10523 (mask_scatter_store<mode>v64si): Rename to ...
10524 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10525 (*<reduc_op>_dpp_shr_v64di): Rename to ...
10526 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
10527 (*plus_carry_in_dpp_shr_v64si): Rename to ...
10528 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
10529 (*plus_carry_dpp_shr_v64di): Rename to ...
10530 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
10531 (vec_seriesv64si): Rename to ...
10532 (vec_series<mode>): ... this, and use V_SI.
10533 (vec_seriesv64di): Rename to ...
10534 (vec_series<mode>): ... this, and use V_DI.
10536 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
10538 * config/arc/arc.c (arc_print_operand): Use
10539 HOST_WIDE_INT_PRINT_DEC macro.
10541 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
10543 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
10545 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10547 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
10549 (__arm_vbicq): Likewise.
10551 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
10553 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
10555 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10557 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
10558 common section of both MVE Integer and MVE Floating Point.
10559 (vaddvq): Likewise.
10560 (vaddlvq_p): Likewise.
10561 (vaddvaq): Likewise.
10562 (vaddvq_p): Likewise.
10563 (vcmpcsq): Likewise.
10564 (vmlsdavxq): Likewise.
10565 (vmlsdavq): Likewise.
10566 (vmladavxq): Likewise.
10567 (vmladavq): Likewise.
10568 (vminvq): Likewise.
10569 (vminavq): Likewise.
10570 (vmaxvq): Likewise.
10571 (vmaxavq): Likewise.
10572 (vmlaldavq): Likewise.
10573 (vcmphiq): Likewise.
10574 (vaddlvaq): Likewise.
10575 (vrmlaldavhq): Likewise.
10576 (vrmlaldavhxq): Likewise.
10577 (vrmlsldavhq): Likewise.
10578 (vrmlsldavhxq): Likewise.
10579 (vmlsldavxq): Likewise.
10580 (vmlsldavq): Likewise.
10581 (vabavq): Likewise.
10582 (vrmlaldavhaq): Likewise.
10583 (vcmpgeq_m_n): Likewise.
10584 (vmlsdavxq_p): Likewise.
10585 (vmlsdavq_p): Likewise.
10586 (vmlsdavaxq): Likewise.
10587 (vmlsdavaq): Likewise.
10588 (vaddvaq_p): Likewise.
10589 (vcmpcsq_m_n): Likewise.
10590 (vcmpcsq_m): Likewise.
10591 (vmladavxq_p): Likewise.
10592 (vmladavq_p): Likewise.
10593 (vmladavaxq): Likewise.
10594 (vmladavaq): Likewise.
10595 (vminvq_p): Likewise.
10596 (vminavq_p): Likewise.
10597 (vmaxvq_p): Likewise.
10598 (vmaxavq_p): Likewise.
10599 (vcmphiq_m): Likewise.
10600 (vaddlvaq_p): Likewise.
10601 (vmlaldavaq): Likewise.
10602 (vmlaldavaxq): Likewise.
10603 (vmlaldavq_p): Likewise.
10604 (vmlaldavxq_p): Likewise.
10605 (vmlsldavaq): Likewise.
10606 (vmlsldavaxq): Likewise.
10607 (vmlsldavq_p): Likewise.
10608 (vmlsldavxq_p): Likewise.
10609 (vrmlaldavhaxq): Likewise.
10610 (vrmlaldavhq_p): Likewise.
10611 (vrmlaldavhxq_p): Likewise.
10612 (vrmlsldavhaq): Likewise.
10613 (vrmlsldavhaxq): Likewise.
10614 (vrmlsldavhq_p): Likewise.
10615 (vrmlsldavhxq_p): Likewise.
10616 (vabavq_p): Likewise.
10617 (vmladavaq_p): Likewise.
10618 (vstrbq_scatter_offset): Likewise.
10619 (vstrbq_p): Likewise.
10620 (vstrbq_scatter_offset_p): Likewise.
10621 (vstrdq_scatter_base_p): Likewise.
10622 (vstrdq_scatter_base): Likewise.
10623 (vstrdq_scatter_offset_p): Likewise.
10624 (vstrdq_scatter_offset): Likewise.
10625 (vstrdq_scatter_shifted_offset_p): Likewise.
10626 (vstrdq_scatter_shifted_offset): Likewise.
10627 (vmaxq_x): Likewise.
10628 (vminq_x): Likewise.
10629 (vmovlbq_x): Likewise.
10630 (vmovltq_x): Likewise.
10631 (vmulhq_x): Likewise.
10632 (vmullbq_int_x): Likewise.
10633 (vmullbq_poly_x): Likewise.
10634 (vmulltq_int_x): Likewise.
10635 (vmulltq_poly_x): Likewise.
10636 (vstrbq): Likewise.
10638 2020-03-31 Jakub Jelinek <jakub@redhat.com>
10641 * config/aarch64/constraints.md (Uph): New constraint.
10642 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
10643 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
10646 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
10647 Jakub Jelinek <jakub@redhat.com>
10649 PR middle-end/94412
10650 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
10651 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
10653 2020-03-31 Jakub Jelinek <jakub@redhat.com>
10655 PR tree-optimization/94403
10656 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
10657 ENUMERAL_TYPE lhs_type.
10659 PR rtl-optimization/94344
10660 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
10661 conversions, either on both operands of |^+ or just one. Handle
10662 also extra same precision conversion on RSHIFT_EXPR first operand
10663 provided RSHIFT_EXPR is performed in unsigned type.
10665 2020-03-30 David Malcolm <dmalcolm@redhat.com>
10667 * lra.c (finish_insn_code_data_once): Set the array elements
10668 to NULL after freeing them.
10670 2020-03-30 Andreas Schwab <schwab@suse.de>
10672 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
10675 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
10677 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
10678 to skip defining builtins based on builtin_mask.
10680 2020-03-30 Jakub Jelinek <jakub@redhat.com>
10683 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
10684 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
10685 operand is a register. Don't enable masked variants for V*[QH]Imode.
10688 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
10689 <store_mask_constraint> instead of m in output operand constraint.
10690 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
10693 2020-03-30 Alan Modra <amodra@gmail.com>
10695 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
10696 (rs6000_indirect_call_template_1): Adjust to suit.
10697 * config/rs6000/rs6000.md (call_local): Merge call_local32,
10698 call_local64, and call_local_aix.
10699 (call_value_local): Simlarly.
10700 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
10701 and disable pattern when CALL_LONG.
10702 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
10703 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
10704 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
10706 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
10709 * doc/invoke.texi: Update -falign-functions, -falign-loops and
10710 -falign-jumps documentation.
10712 2020-03-29 Martin Liska <mliska@suse.cz>
10715 * cgraphunit.c (process_function_and_variable_attributes): Remove
10716 double 'attribute' words.
10718 2020-03-29 John David Anglin <dave.anglin@bell.net>
10720 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
10723 2020-03-28 Jakub Jelinek <jakub@redhat.com>
10726 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
10727 to true after setting size to integer_one_node.
10729 PR tree-optimization/94329
10730 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
10731 on the last stmt in a bb, make sure gsi_prev isn't done immediately
10734 2020-03-27 Alan Modra <amodra@gmail.com>
10737 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
10738 for PLT16_LO and PLT_PCREL.
10739 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
10740 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
10741 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
10743 2020-03-27 Martin Sebor <msebor@redhat.com>
10746 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
10748 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
10750 * config/gcn/gcn-valu.md:
10751 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
10752 (VEC_1REG_MODE): Delete.
10753 (VEC_1REG_ALT): Delete.
10754 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
10755 (VEC_1REG_INT_MODE): Delete.
10756 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
10757 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
10758 (VEC_2REG_MODE): Rename to V_2REG throughout.
10759 (VEC_REG_MODE): Rename to V_noHI throughout.
10760 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
10761 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
10762 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
10763 (VEC_INT_MODE): Delete.
10764 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
10765 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
10766 (FP_MODE): Delete and replace with FP throughout.
10767 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
10768 (VCMP_MODE): Rename to V_noQI throughout and move to top.
10769 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
10770 * config/gcn/gcn.md (FP): New mode iterator.
10771 (FP_1REG): New mode iterator.
10773 2020-03-27 David Malcolm <dmalcolm@redhat.com>
10775 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
10776 now emits two .dot files.
10777 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
10778 (graphviz_out::end_tr): Only close a TR, not a TD.
10779 (graphviz_out::begin_td): New.
10780 (graphviz_out::end_td): New.
10781 (graphviz_out::begin_trtd): New, replacing the old implementation
10782 of graphviz_out::begin_tr.
10783 (graphviz_out::end_tdtr): New, replacing the old implementation
10784 of graphviz_out::end_tr.
10785 * graphviz.h (graphviz_out::begin_td): New decl.
10786 (graphviz_out::end_td): New decl.
10787 (graphviz_out::begin_trtd): New decl.
10788 (graphviz_out::end_tdtr): New decl.
10790 2020-03-27 Richard Biener <rguenther@suse.de>
10793 * dwarf2out.c (should_emit_struct_debug): Return false for
10796 2020-03-27 Richard Biener <rguenther@suse.de>
10798 PR tree-optimization/94352
10799 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
10801 (ssa_propagation_engine::ssa_propagate): ... here after
10802 initializing curr_order.
10804 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
10806 PR tree-optimization/90332
10807 * tree-vect-stmts.c (vector_vector_composition_type): New function.
10808 (get_group_load_store_type): Adjust to call
10809 vector_vector_composition_type, extend it to construct with scalar
10811 (vectorizable_load): Likewise.
10813 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
10815 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
10816 (create_ddg_dep_no_link): Likewise.
10817 (add_cross_iteration_register_deps): Move debug instruction check.
10818 Other minor refactoring.
10819 (add_intra_loop_mem_dep): Do not check for debug instructions.
10820 (add_inter_loop_mem_dep): Likewise.
10821 (build_intra_loop_deps): Likewise.
10822 (create_ddg): Do not include debug insns into the graph.
10823 * ddg.h (struct ddg): Remove num_debug field.
10824 * modulo-sched.c (doloop_register_get): Adjust condition.
10825 (res_MII): Remove DDG num_debug field usage.
10826 (sms_schedule_by_order): Use assertion against debug insns.
10827 (ps_has_conflicts): Drop debug insn check.
10829 2020-03-26 Jakub Jelinek <jakub@redhat.com>
10832 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
10833 that contains exactly one non-DEBUG_BEGIN_STMT statement.
10836 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
10837 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
10838 a single non-debug stmt followed by one or more debug stmts.
10839 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
10840 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
10841 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
10842 gimple_seq_last to check if outer_stmt gbind could be reused and
10843 if yes and it is surrounded by any debug stmts, move them into the
10846 PR rtl-optimization/92264
10847 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
10848 for sp based values in !frame_pointer_needed
10849 && !ACCUMULATE_OUTGOING_ARGS functions.
10851 2020-03-26 Felix Yang <felix.yang@huawei.com>
10853 PR tree-optimization/94269
10854 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
10856 operation to single basic block.
10858 2020-03-25 Jeff Law <law@redhat.com>
10860 PR rtl-optimization/90275
10861 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
10864 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10867 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
10868 mode rather than VOIDmode.
10870 2020-03-25 Martin Sebor <msebor@redhat.com>
10872 PR middle-end/94004
10873 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
10874 even for alloca calls resulting from system macro expansion.
10875 Include inlining context in all warnings.
10877 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
10880 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
10881 FPRs to change between SDmode and DDmode.
10883 2020-03-25 Martin Sebor <msebor@redhat.com>
10885 PR tree-optimization/94131
10886 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
10888 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
10889 types have constant sizes.
10891 2020-03-25 Martin Liska <mliska@suse.cz>
10894 * configure.ac: Report error only when --with-zstd
10896 * configure: Regenerate.
10898 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10901 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
10902 INSN_CODE (insn) to -1 when changing the pattern.
10904 2020-03-25 Martin Liska <mliska@suse.cz>
10908 * config/i386/i386-features.c (make_resolver_func): Drop
10909 public flag for resolver.
10910 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
10911 group for resolver and drop public flag if possible.
10912 * multiple_target.c (create_dispatcher_calls): Drop unique_name
10913 and resolution as we want to enable LTO privatization of the default
10916 2020-03-25 Martin Liska <mliska@suse.cz>
10919 * configure.ac: Respect --without-zstd and report
10920 error when we can't find header file with --with-zstd.
10921 * configure: Regenerate.
10923 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10925 PR middle-end/94303
10926 * varasm.c (output_constructor_array_range): If local->index
10927 RANGE_EXPR doesn't start at the current location in the constructor,
10928 skip needed number of bytes using assemble_zeros or assert we don't
10932 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
10933 counter instead of DECL_UID.
10935 PR tree-optimization/94300
10936 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
10937 is positive, make sure that off + size isn't larger than needed_len.
10939 2020-03-25 Richard Biener <rguenther@suse.de>
10940 Jakub Jelinek <jakub@redhat.com>
10943 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
10945 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
10947 * doc/sourcebuild.texi (ARM-specific attributes): Add
10949 (Features for dg-add-options): Add arm_fp_dp.
10951 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
10954 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
10956 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
10959 * omp-offload.c (omp_finish_file): Fix target-link handling if
10960 targetm_common.have_named_sections is false.
10962 2020-03-24 Jakub Jelinek <jakub@redhat.com>
10965 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
10966 instead of GEN_INT.
10969 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
10970 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
10971 If not after and at *incr_pos is a debug stmt, set stmt location to
10972 location of next non-debug stmt after it if any.
10975 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
10976 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
10977 worklist or set GF_PLF_2 just because it is used in a debug stmt in
10978 another bb. Formatting improvements.
10981 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
10982 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
10983 regardless of whether TREE_NO_WARNING is set on it or whether
10984 warn_unused_function is true or not.
10986 2020-03-23 Jeff Law <law@redhat.com>
10988 PR rtl-optimization/90275
10991 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
10992 (simplify_logical_relational_operation): Use it.
10994 2020-03-23 Jakub Jelinek <jakub@redhat.com>
10997 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
10998 ultimate rhs and if returned something different, reconstructing
10999 the COMPOUND_EXPRs.
11001 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
11003 * opts.c (print_filtered_help): Improve the help text for alias options.
11005 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11006 Andre Vieira <andre.simoesdiasvieira@arm.com>
11007 Mihail Ionescu <mihail.ionescu@arm.com>
11009 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
11010 (vshlcq_m_u8): Likewise.
11011 (vshlcq_m_s16): Likewise.
11012 (vshlcq_m_u16): Likewise.
11013 (vshlcq_m_s32): Likewise.
11014 (vshlcq_m_u32): Likewise.
11015 (__arm_vshlcq_m_s8): Define intrinsic.
11016 (__arm_vshlcq_m_u8): Likewise.
11017 (__arm_vshlcq_m_s16): Likewise.
11018 (__arm_vshlcq_m_u16): Likewise.
11019 (__arm_vshlcq_m_s32): Likewise.
11020 (__arm_vshlcq_m_u32): Likewise.
11021 (vshlcq_m): Define polymorphic variant.
11022 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
11023 Use builtin qualifier.
11024 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11025 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
11026 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
11027 (mve_vshlcq_m_<supf><mode>): Likewise.
11029 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11031 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
11032 (UQSHL_QUALIFIERS): Likewise.
11033 (ASRL_QUALIFIERS): Likewise.
11034 (SQSHL_QUALIFIERS): Likewise.
11035 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
11037 (sqrshr): Define macro.
11038 (sqrshrl): Likewise.
11039 (sqrshrl_sat48): Likewise.
11041 (sqshll): Likewise.
11043 (srshrl): Likewise.
11044 (uqrshl): Likewise.
11045 (uqrshll): Likewise.
11046 (uqrshll_sat48): Likewise.
11048 (uqshll): Likewise.
11050 (urshrl): Likewise.
11053 (__arm_lsll): Define intrinsic.
11054 (__arm_asrl): Likewise.
11055 (__arm_uqrshll): Likewise.
11056 (__arm_uqrshll_sat48): Likewise.
11057 (__arm_sqrshrl): Likewise.
11058 (__arm_sqrshrl_sat48): Likewise.
11059 (__arm_uqshll): Likewise.
11060 (__arm_urshrl): Likewise.
11061 (__arm_srshrl): Likewise.
11062 (__arm_sqshll): Likewise.
11063 (__arm_uqrshl): Likewise.
11064 (__arm_sqrshr): Likewise.
11065 (__arm_uqshl): Likewise.
11066 (__arm_urshr): Likewise.
11067 (__arm_sqshl): Likewise.
11068 (__arm_srshr): Likewise.
11069 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
11071 (UQSHL_QUALIFIERS): Likewise.
11072 (ASRL_QUALIFIERS): Likewise.
11073 (SQSHL_QUALIFIERS): Likewise.
11074 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
11075 (mve_sqrshrl_sat<supf>_di): Likewise.
11076 (mve_uqrshl_si): Likewise.
11077 (mve_sqrshr_si): Likewise.
11078 (mve_uqshll_di): Likewise.
11079 (mve_urshrl_di): Likewise.
11080 (mve_uqshl_si): Likewise.
11081 (mve_urshr_si): Likewise.
11082 (mve_sqshl_si): Likewise.
11083 (mve_srshr_si): Likewise.
11084 (mve_srshrl_di): Likewise.
11085 (mve_sqshll_di): Likewise.
11087 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11088 Andre Vieira <andre.simoesdiasvieira@arm.com>
11089 Mihail Ionescu <mihail.ionescu@arm.com>
11091 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
11092 (vsetq_lane_f32): Likewise.
11093 (vsetq_lane_s16): Likewise.
11094 (vsetq_lane_s32): Likewise.
11095 (vsetq_lane_s8): Likewise.
11096 (vsetq_lane_s64): Likewise.
11097 (vsetq_lane_u8): Likewise.
11098 (vsetq_lane_u16): Likewise.
11099 (vsetq_lane_u32): Likewise.
11100 (vsetq_lane_u64): Likewise.
11101 (vgetq_lane_f16): Likewise.
11102 (vgetq_lane_f32): Likewise.
11103 (vgetq_lane_s16): Likewise.
11104 (vgetq_lane_s32): Likewise.
11105 (vgetq_lane_s8): Likewise.
11106 (vgetq_lane_s64): Likewise.
11107 (vgetq_lane_u8): Likewise.
11108 (vgetq_lane_u16): Likewise.
11109 (vgetq_lane_u32): Likewise.
11110 (vgetq_lane_u64): Likewise.
11111 (__ARM_NUM_LANES): Likewise.
11112 (__ARM_LANEQ): Likewise.
11113 (__ARM_CHECK_LANEQ): Likewise.
11114 (__arm_vsetq_lane_s16): Define intrinsic.
11115 (__arm_vsetq_lane_s32): Likewise.
11116 (__arm_vsetq_lane_s8): Likewise.
11117 (__arm_vsetq_lane_s64): Likewise.
11118 (__arm_vsetq_lane_u8): Likewise.
11119 (__arm_vsetq_lane_u16): Likewise.
11120 (__arm_vsetq_lane_u32): Likewise.
11121 (__arm_vsetq_lane_u64): Likewise.
11122 (__arm_vgetq_lane_s16): Likewise.
11123 (__arm_vgetq_lane_s32): Likewise.
11124 (__arm_vgetq_lane_s8): Likewise.
11125 (__arm_vgetq_lane_s64): Likewise.
11126 (__arm_vgetq_lane_u8): Likewise.
11127 (__arm_vgetq_lane_u16): Likewise.
11128 (__arm_vgetq_lane_u32): Likewise.
11129 (__arm_vgetq_lane_u64): Likewise.
11130 (__arm_vsetq_lane_f16): Likewise.
11131 (__arm_vsetq_lane_f32): Likewise.
11132 (__arm_vgetq_lane_f16): Likewise.
11133 (__arm_vgetq_lane_f32): Likewise.
11134 (vgetq_lane): Define polymorphic variant.
11135 (vsetq_lane): Likewise.
11136 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
11138 (mve_vec_extractv2didi): Likewise.
11139 (mve_vec_extract_sext_internal<mode>): Likewise.
11140 (mve_vec_extract_zext_internal<mode>): Likewise.
11141 (mve_vec_set<mode>_internal): Likewise.
11142 (mve_vec_setv2di_internal): Likewise.
11143 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
11145 (vec_extract<mode><V_elem_l>): Rename to
11146 "neon_vec_extract<mode><V_elem_l>".
11147 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
11148 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
11149 pattern common for MVE and NEON.
11150 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
11153 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
11155 * config/arm/mve.md (earlyclobber_32): New mode attribute.
11156 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
11157 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
11159 2020-03-23 Richard Biener <rguenther@suse.de>
11161 PR tree-optimization/94261
11162 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
11163 IL operand swapping code.
11164 (vect_slp_rearrange_stmts): Do not arrange isomorphic
11165 nodes that would need operation code adjustments.
11167 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
11169 * doc/install.texi (amdgcn-*-amdhsa): Renamed
11170 from amdgcn-unknown-amdhsa; change
11171 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
11173 2020-03-23 Richard Biener <rguenther@suse.de>
11176 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
11177 directly rather than also folding it via build_fold_addr_expr.
11179 2020-03-23 Richard Biener <rguenther@suse.de>
11181 PR tree-optimization/94266
11182 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
11183 addresses of TARGET_MEM_REFs.
11185 2020-03-23 Martin Liska <mliska@suse.cz>
11188 * symtab.c (symtab_node::clone_references): Save speculative_id
11189 as ref may be overwritten by create_reference.
11190 (symtab_node::clone_referring): Likewise.
11191 (symtab_node::clone_reference): Likewise.
11193 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
11195 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
11196 references to Darwin.
11197 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
11198 unconditionally and comment on why.
11200 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
11202 * config/darwin.c (darwin_mergeable_constant_section): Collect
11203 section anchor checks into the caller.
11204 (machopic_select_section): Collect section anchor checks into
11205 the determination of 'effective zero-size' objects. When the
11206 size is unknown, assume it is non-zero, and thus return the
11207 'generic' section for the DECL.
11209 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
11212 * config/darwin.opt: Amend options descriptions.
11214 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
11216 PR rtl-optimization/94052
11217 * lra-constraints.c (simplify_operand_subreg): Reload the inner
11218 register of a paradoxical subreg if simplify_subreg_regno fails
11219 to give a valid hard register for the outer mode.
11221 2020-03-20 Martin Jambor <mjambor@suse.cz>
11223 PR tree-optimization/93435
11224 * params.opt (sra-max-propagations): New parameter.
11225 * tree-sra.c (propagation_budget): New variable.
11226 (budget_for_propagation_access): New function.
11227 (propagate_subaccesses_from_rhs): Use it.
11228 (propagate_subaccesses_from_lhs): Likewise.
11229 (propagate_all_subaccesses): Set up and destroy propagation_budget.
11231 2020-03-20 Carl Love <cel@us.ibm.com>
11234 * config/rs6000/rs6000.c (rs6000_option_override_internal):
11235 Add check for TARGET_FPRND for Power 7 or newer.
11237 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
11240 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
11241 (cgraph_edge::redirect_callee): Move here; likewise.
11242 (cgraph_node::remove_callees): Update calls_comdat_local flag.
11243 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
11245 (cgraph_node::check_calls_comdat_local_p): New member function.
11246 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
11247 (cgraph_edge::redirect_callee): Move offline.
11248 * ipa-fnsummary.c (compute_fn_summary): Do not compute
11249 calls_comdat_local flag here.
11250 * ipa-inline-transform.c (inline_call): Fix updating of
11251 calls_comdat_local flag.
11252 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
11253 * symtab.c (symtab_node::add_to_same_comdat_group): Update
11254 calls_comdat_local flag.
11256 2020-03-20 Richard Biener <rguenther@suse.de>
11258 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
11259 from the possibly modified root.
11261 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11262 Andre Vieira <andre.simoesdiasvieira@arm.com>
11263 Mihail Ionescu <mihail.ionescu@arm.com>
11265 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
11266 (vst1q_p_s8): Likewise.
11267 (vst2q_s8): Likewise.
11268 (vst2q_u8): Likewise.
11269 (vld1q_z_u8): Likewise.
11270 (vld1q_z_s8): Likewise.
11271 (vld2q_s8): Likewise.
11272 (vld2q_u8): Likewise.
11273 (vld4q_s8): Likewise.
11274 (vld4q_u8): Likewise.
11275 (vst1q_p_u16): Likewise.
11276 (vst1q_p_s16): Likewise.
11277 (vst2q_s16): Likewise.
11278 (vst2q_u16): Likewise.
11279 (vld1q_z_u16): Likewise.
11280 (vld1q_z_s16): Likewise.
11281 (vld2q_s16): Likewise.
11282 (vld2q_u16): Likewise.
11283 (vld4q_s16): Likewise.
11284 (vld4q_u16): Likewise.
11285 (vst1q_p_u32): Likewise.
11286 (vst1q_p_s32): Likewise.
11287 (vst2q_s32): Likewise.
11288 (vst2q_u32): Likewise.
11289 (vld1q_z_u32): Likewise.
11290 (vld1q_z_s32): Likewise.
11291 (vld2q_s32): Likewise.
11292 (vld2q_u32): Likewise.
11293 (vld4q_s32): Likewise.
11294 (vld4q_u32): Likewise.
11295 (vld4q_f16): Likewise.
11296 (vld2q_f16): Likewise.
11297 (vld1q_z_f16): Likewise.
11298 (vst2q_f16): Likewise.
11299 (vst1q_p_f16): Likewise.
11300 (vld4q_f32): Likewise.
11301 (vld2q_f32): Likewise.
11302 (vld1q_z_f32): Likewise.
11303 (vst2q_f32): Likewise.
11304 (vst1q_p_f32): Likewise.
11305 (__arm_vst1q_p_u8): Define intrinsic.
11306 (__arm_vst1q_p_s8): Likewise.
11307 (__arm_vst2q_s8): Likewise.
11308 (__arm_vst2q_u8): Likewise.
11309 (__arm_vld1q_z_u8): Likewise.
11310 (__arm_vld1q_z_s8): Likewise.
11311 (__arm_vld2q_s8): Likewise.
11312 (__arm_vld2q_u8): Likewise.
11313 (__arm_vld4q_s8): Likewise.
11314 (__arm_vld4q_u8): Likewise.
11315 (__arm_vst1q_p_u16): Likewise.
11316 (__arm_vst1q_p_s16): Likewise.
11317 (__arm_vst2q_s16): Likewise.
11318 (__arm_vst2q_u16): Likewise.
11319 (__arm_vld1q_z_u16): Likewise.
11320 (__arm_vld1q_z_s16): Likewise.
11321 (__arm_vld2q_s16): Likewise.
11322 (__arm_vld2q_u16): Likewise.
11323 (__arm_vld4q_s16): Likewise.
11324 (__arm_vld4q_u16): Likewise.
11325 (__arm_vst1q_p_u32): Likewise.
11326 (__arm_vst1q_p_s32): Likewise.
11327 (__arm_vst2q_s32): Likewise.
11328 (__arm_vst2q_u32): Likewise.
11329 (__arm_vld1q_z_u32): Likewise.
11330 (__arm_vld1q_z_s32): Likewise.
11331 (__arm_vld2q_s32): Likewise.
11332 (__arm_vld2q_u32): Likewise.
11333 (__arm_vld4q_s32): Likewise.
11334 (__arm_vld4q_u32): Likewise.
11335 (__arm_vld4q_f16): Likewise.
11336 (__arm_vld2q_f16): Likewise.
11337 (__arm_vld1q_z_f16): Likewise.
11338 (__arm_vst2q_f16): Likewise.
11339 (__arm_vst1q_p_f16): Likewise.
11340 (__arm_vld4q_f32): Likewise.
11341 (__arm_vld2q_f32): Likewise.
11342 (__arm_vld1q_z_f32): Likewise.
11343 (__arm_vst2q_f32): Likewise.
11344 (__arm_vst1q_p_f32): Likewise.
11345 (vld1q_z): Define polymorphic variant.
11348 (vst1q_p): Likewise.
11350 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
11352 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
11353 (mve_vld2q<mode>): Likewise.
11354 (mve_vld4q<mode>): Likewise.
11356 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11357 Andre Vieira <andre.simoesdiasvieira@arm.com>
11358 Mihail Ionescu <mihail.ionescu@arm.com>
11360 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
11361 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
11362 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
11363 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
11364 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
11365 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
11366 * config/arm/arm_mve.h (vadciq_s32): Define macro.
11367 (vadciq_u32): Likewise.
11368 (vadciq_m_s32): Likewise.
11369 (vadciq_m_u32): Likewise.
11370 (vadcq_s32): Likewise.
11371 (vadcq_u32): Likewise.
11372 (vadcq_m_s32): Likewise.
11373 (vadcq_m_u32): Likewise.
11374 (vsbciq_s32): Likewise.
11375 (vsbciq_u32): Likewise.
11376 (vsbciq_m_s32): Likewise.
11377 (vsbciq_m_u32): Likewise.
11378 (vsbcq_s32): Likewise.
11379 (vsbcq_u32): Likewise.
11380 (vsbcq_m_s32): Likewise.
11381 (vsbcq_m_u32): Likewise.
11382 (__arm_vadciq_s32): Define intrinsic.
11383 (__arm_vadciq_u32): Likewise.
11384 (__arm_vadciq_m_s32): Likewise.
11385 (__arm_vadciq_m_u32): Likewise.
11386 (__arm_vadcq_s32): Likewise.
11387 (__arm_vadcq_u32): Likewise.
11388 (__arm_vadcq_m_s32): Likewise.
11389 (__arm_vadcq_m_u32): Likewise.
11390 (__arm_vsbciq_s32): Likewise.
11391 (__arm_vsbciq_u32): Likewise.
11392 (__arm_vsbciq_m_s32): Likewise.
11393 (__arm_vsbciq_m_u32): Likewise.
11394 (__arm_vsbcq_s32): Likewise.
11395 (__arm_vsbcq_u32): Likewise.
11396 (__arm_vsbcq_m_s32): Likewise.
11397 (__arm_vsbcq_m_u32): Likewise.
11398 (vadciq_m): Define polymorphic variant.
11399 (vadciq): Likewise.
11400 (vadcq_m): Likewise.
11402 (vsbciq_m): Likewise.
11403 (vsbciq): Likewise.
11404 (vsbcq_m): Likewise.
11406 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
11408 (BINOP_UNONE_UNONE_UNONE): Likewise.
11409 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11410 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11411 * config/arm/mve.md (VADCIQ): Define iterator.
11412 (VADCIQ_M): Likewise.
11414 (VSBCQ_M): Likewise.
11415 (VSBCIQ): Likewise.
11416 (VSBCIQ_M): Likewise.
11418 (VADCQ_M): Likewise.
11419 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
11420 (mve_vadciq_<supf>v4si): Likewise.
11421 (mve_vadcq_m_<supf>v4si): Likewise.
11422 (mve_vadcq_<supf>v4si): Likewise.
11423 (mve_vsbciq_m_<supf>v4si): Likewise.
11424 (mve_vsbciq_<supf>v4si): Likewise.
11425 (mve_vsbcq_m_<supf>v4si): Likewise.
11426 (mve_vsbcq_<supf>v4si): Likewise.
11427 (get_fpscr_nzcvqc): Define isns.
11428 (set_fpscr_nzcvqc): Define isns.
11429 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
11430 (UNSPEC_SET_FPSCR_NZCVQC): Define.
11432 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11434 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
11435 (vddupq_x_n_u16): Likewise.
11436 (vddupq_x_n_u32): Likewise.
11437 (vddupq_x_wb_u8): Likewise.
11438 (vddupq_x_wb_u16): Likewise.
11439 (vddupq_x_wb_u32): Likewise.
11440 (vdwdupq_x_n_u8): Likewise.
11441 (vdwdupq_x_n_u16): Likewise.
11442 (vdwdupq_x_n_u32): Likewise.
11443 (vdwdupq_x_wb_u8): Likewise.
11444 (vdwdupq_x_wb_u16): Likewise.
11445 (vdwdupq_x_wb_u32): Likewise.
11446 (vidupq_x_n_u8): Likewise.
11447 (vidupq_x_n_u16): Likewise.
11448 (vidupq_x_n_u32): Likewise.
11449 (vidupq_x_wb_u8): Likewise.
11450 (vidupq_x_wb_u16): Likewise.
11451 (vidupq_x_wb_u32): Likewise.
11452 (viwdupq_x_n_u8): Likewise.
11453 (viwdupq_x_n_u16): Likewise.
11454 (viwdupq_x_n_u32): Likewise.
11455 (viwdupq_x_wb_u8): Likewise.
11456 (viwdupq_x_wb_u16): Likewise.
11457 (viwdupq_x_wb_u32): Likewise.
11458 (vdupq_x_n_s8): Likewise.
11459 (vdupq_x_n_s16): Likewise.
11460 (vdupq_x_n_s32): Likewise.
11461 (vdupq_x_n_u8): Likewise.
11462 (vdupq_x_n_u16): Likewise.
11463 (vdupq_x_n_u32): Likewise.
11464 (vminq_x_s8): Likewise.
11465 (vminq_x_s16): Likewise.
11466 (vminq_x_s32): Likewise.
11467 (vminq_x_u8): Likewise.
11468 (vminq_x_u16): Likewise.
11469 (vminq_x_u32): Likewise.
11470 (vmaxq_x_s8): Likewise.
11471 (vmaxq_x_s16): Likewise.
11472 (vmaxq_x_s32): Likewise.
11473 (vmaxq_x_u8): Likewise.
11474 (vmaxq_x_u16): Likewise.
11475 (vmaxq_x_u32): Likewise.
11476 (vabdq_x_s8): Likewise.
11477 (vabdq_x_s16): Likewise.
11478 (vabdq_x_s32): Likewise.
11479 (vabdq_x_u8): Likewise.
11480 (vabdq_x_u16): Likewise.
11481 (vabdq_x_u32): Likewise.
11482 (vabsq_x_s8): Likewise.
11483 (vabsq_x_s16): Likewise.
11484 (vabsq_x_s32): Likewise.
11485 (vaddq_x_s8): Likewise.
11486 (vaddq_x_s16): Likewise.
11487 (vaddq_x_s32): Likewise.
11488 (vaddq_x_n_s8): Likewise.
11489 (vaddq_x_n_s16): Likewise.
11490 (vaddq_x_n_s32): Likewise.
11491 (vaddq_x_u8): Likewise.
11492 (vaddq_x_u16): Likewise.
11493 (vaddq_x_u32): Likewise.
11494 (vaddq_x_n_u8): Likewise.
11495 (vaddq_x_n_u16): Likewise.
11496 (vaddq_x_n_u32): Likewise.
11497 (vclsq_x_s8): Likewise.
11498 (vclsq_x_s16): Likewise.
11499 (vclsq_x_s32): Likewise.
11500 (vclzq_x_s8): Likewise.
11501 (vclzq_x_s16): Likewise.
11502 (vclzq_x_s32): Likewise.
11503 (vclzq_x_u8): Likewise.
11504 (vclzq_x_u16): Likewise.
11505 (vclzq_x_u32): Likewise.
11506 (vnegq_x_s8): Likewise.
11507 (vnegq_x_s16): Likewise.
11508 (vnegq_x_s32): Likewise.
11509 (vmulhq_x_s8): Likewise.
11510 (vmulhq_x_s16): Likewise.
11511 (vmulhq_x_s32): Likewise.
11512 (vmulhq_x_u8): Likewise.
11513 (vmulhq_x_u16): Likewise.
11514 (vmulhq_x_u32): Likewise.
11515 (vmullbq_poly_x_p8): Likewise.
11516 (vmullbq_poly_x_p16): Likewise.
11517 (vmullbq_int_x_s8): Likewise.
11518 (vmullbq_int_x_s16): Likewise.
11519 (vmullbq_int_x_s32): Likewise.
11520 (vmullbq_int_x_u8): Likewise.
11521 (vmullbq_int_x_u16): Likewise.
11522 (vmullbq_int_x_u32): Likewise.
11523 (vmulltq_poly_x_p8): Likewise.
11524 (vmulltq_poly_x_p16): Likewise.
11525 (vmulltq_int_x_s8): Likewise.
11526 (vmulltq_int_x_s16): Likewise.
11527 (vmulltq_int_x_s32): Likewise.
11528 (vmulltq_int_x_u8): Likewise.
11529 (vmulltq_int_x_u16): Likewise.
11530 (vmulltq_int_x_u32): Likewise.
11531 (vmulq_x_s8): Likewise.
11532 (vmulq_x_s16): Likewise.
11533 (vmulq_x_s32): Likewise.
11534 (vmulq_x_n_s8): Likewise.
11535 (vmulq_x_n_s16): Likewise.
11536 (vmulq_x_n_s32): Likewise.
11537 (vmulq_x_u8): Likewise.
11538 (vmulq_x_u16): Likewise.
11539 (vmulq_x_u32): Likewise.
11540 (vmulq_x_n_u8): Likewise.
11541 (vmulq_x_n_u16): Likewise.
11542 (vmulq_x_n_u32): Likewise.
11543 (vsubq_x_s8): Likewise.
11544 (vsubq_x_s16): Likewise.
11545 (vsubq_x_s32): Likewise.
11546 (vsubq_x_n_s8): Likewise.
11547 (vsubq_x_n_s16): Likewise.
11548 (vsubq_x_n_s32): Likewise.
11549 (vsubq_x_u8): Likewise.
11550 (vsubq_x_u16): Likewise.
11551 (vsubq_x_u32): Likewise.
11552 (vsubq_x_n_u8): Likewise.
11553 (vsubq_x_n_u16): Likewise.
11554 (vsubq_x_n_u32): Likewise.
11555 (vcaddq_rot90_x_s8): Likewise.
11556 (vcaddq_rot90_x_s16): Likewise.
11557 (vcaddq_rot90_x_s32): Likewise.
11558 (vcaddq_rot90_x_u8): Likewise.
11559 (vcaddq_rot90_x_u16): Likewise.
11560 (vcaddq_rot90_x_u32): Likewise.
11561 (vcaddq_rot270_x_s8): Likewise.
11562 (vcaddq_rot270_x_s16): Likewise.
11563 (vcaddq_rot270_x_s32): Likewise.
11564 (vcaddq_rot270_x_u8): Likewise.
11565 (vcaddq_rot270_x_u16): Likewise.
11566 (vcaddq_rot270_x_u32): Likewise.
11567 (vhaddq_x_n_s8): Likewise.
11568 (vhaddq_x_n_s16): Likewise.
11569 (vhaddq_x_n_s32): Likewise.
11570 (vhaddq_x_n_u8): Likewise.
11571 (vhaddq_x_n_u16): Likewise.
11572 (vhaddq_x_n_u32): Likewise.
11573 (vhaddq_x_s8): Likewise.
11574 (vhaddq_x_s16): Likewise.
11575 (vhaddq_x_s32): Likewise.
11576 (vhaddq_x_u8): Likewise.
11577 (vhaddq_x_u16): Likewise.
11578 (vhaddq_x_u32): Likewise.
11579 (vhcaddq_rot90_x_s8): Likewise.
11580 (vhcaddq_rot90_x_s16): Likewise.
11581 (vhcaddq_rot90_x_s32): Likewise.
11582 (vhcaddq_rot270_x_s8): Likewise.
11583 (vhcaddq_rot270_x_s16): Likewise.
11584 (vhcaddq_rot270_x_s32): Likewise.
11585 (vhsubq_x_n_s8): Likewise.
11586 (vhsubq_x_n_s16): Likewise.
11587 (vhsubq_x_n_s32): Likewise.
11588 (vhsubq_x_n_u8): Likewise.
11589 (vhsubq_x_n_u16): Likewise.
11590 (vhsubq_x_n_u32): Likewise.
11591 (vhsubq_x_s8): Likewise.
11592 (vhsubq_x_s16): Likewise.
11593 (vhsubq_x_s32): Likewise.
11594 (vhsubq_x_u8): Likewise.
11595 (vhsubq_x_u16): Likewise.
11596 (vhsubq_x_u32): Likewise.
11597 (vrhaddq_x_s8): Likewise.
11598 (vrhaddq_x_s16): Likewise.
11599 (vrhaddq_x_s32): Likewise.
11600 (vrhaddq_x_u8): Likewise.
11601 (vrhaddq_x_u16): Likewise.
11602 (vrhaddq_x_u32): Likewise.
11603 (vrmulhq_x_s8): Likewise.
11604 (vrmulhq_x_s16): Likewise.
11605 (vrmulhq_x_s32): Likewise.
11606 (vrmulhq_x_u8): Likewise.
11607 (vrmulhq_x_u16): Likewise.
11608 (vrmulhq_x_u32): Likewise.
11609 (vandq_x_s8): Likewise.
11610 (vandq_x_s16): Likewise.
11611 (vandq_x_s32): Likewise.
11612 (vandq_x_u8): Likewise.
11613 (vandq_x_u16): Likewise.
11614 (vandq_x_u32): Likewise.
11615 (vbicq_x_s8): Likewise.
11616 (vbicq_x_s16): Likewise.
11617 (vbicq_x_s32): Likewise.
11618 (vbicq_x_u8): Likewise.
11619 (vbicq_x_u16): Likewise.
11620 (vbicq_x_u32): Likewise.
11621 (vbrsrq_x_n_s8): Likewise.
11622 (vbrsrq_x_n_s16): Likewise.
11623 (vbrsrq_x_n_s32): Likewise.
11624 (vbrsrq_x_n_u8): Likewise.
11625 (vbrsrq_x_n_u16): Likewise.
11626 (vbrsrq_x_n_u32): Likewise.
11627 (veorq_x_s8): Likewise.
11628 (veorq_x_s16): Likewise.
11629 (veorq_x_s32): Likewise.
11630 (veorq_x_u8): Likewise.
11631 (veorq_x_u16): Likewise.
11632 (veorq_x_u32): Likewise.
11633 (vmovlbq_x_s8): Likewise.
11634 (vmovlbq_x_s16): Likewise.
11635 (vmovlbq_x_u8): Likewise.
11636 (vmovlbq_x_u16): Likewise.
11637 (vmovltq_x_s8): Likewise.
11638 (vmovltq_x_s16): Likewise.
11639 (vmovltq_x_u8): Likewise.
11640 (vmovltq_x_u16): Likewise.
11641 (vmvnq_x_s8): Likewise.
11642 (vmvnq_x_s16): Likewise.
11643 (vmvnq_x_s32): Likewise.
11644 (vmvnq_x_u8): Likewise.
11645 (vmvnq_x_u16): Likewise.
11646 (vmvnq_x_u32): Likewise.
11647 (vmvnq_x_n_s16): Likewise.
11648 (vmvnq_x_n_s32): Likewise.
11649 (vmvnq_x_n_u16): Likewise.
11650 (vmvnq_x_n_u32): Likewise.
11651 (vornq_x_s8): Likewise.
11652 (vornq_x_s16): Likewise.
11653 (vornq_x_s32): Likewise.
11654 (vornq_x_u8): Likewise.
11655 (vornq_x_u16): Likewise.
11656 (vornq_x_u32): Likewise.
11657 (vorrq_x_s8): Likewise.
11658 (vorrq_x_s16): Likewise.
11659 (vorrq_x_s32): Likewise.
11660 (vorrq_x_u8): Likewise.
11661 (vorrq_x_u16): Likewise.
11662 (vorrq_x_u32): Likewise.
11663 (vrev16q_x_s8): Likewise.
11664 (vrev16q_x_u8): Likewise.
11665 (vrev32q_x_s8): Likewise.
11666 (vrev32q_x_s16): Likewise.
11667 (vrev32q_x_u8): Likewise.
11668 (vrev32q_x_u16): Likewise.
11669 (vrev64q_x_s8): Likewise.
11670 (vrev64q_x_s16): Likewise.
11671 (vrev64q_x_s32): Likewise.
11672 (vrev64q_x_u8): Likewise.
11673 (vrev64q_x_u16): Likewise.
11674 (vrev64q_x_u32): Likewise.
11675 (vrshlq_x_s8): Likewise.
11676 (vrshlq_x_s16): Likewise.
11677 (vrshlq_x_s32): Likewise.
11678 (vrshlq_x_u8): Likewise.
11679 (vrshlq_x_u16): Likewise.
11680 (vrshlq_x_u32): Likewise.
11681 (vshllbq_x_n_s8): Likewise.
11682 (vshllbq_x_n_s16): Likewise.
11683 (vshllbq_x_n_u8): Likewise.
11684 (vshllbq_x_n_u16): Likewise.
11685 (vshlltq_x_n_s8): Likewise.
11686 (vshlltq_x_n_s16): Likewise.
11687 (vshlltq_x_n_u8): Likewise.
11688 (vshlltq_x_n_u16): Likewise.
11689 (vshlq_x_s8): Likewise.
11690 (vshlq_x_s16): Likewise.
11691 (vshlq_x_s32): Likewise.
11692 (vshlq_x_u8): Likewise.
11693 (vshlq_x_u16): Likewise.
11694 (vshlq_x_u32): Likewise.
11695 (vshlq_x_n_s8): Likewise.
11696 (vshlq_x_n_s16): Likewise.
11697 (vshlq_x_n_s32): Likewise.
11698 (vshlq_x_n_u8): Likewise.
11699 (vshlq_x_n_u16): Likewise.
11700 (vshlq_x_n_u32): Likewise.
11701 (vrshrq_x_n_s8): Likewise.
11702 (vrshrq_x_n_s16): Likewise.
11703 (vrshrq_x_n_s32): Likewise.
11704 (vrshrq_x_n_u8): Likewise.
11705 (vrshrq_x_n_u16): Likewise.
11706 (vrshrq_x_n_u32): Likewise.
11707 (vshrq_x_n_s8): Likewise.
11708 (vshrq_x_n_s16): Likewise.
11709 (vshrq_x_n_s32): Likewise.
11710 (vshrq_x_n_u8): Likewise.
11711 (vshrq_x_n_u16): Likewise.
11712 (vshrq_x_n_u32): Likewise.
11713 (vdupq_x_n_f16): Likewise.
11714 (vdupq_x_n_f32): Likewise.
11715 (vminnmq_x_f16): Likewise.
11716 (vminnmq_x_f32): Likewise.
11717 (vmaxnmq_x_f16): Likewise.
11718 (vmaxnmq_x_f32): Likewise.
11719 (vabdq_x_f16): Likewise.
11720 (vabdq_x_f32): Likewise.
11721 (vabsq_x_f16): Likewise.
11722 (vabsq_x_f32): Likewise.
11723 (vaddq_x_f16): Likewise.
11724 (vaddq_x_f32): Likewise.
11725 (vaddq_x_n_f16): Likewise.
11726 (vaddq_x_n_f32): Likewise.
11727 (vnegq_x_f16): Likewise.
11728 (vnegq_x_f32): Likewise.
11729 (vmulq_x_f16): Likewise.
11730 (vmulq_x_f32): Likewise.
11731 (vmulq_x_n_f16): Likewise.
11732 (vmulq_x_n_f32): Likewise.
11733 (vsubq_x_f16): Likewise.
11734 (vsubq_x_f32): Likewise.
11735 (vsubq_x_n_f16): Likewise.
11736 (vsubq_x_n_f32): Likewise.
11737 (vcaddq_rot90_x_f16): Likewise.
11738 (vcaddq_rot90_x_f32): Likewise.
11739 (vcaddq_rot270_x_f16): Likewise.
11740 (vcaddq_rot270_x_f32): Likewise.
11741 (vcmulq_x_f16): Likewise.
11742 (vcmulq_x_f32): Likewise.
11743 (vcmulq_rot90_x_f16): Likewise.
11744 (vcmulq_rot90_x_f32): Likewise.
11745 (vcmulq_rot180_x_f16): Likewise.
11746 (vcmulq_rot180_x_f32): Likewise.
11747 (vcmulq_rot270_x_f16): Likewise.
11748 (vcmulq_rot270_x_f32): Likewise.
11749 (vcvtaq_x_s16_f16): Likewise.
11750 (vcvtaq_x_s32_f32): Likewise.
11751 (vcvtaq_x_u16_f16): Likewise.
11752 (vcvtaq_x_u32_f32): Likewise.
11753 (vcvtnq_x_s16_f16): Likewise.
11754 (vcvtnq_x_s32_f32): Likewise.
11755 (vcvtnq_x_u16_f16): Likewise.
11756 (vcvtnq_x_u32_f32): Likewise.
11757 (vcvtpq_x_s16_f16): Likewise.
11758 (vcvtpq_x_s32_f32): Likewise.
11759 (vcvtpq_x_u16_f16): Likewise.
11760 (vcvtpq_x_u32_f32): Likewise.
11761 (vcvtmq_x_s16_f16): Likewise.
11762 (vcvtmq_x_s32_f32): Likewise.
11763 (vcvtmq_x_u16_f16): Likewise.
11764 (vcvtmq_x_u32_f32): Likewise.
11765 (vcvtbq_x_f32_f16): Likewise.
11766 (vcvttq_x_f32_f16): Likewise.
11767 (vcvtq_x_f16_u16): Likewise.
11768 (vcvtq_x_f16_s16): Likewise.
11769 (vcvtq_x_f32_s32): Likewise.
11770 (vcvtq_x_f32_u32): Likewise.
11771 (vcvtq_x_n_f16_s16): Likewise.
11772 (vcvtq_x_n_f16_u16): Likewise.
11773 (vcvtq_x_n_f32_s32): Likewise.
11774 (vcvtq_x_n_f32_u32): Likewise.
11775 (vcvtq_x_s16_f16): Likewise.
11776 (vcvtq_x_s32_f32): Likewise.
11777 (vcvtq_x_u16_f16): Likewise.
11778 (vcvtq_x_u32_f32): Likewise.
11779 (vcvtq_x_n_s16_f16): Likewise.
11780 (vcvtq_x_n_s32_f32): Likewise.
11781 (vcvtq_x_n_u16_f16): Likewise.
11782 (vcvtq_x_n_u32_f32): Likewise.
11783 (vrndq_x_f16): Likewise.
11784 (vrndq_x_f32): Likewise.
11785 (vrndnq_x_f16): Likewise.
11786 (vrndnq_x_f32): Likewise.
11787 (vrndmq_x_f16): Likewise.
11788 (vrndmq_x_f32): Likewise.
11789 (vrndpq_x_f16): Likewise.
11790 (vrndpq_x_f32): Likewise.
11791 (vrndaq_x_f16): Likewise.
11792 (vrndaq_x_f32): Likewise.
11793 (vrndxq_x_f16): Likewise.
11794 (vrndxq_x_f32): Likewise.
11795 (vandq_x_f16): Likewise.
11796 (vandq_x_f32): Likewise.
11797 (vbicq_x_f16): Likewise.
11798 (vbicq_x_f32): Likewise.
11799 (vbrsrq_x_n_f16): Likewise.
11800 (vbrsrq_x_n_f32): Likewise.
11801 (veorq_x_f16): Likewise.
11802 (veorq_x_f32): Likewise.
11803 (vornq_x_f16): Likewise.
11804 (vornq_x_f32): Likewise.
11805 (vorrq_x_f16): Likewise.
11806 (vorrq_x_f32): Likewise.
11807 (vrev32q_x_f16): Likewise.
11808 (vrev64q_x_f16): Likewise.
11809 (vrev64q_x_f32): Likewise.
11810 (__arm_vddupq_x_n_u8): Define intrinsic.
11811 (__arm_vddupq_x_n_u16): Likewise.
11812 (__arm_vddupq_x_n_u32): Likewise.
11813 (__arm_vddupq_x_wb_u8): Likewise.
11814 (__arm_vddupq_x_wb_u16): Likewise.
11815 (__arm_vddupq_x_wb_u32): Likewise.
11816 (__arm_vdwdupq_x_n_u8): Likewise.
11817 (__arm_vdwdupq_x_n_u16): Likewise.
11818 (__arm_vdwdupq_x_n_u32): Likewise.
11819 (__arm_vdwdupq_x_wb_u8): Likewise.
11820 (__arm_vdwdupq_x_wb_u16): Likewise.
11821 (__arm_vdwdupq_x_wb_u32): Likewise.
11822 (__arm_vidupq_x_n_u8): Likewise.
11823 (__arm_vidupq_x_n_u16): Likewise.
11824 (__arm_vidupq_x_n_u32): Likewise.
11825 (__arm_vidupq_x_wb_u8): Likewise.
11826 (__arm_vidupq_x_wb_u16): Likewise.
11827 (__arm_vidupq_x_wb_u32): Likewise.
11828 (__arm_viwdupq_x_n_u8): Likewise.
11829 (__arm_viwdupq_x_n_u16): Likewise.
11830 (__arm_viwdupq_x_n_u32): Likewise.
11831 (__arm_viwdupq_x_wb_u8): Likewise.
11832 (__arm_viwdupq_x_wb_u16): Likewise.
11833 (__arm_viwdupq_x_wb_u32): Likewise.
11834 (__arm_vdupq_x_n_s8): Likewise.
11835 (__arm_vdupq_x_n_s16): Likewise.
11836 (__arm_vdupq_x_n_s32): Likewise.
11837 (__arm_vdupq_x_n_u8): Likewise.
11838 (__arm_vdupq_x_n_u16): Likewise.
11839 (__arm_vdupq_x_n_u32): Likewise.
11840 (__arm_vminq_x_s8): Likewise.
11841 (__arm_vminq_x_s16): Likewise.
11842 (__arm_vminq_x_s32): Likewise.
11843 (__arm_vminq_x_u8): Likewise.
11844 (__arm_vminq_x_u16): Likewise.
11845 (__arm_vminq_x_u32): Likewise.
11846 (__arm_vmaxq_x_s8): Likewise.
11847 (__arm_vmaxq_x_s16): Likewise.
11848 (__arm_vmaxq_x_s32): Likewise.
11849 (__arm_vmaxq_x_u8): Likewise.
11850 (__arm_vmaxq_x_u16): Likewise.
11851 (__arm_vmaxq_x_u32): Likewise.
11852 (__arm_vabdq_x_s8): Likewise.
11853 (__arm_vabdq_x_s16): Likewise.
11854 (__arm_vabdq_x_s32): Likewise.
11855 (__arm_vabdq_x_u8): Likewise.
11856 (__arm_vabdq_x_u16): Likewise.
11857 (__arm_vabdq_x_u32): Likewise.
11858 (__arm_vabsq_x_s8): Likewise.
11859 (__arm_vabsq_x_s16): Likewise.
11860 (__arm_vabsq_x_s32): Likewise.
11861 (__arm_vaddq_x_s8): Likewise.
11862 (__arm_vaddq_x_s16): Likewise.
11863 (__arm_vaddq_x_s32): Likewise.
11864 (__arm_vaddq_x_n_s8): Likewise.
11865 (__arm_vaddq_x_n_s16): Likewise.
11866 (__arm_vaddq_x_n_s32): Likewise.
11867 (__arm_vaddq_x_u8): Likewise.
11868 (__arm_vaddq_x_u16): Likewise.
11869 (__arm_vaddq_x_u32): Likewise.
11870 (__arm_vaddq_x_n_u8): Likewise.
11871 (__arm_vaddq_x_n_u16): Likewise.
11872 (__arm_vaddq_x_n_u32): Likewise.
11873 (__arm_vclsq_x_s8): Likewise.
11874 (__arm_vclsq_x_s16): Likewise.
11875 (__arm_vclsq_x_s32): Likewise.
11876 (__arm_vclzq_x_s8): Likewise.
11877 (__arm_vclzq_x_s16): Likewise.
11878 (__arm_vclzq_x_s32): Likewise.
11879 (__arm_vclzq_x_u8): Likewise.
11880 (__arm_vclzq_x_u16): Likewise.
11881 (__arm_vclzq_x_u32): Likewise.
11882 (__arm_vnegq_x_s8): Likewise.
11883 (__arm_vnegq_x_s16): Likewise.
11884 (__arm_vnegq_x_s32): Likewise.
11885 (__arm_vmulhq_x_s8): Likewise.
11886 (__arm_vmulhq_x_s16): Likewise.
11887 (__arm_vmulhq_x_s32): Likewise.
11888 (__arm_vmulhq_x_u8): Likewise.
11889 (__arm_vmulhq_x_u16): Likewise.
11890 (__arm_vmulhq_x_u32): Likewise.
11891 (__arm_vmullbq_poly_x_p8): Likewise.
11892 (__arm_vmullbq_poly_x_p16): Likewise.
11893 (__arm_vmullbq_int_x_s8): Likewise.
11894 (__arm_vmullbq_int_x_s16): Likewise.
11895 (__arm_vmullbq_int_x_s32): Likewise.
11896 (__arm_vmullbq_int_x_u8): Likewise.
11897 (__arm_vmullbq_int_x_u16): Likewise.
11898 (__arm_vmullbq_int_x_u32): Likewise.
11899 (__arm_vmulltq_poly_x_p8): Likewise.
11900 (__arm_vmulltq_poly_x_p16): Likewise.
11901 (__arm_vmulltq_int_x_s8): Likewise.
11902 (__arm_vmulltq_int_x_s16): Likewise.
11903 (__arm_vmulltq_int_x_s32): Likewise.
11904 (__arm_vmulltq_int_x_u8): Likewise.
11905 (__arm_vmulltq_int_x_u16): Likewise.
11906 (__arm_vmulltq_int_x_u32): Likewise.
11907 (__arm_vmulq_x_s8): Likewise.
11908 (__arm_vmulq_x_s16): Likewise.
11909 (__arm_vmulq_x_s32): Likewise.
11910 (__arm_vmulq_x_n_s8): Likewise.
11911 (__arm_vmulq_x_n_s16): Likewise.
11912 (__arm_vmulq_x_n_s32): Likewise.
11913 (__arm_vmulq_x_u8): Likewise.
11914 (__arm_vmulq_x_u16): Likewise.
11915 (__arm_vmulq_x_u32): Likewise.
11916 (__arm_vmulq_x_n_u8): Likewise.
11917 (__arm_vmulq_x_n_u16): Likewise.
11918 (__arm_vmulq_x_n_u32): Likewise.
11919 (__arm_vsubq_x_s8): Likewise.
11920 (__arm_vsubq_x_s16): Likewise.
11921 (__arm_vsubq_x_s32): Likewise.
11922 (__arm_vsubq_x_n_s8): Likewise.
11923 (__arm_vsubq_x_n_s16): Likewise.
11924 (__arm_vsubq_x_n_s32): Likewise.
11925 (__arm_vsubq_x_u8): Likewise.
11926 (__arm_vsubq_x_u16): Likewise.
11927 (__arm_vsubq_x_u32): Likewise.
11928 (__arm_vsubq_x_n_u8): Likewise.
11929 (__arm_vsubq_x_n_u16): Likewise.
11930 (__arm_vsubq_x_n_u32): Likewise.
11931 (__arm_vcaddq_rot90_x_s8): Likewise.
11932 (__arm_vcaddq_rot90_x_s16): Likewise.
11933 (__arm_vcaddq_rot90_x_s32): Likewise.
11934 (__arm_vcaddq_rot90_x_u8): Likewise.
11935 (__arm_vcaddq_rot90_x_u16): Likewise.
11936 (__arm_vcaddq_rot90_x_u32): Likewise.
11937 (__arm_vcaddq_rot270_x_s8): Likewise.
11938 (__arm_vcaddq_rot270_x_s16): Likewise.
11939 (__arm_vcaddq_rot270_x_s32): Likewise.
11940 (__arm_vcaddq_rot270_x_u8): Likewise.
11941 (__arm_vcaddq_rot270_x_u16): Likewise.
11942 (__arm_vcaddq_rot270_x_u32): Likewise.
11943 (__arm_vhaddq_x_n_s8): Likewise.
11944 (__arm_vhaddq_x_n_s16): Likewise.
11945 (__arm_vhaddq_x_n_s32): Likewise.
11946 (__arm_vhaddq_x_n_u8): Likewise.
11947 (__arm_vhaddq_x_n_u16): Likewise.
11948 (__arm_vhaddq_x_n_u32): Likewise.
11949 (__arm_vhaddq_x_s8): Likewise.
11950 (__arm_vhaddq_x_s16): Likewise.
11951 (__arm_vhaddq_x_s32): Likewise.
11952 (__arm_vhaddq_x_u8): Likewise.
11953 (__arm_vhaddq_x_u16): Likewise.
11954 (__arm_vhaddq_x_u32): Likewise.
11955 (__arm_vhcaddq_rot90_x_s8): Likewise.
11956 (__arm_vhcaddq_rot90_x_s16): Likewise.
11957 (__arm_vhcaddq_rot90_x_s32): Likewise.
11958 (__arm_vhcaddq_rot270_x_s8): Likewise.
11959 (__arm_vhcaddq_rot270_x_s16): Likewise.
11960 (__arm_vhcaddq_rot270_x_s32): Likewise.
11961 (__arm_vhsubq_x_n_s8): Likewise.
11962 (__arm_vhsubq_x_n_s16): Likewise.
11963 (__arm_vhsubq_x_n_s32): Likewise.
11964 (__arm_vhsubq_x_n_u8): Likewise.
11965 (__arm_vhsubq_x_n_u16): Likewise.
11966 (__arm_vhsubq_x_n_u32): Likewise.
11967 (__arm_vhsubq_x_s8): Likewise.
11968 (__arm_vhsubq_x_s16): Likewise.
11969 (__arm_vhsubq_x_s32): Likewise.
11970 (__arm_vhsubq_x_u8): Likewise.
11971 (__arm_vhsubq_x_u16): Likewise.
11972 (__arm_vhsubq_x_u32): Likewise.
11973 (__arm_vrhaddq_x_s8): Likewise.
11974 (__arm_vrhaddq_x_s16): Likewise.
11975 (__arm_vrhaddq_x_s32): Likewise.
11976 (__arm_vrhaddq_x_u8): Likewise.
11977 (__arm_vrhaddq_x_u16): Likewise.
11978 (__arm_vrhaddq_x_u32): Likewise.
11979 (__arm_vrmulhq_x_s8): Likewise.
11980 (__arm_vrmulhq_x_s16): Likewise.
11981 (__arm_vrmulhq_x_s32): Likewise.
11982 (__arm_vrmulhq_x_u8): Likewise.
11983 (__arm_vrmulhq_x_u16): Likewise.
11984 (__arm_vrmulhq_x_u32): Likewise.
11985 (__arm_vandq_x_s8): Likewise.
11986 (__arm_vandq_x_s16): Likewise.
11987 (__arm_vandq_x_s32): Likewise.
11988 (__arm_vandq_x_u8): Likewise.
11989 (__arm_vandq_x_u16): Likewise.
11990 (__arm_vandq_x_u32): Likewise.
11991 (__arm_vbicq_x_s8): Likewise.
11992 (__arm_vbicq_x_s16): Likewise.
11993 (__arm_vbicq_x_s32): Likewise.
11994 (__arm_vbicq_x_u8): Likewise.
11995 (__arm_vbicq_x_u16): Likewise.
11996 (__arm_vbicq_x_u32): Likewise.
11997 (__arm_vbrsrq_x_n_s8): Likewise.
11998 (__arm_vbrsrq_x_n_s16): Likewise.
11999 (__arm_vbrsrq_x_n_s32): Likewise.
12000 (__arm_vbrsrq_x_n_u8): Likewise.
12001 (__arm_vbrsrq_x_n_u16): Likewise.
12002 (__arm_vbrsrq_x_n_u32): Likewise.
12003 (__arm_veorq_x_s8): Likewise.
12004 (__arm_veorq_x_s16): Likewise.
12005 (__arm_veorq_x_s32): Likewise.
12006 (__arm_veorq_x_u8): Likewise.
12007 (__arm_veorq_x_u16): Likewise.
12008 (__arm_veorq_x_u32): Likewise.
12009 (__arm_vmovlbq_x_s8): Likewise.
12010 (__arm_vmovlbq_x_s16): Likewise.
12011 (__arm_vmovlbq_x_u8): Likewise.
12012 (__arm_vmovlbq_x_u16): Likewise.
12013 (__arm_vmovltq_x_s8): Likewise.
12014 (__arm_vmovltq_x_s16): Likewise.
12015 (__arm_vmovltq_x_u8): Likewise.
12016 (__arm_vmovltq_x_u16): Likewise.
12017 (__arm_vmvnq_x_s8): Likewise.
12018 (__arm_vmvnq_x_s16): Likewise.
12019 (__arm_vmvnq_x_s32): Likewise.
12020 (__arm_vmvnq_x_u8): Likewise.
12021 (__arm_vmvnq_x_u16): Likewise.
12022 (__arm_vmvnq_x_u32): Likewise.
12023 (__arm_vmvnq_x_n_s16): Likewise.
12024 (__arm_vmvnq_x_n_s32): Likewise.
12025 (__arm_vmvnq_x_n_u16): Likewise.
12026 (__arm_vmvnq_x_n_u32): Likewise.
12027 (__arm_vornq_x_s8): Likewise.
12028 (__arm_vornq_x_s16): Likewise.
12029 (__arm_vornq_x_s32): Likewise.
12030 (__arm_vornq_x_u8): Likewise.
12031 (__arm_vornq_x_u16): Likewise.
12032 (__arm_vornq_x_u32): Likewise.
12033 (__arm_vorrq_x_s8): Likewise.
12034 (__arm_vorrq_x_s16): Likewise.
12035 (__arm_vorrq_x_s32): Likewise.
12036 (__arm_vorrq_x_u8): Likewise.
12037 (__arm_vorrq_x_u16): Likewise.
12038 (__arm_vorrq_x_u32): Likewise.
12039 (__arm_vrev16q_x_s8): Likewise.
12040 (__arm_vrev16q_x_u8): Likewise.
12041 (__arm_vrev32q_x_s8): Likewise.
12042 (__arm_vrev32q_x_s16): Likewise.
12043 (__arm_vrev32q_x_u8): Likewise.
12044 (__arm_vrev32q_x_u16): Likewise.
12045 (__arm_vrev64q_x_s8): Likewise.
12046 (__arm_vrev64q_x_s16): Likewise.
12047 (__arm_vrev64q_x_s32): Likewise.
12048 (__arm_vrev64q_x_u8): Likewise.
12049 (__arm_vrev64q_x_u16): Likewise.
12050 (__arm_vrev64q_x_u32): Likewise.
12051 (__arm_vrshlq_x_s8): Likewise.
12052 (__arm_vrshlq_x_s16): Likewise.
12053 (__arm_vrshlq_x_s32): Likewise.
12054 (__arm_vrshlq_x_u8): Likewise.
12055 (__arm_vrshlq_x_u16): Likewise.
12056 (__arm_vrshlq_x_u32): Likewise.
12057 (__arm_vshllbq_x_n_s8): Likewise.
12058 (__arm_vshllbq_x_n_s16): Likewise.
12059 (__arm_vshllbq_x_n_u8): Likewise.
12060 (__arm_vshllbq_x_n_u16): Likewise.
12061 (__arm_vshlltq_x_n_s8): Likewise.
12062 (__arm_vshlltq_x_n_s16): Likewise.
12063 (__arm_vshlltq_x_n_u8): Likewise.
12064 (__arm_vshlltq_x_n_u16): Likewise.
12065 (__arm_vshlq_x_s8): Likewise.
12066 (__arm_vshlq_x_s16): Likewise.
12067 (__arm_vshlq_x_s32): Likewise.
12068 (__arm_vshlq_x_u8): Likewise.
12069 (__arm_vshlq_x_u16): Likewise.
12070 (__arm_vshlq_x_u32): Likewise.
12071 (__arm_vshlq_x_n_s8): Likewise.
12072 (__arm_vshlq_x_n_s16): Likewise.
12073 (__arm_vshlq_x_n_s32): Likewise.
12074 (__arm_vshlq_x_n_u8): Likewise.
12075 (__arm_vshlq_x_n_u16): Likewise.
12076 (__arm_vshlq_x_n_u32): Likewise.
12077 (__arm_vrshrq_x_n_s8): Likewise.
12078 (__arm_vrshrq_x_n_s16): Likewise.
12079 (__arm_vrshrq_x_n_s32): Likewise.
12080 (__arm_vrshrq_x_n_u8): Likewise.
12081 (__arm_vrshrq_x_n_u16): Likewise.
12082 (__arm_vrshrq_x_n_u32): Likewise.
12083 (__arm_vshrq_x_n_s8): Likewise.
12084 (__arm_vshrq_x_n_s16): Likewise.
12085 (__arm_vshrq_x_n_s32): Likewise.
12086 (__arm_vshrq_x_n_u8): Likewise.
12087 (__arm_vshrq_x_n_u16): Likewise.
12088 (__arm_vshrq_x_n_u32): Likewise.
12089 (__arm_vdupq_x_n_f16): Likewise.
12090 (__arm_vdupq_x_n_f32): Likewise.
12091 (__arm_vminnmq_x_f16): Likewise.
12092 (__arm_vminnmq_x_f32): Likewise.
12093 (__arm_vmaxnmq_x_f16): Likewise.
12094 (__arm_vmaxnmq_x_f32): Likewise.
12095 (__arm_vabdq_x_f16): Likewise.
12096 (__arm_vabdq_x_f32): Likewise.
12097 (__arm_vabsq_x_f16): Likewise.
12098 (__arm_vabsq_x_f32): Likewise.
12099 (__arm_vaddq_x_f16): Likewise.
12100 (__arm_vaddq_x_f32): Likewise.
12101 (__arm_vaddq_x_n_f16): Likewise.
12102 (__arm_vaddq_x_n_f32): Likewise.
12103 (__arm_vnegq_x_f16): Likewise.
12104 (__arm_vnegq_x_f32): Likewise.
12105 (__arm_vmulq_x_f16): Likewise.
12106 (__arm_vmulq_x_f32): Likewise.
12107 (__arm_vmulq_x_n_f16): Likewise.
12108 (__arm_vmulq_x_n_f32): Likewise.
12109 (__arm_vsubq_x_f16): Likewise.
12110 (__arm_vsubq_x_f32): Likewise.
12111 (__arm_vsubq_x_n_f16): Likewise.
12112 (__arm_vsubq_x_n_f32): Likewise.
12113 (__arm_vcaddq_rot90_x_f16): Likewise.
12114 (__arm_vcaddq_rot90_x_f32): Likewise.
12115 (__arm_vcaddq_rot270_x_f16): Likewise.
12116 (__arm_vcaddq_rot270_x_f32): Likewise.
12117 (__arm_vcmulq_x_f16): Likewise.
12118 (__arm_vcmulq_x_f32): Likewise.
12119 (__arm_vcmulq_rot90_x_f16): Likewise.
12120 (__arm_vcmulq_rot90_x_f32): Likewise.
12121 (__arm_vcmulq_rot180_x_f16): Likewise.
12122 (__arm_vcmulq_rot180_x_f32): Likewise.
12123 (__arm_vcmulq_rot270_x_f16): Likewise.
12124 (__arm_vcmulq_rot270_x_f32): Likewise.
12125 (__arm_vcvtaq_x_s16_f16): Likewise.
12126 (__arm_vcvtaq_x_s32_f32): Likewise.
12127 (__arm_vcvtaq_x_u16_f16): Likewise.
12128 (__arm_vcvtaq_x_u32_f32): Likewise.
12129 (__arm_vcvtnq_x_s16_f16): Likewise.
12130 (__arm_vcvtnq_x_s32_f32): Likewise.
12131 (__arm_vcvtnq_x_u16_f16): Likewise.
12132 (__arm_vcvtnq_x_u32_f32): Likewise.
12133 (__arm_vcvtpq_x_s16_f16): Likewise.
12134 (__arm_vcvtpq_x_s32_f32): Likewise.
12135 (__arm_vcvtpq_x_u16_f16): Likewise.
12136 (__arm_vcvtpq_x_u32_f32): Likewise.
12137 (__arm_vcvtmq_x_s16_f16): Likewise.
12138 (__arm_vcvtmq_x_s32_f32): Likewise.
12139 (__arm_vcvtmq_x_u16_f16): Likewise.
12140 (__arm_vcvtmq_x_u32_f32): Likewise.
12141 (__arm_vcvtbq_x_f32_f16): Likewise.
12142 (__arm_vcvttq_x_f32_f16): Likewise.
12143 (__arm_vcvtq_x_f16_u16): Likewise.
12144 (__arm_vcvtq_x_f16_s16): Likewise.
12145 (__arm_vcvtq_x_f32_s32): Likewise.
12146 (__arm_vcvtq_x_f32_u32): Likewise.
12147 (__arm_vcvtq_x_n_f16_s16): Likewise.
12148 (__arm_vcvtq_x_n_f16_u16): Likewise.
12149 (__arm_vcvtq_x_n_f32_s32): Likewise.
12150 (__arm_vcvtq_x_n_f32_u32): Likewise.
12151 (__arm_vcvtq_x_s16_f16): Likewise.
12152 (__arm_vcvtq_x_s32_f32): Likewise.
12153 (__arm_vcvtq_x_u16_f16): Likewise.
12154 (__arm_vcvtq_x_u32_f32): Likewise.
12155 (__arm_vcvtq_x_n_s16_f16): Likewise.
12156 (__arm_vcvtq_x_n_s32_f32): Likewise.
12157 (__arm_vcvtq_x_n_u16_f16): Likewise.
12158 (__arm_vcvtq_x_n_u32_f32): Likewise.
12159 (__arm_vrndq_x_f16): Likewise.
12160 (__arm_vrndq_x_f32): Likewise.
12161 (__arm_vrndnq_x_f16): Likewise.
12162 (__arm_vrndnq_x_f32): Likewise.
12163 (__arm_vrndmq_x_f16): Likewise.
12164 (__arm_vrndmq_x_f32): Likewise.
12165 (__arm_vrndpq_x_f16): Likewise.
12166 (__arm_vrndpq_x_f32): Likewise.
12167 (__arm_vrndaq_x_f16): Likewise.
12168 (__arm_vrndaq_x_f32): Likewise.
12169 (__arm_vrndxq_x_f16): Likewise.
12170 (__arm_vrndxq_x_f32): Likewise.
12171 (__arm_vandq_x_f16): Likewise.
12172 (__arm_vandq_x_f32): Likewise.
12173 (__arm_vbicq_x_f16): Likewise.
12174 (__arm_vbicq_x_f32): Likewise.
12175 (__arm_vbrsrq_x_n_f16): Likewise.
12176 (__arm_vbrsrq_x_n_f32): Likewise.
12177 (__arm_veorq_x_f16): Likewise.
12178 (__arm_veorq_x_f32): Likewise.
12179 (__arm_vornq_x_f16): Likewise.
12180 (__arm_vornq_x_f32): Likewise.
12181 (__arm_vorrq_x_f16): Likewise.
12182 (__arm_vorrq_x_f32): Likewise.
12183 (__arm_vrev32q_x_f16): Likewise.
12184 (__arm_vrev64q_x_f16): Likewise.
12185 (__arm_vrev64q_x_f32): Likewise.
12186 (vabdq_x): Define polymorphic variant.
12187 (vabsq_x): Likewise.
12188 (vaddq_x): Likewise.
12189 (vandq_x): Likewise.
12190 (vbicq_x): Likewise.
12191 (vbrsrq_x): Likewise.
12192 (vcaddq_rot270_x): Likewise.
12193 (vcaddq_rot90_x): Likewise.
12194 (vcmulq_rot180_x): Likewise.
12195 (vcmulq_rot270_x): Likewise.
12196 (vcmulq_x): Likewise.
12197 (vcvtq_x): Likewise.
12198 (vcvtq_x_n): Likewise.
12199 (vcvtnq_m): Likewise.
12200 (veorq_x): Likewise.
12201 (vmaxnmq_x): Likewise.
12202 (vminnmq_x): Likewise.
12203 (vmulq_x): Likewise.
12204 (vnegq_x): Likewise.
12205 (vornq_x): Likewise.
12206 (vorrq_x): Likewise.
12207 (vrev32q_x): Likewise.
12208 (vrev64q_x): Likewise.
12209 (vrndaq_x): Likewise.
12210 (vrndmq_x): Likewise.
12211 (vrndnq_x): Likewise.
12212 (vrndpq_x): Likewise.
12213 (vrndq_x): Likewise.
12214 (vrndxq_x): Likewise.
12215 (vsubq_x): Likewise.
12216 (vcmulq_rot90_x): Likewise.
12217 (vadciq): Likewise.
12218 (vclsq_x): Likewise.
12219 (vclzq_x): Likewise.
12220 (vhaddq_x): Likewise.
12221 (vhcaddq_rot270_x): Likewise.
12222 (vhcaddq_rot90_x): Likewise.
12223 (vhsubq_x): Likewise.
12224 (vmaxq_x): Likewise.
12225 (vminq_x): Likewise.
12226 (vmovlbq_x): Likewise.
12227 (vmovltq_x): Likewise.
12228 (vmulhq_x): Likewise.
12229 (vmullbq_int_x): Likewise.
12230 (vmullbq_poly_x): Likewise.
12231 (vmulltq_int_x): Likewise.
12232 (vmulltq_poly_x): Likewise.
12233 (vmvnq_x): Likewise.
12234 (vrev16q_x): Likewise.
12235 (vrhaddq_x): Likewise.
12236 (vrmulhq_x): Likewise.
12237 (vrshlq_x): Likewise.
12238 (vrshrq_x): Likewise.
12239 (vshllbq_x): Likewise.
12240 (vshlltq_x): Likewise.
12241 (vshlq_x_n): Likewise.
12242 (vshlq_x): Likewise.
12243 (vdwdupq_x_u8): Likewise.
12244 (vdwdupq_x_u16): Likewise.
12245 (vdwdupq_x_u32): Likewise.
12246 (viwdupq_x_u8): Likewise.
12247 (viwdupq_x_u16): Likewise.
12248 (viwdupq_x_u32): Likewise.
12249 (vidupq_x_u8): Likewise.
12250 (vddupq_x_u8): Likewise.
12251 (vidupq_x_u16): Likewise.
12252 (vddupq_x_u16): Likewise.
12253 (vidupq_x_u32): Likewise.
12254 (vddupq_x_u32): Likewise.
12255 (vshrq_x): Likewise.
12257 2020-03-20 Richard Biener <rguenther@suse.de>
12259 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
12260 to vectorize for CTOR defs.
12262 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12263 Andre Vieira <andre.simoesdiasvieira@arm.com>
12264 Mihail Ionescu <mihail.ionescu@arm.com>
12266 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
12268 (LDRGBWBU_QUALIFIERS): Likewise.
12269 (LDRGBWBS_Z_QUALIFIERS): Likewise.
12270 (LDRGBWBU_Z_QUALIFIERS): Likewise.
12271 (STRSBWBS_QUALIFIERS): Likewise.
12272 (STRSBWBU_QUALIFIERS): Likewise.
12273 (STRSBWBS_P_QUALIFIERS): Likewise.
12274 (STRSBWBU_P_QUALIFIERS): Likewise.
12275 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
12276 (vldrdq_gather_base_wb_u64): Likewise.
12277 (vldrdq_gather_base_wb_z_s64): Likewise.
12278 (vldrdq_gather_base_wb_z_u64): Likewise.
12279 (vldrwq_gather_base_wb_f32): Likewise.
12280 (vldrwq_gather_base_wb_s32): Likewise.
12281 (vldrwq_gather_base_wb_u32): Likewise.
12282 (vldrwq_gather_base_wb_z_f32): Likewise.
12283 (vldrwq_gather_base_wb_z_s32): Likewise.
12284 (vldrwq_gather_base_wb_z_u32): Likewise.
12285 (vstrdq_scatter_base_wb_p_s64): Likewise.
12286 (vstrdq_scatter_base_wb_p_u64): Likewise.
12287 (vstrdq_scatter_base_wb_s64): Likewise.
12288 (vstrdq_scatter_base_wb_u64): Likewise.
12289 (vstrwq_scatter_base_wb_p_s32): Likewise.
12290 (vstrwq_scatter_base_wb_p_f32): Likewise.
12291 (vstrwq_scatter_base_wb_p_u32): Likewise.
12292 (vstrwq_scatter_base_wb_s32): Likewise.
12293 (vstrwq_scatter_base_wb_u32): Likewise.
12294 (vstrwq_scatter_base_wb_f32): Likewise.
12295 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
12296 (__arm_vldrdq_gather_base_wb_u64): Likewise.
12297 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
12298 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
12299 (__arm_vldrwq_gather_base_wb_s32): Likewise.
12300 (__arm_vldrwq_gather_base_wb_u32): Likewise.
12301 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
12302 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
12303 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
12304 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
12305 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
12306 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
12307 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
12308 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
12309 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
12310 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
12311 (__arm_vldrwq_gather_base_wb_f32): Likewise.
12312 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
12313 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
12314 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
12315 (vstrwq_scatter_base_wb): Define polymorphic variant.
12316 (vstrwq_scatter_base_wb_p): Likewise.
12317 (vstrdq_scatter_base_wb_p): Likewise.
12318 (vstrdq_scatter_base_wb): Likewise.
12319 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
12321 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
12323 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
12324 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
12325 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
12326 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
12327 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
12328 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
12329 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
12330 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
12331 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
12332 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
12333 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
12334 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
12335 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
12336 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
12337 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
12338 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
12339 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
12340 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
12341 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
12342 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
12343 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
12344 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
12345 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
12346 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
12347 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
12348 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
12349 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
12350 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
12351 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
12353 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12354 Andre Vieira <andre.simoesdiasvieira@arm.com>
12355 Mihail Ionescu <mihail.ionescu@arm.com>
12357 * config/arm/arm-builtins.c
12358 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
12360 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
12361 (vddupq_m_n_u32): Likewise.
12362 (vddupq_m_n_u16): Likewise.
12363 (vddupq_m_wb_u8): Likewise.
12364 (vddupq_m_wb_u16): Likewise.
12365 (vddupq_m_wb_u32): Likewise.
12366 (vddupq_n_u8): Likewise.
12367 (vddupq_n_u32): Likewise.
12368 (vddupq_n_u16): Likewise.
12369 (vddupq_wb_u8): Likewise.
12370 (vddupq_wb_u16): Likewise.
12371 (vddupq_wb_u32): Likewise.
12372 (vdwdupq_m_n_u8): Likewise.
12373 (vdwdupq_m_n_u32): Likewise.
12374 (vdwdupq_m_n_u16): Likewise.
12375 (vdwdupq_m_wb_u8): Likewise.
12376 (vdwdupq_m_wb_u32): Likewise.
12377 (vdwdupq_m_wb_u16): Likewise.
12378 (vdwdupq_n_u8): Likewise.
12379 (vdwdupq_n_u32): Likewise.
12380 (vdwdupq_n_u16): Likewise.
12381 (vdwdupq_wb_u8): Likewise.
12382 (vdwdupq_wb_u32): Likewise.
12383 (vdwdupq_wb_u16): Likewise.
12384 (vidupq_m_n_u8): Likewise.
12385 (vidupq_m_n_u32): Likewise.
12386 (vidupq_m_n_u16): Likewise.
12387 (vidupq_m_wb_u8): Likewise.
12388 (vidupq_m_wb_u16): Likewise.
12389 (vidupq_m_wb_u32): Likewise.
12390 (vidupq_n_u8): Likewise.
12391 (vidupq_n_u32): Likewise.
12392 (vidupq_n_u16): Likewise.
12393 (vidupq_wb_u8): Likewise.
12394 (vidupq_wb_u16): Likewise.
12395 (vidupq_wb_u32): Likewise.
12396 (viwdupq_m_n_u8): Likewise.
12397 (viwdupq_m_n_u32): Likewise.
12398 (viwdupq_m_n_u16): Likewise.
12399 (viwdupq_m_wb_u8): Likewise.
12400 (viwdupq_m_wb_u32): Likewise.
12401 (viwdupq_m_wb_u16): Likewise.
12402 (viwdupq_n_u8): Likewise.
12403 (viwdupq_n_u32): Likewise.
12404 (viwdupq_n_u16): Likewise.
12405 (viwdupq_wb_u8): Likewise.
12406 (viwdupq_wb_u32): Likewise.
12407 (viwdupq_wb_u16): Likewise.
12408 (__arm_vddupq_m_n_u8): Define intrinsic.
12409 (__arm_vddupq_m_n_u32): Likewise.
12410 (__arm_vddupq_m_n_u16): Likewise.
12411 (__arm_vddupq_m_wb_u8): Likewise.
12412 (__arm_vddupq_m_wb_u16): Likewise.
12413 (__arm_vddupq_m_wb_u32): Likewise.
12414 (__arm_vddupq_n_u8): Likewise.
12415 (__arm_vddupq_n_u32): Likewise.
12416 (__arm_vddupq_n_u16): Likewise.
12417 (__arm_vdwdupq_m_n_u8): Likewise.
12418 (__arm_vdwdupq_m_n_u32): Likewise.
12419 (__arm_vdwdupq_m_n_u16): Likewise.
12420 (__arm_vdwdupq_m_wb_u8): Likewise.
12421 (__arm_vdwdupq_m_wb_u32): Likewise.
12422 (__arm_vdwdupq_m_wb_u16): Likewise.
12423 (__arm_vdwdupq_n_u8): Likewise.
12424 (__arm_vdwdupq_n_u32): Likewise.
12425 (__arm_vdwdupq_n_u16): Likewise.
12426 (__arm_vdwdupq_wb_u8): Likewise.
12427 (__arm_vdwdupq_wb_u32): Likewise.
12428 (__arm_vdwdupq_wb_u16): Likewise.
12429 (__arm_vidupq_m_n_u8): Likewise.
12430 (__arm_vidupq_m_n_u32): Likewise.
12431 (__arm_vidupq_m_n_u16): Likewise.
12432 (__arm_vidupq_n_u8): Likewise.
12433 (__arm_vidupq_m_wb_u8): Likewise.
12434 (__arm_vidupq_m_wb_u16): Likewise.
12435 (__arm_vidupq_m_wb_u32): Likewise.
12436 (__arm_vidupq_n_u32): Likewise.
12437 (__arm_vidupq_n_u16): Likewise.
12438 (__arm_vidupq_wb_u8): Likewise.
12439 (__arm_vidupq_wb_u16): Likewise.
12440 (__arm_vidupq_wb_u32): Likewise.
12441 (__arm_vddupq_wb_u8): Likewise.
12442 (__arm_vddupq_wb_u16): Likewise.
12443 (__arm_vddupq_wb_u32): Likewise.
12444 (__arm_viwdupq_m_n_u8): Likewise.
12445 (__arm_viwdupq_m_n_u32): Likewise.
12446 (__arm_viwdupq_m_n_u16): Likewise.
12447 (__arm_viwdupq_m_wb_u8): Likewise.
12448 (__arm_viwdupq_m_wb_u32): Likewise.
12449 (__arm_viwdupq_m_wb_u16): Likewise.
12450 (__arm_viwdupq_n_u8): Likewise.
12451 (__arm_viwdupq_n_u32): Likewise.
12452 (__arm_viwdupq_n_u16): Likewise.
12453 (__arm_viwdupq_wb_u8): Likewise.
12454 (__arm_viwdupq_wb_u32): Likewise.
12455 (__arm_viwdupq_wb_u16): Likewise.
12456 (vidupq_m): Define polymorphic variant.
12457 (vddupq_m): Likewise.
12458 (vidupq_u16): Likewise.
12459 (vidupq_u32): Likewise.
12460 (vidupq_u8): Likewise.
12461 (vddupq_u16): Likewise.
12462 (vddupq_u32): Likewise.
12463 (vddupq_u8): Likewise.
12464 (viwdupq_m): Likewise.
12465 (viwdupq_u16): Likewise.
12466 (viwdupq_u32): Likewise.
12467 (viwdupq_u8): Likewise.
12468 (vdwdupq_m): Likewise.
12469 (vdwdupq_u16): Likewise.
12470 (vdwdupq_u32): Likewise.
12471 (vdwdupq_u8): Likewise.
12472 * config/arm/arm_mve_builtins.def
12473 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
12475 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
12476 (mve_vidupq_u<mode>_insn): Likewise.
12477 (mve_vidupq_m_n_u<mode>): Likewise.
12478 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
12479 (mve_vddupq_n_u<mode>): Likewise.
12480 (mve_vddupq_u<mode>_insn): Likewise.
12481 (mve_vddupq_m_n_u<mode>): Likewise.
12482 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
12483 (mve_vdwdupq_n_u<mode>): Likewise.
12484 (mve_vdwdupq_wb_u<mode>): Likewise.
12485 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
12486 (mve_vdwdupq_m_n_u<mode>): Likewise.
12487 (mve_vdwdupq_m_wb_u<mode>): Likewise.
12488 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
12489 (mve_viwdupq_n_u<mode>): Likewise.
12490 (mve_viwdupq_wb_u<mode>): Likewise.
12491 (mve_viwdupq_wb_u<mode>_insn): Likewise.
12492 (mve_viwdupq_m_n_u<mode>): Likewise.
12493 (mve_viwdupq_m_wb_u<mode>): Likewise.
12494 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
12496 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12498 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
12499 (vreinterpretq_s16_s64): Likewise.
12500 (vreinterpretq_s16_s8): Likewise.
12501 (vreinterpretq_s16_u16): Likewise.
12502 (vreinterpretq_s16_u32): Likewise.
12503 (vreinterpretq_s16_u64): Likewise.
12504 (vreinterpretq_s16_u8): Likewise.
12505 (vreinterpretq_s32_s16): Likewise.
12506 (vreinterpretq_s32_s64): Likewise.
12507 (vreinterpretq_s32_s8): Likewise.
12508 (vreinterpretq_s32_u16): Likewise.
12509 (vreinterpretq_s32_u32): Likewise.
12510 (vreinterpretq_s32_u64): Likewise.
12511 (vreinterpretq_s32_u8): Likewise.
12512 (vreinterpretq_s64_s16): Likewise.
12513 (vreinterpretq_s64_s32): Likewise.
12514 (vreinterpretq_s64_s8): Likewise.
12515 (vreinterpretq_s64_u16): Likewise.
12516 (vreinterpretq_s64_u32): Likewise.
12517 (vreinterpretq_s64_u64): Likewise.
12518 (vreinterpretq_s64_u8): Likewise.
12519 (vreinterpretq_s8_s16): Likewise.
12520 (vreinterpretq_s8_s32): Likewise.
12521 (vreinterpretq_s8_s64): Likewise.
12522 (vreinterpretq_s8_u16): Likewise.
12523 (vreinterpretq_s8_u32): Likewise.
12524 (vreinterpretq_s8_u64): Likewise.
12525 (vreinterpretq_s8_u8): Likewise.
12526 (vreinterpretq_u16_s16): Likewise.
12527 (vreinterpretq_u16_s32): Likewise.
12528 (vreinterpretq_u16_s64): Likewise.
12529 (vreinterpretq_u16_s8): Likewise.
12530 (vreinterpretq_u16_u32): Likewise.
12531 (vreinterpretq_u16_u64): Likewise.
12532 (vreinterpretq_u16_u8): Likewise.
12533 (vreinterpretq_u32_s16): Likewise.
12534 (vreinterpretq_u32_s32): Likewise.
12535 (vreinterpretq_u32_s64): Likewise.
12536 (vreinterpretq_u32_s8): Likewise.
12537 (vreinterpretq_u32_u16): Likewise.
12538 (vreinterpretq_u32_u64): Likewise.
12539 (vreinterpretq_u32_u8): Likewise.
12540 (vreinterpretq_u64_s16): Likewise.
12541 (vreinterpretq_u64_s32): Likewise.
12542 (vreinterpretq_u64_s64): Likewise.
12543 (vreinterpretq_u64_s8): Likewise.
12544 (vreinterpretq_u64_u16): Likewise.
12545 (vreinterpretq_u64_u32): Likewise.
12546 (vreinterpretq_u64_u8): Likewise.
12547 (vreinterpretq_u8_s16): Likewise.
12548 (vreinterpretq_u8_s32): Likewise.
12549 (vreinterpretq_u8_s64): Likewise.
12550 (vreinterpretq_u8_s8): Likewise.
12551 (vreinterpretq_u8_u16): Likewise.
12552 (vreinterpretq_u8_u32): Likewise.
12553 (vreinterpretq_u8_u64): Likewise.
12554 (vreinterpretq_s32_f16): Likewise.
12555 (vreinterpretq_s32_f32): Likewise.
12556 (vreinterpretq_u16_f16): Likewise.
12557 (vreinterpretq_u16_f32): Likewise.
12558 (vreinterpretq_u32_f16): Likewise.
12559 (vreinterpretq_u32_f32): Likewise.
12560 (vreinterpretq_u64_f16): Likewise.
12561 (vreinterpretq_u64_f32): Likewise.
12562 (vreinterpretq_u8_f16): Likewise.
12563 (vreinterpretq_u8_f32): Likewise.
12564 (vreinterpretq_f16_f32): Likewise.
12565 (vreinterpretq_f16_s16): Likewise.
12566 (vreinterpretq_f16_s32): Likewise.
12567 (vreinterpretq_f16_s64): Likewise.
12568 (vreinterpretq_f16_s8): Likewise.
12569 (vreinterpretq_f16_u16): Likewise.
12570 (vreinterpretq_f16_u32): Likewise.
12571 (vreinterpretq_f16_u64): Likewise.
12572 (vreinterpretq_f16_u8): Likewise.
12573 (vreinterpretq_f32_f16): Likewise.
12574 (vreinterpretq_f32_s16): Likewise.
12575 (vreinterpretq_f32_s32): Likewise.
12576 (vreinterpretq_f32_s64): Likewise.
12577 (vreinterpretq_f32_s8): Likewise.
12578 (vreinterpretq_f32_u16): Likewise.
12579 (vreinterpretq_f32_u32): Likewise.
12580 (vreinterpretq_f32_u64): Likewise.
12581 (vreinterpretq_f32_u8): Likewise.
12582 (vreinterpretq_s16_f16): Likewise.
12583 (vreinterpretq_s16_f32): Likewise.
12584 (vreinterpretq_s64_f16): Likewise.
12585 (vreinterpretq_s64_f32): Likewise.
12586 (vreinterpretq_s8_f16): Likewise.
12587 (vreinterpretq_s8_f32): Likewise.
12588 (vuninitializedq_u8): Likewise.
12589 (vuninitializedq_u16): Likewise.
12590 (vuninitializedq_u32): Likewise.
12591 (vuninitializedq_u64): Likewise.
12592 (vuninitializedq_s8): Likewise.
12593 (vuninitializedq_s16): Likewise.
12594 (vuninitializedq_s32): Likewise.
12595 (vuninitializedq_s64): Likewise.
12596 (vuninitializedq_f16): Likewise.
12597 (vuninitializedq_f32): Likewise.
12598 (__arm_vuninitializedq_u8): Define intrinsic.
12599 (__arm_vuninitializedq_u16): Likewise.
12600 (__arm_vuninitializedq_u32): Likewise.
12601 (__arm_vuninitializedq_u64): Likewise.
12602 (__arm_vuninitializedq_s8): Likewise.
12603 (__arm_vuninitializedq_s16): Likewise.
12604 (__arm_vuninitializedq_s32): Likewise.
12605 (__arm_vuninitializedq_s64): Likewise.
12606 (__arm_vreinterpretq_s16_s32): Likewise.
12607 (__arm_vreinterpretq_s16_s64): Likewise.
12608 (__arm_vreinterpretq_s16_s8): Likewise.
12609 (__arm_vreinterpretq_s16_u16): Likewise.
12610 (__arm_vreinterpretq_s16_u32): Likewise.
12611 (__arm_vreinterpretq_s16_u64): Likewise.
12612 (__arm_vreinterpretq_s16_u8): Likewise.
12613 (__arm_vreinterpretq_s32_s16): Likewise.
12614 (__arm_vreinterpretq_s32_s64): Likewise.
12615 (__arm_vreinterpretq_s32_s8): Likewise.
12616 (__arm_vreinterpretq_s32_u16): Likewise.
12617 (__arm_vreinterpretq_s32_u32): Likewise.
12618 (__arm_vreinterpretq_s32_u64): Likewise.
12619 (__arm_vreinterpretq_s32_u8): Likewise.
12620 (__arm_vreinterpretq_s64_s16): Likewise.
12621 (__arm_vreinterpretq_s64_s32): Likewise.
12622 (__arm_vreinterpretq_s64_s8): Likewise.
12623 (__arm_vreinterpretq_s64_u16): Likewise.
12624 (__arm_vreinterpretq_s64_u32): Likewise.
12625 (__arm_vreinterpretq_s64_u64): Likewise.
12626 (__arm_vreinterpretq_s64_u8): Likewise.
12627 (__arm_vreinterpretq_s8_s16): Likewise.
12628 (__arm_vreinterpretq_s8_s32): Likewise.
12629 (__arm_vreinterpretq_s8_s64): Likewise.
12630 (__arm_vreinterpretq_s8_u16): Likewise.
12631 (__arm_vreinterpretq_s8_u32): Likewise.
12632 (__arm_vreinterpretq_s8_u64): Likewise.
12633 (__arm_vreinterpretq_s8_u8): Likewise.
12634 (__arm_vreinterpretq_u16_s16): Likewise.
12635 (__arm_vreinterpretq_u16_s32): Likewise.
12636 (__arm_vreinterpretq_u16_s64): Likewise.
12637 (__arm_vreinterpretq_u16_s8): Likewise.
12638 (__arm_vreinterpretq_u16_u32): Likewise.
12639 (__arm_vreinterpretq_u16_u64): Likewise.
12640 (__arm_vreinterpretq_u16_u8): Likewise.
12641 (__arm_vreinterpretq_u32_s16): Likewise.
12642 (__arm_vreinterpretq_u32_s32): Likewise.
12643 (__arm_vreinterpretq_u32_s64): Likewise.
12644 (__arm_vreinterpretq_u32_s8): Likewise.
12645 (__arm_vreinterpretq_u32_u16): Likewise.
12646 (__arm_vreinterpretq_u32_u64): Likewise.
12647 (__arm_vreinterpretq_u32_u8): Likewise.
12648 (__arm_vreinterpretq_u64_s16): Likewise.
12649 (__arm_vreinterpretq_u64_s32): Likewise.
12650 (__arm_vreinterpretq_u64_s64): Likewise.
12651 (__arm_vreinterpretq_u64_s8): Likewise.
12652 (__arm_vreinterpretq_u64_u16): Likewise.
12653 (__arm_vreinterpretq_u64_u32): Likewise.
12654 (__arm_vreinterpretq_u64_u8): Likewise.
12655 (__arm_vreinterpretq_u8_s16): Likewise.
12656 (__arm_vreinterpretq_u8_s32): Likewise.
12657 (__arm_vreinterpretq_u8_s64): Likewise.
12658 (__arm_vreinterpretq_u8_s8): Likewise.
12659 (__arm_vreinterpretq_u8_u16): Likewise.
12660 (__arm_vreinterpretq_u8_u32): Likewise.
12661 (__arm_vreinterpretq_u8_u64): Likewise.
12662 (__arm_vuninitializedq_f16): Likewise.
12663 (__arm_vuninitializedq_f32): Likewise.
12664 (__arm_vreinterpretq_s32_f16): Likewise.
12665 (__arm_vreinterpretq_s32_f32): Likewise.
12666 (__arm_vreinterpretq_s16_f16): Likewise.
12667 (__arm_vreinterpretq_s16_f32): Likewise.
12668 (__arm_vreinterpretq_s64_f16): Likewise.
12669 (__arm_vreinterpretq_s64_f32): Likewise.
12670 (__arm_vreinterpretq_s8_f16): Likewise.
12671 (__arm_vreinterpretq_s8_f32): Likewise.
12672 (__arm_vreinterpretq_u16_f16): Likewise.
12673 (__arm_vreinterpretq_u16_f32): Likewise.
12674 (__arm_vreinterpretq_u32_f16): Likewise.
12675 (__arm_vreinterpretq_u32_f32): Likewise.
12676 (__arm_vreinterpretq_u64_f16): Likewise.
12677 (__arm_vreinterpretq_u64_f32): Likewise.
12678 (__arm_vreinterpretq_u8_f16): Likewise.
12679 (__arm_vreinterpretq_u8_f32): Likewise.
12680 (__arm_vreinterpretq_f16_f32): Likewise.
12681 (__arm_vreinterpretq_f16_s16): Likewise.
12682 (__arm_vreinterpretq_f16_s32): Likewise.
12683 (__arm_vreinterpretq_f16_s64): Likewise.
12684 (__arm_vreinterpretq_f16_s8): Likewise.
12685 (__arm_vreinterpretq_f16_u16): Likewise.
12686 (__arm_vreinterpretq_f16_u32): Likewise.
12687 (__arm_vreinterpretq_f16_u64): Likewise.
12688 (__arm_vreinterpretq_f16_u8): Likewise.
12689 (__arm_vreinterpretq_f32_f16): Likewise.
12690 (__arm_vreinterpretq_f32_s16): Likewise.
12691 (__arm_vreinterpretq_f32_s32): Likewise.
12692 (__arm_vreinterpretq_f32_s64): Likewise.
12693 (__arm_vreinterpretq_f32_s8): Likewise.
12694 (__arm_vreinterpretq_f32_u16): Likewise.
12695 (__arm_vreinterpretq_f32_u32): Likewise.
12696 (__arm_vreinterpretq_f32_u64): Likewise.
12697 (__arm_vreinterpretq_f32_u8): Likewise.
12698 (vuninitializedq): Define polymorphic variant.
12699 (vreinterpretq_f16): Likewise.
12700 (vreinterpretq_f32): Likewise.
12701 (vreinterpretq_s16): Likewise.
12702 (vreinterpretq_s32): Likewise.
12703 (vreinterpretq_s64): Likewise.
12704 (vreinterpretq_s8): Likewise.
12705 (vreinterpretq_u16): Likewise.
12706 (vreinterpretq_u32): Likewise.
12707 (vreinterpretq_u64): Likewise.
12708 (vreinterpretq_u8): Likewise.
12710 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12711 Andre Vieira <andre.simoesdiasvieira@arm.com>
12712 Mihail Ionescu <mihail.ionescu@arm.com>
12714 * config/arm/arm_mve.h (vaddq_s8): Define macro.
12715 (vaddq_s16): Likewise.
12716 (vaddq_s32): Likewise.
12717 (vaddq_u8): Likewise.
12718 (vaddq_u16): Likewise.
12719 (vaddq_u32): Likewise.
12720 (vaddq_f16): Likewise.
12721 (vaddq_f32): Likewise.
12722 (__arm_vaddq_s8): Define intrinsic.
12723 (__arm_vaddq_s16): Likewise.
12724 (__arm_vaddq_s32): Likewise.
12725 (__arm_vaddq_u8): Likewise.
12726 (__arm_vaddq_u16): Likewise.
12727 (__arm_vaddq_u32): Likewise.
12728 (__arm_vaddq_f16): Likewise.
12729 (__arm_vaddq_f32): Likewise.
12730 (vaddq): Define polymorphic variant.
12731 * config/arm/iterators.md (VNIM): Define mode iterator for common types
12732 Neon, IWMMXT and MVE.
12733 (VNINOTM): Likewise.
12734 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
12735 (mve_vaddq_f<mode>): Define RTL pattern.
12736 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
12737 (addv8hf3_neon): Define RTL pattern.
12738 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
12740 (addv8hf3): Define standard RTL pattern for MVE and Neon.
12741 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
12743 2020-03-20 Martin Liska <mliska@suse.cz>
12746 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
12747 build_ref_for_offset function was used and it transforms off to bytes
12750 2020-03-20 Richard Biener <rguenther@suse.de>
12752 PR tree-optimization/94266
12753 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
12754 type of the underlying object to adjust for the containing
12755 field if available.
12757 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12759 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
12760 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
12761 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
12763 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12765 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
12767 2020-03-20 Jakub Jelinek <jakub@redhat.com>
12769 PR tree-optimization/94224
12770 * gimple-ssa-store-merging.c
12771 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
12772 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
12775 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12777 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
12779 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
12782 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
12783 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
12785 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
12788 * cgraphunit.c (process_function_and_variable_attributes): warn
12789 for flatten attribute on alias.
12790 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
12792 2020-03-19 Martin Liska <mliska@suse.cz>
12794 * lto-section-in.c: Add ext_symtab.
12795 * lto-streamer-out.c (write_symbol_extension_info): New.
12796 (produce_symtab_extension): New.
12797 (produce_asm_for_decls): Stream also produce_symtab_extension.
12798 * lto-streamer.h (enum lto_section_type): New section.
12800 2020-03-19 Jakub Jelinek <jakub@redhat.com>
12802 PR tree-optimization/94211
12803 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
12804 instead of estimate_num_insns for bb_seq (middle_bb). Rename
12805 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
12808 2020-03-19 Richard Biener <rguenther@suse.de>
12811 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
12812 and build_ref_for_offset.
12814 2020-03-19 Richard Biener <rguenther@suse.de>
12816 PR middle-end/94216
12817 * fold-const.c (fold_binary_loc): Avoid using
12818 build_fold_addr_expr when we really want an ADDR_EXPR.
12820 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
12822 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
12825 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
12827 PR rtl-optimization/90275
12828 * cse.c (cse_insn): Delete no-op register moves too.
12830 2020-03-18 Martin Sebor <msebor@redhat.com>
12833 * cgraphunit.c (process_function_and_variable_attributes): Also
12834 complain about weakref function definitions and drop all effects
12837 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12838 Mihail Ionescu <mihail.ionescu@arm.com>
12839 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12841 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
12842 (vstrdq_scatter_base_p_u64): Likewise.
12843 (vstrdq_scatter_base_s64): Likewise.
12844 (vstrdq_scatter_base_u64): Likewise.
12845 (vstrdq_scatter_offset_p_s64): Likewise.
12846 (vstrdq_scatter_offset_p_u64): Likewise.
12847 (vstrdq_scatter_offset_s64): Likewise.
12848 (vstrdq_scatter_offset_u64): Likewise.
12849 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
12850 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
12851 (vstrdq_scatter_shifted_offset_s64): Likewise.
12852 (vstrdq_scatter_shifted_offset_u64): Likewise.
12853 (vstrhq_scatter_offset_f16): Likewise.
12854 (vstrhq_scatter_offset_p_f16): Likewise.
12855 (vstrhq_scatter_shifted_offset_f16): Likewise.
12856 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
12857 (vstrwq_scatter_base_f32): Likewise.
12858 (vstrwq_scatter_base_p_f32): Likewise.
12859 (vstrwq_scatter_offset_f32): Likewise.
12860 (vstrwq_scatter_offset_p_f32): Likewise.
12861 (vstrwq_scatter_offset_p_s32): Likewise.
12862 (vstrwq_scatter_offset_p_u32): Likewise.
12863 (vstrwq_scatter_offset_s32): Likewise.
12864 (vstrwq_scatter_offset_u32): Likewise.
12865 (vstrwq_scatter_shifted_offset_f32): Likewise.
12866 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
12867 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
12868 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
12869 (vstrwq_scatter_shifted_offset_s32): Likewise.
12870 (vstrwq_scatter_shifted_offset_u32): Likewise.
12871 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
12872 (__arm_vstrdq_scatter_base_p_u64): Likewise.
12873 (__arm_vstrdq_scatter_base_s64): Likewise.
12874 (__arm_vstrdq_scatter_base_u64): Likewise.
12875 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
12876 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
12877 (__arm_vstrdq_scatter_offset_s64): Likewise.
12878 (__arm_vstrdq_scatter_offset_u64): Likewise.
12879 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
12880 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
12881 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
12882 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
12883 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
12884 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
12885 (__arm_vstrwq_scatter_offset_s32): Likewise.
12886 (__arm_vstrwq_scatter_offset_u32): Likewise.
12887 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
12888 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
12889 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
12890 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
12891 (__arm_vstrhq_scatter_offset_f16): Likewise.
12892 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
12893 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
12894 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
12895 (__arm_vstrwq_scatter_base_f32): Likewise.
12896 (__arm_vstrwq_scatter_base_p_f32): Likewise.
12897 (__arm_vstrwq_scatter_offset_f32): Likewise.
12898 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
12899 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
12900 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
12901 (vstrhq_scatter_offset): Define polymorphic variant.
12902 (vstrhq_scatter_offset_p): Likewise.
12903 (vstrhq_scatter_shifted_offset): Likewise.
12904 (vstrhq_scatter_shifted_offset_p): Likewise.
12905 (vstrwq_scatter_base): Likewise.
12906 (vstrwq_scatter_base_p): Likewise.
12907 (vstrwq_scatter_offset): Likewise.
12908 (vstrwq_scatter_offset_p): Likewise.
12909 (vstrwq_scatter_shifted_offset): Likewise.
12910 (vstrwq_scatter_shifted_offset_p): Likewise.
12911 (vstrdq_scatter_base_p): Likewise.
12912 (vstrdq_scatter_base): Likewise.
12913 (vstrdq_scatter_offset_p): Likewise.
12914 (vstrdq_scatter_offset): Likewise.
12915 (vstrdq_scatter_shifted_offset_p): Likewise.
12916 (vstrdq_scatter_shifted_offset): Likewise.
12917 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
12918 (STRSBS_P): Likewise.
12919 (STRSBU): Likewise.
12920 (STRSBU_P): Likewise.
12922 (STRSS_P): Likewise.
12924 (STRSU_P): Likewise.
12925 * config/arm/constraints.md (Ri): Define.
12926 * config/arm/mve.md (VSTRDSBQ): Define iterator.
12927 (VSTRDSOQ): Likewise.
12928 (VSTRDSSOQ): Likewise.
12929 (VSTRWSOQ): Likewise.
12930 (VSTRWSSOQ): Likewise.
12931 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
12932 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
12933 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
12934 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
12935 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
12936 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
12937 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
12938 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
12939 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
12940 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
12941 (mve_vstrwq_scatter_base_fv4sf): Likewise.
12942 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
12943 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
12944 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
12945 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
12946 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
12947 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
12948 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
12949 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
12950 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
12951 * config/arm/predicates.md (Ri): Define predicate to check immediate
12952 is the range +/-1016 and multiple of 8.
12954 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12955 Mihail Ionescu <mihail.ionescu@arm.com>
12956 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12958 * config/arm/arm_mve.h (vst1q_f32): Define macro.
12959 (vst1q_f16): Likewise.
12960 (vst1q_s8): Likewise.
12961 (vst1q_s32): Likewise.
12962 (vst1q_s16): Likewise.
12963 (vst1q_u8): Likewise.
12964 (vst1q_u32): Likewise.
12965 (vst1q_u16): Likewise.
12966 (vstrhq_f16): Likewise.
12967 (vstrhq_scatter_offset_s32): Likewise.
12968 (vstrhq_scatter_offset_s16): Likewise.
12969 (vstrhq_scatter_offset_u32): Likewise.
12970 (vstrhq_scatter_offset_u16): Likewise.
12971 (vstrhq_scatter_offset_p_s32): Likewise.
12972 (vstrhq_scatter_offset_p_s16): Likewise.
12973 (vstrhq_scatter_offset_p_u32): Likewise.
12974 (vstrhq_scatter_offset_p_u16): Likewise.
12975 (vstrhq_scatter_shifted_offset_s32): Likewise.
12976 (vstrhq_scatter_shifted_offset_s16): Likewise.
12977 (vstrhq_scatter_shifted_offset_u32): Likewise.
12978 (vstrhq_scatter_shifted_offset_u16): Likewise.
12979 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
12980 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
12981 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
12982 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
12983 (vstrhq_s32): Likewise.
12984 (vstrhq_s16): Likewise.
12985 (vstrhq_u32): Likewise.
12986 (vstrhq_u16): Likewise.
12987 (vstrhq_p_f16): Likewise.
12988 (vstrhq_p_s32): Likewise.
12989 (vstrhq_p_s16): Likewise.
12990 (vstrhq_p_u32): Likewise.
12991 (vstrhq_p_u16): Likewise.
12992 (vstrwq_f32): Likewise.
12993 (vstrwq_s32): Likewise.
12994 (vstrwq_u32): Likewise.
12995 (vstrwq_p_f32): Likewise.
12996 (vstrwq_p_s32): Likewise.
12997 (vstrwq_p_u32): Likewise.
12998 (__arm_vst1q_s8): Define intrinsic.
12999 (__arm_vst1q_s32): Likewise.
13000 (__arm_vst1q_s16): Likewise.
13001 (__arm_vst1q_u8): Likewise.
13002 (__arm_vst1q_u32): Likewise.
13003 (__arm_vst1q_u16): Likewise.
13004 (__arm_vstrhq_scatter_offset_s32): Likewise.
13005 (__arm_vstrhq_scatter_offset_s16): Likewise.
13006 (__arm_vstrhq_scatter_offset_u32): Likewise.
13007 (__arm_vstrhq_scatter_offset_u16): Likewise.
13008 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
13009 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
13010 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
13011 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
13012 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
13013 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
13014 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
13015 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
13016 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
13017 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
13018 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
13019 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
13020 (__arm_vstrhq_s32): Likewise.
13021 (__arm_vstrhq_s16): Likewise.
13022 (__arm_vstrhq_u32): Likewise.
13023 (__arm_vstrhq_u16): Likewise.
13024 (__arm_vstrhq_p_s32): Likewise.
13025 (__arm_vstrhq_p_s16): Likewise.
13026 (__arm_vstrhq_p_u32): Likewise.
13027 (__arm_vstrhq_p_u16): Likewise.
13028 (__arm_vstrwq_s32): Likewise.
13029 (__arm_vstrwq_u32): Likewise.
13030 (__arm_vstrwq_p_s32): Likewise.
13031 (__arm_vstrwq_p_u32): Likewise.
13032 (__arm_vstrwq_p_f32): Likewise.
13033 (__arm_vstrwq_f32): Likewise.
13034 (__arm_vst1q_f32): Likewise.
13035 (__arm_vst1q_f16): Likewise.
13036 (__arm_vstrhq_f16): Likewise.
13037 (__arm_vstrhq_p_f16): Likewise.
13038 (vst1q): Define polymorphic variant.
13039 (vstrhq): Likewise.
13040 (vstrhq_p): Likewise.
13041 (vstrhq_scatter_offset_p): Likewise.
13042 (vstrhq_scatter_offset): Likewise.
13043 (vstrhq_scatter_shifted_offset_p): Likewise.
13044 (vstrhq_scatter_shifted_offset): Likewise.
13045 (vstrwq_p): Likewise.
13046 (vstrwq): Likewise.
13047 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
13048 (STRS_P): Likewise.
13050 (STRSS_P): Likewise.
13052 (STRSU_P): Likewise.
13054 (STRU_P): Likewise.
13055 * config/arm/mve.md (VST1Q): Define iterator.
13056 (VSTRHSOQ): Likewise.
13057 (VSTRHSSOQ): Likewise.
13058 (VSTRHQ): Likewise.
13059 (VSTRWQ): Likewise.
13060 (mve_vstrhq_fv8hf): Define RTL pattern.
13061 (mve_vstrhq_p_fv8hf): Likewise.
13062 (mve_vstrhq_p_<supf><mode>): Likewise.
13063 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
13064 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
13065 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
13066 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
13067 (mve_vstrhq_<supf><mode>): Likewise.
13068 (mve_vstrwq_fv4sf): Likewise.
13069 (mve_vstrwq_p_fv4sf): Likewise.
13070 (mve_vstrwq_p_<supf>v4si): Likewise.
13071 (mve_vstrwq_<supf>v4si): Likewise.
13072 (mve_vst1q_f<mode>): Define expand.
13073 (mve_vst1q_<supf><mode>): Likewise.
13075 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13076 Mihail Ionescu <mihail.ionescu@arm.com>
13077 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13079 * config/arm/arm_mve.h (vld1q_s8): Define macro.
13080 (vld1q_s32): Likewise.
13081 (vld1q_s16): Likewise.
13082 (vld1q_u8): Likewise.
13083 (vld1q_u32): Likewise.
13084 (vld1q_u16): Likewise.
13085 (vldrhq_gather_offset_s32): Likewise.
13086 (vldrhq_gather_offset_s16): Likewise.
13087 (vldrhq_gather_offset_u32): Likewise.
13088 (vldrhq_gather_offset_u16): Likewise.
13089 (vldrhq_gather_offset_z_s32): Likewise.
13090 (vldrhq_gather_offset_z_s16): Likewise.
13091 (vldrhq_gather_offset_z_u32): Likewise.
13092 (vldrhq_gather_offset_z_u16): Likewise.
13093 (vldrhq_gather_shifted_offset_s32): Likewise.
13094 (vldrhq_gather_shifted_offset_s16): Likewise.
13095 (vldrhq_gather_shifted_offset_u32): Likewise.
13096 (vldrhq_gather_shifted_offset_u16): Likewise.
13097 (vldrhq_gather_shifted_offset_z_s32): Likewise.
13098 (vldrhq_gather_shifted_offset_z_s16): Likewise.
13099 (vldrhq_gather_shifted_offset_z_u32): Likewise.
13100 (vldrhq_gather_shifted_offset_z_u16): Likewise.
13101 (vldrhq_s32): Likewise.
13102 (vldrhq_s16): Likewise.
13103 (vldrhq_u32): Likewise.
13104 (vldrhq_u16): Likewise.
13105 (vldrhq_z_s32): Likewise.
13106 (vldrhq_z_s16): Likewise.
13107 (vldrhq_z_u32): Likewise.
13108 (vldrhq_z_u16): Likewise.
13109 (vldrwq_s32): Likewise.
13110 (vldrwq_u32): Likewise.
13111 (vldrwq_z_s32): Likewise.
13112 (vldrwq_z_u32): Likewise.
13113 (vld1q_f32): Likewise.
13114 (vld1q_f16): Likewise.
13115 (vldrhq_f16): Likewise.
13116 (vldrhq_z_f16): Likewise.
13117 (vldrwq_f32): Likewise.
13118 (vldrwq_z_f32): Likewise.
13119 (__arm_vld1q_s8): Define intrinsic.
13120 (__arm_vld1q_s32): Likewise.
13121 (__arm_vld1q_s16): Likewise.
13122 (__arm_vld1q_u8): Likewise.
13123 (__arm_vld1q_u32): Likewise.
13124 (__arm_vld1q_u16): Likewise.
13125 (__arm_vldrhq_gather_offset_s32): Likewise.
13126 (__arm_vldrhq_gather_offset_s16): Likewise.
13127 (__arm_vldrhq_gather_offset_u32): Likewise.
13128 (__arm_vldrhq_gather_offset_u16): Likewise.
13129 (__arm_vldrhq_gather_offset_z_s32): Likewise.
13130 (__arm_vldrhq_gather_offset_z_s16): Likewise.
13131 (__arm_vldrhq_gather_offset_z_u32): Likewise.
13132 (__arm_vldrhq_gather_offset_z_u16): Likewise.
13133 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
13134 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
13135 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
13136 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
13137 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
13138 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
13139 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
13140 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
13141 (__arm_vldrhq_s32): Likewise.
13142 (__arm_vldrhq_s16): Likewise.
13143 (__arm_vldrhq_u32): Likewise.
13144 (__arm_vldrhq_u16): Likewise.
13145 (__arm_vldrhq_z_s32): Likewise.
13146 (__arm_vldrhq_z_s16): Likewise.
13147 (__arm_vldrhq_z_u32): Likewise.
13148 (__arm_vldrhq_z_u16): Likewise.
13149 (__arm_vldrwq_s32): Likewise.
13150 (__arm_vldrwq_u32): Likewise.
13151 (__arm_vldrwq_z_s32): Likewise.
13152 (__arm_vldrwq_z_u32): Likewise.
13153 (__arm_vld1q_f32): Likewise.
13154 (__arm_vld1q_f16): Likewise.
13155 (__arm_vldrwq_f32): Likewise.
13156 (__arm_vldrwq_z_f32): Likewise.
13157 (__arm_vldrhq_z_f16): Likewise.
13158 (__arm_vldrhq_f16): Likewise.
13159 (vld1q): Define polymorphic variant.
13160 (vldrhq_gather_offset): Likewise.
13161 (vldrhq_gather_offset_z): Likewise.
13162 (vldrhq_gather_shifted_offset): Likewise.
13163 (vldrhq_gather_shifted_offset_z): Likewise.
13164 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
13166 (LDRU_Z): Likewise.
13167 (LDRS_Z): Likewise.
13168 (LDRGU_Z): Likewise.
13170 (LDRGS_Z): Likewise.
13172 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
13173 (V_sz_elem1): Likewise.
13174 (VLD1Q): Define iterator.
13175 (VLDRHGOQ): Likewise.
13176 (VLDRHGSOQ): Likewise.
13177 (VLDRHQ): Likewise.
13178 (VLDRWQ): Likewise.
13179 (mve_vldrhq_fv8hf): Define RTL pattern.
13180 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
13181 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
13182 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
13183 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
13184 (mve_vldrhq_<supf><mode>): Likewise.
13185 (mve_vldrhq_z_fv8hf): Likewise.
13186 (mve_vldrhq_z_<supf><mode>): Likewise.
13187 (mve_vldrwq_fv4sf): Likewise.
13188 (mve_vldrwq_<supf>v4si): Likewise.
13189 (mve_vldrwq_z_fv4sf): Likewise.
13190 (mve_vldrwq_z_<supf>v4si): Likewise.
13191 (mve_vld1q_f<mode>): Define RTL expand pattern.
13192 (mve_vld1q_<supf><mode>): Likewise.
13194 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13195 Mihail Ionescu <mihail.ionescu@arm.com>
13196 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13198 * config/arm/arm_mve.h (vld1q_s8): Define macro.
13199 (vld1q_s32): Likewise.
13200 (vld1q_s16): Likewise.
13201 (vld1q_u8): Likewise.
13202 (vld1q_u32): Likewise.
13203 (vld1q_u16): Likewise.
13204 (vldrhq_gather_offset_s32): Likewise.
13205 (vldrhq_gather_offset_s16): Likewise.
13206 (vldrhq_gather_offset_u32): Likewise.
13207 (vldrhq_gather_offset_u16): Likewise.
13208 (vldrhq_gather_offset_z_s32): Likewise.
13209 (vldrhq_gather_offset_z_s16): Likewise.
13210 (vldrhq_gather_offset_z_u32): Likewise.
13211 (vldrhq_gather_offset_z_u16): Likewise.
13212 (vldrhq_gather_shifted_offset_s32): Likewise.
13213 (vldrhq_gather_shifted_offset_s16): Likewise.
13214 (vldrhq_gather_shifted_offset_u32): Likewise.
13215 (vldrhq_gather_shifted_offset_u16): Likewise.
13216 (vldrhq_gather_shifted_offset_z_s32): Likewise.
13217 (vldrhq_gather_shifted_offset_z_s16): Likewise.
13218 (vldrhq_gather_shifted_offset_z_u32): Likewise.
13219 (vldrhq_gather_shifted_offset_z_u16): Likewise.
13220 (vldrhq_s32): Likewise.
13221 (vldrhq_s16): Likewise.
13222 (vldrhq_u32): Likewise.
13223 (vldrhq_u16): Likewise.
13224 (vldrhq_z_s32): Likewise.
13225 (vldrhq_z_s16): Likewise.
13226 (vldrhq_z_u32): Likewise.
13227 (vldrhq_z_u16): Likewise.
13228 (vldrwq_s32): Likewise.
13229 (vldrwq_u32): Likewise.
13230 (vldrwq_z_s32): Likewise.
13231 (vldrwq_z_u32): Likewise.
13232 (vld1q_f32): Likewise.
13233 (vld1q_f16): Likewise.
13234 (vldrhq_f16): Likewise.
13235 (vldrhq_z_f16): Likewise.
13236 (vldrwq_f32): Likewise.
13237 (vldrwq_z_f32): Likewise.
13238 (__arm_vld1q_s8): Define intrinsic.
13239 (__arm_vld1q_s32): Likewise.
13240 (__arm_vld1q_s16): Likewise.
13241 (__arm_vld1q_u8): Likewise.
13242 (__arm_vld1q_u32): Likewise.
13243 (__arm_vld1q_u16): Likewise.
13244 (__arm_vldrhq_gather_offset_s32): Likewise.
13245 (__arm_vldrhq_gather_offset_s16): Likewise.
13246 (__arm_vldrhq_gather_offset_u32): Likewise.
13247 (__arm_vldrhq_gather_offset_u16): Likewise.
13248 (__arm_vldrhq_gather_offset_z_s32): Likewise.
13249 (__arm_vldrhq_gather_offset_z_s16): Likewise.
13250 (__arm_vldrhq_gather_offset_z_u32): Likewise.
13251 (__arm_vldrhq_gather_offset_z_u16): Likewise.
13252 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
13253 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
13254 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
13255 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
13256 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
13257 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
13258 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
13259 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
13260 (__arm_vldrhq_s32): Likewise.
13261 (__arm_vldrhq_s16): Likewise.
13262 (__arm_vldrhq_u32): Likewise.
13263 (__arm_vldrhq_u16): Likewise.
13264 (__arm_vldrhq_z_s32): Likewise.
13265 (__arm_vldrhq_z_s16): Likewise.
13266 (__arm_vldrhq_z_u32): Likewise.
13267 (__arm_vldrhq_z_u16): Likewise.
13268 (__arm_vldrwq_s32): Likewise.
13269 (__arm_vldrwq_u32): Likewise.
13270 (__arm_vldrwq_z_s32): Likewise.
13271 (__arm_vldrwq_z_u32): Likewise.
13272 (__arm_vld1q_f32): Likewise.
13273 (__arm_vld1q_f16): Likewise.
13274 (__arm_vldrwq_f32): Likewise.
13275 (__arm_vldrwq_z_f32): Likewise.
13276 (__arm_vldrhq_z_f16): Likewise.
13277 (__arm_vldrhq_f16): Likewise.
13278 (vld1q): Define polymorphic variant.
13279 (vldrhq_gather_offset): Likewise.
13280 (vldrhq_gather_offset_z): Likewise.
13281 (vldrhq_gather_shifted_offset): Likewise.
13282 (vldrhq_gather_shifted_offset_z): Likewise.
13283 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
13285 (LDRU_Z): Likewise.
13286 (LDRS_Z): Likewise.
13287 (LDRGU_Z): Likewise.
13289 (LDRGS_Z): Likewise.
13291 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
13292 (V_sz_elem1): Likewise.
13293 (VLD1Q): Define iterator.
13294 (VLDRHGOQ): Likewise.
13295 (VLDRHGSOQ): Likewise.
13296 (VLDRHQ): Likewise.
13297 (VLDRWQ): Likewise.
13298 (mve_vldrhq_fv8hf): Define RTL pattern.
13299 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
13300 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
13301 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
13302 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
13303 (mve_vldrhq_<supf><mode>): Likewise.
13304 (mve_vldrhq_z_fv8hf): Likewise.
13305 (mve_vldrhq_z_<supf><mode>): Likewise.
13306 (mve_vldrwq_fv4sf): Likewise.
13307 (mve_vldrwq_<supf>v4si): Likewise.
13308 (mve_vldrwq_z_fv4sf): Likewise.
13309 (mve_vldrwq_z_<supf>v4si): Likewise.
13310 (mve_vld1q_f<mode>): Define RTL expand pattern.
13311 (mve_vld1q_<supf><mode>): Likewise.
13313 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13314 Mihail Ionescu <mihail.ionescu@arm.com>
13315 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13317 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
13319 (LDRGBU_Z_QUALIFIERS): Likewise.
13320 (LDRGS_Z_QUALIFIERS): Likewise.
13321 (LDRGU_Z_QUALIFIERS): Likewise.
13322 (LDRS_Z_QUALIFIERS): Likewise.
13323 (LDRU_Z_QUALIFIERS): Likewise.
13324 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
13325 (vldrbq_gather_offset_z_u8): Likewise.
13326 (vldrbq_gather_offset_z_s32): Likewise.
13327 (vldrbq_gather_offset_z_u16): Likewise.
13328 (vldrbq_gather_offset_z_u32): Likewise.
13329 (vldrbq_gather_offset_z_s8): Likewise.
13330 (vldrbq_z_s16): Likewise.
13331 (vldrbq_z_u8): Likewise.
13332 (vldrbq_z_s8): Likewise.
13333 (vldrbq_z_s32): Likewise.
13334 (vldrbq_z_u16): Likewise.
13335 (vldrbq_z_u32): Likewise.
13336 (vldrwq_gather_base_z_u32): Likewise.
13337 (vldrwq_gather_base_z_s32): Likewise.
13338 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
13339 (__arm_vldrbq_gather_offset_z_s32): Likewise.
13340 (__arm_vldrbq_gather_offset_z_s16): Likewise.
13341 (__arm_vldrbq_gather_offset_z_u8): Likewise.
13342 (__arm_vldrbq_gather_offset_z_u32): Likewise.
13343 (__arm_vldrbq_gather_offset_z_u16): Likewise.
13344 (__arm_vldrbq_z_s8): Likewise.
13345 (__arm_vldrbq_z_s32): Likewise.
13346 (__arm_vldrbq_z_s16): Likewise.
13347 (__arm_vldrbq_z_u8): Likewise.
13348 (__arm_vldrbq_z_u32): Likewise.
13349 (__arm_vldrbq_z_u16): Likewise.
13350 (__arm_vldrwq_gather_base_z_s32): Likewise.
13351 (__arm_vldrwq_gather_base_z_u32): Likewise.
13352 (vldrbq_gather_offset_z): Define polymorphic variant.
13353 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
13355 (LDRGBU_Z_QUALIFIERS): Likewise.
13356 (LDRGS_Z_QUALIFIERS): Likewise.
13357 (LDRGU_Z_QUALIFIERS): Likewise.
13358 (LDRS_Z_QUALIFIERS): Likewise.
13359 (LDRU_Z_QUALIFIERS): Likewise.
13360 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
13362 (mve_vldrbq_z_<supf><mode>): Likewise.
13363 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
13365 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13366 Mihail Ionescu <mihail.ionescu@arm.com>
13367 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13369 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
13371 (STRU_P_QUALIFIERS): Likewise.
13372 (STRSU_P_QUALIFIERS): Likewise.
13373 (STRSS_P_QUALIFIERS): Likewise.
13374 (STRSBS_P_QUALIFIERS): Likewise.
13375 (STRSBU_P_QUALIFIERS): Likewise.
13376 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
13377 (vstrbq_p_s32): Likewise.
13378 (vstrbq_p_s16): Likewise.
13379 (vstrbq_p_u8): Likewise.
13380 (vstrbq_p_u32): Likewise.
13381 (vstrbq_p_u16): Likewise.
13382 (vstrbq_scatter_offset_p_s8): Likewise.
13383 (vstrbq_scatter_offset_p_s32): Likewise.
13384 (vstrbq_scatter_offset_p_s16): Likewise.
13385 (vstrbq_scatter_offset_p_u8): Likewise.
13386 (vstrbq_scatter_offset_p_u32): Likewise.
13387 (vstrbq_scatter_offset_p_u16): Likewise.
13388 (vstrwq_scatter_base_p_s32): Likewise.
13389 (vstrwq_scatter_base_p_u32): Likewise.
13390 (__arm_vstrbq_p_s8): Define intrinsic.
13391 (__arm_vstrbq_p_s32): Likewise.
13392 (__arm_vstrbq_p_s16): Likewise.
13393 (__arm_vstrbq_p_u8): Likewise.
13394 (__arm_vstrbq_p_u32): Likewise.
13395 (__arm_vstrbq_p_u16): Likewise.
13396 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
13397 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
13398 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
13399 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
13400 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
13401 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
13402 (__arm_vstrwq_scatter_base_p_s32): Likewise.
13403 (__arm_vstrwq_scatter_base_p_u32): Likewise.
13404 (vstrbq_p): Define polymorphic variant.
13405 (vstrbq_scatter_offset_p): Likewise.
13406 (vstrwq_scatter_base_p): Likewise.
13407 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
13409 (STRU_P_QUALIFIERS): Likewise.
13410 (STRSU_P_QUALIFIERS): Likewise.
13411 (STRSS_P_QUALIFIERS): Likewise.
13412 (STRSBS_P_QUALIFIERS): Likewise.
13413 (STRSBU_P_QUALIFIERS): Likewise.
13414 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
13416 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
13417 (mve_vstrbq_p_<supf><mode>): Likewise.
13419 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13420 Mihail Ionescu <mihail.ionescu@arm.com>
13421 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13423 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
13425 (LDRGS_QUALIFIERS): Likewise.
13426 (LDRS_QUALIFIERS): Likewise.
13427 (LDRU_QUALIFIERS): Likewise.
13428 (LDRGBS_QUALIFIERS): Likewise.
13429 (LDRGBU_QUALIFIERS): Likewise.
13430 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
13431 (vldrbq_gather_offset_s8): Likewise.
13432 (vldrbq_s8): Likewise.
13433 (vldrbq_u8): Likewise.
13434 (vldrbq_gather_offset_u16): Likewise.
13435 (vldrbq_gather_offset_s16): Likewise.
13436 (vldrbq_s16): Likewise.
13437 (vldrbq_u16): Likewise.
13438 (vldrbq_gather_offset_u32): Likewise.
13439 (vldrbq_gather_offset_s32): Likewise.
13440 (vldrbq_s32): Likewise.
13441 (vldrbq_u32): Likewise.
13442 (vldrwq_gather_base_s32): Likewise.
13443 (vldrwq_gather_base_u32): Likewise.
13444 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
13445 (__arm_vldrbq_gather_offset_s8): Likewise.
13446 (__arm_vldrbq_s8): Likewise.
13447 (__arm_vldrbq_u8): Likewise.
13448 (__arm_vldrbq_gather_offset_u16): Likewise.
13449 (__arm_vldrbq_gather_offset_s16): Likewise.
13450 (__arm_vldrbq_s16): Likewise.
13451 (__arm_vldrbq_u16): Likewise.
13452 (__arm_vldrbq_gather_offset_u32): Likewise.
13453 (__arm_vldrbq_gather_offset_s32): Likewise.
13454 (__arm_vldrbq_s32): Likewise.
13455 (__arm_vldrbq_u32): Likewise.
13456 (__arm_vldrwq_gather_base_s32): Likewise.
13457 (__arm_vldrwq_gather_base_u32): Likewise.
13458 (vldrbq_gather_offset): Define polymorphic variant.
13459 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
13461 (LDRGS_QUALIFIERS): Likewise.
13462 (LDRS_QUALIFIERS): Likewise.
13463 (LDRU_QUALIFIERS): Likewise.
13464 (LDRGBS_QUALIFIERS): Likewise.
13465 (LDRGBU_QUALIFIERS): Likewise.
13466 * config/arm/mve.md (VLDRBGOQ): Define iterator.
13467 (VLDRBQ): Likewise.
13468 (VLDRWGBQ): Likewise.
13469 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
13470 (mve_vldrbq_<supf><mode>): Likewise.
13471 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
13473 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13474 Mihail Ionescu <mihail.ionescu@arm.com>
13475 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13477 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
13478 (STRU_QUALIFIERS): Likewise.
13479 (STRSS_QUALIFIERS): Likewise.
13480 (STRSU_QUALIFIERS): Likewise.
13481 (STRSBS_QUALIFIERS): Likewise.
13482 (STRSBU_QUALIFIERS): Likewise.
13483 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
13484 (vstrbq_u8): Likewise.
13485 (vstrbq_u16): Likewise.
13486 (vstrbq_scatter_offset_s8): Likewise.
13487 (vstrbq_scatter_offset_u8): Likewise.
13488 (vstrbq_scatter_offset_u16): Likewise.
13489 (vstrbq_s16): Likewise.
13490 (vstrbq_u32): Likewise.
13491 (vstrbq_scatter_offset_s16): Likewise.
13492 (vstrbq_scatter_offset_u32): Likewise.
13493 (vstrbq_s32): Likewise.
13494 (vstrbq_scatter_offset_s32): Likewise.
13495 (vstrwq_scatter_base_s32): Likewise.
13496 (vstrwq_scatter_base_u32): Likewise.
13497 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
13498 (__arm_vstrbq_scatter_offset_s32): Likewise.
13499 (__arm_vstrbq_scatter_offset_s16): Likewise.
13500 (__arm_vstrbq_scatter_offset_u8): Likewise.
13501 (__arm_vstrbq_scatter_offset_u32): Likewise.
13502 (__arm_vstrbq_scatter_offset_u16): Likewise.
13503 (__arm_vstrbq_s8): Likewise.
13504 (__arm_vstrbq_s32): Likewise.
13505 (__arm_vstrbq_s16): Likewise.
13506 (__arm_vstrbq_u8): Likewise.
13507 (__arm_vstrbq_u32): Likewise.
13508 (__arm_vstrbq_u16): Likewise.
13509 (__arm_vstrwq_scatter_base_s32): Likewise.
13510 (__arm_vstrwq_scatter_base_u32): Likewise.
13511 (vstrbq): Define polymorphic variant.
13512 (vstrbq_scatter_offset): Likewise.
13513 (vstrwq_scatter_base): Likewise.
13514 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
13516 (STRU_QUALIFIERS): Likewise.
13517 (STRSS_QUALIFIERS): Likewise.
13518 (STRSU_QUALIFIERS): Likewise.
13519 (STRSBS_QUALIFIERS): Likewise.
13520 (STRSBU_QUALIFIERS): Likewise.
13521 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
13522 (VSTRWSBQ): Define iterators.
13523 (VSTRBSOQ): Likewise.
13524 (VSTRBQ): Likewise.
13525 (mve_vstrbq_<supf><mode>): Define RTL pattern.
13526 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
13527 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
13529 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13530 Mihail Ionescu <mihail.ionescu@arm.com>
13531 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13533 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
13534 (vabdq_m_f16): Likewise.
13535 (vaddq_m_f32): Likewise.
13536 (vaddq_m_f16): Likewise.
13537 (vaddq_m_n_f32): Likewise.
13538 (vaddq_m_n_f16): Likewise.
13539 (vandq_m_f32): Likewise.
13540 (vandq_m_f16): Likewise.
13541 (vbicq_m_f32): Likewise.
13542 (vbicq_m_f16): Likewise.
13543 (vbrsrq_m_n_f32): Likewise.
13544 (vbrsrq_m_n_f16): Likewise.
13545 (vcaddq_rot270_m_f32): Likewise.
13546 (vcaddq_rot270_m_f16): Likewise.
13547 (vcaddq_rot90_m_f32): Likewise.
13548 (vcaddq_rot90_m_f16): Likewise.
13549 (vcmlaq_m_f32): Likewise.
13550 (vcmlaq_m_f16): Likewise.
13551 (vcmlaq_rot180_m_f32): Likewise.
13552 (vcmlaq_rot180_m_f16): Likewise.
13553 (vcmlaq_rot270_m_f32): Likewise.
13554 (vcmlaq_rot270_m_f16): Likewise.
13555 (vcmlaq_rot90_m_f32): Likewise.
13556 (vcmlaq_rot90_m_f16): Likewise.
13557 (vcmulq_m_f32): Likewise.
13558 (vcmulq_m_f16): Likewise.
13559 (vcmulq_rot180_m_f32): Likewise.
13560 (vcmulq_rot180_m_f16): Likewise.
13561 (vcmulq_rot270_m_f32): Likewise.
13562 (vcmulq_rot270_m_f16): Likewise.
13563 (vcmulq_rot90_m_f32): Likewise.
13564 (vcmulq_rot90_m_f16): Likewise.
13565 (vcvtq_m_n_s32_f32): Likewise.
13566 (vcvtq_m_n_s16_f16): Likewise.
13567 (vcvtq_m_n_u32_f32): Likewise.
13568 (vcvtq_m_n_u16_f16): Likewise.
13569 (veorq_m_f32): Likewise.
13570 (veorq_m_f16): Likewise.
13571 (vfmaq_m_f32): Likewise.
13572 (vfmaq_m_f16): Likewise.
13573 (vfmaq_m_n_f32): Likewise.
13574 (vfmaq_m_n_f16): Likewise.
13575 (vfmasq_m_n_f32): Likewise.
13576 (vfmasq_m_n_f16): Likewise.
13577 (vfmsq_m_f32): Likewise.
13578 (vfmsq_m_f16): Likewise.
13579 (vmaxnmq_m_f32): Likewise.
13580 (vmaxnmq_m_f16): Likewise.
13581 (vminnmq_m_f32): Likewise.
13582 (vminnmq_m_f16): Likewise.
13583 (vmulq_m_f32): Likewise.
13584 (vmulq_m_f16): Likewise.
13585 (vmulq_m_n_f32): Likewise.
13586 (vmulq_m_n_f16): Likewise.
13587 (vornq_m_f32): Likewise.
13588 (vornq_m_f16): Likewise.
13589 (vorrq_m_f32): Likewise.
13590 (vorrq_m_f16): Likewise.
13591 (vsubq_m_f32): Likewise.
13592 (vsubq_m_f16): Likewise.
13593 (vsubq_m_n_f32): Likewise.
13594 (vsubq_m_n_f16): Likewise.
13595 (__attribute__): Likewise.
13596 (__arm_vabdq_m_f32): Likewise.
13597 (__arm_vabdq_m_f16): Likewise.
13598 (__arm_vaddq_m_f32): Likewise.
13599 (__arm_vaddq_m_f16): Likewise.
13600 (__arm_vaddq_m_n_f32): Likewise.
13601 (__arm_vaddq_m_n_f16): Likewise.
13602 (__arm_vandq_m_f32): Likewise.
13603 (__arm_vandq_m_f16): Likewise.
13604 (__arm_vbicq_m_f32): Likewise.
13605 (__arm_vbicq_m_f16): Likewise.
13606 (__arm_vbrsrq_m_n_f32): Likewise.
13607 (__arm_vbrsrq_m_n_f16): Likewise.
13608 (__arm_vcaddq_rot270_m_f32): Likewise.
13609 (__arm_vcaddq_rot270_m_f16): Likewise.
13610 (__arm_vcaddq_rot90_m_f32): Likewise.
13611 (__arm_vcaddq_rot90_m_f16): Likewise.
13612 (__arm_vcmlaq_m_f32): Likewise.
13613 (__arm_vcmlaq_m_f16): Likewise.
13614 (__arm_vcmlaq_rot180_m_f32): Likewise.
13615 (__arm_vcmlaq_rot180_m_f16): Likewise.
13616 (__arm_vcmlaq_rot270_m_f32): Likewise.
13617 (__arm_vcmlaq_rot270_m_f16): Likewise.
13618 (__arm_vcmlaq_rot90_m_f32): Likewise.
13619 (__arm_vcmlaq_rot90_m_f16): Likewise.
13620 (__arm_vcmulq_m_f32): Likewise.
13621 (__arm_vcmulq_m_f16): Likewise.
13622 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
13623 (__arm_vcmulq_rot180_m_f16): Likewise.
13624 (__arm_vcmulq_rot270_m_f32): Likewise.
13625 (__arm_vcmulq_rot270_m_f16): Likewise.
13626 (__arm_vcmulq_rot90_m_f32): Likewise.
13627 (__arm_vcmulq_rot90_m_f16): Likewise.
13628 (__arm_vcvtq_m_n_s32_f32): Likewise.
13629 (__arm_vcvtq_m_n_s16_f16): Likewise.
13630 (__arm_vcvtq_m_n_u32_f32): Likewise.
13631 (__arm_vcvtq_m_n_u16_f16): Likewise.
13632 (__arm_veorq_m_f32): Likewise.
13633 (__arm_veorq_m_f16): Likewise.
13634 (__arm_vfmaq_m_f32): Likewise.
13635 (__arm_vfmaq_m_f16): Likewise.
13636 (__arm_vfmaq_m_n_f32): Likewise.
13637 (__arm_vfmaq_m_n_f16): Likewise.
13638 (__arm_vfmasq_m_n_f32): Likewise.
13639 (__arm_vfmasq_m_n_f16): Likewise.
13640 (__arm_vfmsq_m_f32): Likewise.
13641 (__arm_vfmsq_m_f16): Likewise.
13642 (__arm_vmaxnmq_m_f32): Likewise.
13643 (__arm_vmaxnmq_m_f16): Likewise.
13644 (__arm_vminnmq_m_f32): Likewise.
13645 (__arm_vminnmq_m_f16): Likewise.
13646 (__arm_vmulq_m_f32): Likewise.
13647 (__arm_vmulq_m_f16): Likewise.
13648 (__arm_vmulq_m_n_f32): Likewise.
13649 (__arm_vmulq_m_n_f16): Likewise.
13650 (__arm_vornq_m_f32): Likewise.
13651 (__arm_vornq_m_f16): Likewise.
13652 (__arm_vorrq_m_f32): Likewise.
13653 (__arm_vorrq_m_f16): Likewise.
13654 (__arm_vsubq_m_f32): Likewise.
13655 (__arm_vsubq_m_f16): Likewise.
13656 (__arm_vsubq_m_n_f32): Likewise.
13657 (__arm_vsubq_m_n_f16): Likewise.
13658 (vabdq_m): Define polymorphic variant.
13659 (vaddq_m): Likewise.
13660 (vaddq_m_n): Likewise.
13661 (vandq_m): Likewise.
13662 (vbicq_m): Likewise.
13663 (vbrsrq_m_n): Likewise.
13664 (vcaddq_rot270_m): Likewise.
13665 (vcaddq_rot90_m): Likewise.
13666 (vcmlaq_m): Likewise.
13667 (vcmlaq_rot180_m): Likewise.
13668 (vcmlaq_rot270_m): Likewise.
13669 (vcmlaq_rot90_m): Likewise.
13670 (vcmulq_m): Likewise.
13671 (vcmulq_rot180_m): Likewise.
13672 (vcmulq_rot270_m): Likewise.
13673 (vcmulq_rot90_m): Likewise.
13674 (veorq_m): Likewise.
13675 (vfmaq_m): Likewise.
13676 (vfmaq_m_n): Likewise.
13677 (vfmasq_m_n): Likewise.
13678 (vfmsq_m): Likewise.
13679 (vmaxnmq_m): Likewise.
13680 (vminnmq_m): Likewise.
13681 (vmulq_m): Likewise.
13682 (vmulq_m_n): Likewise.
13683 (vornq_m): Likewise.
13684 (vsubq_m): Likewise.
13685 (vsubq_m_n): Likewise.
13686 (vorrq_m): Likewise.
13687 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13689 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13690 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
13691 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
13692 (mve_vaddq_m_f<mode>): Likewise.
13693 (mve_vaddq_m_n_f<mode>): Likewise.
13694 (mve_vandq_m_f<mode>): Likewise.
13695 (mve_vbicq_m_f<mode>): Likewise.
13696 (mve_vbrsrq_m_n_f<mode>): Likewise.
13697 (mve_vcaddq_rot270_m_f<mode>): Likewise.
13698 (mve_vcaddq_rot90_m_f<mode>): Likewise.
13699 (mve_vcmlaq_m_f<mode>): Likewise.
13700 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
13701 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
13702 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
13703 (mve_vcmulq_m_f<mode>): Likewise.
13704 (mve_vcmulq_rot180_m_f<mode>): Likewise.
13705 (mve_vcmulq_rot270_m_f<mode>): Likewise.
13706 (mve_vcmulq_rot90_m_f<mode>): Likewise.
13707 (mve_veorq_m_f<mode>): Likewise.
13708 (mve_vfmaq_m_f<mode>): Likewise.
13709 (mve_vfmaq_m_n_f<mode>): Likewise.
13710 (mve_vfmasq_m_n_f<mode>): Likewise.
13711 (mve_vfmsq_m_f<mode>): Likewise.
13712 (mve_vmaxnmq_m_f<mode>): Likewise.
13713 (mve_vminnmq_m_f<mode>): Likewise.
13714 (mve_vmulq_m_f<mode>): Likewise.
13715 (mve_vmulq_m_n_f<mode>): Likewise.
13716 (mve_vornq_m_f<mode>): Likewise.
13717 (mve_vorrq_m_f<mode>): Likewise.
13718 (mve_vsubq_m_f<mode>): Likewise.
13719 (mve_vsubq_m_n_f<mode>): Likewise.
13721 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13722 Mihail Ionescu <mihail.ionescu@arm.com>
13723 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13725 * config/arm/arm-protos.h (arm_mve_immediate_check):
13726 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
13727 mode and interger value.
13728 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
13729 (vmlaldavaq_p_s16): Likewise.
13730 (vmlaldavaq_p_u32): Likewise.
13731 (vmlaldavaq_p_u16): Likewise.
13732 (vmlaldavaxq_p_s32): Likewise.
13733 (vmlaldavaxq_p_s16): Likewise.
13734 (vmlaldavaxq_p_u32): Likewise.
13735 (vmlaldavaxq_p_u16): Likewise.
13736 (vmlsldavaq_p_s32): Likewise.
13737 (vmlsldavaq_p_s16): Likewise.
13738 (vmlsldavaxq_p_s32): Likewise.
13739 (vmlsldavaxq_p_s16): Likewise.
13740 (vmullbq_poly_m_p8): Likewise.
13741 (vmullbq_poly_m_p16): Likewise.
13742 (vmulltq_poly_m_p8): Likewise.
13743 (vmulltq_poly_m_p16): Likewise.
13744 (vqdmullbq_m_n_s32): Likewise.
13745 (vqdmullbq_m_n_s16): Likewise.
13746 (vqdmullbq_m_s32): Likewise.
13747 (vqdmullbq_m_s16): Likewise.
13748 (vqdmulltq_m_n_s32): Likewise.
13749 (vqdmulltq_m_n_s16): Likewise.
13750 (vqdmulltq_m_s32): Likewise.
13751 (vqdmulltq_m_s16): Likewise.
13752 (vqrshrnbq_m_n_s32): Likewise.
13753 (vqrshrnbq_m_n_s16): Likewise.
13754 (vqrshrnbq_m_n_u32): Likewise.
13755 (vqrshrnbq_m_n_u16): Likewise.
13756 (vqrshrntq_m_n_s32): Likewise.
13757 (vqrshrntq_m_n_s16): Likewise.
13758 (vqrshrntq_m_n_u32): Likewise.
13759 (vqrshrntq_m_n_u16): Likewise.
13760 (vqrshrunbq_m_n_s32): Likewise.
13761 (vqrshrunbq_m_n_s16): Likewise.
13762 (vqrshruntq_m_n_s32): Likewise.
13763 (vqrshruntq_m_n_s16): Likewise.
13764 (vqshrnbq_m_n_s32): Likewise.
13765 (vqshrnbq_m_n_s16): Likewise.
13766 (vqshrnbq_m_n_u32): Likewise.
13767 (vqshrnbq_m_n_u16): Likewise.
13768 (vqshrntq_m_n_s32): Likewise.
13769 (vqshrntq_m_n_s16): Likewise.
13770 (vqshrntq_m_n_u32): Likewise.
13771 (vqshrntq_m_n_u16): Likewise.
13772 (vqshrunbq_m_n_s32): Likewise.
13773 (vqshrunbq_m_n_s16): Likewise.
13774 (vqshruntq_m_n_s32): Likewise.
13775 (vqshruntq_m_n_s16): Likewise.
13776 (vrmlaldavhaq_p_s32): Likewise.
13777 (vrmlaldavhaq_p_u32): Likewise.
13778 (vrmlaldavhaxq_p_s32): Likewise.
13779 (vrmlsldavhaq_p_s32): Likewise.
13780 (vrmlsldavhaxq_p_s32): Likewise.
13781 (vrshrnbq_m_n_s32): Likewise.
13782 (vrshrnbq_m_n_s16): Likewise.
13783 (vrshrnbq_m_n_u32): Likewise.
13784 (vrshrnbq_m_n_u16): Likewise.
13785 (vrshrntq_m_n_s32): Likewise.
13786 (vrshrntq_m_n_s16): Likewise.
13787 (vrshrntq_m_n_u32): Likewise.
13788 (vrshrntq_m_n_u16): Likewise.
13789 (vshllbq_m_n_s8): Likewise.
13790 (vshllbq_m_n_s16): Likewise.
13791 (vshllbq_m_n_u8): Likewise.
13792 (vshllbq_m_n_u16): Likewise.
13793 (vshlltq_m_n_s8): Likewise.
13794 (vshlltq_m_n_s16): Likewise.
13795 (vshlltq_m_n_u8): Likewise.
13796 (vshlltq_m_n_u16): Likewise.
13797 (vshrnbq_m_n_s32): Likewise.
13798 (vshrnbq_m_n_s16): Likewise.
13799 (vshrnbq_m_n_u32): Likewise.
13800 (vshrnbq_m_n_u16): Likewise.
13801 (vshrntq_m_n_s32): Likewise.
13802 (vshrntq_m_n_s16): Likewise.
13803 (vshrntq_m_n_u32): Likewise.
13804 (vshrntq_m_n_u16): Likewise.
13805 (__arm_vmlaldavaq_p_s32): Define intrinsic.
13806 (__arm_vmlaldavaq_p_s16): Likewise.
13807 (__arm_vmlaldavaq_p_u32): Likewise.
13808 (__arm_vmlaldavaq_p_u16): Likewise.
13809 (__arm_vmlaldavaxq_p_s32): Likewise.
13810 (__arm_vmlaldavaxq_p_s16): Likewise.
13811 (__arm_vmlaldavaxq_p_u32): Likewise.
13812 (__arm_vmlaldavaxq_p_u16): Likewise.
13813 (__arm_vmlsldavaq_p_s32): Likewise.
13814 (__arm_vmlsldavaq_p_s16): Likewise.
13815 (__arm_vmlsldavaxq_p_s32): Likewise.
13816 (__arm_vmlsldavaxq_p_s16): Likewise.
13817 (__arm_vmullbq_poly_m_p8): Likewise.
13818 (__arm_vmullbq_poly_m_p16): Likewise.
13819 (__arm_vmulltq_poly_m_p8): Likewise.
13820 (__arm_vmulltq_poly_m_p16): Likewise.
13821 (__arm_vqdmullbq_m_n_s32): Likewise.
13822 (__arm_vqdmullbq_m_n_s16): Likewise.
13823 (__arm_vqdmullbq_m_s32): Likewise.
13824 (__arm_vqdmullbq_m_s16): Likewise.
13825 (__arm_vqdmulltq_m_n_s32): Likewise.
13826 (__arm_vqdmulltq_m_n_s16): Likewise.
13827 (__arm_vqdmulltq_m_s32): Likewise.
13828 (__arm_vqdmulltq_m_s16): Likewise.
13829 (__arm_vqrshrnbq_m_n_s32): Likewise.
13830 (__arm_vqrshrnbq_m_n_s16): Likewise.
13831 (__arm_vqrshrnbq_m_n_u32): Likewise.
13832 (__arm_vqrshrnbq_m_n_u16): Likewise.
13833 (__arm_vqrshrntq_m_n_s32): Likewise.
13834 (__arm_vqrshrntq_m_n_s16): Likewise.
13835 (__arm_vqrshrntq_m_n_u32): Likewise.
13836 (__arm_vqrshrntq_m_n_u16): Likewise.
13837 (__arm_vqrshrunbq_m_n_s32): Likewise.
13838 (__arm_vqrshrunbq_m_n_s16): Likewise.
13839 (__arm_vqrshruntq_m_n_s32): Likewise.
13840 (__arm_vqrshruntq_m_n_s16): Likewise.
13841 (__arm_vqshrnbq_m_n_s32): Likewise.
13842 (__arm_vqshrnbq_m_n_s16): Likewise.
13843 (__arm_vqshrnbq_m_n_u32): Likewise.
13844 (__arm_vqshrnbq_m_n_u16): Likewise.
13845 (__arm_vqshrntq_m_n_s32): Likewise.
13846 (__arm_vqshrntq_m_n_s16): Likewise.
13847 (__arm_vqshrntq_m_n_u32): Likewise.
13848 (__arm_vqshrntq_m_n_u16): Likewise.
13849 (__arm_vqshrunbq_m_n_s32): Likewise.
13850 (__arm_vqshrunbq_m_n_s16): Likewise.
13851 (__arm_vqshruntq_m_n_s32): Likewise.
13852 (__arm_vqshruntq_m_n_s16): Likewise.
13853 (__arm_vrmlaldavhaq_p_s32): Likewise.
13854 (__arm_vrmlaldavhaq_p_u32): Likewise.
13855 (__arm_vrmlaldavhaxq_p_s32): Likewise.
13856 (__arm_vrmlsldavhaq_p_s32): Likewise.
13857 (__arm_vrmlsldavhaxq_p_s32): Likewise.
13858 (__arm_vrshrnbq_m_n_s32): Likewise.
13859 (__arm_vrshrnbq_m_n_s16): Likewise.
13860 (__arm_vrshrnbq_m_n_u32): Likewise.
13861 (__arm_vrshrnbq_m_n_u16): Likewise.
13862 (__arm_vrshrntq_m_n_s32): Likewise.
13863 (__arm_vrshrntq_m_n_s16): Likewise.
13864 (__arm_vrshrntq_m_n_u32): Likewise.
13865 (__arm_vrshrntq_m_n_u16): Likewise.
13866 (__arm_vshllbq_m_n_s8): Likewise.
13867 (__arm_vshllbq_m_n_s16): Likewise.
13868 (__arm_vshllbq_m_n_u8): Likewise.
13869 (__arm_vshllbq_m_n_u16): Likewise.
13870 (__arm_vshlltq_m_n_s8): Likewise.
13871 (__arm_vshlltq_m_n_s16): Likewise.
13872 (__arm_vshlltq_m_n_u8): Likewise.
13873 (__arm_vshlltq_m_n_u16): Likewise.
13874 (__arm_vshrnbq_m_n_s32): Likewise.
13875 (__arm_vshrnbq_m_n_s16): Likewise.
13876 (__arm_vshrnbq_m_n_u32): Likewise.
13877 (__arm_vshrnbq_m_n_u16): Likewise.
13878 (__arm_vshrntq_m_n_s32): Likewise.
13879 (__arm_vshrntq_m_n_s16): Likewise.
13880 (__arm_vshrntq_m_n_u32): Likewise.
13881 (__arm_vshrntq_m_n_u16): Likewise.
13882 (vmullbq_poly_m): Define polymorphic variant.
13883 (vmulltq_poly_m): Likewise.
13884 (vshllbq_m): Likewise.
13885 (vshrntq_m_n): Likewise.
13886 (vshrnbq_m_n): Likewise.
13887 (vshlltq_m_n): Likewise.
13888 (vshllbq_m_n): Likewise.
13889 (vrshrntq_m_n): Likewise.
13890 (vrshrnbq_m_n): Likewise.
13891 (vqshruntq_m_n): Likewise.
13892 (vqshrunbq_m_n): Likewise.
13893 (vqdmullbq_m_n): Likewise.
13894 (vqdmullbq_m): Likewise.
13895 (vqdmulltq_m_n): Likewise.
13896 (vqdmulltq_m): Likewise.
13897 (vqrshrnbq_m_n): Likewise.
13898 (vqrshrntq_m_n): Likewise.
13899 (vqrshrunbq_m_n): Likewise.
13900 (vqrshruntq_m_n): Likewise.
13901 (vqshrnbq_m_n): Likewise.
13902 (vqshrntq_m_n): Likewise.
13903 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13904 builtin qualifiers.
13905 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13906 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
13907 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13908 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13909 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
13910 (VMLALDAVAXQ_P): Likewise.
13911 (VQRSHRNBQ_M_N): Likewise.
13912 (VQRSHRNTQ_M_N): Likewise.
13913 (VQSHRNBQ_M_N): Likewise.
13914 (VQSHRNTQ_M_N): Likewise.
13915 (VRSHRNBQ_M_N): Likewise.
13916 (VRSHRNTQ_M_N): Likewise.
13917 (VSHLLBQ_M_N): Likewise.
13918 (VSHLLTQ_M_N): Likewise.
13919 (VSHRNBQ_M_N): Likewise.
13920 (VSHRNTQ_M_N): Likewise.
13921 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
13922 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
13923 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
13924 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
13925 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
13926 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
13927 (mve_vrmlaldavhaq_p_sv4si): Likewise.
13928 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
13929 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
13930 (mve_vshllbq_m_n_<supf><mode>): Likewise.
13931 (mve_vshlltq_m_n_<supf><mode>): Likewise.
13932 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
13933 (mve_vshrntq_m_n_<supf><mode>): Likewise.
13934 (mve_vmlsldavaq_p_s<mode>): Likewise.
13935 (mve_vmlsldavaxq_p_s<mode>): Likewise.
13936 (mve_vmullbq_poly_m_p<mode>): Likewise.
13937 (mve_vmulltq_poly_m_p<mode>): Likewise.
13938 (mve_vqdmullbq_m_n_s<mode>): Likewise.
13939 (mve_vqdmullbq_m_s<mode>): Likewise.
13940 (mve_vqdmulltq_m_n_s<mode>): Likewise.
13941 (mve_vqdmulltq_m_s<mode>): Likewise.
13942 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
13943 (mve_vqrshruntq_m_n_s<mode>): Likewise.
13944 (mve_vqshrunbq_m_n_s<mode>): Likewise.
13945 (mve_vqshruntq_m_n_s<mode>): Likewise.
13946 (mve_vrmlaldavhaq_p_uv4si): Likewise.
13947 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
13948 (mve_vrmlsldavhaq_p_sv4si): Likewise.
13949 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
13951 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13952 Mihail Ionescu <mihail.ionescu@arm.com>
13953 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13955 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
13956 (vabdq_m_s32): Likewise.
13957 (vabdq_m_s16): Likewise.
13958 (vabdq_m_u8): Likewise.
13959 (vabdq_m_u32): Likewise.
13960 (vabdq_m_u16): Likewise.
13961 (vaddq_m_n_s8): Likewise.
13962 (vaddq_m_n_s32): Likewise.
13963 (vaddq_m_n_s16): Likewise.
13964 (vaddq_m_n_u8): Likewise.
13965 (vaddq_m_n_u32): Likewise.
13966 (vaddq_m_n_u16): Likewise.
13967 (vaddq_m_s8): Likewise.
13968 (vaddq_m_s32): Likewise.
13969 (vaddq_m_s16): Likewise.
13970 (vaddq_m_u8): Likewise.
13971 (vaddq_m_u32): Likewise.
13972 (vaddq_m_u16): Likewise.
13973 (vandq_m_s8): Likewise.
13974 (vandq_m_s32): Likewise.
13975 (vandq_m_s16): Likewise.
13976 (vandq_m_u8): Likewise.
13977 (vandq_m_u32): Likewise.
13978 (vandq_m_u16): Likewise.
13979 (vbicq_m_s8): Likewise.
13980 (vbicq_m_s32): Likewise.
13981 (vbicq_m_s16): Likewise.
13982 (vbicq_m_u8): Likewise.
13983 (vbicq_m_u32): Likewise.
13984 (vbicq_m_u16): Likewise.
13985 (vbrsrq_m_n_s8): Likewise.
13986 (vbrsrq_m_n_s32): Likewise.
13987 (vbrsrq_m_n_s16): Likewise.
13988 (vbrsrq_m_n_u8): Likewise.
13989 (vbrsrq_m_n_u32): Likewise.
13990 (vbrsrq_m_n_u16): Likewise.
13991 (vcaddq_rot270_m_s8): Likewise.
13992 (vcaddq_rot270_m_s32): Likewise.
13993 (vcaddq_rot270_m_s16): Likewise.
13994 (vcaddq_rot270_m_u8): Likewise.
13995 (vcaddq_rot270_m_u32): Likewise.
13996 (vcaddq_rot270_m_u16): Likewise.
13997 (vcaddq_rot90_m_s8): Likewise.
13998 (vcaddq_rot90_m_s32): Likewise.
13999 (vcaddq_rot90_m_s16): Likewise.
14000 (vcaddq_rot90_m_u8): Likewise.
14001 (vcaddq_rot90_m_u32): Likewise.
14002 (vcaddq_rot90_m_u16): Likewise.
14003 (veorq_m_s8): Likewise.
14004 (veorq_m_s32): Likewise.
14005 (veorq_m_s16): Likewise.
14006 (veorq_m_u8): Likewise.
14007 (veorq_m_u32): Likewise.
14008 (veorq_m_u16): Likewise.
14009 (vhaddq_m_n_s8): Likewise.
14010 (vhaddq_m_n_s32): Likewise.
14011 (vhaddq_m_n_s16): Likewise.
14012 (vhaddq_m_n_u8): Likewise.
14013 (vhaddq_m_n_u32): Likewise.
14014 (vhaddq_m_n_u16): Likewise.
14015 (vhaddq_m_s8): Likewise.
14016 (vhaddq_m_s32): Likewise.
14017 (vhaddq_m_s16): Likewise.
14018 (vhaddq_m_u8): Likewise.
14019 (vhaddq_m_u32): Likewise.
14020 (vhaddq_m_u16): Likewise.
14021 (vhcaddq_rot270_m_s8): Likewise.
14022 (vhcaddq_rot270_m_s32): Likewise.
14023 (vhcaddq_rot270_m_s16): Likewise.
14024 (vhcaddq_rot90_m_s8): Likewise.
14025 (vhcaddq_rot90_m_s32): Likewise.
14026 (vhcaddq_rot90_m_s16): Likewise.
14027 (vhsubq_m_n_s8): Likewise.
14028 (vhsubq_m_n_s32): Likewise.
14029 (vhsubq_m_n_s16): Likewise.
14030 (vhsubq_m_n_u8): Likewise.
14031 (vhsubq_m_n_u32): Likewise.
14032 (vhsubq_m_n_u16): Likewise.
14033 (vhsubq_m_s8): Likewise.
14034 (vhsubq_m_s32): Likewise.
14035 (vhsubq_m_s16): Likewise.
14036 (vhsubq_m_u8): Likewise.
14037 (vhsubq_m_u32): Likewise.
14038 (vhsubq_m_u16): Likewise.
14039 (vmaxq_m_s8): Likewise.
14040 (vmaxq_m_s32): Likewise.
14041 (vmaxq_m_s16): Likewise.
14042 (vmaxq_m_u8): Likewise.
14043 (vmaxq_m_u32): Likewise.
14044 (vmaxq_m_u16): Likewise.
14045 (vminq_m_s8): Likewise.
14046 (vminq_m_s32): Likewise.
14047 (vminq_m_s16): Likewise.
14048 (vminq_m_u8): Likewise.
14049 (vminq_m_u32): Likewise.
14050 (vminq_m_u16): Likewise.
14051 (vmladavaq_p_s8): Likewise.
14052 (vmladavaq_p_s32): Likewise.
14053 (vmladavaq_p_s16): Likewise.
14054 (vmladavaq_p_u8): Likewise.
14055 (vmladavaq_p_u32): Likewise.
14056 (vmladavaq_p_u16): Likewise.
14057 (vmladavaxq_p_s8): Likewise.
14058 (vmladavaxq_p_s32): Likewise.
14059 (vmladavaxq_p_s16): Likewise.
14060 (vmlaq_m_n_s8): Likewise.
14061 (vmlaq_m_n_s32): Likewise.
14062 (vmlaq_m_n_s16): Likewise.
14063 (vmlaq_m_n_u8): Likewise.
14064 (vmlaq_m_n_u32): Likewise.
14065 (vmlaq_m_n_u16): Likewise.
14066 (vmlasq_m_n_s8): Likewise.
14067 (vmlasq_m_n_s32): Likewise.
14068 (vmlasq_m_n_s16): Likewise.
14069 (vmlasq_m_n_u8): Likewise.
14070 (vmlasq_m_n_u32): Likewise.
14071 (vmlasq_m_n_u16): Likewise.
14072 (vmlsdavaq_p_s8): Likewise.
14073 (vmlsdavaq_p_s32): Likewise.
14074 (vmlsdavaq_p_s16): Likewise.
14075 (vmlsdavaxq_p_s8): Likewise.
14076 (vmlsdavaxq_p_s32): Likewise.
14077 (vmlsdavaxq_p_s16): Likewise.
14078 (vmulhq_m_s8): Likewise.
14079 (vmulhq_m_s32): Likewise.
14080 (vmulhq_m_s16): Likewise.
14081 (vmulhq_m_u8): Likewise.
14082 (vmulhq_m_u32): Likewise.
14083 (vmulhq_m_u16): Likewise.
14084 (vmullbq_int_m_s8): Likewise.
14085 (vmullbq_int_m_s32): Likewise.
14086 (vmullbq_int_m_s16): Likewise.
14087 (vmullbq_int_m_u8): Likewise.
14088 (vmullbq_int_m_u32): Likewise.
14089 (vmullbq_int_m_u16): Likewise.
14090 (vmulltq_int_m_s8): Likewise.
14091 (vmulltq_int_m_s32): Likewise.
14092 (vmulltq_int_m_s16): Likewise.
14093 (vmulltq_int_m_u8): Likewise.
14094 (vmulltq_int_m_u32): Likewise.
14095 (vmulltq_int_m_u16): Likewise.
14096 (vmulq_m_n_s8): Likewise.
14097 (vmulq_m_n_s32): Likewise.
14098 (vmulq_m_n_s16): Likewise.
14099 (vmulq_m_n_u8): Likewise.
14100 (vmulq_m_n_u32): Likewise.
14101 (vmulq_m_n_u16): Likewise.
14102 (vmulq_m_s8): Likewise.
14103 (vmulq_m_s32): Likewise.
14104 (vmulq_m_s16): Likewise.
14105 (vmulq_m_u8): Likewise.
14106 (vmulq_m_u32): Likewise.
14107 (vmulq_m_u16): Likewise.
14108 (vornq_m_s8): Likewise.
14109 (vornq_m_s32): Likewise.
14110 (vornq_m_s16): Likewise.
14111 (vornq_m_u8): Likewise.
14112 (vornq_m_u32): Likewise.
14113 (vornq_m_u16): Likewise.
14114 (vorrq_m_s8): Likewise.
14115 (vorrq_m_s32): Likewise.
14116 (vorrq_m_s16): Likewise.
14117 (vorrq_m_u8): Likewise.
14118 (vorrq_m_u32): Likewise.
14119 (vorrq_m_u16): Likewise.
14120 (vqaddq_m_n_s8): Likewise.
14121 (vqaddq_m_n_s32): Likewise.
14122 (vqaddq_m_n_s16): Likewise.
14123 (vqaddq_m_n_u8): Likewise.
14124 (vqaddq_m_n_u32): Likewise.
14125 (vqaddq_m_n_u16): Likewise.
14126 (vqaddq_m_s8): Likewise.
14127 (vqaddq_m_s32): Likewise.
14128 (vqaddq_m_s16): Likewise.
14129 (vqaddq_m_u8): Likewise.
14130 (vqaddq_m_u32): Likewise.
14131 (vqaddq_m_u16): Likewise.
14132 (vqdmladhq_m_s8): Likewise.
14133 (vqdmladhq_m_s32): Likewise.
14134 (vqdmladhq_m_s16): Likewise.
14135 (vqdmladhxq_m_s8): Likewise.
14136 (vqdmladhxq_m_s32): Likewise.
14137 (vqdmladhxq_m_s16): Likewise.
14138 (vqdmlahq_m_n_s8): Likewise.
14139 (vqdmlahq_m_n_s32): Likewise.
14140 (vqdmlahq_m_n_s16): Likewise.
14141 (vqdmlahq_m_n_u8): Likewise.
14142 (vqdmlahq_m_n_u32): Likewise.
14143 (vqdmlahq_m_n_u16): Likewise.
14144 (vqdmlsdhq_m_s8): Likewise.
14145 (vqdmlsdhq_m_s32): Likewise.
14146 (vqdmlsdhq_m_s16): Likewise.
14147 (vqdmlsdhxq_m_s8): Likewise.
14148 (vqdmlsdhxq_m_s32): Likewise.
14149 (vqdmlsdhxq_m_s16): Likewise.
14150 (vqdmulhq_m_n_s8): Likewise.
14151 (vqdmulhq_m_n_s32): Likewise.
14152 (vqdmulhq_m_n_s16): Likewise.
14153 (vqdmulhq_m_s8): Likewise.
14154 (vqdmulhq_m_s32): Likewise.
14155 (vqdmulhq_m_s16): Likewise.
14156 (vqrdmladhq_m_s8): Likewise.
14157 (vqrdmladhq_m_s32): Likewise.
14158 (vqrdmladhq_m_s16): Likewise.
14159 (vqrdmladhxq_m_s8): Likewise.
14160 (vqrdmladhxq_m_s32): Likewise.
14161 (vqrdmladhxq_m_s16): Likewise.
14162 (vqrdmlahq_m_n_s8): Likewise.
14163 (vqrdmlahq_m_n_s32): Likewise.
14164 (vqrdmlahq_m_n_s16): Likewise.
14165 (vqrdmlahq_m_n_u8): Likewise.
14166 (vqrdmlahq_m_n_u32): Likewise.
14167 (vqrdmlahq_m_n_u16): Likewise.
14168 (vqrdmlashq_m_n_s8): Likewise.
14169 (vqrdmlashq_m_n_s32): Likewise.
14170 (vqrdmlashq_m_n_s16): Likewise.
14171 (vqrdmlashq_m_n_u8): Likewise.
14172 (vqrdmlashq_m_n_u32): Likewise.
14173 (vqrdmlashq_m_n_u16): Likewise.
14174 (vqrdmlsdhq_m_s8): Likewise.
14175 (vqrdmlsdhq_m_s32): Likewise.
14176 (vqrdmlsdhq_m_s16): Likewise.
14177 (vqrdmlsdhxq_m_s8): Likewise.
14178 (vqrdmlsdhxq_m_s32): Likewise.
14179 (vqrdmlsdhxq_m_s16): Likewise.
14180 (vqrdmulhq_m_n_s8): Likewise.
14181 (vqrdmulhq_m_n_s32): Likewise.
14182 (vqrdmulhq_m_n_s16): Likewise.
14183 (vqrdmulhq_m_s8): Likewise.
14184 (vqrdmulhq_m_s32): Likewise.
14185 (vqrdmulhq_m_s16): Likewise.
14186 (vqrshlq_m_s8): Likewise.
14187 (vqrshlq_m_s32): Likewise.
14188 (vqrshlq_m_s16): Likewise.
14189 (vqrshlq_m_u8): Likewise.
14190 (vqrshlq_m_u32): Likewise.
14191 (vqrshlq_m_u16): Likewise.
14192 (vqshlq_m_n_s8): Likewise.
14193 (vqshlq_m_n_s32): Likewise.
14194 (vqshlq_m_n_s16): Likewise.
14195 (vqshlq_m_n_u8): Likewise.
14196 (vqshlq_m_n_u32): Likewise.
14197 (vqshlq_m_n_u16): Likewise.
14198 (vqshlq_m_s8): Likewise.
14199 (vqshlq_m_s32): Likewise.
14200 (vqshlq_m_s16): Likewise.
14201 (vqshlq_m_u8): Likewise.
14202 (vqshlq_m_u32): Likewise.
14203 (vqshlq_m_u16): Likewise.
14204 (vqsubq_m_n_s8): Likewise.
14205 (vqsubq_m_n_s32): Likewise.
14206 (vqsubq_m_n_s16): Likewise.
14207 (vqsubq_m_n_u8): Likewise.
14208 (vqsubq_m_n_u32): Likewise.
14209 (vqsubq_m_n_u16): Likewise.
14210 (vqsubq_m_s8): Likewise.
14211 (vqsubq_m_s32): Likewise.
14212 (vqsubq_m_s16): Likewise.
14213 (vqsubq_m_u8): Likewise.
14214 (vqsubq_m_u32): Likewise.
14215 (vqsubq_m_u16): Likewise.
14216 (vrhaddq_m_s8): Likewise.
14217 (vrhaddq_m_s32): Likewise.
14218 (vrhaddq_m_s16): Likewise.
14219 (vrhaddq_m_u8): Likewise.
14220 (vrhaddq_m_u32): Likewise.
14221 (vrhaddq_m_u16): Likewise.
14222 (vrmulhq_m_s8): Likewise.
14223 (vrmulhq_m_s32): Likewise.
14224 (vrmulhq_m_s16): Likewise.
14225 (vrmulhq_m_u8): Likewise.
14226 (vrmulhq_m_u32): Likewise.
14227 (vrmulhq_m_u16): Likewise.
14228 (vrshlq_m_s8): Likewise.
14229 (vrshlq_m_s32): Likewise.
14230 (vrshlq_m_s16): Likewise.
14231 (vrshlq_m_u8): Likewise.
14232 (vrshlq_m_u32): Likewise.
14233 (vrshlq_m_u16): Likewise.
14234 (vrshrq_m_n_s8): Likewise.
14235 (vrshrq_m_n_s32): Likewise.
14236 (vrshrq_m_n_s16): Likewise.
14237 (vrshrq_m_n_u8): Likewise.
14238 (vrshrq_m_n_u32): Likewise.
14239 (vrshrq_m_n_u16): Likewise.
14240 (vshlq_m_n_s8): Likewise.
14241 (vshlq_m_n_s32): Likewise.
14242 (vshlq_m_n_s16): Likewise.
14243 (vshlq_m_n_u8): Likewise.
14244 (vshlq_m_n_u32): Likewise.
14245 (vshlq_m_n_u16): Likewise.
14246 (vshrq_m_n_s8): Likewise.
14247 (vshrq_m_n_s32): Likewise.
14248 (vshrq_m_n_s16): Likewise.
14249 (vshrq_m_n_u8): Likewise.
14250 (vshrq_m_n_u32): Likewise.
14251 (vshrq_m_n_u16): Likewise.
14252 (vsliq_m_n_s8): Likewise.
14253 (vsliq_m_n_s32): Likewise.
14254 (vsliq_m_n_s16): Likewise.
14255 (vsliq_m_n_u8): Likewise.
14256 (vsliq_m_n_u32): Likewise.
14257 (vsliq_m_n_u16): Likewise.
14258 (vsubq_m_n_s8): Likewise.
14259 (vsubq_m_n_s32): Likewise.
14260 (vsubq_m_n_s16): Likewise.
14261 (vsubq_m_n_u8): Likewise.
14262 (vsubq_m_n_u32): Likewise.
14263 (vsubq_m_n_u16): Likewise.
14264 (__arm_vabdq_m_s8): Define intrinsic.
14265 (__arm_vabdq_m_s32): Likewise.
14266 (__arm_vabdq_m_s16): Likewise.
14267 (__arm_vabdq_m_u8): Likewise.
14268 (__arm_vabdq_m_u32): Likewise.
14269 (__arm_vabdq_m_u16): Likewise.
14270 (__arm_vaddq_m_n_s8): Likewise.
14271 (__arm_vaddq_m_n_s32): Likewise.
14272 (__arm_vaddq_m_n_s16): Likewise.
14273 (__arm_vaddq_m_n_u8): Likewise.
14274 (__arm_vaddq_m_n_u32): Likewise.
14275 (__arm_vaddq_m_n_u16): Likewise.
14276 (__arm_vaddq_m_s8): Likewise.
14277 (__arm_vaddq_m_s32): Likewise.
14278 (__arm_vaddq_m_s16): Likewise.
14279 (__arm_vaddq_m_u8): Likewise.
14280 (__arm_vaddq_m_u32): Likewise.
14281 (__arm_vaddq_m_u16): Likewise.
14282 (__arm_vandq_m_s8): Likewise.
14283 (__arm_vandq_m_s32): Likewise.
14284 (__arm_vandq_m_s16): Likewise.
14285 (__arm_vandq_m_u8): Likewise.
14286 (__arm_vandq_m_u32): Likewise.
14287 (__arm_vandq_m_u16): Likewise.
14288 (__arm_vbicq_m_s8): Likewise.
14289 (__arm_vbicq_m_s32): Likewise.
14290 (__arm_vbicq_m_s16): Likewise.
14291 (__arm_vbicq_m_u8): Likewise.
14292 (__arm_vbicq_m_u32): Likewise.
14293 (__arm_vbicq_m_u16): Likewise.
14294 (__arm_vbrsrq_m_n_s8): Likewise.
14295 (__arm_vbrsrq_m_n_s32): Likewise.
14296 (__arm_vbrsrq_m_n_s16): Likewise.
14297 (__arm_vbrsrq_m_n_u8): Likewise.
14298 (__arm_vbrsrq_m_n_u32): Likewise.
14299 (__arm_vbrsrq_m_n_u16): Likewise.
14300 (__arm_vcaddq_rot270_m_s8): Likewise.
14301 (__arm_vcaddq_rot270_m_s32): Likewise.
14302 (__arm_vcaddq_rot270_m_s16): Likewise.
14303 (__arm_vcaddq_rot270_m_u8): Likewise.
14304 (__arm_vcaddq_rot270_m_u32): Likewise.
14305 (__arm_vcaddq_rot270_m_u16): Likewise.
14306 (__arm_vcaddq_rot90_m_s8): Likewise.
14307 (__arm_vcaddq_rot90_m_s32): Likewise.
14308 (__arm_vcaddq_rot90_m_s16): Likewise.
14309 (__arm_vcaddq_rot90_m_u8): Likewise.
14310 (__arm_vcaddq_rot90_m_u32): Likewise.
14311 (__arm_vcaddq_rot90_m_u16): Likewise.
14312 (__arm_veorq_m_s8): Likewise.
14313 (__arm_veorq_m_s32): Likewise.
14314 (__arm_veorq_m_s16): Likewise.
14315 (__arm_veorq_m_u8): Likewise.
14316 (__arm_veorq_m_u32): Likewise.
14317 (__arm_veorq_m_u16): Likewise.
14318 (__arm_vhaddq_m_n_s8): Likewise.
14319 (__arm_vhaddq_m_n_s32): Likewise.
14320 (__arm_vhaddq_m_n_s16): Likewise.
14321 (__arm_vhaddq_m_n_u8): Likewise.
14322 (__arm_vhaddq_m_n_u32): Likewise.
14323 (__arm_vhaddq_m_n_u16): Likewise.
14324 (__arm_vhaddq_m_s8): Likewise.
14325 (__arm_vhaddq_m_s32): Likewise.
14326 (__arm_vhaddq_m_s16): Likewise.
14327 (__arm_vhaddq_m_u8): Likewise.
14328 (__arm_vhaddq_m_u32): Likewise.
14329 (__arm_vhaddq_m_u16): Likewise.
14330 (__arm_vhcaddq_rot270_m_s8): Likewise.
14331 (__arm_vhcaddq_rot270_m_s32): Likewise.
14332 (__arm_vhcaddq_rot270_m_s16): Likewise.
14333 (__arm_vhcaddq_rot90_m_s8): Likewise.
14334 (__arm_vhcaddq_rot90_m_s32): Likewise.
14335 (__arm_vhcaddq_rot90_m_s16): Likewise.
14336 (__arm_vhsubq_m_n_s8): Likewise.
14337 (__arm_vhsubq_m_n_s32): Likewise.
14338 (__arm_vhsubq_m_n_s16): Likewise.
14339 (__arm_vhsubq_m_n_u8): Likewise.
14340 (__arm_vhsubq_m_n_u32): Likewise.
14341 (__arm_vhsubq_m_n_u16): Likewise.
14342 (__arm_vhsubq_m_s8): Likewise.
14343 (__arm_vhsubq_m_s32): Likewise.
14344 (__arm_vhsubq_m_s16): Likewise.
14345 (__arm_vhsubq_m_u8): Likewise.
14346 (__arm_vhsubq_m_u32): Likewise.
14347 (__arm_vhsubq_m_u16): Likewise.
14348 (__arm_vmaxq_m_s8): Likewise.
14349 (__arm_vmaxq_m_s32): Likewise.
14350 (__arm_vmaxq_m_s16): Likewise.
14351 (__arm_vmaxq_m_u8): Likewise.
14352 (__arm_vmaxq_m_u32): Likewise.
14353 (__arm_vmaxq_m_u16): Likewise.
14354 (__arm_vminq_m_s8): Likewise.
14355 (__arm_vminq_m_s32): Likewise.
14356 (__arm_vminq_m_s16): Likewise.
14357 (__arm_vminq_m_u8): Likewise.
14358 (__arm_vminq_m_u32): Likewise.
14359 (__arm_vminq_m_u16): Likewise.
14360 (__arm_vmladavaq_p_s8): Likewise.
14361 (__arm_vmladavaq_p_s32): Likewise.
14362 (__arm_vmladavaq_p_s16): Likewise.
14363 (__arm_vmladavaq_p_u8): Likewise.
14364 (__arm_vmladavaq_p_u32): Likewise.
14365 (__arm_vmladavaq_p_u16): Likewise.
14366 (__arm_vmladavaxq_p_s8): Likewise.
14367 (__arm_vmladavaxq_p_s32): Likewise.
14368 (__arm_vmladavaxq_p_s16): Likewise.
14369 (__arm_vmlaq_m_n_s8): Likewise.
14370 (__arm_vmlaq_m_n_s32): Likewise.
14371 (__arm_vmlaq_m_n_s16): Likewise.
14372 (__arm_vmlaq_m_n_u8): Likewise.
14373 (__arm_vmlaq_m_n_u32): Likewise.
14374 (__arm_vmlaq_m_n_u16): Likewise.
14375 (__arm_vmlasq_m_n_s8): Likewise.
14376 (__arm_vmlasq_m_n_s32): Likewise.
14377 (__arm_vmlasq_m_n_s16): Likewise.
14378 (__arm_vmlasq_m_n_u8): Likewise.
14379 (__arm_vmlasq_m_n_u32): Likewise.
14380 (__arm_vmlasq_m_n_u16): Likewise.
14381 (__arm_vmlsdavaq_p_s8): Likewise.
14382 (__arm_vmlsdavaq_p_s32): Likewise.
14383 (__arm_vmlsdavaq_p_s16): Likewise.
14384 (__arm_vmlsdavaxq_p_s8): Likewise.
14385 (__arm_vmlsdavaxq_p_s32): Likewise.
14386 (__arm_vmlsdavaxq_p_s16): Likewise.
14387 (__arm_vmulhq_m_s8): Likewise.
14388 (__arm_vmulhq_m_s32): Likewise.
14389 (__arm_vmulhq_m_s16): Likewise.
14390 (__arm_vmulhq_m_u8): Likewise.
14391 (__arm_vmulhq_m_u32): Likewise.
14392 (__arm_vmulhq_m_u16): Likewise.
14393 (__arm_vmullbq_int_m_s8): Likewise.
14394 (__arm_vmullbq_int_m_s32): Likewise.
14395 (__arm_vmullbq_int_m_s16): Likewise.
14396 (__arm_vmullbq_int_m_u8): Likewise.
14397 (__arm_vmullbq_int_m_u32): Likewise.
14398 (__arm_vmullbq_int_m_u16): Likewise.
14399 (__arm_vmulltq_int_m_s8): Likewise.
14400 (__arm_vmulltq_int_m_s32): Likewise.
14401 (__arm_vmulltq_int_m_s16): Likewise.
14402 (__arm_vmulltq_int_m_u8): Likewise.
14403 (__arm_vmulltq_int_m_u32): Likewise.
14404 (__arm_vmulltq_int_m_u16): Likewise.
14405 (__arm_vmulq_m_n_s8): Likewise.
14406 (__arm_vmulq_m_n_s32): Likewise.
14407 (__arm_vmulq_m_n_s16): Likewise.
14408 (__arm_vmulq_m_n_u8): Likewise.
14409 (__arm_vmulq_m_n_u32): Likewise.
14410 (__arm_vmulq_m_n_u16): Likewise.
14411 (__arm_vmulq_m_s8): Likewise.
14412 (__arm_vmulq_m_s32): Likewise.
14413 (__arm_vmulq_m_s16): Likewise.
14414 (__arm_vmulq_m_u8): Likewise.
14415 (__arm_vmulq_m_u32): Likewise.
14416 (__arm_vmulq_m_u16): Likewise.
14417 (__arm_vornq_m_s8): Likewise.
14418 (__arm_vornq_m_s32): Likewise.
14419 (__arm_vornq_m_s16): Likewise.
14420 (__arm_vornq_m_u8): Likewise.
14421 (__arm_vornq_m_u32): Likewise.
14422 (__arm_vornq_m_u16): Likewise.
14423 (__arm_vorrq_m_s8): Likewise.
14424 (__arm_vorrq_m_s32): Likewise.
14425 (__arm_vorrq_m_s16): Likewise.
14426 (__arm_vorrq_m_u8): Likewise.
14427 (__arm_vorrq_m_u32): Likewise.
14428 (__arm_vorrq_m_u16): Likewise.
14429 (__arm_vqaddq_m_n_s8): Likewise.
14430 (__arm_vqaddq_m_n_s32): Likewise.
14431 (__arm_vqaddq_m_n_s16): Likewise.
14432 (__arm_vqaddq_m_n_u8): Likewise.
14433 (__arm_vqaddq_m_n_u32): Likewise.
14434 (__arm_vqaddq_m_n_u16): Likewise.
14435 (__arm_vqaddq_m_s8): Likewise.
14436 (__arm_vqaddq_m_s32): Likewise.
14437 (__arm_vqaddq_m_s16): Likewise.
14438 (__arm_vqaddq_m_u8): Likewise.
14439 (__arm_vqaddq_m_u32): Likewise.
14440 (__arm_vqaddq_m_u16): Likewise.
14441 (__arm_vqdmladhq_m_s8): Likewise.
14442 (__arm_vqdmladhq_m_s32): Likewise.
14443 (__arm_vqdmladhq_m_s16): Likewise.
14444 (__arm_vqdmladhxq_m_s8): Likewise.
14445 (__arm_vqdmladhxq_m_s32): Likewise.
14446 (__arm_vqdmladhxq_m_s16): Likewise.
14447 (__arm_vqdmlahq_m_n_s8): Likewise.
14448 (__arm_vqdmlahq_m_n_s32): Likewise.
14449 (__arm_vqdmlahq_m_n_s16): Likewise.
14450 (__arm_vqdmlahq_m_n_u8): Likewise.
14451 (__arm_vqdmlahq_m_n_u32): Likewise.
14452 (__arm_vqdmlahq_m_n_u16): Likewise.
14453 (__arm_vqdmlsdhq_m_s8): Likewise.
14454 (__arm_vqdmlsdhq_m_s32): Likewise.
14455 (__arm_vqdmlsdhq_m_s16): Likewise.
14456 (__arm_vqdmlsdhxq_m_s8): Likewise.
14457 (__arm_vqdmlsdhxq_m_s32): Likewise.
14458 (__arm_vqdmlsdhxq_m_s16): Likewise.
14459 (__arm_vqdmulhq_m_n_s8): Likewise.
14460 (__arm_vqdmulhq_m_n_s32): Likewise.
14461 (__arm_vqdmulhq_m_n_s16): Likewise.
14462 (__arm_vqdmulhq_m_s8): Likewise.
14463 (__arm_vqdmulhq_m_s32): Likewise.
14464 (__arm_vqdmulhq_m_s16): Likewise.
14465 (__arm_vqrdmladhq_m_s8): Likewise.
14466 (__arm_vqrdmladhq_m_s32): Likewise.
14467 (__arm_vqrdmladhq_m_s16): Likewise.
14468 (__arm_vqrdmladhxq_m_s8): Likewise.
14469 (__arm_vqrdmladhxq_m_s32): Likewise.
14470 (__arm_vqrdmladhxq_m_s16): Likewise.
14471 (__arm_vqrdmlahq_m_n_s8): Likewise.
14472 (__arm_vqrdmlahq_m_n_s32): Likewise.
14473 (__arm_vqrdmlahq_m_n_s16): Likewise.
14474 (__arm_vqrdmlahq_m_n_u8): Likewise.
14475 (__arm_vqrdmlahq_m_n_u32): Likewise.
14476 (__arm_vqrdmlahq_m_n_u16): Likewise.
14477 (__arm_vqrdmlashq_m_n_s8): Likewise.
14478 (__arm_vqrdmlashq_m_n_s32): Likewise.
14479 (__arm_vqrdmlashq_m_n_s16): Likewise.
14480 (__arm_vqrdmlashq_m_n_u8): Likewise.
14481 (__arm_vqrdmlashq_m_n_u32): Likewise.
14482 (__arm_vqrdmlashq_m_n_u16): Likewise.
14483 (__arm_vqrdmlsdhq_m_s8): Likewise.
14484 (__arm_vqrdmlsdhq_m_s32): Likewise.
14485 (__arm_vqrdmlsdhq_m_s16): Likewise.
14486 (__arm_vqrdmlsdhxq_m_s8): Likewise.
14487 (__arm_vqrdmlsdhxq_m_s32): Likewise.
14488 (__arm_vqrdmlsdhxq_m_s16): Likewise.
14489 (__arm_vqrdmulhq_m_n_s8): Likewise.
14490 (__arm_vqrdmulhq_m_n_s32): Likewise.
14491 (__arm_vqrdmulhq_m_n_s16): Likewise.
14492 (__arm_vqrdmulhq_m_s8): Likewise.
14493 (__arm_vqrdmulhq_m_s32): Likewise.
14494 (__arm_vqrdmulhq_m_s16): Likewise.
14495 (__arm_vqrshlq_m_s8): Likewise.
14496 (__arm_vqrshlq_m_s32): Likewise.
14497 (__arm_vqrshlq_m_s16): Likewise.
14498 (__arm_vqrshlq_m_u8): Likewise.
14499 (__arm_vqrshlq_m_u32): Likewise.
14500 (__arm_vqrshlq_m_u16): Likewise.
14501 (__arm_vqshlq_m_n_s8): Likewise.
14502 (__arm_vqshlq_m_n_s32): Likewise.
14503 (__arm_vqshlq_m_n_s16): Likewise.
14504 (__arm_vqshlq_m_n_u8): Likewise.
14505 (__arm_vqshlq_m_n_u32): Likewise.
14506 (__arm_vqshlq_m_n_u16): Likewise.
14507 (__arm_vqshlq_m_s8): Likewise.
14508 (__arm_vqshlq_m_s32): Likewise.
14509 (__arm_vqshlq_m_s16): Likewise.
14510 (__arm_vqshlq_m_u8): Likewise.
14511 (__arm_vqshlq_m_u32): Likewise.
14512 (__arm_vqshlq_m_u16): Likewise.
14513 (__arm_vqsubq_m_n_s8): Likewise.
14514 (__arm_vqsubq_m_n_s32): Likewise.
14515 (__arm_vqsubq_m_n_s16): Likewise.
14516 (__arm_vqsubq_m_n_u8): Likewise.
14517 (__arm_vqsubq_m_n_u32): Likewise.
14518 (__arm_vqsubq_m_n_u16): Likewise.
14519 (__arm_vqsubq_m_s8): Likewise.
14520 (__arm_vqsubq_m_s32): Likewise.
14521 (__arm_vqsubq_m_s16): Likewise.
14522 (__arm_vqsubq_m_u8): Likewise.
14523 (__arm_vqsubq_m_u32): Likewise.
14524 (__arm_vqsubq_m_u16): Likewise.
14525 (__arm_vrhaddq_m_s8): Likewise.
14526 (__arm_vrhaddq_m_s32): Likewise.
14527 (__arm_vrhaddq_m_s16): Likewise.
14528 (__arm_vrhaddq_m_u8): Likewise.
14529 (__arm_vrhaddq_m_u32): Likewise.
14530 (__arm_vrhaddq_m_u16): Likewise.
14531 (__arm_vrmulhq_m_s8): Likewise.
14532 (__arm_vrmulhq_m_s32): Likewise.
14533 (__arm_vrmulhq_m_s16): Likewise.
14534 (__arm_vrmulhq_m_u8): Likewise.
14535 (__arm_vrmulhq_m_u32): Likewise.
14536 (__arm_vrmulhq_m_u16): Likewise.
14537 (__arm_vrshlq_m_s8): Likewise.
14538 (__arm_vrshlq_m_s32): Likewise.
14539 (__arm_vrshlq_m_s16): Likewise.
14540 (__arm_vrshlq_m_u8): Likewise.
14541 (__arm_vrshlq_m_u32): Likewise.
14542 (__arm_vrshlq_m_u16): Likewise.
14543 (__arm_vrshrq_m_n_s8): Likewise.
14544 (__arm_vrshrq_m_n_s32): Likewise.
14545 (__arm_vrshrq_m_n_s16): Likewise.
14546 (__arm_vrshrq_m_n_u8): Likewise.
14547 (__arm_vrshrq_m_n_u32): Likewise.
14548 (__arm_vrshrq_m_n_u16): Likewise.
14549 (__arm_vshlq_m_n_s8): Likewise.
14550 (__arm_vshlq_m_n_s32): Likewise.
14551 (__arm_vshlq_m_n_s16): Likewise.
14552 (__arm_vshlq_m_n_u8): Likewise.
14553 (__arm_vshlq_m_n_u32): Likewise.
14554 (__arm_vshlq_m_n_u16): Likewise.
14555 (__arm_vshrq_m_n_s8): Likewise.
14556 (__arm_vshrq_m_n_s32): Likewise.
14557 (__arm_vshrq_m_n_s16): Likewise.
14558 (__arm_vshrq_m_n_u8): Likewise.
14559 (__arm_vshrq_m_n_u32): Likewise.
14560 (__arm_vshrq_m_n_u16): Likewise.
14561 (__arm_vsliq_m_n_s8): Likewise.
14562 (__arm_vsliq_m_n_s32): Likewise.
14563 (__arm_vsliq_m_n_s16): Likewise.
14564 (__arm_vsliq_m_n_u8): Likewise.
14565 (__arm_vsliq_m_n_u32): Likewise.
14566 (__arm_vsliq_m_n_u16): Likewise.
14567 (__arm_vsubq_m_n_s8): Likewise.
14568 (__arm_vsubq_m_n_s32): Likewise.
14569 (__arm_vsubq_m_n_s16): Likewise.
14570 (__arm_vsubq_m_n_u8): Likewise.
14571 (__arm_vsubq_m_n_u32): Likewise.
14572 (__arm_vsubq_m_n_u16): Likewise.
14573 (vqdmladhq_m): Define polymorphic variant.
14574 (vqdmladhxq_m): Likewise.
14575 (vqdmlsdhq_m): Likewise.
14576 (vqdmlsdhxq_m): Likewise.
14577 (vabdq_m): Likewise.
14578 (vandq_m): Likewise.
14579 (vbicq_m): Likewise.
14580 (vbrsrq_m_n): Likewise.
14581 (vcaddq_rot270_m): Likewise.
14582 (vcaddq_rot90_m): Likewise.
14583 (veorq_m): Likewise.
14584 (vmaxq_m): Likewise.
14585 (vminq_m): Likewise.
14586 (vmladavaq_p): Likewise.
14587 (vmlaq_m_n): Likewise.
14588 (vmlasq_m_n): Likewise.
14589 (vmulhq_m): Likewise.
14590 (vmullbq_int_m): Likewise.
14591 (vmulltq_int_m): Likewise.
14592 (vornq_m): Likewise.
14593 (vorrq_m): Likewise.
14594 (vqdmlahq_m_n): Likewise.
14595 (vqrdmlahq_m_n): Likewise.
14596 (vqrdmlashq_m_n): Likewise.
14597 (vqrshlq_m): Likewise.
14598 (vqshlq_m_n): Likewise.
14599 (vqshlq_m): Likewise.
14600 (vrhaddq_m): Likewise.
14601 (vrmulhq_m): Likewise.
14602 (vrshlq_m): Likewise.
14603 (vrshrq_m_n): Likewise.
14604 (vshlq_m_n): Likewise.
14605 (vshrq_m_n): Likewise.
14606 (vsliq_m): Likewise.
14607 (vaddq_m_n): Likewise.
14608 (vaddq_m): Likewise.
14609 (vhaddq_m_n): Likewise.
14610 (vhaddq_m): Likewise.
14611 (vhcaddq_rot270_m): Likewise.
14612 (vhcaddq_rot90_m): Likewise.
14613 (vhsubq_m): Likewise.
14614 (vhsubq_m_n): Likewise.
14615 (vmulq_m_n): Likewise.
14616 (vmulq_m): Likewise.
14617 (vqaddq_m_n): Likewise.
14618 (vqaddq_m): Likewise.
14619 (vqdmulhq_m_n): Likewise.
14620 (vqdmulhq_m): Likewise.
14621 (vsubq_m_n): Likewise.
14622 (vsliq_m_n): Likewise.
14623 (vqsubq_m_n): Likewise.
14624 (vqsubq_m): Likewise.
14625 (vqrdmulhq_m): Likewise.
14626 (vqrdmulhq_m_n): Likewise.
14627 (vqrdmlsdhxq_m): Likewise.
14628 (vqrdmlsdhq_m): Likewise.
14629 (vqrdmladhq_m): Likewise.
14630 (vqrdmladhxq_m): Likewise.
14631 (vmlsdavaxq_p): Likewise.
14632 (vmlsdavaq_p): Likewise.
14633 (vmladavaxq_p): Likewise.
14634 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
14636 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
14637 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
14638 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
14639 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
14640 * config/arm/mve.md (VHSUBQ_M): Define iterators.
14641 (VSLIQ_M_N): Likewise.
14642 (VQRDMLAHQ_M_N): Likewise.
14643 (VRSHLQ_M): Likewise.
14644 (VMINQ_M): Likewise.
14645 (VMULLBQ_INT_M): Likewise.
14646 (VMULHQ_M): Likewise.
14647 (VMULQ_M): Likewise.
14648 (VHSUBQ_M_N): Likewise.
14649 (VHADDQ_M_N): Likewise.
14650 (VORRQ_M): Likewise.
14651 (VRMULHQ_M): Likewise.
14652 (VQADDQ_M): Likewise.
14653 (VRSHRQ_M_N): Likewise.
14654 (VQSUBQ_M_N): Likewise.
14655 (VADDQ_M): Likewise.
14656 (VORNQ_M): Likewise.
14657 (VQDMLAHQ_M_N): Likewise.
14658 (VRHADDQ_M): Likewise.
14659 (VQSHLQ_M): Likewise.
14660 (VANDQ_M): Likewise.
14661 (VBICQ_M): Likewise.
14662 (VSHLQ_M_N): Likewise.
14663 (VCADDQ_ROT270_M): Likewise.
14664 (VQRSHLQ_M): Likewise.
14665 (VQADDQ_M_N): Likewise.
14666 (VADDQ_M_N): Likewise.
14667 (VMAXQ_M): Likewise.
14668 (VQSUBQ_M): Likewise.
14669 (VMLASQ_M_N): Likewise.
14670 (VMLADAVAQ_P): Likewise.
14671 (VBRSRQ_M_N): Likewise.
14672 (VMULQ_M_N): Likewise.
14673 (VCADDQ_ROT90_M): Likewise.
14674 (VMULLTQ_INT_M): Likewise.
14675 (VEORQ_M): Likewise.
14676 (VSHRQ_M_N): Likewise.
14677 (VSUBQ_M_N): Likewise.
14678 (VHADDQ_M): Likewise.
14679 (VABDQ_M): Likewise.
14680 (VQRDMLASHQ_M_N): Likewise.
14681 (VMLAQ_M_N): Likewise.
14682 (VQSHLQ_M_N): Likewise.
14683 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
14684 (mve_vaddq_m_n_<supf><mode>): Likewise.
14685 (mve_vaddq_m_<supf><mode>): Likewise.
14686 (mve_vandq_m_<supf><mode>): Likewise.
14687 (mve_vbicq_m_<supf><mode>): Likewise.
14688 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
14689 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
14690 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
14691 (mve_veorq_m_<supf><mode>): Likewise.
14692 (mve_vhaddq_m_n_<supf><mode>): Likewise.
14693 (mve_vhaddq_m_<supf><mode>): Likewise.
14694 (mve_vhsubq_m_n_<supf><mode>): Likewise.
14695 (mve_vhsubq_m_<supf><mode>): Likewise.
14696 (mve_vmaxq_m_<supf><mode>): Likewise.
14697 (mve_vminq_m_<supf><mode>): Likewise.
14698 (mve_vmladavaq_p_<supf><mode>): Likewise.
14699 (mve_vmlaq_m_n_<supf><mode>): Likewise.
14700 (mve_vmlasq_m_n_<supf><mode>): Likewise.
14701 (mve_vmulhq_m_<supf><mode>): Likewise.
14702 (mve_vmullbq_int_m_<supf><mode>): Likewise.
14703 (mve_vmulltq_int_m_<supf><mode>): Likewise.
14704 (mve_vmulq_m_n_<supf><mode>): Likewise.
14705 (mve_vmulq_m_<supf><mode>): Likewise.
14706 (mve_vornq_m_<supf><mode>): Likewise.
14707 (mve_vorrq_m_<supf><mode>): Likewise.
14708 (mve_vqaddq_m_n_<supf><mode>): Likewise.
14709 (mve_vqaddq_m_<supf><mode>): Likewise.
14710 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
14711 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
14712 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
14713 (mve_vqrshlq_m_<supf><mode>): Likewise.
14714 (mve_vqshlq_m_n_<supf><mode>): Likewise.
14715 (mve_vqshlq_m_<supf><mode>): Likewise.
14716 (mve_vqsubq_m_n_<supf><mode>): Likewise.
14717 (mve_vqsubq_m_<supf><mode>): Likewise.
14718 (mve_vrhaddq_m_<supf><mode>): Likewise.
14719 (mve_vrmulhq_m_<supf><mode>): Likewise.
14720 (mve_vrshlq_m_<supf><mode>): Likewise.
14721 (mve_vrshrq_m_n_<supf><mode>): Likewise.
14722 (mve_vshlq_m_n_<supf><mode>): Likewise.
14723 (mve_vshrq_m_n_<supf><mode>): Likewise.
14724 (mve_vsliq_m_n_<supf><mode>): Likewise.
14725 (mve_vsubq_m_n_<supf><mode>): Likewise.
14726 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
14727 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
14728 (mve_vmladavaxq_p_s<mode>): Likewise.
14729 (mve_vmlsdavaq_p_s<mode>): Likewise.
14730 (mve_vmlsdavaxq_p_s<mode>): Likewise.
14731 (mve_vqdmladhq_m_s<mode>): Likewise.
14732 (mve_vqdmladhxq_m_s<mode>): Likewise.
14733 (mve_vqdmlsdhq_m_s<mode>): Likewise.
14734 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
14735 (mve_vqdmulhq_m_n_s<mode>): Likewise.
14736 (mve_vqdmulhq_m_s<mode>): Likewise.
14737 (mve_vqrdmladhq_m_s<mode>): Likewise.
14738 (mve_vqrdmladhxq_m_s<mode>): Likewise.
14739 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
14740 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
14741 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
14742 (mve_vqrdmulhq_m_s<mode>): Likewise.
14744 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14745 Mihail Ionescu <mihail.ionescu@arm.com>
14746 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14748 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
14749 Define builtin qualifier.
14750 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14751 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14752 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14753 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14754 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14755 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14756 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14757 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
14758 (vsubq_m_s8): Likewise.
14759 (vcvtq_m_n_f16_u16): Likewise.
14760 (vqshluq_m_n_s8): Likewise.
14761 (vabavq_p_s8): Likewise.
14762 (vsriq_m_n_u8): Likewise.
14763 (vshlq_m_u8): Likewise.
14764 (vsubq_m_u8): Likewise.
14765 (vabavq_p_u8): Likewise.
14766 (vshlq_m_s8): Likewise.
14767 (vcvtq_m_n_f16_s16): Likewise.
14768 (vsriq_m_n_s16): Likewise.
14769 (vsubq_m_s16): Likewise.
14770 (vcvtq_m_n_f32_u32): Likewise.
14771 (vqshluq_m_n_s16): Likewise.
14772 (vabavq_p_s16): Likewise.
14773 (vsriq_m_n_u16): Likewise.
14774 (vshlq_m_u16): Likewise.
14775 (vsubq_m_u16): Likewise.
14776 (vabavq_p_u16): Likewise.
14777 (vshlq_m_s16): Likewise.
14778 (vcvtq_m_n_f32_s32): Likewise.
14779 (vsriq_m_n_s32): Likewise.
14780 (vsubq_m_s32): Likewise.
14781 (vqshluq_m_n_s32): Likewise.
14782 (vabavq_p_s32): Likewise.
14783 (vsriq_m_n_u32): Likewise.
14784 (vshlq_m_u32): Likewise.
14785 (vsubq_m_u32): Likewise.
14786 (vabavq_p_u32): Likewise.
14787 (vshlq_m_s32): Likewise.
14788 (__arm_vsriq_m_n_s8): Define intrinsic.
14789 (__arm_vsubq_m_s8): Likewise.
14790 (__arm_vqshluq_m_n_s8): Likewise.
14791 (__arm_vabavq_p_s8): Likewise.
14792 (__arm_vsriq_m_n_u8): Likewise.
14793 (__arm_vshlq_m_u8): Likewise.
14794 (__arm_vsubq_m_u8): Likewise.
14795 (__arm_vabavq_p_u8): Likewise.
14796 (__arm_vshlq_m_s8): Likewise.
14797 (__arm_vsriq_m_n_s16): Likewise.
14798 (__arm_vsubq_m_s16): Likewise.
14799 (__arm_vqshluq_m_n_s16): Likewise.
14800 (__arm_vabavq_p_s16): Likewise.
14801 (__arm_vsriq_m_n_u16): Likewise.
14802 (__arm_vshlq_m_u16): Likewise.
14803 (__arm_vsubq_m_u16): Likewise.
14804 (__arm_vabavq_p_u16): Likewise.
14805 (__arm_vshlq_m_s16): Likewise.
14806 (__arm_vsriq_m_n_s32): Likewise.
14807 (__arm_vsubq_m_s32): Likewise.
14808 (__arm_vqshluq_m_n_s32): Likewise.
14809 (__arm_vabavq_p_s32): Likewise.
14810 (__arm_vsriq_m_n_u32): Likewise.
14811 (__arm_vshlq_m_u32): Likewise.
14812 (__arm_vsubq_m_u32): Likewise.
14813 (__arm_vabavq_p_u32): Likewise.
14814 (__arm_vshlq_m_s32): Likewise.
14815 (__arm_vcvtq_m_n_f16_u16): Likewise.
14816 (__arm_vcvtq_m_n_f16_s16): Likewise.
14817 (__arm_vcvtq_m_n_f32_u32): Likewise.
14818 (__arm_vcvtq_m_n_f32_s32): Likewise.
14819 (vcvtq_m_n): Define polymorphic variant.
14820 (vqshluq_m_n): Likewise.
14821 (vshlq_m): Likewise.
14822 (vsriq_m_n): Likewise.
14823 (vsubq_m): Likewise.
14824 (vabavq_p): Likewise.
14825 * config/arm/arm_mve_builtins.def
14826 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
14827 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14828 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14829 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14830 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14831 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14832 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14833 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14834 * config/arm/mve.md (VABAVQ_P): Define iterator.
14835 (VSHLQ_M): Likewise.
14836 (VSRIQ_M_N): Likewise.
14837 (VSUBQ_M): Likewise.
14838 (VCVTQ_M_N_TO_F): Likewise.
14839 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
14840 (mve_vqshluq_m_n_s<mode>): Likewise.
14841 (mve_vshlq_m_<supf><mode>): Likewise.
14842 (mve_vsriq_m_n_<supf><mode>): Likewise.
14843 (mve_vsubq_m_<supf><mode>): Likewise.
14844 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
14846 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14847 Mihail Ionescu <mihail.ionescu@arm.com>
14848 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14850 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
14851 (vrmlsldavhaq_s32): Likewise.
14852 (vrmlsldavhaxq_s32): Likewise.
14853 (vaddlvaq_p_s32): Likewise.
14854 (vcvtbq_m_f16_f32): Likewise.
14855 (vcvtbq_m_f32_f16): Likewise.
14856 (vcvttq_m_f16_f32): Likewise.
14857 (vcvttq_m_f32_f16): Likewise.
14858 (vrev16q_m_s8): Likewise.
14859 (vrev32q_m_f16): Likewise.
14860 (vrmlaldavhq_p_s32): Likewise.
14861 (vrmlaldavhxq_p_s32): Likewise.
14862 (vrmlsldavhq_p_s32): Likewise.
14863 (vrmlsldavhxq_p_s32): Likewise.
14864 (vaddlvaq_p_u32): Likewise.
14865 (vrev16q_m_u8): Likewise.
14866 (vrmlaldavhq_p_u32): Likewise.
14867 (vmvnq_m_n_s16): Likewise.
14868 (vorrq_m_n_s16): Likewise.
14869 (vqrshrntq_n_s16): Likewise.
14870 (vqshrnbq_n_s16): Likewise.
14871 (vqshrntq_n_s16): Likewise.
14872 (vrshrnbq_n_s16): Likewise.
14873 (vrshrntq_n_s16): Likewise.
14874 (vshrnbq_n_s16): Likewise.
14875 (vshrntq_n_s16): Likewise.
14876 (vcmlaq_f16): Likewise.
14877 (vcmlaq_rot180_f16): Likewise.
14878 (vcmlaq_rot270_f16): Likewise.
14879 (vcmlaq_rot90_f16): Likewise.
14880 (vfmaq_f16): Likewise.
14881 (vfmaq_n_f16): Likewise.
14882 (vfmasq_n_f16): Likewise.
14883 (vfmsq_f16): Likewise.
14884 (vmlaldavaq_s16): Likewise.
14885 (vmlaldavaxq_s16): Likewise.
14886 (vmlsldavaq_s16): Likewise.
14887 (vmlsldavaxq_s16): Likewise.
14888 (vabsq_m_f16): Likewise.
14889 (vcvtmq_m_s16_f16): Likewise.
14890 (vcvtnq_m_s16_f16): Likewise.
14891 (vcvtpq_m_s16_f16): Likewise.
14892 (vcvtq_m_s16_f16): Likewise.
14893 (vdupq_m_n_f16): Likewise.
14894 (vmaxnmaq_m_f16): Likewise.
14895 (vmaxnmavq_p_f16): Likewise.
14896 (vmaxnmvq_p_f16): Likewise.
14897 (vminnmaq_m_f16): Likewise.
14898 (vminnmavq_p_f16): Likewise.
14899 (vminnmvq_p_f16): Likewise.
14900 (vmlaldavq_p_s16): Likewise.
14901 (vmlaldavxq_p_s16): Likewise.
14902 (vmlsldavq_p_s16): Likewise.
14903 (vmlsldavxq_p_s16): Likewise.
14904 (vmovlbq_m_s8): Likewise.
14905 (vmovltq_m_s8): Likewise.
14906 (vmovnbq_m_s16): Likewise.
14907 (vmovntq_m_s16): Likewise.
14908 (vnegq_m_f16): Likewise.
14909 (vpselq_f16): Likewise.
14910 (vqmovnbq_m_s16): Likewise.
14911 (vqmovntq_m_s16): Likewise.
14912 (vrev32q_m_s8): Likewise.
14913 (vrev64q_m_f16): Likewise.
14914 (vrndaq_m_f16): Likewise.
14915 (vrndmq_m_f16): Likewise.
14916 (vrndnq_m_f16): Likewise.
14917 (vrndpq_m_f16): Likewise.
14918 (vrndq_m_f16): Likewise.
14919 (vrndxq_m_f16): Likewise.
14920 (vcmpeqq_m_n_f16): Likewise.
14921 (vcmpgeq_m_f16): Likewise.
14922 (vcmpgeq_m_n_f16): Likewise.
14923 (vcmpgtq_m_f16): Likewise.
14924 (vcmpgtq_m_n_f16): Likewise.
14925 (vcmpleq_m_f16): Likewise.
14926 (vcmpleq_m_n_f16): Likewise.
14927 (vcmpltq_m_f16): Likewise.
14928 (vcmpltq_m_n_f16): Likewise.
14929 (vcmpneq_m_f16): Likewise.
14930 (vcmpneq_m_n_f16): Likewise.
14931 (vmvnq_m_n_u16): Likewise.
14932 (vorrq_m_n_u16): Likewise.
14933 (vqrshruntq_n_s16): Likewise.
14934 (vqshrunbq_n_s16): Likewise.
14935 (vqshruntq_n_s16): Likewise.
14936 (vcvtmq_m_u16_f16): Likewise.
14937 (vcvtnq_m_u16_f16): Likewise.
14938 (vcvtpq_m_u16_f16): Likewise.
14939 (vcvtq_m_u16_f16): Likewise.
14940 (vqmovunbq_m_s16): Likewise.
14941 (vqmovuntq_m_s16): Likewise.
14942 (vqrshrntq_n_u16): Likewise.
14943 (vqshrnbq_n_u16): Likewise.
14944 (vqshrntq_n_u16): Likewise.
14945 (vrshrnbq_n_u16): Likewise.
14946 (vrshrntq_n_u16): Likewise.
14947 (vshrnbq_n_u16): Likewise.
14948 (vshrntq_n_u16): Likewise.
14949 (vmlaldavaq_u16): Likewise.
14950 (vmlaldavaxq_u16): Likewise.
14951 (vmlaldavq_p_u16): Likewise.
14952 (vmlaldavxq_p_u16): Likewise.
14953 (vmovlbq_m_u8): Likewise.
14954 (vmovltq_m_u8): Likewise.
14955 (vmovnbq_m_u16): Likewise.
14956 (vmovntq_m_u16): Likewise.
14957 (vqmovnbq_m_u16): Likewise.
14958 (vqmovntq_m_u16): Likewise.
14959 (vrev32q_m_u8): Likewise.
14960 (vmvnq_m_n_s32): Likewise.
14961 (vorrq_m_n_s32): Likewise.
14962 (vqrshrntq_n_s32): Likewise.
14963 (vqshrnbq_n_s32): Likewise.
14964 (vqshrntq_n_s32): Likewise.
14965 (vrshrnbq_n_s32): Likewise.
14966 (vrshrntq_n_s32): Likewise.
14967 (vshrnbq_n_s32): Likewise.
14968 (vshrntq_n_s32): Likewise.
14969 (vcmlaq_f32): Likewise.
14970 (vcmlaq_rot180_f32): Likewise.
14971 (vcmlaq_rot270_f32): Likewise.
14972 (vcmlaq_rot90_f32): Likewise.
14973 (vfmaq_f32): Likewise.
14974 (vfmaq_n_f32): Likewise.
14975 (vfmasq_n_f32): Likewise.
14976 (vfmsq_f32): Likewise.
14977 (vmlaldavaq_s32): Likewise.
14978 (vmlaldavaxq_s32): Likewise.
14979 (vmlsldavaq_s32): Likewise.
14980 (vmlsldavaxq_s32): Likewise.
14981 (vabsq_m_f32): Likewise.
14982 (vcvtmq_m_s32_f32): Likewise.
14983 (vcvtnq_m_s32_f32): Likewise.
14984 (vcvtpq_m_s32_f32): Likewise.
14985 (vcvtq_m_s32_f32): Likewise.
14986 (vdupq_m_n_f32): Likewise.
14987 (vmaxnmaq_m_f32): Likewise.
14988 (vmaxnmavq_p_f32): Likewise.
14989 (vmaxnmvq_p_f32): Likewise.
14990 (vminnmaq_m_f32): Likewise.
14991 (vminnmavq_p_f32): Likewise.
14992 (vminnmvq_p_f32): Likewise.
14993 (vmlaldavq_p_s32): Likewise.
14994 (vmlaldavxq_p_s32): Likewise.
14995 (vmlsldavq_p_s32): Likewise.
14996 (vmlsldavxq_p_s32): Likewise.
14997 (vmovlbq_m_s16): Likewise.
14998 (vmovltq_m_s16): Likewise.
14999 (vmovnbq_m_s32): Likewise.
15000 (vmovntq_m_s32): Likewise.
15001 (vnegq_m_f32): Likewise.
15002 (vpselq_f32): Likewise.
15003 (vqmovnbq_m_s32): Likewise.
15004 (vqmovntq_m_s32): Likewise.
15005 (vrev32q_m_s16): Likewise.
15006 (vrev64q_m_f32): Likewise.
15007 (vrndaq_m_f32): Likewise.
15008 (vrndmq_m_f32): Likewise.
15009 (vrndnq_m_f32): Likewise.
15010 (vrndpq_m_f32): Likewise.
15011 (vrndq_m_f32): Likewise.
15012 (vrndxq_m_f32): Likewise.
15013 (vcmpeqq_m_n_f32): Likewise.
15014 (vcmpgeq_m_f32): Likewise.
15015 (vcmpgeq_m_n_f32): Likewise.
15016 (vcmpgtq_m_f32): Likewise.
15017 (vcmpgtq_m_n_f32): Likewise.
15018 (vcmpleq_m_f32): Likewise.
15019 (vcmpleq_m_n_f32): Likewise.
15020 (vcmpltq_m_f32): Likewise.
15021 (vcmpltq_m_n_f32): Likewise.
15022 (vcmpneq_m_f32): Likewise.
15023 (vcmpneq_m_n_f32): Likewise.
15024 (vmvnq_m_n_u32): Likewise.
15025 (vorrq_m_n_u32): Likewise.
15026 (vqrshruntq_n_s32): Likewise.
15027 (vqshrunbq_n_s32): Likewise.
15028 (vqshruntq_n_s32): Likewise.
15029 (vcvtmq_m_u32_f32): Likewise.
15030 (vcvtnq_m_u32_f32): Likewise.
15031 (vcvtpq_m_u32_f32): Likewise.
15032 (vcvtq_m_u32_f32): Likewise.
15033 (vqmovunbq_m_s32): Likewise.
15034 (vqmovuntq_m_s32): Likewise.
15035 (vqrshrntq_n_u32): Likewise.
15036 (vqshrnbq_n_u32): Likewise.
15037 (vqshrntq_n_u32): Likewise.
15038 (vrshrnbq_n_u32): Likewise.
15039 (vrshrntq_n_u32): Likewise.
15040 (vshrnbq_n_u32): Likewise.
15041 (vshrntq_n_u32): Likewise.
15042 (vmlaldavaq_u32): Likewise.
15043 (vmlaldavaxq_u32): Likewise.
15044 (vmlaldavq_p_u32): Likewise.
15045 (vmlaldavxq_p_u32): Likewise.
15046 (vmovlbq_m_u16): Likewise.
15047 (vmovltq_m_u16): Likewise.
15048 (vmovnbq_m_u32): Likewise.
15049 (vmovntq_m_u32): Likewise.
15050 (vqmovnbq_m_u32): Likewise.
15051 (vqmovntq_m_u32): Likewise.
15052 (vrev32q_m_u16): Likewise.
15053 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
15054 (__arm_vrmlsldavhaq_s32): Likewise.
15055 (__arm_vrmlsldavhaxq_s32): Likewise.
15056 (__arm_vaddlvaq_p_s32): Likewise.
15057 (__arm_vrev16q_m_s8): Likewise.
15058 (__arm_vrmlaldavhq_p_s32): Likewise.
15059 (__arm_vrmlaldavhxq_p_s32): Likewise.
15060 (__arm_vrmlsldavhq_p_s32): Likewise.
15061 (__arm_vrmlsldavhxq_p_s32): Likewise.
15062 (__arm_vaddlvaq_p_u32): Likewise.
15063 (__arm_vrev16q_m_u8): Likewise.
15064 (__arm_vrmlaldavhq_p_u32): Likewise.
15065 (__arm_vmvnq_m_n_s16): Likewise.
15066 (__arm_vorrq_m_n_s16): Likewise.
15067 (__arm_vqrshrntq_n_s16): Likewise.
15068 (__arm_vqshrnbq_n_s16): Likewise.
15069 (__arm_vqshrntq_n_s16): Likewise.
15070 (__arm_vrshrnbq_n_s16): Likewise.
15071 (__arm_vrshrntq_n_s16): Likewise.
15072 (__arm_vshrnbq_n_s16): Likewise.
15073 (__arm_vshrntq_n_s16): Likewise.
15074 (__arm_vmlaldavaq_s16): Likewise.
15075 (__arm_vmlaldavaxq_s16): Likewise.
15076 (__arm_vmlsldavaq_s16): Likewise.
15077 (__arm_vmlsldavaxq_s16): Likewise.
15078 (__arm_vmlaldavq_p_s16): Likewise.
15079 (__arm_vmlaldavxq_p_s16): Likewise.
15080 (__arm_vmlsldavq_p_s16): Likewise.
15081 (__arm_vmlsldavxq_p_s16): Likewise.
15082 (__arm_vmovlbq_m_s8): Likewise.
15083 (__arm_vmovltq_m_s8): Likewise.
15084 (__arm_vmovnbq_m_s16): Likewise.
15085 (__arm_vmovntq_m_s16): Likewise.
15086 (__arm_vqmovnbq_m_s16): Likewise.
15087 (__arm_vqmovntq_m_s16): Likewise.
15088 (__arm_vrev32q_m_s8): Likewise.
15089 (__arm_vmvnq_m_n_u16): Likewise.
15090 (__arm_vorrq_m_n_u16): Likewise.
15091 (__arm_vqrshruntq_n_s16): Likewise.
15092 (__arm_vqshrunbq_n_s16): Likewise.
15093 (__arm_vqshruntq_n_s16): Likewise.
15094 (__arm_vqmovunbq_m_s16): Likewise.
15095 (__arm_vqmovuntq_m_s16): Likewise.
15096 (__arm_vqrshrntq_n_u16): Likewise.
15097 (__arm_vqshrnbq_n_u16): Likewise.
15098 (__arm_vqshrntq_n_u16): Likewise.
15099 (__arm_vrshrnbq_n_u16): Likewise.
15100 (__arm_vrshrntq_n_u16): Likewise.
15101 (__arm_vshrnbq_n_u16): Likewise.
15102 (__arm_vshrntq_n_u16): Likewise.
15103 (__arm_vmlaldavaq_u16): Likewise.
15104 (__arm_vmlaldavaxq_u16): Likewise.
15105 (__arm_vmlaldavq_p_u16): Likewise.
15106 (__arm_vmlaldavxq_p_u16): Likewise.
15107 (__arm_vmovlbq_m_u8): Likewise.
15108 (__arm_vmovltq_m_u8): Likewise.
15109 (__arm_vmovnbq_m_u16): Likewise.
15110 (__arm_vmovntq_m_u16): Likewise.
15111 (__arm_vqmovnbq_m_u16): Likewise.
15112 (__arm_vqmovntq_m_u16): Likewise.
15113 (__arm_vrev32q_m_u8): Likewise.
15114 (__arm_vmvnq_m_n_s32): Likewise.
15115 (__arm_vorrq_m_n_s32): Likewise.
15116 (__arm_vqrshrntq_n_s32): Likewise.
15117 (__arm_vqshrnbq_n_s32): Likewise.
15118 (__arm_vqshrntq_n_s32): Likewise.
15119 (__arm_vrshrnbq_n_s32): Likewise.
15120 (__arm_vrshrntq_n_s32): Likewise.
15121 (__arm_vshrnbq_n_s32): Likewise.
15122 (__arm_vshrntq_n_s32): Likewise.
15123 (__arm_vmlaldavaq_s32): Likewise.
15124 (__arm_vmlaldavaxq_s32): Likewise.
15125 (__arm_vmlsldavaq_s32): Likewise.
15126 (__arm_vmlsldavaxq_s32): Likewise.
15127 (__arm_vmlaldavq_p_s32): Likewise.
15128 (__arm_vmlaldavxq_p_s32): Likewise.
15129 (__arm_vmlsldavq_p_s32): Likewise.
15130 (__arm_vmlsldavxq_p_s32): Likewise.
15131 (__arm_vmovlbq_m_s16): Likewise.
15132 (__arm_vmovltq_m_s16): Likewise.
15133 (__arm_vmovnbq_m_s32): Likewise.
15134 (__arm_vmovntq_m_s32): Likewise.
15135 (__arm_vqmovnbq_m_s32): Likewise.
15136 (__arm_vqmovntq_m_s32): Likewise.
15137 (__arm_vrev32q_m_s16): Likewise.
15138 (__arm_vmvnq_m_n_u32): Likewise.
15139 (__arm_vorrq_m_n_u32): Likewise.
15140 (__arm_vqrshruntq_n_s32): Likewise.
15141 (__arm_vqshrunbq_n_s32): Likewise.
15142 (__arm_vqshruntq_n_s32): Likewise.
15143 (__arm_vqmovunbq_m_s32): Likewise.
15144 (__arm_vqmovuntq_m_s32): Likewise.
15145 (__arm_vqrshrntq_n_u32): Likewise.
15146 (__arm_vqshrnbq_n_u32): Likewise.
15147 (__arm_vqshrntq_n_u32): Likewise.
15148 (__arm_vrshrnbq_n_u32): Likewise.
15149 (__arm_vrshrntq_n_u32): Likewise.
15150 (__arm_vshrnbq_n_u32): Likewise.
15151 (__arm_vshrntq_n_u32): Likewise.
15152 (__arm_vmlaldavaq_u32): Likewise.
15153 (__arm_vmlaldavaxq_u32): Likewise.
15154 (__arm_vmlaldavq_p_u32): Likewise.
15155 (__arm_vmlaldavxq_p_u32): Likewise.
15156 (__arm_vmovlbq_m_u16): Likewise.
15157 (__arm_vmovltq_m_u16): Likewise.
15158 (__arm_vmovnbq_m_u32): Likewise.
15159 (__arm_vmovntq_m_u32): Likewise.
15160 (__arm_vqmovnbq_m_u32): Likewise.
15161 (__arm_vqmovntq_m_u32): Likewise.
15162 (__arm_vrev32q_m_u16): Likewise.
15163 (__arm_vcvtbq_m_f16_f32): Likewise.
15164 (__arm_vcvtbq_m_f32_f16): Likewise.
15165 (__arm_vcvttq_m_f16_f32): Likewise.
15166 (__arm_vcvttq_m_f32_f16): Likewise.
15167 (__arm_vrev32q_m_f16): Likewise.
15168 (__arm_vcmlaq_f16): Likewise.
15169 (__arm_vcmlaq_rot180_f16): Likewise.
15170 (__arm_vcmlaq_rot270_f16): Likewise.
15171 (__arm_vcmlaq_rot90_f16): Likewise.
15172 (__arm_vfmaq_f16): Likewise.
15173 (__arm_vfmaq_n_f16): Likewise.
15174 (__arm_vfmasq_n_f16): Likewise.
15175 (__arm_vfmsq_f16): Likewise.
15176 (__arm_vabsq_m_f16): Likewise.
15177 (__arm_vcvtmq_m_s16_f16): Likewise.
15178 (__arm_vcvtnq_m_s16_f16): Likewise.
15179 (__arm_vcvtpq_m_s16_f16): Likewise.
15180 (__arm_vcvtq_m_s16_f16): Likewise.
15181 (__arm_vdupq_m_n_f16): Likewise.
15182 (__arm_vmaxnmaq_m_f16): Likewise.
15183 (__arm_vmaxnmavq_p_f16): Likewise.
15184 (__arm_vmaxnmvq_p_f16): Likewise.
15185 (__arm_vminnmaq_m_f16): Likewise.
15186 (__arm_vminnmavq_p_f16): Likewise.
15187 (__arm_vminnmvq_p_f16): Likewise.
15188 (__arm_vnegq_m_f16): Likewise.
15189 (__arm_vpselq_f16): Likewise.
15190 (__arm_vrev64q_m_f16): Likewise.
15191 (__arm_vrndaq_m_f16): Likewise.
15192 (__arm_vrndmq_m_f16): Likewise.
15193 (__arm_vrndnq_m_f16): Likewise.
15194 (__arm_vrndpq_m_f16): Likewise.
15195 (__arm_vrndq_m_f16): Likewise.
15196 (__arm_vrndxq_m_f16): Likewise.
15197 (__arm_vcmpeqq_m_n_f16): Likewise.
15198 (__arm_vcmpgeq_m_f16): Likewise.
15199 (__arm_vcmpgeq_m_n_f16): Likewise.
15200 (__arm_vcmpgtq_m_f16): Likewise.
15201 (__arm_vcmpgtq_m_n_f16): Likewise.
15202 (__arm_vcmpleq_m_f16): Likewise.
15203 (__arm_vcmpleq_m_n_f16): Likewise.
15204 (__arm_vcmpltq_m_f16): Likewise.
15205 (__arm_vcmpltq_m_n_f16): Likewise.
15206 (__arm_vcmpneq_m_f16): Likewise.
15207 (__arm_vcmpneq_m_n_f16): Likewise.
15208 (__arm_vcvtmq_m_u16_f16): Likewise.
15209 (__arm_vcvtnq_m_u16_f16): Likewise.
15210 (__arm_vcvtpq_m_u16_f16): Likewise.
15211 (__arm_vcvtq_m_u16_f16): Likewise.
15212 (__arm_vcmlaq_f32): Likewise.
15213 (__arm_vcmlaq_rot180_f32): Likewise.
15214 (__arm_vcmlaq_rot270_f32): Likewise.
15215 (__arm_vcmlaq_rot90_f32): Likewise.
15216 (__arm_vfmaq_f32): Likewise.
15217 (__arm_vfmaq_n_f32): Likewise.
15218 (__arm_vfmasq_n_f32): Likewise.
15219 (__arm_vfmsq_f32): Likewise.
15220 (__arm_vabsq_m_f32): Likewise.
15221 (__arm_vcvtmq_m_s32_f32): Likewise.
15222 (__arm_vcvtnq_m_s32_f32): Likewise.
15223 (__arm_vcvtpq_m_s32_f32): Likewise.
15224 (__arm_vcvtq_m_s32_f32): Likewise.
15225 (__arm_vdupq_m_n_f32): Likewise.
15226 (__arm_vmaxnmaq_m_f32): Likewise.
15227 (__arm_vmaxnmavq_p_f32): Likewise.
15228 (__arm_vmaxnmvq_p_f32): Likewise.
15229 (__arm_vminnmaq_m_f32): Likewise.
15230 (__arm_vminnmavq_p_f32): Likewise.
15231 (__arm_vminnmvq_p_f32): Likewise.
15232 (__arm_vnegq_m_f32): Likewise.
15233 (__arm_vpselq_f32): Likewise.
15234 (__arm_vrev64q_m_f32): Likewise.
15235 (__arm_vrndaq_m_f32): Likewise.
15236 (__arm_vrndmq_m_f32): Likewise.
15237 (__arm_vrndnq_m_f32): Likewise.
15238 (__arm_vrndpq_m_f32): Likewise.
15239 (__arm_vrndq_m_f32): Likewise.
15240 (__arm_vrndxq_m_f32): Likewise.
15241 (__arm_vcmpeqq_m_n_f32): Likewise.
15242 (__arm_vcmpgeq_m_f32): Likewise.
15243 (__arm_vcmpgeq_m_n_f32): Likewise.
15244 (__arm_vcmpgtq_m_f32): Likewise.
15245 (__arm_vcmpgtq_m_n_f32): Likewise.
15246 (__arm_vcmpleq_m_f32): Likewise.
15247 (__arm_vcmpleq_m_n_f32): Likewise.
15248 (__arm_vcmpltq_m_f32): Likewise.
15249 (__arm_vcmpltq_m_n_f32): Likewise.
15250 (__arm_vcmpneq_m_f32): Likewise.
15251 (__arm_vcmpneq_m_n_f32): Likewise.
15252 (__arm_vcvtmq_m_u32_f32): Likewise.
15253 (__arm_vcvtnq_m_u32_f32): Likewise.
15254 (__arm_vcvtpq_m_u32_f32): Likewise.
15255 (__arm_vcvtq_m_u32_f32): Likewise.
15256 (vcvtq_m): Define polymorphic variant.
15257 (vabsq_m): Likewise.
15258 (vcmlaq): Likewise.
15259 (vcmlaq_rot180): Likewise.
15260 (vcmlaq_rot270): Likewise.
15261 (vcmlaq_rot90): Likewise.
15262 (vcmpeqq_m_n): Likewise.
15263 (vcmpgeq_m_n): Likewise.
15264 (vrndxq_m): Likewise.
15265 (vrndq_m): Likewise.
15266 (vrndpq_m): Likewise.
15267 (vcmpgtq_m_n): Likewise.
15268 (vcmpgtq_m): Likewise.
15269 (vcmpleq_m): Likewise.
15270 (vcmpleq_m_n): Likewise.
15271 (vcmpltq_m_n): Likewise.
15272 (vcmpltq_m): Likewise.
15273 (vcmpneq_m): Likewise.
15274 (vcmpneq_m_n): Likewise.
15275 (vcvtbq_m): Likewise.
15276 (vcvttq_m): Likewise.
15277 (vcvtmq_m): Likewise.
15278 (vcvtnq_m): Likewise.
15279 (vcvtpq_m): Likewise.
15280 (vdupq_m_n): Likewise.
15281 (vfmaq_n): Likewise.
15283 (vfmasq_n): Likewise.
15285 (vmaxnmaq_m): Likewise.
15286 (vmaxnmavq_m): Likewise.
15287 (vmaxnmvq_m): Likewise.
15288 (vmaxnmavq_p): Likewise.
15289 (vmaxnmvq_p): Likewise.
15290 (vminnmaq_m): Likewise.
15291 (vminnmavq_p): Likewise.
15292 (vminnmvq_p): Likewise.
15293 (vrndnq_m): Likewise.
15294 (vrndaq_m): Likewise.
15295 (vrndmq_m): Likewise.
15296 (vrev64q_m): Likewise.
15297 (vrev32q_m): Likewise.
15298 (vpselq): Likewise.
15299 (vnegq_m): Likewise.
15300 (vcmpgeq_m): Likewise.
15301 (vshrntq_n): Likewise.
15302 (vrshrntq_n): Likewise.
15303 (vmovlbq_m): Likewise.
15304 (vmovnbq_m): Likewise.
15305 (vmovntq_m): Likewise.
15306 (vmvnq_m_n): Likewise.
15307 (vmvnq_m): Likewise.
15308 (vshrnbq_n): Likewise.
15309 (vrshrnbq_n): Likewise.
15310 (vqshruntq_n): Likewise.
15311 (vrev16q_m): Likewise.
15312 (vqshrunbq_n): Likewise.
15313 (vqshrntq_n): Likewise.
15314 (vqrshruntq_n): Likewise.
15315 (vqrshrntq_n): Likewise.
15316 (vqshrnbq_n): Likewise.
15317 (vqmovuntq_m): Likewise.
15318 (vqmovntq_m): Likewise.
15319 (vqmovnbq_m): Likewise.
15320 (vorrq_m_n): Likewise.
15321 (vmovltq_m): Likewise.
15322 (vqmovunbq_m): Likewise.
15323 (vaddlvaq_p): Likewise.
15324 (vmlaldavaq): Likewise.
15325 (vmlaldavaxq): Likewise.
15326 (vmlaldavq_p): Likewise.
15327 (vmlaldavxq_p): Likewise.
15328 (vmlsldavaq): Likewise.
15329 (vmlsldavaxq): Likewise.
15330 (vmlsldavq_p): Likewise.
15331 (vmlsldavxq_p): Likewise.
15332 (vrmlaldavhaxq): Likewise.
15333 (vrmlaldavhq_p): Likewise.
15334 (vrmlaldavhxq_p): Likewise.
15335 (vrmlsldavhaq): Likewise.
15336 (vrmlsldavhaxq): Likewise.
15337 (vrmlsldavhq_p): Likewise.
15338 (vrmlsldavhxq_p): Likewise.
15339 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
15341 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
15342 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
15343 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
15344 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
15345 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
15346 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
15347 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
15348 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
15349 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
15350 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
15351 (MVE_pred3): Likewise.
15352 (MVE_constraint1): Likewise.
15353 (MVE_pred1): Likewise.
15354 (VMLALDAVQ_P): Define iterator.
15355 (VQMOVNBQ_M): Likewise.
15356 (VMOVLTQ_M): Likewise.
15357 (VMOVNBQ_M): Likewise.
15358 (VRSHRNTQ_N): Likewise.
15359 (VORRQ_M_N): Likewise.
15360 (VREV32Q_M): Likewise.
15361 (VREV16Q_M): Likewise.
15362 (VQRSHRNTQ_N): Likewise.
15363 (VMOVNTQ_M): Likewise.
15364 (VMOVLBQ_M): Likewise.
15365 (VMLALDAVAQ): Likewise.
15366 (VQSHRNBQ_N): Likewise.
15367 (VSHRNBQ_N): Likewise.
15368 (VRSHRNBQ_N): Likewise.
15369 (VMLALDAVXQ_P): Likewise.
15370 (VQMOVNTQ_M): Likewise.
15371 (VMVNQ_M_N): Likewise.
15372 (VQSHRNTQ_N): Likewise.
15373 (VMLALDAVAXQ): Likewise.
15374 (VSHRNTQ_N): Likewise.
15375 (VCVTMQ_M): Likewise.
15376 (VCVTNQ_M): Likewise.
15377 (VCVTPQ_M): Likewise.
15378 (VCVTQ_M_N_FROM_F): Likewise.
15379 (VCVTQ_M_FROM_F): Likewise.
15380 (VRMLALDAVHQ_P): Likewise.
15381 (VADDLVAQ_P): Likewise.
15382 (mve_vrndq_m_f<mode>): Define RTL pattern.
15383 (mve_vabsq_m_f<mode>): Likewise.
15384 (mve_vaddlvaq_p_<supf>v4si): Likewise.
15385 (mve_vcmlaq_f<mode>): Likewise.
15386 (mve_vcmlaq_rot180_f<mode>): Likewise.
15387 (mve_vcmlaq_rot270_f<mode>): Likewise.
15388 (mve_vcmlaq_rot90_f<mode>): Likewise.
15389 (mve_vcmpeqq_m_n_f<mode>): Likewise.
15390 (mve_vcmpgeq_m_f<mode>): Likewise.
15391 (mve_vcmpgeq_m_n_f<mode>): Likewise.
15392 (mve_vcmpgtq_m_f<mode>): Likewise.
15393 (mve_vcmpgtq_m_n_f<mode>): Likewise.
15394 (mve_vcmpleq_m_f<mode>): Likewise.
15395 (mve_vcmpleq_m_n_f<mode>): Likewise.
15396 (mve_vcmpltq_m_f<mode>): Likewise.
15397 (mve_vcmpltq_m_n_f<mode>): Likewise.
15398 (mve_vcmpneq_m_f<mode>): Likewise.
15399 (mve_vcmpneq_m_n_f<mode>): Likewise.
15400 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
15401 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
15402 (mve_vcvttq_m_f16_f32v8hf): Likewise.
15403 (mve_vcvttq_m_f32_f16v4sf): Likewise.
15404 (mve_vdupq_m_n_f<mode>): Likewise.
15405 (mve_vfmaq_f<mode>): Likewise.
15406 (mve_vfmaq_n_f<mode>): Likewise.
15407 (mve_vfmasq_n_f<mode>): Likewise.
15408 (mve_vfmsq_f<mode>): Likewise.
15409 (mve_vmaxnmaq_m_f<mode>): Likewise.
15410 (mve_vmaxnmavq_p_f<mode>): Likewise.
15411 (mve_vmaxnmvq_p_f<mode>): Likewise.
15412 (mve_vminnmaq_m_f<mode>): Likewise.
15413 (mve_vminnmavq_p_f<mode>): Likewise.
15414 (mve_vminnmvq_p_f<mode>): Likewise.
15415 (mve_vmlaldavaq_<supf><mode>): Likewise.
15416 (mve_vmlaldavaxq_<supf><mode>): Likewise.
15417 (mve_vmlaldavq_p_<supf><mode>): Likewise.
15418 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
15419 (mve_vmlsldavaq_s<mode>): Likewise.
15420 (mve_vmlsldavaxq_s<mode>): Likewise.
15421 (mve_vmlsldavq_p_s<mode>): Likewise.
15422 (mve_vmlsldavxq_p_s<mode>): Likewise.
15423 (mve_vmovlbq_m_<supf><mode>): Likewise.
15424 (mve_vmovltq_m_<supf><mode>): Likewise.
15425 (mve_vmovnbq_m_<supf><mode>): Likewise.
15426 (mve_vmovntq_m_<supf><mode>): Likewise.
15427 (mve_vmvnq_m_n_<supf><mode>): Likewise.
15428 (mve_vnegq_m_f<mode>): Likewise.
15429 (mve_vorrq_m_n_<supf><mode>): Likewise.
15430 (mve_vpselq_f<mode>): Likewise.
15431 (mve_vqmovnbq_m_<supf><mode>): Likewise.
15432 (mve_vqmovntq_m_<supf><mode>): Likewise.
15433 (mve_vqmovunbq_m_s<mode>): Likewise.
15434 (mve_vqmovuntq_m_s<mode>): Likewise.
15435 (mve_vqrshrntq_n_<supf><mode>): Likewise.
15436 (mve_vqrshruntq_n_s<mode>): Likewise.
15437 (mve_vqshrnbq_n_<supf><mode>): Likewise.
15438 (mve_vqshrntq_n_<supf><mode>): Likewise.
15439 (mve_vqshrunbq_n_s<mode>): Likewise.
15440 (mve_vqshruntq_n_s<mode>): Likewise.
15441 (mve_vrev32q_m_fv8hf): Likewise.
15442 (mve_vrev32q_m_<supf><mode>): Likewise.
15443 (mve_vrev64q_m_f<mode>): Likewise.
15444 (mve_vrmlaldavhaxq_sv4si): Likewise.
15445 (mve_vrmlaldavhxq_p_sv4si): Likewise.
15446 (mve_vrmlsldavhaxq_sv4si): Likewise.
15447 (mve_vrmlsldavhq_p_sv4si): Likewise.
15448 (mve_vrmlsldavhxq_p_sv4si): Likewise.
15449 (mve_vrndaq_m_f<mode>): Likewise.
15450 (mve_vrndmq_m_f<mode>): Likewise.
15451 (mve_vrndnq_m_f<mode>): Likewise.
15452 (mve_vrndpq_m_f<mode>): Likewise.
15453 (mve_vrndxq_m_f<mode>): Likewise.
15454 (mve_vrshrnbq_n_<supf><mode>): Likewise.
15455 (mve_vrshrntq_n_<supf><mode>): Likewise.
15456 (mve_vshrnbq_n_<supf><mode>): Likewise.
15457 (mve_vshrntq_n_<supf><mode>): Likewise.
15458 (mve_vcvtmq_m_<supf><mode>): Likewise.
15459 (mve_vcvtpq_m_<supf><mode>): Likewise.
15460 (mve_vcvtnq_m_<supf><mode>): Likewise.
15461 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
15462 (mve_vrev16q_m_<supf>v16qi): Likewise.
15463 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
15464 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
15465 (mve_vrmlsldavhaq_sv4si): Likewise.
15467 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15468 Mihail Ionescu <mihail.ionescu@arm.com>
15469 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15471 * config/arm/arm_mve.h (vpselq_u8): Define macro.
15472 (vpselq_s8): Likewise.
15473 (vrev64q_m_u8): Likewise.
15474 (vqrdmlashq_n_u8): Likewise.
15475 (vqrdmlahq_n_u8): Likewise.
15476 (vqdmlahq_n_u8): Likewise.
15477 (vmvnq_m_u8): Likewise.
15478 (vmlasq_n_u8): Likewise.
15479 (vmlaq_n_u8): Likewise.
15480 (vmladavq_p_u8): Likewise.
15481 (vmladavaq_u8): Likewise.
15482 (vminvq_p_u8): Likewise.
15483 (vmaxvq_p_u8): Likewise.
15484 (vdupq_m_n_u8): Likewise.
15485 (vcmpneq_m_u8): Likewise.
15486 (vcmpneq_m_n_u8): Likewise.
15487 (vcmphiq_m_u8): Likewise.
15488 (vcmphiq_m_n_u8): Likewise.
15489 (vcmpeqq_m_u8): Likewise.
15490 (vcmpeqq_m_n_u8): Likewise.
15491 (vcmpcsq_m_u8): Likewise.
15492 (vcmpcsq_m_n_u8): Likewise.
15493 (vclzq_m_u8): Likewise.
15494 (vaddvaq_p_u8): Likewise.
15495 (vsriq_n_u8): Likewise.
15496 (vsliq_n_u8): Likewise.
15497 (vshlq_m_r_u8): Likewise.
15498 (vrshlq_m_n_u8): Likewise.
15499 (vqshlq_m_r_u8): Likewise.
15500 (vqrshlq_m_n_u8): Likewise.
15501 (vminavq_p_s8): Likewise.
15502 (vminaq_m_s8): Likewise.
15503 (vmaxavq_p_s8): Likewise.
15504 (vmaxaq_m_s8): Likewise.
15505 (vcmpneq_m_s8): Likewise.
15506 (vcmpneq_m_n_s8): Likewise.
15507 (vcmpltq_m_s8): Likewise.
15508 (vcmpltq_m_n_s8): Likewise.
15509 (vcmpleq_m_s8): Likewise.
15510 (vcmpleq_m_n_s8): Likewise.
15511 (vcmpgtq_m_s8): Likewise.
15512 (vcmpgtq_m_n_s8): Likewise.
15513 (vcmpgeq_m_s8): Likewise.
15514 (vcmpgeq_m_n_s8): Likewise.
15515 (vcmpeqq_m_s8): Likewise.
15516 (vcmpeqq_m_n_s8): Likewise.
15517 (vshlq_m_r_s8): Likewise.
15518 (vrshlq_m_n_s8): Likewise.
15519 (vrev64q_m_s8): Likewise.
15520 (vqshlq_m_r_s8): Likewise.
15521 (vqrshlq_m_n_s8): Likewise.
15522 (vqnegq_m_s8): Likewise.
15523 (vqabsq_m_s8): Likewise.
15524 (vnegq_m_s8): Likewise.
15525 (vmvnq_m_s8): Likewise.
15526 (vmlsdavxq_p_s8): Likewise.
15527 (vmlsdavq_p_s8): Likewise.
15528 (vmladavxq_p_s8): Likewise.
15529 (vmladavq_p_s8): Likewise.
15530 (vminvq_p_s8): Likewise.
15531 (vmaxvq_p_s8): Likewise.
15532 (vdupq_m_n_s8): Likewise.
15533 (vclzq_m_s8): Likewise.
15534 (vclsq_m_s8): Likewise.
15535 (vaddvaq_p_s8): Likewise.
15536 (vabsq_m_s8): Likewise.
15537 (vqrdmlsdhxq_s8): Likewise.
15538 (vqrdmlsdhq_s8): Likewise.
15539 (vqrdmlashq_n_s8): Likewise.
15540 (vqrdmlahq_n_s8): Likewise.
15541 (vqrdmladhxq_s8): Likewise.
15542 (vqrdmladhq_s8): Likewise.
15543 (vqdmlsdhxq_s8): Likewise.
15544 (vqdmlsdhq_s8): Likewise.
15545 (vqdmlahq_n_s8): Likewise.
15546 (vqdmladhxq_s8): Likewise.
15547 (vqdmladhq_s8): Likewise.
15548 (vmlsdavaxq_s8): Likewise.
15549 (vmlsdavaq_s8): Likewise.
15550 (vmlasq_n_s8): Likewise.
15551 (vmlaq_n_s8): Likewise.
15552 (vmladavaxq_s8): Likewise.
15553 (vmladavaq_s8): Likewise.
15554 (vsriq_n_s8): Likewise.
15555 (vsliq_n_s8): Likewise.
15556 (vpselq_u16): Likewise.
15557 (vpselq_s16): Likewise.
15558 (vrev64q_m_u16): Likewise.
15559 (vqrdmlashq_n_u16): Likewise.
15560 (vqrdmlahq_n_u16): Likewise.
15561 (vqdmlahq_n_u16): Likewise.
15562 (vmvnq_m_u16): Likewise.
15563 (vmlasq_n_u16): Likewise.
15564 (vmlaq_n_u16): Likewise.
15565 (vmladavq_p_u16): Likewise.
15566 (vmladavaq_u16): Likewise.
15567 (vminvq_p_u16): Likewise.
15568 (vmaxvq_p_u16): Likewise.
15569 (vdupq_m_n_u16): Likewise.
15570 (vcmpneq_m_u16): Likewise.
15571 (vcmpneq_m_n_u16): Likewise.
15572 (vcmphiq_m_u16): Likewise.
15573 (vcmphiq_m_n_u16): Likewise.
15574 (vcmpeqq_m_u16): Likewise.
15575 (vcmpeqq_m_n_u16): Likewise.
15576 (vcmpcsq_m_u16): Likewise.
15577 (vcmpcsq_m_n_u16): Likewise.
15578 (vclzq_m_u16): Likewise.
15579 (vaddvaq_p_u16): Likewise.
15580 (vsriq_n_u16): Likewise.
15581 (vsliq_n_u16): Likewise.
15582 (vshlq_m_r_u16): Likewise.
15583 (vrshlq_m_n_u16): Likewise.
15584 (vqshlq_m_r_u16): Likewise.
15585 (vqrshlq_m_n_u16): Likewise.
15586 (vminavq_p_s16): Likewise.
15587 (vminaq_m_s16): Likewise.
15588 (vmaxavq_p_s16): Likewise.
15589 (vmaxaq_m_s16): Likewise.
15590 (vcmpneq_m_s16): Likewise.
15591 (vcmpneq_m_n_s16): Likewise.
15592 (vcmpltq_m_s16): Likewise.
15593 (vcmpltq_m_n_s16): Likewise.
15594 (vcmpleq_m_s16): Likewise.
15595 (vcmpleq_m_n_s16): Likewise.
15596 (vcmpgtq_m_s16): Likewise.
15597 (vcmpgtq_m_n_s16): Likewise.
15598 (vcmpgeq_m_s16): Likewise.
15599 (vcmpgeq_m_n_s16): Likewise.
15600 (vcmpeqq_m_s16): Likewise.
15601 (vcmpeqq_m_n_s16): Likewise.
15602 (vshlq_m_r_s16): Likewise.
15603 (vrshlq_m_n_s16): Likewise.
15604 (vrev64q_m_s16): Likewise.
15605 (vqshlq_m_r_s16): Likewise.
15606 (vqrshlq_m_n_s16): Likewise.
15607 (vqnegq_m_s16): Likewise.
15608 (vqabsq_m_s16): Likewise.
15609 (vnegq_m_s16): Likewise.
15610 (vmvnq_m_s16): Likewise.
15611 (vmlsdavxq_p_s16): Likewise.
15612 (vmlsdavq_p_s16): Likewise.
15613 (vmladavxq_p_s16): Likewise.
15614 (vmladavq_p_s16): Likewise.
15615 (vminvq_p_s16): Likewise.
15616 (vmaxvq_p_s16): Likewise.
15617 (vdupq_m_n_s16): Likewise.
15618 (vclzq_m_s16): Likewise.
15619 (vclsq_m_s16): Likewise.
15620 (vaddvaq_p_s16): Likewise.
15621 (vabsq_m_s16): Likewise.
15622 (vqrdmlsdhxq_s16): Likewise.
15623 (vqrdmlsdhq_s16): Likewise.
15624 (vqrdmlashq_n_s16): Likewise.
15625 (vqrdmlahq_n_s16): Likewise.
15626 (vqrdmladhxq_s16): Likewise.
15627 (vqrdmladhq_s16): Likewise.
15628 (vqdmlsdhxq_s16): Likewise.
15629 (vqdmlsdhq_s16): Likewise.
15630 (vqdmlahq_n_s16): Likewise.
15631 (vqdmladhxq_s16): Likewise.
15632 (vqdmladhq_s16): Likewise.
15633 (vmlsdavaxq_s16): Likewise.
15634 (vmlsdavaq_s16): Likewise.
15635 (vmlasq_n_s16): Likewise.
15636 (vmlaq_n_s16): Likewise.
15637 (vmladavaxq_s16): Likewise.
15638 (vmladavaq_s16): Likewise.
15639 (vsriq_n_s16): Likewise.
15640 (vsliq_n_s16): Likewise.
15641 (vpselq_u32): Likewise.
15642 (vpselq_s32): Likewise.
15643 (vrev64q_m_u32): Likewise.
15644 (vqrdmlashq_n_u32): Likewise.
15645 (vqrdmlahq_n_u32): Likewise.
15646 (vqdmlahq_n_u32): Likewise.
15647 (vmvnq_m_u32): Likewise.
15648 (vmlasq_n_u32): Likewise.
15649 (vmlaq_n_u32): Likewise.
15650 (vmladavq_p_u32): Likewise.
15651 (vmladavaq_u32): Likewise.
15652 (vminvq_p_u32): Likewise.
15653 (vmaxvq_p_u32): Likewise.
15654 (vdupq_m_n_u32): Likewise.
15655 (vcmpneq_m_u32): Likewise.
15656 (vcmpneq_m_n_u32): Likewise.
15657 (vcmphiq_m_u32): Likewise.
15658 (vcmphiq_m_n_u32): Likewise.
15659 (vcmpeqq_m_u32): Likewise.
15660 (vcmpeqq_m_n_u32): Likewise.
15661 (vcmpcsq_m_u32): Likewise.
15662 (vcmpcsq_m_n_u32): Likewise.
15663 (vclzq_m_u32): Likewise.
15664 (vaddvaq_p_u32): Likewise.
15665 (vsriq_n_u32): Likewise.
15666 (vsliq_n_u32): Likewise.
15667 (vshlq_m_r_u32): Likewise.
15668 (vrshlq_m_n_u32): Likewise.
15669 (vqshlq_m_r_u32): Likewise.
15670 (vqrshlq_m_n_u32): Likewise.
15671 (vminavq_p_s32): Likewise.
15672 (vminaq_m_s32): Likewise.
15673 (vmaxavq_p_s32): Likewise.
15674 (vmaxaq_m_s32): Likewise.
15675 (vcmpneq_m_s32): Likewise.
15676 (vcmpneq_m_n_s32): Likewise.
15677 (vcmpltq_m_s32): Likewise.
15678 (vcmpltq_m_n_s32): Likewise.
15679 (vcmpleq_m_s32): Likewise.
15680 (vcmpleq_m_n_s32): Likewise.
15681 (vcmpgtq_m_s32): Likewise.
15682 (vcmpgtq_m_n_s32): Likewise.
15683 (vcmpgeq_m_s32): Likewise.
15684 (vcmpgeq_m_n_s32): Likewise.
15685 (vcmpeqq_m_s32): Likewise.
15686 (vcmpeqq_m_n_s32): Likewise.
15687 (vshlq_m_r_s32): Likewise.
15688 (vrshlq_m_n_s32): Likewise.
15689 (vrev64q_m_s32): Likewise.
15690 (vqshlq_m_r_s32): Likewise.
15691 (vqrshlq_m_n_s32): Likewise.
15692 (vqnegq_m_s32): Likewise.
15693 (vqabsq_m_s32): Likewise.
15694 (vnegq_m_s32): Likewise.
15695 (vmvnq_m_s32): Likewise.
15696 (vmlsdavxq_p_s32): Likewise.
15697 (vmlsdavq_p_s32): Likewise.
15698 (vmladavxq_p_s32): Likewise.
15699 (vmladavq_p_s32): Likewise.
15700 (vminvq_p_s32): Likewise.
15701 (vmaxvq_p_s32): Likewise.
15702 (vdupq_m_n_s32): Likewise.
15703 (vclzq_m_s32): Likewise.
15704 (vclsq_m_s32): Likewise.
15705 (vaddvaq_p_s32): Likewise.
15706 (vabsq_m_s32): Likewise.
15707 (vqrdmlsdhxq_s32): Likewise.
15708 (vqrdmlsdhq_s32): Likewise.
15709 (vqrdmlashq_n_s32): Likewise.
15710 (vqrdmlahq_n_s32): Likewise.
15711 (vqrdmladhxq_s32): Likewise.
15712 (vqrdmladhq_s32): Likewise.
15713 (vqdmlsdhxq_s32): Likewise.
15714 (vqdmlsdhq_s32): Likewise.
15715 (vqdmlahq_n_s32): Likewise.
15716 (vqdmladhxq_s32): Likewise.
15717 (vqdmladhq_s32): Likewise.
15718 (vmlsdavaxq_s32): Likewise.
15719 (vmlsdavaq_s32): Likewise.
15720 (vmlasq_n_s32): Likewise.
15721 (vmlaq_n_s32): Likewise.
15722 (vmladavaxq_s32): Likewise.
15723 (vmladavaq_s32): Likewise.
15724 (vsriq_n_s32): Likewise.
15725 (vsliq_n_s32): Likewise.
15726 (vpselq_u64): Likewise.
15727 (vpselq_s64): Likewise.
15728 (__arm_vpselq_u8): Define intrinsic.
15729 (__arm_vpselq_s8): Likewise.
15730 (__arm_vrev64q_m_u8): Likewise.
15731 (__arm_vqrdmlashq_n_u8): Likewise.
15732 (__arm_vqrdmlahq_n_u8): Likewise.
15733 (__arm_vqdmlahq_n_u8): Likewise.
15734 (__arm_vmvnq_m_u8): Likewise.
15735 (__arm_vmlasq_n_u8): Likewise.
15736 (__arm_vmlaq_n_u8): Likewise.
15737 (__arm_vmladavq_p_u8): Likewise.
15738 (__arm_vmladavaq_u8): Likewise.
15739 (__arm_vminvq_p_u8): Likewise.
15740 (__arm_vmaxvq_p_u8): Likewise.
15741 (__arm_vdupq_m_n_u8): Likewise.
15742 (__arm_vcmpneq_m_u8): Likewise.
15743 (__arm_vcmpneq_m_n_u8): Likewise.
15744 (__arm_vcmphiq_m_u8): Likewise.
15745 (__arm_vcmphiq_m_n_u8): Likewise.
15746 (__arm_vcmpeqq_m_u8): Likewise.
15747 (__arm_vcmpeqq_m_n_u8): Likewise.
15748 (__arm_vcmpcsq_m_u8): Likewise.
15749 (__arm_vcmpcsq_m_n_u8): Likewise.
15750 (__arm_vclzq_m_u8): Likewise.
15751 (__arm_vaddvaq_p_u8): Likewise.
15752 (__arm_vsriq_n_u8): Likewise.
15753 (__arm_vsliq_n_u8): Likewise.
15754 (__arm_vshlq_m_r_u8): Likewise.
15755 (__arm_vrshlq_m_n_u8): Likewise.
15756 (__arm_vqshlq_m_r_u8): Likewise.
15757 (__arm_vqrshlq_m_n_u8): Likewise.
15758 (__arm_vminavq_p_s8): Likewise.
15759 (__arm_vminaq_m_s8): Likewise.
15760 (__arm_vmaxavq_p_s8): Likewise.
15761 (__arm_vmaxaq_m_s8): Likewise.
15762 (__arm_vcmpneq_m_s8): Likewise.
15763 (__arm_vcmpneq_m_n_s8): Likewise.
15764 (__arm_vcmpltq_m_s8): Likewise.
15765 (__arm_vcmpltq_m_n_s8): Likewise.
15766 (__arm_vcmpleq_m_s8): Likewise.
15767 (__arm_vcmpleq_m_n_s8): Likewise.
15768 (__arm_vcmpgtq_m_s8): Likewise.
15769 (__arm_vcmpgtq_m_n_s8): Likewise.
15770 (__arm_vcmpgeq_m_s8): Likewise.
15771 (__arm_vcmpgeq_m_n_s8): Likewise.
15772 (__arm_vcmpeqq_m_s8): Likewise.
15773 (__arm_vcmpeqq_m_n_s8): Likewise.
15774 (__arm_vshlq_m_r_s8): Likewise.
15775 (__arm_vrshlq_m_n_s8): Likewise.
15776 (__arm_vrev64q_m_s8): Likewise.
15777 (__arm_vqshlq_m_r_s8): Likewise.
15778 (__arm_vqrshlq_m_n_s8): Likewise.
15779 (__arm_vqnegq_m_s8): Likewise.
15780 (__arm_vqabsq_m_s8): Likewise.
15781 (__arm_vnegq_m_s8): Likewise.
15782 (__arm_vmvnq_m_s8): Likewise.
15783 (__arm_vmlsdavxq_p_s8): Likewise.
15784 (__arm_vmlsdavq_p_s8): Likewise.
15785 (__arm_vmladavxq_p_s8): Likewise.
15786 (__arm_vmladavq_p_s8): Likewise.
15787 (__arm_vminvq_p_s8): Likewise.
15788 (__arm_vmaxvq_p_s8): Likewise.
15789 (__arm_vdupq_m_n_s8): Likewise.
15790 (__arm_vclzq_m_s8): Likewise.
15791 (__arm_vclsq_m_s8): Likewise.
15792 (__arm_vaddvaq_p_s8): Likewise.
15793 (__arm_vabsq_m_s8): Likewise.
15794 (__arm_vqrdmlsdhxq_s8): Likewise.
15795 (__arm_vqrdmlsdhq_s8): Likewise.
15796 (__arm_vqrdmlashq_n_s8): Likewise.
15797 (__arm_vqrdmlahq_n_s8): Likewise.
15798 (__arm_vqrdmladhxq_s8): Likewise.
15799 (__arm_vqrdmladhq_s8): Likewise.
15800 (__arm_vqdmlsdhxq_s8): Likewise.
15801 (__arm_vqdmlsdhq_s8): Likewise.
15802 (__arm_vqdmlahq_n_s8): Likewise.
15803 (__arm_vqdmladhxq_s8): Likewise.
15804 (__arm_vqdmladhq_s8): Likewise.
15805 (__arm_vmlsdavaxq_s8): Likewise.
15806 (__arm_vmlsdavaq_s8): Likewise.
15807 (__arm_vmlasq_n_s8): Likewise.
15808 (__arm_vmlaq_n_s8): Likewise.
15809 (__arm_vmladavaxq_s8): Likewise.
15810 (__arm_vmladavaq_s8): Likewise.
15811 (__arm_vsriq_n_s8): Likewise.
15812 (__arm_vsliq_n_s8): Likewise.
15813 (__arm_vpselq_u16): Likewise.
15814 (__arm_vpselq_s16): Likewise.
15815 (__arm_vrev64q_m_u16): Likewise.
15816 (__arm_vqrdmlashq_n_u16): Likewise.
15817 (__arm_vqrdmlahq_n_u16): Likewise.
15818 (__arm_vqdmlahq_n_u16): Likewise.
15819 (__arm_vmvnq_m_u16): Likewise.
15820 (__arm_vmlasq_n_u16): Likewise.
15821 (__arm_vmlaq_n_u16): Likewise.
15822 (__arm_vmladavq_p_u16): Likewise.
15823 (__arm_vmladavaq_u16): Likewise.
15824 (__arm_vminvq_p_u16): Likewise.
15825 (__arm_vmaxvq_p_u16): Likewise.
15826 (__arm_vdupq_m_n_u16): Likewise.
15827 (__arm_vcmpneq_m_u16): Likewise.
15828 (__arm_vcmpneq_m_n_u16): Likewise.
15829 (__arm_vcmphiq_m_u16): Likewise.
15830 (__arm_vcmphiq_m_n_u16): Likewise.
15831 (__arm_vcmpeqq_m_u16): Likewise.
15832 (__arm_vcmpeqq_m_n_u16): Likewise.
15833 (__arm_vcmpcsq_m_u16): Likewise.
15834 (__arm_vcmpcsq_m_n_u16): Likewise.
15835 (__arm_vclzq_m_u16): Likewise.
15836 (__arm_vaddvaq_p_u16): Likewise.
15837 (__arm_vsriq_n_u16): Likewise.
15838 (__arm_vsliq_n_u16): Likewise.
15839 (__arm_vshlq_m_r_u16): Likewise.
15840 (__arm_vrshlq_m_n_u16): Likewise.
15841 (__arm_vqshlq_m_r_u16): Likewise.
15842 (__arm_vqrshlq_m_n_u16): Likewise.
15843 (__arm_vminavq_p_s16): Likewise.
15844 (__arm_vminaq_m_s16): Likewise.
15845 (__arm_vmaxavq_p_s16): Likewise.
15846 (__arm_vmaxaq_m_s16): Likewise.
15847 (__arm_vcmpneq_m_s16): Likewise.
15848 (__arm_vcmpneq_m_n_s16): Likewise.
15849 (__arm_vcmpltq_m_s16): Likewise.
15850 (__arm_vcmpltq_m_n_s16): Likewise.
15851 (__arm_vcmpleq_m_s16): Likewise.
15852 (__arm_vcmpleq_m_n_s16): Likewise.
15853 (__arm_vcmpgtq_m_s16): Likewise.
15854 (__arm_vcmpgtq_m_n_s16): Likewise.
15855 (__arm_vcmpgeq_m_s16): Likewise.
15856 (__arm_vcmpgeq_m_n_s16): Likewise.
15857 (__arm_vcmpeqq_m_s16): Likewise.
15858 (__arm_vcmpeqq_m_n_s16): Likewise.
15859 (__arm_vshlq_m_r_s16): Likewise.
15860 (__arm_vrshlq_m_n_s16): Likewise.
15861 (__arm_vrev64q_m_s16): Likewise.
15862 (__arm_vqshlq_m_r_s16): Likewise.
15863 (__arm_vqrshlq_m_n_s16): Likewise.
15864 (__arm_vqnegq_m_s16): Likewise.
15865 (__arm_vqabsq_m_s16): Likewise.
15866 (__arm_vnegq_m_s16): Likewise.
15867 (__arm_vmvnq_m_s16): Likewise.
15868 (__arm_vmlsdavxq_p_s16): Likewise.
15869 (__arm_vmlsdavq_p_s16): Likewise.
15870 (__arm_vmladavxq_p_s16): Likewise.
15871 (__arm_vmladavq_p_s16): Likewise.
15872 (__arm_vminvq_p_s16): Likewise.
15873 (__arm_vmaxvq_p_s16): Likewise.
15874 (__arm_vdupq_m_n_s16): Likewise.
15875 (__arm_vclzq_m_s16): Likewise.
15876 (__arm_vclsq_m_s16): Likewise.
15877 (__arm_vaddvaq_p_s16): Likewise.
15878 (__arm_vabsq_m_s16): Likewise.
15879 (__arm_vqrdmlsdhxq_s16): Likewise.
15880 (__arm_vqrdmlsdhq_s16): Likewise.
15881 (__arm_vqrdmlashq_n_s16): Likewise.
15882 (__arm_vqrdmlahq_n_s16): Likewise.
15883 (__arm_vqrdmladhxq_s16): Likewise.
15884 (__arm_vqrdmladhq_s16): Likewise.
15885 (__arm_vqdmlsdhxq_s16): Likewise.
15886 (__arm_vqdmlsdhq_s16): Likewise.
15887 (__arm_vqdmlahq_n_s16): Likewise.
15888 (__arm_vqdmladhxq_s16): Likewise.
15889 (__arm_vqdmladhq_s16): Likewise.
15890 (__arm_vmlsdavaxq_s16): Likewise.
15891 (__arm_vmlsdavaq_s16): Likewise.
15892 (__arm_vmlasq_n_s16): Likewise.
15893 (__arm_vmlaq_n_s16): Likewise.
15894 (__arm_vmladavaxq_s16): Likewise.
15895 (__arm_vmladavaq_s16): Likewise.
15896 (__arm_vsriq_n_s16): Likewise.
15897 (__arm_vsliq_n_s16): Likewise.
15898 (__arm_vpselq_u32): Likewise.
15899 (__arm_vpselq_s32): Likewise.
15900 (__arm_vrev64q_m_u32): Likewise.
15901 (__arm_vqrdmlashq_n_u32): Likewise.
15902 (__arm_vqrdmlahq_n_u32): Likewise.
15903 (__arm_vqdmlahq_n_u32): Likewise.
15904 (__arm_vmvnq_m_u32): Likewise.
15905 (__arm_vmlasq_n_u32): Likewise.
15906 (__arm_vmlaq_n_u32): Likewise.
15907 (__arm_vmladavq_p_u32): Likewise.
15908 (__arm_vmladavaq_u32): Likewise.
15909 (__arm_vminvq_p_u32): Likewise.
15910 (__arm_vmaxvq_p_u32): Likewise.
15911 (__arm_vdupq_m_n_u32): Likewise.
15912 (__arm_vcmpneq_m_u32): Likewise.
15913 (__arm_vcmpneq_m_n_u32): Likewise.
15914 (__arm_vcmphiq_m_u32): Likewise.
15915 (__arm_vcmphiq_m_n_u32): Likewise.
15916 (__arm_vcmpeqq_m_u32): Likewise.
15917 (__arm_vcmpeqq_m_n_u32): Likewise.
15918 (__arm_vcmpcsq_m_u32): Likewise.
15919 (__arm_vcmpcsq_m_n_u32): Likewise.
15920 (__arm_vclzq_m_u32): Likewise.
15921 (__arm_vaddvaq_p_u32): Likewise.
15922 (__arm_vsriq_n_u32): Likewise.
15923 (__arm_vsliq_n_u32): Likewise.
15924 (__arm_vshlq_m_r_u32): Likewise.
15925 (__arm_vrshlq_m_n_u32): Likewise.
15926 (__arm_vqshlq_m_r_u32): Likewise.
15927 (__arm_vqrshlq_m_n_u32): Likewise.
15928 (__arm_vminavq_p_s32): Likewise.
15929 (__arm_vminaq_m_s32): Likewise.
15930 (__arm_vmaxavq_p_s32): Likewise.
15931 (__arm_vmaxaq_m_s32): Likewise.
15932 (__arm_vcmpneq_m_s32): Likewise.
15933 (__arm_vcmpneq_m_n_s32): Likewise.
15934 (__arm_vcmpltq_m_s32): Likewise.
15935 (__arm_vcmpltq_m_n_s32): Likewise.
15936 (__arm_vcmpleq_m_s32): Likewise.
15937 (__arm_vcmpleq_m_n_s32): Likewise.
15938 (__arm_vcmpgtq_m_s32): Likewise.
15939 (__arm_vcmpgtq_m_n_s32): Likewise.
15940 (__arm_vcmpgeq_m_s32): Likewise.
15941 (__arm_vcmpgeq_m_n_s32): Likewise.
15942 (__arm_vcmpeqq_m_s32): Likewise.
15943 (__arm_vcmpeqq_m_n_s32): Likewise.
15944 (__arm_vshlq_m_r_s32): Likewise.
15945 (__arm_vrshlq_m_n_s32): Likewise.
15946 (__arm_vrev64q_m_s32): Likewise.
15947 (__arm_vqshlq_m_r_s32): Likewise.
15948 (__arm_vqrshlq_m_n_s32): Likewise.
15949 (__arm_vqnegq_m_s32): Likewise.
15950 (__arm_vqabsq_m_s32): Likewise.
15951 (__arm_vnegq_m_s32): Likewise.
15952 (__arm_vmvnq_m_s32): Likewise.
15953 (__arm_vmlsdavxq_p_s32): Likewise.
15954 (__arm_vmlsdavq_p_s32): Likewise.
15955 (__arm_vmladavxq_p_s32): Likewise.
15956 (__arm_vmladavq_p_s32): Likewise.
15957 (__arm_vminvq_p_s32): Likewise.
15958 (__arm_vmaxvq_p_s32): Likewise.
15959 (__arm_vdupq_m_n_s32): Likewise.
15960 (__arm_vclzq_m_s32): Likewise.
15961 (__arm_vclsq_m_s32): Likewise.
15962 (__arm_vaddvaq_p_s32): Likewise.
15963 (__arm_vabsq_m_s32): Likewise.
15964 (__arm_vqrdmlsdhxq_s32): Likewise.
15965 (__arm_vqrdmlsdhq_s32): Likewise.
15966 (__arm_vqrdmlashq_n_s32): Likewise.
15967 (__arm_vqrdmlahq_n_s32): Likewise.
15968 (__arm_vqrdmladhxq_s32): Likewise.
15969 (__arm_vqrdmladhq_s32): Likewise.
15970 (__arm_vqdmlsdhxq_s32): Likewise.
15971 (__arm_vqdmlsdhq_s32): Likewise.
15972 (__arm_vqdmlahq_n_s32): Likewise.
15973 (__arm_vqdmladhxq_s32): Likewise.
15974 (__arm_vqdmladhq_s32): Likewise.
15975 (__arm_vmlsdavaxq_s32): Likewise.
15976 (__arm_vmlsdavaq_s32): Likewise.
15977 (__arm_vmlasq_n_s32): Likewise.
15978 (__arm_vmlaq_n_s32): Likewise.
15979 (__arm_vmladavaxq_s32): Likewise.
15980 (__arm_vmladavaq_s32): Likewise.
15981 (__arm_vsriq_n_s32): Likewise.
15982 (__arm_vsliq_n_s32): Likewise.
15983 (__arm_vpselq_u64): Likewise.
15984 (__arm_vpselq_s64): Likewise.
15985 (vcmpneq_m_n): Define polymorphic variant.
15986 (vcmpneq_m): Likewise.
15987 (vqrdmlsdhq): Likewise.
15988 (vqrdmlsdhxq): Likewise.
15989 (vqrshlq_m_n): Likewise.
15990 (vqshlq_m_r): Likewise.
15991 (vrev64q_m): Likewise.
15992 (vrshlq_m_n): Likewise.
15993 (vshlq_m_r): Likewise.
15994 (vsliq_n): Likewise.
15995 (vsriq_n): Likewise.
15996 (vqrdmlashq_n): Likewise.
15997 (vqrdmlahq): Likewise.
15998 (vqrdmladhxq): Likewise.
15999 (vqrdmladhq): Likewise.
16000 (vqnegq_m): Likewise.
16001 (vqdmlsdhxq): Likewise.
16002 (vabsq_m): Likewise.
16003 (vclsq_m): Likewise.
16004 (vclzq_m): Likewise.
16005 (vcmpgeq_m): Likewise.
16006 (vcmpgeq_m_n): Likewise.
16007 (vdupq_m_n): Likewise.
16008 (vmaxaq_m): Likewise.
16009 (vmlaq_n): Likewise.
16010 (vmlasq_n): Likewise.
16011 (vmvnq_m): Likewise.
16012 (vnegq_m): Likewise.
16013 (vpselq): Likewise.
16014 (vqdmlahq_n): Likewise.
16015 (vqrdmlahq_n): Likewise.
16016 (vqdmlsdhq): Likewise.
16017 (vqdmladhq): Likewise.
16018 (vqabsq_m): Likewise.
16019 (vminaq_m): Likewise.
16020 (vrmlaldavhaq): Likewise.
16021 (vmlsdavxq_p): Likewise.
16022 (vmlsdavq_p): Likewise.
16023 (vmlsdavaxq): Likewise.
16024 (vmlsdavaq): Likewise.
16025 (vaddvaq_p): Likewise.
16026 (vcmpcsq_m_n): Likewise.
16027 (vcmpcsq_m): Likewise.
16028 (vcmpeqq_m_n): Likewise.
16029 (vcmpeqq_m): Likewise.
16030 (vmladavxq_p): Likewise.
16031 (vmladavq_p): Likewise.
16032 (vmladavaxq): Likewise.
16033 (vmladavaq): Likewise.
16034 (vminvq_p): Likewise.
16035 (vminavq_p): Likewise.
16036 (vmaxvq_p): Likewise.
16037 (vmaxavq_p): Likewise.
16038 (vcmpltq_m_n): Likewise.
16039 (vcmpltq_m): Likewise.
16040 (vcmpleq_m): Likewise.
16041 (vcmpleq_m_n): Likewise.
16042 (vcmphiq_m_n): Likewise.
16043 (vcmphiq_m): Likewise.
16044 (vcmpgtq_m_n): Likewise.
16045 (vcmpgtq_m): Likewise.
16046 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
16048 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
16049 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
16050 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
16051 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
16052 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
16053 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
16054 * config/arm/constraints.md (Rc): Define constraint to check constant is
16055 in the range of 0 to 15.
16056 (Re): Define constraint to check constant is in the range of 0 to 31.
16057 * config/arm/mve.md (VADDVAQ_P): Define iterator.
16058 (VCLZQ_M): Likewise.
16059 (VCMPEQQ_M_N): Likewise.
16060 (VCMPEQQ_M): Likewise.
16061 (VCMPNEQ_M_N): Likewise.
16062 (VCMPNEQ_M): Likewise.
16063 (VDUPQ_M_N): Likewise.
16064 (VMAXVQ_P): Likewise.
16065 (VMINVQ_P): Likewise.
16066 (VMLADAVAQ): Likewise.
16067 (VMLADAVQ_P): Likewise.
16068 (VMLAQ_N): Likewise.
16069 (VMLASQ_N): Likewise.
16070 (VMVNQ_M): Likewise.
16071 (VPSELQ): Likewise.
16072 (VQDMLAHQ_N): Likewise.
16073 (VQRDMLAHQ_N): Likewise.
16074 (VQRDMLASHQ_N): Likewise.
16075 (VQRSHLQ_M_N): Likewise.
16076 (VQSHLQ_M_R): Likewise.
16077 (VREV64Q_M): Likewise.
16078 (VRSHLQ_M_N): Likewise.
16079 (VSHLQ_M_R): Likewise.
16080 (VSLIQ_N): Likewise.
16081 (VSRIQ_N): Likewise.
16082 (mve_vabsq_m_s<mode>): Define RTL pattern.
16083 (mve_vaddvaq_p_<supf><mode>): Likewise.
16084 (mve_vclsq_m_s<mode>): Likewise.
16085 (mve_vclzq_m_<supf><mode>): Likewise.
16086 (mve_vcmpcsq_m_n_u<mode>): Likewise.
16087 (mve_vcmpcsq_m_u<mode>): Likewise.
16088 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
16089 (mve_vcmpeqq_m_<supf><mode>): Likewise.
16090 (mve_vcmpgeq_m_n_s<mode>): Likewise.
16091 (mve_vcmpgeq_m_s<mode>): Likewise.
16092 (mve_vcmpgtq_m_n_s<mode>): Likewise.
16093 (mve_vcmpgtq_m_s<mode>): Likewise.
16094 (mve_vcmphiq_m_n_u<mode>): Likewise.
16095 (mve_vcmphiq_m_u<mode>): Likewise.
16096 (mve_vcmpleq_m_n_s<mode>): Likewise.
16097 (mve_vcmpleq_m_s<mode>): Likewise.
16098 (mve_vcmpltq_m_n_s<mode>): Likewise.
16099 (mve_vcmpltq_m_s<mode>): Likewise.
16100 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
16101 (mve_vcmpneq_m_<supf><mode>): Likewise.
16102 (mve_vdupq_m_n_<supf><mode>): Likewise.
16103 (mve_vmaxaq_m_s<mode>): Likewise.
16104 (mve_vmaxavq_p_s<mode>): Likewise.
16105 (mve_vmaxvq_p_<supf><mode>): Likewise.
16106 (mve_vminaq_m_s<mode>): Likewise.
16107 (mve_vminavq_p_s<mode>): Likewise.
16108 (mve_vminvq_p_<supf><mode>): Likewise.
16109 (mve_vmladavaq_<supf><mode>): Likewise.
16110 (mve_vmladavq_p_<supf><mode>): Likewise.
16111 (mve_vmladavxq_p_s<mode>): Likewise.
16112 (mve_vmlaq_n_<supf><mode>): Likewise.
16113 (mve_vmlasq_n_<supf><mode>): Likewise.
16114 (mve_vmlsdavq_p_s<mode>): Likewise.
16115 (mve_vmlsdavxq_p_s<mode>): Likewise.
16116 (mve_vmvnq_m_<supf><mode>): Likewise.
16117 (mve_vnegq_m_s<mode>): Likewise.
16118 (mve_vpselq_<supf><mode>): Likewise.
16119 (mve_vqabsq_m_s<mode>): Likewise.
16120 (mve_vqdmlahq_n_<supf><mode>): Likewise.
16121 (mve_vqnegq_m_s<mode>): Likewise.
16122 (mve_vqrdmladhq_s<mode>): Likewise.
16123 (mve_vqrdmladhxq_s<mode>): Likewise.
16124 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
16125 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
16126 (mve_vqrdmlsdhq_s<mode>): Likewise.
16127 (mve_vqrdmlsdhxq_s<mode>): Likewise.
16128 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
16129 (mve_vqshlq_m_r_<supf><mode>): Likewise.
16130 (mve_vrev64q_m_<supf><mode>): Likewise.
16131 (mve_vrshlq_m_n_<supf><mode>): Likewise.
16132 (mve_vshlq_m_r_<supf><mode>): Likewise.
16133 (mve_vsliq_n_<supf><mode>): Likewise.
16134 (mve_vsriq_n_<supf><mode>): Likewise.
16135 (mve_vqdmlsdhxq_s<mode>): Likewise.
16136 (mve_vqdmlsdhq_s<mode>): Likewise.
16137 (mve_vqdmladhxq_s<mode>): Likewise.
16138 (mve_vqdmladhq_s<mode>): Likewise.
16139 (mve_vmlsdavaxq_s<mode>): Likewise.
16140 (mve_vmlsdavaq_s<mode>): Likewise.
16141 (mve_vmladavaxq_s<mode>): Likewise.
16142 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
16143 matching constraint Rc.
16144 (mve_imm_31): Define predicate to check the matching constraint Re.
16146 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
16148 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
16149 (vec_cmp<mode>di_dup): Likewise.
16150 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
16152 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
16154 * config/gcn/gcn-valu.md (COND_MODE): Delete.
16155 (COND_INT_MODE): Delete.
16156 (cond_op): Add "mult".
16157 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
16158 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
16160 2020-03-18 Richard Biener <rguenther@suse.de>
16162 PR middle-end/94206
16163 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
16164 partial int modes or not mode-precision integer types for
16167 2020-03-18 Jakub Jelinek <jakub@redhat.com>
16169 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
16171 * config/arc/arc.c (frame_stack_add): Likewise.
16172 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
16174 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
16175 * tree-ssa-strlen.h (handle_printf_call): Likewise.
16176 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
16177 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
16179 2020-03-18 Duan bo <duanbo3@huawei.com>
16182 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
16183 (@ldr_got_tiny_<mode>): New pattern.
16184 (ldr_got_tiny_sidi): Likewise.
16185 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
16186 them to handle SYMBOL_TINY_GOT for ILP32.
16188 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
16190 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
16191 call-preserved for SVE PCS functions.
16192 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
16193 Optimize the case in which there are no following vector save slots.
16195 2020-03-18 Richard Biener <rguenther@suse.de>
16197 PR middle-end/94188
16198 * fold-const.c (build_fold_addr_expr): Convert address to
16200 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
16201 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
16202 to build the ADDR_EXPR which we don't really want to simplify.
16203 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
16204 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
16205 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
16206 (simplify_builtin_call): Strip useless type conversions.
16207 * tree-ssa-strlen.c (new_strinfo): Likewise.
16209 2020-03-17 Alexey Neyman <stilor@att.net>
16212 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
16213 the debug level is terse and the declaration is public. Do not
16214 generate type info.
16215 (dwarf2out_decl): Same.
16216 (add_type_attribute): Return immediately if debug level is
16219 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
16221 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
16223 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16224 Mihail Ionescu <mihail.ionescu@arm.com>
16225 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16227 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
16228 Define qualifier for ternary operands.
16229 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16230 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16231 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16232 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16233 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16234 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16235 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16236 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
16237 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16238 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16239 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16240 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16241 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
16242 * config/arm/arm_mve.h (vabavq_s8): Define macro.
16243 (vabavq_s16): Likewise.
16244 (vabavq_s32): Likewise.
16245 (vbicq_m_n_s16): Likewise.
16246 (vbicq_m_n_s32): Likewise.
16247 (vbicq_m_n_u16): Likewise.
16248 (vbicq_m_n_u32): Likewise.
16249 (vcmpeqq_m_f16): Likewise.
16250 (vcmpeqq_m_f32): Likewise.
16251 (vcvtaq_m_s16_f16): Likewise.
16252 (vcvtaq_m_u16_f16): Likewise.
16253 (vcvtaq_m_s32_f32): Likewise.
16254 (vcvtaq_m_u32_f32): Likewise.
16255 (vcvtq_m_f16_s16): Likewise.
16256 (vcvtq_m_f16_u16): Likewise.
16257 (vcvtq_m_f32_s32): Likewise.
16258 (vcvtq_m_f32_u32): Likewise.
16259 (vqrshrnbq_n_s16): Likewise.
16260 (vqrshrnbq_n_u16): Likewise.
16261 (vqrshrnbq_n_s32): Likewise.
16262 (vqrshrnbq_n_u32): Likewise.
16263 (vqrshrunbq_n_s16): Likewise.
16264 (vqrshrunbq_n_s32): Likewise.
16265 (vrmlaldavhaq_s32): Likewise.
16266 (vrmlaldavhaq_u32): Likewise.
16267 (vshlcq_s8): Likewise.
16268 (vshlcq_u8): Likewise.
16269 (vshlcq_s16): Likewise.
16270 (vshlcq_u16): Likewise.
16271 (vshlcq_s32): Likewise.
16272 (vshlcq_u32): Likewise.
16273 (vabavq_u8): Likewise.
16274 (vabavq_u16): Likewise.
16275 (vabavq_u32): Likewise.
16276 (__arm_vabavq_s8): Define intrinsic.
16277 (__arm_vabavq_s16): Likewise.
16278 (__arm_vabavq_s32): Likewise.
16279 (__arm_vabavq_u8): Likewise.
16280 (__arm_vabavq_u16): Likewise.
16281 (__arm_vabavq_u32): Likewise.
16282 (__arm_vbicq_m_n_s16): Likewise.
16283 (__arm_vbicq_m_n_s32): Likewise.
16284 (__arm_vbicq_m_n_u16): Likewise.
16285 (__arm_vbicq_m_n_u32): Likewise.
16286 (__arm_vqrshrnbq_n_s16): Likewise.
16287 (__arm_vqrshrnbq_n_u16): Likewise.
16288 (__arm_vqrshrnbq_n_s32): Likewise.
16289 (__arm_vqrshrnbq_n_u32): Likewise.
16290 (__arm_vqrshrunbq_n_s16): Likewise.
16291 (__arm_vqrshrunbq_n_s32): Likewise.
16292 (__arm_vrmlaldavhaq_s32): Likewise.
16293 (__arm_vrmlaldavhaq_u32): Likewise.
16294 (__arm_vshlcq_s8): Likewise.
16295 (__arm_vshlcq_u8): Likewise.
16296 (__arm_vshlcq_s16): Likewise.
16297 (__arm_vshlcq_u16): Likewise.
16298 (__arm_vshlcq_s32): Likewise.
16299 (__arm_vshlcq_u32): Likewise.
16300 (__arm_vcmpeqq_m_f16): Likewise.
16301 (__arm_vcmpeqq_m_f32): Likewise.
16302 (__arm_vcvtaq_m_s16_f16): Likewise.
16303 (__arm_vcvtaq_m_u16_f16): Likewise.
16304 (__arm_vcvtaq_m_s32_f32): Likewise.
16305 (__arm_vcvtaq_m_u32_f32): Likewise.
16306 (__arm_vcvtq_m_f16_s16): Likewise.
16307 (__arm_vcvtq_m_f16_u16): Likewise.
16308 (__arm_vcvtq_m_f32_s32): Likewise.
16309 (__arm_vcvtq_m_f32_u32): Likewise.
16310 (vcvtaq_m): Define polymorphic variant.
16311 (vcvtq_m): Likewise.
16312 (vabavq): Likewise.
16313 (vshlcq): Likewise.
16314 (vbicq_m_n): Likewise.
16315 (vqrshrnbq_n): Likewise.
16316 (vqrshrunbq_n): Likewise.
16317 * config/arm/arm_mve_builtins.def
16318 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
16319 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16320 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16321 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16322 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16323 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16324 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16325 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16326 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
16327 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16328 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16329 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16330 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16331 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
16332 * config/arm/mve.md (VBICQ_M_N): Define iterator.
16333 (VCVTAQ_M): Likewise.
16334 (VCVTQ_M_TO_F): Likewise.
16335 (VQRSHRNBQ_N): Likewise.
16336 (VABAVQ): Likewise.
16337 (VSHLCQ): Likewise.
16338 (VRMLALDAVHAQ): Likewise.
16339 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
16340 (mve_vcmpeqq_m_f<mode>): Likewise.
16341 (mve_vcvtaq_m_<supf><mode>): Likewise.
16342 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
16343 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
16344 (mve_vqrshrunbq_n_s<mode>): Likewise.
16345 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
16346 (mve_vabavq_<supf><mode>): Likewise.
16347 (mve_vshlcq_<supf><mode>): Likewise.
16348 (mve_vshlcq_<supf><mode>): Likewise.
16349 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
16350 (mve_vshlcq_carry_<supf><mode>): Likewise.
16352 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16353 Mihail Ionescu <mihail.ionescu@arm.com>
16354 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16356 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
16357 (vqmovnbq_u16): Likewise.
16358 (vmulltq_poly_p8): Likewise.
16359 (vmullbq_poly_p8): Likewise.
16360 (vmovntq_u16): Likewise.
16361 (vmovnbq_u16): Likewise.
16362 (vmlaldavxq_u16): Likewise.
16363 (vmlaldavq_u16): Likewise.
16364 (vqmovuntq_s16): Likewise.
16365 (vqmovunbq_s16): Likewise.
16366 (vshlltq_n_u8): Likewise.
16367 (vshllbq_n_u8): Likewise.
16368 (vorrq_n_u16): Likewise.
16369 (vbicq_n_u16): Likewise.
16370 (vcmpneq_n_f16): Likewise.
16371 (vcmpneq_f16): Likewise.
16372 (vcmpltq_n_f16): Likewise.
16373 (vcmpltq_f16): Likewise.
16374 (vcmpleq_n_f16): Likewise.
16375 (vcmpleq_f16): Likewise.
16376 (vcmpgtq_n_f16): Likewise.
16377 (vcmpgtq_f16): Likewise.
16378 (vcmpgeq_n_f16): Likewise.
16379 (vcmpgeq_f16): Likewise.
16380 (vcmpeqq_n_f16): Likewise.
16381 (vcmpeqq_f16): Likewise.
16382 (vsubq_f16): Likewise.
16383 (vqmovntq_s16): Likewise.
16384 (vqmovnbq_s16): Likewise.
16385 (vqdmulltq_s16): Likewise.
16386 (vqdmulltq_n_s16): Likewise.
16387 (vqdmullbq_s16): Likewise.
16388 (vqdmullbq_n_s16): Likewise.
16389 (vorrq_f16): Likewise.
16390 (vornq_f16): Likewise.
16391 (vmulq_n_f16): Likewise.
16392 (vmulq_f16): Likewise.
16393 (vmovntq_s16): Likewise.
16394 (vmovnbq_s16): Likewise.
16395 (vmlsldavxq_s16): Likewise.
16396 (vmlsldavq_s16): Likewise.
16397 (vmlaldavxq_s16): Likewise.
16398 (vmlaldavq_s16): Likewise.
16399 (vminnmvq_f16): Likewise.
16400 (vminnmq_f16): Likewise.
16401 (vminnmavq_f16): Likewise.
16402 (vminnmaq_f16): Likewise.
16403 (vmaxnmvq_f16): Likewise.
16404 (vmaxnmq_f16): Likewise.
16405 (vmaxnmavq_f16): Likewise.
16406 (vmaxnmaq_f16): Likewise.
16407 (veorq_f16): Likewise.
16408 (vcmulq_rot90_f16): Likewise.
16409 (vcmulq_rot270_f16): Likewise.
16410 (vcmulq_rot180_f16): Likewise.
16411 (vcmulq_f16): Likewise.
16412 (vcaddq_rot90_f16): Likewise.
16413 (vcaddq_rot270_f16): Likewise.
16414 (vbicq_f16): Likewise.
16415 (vandq_f16): Likewise.
16416 (vaddq_n_f16): Likewise.
16417 (vabdq_f16): Likewise.
16418 (vshlltq_n_s8): Likewise.
16419 (vshllbq_n_s8): Likewise.
16420 (vorrq_n_s16): Likewise.
16421 (vbicq_n_s16): Likewise.
16422 (vqmovntq_u32): Likewise.
16423 (vqmovnbq_u32): Likewise.
16424 (vmulltq_poly_p16): Likewise.
16425 (vmullbq_poly_p16): Likewise.
16426 (vmovntq_u32): Likewise.
16427 (vmovnbq_u32): Likewise.
16428 (vmlaldavxq_u32): Likewise.
16429 (vmlaldavq_u32): Likewise.
16430 (vqmovuntq_s32): Likewise.
16431 (vqmovunbq_s32): Likewise.
16432 (vshlltq_n_u16): Likewise.
16433 (vshllbq_n_u16): Likewise.
16434 (vorrq_n_u32): Likewise.
16435 (vbicq_n_u32): Likewise.
16436 (vcmpneq_n_f32): Likewise.
16437 (vcmpneq_f32): Likewise.
16438 (vcmpltq_n_f32): Likewise.
16439 (vcmpltq_f32): Likewise.
16440 (vcmpleq_n_f32): Likewise.
16441 (vcmpleq_f32): Likewise.
16442 (vcmpgtq_n_f32): Likewise.
16443 (vcmpgtq_f32): Likewise.
16444 (vcmpgeq_n_f32): Likewise.
16445 (vcmpgeq_f32): Likewise.
16446 (vcmpeqq_n_f32): Likewise.
16447 (vcmpeqq_f32): Likewise.
16448 (vsubq_f32): Likewise.
16449 (vqmovntq_s32): Likewise.
16450 (vqmovnbq_s32): Likewise.
16451 (vqdmulltq_s32): Likewise.
16452 (vqdmulltq_n_s32): Likewise.
16453 (vqdmullbq_s32): Likewise.
16454 (vqdmullbq_n_s32): Likewise.
16455 (vorrq_f32): Likewise.
16456 (vornq_f32): Likewise.
16457 (vmulq_n_f32): Likewise.
16458 (vmulq_f32): Likewise.
16459 (vmovntq_s32): Likewise.
16460 (vmovnbq_s32): Likewise.
16461 (vmlsldavxq_s32): Likewise.
16462 (vmlsldavq_s32): Likewise.
16463 (vmlaldavxq_s32): Likewise.
16464 (vmlaldavq_s32): Likewise.
16465 (vminnmvq_f32): Likewise.
16466 (vminnmq_f32): Likewise.
16467 (vminnmavq_f32): Likewise.
16468 (vminnmaq_f32): Likewise.
16469 (vmaxnmvq_f32): Likewise.
16470 (vmaxnmq_f32): Likewise.
16471 (vmaxnmavq_f32): Likewise.
16472 (vmaxnmaq_f32): Likewise.
16473 (veorq_f32): Likewise.
16474 (vcmulq_rot90_f32): Likewise.
16475 (vcmulq_rot270_f32): Likewise.
16476 (vcmulq_rot180_f32): Likewise.
16477 (vcmulq_f32): Likewise.
16478 (vcaddq_rot90_f32): Likewise.
16479 (vcaddq_rot270_f32): Likewise.
16480 (vbicq_f32): Likewise.
16481 (vandq_f32): Likewise.
16482 (vaddq_n_f32): Likewise.
16483 (vabdq_f32): Likewise.
16484 (vshlltq_n_s16): Likewise.
16485 (vshllbq_n_s16): Likewise.
16486 (vorrq_n_s32): Likewise.
16487 (vbicq_n_s32): Likewise.
16488 (vrmlaldavhq_u32): Likewise.
16489 (vctp8q_m): Likewise.
16490 (vctp64q_m): Likewise.
16491 (vctp32q_m): Likewise.
16492 (vctp16q_m): Likewise.
16493 (vaddlvaq_u32): Likewise.
16494 (vrmlsldavhxq_s32): Likewise.
16495 (vrmlsldavhq_s32): Likewise.
16496 (vrmlaldavhxq_s32): Likewise.
16497 (vrmlaldavhq_s32): Likewise.
16498 (vcvttq_f16_f32): Likewise.
16499 (vcvtbq_f16_f32): Likewise.
16500 (vaddlvaq_s32): Likewise.
16501 (__arm_vqmovntq_u16): Define intrinsic.
16502 (__arm_vqmovnbq_u16): Likewise.
16503 (__arm_vmulltq_poly_p8): Likewise.
16504 (__arm_vmullbq_poly_p8): Likewise.
16505 (__arm_vmovntq_u16): Likewise.
16506 (__arm_vmovnbq_u16): Likewise.
16507 (__arm_vmlaldavxq_u16): Likewise.
16508 (__arm_vmlaldavq_u16): Likewise.
16509 (__arm_vqmovuntq_s16): Likewise.
16510 (__arm_vqmovunbq_s16): Likewise.
16511 (__arm_vshlltq_n_u8): Likewise.
16512 (__arm_vshllbq_n_u8): Likewise.
16513 (__arm_vorrq_n_u16): Likewise.
16514 (__arm_vbicq_n_u16): Likewise.
16515 (__arm_vcmpneq_n_f16): Likewise.
16516 (__arm_vcmpneq_f16): Likewise.
16517 (__arm_vcmpltq_n_f16): Likewise.
16518 (__arm_vcmpltq_f16): Likewise.
16519 (__arm_vcmpleq_n_f16): Likewise.
16520 (__arm_vcmpleq_f16): Likewise.
16521 (__arm_vcmpgtq_n_f16): Likewise.
16522 (__arm_vcmpgtq_f16): Likewise.
16523 (__arm_vcmpgeq_n_f16): Likewise.
16524 (__arm_vcmpgeq_f16): Likewise.
16525 (__arm_vcmpeqq_n_f16): Likewise.
16526 (__arm_vcmpeqq_f16): Likewise.
16527 (__arm_vsubq_f16): Likewise.
16528 (__arm_vqmovntq_s16): Likewise.
16529 (__arm_vqmovnbq_s16): Likewise.
16530 (__arm_vqdmulltq_s16): Likewise.
16531 (__arm_vqdmulltq_n_s16): Likewise.
16532 (__arm_vqdmullbq_s16): Likewise.
16533 (__arm_vqdmullbq_n_s16): Likewise.
16534 (__arm_vorrq_f16): Likewise.
16535 (__arm_vornq_f16): Likewise.
16536 (__arm_vmulq_n_f16): Likewise.
16537 (__arm_vmulq_f16): Likewise.
16538 (__arm_vmovntq_s16): Likewise.
16539 (__arm_vmovnbq_s16): Likewise.
16540 (__arm_vmlsldavxq_s16): Likewise.
16541 (__arm_vmlsldavq_s16): Likewise.
16542 (__arm_vmlaldavxq_s16): Likewise.
16543 (__arm_vmlaldavq_s16): Likewise.
16544 (__arm_vminnmvq_f16): Likewise.
16545 (__arm_vminnmq_f16): Likewise.
16546 (__arm_vminnmavq_f16): Likewise.
16547 (__arm_vminnmaq_f16): Likewise.
16548 (__arm_vmaxnmvq_f16): Likewise.
16549 (__arm_vmaxnmq_f16): Likewise.
16550 (__arm_vmaxnmavq_f16): Likewise.
16551 (__arm_vmaxnmaq_f16): Likewise.
16552 (__arm_veorq_f16): Likewise.
16553 (__arm_vcmulq_rot90_f16): Likewise.
16554 (__arm_vcmulq_rot270_f16): Likewise.
16555 (__arm_vcmulq_rot180_f16): Likewise.
16556 (__arm_vcmulq_f16): Likewise.
16557 (__arm_vcaddq_rot90_f16): Likewise.
16558 (__arm_vcaddq_rot270_f16): Likewise.
16559 (__arm_vbicq_f16): Likewise.
16560 (__arm_vandq_f16): Likewise.
16561 (__arm_vaddq_n_f16): Likewise.
16562 (__arm_vabdq_f16): Likewise.
16563 (__arm_vshlltq_n_s8): Likewise.
16564 (__arm_vshllbq_n_s8): Likewise.
16565 (__arm_vorrq_n_s16): Likewise.
16566 (__arm_vbicq_n_s16): Likewise.
16567 (__arm_vqmovntq_u32): Likewise.
16568 (__arm_vqmovnbq_u32): Likewise.
16569 (__arm_vmulltq_poly_p16): Likewise.
16570 (__arm_vmullbq_poly_p16): Likewise.
16571 (__arm_vmovntq_u32): Likewise.
16572 (__arm_vmovnbq_u32): Likewise.
16573 (__arm_vmlaldavxq_u32): Likewise.
16574 (__arm_vmlaldavq_u32): Likewise.
16575 (__arm_vqmovuntq_s32): Likewise.
16576 (__arm_vqmovunbq_s32): Likewise.
16577 (__arm_vshlltq_n_u16): Likewise.
16578 (__arm_vshllbq_n_u16): Likewise.
16579 (__arm_vorrq_n_u32): Likewise.
16580 (__arm_vbicq_n_u32): Likewise.
16581 (__arm_vcmpneq_n_f32): Likewise.
16582 (__arm_vcmpneq_f32): Likewise.
16583 (__arm_vcmpltq_n_f32): Likewise.
16584 (__arm_vcmpltq_f32): Likewise.
16585 (__arm_vcmpleq_n_f32): Likewise.
16586 (__arm_vcmpleq_f32): Likewise.
16587 (__arm_vcmpgtq_n_f32): Likewise.
16588 (__arm_vcmpgtq_f32): Likewise.
16589 (__arm_vcmpgeq_n_f32): Likewise.
16590 (__arm_vcmpgeq_f32): Likewise.
16591 (__arm_vcmpeqq_n_f32): Likewise.
16592 (__arm_vcmpeqq_f32): Likewise.
16593 (__arm_vsubq_f32): Likewise.
16594 (__arm_vqmovntq_s32): Likewise.
16595 (__arm_vqmovnbq_s32): Likewise.
16596 (__arm_vqdmulltq_s32): Likewise.
16597 (__arm_vqdmulltq_n_s32): Likewise.
16598 (__arm_vqdmullbq_s32): Likewise.
16599 (__arm_vqdmullbq_n_s32): Likewise.
16600 (__arm_vorrq_f32): Likewise.
16601 (__arm_vornq_f32): Likewise.
16602 (__arm_vmulq_n_f32): Likewise.
16603 (__arm_vmulq_f32): Likewise.
16604 (__arm_vmovntq_s32): Likewise.
16605 (__arm_vmovnbq_s32): Likewise.
16606 (__arm_vmlsldavxq_s32): Likewise.
16607 (__arm_vmlsldavq_s32): Likewise.
16608 (__arm_vmlaldavxq_s32): Likewise.
16609 (__arm_vmlaldavq_s32): Likewise.
16610 (__arm_vminnmvq_f32): Likewise.
16611 (__arm_vminnmq_f32): Likewise.
16612 (__arm_vminnmavq_f32): Likewise.
16613 (__arm_vminnmaq_f32): Likewise.
16614 (__arm_vmaxnmvq_f32): Likewise.
16615 (__arm_vmaxnmq_f32): Likewise.
16616 (__arm_vmaxnmavq_f32): Likewise.
16617 (__arm_vmaxnmaq_f32): Likewise.
16618 (__arm_veorq_f32): Likewise.
16619 (__arm_vcmulq_rot90_f32): Likewise.
16620 (__arm_vcmulq_rot270_f32): Likewise.
16621 (__arm_vcmulq_rot180_f32): Likewise.
16622 (__arm_vcmulq_f32): Likewise.
16623 (__arm_vcaddq_rot90_f32): Likewise.
16624 (__arm_vcaddq_rot270_f32): Likewise.
16625 (__arm_vbicq_f32): Likewise.
16626 (__arm_vandq_f32): Likewise.
16627 (__arm_vaddq_n_f32): Likewise.
16628 (__arm_vabdq_f32): Likewise.
16629 (__arm_vshlltq_n_s16): Likewise.
16630 (__arm_vshllbq_n_s16): Likewise.
16631 (__arm_vorrq_n_s32): Likewise.
16632 (__arm_vbicq_n_s32): Likewise.
16633 (__arm_vrmlaldavhq_u32): Likewise.
16634 (__arm_vctp8q_m): Likewise.
16635 (__arm_vctp64q_m): Likewise.
16636 (__arm_vctp32q_m): Likewise.
16637 (__arm_vctp16q_m): Likewise.
16638 (__arm_vaddlvaq_u32): Likewise.
16639 (__arm_vrmlsldavhxq_s32): Likewise.
16640 (__arm_vrmlsldavhq_s32): Likewise.
16641 (__arm_vrmlaldavhxq_s32): Likewise.
16642 (__arm_vrmlaldavhq_s32): Likewise.
16643 (__arm_vcvttq_f16_f32): Likewise.
16644 (__arm_vcvtbq_f16_f32): Likewise.
16645 (__arm_vaddlvaq_s32): Likewise.
16646 (vst4q): Define polymorphic variant.
16647 (vrndxq): Likewise.
16649 (vrndpq): Likewise.
16650 (vrndnq): Likewise.
16651 (vrndmq): Likewise.
16652 (vrndaq): Likewise.
16653 (vrev64q): Likewise.
16655 (vdupq_n): Likewise.
16657 (vrev32q): Likewise.
16658 (vcvtbq_f32): Likewise.
16659 (vcvttq_f32): Likewise.
16661 (vsubq_n): Likewise.
16662 (vbrsrq_n): Likewise.
16663 (vcvtq_n): Likewise.
16667 (vaddq_n): Likewise.
16671 (vmulq_n): Likewise.
16673 (vcaddq_rot270): Likewise.
16674 (vcmpeqq_n): Likewise.
16675 (vcmpeqq): Likewise.
16676 (vcaddq_rot90): Likewise.
16677 (vcmpgeq_n): Likewise.
16678 (vcmpgeq): Likewise.
16679 (vcmpgtq_n): Likewise.
16680 (vcmpgtq): Likewise.
16681 (vcmpgtq): Likewise.
16682 (vcmpleq_n): Likewise.
16683 (vcmpleq_n): Likewise.
16684 (vcmpleq): Likewise.
16685 (vcmpleq): Likewise.
16686 (vcmpltq_n): Likewise.
16687 (vcmpltq_n): Likewise.
16688 (vcmpltq): Likewise.
16689 (vcmpltq): Likewise.
16690 (vcmpneq_n): Likewise.
16691 (vcmpneq_n): Likewise.
16692 (vcmpneq): Likewise.
16693 (vcmpneq): Likewise.
16694 (vcmulq): Likewise.
16695 (vcmulq): Likewise.
16696 (vcmulq_rot180): Likewise.
16697 (vcmulq_rot180): Likewise.
16698 (vcmulq_rot270): Likewise.
16699 (vcmulq_rot270): Likewise.
16700 (vcmulq_rot90): Likewise.
16701 (vcmulq_rot90): Likewise.
16704 (vmaxnmaq): Likewise.
16705 (vmaxnmaq): Likewise.
16706 (vmaxnmavq): Likewise.
16707 (vmaxnmavq): Likewise.
16708 (vmaxnmq): Likewise.
16709 (vmaxnmq): Likewise.
16710 (vmaxnmvq): Likewise.
16711 (vmaxnmvq): Likewise.
16712 (vminnmaq): Likewise.
16713 (vminnmaq): Likewise.
16714 (vminnmavq): Likewise.
16715 (vminnmavq): Likewise.
16716 (vminnmq): Likewise.
16717 (vminnmq): Likewise.
16718 (vminnmvq): Likewise.
16719 (vminnmvq): Likewise.
16720 (vbicq_n): Likewise.
16721 (vqmovntq): Likewise.
16722 (vqmovntq): Likewise.
16723 (vqmovnbq): Likewise.
16724 (vqmovnbq): Likewise.
16725 (vmulltq_poly): Likewise.
16726 (vmulltq_poly): Likewise.
16727 (vmullbq_poly): Likewise.
16728 (vmullbq_poly): Likewise.
16729 (vmovntq): Likewise.
16730 (vmovntq): Likewise.
16731 (vmovnbq): Likewise.
16732 (vmovnbq): Likewise.
16733 (vmlaldavxq): Likewise.
16734 (vmlaldavxq): Likewise.
16735 (vqmovuntq): Likewise.
16736 (vqmovuntq): Likewise.
16737 (vshlltq_n): Likewise.
16738 (vshlltq_n): Likewise.
16739 (vshllbq_n): Likewise.
16740 (vshllbq_n): Likewise.
16741 (vorrq_n): Likewise.
16742 (vorrq_n): Likewise.
16743 (vmlaldavq): Likewise.
16744 (vmlaldavq): Likewise.
16745 (vqmovunbq): Likewise.
16746 (vqmovunbq): Likewise.
16747 (vqdmulltq_n): Likewise.
16748 (vqdmulltq_n): Likewise.
16749 (vqdmulltq): Likewise.
16750 (vqdmulltq): Likewise.
16751 (vqdmullbq_n): Likewise.
16752 (vqdmullbq_n): Likewise.
16753 (vqdmullbq): Likewise.
16754 (vqdmullbq): Likewise.
16755 (vaddlvaq): Likewise.
16756 (vaddlvaq): Likewise.
16757 (vrmlaldavhq): Likewise.
16758 (vrmlaldavhq): Likewise.
16759 (vrmlaldavhxq): Likewise.
16760 (vrmlaldavhxq): Likewise.
16761 (vrmlsldavhq): Likewise.
16762 (vrmlsldavhq): Likewise.
16763 (vrmlsldavhxq): Likewise.
16764 (vrmlsldavhxq): Likewise.
16765 (vmlsldavxq): Likewise.
16766 (vmlsldavxq): Likewise.
16767 (vmlsldavq): Likewise.
16768 (vmlsldavq): Likewise.
16769 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
16770 (BINOP_NONE_NONE_NONE): Likewise.
16771 (BINOP_UNONE_NONE_NONE): Likewise.
16772 (BINOP_UNONE_UNONE_IMM): Likewise.
16773 (BINOP_UNONE_UNONE_NONE): Likewise.
16774 (BINOP_UNONE_UNONE_UNONE): Likewise.
16775 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
16776 (mve_vaddlvaq_<supf>v4si): Likewise.
16777 (mve_vaddq_n_f<mode>): Likewise.
16778 (mve_vandq_f<mode>): Likewise.
16779 (mve_vbicq_f<mode>): Likewise.
16780 (mve_vbicq_n_<supf><mode>): Likewise.
16781 (mve_vcaddq_rot270_f<mode>): Likewise.
16782 (mve_vcaddq_rot90_f<mode>): Likewise.
16783 (mve_vcmpeqq_f<mode>): Likewise.
16784 (mve_vcmpeqq_n_f<mode>): Likewise.
16785 (mve_vcmpgeq_f<mode>): Likewise.
16786 (mve_vcmpgeq_n_f<mode>): Likewise.
16787 (mve_vcmpgtq_f<mode>): Likewise.
16788 (mve_vcmpgtq_n_f<mode>): Likewise.
16789 (mve_vcmpleq_f<mode>): Likewise.
16790 (mve_vcmpleq_n_f<mode>): Likewise.
16791 (mve_vcmpltq_f<mode>): Likewise.
16792 (mve_vcmpltq_n_f<mode>): Likewise.
16793 (mve_vcmpneq_f<mode>): Likewise.
16794 (mve_vcmpneq_n_f<mode>): Likewise.
16795 (mve_vcmulq_f<mode>): Likewise.
16796 (mve_vcmulq_rot180_f<mode>): Likewise.
16797 (mve_vcmulq_rot270_f<mode>): Likewise.
16798 (mve_vcmulq_rot90_f<mode>): Likewise.
16799 (mve_vctp<mode1>q_mhi): Likewise.
16800 (mve_vcvtbq_f16_f32v8hf): Likewise.
16801 (mve_vcvttq_f16_f32v8hf): Likewise.
16802 (mve_veorq_f<mode>): Likewise.
16803 (mve_vmaxnmaq_f<mode>): Likewise.
16804 (mve_vmaxnmavq_f<mode>): Likewise.
16805 (mve_vmaxnmq_f<mode>): Likewise.
16806 (mve_vmaxnmvq_f<mode>): Likewise.
16807 (mve_vminnmaq_f<mode>): Likewise.
16808 (mve_vminnmavq_f<mode>): Likewise.
16809 (mve_vminnmq_f<mode>): Likewise.
16810 (mve_vminnmvq_f<mode>): Likewise.
16811 (mve_vmlaldavq_<supf><mode>): Likewise.
16812 (mve_vmlaldavxq_<supf><mode>): Likewise.
16813 (mve_vmlsldavq_s<mode>): Likewise.
16814 (mve_vmlsldavxq_s<mode>): Likewise.
16815 (mve_vmovnbq_<supf><mode>): Likewise.
16816 (mve_vmovntq_<supf><mode>): Likewise.
16817 (mve_vmulq_f<mode>): Likewise.
16818 (mve_vmulq_n_f<mode>): Likewise.
16819 (mve_vornq_f<mode>): Likewise.
16820 (mve_vorrq_f<mode>): Likewise.
16821 (mve_vorrq_n_<supf><mode>): Likewise.
16822 (mve_vqdmullbq_n_s<mode>): Likewise.
16823 (mve_vqdmullbq_s<mode>): Likewise.
16824 (mve_vqdmulltq_n_s<mode>): Likewise.
16825 (mve_vqdmulltq_s<mode>): Likewise.
16826 (mve_vqmovnbq_<supf><mode>): Likewise.
16827 (mve_vqmovntq_<supf><mode>): Likewise.
16828 (mve_vqmovunbq_s<mode>): Likewise.
16829 (mve_vqmovuntq_s<mode>): Likewise.
16830 (mve_vrmlaldavhxq_sv4si): Likewise.
16831 (mve_vrmlsldavhq_sv4si): Likewise.
16832 (mve_vrmlsldavhxq_sv4si): Likewise.
16833 (mve_vshllbq_n_<supf><mode>): Likewise.
16834 (mve_vshlltq_n_<supf><mode>): Likewise.
16835 (mve_vsubq_f<mode>): Likewise.
16836 (mve_vmulltq_poly_p<mode>): Likewise.
16837 (mve_vmullbq_poly_p<mode>): Likewise.
16838 (mve_vrmlaldavhq_<supf>v4si): Likewise.
16840 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16841 Mihail Ionescu <mihail.ionescu@arm.com>
16842 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16844 * config/arm/arm_mve.h (vsubq_u8): Define macro.
16845 (vsubq_n_u8): Likewise.
16846 (vrmulhq_u8): Likewise.
16847 (vrhaddq_u8): Likewise.
16848 (vqsubq_u8): Likewise.
16849 (vqsubq_n_u8): Likewise.
16850 (vqaddq_u8): Likewise.
16851 (vqaddq_n_u8): Likewise.
16852 (vorrq_u8): Likewise.
16853 (vornq_u8): Likewise.
16854 (vmulq_u8): Likewise.
16855 (vmulq_n_u8): Likewise.
16856 (vmulltq_int_u8): Likewise.
16857 (vmullbq_int_u8): Likewise.
16858 (vmulhq_u8): Likewise.
16859 (vmladavq_u8): Likewise.
16860 (vminvq_u8): Likewise.
16861 (vminq_u8): Likewise.
16862 (vmaxvq_u8): Likewise.
16863 (vmaxq_u8): Likewise.
16864 (vhsubq_u8): Likewise.
16865 (vhsubq_n_u8): Likewise.
16866 (vhaddq_u8): Likewise.
16867 (vhaddq_n_u8): Likewise.
16868 (veorq_u8): Likewise.
16869 (vcmpneq_n_u8): Likewise.
16870 (vcmphiq_u8): Likewise.
16871 (vcmphiq_n_u8): Likewise.
16872 (vcmpeqq_u8): Likewise.
16873 (vcmpeqq_n_u8): Likewise.
16874 (vcmpcsq_u8): Likewise.
16875 (vcmpcsq_n_u8): Likewise.
16876 (vcaddq_rot90_u8): Likewise.
16877 (vcaddq_rot270_u8): Likewise.
16878 (vbicq_u8): Likewise.
16879 (vandq_u8): Likewise.
16880 (vaddvq_p_u8): Likewise.
16881 (vaddvaq_u8): Likewise.
16882 (vaddq_n_u8): Likewise.
16883 (vabdq_u8): Likewise.
16884 (vshlq_r_u8): Likewise.
16885 (vrshlq_u8): Likewise.
16886 (vrshlq_n_u8): Likewise.
16887 (vqshlq_u8): Likewise.
16888 (vqshlq_r_u8): Likewise.
16889 (vqrshlq_u8): Likewise.
16890 (vqrshlq_n_u8): Likewise.
16891 (vminavq_s8): Likewise.
16892 (vminaq_s8): Likewise.
16893 (vmaxavq_s8): Likewise.
16894 (vmaxaq_s8): Likewise.
16895 (vbrsrq_n_u8): Likewise.
16896 (vshlq_n_u8): Likewise.
16897 (vrshrq_n_u8): Likewise.
16898 (vqshlq_n_u8): Likewise.
16899 (vcmpneq_n_s8): Likewise.
16900 (vcmpltq_s8): Likewise.
16901 (vcmpltq_n_s8): Likewise.
16902 (vcmpleq_s8): Likewise.
16903 (vcmpleq_n_s8): Likewise.
16904 (vcmpgtq_s8): Likewise.
16905 (vcmpgtq_n_s8): Likewise.
16906 (vcmpgeq_s8): Likewise.
16907 (vcmpgeq_n_s8): Likewise.
16908 (vcmpeqq_s8): Likewise.
16909 (vcmpeqq_n_s8): Likewise.
16910 (vqshluq_n_s8): Likewise.
16911 (vaddvq_p_s8): Likewise.
16912 (vsubq_s8): Likewise.
16913 (vsubq_n_s8): Likewise.
16914 (vshlq_r_s8): Likewise.
16915 (vrshlq_s8): Likewise.
16916 (vrshlq_n_s8): Likewise.
16917 (vrmulhq_s8): Likewise.
16918 (vrhaddq_s8): Likewise.
16919 (vqsubq_s8): Likewise.
16920 (vqsubq_n_s8): Likewise.
16921 (vqshlq_s8): Likewise.
16922 (vqshlq_r_s8): Likewise.
16923 (vqrshlq_s8): Likewise.
16924 (vqrshlq_n_s8): Likewise.
16925 (vqrdmulhq_s8): Likewise.
16926 (vqrdmulhq_n_s8): Likewise.
16927 (vqdmulhq_s8): Likewise.
16928 (vqdmulhq_n_s8): Likewise.
16929 (vqaddq_s8): Likewise.
16930 (vqaddq_n_s8): Likewise.
16931 (vorrq_s8): Likewise.
16932 (vornq_s8): Likewise.
16933 (vmulq_s8): Likewise.
16934 (vmulq_n_s8): Likewise.
16935 (vmulltq_int_s8): Likewise.
16936 (vmullbq_int_s8): Likewise.
16937 (vmulhq_s8): Likewise.
16938 (vmlsdavxq_s8): Likewise.
16939 (vmlsdavq_s8): Likewise.
16940 (vmladavxq_s8): Likewise.
16941 (vmladavq_s8): Likewise.
16942 (vminvq_s8): Likewise.
16943 (vminq_s8): Likewise.
16944 (vmaxvq_s8): Likewise.
16945 (vmaxq_s8): Likewise.
16946 (vhsubq_s8): Likewise.
16947 (vhsubq_n_s8): Likewise.
16948 (vhcaddq_rot90_s8): Likewise.
16949 (vhcaddq_rot270_s8): Likewise.
16950 (vhaddq_s8): Likewise.
16951 (vhaddq_n_s8): Likewise.
16952 (veorq_s8): Likewise.
16953 (vcaddq_rot90_s8): Likewise.
16954 (vcaddq_rot270_s8): Likewise.
16955 (vbrsrq_n_s8): Likewise.
16956 (vbicq_s8): Likewise.
16957 (vandq_s8): Likewise.
16958 (vaddvaq_s8): Likewise.
16959 (vaddq_n_s8): Likewise.
16960 (vabdq_s8): Likewise.
16961 (vshlq_n_s8): Likewise.
16962 (vrshrq_n_s8): Likewise.
16963 (vqshlq_n_s8): Likewise.
16964 (vsubq_u16): Likewise.
16965 (vsubq_n_u16): Likewise.
16966 (vrmulhq_u16): Likewise.
16967 (vrhaddq_u16): Likewise.
16968 (vqsubq_u16): Likewise.
16969 (vqsubq_n_u16): Likewise.
16970 (vqaddq_u16): Likewise.
16971 (vqaddq_n_u16): Likewise.
16972 (vorrq_u16): Likewise.
16973 (vornq_u16): Likewise.
16974 (vmulq_u16): Likewise.
16975 (vmulq_n_u16): Likewise.
16976 (vmulltq_int_u16): Likewise.
16977 (vmullbq_int_u16): Likewise.
16978 (vmulhq_u16): Likewise.
16979 (vmladavq_u16): Likewise.
16980 (vminvq_u16): Likewise.
16981 (vminq_u16): Likewise.
16982 (vmaxvq_u16): Likewise.
16983 (vmaxq_u16): Likewise.
16984 (vhsubq_u16): Likewise.
16985 (vhsubq_n_u16): Likewise.
16986 (vhaddq_u16): Likewise.
16987 (vhaddq_n_u16): Likewise.
16988 (veorq_u16): Likewise.
16989 (vcmpneq_n_u16): Likewise.
16990 (vcmphiq_u16): Likewise.
16991 (vcmphiq_n_u16): Likewise.
16992 (vcmpeqq_u16): Likewise.
16993 (vcmpeqq_n_u16): Likewise.
16994 (vcmpcsq_u16): Likewise.
16995 (vcmpcsq_n_u16): Likewise.
16996 (vcaddq_rot90_u16): Likewise.
16997 (vcaddq_rot270_u16): Likewise.
16998 (vbicq_u16): Likewise.
16999 (vandq_u16): Likewise.
17000 (vaddvq_p_u16): Likewise.
17001 (vaddvaq_u16): Likewise.
17002 (vaddq_n_u16): Likewise.
17003 (vabdq_u16): Likewise.
17004 (vshlq_r_u16): Likewise.
17005 (vrshlq_u16): Likewise.
17006 (vrshlq_n_u16): Likewise.
17007 (vqshlq_u16): Likewise.
17008 (vqshlq_r_u16): Likewise.
17009 (vqrshlq_u16): Likewise.
17010 (vqrshlq_n_u16): Likewise.
17011 (vminavq_s16): Likewise.
17012 (vminaq_s16): Likewise.
17013 (vmaxavq_s16): Likewise.
17014 (vmaxaq_s16): Likewise.
17015 (vbrsrq_n_u16): Likewise.
17016 (vshlq_n_u16): Likewise.
17017 (vrshrq_n_u16): Likewise.
17018 (vqshlq_n_u16): Likewise.
17019 (vcmpneq_n_s16): Likewise.
17020 (vcmpltq_s16): Likewise.
17021 (vcmpltq_n_s16): Likewise.
17022 (vcmpleq_s16): Likewise.
17023 (vcmpleq_n_s16): Likewise.
17024 (vcmpgtq_s16): Likewise.
17025 (vcmpgtq_n_s16): Likewise.
17026 (vcmpgeq_s16): Likewise.
17027 (vcmpgeq_n_s16): Likewise.
17028 (vcmpeqq_s16): Likewise.
17029 (vcmpeqq_n_s16): Likewise.
17030 (vqshluq_n_s16): Likewise.
17031 (vaddvq_p_s16): Likewise.
17032 (vsubq_s16): Likewise.
17033 (vsubq_n_s16): Likewise.
17034 (vshlq_r_s16): Likewise.
17035 (vrshlq_s16): Likewise.
17036 (vrshlq_n_s16): Likewise.
17037 (vrmulhq_s16): Likewise.
17038 (vrhaddq_s16): Likewise.
17039 (vqsubq_s16): Likewise.
17040 (vqsubq_n_s16): Likewise.
17041 (vqshlq_s16): Likewise.
17042 (vqshlq_r_s16): Likewise.
17043 (vqrshlq_s16): Likewise.
17044 (vqrshlq_n_s16): Likewise.
17045 (vqrdmulhq_s16): Likewise.
17046 (vqrdmulhq_n_s16): Likewise.
17047 (vqdmulhq_s16): Likewise.
17048 (vqdmulhq_n_s16): Likewise.
17049 (vqaddq_s16): Likewise.
17050 (vqaddq_n_s16): Likewise.
17051 (vorrq_s16): Likewise.
17052 (vornq_s16): Likewise.
17053 (vmulq_s16): Likewise.
17054 (vmulq_n_s16): Likewise.
17055 (vmulltq_int_s16): Likewise.
17056 (vmullbq_int_s16): Likewise.
17057 (vmulhq_s16): Likewise.
17058 (vmlsdavxq_s16): Likewise.
17059 (vmlsdavq_s16): Likewise.
17060 (vmladavxq_s16): Likewise.
17061 (vmladavq_s16): Likewise.
17062 (vminvq_s16): Likewise.
17063 (vminq_s16): Likewise.
17064 (vmaxvq_s16): Likewise.
17065 (vmaxq_s16): Likewise.
17066 (vhsubq_s16): Likewise.
17067 (vhsubq_n_s16): Likewise.
17068 (vhcaddq_rot90_s16): Likewise.
17069 (vhcaddq_rot270_s16): Likewise.
17070 (vhaddq_s16): Likewise.
17071 (vhaddq_n_s16): Likewise.
17072 (veorq_s16): Likewise.
17073 (vcaddq_rot90_s16): Likewise.
17074 (vcaddq_rot270_s16): Likewise.
17075 (vbrsrq_n_s16): Likewise.
17076 (vbicq_s16): Likewise.
17077 (vandq_s16): Likewise.
17078 (vaddvaq_s16): Likewise.
17079 (vaddq_n_s16): Likewise.
17080 (vabdq_s16): Likewise.
17081 (vshlq_n_s16): Likewise.
17082 (vrshrq_n_s16): Likewise.
17083 (vqshlq_n_s16): Likewise.
17084 (vsubq_u32): Likewise.
17085 (vsubq_n_u32): Likewise.
17086 (vrmulhq_u32): Likewise.
17087 (vrhaddq_u32): Likewise.
17088 (vqsubq_u32): Likewise.
17089 (vqsubq_n_u32): Likewise.
17090 (vqaddq_u32): Likewise.
17091 (vqaddq_n_u32): Likewise.
17092 (vorrq_u32): Likewise.
17093 (vornq_u32): Likewise.
17094 (vmulq_u32): Likewise.
17095 (vmulq_n_u32): Likewise.
17096 (vmulltq_int_u32): Likewise.
17097 (vmullbq_int_u32): Likewise.
17098 (vmulhq_u32): Likewise.
17099 (vmladavq_u32): Likewise.
17100 (vminvq_u32): Likewise.
17101 (vminq_u32): Likewise.
17102 (vmaxvq_u32): Likewise.
17103 (vmaxq_u32): Likewise.
17104 (vhsubq_u32): Likewise.
17105 (vhsubq_n_u32): Likewise.
17106 (vhaddq_u32): Likewise.
17107 (vhaddq_n_u32): Likewise.
17108 (veorq_u32): Likewise.
17109 (vcmpneq_n_u32): Likewise.
17110 (vcmphiq_u32): Likewise.
17111 (vcmphiq_n_u32): Likewise.
17112 (vcmpeqq_u32): Likewise.
17113 (vcmpeqq_n_u32): Likewise.
17114 (vcmpcsq_u32): Likewise.
17115 (vcmpcsq_n_u32): Likewise.
17116 (vcaddq_rot90_u32): Likewise.
17117 (vcaddq_rot270_u32): Likewise.
17118 (vbicq_u32): Likewise.
17119 (vandq_u32): Likewise.
17120 (vaddvq_p_u32): Likewise.
17121 (vaddvaq_u32): Likewise.
17122 (vaddq_n_u32): Likewise.
17123 (vabdq_u32): Likewise.
17124 (vshlq_r_u32): Likewise.
17125 (vrshlq_u32): Likewise.
17126 (vrshlq_n_u32): Likewise.
17127 (vqshlq_u32): Likewise.
17128 (vqshlq_r_u32): Likewise.
17129 (vqrshlq_u32): Likewise.
17130 (vqrshlq_n_u32): Likewise.
17131 (vminavq_s32): Likewise.
17132 (vminaq_s32): Likewise.
17133 (vmaxavq_s32): Likewise.
17134 (vmaxaq_s32): Likewise.
17135 (vbrsrq_n_u32): Likewise.
17136 (vshlq_n_u32): Likewise.
17137 (vrshrq_n_u32): Likewise.
17138 (vqshlq_n_u32): Likewise.
17139 (vcmpneq_n_s32): Likewise.
17140 (vcmpltq_s32): Likewise.
17141 (vcmpltq_n_s32): Likewise.
17142 (vcmpleq_s32): Likewise.
17143 (vcmpleq_n_s32): Likewise.
17144 (vcmpgtq_s32): Likewise.
17145 (vcmpgtq_n_s32): Likewise.
17146 (vcmpgeq_s32): Likewise.
17147 (vcmpgeq_n_s32): Likewise.
17148 (vcmpeqq_s32): Likewise.
17149 (vcmpeqq_n_s32): Likewise.
17150 (vqshluq_n_s32): Likewise.
17151 (vaddvq_p_s32): Likewise.
17152 (vsubq_s32): Likewise.
17153 (vsubq_n_s32): Likewise.
17154 (vshlq_r_s32): Likewise.
17155 (vrshlq_s32): Likewise.
17156 (vrshlq_n_s32): Likewise.
17157 (vrmulhq_s32): Likewise.
17158 (vrhaddq_s32): Likewise.
17159 (vqsubq_s32): Likewise.
17160 (vqsubq_n_s32): Likewise.
17161 (vqshlq_s32): Likewise.
17162 (vqshlq_r_s32): Likewise.
17163 (vqrshlq_s32): Likewise.
17164 (vqrshlq_n_s32): Likewise.
17165 (vqrdmulhq_s32): Likewise.
17166 (vqrdmulhq_n_s32): Likewise.
17167 (vqdmulhq_s32): Likewise.
17168 (vqdmulhq_n_s32): Likewise.
17169 (vqaddq_s32): Likewise.
17170 (vqaddq_n_s32): Likewise.
17171 (vorrq_s32): Likewise.
17172 (vornq_s32): Likewise.
17173 (vmulq_s32): Likewise.
17174 (vmulq_n_s32): Likewise.
17175 (vmulltq_int_s32): Likewise.
17176 (vmullbq_int_s32): Likewise.
17177 (vmulhq_s32): Likewise.
17178 (vmlsdavxq_s32): Likewise.
17179 (vmlsdavq_s32): Likewise.
17180 (vmladavxq_s32): Likewise.
17181 (vmladavq_s32): Likewise.
17182 (vminvq_s32): Likewise.
17183 (vminq_s32): Likewise.
17184 (vmaxvq_s32): Likewise.
17185 (vmaxq_s32): Likewise.
17186 (vhsubq_s32): Likewise.
17187 (vhsubq_n_s32): Likewise.
17188 (vhcaddq_rot90_s32): Likewise.
17189 (vhcaddq_rot270_s32): Likewise.
17190 (vhaddq_s32): Likewise.
17191 (vhaddq_n_s32): Likewise.
17192 (veorq_s32): Likewise.
17193 (vcaddq_rot90_s32): Likewise.
17194 (vcaddq_rot270_s32): Likewise.
17195 (vbrsrq_n_s32): Likewise.
17196 (vbicq_s32): Likewise.
17197 (vandq_s32): Likewise.
17198 (vaddvaq_s32): Likewise.
17199 (vaddq_n_s32): Likewise.
17200 (vabdq_s32): Likewise.
17201 (vshlq_n_s32): Likewise.
17202 (vrshrq_n_s32): Likewise.
17203 (vqshlq_n_s32): Likewise.
17204 (__arm_vsubq_u8): Define intrinsic.
17205 (__arm_vsubq_n_u8): Likewise.
17206 (__arm_vrmulhq_u8): Likewise.
17207 (__arm_vrhaddq_u8): Likewise.
17208 (__arm_vqsubq_u8): Likewise.
17209 (__arm_vqsubq_n_u8): Likewise.
17210 (__arm_vqaddq_u8): Likewise.
17211 (__arm_vqaddq_n_u8): Likewise.
17212 (__arm_vorrq_u8): Likewise.
17213 (__arm_vornq_u8): Likewise.
17214 (__arm_vmulq_u8): Likewise.
17215 (__arm_vmulq_n_u8): Likewise.
17216 (__arm_vmulltq_int_u8): Likewise.
17217 (__arm_vmullbq_int_u8): Likewise.
17218 (__arm_vmulhq_u8): Likewise.
17219 (__arm_vmladavq_u8): Likewise.
17220 (__arm_vminvq_u8): Likewise.
17221 (__arm_vminq_u8): Likewise.
17222 (__arm_vmaxvq_u8): Likewise.
17223 (__arm_vmaxq_u8): Likewise.
17224 (__arm_vhsubq_u8): Likewise.
17225 (__arm_vhsubq_n_u8): Likewise.
17226 (__arm_vhaddq_u8): Likewise.
17227 (__arm_vhaddq_n_u8): Likewise.
17228 (__arm_veorq_u8): Likewise.
17229 (__arm_vcmpneq_n_u8): Likewise.
17230 (__arm_vcmphiq_u8): Likewise.
17231 (__arm_vcmphiq_n_u8): Likewise.
17232 (__arm_vcmpeqq_u8): Likewise.
17233 (__arm_vcmpeqq_n_u8): Likewise.
17234 (__arm_vcmpcsq_u8): Likewise.
17235 (__arm_vcmpcsq_n_u8): Likewise.
17236 (__arm_vcaddq_rot90_u8): Likewise.
17237 (__arm_vcaddq_rot270_u8): Likewise.
17238 (__arm_vbicq_u8): Likewise.
17239 (__arm_vandq_u8): Likewise.
17240 (__arm_vaddvq_p_u8): Likewise.
17241 (__arm_vaddvaq_u8): Likewise.
17242 (__arm_vaddq_n_u8): Likewise.
17243 (__arm_vabdq_u8): Likewise.
17244 (__arm_vshlq_r_u8): Likewise.
17245 (__arm_vrshlq_u8): Likewise.
17246 (__arm_vrshlq_n_u8): Likewise.
17247 (__arm_vqshlq_u8): Likewise.
17248 (__arm_vqshlq_r_u8): Likewise.
17249 (__arm_vqrshlq_u8): Likewise.
17250 (__arm_vqrshlq_n_u8): Likewise.
17251 (__arm_vminavq_s8): Likewise.
17252 (__arm_vminaq_s8): Likewise.
17253 (__arm_vmaxavq_s8): Likewise.
17254 (__arm_vmaxaq_s8): Likewise.
17255 (__arm_vbrsrq_n_u8): Likewise.
17256 (__arm_vshlq_n_u8): Likewise.
17257 (__arm_vrshrq_n_u8): Likewise.
17258 (__arm_vqshlq_n_u8): Likewise.
17259 (__arm_vcmpneq_n_s8): Likewise.
17260 (__arm_vcmpltq_s8): Likewise.
17261 (__arm_vcmpltq_n_s8): Likewise.
17262 (__arm_vcmpleq_s8): Likewise.
17263 (__arm_vcmpleq_n_s8): Likewise.
17264 (__arm_vcmpgtq_s8): Likewise.
17265 (__arm_vcmpgtq_n_s8): Likewise.
17266 (__arm_vcmpgeq_s8): Likewise.
17267 (__arm_vcmpgeq_n_s8): Likewise.
17268 (__arm_vcmpeqq_s8): Likewise.
17269 (__arm_vcmpeqq_n_s8): Likewise.
17270 (__arm_vqshluq_n_s8): Likewise.
17271 (__arm_vaddvq_p_s8): Likewise.
17272 (__arm_vsubq_s8): Likewise.
17273 (__arm_vsubq_n_s8): Likewise.
17274 (__arm_vshlq_r_s8): Likewise.
17275 (__arm_vrshlq_s8): Likewise.
17276 (__arm_vrshlq_n_s8): Likewise.
17277 (__arm_vrmulhq_s8): Likewise.
17278 (__arm_vrhaddq_s8): Likewise.
17279 (__arm_vqsubq_s8): Likewise.
17280 (__arm_vqsubq_n_s8): Likewise.
17281 (__arm_vqshlq_s8): Likewise.
17282 (__arm_vqshlq_r_s8): Likewise.
17283 (__arm_vqrshlq_s8): Likewise.
17284 (__arm_vqrshlq_n_s8): Likewise.
17285 (__arm_vqrdmulhq_s8): Likewise.
17286 (__arm_vqrdmulhq_n_s8): Likewise.
17287 (__arm_vqdmulhq_s8): Likewise.
17288 (__arm_vqdmulhq_n_s8): Likewise.
17289 (__arm_vqaddq_s8): Likewise.
17290 (__arm_vqaddq_n_s8): Likewise.
17291 (__arm_vorrq_s8): Likewise.
17292 (__arm_vornq_s8): Likewise.
17293 (__arm_vmulq_s8): Likewise.
17294 (__arm_vmulq_n_s8): Likewise.
17295 (__arm_vmulltq_int_s8): Likewise.
17296 (__arm_vmullbq_int_s8): Likewise.
17297 (__arm_vmulhq_s8): Likewise.
17298 (__arm_vmlsdavxq_s8): Likewise.
17299 (__arm_vmlsdavq_s8): Likewise.
17300 (__arm_vmladavxq_s8): Likewise.
17301 (__arm_vmladavq_s8): Likewise.
17302 (__arm_vminvq_s8): Likewise.
17303 (__arm_vminq_s8): Likewise.
17304 (__arm_vmaxvq_s8): Likewise.
17305 (__arm_vmaxq_s8): Likewise.
17306 (__arm_vhsubq_s8): Likewise.
17307 (__arm_vhsubq_n_s8): Likewise.
17308 (__arm_vhcaddq_rot90_s8): Likewise.
17309 (__arm_vhcaddq_rot270_s8): Likewise.
17310 (__arm_vhaddq_s8): Likewise.
17311 (__arm_vhaddq_n_s8): Likewise.
17312 (__arm_veorq_s8): Likewise.
17313 (__arm_vcaddq_rot90_s8): Likewise.
17314 (__arm_vcaddq_rot270_s8): Likewise.
17315 (__arm_vbrsrq_n_s8): Likewise.
17316 (__arm_vbicq_s8): Likewise.
17317 (__arm_vandq_s8): Likewise.
17318 (__arm_vaddvaq_s8): Likewise.
17319 (__arm_vaddq_n_s8): Likewise.
17320 (__arm_vabdq_s8): Likewise.
17321 (__arm_vshlq_n_s8): Likewise.
17322 (__arm_vrshrq_n_s8): Likewise.
17323 (__arm_vqshlq_n_s8): Likewise.
17324 (__arm_vsubq_u16): Likewise.
17325 (__arm_vsubq_n_u16): Likewise.
17326 (__arm_vrmulhq_u16): Likewise.
17327 (__arm_vrhaddq_u16): Likewise.
17328 (__arm_vqsubq_u16): Likewise.
17329 (__arm_vqsubq_n_u16): Likewise.
17330 (__arm_vqaddq_u16): Likewise.
17331 (__arm_vqaddq_n_u16): Likewise.
17332 (__arm_vorrq_u16): Likewise.
17333 (__arm_vornq_u16): Likewise.
17334 (__arm_vmulq_u16): Likewise.
17335 (__arm_vmulq_n_u16): Likewise.
17336 (__arm_vmulltq_int_u16): Likewise.
17337 (__arm_vmullbq_int_u16): Likewise.
17338 (__arm_vmulhq_u16): Likewise.
17339 (__arm_vmladavq_u16): Likewise.
17340 (__arm_vminvq_u16): Likewise.
17341 (__arm_vminq_u16): Likewise.
17342 (__arm_vmaxvq_u16): Likewise.
17343 (__arm_vmaxq_u16): Likewise.
17344 (__arm_vhsubq_u16): Likewise.
17345 (__arm_vhsubq_n_u16): Likewise.
17346 (__arm_vhaddq_u16): Likewise.
17347 (__arm_vhaddq_n_u16): Likewise.
17348 (__arm_veorq_u16): Likewise.
17349 (__arm_vcmpneq_n_u16): Likewise.
17350 (__arm_vcmphiq_u16): Likewise.
17351 (__arm_vcmphiq_n_u16): Likewise.
17352 (__arm_vcmpeqq_u16): Likewise.
17353 (__arm_vcmpeqq_n_u16): Likewise.
17354 (__arm_vcmpcsq_u16): Likewise.
17355 (__arm_vcmpcsq_n_u16): Likewise.
17356 (__arm_vcaddq_rot90_u16): Likewise.
17357 (__arm_vcaddq_rot270_u16): Likewise.
17358 (__arm_vbicq_u16): Likewise.
17359 (__arm_vandq_u16): Likewise.
17360 (__arm_vaddvq_p_u16): Likewise.
17361 (__arm_vaddvaq_u16): Likewise.
17362 (__arm_vaddq_n_u16): Likewise.
17363 (__arm_vabdq_u16): Likewise.
17364 (__arm_vshlq_r_u16): Likewise.
17365 (__arm_vrshlq_u16): Likewise.
17366 (__arm_vrshlq_n_u16): Likewise.
17367 (__arm_vqshlq_u16): Likewise.
17368 (__arm_vqshlq_r_u16): Likewise.
17369 (__arm_vqrshlq_u16): Likewise.
17370 (__arm_vqrshlq_n_u16): Likewise.
17371 (__arm_vminavq_s16): Likewise.
17372 (__arm_vminaq_s16): Likewise.
17373 (__arm_vmaxavq_s16): Likewise.
17374 (__arm_vmaxaq_s16): Likewise.
17375 (__arm_vbrsrq_n_u16): Likewise.
17376 (__arm_vshlq_n_u16): Likewise.
17377 (__arm_vrshrq_n_u16): Likewise.
17378 (__arm_vqshlq_n_u16): Likewise.
17379 (__arm_vcmpneq_n_s16): Likewise.
17380 (__arm_vcmpltq_s16): Likewise.
17381 (__arm_vcmpltq_n_s16): Likewise.
17382 (__arm_vcmpleq_s16): Likewise.
17383 (__arm_vcmpleq_n_s16): Likewise.
17384 (__arm_vcmpgtq_s16): Likewise.
17385 (__arm_vcmpgtq_n_s16): Likewise.
17386 (__arm_vcmpgeq_s16): Likewise.
17387 (__arm_vcmpgeq_n_s16): Likewise.
17388 (__arm_vcmpeqq_s16): Likewise.
17389 (__arm_vcmpeqq_n_s16): Likewise.
17390 (__arm_vqshluq_n_s16): Likewise.
17391 (__arm_vaddvq_p_s16): Likewise.
17392 (__arm_vsubq_s16): Likewise.
17393 (__arm_vsubq_n_s16): Likewise.
17394 (__arm_vshlq_r_s16): Likewise.
17395 (__arm_vrshlq_s16): Likewise.
17396 (__arm_vrshlq_n_s16): Likewise.
17397 (__arm_vrmulhq_s16): Likewise.
17398 (__arm_vrhaddq_s16): Likewise.
17399 (__arm_vqsubq_s16): Likewise.
17400 (__arm_vqsubq_n_s16): Likewise.
17401 (__arm_vqshlq_s16): Likewise.
17402 (__arm_vqshlq_r_s16): Likewise.
17403 (__arm_vqrshlq_s16): Likewise.
17404 (__arm_vqrshlq_n_s16): Likewise.
17405 (__arm_vqrdmulhq_s16): Likewise.
17406 (__arm_vqrdmulhq_n_s16): Likewise.
17407 (__arm_vqdmulhq_s16): Likewise.
17408 (__arm_vqdmulhq_n_s16): Likewise.
17409 (__arm_vqaddq_s16): Likewise.
17410 (__arm_vqaddq_n_s16): Likewise.
17411 (__arm_vorrq_s16): Likewise.
17412 (__arm_vornq_s16): Likewise.
17413 (__arm_vmulq_s16): Likewise.
17414 (__arm_vmulq_n_s16): Likewise.
17415 (__arm_vmulltq_int_s16): Likewise.
17416 (__arm_vmullbq_int_s16): Likewise.
17417 (__arm_vmulhq_s16): Likewise.
17418 (__arm_vmlsdavxq_s16): Likewise.
17419 (__arm_vmlsdavq_s16): Likewise.
17420 (__arm_vmladavxq_s16): Likewise.
17421 (__arm_vmladavq_s16): Likewise.
17422 (__arm_vminvq_s16): Likewise.
17423 (__arm_vminq_s16): Likewise.
17424 (__arm_vmaxvq_s16): Likewise.
17425 (__arm_vmaxq_s16): Likewise.
17426 (__arm_vhsubq_s16): Likewise.
17427 (__arm_vhsubq_n_s16): Likewise.
17428 (__arm_vhcaddq_rot90_s16): Likewise.
17429 (__arm_vhcaddq_rot270_s16): Likewise.
17430 (__arm_vhaddq_s16): Likewise.
17431 (__arm_vhaddq_n_s16): Likewise.
17432 (__arm_veorq_s16): Likewise.
17433 (__arm_vcaddq_rot90_s16): Likewise.
17434 (__arm_vcaddq_rot270_s16): Likewise.
17435 (__arm_vbrsrq_n_s16): Likewise.
17436 (__arm_vbicq_s16): Likewise.
17437 (__arm_vandq_s16): Likewise.
17438 (__arm_vaddvaq_s16): Likewise.
17439 (__arm_vaddq_n_s16): Likewise.
17440 (__arm_vabdq_s16): Likewise.
17441 (__arm_vshlq_n_s16): Likewise.
17442 (__arm_vrshrq_n_s16): Likewise.
17443 (__arm_vqshlq_n_s16): Likewise.
17444 (__arm_vsubq_u32): Likewise.
17445 (__arm_vsubq_n_u32): Likewise.
17446 (__arm_vrmulhq_u32): Likewise.
17447 (__arm_vrhaddq_u32): Likewise.
17448 (__arm_vqsubq_u32): Likewise.
17449 (__arm_vqsubq_n_u32): Likewise.
17450 (__arm_vqaddq_u32): Likewise.
17451 (__arm_vqaddq_n_u32): Likewise.
17452 (__arm_vorrq_u32): Likewise.
17453 (__arm_vornq_u32): Likewise.
17454 (__arm_vmulq_u32): Likewise.
17455 (__arm_vmulq_n_u32): Likewise.
17456 (__arm_vmulltq_int_u32): Likewise.
17457 (__arm_vmullbq_int_u32): Likewise.
17458 (__arm_vmulhq_u32): Likewise.
17459 (__arm_vmladavq_u32): Likewise.
17460 (__arm_vminvq_u32): Likewise.
17461 (__arm_vminq_u32): Likewise.
17462 (__arm_vmaxvq_u32): Likewise.
17463 (__arm_vmaxq_u32): Likewise.
17464 (__arm_vhsubq_u32): Likewise.
17465 (__arm_vhsubq_n_u32): Likewise.
17466 (__arm_vhaddq_u32): Likewise.
17467 (__arm_vhaddq_n_u32): Likewise.
17468 (__arm_veorq_u32): Likewise.
17469 (__arm_vcmpneq_n_u32): Likewise.
17470 (__arm_vcmphiq_u32): Likewise.
17471 (__arm_vcmphiq_n_u32): Likewise.
17472 (__arm_vcmpeqq_u32): Likewise.
17473 (__arm_vcmpeqq_n_u32): Likewise.
17474 (__arm_vcmpcsq_u32): Likewise.
17475 (__arm_vcmpcsq_n_u32): Likewise.
17476 (__arm_vcaddq_rot90_u32): Likewise.
17477 (__arm_vcaddq_rot270_u32): Likewise.
17478 (__arm_vbicq_u32): Likewise.
17479 (__arm_vandq_u32): Likewise.
17480 (__arm_vaddvq_p_u32): Likewise.
17481 (__arm_vaddvaq_u32): Likewise.
17482 (__arm_vaddq_n_u32): Likewise.
17483 (__arm_vabdq_u32): Likewise.
17484 (__arm_vshlq_r_u32): Likewise.
17485 (__arm_vrshlq_u32): Likewise.
17486 (__arm_vrshlq_n_u32): Likewise.
17487 (__arm_vqshlq_u32): Likewise.
17488 (__arm_vqshlq_r_u32): Likewise.
17489 (__arm_vqrshlq_u32): Likewise.
17490 (__arm_vqrshlq_n_u32): Likewise.
17491 (__arm_vminavq_s32): Likewise.
17492 (__arm_vminaq_s32): Likewise.
17493 (__arm_vmaxavq_s32): Likewise.
17494 (__arm_vmaxaq_s32): Likewise.
17495 (__arm_vbrsrq_n_u32): Likewise.
17496 (__arm_vshlq_n_u32): Likewise.
17497 (__arm_vrshrq_n_u32): Likewise.
17498 (__arm_vqshlq_n_u32): Likewise.
17499 (__arm_vcmpneq_n_s32): Likewise.
17500 (__arm_vcmpltq_s32): Likewise.
17501 (__arm_vcmpltq_n_s32): Likewise.
17502 (__arm_vcmpleq_s32): Likewise.
17503 (__arm_vcmpleq_n_s32): Likewise.
17504 (__arm_vcmpgtq_s32): Likewise.
17505 (__arm_vcmpgtq_n_s32): Likewise.
17506 (__arm_vcmpgeq_s32): Likewise.
17507 (__arm_vcmpgeq_n_s32): Likewise.
17508 (__arm_vcmpeqq_s32): Likewise.
17509 (__arm_vcmpeqq_n_s32): Likewise.
17510 (__arm_vqshluq_n_s32): Likewise.
17511 (__arm_vaddvq_p_s32): Likewise.
17512 (__arm_vsubq_s32): Likewise.
17513 (__arm_vsubq_n_s32): Likewise.
17514 (__arm_vshlq_r_s32): Likewise.
17515 (__arm_vrshlq_s32): Likewise.
17516 (__arm_vrshlq_n_s32): Likewise.
17517 (__arm_vrmulhq_s32): Likewise.
17518 (__arm_vrhaddq_s32): Likewise.
17519 (__arm_vqsubq_s32): Likewise.
17520 (__arm_vqsubq_n_s32): Likewise.
17521 (__arm_vqshlq_s32): Likewise.
17522 (__arm_vqshlq_r_s32): Likewise.
17523 (__arm_vqrshlq_s32): Likewise.
17524 (__arm_vqrshlq_n_s32): Likewise.
17525 (__arm_vqrdmulhq_s32): Likewise.
17526 (__arm_vqrdmulhq_n_s32): Likewise.
17527 (__arm_vqdmulhq_s32): Likewise.
17528 (__arm_vqdmulhq_n_s32): Likewise.
17529 (__arm_vqaddq_s32): Likewise.
17530 (__arm_vqaddq_n_s32): Likewise.
17531 (__arm_vorrq_s32): Likewise.
17532 (__arm_vornq_s32): Likewise.
17533 (__arm_vmulq_s32): Likewise.
17534 (__arm_vmulq_n_s32): Likewise.
17535 (__arm_vmulltq_int_s32): Likewise.
17536 (__arm_vmullbq_int_s32): Likewise.
17537 (__arm_vmulhq_s32): Likewise.
17538 (__arm_vmlsdavxq_s32): Likewise.
17539 (__arm_vmlsdavq_s32): Likewise.
17540 (__arm_vmladavxq_s32): Likewise.
17541 (__arm_vmladavq_s32): Likewise.
17542 (__arm_vminvq_s32): Likewise.
17543 (__arm_vminq_s32): Likewise.
17544 (__arm_vmaxvq_s32): Likewise.
17545 (__arm_vmaxq_s32): Likewise.
17546 (__arm_vhsubq_s32): Likewise.
17547 (__arm_vhsubq_n_s32): Likewise.
17548 (__arm_vhcaddq_rot90_s32): Likewise.
17549 (__arm_vhcaddq_rot270_s32): Likewise.
17550 (__arm_vhaddq_s32): Likewise.
17551 (__arm_vhaddq_n_s32): Likewise.
17552 (__arm_veorq_s32): Likewise.
17553 (__arm_vcaddq_rot90_s32): Likewise.
17554 (__arm_vcaddq_rot270_s32): Likewise.
17555 (__arm_vbrsrq_n_s32): Likewise.
17556 (__arm_vbicq_s32): Likewise.
17557 (__arm_vandq_s32): Likewise.
17558 (__arm_vaddvaq_s32): Likewise.
17559 (__arm_vaddq_n_s32): Likewise.
17560 (__arm_vabdq_s32): Likewise.
17561 (__arm_vshlq_n_s32): Likewise.
17562 (__arm_vrshrq_n_s32): Likewise.
17563 (__arm_vqshlq_n_s32): Likewise.
17564 (vsubq): Define polymorphic variant.
17565 (vsubq_n): Likewise.
17566 (vshlq_r): Likewise.
17567 (vrshlq_n): Likewise.
17568 (vrshlq): Likewise.
17569 (vrmulhq): Likewise.
17570 (vrhaddq): Likewise.
17571 (vqsubq_n): Likewise.
17572 (vqsubq): Likewise.
17573 (vqshlq): Likewise.
17574 (vqshlq_r): Likewise.
17575 (vqshluq): Likewise.
17576 (vrshrq_n): Likewise.
17577 (vshlq_n): Likewise.
17578 (vqshluq_n): Likewise.
17579 (vqshlq_n): Likewise.
17580 (vqrshlq_n): Likewise.
17581 (vqrshlq): Likewise.
17582 (vqrdmulhq_n): Likewise.
17583 (vqrdmulhq): Likewise.
17584 (vqdmulhq_n): Likewise.
17585 (vqdmulhq): Likewise.
17586 (vqaddq_n): Likewise.
17587 (vqaddq): Likewise.
17588 (vorrq_n): Likewise.
17591 (vmulq_n): Likewise.
17593 (vmulltq_int): Likewise.
17594 (vmullbq_int): Likewise.
17595 (vmulhq): Likewise.
17597 (vminaq): Likewise.
17599 (vmaxaq): Likewise.
17600 (vhsubq_n): Likewise.
17601 (vhsubq): Likewise.
17602 (vhcaddq_rot90): Likewise.
17603 (vhcaddq_rot270): Likewise.
17604 (vhaddq_n): Likewise.
17605 (vhaddq): Likewise.
17607 (vcaddq_rot90): Likewise.
17608 (vcaddq_rot270): Likewise.
17609 (vbrsrq_n): Likewise.
17610 (vbicq_n): Likewise.
17613 (vaddq_n): Likewise.
17616 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
17617 (BINOP_NONE_NONE_NONE): Likewise.
17618 (BINOP_NONE_NONE_UNONE): Likewise.
17619 (BINOP_UNONE_NONE_IMM): Likewise.
17620 (BINOP_UNONE_NONE_NONE): Likewise.
17621 (BINOP_UNONE_UNONE_IMM): Likewise.
17622 (BINOP_UNONE_UNONE_NONE): Likewise.
17623 (BINOP_UNONE_UNONE_UNONE): Likewise.
17624 * config/arm/constraints.md (Ra): Define constraint to check constant is
17625 in the range of 0 to 7.
17626 (Rg): Define constriant to check the constant is one among 1, 2, 4
17628 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
17629 (mve_vaddq_n_<supf>): Likewise.
17630 (mve_vaddvaq_<supf>): Likewise.
17631 (mve_vaddvq_p_<supf>): Likewise.
17632 (mve_vandq_<supf>): Likewise.
17633 (mve_vbicq_<supf>): Likewise.
17634 (mve_vbrsrq_n_<supf>): Likewise.
17635 (mve_vcaddq_rot270_<supf>): Likewise.
17636 (mve_vcaddq_rot90_<supf>): Likewise.
17637 (mve_vcmpcsq_n_u): Likewise.
17638 (mve_vcmpcsq_u): Likewise.
17639 (mve_vcmpeqq_n_<supf>): Likewise.
17640 (mve_vcmpeqq_<supf>): Likewise.
17641 (mve_vcmpgeq_n_s): Likewise.
17642 (mve_vcmpgeq_s): Likewise.
17643 (mve_vcmpgtq_n_s): Likewise.
17644 (mve_vcmpgtq_s): Likewise.
17645 (mve_vcmphiq_n_u): Likewise.
17646 (mve_vcmphiq_u): Likewise.
17647 (mve_vcmpleq_n_s): Likewise.
17648 (mve_vcmpleq_s): Likewise.
17649 (mve_vcmpltq_n_s): Likewise.
17650 (mve_vcmpltq_s): Likewise.
17651 (mve_vcmpneq_n_<supf>): Likewise.
17652 (mve_vddupq_n_u): Likewise.
17653 (mve_veorq_<supf>): Likewise.
17654 (mve_vhaddq_n_<supf>): Likewise.
17655 (mve_vhaddq_<supf>): Likewise.
17656 (mve_vhcaddq_rot270_s): Likewise.
17657 (mve_vhcaddq_rot90_s): Likewise.
17658 (mve_vhsubq_n_<supf>): Likewise.
17659 (mve_vhsubq_<supf>): Likewise.
17660 (mve_vidupq_n_u): Likewise.
17661 (mve_vmaxaq_s): Likewise.
17662 (mve_vmaxavq_s): Likewise.
17663 (mve_vmaxq_<supf>): Likewise.
17664 (mve_vmaxvq_<supf>): Likewise.
17665 (mve_vminaq_s): Likewise.
17666 (mve_vminavq_s): Likewise.
17667 (mve_vminq_<supf>): Likewise.
17668 (mve_vminvq_<supf>): Likewise.
17669 (mve_vmladavq_<supf>): Likewise.
17670 (mve_vmladavxq_s): Likewise.
17671 (mve_vmlsdavq_s): Likewise.
17672 (mve_vmlsdavxq_s): Likewise.
17673 (mve_vmulhq_<supf>): Likewise.
17674 (mve_vmullbq_int_<supf>): Likewise.
17675 (mve_vmulltq_int_<supf>): Likewise.
17676 (mve_vmulq_n_<supf>): Likewise.
17677 (mve_vmulq_<supf>): Likewise.
17678 (mve_vornq_<supf>): Likewise.
17679 (mve_vorrq_<supf>): Likewise.
17680 (mve_vqaddq_n_<supf>): Likewise.
17681 (mve_vqaddq_<supf>): Likewise.
17682 (mve_vqdmulhq_n_s): Likewise.
17683 (mve_vqdmulhq_s): Likewise.
17684 (mve_vqrdmulhq_n_s): Likewise.
17685 (mve_vqrdmulhq_s): Likewise.
17686 (mve_vqrshlq_n_<supf>): Likewise.
17687 (mve_vqrshlq_<supf>): Likewise.
17688 (mve_vqshlq_n_<supf>): Likewise.
17689 (mve_vqshlq_r_<supf>): Likewise.
17690 (mve_vqshlq_<supf>): Likewise.
17691 (mve_vqshluq_n_s): Likewise.
17692 (mve_vqsubq_n_<supf>): Likewise.
17693 (mve_vqsubq_<supf>): Likewise.
17694 (mve_vrhaddq_<supf>): Likewise.
17695 (mve_vrmulhq_<supf>): Likewise.
17696 (mve_vrshlq_n_<supf>): Likewise.
17697 (mve_vrshlq_<supf>): Likewise.
17698 (mve_vrshrq_n_<supf>): Likewise.
17699 (mve_vshlq_n_<supf>): Likewise.
17700 (mve_vshlq_r_<supf>): Likewise.
17701 (mve_vsubq_n_<supf>): Likewise.
17702 (mve_vsubq_<supf>): Likewise.
17703 * config/arm/predicates.md (mve_imm_7): Define predicate to check
17704 the matching constraint Ra.
17705 (mve_imm_selective_upto_8): Define predicate to check the matching
17708 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17709 Mihail Ionescu <mihail.ionescu@arm.com>
17710 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17712 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
17713 qualifier for binary operands.
17714 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17715 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
17716 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
17717 (vaddlvq_p_u32): Likewise.
17718 (vcmpneq_s8): Likewise.
17719 (vcmpneq_s16): Likewise.
17720 (vcmpneq_s32): Likewise.
17721 (vcmpneq_u8): Likewise.
17722 (vcmpneq_u16): Likewise.
17723 (vcmpneq_u32): Likewise.
17724 (vshlq_s8): Likewise.
17725 (vshlq_s16): Likewise.
17726 (vshlq_s32): Likewise.
17727 (vshlq_u8): Likewise.
17728 (vshlq_u16): Likewise.
17729 (vshlq_u32): Likewise.
17730 (__arm_vaddlvq_p_s32): Define intrinsic.
17731 (__arm_vaddlvq_p_u32): Likewise.
17732 (__arm_vcmpneq_s8): Likewise.
17733 (__arm_vcmpneq_s16): Likewise.
17734 (__arm_vcmpneq_s32): Likewise.
17735 (__arm_vcmpneq_u8): Likewise.
17736 (__arm_vcmpneq_u16): Likewise.
17737 (__arm_vcmpneq_u32): Likewise.
17738 (__arm_vshlq_s8): Likewise.
17739 (__arm_vshlq_s16): Likewise.
17740 (__arm_vshlq_s32): Likewise.
17741 (__arm_vshlq_u8): Likewise.
17742 (__arm_vshlq_u16): Likewise.
17743 (__arm_vshlq_u32): Likewise.
17744 (vaddlvq_p): Define polymorphic variant.
17745 (vcmpneq): Likewise.
17747 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
17749 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17750 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
17751 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
17752 (mve_vcmpneq_<supf><mode>): Likewise.
17753 (mve_vshlq_<supf><mode>): Likewise.
17755 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17756 Mihail Ionescu <mihail.ionescu@arm.com>
17757 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17759 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
17760 qualifier for binary operands.
17761 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17762 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17763 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
17764 (vcvtq_n_s32_f32): Likewise.
17765 (vcvtq_n_u16_f16): Likewise.
17766 (vcvtq_n_u32_f32): Likewise.
17767 (vcreateq_u8): Likewise.
17768 (vcreateq_u16): Likewise.
17769 (vcreateq_u32): Likewise.
17770 (vcreateq_u64): Likewise.
17771 (vcreateq_s8): Likewise.
17772 (vcreateq_s16): Likewise.
17773 (vcreateq_s32): Likewise.
17774 (vcreateq_s64): Likewise.
17775 (vshrq_n_s8): Likewise.
17776 (vshrq_n_s16): Likewise.
17777 (vshrq_n_s32): Likewise.
17778 (vshrq_n_u8): Likewise.
17779 (vshrq_n_u16): Likewise.
17780 (vshrq_n_u32): Likewise.
17781 (__arm_vcreateq_u8): Define intrinsic.
17782 (__arm_vcreateq_u16): Likewise.
17783 (__arm_vcreateq_u32): Likewise.
17784 (__arm_vcreateq_u64): Likewise.
17785 (__arm_vcreateq_s8): Likewise.
17786 (__arm_vcreateq_s16): Likewise.
17787 (__arm_vcreateq_s32): Likewise.
17788 (__arm_vcreateq_s64): Likewise.
17789 (__arm_vshrq_n_s8): Likewise.
17790 (__arm_vshrq_n_s16): Likewise.
17791 (__arm_vshrq_n_s32): Likewise.
17792 (__arm_vshrq_n_u8): Likewise.
17793 (__arm_vshrq_n_u16): Likewise.
17794 (__arm_vshrq_n_u32): Likewise.
17795 (__arm_vcvtq_n_s16_f16): Likewise.
17796 (__arm_vcvtq_n_s32_f32): Likewise.
17797 (__arm_vcvtq_n_u16_f16): Likewise.
17798 (__arm_vcvtq_n_u32_f32): Likewise.
17799 (vshrq_n): Define polymorphic variant.
17800 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
17802 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17803 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17804 * config/arm/constraints.md (Rb): Define constraint to check constant is
17805 in the range of 1 to 8.
17806 (Rf): Define constraint to check constant is in the range of 1 to 32.
17807 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
17808 (mve_vshrq_n_<supf><mode>): Likewise.
17809 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
17810 * config/arm/predicates.md (mve_imm_8): Define predicate to check
17811 the matching constraint Rb.
17812 (mve_imm_32): Define predicate to check the matching constraint Rf.
17814 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17815 Mihail Ionescu <mihail.ionescu@arm.com>
17816 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17818 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
17819 qualifier for binary operands.
17820 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
17821 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17822 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17823 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
17824 (vsubq_n_f32): Likewise.
17825 (vbrsrq_n_f16): Likewise.
17826 (vbrsrq_n_f32): Likewise.
17827 (vcvtq_n_f16_s16): Likewise.
17828 (vcvtq_n_f32_s32): Likewise.
17829 (vcvtq_n_f16_u16): Likewise.
17830 (vcvtq_n_f32_u32): Likewise.
17831 (vcreateq_f16): Likewise.
17832 (vcreateq_f32): Likewise.
17833 (__arm_vsubq_n_f16): Define intrinsic.
17834 (__arm_vsubq_n_f32): Likewise.
17835 (__arm_vbrsrq_n_f16): Likewise.
17836 (__arm_vbrsrq_n_f32): Likewise.
17837 (__arm_vcvtq_n_f16_s16): Likewise.
17838 (__arm_vcvtq_n_f32_s32): Likewise.
17839 (__arm_vcvtq_n_f16_u16): Likewise.
17840 (__arm_vcvtq_n_f32_u32): Likewise.
17841 (__arm_vcreateq_f16): Likewise.
17842 (__arm_vcreateq_f32): Likewise.
17843 (vsubq): Define polymorphic variant.
17844 (vbrsrq): Likewise.
17845 (vcvtq_n): Likewise.
17846 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
17848 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
17849 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17850 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17851 * config/arm/constraints.md (Rd): Define constraint to check constant is
17852 in the range of 1 to 16.
17853 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
17854 mve_vbrsrq_n_f<mode>: Likewise.
17855 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
17856 mve_vcreateq_f<mode>: Likewise.
17857 * config/arm/predicates.md (mve_imm_16): Define predicate to check
17858 the matching constraint Rd.
17860 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17861 Mihail Ionescu <mihail.ionescu@arm.com>
17862 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17864 * config/arm/arm-builtins.c (hi_UP): Define mode.
17865 * config/arm/arm.h (IS_VPR_REGNUM): Move.
17866 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
17867 (APSRQ_REGNUM): Modify.
17868 (APSRGE_REGNUM): Modify.
17869 * config/arm/arm_mve.h (vctp16q): Define macro.
17870 (vctp32q): Likewise.
17871 (vctp64q): Likewise.
17872 (vctp8q): Likewise.
17874 (__arm_vctp16q): Define intrinsic.
17875 (__arm_vctp32q): Likewise.
17876 (__arm_vctp64q): Likewise.
17877 (__arm_vctp8q): Likewise.
17878 (__arm_vpnot): Likewise.
17879 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
17881 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
17882 (mve_vpnothi): Likewise.
17884 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17885 Mihail Ionescu <mihail.ionescu@arm.com>
17886 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17888 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
17889 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
17890 (vdupq_n_s16): Likewise.
17891 (vdupq_n_s32): Likewise.
17892 (vabsq_s8): Likewise.
17893 (vabsq_s16): Likewise.
17894 (vabsq_s32): Likewise.
17895 (vclsq_s8): Likewise.
17896 (vclsq_s16): Likewise.
17897 (vclsq_s32): Likewise.
17898 (vclzq_s8): Likewise.
17899 (vclzq_s16): Likewise.
17900 (vclzq_s32): Likewise.
17901 (vnegq_s8): Likewise.
17902 (vnegq_s16): Likewise.
17903 (vnegq_s32): Likewise.
17904 (vaddlvq_s32): Likewise.
17905 (vaddvq_s8): Likewise.
17906 (vaddvq_s16): Likewise.
17907 (vaddvq_s32): Likewise.
17908 (vmovlbq_s8): Likewise.
17909 (vmovlbq_s16): Likewise.
17910 (vmovltq_s8): Likewise.
17911 (vmovltq_s16): Likewise.
17912 (vmvnq_s8): Likewise.
17913 (vmvnq_s16): Likewise.
17914 (vmvnq_s32): Likewise.
17915 (vrev16q_s8): Likewise.
17916 (vrev32q_s8): Likewise.
17917 (vrev32q_s16): Likewise.
17918 (vqabsq_s8): Likewise.
17919 (vqabsq_s16): Likewise.
17920 (vqabsq_s32): Likewise.
17921 (vqnegq_s8): Likewise.
17922 (vqnegq_s16): Likewise.
17923 (vqnegq_s32): Likewise.
17924 (vcvtaq_s16_f16): Likewise.
17925 (vcvtaq_s32_f32): Likewise.
17926 (vcvtnq_s16_f16): Likewise.
17927 (vcvtnq_s32_f32): Likewise.
17928 (vcvtpq_s16_f16): Likewise.
17929 (vcvtpq_s32_f32): Likewise.
17930 (vcvtmq_s16_f16): Likewise.
17931 (vcvtmq_s32_f32): Likewise.
17932 (vmvnq_u8): Likewise.
17933 (vmvnq_u16): Likewise.
17934 (vmvnq_u32): Likewise.
17935 (vdupq_n_u8): Likewise.
17936 (vdupq_n_u16): Likewise.
17937 (vdupq_n_u32): Likewise.
17938 (vclzq_u8): Likewise.
17939 (vclzq_u16): Likewise.
17940 (vclzq_u32): Likewise.
17941 (vaddvq_u8): Likewise.
17942 (vaddvq_u16): Likewise.
17943 (vaddvq_u32): Likewise.
17944 (vrev32q_u8): Likewise.
17945 (vrev32q_u16): Likewise.
17946 (vmovltq_u8): Likewise.
17947 (vmovltq_u16): Likewise.
17948 (vmovlbq_u8): Likewise.
17949 (vmovlbq_u16): Likewise.
17950 (vrev16q_u8): Likewise.
17951 (vaddlvq_u32): Likewise.
17952 (vcvtpq_u16_f16): Likewise.
17953 (vcvtpq_u32_f32): Likewise.
17954 (vcvtnq_u16_f16): Likewise.
17955 (vcvtmq_u16_f16): Likewise.
17956 (vcvtmq_u32_f32): Likewise.
17957 (vcvtaq_u16_f16): Likewise.
17958 (vcvtaq_u32_f32): Likewise.
17959 (__arm_vdupq_n_s8): Define intrinsic.
17960 (__arm_vdupq_n_s16): Likewise.
17961 (__arm_vdupq_n_s32): Likewise.
17962 (__arm_vabsq_s8): Likewise.
17963 (__arm_vabsq_s16): Likewise.
17964 (__arm_vabsq_s32): Likewise.
17965 (__arm_vclsq_s8): Likewise.
17966 (__arm_vclsq_s16): Likewise.
17967 (__arm_vclsq_s32): Likewise.
17968 (__arm_vclzq_s8): Likewise.
17969 (__arm_vclzq_s16): Likewise.
17970 (__arm_vclzq_s32): Likewise.
17971 (__arm_vnegq_s8): Likewise.
17972 (__arm_vnegq_s16): Likewise.
17973 (__arm_vnegq_s32): Likewise.
17974 (__arm_vaddlvq_s32): Likewise.
17975 (__arm_vaddvq_s8): Likewise.
17976 (__arm_vaddvq_s16): Likewise.
17977 (__arm_vaddvq_s32): Likewise.
17978 (__arm_vmovlbq_s8): Likewise.
17979 (__arm_vmovlbq_s16): Likewise.
17980 (__arm_vmovltq_s8): Likewise.
17981 (__arm_vmovltq_s16): Likewise.
17982 (__arm_vmvnq_s8): Likewise.
17983 (__arm_vmvnq_s16): Likewise.
17984 (__arm_vmvnq_s32): Likewise.
17985 (__arm_vrev16q_s8): Likewise.
17986 (__arm_vrev32q_s8): Likewise.
17987 (__arm_vrev32q_s16): Likewise.
17988 (__arm_vqabsq_s8): Likewise.
17989 (__arm_vqabsq_s16): Likewise.
17990 (__arm_vqabsq_s32): Likewise.
17991 (__arm_vqnegq_s8): Likewise.
17992 (__arm_vqnegq_s16): Likewise.
17993 (__arm_vqnegq_s32): Likewise.
17994 (__arm_vmvnq_u8): Likewise.
17995 (__arm_vmvnq_u16): Likewise.
17996 (__arm_vmvnq_u32): Likewise.
17997 (__arm_vdupq_n_u8): Likewise.
17998 (__arm_vdupq_n_u16): Likewise.
17999 (__arm_vdupq_n_u32): Likewise.
18000 (__arm_vclzq_u8): Likewise.
18001 (__arm_vclzq_u16): Likewise.
18002 (__arm_vclzq_u32): Likewise.
18003 (__arm_vaddvq_u8): Likewise.
18004 (__arm_vaddvq_u16): Likewise.
18005 (__arm_vaddvq_u32): Likewise.
18006 (__arm_vrev32q_u8): Likewise.
18007 (__arm_vrev32q_u16): Likewise.
18008 (__arm_vmovltq_u8): Likewise.
18009 (__arm_vmovltq_u16): Likewise.
18010 (__arm_vmovlbq_u8): Likewise.
18011 (__arm_vmovlbq_u16): Likewise.
18012 (__arm_vrev16q_u8): Likewise.
18013 (__arm_vaddlvq_u32): Likewise.
18014 (__arm_vcvtpq_u16_f16): Likewise.
18015 (__arm_vcvtpq_u32_f32): Likewise.
18016 (__arm_vcvtnq_u16_f16): Likewise.
18017 (__arm_vcvtmq_u16_f16): Likewise.
18018 (__arm_vcvtmq_u32_f32): Likewise.
18019 (__arm_vcvtaq_u16_f16): Likewise.
18020 (__arm_vcvtaq_u32_f32): Likewise.
18021 (__arm_vcvtaq_s16_f16): Likewise.
18022 (__arm_vcvtaq_s32_f32): Likewise.
18023 (__arm_vcvtnq_s16_f16): Likewise.
18024 (__arm_vcvtnq_s32_f32): Likewise.
18025 (__arm_vcvtpq_s16_f16): Likewise.
18026 (__arm_vcvtpq_s32_f32): Likewise.
18027 (__arm_vcvtmq_s16_f16): Likewise.
18028 (__arm_vcvtmq_s32_f32): Likewise.
18029 (vdupq_n): Define polymorphic variant.
18034 (vaddlvq): Likewise.
18035 (vaddvq): Likewise.
18036 (vmovlbq): Likewise.
18037 (vmovltq): Likewise.
18039 (vrev16q): Likewise.
18040 (vrev32q): Likewise.
18041 (vqabsq): Likewise.
18042 (vqnegq): Likewise.
18043 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
18044 (UNOP_SNONE_NONE): Likewise.
18045 (UNOP_UNONE_UNONE): Likewise.
18046 (UNOP_UNONE_NONE): Likewise.
18047 * config/arm/constraints.md (e): Define new constriant to allow only
18049 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
18050 (mve_vnegq_s<mode>): Likewise.
18051 (mve_vmvnq_<supf><mode>): Likewise.
18052 (mve_vdupq_n_<supf><mode>): Likewise.
18053 (mve_vclzq_<supf><mode>): Likewise.
18054 (mve_vclsq_s<mode>): Likewise.
18055 (mve_vaddvq_<supf><mode>): Likewise.
18056 (mve_vabsq_s<mode>): Likewise.
18057 (mve_vrev32q_<supf><mode>): Likewise.
18058 (mve_vmovltq_<supf><mode>): Likewise.
18059 (mve_vmovlbq_<supf><mode>): Likewise.
18060 (mve_vcvtpq_<supf><mode>): Likewise.
18061 (mve_vcvtnq_<supf><mode>): Likewise.
18062 (mve_vcvtmq_<supf><mode>): Likewise.
18063 (mve_vcvtaq_<supf><mode>): Likewise.
18064 (mve_vrev16q_<supf>v16qi): Likewise.
18065 (mve_vaddlvq_<supf>v4si): Likewise.
18067 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18069 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
18071 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
18073 * read-rtl-function.c (find_param_by_name,
18074 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
18076 * spellcheck.c (get_edit_distance_cutoff): Likewise.
18077 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
18078 * tree.def (SWITCH_EXPR): Likewise.
18079 * selftest.c (assert_str_contains): Likewise.
18080 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
18082 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
18083 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
18084 * langhooks.h (struct lang_hooks_for_decls): Likewise.
18085 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
18086 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
18088 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
18089 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
18090 * tree.c (component_ref_size): Likewise.
18091 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
18092 * gimple-ssa-sprintf.c (get_string_length, format_string,
18093 format_directive): Likewise.
18094 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
18095 * input.c (string_concat_db::get_string_concatenation,
18096 test_lexer_string_locations_ucn4): Likewise.
18097 * cfgexpand.c (pass_expand::execute): Likewise.
18098 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
18099 maybe_diag_overlap): Likewise.
18100 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
18101 * shrink-wrap.c (spread_components): Likewise.
18102 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
18104 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
18106 * dwarf2out.c (dwarf2out_early_finish): Likewise.
18107 * gimple-ssa-store-merging.c: Likewise.
18108 * ira-costs.c (record_operand_costs): Likewise.
18109 * tree-vect-loop.c (vectorizable_reduction): Likewise.
18110 * target.def (dispatch): Likewise.
18111 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
18112 in documentation text.
18113 * doc/tm.texi: Regenerated.
18114 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
18115 duplicated word issue in a comment.
18116 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
18117 * config/i386/i386-features.c (remove_partial_avx_dependency):
18119 * config/msp430/msp430.c (msp430_select_section): Likewise.
18120 * config/gcn/gcn-run.c (load_image): Likewise.
18121 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
18122 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
18123 * config/aarch64/falkor-tag-collision-avoidance.c
18124 (single_dest_per_chain): Likewise.
18125 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
18126 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
18127 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
18128 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
18130 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
18131 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
18132 * config/rs6000/rs6000-logue.c
18133 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
18134 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
18135 Fix various other issues in the comment.
18137 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
18139 * config/arm/t-rmprofile: create new multilib for
18140 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
18143 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18145 PR tree-optimization/94015
18146 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
18147 function where EXP is address of the bytes being stored rather than
18148 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
18149 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
18150 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
18151 calling native_encode_expr if host or target doesn't have 8-bit
18152 chars. Formatting fixes.
18153 (count_nonzero_bytes_addr): New function.
18155 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18156 Mihail Ionescu <mihail.ionescu@arm.com>
18157 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18159 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
18160 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
18161 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
18162 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
18163 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
18164 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
18165 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
18166 (vmvnq_n_s32): Likewise.
18167 (vrev64q_s8): Likewise.
18168 (vrev64q_s16): Likewise.
18169 (vrev64q_s32): Likewise.
18170 (vcvtq_s16_f16): Likewise.
18171 (vcvtq_s32_f32): Likewise.
18172 (vrev64q_u8): Likewise.
18173 (vrev64q_u16): Likewise.
18174 (vrev64q_u32): Likewise.
18175 (vmvnq_n_u16): Likewise.
18176 (vmvnq_n_u32): Likewise.
18177 (vcvtq_u16_f16): Likewise.
18178 (vcvtq_u32_f32): Likewise.
18179 (__arm_vmvnq_n_s16): Define intrinsic.
18180 (__arm_vmvnq_n_s32): Likewise.
18181 (__arm_vrev64q_s8): Likewise.
18182 (__arm_vrev64q_s16): Likewise.
18183 (__arm_vrev64q_s32): Likewise.
18184 (__arm_vrev64q_u8): Likewise.
18185 (__arm_vrev64q_u16): Likewise.
18186 (__arm_vrev64q_u32): Likewise.
18187 (__arm_vmvnq_n_u16): Likewise.
18188 (__arm_vmvnq_n_u32): Likewise.
18189 (__arm_vcvtq_s16_f16): Likewise.
18190 (__arm_vcvtq_s32_f32): Likewise.
18191 (__arm_vcvtq_u16_f16): Likewise.
18192 (__arm_vcvtq_u32_f32): Likewise.
18193 (vrev64q): Define polymorphic variant.
18194 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
18195 (UNOP_SNONE_NONE): Likewise.
18196 (UNOP_SNONE_IMM): Likewise.
18197 (UNOP_UNONE_UNONE): Likewise.
18198 (UNOP_UNONE_NONE): Likewise.
18199 (UNOP_UNONE_IMM): Likewise.
18200 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
18201 (mve_vcvtq_from_f_<supf><mode>): Likewise.
18202 (mve_vmvnq_n_<supf><mode>): Likewise.
18204 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18205 Mihail Ionescu <mihail.ionescu@arm.com>
18206 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18208 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
18209 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
18210 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
18211 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
18212 (vrndxq_f32): Likewise.
18213 (vrndq_f16) Likewise.
18214 (vrndq_f32): Likewise.
18215 (vrndpq_f16): Likewise.
18216 (vrndpq_f32): Likewise.
18217 (vrndnq_f16): Likewise.
18218 (vrndnq_f32): Likewise.
18219 (vrndmq_f16): Likewise.
18220 (vrndmq_f32): Likewise.
18221 (vrndaq_f16): Likewise.
18222 (vrndaq_f32): Likewise.
18223 (vrev64q_f16): Likewise.
18224 (vrev64q_f32): Likewise.
18225 (vnegq_f16): Likewise.
18226 (vnegq_f32): Likewise.
18227 (vdupq_n_f16): Likewise.
18228 (vdupq_n_f32): Likewise.
18229 (vabsq_f16): Likewise.
18230 (vabsq_f32): Likewise.
18231 (vrev32q_f16): Likewise.
18232 (vcvttq_f32_f16): Likewise.
18233 (vcvtbq_f32_f16): Likewise.
18234 (vcvtq_f16_s16): Likewise.
18235 (vcvtq_f32_s32): Likewise.
18236 (vcvtq_f16_u16): Likewise.
18237 (vcvtq_f32_u32): Likewise.
18238 (__arm_vrndxq_f16): Define intrinsic.
18239 (__arm_vrndxq_f32): Likewise.
18240 (__arm_vrndq_f16): Likewise.
18241 (__arm_vrndq_f32): Likewise.
18242 (__arm_vrndpq_f16): Likewise.
18243 (__arm_vrndpq_f32): Likewise.
18244 (__arm_vrndnq_f16): Likewise.
18245 (__arm_vrndnq_f32): Likewise.
18246 (__arm_vrndmq_f16): Likewise.
18247 (__arm_vrndmq_f32): Likewise.
18248 (__arm_vrndaq_f16): Likewise.
18249 (__arm_vrndaq_f32): Likewise.
18250 (__arm_vrev64q_f16): Likewise.
18251 (__arm_vrev64q_f32): Likewise.
18252 (__arm_vnegq_f16): Likewise.
18253 (__arm_vnegq_f32): Likewise.
18254 (__arm_vdupq_n_f16): Likewise.
18255 (__arm_vdupq_n_f32): Likewise.
18256 (__arm_vabsq_f16): Likewise.
18257 (__arm_vabsq_f32): Likewise.
18258 (__arm_vrev32q_f16): Likewise.
18259 (__arm_vcvttq_f32_f16): Likewise.
18260 (__arm_vcvtbq_f32_f16): Likewise.
18261 (__arm_vcvtq_f16_s16): Likewise.
18262 (__arm_vcvtq_f32_s32): Likewise.
18263 (__arm_vcvtq_f16_u16): Likewise.
18264 (__arm_vcvtq_f32_u32): Likewise.
18265 (vrndxq): Define polymorphic variants.
18267 (vrndpq): Likewise.
18268 (vrndnq): Likewise.
18269 (vrndmq): Likewise.
18270 (vrndaq): Likewise.
18271 (vrev64q): Likewise.
18274 (vrev32q): Likewise.
18275 (vcvtbq_f32): Likewise.
18276 (vcvttq_f32): Likewise.
18278 * config/arm/arm_mve_builtins.def (VAR2): Define.
18280 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
18281 (mve_vrndq_f<mode>): Likewise.
18282 (mve_vrndpq_f<mode>): Likewise.
18283 (mve_vrndnq_f<mode>): Likewise.
18284 (mve_vrndmq_f<mode>): Likewise.
18285 (mve_vrndaq_f<mode>): Likewise.
18286 (mve_vrev64q_f<mode>): Likewise.
18287 (mve_vnegq_f<mode>): Likewise.
18288 (mve_vdupq_n_f<mode>): Likewise.
18289 (mve_vabsq_f<mode>): Likewise.
18290 (mve_vrev32q_fv8hf): Likewise.
18291 (mve_vcvttq_f32_f16v4sf): Likewise.
18292 (mve_vcvtbq_f32_f16v4sf): Likewise.
18293 (mve_vcvtq_to_f_<supf><mode>): Likewise.
18295 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18296 Mihail Ionescu <mihail.ionescu@arm.com>
18297 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18299 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
18301 (ARM_BUILTIN_MVE_PATTERN_START): Define.
18302 (arm_init_mve_builtins): Define function.
18303 (arm_init_builtins): Add TARGET_HAVE_MVE check.
18304 (arm_expand_builtin_1): Check the range of fcode.
18305 (arm_expand_mve_builtin): Define function to expand MVE builtins.
18306 (arm_expand_builtin): Check the range of fcode.
18307 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
18309 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
18310 (vst4q_s8): Define macro.
18311 (vst4q_s16): Likewise.
18312 (vst4q_s32): Likewise.
18313 (vst4q_u8): Likewise.
18314 (vst4q_u16): Likewise.
18315 (vst4q_u32): Likewise.
18316 (vst4q_f16): Likewise.
18317 (vst4q_f32): Likewise.
18318 (__arm_vst4q_s8): Define inline builtin.
18319 (__arm_vst4q_s16): Likewise.
18320 (__arm_vst4q_s32): Likewise.
18321 (__arm_vst4q_u8): Likewise.
18322 (__arm_vst4q_u16): Likewise.
18323 (__arm_vst4q_u32): Likewise.
18324 (__arm_vst4q_f16): Likewise.
18325 (__arm_vst4q_f32): Likewise.
18326 (__ARM_mve_typeid): Define macro with MVE types.
18327 (__ARM_mve_coerce): Define macro with _Generic feature.
18328 (vst4q): Define polymorphic variant for different vst4q builtins.
18329 * config/arm/arm_mve_builtins.def: New file.
18330 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
18332 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
18333 (unspec): Define unspec.
18334 (mve_vst4q<mode>): Define RTL pattern.
18335 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
18337 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
18339 (define_split): Allow OI mode split for MVE after reload.
18340 (define_split): Allow XI mode split for MVE after reload.
18341 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
18342 (arm-builtins.o): Likewise.
18344 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
18346 * c-typeck.c (process_init_element): Handle constructor_type with
18347 type size represented by POLY_INT_CST.
18349 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18351 PR tree-optimization/94187
18352 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
18353 nchars - offset < nbytes.
18355 PR middle-end/94189
18356 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
18357 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
18358 for code-generation.
18360 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
18363 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
18364 after changing memory subreg.
18366 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18367 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18369 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
18370 emulator calls for dobule precision arithmetic operations for MVE.
18372 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18373 Mihail Ionescu <mihail.ionescu@arm.com>
18374 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18376 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
18377 feature bit is on and -mfpu=auto is passed as compiler option, do not
18378 generate error on not finding any matching fpu. Because in this case
18379 fpu is not required.
18380 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
18381 enabled for MVE and also for all VFP extensions.
18382 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
18384 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
18385 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
18386 along with feature bits mve_float.
18387 (mve): Modify add options in armv8.1-m.main arch for MVE.
18388 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
18390 * config/arm/arm.c (use_return_insn): Replace the
18391 check with TARGET_VFP_BASE.
18392 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
18394 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
18395 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
18397 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
18398 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
18400 (arm_compute_frame_layout): Likewise.
18401 (arm_save_coproc_regs): Likewise.
18402 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
18404 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
18405 with equivalent macro TARGET_VFP_BASE.
18406 (arm_expand_epilogue_apcs_frame): Likewise.
18407 (arm_expand_epilogue): Likewise.
18408 (arm_conditional_register_usage): Likewise.
18409 (arm_declare_function_name): Add check to skip printing .fpu directive
18410 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
18412 * config/arm/arm.h (TARGET_VFP_BASE): Define.
18413 * config/arm/arm.md (arch): Add "mve" to arch.
18414 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
18415 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
18416 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
18417 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
18419 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
18420 to not allow for MVE.
18421 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
18423 (VUNSPEC_GET_FPSCR): Define.
18424 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
18425 instructions which move to general-purpose Register from Floating-point
18426 Special register and vice-versa.
18427 (thumb2_movhi_fp16): Likewise.
18428 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
18429 with MCR and MRC instructions which set and get Floating-point Status
18430 and Control Register (FPSCR).
18431 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
18433 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
18434 float move patterns in MVE.
18435 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
18436 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
18437 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
18438 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
18439 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
18440 TARGET_VFP_BASE check.
18441 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
18442 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
18444 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
18445 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
18449 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18450 Mihail Ionescu <mihail.ionescu@arm.com>
18451 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18453 * config.gcc (arm_mve.h): Include mve intrinsics header file.
18454 * config/arm/aout.h (p0): Add new register name for MVE predicated
18456 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
18457 common to Neon and MVE.
18458 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
18459 (arm_init_simd_builtin_types): Disable poly types for MVE.
18460 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
18461 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
18462 ARM_BUILTIN_NEON_LANE_CHECK.
18463 (mve_dereference_pointer): Add function.
18464 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
18466 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
18467 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
18468 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
18469 with floating point enabled.
18470 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
18471 simd_immediate_valid_for_move.
18472 (simd_immediate_valid_for_move): Renamed from
18473 neon_immediate_valid_for_move function.
18474 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
18475 error if vfpv2 feature bit is disabled and mve feature bit is also
18476 disabled for HARD_FLOAT_ABI.
18477 (use_return_insn): Check to not push VFP regs for MVE.
18478 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
18480 (aapcs_vfp_allocate_return_reg): Likewise.
18481 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
18482 address operand for MVE.
18483 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
18484 (neon_valid_immediate): Rename to simd_valid_immediate.
18485 (simd_valid_immediate): Rename from neon_valid_immediate.
18486 (simd_valid_immediate): MVE check on size of vector is 128 bits.
18487 (neon_immediate_valid_for_move): Rename to
18488 simd_immediate_valid_for_move.
18489 (simd_immediate_valid_for_move): Rename from
18490 neon_immediate_valid_for_move.
18491 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
18493 (neon_make_constant): Modify call to neon_valid_immediate function.
18494 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
18496 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
18497 (arm_compute_frame_layout): Calculate space for saved VFP registers for
18499 (arm_save_coproc_regs): Save coproc registers for MVE.
18500 (arm_print_operand): Add case 'E' to print memory operands for MVE.
18501 (arm_print_operand_address): Check to print register number for MVE.
18502 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
18503 (arm_modes_tieable_p): Check to allow structure mode for MVE.
18504 (arm_regno_class): Add VPR_REGNUM check.
18505 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
18507 (arm_expand_epilogue): MVE check for enabling pop instructions in
18509 (arm_print_asm_arch_directives): Modify function to disable print of
18510 .arch_extension "mve" and "fp" for cases where MVE is enabled with
18512 (arm_vector_mode_supported_p): Check for modes available in MVE interger
18513 and MVE floating point.
18514 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
18516 (arm_conditional_register_usage): Enable usage of conditional regsiter
18518 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
18519 (arm_declare_function_name): Modify function to disable print of
18520 .arch_extension "mve" and "fp" for cases where MVE is enabled with
18522 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
18523 when target general registers are required.
18524 (TARGET_HAVE_MVE_FLOAT): Likewise.
18525 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
18527 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
18528 which indicate this is not available for across function calls.
18529 (FIRST_PSEUDO_REGISTER): Modify.
18530 (VALID_MVE_MODE): Define valid MVE mode.
18531 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
18532 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
18533 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
18534 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
18536 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
18537 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
18538 (enum reg_class): Add VPR_REG entry.
18539 (REG_CLASS_NAMES): Add VPR_REG entry.
18540 * config/arm/arm.md (VPR_REGNUM): Define.
18541 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
18542 "unconditional" instructions.
18543 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
18544 (movdf_soft_insn): Modify RTL to not allow for MVE.
18545 (vfp_pop_multiple_with_writeback): Enable for MVE.
18546 (include "mve.md"): Include mve.md file.
18547 * config/arm/arm_mve.h: Add MVE intrinsics head file.
18548 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
18549 for vector predicated operands.
18550 * config/arm/iterators.md (VNIM1): Define.
18551 (VNINOTM1): Define.
18552 (VHFBF_split): Define
18553 * config/arm/mve.md: New file.
18554 (mve_mov<mode>): Define RTL for move, store and load in MVE.
18555 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
18557 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
18558 simd_immediate_valid_for_move.
18559 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
18560 is common to MVE and NEON to vec-common.md file.
18561 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
18562 * config/arm/predicates.md (vpr_register_operand): Define.
18563 * config/arm/t-arm: Add mve.md file.
18564 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
18566 (mve_store): Add MVE instructions mve_store to attribute "type".
18567 (mve_load): Add MVE instructions mve_load to attribute "type".
18568 (is_mve_type): Define attribute.
18569 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
18570 standard move patterns in MVE along with NEON and IWMMXT with mode
18572 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
18573 and IWMMXT with mode iterator V8HF.
18574 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
18576 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
18577 simd_immediate_valid_for_move.
18580 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
18583 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
18584 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
18586 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
18588 2020-03-16 Jakub Jelinek <jakub@redhat.com>
18591 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
18594 PR tree-optimization/94166
18595 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
18596 as secondary comparison key.
18598 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
18600 PR tree-optimization/94125
18601 * tree-loop-distribution.c
18602 (loop_distribution::break_alias_scc_partitions): Update post order
18603 number for merged scc.
18605 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
18608 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
18610 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
18611 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
18612 and ext_sse_reg_operand check.
18614 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
18616 * common.opt: Avoid redundancy in the help text.
18617 * config/arc/arc.opt: Likewise.
18618 * config/cr16/cr16.opt: Likewise.
18620 2020-03-14 Jakub Jelinek <jakub@redhat.com>
18622 PR middle-end/93566
18623 * tree-nested.c (convert_nonlocal_omp_clauses,
18624 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
18625 with C/C++ array sections.
18627 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
18630 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
18631 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
18634 2020-03-14 Jakub Jelinek <jakub@redhat.com>
18636 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
18637 "a an" to "an" in a comment.
18638 * hsa-common.h (is_a_helper): Likewise.
18639 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
18640 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
18641 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
18643 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
18646 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
18647 64-bit value by 64 bits (UB).
18649 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
18651 PR rtl-optimization/92303
18652 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
18654 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
18656 PR rtl-optimization/94148
18657 PR rtl-optimization/94042
18658 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
18659 (df_worklist_propagate_forward): New parameter last_change_age, use
18660 that instead of bb->aux.
18661 (df_worklist_propagate_backward): Ditto.
18662 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
18664 2020-03-13 Richard Biener <rguenther@suse.de>
18666 PR tree-optimization/94163
18667 * tree-ssa-pre.c (create_expression_by_pieces): Check
18668 whether alignment would be zero.
18670 2020-03-13 Martin Liska <mliska@suse.cz>
18673 * lto-wrapper.c (run_gcc): Use concat for appending
18674 to collect_gcc_options.
18676 2020-03-13 Jakub Jelinek <jakub@redhat.com>
18679 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
18680 instead of GEN_INT.
18682 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
18685 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
18686 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
18687 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
18688 TARGET_AVX512VL and ext_sse_reg_operand check.
18690 2020-03-13 Bu Le <bule1@huawei.com>
18693 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
18694 (-param=aarch64-double-recp-precision=): New options.
18695 * doc/invoke.texi: Document them.
18696 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
18697 instead of hard-coding the choice of 1 for float and 2 for double.
18699 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
18701 PR rtl-optimization/94119
18702 * resource.h (clear_hashed_info_until_next_barrier): Declare.
18703 * resource.c (clear_hashed_info_until_next_barrier): New function.
18704 * reorg.c (add_to_delay_list): Fix formatting.
18705 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
18706 the next instruction after removing a BARRIER.
18708 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
18710 PR middle-end/92071
18711 * expmed.c (store_integral_bit_field): For fields larger than a word,
18712 call extract_bit_field on the value if the mode is BLKmode. Remove
18713 specific path for big-endian targets and tidy things up a little bit.
18715 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
18717 PR rtl-optimization/90275
18718 * cse.c (cse_insn): Delete no-op register moves too.
18720 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
18722 * config/rx/rx.md (CTRLREG_CPEN): Remove.
18723 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
18725 2020-03-12 Richard Biener <rguenther@suse.de>
18727 PR tree-optimization/94103
18728 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
18729 punning when the mode precision is not sufficient.
18731 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
18734 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
18735 MODE_V1DF and MODE_V2SF.
18736 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
18737 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
18740 2020-03-12 Jakub Jelinek <jakub@redhat.com>
18742 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
18743 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
18744 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
18745 * doc/tm.texi: Regenerated.
18747 PR tree-optimization/94130
18748 * tree-ssa-dse.c: Include gimplify.h.
18749 (increment_start_addr): If stmt has lhs, drop the lhs from call and
18750 set it after the call to the original value of the first argument.
18752 (decrement_count): Formatting fix.
18754 2020-03-11 Delia Burduv <delia.burduv@arm.com>
18756 * config/arm/arm-builtins.c
18757 (arm_init_simd_builtin_scalar_types): New.
18758 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
18759 (vld2q_bf16): Used new builtin type.
18760 (vld3_bf16): Used new builtin type.
18761 (vld3q_bf16): Used new builtin type.
18762 (vld4_bf16): Used new builtin type.
18763 (vld4q_bf16): Used new builtin type.
18764 (vld2_dup_bf16): Used new builtin type.
18765 (vld2q_dup_bf16): Used new builtin type.
18766 (vld3_dup_bf16): Used new builtin type.
18767 (vld3q_dup_bf16): Used new builtin type.
18768 (vld4_dup_bf16): Used new builtin type.
18769 (vld4q_dup_bf16): Used new builtin type.
18771 2020-03-11 Jakub Jelinek <jakub@redhat.com>
18774 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
18775 at the start to switch to data section. Don't print extra newline if
18776 .globl directive has not been emitted.
18778 2020-03-11 Richard Biener <rguenther@suse.de>
18780 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
18783 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
18785 PR middle-end/93961
18786 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
18787 whose type is a qualified union.
18789 2020-03-11 Jakub Jelinek <jakub@redhat.com>
18792 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
18793 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
18796 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
18798 (get_nth_most_common_value): Use abs_hwi instead of abs.
18800 PR middle-end/94111
18801 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
18802 is rvc_normal, otherwise use real_to_decimal to print the number to
18805 PR tree-optimization/94114
18806 * tree-loop-distribution.c (generate_memset_builtin): Call
18807 rewrite_to_non_trapping_overflow even on mem.
18808 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
18811 2020-03-10 Jeff Law <law@redhat.com>
18813 * config/bfin/bfin.md (movsi_insv): Add length attribute.
18815 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
18818 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
18819 NAN and SIGNED_ZEROR for smax/smin.
18821 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
18824 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
18825 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
18827 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
18829 * loop-iv.c (find_simple_exit): Make it static.
18830 * cfgloop.h: Remove the corresponding prototype.
18832 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
18834 * ddg.c (create_ddg): Fix intendation.
18835 (set_recurrence_length): Likewise.
18836 (create_ddg_all_sccs): Likewise.
18838 2020-03-10 Jakub Jelinek <jakub@redhat.com>
18841 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
18842 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
18845 2020-03-09 Jason Merrill <jason@redhat.com>
18847 * gdbinit.in (pgs): Fix typo in documentation.
18849 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
18853 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
18855 PR rtl-optimization/93564
18856 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
18857 do not honor reg alloc order.
18859 2020-03-09 Andrew Pinski <apinski@marvell.com>
18861 PR inline-asm/94095
18862 * doc/extend.texi (x86 Operand Modifiers): Fix column
18865 2020-03-09 Martin Liska <mliska@suse.cz>
18868 * config/rs6000/rs6000.c (rs6000_option_override_internal):
18869 Remove set of str_align_loops and str_align_jumps as these
18870 should be set in previous 2 conditions in the function.
18872 2020-03-09 Jakub Jelinek <jakub@redhat.com>
18874 PR rtl-optimization/94045
18875 * params.opt (-param=max-find-base-term-values=): New option.
18876 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
18877 in a single toplevel find_base_term call.
18879 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
18882 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
18883 * config/aarch64/aarch64-simd.md
18884 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
18885 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
18886 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
18887 * config/aarch64/arm_neon.h:
18888 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
18889 (vmlal_lane_u16): Likewise.
18890 (vmlal_lane_s32): Likewise.
18891 (vmlal_lane_u32): Likewise.
18892 (vmlal_laneq_s16): Likewise.
18893 (vmlal_laneq_u16): Likewise.
18894 (vmlal_laneq_s32): Likewise.
18895 (vmlal_laneq_u32): Likewise.
18896 (vmull_lane_s16): Likewise.
18897 (vmull_lane_u16): Likewise.
18898 (vmull_lane_s32): Likewise.
18899 (vmull_lane_u32): Likewise.
18900 (vmull_laneq_s16): Likewise.
18901 (vmull_laneq_u16): Likewise.
18902 (vmull_laneq_s32): Likewise.
18903 (vmull_laneq_u32): Likewise.
18904 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
18907 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
18909 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
18910 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
18911 (aarch64_mls_elt<mode>): Likewise.
18912 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
18913 (aarch64_fma4_elt<mode>): Likewise.
18914 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
18915 (aarch64_fma4_elt_to_64v2df): Likewise.
18916 (aarch64_fnma4_elt<mode>): Likewise.
18917 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
18918 (aarch64_fnma4_elt_to_64v2df): Likewise.
18920 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18922 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
18923 Specify movprfx attribute.
18924 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
18926 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
18929 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
18931 (TARGET_NO_FP_IN_TOC): Same.
18932 * config/rs6000/aix71.h: Same.
18933 * config/rs6000/aix72.h: Same.
18935 2020-03-06 Andrew Pinski <apinski@marvell.com>
18936 Jeff Law <law@redhat.com>
18938 PR rtl-optimization/93996
18939 * haifa-sched.c (remove_notes): Be more careful when adding
18942 2020-03-06 Delia Burduv <delia.burduv@arm.com>
18944 * config/arm/arm_neon.h (vld2_bf16): New.
18950 (vld2_dup_bf16): New.
18951 (vld2q_dup_bf16): New.
18952 (vld3_dup_bf16): New.
18953 (vld3q_dup_bf16): New.
18954 (vld4_dup_bf16): New.
18955 (vld4q_dup_bf16): New.
18956 * config/arm/arm_neon_builtins.def
18957 (vld2): Changed to VAR13 and added v4bf, v8bf
18958 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
18959 (vld3): Changed to VAR13 and added v4bf, v8bf
18960 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
18961 (vld4): Changed to VAR13 and added v4bf, v8bf
18962 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
18963 * config/arm/iterators.md (VDXBF2): New iterator.
18964 *config/arm/neon.md (neon_vld2): Use new iterators.
18965 (neon_vld2_dup<mode): Use new iterators.
18966 (neon_vld3<mode>): Likewise.
18967 (neon_vld3qa<mode>): Likewise.
18968 (neon_vld3qb<mode>): Likewise.
18969 (neon_vld3_dup<mode>): Likewise.
18970 (neon_vld4<mode>): Likewise.
18971 (neon_vld4qa<mode>): Likewise.
18972 (neon_vld4qb<mode>): Likewise.
18973 (neon_vld4_dup<mode>): Likewise.
18974 (neon_vld2_dupv8bf): New.
18975 (neon_vld3_dupv8bf): Likewise.
18976 (neon_vld4_dupv8bf): Likewise.
18978 2020-03-06 Delia Burduv <delia.burduv@arm.com>
18980 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
18981 (bfloat16x8x2_t): New typedef.
18982 (bfloat16x4x3_t): New typedef.
18983 (bfloat16x8x3_t): New typedef.
18984 (bfloat16x4x4_t): New typedef.
18985 (bfloat16x8x4_t): New typedef.
18992 * config/arm/arm-builtins.c (v2bf_UP): Define.
18994 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
18995 * config/arm/arm-modes.def (V2BF): New mode.
18996 * config/arm/arm-simd-builtin-types.def
18997 (Bfloat16x2_t): New entry.
18998 * config/arm/arm_neon_builtins.def
18999 (vst2): Changed to VAR13 and added v4bf, v8bf
19000 (vst3): Changed to VAR13 and added v4bf, v8bf
19001 (vst4): Changed to VAR13 and added v4bf, v8bf
19002 * config/arm/iterators.md (VDXBF): New iterator.
19003 (VQ2BF): New iterator.
19004 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
19005 (neon_vst2<mode>): Used new iterators.
19006 (neon_vst3<mode>): Used new iterators.
19007 (neon_vst3<mode>): Used new iterators.
19008 (neon_vst3qa<mode>): Used new iterators.
19009 (neon_vst3qb<mode>): Used new iterators.
19010 (neon_vst4<mode>): Used new iterators.
19011 (neon_vst4<mode>): Used new iterators.
19012 (neon_vst4qa<mode>): Used new iterators.
19013 (neon_vst4qb<mode>): Used new iterators.
19015 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19017 * config/aarch64/aarch64-simd-builtins.def
19018 (bfcvtn): New built-in function.
19019 (bfcvtn_q): New built-in function.
19020 (bfcvtn2): New built-in function.
19021 (bfcvt): New built-in function.
19022 * config/aarch64/aarch64-simd.md
19023 (aarch64_bfcvtn<q><mode>): New pattern.
19024 (aarch64_bfcvtn2v8bf): New pattern.
19025 (aarch64_bfcvtbf): New pattern.
19026 * config/aarch64/arm_bf16.h (float32_t): New typedef.
19027 (vcvth_bf16_f32): New intrinsic.
19028 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
19029 (vcvtq_low_bf16_f32): New intrinsic.
19030 (vcvtq_high_bf16_f32): New intrinsic.
19031 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
19032 (UNSPEC_BFCVTN): New UNSPEC.
19033 (UNSPEC_BFCVTN2): New UNSPEC.
19034 (UNSPEC_BFCVT): New UNSPEC.
19035 * config/arm/types.md (bf_cvt): New type.
19037 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
19039 * config/s390/s390.md ("tabort"): Get rid of two consecutive
19040 blanks in format string.
19042 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
19046 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
19047 * config/i386/i386.c (ix86_get_ssemov): New function.
19048 (ix86_output_ssemov): Likewise.
19049 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
19050 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
19052 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
19053 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
19054 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
19055 (*movti_internal): Likewise.
19056 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
19058 2020-03-05 Jeff Law <law@redhat.com>
19060 PR tree-optimization/91890
19061 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
19062 Use gimple_or_expr_nonartificial_location.
19063 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
19064 Use gimple_or_expr_nonartificial_location.
19065 * gimple.c (gimple_or_expr_nonartificial_location): New function.
19066 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
19067 * tree-ssa-strlen.c (maybe_warn_overflow): Use
19068 gimple_or_expr_nonartificial_location.
19069 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
19070 (maybe_warn_pointless_strcmp): Likewise.
19072 2020-03-05 Jakub Jelinek <jakub@redhat.com>
19075 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
19076 SRC and MASK arguments to __m128 from __m128d.
19077 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
19079 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
19081 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
19082 argument to __m128i from __m128d.
19083 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
19085 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
19086 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
19089 2020-03-05 Delia Burduv <delia.burduv@arm.com>
19091 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
19092 (vbfmlalbq_f32): New.
19093 (vbfmlaltq_f32): New.
19094 (vbfmlalbq_lane_f32): New.
19095 (vbfmlaltq_lane_f32): New.
19096 (vbfmlalbq_laneq_f32): New.
19097 (vbfmlaltq_laneq_f32): New.
19098 * config/arm/arm_neon_builtins.def (vmmla): New.
19103 (vfmab_laneq): New.
19104 (vfmat_laneq): New.
19105 * config/arm/iterators.md (BF_MA): New int iterator.
19106 (bt): New int attribute.
19107 (VQXBF): Copy of VQX with V8BF.
19108 * config/arm/neon.md (neon_vmmlav8bf): New insn.
19109 (neon_vfma<bt>v8bf): New insn.
19110 (neon_vfma<bt>_lanev8bf): New insn.
19111 (neon_vfma<bt>_laneqv8bf): New expand.
19112 (neon_vget_high<mode>): Changed iterator to VQXBF.
19113 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
19114 (UNSPEC_BFMAB): New UNSPEC.
19115 (UNSPEC_BFMAT): New UNSPEC.
19117 2020-03-05 Jakub Jelinek <jakub@redhat.com>
19119 PR middle-end/93399
19120 * tree-pretty-print.h (pretty_print_string): Declare.
19121 * tree-pretty-print.c (pretty_print_string): Remove forward
19122 declaration, no longer static. Change nbytes parameter type
19123 from unsigned to size_t.
19124 * print-rtl.c (print_value) <case CONST_STRING>: Use
19125 pretty_print_string and for shrink way too long strings.
19127 2020-03-05 Richard Biener <rguenther@suse.de>
19128 Jakub Jelinek <jakub@redhat.com>
19130 PR tree-optimization/93582
19131 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
19132 last operand as signed when looking for memset offset. Formatting
19135 2020-03-04 Andrew Pinski <apinski@marvell.com>
19138 * value-prof.c (dump_histogram_value): Use std::abs.
19140 2020-03-04 Martin Sebor <msebor@redhat.com>
19142 PR tree-optimization/93986
19143 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
19144 operands to the same precision widest_int to avoid ICEs.
19146 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
19149 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
19150 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
19151 for OPTION_MASK_ALTIVEC.
19153 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19155 * config.gcc: Include the glibc-stdint.h header for zTPF.
19157 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19159 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
19160 direct FPR-GPR copies.
19161 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
19164 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19166 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
19167 operands to the prologue_tpf expander.
19168 (s390_emit_epilogue): Likewise.
19169 (s390_option_override_internal): Do error checking and setup for
19171 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
19172 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
19173 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
19174 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
19175 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
19176 operands for the check flag and the branch target.
19177 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
19178 ("mtpf-trace-hook-prologue-target")
19179 ("mtpf-trace-hook-epilogue-check")
19180 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
19182 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
19183 options are for debugging purposes and will not be documented
19186 2020-03-04 Jakub Jelinek <jakub@redhat.com>
19189 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
19191 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
19192 argument. Change pd argument so that it can be modified. Turn
19193 constant non-CONSTRUCTOR store into non-constant if it is too large.
19194 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
19196 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
19199 2020-02-04 Richard Biener <rguenther@suse.de>
19201 PR tree-optimization/93964
19202 * graphite-isl-ast-to-gimple.c
19203 (gcc_expression_from_isl_ast_expr_id): Add intermediate
19204 conversion for pointer to integer converts.
19205 * graphite-scop-detection.c (assign_parameter_index_in_region):
19208 2020-03-04 Martin Liska <mliska@suse.cz>
19212 * doc/invoke.texi: Clarify --help=language and --help=common
19215 2020-03-04 Jakub Jelinek <jakub@redhat.com>
19217 PR tree-optimization/94001
19218 * tree-tailcall.c (process_assignment): Before comparing op1 to
19219 *ass_var, verify *ass_var is non-NULL.
19221 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
19224 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
19227 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
19229 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
19230 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
19231 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
19232 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
19233 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
19234 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
19235 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
19236 (V_bf_low, V_bf_cvt_m): New mode attributes.
19237 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
19238 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
19239 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
19240 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
19241 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
19243 2020-03-03 Jakub Jelinek <jakub@redhat.com>
19245 PR tree-optimization/93582
19246 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
19247 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
19248 members, initialize them in the constructor and if mask is non-NULL,
19249 artificially push_partial_def {} for the portions of the mask that
19251 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
19252 val and return (void *)-1. Formatting fix.
19253 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
19255 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
19256 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
19258 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
19260 (visit_stmt): Formatting fix.
19262 2020-03-03 Richard Biener <rguenther@suse.de>
19264 PR tree-optimization/93946
19265 * alias.h (refs_same_for_tbaa_p): Declare.
19266 * alias.c (refs_same_for_tbaa_p): New function.
19267 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
19269 * tree-ssa-scopedtables.h
19270 (avail_exprs_stack::lookup_avail_expr): Add output argument
19271 giving access to the hashtable entry.
19272 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
19274 * tree-ssa-dom.c: Include alias.h.
19275 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
19276 removing redundant store.
19277 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
19278 (ao_ref_init_from_vn_reference): Adjust prototype.
19279 (vn_reference_lookup_pieces): Likewise.
19280 (vn_reference_insert_pieces): Likewise.
19281 * tree-ssa-sccvn.c: Track base alias set in addition to alias
19283 (eliminate_dom_walker::eliminate_stmt): Also check base alias
19284 set when removing redundant stores.
19285 (visit_reference_op_store): Likewise.
19286 * dse.c (record_store): Adjust valdity check for redundant
19289 2020-03-03 Jakub Jelinek <jakub@redhat.com>
19292 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
19294 PR rtl-optimization/94002
19295 * explow.c (plus_constant): Punt if cst has VOIDmode and
19296 get_pool_mode is different from mode.
19298 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19300 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
19301 address has an offset which fits the scalling constraint for a
19302 load/store operation.
19303 (legitimate_scaled_address_p): Update use
19304 leigitimate_small_data_address_p.
19305 (arc_print_operand): Likewise.
19306 (arc_legitimate_address_p): Likewise.
19307 (legitimate_small_data_address_p): Likewise.
19309 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19311 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
19312 (fnmasf4_fpu): Likewise.
19314 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19316 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
19318 (subdi3): Likewise.
19319 (adddi3_i): Remove pattern.
19320 (subdi3_i): Likewise.
19322 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19324 * config/arc/arc.md (eh_return): Add length info.
19326 2020-03-02 David Malcolm <dmalcolm@redhat.com>
19328 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
19330 2020-03-02 David Malcolm <dmalcolm@redhat.com>
19332 * doc/invoke.texi (Static Analyzer Options): Add
19333 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
19336 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
19339 * config/i386/i386.md (movstrict<mode>): Allow only
19340 registers with VALID_INT_MODE_P modes.
19342 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
19344 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
19345 (reduc_insn): Use 'U' and 'B' operand codes.
19346 (reduc_<reduc_op>_scal_<mode>): Allow all types.
19347 (reduc_<reduc_op>_scal_v64di): Delete.
19348 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
19349 (*plus_carry_dpp_shr_v64si): Change to ...
19350 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
19351 (mov_from_lane63_v64di): Change to ...
19352 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
19353 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
19354 Support UNSPEC_MOV_DPP_SHR output formats.
19355 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
19356 Add "use_extends" reductions.
19357 (print_operand_address): Add 'I' and 'U' codes.
19358 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
19360 2020-03-02 Martin Liska <mliska@suse.cz>
19362 * lto-wrapper.c: Fix typo in comment about
19363 C++ standard version.
19365 2020-03-01 Martin Sebor <msebor@redhat.com>
19368 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
19370 2020-03-01 Martin Sebor <msebor@redhat.com>
19372 PR middle-end/93829
19373 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
19374 of a pointer in the outermost ADDR_EXPRs.
19376 2020-02-28 Jeff Law <law@redhat.com>
19378 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
19379 * config/v850/v850.c (v850_asm_trampoline_template): Update
19382 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
19385 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
19388 2020-02-28 Martin Liska <mliska@suse.cz>
19391 * configure.ac: Improve detection of ld_date by requiring
19392 either two dashes or none.
19393 * configure: Regenerate.
19395 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
19397 PR rtl-optimization/93564
19398 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
19399 do not honor reg alloc order.
19401 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
19404 * config/aarch64/aarch64.c (aarch64_override_options): Fix
19405 misleading warning string.
19407 2020-02-27 Martin Sebor <msebor@redhat.com>
19409 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
19411 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
19414 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
19415 Split the insn into two parts. This insn only does variable
19416 extract from a register.
19417 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
19418 variable extract from memory.
19419 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
19420 only does variable extract from a register.
19421 (vsx_extract_v4sf_var_load): New insn, do variable extract from
19423 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
19424 into two parts. This insn only does variable extract from a
19426 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
19427 do variable extract from memory.
19429 2020-02-27 Martin Jambor <mjambor@suse.cz>
19430 Feng Xue <fxue@os.amperecomputing.com>
19433 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
19434 new function calls_same_node_or_its_all_contexts_clone_p.
19435 (cgraph_edge_brings_value_p): Use it.
19436 (cgraph_edge_brings_value_p): Likewise.
19437 (self_recursive_pass_through_p): Return false if caller is a clone.
19438 (self_recursive_agg_pass_through_p): Likewise.
19440 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
19442 PR middle-end/92152
19443 * alias.c (ends_tbaa_access_path_p): Break out from ...
19444 (component_uses_parent_alias_set_from): ... here.
19445 * alias.h (ends_tbaa_access_path_p): Declare.
19446 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
19447 handle trailing arrays past end of tbaa access path.
19448 (aliasing_component_refs_p): ... here; likewise.
19449 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
19450 path; disambiguate also past end of it.
19451 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
19454 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
19456 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
19457 beginning of the file.
19458 (vcreate_bf16, vcombine_bf16): New.
19459 (vdup_n_bf16, vdupq_n_bf16): New.
19460 (vdup_lane_bf16, vdup_laneq_bf16): New.
19461 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
19462 (vduph_lane_bf16, vduph_laneq_bf16): New.
19463 (vset_lane_bf16, vsetq_lane_bf16): New.
19464 (vget_lane_bf16, vgetq_lane_bf16): New.
19465 (vget_high_bf16, vget_low_bf16): New.
19466 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
19467 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
19468 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
19469 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
19470 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
19471 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
19472 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
19473 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
19474 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
19475 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
19476 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
19477 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
19478 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
19479 (vreinterpretq_bf16_p128): New.
19480 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
19481 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
19482 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
19483 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
19484 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
19485 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
19486 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
19487 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
19488 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
19489 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
19490 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
19491 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
19492 (vreinterpretq_p128_bf16): New.
19493 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
19494 (V_elem): Likewise.
19495 (V_elem_l): Likewise.
19496 (VD_LANE): Likewise.
19498 (V_DOUBLE): Likewise.
19499 (VDQX): Add V4BF and V8BF.
19500 (V_two_elem, V_three_elem, V_four_elem): Likewise.
19502 (V_HALF): Likewise.
19503 (V_double_vector_mode): Likewise.
19504 (V_cmp_result): Likewise.
19505 (V_uf_sclr): Likewise.
19506 (V_sz_elem): Likewise.
19507 (Is_d_reg): Likewise.
19508 (V_mode_nunits): Likewise.
19509 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
19511 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
19513 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
19514 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
19515 (<expander><mode>3<exec>): Likewise.
19516 (<expander><mode>3): New.
19517 (v<expander><mode>3): New.
19518 (<expander><mode>3): New.
19519 (<expander><mode>3<exec>): Rename to ...
19520 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
19521 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
19523 2020-02-27 Alexandre Oliva <oliva@adacore.com>
19525 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
19528 2020-02-27 Richard Biener <rguenther@suse.de>
19530 PR tree-optimization/93508
19531 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
19532 non-_CHK variants. Valueize their length arguments.
19534 2020-02-27 Richard Biener <rguenther@suse.de>
19536 PR tree-optimization/93953
19537 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
19538 to the hash-map entry.
19540 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
19542 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
19544 2020-02-27 Mark Williams <mwilliams@fb.com>
19546 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
19547 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
19548 -ffile-prefix-map and -fmacro-prefix-map.
19549 * lto-streamer-out.c: Include file-prefix-map.h.
19550 (lto_output_location): Remap the file part of locations.
19552 2020-02-27 Jakub Jelinek <jakub@redhat.com>
19555 * gimplify.c (gimplify_init_constructor): Don't promote readonly
19556 DECL_REGISTER variables to TREE_STATIC.
19558 PR tree-optimization/93582
19559 PR tree-optimization/93945
19560 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
19561 non-zero INTEGER_CST second argument and ref->offset or ref->size
19562 not a multiple of BITS_PER_UNIT.
19564 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
19566 * doc/install.texi (Binaries): Update description of BullFreeware.
19568 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
19572 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
19573 C++ Language Options, Warning Options, and Static Analyzer
19574 Options lists. Document negative form of options enabled by
19575 default. Move some things around to more accurately sort
19576 warnings by category.
19577 (C++ Dialect Options, Warning Options, Static Analyzer
19578 Options): Document negative form of options when enabled by
19579 default. Move some things around to more accurately sort
19580 warnings by category. Add some missing index entries.
19581 Light copy-editing.
19583 2020-02-26 Carl Love <cel@us.ibm.com>
19586 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
19587 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
19588 for the vector unsigned short arguments. It is also listed as the
19589 name of the built-in for arguments vector unsigned short,
19590 vector unsigned int and vector unsigned long long built-ins. The
19591 name of the builtins for these arguments should be:
19592 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
19593 __builtin_crypto_vpmsumd respectively.
19595 2020-02-26 Richard Biener <rguenther@suse.de>
19597 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
19598 and load permutation.
19600 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
19602 PR middle-end/93843
19603 * optabs-tree.c (supportable_convert_operation): Reject types with
19606 2020-02-26 David Malcolm <dmalcolm@redhat.com>
19608 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
19610 2020-02-26 Jakub Jelinek <jakub@redhat.com>
19612 PR tree-optimization/93820
19613 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
19614 argument to ALL_INTEGER_CST_P boolean.
19615 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
19616 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
19617 adjacent INTEGER_CST store into merged_store->only_constants like
19620 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19623 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
19625 * cfghooks.c (verify_flow_info): Likewise.
19626 * predict.c (combine_predictions_for_bb): Likewise.
19627 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
19628 sucessor -> successor.
19629 (find_traces_1_round): Fix comment typo, destinarion -> destination.
19630 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
19632 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
19633 message typo, sucessors -> successors.
19635 2020-02-25 Martin Sebor <msebor@redhat.com>
19637 * doc/extend.texi (attribute access): Correct an example.
19639 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
19641 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
19643 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
19644 (VAR15, VAR16): New.
19645 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
19646 (VD): Enable for V4BF.
19648 (VQ): Enable for V8BF.
19650 (VQ_NO2E): Likewise.
19651 (VDBL, Vdbl): Add V4BF.
19652 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
19653 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
19654 (bfloat16x8x2_t): Likewise.
19655 (bfloat16x4x3_t): Likewise.
19656 (bfloat16x8x3_t): Likewise.
19657 (bfloat16x4x4_t): Likewise.
19658 (bfloat16x8x4_t): Likewise.
19659 (vcombine_bf16): New.
19660 (vld1_bf16, vld1_bf16_x2): New.
19661 (vld1_bf16_x3, vld1_bf16_x4): New.
19662 (vld1q_bf16, vld1q_bf16_x2): New.
19663 (vld1q_bf16_x3, vld1q_bf16_x4): New.
19664 (vld1_lane_bf16): New.
19665 (vld1q_lane_bf16): New.
19666 (vld1_dup_bf16): New.
19667 (vld1q_dup_bf16): New.
19670 (vld2_dup_bf16): New.
19671 (vld2q_dup_bf16): New.
19674 (vld3_dup_bf16): New.
19675 (vld3q_dup_bf16): New.
19678 (vld4_dup_bf16): New.
19679 (vld4q_dup_bf16): New.
19680 (vst1_bf16, vst1_bf16_x2): New.
19681 (vst1_bf16_x3, vst1_bf16_x4): New.
19682 (vst1q_bf16, vst1q_bf16_x2): New.
19683 (vst1q_bf16_x3, vst1q_bf16_x4): New.
19684 (vst1_lane_bf16): New.
19685 (vst1q_lane_bf16): New.
19693 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
19695 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
19696 (VALL_F16): Likewise.
19697 (VALLDI_F16): Likewise.
19699 (Vetype): Likewise.
19700 (vswap_width_name): Likewise.
19701 (VSWAP_WIDTH): Likewise.
19705 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
19706 (vget_lane_bf16, vgetq_lane_bf16): New.
19707 (vcreate_bf16): New.
19708 (vdup_n_bf16, vdupq_n_bf16): New.
19709 (vdup_lane_bf16, vdup_laneq_bf16): New.
19710 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
19711 (vduph_lane_bf16, vduph_laneq_bf16): New.
19712 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
19713 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
19714 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
19715 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
19716 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
19717 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
19718 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
19719 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
19720 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
19721 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
19722 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
19723 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
19724 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
19725 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
19726 (vreinterpretq_bf16_p128): New.
19727 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
19728 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
19729 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
19730 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
19731 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
19732 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
19733 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
19734 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
19735 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
19736 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
19737 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
19738 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
19739 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
19740 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
19741 (vreinterpretq_p128_bf16): New.
19743 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
19745 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
19746 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
19747 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
19748 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
19749 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
19750 * config/arm/iterators.md (VSF2BF): New attribute.
19751 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
19752 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
19753 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
19755 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
19757 * config/arm/arm.md (required_for_purecode): New attribute.
19758 (enabled): Handle required_for_purecode.
19759 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
19760 work with -mpure-code.
19762 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19764 PR rtl-optimization/93908
19765 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
19768 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
19770 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
19772 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
19774 * doc/install.texi (--enable-checking): Adjust wording.
19776 2020-02-25 Richard Biener <rguenther@suse.de>
19778 PR tree-optimization/93868
19779 * tree-vect-slp.c (slp_copy_subtree): New function.
19780 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
19781 re-arranging stmts in it.
19783 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19785 PR middle-end/93874
19786 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
19787 dummy function and remove it at the end.
19789 PR translation/93864
19790 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
19791 paramter -> parameter.
19792 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
19793 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
19795 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
19797 * doc/install.texi (--enable-checking): Properly document current
19799 (--enable-stage1-checking): Minor clarification about bootstrap.
19801 2020-02-24 David Malcolm <dmalcolm@redhat.com>
19804 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
19805 -fanalyzer-checker=taint is also required.
19806 (-fanalyzer-checker=): Note that providing this option enables the
19807 given checker, and doing so may be required for checkers that are
19808 disabled by default.
19810 2020-02-24 David Malcolm <dmalcolm@redhat.com>
19812 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
19813 significant control flow events; add a "3" which shows all
19814 control flow events; the old "3" becomes "4".
19816 2020-02-24 Jakub Jelinek <jakub@redhat.com>
19818 PR tree-optimization/93582
19819 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
19820 pd.offset and pd.size to be counted in bits rather than bytes, add
19821 support for maxsizei that is not a multiple of BITS_PER_UNIT and
19822 handle bitfield stores and loads.
19823 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
19824 uncomparable quantities - bytes vs. bits. Allow push_partial_def
19825 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
19826 pd.offset/pd.size to be counted in bits rather than bytes.
19827 Formatting fix. Rename shadowed len variable to buflen.
19829 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
19830 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
19833 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
19834 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
19835 * opts-common.c (parse_options_from_collect_gcc_options): New function.
19836 (prepend_xassembler_to_collect_as_options): Likewise.
19837 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
19838 (prepend_xassembler_to_collect_as_options): Likewise.
19839 * lto-opts.c (lto_write_options): Stream assembler options
19840 in COLLECT_AS_OPTIONS.
19841 * lto-wrapper.c (xassembler_options_error): New static variable.
19842 (get_options_from_collect_gcc_options): Move parsing options code to
19843 parse_options_from_collect_gcc_options and call it.
19844 (merge_and_complain): Validate -Xassembler options.
19845 (append_compiler_options): Handle OPT_Xassembler.
19846 (run_gcc): Append command line -Xassembler options to
19847 collect_gcc_options.
19848 * doc/invoke.texi: Add documentation about using Xassembler
19851 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
19853 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
19855 (riscv_rtx_costs): Update cost model for LTGT.
19857 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
19859 PR rtl-optimization/93564
19860 * ira-color.c (struct update_cost_queue_elem): New member start.
19861 (queue_update_cost, get_next_update_cost): Add new arg start.
19862 (allocnos_conflict_p): New function.
19863 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
19864 Add checking conflicts with allocnos_conflict_p.
19865 (update_costs_from_prefs, restore_costs_from_copies): Adjust
19866 update_costs_from_allocno calls.
19867 (update_conflict_hard_regno_costs): Add checking conflicts with
19868 allocnos_conflict_p. Adjust calls of queue_update_cost and
19869 get_next_update_cost.
19870 (assign_hard_reg): Adjust calls of queue_update_cost. Add
19872 (bucket_allocno_compare_func): Restore previous version.
19874 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
19876 * config/pa/pa.c (pa_function_value): Fix check for word and
19877 double-word size when handling aggregate return values.
19878 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
19879 that homogeneous SFmode and DFmode aggregates are passed and returned
19880 in general registers.
19882 2020-02-21 Jakub Jelinek <jakub@redhat.com>
19884 PR translation/93759
19885 * opts.c (print_filtered_help): Translate help before appending
19886 messages to it rather than after that.
19888 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
19890 PR rtl-optimization/PR92989
19891 * lra-lives.c (process_bb_lives): Restore the original order
19892 of the bb liveness update. Call make_hard_regno_dead for each
19893 register clobbered at the start of an EH receiver.
19895 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
19898 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
19899 self-recursively generated.
19901 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
19904 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
19907 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
19909 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
19910 Document new target supports option.
19912 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
19914 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
19915 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
19916 * config/arm/iterators.md (MATMUL): New iterator.
19917 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
19918 (mmla_sfx): New attribute.
19919 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
19920 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
19921 (UNSPEC_MATMUL_US): New.
19923 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19925 * config/arm/arm.md: Prevent scalar shifts from being used when big
19928 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
19929 Richard Biener <rguenther@suse.de>
19931 PR tree-optimization/93586
19932 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
19933 after mismatched array refs; do not sure type size information to
19934 recover from unmatched referneces with !flag_strict_aliasing_p.
19936 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19938 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
19939 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
19940 (scatter_store<mode>): Rename to ...
19941 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
19942 (scatter<mode>_exec): Delete. Move contents ...
19943 (mask_scatter_store<mode>): ... here, and rename that to ...
19944 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
19945 Remove mode conversion.
19946 (mask_gather_load<mode>): Rename to ...
19947 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
19948 Remove mode conversion.
19949 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
19951 2020-02-21 Martin Jambor <mjambor@suse.cz>
19953 PR tree-optimization/93845
19954 * tree-sra.c (verify_sra_access_forest): Only test access size of
19957 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19959 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
19960 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
19961 (addv64di3_exec): Likewise.
19962 (subv64di3): Likewise.
19963 (subv64di3_exec): Likewise.
19964 (addv64di3_zext): Likewise.
19965 (addv64di3_zext_exec): Likewise.
19966 (addv64di3_zext_dup): Likewise.
19967 (addv64di3_zext_dup_exec): Likewise.
19968 (addv64di3_zext_dup2): Likewise.
19969 (addv64di3_zext_dup2_exec): Likewise.
19970 (addv64di3_sext_dup2): Likewise.
19971 (addv64di3_sext_dup2_exec): Likewise.
19972 (<expander>v64di3): Likewise.
19973 (<expander>v64di3_exec): Likewise.
19974 (*<reduc_op>_dpp_shr_v64di): Likewise.
19975 (*plus_carry_dpp_shr_v64di): Likewise.
19976 * config/gcn/gcn.md (adddi3): Likewise.
19977 (addptrdi3): Likewise.
19978 (<expander>di3): Likewise.
19980 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19982 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
19984 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19986 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
19987 support. Use aarch64_emit_mult instead of emitting multiplication
19988 instructions directly.
19989 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
19990 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
19992 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19994 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
19995 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
19996 instead of emitting multiplication instructions directly.
19997 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
19998 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
19999 (@aarch64_frecps<mode>): New expanders.
20001 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20003 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
20004 on and produce uint64_ts rather than ints.
20005 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
20006 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
20008 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20010 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
20011 an unused xmsk register when handling approximate rsqrt.
20013 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20015 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
20016 flag_finite_math_only condition.
20018 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
20021 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
20022 to destination operand for shufps alternative.
20023 (*vec_extractv2si_1): Ditto.
20025 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
20028 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
20031 2020-02-20 Martin Liska <mliska@suse.cz>
20033 PR translation/93831
20034 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
20036 2020-02-20 Martin Liska <mliska@suse.cz>
20038 PR translation/93830
20039 * common/config/avr/avr-common.c: Remote trailing "|".
20041 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
20043 * collect2.c (maybe_run_lto_and_relink): Fix typo in
20046 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
20048 PR tree-optimization/93767
20049 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
20050 access-size bias from the offset calculations for negative strides.
20052 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
20054 * collect2.c (c_file, o_file): Make const again.
20055 (ldout,lderrout, dump_ld_file): Remove.
20056 (tool_cleanup): Avoid calling not signal-safe functions.
20057 (maybe_run_lto_and_relink): Avoid possible signal handler
20058 access to unintialzed memory (lto_o_files).
20059 (main): Avoid leaking temp files in $TMPDIR.
20060 Initialize c_file/o_file with concat, which avoids exposing
20061 uninitialized memory to signal handler, which calls unlink(!).
20062 Avoid calling maybe_unlink when the main function returns,
20063 since the atexit handler is already doing this.
20064 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
20066 2020-02-19 Martin Jambor <mjambor@suse.cz>
20068 PR tree-optimization/93776
20069 * tree-sra.c (create_access): Do not create zero size accesses.
20070 (get_access_for_expr): Do not search for zero sized accesses.
20072 2020-02-19 Martin Jambor <mjambor@suse.cz>
20074 PR tree-optimization/93667
20075 * tree-sra.c (scalarizable_type_p): Return false if record fields
20076 do not follow wach other.
20078 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
20080 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
20081 rather than fmv.x.s/fmv.s.x.
20083 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
20085 * config/aarch64/aarch64-simd-builtins.def
20086 (intrinsic_vec_smult_lo_): New.
20087 (intrinsic_vec_umult_lo_): Likewise.
20088 (vec_widen_smult_hi_): Likewise.
20089 (vec_widen_umult_hi_): Likewise.
20090 * config/aarch64/aarch64-simd.md
20091 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
20092 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
20093 (vmull_high_s16): Likewise.
20094 (vmull_high_s32): Likewise.
20095 (vmull_high_u8): Likewise.
20096 (vmull_high_u16): Likewise.
20097 (vmull_high_u32): Likewise.
20098 (vmull_s8): Likewise.
20099 (vmull_s16): Likewise.
20100 (vmull_s32): Likewise.
20101 (vmull_u8): Likewise.
20102 (vmull_u16): Likewise.
20103 (vmull_u32): Likewise.
20105 2020-02-18 Martin Liska <mliska@suse.cz>
20107 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
20108 bootstrap by missing removal of invalid sanity check.
20110 2020-02-18 Martin Liska <mliska@suse.cz>
20113 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
20114 Always compare LHS of gimple_assign.
20116 2020-02-18 Martin Liska <mliska@suse.cz>
20119 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
20120 and return type of functions.
20121 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
20122 Drop MALLOC attribute for void functions.
20123 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
20124 malloc_state for a new VOID clone.
20126 2020-02-18 Martin Liska <mliska@suse.cz>
20129 * common.opt: Add -fprofile-reproducibility.
20130 * doc/invoke.texi: Document it.
20131 * value-prof.c (dump_histogram_value):
20132 Document and support behavior for counters[0]
20133 being a negative value.
20134 (get_nth_most_common_value): Handle negative
20135 counters[0] in respect to flag_profile_reproducible.
20137 2020-02-18 Jakub Jelinek <jakub@redhat.com>
20140 * cgraph.c (verify_speculative_call): Use speculative_id instead of
20141 speculative_uid in messages. Remove trailing whitespace from error
20142 message. Use num_speculative_call_targets instead of
20143 num_speculative_targets in a message.
20144 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
20145 edge messages and stmt instead of cal_stmt in reference message.
20147 PR tree-optimization/93780
20148 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
20149 before calling build_vector_type.
20150 (execute_update_addresses_taken): Likewise.
20153 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
20154 typo, functoin -> function.
20155 * tree.c (free_lang_data_in_decl): Fix comment typo,
20156 functoin -> function.
20157 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
20159 2020-02-17 David Malcolm <dmalcolm@redhat.com>
20161 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
20163 (print_option_information): Don't call get_option_url if URLs
20166 2020-02-17 Alexandre Oliva <oliva@adacore.com>
20168 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
20169 handling of register_common-less targets.
20171 2020-02-17 Martin Liska <mliska@suse.cz>
20174 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
20176 2020-02-17 Martin Liska <mliska@suse.cz>
20178 PR translation/93755
20179 * config/rs6000/rs6000.c (rs6000_option_override_internal):
20182 2020-02-17 Martin Liska <mliska@suse.cz>
20185 * config/rx/elf.opt: Fix typo.
20187 2020-02-17 Richard Biener <rguenther@suse.de>
20190 * opts-global.c (print_ignored_options): Use inform and
20193 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
20196 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
20198 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
20201 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
20202 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
20204 2020-02-15 Jason Merrill <jason@redhat.com>
20206 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
20208 2020-02-15 Jakub Jelinek <jakub@redhat.com>
20210 PR tree-optimization/93744
20211 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
20212 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
20213 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
20214 sure @2 in the first and @1 in the other patterns has no side-effects.
20216 2020-02-15 David Malcolm <dmalcolm@redhat.com>
20217 Bernd Edlinger <bernd.edlinger@hotmail.de>
20221 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
20222 * configure.ac (--with-diagnostics-urls): New configuration
20223 option, based on --with-diagnostics-color.
20224 (DIAGNOSTICS_URLS_DEFAULT): New define.
20225 * config.h: Regenerate.
20226 * configure: Regenerate.
20227 * diagnostic.c (diagnostic_urls_init): Handle -1 for
20228 DIAGNOSTICS_URLS_DEFAULT from configure-time
20229 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
20230 and TERM_URLS environment variable.
20231 * diagnostic-url.h (diagnostic_url_format): New enum type.
20232 (diagnostic_urls_enabled_p): rename to...
20233 (determine_url_format): ... this, and change return type.
20234 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
20235 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
20236 the linux console, and mingw.
20237 (diagnostic_urls_enabled_p): rename to...
20238 (determine_url_format): ... this, and adjust.
20239 * pretty-print.h (pretty_printer::show_urls): rename to...
20240 (pretty_printer::url_format): ... this, and change to enum.
20241 * pretty-print.c (pretty_printer::pretty_printer,
20242 pp_begin_url, pp_end_url, test_urls): Adjust.
20243 * doc/install.texi (--with-diagnostics-urls): Document the new
20244 configuration option.
20245 (--with-diagnostics-color): Document the existing interaction
20246 with GCC_COLORS better.
20247 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
20248 vindex reference. Update description of defaults based on the above.
20249 (-fdiagnostics-color): Update description of how -fdiagnostics-color
20250 interacts with GCC_COLORS.
20252 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
20255 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
20256 conjunction with TARGET_GNU_TLS in early return.
20258 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
20260 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
20261 the mode is not wider than UNITS_PER_WORD.
20263 2020-02-14 Martin Jambor <mjambor@suse.cz>
20265 PR tree-optimization/93516
20266 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
20267 access of the same type as the parent.
20268 (propagate_subaccesses_from_lhs): Likewise.
20270 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
20273 * config/i386/avx512vbmi2intrin.h
20274 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
20275 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
20276 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
20277 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
20278 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
20279 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
20280 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
20281 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
20282 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
20283 of lacking a closing parenthesis.
20284 * config/i386/avx512vbmi2vlintrin.h
20285 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
20286 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
20287 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
20288 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
20289 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
20290 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
20291 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
20292 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
20293 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
20294 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
20295 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
20296 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
20297 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
20298 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
20299 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
20300 _mm_shldi_epi32, _mm_mask_shldi_epi32,
20301 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
20302 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
20304 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
20307 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
20308 the target function entry.
20310 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20312 * common/config/arc/arc-common.c (arc_option_optimization_table):
20313 Disable if-conversion step when optimized for size.
20315 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20317 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
20318 R12-R15 are always in ARCOMPACT16_REGS register class.
20319 * config/arc/arc.opt (mq-class): Deprecate.
20320 * config/arc/constraint.md ("q"): Remove dependency on mq-class
20322 * doc/invoke.texi (mq-class): Update text.
20323 * common/config/arc/arc-common.c (arc_option_optimization_table):
20326 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20328 * config/arc/arc.c (arc_insn_cost): New function.
20329 (TARGET_INSN_COST): Define.
20330 * config/arc/arc.md (cost): New attribute.
20331 (add_n): Use arc_nonmemory_operand.
20332 (ashlsi3_insn): Likewise, also update constraints.
20333 (ashrsi3_insn): Likewise.
20334 (rotrsi3): Likewise.
20335 (add_shift): Likewise.
20336 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
20338 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20340 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
20342 (umulsidi_600): Likewise.
20344 2020-02-13 Jakub Jelinek <jakub@redhat.com>
20347 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
20348 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
20349 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
20350 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
20351 pass __A to the builtin followed by __W instead of __A followed by
20353 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
20354 _mm512_mask_popcnt_epi64): Likewise.
20355 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
20356 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
20357 _mm256_mask_popcnt_epi64): Likewise.
20359 PR tree-optimization/93582
20360 * fold-const.h (shift_bytes_in_array_left,
20361 shift_bytes_in_array_right): Declare.
20362 * fold-const.c (shift_bytes_in_array_left,
20363 shift_bytes_in_array_right): New function, moved from
20364 gimple-ssa-store-merging.c, no longer static.
20365 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
20366 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
20367 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
20368 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
20369 shift_bytes_in_array.
20370 (verify_shift_bytes_in_array): Rename to ...
20371 (verify_shift_bytes_in_array_left): ... this. Use
20372 shift_bytes_in_array_left instead of shift_bytes_in_array.
20373 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
20374 instead of verify_shift_bytes_in_array.
20375 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
20376 / native_interpret_expr where the store covers all needed bits,
20377 punt on PDP-endian, otherwise allow all involved offsets and sizes
20378 not to be byte-aligned.
20381 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
20382 use const_0_to_255_operand predicate instead of immediate_operand.
20383 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
20384 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
20385 vgf2p8affineinvqb_<mode><mask_name>,
20386 vgf2p8affineqb_<mode><mask_name>): Drop mode from
20387 const_0_to_255_operand predicated operands.
20389 2020-02-12 Jeff Law <law@redhat.com>
20391 * config/h8300/h8300.md (comparison shortening peepholes): Use
20392 a mode iterator to merge the HImode and SImode peepholes.
20394 2020-02-12 Jakub Jelinek <jakub@redhat.com>
20396 PR middle-end/93663
20397 * real.c (is_even): Make static. Function comment fix.
20398 (is_halfway_below): Make static, don't assert R is not inf/nan,
20399 instead return false for those. Small formatting fixes.
20401 2020-02-12 Martin Sebor <msebor@redhat.com>
20403 PR middle-end/93646
20404 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
20405 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
20406 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
20407 (strlen_check_and_optimize_call): Adjust callee name.
20409 2020-02-12 Jeff Law <law@redhat.com>
20411 * config/h8300/h8300.md (comparison shortening peepholes): Drop
20412 (and (xor)) variant. Combine other two into single peephole.
20414 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
20416 PR rtl-optimization/93565
20417 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
20419 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
20421 * config/aarch64/aarch64-simd.md
20422 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
20423 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
20424 generating separate ADDV and zero_extend patterns.
20425 * config/aarch64/iterators.md (VDQV_E): New iterator.
20427 2020-02-12 Jeff Law <law@redhat.com>
20429 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
20430 expanders, splits, etc.
20431 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
20432 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
20433 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
20434 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
20435 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
20436 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
20437 function prototype.
20438 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
20440 2020-02-12 Jakub Jelinek <jakub@redhat.com>
20443 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
20444 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
20445 TARGET_AVX512DQ from condition.
20446 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
20447 instead of <mask_mode512bit_condition> in condition. If
20448 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
20450 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
20453 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
20456 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
20458 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
20460 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
20461 where strlen is more legible.
20462 (rs6000_builtin_vectorized_libmass): Ditto.
20463 (rs6000_print_options_internal): Ditto.
20465 2020-02-11 Martin Sebor <msebor@redhat.com>
20467 PR tree-optimization/93683
20468 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
20470 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
20472 * config/rs6000/predicates.md (cint34_operand): Rename the
20473 -mprefixed-addr option to be -mprefixed.
20474 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
20475 the -mprefixed-addr option to be -mprefixed.
20476 (OTHER_FUTURE_MASKS): Likewise.
20477 (POWERPC_MASKS): Likewise.
20478 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
20479 the -mprefixed-addr option to be -mprefixed. Change error
20480 messages to refer to -mprefixed.
20481 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
20483 (rs6000_legitimate_offset_address_p): Likewise.
20484 (rs6000_mode_dependent_address): Likewise.
20485 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
20486 "-mprefixed" for target attributes and pragmas.
20487 (address_to_insn_form): Rename the -mprefixed-addr option to be
20489 (rs6000_adjust_insn_length): Likewise.
20490 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
20491 -mprefixed-addr option to be -mprefixed.
20492 (ASM_OUTPUT_OPCODE): Likewise.
20493 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
20494 -mprefixed-addr option to be -mprefixed.
20495 * config/rs6000/rs6000.opt (-mprefixed): Rename the
20496 -mprefixed-addr option to be prefixed. Change the option from
20497 being undocumented to being documented.
20498 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
20499 -mprefixed option. Update the -mpcrel documentation to mention
20502 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
20504 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
20505 including FIRST_PSEUDO_REGISTER - 1.
20506 * ira-color.c (print_hard_reg_set): Ditto.
20508 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20510 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
20511 (USTERNOP_QUALIFIERS): New define.
20512 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
20513 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
20514 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
20515 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
20516 * config/arm/arm_neon.h (vusdot_s32): New.
20517 (vusdot_lane_s32): New.
20518 (vusdotq_lane_s32): New.
20519 (vsudot_lane_s32): New.
20520 (vsudotq_lane_s32): New.
20521 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
20522 * config/arm/iterators.md (DOTPROD_I8MM): New.
20523 (sup, opsuffix): Add <us/su>.
20524 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
20525 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
20527 2020-02-11 Richard Biener <rguenther@suse.de>
20529 PR tree-optimization/93661
20530 PR tree-optimization/93662
20531 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
20532 tree_to_poly_int64.
20533 * tree-sra.c (get_access_for_expr): Likewise.
20535 2020-02-10 Jakub Jelinek <jakub@redhat.com>
20538 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
20539 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
20540 Change condition from TARGET_AVX2 to TARGET_AVX.
20542 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
20545 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
20546 argument of strncmp.
20548 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
20550 Try to generate zero-based comparisons.
20551 * config/cris/cris.c (cris_reduce_compare): New function.
20552 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
20553 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
20554 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
20556 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
20559 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
20560 in Thumb state and also as a destination in Arm state. Add T16
20563 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
20565 * md.texi (Define Subst): Match closing paren in example.
20567 2020-02-10 Jakub Jelinek <jakub@redhat.com>
20571 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
20572 arguments of strncmp.
20574 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
20577 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
20578 but different source value.
20579 (adjust_callers_for_value_intersection): New function.
20580 (gather_edges_for_value): Adjust order of callers to let a
20581 non-self-recursive caller be the first element.
20582 (self_recursive_pass_through_p): Add a new parameter "simple", and
20583 check generalized self-recursive pass-through jump function.
20584 (self_recursive_agg_pass_through_p): Likewise.
20585 (find_more_scalar_values_for_callers_subset): Compute value from
20586 pass-through jump function for self-recursive.
20587 (intersect_with_plats): Cleanup previous implementation code for value
20588 itersection with self-recursive call edge.
20589 (intersect_with_agg_replacements): Likewise.
20590 (intersect_aggregates_with_edge): Deduce value from pass-through jump
20591 function for self-recursive call edge. Cleanup previous implementation
20592 code for value intersection with self-recursive call edge.
20593 (decide_whether_version_node): Remove dead callers and adjust order
20594 to let a non-self-recursive caller be the first element.
20596 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
20598 * recog.c: Move pass_split_before_sched2 code in front of
20599 pass_split_before_regstack.
20600 (pass_data_split_before_sched2): Rename pass to split3 from split4.
20601 (pass_data_split_before_regstack): Rename pass to split4 from split3.
20602 (rest_of_handle_split_before_sched2): Remove.
20603 (pass_split_before_sched2::execute): Unconditionally call
20605 (enable_split_before_sched2): New function.
20606 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
20607 (pass_split_before_regstack::gate): Ditto.
20608 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
20609 Update name check for renamed split4 pass.
20610 * config/sh/sh.c (register_sh_passes): Update pass insertion
20611 point for renamed split4 pass.
20613 2020-02-09 Jakub Jelinek <jakub@redhat.com>
20615 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
20616 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
20617 copying them around between host and target.
20619 2020-02-08 Andrew Pinski <apinski@marvell.com>
20622 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
20623 STRICT_ALIGNMENT also.
20625 2020-02-08 Jim Wilson <jimw@sifive.com>
20628 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
20630 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
20631 Jakub Jelinek <jakub@redhat.com>
20634 * config/i386/i386.h (CALL_USED_REGISTERS): Make
20635 xmm16-xmm31 call-used even in 64-bit ms-abi.
20637 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
20639 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
20640 (simd_ummla, simd_usmmla): Likewise.
20641 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
20642 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
20643 (vusmmlaq_s32): New.
20645 2020-02-07 Richard Biener <rguenther@suse.de>
20647 PR middle-end/93519
20648 * tree-inline.c (fold_marked_statements): Do a PRE walk,
20649 skipping unreachable regions.
20650 (optimize_inline_calls): Skip folding stmts when we didn't
20653 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
20656 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
20657 Don't return aggregates with only SFmode and DFmode in SSE
20659 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
20661 2020-02-07 Jakub Jelinek <jakub@redhat.com>
20664 * config/rs6000/rs6000-logue.c
20665 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
20666 if it fails, move rs into end_addr and retry. Add
20667 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
20668 the insn pattern doesn't describe well what exactly happens to
20672 * config/i386/predicates.md (avx_identity_operand): Remove.
20673 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
20674 (avx_<castmode><avxsizesuffix>_<castmode>,
20675 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
20676 a VEC_CONCAT of the operand and UNSPEC_CAST.
20677 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
20678 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
20682 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
20683 recog_data.insn if distance_non_agu_define changed it.
20685 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
20688 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
20689 we only had X-FORM (reg+reg) addressing for vectors. Also before
20690 ISA 3.0, we only had X-FORM addressing for scalars in the
20691 traditional Altivec registers.
20693 2020-02-06 <zhongyunde@huawei.com>
20694 Vladimir Makarov <vmakarov@redhat.com>
20696 PR rtl-optimization/93561
20697 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
20698 hard register range.
20700 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20702 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
20705 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
20707 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
20708 where the low and the high 32 bits are equal to each other specially,
20709 with an rldimi instruction.
20711 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
20713 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
20715 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
20717 * config/arm/arm-tables.opt: Regenerate.
20719 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20722 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
20723 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
20724 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
20726 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20728 PR rtl-optimization/87763
20729 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
20731 2020-02-06 Delia Burduv <delia.burduv@arm.com>
20733 * config/aarch64/aarch64-simd-builtins.def
20734 (bfmlaq): New built-in function.
20735 (bfmlalb): New built-in function.
20736 (bfmlalt): New built-in function.
20737 (bfmlalb_lane): New built-in function.
20738 (bfmlalt_lane): New built-in function.
20739 * config/aarch64/aarch64-simd.md
20740 (aarch64_bfmmlaqv4sf): New pattern.
20741 (aarch64_bfmlal<bt>v4sf): New pattern.
20742 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
20743 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
20744 (vbfmlalbq_f32): New intrinsic.
20745 (vbfmlaltq_f32): New intrinsic.
20746 (vbfmlalbq_lane_f32): New intrinsic.
20747 (vbfmlaltq_lane_f32): New intrinsic.
20748 (vbfmlalbq_laneq_f32): New intrinsic.
20749 (vbfmlaltq_laneq_f32): New intrinsic.
20750 * config/aarch64/iterators.md (BF_MLA): New int iterator.
20751 (bt): New int attribute.
20753 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
20755 * config/i386/i386.md (*pushtf): Emit "#" instead of
20756 calling gcc_unreachable in insn output.
20759 (*pushsf_rex64): Ditto for alternatives other than 1.
20760 (*pushsf): Ditto for alternatives other than 1.
20762 2020-02-06 Martin Liska <mliska@suse.cz>
20764 PR gcov-profile/91971
20765 PR gcov-profile/93466
20766 * coverage.c (coverage_init): Revert mangling of
20767 path into filename. It can lead to huge filename length.
20768 Creation of subfolders seem more natural.
20770 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20773 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
20774 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
20775 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
20777 2020-02-06 Jakub Jelinek <jakub@redhat.com>
20780 * config/i386/predicates.md (avx_identity_operand): New predicate.
20781 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
20782 define_insn_and_split.
20785 * omp-low.c (use_pointer_for_field): For nested constructs, also
20786 look for map clauses on target construct.
20787 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
20788 taskreg_nesting_level.
20791 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
20792 shared clause, call omp_notice_variable on outer context if any.
20794 2020-02-05 Jason Merrill <jason@redhat.com>
20797 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
20798 non-zero address even if weak and not yet defined.
20800 2020-02-05 Martin Sebor <msebor@redhat.com>
20802 PR tree-optimization/92765
20803 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
20804 * tree-ssa-strlen.c (compute_string_length): Remove.
20805 (determine_min_objsize): Remove.
20806 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
20807 Avoid using type size as the upper bound on string length.
20808 (handle_builtin_string_cmp): Add an argument. Adjust.
20809 (strlen_check_and_optimize_call): Pass additional argument to
20810 handle_builtin_string_cmp.
20812 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
20814 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
20815 (*pushdi2_rex64 peephole2): Unconditionally split after
20816 epilogue_completed.
20817 (*ashl<mode>3_doubleword): Ditto.
20818 (*<shift_insn><mode>3_doubleword): Ditto.
20820 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
20823 * config/rs6000/rs6000.c (get_vector_offset): Fix
20825 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
20827 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
20829 2020-02-05 David Malcolm <dmalcolm@redhat.com>
20831 * doc/analyzer.texi
20832 (Special Functions for Debugging the Analyzer): Update description
20833 of __analyzer_dump_exploded_nodes.
20835 2020-02-05 Jakub Jelinek <jakub@redhat.com>
20838 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
20839 include sets and not clobbers in the vzeroupper pattern.
20840 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
20841 the parallel has 17 (64-bit) or 9 (32-bit) elts.
20842 (*avx_vzeroupper_1): New define_insn_and_split.
20845 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
20846 don't run when !optimize.
20847 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
20850 2020-02-05 Richard Biener <rguenther@suse.de>
20852 PR middle-end/90648
20853 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
20854 checks before matching calls.
20856 2020-02-05 Jakub Jelinek <jakub@redhat.com>
20858 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
20859 function comment typo.
20861 PR middle-end/93555
20862 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
20863 simd_clone_create failed when i == 0, adjust clone->nargs by
20866 2020-02-05 Martin Liska <mliska@suse.cz>
20869 * doc/invoke.texi: Document that one should
20870 not combine ASLR and -fpch.
20872 2020-02-04 Richard Biener <rguenther@suse.de>
20874 PR tree-optimization/93538
20875 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
20877 2020-02-04 Richard Biener <rguenther@suse.de>
20879 PR tree-optimization/91123
20880 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
20881 (vn_walk_cb_data::last_vuse): New member.
20882 (vn_walk_cb_data::saved_operands): Likewsie.
20883 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
20884 (vn_walk_cb_data::push_partial_def): Use finish.
20885 (vn_reference_lookup_2): Update last_vuse and use finish if
20886 we've saved operands.
20887 (vn_reference_lookup_3): Use finish and update calls to
20888 push_partial_defs everywhere. When translating through
20889 memcpy or aggregate copies save off operands and alias-set.
20890 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
20891 operation for redundant store removal.
20893 2020-02-04 Richard Biener <rguenther@suse.de>
20895 PR tree-optimization/92819
20896 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
20897 generating more stmts than before.
20899 2020-02-04 Martin Liska <mliska@suse.cz>
20901 * config/arm/arm.c (arm_gen_far_branch): Move the function
20902 outside of selftests.
20904 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20906 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
20907 function to adjust PC-relative vector addresses.
20908 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
20909 handle vectors with PC-relative addresses.
20911 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20913 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
20915 (hard_reg_and_mode_to_addr_mask): Delete.
20916 (rs6000_adjust_vec_address): If the original vector address
20917 was REG+REG or REG+OFFSET and the element is not zero, do the add
20918 of the elements in the original address before adding the offset
20919 for the vector element. Use address_to_insn_form to validate the
20920 address using the register being loaded, rather than guessing
20921 whether the address is a DS-FORM or DQ-FORM address.
20923 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20925 * config/rs6000/rs6000.c (get_vector_offset): New helper function
20926 to calculate the offset in memory from the start of a vector of a
20927 particular element. Add code to keep the element number in
20928 bounds if the element number is variable.
20929 (rs6000_adjust_vec_address): Move calculation of offset of the
20930 vector element to get_vector_offset.
20931 (rs6000_split_vec_extract_var): Do not do the initial AND of
20932 element here, move the code to get_vector_offset.
20934 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20936 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
20939 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
20941 * config/rs6000/constraints.md: Improve documentation.
20943 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
20946 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
20947 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
20949 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
20951 * config.gcc: Remove "carrizo" support.
20952 * config/gcn/gcn-opts.h (processor_type): Likewise.
20953 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
20954 * config/gcn/gcn.opt (gpu_type): Likewise.
20955 * config/gcn/t-omp-device: Likewise.
20957 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20960 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
20961 * config/arm/arm.c (arm_gen_far_branch): New function
20962 arm_gen_far_branch.
20963 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
20965 2020-02-03 Julian Brown <julian@codesourcery.com>
20966 Tobias Burnus <tobias@codesourcery.com>
20968 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
20970 2020-02-03 Jakub Jelinek <jakub@redhat.com>
20973 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
20974 valid RTL to sum up the lowest and second lowest bytes of the popcnt
20977 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
20979 PR rtl-optimization/91333
20980 * ira-color.c (struct allocno_color_data): Add member
20982 (init_allocno_threads): Set the member up.
20983 (bucket_allocno_compare_func): Add compare hard reg
20986 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
20988 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
20990 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
20991 * config.in: Regenerated.
20992 * configure: Regenerated.
20993 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
20994 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
20995 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
20997 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
20999 * configure: Regenerate.
21001 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
21003 PR rtl-optimization/91333
21004 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
21005 reg preferences comparison up.
21007 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
21009 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
21010 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
21011 aarch64-sve-builtins-base.h.
21012 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
21013 aarch64-sve-builtins-base.cc.
21014 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
21015 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21016 (svcvtnt): Declare.
21017 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
21018 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21019 (svcvtnt): New functions.
21020 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
21021 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21022 (svcvtnt): New functions.
21023 (svcvt): Add a form that converts f32 to bf16.
21024 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
21025 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
21027 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
21028 Treat B as bfloat16_t.
21029 (ternary_bfloat_lane_base): New class.
21030 (ternary_bfloat_def): Likewise.
21031 (ternary_bfloat): New shape.
21032 (ternary_bfloat_lane_def): New class.
21033 (ternary_bfloat_lane): New shape.
21034 (ternary_bfloat_lanex2_def): New class.
21035 (ternary_bfloat_lanex2): New shape.
21036 (ternary_bfloat_opt_n_def): New class.
21037 (ternary_bfloat_opt_n): New shape.
21038 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
21039 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
21040 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
21041 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
21042 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21043 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21044 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
21045 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
21046 the pattern off the narrow mode instead of the wider one.
21047 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
21048 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
21049 (sve_fp_op): Handle them.
21050 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
21051 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
21053 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
21055 * config/aarch64/arm_sve.h: Include arm_bf16.h.
21056 * config/aarch64/aarch64-modes.def (BF): Move definition before
21057 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
21058 (SVE_MODES): Handle BF modes.
21059 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
21061 (aarch64_full_sve_mode): Likewise.
21062 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
21064 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
21065 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
21066 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
21067 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
21069 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
21071 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
21072 (TYPES_all_data): Add bf16.
21073 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
21074 (register_tuple_type): Increase buffer size.
21075 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
21076 (bf16): New type suffix.
21077 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
21078 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
21079 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
21080 Change type from all_data to all_arith.
21081 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
21082 (svminp): Likewise.
21084 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
21085 Matthew Malcomson <matthew.malcomson@arm.com>
21086 Richard Sandiford <richard.sandiford@arm.com>
21088 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
21089 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
21090 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
21091 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
21092 __ARM_FEATURE_MATMUL_FP64.
21093 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
21094 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
21095 be disabled at the same time.
21096 (f32mm): New extension.
21097 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
21098 (AARCH64_FL_F64MM): Bump to the next bit up.
21099 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
21100 (TARGET_SVE_F64MM): New macros.
21101 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
21102 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
21103 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
21104 (UNSPEC_ZIP2Q): New unspeccs.
21105 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
21106 (optab, sur, perm_insn): Handle the new unspecs.
21107 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
21108 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
21109 TARGET_SVE_F64MM instead of separate tests.
21110 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
21111 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
21112 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
21113 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
21114 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
21115 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
21116 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
21117 (TYPES_s_signed): New macro.
21118 (TYPES_s_integer): Use it.
21119 (TYPES_d_float): New macro.
21120 (TYPES_d_data): Use it.
21121 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
21122 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
21123 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
21124 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
21125 (svmmla): New shape.
21126 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
21127 template parameters.
21128 (ternary_resize2_lane_base): Likewise.
21129 (ternary_resize2_base): New class.
21130 (ternary_qq_lane_base): Likewise.
21131 (ternary_intq_uintq_lane_def): Likewise.
21132 (ternary_intq_uintq_lane): New shape.
21133 (ternary_intq_uintq_opt_n_def): New class
21134 (ternary_intq_uintq_opt_n): New shape.
21135 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
21136 (ternary_uintq_intq_def): New class.
21137 (ternary_uintq_intq): New shape.
21138 (ternary_uintq_intq_lane_def): New class.
21139 (ternary_uintq_intq_lane): New shape.
21140 (ternary_uintq_intq_opt_n_def): New class.
21141 (ternary_uintq_intq_opt_n): New shape.
21142 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
21143 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
21144 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
21145 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
21147 (svdotprod_lane_impl): ...this new class.
21148 (svmmla_impl, svusdot_impl): New classes.
21149 (svdot_lane): Update to use svdotprod_lane_impl.
21150 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
21151 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
21153 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
21154 function, with no types defined.
21155 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
21156 AARCH64_FL_I8MM functions.
21157 (svmmla): New AARCH64_FL_F32MM function.
21158 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
21159 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
21160 AARCH64_FL_F64MM function.
21161 (REQUIRED_EXTENSIONS):
21163 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
21165 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
21168 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
21170 * config/i386/i386.md (*movoi_internal_avx): Do not check for
21171 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
21172 (*movti_internal): Do not check for
21173 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
21174 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
21175 just after check for TARGET_AVX.
21176 (*movdf_internal): Ditto.
21177 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
21178 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
21179 * config/i386/sse.md (mov<mode>_internal): Only check
21180 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
21181 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
21182 (<sse>_andnot<mode>3<mask_name>): Move check for
21183 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
21184 (<code><mode>3<mask_name>): Ditto.
21185 (*andnot<mode>3): Ditto.
21186 (*andnottf3): Ditto.
21187 (*<code><mode>3): Ditto.
21188 (*<code>tf3): Ditto.
21189 (*andnot<VI:mode>3): Remove
21190 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
21191 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
21192 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
21193 (sse4_1_blendv<ssemodesuffix>): Ditto.
21194 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
21195 Explain that tune applies to 128bit instructions only.
21197 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
21199 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
21200 to definition of hsa_kernel_description. Parse assembly to find SGPR
21201 and VGPR count of kernel and store in hsa_kernel_description.
21203 2020-01-31 Tamar Christina <tamar.christina@arm.com>
21205 PR rtl-optimization/91838
21206 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
21207 to truncate if allowed or reject combination.
21209 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
21211 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
21212 (find_inv_vars_cb): Likewise.
21214 2020-01-31 David Malcolm <dmalcolm@redhat.com>
21216 * calls.c (special_function_p): Split out the check for DECL_NAME
21217 being non-NULL and fndecl being extern at file scope into a
21218 new maybe_special_function_p and call it. Drop check for fndecl
21219 being non-NULL that was after a usage of DECL_NAME (fndecl).
21220 * tree.h (maybe_special_function_p): New inline function.
21222 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
21224 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
21225 (mask_gather_load<mode>): ... here, and zero-initialize the
21227 (maskload<mode>di): Zero-initialize the destination.
21228 * config/gcn/gcn.c:
21230 2020-01-30 David Malcolm <dmalcolm@redhat.com>
21233 * doc/analyzer.texi (Limitations): Note that constraints on
21234 floating-point values are currently ignored.
21236 2020-01-30 Jakub Jelinek <jakub@redhat.com>
21239 * symtab.c (symtab_node::noninterposable_alias): If localalias
21240 already exists, but is not usable, append numbers after it until
21241 a unique name is found. Formatting fix.
21243 PR middle-end/93505
21244 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
21247 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
21249 * config/gcn/gcn.c (print_operand): Handle LTGT.
21250 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
21252 2020-01-30 Richard Biener <rguenther@suse.de>
21254 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
21255 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
21257 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
21259 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
21260 without a DECL in .data.rel.ro.local.
21262 2020-01-30 Jakub Jelinek <jakub@redhat.com>
21265 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
21269 * config/i386/sse.md
21270 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
21271 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
21272 any_extend code iterator instead of always zero_extend.
21273 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
21274 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
21275 Use any_extend code iterator instead of always zero_extend.
21276 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
21277 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
21278 Use any_extend code iterator instead of always zero_extend.
21279 (*sse2_pmovmskb_ext): New define_insn.
21280 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
21283 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
21284 (*popcountsi2_zext_falsedep): New define_insn.
21286 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21288 * config.in: Regenerated.
21289 * configure: Regenerated.
21291 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
21294 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
21295 LLVM's assembler changed the default in version 9.
21297 2020-01-24 Jeff Law <law@redhat.com>
21299 PR tree-optimization/89689
21300 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
21302 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
21306 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21308 PR rtl-optimization/87763
21309 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
21310 simplification to handle subregs as well as bare regs.
21311 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
21313 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
21316 * ira.c (ira): Revert use of simplified LRA algorithm.
21318 2020-01-29 Martin Jambor <mjambor@suse.cz>
21320 PR tree-optimization/92706
21321 * tree-sra.c (struct access): Fields first_link, last_link,
21322 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
21323 next_rhs_queued and grp_rhs_queued respectively, new fields
21324 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
21325 (struct assign_link): Field next renamed to next_rhs, new field
21326 next_lhs. Updated comment.
21327 (work_queue_head): Renamed to rhs_work_queue_head.
21328 (lhs_work_queue_head): New variable.
21329 (add_link_to_lhs): New function.
21330 (relink_to_new_repr): Also relink LHS lists.
21331 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
21332 (add_access_to_lhs_work_queue): New function.
21333 (pop_access_from_work_queue): Renamed to
21334 pop_access_from_rhs_work_queue.
21335 (pop_access_from_lhs_work_queue): New function.
21336 (build_accesses_from_assign): Also add links to LHS lists and to LHS
21338 (child_would_conflict_in_lacc): Renamed to
21339 child_would_conflict_in_acc. Adjusted parameter names.
21340 (create_artificial_child_access): New parameter set_grp_read, use it.
21341 (subtree_mark_written_and_enqueue): Renamed to
21342 subtree_mark_written_and_rhs_enqueue.
21343 (propagate_subaccesses_across_link): Renamed to
21344 propagate_subaccesses_from_rhs.
21345 (propagate_subaccesses_from_lhs): New function.
21346 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
21349 2020-01-29 Martin Jambor <mjambor@suse.cz>
21351 PR tree-optimization/92706
21352 * tree-sra.c (struct access): Adjust comment of
21353 grp_total_scalarization.
21354 (find_access_in_subtree): Look for single children spanning an entire
21356 (scalarizable_type_p): Allow register accesses, adjust callers.
21357 (completely_scalarize): Remove function.
21358 (scalarize_elem): Likewise.
21359 (create_total_scalarization_access): Likewise.
21360 (sort_and_splice_var_accesses): Do not track total scalarization
21362 (analyze_access_subtree): New parameter totally, adjust to new meaning
21363 of grp_total_scalarization.
21364 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
21365 (can_totally_scalarize_forest_p): New function.
21366 (create_total_scalarization_access): Likewise.
21367 (create_total_access_and_reshape): Likewise.
21368 (total_should_skip_creating_access): Likewise.
21369 (totally_scalarize_subtree): Likewise.
21370 (analyze_all_variable_accesses): Perform total scalarization after
21371 subaccess propagation using the new functions above.
21372 (initialize_constant_pool_replacements): Output initializers by
21373 traversing the access tree.
21375 2020-01-29 Martin Jambor <mjambor@suse.cz>
21377 * tree-sra.c (verify_sra_access_forest): New function.
21378 (verify_all_sra_access_forests): Likewise.
21379 (create_artificial_child_access): Set parent.
21380 (analyze_all_variable_accesses): Call the verifier.
21382 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21384 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
21385 if called on indirect edge.
21386 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
21387 speculative call if needed.
21389 2020-01-29 Richard Biener <rguenther@suse.de>
21391 PR tree-optimization/93428
21392 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
21393 permutation when the load node is created.
21394 (vect_analyze_slp_instance): Re-use it here.
21396 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21398 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
21400 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
21402 PR rtl-optimization/93272
21403 * ira-lives.c (process_out_of_region_eh_regs): New function.
21404 (process_bb_node_lives): Call it.
21406 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21408 * coverage.c (read_counts_file): Make error message lowercase.
21410 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21412 * profile-count.c (profile_quality_display_names): Fix ordering.
21414 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21417 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
21418 hash only when edge is first within the sequence.
21419 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
21420 (symbol_table::create_edge): Do not set target_prob.
21421 (cgraph_edge::remove_caller): Watch for speculative calls when updating
21422 the call site hash.
21423 (cgraph_edge::make_speculative): Drop target_prob parameter.
21424 (cgraph_edge::speculative_call_info): Remove.
21425 (cgraph_edge::first_speculative_call_target): New member function.
21426 (update_call_stmt_hash_for_removing_direct_edge): New function.
21427 (cgraph_edge::resolve_speculation): Rewrite to new API.
21428 (cgraph_edge::speculative_call_for_target): New member function.
21429 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
21430 multiple speculation targets.
21431 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
21433 (verify_speculative_call): Verify that targets form an interval.
21434 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
21435 (cgraph_edge::first_speculative_call_target): New member function.
21436 (cgraph_edge::next_speculative_call_target): New member function.
21437 (cgraph_edge::speculative_call_target_ref): New member function.
21438 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
21439 (cgraph_edge): Remove target_prob.
21440 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
21441 Fix handling of speculative calls.
21442 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
21443 * ipa-fnsummary.c (analyze_function_body): Likewise.
21444 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
21445 * ipa-profile.c (dump_histogram): Fix formating.
21446 (ipa_profile_generate_summary): Watch for overflows.
21447 (ipa_profile): Do not require probablity to be 1/2; update to new API.
21448 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
21449 (update_indirect_edges_after_inlining): Update to new API.
21450 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
21452 * profile-count.h: (profile_probability::adjusted): New.
21453 * tree-inline.c (copy_bb): Update to new speculative call API; fix
21454 updating of profile.
21455 * value-prof.c (gimple_ic_transform): Rename to ...
21456 (dump_ic_profile): ... this one; update dumping.
21457 (stream_in_histogram_value): Fix formating.
21458 (gimple_value_profile_transformations): Update.
21460 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
21463 * config/i386/i386.md (*movoi_internal_avx): Remove
21464 TARGET_SSE_TYPELESS_STORES check.
21465 (*movti_internal): Prefer TARGET_AVX over
21466 TARGET_SSE_TYPELESS_STORES.
21467 (*movtf_internal): Likewise.
21468 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
21469 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
21470 from TARGET_SSE_TYPELESS_STORES.
21472 2020-01-28 David Malcolm <dmalcolm@redhat.com>
21474 * diagnostic-core.h (warning_at): Rename overload to...
21475 (warning_meta): ...this.
21476 (emit_diagnostic_valist): Delete decl of overload taking
21477 diagnostic_metadata.
21478 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
21479 (warning_at): Rename overload taking diagnostic_metadata to...
21480 (warning_meta): ...this.
21482 2020-01-28 Richard Biener <rguenther@suse.de>
21484 PR tree-optimization/93439
21485 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
21486 * tree-cfg.c (move_sese_region_to_fn): ... here.
21487 (verify_types_in_gimple_reference): Verify used cliques are
21490 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
21493 * config/i386/i386-options.c (set_ix86_tune_features): Add an
21494 argument of a pointer to struct gcc_options and pass it to
21495 parse_mtune_ctrl_str.
21496 (ix86_function_specific_restore): Pass opts to
21497 set_ix86_tune_features.
21498 (ix86_option_override_internal): Likewise.
21499 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
21500 gcc_options and use it for x_ix86_tune_ctrl_string.
21502 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21504 PR rtl-optimization/87763
21505 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
21506 simplification to handle subregs as well as bare regs.
21507 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
21509 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21511 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
21512 for reduction chains that (now) include a call.
21514 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21516 PR tree-optimization/92822
21517 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
21518 out the don't-care elements of a vector whose significant elements
21519 are duplicates, make the don't-care elements duplicates too.
21521 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21523 PR tree-optimization/93434
21524 * tree-predcom.c (split_data_refs_to_components): Record which
21525 components have had aliasing loads removed. Prevent store-store
21526 commoning for all such components.
21528 2020-01-28 Jakub Jelinek <jakub@redhat.com>
21531 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
21532 -1 or is_vshift is true, use new_vector with number of elts npatterns
21533 rather than new_unary_operation.
21535 PR tree-optimization/93454
21536 * gimple-fold.c (fold_array_ctor_reference): Perform
21537 elt_size.to_uhwi () just once, instead of calling it in every
21538 iteration. Punt if that value is above size of the temporary
21539 buffer. Decrease third native_encode_expr argument when
21540 bufoff + elt_sz is above size of buf.
21542 2020-01-27 Joseph Myers <joseph@codesourcery.com>
21544 * config/mips/mips.c (mips_declare_object_name)
21545 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
21547 2020-01-27 Martin Liska <mliska@suse.cz>
21549 PR gcov-profile/93403
21550 * tree-profile.c (gimple_init_gcov_profiler): Generate
21551 both __gcov_indirect_call_profiler_v4 and
21552 __gcov_indirect_call_profiler_v4_atomic.
21554 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21557 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
21559 (@aarch64_split_simd_mov<mode>): Use it.
21560 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
21561 Leave the vec_extract patterns to handle 2-element vectors.
21562 (aarch64_simd_mov_from_<mode>high): Likewise.
21563 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
21564 (vec_extractv2dfv1df): Likewise.
21566 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21568 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
21569 jump conditions for *compare_condjump<GPI:mode>.
21571 2020-01-27 David Malcolm <dmalcolm@redhat.com>
21574 * digraph.cc (test_edge::test_edge): Specify template for base
21577 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21579 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
21581 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21583 * config/arc/arc-protos.h (gen_mlo): Remove.
21584 (gen_mhi): Likewise.
21585 * config/arc/arc.c (AUX_MULHI): Define.
21586 (arc_must_save_reister): Special handling for r58/59.
21587 (arc_compute_frame_size): Consider mlo/mhi registers.
21588 (arc_save_callee_saves): Emit fp/sp move only when emit_move
21590 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
21591 mlo/mhi name selection.
21592 (arc_restore_callee_saves): Don't early restore blink when ISR.
21593 (arc_expand_prologue): Add mlo/mhi saving.
21594 (arc_expand_epilogue): Add mlo/mhi restoring.
21597 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
21598 numbering when MUL64 option is used.
21599 (DWARF2_FRAME_REG_OUT): Define.
21600 * config/arc/arc.md (arc600_stall): New pattern.
21601 (VUNSPEC_ARC_ARC600_STALL): Define.
21602 (mulsi64): Use correct mlo/mhi registers.
21603 (mulsi_600): Clean it up.
21604 * config/arc/predicates.md (mlo_operand): Remove any dependency on
21606 (mhi_operand): Likewise.
21608 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21609 Petro Karashchenko <petro.karashchenko@ring.com>
21611 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
21612 attributes if needed.
21613 (prepare_move_operands): Generate special unspec instruction for
21615 (arc_isuncached_mem_p): Propagate uncached attribute to each
21617 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
21618 (VUNSPEC_ARC_STDI): Likewise.
21619 (ALLI): New mode iterator.
21620 (mALLI): New mode attribute.
21621 (lddi): New instruction pattern.
21623 (stdidi_split): Split instruction for architectures which are not
21624 supporting ll64 option.
21625 (lddidi_split): Likewise.
21627 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21629 PR rtl-optimization/92989
21630 * lra-lives.c (process_bb_lives): Update the live-in set before
21631 processing additional clobbers.
21633 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21635 PR rtl-optimization/93170
21636 * cselib.c (cselib_invalidate_regno_val): New function, split out
21638 (cselib_invalidate_regno): ...here.
21639 (cselib_invalidated_by_call_p): New function.
21640 (cselib_process_insn): Iterate over all the hard-register entries in
21641 REG_VALUES and invalidate any that cross call-clobbered registers.
21643 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21645 * dojump.c (split_comparison): Use HONOR_NANS rather than
21646 HONOR_SNANS when splitting LTGT.
21648 2020-01-27 Martin Liska <mliska@suse.cz>
21651 * opts.c (print_filtered_help): Exclude language-specific
21652 options from --help=common unless enabled in all FEs.
21654 2020-01-27 Martin Liska <mliska@suse.cz>
21656 * opts.c (print_help): Exclude params from
21657 all except --help=param.
21659 2020-01-27 Martin Liska <mliska@suse.cz>
21662 * config/i386/i386-features.c (make_resolver_func):
21663 Align the code with ppc64 target implementation.
21664 Do not generate a unique name for resolver function.
21666 2020-01-27 Richard Biener <rguenther@suse.de>
21668 PR tree-optimization/93397
21669 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
21670 converted reduction chain SLP graph adjustment.
21672 2020-01-26 Marek Polacek <polacek@redhat.com>
21675 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
21678 2020-01-26 Jason Merrill <jason@redhat.com>
21681 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
21684 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
21686 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
21687 (rx_setmem): Likewise.
21689 2020-01-26 Jakub Jelinek <jakub@redhat.com>
21692 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
21693 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
21694 drop <di> from constraint of last operand.
21697 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
21698 TARGET_AVX2 and V4DFmode not in the split condition, but in the
21699 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
21701 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
21704 * ipa-cp.c (get_info_about_necessary_edges): Remove value
21707 2020-01-24 Jeff Law <law@redhat.com>
21709 PR tree-optimization/92788
21710 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
21713 2020-01-24 Jakub Jelinek <jakub@redhat.com>
21716 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
21717 *avx_vperm_broadcast_<mode>,
21718 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
21719 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
21720 Move before avx2_perm<mode>/avx512f_perm<mode>.
21723 * simplify-rtx.c (simplify_const_unary_operation,
21724 simplify_const_binary_operation): Punt for mode precision above
21725 MAX_BITSIZE_MODE_ANY_INT.
21727 2020-01-24 Andrew Pinski <apinski@marvell.com>
21729 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
21730 alu.shift_reg to 0.
21732 2020-01-24 Jeff Law <law@redhat.com>
21735 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
21736 for REGs. Call output_operand_lossage to get more reasonable
21739 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
21741 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
21742 gcn_fp_compare_operator.
21743 (vec_cmpu<mode>di): Use gcn_compare_operator.
21744 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
21745 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
21746 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
21747 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
21748 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
21749 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
21750 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
21751 gcn_fp_compare_operator.
21752 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
21753 gcn_fp_compare_operator.
21754 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
21755 gcn_fp_compare_operator.
21756 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
21757 gcn_fp_compare_operator.
21759 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
21761 * doc/install.texi (Cross-Compiler-Specific Options): Document
21762 `--with-toolexeclibdir' option.
21764 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
21766 * target.def (flags_regnum): Also mention effect on delay slot filling.
21767 * doc/tm.texi: Regenerate.
21769 2020-01-23 Jeff Law <law@redhat.com>
21771 PR translation/90162
21772 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
21774 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
21777 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
21780 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21782 PR rtl-optimization/93402
21783 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
21786 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21788 * config.in: Regenerated.
21789 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
21790 for TARGET_LIBC_GNUSTACK.
21791 * configure: Regenerated.
21792 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
21793 found to be 2.31 or greater.
21795 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21797 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
21799 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
21800 (mips_asm_file_end): New function. Delegate to
21801 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
21802 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
21804 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21807 * config/i386/i386-modes.def (POImode): New mode.
21808 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
21809 * config/i386/i386.md (DPWI): New mode attribute.
21810 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
21811 (QWI): Rename to...
21812 (QPWI): ... this. Use POI instead of OI for TImode.
21813 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
21814 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
21817 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21820 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
21822 (speculation_tracker_rev): New pattern.
21823 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
21824 Use speculation_tracker_rev to track the inverse condition.
21826 2020-01-23 Richard Biener <rguenther@suse.de>
21828 PR tree-optimization/93381
21829 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
21830 alias-set of the def as argument and record the first one.
21831 (vn_walk_cb_data::first_set): New member.
21832 (vn_reference_lookup_3): Pass the alias-set of the current def
21833 to push_partial_def. Fix alias-set used in the aggregate copy
21835 (vn_reference_lookup): Consistently set *last_vuse_ptr.
21836 * real.c (clear_significand_below): Fix out-of-bound access.
21838 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21841 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
21842 New define_insn patterns.
21844 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21846 * doc/sourcebuild.texi (check-function-bodies): Add an
21847 optional target/xfail selector.
21849 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21851 PR rtl-optimization/93124
21852 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
21853 bare USE and CLOBBER insns.
21855 2020-01-22 Andrew Pinski <apinski@marvell.com>
21857 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
21859 2020-01-22 David Malcolm <dmalcolm@redhat.com>
21862 * gdbinit.in (break-on-saved-diagnostic): Update for move of
21863 diagnostic_manager into "ana" namespace.
21864 * selftest-run-tests.c (selftest::run_tests): Update for move of
21865 selftest::run_analyzer_selftests to
21866 ana::selftest::run_analyzer_selftests.
21868 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
21870 * cfgexpand.c (union_stack_vars): Update the size.
21872 2020-01-22 Richard Biener <rguenther@suse.de>
21874 PR tree-optimization/93381
21875 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
21876 throughout, handle all conversions the same.
21878 2020-01-22 Jakub Jelinek <jakub@redhat.com>
21881 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
21882 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
21883 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
21884 Call force_reg on high_in2 unconditionally.
21886 2020-01-22 Martin Liska <mliska@suse.cz>
21888 PR tree-optimization/92924
21889 * profile.c (compute_value_histograms): Divide
21890 all counter values.
21892 2020-01-22 Jakub Jelinek <jakub@redhat.com>
21895 * output.h (assemble_name_resolve): Declare.
21896 * varasm.c (assemble_name_resolve): New function.
21897 (assemble_name): Use it.
21898 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
21900 2020-01-22 Joseph Myers <joseph@codesourcery.com>
21902 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
21903 update_web_docs_git instead of update_web_docs_svn.
21905 2020-01-21 Andrew Pinski <apinski@marvell.com>
21908 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
21909 as PTR mode. Have operand 1 as being modeless, it can be P mode.
21910 (*tlsgd_small_<mode>): Likewise.
21911 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
21912 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
21913 register. Convert that register back to dest using convert_mode.
21915 2020-01-21 Jim Wilson <jimw@sifive.com>
21917 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
21920 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
21921 Uros Bizjak <ubizjak@gmail.com>
21924 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
21926 (legitimize_tls_address): Do GNU2 TLS address computation in
21927 ptr_mode and zero-extend result to Pmode.
21928 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
21929 :P with :PTR and Pmode with ptr_mode.
21930 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
21931 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
21932 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
21934 2020-01-21 Jakub Jelinek <jakub@redhat.com>
21937 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
21938 the last two operands are CONST_INT_P before using them as such.
21940 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
21942 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
21943 to get the integer element types.
21945 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
21947 * config/aarch64/aarch64-sve-builtins.h
21948 (function_expander::convert_to_pmode): Declare.
21949 * config/aarch64/aarch64-sve-builtins.cc
21950 (function_expander::convert_to_pmode): New function.
21951 (function_expander::get_contiguous_base): Use it.
21952 (function_expander::prepare_gather_address_operands): Likewise.
21953 * config/aarch64/aarch64-sve-builtins-sve2.cc
21954 (svwhilerw_svwhilewr_impl::expand): Likewise.
21956 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
21959 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
21960 cfun->machine->label_is_assembled.
21961 (aarch64_print_patchable_function_entry): New.
21962 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
21963 * config/aarch64/aarch64.h (struct machine_function): New field,
21964 label_is_assembled.
21966 2020-01-21 David Malcolm <dmalcolm@redhat.com>
21969 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
21972 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
21975 * cgraph.c (cgraph_edge::resolve_speculation,
21976 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
21977 call_stmt_site_hash.
21979 2020-01-21 Martin Liska <mliska@suse.cz>
21981 * config/rs6000/rs6000.c (common_mode_defined): Remove
21984 2020-01-21 Richard Biener <rguenther@suse.de>
21986 PR tree-optimization/92328
21987 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
21988 type when value-numbering same-sized store by inserting a
21990 (eliminate_dom_walker::eliminate_stmt): When eliminating
21991 a redundant store handle bit-reinterpretation of the same value.
21993 2020-01-21 Andrew Pinski <apinski@marvel.com>
21996 * tree-into-ssa.c (prepare_block_for_update_1): Split out
21998 (prepare_block_for_update): This. Use a worklist instead of
22001 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22003 * config/arm/arm.c (clear_operation_p):
22004 Initialise last_regno, skip first iteration
22005 based on the first_set value and use ints instead
22006 of the unnecessary HOST_WIDE_INTs.
22008 2020-01-21 Jakub Jelinek <jakub@redhat.com>
22011 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
22012 compare_mode other than SFmode or DFmode.
22014 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22017 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
22018 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
22019 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
22021 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
22023 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
22025 2020-01-20 Andrew Pinski <apinski@marvell.com>
22027 PR middle-end/93242
22028 * targhooks.c (default_print_patchable_function_entry): Use
22029 output_asm_insn to emit the nop instruction.
22031 2020-01-20 Fangrui Song <maskray@google.com>
22033 PR middle-end/93194
22034 * targhooks.c (default_print_patchable_function_entry): Align to
22037 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
22040 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
22041 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
22042 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
22043 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
22044 (*tls_dynamic_gnu2_lea_64): Renamed to ...
22045 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
22046 Remove the {q} suffix from lea.
22047 (*tls_dynamic_gnu2_call_64): Renamed to ...
22048 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
22049 (*tls_dynamic_gnu2_combine_64): Renamed to ...
22050 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
22051 Pass Pmode to gen_tls_dynamic_gnu2_64.
22053 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
22055 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
22057 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
22059 * config/aarch64/aarch64-sve-builtins-base.cc
22060 (svld1ro_impl::memory_vector_mode): Remove parameter name.
22062 2020-01-20 Richard Biener <rguenther@suse.de>
22065 * dwarf2out.c (prune_unused_types): Unconditionally mark
22066 called function DIEs.
22068 2020-01-20 Martin Liska <mliska@suse.cz>
22070 PR tree-optimization/93199
22071 * tree-eh.c (struct leh_state): Add
22072 new field outer_non_cleanup.
22073 (cleanup_is_dead_in): Pass leh_state instead
22074 of eh_region. Add a checking that state->outer_non_cleanup
22075 points to outer non-clean up region.
22076 (lower_try_finally): Record outer_non_cleanup
22078 (lower_catch): Likewise.
22079 (lower_eh_filter): Likewise.
22080 (lower_eh_must_not_throw): Likewise.
22081 (lower_cleanup): Likewise.
22083 2020-01-20 Richard Biener <rguenther@suse.de>
22085 PR tree-optimization/93094
22086 * tree-vectorizer.h (vect_loop_versioning): Adjust.
22087 (vect_transform_loop): Likewise.
22088 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
22089 loop_vectorized_call to vect_transform_loop.
22090 * tree-vect-loop.c (vect_transform_loop): Pass down
22091 loop_vectorized_call to vect_loop_versioning.
22092 * tree-vect-loop-manip.c (vect_loop_versioning): Use
22093 the earlier discovered loop_vectorized_call.
22095 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
22097 * doc/contribute.texi: Update for SVN -> Git transition.
22098 * doc/install.texi: Likewise.
22100 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22103 * cgraph.c (cgraph_edge::make_speculative): Increase number of
22104 speculative targets.
22105 (verify_speculative_call): New function
22106 (cgraph_node::verify_node): Use it.
22107 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
22110 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22113 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
22114 (cgraph_edge::make_direct): Remove all indirect targets.
22115 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
22116 (cgraph_node::verify_node): Verify that only one call_stmt or
22117 lto_stmt_uid is set.
22118 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
22120 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
22121 (lto_output_ref): Simplify streaming of stmt.
22122 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
22124 2020-01-18 Tamar Christina <tamar.christina@arm.com>
22126 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
22127 Mark parameter unused.
22129 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
22131 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
22133 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
22135 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
22137 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
22139 * Makefile.in: Add coroutine-passes.o.
22140 * builtin-types.def (BT_CONST_SIZE): New.
22141 (BT_FN_BOOL_PTR): New.
22142 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
22143 * builtins.def (DEF_COROUTINE_BUILTIN): New.
22144 * coroutine-builtins.def: New file.
22145 * coroutine-passes.cc: New file.
22146 * function.h (struct GTY function): Add a bit to indicate that the
22147 function is a coroutine component.
22148 * internal-fn.c (expand_CO_FRAME): New.
22149 (expand_CO_YIELD): New.
22150 (expand_CO_SUSPN): New.
22151 (expand_CO_ACTOR): New.
22152 * internal-fn.def (CO_ACTOR): New.
22156 * passes.def: Add pass_coroutine_lower_builtins,
22157 pass_coroutine_early_expand_ifns.
22158 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
22159 (make_pass_coroutine_early_expand_ifns): New.
22160 * doc/invoke.texi: Document the fcoroutines command line
22163 2020-01-18 Jakub Jelinek <jakub@redhat.com>
22165 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
22168 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
22169 after checking the argument is a REG. Don't use REGNO (reg)
22170 again to set last_regno, reuse regno variable instead.
22172 2020-01-17 David Malcolm <dmalcolm@redhat.com>
22174 * doc/analyzer.texi (Limitations): Add note about NaN.
22176 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22177 Sudakshina Das <sudi.das@arm.com>
22179 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
22180 and valid immediate.
22181 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
22182 (lshrdi3): Generate thumb2_lsrl for valid immediates.
22183 * config/arm/constraints.md (Pg): New.
22184 * config/arm/predicates.md (long_shift_imm): New.
22185 (arm_reg_or_long_shift_imm): Likewise.
22186 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
22187 (thumb2_lsll): Likewise.
22188 (thumb2_lsrl): New.
22190 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22191 Sudakshina Das <sudi.das@arm.com>
22193 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
22194 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
22195 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
22196 register pairs for doubleword quantities for ARMv8.1M-Mainline.
22197 * config/arm/thumb2.md (thumb2_asrl): New.
22198 (thumb2_lsll): Likewise.
22200 2020-01-17 Jakub Jelinek <jakub@redhat.com>
22202 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
22205 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
22207 * gdbinit.in (help-gcc-hooks): New command.
22208 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
22209 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
22212 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22214 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
22215 correct target macro.
22217 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22219 * config/aarch64/aarch64-protos.h
22220 (aarch64_sve_ld1ro_operand_p): New.
22221 * config/aarch64/aarch64-sve-builtins-base.cc
22222 (class load_replicate): New.
22223 (class svld1ro_impl): New.
22224 (class svld1rq_impl): Change to inherit from load_replicate.
22225 (svld1ro): New sve intrinsic function base.
22226 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
22227 New DEF_SVE_FUNCTION.
22228 * config/aarch64/aarch64-sve-builtins-base.h
22229 (svld1ro): New decl.
22230 * config/aarch64/aarch64-sve-builtins.cc
22231 (function_expander::add_mem_operand): Modify assert to allow
22233 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
22235 * config/aarch64/aarch64.c
22236 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
22237 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
22238 (aarch64_sve_ld1ro_operand_p): New.
22239 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
22240 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
22241 * config/aarch64/predicates.md
22242 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
22244 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22246 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
22247 Introduce this ACLE specified predefined macro.
22248 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
22249 (fp): Disabling this disables f64mm.
22250 (simd): Disabling this disables f64mm.
22251 (fp16): Disabling this disables f64mm.
22252 (sve): Disabling this disables f64mm.
22253 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
22254 (AARCH64_ISA_F64MM): New.
22255 (TARGET_F64MM): New.
22256 * doc/invoke.texi (f64mm): Document new option.
22258 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
22260 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
22261 (neoversen1_tunings): Likewise.
22263 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
22266 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
22267 Add assert to ensure prolog has been emitted.
22268 (aarch64_split_atomic_op): Likewise.
22269 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
22270 Use epilogue_completed rather than reload_completed.
22271 (aarch64_atomic_exchange<mode>): Likewise.
22272 (aarch64_atomic_<atomic_optab><mode>): Likewise.
22273 (atomic_nand<mode>): Likewise.
22274 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
22275 (atomic_fetch_nand<mode>): Likewise.
22276 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
22277 (atomic_nand_fetch<mode>): Likewise.
22279 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
22282 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
22284 (REVERSE_CONDITION): Delete.
22285 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
22286 (CCFP_CCFPE): Likewise.
22287 (e): New mode attribute.
22288 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
22289 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
22290 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
22291 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
22292 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
22293 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
22294 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
22295 name of generator from gen_ccmpdi to gen_ccmpccdi.
22296 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
22297 the previous comparison but aren't able to, use the new ccmp_rev
22300 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
22302 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
22303 than testing directly for INTEGER_CST.
22304 (gimplify_target_expr, gimplify_omp_depend): Likewise.
22306 2020-01-17 Jakub Jelinek <jakub@redhat.com>
22308 PR tree-optimization/93292
22309 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
22310 get_vectype_for_scalar_type returns NULL.
22312 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
22314 * params.opt (-param=max-predicted-iterations): Increase range from 0.
22315 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
22317 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
22319 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
22321 * params.opt: (max-predicted-iterations): Set bounds.
22322 * predict.c (real_almost_one, real_br_prob_base,
22323 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
22324 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
22325 probabilities; do not truncate to reg_br_prob_bases.
22326 (estimate_loops_at_level): Pass max_cyclic_prob.
22327 (estimate_loops): Compute max_cyclic_prob.
22328 (estimate_bb_frequencies): Do not initialize real_*; update calculation
22330 * profile-count.c (profile_probability::to_sreal): New.
22331 * profile-count.h (class sreal): Move up in file.
22332 (profile_probability::to_sreal): Declare.
22334 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22337 (arm_invalid_conversion): New function for target hook.
22338 (arm_invalid_unary_op): New function for target hook.
22339 (arm_invalid_binary_op): New function for target hook.
22341 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22343 * config.gcc: Add arm_bf16.h.
22344 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
22345 (arm_simd_builtin_std_type): Add BFmode.
22346 (arm_init_simd_builtin_types): Define element types for vector types.
22347 (arm_init_bf16_types): New function.
22348 (arm_init_builtins): Add arm_init_bf16_types function call.
22349 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
22350 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
22351 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
22352 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
22353 (arm_vector_mode_supported_p): Add V4BF, V8BF.
22354 (arm_mangle_type): Add __bf16.
22355 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
22356 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
22357 arm_bf16_ptr_type_node.
22358 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
22359 define_split between ARM registers.
22360 * config/arm/arm_bf16.h: New file.
22361 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
22362 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
22363 (VQXMOV): Add V8BF.
22364 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
22365 * config/arm/vfp.md: Add BFmode to movhf patterns.
22367 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
22368 Andre Vieira <andre.simoesdiasvieira@arm.com>
22370 * config/arm/arm-cpus.in (mve, mve_float): New features.
22371 (dsp, mve, mve.fp): New options.
22372 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
22373 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
22374 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
22376 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22377 Thomas Preud'homme <thomas.preudhomme@arm.com>
22379 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
22381 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
22382 error for using -mcmse when targeting Armv8.1-M Mainline.
22384 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22385 Thomas Preud'homme <thomas.preudhomme@arm.com>
22387 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
22388 address in r4 when targeting Armv8.1-M Mainline.
22389 (nonsecure_call_value_internal): Likewise.
22390 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
22391 a register match_operand again. Emit BLXNS when targeting
22392 Armv8.1-M Mainline.
22393 (nonsecure_call_value_reg_thumb2): Likewise.
22395 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22396 Thomas Preud'homme <thomas.preudhomme@arm.com>
22398 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
22399 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
22400 variable as true when floating-point ABI is not hard. Replace
22401 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
22402 Generate VLSTM and VLLDM instruction respectively before and
22403 after a function call to cmse_nonsecure_call function.
22404 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
22405 (VUNSPEC_VLLDM): Likewise.
22406 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
22407 (lazy_load_multiple_insn): Likewise.
22409 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22410 Thomas Preud'homme <thomas.preudhomme@arm.com>
22412 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
22413 (arm_emit_vfp_multi_reg_pop): Likewise.
22414 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
22415 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
22416 restore callee-saved VFP registers.
22418 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22419 Thomas Preud'homme <thomas.preudhomme@arm.com>
22421 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
22422 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
22423 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
22424 callee-saved GPRs as well as clear ip register before doing a nonsecure
22425 call then restore callee-saved GPRs after it when targeting
22426 Armv8.1-M Mainline.
22427 (arm_reorg): Adapt to function rename.
22429 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22430 Thomas Preud'homme <thomas.preudhomme@arm.com>
22432 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
22433 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
22434 clear_vfp_multiple pattern based on a new vfp parameter.
22435 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
22436 targeting Armv8.1-M Mainline.
22437 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
22438 unconditionally when targeting Armv8.1-M Mainline architecture. Check
22439 whether VFP registers are available before looking call_used_regs for a
22441 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
22442 of prototype of clear_operation_p.
22443 (clear_vfp_multiple_operation): New predicate.
22444 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
22445 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
22447 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22448 Thomas Preud'homme <thomas.preudhomme@arm.com>
22450 * config/arm/arm-protos.h (clear_operation_p): Declare.
22451 * config/arm/arm.c (clear_operation_p): New function.
22452 (cmse_clear_registers): Generate clear_multiple instruction pattern if
22453 targeting Armv8.1-M Mainline or successor.
22454 (output_return_instruction): Only output APSR register clearing if
22455 Armv8.1-M Mainline instructions not available.
22456 (thumb_exit): Likewise.
22457 * config/arm/predicates.md (clear_multiple_operation): New predicate.
22458 * config/arm/thumb2.md (clear_apsr): New define_insn.
22459 (clear_multiple): Likewise.
22460 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
22462 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22463 Thomas Preud'homme <thomas.preudhomme@arm.com>
22465 * config/arm/arm.c (fp_sysreg_names): Declare and define.
22466 (use_return_insn): Also return false for Armv8.1-M Mainline.
22467 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
22468 Mainline instructions are available.
22469 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
22470 when targeting Armv8.1-M Mainline Security Extensions.
22471 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
22472 Mainline entry function.
22473 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
22474 targeting Armv8.1-M Mainline or successor.
22475 (arm_expand_epilogue): Fix indentation of caller-saved register
22476 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
22478 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
22479 (FP_SYSREGS): Likewise.
22480 (enum vfp_sysregs_encoding): Define enum.
22481 (fp_sysreg_names): Declare.
22482 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
22483 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
22484 (pop_fpsysreg_insn): Likewise.
22486 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22487 Thomas Preud'homme <thomas.preudhomme@arm.com>
22489 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
22490 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
22491 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
22492 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
22493 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
22494 (ARMv8_1m_main): New feature group.
22495 (armv8.1-m.main): New architecture.
22496 * config/arm/arm-tables.opt: Regenerate.
22497 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
22498 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
22499 (arm_options_perform_arch_sanity_checks): Error out when targeting
22500 Armv8.1-M Mainline Security Extensions.
22501 * config/arm/arm.h (arm_arch8_1m_main): Declare.
22503 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22505 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
22506 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
22507 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
22508 aarch64_bfdot_laneq): New.
22509 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
22510 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
22511 vbfdotq_laneq_f32): New.
22512 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
22513 VBFMLA_W, VBF): New.
22514 (isquadop): Add V4BF, V8BF.
22516 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22518 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
22519 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
22520 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
22521 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
22522 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
22523 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
22524 usdot_laneq, sudot_lane,sudot_laneq): New.
22525 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
22526 (aarch64_<sur>dot_lane): New.
22527 * config/aarch64/arm_neon.h (vusdot_s32): New.
22528 (vusdotq_s32): New.
22529 (vusdot_lane_s32): New.
22530 (vsudot_lane_s32): New.
22531 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
22532 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
22534 2020-01-16 Martin Liska <mliska@suse.cz>
22536 * value-prof.c (dump_histogram_value): Fix
22537 obvious spacing issue.
22539 2020-01-16 Andrew Pinski <apinski@marvell.com>
22541 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
22542 !storage_order_barrier_p.
22544 2020-01-16 Andrew Pinski <apinski@marvell.com>
22546 * sched-int.h (_dep): Add unused bit-field field for the padding.
22547 * sched-deps.c (init_dep_1): Init unused field.
22549 2020-01-16 Andrew Pinski <apinski@marvell.com>
22551 * optabs.h (create_expand_operand): Initialize target field also.
22553 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
22555 PR tree-optimization/92429
22556 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
22557 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
22559 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
22562 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
22564 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
22565 aarch64_sve_int_mode to each mode.
22567 2020-01-15 David Malcolm <dmalcolm@redhat.com>
22569 * doc/analyzer.texi (Overview): Add note about
22570 -fdump-ipa-analyzer.
22572 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
22574 PR tree-optimization/93231
22575 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
22576 input_type is unsigned. Use tree_to_shwi for shift constant.
22577 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
22578 (simplify_count_trailing_zeroes): Add test to handle known non-zero
22579 inputs more efficiently.
22581 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
22583 * config/i386/i386.md (*movsf_internal): Do not require
22584 SSE2 ISA for alternatives 14 and 15.
22586 2020-01-15 Richard Biener <rguenther@suse.de>
22588 PR middle-end/93273
22589 * tree-eh.c (sink_clobbers): If we already visited the destination
22590 block do not defer insertion.
22591 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
22592 the purpose of defered insertion.
22594 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22596 * BASE-VER: Bump to 10.0.1.
22598 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
22600 PR tree-optimization/93247
22601 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
22602 type of the stmt that we're going to vectorize.
22604 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
22606 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
22607 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
22610 2020-01-15 Martin Liska <mliska@suse.cz>
22612 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
22613 2 calls of streamer_read_hwi in a function call.
22615 2020-01-15 Richard Biener <rguenther@suse.de>
22617 * alias.c (record_alias_subset): Avoid redundant work when
22618 subset is already recorded.
22620 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22622 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
22623 the analyzer options provide CWE identifiers.
22625 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22627 * tree-diagnostic-path.cc (path_summary::event_range::print):
22628 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
22629 using get_pure_location.
22631 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22633 PR tree-optimization/93262
22634 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
22635 perform head trimming only if the last argument is constant,
22636 either all ones, or larger or equal to head trim, in the latter
22637 case decrease the last argument by head_trim.
22639 PR tree-optimization/93249
22640 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
22641 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
22642 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
22643 perform head trim unless we can prove there are no '\0' chars
22644 from the source among the first head_trim chars.
22646 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22648 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
22650 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22653 * config/i386/sse.md
22654 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
22655 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
22656 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
22657 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
22658 just a single alternative instead of two, make operands 1 and 2
22661 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
22664 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
22667 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22669 * Makefile.in (lang_opt_files): Add analyzer.opt.
22670 (ANALYZER_OBJS): New.
22671 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
22672 tristate.o and ANALYZER_OBJS.
22673 (TEXI_GCCINT_FILES): Add analyzer.texi.
22674 * common.opt (-fanalyzer): New driver option.
22675 * config.in: Regenerate.
22676 * configure: Regenerate.
22677 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
22678 (gccdepdir): Also create depdir for "analyzer" subdir.
22679 * digraph.cc: New file.
22680 * digraph.h: New file.
22681 * doc/analyzer.texi: New file.
22682 * doc/gccint.texi ("Static Analyzer") New menu item.
22683 (analyzer.texi): Include it.
22684 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
22685 ("Warning Options"): Add static analysis warnings to the list.
22686 (-Wno-analyzer-double-fclose): New option.
22687 (-Wno-analyzer-double-free): New option.
22688 (-Wno-analyzer-exposure-through-output-file): New option.
22689 (-Wno-analyzer-file-leak): New option.
22690 (-Wno-analyzer-free-of-non-heap): New option.
22691 (-Wno-analyzer-malloc-leak): New option.
22692 (-Wno-analyzer-possible-null-argument): New option.
22693 (-Wno-analyzer-possible-null-dereference): New option.
22694 (-Wno-analyzer-null-argument): New option.
22695 (-Wno-analyzer-null-dereference): New option.
22696 (-Wno-analyzer-stale-setjmp-buffer): New option.
22697 (-Wno-analyzer-tainted-array-index): New option.
22698 (-Wno-analyzer-use-after-free): New option.
22699 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
22700 (-Wno-analyzer-use-of-uninitialized-value): New option.
22701 (-Wanalyzer-too-complex): New option.
22702 (-fanalyzer-call-summaries): New warning.
22703 (-fanalyzer-checker=): New warning.
22704 (-fanalyzer-fine-grained): New warning.
22705 (-fno-analyzer-state-merge): New warning.
22706 (-fno-analyzer-state-purge): New warning.
22707 (-fanalyzer-transitivity): New warning.
22708 (-fanalyzer-verbose-edges): New warning.
22709 (-fanalyzer-verbose-state-changes): New warning.
22710 (-fanalyzer-verbosity=): New warning.
22711 (-fdump-analyzer): New warning.
22712 (-fdump-analyzer-callgraph): New warning.
22713 (-fdump-analyzer-exploded-graph): New warning.
22714 (-fdump-analyzer-exploded-nodes): New warning.
22715 (-fdump-analyzer-exploded-nodes-2): New warning.
22716 (-fdump-analyzer-exploded-nodes-3): New warning.
22717 (-fdump-analyzer-supergraph): New warning.
22718 * doc/sourcebuild.texi (dg-require-dot): New.
22719 (dg-check-dot): New.
22720 * gdbinit.in (break-on-saved-diagnostic): New command.
22721 * graphviz.cc: New file.
22722 * graphviz.h: New file.
22723 * ordered-hash-map-tests.cc: New file.
22724 * ordered-hash-map.h: New file.
22725 * passes.def (pass_analyzer): Add before
22726 pass_ipa_whole_program_visibility.
22727 * selftest-run-tests.c (selftest::run_tests): Call
22728 selftest::ordered_hash_map_tests_cc_tests.
22729 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
22731 * shortest-paths.h: New file.
22732 * timevar.def (TV_ANALYZER): New timevar.
22733 (TV_ANALYZER_SUPERGRAPH): Likewise.
22734 (TV_ANALYZER_STATE_PURGE): Likewise.
22735 (TV_ANALYZER_PLAN): Likewise.
22736 (TV_ANALYZER_SCC): Likewise.
22737 (TV_ANALYZER_WORKLIST): Likewise.
22738 (TV_ANALYZER_DUMP): Likewise.
22739 (TV_ANALYZER_DIAGNOSTICS): Likewise.
22740 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
22741 * tree-pass.h (make_pass_analyzer): New decl.
22742 * tristate.cc: New file.
22743 * tristate.h: New file.
22745 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
22748 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
22749 alternatives 9 and 10.
22751 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22753 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
22754 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
22755 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
22756 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
22757 (selftest::hash_map_tests_c_tests): Call it.
22758 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
22759 New static constant, using the value of = H::empty_zero_p.
22760 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
22761 from default_hash_traits <Value>.
22762 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
22764 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
22765 * hash-table.h (hash_table::alloc_entries): Guard the loop of
22766 calls to mark_empty with !Descriptor::empty_zero_p.
22767 (hash_table::empty_slow): Conditionalize the memset call with a
22768 check that Descriptor::empty_zero_p; otherwise, loop through the
22769 entries calling mark_empty on them.
22770 * hash-traits.h (int_hash::empty_zero_p): New static constant.
22771 (pointer_hash::empty_zero_p): Likewise.
22772 (pair_hash::empty_zero_p): Likewise.
22773 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
22775 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
22776 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
22777 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
22778 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
22779 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
22780 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
22781 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
22782 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
22783 * tree-vectorizer.h
22784 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
22787 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
22789 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
22790 fix typo on return value.
22792 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
22795 * cgraph.c (symbol_table::create_edge): Init speculative_id and
22797 (cgraph_edge::make_speculative): Add param for setting speculative_id
22799 (cgraph_edge::speculative_call_info): Update comments and find reference
22800 by speculative_id for multiple indirect targets.
22801 (cgraph_edge::resolve_speculation): Decrease the speculations
22802 for indirect edge, drop it's speculative if not direct target
22803 left. Update comments.
22804 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
22805 (cgraph_node::dump): Print num_speculative_call_targets.
22806 (cgraph_node::verify_node): Don't report error if speculative
22807 edge not include statement.
22808 (cgraph_edge::num_speculative_call_targets_p): New function.
22809 * cgraph.h (int common_target_id): Remove.
22810 (int common_target_probability): Remove.
22811 (num_speculative_call_targets): New variable.
22812 (make_speculative): Add param for setting speculative_id.
22813 (cgraph_edge::num_speculative_call_targets_p): New declare.
22814 (target_prob): New variable.
22815 (speculative_id): New variable.
22816 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
22817 call summaries for multiple speculative call targets.
22818 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
22819 * ipa-profile.c (struct speculative_call_target): New struct.
22820 (class speculative_call_summary): New class.
22821 (class speculative_call_summaries): New class.
22822 (call_sums): New variable.
22823 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
22824 (ipa_profile_write_edge_summary): New function.
22825 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
22826 (ipa_profile_dump_all_summaries): New function.
22827 (ipa_profile_read_edge_summary): New function.
22828 (ipa_profile_read_summary_section): New function.
22829 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
22830 (ipa_profile): Generate num_speculative_call_targets from
22832 * ipa-ref.h (speculative_id): New variable.
22833 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
22834 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
22835 common_target_probability. Stream out speculative_id and
22836 num_speculative_call_targets.
22837 (input_edge): Likewise.
22838 * predict.c (dump_prediction): Remove edges count assert to be
22840 * symtab.c (symtab_node::create_reference): Init speculative_id.
22841 (symtab_node::clone_references): Clone speculative_id.
22842 (symtab_node::clone_referring): Clone speculative_id.
22843 (symtab_node::clone_reference): Clone speculative_id.
22844 (symtab_node::clear_stmts_in_references): Clear speculative_id.
22845 * tree-inline.c (copy_bb): Duplicate all the speculative edges
22846 if indirect call contains multiple speculative targets.
22847 * value-prof.h (check_ic_target): Remove.
22848 * value-prof.c (gimple_value_profile_transformations):
22849 Use void function gimple_ic_transform.
22850 * value-prof.c (gimple_ic_transform): Handle topn case.
22851 Fix comment typos. Change it to a void function.
22853 2020-01-13 Andrew Pinski <apinski@marvell.com>
22855 * config/aarch64/aarch64-cores.def (octeontx2): New define.
22856 (octeontx2t98): New define.
22857 (octeontx2t96): New define.
22858 (octeontx2t93): New define.
22859 (octeontx2f95): New define.
22860 (octeontx2f95n): New define.
22861 (octeontx2f95mm): New define.
22862 * config/aarch64/aarch64-tune.md: Regenerate.
22863 * doc/invoke.texi (-mcpu=): Document the new cpu types.
22865 2020-01-13 Jason Merrill <jason@redhat.com>
22867 PR c++/33799 - destroy return value if local cleanup throws.
22868 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
22870 2020-01-13 Martin Liska <mliska@suse.cz>
22872 * ipa-cp.c (get_max_overall_size): Use newly
22873 renamed param param_ipa_cp_unit_growth.
22874 * params.opt: Remove legacy param name.
22876 2020-01-13 Martin Sebor <msebor@redhat.com>
22878 PR tree-optimization/93213
22879 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
22880 stores to be eliminated.
22882 2020-01-13 Martin Liska <mliska@suse.cz>
22884 * opts.c (print_help): Do not print CL_PARAM
22885 and CL_WARNING for CL_OPTIMIZATION.
22887 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
22890 * doc/invoke.texi (Warning Options): Add caveat about some warnings
22891 depending on optimization settings.
22893 2020-01-13 Jakub Jelinek <jakub@redhat.com>
22895 PR tree-optimization/90838
22896 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
22897 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
22898 argument rather than to initialize temporary for targets that
22899 don't use the mode argument at all. Initialize ctzval to avoid
22902 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
22904 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
22905 * tree-core.h: Document it.
22906 * gimplify.c (gimplify_omp_workshare): Set it.
22907 * omp-low.c (lower_omp_target): Use it.
22908 * tree-pretty-print.c (dump_omp_clause): Print it.
22910 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
22911 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
22913 2020-01-10 David Malcolm <dmalcolm@redhat.com>
22915 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
22916 * common.opt (fdiagnostics-path-format=): New option.
22917 (diagnostic_path_format): New enum.
22918 (fdiagnostics-show-path-depths): New option.
22919 * coretypes.h (diagnostic_event_id_t): New forward decl.
22920 * diagnostic-color.c (color_dict): Add "path".
22921 * diagnostic-event-id.h: New file.
22922 * diagnostic-format-json.cc (json_from_expanded_location): Make
22924 (json_end_diagnostic): Call context->make_json_for_path if it
22925 exists and the diagnostic has a path.
22926 (diagnostic_output_format_init): Clear context->print_path.
22927 * diagnostic-path.h: New file.
22928 * diagnostic-show-locus.c (colorizer::set_range): Special-case
22929 when printing a run of events in a diagnostic_path so that they
22930 all get the same color.
22931 (layout::m_diagnostic_path_p): New field.
22932 (layout::layout): Initialize it.
22933 (layout::print_any_labels): Don't colorize the label text for an
22934 event in a diagnostic_path.
22935 (gcc_rich_location::add_location_if_nearby): Add
22936 "restrict_to_current_line_spans" and "label" params. Pass the
22937 former to layout.maybe_add_location_range; pass the latter
22938 when calling add_range.
22939 * diagnostic.c: Include "diagnostic-path.h".
22940 (diagnostic_initialize): Initialize context->path_format and
22941 context->show_path_depths.
22942 (diagnostic_show_any_path): New function.
22943 (diagnostic_path::interprocedural_p): New function.
22944 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
22945 (simple_diagnostic_path::num_events): New function.
22946 (simple_diagnostic_path::get_event): New function.
22947 (simple_diagnostic_path::add_event): New function.
22948 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
22949 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
22950 (debug): New overload taking a diagnostic_path *.
22951 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
22952 * diagnostic.h (enum diagnostic_path_format): New enum.
22953 (json::value): New forward decl.
22954 (diagnostic_context::path_format): New field.
22955 (diagnostic_context::show_path_depths): New field.
22956 (diagnostic_context::print_path): New callback field.
22957 (diagnostic_context::make_json_for_path): New callback field.
22958 (diagnostic_show_any_path): New decl.
22959 (json_from_expanded_location): New decl.
22960 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
22961 (-fdiagnostics-show-path-depths): New option.
22962 (-fdiagnostics-color): Add "path" to description of default
22963 GCC_COLORS; describe it.
22964 (-fdiagnostics-format=json): Document how diagnostic paths are
22965 represented in the JSON output format.
22966 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
22967 Add optional params "restrict_to_current_line_spans" and "label".
22968 * opts.c (common_handle_option): Handle
22969 OPT_fdiagnostics_path_format_ and
22970 OPT_fdiagnostics_show_path_depths.
22971 * pretty-print.c: Include "diagnostic-event-id.h".
22972 (pp_format): Implement "%@" format code for printing
22973 diagnostic_event_id_t *.
22974 (selftest::test_pp_format): Add tests for "%@".
22975 * selftest-run-tests.c (selftest::run_tests): Call
22976 selftest::tree_diagnostic_path_cc_tests.
22977 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
22978 * toplev.c (general_init): Initialize global_dc->path_format and
22979 global_dc->show_path_depths.
22980 * tree-diagnostic-path.cc: New file.
22981 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
22982 non-static. Drop "diagnostic" param in favor of storing the
22983 original value of "where" and re-using it.
22984 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
22985 maybe_unwind_expanded_macro_loc.
22986 (tree_diagnostics_defaults): Initialize context->print_path and
22987 context->make_json_for_path.
22988 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
22990 (default_tree_make_json_for_path): New decl.
22991 (maybe_unwind_expanded_macro_loc): New decl.
22993 2020-01-10 Jakub Jelinek <jakub@redhat.com>
22995 PR tree-optimization/93210
22996 * fold-const.h (native_encode_initializer,
22997 can_native_interpret_type_p): Declare.
22998 * fold-const.c (native_encode_string): Fix up handling with off != -1,
23000 (native_encode_initializer): New function, moved from dwarf2out.c.
23001 Adjust to native_encode_expr compatible arguments, including dry-run
23002 and partial extraction modes. Don't handle STRING_CST.
23003 (can_native_interpret_type_p): No longer static.
23004 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
23005 offset / BITS_PER_UNIT fits into int and don't call it if
23006 can_native_interpret_type_p fails. If suboff is NULL and for
23007 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
23008 native_encode_initializer.
23009 (fold_const_aggregate_ref_1): Formatting fix.
23010 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
23011 (tree_add_const_value_attribute): Adjust caller.
23013 PR tree-optimization/90838
23014 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
23015 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
23016 CTZ_DEFINED_VALUE_AT_ZERO.
23018 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
23020 PR inline-asm/93027
23021 * lra-constraints.c (match_reload): Permit input operands have the
23022 same mode as output while other input operands have a different
23025 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
23027 PR tree-optimization/90838
23028 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
23029 (check_ctz_string): Likewise.
23030 (optimize_count_trailing_zeroes): Likewise.
23031 (simplify_count_trailing_zeroes): Likewise.
23032 (pass_forwprop::execute): Try ctz simplification.
23033 * match.pd: Add matching for ctz idioms.
23035 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23037 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
23039 (aarch64_invalid_unary_op): New function for target hook.
23040 (aarch64_invalid_binary_op): New function for target hook.
23042 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23044 * config.gcc: Add arm_bf16.h.
23045 * config/aarch64/aarch64-builtins.c
23046 (aarch64_simd_builtin_std_type): Add BFmode.
23047 (aarch64_init_simd_builtin_types): Define element types for vector
23049 (aarch64_init_bf16_types): New function.
23050 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
23051 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
23053 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
23054 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
23056 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
23057 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
23058 * config/aarch64/aarch64.c
23059 (aarch64_classify_vector_mode): Add support for BF types.
23060 (aarch64_gimplify_va_arg_expr): Add support for BF types.
23061 (aarch64_vq_mode): Add support for BF types.
23062 (aarch64_simd_container_mode): Add support for BF types.
23063 (aarch64_mangle_type): Add support for BF scalar type.
23064 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
23065 * config/aarch64/arm_bf16.h: New file.
23066 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
23067 * config/aarch64/iterators.md: Add BF types to mode attributes.
23068 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
23070 2020-01-10 Jason Merrill <jason@redhat.com>
23072 PR c++/93173 - incorrect tree sharing.
23073 * gimplify.c (copy_if_shared): No longer static.
23074 * gimplify.h: Declare it.
23076 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23078 * doc/invoke.texi (-msve-vector-bits=): Document that
23079 -msve-vector-bits=128 now generates VL-specific code for
23080 little-endian targets.
23081 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
23082 build_vector_type_for_mode to construct the data vector types.
23083 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
23084 VL-specific code for -msve-vector-bits=128 on little-endian targets.
23085 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
23086 for 128-bit vectors.
23088 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23090 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
23093 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23095 * config/aarch64/aarch64-builtins.c
23096 (aarch64_builtin_vectorized_function): Check for specific vector modes,
23097 rather than checking the number of elements and the element mode.
23099 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23101 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
23102 get_related_vectype_for_scalar_type rather than build_vector_type
23103 to create the index type for a conditional reduction.
23105 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23107 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
23108 for any type of gather or scatter, including strided accesses.
23110 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
23112 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
23115 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
23117 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
23118 get_dr_vinfo_offset
23119 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
23120 parameter and its use to reset DR_OFFSET's.
23121 (vect_transform_loop): Remove orig_drs_init argument.
23122 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
23123 member of dr_vec_info rather than the offset of the associated
23124 data_reference's innermost_loop_behavior.
23125 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
23126 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
23127 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
23128 get_dr_vinfo_offset.
23129 (vectorizable_store): Likewise.
23130 (vectorizable_load): Likewise.
23132 2020-01-10 Richard Biener <rguenther@suse.de>
23134 * gimple-ssa-store-merging
23135 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
23137 2020-01-10 Martin Liska <mliska@suse.cz>
23140 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
23141 encapsulation that was there before r280040.
23143 2020-01-10 Richard Biener <rguenther@suse.de>
23145 PR middle-end/93199
23146 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
23147 sequences to avoid walking them again for secondary opportunities.
23148 (pass_lower_eh_dispatch::execute): Instead actually insert
23151 2020-01-10 Richard Biener <rguenther@suse.de>
23153 PR middle-end/93199
23154 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
23155 (cleanup_all_empty_eh): Walk landing pads in reverse order to
23156 avoid quadraticness.
23158 2020-01-10 Martin Jambor <mjambor@suse.cz>
23160 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
23161 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
23162 to get param_ipa_sra_max_replacements.
23163 (param_splitting_across_edge): Pass the caller to
23164 pull_accesses_from_callee.
23166 2020-01-10 Martin Jambor <mjambor@suse.cz>
23168 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
23169 * ipa-cp.c (max_new_size): Removed.
23170 (orig_overall_size): New variable.
23171 (get_max_overall_size): New function.
23172 (estimate_local_effects): Use it. Adjust dump.
23173 (decide_about_value): Likewise.
23174 (ipcp_propagate_stage): Do not calculate max_new_size, just store
23175 orig_overall_size. Adjust dump.
23176 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
23178 2020-01-10 Martin Jambor <mjambor@suse.cz>
23180 * params.opt (param_ipa_max_agg_items): Mark as Optimization
23181 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
23182 instead of param_ipa_max_agg_items.
23183 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
23184 optimization info for the callee.
23186 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
23188 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
23189 markers if debug_inline_points is false.
23191 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23193 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
23195 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
23196 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
23197 aarch64-sve-builtins-sve2.h.
23198 (aarch64-sve-builtins-sve2.o): New rule.
23199 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
23200 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
23201 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
23202 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
23203 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
23204 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
23206 * config/aarch64/aarch64-sve.md: Update comments with SVE2
23207 instructions that are handled here.
23208 (@cond_asrd<mode>): Generalize to...
23209 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
23210 (*cond_asrd<mode>_2): Generalize to...
23211 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
23212 (*cond_asrd<mode>_z): Generalize to...
23213 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
23214 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
23215 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
23216 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
23217 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
23219 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
23220 (@aarch64_scatter_stnt<mode>): Likewise.
23221 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
23222 (@aarch64_mul_lane_<mode>): Likewise.
23223 (@aarch64_sve_suqadd<mode>_const): Likewise.
23224 (*<sur>h<addsub><mode>): Generalize to...
23225 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
23227 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
23228 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
23229 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
23230 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
23231 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
23232 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
23233 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
23234 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
23235 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
23236 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
23237 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
23238 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
23239 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
23240 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
23241 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
23242 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
23243 (@aarch64_sve2_xar<mode>): Likewise.
23244 (@aarch64_sve2_bcax<mode>): Likewise.
23245 (*aarch64_sve2_eor3<mode>): Rename to...
23246 (@aarch64_sve2_eor3<mode>): ...this.
23247 (@aarch64_sve2_bsl<mode>): New expander.
23248 (@aarch64_sve2_nbsl<mode>): Likewise.
23249 (@aarch64_sve2_bsl1n<mode>): Likewise.
23250 (@aarch64_sve2_bsl2n<mode>): Likewise.
23251 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
23252 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
23253 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
23254 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
23255 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
23256 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
23257 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
23258 (<su>mull<bt><Vwide>): Generalize to...
23259 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
23261 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
23262 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
23263 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
23264 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23265 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
23266 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23267 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
23268 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23269 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
23270 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23271 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
23272 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
23273 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
23274 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
23275 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
23276 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
23277 (<SHRNB:r>shrnb<mode>): Generalize to...
23278 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
23280 (<SHRNT:r>shrnt<mode>): Generalize to...
23281 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
23283 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
23284 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
23285 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
23286 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
23287 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
23288 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
23289 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
23290 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
23291 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
23292 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
23293 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
23294 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
23295 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
23296 (@aarch64_sve2_cvtnt<mode>): Likewise.
23297 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
23298 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
23299 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
23300 (@aarch64_sve2_cvtxnt<mode>): Likewise.
23301 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
23302 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
23303 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
23304 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
23305 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
23306 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
23307 (@aarch64_sve2_pmul<mode>): Likewise.
23308 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
23309 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
23310 (@aarch64_sve2_tbl2<mode>): Likewise.
23311 (@aarch64_sve2_tbx<mode>): Likewise.
23312 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
23313 (@aarch64_sve2_histcnt<mode>): Likewise.
23314 (@aarch64_sve2_histseg<mode>): Likewise.
23315 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
23316 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
23317 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
23318 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
23319 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
23320 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
23321 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
23322 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
23323 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
23324 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
23325 (SVE2_PMULL_PAIR_I): New mode iterators.
23326 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
23327 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
23328 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
23329 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
23330 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
23331 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
23332 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
23333 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
23334 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
23335 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
23336 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
23337 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
23338 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
23339 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
23340 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
23341 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
23342 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
23343 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
23344 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
23345 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
23346 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
23347 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
23348 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
23349 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
23350 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
23351 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
23352 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
23353 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
23354 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
23355 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
23356 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
23358 (VNARROW, Ventype): New mode attributes.
23359 (Vewtype): Handle VNx2DI. Fix typo in comment.
23360 (VDOUBLE): New mode attribute.
23361 (sve_lane_con): Handle VNx8HI.
23362 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
23363 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
23364 (sve_int_op, sve_int_op_rev): Handle the above codes.
23365 (sve_pred_int_rhs2_operand): Likewise.
23366 (MULLBT, SHRNB, SHRNT): Delete.
23367 (SVE_INT_SHIFT_IMM): New int iterator.
23368 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
23369 and UNSPEC_WHILEHS for TARGET_SVE2.
23370 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
23371 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
23372 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
23373 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
23374 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
23375 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
23376 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
23377 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
23378 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
23379 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
23380 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
23381 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
23382 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
23383 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
23384 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
23385 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
23386 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
23387 (optab): Handle the new unspecs.
23388 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
23390 (lr): Handle the new unspecs.
23392 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
23393 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
23394 (sve_int_qsub_op): New int attributes.
23395 (sve_fp_op, rot): Handle the new unspecs.
23396 * config/aarch64/aarch64-sve-builtins.h
23397 (function_resolver::require_matching_pointer_type): Declare.
23398 (function_resolver::resolve_unary): Add an optional boolean argument.
23399 (function_resolver::finish_opt_n_resolution): Add an optional
23400 type_suffix_index argument.
23401 (gimple_folder::redirect_call): Declare.
23402 (gimple_expander::prepare_gather_address_operands): Add an optional
23404 * config/aarch64/aarch64-sve-builtins.cc: Include
23405 aarch64-sve-builtins-sve2.h.
23406 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
23407 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
23408 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
23409 (TYPES_hsd_integer): Use TYPES_hsd_signed.
23410 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
23411 (TYPES_s_unsigned): Likewise.
23412 (TYPES_s_integer): Use TYPES_s_unsigned.
23413 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
23414 (TYPES_sd_integer): Use them.
23415 (TYPES_d_unsigned): New macro.
23416 (TYPES_d_integer): Use it.
23417 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
23418 (TYPES_cvt_narrow): Likewise.
23419 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
23420 (preds_mx): New variable.
23421 (function_builder::add_overloaded_function): Allow the new feature
23422 set to be more restrictive than the original one.
23423 (function_resolver::infer_pointer_type): Remove qualifiers from
23424 the pointer type before printing it.
23425 (function_resolver::require_matching_pointer_type): New function.
23426 (function_resolver::resolve_sv_displacement): Handle functions
23427 that don't support 32-bit vector indices or svint32_t vector offsets.
23428 (function_resolver::finish_opt_n_resolution): Take the inferred type
23429 as a separate argument.
23430 (function_resolver::resolve_unary): Optionally treat all forms in
23431 the same way as normal merging functions.
23432 (gimple_folder::redirect_call): New function.
23433 (function_expander::prepare_gather_address_operands): Add an argument
23434 that says whether scaled forms are available. If they aren't,
23435 handle scaling of vector indices and don't add the extension and
23437 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
23438 fall back to using cond_* instead.
23439 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
23440 Split out the member variables into...
23441 (rtx_code_function_base): ...this new base class.
23442 (rtx_code_function_rotated): Inherit rtx_code_function_base.
23443 (unspec_based_function): Split out the member variables into...
23444 (unspec_based_function_base): ...this new base class.
23445 (unspec_based_function_rotated): Inherit unspec_based_function_base.
23446 (unspec_based_function_exact_insn): New class.
23447 (unspec_based_add_function, unspec_based_add_lane_function)
23448 (unspec_based_lane_function, unspec_based_pred_function)
23449 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
23450 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
23451 (unspec_based_sub_function, unspec_based_sub_lane_function): New
23453 (unspec_based_fused_function): New class.
23454 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
23455 (unspec_based_fused_lane_function): New class.
23456 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
23458 (CODE_FOR_MODE1): New macro.
23459 (fixed_insn_function): New class.
23460 (while_comparison): Likewise.
23461 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
23462 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
23463 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
23464 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
23465 (load_gather_sv_restricted, shift_left_imm_long): Declare.
23466 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
23467 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
23468 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
23469 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
23470 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
23471 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
23472 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
23473 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
23474 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
23475 Also add an initial argument for unary_convert_narrowt, regardless
23476 of the predication type.
23477 (build_32_64): Allow loads and stores to specify MODE_none.
23478 (build_sv_index64, build_sv_uint_offset): New functions.
23479 (long_type_suffix): New function.
23480 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
23481 (binary_imm_long_base, load_gather_sv_base): Likewise.
23482 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
23483 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
23484 (unary_narrowb_base, unary_narrowt_base): Likewise.
23485 (binary_long_lane_def, binary_long_lane): New shape.
23486 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
23487 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
23488 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
23489 (binary_to_uint_def, binary_to_uint): Likewise.
23490 (binary_wide_def, binary_wide): Likewise.
23491 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
23492 (compare_def, compare): Likewise.
23493 (compare_ptr_def, compare_ptr): Likewise.
23494 (load_ext_gather_index_restricted_def,
23495 load_ext_gather_index_restricted): Likewise.
23496 (load_ext_gather_offset_restricted_def,
23497 load_ext_gather_offset_restricted): Likewise.
23498 (load_gather_sv_def): Inherit from load_gather_sv_base.
23499 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
23500 (shift_left_imm_def, shift_left_imm): Likewise.
23501 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
23502 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
23503 (store_scatter_index_restricted_def,
23504 store_scatter_index_restricted): Likewise.
23505 (store_scatter_offset_restricted_def,
23506 store_scatter_offset_restricted): Likewise.
23507 (tbl_tuple_def, tbl_tuple): Likewise.
23508 (ternary_long_lane_def, ternary_long_lane): Likewise.
23509 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
23510 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
23511 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
23512 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
23513 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
23514 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
23515 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
23516 (ternary_uint_def, ternary_uint): Likewise.
23517 (unary_convert): Fix typo in comment.
23518 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
23519 (unary_long_def, unary_long): Likewise.
23520 (unary_narrowb_def, unary_narrowb): Likewise.
23521 (unary_narrowt_def, unary_narrowt): Likewise.
23522 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
23523 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
23524 (unary_to_int_def, unary_to_int): Likewise.
23525 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
23526 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
23527 (svasrd_impl): Delete.
23528 (svcadd_impl::expand): Handle integer operations too.
23529 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
23530 new functions to derive the unspec numbers.
23531 (svmla_svmls_lane_impl): Replace with...
23532 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
23533 integer operations too.
23534 (svwhile_impl): Rename to...
23535 (svwhilelx_impl): ...this and inherit from while_comparison.
23536 (svasrd): Use unspec_based_function.
23537 (svmla_lane): Use svmla_lane_impl.
23538 (svmls_lane): Use svmls_lane_impl.
23539 (svrecpe, svrsqrte): Handle unsigned integer operations too.
23540 (svwhilele, svwhilelt): Use svwhilelx_impl.
23541 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
23542 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
23543 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
23544 * config/aarch64/aarch64-sve-builtins.def: Include
23545 aarch64-sve-builtins-sve2.def.
23547 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23549 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
23550 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
23551 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
23552 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
23553 immediates as well as vector ones.
23554 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
23555 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
23556 (aarch64_sve_qsub_immediate): Update calls accordingly.
23558 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23560 * config/aarch64/aarch64-sve2.md: Add banner comments.
23561 (<su>mulh<r>s<mode>3): Move further up file.
23562 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
23563 (*aarch64_sve2_sra<mode>): Move further down file.
23564 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
23566 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23568 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
23569 and UNSPEC_WHILEWR.
23570 (while_optab_cmp): Handle them.
23571 * config/aarch64/aarch64-sve.md
23572 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
23573 and add a "@" marker.
23574 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
23575 instead of gen_aarch64_sve2_while_ptest.
23576 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
23578 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23580 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
23581 (UNSPEC_WHILELE): ...this.
23582 (UNSPEC_WHILE_LO): Rename to...
23583 (UNSPEC_WHILELO): ...this.
23584 (UNSPEC_WHILE_LS): Rename to...
23585 (UNSPEC_WHILELS): ...this.
23586 (UNSPEC_WHILE_LT): Rename to...
23587 (UNSPEC_WHILELT): ...this.
23588 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
23589 (cmp_op, while_optab_cmp): Likewise.
23590 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
23591 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
23592 (svwhilelt): Likewise.
23594 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23596 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
23597 (unary_to_uint): Define.
23598 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
23599 (unary_count): Rename to...
23600 (unary_to_uint_def, unary_to_uint): ...this.
23601 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
23603 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23605 * config/aarch64/aarch64-sve-builtins-functions.h
23606 (code_for_mode_function): New class.
23607 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
23608 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
23609 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
23610 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
23611 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
23613 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23615 * config/aarch64/iterators.md (addsub): New code attribute.
23616 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
23618 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
23619 in the asm string and attributes. Fix indentation.
23620 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
23622 (@aarch64_sve_<optab><mode>): ...this.
23623 * config/aarch64/aarch64-sve-builtins.h
23624 (function_expander::expand_signed_unpred_op): Delete.
23625 * config/aarch64/aarch64-sve-builtins.cc
23626 (function_expander::expand_signed_unpred_op): Likewise.
23627 (function_expander::map_to_rtx_codes): If the optab isn't defined,
23628 try using code_for_aarch64_sve instead.
23629 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
23630 (svqsub_impl): Likewise.
23631 (svqadd, svqsub): Use rtx_code_function instead.
23633 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23635 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
23636 (HADDSUB, sur, addsub): Remove them.
23638 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23640 * tree-nrv.c (pass_return_slot::execute): Handle all internal
23641 functions the same way, rather than singling out those that
23642 aren't mapped directly to optabs.
23644 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23646 * target.def (compatible_vector_types_p): New target hook.
23647 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
23648 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
23649 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
23650 * doc/tm.texi: Regenerate.
23651 * gimple-expr.c: Include target.h.
23652 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
23653 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
23655 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
23656 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
23657 Use the original predicate if it already has a suitable type.
23659 2020-01-09 Martin Jambor <mjambor@suse.cz>
23661 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
23662 resolve_speculation and redirect_call_stmt_to_callee static. Change
23663 return type of set_call_stmt to cgraph_edge *.
23664 * auto-profile.c (afdo_indirect_call): Adjust call to
23665 redirect_call_stmt_to_callee.
23666 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
23667 make the this pointer explicit, adjust self-recursive calls and the
23668 call top make_direct. Return the resulting edge.
23669 (cgraph_edge::remove): Make this pointer explicit.
23670 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
23671 (cgraph_edge::make_direct): Likewise, adjust call to
23672 resolve_speculation.
23673 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
23674 call to set_call_stmt.
23675 (cgraph_update_edges_for_call_stmt_node): Update call to
23676 set_call_stmt and remove.
23677 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
23678 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
23679 (cgraph_node::create_edge_including_clones): Moved "first" definition
23680 of edge to the block where it was used. Adjusted calls to
23682 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
23683 cgraph_edge::remove.
23684 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
23685 make_direct and redirect_call_stmt_to_callee.
23686 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
23687 resolve_speculation and make_direct.
23688 * ipa-inline-transform.c (inline_transform): Adjust call to
23689 redirect_call_stmt_to_callee.
23690 (check_speculations_1):: Adjust call to resolve_speculation.
23691 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
23692 resolve-speculation.
23693 (inline_small_functions): Adjust call to resolve_speculation.
23694 (ipa_inline): Likewise.
23695 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
23697 * ipa-visibility.c (function_and_variable_visibility): Make iteration
23698 safe with regards to edge removal, adjust calls to
23699 redirect_call_stmt_to_callee.
23700 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
23701 and redirect_call_stmt_to_callee.
23702 * multiple_target.c (create_dispatcher_calls): Adjust call to
23703 redirect_call_stmt_to_callee
23704 (redirect_to_specific_clone): Likewise.
23705 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
23706 Adjust calls to cgraph_edge::remove.
23707 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
23708 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
23709 (expand_call_inline): Adjust call to cgraph_edge::remove.
23711 2020-01-09 Martin Liska <mliska@suse.cz>
23713 * params.opt: Set Optimization for
23714 param_max_speculative_devirt_maydefs.
23716 2020-01-09 Martin Sebor <msebor@redhat.com>
23718 PR middle-end/93200
23720 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
23722 2020-01-09 Martin Liska <mliska@suse.cz>
23724 * auto-profile.c (auto_profile): Use opt_for_fn
23726 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
23727 (propagate_vals_across_arith_jfunc): Likewise.
23728 (hint_time_bonus): Likewise.
23729 (incorporate_penalties): Likewise.
23730 (good_cloning_opportunity_p): Likewise.
23731 (perform_estimation_of_a_value): Likewise.
23732 (estimate_local_effects): Likewise.
23733 (ipcp_propagate_stage): Likewise.
23734 * ipa-fnsummary.c (decompose_param_expr): Likewise.
23735 (set_switch_stmt_execution_predicate): Likewise.
23736 (analyze_function_body): Likewise.
23737 * ipa-inline-analysis.c (offline_size): Likewise.
23738 * ipa-inline.c (early_inliner): Likewise.
23739 * ipa-prop.c (ipa_analyze_node): Likewise.
23740 (ipcp_transform_function): Likewise.
23741 * ipa-sra.c (process_scan_results): Likewise.
23742 (ipa_sra_summarize_function): Likewise.
23743 * params.opt: Rename ipcp-unit-growth to
23744 ipa-cp-unit-growth. Add Optimization for various
23745 IPA-related parameters.
23747 2020-01-09 Richard Biener <rguenther@suse.de>
23749 PR middle-end/93054
23750 * gimplify.c (gimplify_expr): Deal with NOP definitions.
23752 2020-01-09 Richard Biener <rguenther@suse.de>
23754 PR tree-optimization/93040
23755 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
23757 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
23759 * common/config/avr/avr-common.c (avr_option_optimization_table)
23760 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
23762 2020-01-09 Martin Liska <mliska@suse.cz>
23764 * cgraphclones.c (symbol_table::materialize_all_clones):
23765 Use cgraph_node::dump_name.
23767 2020-01-09 Jakub Jelinek <jakub@redhat.com>
23769 PR inline-asm/93202
23770 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
23771 output_operand_lossage instead of gcc_unreachable.
23772 * doc/md.texi (riscv f constraint): Fix typo.
23775 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
23776 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
23777 CONST_SCALAR_INT_P instead of CONST_INT_P.
23778 (*subv<mode>4_1): Rename to ...
23779 (subv<mode>4_1): ... this.
23780 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
23781 define_insn_and_split patterns.
23782 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
23785 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23787 * vec.c (class selftest::count_dtor): New class.
23788 (selftest::test_auto_delete_vec): New test.
23789 (selftest::vec_c_tests): Call it.
23790 * vec.h (class auto_delete_vec): New class template.
23791 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
23793 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23795 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
23797 2020-01-08 Jim Wilson <jimw@sifive.com>
23799 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
23800 use of TLS_MODEL_LOCAL_EXEC when not pic.
23802 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23804 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
23807 2020-01-08 Jakub Jelinek <jakub@redhat.com>
23810 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
23811 *stack_protect_set_3 peephole2): Also check that the second
23812 insns source is general_operand.
23815 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
23816 predicate for output operand instead of register_operand.
23817 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
23818 memory destination and non-memory operands[2].
23820 2020-01-08 Martin Liska <mliska@suse.cz>
23822 * cgraph.c (cgraph_node::dump): Use ::dump_name or
23823 ::dump_asm_name instead of (::name or ::asm_name).
23824 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
23825 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
23826 (analyze_functions): Likewise.
23827 (expand_all_functions): Likewise.
23828 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
23829 (propagate_bits_across_jump_function): Likewise.
23830 (dump_profile_updates): Likewise.
23831 (ipcp_store_bits_results): Likewise.
23832 (ipcp_store_vr_results): Likewise.
23833 * ipa-devirt.c (dump_targets): Likewise.
23834 * ipa-fnsummary.c (analyze_function_body): Likewise.
23835 * ipa-hsa.c (check_warn_node_versionable): Likewise.
23836 (process_hsa_functions): Likewise.
23837 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
23838 (set_alias_uids): Likewise.
23839 * ipa-inline-transform.c (save_inline_function_body): Likewise.
23840 * ipa-inline.c (recursive_inlining): Likewise.
23841 (inline_to_all_callers_1): Likewise.
23842 (ipa_inline): Likewise.
23843 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
23844 (ipa_propagate_frequency): Likewise.
23845 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
23846 (remove_described_reference): Likewise.
23847 * ipa-pure-const.c (worse_state): Likewise.
23848 (check_retval_uses): Likewise.
23849 (analyze_function): Likewise.
23850 (propagate_pure_const): Likewise.
23851 (propagate_nothrow): Likewise.
23852 (dump_malloc_lattice): Likewise.
23853 (propagate_malloc): Likewise.
23854 (pass_local_pure_const::execute): Likewise.
23855 * ipa-visibility.c (optimize_weakref): Likewise.
23856 (function_and_variable_visibility): Likewise.
23857 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
23858 (ipa_discover_variable_flags): Likewise.
23859 * lto-streamer-out.c (output_function): Likewise.
23860 (output_constructor): Likewise.
23861 * tree-inline.c (copy_bb): Likewise.
23862 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
23863 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
23865 2020-01-08 Richard Biener <rguenther@suse.de>
23867 PR middle-end/93199
23868 * tree-eh.c (sink_clobbers): Update virtual operands for
23869 the first and last stmt only. Add a dry-run capability.
23870 (pass_lower_eh_dispatch::execute): Perform clobber sinking
23871 after CFG manipulations and in RPO order to catch all
23872 secondary opportunities reliably.
23874 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23877 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
23879 2019-01-08 Richard Biener <rguenther@suse.de>
23881 PR middle-end/93199
23882 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
23883 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
23884 virtual operand, also updating SSA use.
23885 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
23886 Update stmt after resetting virtual operand.
23887 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
23888 * gimple-iterator.c (gsi_remove): When not removing the stmt
23889 permanently do not delink immediate uses or mark the stmt modified.
23891 2020-01-08 Martin Liska <mliska@suse.cz>
23893 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
23894 (ipa_call_context::estimate_size_and_time): Likewise.
23895 (inline_analyze_function): Likewise.
23897 2020-01-08 Martin Liska <mliska@suse.cz>
23899 * cgraph.c (cgraph_node::dump): Use systematically
23902 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23904 Add -nodevicespecs option for avr.
23907 * config/avr/avr.opt (-nodevicespecs): New driver option.
23908 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
23909 "-specs=device-specs/..." if that option is not set.
23910 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
23912 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23914 Implement 64-bit double functions for avr.
23917 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
23918 --with-double-comparison.
23919 * doc/install.texi: Document them.
23920 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
23921 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
23922 <WITH_DOUBLE_COMPARISON>: New built-in defines.
23923 * doc/invoke.texi (AVR Built-in Macros): Document them.
23924 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
23925 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
23926 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
23928 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
23931 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
23932 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
23933 when only building rm-profile multilibs.
23935 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
23938 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
23939 lattice for a value to check.
23940 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
23941 finite propagation in self-recursive scc.
23943 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
23945 * ipa-inline.c (caller_growth_limits): Restore the AND.
23947 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
23949 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
23950 (VEC_ALLREG_ALT): New iterator.
23951 (VEC_ALLREG_INT_MODE): New iterator.
23952 (VCMP_MODE): New iterator.
23953 (VCMP_MODE_INT): New iterator.
23954 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
23955 (vec_cmp<u>v64qidi): New define_expand.
23956 (vec_cmp<mode>di_exec): Use VCMP_MODE.
23957 (vec_cmpu<mode>di_exec): New define_expand.
23958 (vec_cmp<u>v64qidi_exec): New define_expand.
23959 (vec_cmp<mode>di_dup): Use VCMP_MODE.
23960 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
23961 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
23962 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
23963 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
23964 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
23965 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
23966 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
23967 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
23968 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
23970 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
23971 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
23973 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
23975 * config/gcn/constraints.md (DA): Update description and match.
23977 (Db): New constraint.
23978 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
23980 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
23981 Implement 'Db' mixed immediate type.
23982 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
23983 (addcv64si3_dup<exec_vcc>): Delete.
23984 (subcv64si3<exec_vcc>): Rework constraints.
23985 (addv64di3): Rework constraints.
23986 (addv64di3_exec): Rework constraints.
23987 (subv64di3): Rework constraints.
23988 (addv64di3_dup): Delete.
23989 (addv64di3_dup_exec): Delete.
23990 (addv64di3_zext): Rework constraints.
23991 (addv64di3_zext_exec): Rework constraints.
23992 (addv64di3_zext_dup): Rework constraints.
23993 (addv64di3_zext_dup_exec): Rework constraints.
23994 (addv64di3_zext_dup2): Rework constraints.
23995 (addv64di3_zext_dup2_exec): Rework constraints.
23996 (addv64di3_sext_dup2): Rework constraints.
23997 (addv64di3_sext_dup2_exec): Rework constraints.
23999 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
24001 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
24002 existing target checks.
24004 2020-01-07 Richard Biener <rguenther@suse.de>
24006 * doc/install.texi: Bump minimal supported MPC version.
24008 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24010 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
24011 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
24012 * langhooks.c: Include stor-layout.h.
24013 (lhd_simulate_enum_decl): New function.
24014 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
24015 handle_arm_sve_h for the LTO frontend.
24016 (register_vector_type): Cope with null returns from pushdecl.
24018 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24020 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
24021 (aarch64_sve::nvectors_if_data_type): Replace with...
24022 (aarch64_sve::builtin_type_p): ...this.
24023 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
24024 (find_vector_type): Delete.
24025 (add_sve_type_attribute): New function.
24026 (lookup_sve_type_attribute): Likewise.
24027 (register_builtin_types): Add an "SVE type" attribute to each type.
24028 (register_tuple_type): Likewise.
24029 (svbool_type_p, nvectors_if_data_type): Delete.
24030 (mangle_builtin_type): Use lookup_sve_type_attribute.
24031 (builtin_type_p): Likewise. Add an overload that returns the
24032 number of constituent vector and predicate registers.
24033 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
24034 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
24035 instead of aarch64_sve_argument_p.
24036 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
24037 (aarch64_pass_by_reference): Likewise.
24038 (aarch64_function_value_1): Likewise.
24039 (aarch64_return_in_memory): Likewise.
24040 (aarch64_layout_arg): Likewise.
24042 2020-01-07 Jakub Jelinek <jakub@redhat.com>
24044 PR tree-optimization/93156
24045 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
24046 least significant bit is always clear.
24048 PR tree-optimization/93118
24049 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
24050 simplifier with two intermediate conversions.
24052 2020-01-07 Martin Liska <mliska@suse.cz>
24054 * params.opt: Add Optimization for various parameters.
24056 2020-01-07 Martin Liska <mliska@suse.cz>
24059 * doc/extend.texi: Explain cloning for target_clone
24062 2020-01-07 Martin Liska <mliska@suse.cz>
24064 PR tree-optimization/92860
24065 * common.opt: Make in Optimization option
24066 as it is affected by -O0, which is an Optimization
24068 * tree-inline.c (tree_inlinable_function_p):
24069 Use opt_for_fn for warn_inline.
24070 (expand_call_inline): Likewise.
24072 2020-01-07 Martin Liska <mliska@suse.cz>
24074 PR tree-optimization/92860
24075 * common.opt: Make flag_ree as optimization
24078 2020-01-07 Martin Liska <mliska@suse.cz>
24080 PR optimization/92860
24081 * params.opt: Mark param_min_crossjump_insns with Optimization
24084 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
24086 * ipa-inline-analysis.c (estimate_growth): Fix typo.
24087 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
24089 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
24091 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
24092 helper function to return the valid addressing formats for a given
24093 hard register and mode.
24094 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
24096 * config/rs6000/constraints.md (Q constraint): Update
24098 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
24101 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
24102 Use 'Q' for doing vector extract from memory.
24103 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
24105 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
24106 doing vector extract from memory.
24107 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
24108 extract from memory.
24110 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
24111 for the offset being 34-bits when -mcpu=future is used.
24113 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
24115 * config/pa/pa.md: Revert change to use ordered_comparison_operator
24116 instead of cmpib_comparison_operator in cmpib patterns.
24117 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
24118 of cmpib_comparison_operator. Revise comment.
24120 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24122 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
24123 in an IFN_DIV_POW2 node to be equal.
24125 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24127 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
24128 (vect_check_scalar_mask): ...this.
24129 (vectorizable_store, vectorizable_load): Update call accordingly.
24130 (vectorizable_call): Use vect_check_scalar_mask to check the mask
24131 argument in calls to conditional internal functions.
24133 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24135 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
24136 '0' matching inputs.
24137 (subv64di3_exec): Likewise.
24139 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
24141 * config/mips/mips.c (vr4130_align_insns): Fix typo.
24142 * doc/md.texi (movstr): Likewise.
24144 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24146 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
24149 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24151 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
24153 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
24154 to a temporary file and use move-if-change to update the real
24155 file where necessary.
24157 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24159 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
24160 rather than Upa for CPY /M.
24162 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24164 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
24167 2020-01-06 Martin Liska <mliska@suse.cz>
24169 PR tree-optimization/92860
24170 * params.opt: Mark param_max_combine_insns with Optimization
24173 2020-01-05 Jakub Jelinek <jakub@redhat.com>
24176 * config/i386/i386.md (SWIDWI): New mode iterator.
24177 (DWI, dwi): Add TImode variants.
24178 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
24179 <general_hilo_operand> instead of <general_operand>. Use
24180 CONST_SCALAR_INT_P instead of CONST_INT_P.
24181 (*addv<mode>4_1): Rename to ...
24182 (addv<mode>4_1): ... this.
24183 (QWI): New mode attribute.
24184 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
24185 define_insn_and_split patterns.
24186 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
24188 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
24189 <general_hilo_operand> instead of <general_operand>.
24190 (*addcarry<mode>_1): New define_insn.
24191 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
24193 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
24195 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
24196 Use "call" instead of "set".
24198 2020-01-03 Martin Jambor <mjambor@suse.cz>
24201 * ipa-cp.c (print_all_lattices): Skip functions without info.
24203 2020-01-03 Jakub Jelinek <jakub@redhat.com>
24206 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
24207 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
24208 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
24209 for 'e' simd clones.
24212 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
24214 (mprefer-vector-width=): Add Save.
24215 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
24216 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
24217 (ix86_debug_options, ix86_function_specific_print): Adjust
24218 ix86_target_string callers.
24219 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
24220 (ix86_valid_target_attribute_tree): Likewise.
24221 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
24222 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
24223 ix86_target_string caller.
24226 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
24227 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
24228 instead of gen_int_shift_amount + convert_modes.
24230 PR rtl-optimization/93088
24231 * loop-iv.c (find_single_def_src): Punt after looking through
24232 128 reg copies for regs with single definitions. Move definitions
24235 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
24237 * config/arm/arm-c.c (arm_cpu_builtins): Define
24238 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
24239 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
24240 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
24241 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
24242 * config/arm/arm-tables.opt: Regenerated.
24243 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
24244 arm_arch_i8mm and arm_arch_bf16 when enabled.
24245 * config/arm/arm.h (TARGET_I8MM): New macro.
24246 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
24247 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
24248 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
24249 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
24250 (v8_6_a_simd_variants): New.
24251 (v8_*_a_simd_variants): Add i8mm and bf16.
24252 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
24254 2020-01-02 Jakub Jelinek <jakub@redhat.com>
24257 * predict.c (compute_function_frequency): Don't call
24258 warn_function_cold on functions that already have cold attribute.
24260 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
24263 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
24264 COMDAT group function labels in .data.rel.ro.local section.
24265 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
24268 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
24269 comparison_operator in B and S integer comparisons. Likewise, use
24270 ordered_comparison_operator instead of cmpib_comparison_operator in
24272 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
24274 2020-01-01 Jakub Jelinek <jakub@redhat.com>
24276 Update copyright years.
24278 * gcc.c (process_command): Update copyright notice dates.
24279 * gcov-dump.c (print_version): Ditto.
24280 * gcov.c (print_version): Ditto.
24281 * gcov-tool.c (print_version): Ditto.
24282 * gengtype.c (create_file): Ditto.
24283 * doc/cpp.texi: Bump @copying's copyright year.
24284 * doc/cppinternals.texi: Ditto.
24285 * doc/gcc.texi: Ditto.
24286 * doc/gccint.texi: Ditto.
24287 * doc/gcov.texi: Ditto.
24288 * doc/install.texi: Ditto.
24289 * doc/invoke.texi: Ditto.
24291 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
24293 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
24296 2020-01-01 Jakub Jelinek <jakub@redhat.com>
24298 PR tree-optimization/93098
24299 * match.pd (popcount): For shift amounts, use integer_onep
24300 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
24301 tests. Make sure that precision is power of two larger than or equal
24302 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
24303 instead of ULL suffixed constants. Formatting fixes.
24305 Copyright (C) 2020 Free Software Foundation, Inc.
24307 Copying and distribution of this file, with or without modification,
24308 are permitted in any medium without royalty provided the copyright
24309 notice and this notice are preserved.