1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
82 #ifdef XCOFF_DEBUGGING_INFO
83 #include "xcoffout.h" /* Needed for external data
84 declarations for e.g. AIX 4.x. */
87 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
88 #include "dwarf2out.h"
91 #ifdef DBX_DEBUGGING_INFO
95 #ifdef SDB_DEBUGGING_INFO
99 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
100 null default for it to save conditionalization later. */
101 #ifndef CC_STATUS_INIT
102 #define CC_STATUS_INIT
105 /* How to start an assembler comment. */
106 #ifndef ASM_COMMENT_START
107 #define ASM_COMMENT_START ";#"
110 /* Is the given character a logical line separator for the assembler? */
111 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
112 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
115 #ifndef JUMP_TABLES_IN_TEXT_SECTION
116 #define JUMP_TABLES_IN_TEXT_SECTION 0
119 /* Bitflags used by final_scan_insn. */
122 #define SEEN_EMITTED 4
124 /* Last insn processed by final_scan_insn. */
125 static rtx debug_insn
;
126 rtx current_output_insn
;
128 /* Line number of last NOTE. */
129 static int last_linenum
;
131 /* Highest line number in current block. */
132 static int high_block_linenum
;
134 /* Likewise for function. */
135 static int high_function_linenum
;
137 /* Filename of last NOTE. */
138 static const char *last_filename
;
140 /* Whether to force emission of a line note before the next insn. */
141 static bool force_source_line
= false;
143 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
145 /* Nonzero while outputting an `asm' with operands.
146 This means that inconsistencies are the user's fault, so don't die.
147 The precise value is the insn being output, to pass to error_for_asm. */
148 rtx this_is_asm_operands
;
150 /* Number of operands of this insn, for an `asm' with operands. */
151 static unsigned int insn_noperands
;
153 /* Compare optimization flag. */
155 static rtx last_ignored_compare
= 0;
157 /* Assign a unique number to each insn that is output.
158 This can be used to generate unique local labels. */
160 static int insn_counter
= 0;
163 /* This variable contains machine-dependent flags (defined in tm.h)
164 set and examined by output routines
165 that describe how to interpret the condition codes properly. */
169 /* During output of an insn, this contains a copy of cc_status
170 from before the insn. */
172 CC_STATUS cc_prev_status
;
175 /* Nonzero means current function must be given a frame pointer.
176 Initialized in function.c to 0. Set only in reload1.c as per
177 the needs of the function. */
179 int frame_pointer_needed
;
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183 static int block_depth
;
185 /* Nonzero if have enabled APP processing of our assembler output. */
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
194 #ifdef ASSEMBLER_DIALECT
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number
;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate
;
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx
);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx
);
211 static rtx
walk_alter_subreg (rtx
*, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx
);
214 static tree
get_mem_expr_from_op (rtx
, int *);
215 static void output_asm_operand_names (rtx
*, int *, int);
216 static void output_operand (rtx
, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx
);
221 static int alter_cond (rtx
);
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx
);
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx
, rtx
, int, unsigned);
230 /* Initialize data in final at the beginning of a compilation. */
233 init_final (const char *filename ATTRIBUTE_UNUSED
)
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number
= ASSEMBLER_DIALECT
;
243 /* Default target function prologue and epilogue assembler output.
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
253 /* Default target hook that outputs nothing to a stream. */
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
267 fputs (ASM_APP_ON
, asm_out_file
);
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
280 fputs (ASM_APP_OFF
, asm_out_file
);
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
291 dbr_sequence_length (void)
293 if (final_sequence
!= 0)
294 return XVECLEN (final_sequence
, 0) - 1;
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
306 static int *insn_lengths
;
308 VEC(int,heap
) *insn_addresses_
;
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid
;
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address
;
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address
;
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align
;
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
331 struct label_alignment
337 static rtx
*uid_align
;
338 static int *uid_shuid
;
339 static struct label_alignment
*label_align
;
341 /* Indicate that branch shortening hasn't yet been done. */
344 init_insn_lengths (void)
355 insn_lengths_max_uid
= 0;
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
372 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
374 #ifdef HAVE_ATTR_length
379 if (insn_lengths_max_uid
> INSN_UID (insn
))
380 return insn_lengths
[INSN_UID (insn
)];
382 switch (GET_CODE (insn
))
390 length
= fallback_fn (insn
);
394 body
= PATTERN (insn
);
395 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
397 /* Alignment is machine-dependent and should be handled by
401 length
= fallback_fn (insn
);
405 body
= PATTERN (insn
);
406 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
409 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
410 length
= asm_insn_count (body
) * fallback_fn (insn
);
411 else if (GET_CODE (body
) == SEQUENCE
)
412 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
413 length
+= get_attr_length (XVECEXP (body
, 0, i
));
415 length
= fallback_fn (insn
);
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn
, length
);
426 #else /* not HAVE_ATTR_length */
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn
)
438 return get_attr_length_1 (insn
, insn_default_length
);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn
)
446 return get_attr_length_1 (insn
, insn_min_length
);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
491 #define LABEL_ALIGN(LABEL) align_labels_log
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
499 #define LOOP_ALIGN(LABEL) align_loops_log
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
515 #define JUMP_ALIGN(LABEL) align_jumps_log
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
522 #ifndef ADDR_VEC_ALIGN
524 final_addr_vec_align (rtx addr_vec
)
526 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
528 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
529 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
530 return exact_log2 (align
);
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
543 static int min_labelno
, max_labelno
;
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
551 /* For the benefit of port specific code do this also as a function. */
554 label_to_alignment (rtx label
)
556 return LABEL_TO_ALIGNMENT (label
);
559 #ifdef HAVE_ATTR_length
560 /* The differences in addresses
561 between a branch and its target might grow or shrink depending on
562 the alignment the start insn of the range (the branch for a forward
563 branch or the label for a backward branch) starts out on; if these
564 differences are used naively, they can even oscillate infinitely.
565 We therefore want to compute a 'worst case' address difference that
566 is independent of the alignment the start insn of the range end
567 up on, and that is at least as large as the actual difference.
568 The function align_fuzz calculates the amount we have to add to the
569 naively computed difference, by traversing the part of the alignment
570 chain of the start insn of the range that is in front of the end insn
571 of the range, and considering for each alignment the maximum amount
572 that it might contribute to a size increase.
574 For casesi tables, we also want to know worst case minimum amounts of
575 address difference, in case a machine description wants to introduce
576 some common offset that is added to all offsets in a table.
577 For this purpose, align_fuzz with a growth argument of 0 computes the
578 appropriate adjustment. */
580 /* Compute the maximum delta by which the difference of the addresses of
581 START and END might grow / shrink due to a different address for start
582 which changes the size of alignment insns between START and END.
583 KNOWN_ALIGN_LOG is the alignment known for START.
584 GROWTH should be ~0 if the objective is to compute potential code size
585 increase, and 0 if the objective is to compute potential shrink.
586 The return value is undefined for any other value of GROWTH. */
589 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
591 int uid
= INSN_UID (start
);
593 int known_align
= 1 << known_align_log
;
594 int end_shuid
= INSN_SHUID (end
);
597 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
599 int align_addr
, new_align
;
601 uid
= INSN_UID (align_label
);
602 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
603 if (uid_shuid
[uid
] > end_shuid
)
605 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
606 new_align
= 1 << known_align_log
;
607 if (new_align
< known_align
)
609 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
610 known_align
= new_align
;
615 /* Compute a worst-case reference address of a branch so that it
616 can be safely used in the presence of aligned labels. Since the
617 size of the branch itself is unknown, the size of the branch is
618 not included in the range. I.e. for a forward branch, the reference
619 address is the end address of the branch as known from the previous
620 branch shortening pass, minus a value to account for possible size
621 increase due to alignment. For a backward branch, it is the start
622 address of the branch as known from the current pass, plus a value
623 to account for possible size increase due to alignment.
624 NB.: Therefore, the maximum offset allowed for backward branches needs
625 to exclude the branch size. */
628 insn_current_reference_address (rtx branch
)
633 if (! INSN_ADDRESSES_SET_P ())
636 seq
= NEXT_INSN (PREV_INSN (branch
));
637 seq_uid
= INSN_UID (seq
);
638 if (!JUMP_P (branch
))
639 /* This can happen for example on the PA; the objective is to know the
640 offset to address something in front of the start of the function.
641 Thus, we can treat it like a backward branch.
642 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
643 any alignment we'd encounter, so we skip the call to align_fuzz. */
644 return insn_current_address
;
645 dest
= JUMP_LABEL (branch
);
647 /* BRANCH has no proper alignment chain set, so use SEQ.
648 BRANCH also has no INSN_SHUID. */
649 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
651 /* Forward branch. */
652 return (insn_last_address
+ insn_lengths
[seq_uid
]
653 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
657 /* Backward branch. */
658 return (insn_current_address
659 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
662 #endif /* HAVE_ATTR_length */
664 /* Compute branch alignments based on frequency information in the
668 compute_alignments (void)
670 int log
, max_skip
, max_log
;
679 max_labelno
= max_label_num ();
680 min_labelno
= get_first_label_num ();
681 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
683 /* If not optimizing or optimizing for size, don't assign any alignments. */
684 if (! optimize
|| optimize_size
)
689 rtx label
= BB_HEAD (bb
);
690 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
695 || probably_never_executed_bb_p (bb
))
697 max_log
= LABEL_ALIGN (label
);
698 max_skip
= LABEL_ALIGN_MAX_SKIP
;
700 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
702 if (e
->flags
& EDGE_FALLTHRU
)
703 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
705 branch_frequency
+= EDGE_FREQUENCY (e
);
708 /* There are two purposes to align block with no fallthru incoming edge:
709 1) to avoid fetch stalls when branch destination is near cache boundary
710 2) to improve cache efficiency in case the previous block is not executed
711 (so it does not need to be in the cache).
713 We to catch first case, we align frequently executed blocks.
714 To catch the second, we align blocks that are executed more frequently
715 than the predecessor and the predecessor is likely to not be executed
716 when function is called. */
719 && (branch_frequency
> BB_FREQ_MAX
/ 10
720 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
721 && (bb
->prev_bb
->frequency
722 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
724 log
= JUMP_ALIGN (label
);
728 max_skip
= JUMP_ALIGN_MAX_SKIP
;
731 /* In case block is frequent and reached mostly by non-fallthru edge,
732 align it. It is most likely a first block of loop. */
734 && maybe_hot_bb_p (bb
)
735 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
736 && branch_frequency
> fallthru_frequency
* 2)
738 log
= LOOP_ALIGN (label
);
742 max_skip
= LOOP_ALIGN_MAX_SKIP
;
745 LABEL_TO_ALIGNMENT (label
) = max_log
;
746 LABEL_TO_MAX_SKIP (label
) = max_skip
;
751 struct tree_opt_pass pass_compute_alignments
=
755 compute_alignments
, /* execute */
758 0, /* static_pass_number */
760 0, /* properties_required */
761 0, /* properties_provided */
762 0, /* properties_destroyed */
763 0, /* todo_flags_start */
764 0, /* todo_flags_finish */
769 /* Make a pass over all insns and compute their actual lengths by shortening
770 any branches of variable length if possible. */
772 /* shorten_branches might be called multiple times: for example, the SH
773 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
774 In order to do this, it needs proper length information, which it obtains
775 by calling shorten_branches. This cannot be collapsed with
776 shorten_branches itself into a single pass unless we also want to integrate
777 reorg.c, since the branch splitting exposes new instructions with delay
781 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
788 #ifdef HAVE_ATTR_length
789 #define MAX_CODE_ALIGN 16
791 int something_changed
= 1;
792 char *varying_length
;
795 rtx align_tab
[MAX_CODE_ALIGN
];
799 /* Compute maximum UID and allocate label_align / uid_shuid. */
800 max_uid
= get_max_uid ();
802 /* Free uid_shuid before reallocating it. */
805 uid_shuid
= XNEWVEC (int, max_uid
);
807 if (max_labelno
!= max_label_num ())
809 int old
= max_labelno
;
813 max_labelno
= max_label_num ();
815 n_labels
= max_labelno
- min_labelno
+ 1;
816 n_old_labels
= old
- min_labelno
+ 1;
818 label_align
= xrealloc (label_align
,
819 n_labels
* sizeof (struct label_alignment
));
821 /* Range of labels grows monotonically in the function. Failing here
822 means that the initialization of array got lost. */
823 gcc_assert (n_old_labels
<= n_labels
);
825 memset (label_align
+ n_old_labels
, 0,
826 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
829 /* Initialize label_align and set up uid_shuid to be strictly
830 monotonically rising with insn order. */
831 /* We use max_log here to keep track of the maximum alignment we want to
832 impose on the next CODE_LABEL (or the current one if we are processing
833 the CODE_LABEL itself). */
838 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
842 INSN_SHUID (insn
) = i
++;
850 /* Merge in alignments computed by compute_alignments. */
851 log
= LABEL_TO_ALIGNMENT (insn
);
855 max_skip
= LABEL_TO_MAX_SKIP (insn
);
858 log
= LABEL_ALIGN (insn
);
862 max_skip
= LABEL_ALIGN_MAX_SKIP
;
864 next
= next_nonnote_insn (insn
);
865 /* ADDR_VECs only take room if read-only data goes into the text
867 if (JUMP_TABLES_IN_TEXT_SECTION
868 || readonly_data_section
== text_section
)
869 if (next
&& JUMP_P (next
))
871 rtx nextbody
= PATTERN (next
);
872 if (GET_CODE (nextbody
) == ADDR_VEC
873 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
875 log
= ADDR_VEC_ALIGN (next
);
879 max_skip
= LABEL_ALIGN_MAX_SKIP
;
883 LABEL_TO_ALIGNMENT (insn
) = max_log
;
884 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
888 else if (BARRIER_P (insn
))
892 for (label
= insn
; label
&& ! INSN_P (label
);
893 label
= NEXT_INSN (label
))
896 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
900 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
906 #ifdef HAVE_ATTR_length
908 /* Allocate the rest of the arrays. */
909 insn_lengths
= XNEWVEC (int, max_uid
);
910 insn_lengths_max_uid
= max_uid
;
911 /* Syntax errors can lead to labels being outside of the main insn stream.
912 Initialize insn_addresses, so that we get reproducible results. */
913 INSN_ADDRESSES_ALLOC (max_uid
);
915 varying_length
= XCNEWVEC (char, max_uid
);
917 /* Initialize uid_align. We scan instructions
918 from end to start, and keep in align_tab[n] the last seen insn
919 that does an alignment of at least n+1, i.e. the successor
920 in the alignment chain for an insn that does / has a known
922 uid_align
= XCNEWVEC (rtx
, max_uid
);
924 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
925 align_tab
[i
] = NULL_RTX
;
926 seq
= get_last_insn ();
927 for (; seq
; seq
= PREV_INSN (seq
))
929 int uid
= INSN_UID (seq
);
931 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
932 uid_align
[uid
] = align_tab
[0];
935 /* Found an alignment label. */
936 uid_align
[uid
] = align_tab
[log
];
937 for (i
= log
- 1; i
>= 0; i
--)
941 #ifdef CASE_VECTOR_SHORTEN_MODE
944 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
947 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
948 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
951 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
953 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
954 int len
, i
, min
, max
, insn_shuid
;
956 addr_diff_vec_flags flags
;
959 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
961 pat
= PATTERN (insn
);
962 len
= XVECLEN (pat
, 1);
963 gcc_assert (len
> 0);
964 min_align
= MAX_CODE_ALIGN
;
965 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
967 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
968 int shuid
= INSN_SHUID (lab
);
979 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
980 min_align
= LABEL_TO_ALIGNMENT (lab
);
982 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
983 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
984 insn_shuid
= INSN_SHUID (insn
);
985 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
986 memset (&flags
, 0, sizeof (flags
));
987 flags
.min_align
= min_align
;
988 flags
.base_after_vec
= rel
> insn_shuid
;
989 flags
.min_after_vec
= min
> insn_shuid
;
990 flags
.max_after_vec
= max
> insn_shuid
;
991 flags
.min_after_base
= min
> rel
;
992 flags
.max_after_base
= max
> rel
;
993 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
996 #endif /* CASE_VECTOR_SHORTEN_MODE */
998 /* Compute initial lengths, addresses, and varying flags for each insn. */
999 for (insn_current_address
= 0, insn
= first
;
1001 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1003 uid
= INSN_UID (insn
);
1005 insn_lengths
[uid
] = 0;
1009 int log
= LABEL_TO_ALIGNMENT (insn
);
1012 int align
= 1 << log
;
1013 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1014 insn_lengths
[uid
] = new_address
- insn_current_address
;
1018 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1020 if (NOTE_P (insn
) || BARRIER_P (insn
)
1023 if (INSN_DELETED_P (insn
))
1026 body
= PATTERN (insn
);
1027 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1029 /* This only takes room if read-only data goes into the text
1031 if (JUMP_TABLES_IN_TEXT_SECTION
1032 || readonly_data_section
== text_section
)
1033 insn_lengths
[uid
] = (XVECLEN (body
,
1034 GET_CODE (body
) == ADDR_DIFF_VEC
)
1035 * GET_MODE_SIZE (GET_MODE (body
)));
1036 /* Alignment is handled by ADDR_VEC_ALIGN. */
1038 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1039 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1040 else if (GET_CODE (body
) == SEQUENCE
)
1043 int const_delay_slots
;
1045 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1047 const_delay_slots
= 0;
1049 /* Inside a delay slot sequence, we do not do any branch shortening
1050 if the shortening could change the number of delay slots
1052 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1054 rtx inner_insn
= XVECEXP (body
, 0, i
);
1055 int inner_uid
= INSN_UID (inner_insn
);
1058 if (GET_CODE (body
) == ASM_INPUT
1059 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1060 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1061 * insn_default_length (inner_insn
));
1063 inner_length
= insn_default_length (inner_insn
);
1065 insn_lengths
[inner_uid
] = inner_length
;
1066 if (const_delay_slots
)
1068 if ((varying_length
[inner_uid
]
1069 = insn_variable_length_p (inner_insn
)) != 0)
1070 varying_length
[uid
] = 1;
1071 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1072 + insn_lengths
[uid
]);
1075 varying_length
[inner_uid
] = 0;
1076 insn_lengths
[uid
] += inner_length
;
1079 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1081 insn_lengths
[uid
] = insn_default_length (insn
);
1082 varying_length
[uid
] = insn_variable_length_p (insn
);
1085 /* If needed, do any adjustment. */
1086 #ifdef ADJUST_INSN_LENGTH
1087 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1088 if (insn_lengths
[uid
] < 0)
1089 fatal_insn ("negative insn length", insn
);
1093 /* Now loop over all the insns finding varying length insns. For each,
1094 get the current insn length. If it has changed, reflect the change.
1095 When nothing changes for a full pass, we are done. */
1097 while (something_changed
)
1099 something_changed
= 0;
1100 insn_current_align
= MAX_CODE_ALIGN
- 1;
1101 for (insn_current_address
= 0, insn
= first
;
1103 insn
= NEXT_INSN (insn
))
1106 #ifdef ADJUST_INSN_LENGTH
1111 uid
= INSN_UID (insn
);
1115 int log
= LABEL_TO_ALIGNMENT (insn
);
1116 if (log
> insn_current_align
)
1118 int align
= 1 << log
;
1119 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1120 insn_lengths
[uid
] = new_address
- insn_current_address
;
1121 insn_current_align
= log
;
1122 insn_current_address
= new_address
;
1125 insn_lengths
[uid
] = 0;
1126 INSN_ADDRESSES (uid
) = insn_current_address
;
1130 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1131 if (length_align
< insn_current_align
)
1132 insn_current_align
= length_align
;
1134 insn_last_address
= INSN_ADDRESSES (uid
);
1135 INSN_ADDRESSES (uid
) = insn_current_address
;
1137 #ifdef CASE_VECTOR_SHORTEN_MODE
1138 if (optimize
&& JUMP_P (insn
)
1139 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1141 rtx body
= PATTERN (insn
);
1142 int old_length
= insn_lengths
[uid
];
1143 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1144 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1145 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1146 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1147 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1148 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1151 addr_diff_vec_flags flags
;
1153 /* Avoid automatic aggregate initialization. */
1154 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1156 /* Try to find a known alignment for rel_lab. */
1157 for (prev
= rel_lab
;
1159 && ! insn_lengths
[INSN_UID (prev
)]
1160 && ! (varying_length
[INSN_UID (prev
)] & 1);
1161 prev
= PREV_INSN (prev
))
1162 if (varying_length
[INSN_UID (prev
)] & 2)
1164 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1168 /* See the comment on addr_diff_vec_flags in rtl.h for the
1169 meaning of the flags values. base: REL_LAB vec: INSN */
1170 /* Anything after INSN has still addresses from the last
1171 pass; adjust these so that they reflect our current
1172 estimate for this pass. */
1173 if (flags
.base_after_vec
)
1174 rel_addr
+= insn_current_address
- insn_last_address
;
1175 if (flags
.min_after_vec
)
1176 min_addr
+= insn_current_address
- insn_last_address
;
1177 if (flags
.max_after_vec
)
1178 max_addr
+= insn_current_address
- insn_last_address
;
1179 /* We want to know the worst case, i.e. lowest possible value
1180 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1181 its offset is positive, and we have to be wary of code shrink;
1182 otherwise, it is negative, and we have to be vary of code
1184 if (flags
.min_after_base
)
1186 /* If INSN is between REL_LAB and MIN_LAB, the size
1187 changes we are about to make can change the alignment
1188 within the observed offset, therefore we have to break
1189 it up into two parts that are independent. */
1190 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1192 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1193 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1196 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1200 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1202 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1203 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1206 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1208 /* Likewise, determine the highest lowest possible value
1209 for the offset of MAX_LAB. */
1210 if (flags
.max_after_base
)
1212 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1214 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1215 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1218 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1222 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1224 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1225 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1228 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1230 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1231 max_addr
- rel_addr
,
1233 if (JUMP_TABLES_IN_TEXT_SECTION
1234 || readonly_data_section
== text_section
)
1237 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1238 insn_current_address
+= insn_lengths
[uid
];
1239 if (insn_lengths
[uid
] != old_length
)
1240 something_changed
= 1;
1245 #endif /* CASE_VECTOR_SHORTEN_MODE */
1247 if (! (varying_length
[uid
]))
1249 if (NONJUMP_INSN_P (insn
)
1250 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1254 body
= PATTERN (insn
);
1255 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1257 rtx inner_insn
= XVECEXP (body
, 0, i
);
1258 int inner_uid
= INSN_UID (inner_insn
);
1260 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1262 insn_current_address
+= insn_lengths
[inner_uid
];
1266 insn_current_address
+= insn_lengths
[uid
];
1271 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1275 body
= PATTERN (insn
);
1277 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1279 rtx inner_insn
= XVECEXP (body
, 0, i
);
1280 int inner_uid
= INSN_UID (inner_insn
);
1283 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1285 /* insn_current_length returns 0 for insns with a
1286 non-varying length. */
1287 if (! varying_length
[inner_uid
])
1288 inner_length
= insn_lengths
[inner_uid
];
1290 inner_length
= insn_current_length (inner_insn
);
1292 if (inner_length
!= insn_lengths
[inner_uid
])
1294 insn_lengths
[inner_uid
] = inner_length
;
1295 something_changed
= 1;
1297 insn_current_address
+= insn_lengths
[inner_uid
];
1298 new_length
+= inner_length
;
1303 new_length
= insn_current_length (insn
);
1304 insn_current_address
+= new_length
;
1307 #ifdef ADJUST_INSN_LENGTH
1308 /* If needed, do any adjustment. */
1309 tmp_length
= new_length
;
1310 ADJUST_INSN_LENGTH (insn
, new_length
);
1311 insn_current_address
+= (new_length
- tmp_length
);
1314 if (new_length
!= insn_lengths
[uid
])
1316 insn_lengths
[uid
] = new_length
;
1317 something_changed
= 1;
1320 /* For a non-optimizing compile, do only a single pass. */
1325 free (varying_length
);
1327 #endif /* HAVE_ATTR_length */
1330 #ifdef HAVE_ATTR_length
1331 /* Given the body of an INSN known to be generated by an ASM statement, return
1332 the number of machine instructions likely to be generated for this insn.
1333 This is used to compute its length. */
1336 asm_insn_count (rtx body
)
1338 const char *template;
1341 if (GET_CODE (body
) == ASM_INPUT
)
1342 template = XSTR (body
, 0);
1344 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1346 for (; *template; template++)
1347 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1354 /* ??? This is probably the wrong place for these. */
1355 /* Structure recording the mapping from source file and directory
1356 names at compile time to those to be embedded in debug
1358 typedef struct debug_prefix_map
1360 const char *old_prefix
;
1361 const char *new_prefix
;
1364 struct debug_prefix_map
*next
;
1367 /* Linked list of such structures. */
1368 debug_prefix_map
*debug_prefix_maps
;
1371 /* Record a debug file prefix mapping. ARG is the argument to
1372 -fdebug-prefix-map and must be of the form OLD=NEW. */
1375 add_debug_prefix_map (const char *arg
)
1377 debug_prefix_map
*map
;
1380 p
= strchr (arg
, '=');
1383 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1386 map
= XNEW (debug_prefix_map
);
1387 map
->old_prefix
= ggc_alloc_string (arg
, p
- arg
);
1388 map
->old_len
= p
- arg
;
1390 map
->new_prefix
= ggc_strdup (p
);
1391 map
->new_len
= strlen (p
);
1392 map
->next
= debug_prefix_maps
;
1393 debug_prefix_maps
= map
;
1396 /* Perform user-specified mapping of debug filename prefixes. Return
1397 the new name corresponding to FILENAME. */
1400 remap_debug_filename (const char *filename
)
1402 debug_prefix_map
*map
;
1407 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1408 if (strncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1412 name
= filename
+ map
->old_len
;
1413 name_len
= strlen (name
) + 1;
1414 s
= (char *) alloca (name_len
+ map
->new_len
);
1415 memcpy (s
, map
->new_prefix
, map
->new_len
);
1416 memcpy (s
+ map
->new_len
, name
, name_len
);
1417 return ggc_strdup (s
);
1420 /* Output assembler code for the start of a function,
1421 and initialize some of the variables in this file
1422 for the new function. The label for the function and associated
1423 assembler pseudo-ops have already been output in `assemble_start_function'.
1425 FIRST is the first insn of the rtl for the function being compiled.
1426 FILE is the file to write assembler code to.
1427 OPTIMIZE is nonzero if we should eliminate redundant
1428 test and compare insns. */
1431 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1432 int optimize ATTRIBUTE_UNUSED
)
1436 this_is_asm_operands
= 0;
1438 last_filename
= locator_file (prologue_locator
);
1439 last_linenum
= locator_line (prologue_locator
);
1441 high_block_linenum
= high_function_linenum
= last_linenum
;
1443 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1445 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1446 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1447 dwarf2out_begin_prologue (0, NULL
);
1450 #ifdef LEAF_REG_REMAP
1451 if (current_function_uses_only_leaf_regs
)
1452 leaf_renumber_regs (first
);
1455 /* The Sun386i and perhaps other machines don't work right
1456 if the profiling code comes after the prologue. */
1457 #ifdef PROFILE_BEFORE_PROLOGUE
1458 if (current_function_profile
)
1459 profile_function (file
);
1460 #endif /* PROFILE_BEFORE_PROLOGUE */
1462 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1463 if (dwarf2out_do_frame ())
1464 dwarf2out_frame_debug (NULL_RTX
, false);
1467 /* If debugging, assign block numbers to all of the blocks in this
1471 reemit_insn_block_notes ();
1472 number_blocks (current_function_decl
);
1473 /* We never actually put out begin/end notes for the top-level
1474 block in the function. But, conceptually, that block is
1476 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1479 /* First output the function prologue: code to set up the stack frame. */
1480 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1482 /* If the machine represents the prologue as RTL, the profiling code must
1483 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1484 #ifdef HAVE_prologue
1485 if (! HAVE_prologue
)
1487 profile_after_prologue (file
);
1491 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1493 #ifndef PROFILE_BEFORE_PROLOGUE
1494 if (current_function_profile
)
1495 profile_function (file
);
1496 #endif /* not PROFILE_BEFORE_PROLOGUE */
1500 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1502 #ifndef NO_PROFILE_COUNTERS
1503 # define NO_PROFILE_COUNTERS 0
1505 #if defined(ASM_OUTPUT_REG_PUSH)
1506 int sval
= current_function_returns_struct
;
1507 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1508 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1509 int cxt
= cfun
->static_chain_decl
!= NULL
;
1511 #endif /* ASM_OUTPUT_REG_PUSH */
1513 if (! NO_PROFILE_COUNTERS
)
1515 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1516 switch_to_section (data_section
);
1517 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1518 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1519 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1522 switch_to_section (current_function_section ());
1524 #if defined(ASM_OUTPUT_REG_PUSH)
1525 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1527 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1531 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1533 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1535 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1538 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1543 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1545 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1547 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1549 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1552 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1557 #if defined(ASM_OUTPUT_REG_PUSH)
1558 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1560 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1565 /* Output assembler code for the end of a function.
1566 For clarity, args are same as those of `final_start_function'
1567 even though not all of them are needed. */
1570 final_end_function (void)
1574 (*debug_hooks
->end_function
) (high_function_linenum
);
1576 /* Finally, output the function epilogue:
1577 code to restore the stack frame and return to the caller. */
1578 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1580 /* And debug output. */
1581 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1583 #if defined (DWARF2_UNWIND_INFO)
1584 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1585 && dwarf2out_do_frame ())
1586 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1590 /* Output assembler code for some insns: all or part of a function.
1591 For description of args, see `final_start_function', above. */
1594 final (rtx first
, FILE *file
, int optimize
)
1600 last_ignored_compare
= 0;
1602 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1604 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1605 max_uid
= INSN_UID (insn
);
1607 /* If CC tracking across branches is enabled, record the insn which
1608 jumps to each branch only reached from one place. */
1609 if (optimize
&& JUMP_P (insn
))
1611 rtx lab
= JUMP_LABEL (insn
);
1612 if (lab
&& LABEL_NUSES (lab
) == 1)
1614 LABEL_REFS (lab
) = insn
;
1624 /* Output the insns. */
1625 for (insn
= first
; insn
;)
1627 #ifdef HAVE_ATTR_length
1628 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1630 /* This can be triggered by bugs elsewhere in the compiler if
1631 new insns are created after init_insn_lengths is called. */
1632 gcc_assert (NOTE_P (insn
));
1633 insn_current_address
= -1;
1636 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1637 #endif /* HAVE_ATTR_length */
1639 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1644 get_insn_template (int code
, rtx insn
)
1646 switch (insn_data
[code
].output_format
)
1648 case INSN_OUTPUT_FORMAT_SINGLE
:
1649 return insn_data
[code
].output
.single
;
1650 case INSN_OUTPUT_FORMAT_MULTI
:
1651 return insn_data
[code
].output
.multi
[which_alternative
];
1652 case INSN_OUTPUT_FORMAT_FUNCTION
:
1654 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1661 /* Emit the appropriate declaration for an alternate-entry-point
1662 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1663 LABEL_KIND != LABEL_NORMAL.
1665 The case fall-through in this function is intentional. */
1667 output_alternate_entry_point (FILE *file
, rtx insn
)
1669 const char *name
= LABEL_NAME (insn
);
1671 switch (LABEL_KIND (insn
))
1673 case LABEL_WEAK_ENTRY
:
1674 #ifdef ASM_WEAKEN_LABEL
1675 ASM_WEAKEN_LABEL (file
, name
);
1677 case LABEL_GLOBAL_ENTRY
:
1678 targetm
.asm_out
.globalize_label (file
, name
);
1679 case LABEL_STATIC_ENTRY
:
1680 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1681 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1683 ASM_OUTPUT_LABEL (file
, name
);
1692 /* The final scan for one insn, INSN.
1693 Args are same as in `final', except that INSN
1694 is the insn being scanned.
1695 Value returned is the next insn to be scanned.
1697 NOPEEPHOLES is the flag to disallow peephole processing (currently
1698 used for within delayed branch sequence output).
1700 SEEN is used to track the end of the prologue, for emitting
1701 debug information. We force the emission of a line note after
1702 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1703 at the beginning of the second basic block, whichever comes
1707 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1708 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1717 /* Ignore deleted insns. These can occur when we split insns (due to a
1718 template of "#") while not optimizing. */
1719 if (INSN_DELETED_P (insn
))
1720 return NEXT_INSN (insn
);
1722 switch (GET_CODE (insn
))
1725 switch (NOTE_KIND (insn
))
1727 case NOTE_INSN_DELETED
:
1730 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1731 in_cold_section_p
= !in_cold_section_p
;
1732 (*debug_hooks
->switch_text_section
) ();
1733 switch_to_section (current_function_section ());
1736 case NOTE_INSN_BASIC_BLOCK
:
1737 #ifdef TARGET_UNWIND_INFO
1738 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1742 fprintf (asm_out_file
, "\t%s basic block %d\n",
1743 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1745 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1747 *seen
|= SEEN_EMITTED
;
1748 force_source_line
= true;
1755 case NOTE_INSN_EH_REGION_BEG
:
1756 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1757 NOTE_EH_HANDLER (insn
));
1760 case NOTE_INSN_EH_REGION_END
:
1761 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1762 NOTE_EH_HANDLER (insn
));
1765 case NOTE_INSN_PROLOGUE_END
:
1766 targetm
.asm_out
.function_end_prologue (file
);
1767 profile_after_prologue (file
);
1769 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1771 *seen
|= SEEN_EMITTED
;
1772 force_source_line
= true;
1779 case NOTE_INSN_EPILOGUE_BEG
:
1780 targetm
.asm_out
.function_begin_epilogue (file
);
1783 case NOTE_INSN_FUNCTION_BEG
:
1785 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1787 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1789 *seen
|= SEEN_EMITTED
;
1790 force_source_line
= true;
1797 case NOTE_INSN_BLOCK_BEG
:
1798 if (debug_info_level
== DINFO_LEVEL_NORMAL
1799 || debug_info_level
== DINFO_LEVEL_VERBOSE
1800 || write_symbols
== DWARF2_DEBUG
1801 || write_symbols
== VMS_AND_DWARF2_DEBUG
1802 || write_symbols
== VMS_DEBUG
)
1804 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1808 high_block_linenum
= last_linenum
;
1810 /* Output debugging info about the symbol-block beginning. */
1811 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1813 /* Mark this block as output. */
1814 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1818 case NOTE_INSN_BLOCK_END
:
1819 if (debug_info_level
== DINFO_LEVEL_NORMAL
1820 || debug_info_level
== DINFO_LEVEL_VERBOSE
1821 || write_symbols
== DWARF2_DEBUG
1822 || write_symbols
== VMS_AND_DWARF2_DEBUG
1823 || write_symbols
== VMS_DEBUG
)
1825 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1829 /* End of a symbol-block. */
1831 gcc_assert (block_depth
>= 0);
1833 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1837 case NOTE_INSN_DELETED_LABEL
:
1838 /* Emit the label. We may have deleted the CODE_LABEL because
1839 the label could be proved to be unreachable, though still
1840 referenced (in the form of having its address taken. */
1841 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1844 case NOTE_INSN_VAR_LOCATION
:
1845 (*debug_hooks
->var_location
) (insn
);
1855 #if defined (DWARF2_UNWIND_INFO)
1856 if (dwarf2out_do_frame ())
1857 dwarf2out_frame_debug (insn
, false);
1862 /* The target port might emit labels in the output function for
1863 some insn, e.g. sh.c output_branchy_insn. */
1864 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1866 int align
= LABEL_TO_ALIGNMENT (insn
);
1867 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1868 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1871 if (align
&& NEXT_INSN (insn
))
1873 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1874 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1876 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1877 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1879 ASM_OUTPUT_ALIGN (file
, align
);
1886 /* If this label is reached from only one place, set the condition
1887 codes from the instruction just before the branch. */
1889 /* Disabled because some insns set cc_status in the C output code
1890 and NOTICE_UPDATE_CC alone can set incorrect status. */
1891 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1893 rtx jump
= LABEL_REFS (insn
);
1894 rtx barrier
= prev_nonnote_insn (insn
);
1896 /* If the LABEL_REFS field of this label has been set to point
1897 at a branch, the predecessor of the branch is a regular
1898 insn, and that branch is the only way to reach this label,
1899 set the condition codes based on the branch and its
1901 if (barrier
&& BARRIER_P (barrier
)
1902 && jump
&& JUMP_P (jump
)
1903 && (prev
= prev_nonnote_insn (jump
))
1904 && NONJUMP_INSN_P (prev
))
1906 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1907 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1912 if (LABEL_NAME (insn
))
1913 (*debug_hooks
->label
) (insn
);
1917 fputs (ASM_APP_OFF
, file
);
1921 next
= next_nonnote_insn (insn
);
1922 if (next
!= 0 && JUMP_P (next
))
1924 rtx nextbody
= PATTERN (next
);
1926 /* If this label is followed by a jump-table,
1927 make sure we put the label in the read-only section. Also
1928 possibly write the label and jump table together. */
1930 if (GET_CODE (nextbody
) == ADDR_VEC
1931 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1933 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1934 /* In this case, the case vector is being moved by the
1935 target, so don't output the label at all. Leave that
1936 to the back end macros. */
1938 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1942 switch_to_section (targetm
.asm_out
.function_rodata_section
1943 (current_function_decl
));
1945 #ifdef ADDR_VEC_ALIGN
1946 log_align
= ADDR_VEC_ALIGN (next
);
1948 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1950 ASM_OUTPUT_ALIGN (file
, log_align
);
1953 switch_to_section (current_function_section ());
1955 #ifdef ASM_OUTPUT_CASE_LABEL
1956 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1959 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1965 if (LABEL_ALT_ENTRY_P (insn
))
1966 output_alternate_entry_point (file
, insn
);
1968 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1973 rtx body
= PATTERN (insn
);
1974 int insn_code_number
;
1975 const char *template;
1977 #ifdef HAVE_conditional_execution
1978 /* Reset this early so it is correct for ASM statements. */
1979 current_insn_predicate
= NULL_RTX
;
1981 /* An INSN, JUMP_INSN or CALL_INSN.
1982 First check for special kinds that recog doesn't recognize. */
1984 if (GET_CODE (body
) == USE
/* These are just declarations. */
1985 || GET_CODE (body
) == CLOBBER
)
1990 /* If there is a REG_CC_SETTER note on this insn, it means that
1991 the setting of the condition code was done in the delay slot
1992 of the insn that branched here. So recover the cc status
1993 from the insn that set it. */
1995 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1998 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1999 cc_prev_status
= cc_status
;
2004 /* Detect insns that are really jump-tables
2005 and output them as such. */
2007 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2009 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2013 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2014 switch_to_section (targetm
.asm_out
.function_rodata_section
2015 (current_function_decl
));
2017 switch_to_section (current_function_section ());
2021 fputs (ASM_APP_OFF
, file
);
2025 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2026 if (GET_CODE (body
) == ADDR_VEC
)
2028 #ifdef ASM_OUTPUT_ADDR_VEC
2029 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2036 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2037 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2043 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2044 for (idx
= 0; idx
< vlen
; idx
++)
2046 if (GET_CODE (body
) == ADDR_VEC
)
2048 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2049 ASM_OUTPUT_ADDR_VEC_ELT
2050 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2057 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2058 ASM_OUTPUT_ADDR_DIFF_ELT
2061 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2062 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2068 #ifdef ASM_OUTPUT_CASE_END
2069 ASM_OUTPUT_CASE_END (file
,
2070 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2075 switch_to_section (current_function_section ());
2079 /* Output this line note if it is the first or the last line
2081 if (notice_source_line (insn
))
2083 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2086 if (GET_CODE (body
) == ASM_INPUT
)
2088 const char *string
= XSTR (body
, 0);
2090 /* There's no telling what that did to the condition codes. */
2099 fputs (ASM_APP_ON
, file
);
2102 #ifdef USE_MAPPED_LOCATION
2103 loc
= ASM_INPUT_SOURCE_LOCATION (body
);
2105 loc
.file
= ASM_INPUT_SOURCE_FILE (body
);
2106 loc
.line
= ASM_INPUT_SOURCE_LINE (body
);
2108 if (*loc
.file
&& loc
.line
)
2109 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2110 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2111 fprintf (asm_out_file
, "\t%s\n", string
);
2112 #if HAVE_AS_LINE_ZERO
2113 if (*loc
.file
&& loc
.line
)
2114 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2120 /* Detect `asm' construct with operands. */
2121 if (asm_noperands (body
) >= 0)
2123 unsigned int noperands
= asm_noperands (body
);
2124 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2128 /* There's no telling what that did to the condition codes. */
2131 /* Get out the operand values. */
2132 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2133 /* Inhibit dieing on what would otherwise be compiler bugs. */
2134 insn_noperands
= noperands
;
2135 this_is_asm_operands
= insn
;
2137 #ifdef FINAL_PRESCAN_INSN
2138 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2141 /* Output the insn using them. */
2146 fputs (ASM_APP_ON
, file
);
2149 if (loc
.file
&& loc
.line
)
2150 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2151 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2152 output_asm_insn (string
, ops
);
2153 #if HAVE_AS_LINE_ZERO
2154 if (loc
.file
&& loc
.line
)
2155 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2159 this_is_asm_operands
= 0;
2165 fputs (ASM_APP_OFF
, file
);
2169 if (GET_CODE (body
) == SEQUENCE
)
2171 /* A delayed-branch sequence */
2174 final_sequence
= body
;
2176 /* Record the delay slots' frame information before the branch.
2177 This is needed for delayed calls: see execute_cfa_program(). */
2178 #if defined (DWARF2_UNWIND_INFO)
2179 if (dwarf2out_do_frame ())
2180 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2181 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2184 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2185 force the restoration of a comparison that was previously
2186 thought unnecessary. If that happens, cancel this sequence
2187 and cause that insn to be restored. */
2189 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2190 if (next
!= XVECEXP (body
, 0, 1))
2196 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2198 rtx insn
= XVECEXP (body
, 0, i
);
2199 rtx next
= NEXT_INSN (insn
);
2200 /* We loop in case any instruction in a delay slot gets
2203 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2204 while (insn
!= next
);
2206 #ifdef DBR_OUTPUT_SEQEND
2207 DBR_OUTPUT_SEQEND (file
);
2211 /* If the insn requiring the delay slot was a CALL_INSN, the
2212 insns in the delay slot are actually executed before the
2213 called function. Hence we don't preserve any CC-setting
2214 actions in these insns and the CC must be marked as being
2215 clobbered by the function. */
2216 if (CALL_P (XVECEXP (body
, 0, 0)))
2223 /* We have a real machine instruction as rtl. */
2225 body
= PATTERN (insn
);
2228 set
= single_set (insn
);
2230 /* Check for redundant test and compare instructions
2231 (when the condition codes are already set up as desired).
2232 This is done only when optimizing; if not optimizing,
2233 it should be possible for the user to alter a variable
2234 with the debugger in between statements
2235 and the next statement should reexamine the variable
2236 to compute the condition codes. */
2241 && GET_CODE (SET_DEST (set
)) == CC0
2242 && insn
!= last_ignored_compare
)
2244 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2245 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2246 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2248 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2249 XEXP (SET_SRC (set
), 0)
2250 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2251 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2252 XEXP (SET_SRC (set
), 1)
2253 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2255 if ((cc_status
.value1
!= 0
2256 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2257 || (cc_status
.value2
!= 0
2258 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2260 /* Don't delete insn if it has an addressing side-effect. */
2261 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2262 /* or if anything in it is volatile. */
2263 && ! volatile_refs_p (PATTERN (insn
)))
2265 /* We don't really delete the insn; just ignore it. */
2266 last_ignored_compare
= insn
;
2275 /* If this is a conditional branch, maybe modify it
2276 if the cc's are in a nonstandard state
2277 so that it accomplishes the same thing that it would
2278 do straightforwardly if the cc's were set up normally. */
2280 if (cc_status
.flags
!= 0
2282 && GET_CODE (body
) == SET
2283 && SET_DEST (body
) == pc_rtx
2284 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2285 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2286 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2288 /* This function may alter the contents of its argument
2289 and clear some of the cc_status.flags bits.
2290 It may also return 1 meaning condition now always true
2291 or -1 meaning condition now always false
2292 or 2 meaning condition nontrivial but altered. */
2293 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2294 /* If condition now has fixed value, replace the IF_THEN_ELSE
2295 with its then-operand or its else-operand. */
2297 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2299 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2301 /* The jump is now either unconditional or a no-op.
2302 If it has become a no-op, don't try to output it.
2303 (It would not be recognized.) */
2304 if (SET_SRC (body
) == pc_rtx
)
2309 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2310 /* Replace (set (pc) (return)) with (return). */
2311 PATTERN (insn
) = body
= SET_SRC (body
);
2313 /* Rerecognize the instruction if it has changed. */
2315 INSN_CODE (insn
) = -1;
2318 /* If this is a conditional trap, maybe modify it if the cc's
2319 are in a nonstandard state so that it accomplishes the same
2320 thing that it would do straightforwardly if the cc's were
2322 if (cc_status
.flags
!= 0
2323 && NONJUMP_INSN_P (insn
)
2324 && GET_CODE (body
) == TRAP_IF
2325 && COMPARISON_P (TRAP_CONDITION (body
))
2326 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2328 /* This function may alter the contents of its argument
2329 and clear some of the cc_status.flags bits.
2330 It may also return 1 meaning condition now always true
2331 or -1 meaning condition now always false
2332 or 2 meaning condition nontrivial but altered. */
2333 int result
= alter_cond (TRAP_CONDITION (body
));
2335 /* If TRAP_CONDITION has become always false, delete the
2343 /* If TRAP_CONDITION has become always true, replace
2344 TRAP_CONDITION with const_true_rtx. */
2346 TRAP_CONDITION (body
) = const_true_rtx
;
2348 /* Rerecognize the instruction if it has changed. */
2350 INSN_CODE (insn
) = -1;
2353 /* If this is a conditional trap, maybe modify it if the cc's
2354 are in a nonstandard state so that it accomplishes the same
2355 thing that it would do straightforwardly if the cc's were
2357 if (cc_status
.flags
!= 0
2358 && NONJUMP_INSN_P (insn
)
2359 && GET_CODE (body
) == TRAP_IF
2360 && COMPARISON_P (TRAP_CONDITION (body
))
2361 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2363 /* This function may alter the contents of its argument
2364 and clear some of the cc_status.flags bits.
2365 It may also return 1 meaning condition now always true
2366 or -1 meaning condition now always false
2367 or 2 meaning condition nontrivial but altered. */
2368 int result
= alter_cond (TRAP_CONDITION (body
));
2370 /* If TRAP_CONDITION has become always false, delete the
2378 /* If TRAP_CONDITION has become always true, replace
2379 TRAP_CONDITION with const_true_rtx. */
2381 TRAP_CONDITION (body
) = const_true_rtx
;
2383 /* Rerecognize the instruction if it has changed. */
2385 INSN_CODE (insn
) = -1;
2388 /* Make same adjustments to instructions that examine the
2389 condition codes without jumping and instructions that
2390 handle conditional moves (if this machine has either one). */
2392 if (cc_status
.flags
!= 0
2395 rtx cond_rtx
, then_rtx
, else_rtx
;
2398 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2400 cond_rtx
= XEXP (SET_SRC (set
), 0);
2401 then_rtx
= XEXP (SET_SRC (set
), 1);
2402 else_rtx
= XEXP (SET_SRC (set
), 2);
2406 cond_rtx
= SET_SRC (set
);
2407 then_rtx
= const_true_rtx
;
2408 else_rtx
= const0_rtx
;
2411 switch (GET_CODE (cond_rtx
))
2425 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2427 result
= alter_cond (cond_rtx
);
2429 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2430 else if (result
== -1)
2431 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2432 else if (result
== 2)
2433 INSN_CODE (insn
) = -1;
2434 if (SET_DEST (set
) == SET_SRC (set
))
2446 #ifdef HAVE_peephole
2447 /* Do machine-specific peephole optimizations if desired. */
2449 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2451 rtx next
= peephole (insn
);
2452 /* When peepholing, if there were notes within the peephole,
2453 emit them before the peephole. */
2454 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2456 rtx note
, prev
= PREV_INSN (insn
);
2458 for (note
= NEXT_INSN (insn
); note
!= next
;
2459 note
= NEXT_INSN (note
))
2460 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2462 /* Put the notes in the proper position for a later
2463 rescan. For example, the SH target can do this
2464 when generating a far jump in a delayed branch
2466 note
= NEXT_INSN (insn
);
2467 PREV_INSN (note
) = prev
;
2468 NEXT_INSN (prev
) = note
;
2469 NEXT_INSN (PREV_INSN (next
)) = insn
;
2470 PREV_INSN (insn
) = PREV_INSN (next
);
2471 NEXT_INSN (insn
) = next
;
2472 PREV_INSN (next
) = insn
;
2475 /* PEEPHOLE might have changed this. */
2476 body
= PATTERN (insn
);
2480 /* Try to recognize the instruction.
2481 If successful, verify that the operands satisfy the
2482 constraints for the instruction. Crash if they don't,
2483 since `reload' should have changed them so that they do. */
2485 insn_code_number
= recog_memoized (insn
);
2486 cleanup_subreg_operands (insn
);
2488 /* Dump the insn in the assembly for debugging. */
2489 if (flag_dump_rtl_in_asm
)
2491 print_rtx_head
= ASM_COMMENT_START
;
2492 print_rtl_single (asm_out_file
, insn
);
2493 print_rtx_head
= "";
2496 if (! constrain_operands_cached (1))
2497 fatal_insn_not_found (insn
);
2499 /* Some target machines need to prescan each insn before
2502 #ifdef FINAL_PRESCAN_INSN
2503 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2506 #ifdef HAVE_conditional_execution
2507 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2508 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2512 cc_prev_status
= cc_status
;
2514 /* Update `cc_status' for this instruction.
2515 The instruction's output routine may change it further.
2516 If the output routine for a jump insn needs to depend
2517 on the cc status, it should look at cc_prev_status. */
2519 NOTICE_UPDATE_CC (body
, insn
);
2522 current_output_insn
= debug_insn
= insn
;
2524 #if defined (DWARF2_UNWIND_INFO)
2525 if (CALL_P (insn
) && dwarf2out_do_frame ())
2526 dwarf2out_frame_debug (insn
, false);
2529 /* Find the proper template for this insn. */
2530 template = get_insn_template (insn_code_number
, insn
);
2532 /* If the C code returns 0, it means that it is a jump insn
2533 which follows a deleted test insn, and that test insn
2534 needs to be reinserted. */
2539 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2541 /* We have already processed the notes between the setter and
2542 the user. Make sure we don't process them again, this is
2543 particularly important if one of the notes is a block
2544 scope note or an EH note. */
2546 prev
!= last_ignored_compare
;
2547 prev
= PREV_INSN (prev
))
2550 delete_insn (prev
); /* Use delete_note. */
2556 /* If the template is the string "#", it means that this insn must
2558 if (template[0] == '#' && template[1] == '\0')
2560 rtx
new = try_split (body
, insn
, 0);
2562 /* If we didn't split the insn, go away. */
2563 if (new == insn
&& PATTERN (new) == body
)
2564 fatal_insn ("could not split insn", insn
);
2566 #ifdef HAVE_ATTR_length
2567 /* This instruction should have been split in shorten_branches,
2568 to ensure that we would have valid length info for the
2576 #ifdef TARGET_UNWIND_INFO
2577 /* ??? This will put the directives in the wrong place if
2578 get_insn_template outputs assembly directly. However calling it
2579 before get_insn_template breaks if the insns is split. */
2580 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2583 /* Output assembler code from the template. */
2584 output_asm_insn (template, recog_data
.operand
);
2586 /* If necessary, report the effect that the instruction has on
2587 the unwind info. We've already done this for delay slots
2588 and call instructions. */
2589 #if defined (DWARF2_UNWIND_INFO)
2590 if (final_sequence
== 0
2591 #if !defined (HAVE_prologue)
2592 && !ACCUMULATE_OUTGOING_ARGS
2594 && dwarf2out_do_frame ())
2595 dwarf2out_frame_debug (insn
, true);
2598 current_output_insn
= debug_insn
= 0;
2601 return NEXT_INSN (insn
);
2604 /* Return whether a source line note needs to be emitted before INSN. */
2607 notice_source_line (rtx insn
)
2609 const char *filename
= insn_file (insn
);
2610 int linenum
= insn_line (insn
);
2613 && (force_source_line
2614 || filename
!= last_filename
2615 || last_linenum
!= linenum
))
2617 force_source_line
= false;
2618 last_filename
= filename
;
2619 last_linenum
= linenum
;
2620 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2621 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2627 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2628 directly to the desired hard register. */
2631 cleanup_subreg_operands (rtx insn
)
2634 bool changed
= false;
2635 extract_insn_cached (insn
);
2636 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2638 /* The following test cannot use recog_data.operand when testing
2639 for a SUBREG: the underlying object might have been changed
2640 already if we are inside a match_operator expression that
2641 matches the else clause. Instead we test the underlying
2642 expression directly. */
2643 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2645 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2648 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2649 || GET_CODE (recog_data
.operand
[i
]) == MULT
2650 || MEM_P (recog_data
.operand
[i
]))
2651 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2654 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2656 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2658 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2661 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2662 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2663 || MEM_P (*recog_data
.dup_loc
[i
]))
2664 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2667 df_insn_rescan (insn
);
2670 /* If X is a SUBREG, replace it with a REG or a MEM,
2671 based on the thing it is a subreg of. */
2674 alter_subreg (rtx
*xp
)
2677 rtx y
= SUBREG_REG (x
);
2679 /* simplify_subreg does not remove subreg from volatile references.
2680 We are required to. */
2683 int offset
= SUBREG_BYTE (x
);
2685 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2686 contains 0 instead of the proper offset. See simplify_subreg. */
2688 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2690 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2691 - GET_MODE_SIZE (GET_MODE (x
));
2692 if (WORDS_BIG_ENDIAN
)
2693 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2694 if (BYTES_BIG_ENDIAN
)
2695 offset
+= difference
% UNITS_PER_WORD
;
2698 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2702 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2709 /* Simplify_subreg can't handle some REG cases, but we have to. */
2710 unsigned int regno
= subreg_regno (x
);
2711 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2718 /* Do alter_subreg on all the SUBREGs contained in X. */
2721 walk_alter_subreg (rtx
*xp
, bool *changed
)
2724 switch (GET_CODE (x
))
2729 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2730 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2735 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2740 return alter_subreg (xp
);
2751 /* Given BODY, the body of a jump instruction, alter the jump condition
2752 as required by the bits that are set in cc_status.flags.
2753 Not all of the bits there can be handled at this level in all cases.
2755 The value is normally 0.
2756 1 means that the condition has become always true.
2757 -1 means that the condition has become always false.
2758 2 means that COND has been altered. */
2761 alter_cond (rtx cond
)
2765 if (cc_status
.flags
& CC_REVERSED
)
2768 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2771 if (cc_status
.flags
& CC_INVERTED
)
2774 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2777 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2778 switch (GET_CODE (cond
))
2783 /* Jump becomes unconditional. */
2789 /* Jump becomes no-op. */
2793 PUT_CODE (cond
, EQ
);
2798 PUT_CODE (cond
, NE
);
2806 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2807 switch (GET_CODE (cond
))
2811 /* Jump becomes unconditional. */
2816 /* Jump becomes no-op. */
2821 PUT_CODE (cond
, EQ
);
2827 PUT_CODE (cond
, NE
);
2835 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2836 switch (GET_CODE (cond
))
2839 /* Jump becomes unconditional. */
2843 PUT_CODE (cond
, EQ
);
2848 PUT_CODE (cond
, NE
);
2853 /* Jump becomes no-op. */
2860 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2861 switch (GET_CODE (cond
))
2867 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2872 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2877 if (cc_status
.flags
& CC_NOT_SIGNED
)
2878 /* The flags are valid if signed condition operators are converted
2880 switch (GET_CODE (cond
))
2883 PUT_CODE (cond
, LEU
);
2888 PUT_CODE (cond
, LTU
);
2893 PUT_CODE (cond
, GTU
);
2898 PUT_CODE (cond
, GEU
);
2910 /* Report inconsistency between the assembler template and the operands.
2911 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2914 output_operand_lossage (const char *cmsgid
, ...)
2918 const char *pfx_str
;
2921 va_start (ap
, cmsgid
);
2923 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2924 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2925 vasprintf (&new_message
, fmt_string
, ap
);
2927 if (this_is_asm_operands
)
2928 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2930 internal_error ("%s", new_message
);
2937 /* Output of assembler code from a template, and its subroutines. */
2939 /* Annotate the assembly with a comment describing the pattern and
2940 alternative used. */
2943 output_asm_name (void)
2947 int num
= INSN_CODE (debug_insn
);
2948 fprintf (asm_out_file
, "\t%s %d\t%s",
2949 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2950 insn_data
[num
].name
);
2951 if (insn_data
[num
].n_alternatives
> 1)
2952 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2953 #ifdef HAVE_ATTR_length
2954 fprintf (asm_out_file
, "\t[length = %d]",
2955 get_attr_length (debug_insn
));
2957 /* Clear this so only the first assembler insn
2958 of any rtl insn will get the special comment for -dp. */
2963 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2964 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2965 corresponds to the address of the object and 0 if to the object. */
2968 get_mem_expr_from_op (rtx op
, int *paddressp
)
2976 return REG_EXPR (op
);
2977 else if (!MEM_P (op
))
2980 if (MEM_EXPR (op
) != 0)
2981 return MEM_EXPR (op
);
2983 /* Otherwise we have an address, so indicate it and look at the address. */
2987 /* First check if we have a decl for the address, then look at the right side
2988 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2989 But don't allow the address to itself be indirect. */
2990 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2992 else if (GET_CODE (op
) == PLUS
2993 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2996 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2997 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3000 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3001 return inner_addressp
? 0 : expr
;
3004 /* Output operand names for assembler instructions. OPERANDS is the
3005 operand vector, OPORDER is the order to write the operands, and NOPS
3006 is the number of operands to write. */
3009 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3014 for (i
= 0; i
< nops
; i
++)
3017 rtx op
= operands
[oporder
[i
]];
3018 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3020 fprintf (asm_out_file
, "%c%s",
3021 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3025 fprintf (asm_out_file
, "%s",
3026 addressp
? "*" : "");
3027 print_mem_expr (asm_out_file
, expr
);
3030 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3031 && ORIGINAL_REGNO (op
) != REGNO (op
))
3032 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3036 /* Output text from TEMPLATE to the assembler output file,
3037 obeying %-directions to substitute operands taken from
3038 the vector OPERANDS.
3040 %N (for N a digit) means print operand N in usual manner.
3041 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3042 and print the label name with no punctuation.
3043 %cN means require operand N to be a constant
3044 and print the constant expression with no punctuation.
3045 %aN means expect operand N to be a memory address
3046 (not a memory reference!) and print a reference
3048 %nN means expect operand N to be a constant
3049 and print a constant expression for minus the value
3050 of the operand, with no other punctuation. */
3053 output_asm_insn (const char *template, rtx
*operands
)
3057 #ifdef ASSEMBLER_DIALECT
3060 int oporder
[MAX_RECOG_OPERANDS
];
3061 char opoutput
[MAX_RECOG_OPERANDS
];
3064 /* An insn may return a null string template
3065 in a case where no assembler code is needed. */
3069 memset (opoutput
, 0, sizeof opoutput
);
3071 putc ('\t', asm_out_file
);
3073 #ifdef ASM_OUTPUT_OPCODE
3074 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3081 if (flag_verbose_asm
)
3082 output_asm_operand_names (operands
, oporder
, ops
);
3083 if (flag_print_asm_name
)
3087 memset (opoutput
, 0, sizeof opoutput
);
3089 putc (c
, asm_out_file
);
3090 #ifdef ASM_OUTPUT_OPCODE
3091 while ((c
= *p
) == '\t')
3093 putc (c
, asm_out_file
);
3096 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3100 #ifdef ASSEMBLER_DIALECT
3106 output_operand_lossage ("nested assembly dialect alternatives");
3110 /* If we want the first dialect, do nothing. Otherwise, skip
3111 DIALECT_NUMBER of strings ending with '|'. */
3112 for (i
= 0; i
< dialect_number
; i
++)
3114 while (*p
&& *p
!= '}' && *p
++ != '|')
3123 output_operand_lossage ("unterminated assembly dialect alternative");
3130 /* Skip to close brace. */
3135 output_operand_lossage ("unterminated assembly dialect alternative");
3139 while (*p
++ != '}');
3143 putc (c
, asm_out_file
);
3148 putc (c
, asm_out_file
);
3154 /* %% outputs a single %. */
3158 putc (c
, asm_out_file
);
3160 /* %= outputs a number which is unique to each insn in the entire
3161 compilation. This is useful for making local labels that are
3162 referred to more than once in a given insn. */
3166 fprintf (asm_out_file
, "%d", insn_counter
);
3168 /* % followed by a letter and some digits
3169 outputs an operand in a special way depending on the letter.
3170 Letters `acln' are implemented directly.
3171 Other letters are passed to `output_operand' so that
3172 the PRINT_OPERAND macro can define them. */
3173 else if (ISALPHA (*p
))
3176 unsigned long opnum
;
3179 opnum
= strtoul (p
, &endptr
, 10);
3182 output_operand_lossage ("operand number missing "
3184 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3185 output_operand_lossage ("operand number out of range");
3186 else if (letter
== 'l')
3187 output_asm_label (operands
[opnum
]);
3188 else if (letter
== 'a')
3189 output_address (operands
[opnum
]);
3190 else if (letter
== 'c')
3192 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3193 output_addr_const (asm_out_file
, operands
[opnum
]);
3195 output_operand (operands
[opnum
], 'c');
3197 else if (letter
== 'n')
3199 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3200 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3201 - INTVAL (operands
[opnum
]));
3204 putc ('-', asm_out_file
);
3205 output_addr_const (asm_out_file
, operands
[opnum
]);
3209 output_operand (operands
[opnum
], letter
);
3211 if (!opoutput
[opnum
])
3212 oporder
[ops
++] = opnum
;
3213 opoutput
[opnum
] = 1;
3218 /* % followed by a digit outputs an operand the default way. */
3219 else if (ISDIGIT (*p
))
3221 unsigned long opnum
;
3224 opnum
= strtoul (p
, &endptr
, 10);
3225 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3226 output_operand_lossage ("operand number out of range");
3228 output_operand (operands
[opnum
], 0);
3230 if (!opoutput
[opnum
])
3231 oporder
[ops
++] = opnum
;
3232 opoutput
[opnum
] = 1;
3237 /* % followed by punctuation: output something for that
3238 punctuation character alone, with no operand.
3239 The PRINT_OPERAND macro decides what is actually done. */
3240 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3241 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3242 output_operand (NULL_RTX
, *p
++);
3245 output_operand_lossage ("invalid %%-code");
3249 putc (c
, asm_out_file
);
3252 /* Write out the variable names for operands, if we know them. */
3253 if (flag_verbose_asm
)
3254 output_asm_operand_names (operands
, oporder
, ops
);
3255 if (flag_print_asm_name
)
3258 putc ('\n', asm_out_file
);
3261 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3264 output_asm_label (rtx x
)
3268 if (GET_CODE (x
) == LABEL_REF
)
3272 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3273 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3275 output_operand_lossage ("'%%l' operand isn't a label");
3277 assemble_name (asm_out_file
, buf
);
3280 /* Print operand X using machine-dependent assembler syntax.
3281 The macro PRINT_OPERAND is defined just to control this function.
3282 CODE is a non-digit that preceded the operand-number in the % spec,
3283 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3284 between the % and the digits.
3285 When CODE is a non-letter, X is 0.
3287 The meanings of the letters are machine-dependent and controlled
3288 by PRINT_OPERAND. */
3291 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3293 if (x
&& GET_CODE (x
) == SUBREG
)
3294 x
= alter_subreg (&x
);
3296 /* X must not be a pseudo reg. */
3297 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3299 PRINT_OPERAND (asm_out_file
, x
, code
);
3302 /* Print a memory reference operand for address X
3303 using machine-dependent assembler syntax.
3304 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3307 output_address (rtx x
)
3309 bool changed
= false;
3310 walk_alter_subreg (&x
, &changed
);
3311 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3314 /* Print an integer constant expression in assembler syntax.
3315 Addition and subtraction are the only arithmetic
3316 that may appear in these expressions. */
3319 output_addr_const (FILE *file
, rtx x
)
3324 switch (GET_CODE (x
))
3331 if (SYMBOL_REF_DECL (x
))
3332 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3333 #ifdef ASM_OUTPUT_SYMBOL_REF
3334 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3336 assemble_name (file
, XSTR (x
, 0));
3344 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3345 #ifdef ASM_OUTPUT_LABEL_REF
3346 ASM_OUTPUT_LABEL_REF (file
, buf
);
3348 assemble_name (file
, buf
);
3353 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3357 /* This used to output parentheses around the expression,
3358 but that does not work on the 386 (either ATT or BSD assembler). */
3359 output_addr_const (file
, XEXP (x
, 0));
3363 if (GET_MODE (x
) == VOIDmode
)
3365 /* We can use %d if the number is one word and positive. */
3366 if (CONST_DOUBLE_HIGH (x
))
3367 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3368 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3369 else if (CONST_DOUBLE_LOW (x
) < 0)
3370 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3372 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3375 /* We can't handle floating point constants;
3376 PRINT_OPERAND must handle them. */
3377 output_operand_lossage ("floating constant misused");
3381 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_FIXED_VALUE_LOW (x
));
3385 /* Some assemblers need integer constants to appear last (eg masm). */
3386 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3388 output_addr_const (file
, XEXP (x
, 1));
3389 if (INTVAL (XEXP (x
, 0)) >= 0)
3390 fprintf (file
, "+");
3391 output_addr_const (file
, XEXP (x
, 0));
3395 output_addr_const (file
, XEXP (x
, 0));
3396 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3397 || INTVAL (XEXP (x
, 1)) >= 0)
3398 fprintf (file
, "+");
3399 output_addr_const (file
, XEXP (x
, 1));
3404 /* Avoid outputting things like x-x or x+5-x,
3405 since some assemblers can't handle that. */
3406 x
= simplify_subtraction (x
);
3407 if (GET_CODE (x
) != MINUS
)
3410 output_addr_const (file
, XEXP (x
, 0));
3411 fprintf (file
, "-");
3412 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3413 || GET_CODE (XEXP (x
, 1)) == PC
3414 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3415 output_addr_const (file
, XEXP (x
, 1));
3418 fputs (targetm
.asm_out
.open_paren
, file
);
3419 output_addr_const (file
, XEXP (x
, 1));
3420 fputs (targetm
.asm_out
.close_paren
, file
);
3427 output_addr_const (file
, XEXP (x
, 0));
3431 #ifdef OUTPUT_ADDR_CONST_EXTRA
3432 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3437 output_operand_lossage ("invalid expression as operand");
3441 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3442 %R prints the value of REGISTER_PREFIX.
3443 %L prints the value of LOCAL_LABEL_PREFIX.
3444 %U prints the value of USER_LABEL_PREFIX.
3445 %I prints the value of IMMEDIATE_PREFIX.
3446 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3447 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3449 We handle alternate assembler dialects here, just like output_asm_insn. */
3452 asm_fprintf (FILE *file
, const char *p
, ...)
3458 va_start (argptr
, p
);
3465 #ifdef ASSEMBLER_DIALECT
3470 /* If we want the first dialect, do nothing. Otherwise, skip
3471 DIALECT_NUMBER of strings ending with '|'. */
3472 for (i
= 0; i
< dialect_number
; i
++)
3474 while (*p
&& *p
++ != '|')
3484 /* Skip to close brace. */
3485 while (*p
&& *p
++ != '}')
3496 while (strchr ("-+ #0", c
))
3501 while (ISDIGIT (c
) || c
== '.')
3512 case 'd': case 'i': case 'u':
3513 case 'x': case 'X': case 'o':
3517 fprintf (file
, buf
, va_arg (argptr
, int));
3521 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3522 'o' cases, but we do not check for those cases. It
3523 means that the value is a HOST_WIDE_INT, which may be
3524 either `long' or `long long'. */
3525 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3526 q
+= strlen (HOST_WIDE_INT_PRINT
);
3529 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3534 #ifdef HAVE_LONG_LONG
3540 fprintf (file
, buf
, va_arg (argptr
, long long));
3547 fprintf (file
, buf
, va_arg (argptr
, long));
3555 fprintf (file
, buf
, va_arg (argptr
, char *));
3559 #ifdef ASM_OUTPUT_OPCODE
3560 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3565 #ifdef REGISTER_PREFIX
3566 fprintf (file
, "%s", REGISTER_PREFIX
);
3571 #ifdef IMMEDIATE_PREFIX
3572 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3577 #ifdef LOCAL_LABEL_PREFIX
3578 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3583 fputs (user_label_prefix
, file
);
3586 #ifdef ASM_FPRINTF_EXTENSIONS
3587 /* Uppercase letters are reserved for general use by asm_fprintf
3588 and so are not available to target specific code. In order to
3589 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3590 they are defined here. As they get turned into real extensions
3591 to asm_fprintf they should be removed from this list. */
3592 case 'A': case 'B': case 'C': case 'D': case 'E':
3593 case 'F': case 'G': case 'H': case 'J': case 'K':
3594 case 'M': case 'N': case 'P': case 'Q': case 'S':
3595 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3598 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3611 /* Split up a CONST_DOUBLE or integer constant rtx
3612 into two rtx's for single words,
3613 storing in *FIRST the word that comes first in memory in the target
3614 and in *SECOND the other. */
3617 split_double (rtx value
, rtx
*first
, rtx
*second
)
3619 if (GET_CODE (value
) == CONST_INT
)
3621 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3623 /* In this case the CONST_INT holds both target words.
3624 Extract the bits from it into two word-sized pieces.
3625 Sign extend each half to HOST_WIDE_INT. */
3626 unsigned HOST_WIDE_INT low
, high
;
3627 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3629 /* Set sign_bit to the most significant bit of a word. */
3631 sign_bit
<<= BITS_PER_WORD
- 1;
3633 /* Set mask so that all bits of the word are set. We could
3634 have used 1 << BITS_PER_WORD instead of basing the
3635 calculation on sign_bit. However, on machines where
3636 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3637 compiler warning, even though the code would never be
3639 mask
= sign_bit
<< 1;
3642 /* Set sign_extend as any remaining bits. */
3643 sign_extend
= ~mask
;
3645 /* Pick the lower word and sign-extend it. */
3646 low
= INTVAL (value
);
3651 /* Pick the higher word, shifted to the least significant
3652 bits, and sign-extend it. */
3653 high
= INTVAL (value
);
3654 high
>>= BITS_PER_WORD
- 1;
3657 if (high
& sign_bit
)
3658 high
|= sign_extend
;
3660 /* Store the words in the target machine order. */
3661 if (WORDS_BIG_ENDIAN
)
3663 *first
= GEN_INT (high
);
3664 *second
= GEN_INT (low
);
3668 *first
= GEN_INT (low
);
3669 *second
= GEN_INT (high
);
3674 /* The rule for using CONST_INT for a wider mode
3675 is that we regard the value as signed.
3676 So sign-extend it. */
3677 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3678 if (WORDS_BIG_ENDIAN
)
3690 else if (GET_CODE (value
) != CONST_DOUBLE
)
3692 if (WORDS_BIG_ENDIAN
)
3694 *first
= const0_rtx
;
3700 *second
= const0_rtx
;
3703 else if (GET_MODE (value
) == VOIDmode
3704 /* This is the old way we did CONST_DOUBLE integers. */
3705 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3707 /* In an integer, the words are defined as most and least significant.
3708 So order them by the target's convention. */
3709 if (WORDS_BIG_ENDIAN
)
3711 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3712 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3716 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3717 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3724 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3726 /* Note, this converts the REAL_VALUE_TYPE to the target's
3727 format, splits up the floating point double and outputs
3728 exactly 32 bits of it into each of l[0] and l[1] --
3729 not necessarily BITS_PER_WORD bits. */
3730 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3732 /* If 32 bits is an entire word for the target, but not for the host,
3733 then sign-extend on the host so that the number will look the same
3734 way on the host that it would on the target. See for instance
3735 simplify_unary_operation. The #if is needed to avoid compiler
3738 #if HOST_BITS_PER_LONG > 32
3739 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3741 if (l
[0] & ((long) 1 << 31))
3742 l
[0] |= ((long) (-1) << 32);
3743 if (l
[1] & ((long) 1 << 31))
3744 l
[1] |= ((long) (-1) << 32);
3748 *first
= GEN_INT (l
[0]);
3749 *second
= GEN_INT (l
[1]);
3753 /* Return nonzero if this function has no function calls. */
3756 leaf_function_p (void)
3761 if (current_function_profile
|| profile_arc_flag
)
3764 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3767 && ! SIBLING_CALL_P (insn
))
3769 if (NONJUMP_INSN_P (insn
)
3770 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3771 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3772 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3775 for (link
= current_function_epilogue_delay_list
;
3777 link
= XEXP (link
, 1))
3779 insn
= XEXP (link
, 0);
3782 && ! SIBLING_CALL_P (insn
))
3784 if (NONJUMP_INSN_P (insn
)
3785 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3786 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3787 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3794 /* Return 1 if branch is a forward branch.
3795 Uses insn_shuid array, so it works only in the final pass. May be used by
3796 output templates to customary add branch prediction hints.
3799 final_forward_branch_p (rtx insn
)
3801 int insn_id
, label_id
;
3803 gcc_assert (uid_shuid
);
3804 insn_id
= INSN_SHUID (insn
);
3805 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3806 /* We've hit some insns that does not have id information available. */
3807 gcc_assert (insn_id
&& label_id
);
3808 return insn_id
< label_id
;
3811 /* On some machines, a function with no call insns
3812 can run faster if it doesn't create its own register window.
3813 When output, the leaf function should use only the "output"
3814 registers. Ordinarily, the function would be compiled to use
3815 the "input" registers to find its arguments; it is a candidate
3816 for leaf treatment if it uses only the "input" registers.
3817 Leaf function treatment means renumbering so the function
3818 uses the "output" registers instead. */
3820 #ifdef LEAF_REGISTERS
3822 /* Return 1 if this function uses only the registers that can be
3823 safely renumbered. */
3826 only_leaf_regs_used (void)
3829 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3831 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3832 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
3833 && ! permitted_reg_in_leaf_functions
[i
])
3836 if (current_function_uses_pic_offset_table
3837 && pic_offset_table_rtx
!= 0
3838 && REG_P (pic_offset_table_rtx
)
3839 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3845 /* Scan all instructions and renumber all registers into those
3846 available in leaf functions. */
3849 leaf_renumber_regs (rtx first
)
3853 /* Renumber only the actual patterns.
3854 The reg-notes can contain frame pointer refs,
3855 and renumbering them could crash, and should not be needed. */
3856 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3858 leaf_renumber_regs_insn (PATTERN (insn
));
3859 for (insn
= current_function_epilogue_delay_list
;
3861 insn
= XEXP (insn
, 1))
3862 if (INSN_P (XEXP (insn
, 0)))
3863 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3866 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3867 available in leaf functions. */
3870 leaf_renumber_regs_insn (rtx in_rtx
)
3873 const char *format_ptr
;
3878 /* Renumber all input-registers into output-registers.
3879 renumbered_regs would be 1 for an output-register;
3886 /* Don't renumber the same reg twice. */
3890 newreg
= REGNO (in_rtx
);
3891 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3892 to reach here as part of a REG_NOTE. */
3893 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3898 newreg
= LEAF_REG_REMAP (newreg
);
3899 gcc_assert (newreg
>= 0);
3900 df_set_regs_ever_live (REGNO (in_rtx
), false);
3901 df_set_regs_ever_live (newreg
, true);
3902 SET_REGNO (in_rtx
, newreg
);
3906 if (INSN_P (in_rtx
))
3908 /* Inside a SEQUENCE, we find insns.
3909 Renumber just the patterns of these insns,
3910 just as we do for the top-level insns. */
3911 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3915 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3917 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3918 switch (*format_ptr
++)
3921 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3925 if (NULL
!= XVEC (in_rtx
, i
))
3927 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3928 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3948 /* When -gused is used, emit debug info for only used symbols. But in
3949 addition to the standard intercepted debug_hooks there are some direct
3950 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3951 Those routines may also be called from a higher level intercepted routine. So
3952 to prevent recording data for an inner call to one of these for an intercept,
3953 we maintain an intercept nesting counter (debug_nesting). We only save the
3954 intercepted arguments if the nesting is 1. */
3955 int debug_nesting
= 0;
3957 static tree
*symbol_queue
;
3958 int symbol_queue_index
= 0;
3959 static int symbol_queue_size
= 0;
3961 /* Generate the symbols for any queued up type symbols we encountered
3962 while generating the type info for some originally used symbol.
3963 This might generate additional entries in the queue. Only when
3964 the nesting depth goes to 0 is this routine called. */
3967 debug_flush_symbol_queue (void)
3971 /* Make sure that additionally queued items are not flushed
3976 for (i
= 0; i
< symbol_queue_index
; ++i
)
3978 /* If we pushed queued symbols then such symbols must be
3979 output no matter what anyone else says. Specifically,
3980 we need to make sure dbxout_symbol() thinks the symbol was
3981 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3982 which may be set for outside reasons. */
3983 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3984 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3985 TREE_USED (symbol_queue
[i
]) = 1;
3986 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3988 #ifdef DBX_DEBUGGING_INFO
3989 dbxout_symbol (symbol_queue
[i
], 0);
3992 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3993 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3996 symbol_queue_index
= 0;
4000 /* Queue a type symbol needed as part of the definition of a decl
4001 symbol. These symbols are generated when debug_flush_symbol_queue()
4005 debug_queue_symbol (tree decl
)
4007 if (symbol_queue_index
>= symbol_queue_size
)
4009 symbol_queue_size
+= 10;
4010 symbol_queue
= xrealloc (symbol_queue
,
4011 symbol_queue_size
* sizeof (tree
));
4014 symbol_queue
[symbol_queue_index
++] = decl
;
4017 /* Free symbol queue. */
4019 debug_free_queue (void)
4023 free (symbol_queue
);
4024 symbol_queue
= NULL
;
4025 symbol_queue_size
= 0;
4029 /* Turn the RTL into assembly. */
4031 rest_of_handle_final (void)
4036 /* Get the function's name, as described by its RTL. This may be
4037 different from the DECL_NAME name used in the source file. */
4039 x
= DECL_RTL (current_function_decl
);
4040 gcc_assert (MEM_P (x
));
4042 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4043 fnname
= XSTR (x
, 0);
4045 assemble_start_function (current_function_decl
, fnname
);
4046 final_start_function (get_insns (), asm_out_file
, optimize
);
4047 final (get_insns (), asm_out_file
, optimize
);
4048 final_end_function ();
4050 #ifdef TARGET_UNWIND_INFO
4051 /* ??? The IA-64 ".handlerdata" directive must be issued before
4052 the ".endp" directive that closes the procedure descriptor. */
4053 output_function_exception_table (fnname
);
4056 assemble_end_function (current_function_decl
, fnname
);
4058 #ifndef TARGET_UNWIND_INFO
4059 /* Otherwise, it feels unclean to switch sections in the middle. */
4060 output_function_exception_table (fnname
);
4063 user_defined_section_attribute
= false;
4065 /* Free up reg info memory. */
4069 fflush (asm_out_file
);
4071 /* Write DBX symbols if requested. */
4073 /* Note that for those inline functions where we don't initially
4074 know for certain that we will be generating an out-of-line copy,
4075 the first invocation of this routine (rest_of_compilation) will
4076 skip over this code by doing a `goto exit_rest_of_compilation;'.
4077 Later on, wrapup_global_declarations will (indirectly) call
4078 rest_of_compilation again for those inline functions that need
4079 to have out-of-line copies generated. During that call, we
4080 *will* be routed past here. */
4082 timevar_push (TV_SYMOUT
);
4083 (*debug_hooks
->function_decl
) (current_function_decl
);
4084 timevar_pop (TV_SYMOUT
);
4085 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4086 && targetm
.have_ctors_dtors
)
4087 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4088 decl_init_priority_lookup
4089 (current_function_decl
));
4090 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4091 && targetm
.have_ctors_dtors
)
4092 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4093 decl_fini_priority_lookup
4094 (current_function_decl
));
4098 struct tree_opt_pass pass_final
=
4102 rest_of_handle_final
, /* execute */
4105 0, /* static_pass_number */
4106 TV_FINAL
, /* tv_id */
4107 0, /* properties_required */
4108 0, /* properties_provided */
4109 0, /* properties_destroyed */
4110 0, /* todo_flags_start */
4111 TODO_ggc_collect
, /* todo_flags_finish */
4117 rest_of_handle_shorten_branches (void)
4119 /* Shorten branches. */
4120 shorten_branches (get_insns ());
4124 struct tree_opt_pass pass_shorten_branches
=
4126 "shorten", /* name */
4128 rest_of_handle_shorten_branches
, /* execute */
4131 0, /* static_pass_number */
4132 TV_FINAL
, /* tv_id */
4133 0, /* properties_required */
4134 0, /* properties_provided */
4135 0, /* properties_destroyed */
4136 0, /* todo_flags_start */
4137 TODO_dump_func
, /* todo_flags_finish */
4143 rest_of_clean_state (void)
4147 /* It is very important to decompose the RTL instruction chain here:
4148 debug information keeps pointing into CODE_LABEL insns inside the function
4149 body. If these remain pointing to the other insns, we end up preserving
4150 whole RTL chain and attached detailed debug info in memory. */
4151 for (insn
= get_insns (); insn
; insn
= next
)
4153 next
= NEXT_INSN (insn
);
4154 NEXT_INSN (insn
) = NULL
;
4155 PREV_INSN (insn
) = NULL
;
4158 /* In case the function was not output,
4159 don't leave any temporary anonymous types
4160 queued up for sdb output. */
4161 #ifdef SDB_DEBUGGING_INFO
4162 if (write_symbols
== SDB_DEBUG
)
4163 sdbout_types (NULL_TREE
);
4166 reload_completed
= 0;
4167 epilogue_completed
= 0;
4169 regstack_completed
= 0;
4172 /* Clear out the insn_length contents now that they are no
4174 init_insn_lengths ();
4176 /* Show no temporary slots allocated. */
4179 free_bb_for_insn ();
4181 if (targetm
.binds_local_p (current_function_decl
))
4183 int pref
= cfun
->preferred_stack_boundary
;
4184 if (cfun
->stack_alignment_needed
> cfun
->preferred_stack_boundary
)
4185 pref
= cfun
->stack_alignment_needed
;
4186 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4190 /* Make sure volatile mem refs aren't considered valid operands for
4191 arithmetic insns. We must call this here if this is a nested inline
4192 function, since the above code leaves us in the init_recog state,
4193 and the function context push/pop code does not save/restore volatile_ok.
4195 ??? Maybe it isn't necessary for expand_start_function to call this
4196 anymore if we do it here? */
4198 init_recog_no_volatile ();
4200 /* We're done with this function. Free up memory if we can. */
4201 free_after_parsing (cfun
);
4202 free_after_compilation (cfun
);
4206 struct tree_opt_pass pass_clean_state
=
4210 rest_of_clean_state
, /* execute */
4213 0, /* static_pass_number */
4214 TV_FINAL
, /* tv_id */
4215 0, /* properties_required */
4216 0, /* properties_provided */
4217 PROP_rtl
, /* properties_destroyed */
4218 0, /* todo_flags_start */
4219 0, /* todo_flags_finish */