1 /* libgcc routines for R8C/M16C/M32C
2 Copyright (C) 2005-2021 Free Software Foundation, Inc.
3 Contributed by Red Hat.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
26 #if defined(__r8c_cpu__) || defined(__m16c_cpu__)
37 #ifdef L__m32c_memregs
39 /* Warning: these memory locations are used as a register bank. They
40 *must* end up consecutive in any final executable, so you may *not*
41 use the otherwise obvious ".comm" directive to allocate space for
80 #ifdef L__m32c_eh_return
82 .global __m32c_eh_return
85 /* At this point, r0 has the stack adjustment, r1r3 has the
86 address to return to. The stack looks like this:
97 What we need to do is restore all the registers, update the
98 stack, and return to the right place.
104 /* a0 points to the current stack, just above the register
111 /* a1 points to the new stack. */
113 /* This is for the "rts" below. */
122 /* This is for the "popc sp" below. */
125 popm r0,r1,r2,r3,a0,a1,sb,fb
130 /* SImode arguments for SI foo(SI,SI) functions. */
143 #ifdef L__m32c_mulsi3
150 mulu.w SBL,r0 /* writes to r2r0 */
154 mulu.w SBH,r0 /* writes to r2r0 */
157 mulu.w SBL,r0 /* writes to r2r0 */
163 #ifdef L__m32c_cmpsi2
184 #ifdef L__m32c_ucmpsi2
205 #ifdef L__m32c_jsri16
212 /* Read the address (16 bits) and return address (24 bits) off
216 mov.b 3[sp], a0 /* This zero-extends, so the high byte has
219 /* Write the return address, then new address, to the stack. */
220 mov.w a0, 1[sp] /* Just to get the zero in 2[sp]. */
225 /* This "returns" to the target address, leaving the pending
226 return address on the stack. */