1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
236 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
238 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
240 if (to_mode
== from_mode
241 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
243 emit_move_insn (to
, from
);
247 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
249 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
250 GET_MODE_BITSIZE (to_mode
)));
252 if (VECTOR_MODE_P (to_mode
))
253 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
255 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
257 emit_move_insn (to
, from
);
261 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
263 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
264 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
268 convert_mode_scalar (to
, from
, unsignedp
);
271 /* Like convert_move, but deals only with scalar modes. */
274 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
276 /* Both modes should be scalar types. */
277 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
278 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
279 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
280 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
284 gcc_assert (to_real
== from_real
);
286 /* rtx code for making an equivalent value. */
287 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
288 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
296 gcc_assert ((GET_MODE_PRECISION (from_mode
)
297 != GET_MODE_PRECISION (to_mode
))
298 || (DECIMAL_FLOAT_MODE_P (from_mode
)
299 != DECIMAL_FLOAT_MODE_P (to_mode
)));
301 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
302 /* Conversion between decimal float and binary float, same size. */
303 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
304 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
309 /* Try converting directly if the insn is supported. */
311 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
312 if (code
!= CODE_FOR_nothing
)
314 emit_unop_insn (code
, to
, from
,
315 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
319 /* Otherwise use a libcall. */
320 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
322 /* Is this conversion implemented yet? */
323 gcc_assert (libcall
);
326 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
328 insns
= get_insns ();
330 emit_libcall_block (insns
, to
, value
,
331 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
333 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
337 /* Handle pointer conversion. */ /* SPEE 900220. */
338 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
342 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
349 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
352 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
358 /* Targets are expected to provide conversion insns between PxImode and
359 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
360 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
362 scalar_int_mode full_mode
363 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
365 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
366 != CODE_FOR_nothing
);
368 if (full_mode
!= from_mode
)
369 from
= convert_to_mode (full_mode
, from
, unsignedp
);
370 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
374 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
377 scalar_int_mode full_mode
378 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
379 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
380 enum insn_code icode
;
382 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
383 gcc_assert (icode
!= CODE_FOR_nothing
);
385 if (to_mode
== full_mode
)
387 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
391 new_from
= gen_reg_rtx (full_mode
);
392 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
394 /* else proceed to integer conversions below. */
395 from_mode
= full_mode
;
399 /* Make sure both are fixed-point modes or both are not. */
400 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
401 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
402 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
404 /* If we widen from_mode to to_mode and they are in the same class,
405 we won't saturate the result.
406 Otherwise, always saturate the result to play safe. */
407 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
408 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
409 expand_fixed_convert (to
, from
, 0, 0);
411 expand_fixed_convert (to
, from
, 0, 1);
415 /* Now both modes are integers. */
417 /* Handle expanding beyond a word. */
418 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
419 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
426 scalar_mode lowpart_mode
;
427 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
429 /* Try converting directly if the insn is supported. */
430 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
433 /* If FROM is a SUBREG, put it into a register. Do this
434 so that we always generate the same set of insns for
435 better cse'ing; if an intermediate assignment occurred,
436 we won't be doing the operation directly on the SUBREG. */
437 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
438 from
= force_reg (from_mode
, from
);
439 emit_unop_insn (code
, to
, from
, equiv_code
);
442 /* Next, try converting via full word. */
443 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
444 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
445 != CODE_FOR_nothing
))
447 rtx word_to
= gen_reg_rtx (word_mode
);
450 if (reg_overlap_mentioned_p (to
, from
))
451 from
= force_reg (from_mode
, from
);
454 convert_move (word_to
, from
, unsignedp
);
455 emit_unop_insn (code
, to
, word_to
, equiv_code
);
459 /* No special multiword conversion insn; do it by hand. */
462 /* Since we will turn this into a no conflict block, we must ensure
463 the source does not overlap the target so force it into an isolated
464 register when maybe so. Likewise for any MEM input, since the
465 conversion sequence might require several references to it and we
466 must ensure we're getting the same value every time. */
468 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
469 from
= force_reg (from_mode
, from
);
471 /* Get a copy of FROM widened to a word, if necessary. */
472 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
473 lowpart_mode
= word_mode
;
475 lowpart_mode
= from_mode
;
477 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
479 lowpart
= gen_lowpart (lowpart_mode
, to
);
480 emit_move_insn (lowpart
, lowfrom
);
482 /* Compute the value to put in each remaining word. */
484 fill_value
= const0_rtx
;
486 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
487 LT
, lowfrom
, const0_rtx
,
488 lowpart_mode
, 0, -1);
490 /* Fill the remaining words. */
491 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
493 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
494 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
496 gcc_assert (subword
);
498 if (fill_value
!= subword
)
499 emit_move_insn (subword
, fill_value
);
502 insns
= get_insns ();
509 /* Truncating multi-word to a word or less. */
510 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
511 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
514 && ! MEM_VOLATILE_P (from
)
515 && direct_load
[(int) to_mode
]
516 && ! mode_dependent_address_p (XEXP (from
, 0),
517 MEM_ADDR_SPACE (from
)))
519 || GET_CODE (from
) == SUBREG
))
520 from
= force_reg (from_mode
, from
);
521 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
525 /* Now follow all the conversions between integers
526 no more than a word long. */
528 /* For truncation, usually we can just refer to FROM in a narrower mode. */
529 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
530 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
533 && ! MEM_VOLATILE_P (from
)
534 && direct_load
[(int) to_mode
]
535 && ! mode_dependent_address_p (XEXP (from
, 0),
536 MEM_ADDR_SPACE (from
)))
538 || GET_CODE (from
) == SUBREG
))
539 from
= force_reg (from_mode
, from
);
540 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
541 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
542 from
= copy_to_reg (from
);
543 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
547 /* Handle extension. */
548 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
550 /* Convert directly if that works. */
551 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
554 emit_unop_insn (code
, to
, from
, equiv_code
);
559 scalar_mode intermediate
;
563 /* Search for a mode to convert via. */
564 opt_scalar_mode intermediate_iter
;
565 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
567 scalar_mode intermediate
= intermediate_iter
.require ();
568 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
570 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
571 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
573 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
574 != CODE_FOR_nothing
))
576 convert_move (to
, convert_to_mode (intermediate
, from
,
577 unsignedp
), unsignedp
);
582 /* No suitable intermediate mode.
583 Generate what we need with shifts. */
584 shift_amount
= (GET_MODE_PRECISION (to_mode
)
585 - GET_MODE_PRECISION (from_mode
));
586 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
587 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
589 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
592 emit_move_insn (to
, tmp
);
597 /* Support special truncate insns for certain modes. */
598 if (convert_optab_handler (trunc_optab
, to_mode
,
599 from_mode
) != CODE_FOR_nothing
)
601 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
606 /* Handle truncation of volatile memrefs, and so on;
607 the things that couldn't be truncated directly,
608 and for which there was no special instruction.
610 ??? Code above formerly short-circuited this, for most integer
611 mode pairs, with a force_reg in from_mode followed by a recursive
612 call to this routine. Appears always to have been wrong. */
613 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
615 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
616 emit_move_insn (to
, temp
);
620 /* Mode combination is not recognized. */
624 /* Return an rtx for a value that would result
625 from converting X to mode MODE.
626 Both X and MODE may be floating, or both integer.
627 UNSIGNEDP is nonzero if X is an unsigned value.
628 This can be done by referring to a part of X in place
629 or by copying to a new temporary with conversion. */
632 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
634 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
637 /* Return an rtx for a value that would result
638 from converting X from mode OLDMODE to mode MODE.
639 Both modes may be floating, or both integer.
640 UNSIGNEDP is nonzero if X is an unsigned value.
642 This can be done by referring to a part of X in place
643 or by copying to a new temporary with conversion.
645 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
648 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
651 scalar_int_mode int_mode
;
653 /* If FROM is a SUBREG that indicates that we have already done at least
654 the required extension, strip it. */
656 if (GET_CODE (x
) == SUBREG
657 && SUBREG_PROMOTED_VAR_P (x
)
658 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
659 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
660 >= GET_MODE_PRECISION (int_mode
))
661 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
662 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
664 if (GET_MODE (x
) != VOIDmode
)
665 oldmode
= GET_MODE (x
);
670 if (CONST_SCALAR_INT_P (x
)
671 && is_int_mode (mode
, &int_mode
))
673 /* If the caller did not tell us the old mode, then there is not
674 much to do with respect to canonicalization. We have to
675 assume that all the bits are significant. */
676 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
677 oldmode
= MAX_MODE_INT
;
678 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
679 GET_MODE_PRECISION (int_mode
),
680 unsignedp
? UNSIGNED
: SIGNED
);
681 return immed_wide_int_const (w
, int_mode
);
684 /* We can do this with a gen_lowpart if both desired and current modes
685 are integer, and this is either a constant integer, a register, or a
687 scalar_int_mode int_oldmode
;
688 if (is_int_mode (mode
, &int_mode
)
689 && is_int_mode (oldmode
, &int_oldmode
)
690 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
691 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
692 || CONST_POLY_INT_P (x
)
694 && (!HARD_REGISTER_P (x
)
695 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
696 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
697 return gen_lowpart (int_mode
, x
);
699 /* Converting from integer constant into mode is always equivalent to an
701 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
703 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
704 GET_MODE_BITSIZE (oldmode
)));
705 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
708 temp
= gen_reg_rtx (mode
);
709 convert_move (temp
, x
, unsignedp
);
713 /* Return the largest alignment we can use for doing a move (or store)
714 of MAX_PIECES. ALIGN is the largest alignment we could use. */
717 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
719 scalar_int_mode tmode
720 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
722 if (align
>= GET_MODE_ALIGNMENT (tmode
))
723 align
= GET_MODE_ALIGNMENT (tmode
);
726 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
727 opt_scalar_int_mode mode_iter
;
728 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
730 tmode
= mode_iter
.require ();
731 if (GET_MODE_SIZE (tmode
) > max_pieces
732 || targetm
.slow_unaligned_access (tmode
, align
))
737 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
743 /* Return the widest integer mode that is narrower than SIZE bytes. */
745 static scalar_int_mode
746 widest_int_mode_for_size (unsigned int size
)
748 scalar_int_mode result
= NARROWEST_INT_MODE
;
750 gcc_checking_assert (size
> 1);
752 opt_scalar_int_mode tmode
;
753 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
754 if (GET_MODE_SIZE (tmode
.require ()) < size
)
755 result
= tmode
.require ();
760 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
761 and should be performed piecewise. */
764 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
765 enum by_pieces_operation op
)
767 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
768 optimize_insn_for_speed_p ());
771 /* Determine whether the LEN bytes can be moved by using several move
772 instructions. Return nonzero if a call to move_by_pieces should
776 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
778 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
781 /* Return number of insns required to perform operation OP by pieces
782 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
784 unsigned HOST_WIDE_INT
785 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
786 unsigned int max_size
, by_pieces_operation op
)
788 unsigned HOST_WIDE_INT n_insns
= 0;
790 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
792 while (max_size
> 1 && l
> 0)
794 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
795 enum insn_code icode
;
797 unsigned int modesize
= GET_MODE_SIZE (mode
);
799 icode
= optab_handler (mov_optab
, mode
);
800 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
802 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
810 case COMPARE_BY_PIECES
:
811 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
812 int batch_ops
= 4 * batch
- 1;
813 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
814 n_insns
+= full
* batch_ops
;
815 if (n_pieces
% batch
!= 0)
828 /* Used when performing piecewise block operations, holds information
829 about one of the memory objects involved. The member functions
830 can be used to generate code for loading from the object and
831 updating the address when iterating. */
835 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
838 /* The address of the object. Can differ from that seen in the
839 MEM rtx if we copied the address to a register. */
841 /* Nonzero if the address on the object has an autoincrement already,
842 signifies whether that was an increment or decrement. */
843 signed char m_addr_inc
;
844 /* Nonzero if we intend to use autoinc without the address already
845 having autoinc form. We will insert add insns around each memory
846 reference, expecting later passes to form autoinc addressing modes.
847 The only supported options are predecrement and postincrement. */
848 signed char m_explicit_inc
;
849 /* True if we have either of the two possible cases of using
852 /* True if this is an address to be used for load operations rather
856 /* Optionally, a function to obtain constants for any given offset into
857 the objects, and data associated with it. */
858 by_pieces_constfn m_constfn
;
861 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
862 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
863 void increment_address (HOST_WIDE_INT
);
864 void maybe_predec (HOST_WIDE_INT
);
865 void maybe_postinc (HOST_WIDE_INT
);
866 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
873 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
874 true if the operation to be performed on this object is a load
875 rather than a store. For stores, OBJ can be NULL, in which case we
876 assume the operation is a stack push. For loads, the optional
877 CONSTFN and its associated CFNDATA can be used in place of the
880 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
882 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
888 rtx addr
= XEXP (obj
, 0);
889 rtx_code code
= GET_CODE (addr
);
891 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
892 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
895 m_addr_inc
= dec
? -1 : 1;
897 /* While we have always looked for these codes here, the code
898 implementing the memory operation has never handled them.
899 Support could be added later if necessary or beneficial. */
900 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
908 if (STACK_GROWS_DOWNWARD
)
914 gcc_assert (constfn
!= NULL
);
918 gcc_assert (is_load
);
921 /* Decide whether to use autoinc for an address involved in a memory op.
922 MODE is the mode of the accesses, REVERSE is true if we've decided to
923 perform the operation starting from the end, and LEN is the length of
924 the operation. Don't override an earlier decision to set m_auto. */
927 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
930 if (m_auto
|| m_obj
== NULL_RTX
)
933 bool use_predec
= (m_is_load
934 ? USE_LOAD_PRE_DECREMENT (mode
)
935 : USE_STORE_PRE_DECREMENT (mode
));
936 bool use_postinc
= (m_is_load
937 ? USE_LOAD_POST_INCREMENT (mode
)
938 : USE_STORE_POST_INCREMENT (mode
));
939 machine_mode addr_mode
= get_address_mode (m_obj
);
941 if (use_predec
&& reverse
)
943 m_addr
= copy_to_mode_reg (addr_mode
,
944 plus_constant (addr_mode
,
949 else if (use_postinc
&& !reverse
)
951 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
955 else if (CONSTANT_P (m_addr
))
956 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
959 /* Adjust the address to refer to the data at OFFSET in MODE. If we
960 are using autoincrement for this address, we don't add the offset,
961 but we still modify the MEM's properties. */
964 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
967 return m_constfn (m_cfndata
, offset
, mode
);
968 if (m_obj
== NULL_RTX
)
971 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
973 return adjust_address (m_obj
, mode
, offset
);
976 /* Emit an add instruction to increment the address by SIZE. */
979 pieces_addr::increment_address (HOST_WIDE_INT size
)
981 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
982 emit_insn (gen_add2_insn (m_addr
, amount
));
985 /* If we are supposed to decrement the address after each access, emit code
986 to do so now. Increment by SIZE (which has should have the correct sign
990 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
992 if (m_explicit_inc
>= 0)
994 gcc_assert (HAVE_PRE_DECREMENT
);
995 increment_address (size
);
998 /* If we are supposed to decrement the address after each access, emit code
999 to do so now. Increment by SIZE. */
1002 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1004 if (m_explicit_inc
<= 0)
1006 gcc_assert (HAVE_POST_INCREMENT
);
1007 increment_address (size
);
1010 /* This structure is used by do_op_by_pieces to describe the operation
1013 class op_by_pieces_d
1016 pieces_addr m_to
, m_from
;
1017 unsigned HOST_WIDE_INT m_len
;
1018 HOST_WIDE_INT m_offset
;
1019 unsigned int m_align
;
1020 unsigned int m_max_size
;
1023 /* Virtual functions, overriden by derived classes for the specific
1025 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1026 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1027 virtual void finish_mode (machine_mode
)
1032 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1033 unsigned HOST_WIDE_INT
, unsigned int);
1037 /* The constructor for an op_by_pieces_d structure. We require two
1038 objects named TO and FROM, which are identified as loads or stores
1039 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1040 and its associated FROM_CFN_DATA can be used to replace loads with
1041 constant values. LEN describes the length of the operation. */
1043 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1044 rtx from
, bool from_load
,
1045 by_pieces_constfn from_cfn
,
1046 void *from_cfn_data
,
1047 unsigned HOST_WIDE_INT len
,
1049 : m_to (to
, to_load
, NULL
, NULL
),
1050 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1051 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1053 int toi
= m_to
.get_addr_inc ();
1054 int fromi
= m_from
.get_addr_inc ();
1055 if (toi
>= 0 && fromi
>= 0)
1057 else if (toi
<= 0 && fromi
<= 0)
1062 m_offset
= m_reverse
? len
: 0;
1063 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1064 from
? MEM_ALIGN (from
) : align
);
1066 /* If copying requires more than two move insns,
1067 copy addresses to registers (to make displacements shorter)
1068 and use post-increment if available. */
1069 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1071 /* Find the mode of the largest comparison. */
1072 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1074 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1075 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1078 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1082 /* This function contains the main loop used for expanding a block
1083 operation. First move what we can in the largest integer mode,
1084 then go to successively smaller modes. For every access, call
1085 GENFUN with the two operands and the EXTRA_DATA. */
1088 op_by_pieces_d::run ()
1090 while (m_max_size
> 1 && m_len
> 0)
1092 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1094 if (prepare_mode (mode
, m_align
))
1096 unsigned int size
= GET_MODE_SIZE (mode
);
1097 rtx to1
= NULL_RTX
, from1
;
1099 while (m_len
>= size
)
1104 to1
= m_to
.adjust (mode
, m_offset
);
1105 from1
= m_from
.adjust (mode
, m_offset
);
1107 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1108 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1110 generate (to1
, from1
, mode
);
1112 m_to
.maybe_postinc (size
);
1113 m_from
.maybe_postinc (size
);
1124 m_max_size
= GET_MODE_SIZE (mode
);
1127 /* The code above should have handled everything. */
1128 gcc_assert (!m_len
);
1131 /* Derived class from op_by_pieces_d, providing support for block move
1134 class move_by_pieces_d
: public op_by_pieces_d
1136 insn_gen_fn m_gen_fun
;
1137 void generate (rtx
, rtx
, machine_mode
);
1138 bool prepare_mode (machine_mode
, unsigned int);
1141 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1143 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1146 rtx
finish_endp (int);
1149 /* Return true if MODE can be used for a set of copies, given an
1150 alignment ALIGN. Prepare whatever data is necessary for later
1151 calls to generate. */
1154 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1156 insn_code icode
= optab_handler (mov_optab
, mode
);
1157 m_gen_fun
= GEN_FCN (icode
);
1158 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1161 /* A callback used when iterating for a compare_by_pieces_operation.
1162 OP0 and OP1 are the values that have been loaded and should be
1163 compared in MODE. If OP0 is NULL, this means we should generate a
1164 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1165 gen function that should be used to generate the mode. */
1168 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1169 machine_mode mode ATTRIBUTE_UNUSED
)
1171 #ifdef PUSH_ROUNDING
1172 if (op0
== NULL_RTX
)
1174 emit_single_push_insn (mode
, op1
, NULL
);
1178 emit_insn (m_gen_fun (op0
, op1
));
1181 /* Perform the final adjustment at the end of a string to obtain the
1182 correct return value for the block operation. If ENDP is 1 return
1183 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1184 end minus one byte ala stpcpy. */
1187 move_by_pieces_d::finish_endp (int endp
)
1189 gcc_assert (!m_reverse
);
1192 m_to
.maybe_postinc (-1);
1195 return m_to
.adjust (QImode
, m_offset
);
1198 /* Generate several move instructions to copy LEN bytes from block FROM to
1199 block TO. (These are MEM rtx's with BLKmode).
1201 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1202 used to push FROM to the stack.
1204 ALIGN is maximum stack alignment we can assume.
1206 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1207 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, int endp
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1224 return data
.finish_endp (endp
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_endp (int);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation. If ENDP is 1 return
1273 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1274 end minus one byte ala stpcpy. */
1277 store_by_pieces_d::finish_endp (int endp
)
1279 gcc_assert (!m_reverse
);
1282 m_to
.maybe_postinc (-1);
1285 return m_to
.adjust (QImode
, m_offset
);
1288 /* Determine whether the LEN bytes generated by CONSTFUN can be
1289 stored to memory using several move instructions. CONSTFUNDATA is
1290 a pointer which will be passed as argument in every CONSTFUN call.
1291 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1292 a memset operation and false if it's a copy of a constant string.
1293 Return nonzero if a call to store_by_pieces should succeed. */
1296 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1297 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1298 void *constfundata
, unsigned int align
, bool memsetp
)
1300 unsigned HOST_WIDE_INT l
;
1301 unsigned int max_size
;
1302 HOST_WIDE_INT offset
= 0;
1303 enum insn_code icode
;
1305 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1306 rtx cst ATTRIBUTE_UNUSED
;
1311 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1315 optimize_insn_for_speed_p ()))
1318 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1320 /* We would first store what we can in the largest integer mode, then go to
1321 successively smaller modes. */
1324 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1328 max_size
= STORE_MAX_PIECES
+ 1;
1329 while (max_size
> 1 && l
> 0)
1331 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1333 icode
= optab_handler (mov_optab
, mode
);
1334 if (icode
!= CODE_FOR_nothing
1335 && align
>= GET_MODE_ALIGNMENT (mode
))
1337 unsigned int size
= GET_MODE_SIZE (mode
);
1344 cst
= (*constfun
) (constfundata
, offset
, mode
);
1345 if (!targetm
.legitimate_constant_p (mode
, cst
))
1355 max_size
= GET_MODE_SIZE (mode
);
1358 /* The code above should have handled everything. */
1365 /* Generate several move instructions to store LEN bytes generated by
1366 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1367 pointer which will be passed as argument in every CONSTFUN call.
1368 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1369 a memset operation and false if it's a copy of a constant string.
1370 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1371 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1375 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1376 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1377 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1381 gcc_assert (endp
!= 2);
1385 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1387 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1388 optimize_insn_for_speed_p ()));
1390 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1394 return data
.finish_endp (endp
);
1399 /* Callback routine for clear_by_pieces.
1400 Return const0_rtx unconditionally. */
1403 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1408 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1409 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1412 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1417 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1421 /* Context used by compare_by_pieces_genfn. It stores the fail label
1422 to jump to in case of miscomparison, and for branch ratios greater than 1,
1423 it stores an accumulator and the current and maximum counts before
1424 emitting another branch. */
1426 class compare_by_pieces_d
: public op_by_pieces_d
1428 rtx_code_label
*m_fail_label
;
1430 int m_count
, m_batch
;
1432 void generate (rtx
, rtx
, machine_mode
);
1433 bool prepare_mode (machine_mode
, unsigned int);
1434 void finish_mode (machine_mode
);
1436 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1437 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1438 rtx_code_label
*fail_label
)
1439 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1441 m_fail_label
= fail_label
;
1445 /* A callback used when iterating for a compare_by_pieces_operation.
1446 OP0 and OP1 are the values that have been loaded and should be
1447 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1448 context structure. */
1451 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1455 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1456 true, OPTAB_LIB_WIDEN
);
1458 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1459 true, OPTAB_LIB_WIDEN
);
1460 m_accumulator
= temp
;
1462 if (++m_count
< m_batch
)
1466 op0
= m_accumulator
;
1468 m_accumulator
= NULL_RTX
;
1470 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1471 m_fail_label
, profile_probability::uninitialized ());
1474 /* Return true if MODE can be used for a set of moves and comparisons,
1475 given an alignment ALIGN. Prepare whatever data is necessary for
1476 later calls to generate. */
1479 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1481 insn_code icode
= optab_handler (mov_optab
, mode
);
1482 if (icode
== CODE_FOR_nothing
1483 || align
< GET_MODE_ALIGNMENT (mode
)
1484 || !can_compare_p (EQ
, mode
, ccp_jump
))
1486 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1489 m_accumulator
= NULL_RTX
;
1494 /* Called after expanding a series of comparisons in MODE. If we have
1495 accumulated results for which we haven't emitted a branch yet, do
1499 compare_by_pieces_d::finish_mode (machine_mode mode
)
1501 if (m_accumulator
!= NULL_RTX
)
1502 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1503 NULL_RTX
, NULL
, m_fail_label
,
1504 profile_probability::uninitialized ());
1507 /* Generate several move instructions to compare LEN bytes from blocks
1508 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1510 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1511 used to push FROM to the stack.
1513 ALIGN is maximum stack alignment we can assume.
1515 Optionally, the caller can pass a constfn and associated data in A1_CFN
1516 and A1_CFN_DATA. describing that the second operand being compared is a
1517 known constant and how to obtain its data. */
1520 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1521 rtx target
, unsigned int align
,
1522 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1524 rtx_code_label
*fail_label
= gen_label_rtx ();
1525 rtx_code_label
*end_label
= gen_label_rtx ();
1527 if (target
== NULL_RTX
1528 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1529 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1531 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1536 emit_move_insn (target
, const0_rtx
);
1537 emit_jump (end_label
);
1539 emit_label (fail_label
);
1540 emit_move_insn (target
, const1_rtx
);
1541 emit_label (end_label
);
1546 /* Emit code to move a block Y to a block X. This may be done with
1547 string-move instructions, with multiple scalar move instructions,
1548 or with a library call.
1550 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1551 SIZE is an rtx that says how long they are.
1552 ALIGN is the maximum alignment we can assume they have.
1553 METHOD describes what kind of copy this is, and what mechanisms may be used.
1554 MIN_SIZE is the minimal size of block to move
1555 MAX_SIZE is the maximal size of block to move, if it can not be represented
1556 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1558 Return the address of the new block, if memcpy is called and returns it,
1562 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1563 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1564 unsigned HOST_WIDE_INT min_size
,
1565 unsigned HOST_WIDE_INT max_size
,
1566 unsigned HOST_WIDE_INT probable_max_size
)
1573 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1578 case BLOCK_OP_NORMAL
:
1579 case BLOCK_OP_TAILCALL
:
1583 case BLOCK_OP_CALL_PARM
:
1584 may_use_call
= block_move_libcall_safe_for_call_parm ();
1586 /* Make inhibit_defer_pop nonzero around the library call
1587 to force it to pop the arguments right away. */
1591 case BLOCK_OP_NO_LIBCALL
:
1595 case BLOCK_OP_NO_LIBCALL_RET
:
1603 gcc_assert (MEM_P (x
) && MEM_P (y
));
1604 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1605 gcc_assert (align
>= BITS_PER_UNIT
);
1607 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1608 block copy is more efficient for other large modes, e.g. DCmode. */
1609 x
= adjust_address (x
, BLKmode
, 0);
1610 y
= adjust_address (y
, BLKmode
, 0);
1612 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1613 can be incorrect is coming from __builtin_memcpy. */
1614 if (CONST_INT_P (size
))
1616 x
= shallow_copy_rtx (x
);
1617 y
= shallow_copy_rtx (y
);
1618 set_mem_size (x
, INTVAL (size
));
1619 set_mem_size (y
, INTVAL (size
));
1622 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1623 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1624 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1625 expected_align
, expected_size
,
1626 min_size
, max_size
, probable_max_size
))
1628 else if (may_use_call
1629 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1630 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1632 if (may_use_call
< 0)
1635 /* Since x and y are passed to a libcall, mark the corresponding
1636 tree EXPR as addressable. */
1637 tree y_expr
= MEM_EXPR (y
);
1638 tree x_expr
= MEM_EXPR (x
);
1640 mark_addressable (y_expr
);
1642 mark_addressable (x_expr
);
1643 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1644 method
== BLOCK_OP_TAILCALL
);
1648 emit_block_move_via_loop (x
, y
, size
, align
);
1650 if (method
== BLOCK_OP_CALL_PARM
)
1657 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1659 unsigned HOST_WIDE_INT max
, min
= 0;
1660 if (GET_CODE (size
) == CONST_INT
)
1661 min
= max
= UINTVAL (size
);
1663 max
= GET_MODE_MASK (GET_MODE (size
));
1664 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1668 /* A subroutine of emit_block_move. Returns true if calling the
1669 block move libcall will not clobber any parameters which may have
1670 already been placed on the stack. */
1673 block_move_libcall_safe_for_call_parm (void)
1675 #if defined (REG_PARM_STACK_SPACE)
1679 /* If arguments are pushed on the stack, then they're safe. */
1683 /* If registers go on the stack anyway, any argument is sure to clobber
1684 an outgoing argument. */
1685 #if defined (REG_PARM_STACK_SPACE)
1686 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1687 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1688 depend on its argument. */
1690 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1691 && REG_PARM_STACK_SPACE (fn
) != 0)
1695 /* If any argument goes in memory, then it might clobber an outgoing
1698 CUMULATIVE_ARGS args_so_far_v
;
1699 cumulative_args_t args_so_far
;
1702 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1703 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1704 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1706 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1707 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1709 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1710 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1712 if (!tmp
|| !REG_P (tmp
))
1714 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1716 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1723 /* A subroutine of emit_block_move. Expand a movmem pattern;
1724 return true if successful. */
1727 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1728 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1729 unsigned HOST_WIDE_INT min_size
,
1730 unsigned HOST_WIDE_INT max_size
,
1731 unsigned HOST_WIDE_INT probable_max_size
)
1733 int save_volatile_ok
= volatile_ok
;
1735 if (expected_align
< align
)
1736 expected_align
= align
;
1737 if (expected_size
!= -1)
1739 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1740 expected_size
= probable_max_size
;
1741 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1742 expected_size
= min_size
;
1745 /* Since this is a move insn, we don't care about volatility. */
1748 /* Try the most limited insn first, because there's no point
1749 including more than one in the machine description unless
1750 the more limited one has some advantage. */
1752 opt_scalar_int_mode mode_iter
;
1753 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1755 scalar_int_mode mode
= mode_iter
.require ();
1756 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1758 if (code
!= CODE_FOR_nothing
1759 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1760 here because if SIZE is less than the mode mask, as it is
1761 returned by the macro, it will definitely be less than the
1762 actual mode mask. Since SIZE is within the Pmode address
1763 space, we limit MODE to Pmode. */
1764 && ((CONST_INT_P (size
)
1765 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1766 <= (GET_MODE_MASK (mode
) >> 1)))
1767 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1768 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1770 struct expand_operand ops
[9];
1773 /* ??? When called via emit_block_move_for_call, it'd be
1774 nice if there were some way to inform the backend, so
1775 that it doesn't fail the expansion because it thinks
1776 emitting the libcall would be more efficient. */
1777 nops
= insn_data
[(int) code
].n_generator_args
;
1778 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1780 create_fixed_operand (&ops
[0], x
);
1781 create_fixed_operand (&ops
[1], y
);
1782 /* The check above guarantees that this size conversion is valid. */
1783 create_convert_operand_to (&ops
[2], size
, mode
, true);
1784 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1787 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1788 create_integer_operand (&ops
[5], expected_size
);
1792 create_integer_operand (&ops
[6], min_size
);
1793 /* If we can not represent the maximal size,
1794 make parameter NULL. */
1795 if ((HOST_WIDE_INT
) max_size
!= -1)
1796 create_integer_operand (&ops
[7], max_size
);
1798 create_fixed_operand (&ops
[7], NULL
);
1802 /* If we can not represent the maximal size,
1803 make parameter NULL. */
1804 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1805 create_integer_operand (&ops
[8], probable_max_size
);
1807 create_fixed_operand (&ops
[8], NULL
);
1809 if (maybe_expand_insn (code
, nops
, ops
))
1811 volatile_ok
= save_volatile_ok
;
1817 volatile_ok
= save_volatile_ok
;
1821 /* A subroutine of emit_block_move. Copy the data via an explicit
1822 loop. This is used only when libcalls are forbidden. */
1823 /* ??? It'd be nice to copy in hunks larger than QImode. */
1826 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1827 unsigned int align ATTRIBUTE_UNUSED
)
1829 rtx_code_label
*cmp_label
, *top_label
;
1830 rtx iter
, x_addr
, y_addr
, tmp
;
1831 machine_mode x_addr_mode
= get_address_mode (x
);
1832 machine_mode y_addr_mode
= get_address_mode (y
);
1833 machine_mode iter_mode
;
1835 iter_mode
= GET_MODE (size
);
1836 if (iter_mode
== VOIDmode
)
1837 iter_mode
= word_mode
;
1839 top_label
= gen_label_rtx ();
1840 cmp_label
= gen_label_rtx ();
1841 iter
= gen_reg_rtx (iter_mode
);
1843 emit_move_insn (iter
, const0_rtx
);
1845 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1846 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1847 do_pending_stack_adjust ();
1849 emit_jump (cmp_label
);
1850 emit_label (top_label
);
1852 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1853 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1855 if (x_addr_mode
!= y_addr_mode
)
1856 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1857 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1859 x
= change_address (x
, QImode
, x_addr
);
1860 y
= change_address (y
, QImode
, y_addr
);
1862 emit_move_insn (x
, y
);
1864 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1865 true, OPTAB_LIB_WIDEN
);
1867 emit_move_insn (iter
, tmp
);
1869 emit_label (cmp_label
);
1871 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1873 profile_probability::guessed_always ()
1874 .apply_scale (9, 10));
1877 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1878 TAILCALL is true if this is a tail call. */
1881 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1882 rtx size
, bool tailcall
)
1884 rtx dst_addr
, src_addr
;
1885 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1886 machine_mode size_mode
;
1888 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1889 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1890 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1892 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1893 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1894 src_tree
= make_tree (ptr_type_node
, src_addr
);
1896 size_mode
= TYPE_MODE (sizetype
);
1897 size
= convert_to_mode (size_mode
, size
, 1);
1898 size
= copy_to_mode_reg (size_mode
, size
);
1899 size_tree
= make_tree (sizetype
, size
);
1901 /* It is incorrect to use the libcall calling conventions for calls to
1902 memcpy/memmove/memcmp because they can be provided by the user. */
1903 tree fn
= builtin_decl_implicit (fncode
);
1904 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1905 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1907 return expand_call (call_expr
, NULL_RTX
, false);
1910 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1911 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1912 otherwise return null. */
1915 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1916 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1917 HOST_WIDE_INT align
)
1919 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1921 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1924 struct expand_operand ops
[5];
1925 create_output_operand (&ops
[0], target
, insn_mode
);
1926 create_fixed_operand (&ops
[1], arg1_rtx
);
1927 create_fixed_operand (&ops
[2], arg2_rtx
);
1928 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1929 TYPE_UNSIGNED (arg3_type
));
1930 create_integer_operand (&ops
[4], align
);
1931 if (maybe_expand_insn (icode
, 5, ops
))
1932 return ops
[0].value
;
1936 /* Expand a block compare between X and Y with length LEN using the
1937 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1938 of the expression that was used to calculate the length. ALIGN
1939 gives the known minimum common alignment. */
1942 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1945 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1946 implementing memcmp because it will stop if it encounters two
1948 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1950 if (icode
== CODE_FOR_nothing
)
1953 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1956 /* Emit code to compare a block Y to a block X. This may be done with
1957 string-compare instructions, with multiple scalar instructions,
1958 or with a library call.
1960 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1961 they are. LEN_TYPE is the type of the expression that was used to
1964 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1965 value of a normal memcmp call, instead we can just compare for equality.
1966 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1969 Optionally, the caller can pass a constfn and associated data in Y_CFN
1970 and Y_CFN_DATA. describing that the second operand being compared is a
1971 known constant and how to obtain its data.
1972 Return the result of the comparison, or NULL_RTX if we failed to
1973 perform the operation. */
1976 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1977 bool equality_only
, by_pieces_constfn y_cfn
,
1982 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1985 gcc_assert (MEM_P (x
) && MEM_P (y
));
1986 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1987 gcc_assert (align
>= BITS_PER_UNIT
);
1989 x
= adjust_address (x
, BLKmode
, 0);
1990 y
= adjust_address (y
, BLKmode
, 0);
1993 && CONST_INT_P (len
)
1994 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1995 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1998 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2003 /* Copy all or part of a value X into registers starting at REGNO.
2004 The number of registers to be filled is NREGS. */
2007 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2012 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2013 x
= validize_mem (force_const_mem (mode
, x
));
2015 /* See if the machine can do this with a load multiple insn. */
2016 if (targetm
.have_load_multiple ())
2018 rtx_insn
*last
= get_last_insn ();
2019 rtx first
= gen_rtx_REG (word_mode
, regno
);
2020 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2027 delete_insns_since (last
);
2030 for (int i
= 0; i
< nregs
; i
++)
2031 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2032 operand_subword_force (x
, i
, mode
));
2035 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2036 The number of registers to be filled is NREGS. */
2039 move_block_from_reg (int regno
, rtx x
, int nregs
)
2044 /* See if the machine can do this with a store multiple insn. */
2045 if (targetm
.have_store_multiple ())
2047 rtx_insn
*last
= get_last_insn ();
2048 rtx first
= gen_rtx_REG (word_mode
, regno
);
2049 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2056 delete_insns_since (last
);
2059 for (int i
= 0; i
< nregs
; i
++)
2061 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2065 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2069 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2070 ORIG, where ORIG is a non-consecutive group of registers represented by
2071 a PARALLEL. The clone is identical to the original except in that the
2072 original set of registers is replaced by a new set of pseudo registers.
2073 The new set has the same modes as the original set. */
2076 gen_group_rtx (rtx orig
)
2081 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2083 length
= XVECLEN (orig
, 0);
2084 tmps
= XALLOCAVEC (rtx
, length
);
2086 /* Skip a NULL entry in first slot. */
2087 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2092 for (; i
< length
; i
++)
2094 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2095 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2097 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2100 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2103 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2104 except that values are placed in TMPS[i], and must later be moved
2105 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2108 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2113 machine_mode m
= GET_MODE (orig_src
);
2115 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2118 && !SCALAR_INT_MODE_P (m
)
2119 && !MEM_P (orig_src
)
2120 && GET_CODE (orig_src
) != CONCAT
)
2122 scalar_int_mode imode
;
2123 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2125 src
= gen_reg_rtx (imode
);
2126 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2130 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2131 emit_move_insn (src
, orig_src
);
2133 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2137 /* Check for a NULL entry, used to indicate that the parameter goes
2138 both on the stack and in registers. */
2139 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2144 /* Process the pieces. */
2145 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2147 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2148 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2149 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2150 poly_int64 shift
= 0;
2152 /* Handle trailing fragments that run over the size of the struct.
2153 It's the target's responsibility to make sure that the fragment
2154 cannot be strictly smaller in some cases and strictly larger
2156 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2157 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2159 /* Arrange to shift the fragment to where it belongs.
2160 extract_bit_field loads to the lsb of the reg. */
2162 #ifdef BLOCK_REG_PADDING
2163 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2164 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2169 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2170 bytelen
= ssize
- bytepos
;
2171 gcc_assert (maybe_gt (bytelen
, 0));
2174 /* If we won't be loading directly from memory, protect the real source
2175 from strange tricks we might play; but make sure that the source can
2176 be loaded directly into the destination. */
2178 if (!MEM_P (orig_src
)
2179 && (!CONSTANT_P (orig_src
)
2180 || (GET_MODE (orig_src
) != mode
2181 && GET_MODE (orig_src
) != VOIDmode
)))
2183 if (GET_MODE (orig_src
) == VOIDmode
)
2184 src
= gen_reg_rtx (mode
);
2186 src
= gen_reg_rtx (GET_MODE (orig_src
));
2188 emit_move_insn (src
, orig_src
);
2191 /* Optimize the access just a bit. */
2193 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2194 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2195 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2196 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2198 tmps
[i
] = gen_reg_rtx (mode
);
2199 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2201 else if (COMPLEX_MODE_P (mode
)
2202 && GET_MODE (src
) == mode
2203 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2204 /* Let emit_move_complex do the bulk of the work. */
2206 else if (GET_CODE (src
) == CONCAT
)
2208 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2209 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2213 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2214 && known_le (subpos
+ bytelen
, slen0
))
2216 /* The following assumes that the concatenated objects all
2217 have the same size. In this case, a simple calculation
2218 can be used to determine the object and the bit field
2220 tmps
[i
] = XEXP (src
, elt
);
2221 if (maybe_ne (subpos
, 0)
2222 || maybe_ne (subpos
+ bytelen
, slen0
)
2223 || (!CONSTANT_P (tmps
[i
])
2224 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2225 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2226 subpos
* BITS_PER_UNIT
,
2227 1, NULL_RTX
, mode
, mode
, false,
2234 gcc_assert (known_eq (bytepos
, 0));
2235 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2236 emit_move_insn (mem
, src
);
2237 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2238 0, 1, NULL_RTX
, mode
, mode
, false,
2242 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2243 SIMD register, which is currently broken. While we get GCC
2244 to emit proper RTL for these cases, let's dump to memory. */
2245 else if (VECTOR_MODE_P (GET_MODE (dst
))
2248 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2251 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2252 emit_move_insn (mem
, src
);
2253 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2255 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2256 && XVECLEN (dst
, 0) > 1)
2257 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2258 else if (CONSTANT_P (src
))
2260 if (known_eq (bytelen
, ssize
))
2266 /* TODO: const_wide_int can have sizes other than this... */
2267 gcc_assert (known_eq (2 * bytelen
, ssize
));
2268 split_double (src
, &first
, &second
);
2275 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2278 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2279 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2280 mode
, mode
, false, NULL
);
2282 if (maybe_ne (shift
, 0))
2283 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2288 /* Emit code to move a block SRC of type TYPE to a block DST,
2289 where DST is non-consecutive registers represented by a PARALLEL.
2290 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2294 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2299 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2300 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2302 /* Copy the extracted pieces into the proper (probable) hard regs. */
2303 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2305 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2308 emit_move_insn (d
, tmps
[i
]);
2312 /* Similar, but load SRC into new pseudos in a format that looks like
2313 PARALLEL. This can later be fed to emit_group_move to get things
2314 in the right place. */
2317 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2322 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2323 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2325 /* Convert the vector to look just like the original PARALLEL, except
2326 with the computed values. */
2327 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2329 rtx e
= XVECEXP (parallel
, 0, i
);
2330 rtx d
= XEXP (e
, 0);
2334 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2335 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2337 RTVEC_ELT (vec
, i
) = e
;
2340 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2343 /* Emit code to move a block SRC to block DST, where SRC and DST are
2344 non-consecutive groups of registers, each represented by a PARALLEL. */
2347 emit_group_move (rtx dst
, rtx src
)
2351 gcc_assert (GET_CODE (src
) == PARALLEL
2352 && GET_CODE (dst
) == PARALLEL
2353 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2355 /* Skip first entry if NULL. */
2356 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2357 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2358 XEXP (XVECEXP (src
, 0, i
), 0));
2361 /* Move a group of registers represented by a PARALLEL into pseudos. */
2364 emit_group_move_into_temps (rtx src
)
2366 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2369 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2371 rtx e
= XVECEXP (src
, 0, i
);
2372 rtx d
= XEXP (e
, 0);
2375 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2376 RTVEC_ELT (vec
, i
) = e
;
2379 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2382 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2383 where SRC is non-consecutive registers represented by a PARALLEL.
2384 SSIZE represents the total size of block ORIG_DST, or -1 if not
2388 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2392 int start
, finish
, i
;
2393 machine_mode m
= GET_MODE (orig_dst
);
2395 gcc_assert (GET_CODE (src
) == PARALLEL
);
2397 if (!SCALAR_INT_MODE_P (m
)
2398 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2400 scalar_int_mode imode
;
2401 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2403 dst
= gen_reg_rtx (imode
);
2404 emit_group_store (dst
, src
, type
, ssize
);
2405 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2409 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2410 emit_group_store (dst
, src
, type
, ssize
);
2412 emit_move_insn (orig_dst
, dst
);
2416 /* Check for a NULL entry, used to indicate that the parameter goes
2417 both on the stack and in registers. */
2418 if (XEXP (XVECEXP (src
, 0, 0), 0))
2422 finish
= XVECLEN (src
, 0);
2424 tmps
= XALLOCAVEC (rtx
, finish
);
2426 /* Copy the (probable) hard regs into pseudos. */
2427 for (i
= start
; i
< finish
; i
++)
2429 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2430 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2432 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2433 emit_move_insn (tmps
[i
], reg
);
2439 /* If we won't be storing directly into memory, protect the real destination
2440 from strange tricks we might play. */
2442 if (GET_CODE (dst
) == PARALLEL
)
2446 /* We can get a PARALLEL dst if there is a conditional expression in
2447 a return statement. In that case, the dst and src are the same,
2448 so no action is necessary. */
2449 if (rtx_equal_p (dst
, src
))
2452 /* It is unclear if we can ever reach here, but we may as well handle
2453 it. Allocate a temporary, and split this into a store/load to/from
2455 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2456 emit_group_store (temp
, src
, type
, ssize
);
2457 emit_group_load (dst
, temp
, type
, ssize
);
2460 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2462 machine_mode outer
= GET_MODE (dst
);
2468 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2469 dst
= gen_reg_rtx (outer
);
2471 /* Make life a bit easier for combine. */
2472 /* If the first element of the vector is the low part
2473 of the destination mode, use a paradoxical subreg to
2474 initialize the destination. */
2477 inner
= GET_MODE (tmps
[start
]);
2478 bytepos
= subreg_lowpart_offset (inner
, outer
);
2479 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)), bytepos
))
2481 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2485 emit_move_insn (dst
, temp
);
2492 /* If the first element wasn't the low part, try the last. */
2494 && start
< finish
- 1)
2496 inner
= GET_MODE (tmps
[finish
- 1]);
2497 bytepos
= subreg_lowpart_offset (inner
, outer
);
2498 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)),
2501 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2505 emit_move_insn (dst
, temp
);
2512 /* Otherwise, simply initialize the result to zero. */
2514 emit_move_insn (dst
, CONST0_RTX (outer
));
2517 /* Process the pieces. */
2518 for (i
= start
; i
< finish
; i
++)
2520 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2521 machine_mode mode
= GET_MODE (tmps
[i
]);
2522 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2523 poly_uint64 adj_bytelen
;
2526 /* Handle trailing fragments that run over the size of the struct.
2527 It's the target's responsibility to make sure that the fragment
2528 cannot be strictly smaller in some cases and strictly larger
2530 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2531 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2532 adj_bytelen
= ssize
- bytepos
;
2534 adj_bytelen
= bytelen
;
2536 if (GET_CODE (dst
) == CONCAT
)
2538 if (known_le (bytepos
+ adj_bytelen
,
2539 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2540 dest
= XEXP (dst
, 0);
2541 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2543 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2544 dest
= XEXP (dst
, 1);
2548 machine_mode dest_mode
= GET_MODE (dest
);
2549 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2551 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2553 if (GET_MODE_ALIGNMENT (dest_mode
)
2554 >= GET_MODE_ALIGNMENT (tmp_mode
))
2556 dest
= assign_stack_temp (dest_mode
,
2557 GET_MODE_SIZE (dest_mode
));
2558 emit_move_insn (adjust_address (dest
,
2566 dest
= assign_stack_temp (tmp_mode
,
2567 GET_MODE_SIZE (tmp_mode
));
2568 emit_move_insn (dest
, tmps
[i
]);
2569 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2575 /* Handle trailing fragments that run over the size of the struct. */
2576 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2578 /* store_bit_field always takes its value from the lsb.
2579 Move the fragment to the lsb if it's not already there. */
2581 #ifdef BLOCK_REG_PADDING
2582 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2583 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2589 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2590 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2594 /* Make sure not to write past the end of the struct. */
2595 store_bit_field (dest
,
2596 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2597 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2598 VOIDmode
, tmps
[i
], false);
2601 /* Optimize the access just a bit. */
2602 else if (MEM_P (dest
)
2603 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2604 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2605 && multiple_p (bytepos
* BITS_PER_UNIT
,
2606 GET_MODE_ALIGNMENT (mode
))
2607 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2608 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2611 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2612 0, 0, mode
, tmps
[i
], false);
2615 /* Copy from the pseudo into the (probable) hard reg. */
2616 if (orig_dst
!= dst
)
2617 emit_move_insn (orig_dst
, dst
);
2620 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2621 of the value stored in X. */
2624 maybe_emit_group_store (rtx x
, tree type
)
2626 machine_mode mode
= TYPE_MODE (type
);
2627 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2628 if (GET_CODE (x
) == PARALLEL
)
2630 rtx result
= gen_reg_rtx (mode
);
2631 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2637 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2639 This is used on targets that return BLKmode values in registers. */
2642 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2644 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2645 rtx src
= NULL
, dst
= NULL
;
2646 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2647 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2648 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2649 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2650 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2651 fixed_size_mode copy_mode
;
2653 /* BLKmode registers created in the back-end shouldn't have survived. */
2654 gcc_assert (mode
!= BLKmode
);
2656 /* If the structure doesn't take up a whole number of words, see whether
2657 SRCREG is padded on the left or on the right. If it's on the left,
2658 set PADDING_CORRECTION to the number of bits to skip.
2660 In most ABIs, the structure will be returned at the least end of
2661 the register, which translates to right padding on little-endian
2662 targets and left padding on big-endian targets. The opposite
2663 holds if the structure is returned at the most significant
2664 end of the register. */
2665 if (bytes
% UNITS_PER_WORD
!= 0
2666 && (targetm
.calls
.return_in_msb (type
)
2668 : BYTES_BIG_ENDIAN
))
2670 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2672 /* We can use a single move if we have an exact mode for the size. */
2673 else if (MEM_P (target
)
2674 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2675 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2676 && bytes
== GET_MODE_SIZE (mode
))
2678 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2682 /* And if we additionally have the same mode for a register. */
2683 else if (REG_P (target
)
2684 && GET_MODE (target
) == mode
2685 && bytes
== GET_MODE_SIZE (mode
))
2687 emit_move_insn (target
, srcreg
);
2691 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2692 into a new pseudo which is a full word. */
2693 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2695 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2699 /* Copy the structure BITSIZE bits at a time. If the target lives in
2700 memory, take care of not reading/writing past its end by selecting
2701 a copy mode suited to BITSIZE. This should always be possible given
2704 If the target lives in register, make sure not to select a copy mode
2705 larger than the mode of the register.
2707 We could probably emit more efficient code for machines which do not use
2708 strict alignment, but it doesn't seem worth the effort at the current
2711 copy_mode
= word_mode
;
2714 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2715 if (mem_mode
.exists ())
2716 copy_mode
= mem_mode
.require ();
2718 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2721 for (bitpos
= 0, xbitpos
= padding_correction
;
2722 bitpos
< bytes
* BITS_PER_UNIT
;
2723 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2725 /* We need a new source operand each time xbitpos is on a
2726 word boundary and when xbitpos == padding_correction
2727 (the first time through). */
2728 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2729 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2731 /* We need a new destination operand each time bitpos is on
2733 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2735 else if (bitpos
% BITS_PER_WORD
== 0)
2736 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2738 /* Use xbitpos for the source extraction (right justified) and
2739 bitpos for the destination store (left justified). */
2740 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2741 extract_bit_field (src
, bitsize
,
2742 xbitpos
% BITS_PER_WORD
, 1,
2743 NULL_RTX
, copy_mode
, copy_mode
,
2749 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2750 register if it contains any data, otherwise return null.
2752 This is used on targets that return BLKmode values in registers. */
2755 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2758 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2759 unsigned int bitsize
;
2760 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2761 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2762 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2763 fixed_size_mode dst_mode
;
2765 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2767 x
= expand_normal (src
);
2769 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2773 /* If the structure doesn't take up a whole number of words, see
2774 whether the register value should be padded on the left or on
2775 the right. Set PADDING_CORRECTION to the number of padding
2776 bits needed on the left side.
2778 In most ABIs, the structure will be returned at the least end of
2779 the register, which translates to right padding on little-endian
2780 targets and left padding on big-endian targets. The opposite
2781 holds if the structure is returned at the most significant
2782 end of the register. */
2783 if (bytes
% UNITS_PER_WORD
!= 0
2784 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2786 : BYTES_BIG_ENDIAN
))
2787 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2790 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2791 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2792 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2794 /* Copy the structure BITSIZE bits at a time. */
2795 for (bitpos
= 0, xbitpos
= padding_correction
;
2796 bitpos
< bytes
* BITS_PER_UNIT
;
2797 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2799 /* We need a new destination pseudo each time xbitpos is
2800 on a word boundary and when xbitpos == padding_correction
2801 (the first time through). */
2802 if (xbitpos
% BITS_PER_WORD
== 0
2803 || xbitpos
== padding_correction
)
2805 /* Generate an appropriate register. */
2806 dst_word
= gen_reg_rtx (word_mode
);
2807 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2809 /* Clear the destination before we move anything into it. */
2810 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2813 /* We need a new source operand each time bitpos is on a word
2815 if (bitpos
% BITS_PER_WORD
== 0)
2816 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2818 /* Use bitpos for the source extraction (left justified) and
2819 xbitpos for the destination store (right justified). */
2820 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2822 extract_bit_field (src_word
, bitsize
,
2823 bitpos
% BITS_PER_WORD
, 1,
2824 NULL_RTX
, word_mode
, word_mode
,
2829 if (mode
== BLKmode
)
2831 /* Find the smallest integer mode large enough to hold the
2832 entire structure. */
2833 opt_scalar_int_mode mode_iter
;
2834 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2835 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2838 /* A suitable mode should have been found. */
2839 mode
= mode_iter
.require ();
2842 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2843 dst_mode
= word_mode
;
2846 dst
= gen_reg_rtx (dst_mode
);
2848 for (i
= 0; i
< n_regs
; i
++)
2849 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2851 if (mode
!= dst_mode
)
2852 dst
= gen_lowpart (mode
, dst
);
2857 /* Add a USE expression for REG to the (possibly empty) list pointed
2858 to by CALL_FUSAGE. REG must denote a hard register. */
2861 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2863 gcc_assert (REG_P (reg
));
2865 if (!HARD_REGISTER_P (reg
))
2869 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2872 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2873 to by CALL_FUSAGE. REG must denote a hard register. */
2876 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2878 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2881 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2884 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2885 starting at REGNO. All of these registers must be hard registers. */
2888 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2892 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2894 for (i
= 0; i
< nregs
; i
++)
2895 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2898 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2899 PARALLEL REGS. This is for calls that pass values in multiple
2900 non-contiguous locations. The Irix 6 ABI has examples of this. */
2903 use_group_regs (rtx
*call_fusage
, rtx regs
)
2907 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2909 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2911 /* A NULL entry means the parameter goes both on the stack and in
2912 registers. This can also be a MEM for targets that pass values
2913 partially on the stack and partially in registers. */
2914 if (reg
!= 0 && REG_P (reg
))
2915 use_reg (call_fusage
, reg
);
2919 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2920 assigment and the code of the expresion on the RHS is CODE. Return
2924 get_def_for_expr (tree name
, enum tree_code code
)
2928 if (TREE_CODE (name
) != SSA_NAME
)
2931 def_stmt
= get_gimple_for_ssa_name (name
);
2933 || gimple_assign_rhs_code (def_stmt
) != code
)
2939 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2940 assigment and the class of the expresion on the RHS is CLASS. Return
2944 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2948 if (TREE_CODE (name
) != SSA_NAME
)
2951 def_stmt
= get_gimple_for_ssa_name (name
);
2953 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2959 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2960 its length in bytes. */
2963 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2964 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2965 unsigned HOST_WIDE_INT min_size
,
2966 unsigned HOST_WIDE_INT max_size
,
2967 unsigned HOST_WIDE_INT probable_max_size
)
2969 machine_mode mode
= GET_MODE (object
);
2972 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2974 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2975 just move a zero. Otherwise, do this a piece at a time. */
2977 && CONST_INT_P (size
)
2978 && known_eq (INTVAL (size
), GET_MODE_SIZE (mode
)))
2980 rtx zero
= CONST0_RTX (mode
);
2983 emit_move_insn (object
, zero
);
2987 if (COMPLEX_MODE_P (mode
))
2989 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2992 write_complex_part (object
, zero
, 0);
2993 write_complex_part (object
, zero
, 1);
2999 if (size
== const0_rtx
)
3002 align
= MEM_ALIGN (object
);
3004 if (CONST_INT_P (size
)
3005 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3007 optimize_insn_for_speed_p ()))
3008 clear_by_pieces (object
, INTVAL (size
), align
);
3009 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3010 expected_align
, expected_size
,
3011 min_size
, max_size
, probable_max_size
))
3013 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3014 return set_storage_via_libcall (object
, size
, const0_rtx
,
3015 method
== BLOCK_OP_TAILCALL
);
3023 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3025 unsigned HOST_WIDE_INT max
, min
= 0;
3026 if (GET_CODE (size
) == CONST_INT
)
3027 min
= max
= UINTVAL (size
);
3029 max
= GET_MODE_MASK (GET_MODE (size
));
3030 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3034 /* A subroutine of clear_storage. Expand a call to memset.
3035 Return the return value of memset, 0 otherwise. */
3038 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3040 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3041 machine_mode size_mode
;
3043 object
= copy_addr_to_reg (XEXP (object
, 0));
3044 object_tree
= make_tree (ptr_type_node
, object
);
3046 if (!CONST_INT_P (val
))
3047 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3048 val_tree
= make_tree (integer_type_node
, val
);
3050 size_mode
= TYPE_MODE (sizetype
);
3051 size
= convert_to_mode (size_mode
, size
, 1);
3052 size
= copy_to_mode_reg (size_mode
, size
);
3053 size_tree
= make_tree (sizetype
, size
);
3055 /* It is incorrect to use the libcall calling conventions for calls to
3056 memset because it can be provided by the user. */
3057 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3058 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3059 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3061 return expand_call (call_expr
, NULL_RTX
, false);
3064 /* Expand a setmem pattern; return true if successful. */
3067 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3068 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3069 unsigned HOST_WIDE_INT min_size
,
3070 unsigned HOST_WIDE_INT max_size
,
3071 unsigned HOST_WIDE_INT probable_max_size
)
3073 /* Try the most limited insn first, because there's no point
3074 including more than one in the machine description unless
3075 the more limited one has some advantage. */
3077 if (expected_align
< align
)
3078 expected_align
= align
;
3079 if (expected_size
!= -1)
3081 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3082 expected_size
= max_size
;
3083 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3084 expected_size
= min_size
;
3087 opt_scalar_int_mode mode_iter
;
3088 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3090 scalar_int_mode mode
= mode_iter
.require ();
3091 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3093 if (code
!= CODE_FOR_nothing
3094 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3095 here because if SIZE is less than the mode mask, as it is
3096 returned by the macro, it will definitely be less than the
3097 actual mode mask. Since SIZE is within the Pmode address
3098 space, we limit MODE to Pmode. */
3099 && ((CONST_INT_P (size
)
3100 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3101 <= (GET_MODE_MASK (mode
) >> 1)))
3102 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3103 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3105 struct expand_operand ops
[9];
3108 nops
= insn_data
[(int) code
].n_generator_args
;
3109 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3111 create_fixed_operand (&ops
[0], object
);
3112 /* The check above guarantees that this size conversion is valid. */
3113 create_convert_operand_to (&ops
[1], size
, mode
, true);
3114 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3115 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3118 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3119 create_integer_operand (&ops
[5], expected_size
);
3123 create_integer_operand (&ops
[6], min_size
);
3124 /* If we can not represent the maximal size,
3125 make parameter NULL. */
3126 if ((HOST_WIDE_INT
) max_size
!= -1)
3127 create_integer_operand (&ops
[7], max_size
);
3129 create_fixed_operand (&ops
[7], NULL
);
3133 /* If we can not represent the maximal size,
3134 make parameter NULL. */
3135 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3136 create_integer_operand (&ops
[8], probable_max_size
);
3138 create_fixed_operand (&ops
[8], NULL
);
3140 if (maybe_expand_insn (code
, nops
, ops
))
3149 /* Write to one of the components of the complex value CPLX. Write VAL to
3150 the real part if IMAG_P is false, and the imaginary part if its true. */
3153 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3159 if (GET_CODE (cplx
) == CONCAT
)
3161 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3165 cmode
= GET_MODE (cplx
);
3166 imode
= GET_MODE_INNER (cmode
);
3167 ibitsize
= GET_MODE_BITSIZE (imode
);
3169 /* For MEMs simplify_gen_subreg may generate an invalid new address
3170 because, e.g., the original address is considered mode-dependent
3171 by the target, which restricts simplify_subreg from invoking
3172 adjust_address_nv. Instead of preparing fallback support for an
3173 invalid address, we call adjust_address_nv directly. */
3176 emit_move_insn (adjust_address_nv (cplx
, imode
,
3177 imag_p
? GET_MODE_SIZE (imode
) : 0),
3182 /* If the sub-object is at least word sized, then we know that subregging
3183 will work. This special case is important, since store_bit_field
3184 wants to operate on integer modes, and there's rarely an OImode to
3185 correspond to TCmode. */
3186 if (ibitsize
>= BITS_PER_WORD
3187 /* For hard regs we have exact predicates. Assume we can split
3188 the original object if it spans an even number of hard regs.
3189 This special case is important for SCmode on 64-bit platforms
3190 where the natural size of floating-point regs is 32-bit. */
3192 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3193 && REG_NREGS (cplx
) % 2 == 0))
3195 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3196 imag_p
? GET_MODE_SIZE (imode
) : 0);
3199 emit_move_insn (part
, val
);
3203 /* simplify_gen_subreg may fail for sub-word MEMs. */
3204 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3207 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3211 /* Extract one of the components of the complex value CPLX. Extract the
3212 real part if IMAG_P is false, and the imaginary part if it's true. */
3215 read_complex_part (rtx cplx
, bool imag_p
)
3221 if (GET_CODE (cplx
) == CONCAT
)
3222 return XEXP (cplx
, imag_p
);
3224 cmode
= GET_MODE (cplx
);
3225 imode
= GET_MODE_INNER (cmode
);
3226 ibitsize
= GET_MODE_BITSIZE (imode
);
3228 /* Special case reads from complex constants that got spilled to memory. */
3229 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3231 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3232 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3234 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3235 if (CONSTANT_CLASS_P (part
))
3236 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3240 /* For MEMs simplify_gen_subreg may generate an invalid new address
3241 because, e.g., the original address is considered mode-dependent
3242 by the target, which restricts simplify_subreg from invoking
3243 adjust_address_nv. Instead of preparing fallback support for an
3244 invalid address, we call adjust_address_nv directly. */
3246 return adjust_address_nv (cplx
, imode
,
3247 imag_p
? GET_MODE_SIZE (imode
) : 0);
3249 /* If the sub-object is at least word sized, then we know that subregging
3250 will work. This special case is important, since extract_bit_field
3251 wants to operate on integer modes, and there's rarely an OImode to
3252 correspond to TCmode. */
3253 if (ibitsize
>= BITS_PER_WORD
3254 /* For hard regs we have exact predicates. Assume we can split
3255 the original object if it spans an even number of hard regs.
3256 This special case is important for SCmode on 64-bit platforms
3257 where the natural size of floating-point regs is 32-bit. */
3259 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3260 && REG_NREGS (cplx
) % 2 == 0))
3262 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3263 imag_p
? GET_MODE_SIZE (imode
) : 0);
3267 /* simplify_gen_subreg may fail for sub-word MEMs. */
3268 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3271 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3272 true, NULL_RTX
, imode
, imode
, false, NULL
);
3275 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3276 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3277 represented in NEW_MODE. If FORCE is true, this will never happen, as
3278 we'll force-create a SUBREG if needed. */
3281 emit_move_change_mode (machine_mode new_mode
,
3282 machine_mode old_mode
, rtx x
, bool force
)
3286 if (push_operand (x
, GET_MODE (x
)))
3288 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3289 MEM_COPY_ATTRIBUTES (ret
, x
);
3293 /* We don't have to worry about changing the address since the
3294 size in bytes is supposed to be the same. */
3295 if (reload_in_progress
)
3297 /* Copy the MEM to change the mode and move any
3298 substitutions from the old MEM to the new one. */
3299 ret
= adjust_address_nv (x
, new_mode
, 0);
3300 copy_replacements (x
, ret
);
3303 ret
= adjust_address (x
, new_mode
, 0);
3307 /* Note that we do want simplify_subreg's behavior of validating
3308 that the new mode is ok for a hard register. If we were to use
3309 simplify_gen_subreg, we would create the subreg, but would
3310 probably run into the target not being able to implement it. */
3311 /* Except, of course, when FORCE is true, when this is exactly what
3312 we want. Which is needed for CCmodes on some targets. */
3314 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3316 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3322 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3323 an integer mode of the same size as MODE. Returns the instruction
3324 emitted, or NULL if such a move could not be generated. */
3327 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3329 scalar_int_mode imode
;
3330 enum insn_code code
;
3332 /* There must exist a mode of the exact size we require. */
3333 if (!int_mode_for_mode (mode
).exists (&imode
))
3336 /* The target must support moves in this mode. */
3337 code
= optab_handler (mov_optab
, imode
);
3338 if (code
== CODE_FOR_nothing
)
3341 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3344 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3347 return emit_insn (GEN_FCN (code
) (x
, y
));
3350 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3351 Return an equivalent MEM that does not use an auto-increment. */
3354 emit_move_resolve_push (machine_mode mode
, rtx x
)
3356 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3359 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3360 #ifdef PUSH_ROUNDING
3361 adjust
= PUSH_ROUNDING (adjust
);
3363 if (code
== PRE_DEC
|| code
== POST_DEC
)
3365 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3367 rtx expr
= XEXP (XEXP (x
, 0), 1);
3369 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3370 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3371 if (GET_CODE (expr
) == MINUS
)
3373 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3377 /* Do not use anti_adjust_stack, since we don't want to update
3378 stack_pointer_delta. */
3379 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3380 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3381 0, OPTAB_LIB_WIDEN
);
3382 if (temp
!= stack_pointer_rtx
)
3383 emit_move_insn (stack_pointer_rtx
, temp
);
3390 temp
= stack_pointer_rtx
;
3395 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3401 return replace_equiv_address (x
, temp
);
3404 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3405 X is known to satisfy push_operand, and MODE is known to be complex.
3406 Returns the last instruction emitted. */
3409 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3411 scalar_mode submode
= GET_MODE_INNER (mode
);
3414 #ifdef PUSH_ROUNDING
3415 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3417 /* In case we output to the stack, but the size is smaller than the
3418 machine can push exactly, we need to use move instructions. */
3419 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3421 x
= emit_move_resolve_push (mode
, x
);
3422 return emit_move_insn (x
, y
);
3426 /* Note that the real part always precedes the imag part in memory
3427 regardless of machine's endianness. */
3428 switch (GET_CODE (XEXP (x
, 0)))
3442 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3443 read_complex_part (y
, imag_first
));
3444 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3445 read_complex_part (y
, !imag_first
));
3448 /* A subroutine of emit_move_complex. Perform the move from Y to X
3449 via two moves of the parts. Returns the last instruction emitted. */
3452 emit_move_complex_parts (rtx x
, rtx y
)
3454 /* Show the output dies here. This is necessary for SUBREGs
3455 of pseudos since we cannot track their lifetimes correctly;
3456 hard regs shouldn't appear here except as return values. */
3457 if (!reload_completed
&& !reload_in_progress
3458 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3461 write_complex_part (x
, read_complex_part (y
, false), false);
3462 write_complex_part (x
, read_complex_part (y
, true), true);
3464 return get_last_insn ();
3467 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3468 MODE is known to be complex. Returns the last instruction emitted. */
3471 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3475 /* Need to take special care for pushes, to maintain proper ordering
3476 of the data, and possibly extra padding. */
3477 if (push_operand (x
, mode
))
3478 return emit_move_complex_push (mode
, x
, y
);
3480 /* See if we can coerce the target into moving both values at once, except
3481 for floating point where we favor moving as parts if this is easy. */
3482 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3483 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3485 && HARD_REGISTER_P (x
)
3486 && REG_NREGS (x
) == 1)
3488 && HARD_REGISTER_P (y
)
3489 && REG_NREGS (y
) == 1))
3491 /* Not possible if the values are inherently not adjacent. */
3492 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3494 /* Is possible if both are registers (or subregs of registers). */
3495 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3497 /* If one of the operands is a memory, and alignment constraints
3498 are friendly enough, we may be able to do combined memory operations.
3499 We do not attempt this if Y is a constant because that combination is
3500 usually better with the by-parts thing below. */
3501 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3502 && (!STRICT_ALIGNMENT
3503 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3512 /* For memory to memory moves, optimal behavior can be had with the
3513 existing block move logic. */
3514 if (MEM_P (x
) && MEM_P (y
))
3516 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3517 BLOCK_OP_NO_LIBCALL
);
3518 return get_last_insn ();
3521 ret
= emit_move_via_integer (mode
, x
, y
, true);
3526 return emit_move_complex_parts (x
, y
);
3529 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3530 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3533 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3537 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3540 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3541 if (code
!= CODE_FOR_nothing
)
3543 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3544 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3545 return emit_insn (GEN_FCN (code
) (x
, y
));
3549 /* Otherwise, find the MODE_INT mode of the same width. */
3550 ret
= emit_move_via_integer (mode
, x
, y
, false);
3551 gcc_assert (ret
!= NULL
);
3555 /* Return true if word I of OP lies entirely in the
3556 undefined bits of a paradoxical subreg. */
3559 undefined_operand_subword_p (const_rtx op
, int i
)
3561 if (GET_CODE (op
) != SUBREG
)
3563 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3564 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3565 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3566 || known_le (offset
, -UNITS_PER_WORD
));
3569 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3570 MODE is any multi-word or full-word mode that lacks a move_insn
3571 pattern. Note that you will get better code if you define such
3572 patterns, even if they must turn into multiple assembler instructions. */
3575 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3577 rtx_insn
*last_insn
= 0;
3583 /* This function can only handle cases where the number of words is
3584 known at compile time. */
3585 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3586 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3588 /* If X is a push on the stack, do the push now and replace
3589 X with a reference to the stack pointer. */
3590 if (push_operand (x
, mode
))
3591 x
= emit_move_resolve_push (mode
, x
);
3593 /* If we are in reload, see if either operand is a MEM whose address
3594 is scheduled for replacement. */
3595 if (reload_in_progress
&& MEM_P (x
)
3596 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3597 x
= replace_equiv_address_nv (x
, inner
);
3598 if (reload_in_progress
&& MEM_P (y
)
3599 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3600 y
= replace_equiv_address_nv (y
, inner
);
3604 need_clobber
= false;
3605 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3607 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3610 /* Do not generate code for a move if it would come entirely
3611 from the undefined bits of a paradoxical subreg. */
3612 if (undefined_operand_subword_p (y
, i
))
3615 ypart
= operand_subword (y
, i
, 1, mode
);
3617 /* If we can't get a part of Y, put Y into memory if it is a
3618 constant. Otherwise, force it into a register. Then we must
3619 be able to get a part of Y. */
3620 if (ypart
== 0 && CONSTANT_P (y
))
3622 y
= use_anchored_address (force_const_mem (mode
, y
));
3623 ypart
= operand_subword (y
, i
, 1, mode
);
3625 else if (ypart
== 0)
3626 ypart
= operand_subword_force (y
, i
, mode
);
3628 gcc_assert (xpart
&& ypart
);
3630 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3632 last_insn
= emit_move_insn (xpart
, ypart
);
3638 /* Show the output dies here. This is necessary for SUBREGs
3639 of pseudos since we cannot track their lifetimes correctly;
3640 hard regs shouldn't appear here except as return values.
3641 We never want to emit such a clobber after reload. */
3643 && ! (reload_in_progress
|| reload_completed
)
3644 && need_clobber
!= 0)
3652 /* Low level part of emit_move_insn.
3653 Called just like emit_move_insn, but assumes X and Y
3654 are basically valid. */
3657 emit_move_insn_1 (rtx x
, rtx y
)
3659 machine_mode mode
= GET_MODE (x
);
3660 enum insn_code code
;
3662 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3664 code
= optab_handler (mov_optab
, mode
);
3665 if (code
!= CODE_FOR_nothing
)
3666 return emit_insn (GEN_FCN (code
) (x
, y
));
3668 /* Expand complex moves by moving real part and imag part. */
3669 if (COMPLEX_MODE_P (mode
))
3670 return emit_move_complex (mode
, x
, y
);
3672 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3673 || ALL_FIXED_POINT_MODE_P (mode
))
3675 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3677 /* If we can't find an integer mode, use multi words. */
3681 return emit_move_multi_word (mode
, x
, y
);
3684 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3685 return emit_move_ccmode (mode
, x
, y
);
3687 /* Try using a move pattern for the corresponding integer mode. This is
3688 only safe when simplify_subreg can convert MODE constants into integer
3689 constants. At present, it can only do this reliably if the value
3690 fits within a HOST_WIDE_INT. */
3692 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3694 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3698 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3703 return emit_move_multi_word (mode
, x
, y
);
3706 /* Generate code to copy Y into X.
3707 Both Y and X must have the same mode, except that
3708 Y can be a constant with VOIDmode.
3709 This mode cannot be BLKmode; use emit_block_move for that.
3711 Return the last instruction emitted. */
3714 emit_move_insn (rtx x
, rtx y
)
3716 machine_mode mode
= GET_MODE (x
);
3717 rtx y_cst
= NULL_RTX
;
3718 rtx_insn
*last_insn
;
3721 gcc_assert (mode
!= BLKmode
3722 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3727 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3728 && (last_insn
= compress_float_constant (x
, y
)))
3733 if (!targetm
.legitimate_constant_p (mode
, y
))
3735 y
= force_const_mem (mode
, y
);
3737 /* If the target's cannot_force_const_mem prevented the spill,
3738 assume that the target's move expanders will also take care
3739 of the non-legitimate constant. */
3743 y
= use_anchored_address (y
);
3747 /* If X or Y are memory references, verify that their addresses are valid
3750 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3752 && ! push_operand (x
, GET_MODE (x
))))
3753 x
= validize_mem (x
);
3756 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3757 MEM_ADDR_SPACE (y
)))
3758 y
= validize_mem (y
);
3760 gcc_assert (mode
!= BLKmode
);
3762 last_insn
= emit_move_insn_1 (x
, y
);
3764 if (y_cst
&& REG_P (x
)
3765 && (set
= single_set (last_insn
)) != NULL_RTX
3766 && SET_DEST (set
) == x
3767 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3768 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3773 /* Generate the body of an instruction to copy Y into X.
3774 It may be a list of insns, if one insn isn't enough. */
3777 gen_move_insn (rtx x
, rtx y
)
3782 emit_move_insn_1 (x
, y
);
3788 /* If Y is representable exactly in a narrower mode, and the target can
3789 perform the extension directly from constant or memory, then emit the
3790 move as an extension. */
3793 compress_float_constant (rtx x
, rtx y
)
3795 machine_mode dstmode
= GET_MODE (x
);
3796 machine_mode orig_srcmode
= GET_MODE (y
);
3797 machine_mode srcmode
;
3798 const REAL_VALUE_TYPE
*r
;
3799 int oldcost
, newcost
;
3800 bool speed
= optimize_insn_for_speed_p ();
3802 r
= CONST_DOUBLE_REAL_VALUE (y
);
3804 if (targetm
.legitimate_constant_p (dstmode
, y
))
3805 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3807 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3809 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3813 rtx_insn
*last_insn
;
3815 /* Skip if the target can't extend this way. */
3816 ic
= can_extend_p (dstmode
, srcmode
, 0);
3817 if (ic
== CODE_FOR_nothing
)
3820 /* Skip if the narrowed value isn't exact. */
3821 if (! exact_real_truncate (srcmode
, r
))
3824 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3826 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3828 /* Skip if the target needs extra instructions to perform
3830 if (!insn_operand_matches (ic
, 1, trunc_y
))
3832 /* This is valid, but may not be cheaper than the original. */
3833 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3835 if (oldcost
< newcost
)
3838 else if (float_extend_from_mem
[dstmode
][srcmode
])
3840 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3841 /* This is valid, but may not be cheaper than the original. */
3842 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3844 if (oldcost
< newcost
)
3846 trunc_y
= validize_mem (trunc_y
);
3851 /* For CSE's benefit, force the compressed constant pool entry
3852 into a new pseudo. This constant may be used in different modes,
3853 and if not, combine will put things back together for us. */
3854 trunc_y
= force_reg (srcmode
, trunc_y
);
3856 /* If x is a hard register, perform the extension into a pseudo,
3857 so that e.g. stack realignment code is aware of it. */
3859 if (REG_P (x
) && HARD_REGISTER_P (x
))
3860 target
= gen_reg_rtx (dstmode
);
3862 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3863 last_insn
= get_last_insn ();
3866 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3869 return emit_move_insn (x
, target
);
3876 /* Pushing data onto the stack. */
3878 /* Push a block of length SIZE (perhaps variable)
3879 and return an rtx to address the beginning of the block.
3880 The value may be virtual_outgoing_args_rtx.
3882 EXTRA is the number of bytes of padding to push in addition to SIZE.
3883 BELOW nonzero means this padding comes at low addresses;
3884 otherwise, the padding comes at high addresses. */
3887 push_block (rtx size
, poly_int64 extra
, int below
)
3891 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3892 if (CONSTANT_P (size
))
3893 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3894 else if (REG_P (size
) && known_eq (extra
, 0))
3895 anti_adjust_stack (size
);
3898 temp
= copy_to_mode_reg (Pmode
, size
);
3899 if (maybe_ne (extra
, 0))
3900 temp
= expand_binop (Pmode
, add_optab
, temp
,
3901 gen_int_mode (extra
, Pmode
),
3902 temp
, 0, OPTAB_LIB_WIDEN
);
3903 anti_adjust_stack (temp
);
3906 if (STACK_GROWS_DOWNWARD
)
3908 temp
= virtual_outgoing_args_rtx
;
3909 if (maybe_ne (extra
, 0) && below
)
3910 temp
= plus_constant (Pmode
, temp
, extra
);
3914 if (CONST_INT_P (size
))
3915 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3916 -INTVAL (size
) - (below
? 0 : extra
));
3917 else if (maybe_ne (extra
, 0) && !below
)
3918 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3919 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3922 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3923 negate_rtx (Pmode
, size
));
3926 return memory_address (NARROWEST_INT_MODE
, temp
);
3929 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3932 mem_autoinc_base (rtx mem
)
3936 rtx addr
= XEXP (mem
, 0);
3937 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3938 return XEXP (addr
, 0);
3943 /* A utility routine used here, in reload, and in try_split. The insns
3944 after PREV up to and including LAST are known to adjust the stack,
3945 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3946 placing notes as appropriate. PREV may be NULL, indicating the
3947 entire insn sequence prior to LAST should be scanned.
3949 The set of allowed stack pointer modifications is small:
3950 (1) One or more auto-inc style memory references (aka pushes),
3951 (2) One or more addition/subtraction with the SP as destination,
3952 (3) A single move insn with the SP as destination,
3953 (4) A call_pop insn,
3954 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3956 Insns in the sequence that do not modify the SP are ignored,
3957 except for noreturn calls.
3959 The return value is the amount of adjustment that can be trivially
3960 verified, via immediate operand or auto-inc. If the adjustment
3961 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3964 find_args_size_adjust (rtx_insn
*insn
)
3969 pat
= PATTERN (insn
);
3972 /* Look for a call_pop pattern. */
3975 /* We have to allow non-call_pop patterns for the case
3976 of emit_single_push_insn of a TLS address. */
3977 if (GET_CODE (pat
) != PARALLEL
)
3980 /* All call_pop have a stack pointer adjust in the parallel.
3981 The call itself is always first, and the stack adjust is
3982 usually last, so search from the end. */
3983 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3985 set
= XVECEXP (pat
, 0, i
);
3986 if (GET_CODE (set
) != SET
)
3988 dest
= SET_DEST (set
);
3989 if (dest
== stack_pointer_rtx
)
3992 /* We'd better have found the stack pointer adjust. */
3995 /* Fall through to process the extracted SET and DEST
3996 as if it was a standalone insn. */
3998 else if (GET_CODE (pat
) == SET
)
4000 else if ((set
= single_set (insn
)) != NULL
)
4002 else if (GET_CODE (pat
) == PARALLEL
)
4004 /* ??? Some older ports use a parallel with a stack adjust
4005 and a store for a PUSH_ROUNDING pattern, rather than a
4006 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4007 /* ??? See h8300 and m68k, pushqi1. */
4008 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4010 set
= XVECEXP (pat
, 0, i
);
4011 if (GET_CODE (set
) != SET
)
4013 dest
= SET_DEST (set
);
4014 if (dest
== stack_pointer_rtx
)
4017 /* We do not expect an auto-inc of the sp in the parallel. */
4018 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4019 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4020 != stack_pointer_rtx
);
4028 dest
= SET_DEST (set
);
4030 /* Look for direct modifications of the stack pointer. */
4031 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4033 /* Look for a trivial adjustment, otherwise assume nothing. */
4034 /* Note that the SPU restore_stack_block pattern refers to
4035 the stack pointer in V4SImode. Consider that non-trivial. */
4036 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4037 && GET_CODE (SET_SRC (set
)) == PLUS
4038 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4039 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4040 return INTVAL (XEXP (SET_SRC (set
), 1));
4041 /* ??? Reload can generate no-op moves, which will be cleaned
4042 up later. Recognize it and continue searching. */
4043 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4046 return HOST_WIDE_INT_MIN
;
4052 /* Otherwise only think about autoinc patterns. */
4053 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4056 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4057 != stack_pointer_rtx
);
4059 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4060 mem
= SET_SRC (set
);
4064 addr
= XEXP (mem
, 0);
4065 switch (GET_CODE (addr
))
4069 return GET_MODE_SIZE (GET_MODE (mem
));
4072 return -GET_MODE_SIZE (GET_MODE (mem
));
4075 addr
= XEXP (addr
, 1);
4076 gcc_assert (GET_CODE (addr
) == PLUS
);
4077 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4078 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4079 return INTVAL (XEXP (addr
, 1));
4087 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4088 poly_int64 end_args_size
)
4090 poly_int64 args_size
= end_args_size
;
4091 bool saw_unknown
= false;
4094 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4096 if (!NONDEBUG_INSN_P (insn
))
4099 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4100 a call argument containing a TLS address that itself requires
4101 a call to __tls_get_addr. The handling of stack_pointer_delta
4102 in emit_single_push_insn is supposed to ensure that any such
4103 notes are already correct. */
4104 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4105 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4107 poly_int64 this_delta
= find_args_size_adjust (insn
);
4108 if (known_eq (this_delta
, 0))
4111 || ACCUMULATE_OUTGOING_ARGS
4112 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4116 gcc_assert (!saw_unknown
);
4117 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4121 add_args_size_note (insn
, args_size
);
4122 if (STACK_GROWS_DOWNWARD
)
4123 this_delta
= -poly_uint64 (this_delta
);
4126 args_size
= HOST_WIDE_INT_MIN
;
4128 args_size
-= this_delta
;
4134 #ifdef PUSH_ROUNDING
4135 /* Emit single push insn. */
4138 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4141 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4143 enum insn_code icode
;
4145 /* If there is push pattern, use it. Otherwise try old way of throwing
4146 MEM representing push operation to move expander. */
4147 icode
= optab_handler (push_optab
, mode
);
4148 if (icode
!= CODE_FOR_nothing
)
4150 struct expand_operand ops
[1];
4152 create_input_operand (&ops
[0], x
, mode
);
4153 if (maybe_expand_insn (icode
, 1, ops
))
4156 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4157 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4158 /* If we are to pad downward, adjust the stack pointer first and
4159 then store X into the stack location using an offset. This is
4160 because emit_move_insn does not know how to pad; it does not have
4162 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4164 emit_move_insn (stack_pointer_rtx
,
4165 expand_binop (Pmode
,
4166 STACK_GROWS_DOWNWARD
? sub_optab
4169 gen_int_mode (rounded_size
, Pmode
),
4170 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4172 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4173 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4174 /* We have already decremented the stack pointer, so get the
4176 offset
+= rounded_size
;
4178 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4179 /* We have already incremented the stack pointer, so get the
4181 offset
-= rounded_size
;
4183 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4187 if (STACK_GROWS_DOWNWARD
)
4188 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4189 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4191 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4192 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4194 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4197 dest
= gen_rtx_MEM (mode
, dest_addr
);
4201 set_mem_attributes (dest
, type
, 1);
4203 if (cfun
->tail_call_marked
)
4204 /* Function incoming arguments may overlap with sibling call
4205 outgoing arguments and we cannot allow reordering of reads
4206 from function arguments with stores to outgoing arguments
4207 of sibling calls. */
4208 set_mem_alias_set (dest
, 0);
4210 emit_move_insn (dest
, x
);
4213 /* Emit and annotate a single push insn. */
4216 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4218 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4219 rtx_insn
*prev
= get_last_insn ();
4222 emit_single_push_insn_1 (mode
, x
, type
);
4224 /* Adjust stack_pointer_delta to describe the situation after the push
4225 we just performed. Note that we must do this after the push rather
4226 than before the push in case calculating X needs pushes and pops of
4227 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4228 for such pushes and pops must not include the effect of the future
4230 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4232 last
= get_last_insn ();
4234 /* Notice the common case where we emitted exactly one insn. */
4235 if (PREV_INSN (last
) == prev
)
4237 add_args_size_note (last
, stack_pointer_delta
);
4241 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4242 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4243 || known_eq (delta
, old_delta
));
4247 /* If reading SIZE bytes from X will end up reading from
4248 Y return the number of bytes that overlap. Return -1
4249 if there is no overlap or -2 if we can't determine
4250 (for example when X and Y have different base registers). */
4253 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4255 rtx tmp
= plus_constant (Pmode
, x
, size
);
4256 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4258 if (!CONST_INT_P (sub
))
4261 HOST_WIDE_INT val
= INTVAL (sub
);
4263 return IN_RANGE (val
, 1, size
) ? val
: -1;
4266 /* Generate code to push X onto the stack, assuming it has mode MODE and
4268 MODE is redundant except when X is a CONST_INT (since they don't
4270 SIZE is an rtx for the size of data to be copied (in bytes),
4271 needed only if X is BLKmode.
4272 Return true if successful. May return false if asked to push a
4273 partial argument during a sibcall optimization (as specified by
4274 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4277 ALIGN (in bits) is maximum alignment we can assume.
4279 If PARTIAL and REG are both nonzero, then copy that many of the first
4280 bytes of X into registers starting with REG, and push the rest of X.
4281 The amount of space pushed is decreased by PARTIAL bytes.
4282 REG must be a hard register in this case.
4283 If REG is zero but PARTIAL is not, take any all others actions for an
4284 argument partially in registers, but do not actually load any
4287 EXTRA is the amount in bytes of extra space to leave next to this arg.
4288 This is ignored if an argument block has already been allocated.
4290 On a machine that lacks real push insns, ARGS_ADDR is the address of
4291 the bottom of the argument block for this call. We use indexing off there
4292 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4293 argument block has not been preallocated.
4295 ARGS_SO_FAR is the size of args previously pushed for this call.
4297 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4298 for arguments passed in registers. If nonzero, it will be the number
4299 of bytes required. */
4302 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4303 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4304 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4305 rtx alignment_pad
, bool sibcall_p
)
4308 pad_direction stack_direction
4309 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4311 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4312 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4313 Default is below for small data on big-endian machines; else above. */
4314 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4316 /* Invert direction if stack is post-decrement.
4318 if (STACK_PUSH_CODE
== POST_DEC
)
4319 if (where_pad
!= PAD_NONE
)
4320 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4324 int nregs
= partial
/ UNITS_PER_WORD
;
4325 rtx
*tmp_regs
= NULL
;
4326 int overlapping
= 0;
4329 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4331 /* Copy a block into the stack, entirely or partially. */
4338 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4339 used
= partial
- offset
;
4341 if (mode
!= BLKmode
)
4343 /* A value is to be stored in an insufficiently aligned
4344 stack slot; copy via a suitably aligned slot if
4346 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4347 if (!MEM_P (xinner
))
4349 temp
= assign_temp (type
, 1, 1);
4350 emit_move_insn (temp
, xinner
);
4357 /* USED is now the # of bytes we need not copy to the stack
4358 because registers will take care of them. */
4361 xinner
= adjust_address (xinner
, BLKmode
, used
);
4363 /* If the partial register-part of the arg counts in its stack size,
4364 skip the part of stack space corresponding to the registers.
4365 Otherwise, start copying to the beginning of the stack space,
4366 by setting SKIP to 0. */
4367 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4369 #ifdef PUSH_ROUNDING
4370 /* Do it with several push insns if that doesn't take lots of insns
4371 and if there is no difficulty with push insns that skip bytes
4372 on the stack for alignment purposes. */
4375 && CONST_INT_P (size
)
4377 && MEM_ALIGN (xinner
) >= align
4378 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4379 /* Here we avoid the case of a structure whose weak alignment
4380 forces many pushes of a small amount of data,
4381 and such small pushes do rounding that causes trouble. */
4382 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4383 || align
>= BIGGEST_ALIGNMENT
4384 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4385 align
/ BITS_PER_UNIT
))
4386 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4388 /* Push padding now if padding above and stack grows down,
4389 or if padding below and stack grows up.
4390 But if space already allocated, this has already been done. */
4391 if (maybe_ne (extra
, 0)
4393 && where_pad
!= PAD_NONE
4394 && where_pad
!= stack_direction
)
4395 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4397 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4400 #endif /* PUSH_ROUNDING */
4404 /* Otherwise make space on the stack and copy the data
4405 to the address of that space. */
4407 /* Deduct words put into registers from the size we must copy. */
4410 if (CONST_INT_P (size
))
4411 size
= GEN_INT (INTVAL (size
) - used
);
4413 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4414 gen_int_mode (used
, GET_MODE (size
)),
4415 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4418 /* Get the address of the stack space.
4419 In this case, we do not deal with EXTRA separately.
4420 A single stack adjust will do. */
4423 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4426 else if (CONST_INT_P (args_so_far
))
4427 temp
= memory_address (BLKmode
,
4428 plus_constant (Pmode
, args_addr
,
4429 skip
+ INTVAL (args_so_far
)));
4431 temp
= memory_address (BLKmode
,
4432 plus_constant (Pmode
,
4433 gen_rtx_PLUS (Pmode
,
4438 if (!ACCUMULATE_OUTGOING_ARGS
)
4440 /* If the source is referenced relative to the stack pointer,
4441 copy it to another register to stabilize it. We do not need
4442 to do this if we know that we won't be changing sp. */
4444 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4445 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4446 temp
= copy_to_reg (temp
);
4449 target
= gen_rtx_MEM (BLKmode
, temp
);
4451 /* We do *not* set_mem_attributes here, because incoming arguments
4452 may overlap with sibling call outgoing arguments and we cannot
4453 allow reordering of reads from function arguments with stores
4454 to outgoing arguments of sibling calls. We do, however, want
4455 to record the alignment of the stack slot. */
4456 /* ALIGN may well be better aligned than TYPE, e.g. due to
4457 PARM_BOUNDARY. Assume the caller isn't lying. */
4458 set_mem_align (target
, align
);
4460 /* If part should go in registers and pushing to that part would
4461 overwrite some of the values that need to go into regs, load the
4462 overlapping values into temporary pseudos to be moved into the hard
4463 regs at the end after the stack pushing has completed.
4464 We cannot load them directly into the hard regs here because
4465 they can be clobbered by the block move expansions.
4468 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4469 && GET_CODE (reg
) != PARALLEL
)
4471 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4472 if (overlapping
> 0)
4474 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4475 overlapping
/= UNITS_PER_WORD
;
4477 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4479 for (int i
= 0; i
< overlapping
; i
++)
4480 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4482 for (int i
= 0; i
< overlapping
; i
++)
4483 emit_move_insn (tmp_regs
[i
],
4484 operand_subword_force (target
, i
, mode
));
4486 else if (overlapping
== -1)
4488 /* Could not determine whether there is overlap.
4489 Fail the sibcall. */
4497 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4500 else if (partial
> 0)
4502 /* Scalar partly in registers. This case is only supported
4503 for fixed-wdth modes. */
4504 int size
= GET_MODE_SIZE (mode
).to_constant ();
4505 size
/= UNITS_PER_WORD
;
4508 /* # bytes of start of argument
4509 that we must make space for but need not store. */
4510 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4511 int args_offset
= INTVAL (args_so_far
);
4514 /* Push padding now if padding above and stack grows down,
4515 or if padding below and stack grows up.
4516 But if space already allocated, this has already been done. */
4517 if (maybe_ne (extra
, 0)
4519 && where_pad
!= PAD_NONE
4520 && where_pad
!= stack_direction
)
4521 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4523 /* If we make space by pushing it, we might as well push
4524 the real data. Otherwise, we can leave OFFSET nonzero
4525 and leave the space uninitialized. */
4529 /* Now NOT_STACK gets the number of words that we don't need to
4530 allocate on the stack. Convert OFFSET to words too. */
4531 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4532 offset
/= UNITS_PER_WORD
;
4534 /* If the partial register-part of the arg counts in its stack size,
4535 skip the part of stack space corresponding to the registers.
4536 Otherwise, start copying to the beginning of the stack space,
4537 by setting SKIP to 0. */
4538 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4540 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4541 x
= validize_mem (force_const_mem (mode
, x
));
4543 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4544 SUBREGs of such registers are not allowed. */
4545 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4546 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4547 x
= copy_to_reg (x
);
4549 /* Loop over all the words allocated on the stack for this arg. */
4550 /* We can do it by words, because any scalar bigger than a word
4551 has a size a multiple of a word. */
4552 for (i
= size
- 1; i
>= not_stack
; i
--)
4553 if (i
>= not_stack
+ offset
)
4554 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4555 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4557 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4559 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4567 /* Push padding now if padding above and stack grows down,
4568 or if padding below and stack grows up.
4569 But if space already allocated, this has already been done. */
4570 if (maybe_ne (extra
, 0)
4572 && where_pad
!= PAD_NONE
4573 && where_pad
!= stack_direction
)
4574 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4576 #ifdef PUSH_ROUNDING
4577 if (args_addr
== 0 && PUSH_ARGS
)
4578 emit_single_push_insn (mode
, x
, type
);
4582 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4583 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4585 /* We do *not* set_mem_attributes here, because incoming arguments
4586 may overlap with sibling call outgoing arguments and we cannot
4587 allow reordering of reads from function arguments with stores
4588 to outgoing arguments of sibling calls. We do, however, want
4589 to record the alignment of the stack slot. */
4590 /* ALIGN may well be better aligned than TYPE, e.g. due to
4591 PARM_BOUNDARY. Assume the caller isn't lying. */
4592 set_mem_align (dest
, align
);
4594 emit_move_insn (dest
, x
);
4598 /* Move the partial arguments into the registers and any overlapping
4599 values that we moved into the pseudos in tmp_regs. */
4600 if (partial
> 0 && reg
!= 0)
4602 /* Handle calls that pass values in multiple non-contiguous locations.
4603 The Irix 6 ABI has examples of this. */
4604 if (GET_CODE (reg
) == PARALLEL
)
4605 emit_group_load (reg
, x
, type
, -1);
4608 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4609 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4611 for (int i
= 0; i
< overlapping
; i
++)
4612 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4613 + nregs
- overlapping
+ i
),
4619 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4620 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4622 if (alignment_pad
&& args_addr
== 0)
4623 anti_adjust_stack (alignment_pad
);
4628 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4632 get_subtarget (rtx x
)
4636 /* Only registers can be subtargets. */
4638 /* Don't use hard regs to avoid extending their life. */
4639 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4643 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4644 FIELD is a bitfield. Returns true if the optimization was successful,
4645 and there's nothing else to do. */
4648 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4649 poly_uint64 pbitpos
,
4650 poly_uint64 pbitregion_start
,
4651 poly_uint64 pbitregion_end
,
4652 machine_mode mode1
, rtx str_rtx
,
4653 tree to
, tree src
, bool reverse
)
4655 /* str_mode is not guaranteed to be a scalar type. */
4656 machine_mode str_mode
= GET_MODE (str_rtx
);
4657 unsigned int str_bitsize
;
4662 enum tree_code code
;
4664 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4665 if (mode1
!= VOIDmode
4666 || !pbitsize
.is_constant (&bitsize
)
4667 || !pbitpos
.is_constant (&bitpos
)
4668 || !pbitregion_start
.is_constant (&bitregion_start
)
4669 || !pbitregion_end
.is_constant (&bitregion_end
)
4670 || bitsize
>= BITS_PER_WORD
4671 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4672 || str_bitsize
> BITS_PER_WORD
4673 || TREE_SIDE_EFFECTS (to
)
4674 || TREE_THIS_VOLATILE (to
))
4678 if (TREE_CODE (src
) != SSA_NAME
)
4680 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4683 srcstmt
= get_gimple_for_ssa_name (src
);
4685 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4688 code
= gimple_assign_rhs_code (srcstmt
);
4690 op0
= gimple_assign_rhs1 (srcstmt
);
4692 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4693 to find its initialization. Hopefully the initialization will
4694 be from a bitfield load. */
4695 if (TREE_CODE (op0
) == SSA_NAME
)
4697 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4699 /* We want to eventually have OP0 be the same as TO, which
4700 should be a bitfield. */
4702 || !is_gimple_assign (op0stmt
)
4703 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4705 op0
= gimple_assign_rhs1 (op0stmt
);
4708 op1
= gimple_assign_rhs2 (srcstmt
);
4710 if (!operand_equal_p (to
, op0
, 0))
4713 if (MEM_P (str_rtx
))
4715 unsigned HOST_WIDE_INT offset1
;
4717 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4718 str_bitsize
= BITS_PER_WORD
;
4720 scalar_int_mode best_mode
;
4721 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4722 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4724 str_mode
= best_mode
;
4725 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4728 bitpos
%= str_bitsize
;
4729 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4730 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4732 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4735 /* If the bit field covers the whole REG/MEM, store_field
4736 will likely generate better code. */
4737 if (bitsize
>= str_bitsize
)
4740 /* We can't handle fields split across multiple entities. */
4741 if (bitpos
+ bitsize
> str_bitsize
)
4744 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4745 bitpos
= str_bitsize
- bitpos
- bitsize
;
4751 /* For now, just optimize the case of the topmost bitfield
4752 where we don't need to do any masking and also
4753 1 bit bitfields where xor can be used.
4754 We might win by one instruction for the other bitfields
4755 too if insv/extv instructions aren't used, so that
4756 can be added later. */
4757 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4758 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4761 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4762 value
= convert_modes (str_mode
,
4763 TYPE_MODE (TREE_TYPE (op1
)), value
,
4764 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4766 /* We may be accessing data outside the field, which means
4767 we can alias adjacent data. */
4768 if (MEM_P (str_rtx
))
4770 str_rtx
= shallow_copy_rtx (str_rtx
);
4771 set_mem_alias_set (str_rtx
, 0);
4772 set_mem_expr (str_rtx
, 0);
4775 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4777 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4781 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4783 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4785 value
= flip_storage_order (str_mode
, value
);
4786 result
= expand_binop (str_mode
, binop
, str_rtx
,
4787 value
, str_rtx
, 1, OPTAB_WIDEN
);
4788 if (result
!= str_rtx
)
4789 emit_move_insn (str_rtx
, result
);
4794 if (TREE_CODE (op1
) != INTEGER_CST
)
4796 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4797 value
= convert_modes (str_mode
,
4798 TYPE_MODE (TREE_TYPE (op1
)), value
,
4799 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4801 /* We may be accessing data outside the field, which means
4802 we can alias adjacent data. */
4803 if (MEM_P (str_rtx
))
4805 str_rtx
= shallow_copy_rtx (str_rtx
);
4806 set_mem_alias_set (str_rtx
, 0);
4807 set_mem_expr (str_rtx
, 0);
4810 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4811 if (bitpos
+ bitsize
!= str_bitsize
)
4813 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4815 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4817 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4819 value
= flip_storage_order (str_mode
, value
);
4820 result
= expand_binop (str_mode
, binop
, str_rtx
,
4821 value
, str_rtx
, 1, OPTAB_WIDEN
);
4822 if (result
!= str_rtx
)
4823 emit_move_insn (str_rtx
, result
);
4833 /* In the C++ memory model, consecutive bit fields in a structure are
4834 considered one memory location.
4836 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4837 returns the bit range of consecutive bits in which this COMPONENT_REF
4838 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4839 and *OFFSET may be adjusted in the process.
4841 If the access does not need to be restricted, 0 is returned in both
4842 *BITSTART and *BITEND. */
4845 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4846 poly_int64_pod
*bitpos
, tree
*offset
)
4848 poly_int64 bitoffset
;
4851 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4853 field
= TREE_OPERAND (exp
, 1);
4854 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4855 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4856 need to limit the range we can access. */
4859 *bitstart
= *bitend
= 0;
4863 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4864 part of a larger bit field, then the representative does not serve any
4865 useful purpose. This can occur in Ada. */
4866 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4869 poly_int64 rbitsize
, rbitpos
;
4871 int unsignedp
, reversep
, volatilep
= 0;
4872 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4873 &roffset
, &rmode
, &unsignedp
, &reversep
,
4875 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4877 *bitstart
= *bitend
= 0;
4882 /* Compute the adjustment to bitpos from the offset of the field
4883 relative to the representative. DECL_FIELD_OFFSET of field and
4884 repr are the same by construction if they are not constants,
4885 see finish_bitfield_layout. */
4886 poly_uint64 field_offset
, repr_offset
;
4887 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4888 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4889 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4892 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4893 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4895 /* If the adjustment is larger than bitpos, we would have a negative bit
4896 position for the lower bound and this may wreak havoc later. Adjust
4897 offset and bitpos to make the lower bound non-negative in that case. */
4898 if (maybe_gt (bitoffset
, *bitpos
))
4900 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4901 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4903 *bitpos
+= adjust_bits
;
4904 if (*offset
== NULL_TREE
)
4905 *offset
= size_int (-adjust_bytes
);
4907 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4911 *bitstart
= *bitpos
- bitoffset
;
4913 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4916 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4917 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4918 DECL_RTL was not set yet, return NORTL. */
4921 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4923 if (TREE_CODE (addr
) != ADDR_EXPR
)
4926 tree base
= TREE_OPERAND (addr
, 0);
4929 || TREE_ADDRESSABLE (base
)
4930 || DECL_MODE (base
) == BLKmode
)
4933 if (!DECL_RTL_SET_P (base
))
4936 return (!MEM_P (DECL_RTL (base
)));
4939 /* Returns true if the MEM_REF REF refers to an object that does not
4940 reside in memory and has non-BLKmode. */
4943 mem_ref_refers_to_non_mem_p (tree ref
)
4945 tree base
= TREE_OPERAND (ref
, 0);
4946 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4949 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4950 is true, try generating a nontemporal store. */
4953 expand_assignment (tree to
, tree from
, bool nontemporal
)
4959 enum insn_code icode
;
4961 /* Don't crash if the lhs of the assignment was erroneous. */
4962 if (TREE_CODE (to
) == ERROR_MARK
)
4964 expand_normal (from
);
4968 /* Optimize away no-op moves without side-effects. */
4969 if (operand_equal_p (to
, from
, 0))
4972 /* Handle misaligned stores. */
4973 mode
= TYPE_MODE (TREE_TYPE (to
));
4974 if ((TREE_CODE (to
) == MEM_REF
4975 || TREE_CODE (to
) == TARGET_MEM_REF
)
4977 && !mem_ref_refers_to_non_mem_p (to
)
4978 && ((align
= get_object_alignment (to
))
4979 < GET_MODE_ALIGNMENT (mode
))
4980 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4981 != CODE_FOR_nothing
)
4982 || targetm
.slow_unaligned_access (mode
, align
)))
4986 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4987 reg
= force_not_mem (reg
);
4988 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4989 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4990 reg
= flip_storage_order (mode
, reg
);
4992 if (icode
!= CODE_FOR_nothing
)
4994 struct expand_operand ops
[2];
4996 create_fixed_operand (&ops
[0], mem
);
4997 create_input_operand (&ops
[1], reg
, mode
);
4998 /* The movmisalign<mode> pattern cannot fail, else the assignment
4999 would silently be omitted. */
5000 expand_insn (icode
, 2, ops
);
5003 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5008 /* Assignment of a structure component needs special treatment
5009 if the structure component's rtx is not simply a MEM.
5010 Assignment of an array element at a constant index, and assignment of
5011 an array element in an unaligned packed structure field, has the same
5012 problem. Same for (partially) storing into a non-memory object. */
5013 if (handled_component_p (to
)
5014 || (TREE_CODE (to
) == MEM_REF
5015 && (REF_REVERSE_STORAGE_ORDER (to
)
5016 || mem_ref_refers_to_non_mem_p (to
)))
5017 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5020 poly_int64 bitsize
, bitpos
;
5021 poly_uint64 bitregion_start
= 0;
5022 poly_uint64 bitregion_end
= 0;
5024 int unsignedp
, reversep
, volatilep
= 0;
5028 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5029 &unsignedp
, &reversep
, &volatilep
);
5031 /* Make sure bitpos is not negative, it can wreak havoc later. */
5032 if (maybe_lt (bitpos
, 0))
5034 gcc_assert (offset
== NULL_TREE
);
5035 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5036 bitpos
= num_trailing_bits (bitpos
);
5039 if (TREE_CODE (to
) == COMPONENT_REF
5040 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5041 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5042 /* The C++ memory model naturally applies to byte-aligned fields.
5043 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5044 BITSIZE are not byte-aligned, there is no need to limit the range
5045 we can access. This can occur with packed structures in Ada. */
5046 else if (maybe_gt (bitsize
, 0)
5047 && multiple_p (bitsize
, BITS_PER_UNIT
)
5048 && multiple_p (bitpos
, BITS_PER_UNIT
))
5050 bitregion_start
= bitpos
;
5051 bitregion_end
= bitpos
+ bitsize
- 1;
5054 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5056 /* If the field has a mode, we want to access it in the
5057 field's mode, not the computed mode.
5058 If a MEM has VOIDmode (external with incomplete type),
5059 use BLKmode for it instead. */
5062 if (mode1
!= VOIDmode
)
5063 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5064 else if (GET_MODE (to_rtx
) == VOIDmode
)
5065 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5070 machine_mode address_mode
;
5073 if (!MEM_P (to_rtx
))
5075 /* We can get constant negative offsets into arrays with broken
5076 user code. Translate this to a trap instead of ICEing. */
5077 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5078 expand_builtin_trap ();
5079 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5082 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5083 address_mode
= get_address_mode (to_rtx
);
5084 if (GET_MODE (offset_rtx
) != address_mode
)
5086 /* We cannot be sure that the RTL in offset_rtx is valid outside
5087 of a memory address context, so force it into a register
5088 before attempting to convert it to the desired mode. */
5089 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5090 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5093 /* If we have an expression in OFFSET_RTX and a non-zero
5094 byte offset in BITPOS, adding the byte offset before the
5095 OFFSET_RTX results in better intermediate code, which makes
5096 later rtl optimization passes perform better.
5098 We prefer intermediate code like this:
5100 r124:DI=r123:DI+0x18
5105 r124:DI=r123:DI+0x10
5106 [r124:DI+0x8]=r121:DI
5108 This is only done for aligned data values, as these can
5109 be expected to result in single move instructions. */
5111 if (mode1
!= VOIDmode
5112 && maybe_ne (bitpos
, 0)
5113 && maybe_gt (bitsize
, 0)
5114 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5115 && multiple_p (bitpos
, bitsize
)
5116 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5117 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5119 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5120 bitregion_start
= 0;
5121 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5122 bitregion_end
-= bitpos
;
5126 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5127 highest_pow2_factor_for_target (to
,
5131 /* No action is needed if the target is not a memory and the field
5132 lies completely outside that target. This can occur if the source
5133 code contains an out-of-bounds access to a small array. */
5135 && GET_MODE (to_rtx
) != BLKmode
5136 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5138 expand_normal (from
);
5141 /* Handle expand_expr of a complex value returning a CONCAT. */
5142 else if (GET_CODE (to_rtx
) == CONCAT
)
5144 machine_mode to_mode
= GET_MODE (to_rtx
);
5145 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5146 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5147 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5148 if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE (to_rtx
)
5149 && COMPLEX_MODE_P (GET_MODE (to_rtx
))
5150 && known_eq (bitpos
, 0)
5151 && known_eq (bitsize
, mode_bitsize
))
5152 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5153 else if (known_eq (bitsize
, inner_bitsize
)
5154 && (known_eq (bitpos
, 0)
5155 || known_eq (bitpos
, inner_bitsize
)))
5156 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5157 false, nontemporal
, reversep
);
5158 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5159 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5160 bitregion_start
, bitregion_end
,
5161 mode1
, from
, get_alias_set (to
),
5162 nontemporal
, reversep
);
5163 else if (known_ge (bitpos
, inner_bitsize
))
5164 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5165 bitpos
- inner_bitsize
,
5166 bitregion_start
, bitregion_end
,
5167 mode1
, from
, get_alias_set (to
),
5168 nontemporal
, reversep
);
5169 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5171 result
= expand_normal (from
);
5172 if (GET_CODE (result
) == CONCAT
)
5174 to_mode
= GET_MODE_INNER (to_mode
);
5175 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5177 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5180 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5182 if (!from_real
|| !from_imag
)
5183 goto concat_store_slow
;
5184 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5185 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5190 = simplify_gen_subreg (to_mode
, result
,
5191 TYPE_MODE (TREE_TYPE (from
)), 0);
5194 emit_move_insn (XEXP (to_rtx
, 0),
5195 read_complex_part (from_rtx
, false));
5196 emit_move_insn (XEXP (to_rtx
, 1),
5197 read_complex_part (from_rtx
, true));
5201 machine_mode to_mode
5202 = GET_MODE_INNER (GET_MODE (to_rtx
));
5204 = simplify_gen_subreg (to_mode
, result
,
5205 TYPE_MODE (TREE_TYPE (from
)),
5208 = simplify_gen_subreg (to_mode
, result
,
5209 TYPE_MODE (TREE_TYPE (from
)),
5210 GET_MODE_SIZE (to_mode
));
5211 if (!from_real
|| !from_imag
)
5212 goto concat_store_slow
;
5213 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5214 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5221 rtx temp
= assign_stack_temp (to_mode
,
5222 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5223 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5224 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5225 result
= store_field (temp
, bitsize
, bitpos
,
5226 bitregion_start
, bitregion_end
,
5227 mode1
, from
, get_alias_set (to
),
5228 nontemporal
, reversep
);
5229 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5230 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5237 /* If the field is at offset zero, we could have been given the
5238 DECL_RTX of the parent struct. Don't munge it. */
5239 to_rtx
= shallow_copy_rtx (to_rtx
);
5240 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5242 MEM_VOLATILE_P (to_rtx
) = 1;
5245 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5246 bitregion_start
, bitregion_end
,
5247 mode1
, to_rtx
, to
, from
,
5251 result
= store_field (to_rtx
, bitsize
, bitpos
,
5252 bitregion_start
, bitregion_end
,
5253 mode1
, from
, get_alias_set (to
),
5254 nontemporal
, reversep
);
5258 preserve_temp_slots (result
);
5263 /* If the rhs is a function call and its value is not an aggregate,
5264 call the function before we start to compute the lhs.
5265 This is needed for correct code for cases such as
5266 val = setjmp (buf) on machines where reference to val
5267 requires loading up part of an address in a separate insn.
5269 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5270 since it might be a promoted variable where the zero- or sign- extension
5271 needs to be done. Handling this in the normal way is safe because no
5272 computation is done before the call. The same is true for SSA names. */
5273 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5274 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5275 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5277 || TREE_CODE (to
) == PARM_DECL
5278 || TREE_CODE (to
) == RESULT_DECL
)
5279 && REG_P (DECL_RTL (to
)))
5280 || TREE_CODE (to
) == SSA_NAME
))
5286 value
= expand_normal (from
);
5288 /* Split value and bounds to store them separately. */
5289 chkp_split_slot (value
, &value
, &bounds
);
5292 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5294 /* Handle calls that return values in multiple non-contiguous locations.
5295 The Irix 6 ABI has examples of this. */
5296 if (GET_CODE (to_rtx
) == PARALLEL
)
5298 if (GET_CODE (value
) == PARALLEL
)
5299 emit_group_move (to_rtx
, value
);
5301 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5302 int_size_in_bytes (TREE_TYPE (from
)));
5304 else if (GET_CODE (value
) == PARALLEL
)
5305 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5306 int_size_in_bytes (TREE_TYPE (from
)));
5307 else if (GET_MODE (to_rtx
) == BLKmode
)
5309 /* Handle calls that return BLKmode values in registers. */
5311 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5313 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5317 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5318 value
= convert_memory_address_addr_space
5319 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5320 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5322 emit_move_insn (to_rtx
, value
);
5325 /* Store bounds if required. */
5327 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5329 gcc_assert (MEM_P (to_rtx
));
5330 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5333 preserve_temp_slots (to_rtx
);
5338 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5339 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5341 /* Don't move directly into a return register. */
5342 if (TREE_CODE (to
) == RESULT_DECL
5343 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5349 /* If the source is itself a return value, it still is in a pseudo at
5350 this point so we can move it back to the return register directly. */
5352 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5353 && TREE_CODE (from
) != CALL_EXPR
)
5354 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5356 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5358 /* Handle calls that return values in multiple non-contiguous locations.
5359 The Irix 6 ABI has examples of this. */
5360 if (GET_CODE (to_rtx
) == PARALLEL
)
5362 if (GET_CODE (temp
) == PARALLEL
)
5363 emit_group_move (to_rtx
, temp
);
5365 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5366 int_size_in_bytes (TREE_TYPE (from
)));
5369 emit_move_insn (to_rtx
, temp
);
5371 preserve_temp_slots (to_rtx
);
5376 /* In case we are returning the contents of an object which overlaps
5377 the place the value is being stored, use a safe function when copying
5378 a value through a pointer into a structure value return block. */
5379 if (TREE_CODE (to
) == RESULT_DECL
5380 && TREE_CODE (from
) == INDIRECT_REF
5381 && ADDR_SPACE_GENERIC_P
5382 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5383 && refs_may_alias_p (to
, from
)
5384 && cfun
->returns_struct
5385 && !cfun
->returns_pcc_struct
)
5390 size
= expr_size (from
);
5391 from_rtx
= expand_normal (from
);
5393 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5395 preserve_temp_slots (to_rtx
);
5400 /* Compute FROM and store the value in the rtx we got. */
5403 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5404 preserve_temp_slots (result
);
5409 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5410 succeeded, false otherwise. */
5413 emit_storent_insn (rtx to
, rtx from
)
5415 struct expand_operand ops
[2];
5416 machine_mode mode
= GET_MODE (to
);
5417 enum insn_code code
= optab_handler (storent_optab
, mode
);
5419 if (code
== CODE_FOR_nothing
)
5422 create_fixed_operand (&ops
[0], to
);
5423 create_input_operand (&ops
[1], from
, mode
);
5424 return maybe_expand_insn (code
, 2, ops
);
5427 /* Generate code for computing expression EXP,
5428 and storing the value into TARGET.
5430 If the mode is BLKmode then we may return TARGET itself.
5431 It turns out that in BLKmode it doesn't cause a problem.
5432 because C has no operators that could combine two different
5433 assignments into the same BLKmode object with different values
5434 with no sequence point. Will other languages need this to
5437 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5438 stack, and block moves may need to be treated specially.
5440 If NONTEMPORAL is true, try using a nontemporal store instruction.
5442 If REVERSE is true, the store is to be done in reverse order.
5444 If BTARGET is not NULL then computed bounds of EXP are
5445 associated with BTARGET. */
5448 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5449 bool nontemporal
, bool reverse
, tree btarget
)
5452 rtx alt_rtl
= NULL_RTX
;
5453 location_t loc
= curr_insn_location ();
5455 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5457 /* C++ can generate ?: expressions with a throw expression in one
5458 branch and an rvalue in the other. Here, we resolve attempts to
5459 store the throw expression's nonexistent result. */
5460 gcc_assert (!call_param_p
);
5461 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5464 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5466 /* Perform first part of compound expression, then assign from second
5468 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5469 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5470 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5471 call_param_p
, nontemporal
, reverse
,
5474 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5476 /* For conditional expression, get safe form of the target. Then
5477 test the condition, doing the appropriate assignment on either
5478 side. This avoids the creation of unnecessary temporaries.
5479 For non-BLKmode, it is more efficient not to do this. */
5481 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5483 do_pending_stack_adjust ();
5485 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5486 profile_probability::uninitialized ());
5487 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5488 nontemporal
, reverse
, btarget
);
5489 emit_jump_insn (targetm
.gen_jump (lab2
));
5492 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5493 nontemporal
, reverse
, btarget
);
5499 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5500 /* If this is a scalar in a register that is stored in a wider mode
5501 than the declared mode, compute the result into its declared mode
5502 and then convert to the wider mode. Our value is the computed
5505 rtx inner_target
= 0;
5506 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5507 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5509 /* We can do the conversion inside EXP, which will often result
5510 in some optimizations. Do the conversion in two steps: first
5511 change the signedness, if needed, then the extend. But don't
5512 do this if the type of EXP is a subtype of something else
5513 since then the conversion might involve more than just
5514 converting modes. */
5515 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5516 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5517 && GET_MODE_PRECISION (outer_mode
)
5518 == TYPE_PRECISION (TREE_TYPE (exp
)))
5520 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5521 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5523 /* Some types, e.g. Fortran's logical*4, won't have a signed
5524 version, so use the mode instead. */
5526 = (signed_or_unsigned_type_for
5527 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5529 ntype
= lang_hooks
.types
.type_for_mode
5530 (TYPE_MODE (TREE_TYPE (exp
)),
5531 SUBREG_PROMOTED_SIGN (target
));
5533 exp
= fold_convert_loc (loc
, ntype
, exp
);
5536 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5537 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5540 inner_target
= SUBREG_REG (target
);
5543 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5544 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5546 /* Handle bounds returned by call. */
5547 if (TREE_CODE (exp
) == CALL_EXPR
)
5550 chkp_split_slot (temp
, &temp
, &bounds
);
5551 if (bounds
&& btarget
)
5553 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5554 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5555 chkp_set_rtl_bounds (btarget
, tmp
);
5559 /* If TEMP is a VOIDmode constant, use convert_modes to make
5560 sure that we properly convert it. */
5561 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5563 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5564 temp
, SUBREG_PROMOTED_SIGN (target
));
5565 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5566 SUBREG_PROMOTED_SIGN (target
));
5569 convert_move (SUBREG_REG (target
), temp
,
5570 SUBREG_PROMOTED_SIGN (target
));
5574 else if ((TREE_CODE (exp
) == STRING_CST
5575 || (TREE_CODE (exp
) == MEM_REF
5576 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5577 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5579 && integer_zerop (TREE_OPERAND (exp
, 1))))
5580 && !nontemporal
&& !call_param_p
5583 /* Optimize initialization of an array with a STRING_CST. */
5584 HOST_WIDE_INT exp_len
, str_copy_len
;
5586 tree str
= TREE_CODE (exp
) == STRING_CST
5587 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5589 exp_len
= int_expr_size (exp
);
5593 if (TREE_STRING_LENGTH (str
) <= 0)
5596 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5597 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5600 str_copy_len
= TREE_STRING_LENGTH (str
);
5601 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5602 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5604 str_copy_len
+= STORE_MAX_PIECES
- 1;
5605 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5607 str_copy_len
= MIN (str_copy_len
, exp_len
);
5608 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5609 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5610 MEM_ALIGN (target
), false))
5615 dest_mem
= store_by_pieces (dest_mem
,
5616 str_copy_len
, builtin_strncpy_read_str
,
5618 TREE_STRING_POINTER (str
)),
5619 MEM_ALIGN (target
), false,
5620 exp_len
> str_copy_len
? 1 : 0);
5621 if (exp_len
> str_copy_len
)
5622 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5623 GEN_INT (exp_len
- str_copy_len
),
5632 /* If we want to use a nontemporal or a reverse order store, force the
5633 value into a register first. */
5634 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5635 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5637 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5640 /* Handle bounds returned by call. */
5641 if (TREE_CODE (exp
) == CALL_EXPR
)
5644 chkp_split_slot (temp
, &temp
, &bounds
);
5645 if (bounds
&& btarget
)
5647 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5648 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5649 chkp_set_rtl_bounds (btarget
, tmp
);
5654 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5655 the same as that of TARGET, adjust the constant. This is needed, for
5656 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5657 only a word-sized value. */
5658 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5659 && TREE_CODE (exp
) != ERROR_MARK
5660 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5662 if (GET_MODE_CLASS (GET_MODE (target
))
5663 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5664 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5665 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5667 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5668 TYPE_MODE (TREE_TYPE (exp
)), 0);
5672 if (GET_MODE (temp
) == VOIDmode
)
5673 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5674 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5677 /* If value was not generated in the target, store it there.
5678 Convert the value to TARGET's type first if necessary and emit the
5679 pending incrementations that have been queued when expanding EXP.
5680 Note that we cannot emit the whole queue blindly because this will
5681 effectively disable the POST_INC optimization later.
5683 If TEMP and TARGET compare equal according to rtx_equal_p, but
5684 one or both of them are volatile memory refs, we have to distinguish
5686 - expand_expr has used TARGET. In this case, we must not generate
5687 another copy. This can be detected by TARGET being equal according
5689 - expand_expr has not used TARGET - that means that the source just
5690 happens to have the same RTX form. Since temp will have been created
5691 by expand_expr, it will compare unequal according to == .
5692 We must generate a copy in this case, to reach the correct number
5693 of volatile memory references. */
5695 if ((! rtx_equal_p (temp
, target
)
5696 || (temp
!= target
&& (side_effects_p (temp
)
5697 || side_effects_p (target
))))
5698 && TREE_CODE (exp
) != ERROR_MARK
5699 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5700 but TARGET is not valid memory reference, TEMP will differ
5701 from TARGET although it is really the same location. */
5703 && rtx_equal_p (alt_rtl
, target
)
5704 && !side_effects_p (alt_rtl
)
5705 && !side_effects_p (target
))
5706 /* If there's nothing to copy, don't bother. Don't call
5707 expr_size unless necessary, because some front-ends (C++)
5708 expr_size-hook must not be given objects that are not
5709 supposed to be bit-copied or bit-initialized. */
5710 && expr_size (exp
) != const0_rtx
)
5712 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5714 if (GET_MODE (target
) == BLKmode
)
5716 /* Handle calls that return BLKmode values in registers. */
5717 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5718 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5720 store_bit_field (target
,
5721 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5722 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5725 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5728 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5730 /* Handle copying a string constant into an array. The string
5731 constant may be shorter than the array. So copy just the string's
5732 actual length, and clear the rest. First get the size of the data
5733 type of the string, which is actually the size of the target. */
5734 rtx size
= expr_size (exp
);
5736 if (CONST_INT_P (size
)
5737 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5738 emit_block_move (target
, temp
, size
,
5740 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5743 machine_mode pointer_mode
5744 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5745 machine_mode address_mode
= get_address_mode (target
);
5747 /* Compute the size of the data to copy from the string. */
5749 = size_binop_loc (loc
, MIN_EXPR
,
5750 make_tree (sizetype
, size
),
5751 size_int (TREE_STRING_LENGTH (exp
)));
5753 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5755 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5756 rtx_code_label
*label
= 0;
5758 /* Copy that much. */
5759 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5760 TYPE_UNSIGNED (sizetype
));
5761 emit_block_move (target
, temp
, copy_size_rtx
,
5763 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5765 /* Figure out how much is left in TARGET that we have to clear.
5766 Do all calculations in pointer_mode. */
5767 if (CONST_INT_P (copy_size_rtx
))
5769 size
= plus_constant (address_mode
, size
,
5770 -INTVAL (copy_size_rtx
));
5771 target
= adjust_address (target
, BLKmode
,
5772 INTVAL (copy_size_rtx
));
5776 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5777 copy_size_rtx
, NULL_RTX
, 0,
5780 if (GET_MODE (copy_size_rtx
) != address_mode
)
5781 copy_size_rtx
= convert_to_mode (address_mode
,
5783 TYPE_UNSIGNED (sizetype
));
5785 target
= offset_address (target
, copy_size_rtx
,
5786 highest_pow2_factor (copy_size
));
5787 label
= gen_label_rtx ();
5788 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5789 GET_MODE (size
), 0, label
);
5792 if (size
!= const0_rtx
)
5793 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5799 /* Handle calls that return values in multiple non-contiguous locations.
5800 The Irix 6 ABI has examples of this. */
5801 else if (GET_CODE (target
) == PARALLEL
)
5803 if (GET_CODE (temp
) == PARALLEL
)
5804 emit_group_move (target
, temp
);
5806 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5807 int_size_in_bytes (TREE_TYPE (exp
)));
5809 else if (GET_CODE (temp
) == PARALLEL
)
5810 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5811 int_size_in_bytes (TREE_TYPE (exp
)));
5812 else if (GET_MODE (temp
) == BLKmode
)
5813 emit_block_move (target
, temp
, expr_size (exp
),
5815 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5816 /* If we emit a nontemporal store, there is nothing else to do. */
5817 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5822 temp
= flip_storage_order (GET_MODE (target
), temp
);
5823 temp
= force_operand (temp
, target
);
5825 emit_move_insn (target
, temp
);
5832 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5834 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5837 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5841 /* Return true if field F of structure TYPE is a flexible array. */
5844 flexible_array_member_p (const_tree f
, const_tree type
)
5849 return (DECL_CHAIN (f
) == NULL
5850 && TREE_CODE (tf
) == ARRAY_TYPE
5852 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5853 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5854 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5855 && int_size_in_bytes (type
) >= 0);
5858 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5859 must have in order for it to completely initialize a value of type TYPE.
5860 Return -1 if the number isn't known.
5862 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5864 static HOST_WIDE_INT
5865 count_type_elements (const_tree type
, bool for_ctor_p
)
5867 switch (TREE_CODE (type
))
5873 nelts
= array_type_nelts (type
);
5874 if (nelts
&& tree_fits_uhwi_p (nelts
))
5876 unsigned HOST_WIDE_INT n
;
5878 n
= tree_to_uhwi (nelts
) + 1;
5879 if (n
== 0 || for_ctor_p
)
5882 return n
* count_type_elements (TREE_TYPE (type
), false);
5884 return for_ctor_p
? -1 : 1;
5889 unsigned HOST_WIDE_INT n
;
5893 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5894 if (TREE_CODE (f
) == FIELD_DECL
)
5897 n
+= count_type_elements (TREE_TYPE (f
), false);
5898 else if (!flexible_array_member_p (f
, type
))
5899 /* Don't count flexible arrays, which are not supposed
5900 to be initialized. */
5908 case QUAL_UNION_TYPE
:
5913 gcc_assert (!for_ctor_p
);
5914 /* Estimate the number of scalars in each field and pick the
5915 maximum. Other estimates would do instead; the idea is simply
5916 to make sure that the estimate is not sensitive to the ordering
5919 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5920 if (TREE_CODE (f
) == FIELD_DECL
)
5922 m
= count_type_elements (TREE_TYPE (f
), false);
5923 /* If the field doesn't span the whole union, add an extra
5924 scalar for the rest. */
5925 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5926 TYPE_SIZE (type
)) != 1)
5939 unsigned HOST_WIDE_INT nelts
;
5940 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5948 case FIXED_POINT_TYPE
:
5953 case REFERENCE_TYPE
:
5969 /* Helper for categorize_ctor_elements. Identical interface. */
5972 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5973 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5975 unsigned HOST_WIDE_INT idx
;
5976 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5977 tree value
, purpose
, elt_type
;
5979 /* Whether CTOR is a valid constant initializer, in accordance with what
5980 initializer_constant_valid_p does. If inferred from the constructor
5981 elements, true until proven otherwise. */
5982 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5983 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5988 elt_type
= NULL_TREE
;
5990 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5992 HOST_WIDE_INT mult
= 1;
5994 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5996 tree lo_index
= TREE_OPERAND (purpose
, 0);
5997 tree hi_index
= TREE_OPERAND (purpose
, 1);
5999 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6000 mult
= (tree_to_uhwi (hi_index
)
6001 - tree_to_uhwi (lo_index
) + 1);
6004 elt_type
= TREE_TYPE (value
);
6006 switch (TREE_CODE (value
))
6010 HOST_WIDE_INT nz
= 0, ic
= 0;
6012 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
6015 nz_elts
+= mult
* nz
;
6016 init_elts
+= mult
* ic
;
6018 if (const_from_elts_p
&& const_p
)
6019 const_p
= const_elt_p
;
6026 if (!initializer_zerop (value
))
6032 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6033 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6037 if (!initializer_zerop (TREE_REALPART (value
)))
6039 if (!initializer_zerop (TREE_IMAGPART (value
)))
6046 /* We can only construct constant-length vectors using
6048 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6049 for (unsigned int i
= 0; i
< nunits
; ++i
)
6051 tree v
= VECTOR_CST_ELT (value
, i
);
6052 if (!initializer_zerop (v
))
6061 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6062 nz_elts
+= mult
* tc
;
6063 init_elts
+= mult
* tc
;
6065 if (const_from_elts_p
&& const_p
)
6067 = initializer_constant_valid_p (value
,
6069 TYPE_REVERSE_STORAGE_ORDER
6077 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6078 num_fields
, elt_type
))
6079 *p_complete
= false;
6081 *p_nz_elts
+= nz_elts
;
6082 *p_init_elts
+= init_elts
;
6087 /* Examine CTOR to discover:
6088 * how many scalar fields are set to nonzero values,
6089 and place it in *P_NZ_ELTS;
6090 * how many scalar fields in total are in CTOR,
6091 and place it in *P_ELT_COUNT.
6092 * whether the constructor is complete -- in the sense that every
6093 meaningful byte is explicitly given a value --
6094 and place it in *P_COMPLETE.
6096 Return whether or not CTOR is a valid static constant initializer, the same
6097 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6100 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6101 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6107 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6110 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6111 of which had type LAST_TYPE. Each element was itself a complete
6112 initializer, in the sense that every meaningful byte was explicitly
6113 given a value. Return true if the same is true for the constructor
6117 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6118 const_tree last_type
)
6120 if (TREE_CODE (type
) == UNION_TYPE
6121 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6126 gcc_assert (num_elts
== 1 && last_type
);
6128 /* ??? We could look at each element of the union, and find the
6129 largest element. Which would avoid comparing the size of the
6130 initialized element against any tail padding in the union.
6131 Doesn't seem worth the effort... */
6132 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6135 return count_type_elements (type
, true) == num_elts
;
6138 /* Return 1 if EXP contains mostly (3/4) zeros. */
6141 mostly_zeros_p (const_tree exp
)
6143 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6145 HOST_WIDE_INT nz_elts
, init_elts
;
6148 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6149 return !complete_p
|| nz_elts
< init_elts
/ 4;
6152 return initializer_zerop (exp
);
6155 /* Return 1 if EXP contains all zeros. */
6158 all_zeros_p (const_tree exp
)
6160 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6162 HOST_WIDE_INT nz_elts
, init_elts
;
6165 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6166 return nz_elts
== 0;
6169 return initializer_zerop (exp
);
6172 /* Helper function for store_constructor.
6173 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6174 CLEARED is as for store_constructor.
6175 ALIAS_SET is the alias set to use for any stores.
6176 If REVERSE is true, the store is to be done in reverse order.
6178 This provides a recursive shortcut back to store_constructor when it isn't
6179 necessary to go through store_field. This is so that we can pass through
6180 the cleared field to let store_constructor know that we may not have to
6181 clear a substructure if the outer structure has already been cleared. */
6184 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6185 poly_uint64 bitregion_start
,
6186 poly_uint64 bitregion_end
,
6188 tree exp
, int cleared
,
6189 alias_set_type alias_set
, bool reverse
)
6192 poly_uint64 bytesize
;
6193 if (TREE_CODE (exp
) == CONSTRUCTOR
6194 /* We can only call store_constructor recursively if the size and
6195 bit position are on a byte boundary. */
6196 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6197 && maybe_ne (bitsize
, 0U)
6198 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6199 /* If we have a nonzero bitpos for a register target, then we just
6200 let store_field do the bitfield handling. This is unlikely to
6201 generate unnecessary clear instructions anyways. */
6202 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6206 machine_mode target_mode
= GET_MODE (target
);
6207 if (target_mode
!= BLKmode
6208 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6209 target_mode
= BLKmode
;
6210 target
= adjust_address (target
, target_mode
, bytepos
);
6214 /* Update the alias set, if required. */
6215 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6216 && MEM_ALIAS_SET (target
) != 0)
6218 target
= copy_rtx (target
);
6219 set_mem_alias_set (target
, alias_set
);
6222 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6225 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6226 exp
, alias_set
, false, reverse
);
6230 /* Returns the number of FIELD_DECLs in TYPE. */
6233 fields_length (const_tree type
)
6235 tree t
= TYPE_FIELDS (type
);
6238 for (; t
; t
= DECL_CHAIN (t
))
6239 if (TREE_CODE (t
) == FIELD_DECL
)
6246 /* Store the value of constructor EXP into the rtx TARGET.
6247 TARGET is either a REG or a MEM; we know it cannot conflict, since
6248 safe_from_p has been called.
6249 CLEARED is true if TARGET is known to have been zero'd.
6250 SIZE is the number of bytes of TARGET we are allowed to modify: this
6251 may not be the same as the size of EXP if we are assigning to a field
6252 which has been packed to exclude padding bits.
6253 If REVERSE is true, the store is to be done in reverse order. */
6256 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6259 tree type
= TREE_TYPE (exp
);
6260 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6261 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6263 switch (TREE_CODE (type
))
6267 case QUAL_UNION_TYPE
:
6269 unsigned HOST_WIDE_INT idx
;
6272 /* The storage order is specified for every aggregate type. */
6273 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6275 /* If size is zero or the target is already cleared, do nothing. */
6276 if (known_eq (size
, 0) || cleared
)
6278 /* We either clear the aggregate or indicate the value is dead. */
6279 else if ((TREE_CODE (type
) == UNION_TYPE
6280 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6281 && ! CONSTRUCTOR_ELTS (exp
))
6282 /* If the constructor is empty, clear the union. */
6284 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6288 /* If we are building a static constructor into a register,
6289 set the initial value as zero so we can fold the value into
6290 a constant. But if more than one register is involved,
6291 this probably loses. */
6292 else if (REG_P (target
) && TREE_STATIC (exp
)
6293 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6294 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6296 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6300 /* If the constructor has fewer fields than the structure or
6301 if we are initializing the structure to mostly zeros, clear
6302 the whole structure first. Don't do this if TARGET is a
6303 register whose mode size isn't equal to SIZE since
6304 clear_storage can't handle this case. */
6305 else if (known_size_p (size
)
6306 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6307 || mostly_zeros_p (exp
))
6309 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6311 clear_storage (target
, gen_int_mode (size
, Pmode
),
6316 if (REG_P (target
) && !cleared
)
6317 emit_clobber (target
);
6319 /* Store each element of the constructor into the
6320 corresponding field of TARGET. */
6321 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6324 HOST_WIDE_INT bitsize
;
6325 HOST_WIDE_INT bitpos
= 0;
6327 rtx to_rtx
= target
;
6329 /* Just ignore missing fields. We cleared the whole
6330 structure, above, if any fields are missing. */
6334 if (cleared
&& initializer_zerop (value
))
6337 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6338 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6342 mode
= DECL_MODE (field
);
6343 if (DECL_BIT_FIELD (field
))
6346 offset
= DECL_FIELD_OFFSET (field
);
6347 if (tree_fits_shwi_p (offset
)
6348 && tree_fits_shwi_p (bit_position (field
)))
6350 bitpos
= int_bit_position (field
);
6356 /* If this initializes a field that is smaller than a
6357 word, at the start of a word, try to widen it to a full
6358 word. This special case allows us to output C++ member
6359 function initializations in a form that the optimizers
6361 if (WORD_REGISTER_OPERATIONS
6363 && bitsize
< BITS_PER_WORD
6364 && bitpos
% BITS_PER_WORD
== 0
6365 && GET_MODE_CLASS (mode
) == MODE_INT
6366 && TREE_CODE (value
) == INTEGER_CST
6368 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6370 tree type
= TREE_TYPE (value
);
6372 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6374 type
= lang_hooks
.types
.type_for_mode
6375 (word_mode
, TYPE_UNSIGNED (type
));
6376 value
= fold_convert (type
, value
);
6377 /* Make sure the bits beyond the original bitsize are zero
6378 so that we can correctly avoid extra zeroing stores in
6379 later constructor elements. */
6381 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6383 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6386 if (BYTES_BIG_ENDIAN
)
6388 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6389 build_int_cst (type
,
6390 BITS_PER_WORD
- bitsize
));
6391 bitsize
= BITS_PER_WORD
;
6395 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6396 && DECL_NONADDRESSABLE_P (field
))
6398 to_rtx
= copy_rtx (to_rtx
);
6399 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6402 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6403 0, bitregion_end
, mode
,
6405 get_alias_set (TREE_TYPE (field
)),
6413 unsigned HOST_WIDE_INT i
;
6416 tree elttype
= TREE_TYPE (type
);
6418 HOST_WIDE_INT minelt
= 0;
6419 HOST_WIDE_INT maxelt
= 0;
6421 /* The storage order is specified for every aggregate type. */
6422 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6424 domain
= TYPE_DOMAIN (type
);
6425 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6426 && TYPE_MAX_VALUE (domain
)
6427 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6428 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6430 /* If we have constant bounds for the range of the type, get them. */
6433 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6434 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6437 /* If the constructor has fewer elements than the array, clear
6438 the whole array first. Similarly if this is static
6439 constructor of a non-BLKmode object. */
6442 else if (REG_P (target
) && TREE_STATIC (exp
))
6446 unsigned HOST_WIDE_INT idx
;
6448 HOST_WIDE_INT count
= 0, zero_count
= 0;
6449 need_to_clear
= ! const_bounds_p
;
6451 /* This loop is a more accurate version of the loop in
6452 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6453 is also needed to check for missing elements. */
6454 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6456 HOST_WIDE_INT this_node_count
;
6461 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6463 tree lo_index
= TREE_OPERAND (index
, 0);
6464 tree hi_index
= TREE_OPERAND (index
, 1);
6466 if (! tree_fits_uhwi_p (lo_index
)
6467 || ! tree_fits_uhwi_p (hi_index
))
6473 this_node_count
= (tree_to_uhwi (hi_index
)
6474 - tree_to_uhwi (lo_index
) + 1);
6477 this_node_count
= 1;
6479 count
+= this_node_count
;
6480 if (mostly_zeros_p (value
))
6481 zero_count
+= this_node_count
;
6484 /* Clear the entire array first if there are any missing
6485 elements, or if the incidence of zero elements is >=
6488 && (count
< maxelt
- minelt
+ 1
6489 || 4 * zero_count
>= 3 * count
))
6493 if (need_to_clear
&& maybe_gt (size
, 0))
6496 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6498 clear_storage (target
, gen_int_mode (size
, Pmode
),
6503 if (!cleared
&& REG_P (target
))
6504 /* Inform later passes that the old value is dead. */
6505 emit_clobber (target
);
6507 /* Store each element of the constructor into the
6508 corresponding element of TARGET, determined by counting the
6510 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6514 HOST_WIDE_INT bitpos
;
6515 rtx xtarget
= target
;
6517 if (cleared
&& initializer_zerop (value
))
6520 mode
= TYPE_MODE (elttype
);
6521 if (mode
== BLKmode
)
6522 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6523 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6526 bitsize
= GET_MODE_BITSIZE (mode
);
6528 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6530 tree lo_index
= TREE_OPERAND (index
, 0);
6531 tree hi_index
= TREE_OPERAND (index
, 1);
6532 rtx index_r
, pos_rtx
;
6533 HOST_WIDE_INT lo
, hi
, count
;
6536 /* If the range is constant and "small", unroll the loop. */
6538 && tree_fits_shwi_p (lo_index
)
6539 && tree_fits_shwi_p (hi_index
)
6540 && (lo
= tree_to_shwi (lo_index
),
6541 hi
= tree_to_shwi (hi_index
),
6542 count
= hi
- lo
+ 1,
6545 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6546 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6549 lo
-= minelt
; hi
-= minelt
;
6550 for (; lo
<= hi
; lo
++)
6552 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6555 && !MEM_KEEP_ALIAS_SET_P (target
)
6556 && TREE_CODE (type
) == ARRAY_TYPE
6557 && TYPE_NONALIASED_COMPONENT (type
))
6559 target
= copy_rtx (target
);
6560 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6563 store_constructor_field
6564 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6565 mode
, value
, cleared
,
6566 get_alias_set (elttype
), reverse
);
6571 rtx_code_label
*loop_start
= gen_label_rtx ();
6572 rtx_code_label
*loop_end
= gen_label_rtx ();
6575 expand_normal (hi_index
);
6577 index
= build_decl (EXPR_LOCATION (exp
),
6578 VAR_DECL
, NULL_TREE
, domain
);
6579 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6580 SET_DECL_RTL (index
, index_r
);
6581 store_expr (lo_index
, index_r
, 0, false, reverse
);
6583 /* Build the head of the loop. */
6584 do_pending_stack_adjust ();
6585 emit_label (loop_start
);
6587 /* Assign value to element index. */
6589 fold_convert (ssizetype
,
6590 fold_build2 (MINUS_EXPR
,
6593 TYPE_MIN_VALUE (domain
)));
6596 size_binop (MULT_EXPR
, position
,
6597 fold_convert (ssizetype
,
6598 TYPE_SIZE_UNIT (elttype
)));
6600 pos_rtx
= expand_normal (position
);
6601 xtarget
= offset_address (target
, pos_rtx
,
6602 highest_pow2_factor (position
));
6603 xtarget
= adjust_address (xtarget
, mode
, 0);
6604 if (TREE_CODE (value
) == CONSTRUCTOR
)
6605 store_constructor (value
, xtarget
, cleared
,
6606 exact_div (bitsize
, BITS_PER_UNIT
),
6609 store_expr (value
, xtarget
, 0, false, reverse
);
6611 /* Generate a conditional jump to exit the loop. */
6612 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6614 jumpif (exit_cond
, loop_end
,
6615 profile_probability::uninitialized ());
6617 /* Update the loop counter, and jump to the head of
6619 expand_assignment (index
,
6620 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6621 index
, integer_one_node
),
6624 emit_jump (loop_start
);
6626 /* Build the end of the loop. */
6627 emit_label (loop_end
);
6630 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6631 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6636 index
= ssize_int (1);
6639 index
= fold_convert (ssizetype
,
6640 fold_build2 (MINUS_EXPR
,
6643 TYPE_MIN_VALUE (domain
)));
6646 size_binop (MULT_EXPR
, index
,
6647 fold_convert (ssizetype
,
6648 TYPE_SIZE_UNIT (elttype
)));
6649 xtarget
= offset_address (target
,
6650 expand_normal (position
),
6651 highest_pow2_factor (position
));
6652 xtarget
= adjust_address (xtarget
, mode
, 0);
6653 store_expr (value
, xtarget
, 0, false, reverse
);
6658 bitpos
= ((tree_to_shwi (index
) - minelt
)
6659 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6661 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6663 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6664 && TREE_CODE (type
) == ARRAY_TYPE
6665 && TYPE_NONALIASED_COMPONENT (type
))
6667 target
= copy_rtx (target
);
6668 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6670 store_constructor_field (target
, bitsize
, bitpos
, 0,
6671 bitregion_end
, mode
, value
,
6672 cleared
, get_alias_set (elttype
),
6681 unsigned HOST_WIDE_INT idx
;
6682 constructor_elt
*ce
;
6685 insn_code icode
= CODE_FOR_nothing
;
6687 tree elttype
= TREE_TYPE (type
);
6688 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6689 machine_mode eltmode
= TYPE_MODE (elttype
);
6690 HOST_WIDE_INT bitsize
;
6691 HOST_WIDE_INT bitpos
;
6692 rtvec vector
= NULL
;
6694 unsigned HOST_WIDE_INT const_n_elts
;
6695 alias_set_type alias
;
6696 bool vec_vec_init_p
= false;
6697 machine_mode mode
= GET_MODE (target
);
6699 gcc_assert (eltmode
!= BLKmode
);
6701 /* Try using vec_duplicate_optab for uniform vectors. */
6702 if (!TREE_SIDE_EFFECTS (exp
)
6703 && VECTOR_MODE_P (mode
)
6704 && eltmode
== GET_MODE_INNER (mode
)
6705 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6706 != CODE_FOR_nothing
)
6707 && (elt
= uniform_vector_p (exp
)))
6709 struct expand_operand ops
[2];
6710 create_output_operand (&ops
[0], target
, mode
);
6711 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6712 expand_insn (icode
, 2, ops
);
6713 if (!rtx_equal_p (target
, ops
[0].value
))
6714 emit_move_insn (target
, ops
[0].value
);
6718 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6720 && VECTOR_MODE_P (mode
)
6721 && n_elts
.is_constant (&const_n_elts
))
6723 machine_mode emode
= eltmode
;
6725 if (CONSTRUCTOR_NELTS (exp
)
6726 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6729 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6730 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6731 * TYPE_VECTOR_SUBPARTS (etype
),
6733 emode
= TYPE_MODE (etype
);
6735 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6736 if (icode
!= CODE_FOR_nothing
)
6738 unsigned int i
, n
= const_n_elts
;
6740 if (emode
!= eltmode
)
6742 n
= CONSTRUCTOR_NELTS (exp
);
6743 vec_vec_init_p
= true;
6745 vector
= rtvec_alloc (n
);
6746 for (i
= 0; i
< n
; i
++)
6747 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6751 /* If the constructor has fewer elements than the vector,
6752 clear the whole array first. Similarly if this is static
6753 constructor of a non-BLKmode object. */
6756 else if (REG_P (target
) && TREE_STATIC (exp
))
6760 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6763 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6765 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6767 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6768 TYPE_SIZE (elttype
)));
6770 count
+= n_elts_here
;
6771 if (mostly_zeros_p (value
))
6772 zero_count
+= n_elts_here
;
6775 /* Clear the entire vector first if there are any missing elements,
6776 or if the incidence of zero elements is >= 75%. */
6777 need_to_clear
= (maybe_lt (count
, n_elts
)
6778 || 4 * zero_count
>= 3 * count
);
6781 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6784 emit_move_insn (target
, CONST0_RTX (mode
));
6786 clear_storage (target
, gen_int_mode (size
, Pmode
),
6791 /* Inform later passes that the old value is dead. */
6792 if (!cleared
&& !vector
&& REG_P (target
))
6793 emit_move_insn (target
, CONST0_RTX (mode
));
6796 alias
= MEM_ALIAS_SET (target
);
6798 alias
= get_alias_set (elttype
);
6800 /* Store each element of the constructor into the corresponding
6801 element of TARGET, determined by counting the elements. */
6802 for (idx
= 0, i
= 0;
6803 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6804 idx
++, i
+= bitsize
/ elt_size
)
6806 HOST_WIDE_INT eltpos
;
6807 tree value
= ce
->value
;
6809 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6810 if (cleared
&& initializer_zerop (value
))
6814 eltpos
= tree_to_uhwi (ce
->index
);
6822 gcc_assert (ce
->index
== NULL_TREE
);
6823 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6827 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6828 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6832 machine_mode value_mode
6833 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6834 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6835 bitpos
= eltpos
* elt_size
;
6836 store_constructor_field (target
, bitsize
, bitpos
, 0,
6837 bitregion_end
, value_mode
,
6838 value
, cleared
, alias
, reverse
);
6843 emit_insn (GEN_FCN (icode
) (target
,
6844 gen_rtx_PARALLEL (mode
, vector
)));
6853 /* Store the value of EXP (an expression tree)
6854 into a subfield of TARGET which has mode MODE and occupies
6855 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6856 If MODE is VOIDmode, it means that we are storing into a bit-field.
6858 BITREGION_START is bitpos of the first bitfield in this region.
6859 BITREGION_END is the bitpos of the ending bitfield in this region.
6860 These two fields are 0, if the C++ memory model does not apply,
6861 or we are not interested in keeping track of bitfield regions.
6863 Always return const0_rtx unless we have something particular to
6866 ALIAS_SET is the alias set for the destination. This value will
6867 (in general) be different from that for TARGET, since TARGET is a
6868 reference to the containing structure.
6870 If NONTEMPORAL is true, try generating a nontemporal store.
6872 If REVERSE is true, the store is to be done in reverse order. */
6875 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6876 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6877 machine_mode mode
, tree exp
,
6878 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6880 if (TREE_CODE (exp
) == ERROR_MARK
)
6883 /* If we have nothing to store, do nothing unless the expression has
6884 side-effects. Don't do that for zero sized addressable lhs of
6886 if (known_eq (bitsize
, 0)
6887 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6888 || TREE_CODE (exp
) != CALL_EXPR
))
6889 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6891 if (GET_CODE (target
) == CONCAT
)
6893 /* We're storing into a struct containing a single __complex. */
6895 gcc_assert (known_eq (bitpos
, 0));
6896 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6899 /* If the structure is in a register or if the component
6900 is a bit field, we cannot use addressing to access it.
6901 Use bit-field techniques or SUBREG to store in it. */
6903 poly_int64 decl_bitsize
;
6904 if (mode
== VOIDmode
6905 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6906 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6907 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6909 || GET_CODE (target
) == SUBREG
6910 /* If the field isn't aligned enough to store as an ordinary memref,
6911 store it as a bit field. */
6913 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6914 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6915 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6916 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6917 || (known_size_p (bitsize
)
6919 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6920 /* If the RHS and field are a constant size and the size of the
6921 RHS isn't the same size as the bitfield, we must use bitfield
6923 || (known_size_p (bitsize
)
6924 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6925 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6927 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6928 we will handle specially below. */
6929 && !(TREE_CODE (exp
) == CONSTRUCTOR
6930 && multiple_p (bitsize
, BITS_PER_UNIT
))
6931 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6932 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6933 includes some extra padding. store_expr / expand_expr will in
6934 that case call get_inner_reference that will have the bitsize
6935 we check here and thus the block move will not clobber the
6936 padding that shouldn't be clobbered. In the future we could
6937 replace the TREE_ADDRESSABLE check with a check that
6938 get_base_address needs to live in memory. */
6939 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6940 || TREE_CODE (exp
) != COMPONENT_REF
6941 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6942 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6943 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6945 || maybe_ne (decl_bitsize
, bitsize
)))
6946 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6947 decl we must use bitfield operations. */
6948 || (known_size_p (bitsize
)
6949 && TREE_CODE (exp
) == MEM_REF
6950 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6951 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6952 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6953 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6958 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6959 implies a mask operation. If the precision is the same size as
6960 the field we're storing into, that mask is redundant. This is
6961 particularly common with bit field assignments generated by the
6963 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6966 tree type
= TREE_TYPE (exp
);
6967 if (INTEGRAL_TYPE_P (type
)
6968 && maybe_ne (TYPE_PRECISION (type
),
6969 GET_MODE_BITSIZE (TYPE_MODE (type
)))
6970 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6972 tree op
= gimple_assign_rhs1 (nop_def
);
6973 type
= TREE_TYPE (op
);
6974 if (INTEGRAL_TYPE_P (type
)
6975 && known_ge (TYPE_PRECISION (type
), bitsize
))
6980 temp
= expand_normal (exp
);
6982 /* We don't support variable-sized BLKmode bitfields, since our
6983 handling of BLKmode is bound up with the ability to break
6984 things into words. */
6985 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6987 /* Handle calls that return values in multiple non-contiguous locations.
6988 The Irix 6 ABI has examples of this. */
6989 if (GET_CODE (temp
) == PARALLEL
)
6991 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6992 scalar_int_mode temp_mode
6993 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6994 rtx temp_target
= gen_reg_rtx (temp_mode
);
6995 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6999 /* Handle calls that return BLKmode values in registers. */
7000 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7002 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7003 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7007 /* If the value has aggregate type and an integral mode then, if BITSIZE
7008 is narrower than this mode and this is for big-endian data, we first
7009 need to put the value into the low-order bits for store_bit_field,
7010 except when MODE is BLKmode and BITSIZE larger than the word size
7011 (see the handling of fields larger than a word in store_bit_field).
7012 Moreover, the field may be not aligned on a byte boundary; in this
7013 case, if it has reverse storage order, it needs to be accessed as a
7014 scalar field with reverse storage order and we must first put the
7015 value into target order. */
7016 scalar_int_mode temp_mode
;
7017 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7018 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7020 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7022 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7025 temp
= flip_storage_order (temp_mode
, temp
);
7027 gcc_checking_assert (known_le (bitsize
, size
));
7028 if (maybe_lt (bitsize
, size
)
7029 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7030 /* Use of to_constant for BLKmode was checked above. */
7031 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7032 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7033 size
- bitsize
, NULL_RTX
, 1);
7036 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7037 if (mode
!= VOIDmode
&& mode
!= BLKmode
7038 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7039 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7041 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7042 and BITPOS must be aligned on a byte boundary. If so, we simply do
7043 a block copy. Likewise for a BLKmode-like TARGET. */
7044 if (GET_MODE (temp
) == BLKmode
7045 && (GET_MODE (target
) == BLKmode
7047 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7048 && multiple_p (bitpos
, BITS_PER_UNIT
)
7049 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7051 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7052 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7053 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7055 target
= adjust_address (target
, VOIDmode
, bytepos
);
7056 emit_block_move (target
, temp
,
7057 gen_int_mode (bytesize
, Pmode
),
7063 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7064 word size, we need to load the value (see again store_bit_field). */
7065 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7067 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7068 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7069 temp_mode
, false, NULL
);
7072 /* Store the value in the bitfield. */
7073 store_bit_field (target
, bitsize
, bitpos
,
7074 bitregion_start
, bitregion_end
,
7075 mode
, temp
, reverse
);
7081 /* Now build a reference to just the desired component. */
7082 rtx to_rtx
= adjust_address (target
, mode
,
7083 exact_div (bitpos
, BITS_PER_UNIT
));
7085 if (to_rtx
== target
)
7086 to_rtx
= copy_rtx (to_rtx
);
7088 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7089 set_mem_alias_set (to_rtx
, alias_set
);
7091 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7092 into a target smaller than its type; handle that case now. */
7093 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7095 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7096 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7100 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7104 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7105 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7106 codes and find the ultimate containing object, which we return.
7108 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7109 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7110 storage order of the field.
7111 If the position of the field is variable, we store a tree
7112 giving the variable offset (in units) in *POFFSET.
7113 This offset is in addition to the bit position.
7114 If the position is not variable, we store 0 in *POFFSET.
7116 If any of the extraction expressions is volatile,
7117 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7119 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7120 Otherwise, it is a mode that can be used to access the field.
7122 If the field describes a variable-sized object, *PMODE is set to
7123 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7124 this case, but the address of the object can be found. */
7127 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7128 poly_int64_pod
*pbitpos
, tree
*poffset
,
7129 machine_mode
*pmode
, int *punsignedp
,
7130 int *preversep
, int *pvolatilep
)
7133 machine_mode mode
= VOIDmode
;
7134 bool blkmode_bitfield
= false;
7135 tree offset
= size_zero_node
;
7136 poly_offset_int bit_offset
= 0;
7138 /* First get the mode, signedness, storage order and size. We do this from
7139 just the outermost expression. */
7141 if (TREE_CODE (exp
) == COMPONENT_REF
)
7143 tree field
= TREE_OPERAND (exp
, 1);
7144 size_tree
= DECL_SIZE (field
);
7145 if (flag_strict_volatile_bitfields
> 0
7146 && TREE_THIS_VOLATILE (exp
)
7147 && DECL_BIT_FIELD_TYPE (field
)
7148 && DECL_MODE (field
) != BLKmode
)
7149 /* Volatile bitfields should be accessed in the mode of the
7150 field's type, not the mode computed based on the bit
7152 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7153 else if (!DECL_BIT_FIELD (field
))
7155 mode
= DECL_MODE (field
);
7156 /* For vector fields re-check the target flags, as DECL_MODE
7157 could have been set with different target flags than
7158 the current function has. */
7160 && VECTOR_TYPE_P (TREE_TYPE (field
))
7161 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7162 mode
= TYPE_MODE (TREE_TYPE (field
));
7164 else if (DECL_MODE (field
) == BLKmode
)
7165 blkmode_bitfield
= true;
7167 *punsignedp
= DECL_UNSIGNED (field
);
7169 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7171 size_tree
= TREE_OPERAND (exp
, 1);
7172 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7173 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7175 /* For vector types, with the correct size of access, use the mode of
7177 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7178 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7179 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7180 mode
= TYPE_MODE (TREE_TYPE (exp
));
7184 mode
= TYPE_MODE (TREE_TYPE (exp
));
7185 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7187 if (mode
== BLKmode
)
7188 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7190 *pbitsize
= GET_MODE_BITSIZE (mode
);
7195 if (! tree_fits_uhwi_p (size_tree
))
7196 mode
= BLKmode
, *pbitsize
= -1;
7198 *pbitsize
= tree_to_uhwi (size_tree
);
7201 *preversep
= reverse_storage_order_for_component_p (exp
);
7203 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7204 and find the ultimate containing object. */
7207 switch (TREE_CODE (exp
))
7210 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7215 tree field
= TREE_OPERAND (exp
, 1);
7216 tree this_offset
= component_ref_field_offset (exp
);
7218 /* If this field hasn't been filled in yet, don't go past it.
7219 This should only happen when folding expressions made during
7220 type construction. */
7221 if (this_offset
== 0)
7224 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7225 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7227 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7232 case ARRAY_RANGE_REF
:
7234 tree index
= TREE_OPERAND (exp
, 1);
7235 tree low_bound
= array_ref_low_bound (exp
);
7236 tree unit_size
= array_ref_element_size (exp
);
7238 /* We assume all arrays have sizes that are a multiple of a byte.
7239 First subtract the lower bound, if any, in the type of the
7240 index, then convert to sizetype and multiply by the size of
7241 the array element. */
7242 if (! integer_zerop (low_bound
))
7243 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7246 offset
= size_binop (PLUS_EXPR
, offset
,
7247 size_binop (MULT_EXPR
,
7248 fold_convert (sizetype
, index
),
7257 bit_offset
+= *pbitsize
;
7260 case VIEW_CONVERT_EXPR
:
7264 /* Hand back the decl for MEM[&decl, off]. */
7265 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7267 tree off
= TREE_OPERAND (exp
, 1);
7268 if (!integer_zerop (off
))
7270 poly_offset_int boff
= mem_ref_offset (exp
);
7271 boff
<<= LOG2_BITS_PER_UNIT
;
7274 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7282 /* If any reference in the chain is volatile, the effect is volatile. */
7283 if (TREE_THIS_VOLATILE (exp
))
7286 exp
= TREE_OPERAND (exp
, 0);
7290 /* If OFFSET is constant, see if we can return the whole thing as a
7291 constant bit position. Make sure to handle overflow during
7293 if (poly_int_tree_p (offset
))
7295 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7296 TYPE_PRECISION (sizetype
));
7297 tem
<<= LOG2_BITS_PER_UNIT
;
7299 if (tem
.to_shwi (pbitpos
))
7300 *poffset
= offset
= NULL_TREE
;
7303 /* Otherwise, split it up. */
7306 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7307 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7309 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7310 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7311 offset
= size_binop (PLUS_EXPR
, offset
,
7312 build_int_cst (sizetype
, bytes
.force_shwi ()));
7318 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7319 if (mode
== VOIDmode
7321 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7322 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7330 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7332 static unsigned HOST_WIDE_INT
7333 target_align (const_tree target
)
7335 /* We might have a chain of nested references with intermediate misaligning
7336 bitfields components, so need to recurse to find out. */
7338 unsigned HOST_WIDE_INT this_align
, outer_align
;
7340 switch (TREE_CODE (target
))
7346 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7347 outer_align
= target_align (TREE_OPERAND (target
, 0));
7348 return MIN (this_align
, outer_align
);
7351 case ARRAY_RANGE_REF
:
7352 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7353 outer_align
= target_align (TREE_OPERAND (target
, 0));
7354 return MIN (this_align
, outer_align
);
7357 case NON_LVALUE_EXPR
:
7358 case VIEW_CONVERT_EXPR
:
7359 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7360 outer_align
= target_align (TREE_OPERAND (target
, 0));
7361 return MAX (this_align
, outer_align
);
7364 return TYPE_ALIGN (TREE_TYPE (target
));
7369 /* Given an rtx VALUE that may contain additions and multiplications, return
7370 an equivalent value that just refers to a register, memory, or constant.
7371 This is done by generating instructions to perform the arithmetic and
7372 returning a pseudo-register containing the value.
7374 The returned value may be a REG, SUBREG, MEM or constant. */
7377 force_operand (rtx value
, rtx target
)
7380 /* Use subtarget as the target for operand 0 of a binary operation. */
7381 rtx subtarget
= get_subtarget (target
);
7382 enum rtx_code code
= GET_CODE (value
);
7384 /* Check for subreg applied to an expression produced by loop optimizer. */
7386 && !REG_P (SUBREG_REG (value
))
7387 && !MEM_P (SUBREG_REG (value
)))
7390 = simplify_gen_subreg (GET_MODE (value
),
7391 force_reg (GET_MODE (SUBREG_REG (value
)),
7392 force_operand (SUBREG_REG (value
),
7394 GET_MODE (SUBREG_REG (value
)),
7395 SUBREG_BYTE (value
));
7396 code
= GET_CODE (value
);
7399 /* Check for a PIC address load. */
7400 if ((code
== PLUS
|| code
== MINUS
)
7401 && XEXP (value
, 0) == pic_offset_table_rtx
7402 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7403 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7404 || GET_CODE (XEXP (value
, 1)) == CONST
))
7407 subtarget
= gen_reg_rtx (GET_MODE (value
));
7408 emit_move_insn (subtarget
, value
);
7412 if (ARITHMETIC_P (value
))
7414 op2
= XEXP (value
, 1);
7415 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7417 if (code
== MINUS
&& CONST_INT_P (op2
))
7420 op2
= negate_rtx (GET_MODE (value
), op2
);
7423 /* Check for an addition with OP2 a constant integer and our first
7424 operand a PLUS of a virtual register and something else. In that
7425 case, we want to emit the sum of the virtual register and the
7426 constant first and then add the other value. This allows virtual
7427 register instantiation to simply modify the constant rather than
7428 creating another one around this addition. */
7429 if (code
== PLUS
&& CONST_INT_P (op2
)
7430 && GET_CODE (XEXP (value
, 0)) == PLUS
7431 && REG_P (XEXP (XEXP (value
, 0), 0))
7432 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7433 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7435 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7436 XEXP (XEXP (value
, 0), 0), op2
,
7437 subtarget
, 0, OPTAB_LIB_WIDEN
);
7438 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7439 force_operand (XEXP (XEXP (value
,
7441 target
, 0, OPTAB_LIB_WIDEN
);
7444 op1
= force_operand (XEXP (value
, 0), subtarget
);
7445 op2
= force_operand (op2
, NULL_RTX
);
7449 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7451 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7452 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7453 target
, 1, OPTAB_LIB_WIDEN
);
7455 return expand_divmod (0,
7456 FLOAT_MODE_P (GET_MODE (value
))
7457 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7458 GET_MODE (value
), op1
, op2
, target
, 0);
7460 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7463 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7466 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7469 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7470 target
, 0, OPTAB_LIB_WIDEN
);
7472 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7473 target
, 1, OPTAB_LIB_WIDEN
);
7476 if (UNARY_P (value
))
7479 target
= gen_reg_rtx (GET_MODE (value
));
7480 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7487 case FLOAT_TRUNCATE
:
7488 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7493 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7497 case UNSIGNED_FLOAT
:
7498 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7502 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7506 #ifdef INSN_SCHEDULING
7507 /* On machines that have insn scheduling, we want all memory reference to be
7508 explicit, so we need to deal with such paradoxical SUBREGs. */
7509 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7511 = simplify_gen_subreg (GET_MODE (value
),
7512 force_reg (GET_MODE (SUBREG_REG (value
)),
7513 force_operand (SUBREG_REG (value
),
7515 GET_MODE (SUBREG_REG (value
)),
7516 SUBREG_BYTE (value
));
7522 /* Subroutine of expand_expr: return nonzero iff there is no way that
7523 EXP can reference X, which is being modified. TOP_P is nonzero if this
7524 call is going to be used to determine whether we need a temporary
7525 for EXP, as opposed to a recursive call to this function.
7527 It is always safe for this routine to return zero since it merely
7528 searches for optimization opportunities. */
7531 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7537 /* If EXP has varying size, we MUST use a target since we currently
7538 have no way of allocating temporaries of variable size
7539 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7540 So we assume here that something at a higher level has prevented a
7541 clash. This is somewhat bogus, but the best we can do. Only
7542 do this when X is BLKmode and when we are at the top level. */
7543 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7544 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7545 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7546 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7547 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7549 && GET_MODE (x
) == BLKmode
)
7550 /* If X is in the outgoing argument area, it is always safe. */
7552 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7553 || (GET_CODE (XEXP (x
, 0)) == PLUS
7554 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7557 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7558 find the underlying pseudo. */
7559 if (GET_CODE (x
) == SUBREG
)
7562 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7566 /* Now look at our tree code and possibly recurse. */
7567 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7569 case tcc_declaration
:
7570 exp_rtl
= DECL_RTL_IF_SET (exp
);
7576 case tcc_exceptional
:
7577 if (TREE_CODE (exp
) == TREE_LIST
)
7581 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7583 exp
= TREE_CHAIN (exp
);
7586 if (TREE_CODE (exp
) != TREE_LIST
)
7587 return safe_from_p (x
, exp
, 0);
7590 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7592 constructor_elt
*ce
;
7593 unsigned HOST_WIDE_INT idx
;
7595 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7596 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7597 || !safe_from_p (x
, ce
->value
, 0))
7601 else if (TREE_CODE (exp
) == ERROR_MARK
)
7602 return 1; /* An already-visited SAVE_EXPR? */
7607 /* The only case we look at here is the DECL_INITIAL inside a
7609 return (TREE_CODE (exp
) != DECL_EXPR
7610 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7611 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7612 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7615 case tcc_comparison
:
7616 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7621 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7623 case tcc_expression
:
7626 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7627 the expression. If it is set, we conflict iff we are that rtx or
7628 both are in memory. Otherwise, we check all operands of the
7629 expression recursively. */
7631 switch (TREE_CODE (exp
))
7634 /* If the operand is static or we are static, we can't conflict.
7635 Likewise if we don't conflict with the operand at all. */
7636 if (staticp (TREE_OPERAND (exp
, 0))
7637 || TREE_STATIC (exp
)
7638 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7641 /* Otherwise, the only way this can conflict is if we are taking
7642 the address of a DECL a that address if part of X, which is
7644 exp
= TREE_OPERAND (exp
, 0);
7647 if (!DECL_RTL_SET_P (exp
)
7648 || !MEM_P (DECL_RTL (exp
)))
7651 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7657 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7658 get_alias_set (exp
)))
7663 /* Assume that the call will clobber all hard registers and
7665 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7670 case WITH_CLEANUP_EXPR
:
7671 case CLEANUP_POINT_EXPR
:
7672 /* Lowered by gimplify.c. */
7676 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7682 /* If we have an rtx, we do not need to scan our operands. */
7686 nops
= TREE_OPERAND_LENGTH (exp
);
7687 for (i
= 0; i
< nops
; i
++)
7688 if (TREE_OPERAND (exp
, i
) != 0
7689 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7695 /* Should never get a type here. */
7699 /* If we have an rtl, find any enclosed object. Then see if we conflict
7703 if (GET_CODE (exp_rtl
) == SUBREG
)
7705 exp_rtl
= SUBREG_REG (exp_rtl
);
7707 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7711 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7712 are memory and they conflict. */
7713 return ! (rtx_equal_p (x
, exp_rtl
)
7714 || (MEM_P (x
) && MEM_P (exp_rtl
)
7715 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7718 /* If we reach here, it is safe. */
7723 /* Return the highest power of two that EXP is known to be a multiple of.
7724 This is used in updating alignment of MEMs in array references. */
7726 unsigned HOST_WIDE_INT
7727 highest_pow2_factor (const_tree exp
)
7729 unsigned HOST_WIDE_INT ret
;
7730 int trailing_zeros
= tree_ctz (exp
);
7731 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7732 return BIGGEST_ALIGNMENT
;
7733 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7734 if (ret
> BIGGEST_ALIGNMENT
)
7735 return BIGGEST_ALIGNMENT
;
7739 /* Similar, except that the alignment requirements of TARGET are
7740 taken into account. Assume it is at least as aligned as its
7741 type, unless it is a COMPONENT_REF in which case the layout of
7742 the structure gives the alignment. */
7744 static unsigned HOST_WIDE_INT
7745 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7747 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7748 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7750 return MAX (factor
, talign
);
7753 /* Convert the tree comparison code TCODE to the rtl one where the
7754 signedness is UNSIGNEDP. */
7756 static enum rtx_code
7757 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7769 code
= unsignedp
? LTU
: LT
;
7772 code
= unsignedp
? LEU
: LE
;
7775 code
= unsignedp
? GTU
: GT
;
7778 code
= unsignedp
? GEU
: GE
;
7780 case UNORDERED_EXPR
:
7811 /* Subroutine of expand_expr. Expand the two operands of a binary
7812 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7813 The value may be stored in TARGET if TARGET is nonzero. The
7814 MODIFIER argument is as documented by expand_expr. */
7817 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7818 enum expand_modifier modifier
)
7820 if (! safe_from_p (target
, exp1
, 1))
7822 if (operand_equal_p (exp0
, exp1
, 0))
7824 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7825 *op1
= copy_rtx (*op0
);
7829 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7830 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7835 /* Return a MEM that contains constant EXP. DEFER is as for
7836 output_constant_def and MODIFIER is as for expand_expr. */
7839 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7843 mem
= output_constant_def (exp
, defer
);
7844 if (modifier
!= EXPAND_INITIALIZER
)
7845 mem
= use_anchored_address (mem
);
7849 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7850 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7853 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7854 enum expand_modifier modifier
, addr_space_t as
)
7856 rtx result
, subtarget
;
7858 poly_int64 bitsize
, bitpos
;
7859 int unsignedp
, reversep
, volatilep
= 0;
7862 /* If we are taking the address of a constant and are at the top level,
7863 we have to use output_constant_def since we can't call force_const_mem
7865 /* ??? This should be considered a front-end bug. We should not be
7866 generating ADDR_EXPR of something that isn't an LVALUE. The only
7867 exception here is STRING_CST. */
7868 if (CONSTANT_CLASS_P (exp
))
7870 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7871 if (modifier
< EXPAND_SUM
)
7872 result
= force_operand (result
, target
);
7876 /* Everything must be something allowed by is_gimple_addressable. */
7877 switch (TREE_CODE (exp
))
7880 /* This case will happen via recursion for &a->b. */
7881 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7885 tree tem
= TREE_OPERAND (exp
, 0);
7886 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7887 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7888 return expand_expr (tem
, target
, tmode
, modifier
);
7891 case TARGET_MEM_REF
:
7892 return addr_for_mem_ref (exp
, as
, true);
7895 /* Expand the initializer like constants above. */
7896 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7898 if (modifier
< EXPAND_SUM
)
7899 result
= force_operand (result
, target
);
7903 /* The real part of the complex number is always first, therefore
7904 the address is the same as the address of the parent object. */
7907 inner
= TREE_OPERAND (exp
, 0);
7911 /* The imaginary part of the complex number is always second.
7912 The expression is therefore always offset by the size of the
7915 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7916 inner
= TREE_OPERAND (exp
, 0);
7919 case COMPOUND_LITERAL_EXPR
:
7920 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7921 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7922 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7923 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7924 the initializers aren't gimplified. */
7925 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7926 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7927 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7928 target
, tmode
, modifier
, as
);
7931 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7932 expand_expr, as that can have various side effects; LABEL_DECLs for
7933 example, may not have their DECL_RTL set yet. Expand the rtl of
7934 CONSTRUCTORs too, which should yield a memory reference for the
7935 constructor's contents. Assume language specific tree nodes can
7936 be expanded in some interesting way. */
7937 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7939 || TREE_CODE (exp
) == CONSTRUCTOR
7940 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7942 result
= expand_expr (exp
, target
, tmode
,
7943 modifier
== EXPAND_INITIALIZER
7944 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7946 /* If the DECL isn't in memory, then the DECL wasn't properly
7947 marked TREE_ADDRESSABLE, which will be either a front-end
7948 or a tree optimizer bug. */
7950 gcc_assert (MEM_P (result
));
7951 result
= XEXP (result
, 0);
7953 /* ??? Is this needed anymore? */
7955 TREE_USED (exp
) = 1;
7957 if (modifier
!= EXPAND_INITIALIZER
7958 && modifier
!= EXPAND_CONST_ADDRESS
7959 && modifier
!= EXPAND_SUM
)
7960 result
= force_operand (result
, target
);
7964 /* Pass FALSE as the last argument to get_inner_reference although
7965 we are expanding to RTL. The rationale is that we know how to
7966 handle "aligning nodes" here: we can just bypass them because
7967 they won't change the final object whose address will be returned
7968 (they actually exist only for that purpose). */
7969 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7970 &unsignedp
, &reversep
, &volatilep
);
7974 /* We must have made progress. */
7975 gcc_assert (inner
!= exp
);
7977 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7978 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7979 inner alignment, force the inner to be sufficiently aligned. */
7980 if (CONSTANT_CLASS_P (inner
)
7981 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7983 inner
= copy_node (inner
);
7984 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7985 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7986 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7988 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7994 if (modifier
!= EXPAND_NORMAL
)
7995 result
= force_operand (result
, NULL
);
7996 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7997 modifier
== EXPAND_INITIALIZER
7998 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8000 /* expand_expr is allowed to return an object in a mode other
8001 than TMODE. If it did, we need to convert. */
8002 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8003 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8004 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8005 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8006 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8008 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8009 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8012 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8013 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8014 1, OPTAB_LIB_WIDEN
);
8018 if (maybe_ne (bitpos
, 0))
8020 /* Someone beforehand should have rejected taking the address
8021 of an object that isn't byte-aligned. */
8022 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8023 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8024 result
= plus_constant (tmode
, result
, bytepos
);
8025 if (modifier
< EXPAND_SUM
)
8026 result
= force_operand (result
, target
);
8032 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8033 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8036 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8037 enum expand_modifier modifier
)
8039 addr_space_t as
= ADDR_SPACE_GENERIC
;
8040 scalar_int_mode address_mode
= Pmode
;
8041 scalar_int_mode pointer_mode
= ptr_mode
;
8045 /* Target mode of VOIDmode says "whatever's natural". */
8046 if (tmode
== VOIDmode
)
8047 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8049 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8051 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8052 address_mode
= targetm
.addr_space
.address_mode (as
);
8053 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8056 /* We can get called with some Weird Things if the user does silliness
8057 like "(short) &a". In that case, convert_memory_address won't do
8058 the right thing, so ignore the given target mode. */
8059 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8063 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8064 new_tmode
, modifier
, as
);
8066 /* Despite expand_expr claims concerning ignoring TMODE when not
8067 strictly convenient, stuff breaks if we don't honor it. Note
8068 that combined with the above, we only do this for pointer modes. */
8069 rmode
= GET_MODE (result
);
8070 if (rmode
== VOIDmode
)
8072 if (rmode
!= new_tmode
)
8073 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8078 /* Generate code for computing CONSTRUCTOR EXP.
8079 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8080 is TRUE, instead of creating a temporary variable in memory
8081 NULL is returned and the caller needs to handle it differently. */
8084 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8085 bool avoid_temp_mem
)
8087 tree type
= TREE_TYPE (exp
);
8088 machine_mode mode
= TYPE_MODE (type
);
8090 /* Try to avoid creating a temporary at all. This is possible
8091 if all of the initializer is zero.
8092 FIXME: try to handle all [0..255] initializers we can handle
8094 if (TREE_STATIC (exp
)
8095 && !TREE_ADDRESSABLE (exp
)
8096 && target
!= 0 && mode
== BLKmode
8097 && all_zeros_p (exp
))
8099 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8103 /* All elts simple constants => refer to a constant in memory. But
8104 if this is a non-BLKmode mode, let it store a field at a time
8105 since that should make a CONST_INT, CONST_WIDE_INT or
8106 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8107 use, it is best to store directly into the target unless the type
8108 is large enough that memcpy will be used. If we are making an
8109 initializer and all operands are constant, put it in memory as
8112 FIXME: Avoid trying to fill vector constructors piece-meal.
8113 Output them with output_constant_def below unless we're sure
8114 they're zeros. This should go away when vector initializers
8115 are treated like VECTOR_CST instead of arrays. */
8116 if ((TREE_STATIC (exp
)
8117 && ((mode
== BLKmode
8118 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8119 || TREE_ADDRESSABLE (exp
)
8120 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8121 && (! can_move_by_pieces
8122 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8124 && ! mostly_zeros_p (exp
))))
8125 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8126 && TREE_CONSTANT (exp
)))
8133 constructor
= expand_expr_constant (exp
, 1, modifier
);
8135 if (modifier
!= EXPAND_CONST_ADDRESS
8136 && modifier
!= EXPAND_INITIALIZER
8137 && modifier
!= EXPAND_SUM
)
8138 constructor
= validize_mem (constructor
);
8143 /* Handle calls that pass values in multiple non-contiguous
8144 locations. The Irix 6 ABI has examples of this. */
8145 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8146 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8151 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8154 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8159 /* expand_expr: generate code for computing expression EXP.
8160 An rtx for the computed value is returned. The value is never null.
8161 In the case of a void EXP, const0_rtx is returned.
8163 The value may be stored in TARGET if TARGET is nonzero.
8164 TARGET is just a suggestion; callers must assume that
8165 the rtx returned may not be the same as TARGET.
8167 If TARGET is CONST0_RTX, it means that the value will be ignored.
8169 If TMODE is not VOIDmode, it suggests generating the
8170 result in mode TMODE. But this is done only when convenient.
8171 Otherwise, TMODE is ignored and the value generated in its natural mode.
8172 TMODE is just a suggestion; callers must assume that
8173 the rtx returned may not have mode TMODE.
8175 Note that TARGET may have neither TMODE nor MODE. In that case, it
8176 probably will not be used.
8178 If MODIFIER is EXPAND_SUM then when EXP is an addition
8179 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8180 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8181 products as above, or REG or MEM, or constant.
8182 Ordinarily in such cases we would output mul or add instructions
8183 and then return a pseudo reg containing the sum.
8185 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8186 it also marks a label as absolutely required (it can't be dead).
8187 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8188 This is used for outputting expressions used in initializers.
8190 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8191 with a constant address even if that address is not normally legitimate.
8192 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8194 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8195 a call parameter. Such targets require special care as we haven't yet
8196 marked TARGET so that it's safe from being trashed by libcalls. We
8197 don't want to use TARGET for anything but the final result;
8198 Intermediate values must go elsewhere. Additionally, calls to
8199 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8201 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8202 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8203 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8204 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8207 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8208 In this case, we don't adjust a returned MEM rtx that wouldn't be
8209 sufficiently aligned for its mode; instead, it's up to the caller
8210 to deal with it afterwards. This is used to make sure that unaligned
8211 base objects for which out-of-bounds accesses are supported, for
8212 example record types with trailing arrays, aren't realigned behind
8213 the back of the caller.
8214 The normal operating mode is to pass FALSE for this parameter. */
8217 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8218 enum expand_modifier modifier
, rtx
*alt_rtl
,
8219 bool inner_reference_p
)
8223 /* Handle ERROR_MARK before anybody tries to access its type. */
8224 if (TREE_CODE (exp
) == ERROR_MARK
8225 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8227 ret
= CONST0_RTX (tmode
);
8228 return ret
? ret
: const0_rtx
;
8231 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8236 /* Try to expand the conditional expression which is represented by
8237 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8238 return the rtl reg which represents the result. Otherwise return
8242 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8243 tree treeop1 ATTRIBUTE_UNUSED
,
8244 tree treeop2 ATTRIBUTE_UNUSED
)
8247 rtx op00
, op01
, op1
, op2
;
8248 enum rtx_code comparison_code
;
8249 machine_mode comparison_mode
;
8252 tree type
= TREE_TYPE (treeop1
);
8253 int unsignedp
= TYPE_UNSIGNED (type
);
8254 machine_mode mode
= TYPE_MODE (type
);
8255 machine_mode orig_mode
= mode
;
8256 static bool expanding_cond_expr_using_cmove
= false;
8258 /* Conditional move expansion can end up TERing two operands which,
8259 when recursively hitting conditional expressions can result in
8260 exponential behavior if the cmove expansion ultimatively fails.
8261 It's hardly profitable to TER a cmove into a cmove so avoid doing
8262 that by failing early if we end up recursing. */
8263 if (expanding_cond_expr_using_cmove
)
8266 /* If we cannot do a conditional move on the mode, try doing it
8267 with the promoted mode. */
8268 if (!can_conditionally_move_p (mode
))
8270 mode
= promote_mode (type
, mode
, &unsignedp
);
8271 if (!can_conditionally_move_p (mode
))
8273 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8276 temp
= assign_temp (type
, 0, 1);
8278 expanding_cond_expr_using_cmove
= true;
8280 expand_operands (treeop1
, treeop2
,
8281 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8283 if (TREE_CODE (treeop0
) == SSA_NAME
8284 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8286 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8287 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8288 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8289 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8290 comparison_mode
= TYPE_MODE (type
);
8291 unsignedp
= TYPE_UNSIGNED (type
);
8292 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8294 else if (COMPARISON_CLASS_P (treeop0
))
8296 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8297 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8298 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8299 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8300 unsignedp
= TYPE_UNSIGNED (type
);
8301 comparison_mode
= TYPE_MODE (type
);
8302 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8306 op00
= expand_normal (treeop0
);
8308 comparison_code
= NE
;
8309 comparison_mode
= GET_MODE (op00
);
8310 if (comparison_mode
== VOIDmode
)
8311 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8313 expanding_cond_expr_using_cmove
= false;
8315 if (GET_MODE (op1
) != mode
)
8316 op1
= gen_lowpart (mode
, op1
);
8318 if (GET_MODE (op2
) != mode
)
8319 op2
= gen_lowpart (mode
, op2
);
8321 /* Try to emit the conditional move. */
8322 insn
= emit_conditional_move (temp
, comparison_code
,
8323 op00
, op01
, comparison_mode
,
8327 /* If we could do the conditional move, emit the sequence,
8331 rtx_insn
*seq
= get_insns ();
8334 return convert_modes (orig_mode
, mode
, temp
, 0);
8337 /* Otherwise discard the sequence and fall back to code with
8344 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8345 enum expand_modifier modifier
)
8347 rtx op0
, op1
, op2
, temp
;
8348 rtx_code_label
*lab
;
8352 scalar_int_mode int_mode
;
8353 enum tree_code code
= ops
->code
;
8355 rtx subtarget
, original_target
;
8357 bool reduce_bit_field
;
8358 location_t loc
= ops
->location
;
8359 tree treeop0
, treeop1
, treeop2
;
8360 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8361 ? reduce_to_bit_field_precision ((expr), \
8367 mode
= TYPE_MODE (type
);
8368 unsignedp
= TYPE_UNSIGNED (type
);
8374 /* We should be called only on simple (binary or unary) expressions,
8375 exactly those that are valid in gimple expressions that aren't
8376 GIMPLE_SINGLE_RHS (or invalid). */
8377 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8378 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8379 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8381 ignore
= (target
== const0_rtx
8382 || ((CONVERT_EXPR_CODE_P (code
)
8383 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8384 && TREE_CODE (type
) == VOID_TYPE
));
8386 /* We should be called only if we need the result. */
8387 gcc_assert (!ignore
);
8389 /* An operation in what may be a bit-field type needs the
8390 result to be reduced to the precision of the bit-field type,
8391 which is narrower than that of the type's mode. */
8392 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8393 && !type_has_mode_precision_p (type
));
8395 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8398 /* Use subtarget as the target for operand 0 of a binary operation. */
8399 subtarget
= get_subtarget (target
);
8400 original_target
= target
;
8404 case NON_LVALUE_EXPR
:
8407 if (treeop0
== error_mark_node
)
8410 if (TREE_CODE (type
) == UNION_TYPE
)
8412 tree valtype
= TREE_TYPE (treeop0
);
8414 /* If both input and output are BLKmode, this conversion isn't doing
8415 anything except possibly changing memory attribute. */
8416 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8418 rtx result
= expand_expr (treeop0
, target
, tmode
,
8421 result
= copy_rtx (result
);
8422 set_mem_attributes (result
, type
, 0);
8428 if (TYPE_MODE (type
) != BLKmode
)
8429 target
= gen_reg_rtx (TYPE_MODE (type
));
8431 target
= assign_temp (type
, 1, 1);
8435 /* Store data into beginning of memory target. */
8436 store_expr (treeop0
,
8437 adjust_address (target
, TYPE_MODE (valtype
), 0),
8438 modifier
== EXPAND_STACK_PARM
,
8439 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8443 gcc_assert (REG_P (target
)
8444 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8446 /* Store this field into a union of the proper type. */
8447 poly_uint64 op0_size
8448 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8449 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8450 store_field (target
,
8451 /* The conversion must be constructed so that
8452 we know at compile time how many bits
8454 ordered_min (op0_size
, union_size
),
8455 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8459 /* Return the entire union. */
8463 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8465 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8468 /* If the signedness of the conversion differs and OP0 is
8469 a promoted SUBREG, clear that indication since we now
8470 have to do the proper extension. */
8471 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8472 && GET_CODE (op0
) == SUBREG
)
8473 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8475 return REDUCE_BIT_FIELD (op0
);
8478 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8479 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8480 if (GET_MODE (op0
) == mode
)
8483 /* If OP0 is a constant, just convert it into the proper mode. */
8484 else if (CONSTANT_P (op0
))
8486 tree inner_type
= TREE_TYPE (treeop0
);
8487 machine_mode inner_mode
= GET_MODE (op0
);
8489 if (inner_mode
== VOIDmode
)
8490 inner_mode
= TYPE_MODE (inner_type
);
8492 if (modifier
== EXPAND_INITIALIZER
)
8493 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8495 op0
= convert_modes (mode
, inner_mode
, op0
,
8496 TYPE_UNSIGNED (inner_type
));
8499 else if (modifier
== EXPAND_INITIALIZER
)
8500 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8501 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8503 else if (target
== 0)
8504 op0
= convert_to_mode (mode
, op0
,
8505 TYPE_UNSIGNED (TREE_TYPE
8509 convert_move (target
, op0
,
8510 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8514 return REDUCE_BIT_FIELD (op0
);
8516 case ADDR_SPACE_CONVERT_EXPR
:
8518 tree treeop0_type
= TREE_TYPE (treeop0
);
8520 gcc_assert (POINTER_TYPE_P (type
));
8521 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8523 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8524 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8526 /* Conversions between pointers to the same address space should
8527 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8528 gcc_assert (as_to
!= as_from
);
8530 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8532 /* Ask target code to handle conversion between pointers
8533 to overlapping address spaces. */
8534 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8535 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8537 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8541 /* For disjoint address spaces, converting anything but a null
8542 pointer invokes undefined behavior. We truncate or extend the
8543 value as if we'd converted via integers, which handles 0 as
8544 required, and all others as the programmer likely expects. */
8545 #ifndef POINTERS_EXTEND_UNSIGNED
8546 const int POINTERS_EXTEND_UNSIGNED
= 1;
8548 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8549 op0
, POINTERS_EXTEND_UNSIGNED
);
8555 case POINTER_PLUS_EXPR
:
8556 /* Even though the sizetype mode and the pointer's mode can be different
8557 expand is able to handle this correctly and get the correct result out
8558 of the PLUS_EXPR code. */
8559 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8560 if sizetype precision is smaller than pointer precision. */
8561 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8562 treeop1
= fold_convert_loc (loc
, type
,
8563 fold_convert_loc (loc
, ssizetype
,
8565 /* If sizetype precision is larger than pointer precision, truncate the
8566 offset to have matching modes. */
8567 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8568 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8572 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8573 something else, make sure we add the register to the constant and
8574 then to the other thing. This case can occur during strength
8575 reduction and doing it this way will produce better code if the
8576 frame pointer or argument pointer is eliminated.
8578 fold-const.c will ensure that the constant is always in the inner
8579 PLUS_EXPR, so the only case we need to do anything about is if
8580 sp, ap, or fp is our second argument, in which case we must swap
8581 the innermost first argument and our second argument. */
8583 if (TREE_CODE (treeop0
) == PLUS_EXPR
8584 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8586 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8587 || DECL_RTL (treeop1
) == stack_pointer_rtx
8588 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8593 /* If the result is to be ptr_mode and we are adding an integer to
8594 something, we might be forming a constant. So try to use
8595 plus_constant. If it produces a sum and we can't accept it,
8596 use force_operand. This allows P = &ARR[const] to generate
8597 efficient code on machines where a SYMBOL_REF is not a valid
8600 If this is an EXPAND_SUM call, always return the sum. */
8601 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8602 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8604 if (modifier
== EXPAND_STACK_PARM
)
8606 if (TREE_CODE (treeop0
) == INTEGER_CST
8607 && HWI_COMPUTABLE_MODE_P (mode
)
8608 && TREE_CONSTANT (treeop1
))
8612 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8614 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8616 /* Use wi::shwi to ensure that the constant is
8617 truncated according to the mode of OP1, then sign extended
8618 to a HOST_WIDE_INT. Using the constant directly can result
8619 in non-canonical RTL in a 64x32 cross compile. */
8620 wc
= TREE_INT_CST_LOW (treeop0
);
8622 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8623 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8624 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8625 op1
= force_operand (op1
, target
);
8626 return REDUCE_BIT_FIELD (op1
);
8629 else if (TREE_CODE (treeop1
) == INTEGER_CST
8630 && HWI_COMPUTABLE_MODE_P (mode
)
8631 && TREE_CONSTANT (treeop0
))
8635 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8637 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8638 (modifier
== EXPAND_INITIALIZER
8639 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8640 if (! CONSTANT_P (op0
))
8642 op1
= expand_expr (treeop1
, NULL_RTX
,
8643 VOIDmode
, modifier
);
8644 /* Return a PLUS if modifier says it's OK. */
8645 if (modifier
== EXPAND_SUM
8646 || modifier
== EXPAND_INITIALIZER
)
8647 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8650 /* Use wi::shwi to ensure that the constant is
8651 truncated according to the mode of OP1, then sign extended
8652 to a HOST_WIDE_INT. Using the constant directly can result
8653 in non-canonical RTL in a 64x32 cross compile. */
8654 wc
= TREE_INT_CST_LOW (treeop1
);
8656 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8657 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8658 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8659 op0
= force_operand (op0
, target
);
8660 return REDUCE_BIT_FIELD (op0
);
8664 /* Use TER to expand pointer addition of a negated value
8665 as pointer subtraction. */
8666 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8667 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8668 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8669 && TREE_CODE (treeop1
) == SSA_NAME
8670 && TYPE_MODE (TREE_TYPE (treeop0
))
8671 == TYPE_MODE (TREE_TYPE (treeop1
)))
8673 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8676 treeop1
= gimple_assign_rhs1 (def
);
8682 /* No sense saving up arithmetic to be done
8683 if it's all in the wrong mode to form part of an address.
8684 And force_operand won't know whether to sign-extend or
8686 if (modifier
!= EXPAND_INITIALIZER
8687 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8689 expand_operands (treeop0
, treeop1
,
8690 subtarget
, &op0
, &op1
, modifier
);
8691 if (op0
== const0_rtx
)
8693 if (op1
== const0_rtx
)
8698 expand_operands (treeop0
, treeop1
,
8699 subtarget
, &op0
, &op1
, modifier
);
8700 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8703 case POINTER_DIFF_EXPR
:
8705 /* For initializers, we are allowed to return a MINUS of two
8706 symbolic constants. Here we handle all cases when both operands
8708 /* Handle difference of two symbolic constants,
8709 for the sake of an initializer. */
8710 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8711 && really_constant_p (treeop0
)
8712 && really_constant_p (treeop1
))
8714 expand_operands (treeop0
, treeop1
,
8715 NULL_RTX
, &op0
, &op1
, modifier
);
8716 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8719 /* No sense saving up arithmetic to be done
8720 if it's all in the wrong mode to form part of an address.
8721 And force_operand won't know whether to sign-extend or
8723 if (modifier
!= EXPAND_INITIALIZER
8724 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8727 expand_operands (treeop0
, treeop1
,
8728 subtarget
, &op0
, &op1
, modifier
);
8730 /* Convert A - const to A + (-const). */
8731 if (CONST_INT_P (op1
))
8733 op1
= negate_rtx (mode
, op1
);
8734 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8739 case WIDEN_MULT_PLUS_EXPR
:
8740 case WIDEN_MULT_MINUS_EXPR
:
8741 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8742 op2
= expand_normal (treeop2
);
8743 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8747 case WIDEN_MULT_EXPR
:
8748 /* If first operand is constant, swap them.
8749 Thus the following special case checks need only
8750 check the second operand. */
8751 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8752 std::swap (treeop0
, treeop1
);
8754 /* First, check if we have a multiplication of one signed and one
8755 unsigned operand. */
8756 if (TREE_CODE (treeop1
) != INTEGER_CST
8757 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8758 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8760 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8761 this_optab
= usmul_widen_optab
;
8762 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8763 != CODE_FOR_nothing
)
8765 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8766 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8769 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8771 /* op0 and op1 might still be constant, despite the above
8772 != INTEGER_CST check. Handle it. */
8773 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8775 op0
= convert_modes (innermode
, mode
, op0
, true);
8776 op1
= convert_modes (innermode
, mode
, op1
, false);
8777 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8778 target
, unsignedp
));
8783 /* Check for a multiplication with matching signedness. */
8784 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8785 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8786 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8787 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8789 tree op0type
= TREE_TYPE (treeop0
);
8790 machine_mode innermode
= TYPE_MODE (op0type
);
8791 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8792 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8793 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8795 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8797 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8798 != CODE_FOR_nothing
)
8800 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8802 /* op0 and op1 might still be constant, despite the above
8803 != INTEGER_CST check. Handle it. */
8804 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8807 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8809 = convert_modes (innermode
, mode
, op1
,
8810 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8811 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8815 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8816 unsignedp
, this_optab
);
8817 return REDUCE_BIT_FIELD (temp
);
8819 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8821 && innermode
== word_mode
)
8824 op0
= expand_normal (treeop0
);
8825 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8826 op1
= convert_modes (word_mode
, mode
,
8827 expand_normal (treeop1
),
8828 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8830 op1
= expand_normal (treeop1
);
8831 /* op0 and op1 might still be constant, despite the above
8832 != INTEGER_CST check. Handle it. */
8833 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8834 goto widen_mult_const
;
8835 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8836 unsignedp
, OPTAB_LIB_WIDEN
);
8837 hipart
= gen_highpart (word_mode
, temp
);
8838 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8842 emit_move_insn (hipart
, htem
);
8843 return REDUCE_BIT_FIELD (temp
);
8847 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8848 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8849 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8850 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8854 optab opt
= fma_optab
;
8855 gimple
*def0
, *def2
;
8857 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8859 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8861 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8864 gcc_assert (fn
!= NULL_TREE
);
8865 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8866 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8869 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8870 /* The multiplication is commutative - look at its 2nd operand
8871 if the first isn't fed by a negate. */
8874 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8875 /* Swap operands if the 2nd operand is fed by a negate. */
8877 std::swap (treeop0
, treeop1
);
8879 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8884 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8887 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8888 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8891 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8894 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8897 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8900 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8904 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8906 op2
= expand_normal (treeop2
);
8907 op1
= expand_normal (treeop1
);
8909 return expand_ternary_op (TYPE_MODE (type
), opt
,
8910 op0
, op1
, op2
, target
, 0);
8914 /* If this is a fixed-point operation, then we cannot use the code
8915 below because "expand_mult" doesn't support sat/no-sat fixed-point
8917 if (ALL_FIXED_POINT_MODE_P (mode
))
8920 /* If first operand is constant, swap them.
8921 Thus the following special case checks need only
8922 check the second operand. */
8923 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8924 std::swap (treeop0
, treeop1
);
8926 /* Attempt to return something suitable for generating an
8927 indexed address, for machines that support that. */
8929 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8930 && tree_fits_shwi_p (treeop1
))
8932 tree exp1
= treeop1
;
8934 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8938 op0
= force_operand (op0
, NULL_RTX
);
8940 op0
= copy_to_mode_reg (mode
, op0
);
8942 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8943 gen_int_mode (tree_to_shwi (exp1
),
8944 TYPE_MODE (TREE_TYPE (exp1
)))));
8947 if (modifier
== EXPAND_STACK_PARM
)
8950 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8951 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8953 case TRUNC_MOD_EXPR
:
8954 case FLOOR_MOD_EXPR
:
8956 case ROUND_MOD_EXPR
:
8958 case TRUNC_DIV_EXPR
:
8959 case FLOOR_DIV_EXPR
:
8961 case ROUND_DIV_EXPR
:
8962 case EXACT_DIV_EXPR
:
8964 /* If this is a fixed-point operation, then we cannot use the code
8965 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8967 if (ALL_FIXED_POINT_MODE_P (mode
))
8970 if (modifier
== EXPAND_STACK_PARM
)
8972 /* Possible optimization: compute the dividend with EXPAND_SUM
8973 then if the divisor is constant can optimize the case
8974 where some terms of the dividend have coeffs divisible by it. */
8975 expand_operands (treeop0
, treeop1
,
8976 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8977 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8978 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8979 if (SCALAR_INT_MODE_P (mode
)
8981 && get_range_pos_neg (treeop0
) == 1
8982 && get_range_pos_neg (treeop1
) == 1)
8984 /* If both arguments are known to be positive when interpreted
8985 as signed, we can expand it as both signed and unsigned
8986 division or modulo. Choose the cheaper sequence in that case. */
8987 bool speed_p
= optimize_insn_for_speed_p ();
8988 do_pending_stack_adjust ();
8990 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8991 rtx_insn
*uns_insns
= get_insns ();
8994 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8995 rtx_insn
*sgn_insns
= get_insns ();
8997 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8998 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9000 /* If costs are the same then use as tie breaker the other
9002 if (uns_cost
== sgn_cost
)
9004 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9005 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9008 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9010 emit_insn (uns_insns
);
9013 emit_insn (sgn_insns
);
9016 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9021 case MULT_HIGHPART_EXPR
:
9022 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9023 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9027 case FIXED_CONVERT_EXPR
:
9028 op0
= expand_normal (treeop0
);
9029 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9030 target
= gen_reg_rtx (mode
);
9032 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9033 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9034 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9035 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9037 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9040 case FIX_TRUNC_EXPR
:
9041 op0
= expand_normal (treeop0
);
9042 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9043 target
= gen_reg_rtx (mode
);
9044 expand_fix (target
, op0
, unsignedp
);
9048 op0
= expand_normal (treeop0
);
9049 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9050 target
= gen_reg_rtx (mode
);
9051 /* expand_float can't figure out what to do if FROM has VOIDmode.
9052 So give it the correct mode. With -O, cse will optimize this. */
9053 if (GET_MODE (op0
) == VOIDmode
)
9054 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9056 expand_float (target
, op0
,
9057 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9061 op0
= expand_expr (treeop0
, subtarget
,
9062 VOIDmode
, EXPAND_NORMAL
);
9063 if (modifier
== EXPAND_STACK_PARM
)
9065 temp
= expand_unop (mode
,
9066 optab_for_tree_code (NEGATE_EXPR
, type
,
9070 return REDUCE_BIT_FIELD (temp
);
9073 op0
= expand_expr (treeop0
, subtarget
,
9074 VOIDmode
, EXPAND_NORMAL
);
9075 if (modifier
== EXPAND_STACK_PARM
)
9078 /* ABS_EXPR is not valid for complex arguments. */
9079 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9080 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9082 /* Unsigned abs is simply the operand. Testing here means we don't
9083 risk generating incorrect code below. */
9084 if (TYPE_UNSIGNED (type
))
9087 return expand_abs (mode
, op0
, target
, unsignedp
,
9088 safe_from_p (target
, treeop0
, 1));
9092 target
= original_target
;
9094 || modifier
== EXPAND_STACK_PARM
9095 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9096 || GET_MODE (target
) != mode
9098 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9099 target
= gen_reg_rtx (mode
);
9100 expand_operands (treeop0
, treeop1
,
9101 target
, &op0
, &op1
, EXPAND_NORMAL
);
9103 /* First try to do it with a special MIN or MAX instruction.
9104 If that does not win, use a conditional jump to select the proper
9106 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9107 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9112 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9113 and similarly for MAX <x, y>. */
9114 if (VECTOR_TYPE_P (type
))
9116 tree t0
= make_tree (type
, op0
);
9117 tree t1
= make_tree (type
, op1
);
9118 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9120 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9124 /* At this point, a MEM target is no longer useful; we will get better
9127 if (! REG_P (target
))
9128 target
= gen_reg_rtx (mode
);
9130 /* If op1 was placed in target, swap op0 and op1. */
9131 if (target
!= op0
&& target
== op1
)
9132 std::swap (op0
, op1
);
9134 /* We generate better code and avoid problems with op1 mentioning
9135 target by forcing op1 into a pseudo if it isn't a constant. */
9136 if (! CONSTANT_P (op1
))
9137 op1
= force_reg (mode
, op1
);
9140 enum rtx_code comparison_code
;
9143 if (code
== MAX_EXPR
)
9144 comparison_code
= unsignedp
? GEU
: GE
;
9146 comparison_code
= unsignedp
? LEU
: LE
;
9148 /* Canonicalize to comparisons against 0. */
9149 if (op1
== const1_rtx
)
9151 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9152 or (a != 0 ? a : 1) for unsigned.
9153 For MIN we are safe converting (a <= 1 ? a : 1)
9154 into (a <= 0 ? a : 1) */
9155 cmpop1
= const0_rtx
;
9156 if (code
== MAX_EXPR
)
9157 comparison_code
= unsignedp
? NE
: GT
;
9159 if (op1
== constm1_rtx
&& !unsignedp
)
9161 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9162 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9163 cmpop1
= const0_rtx
;
9164 if (code
== MIN_EXPR
)
9165 comparison_code
= LT
;
9168 /* Use a conditional move if possible. */
9169 if (can_conditionally_move_p (mode
))
9175 /* Try to emit the conditional move. */
9176 insn
= emit_conditional_move (target
, comparison_code
,
9181 /* If we could do the conditional move, emit the sequence,
9185 rtx_insn
*seq
= get_insns ();
9191 /* Otherwise discard the sequence and fall back to code with
9197 emit_move_insn (target
, op0
);
9199 lab
= gen_label_rtx ();
9200 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9201 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9202 profile_probability::uninitialized ());
9204 emit_move_insn (target
, op1
);
9209 op0
= expand_expr (treeop0
, subtarget
,
9210 VOIDmode
, EXPAND_NORMAL
);
9211 if (modifier
== EXPAND_STACK_PARM
)
9213 /* In case we have to reduce the result to bitfield precision
9214 for unsigned bitfield expand this as XOR with a proper constant
9216 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9218 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9219 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9220 false, GET_MODE_PRECISION (int_mode
));
9222 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9223 immed_wide_int_const (mask
, int_mode
),
9224 target
, 1, OPTAB_LIB_WIDEN
);
9227 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9231 /* ??? Can optimize bitwise operations with one arg constant.
9232 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9233 and (a bitwise1 b) bitwise2 b (etc)
9234 but that is probably not worth while. */
9243 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9244 || type_has_mode_precision_p (type
));
9250 /* If this is a fixed-point operation, then we cannot use the code
9251 below because "expand_shift" doesn't support sat/no-sat fixed-point
9253 if (ALL_FIXED_POINT_MODE_P (mode
))
9256 if (! safe_from_p (subtarget
, treeop1
, 1))
9258 if (modifier
== EXPAND_STACK_PARM
)
9260 op0
= expand_expr (treeop0
, subtarget
,
9261 VOIDmode
, EXPAND_NORMAL
);
9263 /* Left shift optimization when shifting across word_size boundary.
9265 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9266 there isn't native instruction to support this wide mode
9267 left shift. Given below scenario:
9269 Type A = (Type) B << C
9272 | dest_high | dest_low |
9276 If the shift amount C caused we shift B to across the word
9277 size boundary, i.e part of B shifted into high half of
9278 destination register, and part of B remains in the low
9279 half, then GCC will use the following left shift expand
9282 1. Initialize dest_low to B.
9283 2. Initialize every bit of dest_high to the sign bit of B.
9284 3. Logic left shift dest_low by C bit to finalize dest_low.
9285 The value of dest_low before this shift is kept in a temp D.
9286 4. Logic left shift dest_high by C.
9287 5. Logic right shift D by (word_size - C).
9288 6. Or the result of 4 and 5 to finalize dest_high.
9290 While, by checking gimple statements, if operand B is
9291 coming from signed extension, then we can simplify above
9294 1. dest_high = src_low >> (word_size - C).
9295 2. dest_low = src_low << C.
9297 We can use one arithmetic right shift to finish all the
9298 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9299 needed from 6 into 2.
9301 The case is similar for zero extension, except that we
9302 initialize dest_high to zero rather than copies of the sign
9303 bit from B. Furthermore, we need to use a logical right shift
9306 The choice of sign-extension versus zero-extension is
9307 determined entirely by whether or not B is signed and is
9308 independent of the current setting of unsignedp. */
9311 if (code
== LSHIFT_EXPR
9314 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9316 && TREE_CONSTANT (treeop1
)
9317 && TREE_CODE (treeop0
) == SSA_NAME
)
9319 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9320 if (is_gimple_assign (def
)
9321 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9323 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9324 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9326 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9327 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9328 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9329 >= GET_MODE_BITSIZE (word_mode
)))
9331 rtx_insn
*seq
, *seq_old
;
9332 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9334 bool extend_unsigned
9335 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9336 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9337 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9338 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9339 int_mode
, high_off
);
9340 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9341 - TREE_INT_CST_LOW (treeop1
));
9342 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9345 /* dest_high = src_low >> (word_size - C). */
9346 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9349 if (temp
!= dest_high
)
9350 emit_move_insn (dest_high
, temp
);
9352 /* dest_low = src_low << C. */
9353 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9354 treeop1
, dest_low
, unsignedp
);
9355 if (temp
!= dest_low
)
9356 emit_move_insn (dest_low
, temp
);
9362 if (have_insn_for (ASHIFT
, int_mode
))
9364 bool speed_p
= optimize_insn_for_speed_p ();
9366 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9371 seq_old
= get_insns ();
9373 if (seq_cost (seq
, speed_p
)
9374 >= seq_cost (seq_old
, speed_p
))
9385 if (temp
== NULL_RTX
)
9386 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9388 if (code
== LSHIFT_EXPR
)
9389 temp
= REDUCE_BIT_FIELD (temp
);
9393 /* Could determine the answer when only additive constants differ. Also,
9394 the addition of one can be handled by changing the condition. */
9401 case UNORDERED_EXPR
:
9410 temp
= do_store_flag (ops
,
9411 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9412 tmode
!= VOIDmode
? tmode
: mode
);
9416 /* Use a compare and a jump for BLKmode comparisons, or for function
9417 type comparisons is have_canonicalize_funcptr_for_compare. */
9420 || modifier
== EXPAND_STACK_PARM
9421 || ! safe_from_p (target
, treeop0
, 1)
9422 || ! safe_from_p (target
, treeop1
, 1)
9423 /* Make sure we don't have a hard reg (such as function's return
9424 value) live across basic blocks, if not optimizing. */
9425 || (!optimize
&& REG_P (target
)
9426 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9427 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9429 emit_move_insn (target
, const0_rtx
);
9431 rtx_code_label
*lab1
= gen_label_rtx ();
9432 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9433 profile_probability::uninitialized ());
9435 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9436 emit_move_insn (target
, constm1_rtx
);
9438 emit_move_insn (target
, const1_rtx
);
9444 /* Get the rtx code of the operands. */
9445 op0
= expand_normal (treeop0
);
9446 op1
= expand_normal (treeop1
);
9449 target
= gen_reg_rtx (TYPE_MODE (type
));
9451 /* If target overlaps with op1, then either we need to force
9452 op1 into a pseudo (if target also overlaps with op0),
9453 or write the complex parts in reverse order. */
9454 switch (GET_CODE (target
))
9457 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9459 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9461 complex_expr_force_op1
:
9462 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9463 emit_move_insn (temp
, op1
);
9467 complex_expr_swap_order
:
9468 /* Move the imaginary (op1) and real (op0) parts to their
9470 write_complex_part (target
, op1
, true);
9471 write_complex_part (target
, op0
, false);
9477 temp
= adjust_address_nv (target
,
9478 GET_MODE_INNER (GET_MODE (target
)), 0);
9479 if (reg_overlap_mentioned_p (temp
, op1
))
9481 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9482 temp
= adjust_address_nv (target
, imode
,
9483 GET_MODE_SIZE (imode
));
9484 if (reg_overlap_mentioned_p (temp
, op0
))
9485 goto complex_expr_force_op1
;
9486 goto complex_expr_swap_order
;
9490 if (reg_overlap_mentioned_p (target
, op1
))
9492 if (reg_overlap_mentioned_p (target
, op0
))
9493 goto complex_expr_force_op1
;
9494 goto complex_expr_swap_order
;
9499 /* Move the real (op0) and imaginary (op1) parts to their location. */
9500 write_complex_part (target
, op0
, false);
9501 write_complex_part (target
, op1
, true);
9505 case WIDEN_SUM_EXPR
:
9507 tree oprnd0
= treeop0
;
9508 tree oprnd1
= treeop1
;
9510 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9511 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9516 case VEC_UNPACK_HI_EXPR
:
9517 case VEC_UNPACK_LO_EXPR
:
9519 op0
= expand_normal (treeop0
);
9520 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9526 case VEC_UNPACK_FLOAT_HI_EXPR
:
9527 case VEC_UNPACK_FLOAT_LO_EXPR
:
9529 op0
= expand_normal (treeop0
);
9530 /* The signedness is determined from input operand. */
9531 temp
= expand_widen_pattern_expr
9532 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9533 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9539 case VEC_WIDEN_MULT_HI_EXPR
:
9540 case VEC_WIDEN_MULT_LO_EXPR
:
9541 case VEC_WIDEN_MULT_EVEN_EXPR
:
9542 case VEC_WIDEN_MULT_ODD_EXPR
:
9543 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9544 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9545 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9546 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9548 gcc_assert (target
);
9551 case VEC_PACK_TRUNC_EXPR
:
9552 case VEC_PACK_SAT_EXPR
:
9553 case VEC_PACK_FIX_TRUNC_EXPR
:
9554 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9559 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9560 vec_perm_builder sel
;
9561 if (TREE_CODE (treeop2
) == VECTOR_CST
9562 && tree_to_vec_perm_builder (&sel
, treeop2
))
9564 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9565 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9570 op2
= expand_normal (treeop2
);
9571 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9579 tree oprnd0
= treeop0
;
9580 tree oprnd1
= treeop1
;
9581 tree oprnd2
= treeop2
;
9584 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9585 op2
= expand_normal (oprnd2
);
9586 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9593 tree oprnd0
= treeop0
;
9594 tree oprnd1
= treeop1
;
9595 tree oprnd2
= treeop2
;
9598 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9599 op2
= expand_normal (oprnd2
);
9600 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9605 case REALIGN_LOAD_EXPR
:
9607 tree oprnd0
= treeop0
;
9608 tree oprnd1
= treeop1
;
9609 tree oprnd2
= treeop2
;
9612 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9613 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9614 op2
= expand_normal (oprnd2
);
9615 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9623 /* A COND_EXPR with its type being VOID_TYPE represents a
9624 conditional jump and is handled in
9625 expand_gimple_cond_expr. */
9626 gcc_assert (!VOID_TYPE_P (type
));
9628 /* Note that COND_EXPRs whose type is a structure or union
9629 are required to be constructed to contain assignments of
9630 a temporary variable, so that we can evaluate them here
9631 for side effect only. If type is void, we must do likewise. */
9633 gcc_assert (!TREE_ADDRESSABLE (type
)
9635 && TREE_TYPE (treeop1
) != void_type_node
9636 && TREE_TYPE (treeop2
) != void_type_node
);
9638 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9642 /* If we are not to produce a result, we have no target. Otherwise,
9643 if a target was specified use it; it will not be used as an
9644 intermediate target unless it is safe. If no target, use a
9647 if (modifier
!= EXPAND_STACK_PARM
9649 && safe_from_p (original_target
, treeop0
, 1)
9650 && GET_MODE (original_target
) == mode
9651 && !MEM_P (original_target
))
9652 temp
= original_target
;
9654 temp
= assign_temp (type
, 0, 1);
9656 do_pending_stack_adjust ();
9658 rtx_code_label
*lab0
= gen_label_rtx ();
9659 rtx_code_label
*lab1
= gen_label_rtx ();
9660 jumpifnot (treeop0
, lab0
,
9661 profile_probability::uninitialized ());
9662 store_expr (treeop1
, temp
,
9663 modifier
== EXPAND_STACK_PARM
,
9666 emit_jump_insn (targetm
.gen_jump (lab1
));
9669 store_expr (treeop2
, temp
,
9670 modifier
== EXPAND_STACK_PARM
,
9679 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9682 case VEC_DUPLICATE_EXPR
:
9683 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9684 target
= expand_vector_broadcast (mode
, op0
);
9685 gcc_assert (target
);
9688 case VEC_SERIES_EXPR
:
9689 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9690 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9692 case BIT_INSERT_EXPR
:
9694 unsigned bitpos
= tree_to_uhwi (treeop2
);
9696 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9697 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9699 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9700 rtx op0
= expand_normal (treeop0
);
9701 rtx op1
= expand_normal (treeop1
);
9702 rtx dst
= gen_reg_rtx (mode
);
9703 emit_move_insn (dst
, op0
);
9704 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9705 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9713 /* Here to do an ordinary binary operator. */
9715 expand_operands (treeop0
, treeop1
,
9716 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9718 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9720 if (modifier
== EXPAND_STACK_PARM
)
9722 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9723 unsignedp
, OPTAB_LIB_WIDEN
);
9725 /* Bitwise operations do not need bitfield reduction as we expect their
9726 operands being properly truncated. */
9727 if (code
== BIT_XOR_EXPR
9728 || code
== BIT_AND_EXPR
9729 || code
== BIT_IOR_EXPR
)
9731 return REDUCE_BIT_FIELD (temp
);
9733 #undef REDUCE_BIT_FIELD
9736 /* Return TRUE if expression STMT is suitable for replacement.
9737 Never consider memory loads as replaceable, because those don't ever lead
9738 into constant expressions. */
9741 stmt_is_replaceable_p (gimple
*stmt
)
9743 if (ssa_is_replaceable_p (stmt
))
9745 /* Don't move around loads. */
9746 if (!gimple_assign_single_p (stmt
)
9747 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9754 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9755 enum expand_modifier modifier
, rtx
*alt_rtl
,
9756 bool inner_reference_p
)
9758 rtx op0
, op1
, temp
, decl_rtl
;
9761 machine_mode mode
, dmode
;
9762 enum tree_code code
= TREE_CODE (exp
);
9763 rtx subtarget
, original_target
;
9766 bool reduce_bit_field
;
9767 location_t loc
= EXPR_LOCATION (exp
);
9768 struct separate_ops ops
;
9769 tree treeop0
, treeop1
, treeop2
;
9770 tree ssa_name
= NULL_TREE
;
9773 type
= TREE_TYPE (exp
);
9774 mode
= TYPE_MODE (type
);
9775 unsignedp
= TYPE_UNSIGNED (type
);
9777 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9778 if (!VL_EXP_CLASS_P (exp
))
9779 switch (TREE_CODE_LENGTH (code
))
9782 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9783 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9784 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9794 ignore
= (target
== const0_rtx
9795 || ((CONVERT_EXPR_CODE_P (code
)
9796 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9797 && TREE_CODE (type
) == VOID_TYPE
));
9799 /* An operation in what may be a bit-field type needs the
9800 result to be reduced to the precision of the bit-field type,
9801 which is narrower than that of the type's mode. */
9802 reduce_bit_field
= (!ignore
9803 && INTEGRAL_TYPE_P (type
)
9804 && !type_has_mode_precision_p (type
));
9806 /* If we are going to ignore this result, we need only do something
9807 if there is a side-effect somewhere in the expression. If there
9808 is, short-circuit the most common cases here. Note that we must
9809 not call expand_expr with anything but const0_rtx in case this
9810 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9814 if (! TREE_SIDE_EFFECTS (exp
))
9817 /* Ensure we reference a volatile object even if value is ignored, but
9818 don't do this if all we are doing is taking its address. */
9819 if (TREE_THIS_VOLATILE (exp
)
9820 && TREE_CODE (exp
) != FUNCTION_DECL
9821 && mode
!= VOIDmode
&& mode
!= BLKmode
9822 && modifier
!= EXPAND_CONST_ADDRESS
)
9824 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9830 if (TREE_CODE_CLASS (code
) == tcc_unary
9831 || code
== BIT_FIELD_REF
9832 || code
== COMPONENT_REF
9833 || code
== INDIRECT_REF
)
9834 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9837 else if (TREE_CODE_CLASS (code
) == tcc_binary
9838 || TREE_CODE_CLASS (code
) == tcc_comparison
9839 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9841 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9842 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9849 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9852 /* Use subtarget as the target for operand 0 of a binary operation. */
9853 subtarget
= get_subtarget (target
);
9854 original_target
= target
;
9860 tree function
= decl_function_context (exp
);
9862 temp
= label_rtx (exp
);
9863 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9865 if (function
!= current_function_decl
9867 LABEL_REF_NONLOCAL_P (temp
) = 1;
9869 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9874 /* ??? ivopts calls expander, without any preparation from
9875 out-of-ssa. So fake instructions as if this was an access to the
9876 base variable. This unnecessarily allocates a pseudo, see how we can
9877 reuse it, if partition base vars have it set already. */
9878 if (!currently_expanding_to_rtl
)
9880 tree var
= SSA_NAME_VAR (exp
);
9881 if (var
&& DECL_RTL_SET_P (var
))
9882 return DECL_RTL (var
);
9883 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9884 LAST_VIRTUAL_REGISTER
+ 1);
9887 g
= get_gimple_for_ssa_name (exp
);
9888 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9890 && modifier
== EXPAND_INITIALIZER
9891 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9892 && (optimize
|| !SSA_NAME_VAR (exp
)
9893 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9894 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9895 g
= SSA_NAME_DEF_STMT (exp
);
9899 location_t saved_loc
= curr_insn_location ();
9900 location_t loc
= gimple_location (g
);
9901 if (loc
!= UNKNOWN_LOCATION
)
9902 set_curr_insn_location (loc
);
9903 ops
.code
= gimple_assign_rhs_code (g
);
9904 switch (get_gimple_rhs_class (ops
.code
))
9906 case GIMPLE_TERNARY_RHS
:
9907 ops
.op2
= gimple_assign_rhs3 (g
);
9909 case GIMPLE_BINARY_RHS
:
9910 ops
.op1
= gimple_assign_rhs2 (g
);
9912 /* Try to expand conditonal compare. */
9913 if (targetm
.gen_ccmp_first
)
9915 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9916 r
= expand_ccmp_expr (g
, mode
);
9921 case GIMPLE_UNARY_RHS
:
9922 ops
.op0
= gimple_assign_rhs1 (g
);
9923 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9925 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9927 case GIMPLE_SINGLE_RHS
:
9929 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9930 tmode
, modifier
, alt_rtl
,
9937 set_curr_insn_location (saved_loc
);
9938 if (REG_P (r
) && !REG_EXPR (r
))
9939 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9944 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9945 exp
= SSA_NAME_VAR (ssa_name
);
9946 goto expand_decl_rtl
;
9950 /* If a static var's type was incomplete when the decl was written,
9951 but the type is complete now, lay out the decl now. */
9952 if (DECL_SIZE (exp
) == 0
9953 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9954 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9955 layout_decl (exp
, 0);
9961 decl_rtl
= DECL_RTL (exp
);
9963 gcc_assert (decl_rtl
);
9965 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9966 settings for VECTOR_TYPE_P that might switch for the function. */
9967 if (currently_expanding_to_rtl
9968 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9969 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9970 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9972 decl_rtl
= copy_rtx (decl_rtl
);
9974 /* Record writes to register variables. */
9975 if (modifier
== EXPAND_WRITE
9977 && HARD_REGISTER_P (decl_rtl
))
9978 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9979 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9981 /* Ensure variable marked as used even if it doesn't go through
9982 a parser. If it hasn't be used yet, write out an external
9985 TREE_USED (exp
) = 1;
9987 /* Show we haven't gotten RTL for this yet. */
9990 /* Variables inherited from containing functions should have
9991 been lowered by this point. */
9993 context
= decl_function_context (exp
);
9995 || SCOPE_FILE_SCOPE_P (context
)
9996 || context
== current_function_decl
9997 || TREE_STATIC (exp
)
9998 || DECL_EXTERNAL (exp
)
9999 /* ??? C++ creates functions that are not TREE_STATIC. */
10000 || TREE_CODE (exp
) == FUNCTION_DECL
);
10002 /* This is the case of an array whose size is to be determined
10003 from its initializer, while the initializer is still being parsed.
10004 ??? We aren't parsing while expanding anymore. */
10006 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10007 temp
= validize_mem (decl_rtl
);
10009 /* If DECL_RTL is memory, we are in the normal case and the
10010 address is not valid, get the address into a register. */
10012 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10015 *alt_rtl
= decl_rtl
;
10016 decl_rtl
= use_anchored_address (decl_rtl
);
10017 if (modifier
!= EXPAND_CONST_ADDRESS
10018 && modifier
!= EXPAND_SUM
10019 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10020 : GET_MODE (decl_rtl
),
10021 XEXP (decl_rtl
, 0),
10022 MEM_ADDR_SPACE (decl_rtl
)))
10023 temp
= replace_equiv_address (decl_rtl
,
10024 copy_rtx (XEXP (decl_rtl
, 0)));
10027 /* If we got something, return it. But first, set the alignment
10028 if the address is a register. */
10031 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10032 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10038 dmode
= DECL_MODE (exp
);
10040 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10042 /* If the mode of DECL_RTL does not match that of the decl,
10043 there are two cases: we are dealing with a BLKmode value
10044 that is returned in a register, or we are dealing with
10045 a promoted value. In the latter case, return a SUBREG
10046 of the wanted mode, but mark it so that we know that it
10047 was already extended. */
10048 if (REG_P (decl_rtl
)
10049 && dmode
!= BLKmode
10050 && GET_MODE (decl_rtl
) != dmode
)
10052 machine_mode pmode
;
10054 /* Get the signedness to be used for this variable. Ensure we get
10055 the same mode we got when the variable was declared. */
10056 if (code
!= SSA_NAME
)
10057 pmode
= promote_decl_mode (exp
, &unsignedp
);
10058 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10059 && gimple_code (g
) == GIMPLE_CALL
10060 && !gimple_call_internal_p (g
))
10061 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10062 gimple_call_fntype (g
),
10065 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10066 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10068 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10069 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10070 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10078 /* Given that TYPE_PRECISION (type) is not always equal to
10079 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10080 the former to the latter according to the signedness of the
10082 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10083 temp
= immed_wide_int_const
10084 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10090 tree tmp
= NULL_TREE
;
10091 if (VECTOR_MODE_P (mode
))
10092 return const_vector_from_tree (exp
);
10093 scalar_int_mode int_mode
;
10094 if (is_int_mode (mode
, &int_mode
))
10096 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10097 return const_scalar_mask_from_tree (int_mode
, exp
);
10101 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10103 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10104 type_for_mode
, exp
);
10109 vec
<constructor_elt
, va_gc
> *v
;
10110 /* Constructors need to be fixed-length. FIXME. */
10111 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10112 vec_alloc (v
, nunits
);
10113 for (unsigned int i
= 0; i
< nunits
; ++i
)
10114 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10115 tmp
= build_constructor (type
, v
);
10117 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10122 if (modifier
== EXPAND_WRITE
)
10124 /* Writing into CONST_DECL is always invalid, but handle it
10126 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10127 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10128 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10129 EXPAND_NORMAL
, as
);
10130 op0
= memory_address_addr_space (mode
, op0
, as
);
10131 temp
= gen_rtx_MEM (mode
, op0
);
10132 set_mem_addr_space (temp
, as
);
10135 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10138 /* If optimized, generate immediate CONST_DOUBLE
10139 which will be turned into memory by reload if necessary.
10141 We used to force a register so that loop.c could see it. But
10142 this does not allow gen_* patterns to perform optimizations with
10143 the constants. It also produces two insns in cases like "x = 1.0;".
10144 On most machines, floating-point constants are not permitted in
10145 many insns, so we'd end up copying it to a register in any case.
10147 Now, we do the copying in expand_binop, if appropriate. */
10148 return const_double_from_real_value (TREE_REAL_CST (exp
),
10149 TYPE_MODE (TREE_TYPE (exp
)));
10152 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10153 TYPE_MODE (TREE_TYPE (exp
)));
10156 /* Handle evaluating a complex constant in a CONCAT target. */
10157 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10159 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10162 rtarg
= XEXP (original_target
, 0);
10163 itarg
= XEXP (original_target
, 1);
10165 /* Move the real and imaginary parts separately. */
10166 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10167 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10170 emit_move_insn (rtarg
, op0
);
10172 emit_move_insn (itarg
, op1
);
10174 return original_target
;
10180 temp
= expand_expr_constant (exp
, 1, modifier
);
10182 /* temp contains a constant address.
10183 On RISC machines where a constant address isn't valid,
10184 make some insns to get that address into a register. */
10185 if (modifier
!= EXPAND_CONST_ADDRESS
10186 && modifier
!= EXPAND_INITIALIZER
10187 && modifier
!= EXPAND_SUM
10188 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10189 MEM_ADDR_SPACE (temp
)))
10190 return replace_equiv_address (temp
,
10191 copy_rtx (XEXP (temp
, 0)));
10195 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10199 tree val
= treeop0
;
10200 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10201 inner_reference_p
);
10203 if (!SAVE_EXPR_RESOLVED_P (exp
))
10205 /* We can indeed still hit this case, typically via builtin
10206 expanders calling save_expr immediately before expanding
10207 something. Assume this means that we only have to deal
10208 with non-BLKmode values. */
10209 gcc_assert (GET_MODE (ret
) != BLKmode
);
10211 val
= build_decl (curr_insn_location (),
10212 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10213 DECL_ARTIFICIAL (val
) = 1;
10214 DECL_IGNORED_P (val
) = 1;
10216 TREE_OPERAND (exp
, 0) = treeop0
;
10217 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10219 if (!CONSTANT_P (ret
))
10220 ret
= copy_to_reg (ret
);
10221 SET_DECL_RTL (val
, ret
);
10229 /* If we don't need the result, just ensure we evaluate any
10233 unsigned HOST_WIDE_INT idx
;
10236 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10237 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10242 return expand_constructor (exp
, target
, modifier
, false);
10244 case TARGET_MEM_REF
:
10247 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10248 enum insn_code icode
;
10249 unsigned int align
;
10251 op0
= addr_for_mem_ref (exp
, as
, true);
10252 op0
= memory_address_addr_space (mode
, op0
, as
);
10253 temp
= gen_rtx_MEM (mode
, op0
);
10254 set_mem_attributes (temp
, exp
, 0);
10255 set_mem_addr_space (temp
, as
);
10256 align
= get_object_alignment (exp
);
10257 if (modifier
!= EXPAND_WRITE
10258 && modifier
!= EXPAND_MEMORY
10260 && align
< GET_MODE_ALIGNMENT (mode
)
10261 /* If the target does not have special handling for unaligned
10262 loads of mode then it can use regular moves for them. */
10263 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10264 != CODE_FOR_nothing
))
10266 struct expand_operand ops
[2];
10268 /* We've already validated the memory, and we're creating a
10269 new pseudo destination. The predicates really can't fail,
10270 nor can the generator. */
10271 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10272 create_fixed_operand (&ops
[1], temp
);
10273 expand_insn (icode
, 2, ops
);
10274 temp
= ops
[0].value
;
10281 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10283 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10284 machine_mode address_mode
;
10285 tree base
= TREE_OPERAND (exp
, 0);
10287 enum insn_code icode
;
10289 /* Handle expansion of non-aliased memory with non-BLKmode. That
10290 might end up in a register. */
10291 if (mem_ref_refers_to_non_mem_p (exp
))
10293 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10294 base
= TREE_OPERAND (base
, 0);
10295 if (known_eq (offset
, 0)
10297 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10298 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)),
10299 tree_to_uhwi (TYPE_SIZE (type
))))
10300 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10301 target
, tmode
, modifier
);
10302 if (TYPE_MODE (type
) == BLKmode
)
10304 temp
= assign_stack_temp (DECL_MODE (base
),
10305 GET_MODE_SIZE (DECL_MODE (base
)));
10306 store_expr (base
, temp
, 0, false, false);
10307 temp
= adjust_address (temp
, BLKmode
, offset
);
10308 set_mem_size (temp
, int_size_in_bytes (type
));
10311 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10312 bitsize_int (offset
* BITS_PER_UNIT
));
10313 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10314 return expand_expr (exp
, target
, tmode
, modifier
);
10316 address_mode
= targetm
.addr_space
.address_mode (as
);
10317 base
= TREE_OPERAND (exp
, 0);
10318 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10320 tree mask
= gimple_assign_rhs2 (def_stmt
);
10321 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10322 gimple_assign_rhs1 (def_stmt
), mask
);
10323 TREE_OPERAND (exp
, 0) = base
;
10325 align
= get_object_alignment (exp
);
10326 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10327 op0
= memory_address_addr_space (mode
, op0
, as
);
10328 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10330 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10331 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10332 op0
= memory_address_addr_space (mode
, op0
, as
);
10334 temp
= gen_rtx_MEM (mode
, op0
);
10335 set_mem_attributes (temp
, exp
, 0);
10336 set_mem_addr_space (temp
, as
);
10337 if (TREE_THIS_VOLATILE (exp
))
10338 MEM_VOLATILE_P (temp
) = 1;
10339 if (modifier
!= EXPAND_WRITE
10340 && modifier
!= EXPAND_MEMORY
10341 && !inner_reference_p
10343 && align
< GET_MODE_ALIGNMENT (mode
))
10345 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10346 != CODE_FOR_nothing
)
10348 struct expand_operand ops
[2];
10350 /* We've already validated the memory, and we're creating a
10351 new pseudo destination. The predicates really can't fail,
10352 nor can the generator. */
10353 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10354 create_fixed_operand (&ops
[1], temp
);
10355 expand_insn (icode
, 2, ops
);
10356 temp
= ops
[0].value
;
10358 else if (targetm
.slow_unaligned_access (mode
, align
))
10359 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10360 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10361 (modifier
== EXPAND_STACK_PARM
10362 ? NULL_RTX
: target
),
10363 mode
, mode
, false, alt_rtl
);
10366 && modifier
!= EXPAND_MEMORY
10367 && modifier
!= EXPAND_WRITE
)
10368 temp
= flip_storage_order (mode
, temp
);
10375 tree array
= treeop0
;
10376 tree index
= treeop1
;
10379 /* Fold an expression like: "foo"[2].
10380 This is not done in fold so it won't happen inside &.
10381 Don't fold if this is for wide characters since it's too
10382 difficult to do correctly and this is a very rare case. */
10384 if (modifier
!= EXPAND_CONST_ADDRESS
10385 && modifier
!= EXPAND_INITIALIZER
10386 && modifier
!= EXPAND_MEMORY
)
10388 tree t
= fold_read_from_constant_string (exp
);
10391 return expand_expr (t
, target
, tmode
, modifier
);
10394 /* If this is a constant index into a constant array,
10395 just get the value from the array. Handle both the cases when
10396 we have an explicit constructor and when our operand is a variable
10397 that was declared const. */
10399 if (modifier
!= EXPAND_CONST_ADDRESS
10400 && modifier
!= EXPAND_INITIALIZER
10401 && modifier
!= EXPAND_MEMORY
10402 && TREE_CODE (array
) == CONSTRUCTOR
10403 && ! TREE_SIDE_EFFECTS (array
)
10404 && TREE_CODE (index
) == INTEGER_CST
)
10406 unsigned HOST_WIDE_INT ix
;
10409 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10411 if (tree_int_cst_equal (field
, index
))
10413 if (!TREE_SIDE_EFFECTS (value
))
10414 return expand_expr (fold (value
), target
, tmode
, modifier
);
10419 else if (optimize
>= 1
10420 && modifier
!= EXPAND_CONST_ADDRESS
10421 && modifier
!= EXPAND_INITIALIZER
10422 && modifier
!= EXPAND_MEMORY
10423 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10424 && TREE_CODE (index
) == INTEGER_CST
10425 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10426 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10428 if (init
== NULL_TREE
)
10430 tree value
= build_zero_cst (type
);
10431 if (TREE_CODE (value
) == CONSTRUCTOR
)
10433 /* If VALUE is a CONSTRUCTOR, this optimization is only
10434 useful if this doesn't store the CONSTRUCTOR into
10435 memory. If it does, it is more efficient to just
10436 load the data from the array directly. */
10437 rtx ret
= expand_constructor (value
, target
,
10439 if (ret
== NULL_RTX
)
10444 return expand_expr (value
, target
, tmode
, modifier
);
10446 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10448 unsigned HOST_WIDE_INT ix
;
10451 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10453 if (tree_int_cst_equal (field
, index
))
10455 if (TREE_SIDE_EFFECTS (value
))
10458 if (TREE_CODE (value
) == CONSTRUCTOR
)
10460 /* If VALUE is a CONSTRUCTOR, this
10461 optimization is only useful if
10462 this doesn't store the CONSTRUCTOR
10463 into memory. If it does, it is more
10464 efficient to just load the data from
10465 the array directly. */
10466 rtx ret
= expand_constructor (value
, target
,
10468 if (ret
== NULL_RTX
)
10473 expand_expr (fold (value
), target
, tmode
, modifier
);
10476 else if (TREE_CODE (init
) == STRING_CST
)
10478 tree low_bound
= array_ref_low_bound (exp
);
10479 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10481 /* Optimize the special case of a zero lower bound.
10483 We convert the lower bound to sizetype to avoid problems
10484 with constant folding. E.g. suppose the lower bound is
10485 1 and its mode is QI. Without the conversion
10486 (ARRAY + (INDEX - (unsigned char)1))
10488 (ARRAY + (-(unsigned char)1) + INDEX)
10490 (ARRAY + 255 + INDEX). Oops! */
10491 if (!integer_zerop (low_bound
))
10492 index1
= size_diffop_loc (loc
, index1
,
10493 fold_convert_loc (loc
, sizetype
,
10496 if (tree_fits_uhwi_p (index1
)
10497 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10499 tree type
= TREE_TYPE (TREE_TYPE (init
));
10500 scalar_int_mode mode
;
10502 if (is_int_mode (TYPE_MODE (type
), &mode
)
10503 && GET_MODE_SIZE (mode
) == 1)
10504 return gen_int_mode (TREE_STRING_POINTER (init
)
10505 [TREE_INT_CST_LOW (index1
)],
10511 goto normal_inner_ref
;
10513 case COMPONENT_REF
:
10514 /* If the operand is a CONSTRUCTOR, we can just extract the
10515 appropriate field if it is present. */
10516 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10518 unsigned HOST_WIDE_INT idx
;
10520 scalar_int_mode field_mode
;
10522 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10524 if (field
== treeop1
10525 /* We can normally use the value of the field in the
10526 CONSTRUCTOR. However, if this is a bitfield in
10527 an integral mode that we can fit in a HOST_WIDE_INT,
10528 we must mask only the number of bits in the bitfield,
10529 since this is done implicitly by the constructor. If
10530 the bitfield does not meet either of those conditions,
10531 we can't do this optimization. */
10532 && (! DECL_BIT_FIELD (field
)
10533 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10534 && (GET_MODE_PRECISION (field_mode
)
10535 <= HOST_BITS_PER_WIDE_INT
))))
10537 if (DECL_BIT_FIELD (field
)
10538 && modifier
== EXPAND_STACK_PARM
)
10540 op0
= expand_expr (value
, target
, tmode
, modifier
);
10541 if (DECL_BIT_FIELD (field
))
10543 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10544 scalar_int_mode imode
10545 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10547 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10549 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10551 op0
= expand_and (imode
, op0
, op1
, target
);
10555 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10557 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10559 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10567 goto normal_inner_ref
;
10569 case BIT_FIELD_REF
:
10570 case ARRAY_RANGE_REF
:
10573 machine_mode mode1
, mode2
;
10574 poly_int64 bitsize
, bitpos
, bytepos
;
10576 int reversep
, volatilep
= 0, must_force_mem
;
10578 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10579 &unsignedp
, &reversep
, &volatilep
);
10580 rtx orig_op0
, memloc
;
10581 bool clear_mem_expr
= false;
10583 /* If we got back the original object, something is wrong. Perhaps
10584 we are evaluating an expression too early. In any event, don't
10585 infinitely recurse. */
10586 gcc_assert (tem
!= exp
);
10588 /* If TEM's type is a union of variable size, pass TARGET to the inner
10589 computation, since it will need a temporary and TARGET is known
10590 to have to do. This occurs in unchecked conversion in Ada. */
10592 = expand_expr_real (tem
,
10593 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10594 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10595 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10597 && modifier
!= EXPAND_STACK_PARM
10598 ? target
: NULL_RTX
),
10600 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10603 /* If the field has a mode, we want to access it in the
10604 field's mode, not the computed mode.
10605 If a MEM has VOIDmode (external with incomplete type),
10606 use BLKmode for it instead. */
10609 if (mode1
!= VOIDmode
)
10610 op0
= adjust_address (op0
, mode1
, 0);
10611 else if (GET_MODE (op0
) == VOIDmode
)
10612 op0
= adjust_address (op0
, BLKmode
, 0);
10616 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10618 /* If we have either an offset, a BLKmode result, or a reference
10619 outside the underlying object, we must force it to memory.
10620 Such a case can occur in Ada if we have unchecked conversion
10621 of an expression from a scalar type to an aggregate type or
10622 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10623 passed a partially uninitialized object or a view-conversion
10624 to a larger size. */
10625 must_force_mem
= (offset
10626 || mode1
== BLKmode
10627 || maybe_gt (bitpos
+ bitsize
,
10628 GET_MODE_BITSIZE (mode2
)));
10630 /* Handle CONCAT first. */
10631 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10633 if (known_eq (bitpos
, 0)
10634 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10635 && COMPLEX_MODE_P (mode1
)
10636 && COMPLEX_MODE_P (GET_MODE (op0
))
10637 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10638 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10641 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10642 if (mode1
!= GET_MODE (op0
))
10645 for (int i
= 0; i
< 2; i
++)
10647 rtx op
= read_complex_part (op0
, i
!= 0);
10648 if (GET_CODE (op
) == SUBREG
)
10649 op
= force_reg (GET_MODE (op
), op
);
10650 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10656 if (!REG_P (op
) && !MEM_P (op
))
10657 op
= force_reg (GET_MODE (op
), op
);
10658 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10662 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10666 if (known_eq (bitpos
, 0)
10667 && known_eq (bitsize
,
10668 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10669 && maybe_ne (bitsize
, 0))
10671 op0
= XEXP (op0
, 0);
10672 mode2
= GET_MODE (op0
);
10674 else if (known_eq (bitpos
,
10675 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10676 && known_eq (bitsize
,
10677 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10678 && maybe_ne (bitpos
, 0)
10679 && maybe_ne (bitsize
, 0))
10681 op0
= XEXP (op0
, 1);
10683 mode2
= GET_MODE (op0
);
10686 /* Otherwise force into memory. */
10687 must_force_mem
= 1;
10690 /* If this is a constant, put it in a register if it is a legitimate
10691 constant and we don't need a memory reference. */
10692 if (CONSTANT_P (op0
)
10693 && mode2
!= BLKmode
10694 && targetm
.legitimate_constant_p (mode2
, op0
)
10695 && !must_force_mem
)
10696 op0
= force_reg (mode2
, op0
);
10698 /* Otherwise, if this is a constant, try to force it to the constant
10699 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10700 is a legitimate constant. */
10701 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10702 op0
= validize_mem (memloc
);
10704 /* Otherwise, if this is a constant or the object is not in memory
10705 and need be, put it there. */
10706 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10708 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10709 emit_move_insn (memloc
, op0
);
10711 clear_mem_expr
= true;
10716 machine_mode address_mode
;
10717 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10720 gcc_assert (MEM_P (op0
));
10722 address_mode
= get_address_mode (op0
);
10723 if (GET_MODE (offset_rtx
) != address_mode
)
10725 /* We cannot be sure that the RTL in offset_rtx is valid outside
10726 of a memory address context, so force it into a register
10727 before attempting to convert it to the desired mode. */
10728 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10729 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10732 /* See the comment in expand_assignment for the rationale. */
10733 if (mode1
!= VOIDmode
10734 && maybe_ne (bitpos
, 0)
10735 && maybe_gt (bitsize
, 0)
10736 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10737 && multiple_p (bitpos
, bitsize
)
10738 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10739 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10741 op0
= adjust_address (op0
, mode1
, bytepos
);
10745 op0
= offset_address (op0
, offset_rtx
,
10746 highest_pow2_factor (offset
));
10749 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10750 record its alignment as BIGGEST_ALIGNMENT. */
10752 && known_eq (bitpos
, 0)
10754 && is_aligning_offset (offset
, tem
))
10755 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10757 /* Don't forget about volatility even if this is a bitfield. */
10758 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10760 if (op0
== orig_op0
)
10761 op0
= copy_rtx (op0
);
10763 MEM_VOLATILE_P (op0
) = 1;
10766 /* In cases where an aligned union has an unaligned object
10767 as a field, we might be extracting a BLKmode value from
10768 an integer-mode (e.g., SImode) object. Handle this case
10769 by doing the extract into an object as wide as the field
10770 (which we know to be the width of a basic mode), then
10771 storing into memory, and changing the mode to BLKmode. */
10772 if (mode1
== VOIDmode
10773 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10774 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10775 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10776 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10777 && modifier
!= EXPAND_CONST_ADDRESS
10778 && modifier
!= EXPAND_INITIALIZER
10779 && modifier
!= EXPAND_MEMORY
)
10780 /* If the bitfield is volatile and the bitsize
10781 is narrower than the access size of the bitfield,
10782 we need to extract bitfields from the access. */
10783 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10784 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10785 && mode1
!= BLKmode
10786 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10787 /* If the field isn't aligned enough to fetch as a memref,
10788 fetch it as a bit field. */
10789 || (mode1
!= BLKmode
10791 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10792 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10793 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10794 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10795 && modifier
!= EXPAND_MEMORY
10796 && ((modifier
== EXPAND_CONST_ADDRESS
10797 || modifier
== EXPAND_INITIALIZER
)
10799 : targetm
.slow_unaligned_access (mode1
,
10801 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10802 /* If the type and the field are a constant size and the
10803 size of the type isn't the same size as the bitfield,
10804 we must use bitfield operations. */
10805 || (known_size_p (bitsize
)
10806 && TYPE_SIZE (TREE_TYPE (exp
))
10807 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10808 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10811 machine_mode ext_mode
= mode
;
10813 if (ext_mode
== BLKmode
10814 && ! (target
!= 0 && MEM_P (op0
)
10816 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10817 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10819 if (ext_mode
== BLKmode
)
10822 target
= assign_temp (type
, 1, 1);
10824 /* ??? Unlike the similar test a few lines below, this one is
10825 very likely obsolete. */
10826 if (known_eq (bitsize
, 0))
10829 /* In this case, BITPOS must start at a byte boundary and
10830 TARGET, if specified, must be a MEM. */
10831 gcc_assert (MEM_P (op0
)
10832 && (!target
|| MEM_P (target
)));
10834 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10835 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10836 emit_block_move (target
,
10837 adjust_address (op0
, VOIDmode
, bytepos
),
10838 gen_int_mode (bytesize
, Pmode
),
10839 (modifier
== EXPAND_STACK_PARM
10840 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10845 /* If we have nothing to extract, the result will be 0 for targets
10846 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10847 return 0 for the sake of consistency, as reading a zero-sized
10848 bitfield is valid in Ada and the value is fully specified. */
10849 if (known_eq (bitsize
, 0))
10852 op0
= validize_mem (op0
);
10854 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10855 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10857 /* If the result has a record type and the extraction is done in
10858 an integral mode, then the field may be not aligned on a byte
10859 boundary; in this case, if it has reverse storage order, it
10860 needs to be extracted as a scalar field with reverse storage
10861 order and put back into memory order afterwards. */
10862 if (TREE_CODE (type
) == RECORD_TYPE
10863 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10864 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10866 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10867 (modifier
== EXPAND_STACK_PARM
10868 ? NULL_RTX
: target
),
10869 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10871 /* If the result has a record type and the mode of OP0 is an
10872 integral mode then, if BITSIZE is narrower than this mode
10873 and this is for big-endian data, we must put the field
10874 into the high-order bits. And we must also put it back
10875 into memory order if it has been previously reversed. */
10876 scalar_int_mode op0_mode
;
10877 if (TREE_CODE (type
) == RECORD_TYPE
10878 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10880 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10882 gcc_checking_assert (known_le (bitsize
, size
));
10883 if (maybe_lt (bitsize
, size
)
10884 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10885 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10886 size
- bitsize
, op0
, 1);
10889 op0
= flip_storage_order (op0_mode
, op0
);
10892 /* If the result type is BLKmode, store the data into a temporary
10893 of the appropriate type, but with the mode corresponding to the
10894 mode for the data we have (op0's mode). */
10895 if (mode
== BLKmode
)
10898 = assign_stack_temp_for_type (ext_mode
,
10899 GET_MODE_BITSIZE (ext_mode
),
10901 emit_move_insn (new_rtx
, op0
);
10902 op0
= copy_rtx (new_rtx
);
10903 PUT_MODE (op0
, BLKmode
);
10909 /* If the result is BLKmode, use that to access the object
10911 if (mode
== BLKmode
)
10914 /* Get a reference to just this component. */
10915 bytepos
= bits_to_bytes_round_down (bitpos
);
10916 if (modifier
== EXPAND_CONST_ADDRESS
10917 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10918 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10920 op0
= adjust_address (op0
, mode1
, bytepos
);
10922 if (op0
== orig_op0
)
10923 op0
= copy_rtx (op0
);
10925 /* Don't set memory attributes if the base expression is
10926 SSA_NAME that got expanded as a MEM. In that case, we should
10927 just honor its original memory attributes. */
10928 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10929 set_mem_attributes (op0
, exp
, 0);
10931 if (REG_P (XEXP (op0
, 0)))
10932 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10934 /* If op0 is a temporary because the original expressions was forced
10935 to memory, clear MEM_EXPR so that the original expression cannot
10936 be marked as addressable through MEM_EXPR of the temporary. */
10937 if (clear_mem_expr
)
10938 set_mem_expr (op0
, NULL_TREE
);
10940 MEM_VOLATILE_P (op0
) |= volatilep
;
10943 && modifier
!= EXPAND_MEMORY
10944 && modifier
!= EXPAND_WRITE
)
10945 op0
= flip_storage_order (mode1
, op0
);
10947 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10948 || modifier
== EXPAND_CONST_ADDRESS
10949 || modifier
== EXPAND_INITIALIZER
)
10953 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10955 convert_move (target
, op0
, unsignedp
);
10960 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10963 /* All valid uses of __builtin_va_arg_pack () are removed during
10965 if (CALL_EXPR_VA_ARG_PACK (exp
))
10966 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10968 tree fndecl
= get_callee_fndecl (exp
), attr
;
10971 /* Don't diagnose the error attribute in thunks, those are
10972 artificially created. */
10973 && !CALL_FROM_THUNK_P (exp
)
10974 && (attr
= lookup_attribute ("error",
10975 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10977 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10978 error ("%Kcall to %qs declared with attribute error: %s", exp
,
10979 identifier_to_locale (ident
),
10980 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10983 /* Don't diagnose the warning attribute in thunks, those are
10984 artificially created. */
10985 && !CALL_FROM_THUNK_P (exp
)
10986 && (attr
= lookup_attribute ("warning",
10987 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10989 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10990 warning_at (tree_nonartificial_location (exp
), 0,
10991 "%Kcall to %qs declared with attribute warning: %s",
10992 exp
, identifier_to_locale (ident
),
10993 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10996 /* Check for a built-in function. */
10997 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10999 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11000 if (CALL_WITH_BOUNDS_P (exp
))
11001 return expand_builtin_with_bounds (exp
, target
, subtarget
,
11004 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11007 return expand_call (exp
, target
, ignore
);
11009 case VIEW_CONVERT_EXPR
:
11012 /* If we are converting to BLKmode, try to avoid an intermediate
11013 temporary by fetching an inner memory reference. */
11014 if (mode
== BLKmode
11015 && poly_int_tree_p (TYPE_SIZE (type
))
11016 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11017 && handled_component_p (treeop0
))
11019 machine_mode mode1
;
11020 poly_int64 bitsize
, bitpos
, bytepos
;
11022 int unsignedp
, reversep
, volatilep
= 0;
11024 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11025 &unsignedp
, &reversep
, &volatilep
);
11028 /* ??? We should work harder and deal with non-zero offsets. */
11030 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11032 && known_size_p (bitsize
)
11033 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11035 /* See the normal_inner_ref case for the rationale. */
11037 = expand_expr_real (tem
,
11038 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11039 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11041 && modifier
!= EXPAND_STACK_PARM
11042 ? target
: NULL_RTX
),
11044 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11047 if (MEM_P (orig_op0
))
11051 /* Get a reference to just this component. */
11052 if (modifier
== EXPAND_CONST_ADDRESS
11053 || modifier
== EXPAND_SUM
11054 || modifier
== EXPAND_INITIALIZER
)
11055 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11057 op0
= adjust_address (op0
, mode
, bytepos
);
11059 if (op0
== orig_op0
)
11060 op0
= copy_rtx (op0
);
11062 set_mem_attributes (op0
, treeop0
, 0);
11063 if (REG_P (XEXP (op0
, 0)))
11064 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11066 MEM_VOLATILE_P (op0
) |= volatilep
;
11072 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11073 NULL
, inner_reference_p
);
11075 /* If the input and output modes are both the same, we are done. */
11076 if (mode
== GET_MODE (op0
))
11078 /* If neither mode is BLKmode, and both modes are the same size
11079 then we can use gen_lowpart. */
11080 else if (mode
!= BLKmode
11081 && GET_MODE (op0
) != BLKmode
11082 && known_eq (GET_MODE_PRECISION (mode
),
11083 GET_MODE_PRECISION (GET_MODE (op0
)))
11084 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11086 if (GET_CODE (op0
) == SUBREG
)
11087 op0
= force_reg (GET_MODE (op0
), op0
);
11088 temp
= gen_lowpart_common (mode
, op0
);
11093 if (!REG_P (op0
) && !MEM_P (op0
))
11094 op0
= force_reg (GET_MODE (op0
), op0
);
11095 op0
= gen_lowpart (mode
, op0
);
11098 /* If both types are integral, convert from one mode to the other. */
11099 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11100 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11101 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11102 /* If the output type is a bit-field type, do an extraction. */
11103 else if (reduce_bit_field
)
11104 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11105 TYPE_UNSIGNED (type
), NULL_RTX
,
11106 mode
, mode
, false, NULL
);
11107 /* As a last resort, spill op0 to memory, and reload it in a
11109 else if (!MEM_P (op0
))
11111 /* If the operand is not a MEM, force it into memory. Since we
11112 are going to be changing the mode of the MEM, don't call
11113 force_const_mem for constants because we don't allow pool
11114 constants to change mode. */
11115 tree inner_type
= TREE_TYPE (treeop0
);
11117 gcc_assert (!TREE_ADDRESSABLE (exp
));
11119 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11121 = assign_stack_temp_for_type
11122 (TYPE_MODE (inner_type
),
11123 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11125 emit_move_insn (target
, op0
);
11129 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11130 output type is such that the operand is known to be aligned, indicate
11131 that it is. Otherwise, we need only be concerned about alignment for
11132 non-BLKmode results. */
11135 enum insn_code icode
;
11137 if (modifier
!= EXPAND_WRITE
11138 && modifier
!= EXPAND_MEMORY
11139 && !inner_reference_p
11141 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11143 /* If the target does have special handling for unaligned
11144 loads of mode then use them. */
11145 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11146 != CODE_FOR_nothing
)
11150 op0
= adjust_address (op0
, mode
, 0);
11151 /* We've already validated the memory, and we're creating a
11152 new pseudo destination. The predicates really can't
11154 reg
= gen_reg_rtx (mode
);
11156 /* Nor can the insn generator. */
11157 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11161 else if (STRICT_ALIGNMENT
)
11163 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11164 poly_uint64 temp_size
= mode_size
;
11165 if (GET_MODE (op0
) != BLKmode
)
11166 temp_size
= upper_bound (temp_size
,
11167 GET_MODE_SIZE (GET_MODE (op0
)));
11169 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11170 rtx new_with_op0_mode
11171 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11173 gcc_assert (!TREE_ADDRESSABLE (exp
));
11175 if (GET_MODE (op0
) == BLKmode
)
11177 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11178 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11179 (modifier
== EXPAND_STACK_PARM
11180 ? BLOCK_OP_CALL_PARM
11181 : BLOCK_OP_NORMAL
));
11184 emit_move_insn (new_with_op0_mode
, op0
);
11190 op0
= adjust_address (op0
, mode
, 0);
11197 tree lhs
= treeop0
;
11198 tree rhs
= treeop1
;
11199 gcc_assert (ignore
);
11201 /* Check for |= or &= of a bitfield of size one into another bitfield
11202 of size 1. In this case, (unless we need the result of the
11203 assignment) we can do this more efficiently with a
11204 test followed by an assignment, if necessary.
11206 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11207 things change so we do, this code should be enhanced to
11209 if (TREE_CODE (lhs
) == COMPONENT_REF
11210 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11211 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11212 && TREE_OPERAND (rhs
, 0) == lhs
11213 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11214 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11215 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11217 rtx_code_label
*label
= gen_label_rtx ();
11218 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11219 do_jump (TREE_OPERAND (rhs
, 1),
11222 profile_probability::uninitialized ());
11223 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11225 do_pending_stack_adjust ();
11226 emit_label (label
);
11230 expand_assignment (lhs
, rhs
, false);
11235 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11237 case REALPART_EXPR
:
11238 op0
= expand_normal (treeop0
);
11239 return read_complex_part (op0
, false);
11241 case IMAGPART_EXPR
:
11242 op0
= expand_normal (treeop0
);
11243 return read_complex_part (op0
, true);
11250 /* Expanded in cfgexpand.c. */
11251 gcc_unreachable ();
11253 case TRY_CATCH_EXPR
:
11255 case EH_FILTER_EXPR
:
11256 case TRY_FINALLY_EXPR
:
11257 /* Lowered by tree-eh.c. */
11258 gcc_unreachable ();
11260 case WITH_CLEANUP_EXPR
:
11261 case CLEANUP_POINT_EXPR
:
11263 case CASE_LABEL_EXPR
:
11268 case COMPOUND_EXPR
:
11269 case PREINCREMENT_EXPR
:
11270 case PREDECREMENT_EXPR
:
11271 case POSTINCREMENT_EXPR
:
11272 case POSTDECREMENT_EXPR
:
11275 case COMPOUND_LITERAL_EXPR
:
11276 /* Lowered by gimplify.c. */
11277 gcc_unreachable ();
11280 /* Function descriptors are not valid except for as
11281 initialization constants, and should not be expanded. */
11282 gcc_unreachable ();
11284 case WITH_SIZE_EXPR
:
11285 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11286 have pulled out the size to use in whatever context it needed. */
11287 return expand_expr_real (treeop0
, original_target
, tmode
,
11288 modifier
, alt_rtl
, inner_reference_p
);
11291 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11295 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11296 signedness of TYPE), possibly returning the result in TARGET.
11297 TYPE is known to be a partial integer type. */
11299 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11301 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11302 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11304 /* For constant values, reduce using build_int_cst_type. */
11305 if (CONST_INT_P (exp
))
11307 HOST_WIDE_INT value
= INTVAL (exp
);
11308 tree t
= build_int_cst_type (type
, value
);
11309 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11311 else if (TYPE_UNSIGNED (type
))
11313 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11314 rtx mask
= immed_wide_int_const
11315 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11316 return expand_and (mode
, exp
, mask
, target
);
11320 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11321 int count
= GET_MODE_PRECISION (mode
) - prec
;
11322 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11323 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11327 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11328 when applied to the address of EXP produces an address known to be
11329 aligned more than BIGGEST_ALIGNMENT. */
11332 is_aligning_offset (const_tree offset
, const_tree exp
)
11334 /* Strip off any conversions. */
11335 while (CONVERT_EXPR_P (offset
))
11336 offset
= TREE_OPERAND (offset
, 0);
11338 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11339 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11340 if (TREE_CODE (offset
) != BIT_AND_EXPR
11341 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11342 || compare_tree_int (TREE_OPERAND (offset
, 1),
11343 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11344 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11347 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11348 It must be NEGATE_EXPR. Then strip any more conversions. */
11349 offset
= TREE_OPERAND (offset
, 0);
11350 while (CONVERT_EXPR_P (offset
))
11351 offset
= TREE_OPERAND (offset
, 0);
11353 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11356 offset
= TREE_OPERAND (offset
, 0);
11357 while (CONVERT_EXPR_P (offset
))
11358 offset
= TREE_OPERAND (offset
, 0);
11360 /* This must now be the address of EXP. */
11361 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11364 /* Return the tree node if an ARG corresponds to a string constant or zero
11365 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11366 in bytes within the string that ARG is accessing. The type of the
11367 offset will be `sizetype'. */
11370 string_constant (tree arg
, tree
*ptr_offset
)
11372 tree array
, offset
, lower_bound
;
11375 if (TREE_CODE (arg
) == ADDR_EXPR
)
11377 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11379 *ptr_offset
= size_zero_node
;
11380 return TREE_OPERAND (arg
, 0);
11382 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11384 array
= TREE_OPERAND (arg
, 0);
11385 offset
= size_zero_node
;
11387 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11389 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11390 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11391 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11394 /* Check if the array has a nonzero lower bound. */
11395 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11396 if (!integer_zerop (lower_bound
))
11398 /* If the offset and base aren't both constants, return 0. */
11399 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11401 if (TREE_CODE (offset
) != INTEGER_CST
)
11403 /* Adjust offset by the lower bound. */
11404 offset
= size_diffop (fold_convert (sizetype
, offset
),
11405 fold_convert (sizetype
, lower_bound
));
11408 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11410 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11411 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11412 if (TREE_CODE (array
) != ADDR_EXPR
)
11414 array
= TREE_OPERAND (array
, 0);
11415 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11421 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11423 tree arg0
= TREE_OPERAND (arg
, 0);
11424 tree arg1
= TREE_OPERAND (arg
, 1);
11429 if (TREE_CODE (arg0
) == ADDR_EXPR
11430 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11431 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11433 array
= TREE_OPERAND (arg0
, 0);
11436 else if (TREE_CODE (arg1
) == ADDR_EXPR
11437 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11438 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11440 array
= TREE_OPERAND (arg1
, 0);
11449 if (TREE_CODE (array
) == STRING_CST
)
11451 *ptr_offset
= fold_convert (sizetype
, offset
);
11454 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11457 tree init
= ctor_for_folding (array
);
11459 /* Variables initialized to string literals can be handled too. */
11460 if (init
== error_mark_node
11462 || TREE_CODE (init
) != STRING_CST
)
11465 /* Avoid const char foo[4] = "abcde"; */
11466 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11467 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11468 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11469 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11472 /* If variable is bigger than the string literal, OFFSET must be constant
11473 and inside of the bounds of the string literal. */
11474 offset
= fold_convert (sizetype
, offset
);
11475 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11476 && (! tree_fits_uhwi_p (offset
)
11477 || compare_tree_int (offset
, length
) >= 0))
11480 *ptr_offset
= offset
;
11487 /* Generate code to calculate OPS, and exploded expression
11488 using a store-flag instruction and return an rtx for the result.
11489 OPS reflects a comparison.
11491 If TARGET is nonzero, store the result there if convenient.
11493 Return zero if there is no suitable set-flag instruction
11494 available on this machine.
11496 Once expand_expr has been called on the arguments of the comparison,
11497 we are committed to doing the store flag, since it is not safe to
11498 re-evaluate the expression. We emit the store-flag insn by calling
11499 emit_store_flag, but only expand the arguments if we have a reason
11500 to believe that emit_store_flag will be successful. If we think that
11501 it will, but it isn't, we have to simulate the store-flag with a
11502 set/jump/set sequence. */
11505 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11507 enum rtx_code code
;
11508 tree arg0
, arg1
, type
;
11509 machine_mode operand_mode
;
11512 rtx subtarget
= target
;
11513 location_t loc
= ops
->location
;
11518 /* Don't crash if the comparison was erroneous. */
11519 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11522 type
= TREE_TYPE (arg0
);
11523 operand_mode
= TYPE_MODE (type
);
11524 unsignedp
= TYPE_UNSIGNED (type
);
11526 /* We won't bother with BLKmode store-flag operations because it would mean
11527 passing a lot of information to emit_store_flag. */
11528 if (operand_mode
== BLKmode
)
11531 /* We won't bother with store-flag operations involving function pointers
11532 when function pointers must be canonicalized before comparisons. */
11533 if (targetm
.have_canonicalize_funcptr_for_compare ()
11534 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11535 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11537 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11538 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11539 == FUNCTION_TYPE
))))
11545 /* For vector typed comparisons emit code to generate the desired
11546 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11547 expander for this. */
11548 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11550 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11551 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11552 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11553 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11556 tree if_true
= constant_boolean_node (true, ops
->type
);
11557 tree if_false
= constant_boolean_node (false, ops
->type
);
11558 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11563 /* Get the rtx comparison code to use. We know that EXP is a comparison
11564 operation of some type. Some comparisons against 1 and -1 can be
11565 converted to comparisons with zero. Do so here so that the tests
11566 below will be aware that we have a comparison with zero. These
11567 tests will not catch constants in the first operand, but constants
11568 are rarely passed as the first operand. */
11579 if (integer_onep (arg1
))
11580 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11582 code
= unsignedp
? LTU
: LT
;
11585 if (! unsignedp
&& integer_all_onesp (arg1
))
11586 arg1
= integer_zero_node
, code
= LT
;
11588 code
= unsignedp
? LEU
: LE
;
11591 if (! unsignedp
&& integer_all_onesp (arg1
))
11592 arg1
= integer_zero_node
, code
= GE
;
11594 code
= unsignedp
? GTU
: GT
;
11597 if (integer_onep (arg1
))
11598 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11600 code
= unsignedp
? GEU
: GE
;
11603 case UNORDERED_EXPR
:
11629 gcc_unreachable ();
11632 /* Put a constant second. */
11633 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11634 || TREE_CODE (arg0
) == FIXED_CST
)
11636 std::swap (arg0
, arg1
);
11637 code
= swap_condition (code
);
11640 /* If this is an equality or inequality test of a single bit, we can
11641 do this by shifting the bit being tested to the low-order bit and
11642 masking the result with the constant 1. If the condition was EQ,
11643 we xor it with 1. This does not require an scc insn and is faster
11644 than an scc insn even if we have it.
11646 The code to make this transformation was moved into fold_single_bit_test,
11647 so we just call into the folder and expand its result. */
11649 if ((code
== NE
|| code
== EQ
)
11650 && integer_zerop (arg1
)
11651 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11653 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11655 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11657 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11658 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11659 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11660 gimple_assign_rhs1 (srcstmt
),
11661 gimple_assign_rhs2 (srcstmt
));
11662 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11664 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11668 if (! get_subtarget (target
)
11669 || GET_MODE (subtarget
) != operand_mode
)
11672 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11675 target
= gen_reg_rtx (mode
);
11677 /* Try a cstore if possible. */
11678 return emit_store_flag_force (target
, code
, op0
, op1
,
11679 operand_mode
, unsignedp
,
11680 (TYPE_PRECISION (ops
->type
) == 1
11681 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11684 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11685 0 otherwise (i.e. if there is no casesi instruction).
11687 DEFAULT_PROBABILITY is the probability of jumping to the default
11690 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11691 rtx table_label
, rtx default_label
, rtx fallback_label
,
11692 profile_probability default_probability
)
11694 struct expand_operand ops
[5];
11695 scalar_int_mode index_mode
= SImode
;
11696 rtx op1
, op2
, index
;
11698 if (! targetm
.have_casesi ())
11701 /* The index must be some form of integer. Convert it to SImode. */
11702 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11703 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11705 rtx rangertx
= expand_normal (range
);
11707 /* We must handle the endpoints in the original mode. */
11708 index_expr
= build2 (MINUS_EXPR
, index_type
,
11709 index_expr
, minval
);
11710 minval
= integer_zero_node
;
11711 index
= expand_normal (index_expr
);
11713 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11714 omode
, 1, default_label
,
11715 default_probability
);
11716 /* Now we can safely truncate. */
11717 index
= convert_to_mode (index_mode
, index
, 0);
11721 if (omode
!= index_mode
)
11723 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11724 index_expr
= fold_convert (index_type
, index_expr
);
11727 index
= expand_normal (index_expr
);
11730 do_pending_stack_adjust ();
11732 op1
= expand_normal (minval
);
11733 op2
= expand_normal (range
);
11735 create_input_operand (&ops
[0], index
, index_mode
);
11736 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11737 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11738 create_fixed_operand (&ops
[3], table_label
);
11739 create_fixed_operand (&ops
[4], (default_label
11741 : fallback_label
));
11742 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11746 /* Attempt to generate a tablejump instruction; same concept. */
11747 /* Subroutine of the next function.
11749 INDEX is the value being switched on, with the lowest value
11750 in the table already subtracted.
11751 MODE is its expected mode (needed if INDEX is constant).
11752 RANGE is the length of the jump table.
11753 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11755 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11756 index value is out of range.
11757 DEFAULT_PROBABILITY is the probability of jumping to
11758 the default label. */
11761 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11762 rtx default_label
, profile_probability default_probability
)
11766 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11767 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11769 /* Do an unsigned comparison (in the proper mode) between the index
11770 expression and the value which represents the length of the range.
11771 Since we just finished subtracting the lower bound of the range
11772 from the index expression, this comparison allows us to simultaneously
11773 check that the original index expression value is both greater than
11774 or equal to the minimum value of the range and less than or equal to
11775 the maximum value of the range. */
11778 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11779 default_label
, default_probability
);
11782 /* If index is in range, it must fit in Pmode.
11783 Convert to Pmode so we can index with it. */
11785 index
= convert_to_mode (Pmode
, index
, 1);
11787 /* Don't let a MEM slip through, because then INDEX that comes
11788 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11789 and break_out_memory_refs will go to work on it and mess it up. */
11790 #ifdef PIC_CASE_VECTOR_ADDRESS
11791 if (flag_pic
&& !REG_P (index
))
11792 index
= copy_to_mode_reg (Pmode
, index
);
11795 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11796 GET_MODE_SIZE, because this indicates how large insns are. The other
11797 uses should all be Pmode, because they are addresses. This code
11798 could fail if addresses and insns are not the same size. */
11799 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11800 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11802 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11803 gen_rtx_LABEL_REF (Pmode
, table_label
));
11805 #ifdef PIC_CASE_VECTOR_ADDRESS
11807 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11810 index
= memory_address (CASE_VECTOR_MODE
, index
);
11811 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11812 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11813 convert_move (temp
, vector
, 0);
11815 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11817 /* If we are generating PIC code or if the table is PC-relative, the
11818 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11819 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11824 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11825 rtx table_label
, rtx default_label
,
11826 profile_probability default_probability
)
11830 if (! targetm
.have_tablejump ())
11833 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11834 fold_convert (index_type
, index_expr
),
11835 fold_convert (index_type
, minval
));
11836 index
= expand_normal (index_expr
);
11837 do_pending_stack_adjust ();
11839 do_tablejump (index
, TYPE_MODE (index_type
),
11840 convert_modes (TYPE_MODE (index_type
),
11841 TYPE_MODE (TREE_TYPE (range
)),
11842 expand_normal (range
),
11843 TYPE_UNSIGNED (TREE_TYPE (range
))),
11844 table_label
, default_label
, default_probability
);
11848 /* Return a CONST_VECTOR rtx representing vector mask for
11849 a VECTOR_CST of booleans. */
11851 const_vector_mask_from_tree (tree exp
)
11853 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11854 machine_mode inner
= GET_MODE_INNER (mode
);
11856 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11857 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11858 unsigned int count
= builder
.encoded_nelts ();
11859 for (unsigned int i
= 0; i
< count
; ++i
)
11861 tree elt
= VECTOR_CST_ELT (exp
, i
);
11862 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11863 if (integer_zerop (elt
))
11864 builder
.quick_push (CONST0_RTX (inner
));
11865 else if (integer_onep (elt
)
11866 || integer_minus_onep (elt
))
11867 builder
.quick_push (CONSTM1_RTX (inner
));
11869 gcc_unreachable ();
11871 return builder
.build ();
11874 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11875 Return a constant scalar rtx of mode MODE in which bit X is set if element
11876 X of EXP is nonzero. */
11878 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11880 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11883 /* The result has a fixed number of bits so the input must too. */
11884 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11885 for (unsigned int i
= 0; i
< nunits
; ++i
)
11887 elt
= VECTOR_CST_ELT (exp
, i
);
11888 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11889 if (integer_all_onesp (elt
))
11890 res
= wi::set_bit (res
, i
);
11892 gcc_assert (integer_zerop (elt
));
11895 return immed_wide_int_const (res
, mode
);
11898 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11900 const_vector_from_tree (tree exp
)
11902 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11904 if (initializer_zerop (exp
))
11905 return CONST0_RTX (mode
);
11907 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11908 return const_vector_mask_from_tree (exp
);
11910 machine_mode inner
= GET_MODE_INNER (mode
);
11912 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11913 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11914 unsigned int count
= builder
.encoded_nelts ();
11915 for (unsigned int i
= 0; i
< count
; ++i
)
11917 tree elt
= VECTOR_CST_ELT (exp
, i
);
11918 if (TREE_CODE (elt
) == REAL_CST
)
11919 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
11921 else if (TREE_CODE (elt
) == FIXED_CST
)
11922 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11925 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
11928 return builder
.build ();
11931 /* Build a decl for a personality function given a language prefix. */
11934 build_personality_function (const char *lang
)
11936 const char *unwind_and_version
;
11940 switch (targetm_common
.except_unwind_info (&global_options
))
11945 unwind_and_version
= "_sj0";
11949 unwind_and_version
= "_v0";
11952 unwind_and_version
= "_seh0";
11955 gcc_unreachable ();
11958 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11960 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11961 long_long_unsigned_type_node
,
11962 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11963 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11964 get_identifier (name
), type
);
11965 DECL_ARTIFICIAL (decl
) = 1;
11966 DECL_EXTERNAL (decl
) = 1;
11967 TREE_PUBLIC (decl
) = 1;
11969 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11970 are the flags assigned by targetm.encode_section_info. */
11971 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11976 /* Extracts the personality function of DECL and returns the corresponding
11980 get_personality_function (tree decl
)
11982 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11983 enum eh_personality_kind pk
;
11985 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11986 if (pk
== eh_personality_none
)
11990 && pk
== eh_personality_any
)
11991 personality
= lang_hooks
.eh_personality ();
11993 if (pk
== eh_personality_lang
)
11994 gcc_assert (personality
!= NULL_TREE
);
11996 return XEXP (DECL_RTL (personality
), 0);
11999 /* Returns a tree for the size of EXP in bytes. */
12002 tree_expr_size (const_tree exp
)
12005 && DECL_SIZE_UNIT (exp
) != 0)
12006 return DECL_SIZE_UNIT (exp
);
12008 return size_in_bytes (TREE_TYPE (exp
));
12011 /* Return an rtx for the size in bytes of the value of EXP. */
12014 expr_size (tree exp
)
12018 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12019 size
= TREE_OPERAND (exp
, 1);
12022 size
= tree_expr_size (exp
);
12024 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12027 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12030 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12031 if the size can vary or is larger than an integer. */
12033 static HOST_WIDE_INT
12034 int_expr_size (tree exp
)
12038 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12039 size
= TREE_OPERAND (exp
, 1);
12042 size
= tree_expr_size (exp
);
12046 if (size
== 0 || !tree_fits_shwi_p (size
))
12049 return tree_to_shwi (size
);