reflect: canonicalize types returned by StructOf() and friends
[official-gcc.git] / gcc / expr.c
blobf15037adfb63a7fab83af546bda5787451e2ce1e
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "target.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "gimple.h"
28 #include "predict.h"
29 #include "memmodel.h"
30 #include "tm_p.h"
31 #include "ssa.h"
32 #include "expmed.h"
33 #include "optabs.h"
34 #include "regs.h"
35 #include "emit-rtl.h"
36 #include "recog.h"
37 #include "cgraph.h"
38 #include "diagnostic.h"
39 #include "alias.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
42 #include "attribs.h"
43 #include "varasm.h"
44 #include "except.h"
45 #include "insn-attr.h"
46 #include "dojump.h"
47 #include "explow.h"
48 #include "calls.h"
49 #include "stmt.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
51 #include "expr.h"
52 #include "optabs-tree.h"
53 #include "libfuncs.h"
54 #include "reload.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
60 #include "builtins.h"
61 #include "tree-chkp.h"
62 #include "rtl-chkp.h"
63 #include "ccmp.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
73 int cse_not_expected;
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
77 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
78 unsigned HOST_WIDE_INT);
79 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
80 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
81 static rtx_insn *compress_float_constant (rtx, rtx);
82 static rtx get_subtarget (rtx);
83 static void store_constructor (tree, rtx, int, poly_int64, bool);
84 static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64,
85 machine_mode, tree, alias_set_type, bool, bool);
87 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
89 static int is_aligning_offset (const_tree, const_tree);
90 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
91 static rtx do_store_flag (sepops, rtx, machine_mode);
92 #ifdef PUSH_ROUNDING
93 static void emit_single_push_insn (machine_mode, rtx, tree);
94 #endif
95 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
96 profile_probability);
97 static rtx const_vector_from_tree (tree);
98 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree);
99 static tree tree_expr_size (const_tree);
100 static HOST_WIDE_INT int_expr_size (tree);
101 static void convert_mode_scalar (rtx, rtx, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
108 void
109 init_expr_target (void)
111 rtx pat;
112 int num_clobbers;
113 rtx mem, mem1;
114 rtx reg;
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
120 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
126 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
127 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
128 PATTERN (insn) = pat;
130 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
131 mode = (machine_mode) ((int) mode + 1))
133 int regno;
135 direct_load[(int) mode] = direct_store[(int) mode] = 0;
136 PUT_MODE (mem, mode);
137 PUT_MODE (mem1, mode);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode != VOIDmode && mode != BLKmode)
143 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
144 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
145 regno++)
147 if (!targetm.hard_regno_mode_ok (regno, mode))
148 continue;
150 set_mode_and_regno (reg, mode, regno);
152 SET_SRC (pat) = mem;
153 SET_DEST (pat) = reg;
154 if (recog (pat, insn, &num_clobbers) >= 0)
155 direct_load[(int) mode] = 1;
157 SET_SRC (pat) = mem1;
158 SET_DEST (pat) = reg;
159 if (recog (pat, insn, &num_clobbers) >= 0)
160 direct_load[(int) mode] = 1;
162 SET_SRC (pat) = reg;
163 SET_DEST (pat) = mem;
164 if (recog (pat, insn, &num_clobbers) >= 0)
165 direct_store[(int) mode] = 1;
167 SET_SRC (pat) = reg;
168 SET_DEST (pat) = mem1;
169 if (recog (pat, insn, &num_clobbers) >= 0)
170 direct_store[(int) mode] = 1;
174 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
176 opt_scalar_float_mode mode_iter;
177 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
179 scalar_float_mode mode = mode_iter.require ();
180 scalar_float_mode srcmode;
181 FOR_EACH_MODE_UNTIL (srcmode, mode)
183 enum insn_code ic;
185 ic = can_extend_p (mode, srcmode, 0);
186 if (ic == CODE_FOR_nothing)
187 continue;
189 PUT_MODE (mem, srcmode);
191 if (insn_operand_matches (ic, 1, mem))
192 float_extend_from_mem[mode][srcmode] = true;
197 /* This is run at the start of compiling a function. */
199 void
200 init_expr (void)
202 memset (&crtl->expr, 0, sizeof (crtl->expr));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
207 fixed-point.
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
211 void
212 convert_move (rtx to, rtx from, int unsignedp)
214 machine_mode to_mode = GET_MODE (to);
215 machine_mode from_mode = GET_MODE (from);
217 gcc_assert (to_mode != BLKmode);
218 gcc_assert (from_mode != BLKmode);
220 /* If the source and destination are already the same, then there's
221 nothing to do. */
222 if (to == from)
223 return;
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
227 TO here. */
229 scalar_int_mode to_int_mode;
230 if (GET_CODE (from) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from)
232 && is_a <scalar_int_mode> (to_mode, &to_int_mode)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from))
234 >= GET_MODE_PRECISION (to_int_mode))
235 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
237 from = gen_lowpart (to_int_mode, SUBREG_REG (from));
238 from_mode = to_int_mode;
241 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
243 if (to_mode == from_mode
244 || (from_mode == VOIDmode && CONSTANT_P (from)))
246 emit_move_insn (to, from);
247 return;
250 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode),
253 GET_MODE_BITSIZE (to_mode)));
255 if (VECTOR_MODE_P (to_mode))
256 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
257 else
258 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
260 emit_move_insn (to, from);
261 return;
264 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
266 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
267 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
268 return;
271 convert_mode_scalar (to, from, unsignedp);
274 /* Like convert_move, but deals only with scalar modes. */
276 static void
277 convert_mode_scalar (rtx to, rtx from, int unsignedp)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from));
281 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to));
282 bool to_real = SCALAR_FLOAT_MODE_P (to_mode);
283 bool from_real = SCALAR_FLOAT_MODE_P (from_mode);
284 enum insn_code code;
285 rtx libcall;
287 gcc_assert (to_real == from_real);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
291 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
293 if (to_real)
295 rtx value;
296 rtx_insn *insns;
297 convert_optab tab;
299 gcc_assert ((GET_MODE_PRECISION (from_mode)
300 != GET_MODE_PRECISION (to_mode))
301 || (DECIMAL_FLOAT_MODE_P (from_mode)
302 != DECIMAL_FLOAT_MODE_P (to_mode)));
304 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
305 /* Conversion between decimal float and binary float, same size. */
306 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
307 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
308 tab = sext_optab;
309 else
310 tab = trunc_optab;
312 /* Try converting directly if the insn is supported. */
314 code = convert_optab_handler (tab, to_mode, from_mode);
315 if (code != CODE_FOR_nothing)
317 emit_unop_insn (code, to, from,
318 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
319 return;
322 /* Otherwise use a libcall. */
323 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall);
328 start_sequence ();
329 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
330 from, from_mode);
331 insns = get_insns ();
332 end_sequence ();
333 emit_libcall_block (insns, to, value,
334 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
335 from)
336 : gen_rtx_FLOAT_EXTEND (to_mode, from));
337 return;
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
343 convert_optab ctab;
345 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
346 ctab = trunc_optab;
347 else if (unsignedp)
348 ctab = zext_optab;
349 else
350 ctab = sext_optab;
352 if (convert_optab_handler (ctab, to_mode, from_mode)
353 != CODE_FOR_nothing)
355 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
356 to, from, UNKNOWN);
357 return;
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
368 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
369 != CODE_FOR_nothing);
371 if (full_mode != from_mode)
372 from = convert_to_mode (full_mode, from, unsignedp);
373 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
374 to, from, UNKNOWN);
375 return;
377 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
379 rtx new_from;
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
382 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
383 enum insn_code icode;
385 icode = convert_optab_handler (ctab, full_mode, from_mode);
386 gcc_assert (icode != CODE_FOR_nothing);
388 if (to_mode == full_mode)
390 emit_unop_insn (icode, to, from, UNKNOWN);
391 return;
394 new_from = gen_reg_rtx (full_mode);
395 emit_unop_insn (icode, new_from, from, UNKNOWN);
397 /* else proceed to integer conversions below. */
398 from_mode = full_mode;
399 from = new_from;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
411 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
412 expand_fixed_convert (to, from, 0, 0);
413 else
414 expand_fixed_convert (to, from, 0, 1);
415 return;
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
422 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
424 rtx_insn *insns;
425 rtx lowpart;
426 rtx fill_value;
427 rtx lowfrom;
428 int i;
429 scalar_mode lowpart_mode;
430 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
432 /* Try converting directly if the insn is supported. */
433 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
434 != CODE_FOR_nothing)
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize > 0 && GET_CODE (from) == SUBREG)
441 from = force_reg (from_mode, from);
442 emit_unop_insn (code, to, from, equiv_code);
443 return;
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
447 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
448 != CODE_FOR_nothing))
450 rtx word_to = gen_reg_rtx (word_mode);
451 if (REG_P (to))
453 if (reg_overlap_mentioned_p (to, from))
454 from = force_reg (from_mode, from);
455 emit_clobber (to);
457 convert_move (word_to, from, unsignedp);
458 emit_unop_insn (code, to, word_to, equiv_code);
459 return;
462 /* No special multiword conversion insn; do it by hand. */
463 start_sequence ();
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
472 from = force_reg (from_mode, from);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
476 lowpart_mode = word_mode;
477 else
478 lowpart_mode = from_mode;
480 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
482 lowpart = gen_lowpart (lowpart_mode, to);
483 emit_move_insn (lowpart, lowfrom);
485 /* Compute the value to put in each remaining word. */
486 if (unsignedp)
487 fill_value = const0_rtx;
488 else
489 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
490 LT, lowfrom, const0_rtx,
491 lowpart_mode, 0, -1);
493 /* Fill the remaining words. */
494 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
496 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
497 rtx subword = operand_subword (to, index, 1, to_mode);
499 gcc_assert (subword);
501 if (fill_value != subword)
502 emit_move_insn (subword, fill_value);
505 insns = get_insns ();
506 end_sequence ();
508 emit_insn (insns);
509 return;
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
516 if (!((MEM_P (from)
517 && ! MEM_VOLATILE_P (from)
518 && direct_load[(int) to_mode]
519 && ! mode_dependent_address_p (XEXP (from, 0),
520 MEM_ADDR_SPACE (from)))
521 || REG_P (from)
522 || GET_CODE (from) == SUBREG))
523 from = force_reg (from_mode, from);
524 convert_move (to, gen_lowpart (word_mode, from), 0);
525 return;
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
535 if (!((MEM_P (from)
536 && ! MEM_VOLATILE_P (from)
537 && direct_load[(int) to_mode]
538 && ! mode_dependent_address_p (XEXP (from, 0),
539 MEM_ADDR_SPACE (from)))
540 || REG_P (from)
541 || GET_CODE (from) == SUBREG))
542 from = force_reg (from_mode, from);
543 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
544 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode))
545 from = copy_to_reg (from);
546 emit_move_insn (to, gen_lowpart (to_mode, from));
547 return;
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
553 /* Convert directly if that works. */
554 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
555 != CODE_FOR_nothing)
557 emit_unop_insn (code, to, from, equiv_code);
558 return;
560 else
562 scalar_mode intermediate;
563 rtx tmp;
564 int shift_amount;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter;
568 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)
570 scalar_mode intermediate = intermediate_iter.require ();
571 if (((can_extend_p (to_mode, intermediate, unsignedp)
572 != CODE_FOR_nothing)
573 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,
575 intermediate)))
576 && (can_extend_p (intermediate, from_mode, unsignedp)
577 != CODE_FOR_nothing))
579 convert_move (to, convert_to_mode (intermediate, from,
580 unsignedp), unsignedp);
581 return;
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount = (GET_MODE_PRECISION (to_mode)
588 - GET_MODE_PRECISION (from_mode));
589 from = gen_lowpart (to_mode, force_reg (from_mode, from));
590 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
591 to, unsignedp);
592 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
593 to, unsignedp);
594 if (tmp != to)
595 emit_move_insn (to, tmp);
596 return;
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab, to_mode,
602 from_mode) != CODE_FOR_nothing)
604 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
605 to, from, UNKNOWN);
606 return;
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
618 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
619 emit_move_insn (to, temp);
620 return;
623 /* Mode combination is not recognized. */
624 gcc_unreachable ();
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
637 return convert_modes (mode, VOIDmode, x, unsignedp);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
653 rtx temp;
654 scalar_int_mode int_mode;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x)
661 && is_a <scalar_int_mode> (mode, &int_mode)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x))
663 >= GET_MODE_PRECISION (int_mode))
664 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
665 x = gen_lowpart (int_mode, SUBREG_REG (x));
667 if (GET_MODE (x) != VOIDmode)
668 oldmode = GET_MODE (x);
670 if (mode == oldmode)
671 return x;
673 if (CONST_SCALAR_INT_P (x)
674 && is_int_mode (mode, &int_mode))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode) != MODE_INT)
680 oldmode = MAX_MODE_INT;
681 wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
682 GET_MODE_PRECISION (int_mode),
683 unsignedp ? UNSIGNED : SIGNED);
684 return immed_wide_int_const (w, int_mode);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
689 non-volatile MEM. */
690 scalar_int_mode int_oldmode;
691 if (is_int_mode (mode, &int_mode)
692 && is_int_mode (oldmode, &int_oldmode)
693 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
694 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode])
695 || CONST_POLY_INT_P (x)
696 || (REG_P (x)
697 && (!HARD_REGISTER_P (x)
698 || targetm.hard_regno_mode_ok (REGNO (x), int_mode))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x)))))
700 return gen_lowpart (int_mode, x);
702 /* Converting from integer constant into mode is always equivalent to an
703 subreg operation. */
704 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode),
707 GET_MODE_BITSIZE (oldmode)));
708 return simplify_gen_subreg (mode, x, oldmode, 0);
711 temp = gen_reg_rtx (mode);
712 convert_move (temp, x, unsignedp);
713 return temp;
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
719 static unsigned int
720 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require ();
725 if (align >= GET_MODE_ALIGNMENT (tmode))
726 align = GET_MODE_ALIGNMENT (tmode);
727 else
729 scalar_int_mode xmode = NARROWEST_INT_MODE;
730 opt_scalar_int_mode mode_iter;
731 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
733 tmode = mode_iter.require ();
734 if (GET_MODE_SIZE (tmode) > max_pieces
735 || targetm.slow_unaligned_access (tmode, align))
736 break;
737 xmode = tmode;
740 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
743 return align;
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size)
751 scalar_int_mode result = NARROWEST_INT_MODE;
753 gcc_checking_assert (size > 1);
755 opt_scalar_int_mode tmode;
756 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)
757 if (GET_MODE_SIZE (tmode.require ()) < size)
758 result = tmode.require ();
760 return result;
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
766 static bool
767 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align,
768 enum by_pieces_operation op)
770 return targetm.use_by_pieces_infrastructure_p (len, align, op,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
776 succeed. */
778 bool
779 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align)
781 return can_do_by_pieces (len, align, MOVE_BY_PIECES);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
789 unsigned int max_size, by_pieces_operation op)
791 unsigned HOST_WIDE_INT n_insns = 0;
793 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
795 while (max_size > 1 && l > 0)
797 scalar_int_mode mode = widest_int_mode_for_size (max_size);
798 enum insn_code icode;
800 unsigned int modesize = GET_MODE_SIZE (mode);
802 icode = optab_handler (mov_optab, mode);
803 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
805 unsigned HOST_WIDE_INT n_pieces = l / modesize;
806 l %= modesize;
807 switch (op)
809 default:
810 n_insns += n_pieces;
811 break;
813 case COMPARE_BY_PIECES:
814 int batch = targetm.compare_by_pieces_branch_ratio (mode);
815 int batch_ops = 4 * batch - 1;
816 unsigned HOST_WIDE_INT full = n_pieces / batch;
817 n_insns += full * batch_ops;
818 if (n_pieces % batch != 0)
819 n_insns++;
820 break;
824 max_size = modesize;
827 gcc_assert (!l);
828 return n_insns;
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
836 class pieces_addr
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 stack pushes. */
840 rtx m_obj;
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
843 rtx m_addr;
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc;
852 /* True if we have either of the two possible cases of using
853 autoincrement. */
854 bool m_auto;
855 /* True if this is an address to be used for load operations rather
856 than stores. */
857 bool m_is_load;
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn;
862 void *m_cfndata;
863 public:
864 pieces_addr (rtx, bool, by_pieces_constfn, void *);
865 rtx adjust (scalar_int_mode, HOST_WIDE_INT);
866 void increment_address (HOST_WIDE_INT);
867 void maybe_predec (HOST_WIDE_INT);
868 void maybe_postinc (HOST_WIDE_INT);
869 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT);
870 int get_addr_inc ()
872 return m_addr_inc;
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
881 memory load. */
883 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
884 void *cfndata)
885 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
887 m_addr_inc = 0;
888 m_auto = false;
889 if (obj)
891 rtx addr = XEXP (obj, 0);
892 rtx_code code = GET_CODE (addr);
893 m_addr = addr;
894 bool dec = code == PRE_DEC || code == POST_DEC;
895 bool inc = code == PRE_INC || code == POST_INC;
896 m_auto = inc || dec;
897 if (m_auto)
898 m_addr_inc = dec ? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code != PRE_INC && code != POST_DEC);
905 else
907 m_addr = NULL_RTX;
908 if (!is_load)
910 m_auto = true;
911 if (STACK_GROWS_DOWNWARD)
912 m_addr_inc = -1;
913 else
914 m_addr_inc = 1;
916 else
917 gcc_assert (constfn != NULL);
919 m_explicit_inc = 0;
920 if (constfn)
921 gcc_assert (is_load);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
929 void
930 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse,
931 HOST_WIDE_INT len)
933 if (m_auto || m_obj == NULL_RTX)
934 return;
936 bool use_predec = (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode)
938 : USE_STORE_PRE_DECREMENT (mode));
939 bool use_postinc = (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode)
941 : USE_STORE_POST_INCREMENT (mode));
942 machine_mode addr_mode = get_address_mode (m_obj);
944 if (use_predec && reverse)
946 m_addr = copy_to_mode_reg (addr_mode,
947 plus_constant (addr_mode,
948 m_addr, len));
949 m_auto = true;
950 m_explicit_inc = -1;
952 else if (use_postinc && !reverse)
954 m_addr = copy_to_mode_reg (addr_mode, m_addr);
955 m_auto = true;
956 m_explicit_inc = 1;
958 else if (CONSTANT_P (m_addr))
959 m_addr = copy_to_mode_reg (addr_mode, m_addr);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset)
969 if (m_constfn)
970 return m_constfn (m_cfndata, offset, mode);
971 if (m_obj == NULL_RTX)
972 return NULL_RTX;
973 if (m_auto)
974 return adjust_automodify_address (m_obj, mode, m_addr, offset);
975 else
976 return adjust_address (m_obj, mode, offset);
979 /* Emit an add instruction to increment the address by SIZE. */
981 void
982 pieces_addr::increment_address (HOST_WIDE_INT size)
984 rtx amount = gen_int_mode (size, GET_MODE (m_addr));
985 emit_insn (gen_add2_insn (m_addr, amount));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
990 already). */
992 void
993 pieces_addr::maybe_predec (HOST_WIDE_INT size)
995 if (m_explicit_inc >= 0)
996 return;
997 gcc_assert (HAVE_PRE_DECREMENT);
998 increment_address (size);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1004 void
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size)
1007 if (m_explicit_inc <= 0)
1008 return;
1009 gcc_assert (HAVE_POST_INCREMENT);
1010 increment_address (size);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1014 to be performed. */
1016 class op_by_pieces_d
1018 protected:
1019 pieces_addr m_to, m_from;
1020 unsigned HOST_WIDE_INT m_len;
1021 HOST_WIDE_INT m_offset;
1022 unsigned int m_align;
1023 unsigned int m_max_size;
1024 bool m_reverse;
1026 /* Virtual functions, overriden by derived classes for the specific
1027 operation. */
1028 virtual void generate (rtx, rtx, machine_mode) = 0;
1029 virtual bool prepare_mode (machine_mode, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode)
1034 public:
1035 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *,
1036 unsigned HOST_WIDE_INT, unsigned int);
1037 void run ();
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
1047 rtx from, bool from_load,
1048 by_pieces_constfn from_cfn,
1049 void *from_cfn_data,
1050 unsigned HOST_WIDE_INT len,
1051 unsigned int align)
1052 : m_to (to, to_load, NULL, NULL),
1053 m_from (from, from_load, from_cfn, from_cfn_data),
1054 m_len (len), m_max_size (MOVE_MAX_PIECES + 1)
1056 int toi = m_to.get_addr_inc ();
1057 int fromi = m_from.get_addr_inc ();
1058 if (toi >= 0 && fromi >= 0)
1059 m_reverse = false;
1060 else if (toi <= 0 && fromi <= 0)
1061 m_reverse = true;
1062 else
1063 gcc_unreachable ();
1065 m_offset = m_reverse ? len : 0;
1066 align = MIN (to ? MEM_ALIGN (to) : align,
1067 from ? MEM_ALIGN (from) : align);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1077 m_from.decide_autoinc (mode, m_reverse, len);
1078 m_to.decide_autoinc (mode, m_reverse, len);
1081 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1082 m_align = align;
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1090 void
1091 op_by_pieces_d::run ()
1093 while (m_max_size > 1 && m_len > 0)
1095 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1097 if (prepare_mode (mode, m_align))
1099 unsigned int size = GET_MODE_SIZE (mode);
1100 rtx to1 = NULL_RTX, from1;
1102 while (m_len >= size)
1104 if (m_reverse)
1105 m_offset -= size;
1107 to1 = m_to.adjust (mode, m_offset);
1108 from1 = m_from.adjust (mode, m_offset);
1110 m_to.maybe_predec (-(HOST_WIDE_INT)size);
1111 m_from.maybe_predec (-(HOST_WIDE_INT)size);
1113 generate (to1, from1, mode);
1115 m_to.maybe_postinc (size);
1116 m_from.maybe_postinc (size);
1118 if (!m_reverse)
1119 m_offset += size;
1121 m_len -= size;
1124 finish_mode (mode);
1127 m_max_size = GET_MODE_SIZE (mode);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1135 operations. */
1137 class move_by_pieces_d : public op_by_pieces_d
1139 insn_gen_fn m_gen_fun;
1140 void generate (rtx, rtx, machine_mode);
1141 bool prepare_mode (machine_mode, unsigned int);
1143 public:
1144 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1145 unsigned int align)
1146 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align)
1149 rtx finish_endp (int);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1156 bool
1157 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1159 insn_code icode = optab_handler (mov_optab, mode);
1160 m_gen_fun = GEN_FCN (icode);
1161 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1170 void
1171 move_by_pieces_d::generate (rtx op0, rtx op1,
1172 machine_mode mode ATTRIBUTE_UNUSED)
1174 #ifdef PUSH_ROUNDING
1175 if (op0 == NULL_RTX)
1177 emit_single_push_insn (mode, op1, NULL);
1178 return;
1180 #endif
1181 emit_insn (m_gen_fun (op0, op1));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation. If ENDP is 1 return
1186 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1187 end minus one byte ala stpcpy. */
1190 move_by_pieces_d::finish_endp (int endp)
1192 gcc_assert (!m_reverse);
1193 if (endp == 2)
1195 m_to.maybe_postinc (-1);
1196 --m_offset;
1198 return m_to.adjust (QImode, m_offset);
1201 /* Generate several move instructions to copy LEN bytes from block FROM to
1202 block TO. (These are MEM rtx's with BLKmode).
1204 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1205 used to push FROM to the stack.
1207 ALIGN is maximum stack alignment we can assume.
1209 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1210 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1211 stpcpy. */
1214 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1215 unsigned int align, int endp)
1217 #ifndef PUSH_ROUNDING
1218 if (to == NULL)
1219 gcc_unreachable ();
1220 #endif
1222 move_by_pieces_d data (to, from, len, align);
1224 data.run ();
1226 if (endp)
1227 return data.finish_endp (endp);
1228 else
1229 return to;
1232 /* Derived class from op_by_pieces_d, providing support for block move
1233 operations. */
1235 class store_by_pieces_d : public op_by_pieces_d
1237 insn_gen_fn m_gen_fun;
1238 void generate (rtx, rtx, machine_mode);
1239 bool prepare_mode (machine_mode, unsigned int);
1241 public:
1242 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
1243 unsigned HOST_WIDE_INT len, unsigned int align)
1244 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align)
1247 rtx finish_endp (int);
1250 /* Return true if MODE can be used for a set of stores, given an
1251 alignment ALIGN. Prepare whatever data is necessary for later
1252 calls to generate. */
1254 bool
1255 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1257 insn_code icode = optab_handler (mov_optab, mode);
1258 m_gen_fun = GEN_FCN (icode);
1259 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1262 /* A callback used when iterating for a store_by_pieces_operation.
1263 OP0 and OP1 are the values that have been loaded and should be
1264 compared in MODE. If OP0 is NULL, this means we should generate a
1265 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1266 gen function that should be used to generate the mode. */
1268 void
1269 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1271 emit_insn (m_gen_fun (op0, op1));
1274 /* Perform the final adjustment at the end of a string to obtain the
1275 correct return value for the block operation. If ENDP is 1 return
1276 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1277 end minus one byte ala stpcpy. */
1280 store_by_pieces_d::finish_endp (int endp)
1282 gcc_assert (!m_reverse);
1283 if (endp == 2)
1285 m_to.maybe_postinc (-1);
1286 --m_offset;
1288 return m_to.adjust (QImode, m_offset);
1291 /* Determine whether the LEN bytes generated by CONSTFUN can be
1292 stored to memory using several move instructions. CONSTFUNDATA is
1293 a pointer which will be passed as argument in every CONSTFUN call.
1294 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1295 a memset operation and false if it's a copy of a constant string.
1296 Return nonzero if a call to store_by_pieces should succeed. */
1299 can_store_by_pieces (unsigned HOST_WIDE_INT len,
1300 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1301 void *constfundata, unsigned int align, bool memsetp)
1303 unsigned HOST_WIDE_INT l;
1304 unsigned int max_size;
1305 HOST_WIDE_INT offset = 0;
1306 enum insn_code icode;
1307 int reverse;
1308 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1309 rtx cst ATTRIBUTE_UNUSED;
1311 if (len == 0)
1312 return 1;
1314 if (!targetm.use_by_pieces_infrastructure_p (len, align,
1315 memsetp
1316 ? SET_BY_PIECES
1317 : STORE_BY_PIECES,
1318 optimize_insn_for_speed_p ()))
1319 return 0;
1321 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
1323 /* We would first store what we can in the largest integer mode, then go to
1324 successively smaller modes. */
1326 for (reverse = 0;
1327 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
1328 reverse++)
1330 l = len;
1331 max_size = STORE_MAX_PIECES + 1;
1332 while (max_size > 1 && l > 0)
1334 scalar_int_mode mode = widest_int_mode_for_size (max_size);
1336 icode = optab_handler (mov_optab, mode);
1337 if (icode != CODE_FOR_nothing
1338 && align >= GET_MODE_ALIGNMENT (mode))
1340 unsigned int size = GET_MODE_SIZE (mode);
1342 while (l >= size)
1344 if (reverse)
1345 offset -= size;
1347 cst = (*constfun) (constfundata, offset, mode);
1348 if (!targetm.legitimate_constant_p (mode, cst))
1349 return 0;
1351 if (!reverse)
1352 offset += size;
1354 l -= size;
1358 max_size = GET_MODE_SIZE (mode);
1361 /* The code above should have handled everything. */
1362 gcc_assert (!l);
1365 return 1;
1368 /* Generate several move instructions to store LEN bytes generated by
1369 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1370 pointer which will be passed as argument in every CONSTFUN call.
1371 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1372 a memset operation and false if it's a copy of a constant string.
1373 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1374 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1375 stpcpy. */
1378 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
1379 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1380 void *constfundata, unsigned int align, bool memsetp, int endp)
1382 if (len == 0)
1384 gcc_assert (endp != 2);
1385 return to;
1388 gcc_assert (targetm.use_by_pieces_infrastructure_p
1389 (len, align,
1390 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,
1391 optimize_insn_for_speed_p ()));
1393 store_by_pieces_d data (to, constfun, constfundata, len, align);
1394 data.run ();
1396 if (endp)
1397 return data.finish_endp (endp);
1398 else
1399 return to;
1402 /* Callback routine for clear_by_pieces.
1403 Return const0_rtx unconditionally. */
1405 static rtx
1406 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode)
1408 return const0_rtx;
1411 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1412 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1414 static void
1415 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
1417 if (len == 0)
1418 return;
1420 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align);
1421 data.run ();
1424 /* Context used by compare_by_pieces_genfn. It stores the fail label
1425 to jump to in case of miscomparison, and for branch ratios greater than 1,
1426 it stores an accumulator and the current and maximum counts before
1427 emitting another branch. */
1429 class compare_by_pieces_d : public op_by_pieces_d
1431 rtx_code_label *m_fail_label;
1432 rtx m_accumulator;
1433 int m_count, m_batch;
1435 void generate (rtx, rtx, machine_mode);
1436 bool prepare_mode (machine_mode, unsigned int);
1437 void finish_mode (machine_mode);
1438 public:
1439 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
1440 void *op1_cfn_data, HOST_WIDE_INT len, int align,
1441 rtx_code_label *fail_label)
1442 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align)
1444 m_fail_label = fail_label;
1448 /* A callback used when iterating for a compare_by_pieces_operation.
1449 OP0 and OP1 are the values that have been loaded and should be
1450 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1451 context structure. */
1453 void
1454 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1456 if (m_batch > 1)
1458 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX,
1459 true, OPTAB_LIB_WIDEN);
1460 if (m_count != 0)
1461 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
1462 true, OPTAB_LIB_WIDEN);
1463 m_accumulator = temp;
1465 if (++m_count < m_batch)
1466 return;
1468 m_count = 0;
1469 op0 = m_accumulator;
1470 op1 = const0_rtx;
1471 m_accumulator = NULL_RTX;
1473 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL,
1474 m_fail_label, profile_probability::uninitialized ());
1477 /* Return true if MODE can be used for a set of moves and comparisons,
1478 given an alignment ALIGN. Prepare whatever data is necessary for
1479 later calls to generate. */
1481 bool
1482 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1484 insn_code icode = optab_handler (mov_optab, mode);
1485 if (icode == CODE_FOR_nothing
1486 || align < GET_MODE_ALIGNMENT (mode)
1487 || !can_compare_p (EQ, mode, ccp_jump))
1488 return false;
1489 m_batch = targetm.compare_by_pieces_branch_ratio (mode);
1490 if (m_batch < 0)
1491 return false;
1492 m_accumulator = NULL_RTX;
1493 m_count = 0;
1494 return true;
1497 /* Called after expanding a series of comparisons in MODE. If we have
1498 accumulated results for which we haven't emitted a branch yet, do
1499 so now. */
1501 void
1502 compare_by_pieces_d::finish_mode (machine_mode mode)
1504 if (m_accumulator != NULL_RTX)
1505 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode,
1506 NULL_RTX, NULL, m_fail_label,
1507 profile_probability::uninitialized ());
1510 /* Generate several move instructions to compare LEN bytes from blocks
1511 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1513 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1514 used to push FROM to the stack.
1516 ALIGN is maximum stack alignment we can assume.
1518 Optionally, the caller can pass a constfn and associated data in A1_CFN
1519 and A1_CFN_DATA. describing that the second operand being compared is a
1520 known constant and how to obtain its data. */
1522 static rtx
1523 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
1524 rtx target, unsigned int align,
1525 by_pieces_constfn a1_cfn, void *a1_cfn_data)
1527 rtx_code_label *fail_label = gen_label_rtx ();
1528 rtx_code_label *end_label = gen_label_rtx ();
1530 if (target == NULL_RTX
1531 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
1532 target = gen_reg_rtx (TYPE_MODE (integer_type_node));
1534 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
1535 fail_label);
1537 data.run ();
1539 emit_move_insn (target, const0_rtx);
1540 emit_jump (end_label);
1541 emit_barrier ();
1542 emit_label (fail_label);
1543 emit_move_insn (target, const1_rtx);
1544 emit_label (end_label);
1546 return target;
1549 /* Emit code to move a block Y to a block X. This may be done with
1550 string-move instructions, with multiple scalar move instructions,
1551 or with a library call.
1553 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1554 SIZE is an rtx that says how long they are.
1555 ALIGN is the maximum alignment we can assume they have.
1556 METHOD describes what kind of copy this is, and what mechanisms may be used.
1557 MIN_SIZE is the minimal size of block to move
1558 MAX_SIZE is the maximal size of block to move, if it can not be represented
1559 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1561 Return the address of the new block, if memcpy is called and returns it,
1562 0 otherwise. */
1565 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1566 unsigned int expected_align, HOST_WIDE_INT expected_size,
1567 unsigned HOST_WIDE_INT min_size,
1568 unsigned HOST_WIDE_INT max_size,
1569 unsigned HOST_WIDE_INT probable_max_size)
1571 int may_use_call;
1572 rtx retval = 0;
1573 unsigned int align;
1575 gcc_assert (size);
1576 if (CONST_INT_P (size) && INTVAL (size) == 0)
1577 return 0;
1579 switch (method)
1581 case BLOCK_OP_NORMAL:
1582 case BLOCK_OP_TAILCALL:
1583 may_use_call = 1;
1584 break;
1586 case BLOCK_OP_CALL_PARM:
1587 may_use_call = block_move_libcall_safe_for_call_parm ();
1589 /* Make inhibit_defer_pop nonzero around the library call
1590 to force it to pop the arguments right away. */
1591 NO_DEFER_POP;
1592 break;
1594 case BLOCK_OP_NO_LIBCALL:
1595 may_use_call = 0;
1596 break;
1598 case BLOCK_OP_NO_LIBCALL_RET:
1599 may_use_call = -1;
1600 break;
1602 default:
1603 gcc_unreachable ();
1606 gcc_assert (MEM_P (x) && MEM_P (y));
1607 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1608 gcc_assert (align >= BITS_PER_UNIT);
1610 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1611 block copy is more efficient for other large modes, e.g. DCmode. */
1612 x = adjust_address (x, BLKmode, 0);
1613 y = adjust_address (y, BLKmode, 0);
1615 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1616 can be incorrect is coming from __builtin_memcpy. */
1617 if (CONST_INT_P (size))
1619 x = shallow_copy_rtx (x);
1620 y = shallow_copy_rtx (y);
1621 set_mem_size (x, INTVAL (size));
1622 set_mem_size (y, INTVAL (size));
1625 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1626 move_by_pieces (x, y, INTVAL (size), align, 0);
1627 else if (emit_block_move_via_movmem (x, y, size, align,
1628 expected_align, expected_size,
1629 min_size, max_size, probable_max_size))
1631 else if (may_use_call
1632 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1633 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1635 if (may_use_call < 0)
1636 return pc_rtx;
1638 /* Since x and y are passed to a libcall, mark the corresponding
1639 tree EXPR as addressable. */
1640 tree y_expr = MEM_EXPR (y);
1641 tree x_expr = MEM_EXPR (x);
1642 if (y_expr)
1643 mark_addressable (y_expr);
1644 if (x_expr)
1645 mark_addressable (x_expr);
1646 retval = emit_block_copy_via_libcall (x, y, size,
1647 method == BLOCK_OP_TAILCALL);
1650 else
1651 emit_block_move_via_loop (x, y, size, align);
1653 if (method == BLOCK_OP_CALL_PARM)
1654 OK_DEFER_POP;
1656 return retval;
1660 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1662 unsigned HOST_WIDE_INT max, min = 0;
1663 if (GET_CODE (size) == CONST_INT)
1664 min = max = UINTVAL (size);
1665 else
1666 max = GET_MODE_MASK (GET_MODE (size));
1667 return emit_block_move_hints (x, y, size, method, 0, -1,
1668 min, max, max);
1671 /* A subroutine of emit_block_move. Returns true if calling the
1672 block move libcall will not clobber any parameters which may have
1673 already been placed on the stack. */
1675 static bool
1676 block_move_libcall_safe_for_call_parm (void)
1678 #if defined (REG_PARM_STACK_SPACE)
1679 tree fn;
1680 #endif
1682 /* If arguments are pushed on the stack, then they're safe. */
1683 if (PUSH_ARGS)
1684 return true;
1686 /* If registers go on the stack anyway, any argument is sure to clobber
1687 an outgoing argument. */
1688 #if defined (REG_PARM_STACK_SPACE)
1689 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1690 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1691 depend on its argument. */
1692 (void) fn;
1693 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1694 && REG_PARM_STACK_SPACE (fn) != 0)
1695 return false;
1696 #endif
1698 /* If any argument goes in memory, then it might clobber an outgoing
1699 argument. */
1701 CUMULATIVE_ARGS args_so_far_v;
1702 cumulative_args_t args_so_far;
1703 tree fn, arg;
1705 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1706 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1707 args_so_far = pack_cumulative_args (&args_so_far_v);
1709 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1710 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1712 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1713 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1714 NULL_TREE, true);
1715 if (!tmp || !REG_P (tmp))
1716 return false;
1717 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1718 return false;
1719 targetm.calls.function_arg_advance (args_so_far, mode,
1720 NULL_TREE, true);
1723 return true;
1726 /* A subroutine of emit_block_move. Expand a movmem pattern;
1727 return true if successful. */
1729 static bool
1730 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1731 unsigned int expected_align, HOST_WIDE_INT expected_size,
1732 unsigned HOST_WIDE_INT min_size,
1733 unsigned HOST_WIDE_INT max_size,
1734 unsigned HOST_WIDE_INT probable_max_size)
1736 int save_volatile_ok = volatile_ok;
1738 if (expected_align < align)
1739 expected_align = align;
1740 if (expected_size != -1)
1742 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1743 expected_size = probable_max_size;
1744 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1745 expected_size = min_size;
1748 /* Since this is a move insn, we don't care about volatility. */
1749 volatile_ok = 1;
1751 /* Try the most limited insn first, because there's no point
1752 including more than one in the machine description unless
1753 the more limited one has some advantage. */
1755 opt_scalar_int_mode mode_iter;
1756 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
1758 scalar_int_mode mode = mode_iter.require ();
1759 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1761 if (code != CODE_FOR_nothing
1762 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1763 here because if SIZE is less than the mode mask, as it is
1764 returned by the macro, it will definitely be less than the
1765 actual mode mask. Since SIZE is within the Pmode address
1766 space, we limit MODE to Pmode. */
1767 && ((CONST_INT_P (size)
1768 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1769 <= (GET_MODE_MASK (mode) >> 1)))
1770 || max_size <= (GET_MODE_MASK (mode) >> 1)
1771 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1773 struct expand_operand ops[9];
1774 unsigned int nops;
1776 /* ??? When called via emit_block_move_for_call, it'd be
1777 nice if there were some way to inform the backend, so
1778 that it doesn't fail the expansion because it thinks
1779 emitting the libcall would be more efficient. */
1780 nops = insn_data[(int) code].n_generator_args;
1781 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1783 create_fixed_operand (&ops[0], x);
1784 create_fixed_operand (&ops[1], y);
1785 /* The check above guarantees that this size conversion is valid. */
1786 create_convert_operand_to (&ops[2], size, mode, true);
1787 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1788 if (nops >= 6)
1790 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1791 create_integer_operand (&ops[5], expected_size);
1793 if (nops >= 8)
1795 create_integer_operand (&ops[6], min_size);
1796 /* If we can not represent the maximal size,
1797 make parameter NULL. */
1798 if ((HOST_WIDE_INT) max_size != -1)
1799 create_integer_operand (&ops[7], max_size);
1800 else
1801 create_fixed_operand (&ops[7], NULL);
1803 if (nops == 9)
1805 /* If we can not represent the maximal size,
1806 make parameter NULL. */
1807 if ((HOST_WIDE_INT) probable_max_size != -1)
1808 create_integer_operand (&ops[8], probable_max_size);
1809 else
1810 create_fixed_operand (&ops[8], NULL);
1812 if (maybe_expand_insn (code, nops, ops))
1814 volatile_ok = save_volatile_ok;
1815 return true;
1820 volatile_ok = save_volatile_ok;
1821 return false;
1824 /* A subroutine of emit_block_move. Copy the data via an explicit
1825 loop. This is used only when libcalls are forbidden. */
1826 /* ??? It'd be nice to copy in hunks larger than QImode. */
1828 static void
1829 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1830 unsigned int align ATTRIBUTE_UNUSED)
1832 rtx_code_label *cmp_label, *top_label;
1833 rtx iter, x_addr, y_addr, tmp;
1834 machine_mode x_addr_mode = get_address_mode (x);
1835 machine_mode y_addr_mode = get_address_mode (y);
1836 machine_mode iter_mode;
1838 iter_mode = GET_MODE (size);
1839 if (iter_mode == VOIDmode)
1840 iter_mode = word_mode;
1842 top_label = gen_label_rtx ();
1843 cmp_label = gen_label_rtx ();
1844 iter = gen_reg_rtx (iter_mode);
1846 emit_move_insn (iter, const0_rtx);
1848 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1849 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1850 do_pending_stack_adjust ();
1852 emit_jump (cmp_label);
1853 emit_label (top_label);
1855 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1856 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1858 if (x_addr_mode != y_addr_mode)
1859 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1860 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1862 x = change_address (x, QImode, x_addr);
1863 y = change_address (y, QImode, y_addr);
1865 emit_move_insn (x, y);
1867 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1868 true, OPTAB_LIB_WIDEN);
1869 if (tmp != iter)
1870 emit_move_insn (iter, tmp);
1872 emit_label (cmp_label);
1874 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1875 true, top_label,
1876 profile_probability::guessed_always ()
1877 .apply_scale (9, 10));
1880 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1881 TAILCALL is true if this is a tail call. */
1884 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
1885 rtx size, bool tailcall)
1887 rtx dst_addr, src_addr;
1888 tree call_expr, dst_tree, src_tree, size_tree;
1889 machine_mode size_mode;
1891 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1892 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1893 dst_tree = make_tree (ptr_type_node, dst_addr);
1895 src_addr = copy_addr_to_reg (XEXP (src, 0));
1896 src_addr = convert_memory_address (ptr_mode, src_addr);
1897 src_tree = make_tree (ptr_type_node, src_addr);
1899 size_mode = TYPE_MODE (sizetype);
1900 size = convert_to_mode (size_mode, size, 1);
1901 size = copy_to_mode_reg (size_mode, size);
1902 size_tree = make_tree (sizetype, size);
1904 /* It is incorrect to use the libcall calling conventions for calls to
1905 memcpy/memmove/memcmp because they can be provided by the user. */
1906 tree fn = builtin_decl_implicit (fncode);
1907 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1908 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1910 return expand_call (call_expr, NULL_RTX, false);
1913 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1914 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1915 otherwise return null. */
1918 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
1919 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
1920 HOST_WIDE_INT align)
1922 machine_mode insn_mode = insn_data[icode].operand[0].mode;
1924 if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
1925 target = NULL_RTX;
1927 struct expand_operand ops[5];
1928 create_output_operand (&ops[0], target, insn_mode);
1929 create_fixed_operand (&ops[1], arg1_rtx);
1930 create_fixed_operand (&ops[2], arg2_rtx);
1931 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type),
1932 TYPE_UNSIGNED (arg3_type));
1933 create_integer_operand (&ops[4], align);
1934 if (maybe_expand_insn (icode, 5, ops))
1935 return ops[0].value;
1936 return NULL_RTX;
1939 /* Expand a block compare between X and Y with length LEN using the
1940 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1941 of the expression that was used to calculate the length. ALIGN
1942 gives the known minimum common alignment. */
1944 static rtx
1945 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
1946 unsigned align)
1948 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1949 implementing memcmp because it will stop if it encounters two
1950 zero bytes. */
1951 insn_code icode = direct_optab_handler (cmpmem_optab, SImode);
1953 if (icode == CODE_FOR_nothing)
1954 return NULL_RTX;
1956 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
1959 /* Emit code to compare a block Y to a block X. This may be done with
1960 string-compare instructions, with multiple scalar instructions,
1961 or with a library call.
1963 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1964 they are. LEN_TYPE is the type of the expression that was used to
1965 calculate it.
1967 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1968 value of a normal memcmp call, instead we can just compare for equality.
1969 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1970 returning NULL_RTX.
1972 Optionally, the caller can pass a constfn and associated data in Y_CFN
1973 and Y_CFN_DATA. describing that the second operand being compared is a
1974 known constant and how to obtain its data.
1975 Return the result of the comparison, or NULL_RTX if we failed to
1976 perform the operation. */
1979 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
1980 bool equality_only, by_pieces_constfn y_cfn,
1981 void *y_cfndata)
1983 rtx result = 0;
1985 if (CONST_INT_P (len) && INTVAL (len) == 0)
1986 return const0_rtx;
1988 gcc_assert (MEM_P (x) && MEM_P (y));
1989 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1990 gcc_assert (align >= BITS_PER_UNIT);
1992 x = adjust_address (x, BLKmode, 0);
1993 y = adjust_address (y, BLKmode, 0);
1995 if (equality_only
1996 && CONST_INT_P (len)
1997 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES))
1998 result = compare_by_pieces (x, y, INTVAL (len), target, align,
1999 y_cfn, y_cfndata);
2000 else
2001 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);
2003 return result;
2006 /* Copy all or part of a value X into registers starting at REGNO.
2007 The number of registers to be filled is NREGS. */
2009 void
2010 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2012 if (nregs == 0)
2013 return;
2015 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
2016 x = validize_mem (force_const_mem (mode, x));
2018 /* See if the machine can do this with a load multiple insn. */
2019 if (targetm.have_load_multiple ())
2021 rtx_insn *last = get_last_insn ();
2022 rtx first = gen_rtx_REG (word_mode, regno);
2023 if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
2024 GEN_INT (nregs)))
2026 emit_insn (pat);
2027 return;
2029 else
2030 delete_insns_since (last);
2033 for (int i = 0; i < nregs; i++)
2034 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
2035 operand_subword_force (x, i, mode));
2038 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2039 The number of registers to be filled is NREGS. */
2041 void
2042 move_block_from_reg (int regno, rtx x, int nregs)
2044 if (nregs == 0)
2045 return;
2047 /* See if the machine can do this with a store multiple insn. */
2048 if (targetm.have_store_multiple ())
2050 rtx_insn *last = get_last_insn ();
2051 rtx first = gen_rtx_REG (word_mode, regno);
2052 if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
2053 GEN_INT (nregs)))
2055 emit_insn (pat);
2056 return;
2058 else
2059 delete_insns_since (last);
2062 for (int i = 0; i < nregs; i++)
2064 rtx tem = operand_subword (x, i, 1, BLKmode);
2066 gcc_assert (tem);
2068 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
2072 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2073 ORIG, where ORIG is a non-consecutive group of registers represented by
2074 a PARALLEL. The clone is identical to the original except in that the
2075 original set of registers is replaced by a new set of pseudo registers.
2076 The new set has the same modes as the original set. */
2079 gen_group_rtx (rtx orig)
2081 int i, length;
2082 rtx *tmps;
2084 gcc_assert (GET_CODE (orig) == PARALLEL);
2086 length = XVECLEN (orig, 0);
2087 tmps = XALLOCAVEC (rtx, length);
2089 /* Skip a NULL entry in first slot. */
2090 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
2092 if (i)
2093 tmps[0] = 0;
2095 for (; i < length; i++)
2097 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
2098 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
2100 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
2103 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
2106 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2107 except that values are placed in TMPS[i], and must later be moved
2108 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2110 static void
2111 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type,
2112 poly_int64 ssize)
2114 rtx src;
2115 int start, i;
2116 machine_mode m = GET_MODE (orig_src);
2118 gcc_assert (GET_CODE (dst) == PARALLEL);
2120 if (m != VOIDmode
2121 && !SCALAR_INT_MODE_P (m)
2122 && !MEM_P (orig_src)
2123 && GET_CODE (orig_src) != CONCAT)
2125 scalar_int_mode imode;
2126 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode))
2128 src = gen_reg_rtx (imode);
2129 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src);
2131 else
2133 src = assign_stack_temp (GET_MODE (orig_src), ssize);
2134 emit_move_insn (src, orig_src);
2136 emit_group_load_1 (tmps, dst, src, type, ssize);
2137 return;
2140 /* Check for a NULL entry, used to indicate that the parameter goes
2141 both on the stack and in registers. */
2142 if (XEXP (XVECEXP (dst, 0, 0), 0))
2143 start = 0;
2144 else
2145 start = 1;
2147 /* Process the pieces. */
2148 for (i = start; i < XVECLEN (dst, 0); i++)
2150 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
2151 poly_int64 bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
2152 poly_int64 bytelen = GET_MODE_SIZE (mode);
2153 poly_int64 shift = 0;
2155 /* Handle trailing fragments that run over the size of the struct.
2156 It's the target's responsibility to make sure that the fragment
2157 cannot be strictly smaller in some cases and strictly larger
2158 in others. */
2159 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2160 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2162 /* Arrange to shift the fragment to where it belongs.
2163 extract_bit_field loads to the lsb of the reg. */
2164 if (
2165 #ifdef BLOCK_REG_PADDING
2166 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
2167 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2168 #else
2169 BYTES_BIG_ENDIAN
2170 #endif
2172 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2173 bytelen = ssize - bytepos;
2174 gcc_assert (maybe_gt (bytelen, 0));
2177 /* If we won't be loading directly from memory, protect the real source
2178 from strange tricks we might play; but make sure that the source can
2179 be loaded directly into the destination. */
2180 src = orig_src;
2181 if (!MEM_P (orig_src)
2182 && (!CONSTANT_P (orig_src)
2183 || (GET_MODE (orig_src) != mode
2184 && GET_MODE (orig_src) != VOIDmode)))
2186 if (GET_MODE (orig_src) == VOIDmode)
2187 src = gen_reg_rtx (mode);
2188 else
2189 src = gen_reg_rtx (GET_MODE (orig_src));
2191 emit_move_insn (src, orig_src);
2194 /* Optimize the access just a bit. */
2195 if (MEM_P (src)
2196 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src))
2197 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
2198 && multiple_p (bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode))
2199 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2201 tmps[i] = gen_reg_rtx (mode);
2202 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
2204 else if (COMPLEX_MODE_P (mode)
2205 && GET_MODE (src) == mode
2206 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2207 /* Let emit_move_complex do the bulk of the work. */
2208 tmps[i] = src;
2209 else if (GET_CODE (src) == CONCAT)
2211 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src));
2212 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
2213 unsigned int elt;
2214 poly_int64 subpos;
2216 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos)
2217 && known_le (subpos + bytelen, slen0))
2219 /* The following assumes that the concatenated objects all
2220 have the same size. In this case, a simple calculation
2221 can be used to determine the object and the bit field
2222 to be extracted. */
2223 tmps[i] = XEXP (src, elt);
2224 if (maybe_ne (subpos, 0)
2225 || maybe_ne (subpos + bytelen, slen0)
2226 || (!CONSTANT_P (tmps[i])
2227 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
2228 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
2229 subpos * BITS_PER_UNIT,
2230 1, NULL_RTX, mode, mode, false,
2231 NULL);
2233 else
2235 rtx mem;
2237 gcc_assert (known_eq (bytepos, 0));
2238 mem = assign_stack_temp (GET_MODE (src), slen);
2239 emit_move_insn (mem, src);
2240 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
2241 0, 1, NULL_RTX, mode, mode, false,
2242 NULL);
2245 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2246 SIMD register, which is currently broken. While we get GCC
2247 to emit proper RTL for these cases, let's dump to memory. */
2248 else if (VECTOR_MODE_P (GET_MODE (dst))
2249 && REG_P (src))
2251 poly_uint64 slen = GET_MODE_SIZE (GET_MODE (src));
2252 rtx mem;
2254 mem = assign_stack_temp (GET_MODE (src), slen);
2255 emit_move_insn (mem, src);
2256 tmps[i] = adjust_address (mem, mode, bytepos);
2258 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
2259 && XVECLEN (dst, 0) > 1)
2260 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
2261 else if (CONSTANT_P (src))
2263 if (known_eq (bytelen, ssize))
2264 tmps[i] = src;
2265 else
2267 rtx first, second;
2269 /* TODO: const_wide_int can have sizes other than this... */
2270 gcc_assert (known_eq (2 * bytelen, ssize));
2271 split_double (src, &first, &second);
2272 if (i)
2273 tmps[i] = second;
2274 else
2275 tmps[i] = first;
2278 else if (REG_P (src) && GET_MODE (src) == mode)
2279 tmps[i] = src;
2280 else
2281 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
2282 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
2283 mode, mode, false, NULL);
2285 if (maybe_ne (shift, 0))
2286 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
2287 shift, tmps[i], 0);
2291 /* Emit code to move a block SRC of type TYPE to a block DST,
2292 where DST is non-consecutive registers represented by a PARALLEL.
2293 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2294 if not known. */
2296 void
2297 emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize)
2299 rtx *tmps;
2300 int i;
2302 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
2303 emit_group_load_1 (tmps, dst, src, type, ssize);
2305 /* Copy the extracted pieces into the proper (probable) hard regs. */
2306 for (i = 0; i < XVECLEN (dst, 0); i++)
2308 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
2309 if (d == NULL)
2310 continue;
2311 emit_move_insn (d, tmps[i]);
2315 /* Similar, but load SRC into new pseudos in a format that looks like
2316 PARALLEL. This can later be fed to emit_group_move to get things
2317 in the right place. */
2320 emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize)
2322 rtvec vec;
2323 int i;
2325 vec = rtvec_alloc (XVECLEN (parallel, 0));
2326 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
2328 /* Convert the vector to look just like the original PARALLEL, except
2329 with the computed values. */
2330 for (i = 0; i < XVECLEN (parallel, 0); i++)
2332 rtx e = XVECEXP (parallel, 0, i);
2333 rtx d = XEXP (e, 0);
2335 if (d)
2337 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
2338 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
2340 RTVEC_ELT (vec, i) = e;
2343 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
2346 /* Emit code to move a block SRC to block DST, where SRC and DST are
2347 non-consecutive groups of registers, each represented by a PARALLEL. */
2349 void
2350 emit_group_move (rtx dst, rtx src)
2352 int i;
2354 gcc_assert (GET_CODE (src) == PARALLEL
2355 && GET_CODE (dst) == PARALLEL
2356 && XVECLEN (src, 0) == XVECLEN (dst, 0));
2358 /* Skip first entry if NULL. */
2359 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
2360 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
2361 XEXP (XVECEXP (src, 0, i), 0));
2364 /* Move a group of registers represented by a PARALLEL into pseudos. */
2367 emit_group_move_into_temps (rtx src)
2369 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
2370 int i;
2372 for (i = 0; i < XVECLEN (src, 0); i++)
2374 rtx e = XVECEXP (src, 0, i);
2375 rtx d = XEXP (e, 0);
2377 if (d)
2378 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
2379 RTVEC_ELT (vec, i) = e;
2382 return gen_rtx_PARALLEL (GET_MODE (src), vec);
2385 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2386 where SRC is non-consecutive registers represented by a PARALLEL.
2387 SSIZE represents the total size of block ORIG_DST, or -1 if not
2388 known. */
2390 void
2391 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
2392 poly_int64 ssize)
2394 rtx *tmps, dst;
2395 int start, finish, i;
2396 machine_mode m = GET_MODE (orig_dst);
2398 gcc_assert (GET_CODE (src) == PARALLEL);
2400 if (!SCALAR_INT_MODE_P (m)
2401 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
2403 scalar_int_mode imode;
2404 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode))
2406 dst = gen_reg_rtx (imode);
2407 emit_group_store (dst, src, type, ssize);
2408 dst = gen_lowpart (GET_MODE (orig_dst), dst);
2410 else
2412 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
2413 emit_group_store (dst, src, type, ssize);
2415 emit_move_insn (orig_dst, dst);
2416 return;
2419 /* Check for a NULL entry, used to indicate that the parameter goes
2420 both on the stack and in registers. */
2421 if (XEXP (XVECEXP (src, 0, 0), 0))
2422 start = 0;
2423 else
2424 start = 1;
2425 finish = XVECLEN (src, 0);
2427 tmps = XALLOCAVEC (rtx, finish);
2429 /* Copy the (probable) hard regs into pseudos. */
2430 for (i = start; i < finish; i++)
2432 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
2433 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
2435 tmps[i] = gen_reg_rtx (GET_MODE (reg));
2436 emit_move_insn (tmps[i], reg);
2438 else
2439 tmps[i] = reg;
2442 /* If we won't be storing directly into memory, protect the real destination
2443 from strange tricks we might play. */
2444 dst = orig_dst;
2445 if (GET_CODE (dst) == PARALLEL)
2447 rtx temp;
2449 /* We can get a PARALLEL dst if there is a conditional expression in
2450 a return statement. In that case, the dst and src are the same,
2451 so no action is necessary. */
2452 if (rtx_equal_p (dst, src))
2453 return;
2455 /* It is unclear if we can ever reach here, but we may as well handle
2456 it. Allocate a temporary, and split this into a store/load to/from
2457 the temporary. */
2458 temp = assign_stack_temp (GET_MODE (dst), ssize);
2459 emit_group_store (temp, src, type, ssize);
2460 emit_group_load (dst, temp, type, ssize);
2461 return;
2463 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2465 machine_mode outer = GET_MODE (dst);
2466 machine_mode inner;
2467 poly_int64 bytepos;
2468 bool done = false;
2469 rtx temp;
2471 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2472 dst = gen_reg_rtx (outer);
2474 /* Make life a bit easier for combine. */
2475 /* If the first element of the vector is the low part
2476 of the destination mode, use a paradoxical subreg to
2477 initialize the destination. */
2478 if (start < finish)
2480 inner = GET_MODE (tmps[start]);
2481 bytepos = subreg_lowpart_offset (inner, outer);
2482 if (known_eq (INTVAL (XEXP (XVECEXP (src, 0, start), 1)), bytepos))
2484 temp = simplify_gen_subreg (outer, tmps[start],
2485 inner, 0);
2486 if (temp)
2488 emit_move_insn (dst, temp);
2489 done = true;
2490 start++;
2495 /* If the first element wasn't the low part, try the last. */
2496 if (!done
2497 && start < finish - 1)
2499 inner = GET_MODE (tmps[finish - 1]);
2500 bytepos = subreg_lowpart_offset (inner, outer);
2501 if (known_eq (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)),
2502 bytepos))
2504 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2505 inner, 0);
2506 if (temp)
2508 emit_move_insn (dst, temp);
2509 done = true;
2510 finish--;
2515 /* Otherwise, simply initialize the result to zero. */
2516 if (!done)
2517 emit_move_insn (dst, CONST0_RTX (outer));
2520 /* Process the pieces. */
2521 for (i = start; i < finish; i++)
2523 poly_int64 bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2524 machine_mode mode = GET_MODE (tmps[i]);
2525 poly_int64 bytelen = GET_MODE_SIZE (mode);
2526 poly_uint64 adj_bytelen;
2527 rtx dest = dst;
2529 /* Handle trailing fragments that run over the size of the struct.
2530 It's the target's responsibility to make sure that the fragment
2531 cannot be strictly smaller in some cases and strictly larger
2532 in others. */
2533 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2534 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2535 adj_bytelen = ssize - bytepos;
2536 else
2537 adj_bytelen = bytelen;
2539 if (GET_CODE (dst) == CONCAT)
2541 if (known_le (bytepos + adj_bytelen,
2542 GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2543 dest = XEXP (dst, 0);
2544 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2546 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2547 dest = XEXP (dst, 1);
2549 else
2551 machine_mode dest_mode = GET_MODE (dest);
2552 machine_mode tmp_mode = GET_MODE (tmps[i]);
2554 gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0));
2556 if (GET_MODE_ALIGNMENT (dest_mode)
2557 >= GET_MODE_ALIGNMENT (tmp_mode))
2559 dest = assign_stack_temp (dest_mode,
2560 GET_MODE_SIZE (dest_mode));
2561 emit_move_insn (adjust_address (dest,
2562 tmp_mode,
2563 bytepos),
2564 tmps[i]);
2565 dst = dest;
2567 else
2569 dest = assign_stack_temp (tmp_mode,
2570 GET_MODE_SIZE (tmp_mode));
2571 emit_move_insn (dest, tmps[i]);
2572 dst = adjust_address (dest, dest_mode, bytepos);
2574 break;
2578 /* Handle trailing fragments that run over the size of the struct. */
2579 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2581 /* store_bit_field always takes its value from the lsb.
2582 Move the fragment to the lsb if it's not already there. */
2583 if (
2584 #ifdef BLOCK_REG_PADDING
2585 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2586 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2587 #else
2588 BYTES_BIG_ENDIAN
2589 #endif
2592 poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2593 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2594 shift, tmps[i], 0);
2597 /* Make sure not to write past the end of the struct. */
2598 store_bit_field (dest,
2599 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2600 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2601 VOIDmode, tmps[i], false);
2604 /* Optimize the access just a bit. */
2605 else if (MEM_P (dest)
2606 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest))
2607 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2608 && multiple_p (bytepos * BITS_PER_UNIT,
2609 GET_MODE_ALIGNMENT (mode))
2610 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2611 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2613 else
2614 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2615 0, 0, mode, tmps[i], false);
2618 /* Copy from the pseudo into the (probable) hard reg. */
2619 if (orig_dst != dst)
2620 emit_move_insn (orig_dst, dst);
2623 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2624 of the value stored in X. */
2627 maybe_emit_group_store (rtx x, tree type)
2629 machine_mode mode = TYPE_MODE (type);
2630 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2631 if (GET_CODE (x) == PARALLEL)
2633 rtx result = gen_reg_rtx (mode);
2634 emit_group_store (result, x, type, int_size_in_bytes (type));
2635 return result;
2637 return x;
2640 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2642 This is used on targets that return BLKmode values in registers. */
2644 static void
2645 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2647 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2648 rtx src = NULL, dst = NULL;
2649 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2650 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2651 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2652 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg));
2653 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target));
2654 fixed_size_mode copy_mode;
2656 /* BLKmode registers created in the back-end shouldn't have survived. */
2657 gcc_assert (mode != BLKmode);
2659 /* If the structure doesn't take up a whole number of words, see whether
2660 SRCREG is padded on the left or on the right. If it's on the left,
2661 set PADDING_CORRECTION to the number of bits to skip.
2663 In most ABIs, the structure will be returned at the least end of
2664 the register, which translates to right padding on little-endian
2665 targets and left padding on big-endian targets. The opposite
2666 holds if the structure is returned at the most significant
2667 end of the register. */
2668 if (bytes % UNITS_PER_WORD != 0
2669 && (targetm.calls.return_in_msb (type)
2670 ? !BYTES_BIG_ENDIAN
2671 : BYTES_BIG_ENDIAN))
2672 padding_correction
2673 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2675 /* We can use a single move if we have an exact mode for the size. */
2676 else if (MEM_P (target)
2677 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target))
2678 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2679 && bytes == GET_MODE_SIZE (mode))
2681 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2682 return;
2685 /* And if we additionally have the same mode for a register. */
2686 else if (REG_P (target)
2687 && GET_MODE (target) == mode
2688 && bytes == GET_MODE_SIZE (mode))
2690 emit_move_insn (target, srcreg);
2691 return;
2694 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2695 into a new pseudo which is a full word. */
2696 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2698 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2699 mode = word_mode;
2702 /* Copy the structure BITSIZE bits at a time. If the target lives in
2703 memory, take care of not reading/writing past its end by selecting
2704 a copy mode suited to BITSIZE. This should always be possible given
2705 how it is computed.
2707 If the target lives in register, make sure not to select a copy mode
2708 larger than the mode of the register.
2710 We could probably emit more efficient code for machines which do not use
2711 strict alignment, but it doesn't seem worth the effort at the current
2712 time. */
2714 copy_mode = word_mode;
2715 if (MEM_P (target))
2717 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
2718 if (mem_mode.exists ())
2719 copy_mode = mem_mode.require ();
2721 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2722 copy_mode = tmode;
2724 for (bitpos = 0, xbitpos = padding_correction;
2725 bitpos < bytes * BITS_PER_UNIT;
2726 bitpos += bitsize, xbitpos += bitsize)
2728 /* We need a new source operand each time xbitpos is on a
2729 word boundary and when xbitpos == padding_correction
2730 (the first time through). */
2731 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2732 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2734 /* We need a new destination operand each time bitpos is on
2735 a word boundary. */
2736 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2737 dst = target;
2738 else if (bitpos % BITS_PER_WORD == 0)
2739 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2741 /* Use xbitpos for the source extraction (right justified) and
2742 bitpos for the destination store (left justified). */
2743 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2744 extract_bit_field (src, bitsize,
2745 xbitpos % BITS_PER_WORD, 1,
2746 NULL_RTX, copy_mode, copy_mode,
2747 false, NULL),
2748 false);
2752 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2753 register if it contains any data, otherwise return null.
2755 This is used on targets that return BLKmode values in registers. */
2758 copy_blkmode_to_reg (machine_mode mode_in, tree src)
2760 int i, n_regs;
2761 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2762 unsigned int bitsize;
2763 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2764 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2765 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
2766 fixed_size_mode dst_mode;
2768 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2770 x = expand_normal (src);
2772 bytes = arg_int_size_in_bytes (TREE_TYPE (src));
2773 if (bytes == 0)
2774 return NULL_RTX;
2776 /* If the structure doesn't take up a whole number of words, see
2777 whether the register value should be padded on the left or on
2778 the right. Set PADDING_CORRECTION to the number of padding
2779 bits needed on the left side.
2781 In most ABIs, the structure will be returned at the least end of
2782 the register, which translates to right padding on little-endian
2783 targets and left padding on big-endian targets. The opposite
2784 holds if the structure is returned at the most significant
2785 end of the register. */
2786 if (bytes % UNITS_PER_WORD != 0
2787 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2788 ? !BYTES_BIG_ENDIAN
2789 : BYTES_BIG_ENDIAN))
2790 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2791 * BITS_PER_UNIT));
2793 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2794 dst_words = XALLOCAVEC (rtx, n_regs);
2795 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2797 /* Copy the structure BITSIZE bits at a time. */
2798 for (bitpos = 0, xbitpos = padding_correction;
2799 bitpos < bytes * BITS_PER_UNIT;
2800 bitpos += bitsize, xbitpos += bitsize)
2802 /* We need a new destination pseudo each time xbitpos is
2803 on a word boundary and when xbitpos == padding_correction
2804 (the first time through). */
2805 if (xbitpos % BITS_PER_WORD == 0
2806 || xbitpos == padding_correction)
2808 /* Generate an appropriate register. */
2809 dst_word = gen_reg_rtx (word_mode);
2810 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2812 /* Clear the destination before we move anything into it. */
2813 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2816 /* We need a new source operand each time bitpos is on a word
2817 boundary. */
2818 if (bitpos % BITS_PER_WORD == 0)
2819 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2821 /* Use bitpos for the source extraction (left justified) and
2822 xbitpos for the destination store (right justified). */
2823 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2824 0, 0, word_mode,
2825 extract_bit_field (src_word, bitsize,
2826 bitpos % BITS_PER_WORD, 1,
2827 NULL_RTX, word_mode, word_mode,
2828 false, NULL),
2829 false);
2832 if (mode == BLKmode)
2834 /* Find the smallest integer mode large enough to hold the
2835 entire structure. */
2836 opt_scalar_int_mode mode_iter;
2837 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
2838 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
2839 break;
2841 /* A suitable mode should have been found. */
2842 mode = mode_iter.require ();
2845 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2846 dst_mode = word_mode;
2847 else
2848 dst_mode = mode;
2849 dst = gen_reg_rtx (dst_mode);
2851 for (i = 0; i < n_regs; i++)
2852 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2854 if (mode != dst_mode)
2855 dst = gen_lowpart (mode, dst);
2857 return dst;
2860 /* Add a USE expression for REG to the (possibly empty) list pointed
2861 to by CALL_FUSAGE. REG must denote a hard register. */
2863 void
2864 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2866 gcc_assert (REG_P (reg));
2868 if (!HARD_REGISTER_P (reg))
2869 return;
2871 *call_fusage
2872 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2875 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2876 to by CALL_FUSAGE. REG must denote a hard register. */
2878 void
2879 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2881 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2883 *call_fusage
2884 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2887 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2888 starting at REGNO. All of these registers must be hard registers. */
2890 void
2891 use_regs (rtx *call_fusage, int regno, int nregs)
2893 int i;
2895 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2897 for (i = 0; i < nregs; i++)
2898 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2901 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2902 PARALLEL REGS. This is for calls that pass values in multiple
2903 non-contiguous locations. The Irix 6 ABI has examples of this. */
2905 void
2906 use_group_regs (rtx *call_fusage, rtx regs)
2908 int i;
2910 for (i = 0; i < XVECLEN (regs, 0); i++)
2912 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2914 /* A NULL entry means the parameter goes both on the stack and in
2915 registers. This can also be a MEM for targets that pass values
2916 partially on the stack and partially in registers. */
2917 if (reg != 0 && REG_P (reg))
2918 use_reg (call_fusage, reg);
2922 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2923 assigment and the code of the expresion on the RHS is CODE. Return
2924 NULL otherwise. */
2926 static gimple *
2927 get_def_for_expr (tree name, enum tree_code code)
2929 gimple *def_stmt;
2931 if (TREE_CODE (name) != SSA_NAME)
2932 return NULL;
2934 def_stmt = get_gimple_for_ssa_name (name);
2935 if (!def_stmt
2936 || gimple_assign_rhs_code (def_stmt) != code)
2937 return NULL;
2939 return def_stmt;
2942 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2943 assigment and the class of the expresion on the RHS is CLASS. Return
2944 NULL otherwise. */
2946 static gimple *
2947 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2949 gimple *def_stmt;
2951 if (TREE_CODE (name) != SSA_NAME)
2952 return NULL;
2954 def_stmt = get_gimple_for_ssa_name (name);
2955 if (!def_stmt
2956 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2957 return NULL;
2959 return def_stmt;
2962 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2963 its length in bytes. */
2966 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2967 unsigned int expected_align, HOST_WIDE_INT expected_size,
2968 unsigned HOST_WIDE_INT min_size,
2969 unsigned HOST_WIDE_INT max_size,
2970 unsigned HOST_WIDE_INT probable_max_size)
2972 machine_mode mode = GET_MODE (object);
2973 unsigned int align;
2975 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2977 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2978 just move a zero. Otherwise, do this a piece at a time. */
2979 if (mode != BLKmode
2980 && CONST_INT_P (size)
2981 && known_eq (INTVAL (size), GET_MODE_SIZE (mode)))
2983 rtx zero = CONST0_RTX (mode);
2984 if (zero != NULL)
2986 emit_move_insn (object, zero);
2987 return NULL;
2990 if (COMPLEX_MODE_P (mode))
2992 zero = CONST0_RTX (GET_MODE_INNER (mode));
2993 if (zero != NULL)
2995 write_complex_part (object, zero, 0);
2996 write_complex_part (object, zero, 1);
2997 return NULL;
3002 if (size == const0_rtx)
3003 return NULL;
3005 align = MEM_ALIGN (object);
3007 if (CONST_INT_P (size)
3008 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
3009 CLEAR_BY_PIECES,
3010 optimize_insn_for_speed_p ()))
3011 clear_by_pieces (object, INTVAL (size), align);
3012 else if (set_storage_via_setmem (object, size, const0_rtx, align,
3013 expected_align, expected_size,
3014 min_size, max_size, probable_max_size))
3016 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
3017 return set_storage_via_libcall (object, size, const0_rtx,
3018 method == BLOCK_OP_TAILCALL);
3019 else
3020 gcc_unreachable ();
3022 return NULL;
3026 clear_storage (rtx object, rtx size, enum block_op_methods method)
3028 unsigned HOST_WIDE_INT max, min = 0;
3029 if (GET_CODE (size) == CONST_INT)
3030 min = max = UINTVAL (size);
3031 else
3032 max = GET_MODE_MASK (GET_MODE (size));
3033 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
3037 /* A subroutine of clear_storage. Expand a call to memset.
3038 Return the return value of memset, 0 otherwise. */
3041 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3043 tree call_expr, fn, object_tree, size_tree, val_tree;
3044 machine_mode size_mode;
3046 object = copy_addr_to_reg (XEXP (object, 0));
3047 object_tree = make_tree (ptr_type_node, object);
3049 if (!CONST_INT_P (val))
3050 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
3051 val_tree = make_tree (integer_type_node, val);
3053 size_mode = TYPE_MODE (sizetype);
3054 size = convert_to_mode (size_mode, size, 1);
3055 size = copy_to_mode_reg (size_mode, size);
3056 size_tree = make_tree (sizetype, size);
3058 /* It is incorrect to use the libcall calling conventions for calls to
3059 memset because it can be provided by the user. */
3060 fn = builtin_decl_implicit (BUILT_IN_MEMSET);
3061 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
3062 CALL_EXPR_TAILCALL (call_expr) = tailcall;
3064 return expand_call (call_expr, NULL_RTX, false);
3067 /* Expand a setmem pattern; return true if successful. */
3069 bool
3070 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
3071 unsigned int expected_align, HOST_WIDE_INT expected_size,
3072 unsigned HOST_WIDE_INT min_size,
3073 unsigned HOST_WIDE_INT max_size,
3074 unsigned HOST_WIDE_INT probable_max_size)
3076 /* Try the most limited insn first, because there's no point
3077 including more than one in the machine description unless
3078 the more limited one has some advantage. */
3080 if (expected_align < align)
3081 expected_align = align;
3082 if (expected_size != -1)
3084 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
3085 expected_size = max_size;
3086 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
3087 expected_size = min_size;
3090 opt_scalar_int_mode mode_iter;
3091 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
3093 scalar_int_mode mode = mode_iter.require ();
3094 enum insn_code code = direct_optab_handler (setmem_optab, mode);
3096 if (code != CODE_FOR_nothing
3097 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3098 here because if SIZE is less than the mode mask, as it is
3099 returned by the macro, it will definitely be less than the
3100 actual mode mask. Since SIZE is within the Pmode address
3101 space, we limit MODE to Pmode. */
3102 && ((CONST_INT_P (size)
3103 && ((unsigned HOST_WIDE_INT) INTVAL (size)
3104 <= (GET_MODE_MASK (mode) >> 1)))
3105 || max_size <= (GET_MODE_MASK (mode) >> 1)
3106 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
3108 struct expand_operand ops[9];
3109 unsigned int nops;
3111 nops = insn_data[(int) code].n_generator_args;
3112 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
3114 create_fixed_operand (&ops[0], object);
3115 /* The check above guarantees that this size conversion is valid. */
3116 create_convert_operand_to (&ops[1], size, mode, true);
3117 create_convert_operand_from (&ops[2], val, byte_mode, true);
3118 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
3119 if (nops >= 6)
3121 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
3122 create_integer_operand (&ops[5], expected_size);
3124 if (nops >= 8)
3126 create_integer_operand (&ops[6], min_size);
3127 /* If we can not represent the maximal size,
3128 make parameter NULL. */
3129 if ((HOST_WIDE_INT) max_size != -1)
3130 create_integer_operand (&ops[7], max_size);
3131 else
3132 create_fixed_operand (&ops[7], NULL);
3134 if (nops == 9)
3136 /* If we can not represent the maximal size,
3137 make parameter NULL. */
3138 if ((HOST_WIDE_INT) probable_max_size != -1)
3139 create_integer_operand (&ops[8], probable_max_size);
3140 else
3141 create_fixed_operand (&ops[8], NULL);
3143 if (maybe_expand_insn (code, nops, ops))
3144 return true;
3148 return false;
3152 /* Write to one of the components of the complex value CPLX. Write VAL to
3153 the real part if IMAG_P is false, and the imaginary part if its true. */
3155 void
3156 write_complex_part (rtx cplx, rtx val, bool imag_p)
3158 machine_mode cmode;
3159 scalar_mode imode;
3160 unsigned ibitsize;
3162 if (GET_CODE (cplx) == CONCAT)
3164 emit_move_insn (XEXP (cplx, imag_p), val);
3165 return;
3168 cmode = GET_MODE (cplx);
3169 imode = GET_MODE_INNER (cmode);
3170 ibitsize = GET_MODE_BITSIZE (imode);
3172 /* For MEMs simplify_gen_subreg may generate an invalid new address
3173 because, e.g., the original address is considered mode-dependent
3174 by the target, which restricts simplify_subreg from invoking
3175 adjust_address_nv. Instead of preparing fallback support for an
3176 invalid address, we call adjust_address_nv directly. */
3177 if (MEM_P (cplx))
3179 emit_move_insn (adjust_address_nv (cplx, imode,
3180 imag_p ? GET_MODE_SIZE (imode) : 0),
3181 val);
3182 return;
3185 /* If the sub-object is at least word sized, then we know that subregging
3186 will work. This special case is important, since store_bit_field
3187 wants to operate on integer modes, and there's rarely an OImode to
3188 correspond to TCmode. */
3189 if (ibitsize >= BITS_PER_WORD
3190 /* For hard regs we have exact predicates. Assume we can split
3191 the original object if it spans an even number of hard regs.
3192 This special case is important for SCmode on 64-bit platforms
3193 where the natural size of floating-point regs is 32-bit. */
3194 || (REG_P (cplx)
3195 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3196 && REG_NREGS (cplx) % 2 == 0))
3198 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3199 imag_p ? GET_MODE_SIZE (imode) : 0);
3200 if (part)
3202 emit_move_insn (part, val);
3203 return;
3205 else
3206 /* simplify_gen_subreg may fail for sub-word MEMs. */
3207 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3210 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
3211 false);
3214 /* Extract one of the components of the complex value CPLX. Extract the
3215 real part if IMAG_P is false, and the imaginary part if it's true. */
3218 read_complex_part (rtx cplx, bool imag_p)
3220 machine_mode cmode;
3221 scalar_mode imode;
3222 unsigned ibitsize;
3224 if (GET_CODE (cplx) == CONCAT)
3225 return XEXP (cplx, imag_p);
3227 cmode = GET_MODE (cplx);
3228 imode = GET_MODE_INNER (cmode);
3229 ibitsize = GET_MODE_BITSIZE (imode);
3231 /* Special case reads from complex constants that got spilled to memory. */
3232 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3234 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3235 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3237 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3238 if (CONSTANT_CLASS_P (part))
3239 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3243 /* For MEMs simplify_gen_subreg may generate an invalid new address
3244 because, e.g., the original address is considered mode-dependent
3245 by the target, which restricts simplify_subreg from invoking
3246 adjust_address_nv. Instead of preparing fallback support for an
3247 invalid address, we call adjust_address_nv directly. */
3248 if (MEM_P (cplx))
3249 return adjust_address_nv (cplx, imode,
3250 imag_p ? GET_MODE_SIZE (imode) : 0);
3252 /* If the sub-object is at least word sized, then we know that subregging
3253 will work. This special case is important, since extract_bit_field
3254 wants to operate on integer modes, and there's rarely an OImode to
3255 correspond to TCmode. */
3256 if (ibitsize >= BITS_PER_WORD
3257 /* For hard regs we have exact predicates. Assume we can split
3258 the original object if it spans an even number of hard regs.
3259 This special case is important for SCmode on 64-bit platforms
3260 where the natural size of floating-point regs is 32-bit. */
3261 || (REG_P (cplx)
3262 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3263 && REG_NREGS (cplx) % 2 == 0))
3265 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3266 imag_p ? GET_MODE_SIZE (imode) : 0);
3267 if (ret)
3268 return ret;
3269 else
3270 /* simplify_gen_subreg may fail for sub-word MEMs. */
3271 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3274 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3275 true, NULL_RTX, imode, imode, false, NULL);
3278 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3279 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3280 represented in NEW_MODE. If FORCE is true, this will never happen, as
3281 we'll force-create a SUBREG if needed. */
3283 static rtx
3284 emit_move_change_mode (machine_mode new_mode,
3285 machine_mode old_mode, rtx x, bool force)
3287 rtx ret;
3289 if (push_operand (x, GET_MODE (x)))
3291 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3292 MEM_COPY_ATTRIBUTES (ret, x);
3294 else if (MEM_P (x))
3296 /* We don't have to worry about changing the address since the
3297 size in bytes is supposed to be the same. */
3298 if (reload_in_progress)
3300 /* Copy the MEM to change the mode and move any
3301 substitutions from the old MEM to the new one. */
3302 ret = adjust_address_nv (x, new_mode, 0);
3303 copy_replacements (x, ret);
3305 else
3306 ret = adjust_address (x, new_mode, 0);
3308 else
3310 /* Note that we do want simplify_subreg's behavior of validating
3311 that the new mode is ok for a hard register. If we were to use
3312 simplify_gen_subreg, we would create the subreg, but would
3313 probably run into the target not being able to implement it. */
3314 /* Except, of course, when FORCE is true, when this is exactly what
3315 we want. Which is needed for CCmodes on some targets. */
3316 if (force)
3317 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3318 else
3319 ret = simplify_subreg (new_mode, x, old_mode, 0);
3322 return ret;
3325 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3326 an integer mode of the same size as MODE. Returns the instruction
3327 emitted, or NULL if such a move could not be generated. */
3329 static rtx_insn *
3330 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3332 scalar_int_mode imode;
3333 enum insn_code code;
3335 /* There must exist a mode of the exact size we require. */
3336 if (!int_mode_for_mode (mode).exists (&imode))
3337 return NULL;
3339 /* The target must support moves in this mode. */
3340 code = optab_handler (mov_optab, imode);
3341 if (code == CODE_FOR_nothing)
3342 return NULL;
3344 x = emit_move_change_mode (imode, mode, x, force);
3345 if (x == NULL_RTX)
3346 return NULL;
3347 y = emit_move_change_mode (imode, mode, y, force);
3348 if (y == NULL_RTX)
3349 return NULL;
3350 return emit_insn (GEN_FCN (code) (x, y));
3353 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3354 Return an equivalent MEM that does not use an auto-increment. */
3357 emit_move_resolve_push (machine_mode mode, rtx x)
3359 enum rtx_code code = GET_CODE (XEXP (x, 0));
3360 rtx temp;
3362 poly_int64 adjust = GET_MODE_SIZE (mode);
3363 #ifdef PUSH_ROUNDING
3364 adjust = PUSH_ROUNDING (adjust);
3365 #endif
3366 if (code == PRE_DEC || code == POST_DEC)
3367 adjust = -adjust;
3368 else if (code == PRE_MODIFY || code == POST_MODIFY)
3370 rtx expr = XEXP (XEXP (x, 0), 1);
3372 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3373 poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1));
3374 if (GET_CODE (expr) == MINUS)
3375 val = -val;
3376 gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val));
3377 adjust = val;
3380 /* Do not use anti_adjust_stack, since we don't want to update
3381 stack_pointer_delta. */
3382 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3383 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3384 0, OPTAB_LIB_WIDEN);
3385 if (temp != stack_pointer_rtx)
3386 emit_move_insn (stack_pointer_rtx, temp);
3388 switch (code)
3390 case PRE_INC:
3391 case PRE_DEC:
3392 case PRE_MODIFY:
3393 temp = stack_pointer_rtx;
3394 break;
3395 case POST_INC:
3396 case POST_DEC:
3397 case POST_MODIFY:
3398 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3399 break;
3400 default:
3401 gcc_unreachable ();
3404 return replace_equiv_address (x, temp);
3407 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3408 X is known to satisfy push_operand, and MODE is known to be complex.
3409 Returns the last instruction emitted. */
3411 rtx_insn *
3412 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3414 scalar_mode submode = GET_MODE_INNER (mode);
3415 bool imag_first;
3417 #ifdef PUSH_ROUNDING
3418 poly_int64 submodesize = GET_MODE_SIZE (submode);
3420 /* In case we output to the stack, but the size is smaller than the
3421 machine can push exactly, we need to use move instructions. */
3422 if (maybe_ne (PUSH_ROUNDING (submodesize), submodesize))
3424 x = emit_move_resolve_push (mode, x);
3425 return emit_move_insn (x, y);
3427 #endif
3429 /* Note that the real part always precedes the imag part in memory
3430 regardless of machine's endianness. */
3431 switch (GET_CODE (XEXP (x, 0)))
3433 case PRE_DEC:
3434 case POST_DEC:
3435 imag_first = true;
3436 break;
3437 case PRE_INC:
3438 case POST_INC:
3439 imag_first = false;
3440 break;
3441 default:
3442 gcc_unreachable ();
3445 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3446 read_complex_part (y, imag_first));
3447 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3448 read_complex_part (y, !imag_first));
3451 /* A subroutine of emit_move_complex. Perform the move from Y to X
3452 via two moves of the parts. Returns the last instruction emitted. */
3454 rtx_insn *
3455 emit_move_complex_parts (rtx x, rtx y)
3457 /* Show the output dies here. This is necessary for SUBREGs
3458 of pseudos since we cannot track their lifetimes correctly;
3459 hard regs shouldn't appear here except as return values. */
3460 if (!reload_completed && !reload_in_progress
3461 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3462 emit_clobber (x);
3464 write_complex_part (x, read_complex_part (y, false), false);
3465 write_complex_part (x, read_complex_part (y, true), true);
3467 return get_last_insn ();
3470 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3471 MODE is known to be complex. Returns the last instruction emitted. */
3473 static rtx_insn *
3474 emit_move_complex (machine_mode mode, rtx x, rtx y)
3476 bool try_int;
3478 /* Need to take special care for pushes, to maintain proper ordering
3479 of the data, and possibly extra padding. */
3480 if (push_operand (x, mode))
3481 return emit_move_complex_push (mode, x, y);
3483 /* See if we can coerce the target into moving both values at once, except
3484 for floating point where we favor moving as parts if this is easy. */
3485 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3486 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3487 && !(REG_P (x)
3488 && HARD_REGISTER_P (x)
3489 && REG_NREGS (x) == 1)
3490 && !(REG_P (y)
3491 && HARD_REGISTER_P (y)
3492 && REG_NREGS (y) == 1))
3493 try_int = false;
3494 /* Not possible if the values are inherently not adjacent. */
3495 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3496 try_int = false;
3497 /* Is possible if both are registers (or subregs of registers). */
3498 else if (register_operand (x, mode) && register_operand (y, mode))
3499 try_int = true;
3500 /* If one of the operands is a memory, and alignment constraints
3501 are friendly enough, we may be able to do combined memory operations.
3502 We do not attempt this if Y is a constant because that combination is
3503 usually better with the by-parts thing below. */
3504 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3505 && (!STRICT_ALIGNMENT
3506 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3507 try_int = true;
3508 else
3509 try_int = false;
3511 if (try_int)
3513 rtx_insn *ret;
3515 /* For memory to memory moves, optimal behavior can be had with the
3516 existing block move logic. */
3517 if (MEM_P (x) && MEM_P (y))
3519 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode),
3520 BLOCK_OP_NO_LIBCALL);
3521 return get_last_insn ();
3524 ret = emit_move_via_integer (mode, x, y, true);
3525 if (ret)
3526 return ret;
3529 return emit_move_complex_parts (x, y);
3532 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3533 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3535 static rtx_insn *
3536 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3538 rtx_insn *ret;
3540 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3541 if (mode != CCmode)
3543 enum insn_code code = optab_handler (mov_optab, CCmode);
3544 if (code != CODE_FOR_nothing)
3546 x = emit_move_change_mode (CCmode, mode, x, true);
3547 y = emit_move_change_mode (CCmode, mode, y, true);
3548 return emit_insn (GEN_FCN (code) (x, y));
3552 /* Otherwise, find the MODE_INT mode of the same width. */
3553 ret = emit_move_via_integer (mode, x, y, false);
3554 gcc_assert (ret != NULL);
3555 return ret;
3558 /* Return true if word I of OP lies entirely in the
3559 undefined bits of a paradoxical subreg. */
3561 static bool
3562 undefined_operand_subword_p (const_rtx op, int i)
3564 if (GET_CODE (op) != SUBREG)
3565 return false;
3566 machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3567 poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op);
3568 return (known_ge (offset, GET_MODE_SIZE (innermostmode))
3569 || known_le (offset, -UNITS_PER_WORD));
3572 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3573 MODE is any multi-word or full-word mode that lacks a move_insn
3574 pattern. Note that you will get better code if you define such
3575 patterns, even if they must turn into multiple assembler instructions. */
3577 static rtx_insn *
3578 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3580 rtx_insn *last_insn = 0;
3581 rtx_insn *seq;
3582 rtx inner;
3583 bool need_clobber;
3584 int i, mode_size;
3586 /* This function can only handle cases where the number of words is
3587 known at compile time. */
3588 mode_size = GET_MODE_SIZE (mode).to_constant ();
3589 gcc_assert (mode_size >= UNITS_PER_WORD);
3591 /* If X is a push on the stack, do the push now and replace
3592 X with a reference to the stack pointer. */
3593 if (push_operand (x, mode))
3594 x = emit_move_resolve_push (mode, x);
3596 /* If we are in reload, see if either operand is a MEM whose address
3597 is scheduled for replacement. */
3598 if (reload_in_progress && MEM_P (x)
3599 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3600 x = replace_equiv_address_nv (x, inner);
3601 if (reload_in_progress && MEM_P (y)
3602 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3603 y = replace_equiv_address_nv (y, inner);
3605 start_sequence ();
3607 need_clobber = false;
3608 for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++)
3610 rtx xpart = operand_subword (x, i, 1, mode);
3611 rtx ypart;
3613 /* Do not generate code for a move if it would come entirely
3614 from the undefined bits of a paradoxical subreg. */
3615 if (undefined_operand_subword_p (y, i))
3616 continue;
3618 ypart = operand_subword (y, i, 1, mode);
3620 /* If we can't get a part of Y, put Y into memory if it is a
3621 constant. Otherwise, force it into a register. Then we must
3622 be able to get a part of Y. */
3623 if (ypart == 0 && CONSTANT_P (y))
3625 y = use_anchored_address (force_const_mem (mode, y));
3626 ypart = operand_subword (y, i, 1, mode);
3628 else if (ypart == 0)
3629 ypart = operand_subword_force (y, i, mode);
3631 gcc_assert (xpart && ypart);
3633 need_clobber |= (GET_CODE (xpart) == SUBREG);
3635 last_insn = emit_move_insn (xpart, ypart);
3638 seq = get_insns ();
3639 end_sequence ();
3641 /* Show the output dies here. This is necessary for SUBREGs
3642 of pseudos since we cannot track their lifetimes correctly;
3643 hard regs shouldn't appear here except as return values.
3644 We never want to emit such a clobber after reload. */
3645 if (x != y
3646 && ! (reload_in_progress || reload_completed)
3647 && need_clobber != 0)
3648 emit_clobber (x);
3650 emit_insn (seq);
3652 return last_insn;
3655 /* Low level part of emit_move_insn.
3656 Called just like emit_move_insn, but assumes X and Y
3657 are basically valid. */
3659 rtx_insn *
3660 emit_move_insn_1 (rtx x, rtx y)
3662 machine_mode mode = GET_MODE (x);
3663 enum insn_code code;
3665 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3667 code = optab_handler (mov_optab, mode);
3668 if (code != CODE_FOR_nothing)
3669 return emit_insn (GEN_FCN (code) (x, y));
3671 /* Expand complex moves by moving real part and imag part. */
3672 if (COMPLEX_MODE_P (mode))
3673 return emit_move_complex (mode, x, y);
3675 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3676 || ALL_FIXED_POINT_MODE_P (mode))
3678 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3680 /* If we can't find an integer mode, use multi words. */
3681 if (result)
3682 return result;
3683 else
3684 return emit_move_multi_word (mode, x, y);
3687 if (GET_MODE_CLASS (mode) == MODE_CC)
3688 return emit_move_ccmode (mode, x, y);
3690 /* Try using a move pattern for the corresponding integer mode. This is
3691 only safe when simplify_subreg can convert MODE constants into integer
3692 constants. At present, it can only do this reliably if the value
3693 fits within a HOST_WIDE_INT. */
3694 if (!CONSTANT_P (y)
3695 || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT))
3697 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3699 if (ret)
3701 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3702 return ret;
3706 return emit_move_multi_word (mode, x, y);
3709 /* Generate code to copy Y into X.
3710 Both Y and X must have the same mode, except that
3711 Y can be a constant with VOIDmode.
3712 This mode cannot be BLKmode; use emit_block_move for that.
3714 Return the last instruction emitted. */
3716 rtx_insn *
3717 emit_move_insn (rtx x, rtx y)
3719 machine_mode mode = GET_MODE (x);
3720 rtx y_cst = NULL_RTX;
3721 rtx_insn *last_insn;
3722 rtx set;
3724 gcc_assert (mode != BLKmode
3725 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3727 if (CONSTANT_P (y))
3729 if (optimize
3730 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3731 && (last_insn = compress_float_constant (x, y)))
3732 return last_insn;
3734 y_cst = y;
3736 if (!targetm.legitimate_constant_p (mode, y))
3738 y = force_const_mem (mode, y);
3740 /* If the target's cannot_force_const_mem prevented the spill,
3741 assume that the target's move expanders will also take care
3742 of the non-legitimate constant. */
3743 if (!y)
3744 y = y_cst;
3745 else
3746 y = use_anchored_address (y);
3750 /* If X or Y are memory references, verify that their addresses are valid
3751 for the machine. */
3752 if (MEM_P (x)
3753 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3754 MEM_ADDR_SPACE (x))
3755 && ! push_operand (x, GET_MODE (x))))
3756 x = validize_mem (x);
3758 if (MEM_P (y)
3759 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3760 MEM_ADDR_SPACE (y)))
3761 y = validize_mem (y);
3763 gcc_assert (mode != BLKmode);
3765 last_insn = emit_move_insn_1 (x, y);
3767 if (y_cst && REG_P (x)
3768 && (set = single_set (last_insn)) != NULL_RTX
3769 && SET_DEST (set) == x
3770 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3771 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3773 return last_insn;
3776 /* Generate the body of an instruction to copy Y into X.
3777 It may be a list of insns, if one insn isn't enough. */
3779 rtx_insn *
3780 gen_move_insn (rtx x, rtx y)
3782 rtx_insn *seq;
3784 start_sequence ();
3785 emit_move_insn_1 (x, y);
3786 seq = get_insns ();
3787 end_sequence ();
3788 return seq;
3791 /* If Y is representable exactly in a narrower mode, and the target can
3792 perform the extension directly from constant or memory, then emit the
3793 move as an extension. */
3795 static rtx_insn *
3796 compress_float_constant (rtx x, rtx y)
3798 machine_mode dstmode = GET_MODE (x);
3799 machine_mode orig_srcmode = GET_MODE (y);
3800 machine_mode srcmode;
3801 const REAL_VALUE_TYPE *r;
3802 int oldcost, newcost;
3803 bool speed = optimize_insn_for_speed_p ();
3805 r = CONST_DOUBLE_REAL_VALUE (y);
3807 if (targetm.legitimate_constant_p (dstmode, y))
3808 oldcost = set_src_cost (y, orig_srcmode, speed);
3809 else
3810 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);
3812 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)
3814 enum insn_code ic;
3815 rtx trunc_y;
3816 rtx_insn *last_insn;
3818 /* Skip if the target can't extend this way. */
3819 ic = can_extend_p (dstmode, srcmode, 0);
3820 if (ic == CODE_FOR_nothing)
3821 continue;
3823 /* Skip if the narrowed value isn't exact. */
3824 if (! exact_real_truncate (srcmode, r))
3825 continue;
3827 trunc_y = const_double_from_real_value (*r, srcmode);
3829 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3831 /* Skip if the target needs extra instructions to perform
3832 the extension. */
3833 if (!insn_operand_matches (ic, 1, trunc_y))
3834 continue;
3835 /* This is valid, but may not be cheaper than the original. */
3836 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3837 dstmode, speed);
3838 if (oldcost < newcost)
3839 continue;
3841 else if (float_extend_from_mem[dstmode][srcmode])
3843 trunc_y = force_const_mem (srcmode, trunc_y);
3844 /* This is valid, but may not be cheaper than the original. */
3845 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3846 dstmode, speed);
3847 if (oldcost < newcost)
3848 continue;
3849 trunc_y = validize_mem (trunc_y);
3851 else
3852 continue;
3854 /* For CSE's benefit, force the compressed constant pool entry
3855 into a new pseudo. This constant may be used in different modes,
3856 and if not, combine will put things back together for us. */
3857 trunc_y = force_reg (srcmode, trunc_y);
3859 /* If x is a hard register, perform the extension into a pseudo,
3860 so that e.g. stack realignment code is aware of it. */
3861 rtx target = x;
3862 if (REG_P (x) && HARD_REGISTER_P (x))
3863 target = gen_reg_rtx (dstmode);
3865 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3866 last_insn = get_last_insn ();
3868 if (REG_P (target))
3869 set_unique_reg_note (last_insn, REG_EQUAL, y);
3871 if (target != x)
3872 return emit_move_insn (x, target);
3873 return last_insn;
3876 return NULL;
3879 /* Pushing data onto the stack. */
3881 /* Push a block of length SIZE (perhaps variable)
3882 and return an rtx to address the beginning of the block.
3883 The value may be virtual_outgoing_args_rtx.
3885 EXTRA is the number of bytes of padding to push in addition to SIZE.
3886 BELOW nonzero means this padding comes at low addresses;
3887 otherwise, the padding comes at high addresses. */
3890 push_block (rtx size, poly_int64 extra, int below)
3892 rtx temp;
3894 size = convert_modes (Pmode, ptr_mode, size, 1);
3895 if (CONSTANT_P (size))
3896 anti_adjust_stack (plus_constant (Pmode, size, extra));
3897 else if (REG_P (size) && known_eq (extra, 0))
3898 anti_adjust_stack (size);
3899 else
3901 temp = copy_to_mode_reg (Pmode, size);
3902 if (maybe_ne (extra, 0))
3903 temp = expand_binop (Pmode, add_optab, temp,
3904 gen_int_mode (extra, Pmode),
3905 temp, 0, OPTAB_LIB_WIDEN);
3906 anti_adjust_stack (temp);
3909 if (STACK_GROWS_DOWNWARD)
3911 temp = virtual_outgoing_args_rtx;
3912 if (maybe_ne (extra, 0) && below)
3913 temp = plus_constant (Pmode, temp, extra);
3915 else
3917 if (CONST_INT_P (size))
3918 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3919 -INTVAL (size) - (below ? 0 : extra));
3920 else if (maybe_ne (extra, 0) && !below)
3921 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3922 negate_rtx (Pmode, plus_constant (Pmode, size,
3923 extra)));
3924 else
3925 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3926 negate_rtx (Pmode, size));
3929 return memory_address (NARROWEST_INT_MODE, temp);
3932 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3934 static rtx
3935 mem_autoinc_base (rtx mem)
3937 if (MEM_P (mem))
3939 rtx addr = XEXP (mem, 0);
3940 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3941 return XEXP (addr, 0);
3943 return NULL;
3946 /* A utility routine used here, in reload, and in try_split. The insns
3947 after PREV up to and including LAST are known to adjust the stack,
3948 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3949 placing notes as appropriate. PREV may be NULL, indicating the
3950 entire insn sequence prior to LAST should be scanned.
3952 The set of allowed stack pointer modifications is small:
3953 (1) One or more auto-inc style memory references (aka pushes),
3954 (2) One or more addition/subtraction with the SP as destination,
3955 (3) A single move insn with the SP as destination,
3956 (4) A call_pop insn,
3957 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3959 Insns in the sequence that do not modify the SP are ignored,
3960 except for noreturn calls.
3962 The return value is the amount of adjustment that can be trivially
3963 verified, via immediate operand or auto-inc. If the adjustment
3964 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3966 poly_int64
3967 find_args_size_adjust (rtx_insn *insn)
3969 rtx dest, set, pat;
3970 int i;
3972 pat = PATTERN (insn);
3973 set = NULL;
3975 /* Look for a call_pop pattern. */
3976 if (CALL_P (insn))
3978 /* We have to allow non-call_pop patterns for the case
3979 of emit_single_push_insn of a TLS address. */
3980 if (GET_CODE (pat) != PARALLEL)
3981 return 0;
3983 /* All call_pop have a stack pointer adjust in the parallel.
3984 The call itself is always first, and the stack adjust is
3985 usually last, so search from the end. */
3986 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3988 set = XVECEXP (pat, 0, i);
3989 if (GET_CODE (set) != SET)
3990 continue;
3991 dest = SET_DEST (set);
3992 if (dest == stack_pointer_rtx)
3993 break;
3995 /* We'd better have found the stack pointer adjust. */
3996 if (i == 0)
3997 return 0;
3998 /* Fall through to process the extracted SET and DEST
3999 as if it was a standalone insn. */
4001 else if (GET_CODE (pat) == SET)
4002 set = pat;
4003 else if ((set = single_set (insn)) != NULL)
4005 else if (GET_CODE (pat) == PARALLEL)
4007 /* ??? Some older ports use a parallel with a stack adjust
4008 and a store for a PUSH_ROUNDING pattern, rather than a
4009 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4010 /* ??? See h8300 and m68k, pushqi1. */
4011 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
4013 set = XVECEXP (pat, 0, i);
4014 if (GET_CODE (set) != SET)
4015 continue;
4016 dest = SET_DEST (set);
4017 if (dest == stack_pointer_rtx)
4018 break;
4020 /* We do not expect an auto-inc of the sp in the parallel. */
4021 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
4022 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4023 != stack_pointer_rtx);
4025 if (i < 0)
4026 return 0;
4028 else
4029 return 0;
4031 dest = SET_DEST (set);
4033 /* Look for direct modifications of the stack pointer. */
4034 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
4036 /* Look for a trivial adjustment, otherwise assume nothing. */
4037 /* Note that the SPU restore_stack_block pattern refers to
4038 the stack pointer in V4SImode. Consider that non-trivial. */
4039 if (SCALAR_INT_MODE_P (GET_MODE (dest))
4040 && GET_CODE (SET_SRC (set)) == PLUS
4041 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
4042 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
4043 return INTVAL (XEXP (SET_SRC (set), 1));
4044 /* ??? Reload can generate no-op moves, which will be cleaned
4045 up later. Recognize it and continue searching. */
4046 else if (rtx_equal_p (dest, SET_SRC (set)))
4047 return 0;
4048 else
4049 return HOST_WIDE_INT_MIN;
4051 else
4053 rtx mem, addr;
4055 /* Otherwise only think about autoinc patterns. */
4056 if (mem_autoinc_base (dest) == stack_pointer_rtx)
4058 mem = dest;
4059 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4060 != stack_pointer_rtx);
4062 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
4063 mem = SET_SRC (set);
4064 else
4065 return 0;
4067 addr = XEXP (mem, 0);
4068 switch (GET_CODE (addr))
4070 case PRE_INC:
4071 case POST_INC:
4072 return GET_MODE_SIZE (GET_MODE (mem));
4073 case PRE_DEC:
4074 case POST_DEC:
4075 return -GET_MODE_SIZE (GET_MODE (mem));
4076 case PRE_MODIFY:
4077 case POST_MODIFY:
4078 addr = XEXP (addr, 1);
4079 gcc_assert (GET_CODE (addr) == PLUS);
4080 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
4081 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
4082 return INTVAL (XEXP (addr, 1));
4083 default:
4084 gcc_unreachable ();
4089 poly_int64
4090 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last,
4091 poly_int64 end_args_size)
4093 poly_int64 args_size = end_args_size;
4094 bool saw_unknown = false;
4095 rtx_insn *insn;
4097 for (insn = last; insn != prev; insn = PREV_INSN (insn))
4099 if (!NONDEBUG_INSN_P (insn))
4100 continue;
4102 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4103 a call argument containing a TLS address that itself requires
4104 a call to __tls_get_addr. The handling of stack_pointer_delta
4105 in emit_single_push_insn is supposed to ensure that any such
4106 notes are already correct. */
4107 rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4108 gcc_assert (!note || known_eq (args_size, get_args_size (note)));
4110 poly_int64 this_delta = find_args_size_adjust (insn);
4111 if (known_eq (this_delta, 0))
4113 if (!CALL_P (insn)
4114 || ACCUMULATE_OUTGOING_ARGS
4115 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
4116 continue;
4119 gcc_assert (!saw_unknown);
4120 if (known_eq (this_delta, HOST_WIDE_INT_MIN))
4121 saw_unknown = true;
4123 if (!note)
4124 add_args_size_note (insn, args_size);
4125 if (STACK_GROWS_DOWNWARD)
4126 this_delta = -poly_uint64 (this_delta);
4128 if (saw_unknown)
4129 args_size = HOST_WIDE_INT_MIN;
4130 else
4131 args_size -= this_delta;
4134 return args_size;
4137 #ifdef PUSH_ROUNDING
4138 /* Emit single push insn. */
4140 static void
4141 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4143 rtx dest_addr;
4144 poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4145 rtx dest;
4146 enum insn_code icode;
4148 /* If there is push pattern, use it. Otherwise try old way of throwing
4149 MEM representing push operation to move expander. */
4150 icode = optab_handler (push_optab, mode);
4151 if (icode != CODE_FOR_nothing)
4153 struct expand_operand ops[1];
4155 create_input_operand (&ops[0], x, mode);
4156 if (maybe_expand_insn (icode, 1, ops))
4157 return;
4159 if (known_eq (GET_MODE_SIZE (mode), rounded_size))
4160 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4161 /* If we are to pad downward, adjust the stack pointer first and
4162 then store X into the stack location using an offset. This is
4163 because emit_move_insn does not know how to pad; it does not have
4164 access to type. */
4165 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
4167 emit_move_insn (stack_pointer_rtx,
4168 expand_binop (Pmode,
4169 STACK_GROWS_DOWNWARD ? sub_optab
4170 : add_optab,
4171 stack_pointer_rtx,
4172 gen_int_mode (rounded_size, Pmode),
4173 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4175 poly_int64 offset = rounded_size - GET_MODE_SIZE (mode);
4176 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4177 /* We have already decremented the stack pointer, so get the
4178 previous value. */
4179 offset += rounded_size;
4181 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4182 /* We have already incremented the stack pointer, so get the
4183 previous value. */
4184 offset -= rounded_size;
4186 dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset);
4188 else
4190 if (STACK_GROWS_DOWNWARD)
4191 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4192 dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size);
4193 else
4194 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4195 dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size);
4197 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4200 dest = gen_rtx_MEM (mode, dest_addr);
4202 if (type != 0)
4204 set_mem_attributes (dest, type, 1);
4206 if (cfun->tail_call_marked)
4207 /* Function incoming arguments may overlap with sibling call
4208 outgoing arguments and we cannot allow reordering of reads
4209 from function arguments with stores to outgoing arguments
4210 of sibling calls. */
4211 set_mem_alias_set (dest, 0);
4213 emit_move_insn (dest, x);
4216 /* Emit and annotate a single push insn. */
4218 static void
4219 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4221 poly_int64 delta, old_delta = stack_pointer_delta;
4222 rtx_insn *prev = get_last_insn ();
4223 rtx_insn *last;
4225 emit_single_push_insn_1 (mode, x, type);
4227 /* Adjust stack_pointer_delta to describe the situation after the push
4228 we just performed. Note that we must do this after the push rather
4229 than before the push in case calculating X needs pushes and pops of
4230 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4231 for such pushes and pops must not include the effect of the future
4232 push of X. */
4233 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4235 last = get_last_insn ();
4237 /* Notice the common case where we emitted exactly one insn. */
4238 if (PREV_INSN (last) == prev)
4240 add_args_size_note (last, stack_pointer_delta);
4241 return;
4244 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4245 gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN)
4246 || known_eq (delta, old_delta));
4248 #endif
4250 /* If reading SIZE bytes from X will end up reading from
4251 Y return the number of bytes that overlap. Return -1
4252 if there is no overlap or -2 if we can't determine
4253 (for example when X and Y have different base registers). */
4255 static int
4256 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4258 rtx tmp = plus_constant (Pmode, x, size);
4259 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4261 if (!CONST_INT_P (sub))
4262 return -2;
4264 HOST_WIDE_INT val = INTVAL (sub);
4266 return IN_RANGE (val, 1, size) ? val : -1;
4269 /* Generate code to push X onto the stack, assuming it has mode MODE and
4270 type TYPE.
4271 MODE is redundant except when X is a CONST_INT (since they don't
4272 carry mode info).
4273 SIZE is an rtx for the size of data to be copied (in bytes),
4274 needed only if X is BLKmode.
4275 Return true if successful. May return false if asked to push a
4276 partial argument during a sibcall optimization (as specified by
4277 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4278 to not overlap.
4280 ALIGN (in bits) is maximum alignment we can assume.
4282 If PARTIAL and REG are both nonzero, then copy that many of the first
4283 bytes of X into registers starting with REG, and push the rest of X.
4284 The amount of space pushed is decreased by PARTIAL bytes.
4285 REG must be a hard register in this case.
4286 If REG is zero but PARTIAL is not, take any all others actions for an
4287 argument partially in registers, but do not actually load any
4288 registers.
4290 EXTRA is the amount in bytes of extra space to leave next to this arg.
4291 This is ignored if an argument block has already been allocated.
4293 On a machine that lacks real push insns, ARGS_ADDR is the address of
4294 the bottom of the argument block for this call. We use indexing off there
4295 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4296 argument block has not been preallocated.
4298 ARGS_SO_FAR is the size of args previously pushed for this call.
4300 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4301 for arguments passed in registers. If nonzero, it will be the number
4302 of bytes required. */
4304 bool
4305 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4306 unsigned int align, int partial, rtx reg, poly_int64 extra,
4307 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4308 rtx alignment_pad, bool sibcall_p)
4310 rtx xinner;
4311 pad_direction stack_direction
4312 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD;
4314 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4315 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4316 Default is below for small data on big-endian machines; else above. */
4317 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);
4319 /* Invert direction if stack is post-decrement.
4320 FIXME: why? */
4321 if (STACK_PUSH_CODE == POST_DEC)
4322 if (where_pad != PAD_NONE)
4323 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);
4325 xinner = x;
4327 int nregs = partial / UNITS_PER_WORD;
4328 rtx *tmp_regs = NULL;
4329 int overlapping = 0;
4331 if (mode == BLKmode
4332 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4334 /* Copy a block into the stack, entirely or partially. */
4336 rtx temp;
4337 int used;
4338 int offset;
4339 int skip;
4341 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4342 used = partial - offset;
4344 if (mode != BLKmode)
4346 /* A value is to be stored in an insufficiently aligned
4347 stack slot; copy via a suitably aligned slot if
4348 necessary. */
4349 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode);
4350 if (!MEM_P (xinner))
4352 temp = assign_temp (type, 1, 1);
4353 emit_move_insn (temp, xinner);
4354 xinner = temp;
4358 gcc_assert (size);
4360 /* USED is now the # of bytes we need not copy to the stack
4361 because registers will take care of them. */
4363 if (partial != 0)
4364 xinner = adjust_address (xinner, BLKmode, used);
4366 /* If the partial register-part of the arg counts in its stack size,
4367 skip the part of stack space corresponding to the registers.
4368 Otherwise, start copying to the beginning of the stack space,
4369 by setting SKIP to 0. */
4370 skip = (reg_parm_stack_space == 0) ? 0 : used;
4372 #ifdef PUSH_ROUNDING
4373 /* Do it with several push insns if that doesn't take lots of insns
4374 and if there is no difficulty with push insns that skip bytes
4375 on the stack for alignment purposes. */
4376 if (args_addr == 0
4377 && PUSH_ARGS
4378 && CONST_INT_P (size)
4379 && skip == 0
4380 && MEM_ALIGN (xinner) >= align
4381 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4382 /* Here we avoid the case of a structure whose weak alignment
4383 forces many pushes of a small amount of data,
4384 and such small pushes do rounding that causes trouble. */
4385 && ((!targetm.slow_unaligned_access (word_mode, align))
4386 || align >= BIGGEST_ALIGNMENT
4387 || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT),
4388 align / BITS_PER_UNIT))
4389 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size)))
4391 /* Push padding now if padding above and stack grows down,
4392 or if padding below and stack grows up.
4393 But if space already allocated, this has already been done. */
4394 if (maybe_ne (extra, 0)
4395 && args_addr == 0
4396 && where_pad != PAD_NONE
4397 && where_pad != stack_direction)
4398 anti_adjust_stack (gen_int_mode (extra, Pmode));
4400 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4402 else
4403 #endif /* PUSH_ROUNDING */
4405 rtx target;
4407 /* Otherwise make space on the stack and copy the data
4408 to the address of that space. */
4410 /* Deduct words put into registers from the size we must copy. */
4411 if (partial != 0)
4413 if (CONST_INT_P (size))
4414 size = GEN_INT (INTVAL (size) - used);
4415 else
4416 size = expand_binop (GET_MODE (size), sub_optab, size,
4417 gen_int_mode (used, GET_MODE (size)),
4418 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4421 /* Get the address of the stack space.
4422 In this case, we do not deal with EXTRA separately.
4423 A single stack adjust will do. */
4424 if (! args_addr)
4426 temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
4427 extra = 0;
4429 else if (CONST_INT_P (args_so_far))
4430 temp = memory_address (BLKmode,
4431 plus_constant (Pmode, args_addr,
4432 skip + INTVAL (args_so_far)));
4433 else
4434 temp = memory_address (BLKmode,
4435 plus_constant (Pmode,
4436 gen_rtx_PLUS (Pmode,
4437 args_addr,
4438 args_so_far),
4439 skip));
4441 if (!ACCUMULATE_OUTGOING_ARGS)
4443 /* If the source is referenced relative to the stack pointer,
4444 copy it to another register to stabilize it. We do not need
4445 to do this if we know that we won't be changing sp. */
4447 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4448 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4449 temp = copy_to_reg (temp);
4452 target = gen_rtx_MEM (BLKmode, temp);
4454 /* We do *not* set_mem_attributes here, because incoming arguments
4455 may overlap with sibling call outgoing arguments and we cannot
4456 allow reordering of reads from function arguments with stores
4457 to outgoing arguments of sibling calls. We do, however, want
4458 to record the alignment of the stack slot. */
4459 /* ALIGN may well be better aligned than TYPE, e.g. due to
4460 PARM_BOUNDARY. Assume the caller isn't lying. */
4461 set_mem_align (target, align);
4463 /* If part should go in registers and pushing to that part would
4464 overwrite some of the values that need to go into regs, load the
4465 overlapping values into temporary pseudos to be moved into the hard
4466 regs at the end after the stack pushing has completed.
4467 We cannot load them directly into the hard regs here because
4468 they can be clobbered by the block move expansions.
4469 See PR 65358. */
4471 if (partial > 0 && reg != 0 && mode == BLKmode
4472 && GET_CODE (reg) != PARALLEL)
4474 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4475 if (overlapping > 0)
4477 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4478 overlapping /= UNITS_PER_WORD;
4480 tmp_regs = XALLOCAVEC (rtx, overlapping);
4482 for (int i = 0; i < overlapping; i++)
4483 tmp_regs[i] = gen_reg_rtx (word_mode);
4485 for (int i = 0; i < overlapping; i++)
4486 emit_move_insn (tmp_regs[i],
4487 operand_subword_force (target, i, mode));
4489 else if (overlapping == -1)
4490 overlapping = 0;
4491 /* Could not determine whether there is overlap.
4492 Fail the sibcall. */
4493 else
4495 overlapping = 0;
4496 if (sibcall_p)
4497 return false;
4500 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4503 else if (partial > 0)
4505 /* Scalar partly in registers. This case is only supported
4506 for fixed-wdth modes. */
4507 int size = GET_MODE_SIZE (mode).to_constant ();
4508 size /= UNITS_PER_WORD;
4509 int i;
4510 int not_stack;
4511 /* # bytes of start of argument
4512 that we must make space for but need not store. */
4513 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4514 int args_offset = INTVAL (args_so_far);
4515 int skip;
4517 /* Push padding now if padding above and stack grows down,
4518 or if padding below and stack grows up.
4519 But if space already allocated, this has already been done. */
4520 if (maybe_ne (extra, 0)
4521 && args_addr == 0
4522 && where_pad != PAD_NONE
4523 && where_pad != stack_direction)
4524 anti_adjust_stack (gen_int_mode (extra, Pmode));
4526 /* If we make space by pushing it, we might as well push
4527 the real data. Otherwise, we can leave OFFSET nonzero
4528 and leave the space uninitialized. */
4529 if (args_addr == 0)
4530 offset = 0;
4532 /* Now NOT_STACK gets the number of words that we don't need to
4533 allocate on the stack. Convert OFFSET to words too. */
4534 not_stack = (partial - offset) / UNITS_PER_WORD;
4535 offset /= UNITS_PER_WORD;
4537 /* If the partial register-part of the arg counts in its stack size,
4538 skip the part of stack space corresponding to the registers.
4539 Otherwise, start copying to the beginning of the stack space,
4540 by setting SKIP to 0. */
4541 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4543 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4544 x = validize_mem (force_const_mem (mode, x));
4546 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4547 SUBREGs of such registers are not allowed. */
4548 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4549 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4550 x = copy_to_reg (x);
4552 /* Loop over all the words allocated on the stack for this arg. */
4553 /* We can do it by words, because any scalar bigger than a word
4554 has a size a multiple of a word. */
4555 for (i = size - 1; i >= not_stack; i--)
4556 if (i >= not_stack + offset)
4557 if (!emit_push_insn (operand_subword_force (x, i, mode),
4558 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4559 0, args_addr,
4560 GEN_INT (args_offset + ((i - not_stack + skip)
4561 * UNITS_PER_WORD)),
4562 reg_parm_stack_space, alignment_pad, sibcall_p))
4563 return false;
4565 else
4567 rtx addr;
4568 rtx dest;
4570 /* Push padding now if padding above and stack grows down,
4571 or if padding below and stack grows up.
4572 But if space already allocated, this has already been done. */
4573 if (maybe_ne (extra, 0)
4574 && args_addr == 0
4575 && where_pad != PAD_NONE
4576 && where_pad != stack_direction)
4577 anti_adjust_stack (gen_int_mode (extra, Pmode));
4579 #ifdef PUSH_ROUNDING
4580 if (args_addr == 0 && PUSH_ARGS)
4581 emit_single_push_insn (mode, x, type);
4582 else
4583 #endif
4585 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far);
4586 dest = gen_rtx_MEM (mode, memory_address (mode, addr));
4588 /* We do *not* set_mem_attributes here, because incoming arguments
4589 may overlap with sibling call outgoing arguments and we cannot
4590 allow reordering of reads from function arguments with stores
4591 to outgoing arguments of sibling calls. We do, however, want
4592 to record the alignment of the stack slot. */
4593 /* ALIGN may well be better aligned than TYPE, e.g. due to
4594 PARM_BOUNDARY. Assume the caller isn't lying. */
4595 set_mem_align (dest, align);
4597 emit_move_insn (dest, x);
4601 /* Move the partial arguments into the registers and any overlapping
4602 values that we moved into the pseudos in tmp_regs. */
4603 if (partial > 0 && reg != 0)
4605 /* Handle calls that pass values in multiple non-contiguous locations.
4606 The Irix 6 ABI has examples of this. */
4607 if (GET_CODE (reg) == PARALLEL)
4608 emit_group_load (reg, x, type, -1);
4609 else
4611 gcc_assert (partial % UNITS_PER_WORD == 0);
4612 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4614 for (int i = 0; i < overlapping; i++)
4615 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4616 + nregs - overlapping + i),
4617 tmp_regs[i]);
4622 if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction)
4623 anti_adjust_stack (gen_int_mode (extra, Pmode));
4625 if (alignment_pad && args_addr == 0)
4626 anti_adjust_stack (alignment_pad);
4628 return true;
4631 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4632 operations. */
4634 static rtx
4635 get_subtarget (rtx x)
4637 return (optimize
4638 || x == 0
4639 /* Only registers can be subtargets. */
4640 || !REG_P (x)
4641 /* Don't use hard regs to avoid extending their life. */
4642 || REGNO (x) < FIRST_PSEUDO_REGISTER
4643 ? 0 : x);
4646 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4647 FIELD is a bitfield. Returns true if the optimization was successful,
4648 and there's nothing else to do. */
4650 static bool
4651 optimize_bitfield_assignment_op (poly_uint64 pbitsize,
4652 poly_uint64 pbitpos,
4653 poly_uint64 pbitregion_start,
4654 poly_uint64 pbitregion_end,
4655 machine_mode mode1, rtx str_rtx,
4656 tree to, tree src, bool reverse)
4658 /* str_mode is not guaranteed to be a scalar type. */
4659 machine_mode str_mode = GET_MODE (str_rtx);
4660 unsigned int str_bitsize;
4661 tree op0, op1;
4662 rtx value, result;
4663 optab binop;
4664 gimple *srcstmt;
4665 enum tree_code code;
4667 unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end;
4668 if (mode1 != VOIDmode
4669 || !pbitsize.is_constant (&bitsize)
4670 || !pbitpos.is_constant (&bitpos)
4671 || !pbitregion_start.is_constant (&bitregion_start)
4672 || !pbitregion_end.is_constant (&bitregion_end)
4673 || bitsize >= BITS_PER_WORD
4674 || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize)
4675 || str_bitsize > BITS_PER_WORD
4676 || TREE_SIDE_EFFECTS (to)
4677 || TREE_THIS_VOLATILE (to))
4678 return false;
4680 STRIP_NOPS (src);
4681 if (TREE_CODE (src) != SSA_NAME)
4682 return false;
4683 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4684 return false;
4686 srcstmt = get_gimple_for_ssa_name (src);
4687 if (!srcstmt
4688 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4689 return false;
4691 code = gimple_assign_rhs_code (srcstmt);
4693 op0 = gimple_assign_rhs1 (srcstmt);
4695 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4696 to find its initialization. Hopefully the initialization will
4697 be from a bitfield load. */
4698 if (TREE_CODE (op0) == SSA_NAME)
4700 gimple *op0stmt = get_gimple_for_ssa_name (op0);
4702 /* We want to eventually have OP0 be the same as TO, which
4703 should be a bitfield. */
4704 if (!op0stmt
4705 || !is_gimple_assign (op0stmt)
4706 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4707 return false;
4708 op0 = gimple_assign_rhs1 (op0stmt);
4711 op1 = gimple_assign_rhs2 (srcstmt);
4713 if (!operand_equal_p (to, op0, 0))
4714 return false;
4716 if (MEM_P (str_rtx))
4718 unsigned HOST_WIDE_INT offset1;
4720 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4721 str_bitsize = BITS_PER_WORD;
4723 scalar_int_mode best_mode;
4724 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
4725 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode))
4726 return false;
4727 str_mode = best_mode;
4728 str_bitsize = GET_MODE_BITSIZE (best_mode);
4730 offset1 = bitpos;
4731 bitpos %= str_bitsize;
4732 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4733 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4735 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4736 return false;
4738 /* If the bit field covers the whole REG/MEM, store_field
4739 will likely generate better code. */
4740 if (bitsize >= str_bitsize)
4741 return false;
4743 /* We can't handle fields split across multiple entities. */
4744 if (bitpos + bitsize > str_bitsize)
4745 return false;
4747 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
4748 bitpos = str_bitsize - bitpos - bitsize;
4750 switch (code)
4752 case PLUS_EXPR:
4753 case MINUS_EXPR:
4754 /* For now, just optimize the case of the topmost bitfield
4755 where we don't need to do any masking and also
4756 1 bit bitfields where xor can be used.
4757 We might win by one instruction for the other bitfields
4758 too if insv/extv instructions aren't used, so that
4759 can be added later. */
4760 if ((reverse || bitpos + bitsize != str_bitsize)
4761 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4762 break;
4764 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4765 value = convert_modes (str_mode,
4766 TYPE_MODE (TREE_TYPE (op1)), value,
4767 TYPE_UNSIGNED (TREE_TYPE (op1)));
4769 /* We may be accessing data outside the field, which means
4770 we can alias adjacent data. */
4771 if (MEM_P (str_rtx))
4773 str_rtx = shallow_copy_rtx (str_rtx);
4774 set_mem_alias_set (str_rtx, 0);
4775 set_mem_expr (str_rtx, 0);
4778 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize))
4780 value = expand_and (str_mode, value, const1_rtx, NULL);
4781 binop = xor_optab;
4783 else
4784 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4786 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4787 if (reverse)
4788 value = flip_storage_order (str_mode, value);
4789 result = expand_binop (str_mode, binop, str_rtx,
4790 value, str_rtx, 1, OPTAB_WIDEN);
4791 if (result != str_rtx)
4792 emit_move_insn (str_rtx, result);
4793 return true;
4795 case BIT_IOR_EXPR:
4796 case BIT_XOR_EXPR:
4797 if (TREE_CODE (op1) != INTEGER_CST)
4798 break;
4799 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4800 value = convert_modes (str_mode,
4801 TYPE_MODE (TREE_TYPE (op1)), value,
4802 TYPE_UNSIGNED (TREE_TYPE (op1)));
4804 /* We may be accessing data outside the field, which means
4805 we can alias adjacent data. */
4806 if (MEM_P (str_rtx))
4808 str_rtx = shallow_copy_rtx (str_rtx);
4809 set_mem_alias_set (str_rtx, 0);
4810 set_mem_expr (str_rtx, 0);
4813 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4814 if (bitpos + bitsize != str_bitsize)
4816 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1,
4817 str_mode);
4818 value = expand_and (str_mode, value, mask, NULL_RTX);
4820 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4821 if (reverse)
4822 value = flip_storage_order (str_mode, value);
4823 result = expand_binop (str_mode, binop, str_rtx,
4824 value, str_rtx, 1, OPTAB_WIDEN);
4825 if (result != str_rtx)
4826 emit_move_insn (str_rtx, result);
4827 return true;
4829 default:
4830 break;
4833 return false;
4836 /* In the C++ memory model, consecutive bit fields in a structure are
4837 considered one memory location.
4839 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4840 returns the bit range of consecutive bits in which this COMPONENT_REF
4841 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4842 and *OFFSET may be adjusted in the process.
4844 If the access does not need to be restricted, 0 is returned in both
4845 *BITSTART and *BITEND. */
4847 void
4848 get_bit_range (poly_uint64_pod *bitstart, poly_uint64_pod *bitend, tree exp,
4849 poly_int64_pod *bitpos, tree *offset)
4851 poly_int64 bitoffset;
4852 tree field, repr;
4854 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4856 field = TREE_OPERAND (exp, 1);
4857 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4858 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4859 need to limit the range we can access. */
4860 if (!repr)
4862 *bitstart = *bitend = 0;
4863 return;
4866 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4867 part of a larger bit field, then the representative does not serve any
4868 useful purpose. This can occur in Ada. */
4869 if (handled_component_p (TREE_OPERAND (exp, 0)))
4871 machine_mode rmode;
4872 poly_int64 rbitsize, rbitpos;
4873 tree roffset;
4874 int unsignedp, reversep, volatilep = 0;
4875 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4876 &roffset, &rmode, &unsignedp, &reversep,
4877 &volatilep);
4878 if (!multiple_p (rbitpos, BITS_PER_UNIT))
4880 *bitstart = *bitend = 0;
4881 return;
4885 /* Compute the adjustment to bitpos from the offset of the field
4886 relative to the representative. DECL_FIELD_OFFSET of field and
4887 repr are the same by construction if they are not constants,
4888 see finish_bitfield_layout. */
4889 poly_uint64 field_offset, repr_offset;
4890 if (poly_int_tree_p (DECL_FIELD_OFFSET (field), &field_offset)
4891 && poly_int_tree_p (DECL_FIELD_OFFSET (repr), &repr_offset))
4892 bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT;
4893 else
4894 bitoffset = 0;
4895 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4896 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4898 /* If the adjustment is larger than bitpos, we would have a negative bit
4899 position for the lower bound and this may wreak havoc later. Adjust
4900 offset and bitpos to make the lower bound non-negative in that case. */
4901 if (maybe_gt (bitoffset, *bitpos))
4903 poly_int64 adjust_bits = upper_bound (bitoffset, *bitpos) - *bitpos;
4904 poly_int64 adjust_bytes = exact_div (adjust_bits, BITS_PER_UNIT);
4906 *bitpos += adjust_bits;
4907 if (*offset == NULL_TREE)
4908 *offset = size_int (-adjust_bytes);
4909 else
4910 *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes));
4911 *bitstart = 0;
4913 else
4914 *bitstart = *bitpos - bitoffset;
4916 *bitend = *bitstart + tree_to_poly_uint64 (DECL_SIZE (repr)) - 1;
4919 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4920 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4921 DECL_RTL was not set yet, return NORTL. */
4923 static inline bool
4924 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4926 if (TREE_CODE (addr) != ADDR_EXPR)
4927 return false;
4929 tree base = TREE_OPERAND (addr, 0);
4931 if (!DECL_P (base)
4932 || TREE_ADDRESSABLE (base)
4933 || DECL_MODE (base) == BLKmode)
4934 return false;
4936 if (!DECL_RTL_SET_P (base))
4937 return nortl;
4939 return (!MEM_P (DECL_RTL (base)));
4942 /* Returns true if the MEM_REF REF refers to an object that does not
4943 reside in memory and has non-BLKmode. */
4945 static inline bool
4946 mem_ref_refers_to_non_mem_p (tree ref)
4948 tree base = TREE_OPERAND (ref, 0);
4949 return addr_expr_of_non_mem_decl_p_1 (base, false);
4952 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4953 is true, try generating a nontemporal store. */
4955 void
4956 expand_assignment (tree to, tree from, bool nontemporal)
4958 rtx to_rtx = 0;
4959 rtx result;
4960 machine_mode mode;
4961 unsigned int align;
4962 enum insn_code icode;
4964 /* Don't crash if the lhs of the assignment was erroneous. */
4965 if (TREE_CODE (to) == ERROR_MARK)
4967 expand_normal (from);
4968 return;
4971 /* Optimize away no-op moves without side-effects. */
4972 if (operand_equal_p (to, from, 0))
4973 return;
4975 /* Handle misaligned stores. */
4976 mode = TYPE_MODE (TREE_TYPE (to));
4977 if ((TREE_CODE (to) == MEM_REF
4978 || TREE_CODE (to) == TARGET_MEM_REF)
4979 && mode != BLKmode
4980 && !mem_ref_refers_to_non_mem_p (to)
4981 && ((align = get_object_alignment (to))
4982 < GET_MODE_ALIGNMENT (mode))
4983 && (((icode = optab_handler (movmisalign_optab, mode))
4984 != CODE_FOR_nothing)
4985 || targetm.slow_unaligned_access (mode, align)))
4987 rtx reg, mem;
4989 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4990 reg = force_not_mem (reg);
4991 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4992 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to))
4993 reg = flip_storage_order (mode, reg);
4995 if (icode != CODE_FOR_nothing)
4997 struct expand_operand ops[2];
4999 create_fixed_operand (&ops[0], mem);
5000 create_input_operand (&ops[1], reg, mode);
5001 /* The movmisalign<mode> pattern cannot fail, else the assignment
5002 would silently be omitted. */
5003 expand_insn (icode, 2, ops);
5005 else
5006 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg,
5007 false);
5008 return;
5011 /* Assignment of a structure component needs special treatment
5012 if the structure component's rtx is not simply a MEM.
5013 Assignment of an array element at a constant index, and assignment of
5014 an array element in an unaligned packed structure field, has the same
5015 problem. Same for (partially) storing into a non-memory object. */
5016 if (handled_component_p (to)
5017 || (TREE_CODE (to) == MEM_REF
5018 && (REF_REVERSE_STORAGE_ORDER (to)
5019 || mem_ref_refers_to_non_mem_p (to)))
5020 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
5022 machine_mode mode1;
5023 poly_int64 bitsize, bitpos;
5024 poly_uint64 bitregion_start = 0;
5025 poly_uint64 bitregion_end = 0;
5026 tree offset;
5027 int unsignedp, reversep, volatilep = 0;
5028 tree tem;
5030 push_temp_slots ();
5031 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
5032 &unsignedp, &reversep, &volatilep);
5034 /* Make sure bitpos is not negative, it can wreak havoc later. */
5035 if (maybe_lt (bitpos, 0))
5037 gcc_assert (offset == NULL_TREE);
5038 offset = size_int (bits_to_bytes_round_down (bitpos));
5039 bitpos = num_trailing_bits (bitpos);
5042 if (TREE_CODE (to) == COMPONENT_REF
5043 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
5044 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
5045 /* The C++ memory model naturally applies to byte-aligned fields.
5046 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5047 BITSIZE are not byte-aligned, there is no need to limit the range
5048 we can access. This can occur with packed structures in Ada. */
5049 else if (maybe_gt (bitsize, 0)
5050 && multiple_p (bitsize, BITS_PER_UNIT)
5051 && multiple_p (bitpos, BITS_PER_UNIT))
5053 bitregion_start = bitpos;
5054 bitregion_end = bitpos + bitsize - 1;
5057 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
5059 /* If the field has a mode, we want to access it in the
5060 field's mode, not the computed mode.
5061 If a MEM has VOIDmode (external with incomplete type),
5062 use BLKmode for it instead. */
5063 if (MEM_P (to_rtx))
5065 if (mode1 != VOIDmode)
5066 to_rtx = adjust_address (to_rtx, mode1, 0);
5067 else if (GET_MODE (to_rtx) == VOIDmode)
5068 to_rtx = adjust_address (to_rtx, BLKmode, 0);
5071 if (offset != 0)
5073 machine_mode address_mode;
5074 rtx offset_rtx;
5076 if (!MEM_P (to_rtx))
5078 /* We can get constant negative offsets into arrays with broken
5079 user code. Translate this to a trap instead of ICEing. */
5080 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
5081 expand_builtin_trap ();
5082 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
5085 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
5086 address_mode = get_address_mode (to_rtx);
5087 if (GET_MODE (offset_rtx) != address_mode)
5089 /* We cannot be sure that the RTL in offset_rtx is valid outside
5090 of a memory address context, so force it into a register
5091 before attempting to convert it to the desired mode. */
5092 offset_rtx = force_operand (offset_rtx, NULL_RTX);
5093 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5096 /* If we have an expression in OFFSET_RTX and a non-zero
5097 byte offset in BITPOS, adding the byte offset before the
5098 OFFSET_RTX results in better intermediate code, which makes
5099 later rtl optimization passes perform better.
5101 We prefer intermediate code like this:
5103 r124:DI=r123:DI+0x18
5104 [r124:DI]=r121:DI
5106 ... instead of ...
5108 r124:DI=r123:DI+0x10
5109 [r124:DI+0x8]=r121:DI
5111 This is only done for aligned data values, as these can
5112 be expected to result in single move instructions. */
5113 poly_int64 bytepos;
5114 if (mode1 != VOIDmode
5115 && maybe_ne (bitpos, 0)
5116 && maybe_gt (bitsize, 0)
5117 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
5118 && multiple_p (bitpos, bitsize)
5119 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
5120 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
5122 to_rtx = adjust_address (to_rtx, mode1, bytepos);
5123 bitregion_start = 0;
5124 if (known_ge (bitregion_end, poly_uint64 (bitpos)))
5125 bitregion_end -= bitpos;
5126 bitpos = 0;
5129 to_rtx = offset_address (to_rtx, offset_rtx,
5130 highest_pow2_factor_for_target (to,
5131 offset));
5134 /* No action is needed if the target is not a memory and the field
5135 lies completely outside that target. This can occur if the source
5136 code contains an out-of-bounds access to a small array. */
5137 if (!MEM_P (to_rtx)
5138 && GET_MODE (to_rtx) != BLKmode
5139 && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx))))
5141 expand_normal (from);
5142 result = NULL;
5144 /* Handle expand_expr of a complex value returning a CONCAT. */
5145 else if (GET_CODE (to_rtx) == CONCAT)
5147 machine_mode to_mode = GET_MODE (to_rtx);
5148 gcc_checking_assert (COMPLEX_MODE_P (to_mode));
5149 poly_int64 mode_bitsize = GET_MODE_BITSIZE (to_mode);
5150 unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode);
5151 if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE (to_rtx)
5152 && COMPLEX_MODE_P (GET_MODE (to_rtx))
5153 && known_eq (bitpos, 0)
5154 && known_eq (bitsize, mode_bitsize))
5155 result = store_expr (from, to_rtx, false, nontemporal, reversep);
5156 else if (known_eq (bitsize, inner_bitsize)
5157 && (known_eq (bitpos, 0)
5158 || known_eq (bitpos, inner_bitsize)))
5159 result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)),
5160 false, nontemporal, reversep);
5161 else if (known_le (bitpos + bitsize, inner_bitsize))
5162 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5163 bitregion_start, bitregion_end,
5164 mode1, from, get_alias_set (to),
5165 nontemporal, reversep);
5166 else if (known_ge (bitpos, inner_bitsize))
5167 result = store_field (XEXP (to_rtx, 1), bitsize,
5168 bitpos - inner_bitsize,
5169 bitregion_start, bitregion_end,
5170 mode1, from, get_alias_set (to),
5171 nontemporal, reversep);
5172 else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize))
5174 result = expand_normal (from);
5175 if (GET_CODE (result) == CONCAT)
5177 to_mode = GET_MODE_INNER (to_mode);
5178 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result));
5179 rtx from_real
5180 = simplify_gen_subreg (to_mode, XEXP (result, 0),
5181 from_mode, 0);
5182 rtx from_imag
5183 = simplify_gen_subreg (to_mode, XEXP (result, 1),
5184 from_mode, 0);
5185 if (!from_real || !from_imag)
5186 goto concat_store_slow;
5187 emit_move_insn (XEXP (to_rtx, 0), from_real);
5188 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5190 else
5192 rtx from_rtx
5193 = simplify_gen_subreg (to_mode, result,
5194 TYPE_MODE (TREE_TYPE (from)), 0);
5195 if (from_rtx)
5197 emit_move_insn (XEXP (to_rtx, 0),
5198 read_complex_part (from_rtx, false));
5199 emit_move_insn (XEXP (to_rtx, 1),
5200 read_complex_part (from_rtx, true));
5202 else
5204 machine_mode to_mode
5205 = GET_MODE_INNER (GET_MODE (to_rtx));
5206 rtx from_real
5207 = simplify_gen_subreg (to_mode, result,
5208 TYPE_MODE (TREE_TYPE (from)),
5210 rtx from_imag
5211 = simplify_gen_subreg (to_mode, result,
5212 TYPE_MODE (TREE_TYPE (from)),
5213 GET_MODE_SIZE (to_mode));
5214 if (!from_real || !from_imag)
5215 goto concat_store_slow;
5216 emit_move_insn (XEXP (to_rtx, 0), from_real);
5217 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5221 else
5223 concat_store_slow:;
5224 rtx temp = assign_stack_temp (to_mode,
5225 GET_MODE_SIZE (GET_MODE (to_rtx)));
5226 write_complex_part (temp, XEXP (to_rtx, 0), false);
5227 write_complex_part (temp, XEXP (to_rtx, 1), true);
5228 result = store_field (temp, bitsize, bitpos,
5229 bitregion_start, bitregion_end,
5230 mode1, from, get_alias_set (to),
5231 nontemporal, reversep);
5232 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5233 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5236 else
5238 if (MEM_P (to_rtx))
5240 /* If the field is at offset zero, we could have been given the
5241 DECL_RTX of the parent struct. Don't munge it. */
5242 to_rtx = shallow_copy_rtx (to_rtx);
5243 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5244 if (volatilep)
5245 MEM_VOLATILE_P (to_rtx) = 1;
5248 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5249 bitregion_start, bitregion_end,
5250 mode1, to_rtx, to, from,
5251 reversep))
5252 result = NULL;
5253 else
5254 result = store_field (to_rtx, bitsize, bitpos,
5255 bitregion_start, bitregion_end,
5256 mode1, from, get_alias_set (to),
5257 nontemporal, reversep);
5260 if (result)
5261 preserve_temp_slots (result);
5262 pop_temp_slots ();
5263 return;
5266 /* If the rhs is a function call and its value is not an aggregate,
5267 call the function before we start to compute the lhs.
5268 This is needed for correct code for cases such as
5269 val = setjmp (buf) on machines where reference to val
5270 requires loading up part of an address in a separate insn.
5272 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5273 since it might be a promoted variable where the zero- or sign- extension
5274 needs to be done. Handling this in the normal way is safe because no
5275 computation is done before the call. The same is true for SSA names. */
5276 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5277 && COMPLETE_TYPE_P (TREE_TYPE (from))
5278 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5279 && ! (((VAR_P (to)
5280 || TREE_CODE (to) == PARM_DECL
5281 || TREE_CODE (to) == RESULT_DECL)
5282 && REG_P (DECL_RTL (to)))
5283 || TREE_CODE (to) == SSA_NAME))
5285 rtx value;
5286 rtx bounds;
5288 push_temp_slots ();
5289 value = expand_normal (from);
5291 /* Split value and bounds to store them separately. */
5292 chkp_split_slot (value, &value, &bounds);
5294 if (to_rtx == 0)
5295 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5297 /* Handle calls that return values in multiple non-contiguous locations.
5298 The Irix 6 ABI has examples of this. */
5299 if (GET_CODE (to_rtx) == PARALLEL)
5301 if (GET_CODE (value) == PARALLEL)
5302 emit_group_move (to_rtx, value);
5303 else
5304 emit_group_load (to_rtx, value, TREE_TYPE (from),
5305 int_size_in_bytes (TREE_TYPE (from)));
5307 else if (GET_CODE (value) == PARALLEL)
5308 emit_group_store (to_rtx, value, TREE_TYPE (from),
5309 int_size_in_bytes (TREE_TYPE (from)));
5310 else if (GET_MODE (to_rtx) == BLKmode)
5312 /* Handle calls that return BLKmode values in registers. */
5313 if (REG_P (value))
5314 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5315 else
5316 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5318 else
5320 if (POINTER_TYPE_P (TREE_TYPE (to)))
5321 value = convert_memory_address_addr_space
5322 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value,
5323 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5325 emit_move_insn (to_rtx, value);
5328 /* Store bounds if required. */
5329 if (bounds
5330 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5332 gcc_assert (MEM_P (to_rtx));
5333 chkp_emit_bounds_store (bounds, value, to_rtx);
5336 preserve_temp_slots (to_rtx);
5337 pop_temp_slots ();
5338 return;
5341 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5342 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5344 /* Don't move directly into a return register. */
5345 if (TREE_CODE (to) == RESULT_DECL
5346 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5348 rtx temp;
5350 push_temp_slots ();
5352 /* If the source is itself a return value, it still is in a pseudo at
5353 this point so we can move it back to the return register directly. */
5354 if (REG_P (to_rtx)
5355 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5356 && TREE_CODE (from) != CALL_EXPR)
5357 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5358 else
5359 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5361 /* Handle calls that return values in multiple non-contiguous locations.
5362 The Irix 6 ABI has examples of this. */
5363 if (GET_CODE (to_rtx) == PARALLEL)
5365 if (GET_CODE (temp) == PARALLEL)
5366 emit_group_move (to_rtx, temp);
5367 else
5368 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5369 int_size_in_bytes (TREE_TYPE (from)));
5371 else if (temp)
5372 emit_move_insn (to_rtx, temp);
5374 preserve_temp_slots (to_rtx);
5375 pop_temp_slots ();
5376 return;
5379 /* In case we are returning the contents of an object which overlaps
5380 the place the value is being stored, use a safe function when copying
5381 a value through a pointer into a structure value return block. */
5382 if (TREE_CODE (to) == RESULT_DECL
5383 && TREE_CODE (from) == INDIRECT_REF
5384 && ADDR_SPACE_GENERIC_P
5385 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5386 && refs_may_alias_p (to, from)
5387 && cfun->returns_struct
5388 && !cfun->returns_pcc_struct)
5390 rtx from_rtx, size;
5392 push_temp_slots ();
5393 size = expr_size (from);
5394 from_rtx = expand_normal (from);
5396 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size);
5398 preserve_temp_slots (to_rtx);
5399 pop_temp_slots ();
5400 return;
5403 /* Compute FROM and store the value in the rtx we got. */
5405 push_temp_slots ();
5406 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, false, to);
5407 preserve_temp_slots (result);
5408 pop_temp_slots ();
5409 return;
5412 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5413 succeeded, false otherwise. */
5415 bool
5416 emit_storent_insn (rtx to, rtx from)
5418 struct expand_operand ops[2];
5419 machine_mode mode = GET_MODE (to);
5420 enum insn_code code = optab_handler (storent_optab, mode);
5422 if (code == CODE_FOR_nothing)
5423 return false;
5425 create_fixed_operand (&ops[0], to);
5426 create_input_operand (&ops[1], from, mode);
5427 return maybe_expand_insn (code, 2, ops);
5430 /* Generate code for computing expression EXP,
5431 and storing the value into TARGET.
5433 If the mode is BLKmode then we may return TARGET itself.
5434 It turns out that in BLKmode it doesn't cause a problem.
5435 because C has no operators that could combine two different
5436 assignments into the same BLKmode object with different values
5437 with no sequence point. Will other languages need this to
5438 be more thorough?
5440 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5441 stack, and block moves may need to be treated specially.
5443 If NONTEMPORAL is true, try using a nontemporal store instruction.
5445 If REVERSE is true, the store is to be done in reverse order.
5447 If BTARGET is not NULL then computed bounds of EXP are
5448 associated with BTARGET. */
5451 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5452 bool nontemporal, bool reverse, tree btarget)
5454 rtx temp;
5455 rtx alt_rtl = NULL_RTX;
5456 location_t loc = curr_insn_location ();
5458 if (VOID_TYPE_P (TREE_TYPE (exp)))
5460 /* C++ can generate ?: expressions with a throw expression in one
5461 branch and an rvalue in the other. Here, we resolve attempts to
5462 store the throw expression's nonexistent result. */
5463 gcc_assert (!call_param_p);
5464 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5465 return NULL_RTX;
5467 if (TREE_CODE (exp) == COMPOUND_EXPR)
5469 /* Perform first part of compound expression, then assign from second
5470 part. */
5471 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5472 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5473 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5474 call_param_p, nontemporal, reverse,
5475 btarget);
5477 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5479 /* For conditional expression, get safe form of the target. Then
5480 test the condition, doing the appropriate assignment on either
5481 side. This avoids the creation of unnecessary temporaries.
5482 For non-BLKmode, it is more efficient not to do this. */
5484 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5486 do_pending_stack_adjust ();
5487 NO_DEFER_POP;
5488 jumpifnot (TREE_OPERAND (exp, 0), lab1,
5489 profile_probability::uninitialized ());
5490 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5491 nontemporal, reverse, btarget);
5492 emit_jump_insn (targetm.gen_jump (lab2));
5493 emit_barrier ();
5494 emit_label (lab1);
5495 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5496 nontemporal, reverse, btarget);
5497 emit_label (lab2);
5498 OK_DEFER_POP;
5500 return NULL_RTX;
5502 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5503 /* If this is a scalar in a register that is stored in a wider mode
5504 than the declared mode, compute the result into its declared mode
5505 and then convert to the wider mode. Our value is the computed
5506 expression. */
5508 rtx inner_target = 0;
5509 scalar_int_mode outer_mode = subreg_unpromoted_mode (target);
5510 scalar_int_mode inner_mode = subreg_promoted_mode (target);
5512 /* We can do the conversion inside EXP, which will often result
5513 in some optimizations. Do the conversion in two steps: first
5514 change the signedness, if needed, then the extend. But don't
5515 do this if the type of EXP is a subtype of something else
5516 since then the conversion might involve more than just
5517 converting modes. */
5518 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5519 && TREE_TYPE (TREE_TYPE (exp)) == 0
5520 && GET_MODE_PRECISION (outer_mode)
5521 == TYPE_PRECISION (TREE_TYPE (exp)))
5523 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5524 TYPE_UNSIGNED (TREE_TYPE (exp))))
5526 /* Some types, e.g. Fortran's logical*4, won't have a signed
5527 version, so use the mode instead. */
5528 tree ntype
5529 = (signed_or_unsigned_type_for
5530 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5531 if (ntype == NULL)
5532 ntype = lang_hooks.types.type_for_mode
5533 (TYPE_MODE (TREE_TYPE (exp)),
5534 SUBREG_PROMOTED_SIGN (target));
5536 exp = fold_convert_loc (loc, ntype, exp);
5539 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5540 (inner_mode, SUBREG_PROMOTED_SIGN (target)),
5541 exp);
5543 inner_target = SUBREG_REG (target);
5546 temp = expand_expr (exp, inner_target, VOIDmode,
5547 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5549 /* Handle bounds returned by call. */
5550 if (TREE_CODE (exp) == CALL_EXPR)
5552 rtx bounds;
5553 chkp_split_slot (temp, &temp, &bounds);
5554 if (bounds && btarget)
5556 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5557 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5558 chkp_set_rtl_bounds (btarget, tmp);
5562 /* If TEMP is a VOIDmode constant, use convert_modes to make
5563 sure that we properly convert it. */
5564 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5566 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)),
5567 temp, SUBREG_PROMOTED_SIGN (target));
5568 temp = convert_modes (inner_mode, outer_mode, temp,
5569 SUBREG_PROMOTED_SIGN (target));
5572 convert_move (SUBREG_REG (target), temp,
5573 SUBREG_PROMOTED_SIGN (target));
5575 return NULL_RTX;
5577 else if ((TREE_CODE (exp) == STRING_CST
5578 || (TREE_CODE (exp) == MEM_REF
5579 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5580 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5581 == STRING_CST
5582 && integer_zerop (TREE_OPERAND (exp, 1))))
5583 && !nontemporal && !call_param_p
5584 && MEM_P (target))
5586 /* Optimize initialization of an array with a STRING_CST. */
5587 HOST_WIDE_INT exp_len, str_copy_len;
5588 rtx dest_mem;
5589 tree str = TREE_CODE (exp) == STRING_CST
5590 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5592 exp_len = int_expr_size (exp);
5593 if (exp_len <= 0)
5594 goto normal_expr;
5596 if (TREE_STRING_LENGTH (str) <= 0)
5597 goto normal_expr;
5599 str_copy_len = strlen (TREE_STRING_POINTER (str));
5600 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5601 goto normal_expr;
5603 str_copy_len = TREE_STRING_LENGTH (str);
5604 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5605 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5607 str_copy_len += STORE_MAX_PIECES - 1;
5608 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5610 str_copy_len = MIN (str_copy_len, exp_len);
5611 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5612 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5613 MEM_ALIGN (target), false))
5614 goto normal_expr;
5616 dest_mem = target;
5618 dest_mem = store_by_pieces (dest_mem,
5619 str_copy_len, builtin_strncpy_read_str,
5620 CONST_CAST (char *,
5621 TREE_STRING_POINTER (str)),
5622 MEM_ALIGN (target), false,
5623 exp_len > str_copy_len ? 1 : 0);
5624 if (exp_len > str_copy_len)
5625 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5626 GEN_INT (exp_len - str_copy_len),
5627 BLOCK_OP_NORMAL);
5628 return NULL_RTX;
5630 else
5632 rtx tmp_target;
5634 normal_expr:
5635 /* If we want to use a nontemporal or a reverse order store, force the
5636 value into a register first. */
5637 tmp_target = nontemporal || reverse ? NULL_RTX : target;
5638 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5639 (call_param_p
5640 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5641 &alt_rtl, false);
5643 /* Handle bounds returned by call. */
5644 if (TREE_CODE (exp) == CALL_EXPR)
5646 rtx bounds;
5647 chkp_split_slot (temp, &temp, &bounds);
5648 if (bounds && btarget)
5650 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5651 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5652 chkp_set_rtl_bounds (btarget, tmp);
5657 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5658 the same as that of TARGET, adjust the constant. This is needed, for
5659 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5660 only a word-sized value. */
5661 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5662 && TREE_CODE (exp) != ERROR_MARK
5663 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5665 if (GET_MODE_CLASS (GET_MODE (target))
5666 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp)))
5667 && known_eq (GET_MODE_BITSIZE (GET_MODE (target)),
5668 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)))))
5670 rtx t = simplify_gen_subreg (GET_MODE (target), temp,
5671 TYPE_MODE (TREE_TYPE (exp)), 0);
5672 if (t)
5673 temp = t;
5675 if (GET_MODE (temp) == VOIDmode)
5676 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5677 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5680 /* If value was not generated in the target, store it there.
5681 Convert the value to TARGET's type first if necessary and emit the
5682 pending incrementations that have been queued when expanding EXP.
5683 Note that we cannot emit the whole queue blindly because this will
5684 effectively disable the POST_INC optimization later.
5686 If TEMP and TARGET compare equal according to rtx_equal_p, but
5687 one or both of them are volatile memory refs, we have to distinguish
5688 two cases:
5689 - expand_expr has used TARGET. In this case, we must not generate
5690 another copy. This can be detected by TARGET being equal according
5691 to == .
5692 - expand_expr has not used TARGET - that means that the source just
5693 happens to have the same RTX form. Since temp will have been created
5694 by expand_expr, it will compare unequal according to == .
5695 We must generate a copy in this case, to reach the correct number
5696 of volatile memory references. */
5698 if ((! rtx_equal_p (temp, target)
5699 || (temp != target && (side_effects_p (temp)
5700 || side_effects_p (target))))
5701 && TREE_CODE (exp) != ERROR_MARK
5702 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5703 but TARGET is not valid memory reference, TEMP will differ
5704 from TARGET although it is really the same location. */
5705 && !(alt_rtl
5706 && rtx_equal_p (alt_rtl, target)
5707 && !side_effects_p (alt_rtl)
5708 && !side_effects_p (target))
5709 /* If there's nothing to copy, don't bother. Don't call
5710 expr_size unless necessary, because some front-ends (C++)
5711 expr_size-hook must not be given objects that are not
5712 supposed to be bit-copied or bit-initialized. */
5713 && expr_size (exp) != const0_rtx)
5715 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5717 if (GET_MODE (target) == BLKmode)
5719 /* Handle calls that return BLKmode values in registers. */
5720 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5721 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5722 else
5723 store_bit_field (target,
5724 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5725 0, 0, 0, GET_MODE (temp), temp, reverse);
5727 else
5728 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5731 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5733 /* Handle copying a string constant into an array. The string
5734 constant may be shorter than the array. So copy just the string's
5735 actual length, and clear the rest. First get the size of the data
5736 type of the string, which is actually the size of the target. */
5737 rtx size = expr_size (exp);
5739 if (CONST_INT_P (size)
5740 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5741 emit_block_move (target, temp, size,
5742 (call_param_p
5743 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5744 else
5746 machine_mode pointer_mode
5747 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5748 machine_mode address_mode = get_address_mode (target);
5750 /* Compute the size of the data to copy from the string. */
5751 tree copy_size
5752 = size_binop_loc (loc, MIN_EXPR,
5753 make_tree (sizetype, size),
5754 size_int (TREE_STRING_LENGTH (exp)));
5755 rtx copy_size_rtx
5756 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5757 (call_param_p
5758 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5759 rtx_code_label *label = 0;
5761 /* Copy that much. */
5762 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5763 TYPE_UNSIGNED (sizetype));
5764 emit_block_move (target, temp, copy_size_rtx,
5765 (call_param_p
5766 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5768 /* Figure out how much is left in TARGET that we have to clear.
5769 Do all calculations in pointer_mode. */
5770 if (CONST_INT_P (copy_size_rtx))
5772 size = plus_constant (address_mode, size,
5773 -INTVAL (copy_size_rtx));
5774 target = adjust_address (target, BLKmode,
5775 INTVAL (copy_size_rtx));
5777 else
5779 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5780 copy_size_rtx, NULL_RTX, 0,
5781 OPTAB_LIB_WIDEN);
5783 if (GET_MODE (copy_size_rtx) != address_mode)
5784 copy_size_rtx = convert_to_mode (address_mode,
5785 copy_size_rtx,
5786 TYPE_UNSIGNED (sizetype));
5788 target = offset_address (target, copy_size_rtx,
5789 highest_pow2_factor (copy_size));
5790 label = gen_label_rtx ();
5791 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5792 GET_MODE (size), 0, label);
5795 if (size != const0_rtx)
5796 clear_storage (target, size, BLOCK_OP_NORMAL);
5798 if (label)
5799 emit_label (label);
5802 /* Handle calls that return values in multiple non-contiguous locations.
5803 The Irix 6 ABI has examples of this. */
5804 else if (GET_CODE (target) == PARALLEL)
5806 if (GET_CODE (temp) == PARALLEL)
5807 emit_group_move (target, temp);
5808 else
5809 emit_group_load (target, temp, TREE_TYPE (exp),
5810 int_size_in_bytes (TREE_TYPE (exp)));
5812 else if (GET_CODE (temp) == PARALLEL)
5813 emit_group_store (target, temp, TREE_TYPE (exp),
5814 int_size_in_bytes (TREE_TYPE (exp)));
5815 else if (GET_MODE (temp) == BLKmode)
5816 emit_block_move (target, temp, expr_size (exp),
5817 (call_param_p
5818 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5819 /* If we emit a nontemporal store, there is nothing else to do. */
5820 else if (nontemporal && emit_storent_insn (target, temp))
5822 else
5824 if (reverse)
5825 temp = flip_storage_order (GET_MODE (target), temp);
5826 temp = force_operand (temp, target);
5827 if (temp != target)
5828 emit_move_insn (target, temp);
5832 return NULL_RTX;
5835 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5837 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal,
5838 bool reverse)
5840 return store_expr_with_bounds (exp, target, call_param_p, nontemporal,
5841 reverse, NULL);
5844 /* Return true if field F of structure TYPE is a flexible array. */
5846 static bool
5847 flexible_array_member_p (const_tree f, const_tree type)
5849 const_tree tf;
5851 tf = TREE_TYPE (f);
5852 return (DECL_CHAIN (f) == NULL
5853 && TREE_CODE (tf) == ARRAY_TYPE
5854 && TYPE_DOMAIN (tf)
5855 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5856 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5857 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5858 && int_size_in_bytes (type) >= 0);
5861 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5862 must have in order for it to completely initialize a value of type TYPE.
5863 Return -1 if the number isn't known.
5865 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5867 static HOST_WIDE_INT
5868 count_type_elements (const_tree type, bool for_ctor_p)
5870 switch (TREE_CODE (type))
5872 case ARRAY_TYPE:
5874 tree nelts;
5876 nelts = array_type_nelts (type);
5877 if (nelts && tree_fits_uhwi_p (nelts))
5879 unsigned HOST_WIDE_INT n;
5881 n = tree_to_uhwi (nelts) + 1;
5882 if (n == 0 || for_ctor_p)
5883 return n;
5884 else
5885 return n * count_type_elements (TREE_TYPE (type), false);
5887 return for_ctor_p ? -1 : 1;
5890 case RECORD_TYPE:
5892 unsigned HOST_WIDE_INT n;
5893 tree f;
5895 n = 0;
5896 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5897 if (TREE_CODE (f) == FIELD_DECL)
5899 if (!for_ctor_p)
5900 n += count_type_elements (TREE_TYPE (f), false);
5901 else if (!flexible_array_member_p (f, type))
5902 /* Don't count flexible arrays, which are not supposed
5903 to be initialized. */
5904 n += 1;
5907 return n;
5910 case UNION_TYPE:
5911 case QUAL_UNION_TYPE:
5913 tree f;
5914 HOST_WIDE_INT n, m;
5916 gcc_assert (!for_ctor_p);
5917 /* Estimate the number of scalars in each field and pick the
5918 maximum. Other estimates would do instead; the idea is simply
5919 to make sure that the estimate is not sensitive to the ordering
5920 of the fields. */
5921 n = 1;
5922 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5923 if (TREE_CODE (f) == FIELD_DECL)
5925 m = count_type_elements (TREE_TYPE (f), false);
5926 /* If the field doesn't span the whole union, add an extra
5927 scalar for the rest. */
5928 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5929 TYPE_SIZE (type)) != 1)
5930 m++;
5931 if (n < m)
5932 n = m;
5934 return n;
5937 case COMPLEX_TYPE:
5938 return 2;
5940 case VECTOR_TYPE:
5942 unsigned HOST_WIDE_INT nelts;
5943 if (TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts))
5944 return nelts;
5945 else
5946 return -1;
5949 case INTEGER_TYPE:
5950 case REAL_TYPE:
5951 case FIXED_POINT_TYPE:
5952 case ENUMERAL_TYPE:
5953 case BOOLEAN_TYPE:
5954 case POINTER_TYPE:
5955 case OFFSET_TYPE:
5956 case REFERENCE_TYPE:
5957 case NULLPTR_TYPE:
5958 return 1;
5960 case ERROR_MARK:
5961 return 0;
5963 case VOID_TYPE:
5964 case METHOD_TYPE:
5965 case FUNCTION_TYPE:
5966 case LANG_TYPE:
5967 default:
5968 gcc_unreachable ();
5972 /* Helper for categorize_ctor_elements. Identical interface. */
5974 static bool
5975 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5976 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5978 unsigned HOST_WIDE_INT idx;
5979 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5980 tree value, purpose, elt_type;
5982 /* Whether CTOR is a valid constant initializer, in accordance with what
5983 initializer_constant_valid_p does. If inferred from the constructor
5984 elements, true until proven otherwise. */
5985 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5986 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5988 nz_elts = 0;
5989 init_elts = 0;
5990 num_fields = 0;
5991 elt_type = NULL_TREE;
5993 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5995 HOST_WIDE_INT mult = 1;
5997 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5999 tree lo_index = TREE_OPERAND (purpose, 0);
6000 tree hi_index = TREE_OPERAND (purpose, 1);
6002 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
6003 mult = (tree_to_uhwi (hi_index)
6004 - tree_to_uhwi (lo_index) + 1);
6006 num_fields += mult;
6007 elt_type = TREE_TYPE (value);
6009 switch (TREE_CODE (value))
6011 case CONSTRUCTOR:
6013 HOST_WIDE_INT nz = 0, ic = 0;
6015 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
6016 p_complete);
6018 nz_elts += mult * nz;
6019 init_elts += mult * ic;
6021 if (const_from_elts_p && const_p)
6022 const_p = const_elt_p;
6024 break;
6026 case INTEGER_CST:
6027 case REAL_CST:
6028 case FIXED_CST:
6029 if (!initializer_zerop (value))
6030 nz_elts += mult;
6031 init_elts += mult;
6032 break;
6034 case STRING_CST:
6035 nz_elts += mult * TREE_STRING_LENGTH (value);
6036 init_elts += mult * TREE_STRING_LENGTH (value);
6037 break;
6039 case COMPLEX_CST:
6040 if (!initializer_zerop (TREE_REALPART (value)))
6041 nz_elts += mult;
6042 if (!initializer_zerop (TREE_IMAGPART (value)))
6043 nz_elts += mult;
6044 init_elts += mult;
6045 break;
6047 case VECTOR_CST:
6049 /* We can only construct constant-length vectors using
6050 CONSTRUCTOR. */
6051 unsigned int nunits = VECTOR_CST_NELTS (value).to_constant ();
6052 for (unsigned int i = 0; i < nunits; ++i)
6054 tree v = VECTOR_CST_ELT (value, i);
6055 if (!initializer_zerop (v))
6056 nz_elts += mult;
6057 init_elts += mult;
6060 break;
6062 default:
6064 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
6065 nz_elts += mult * tc;
6066 init_elts += mult * tc;
6068 if (const_from_elts_p && const_p)
6069 const_p
6070 = initializer_constant_valid_p (value,
6071 elt_type,
6072 TYPE_REVERSE_STORAGE_ORDER
6073 (TREE_TYPE (ctor)))
6074 != NULL_TREE;
6076 break;
6080 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
6081 num_fields, elt_type))
6082 *p_complete = false;
6084 *p_nz_elts += nz_elts;
6085 *p_init_elts += init_elts;
6087 return const_p;
6090 /* Examine CTOR to discover:
6091 * how many scalar fields are set to nonzero values,
6092 and place it in *P_NZ_ELTS;
6093 * how many scalar fields in total are in CTOR,
6094 and place it in *P_ELT_COUNT.
6095 * whether the constructor is complete -- in the sense that every
6096 meaningful byte is explicitly given a value --
6097 and place it in *P_COMPLETE.
6099 Return whether or not CTOR is a valid static constant initializer, the same
6100 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6102 bool
6103 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6104 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6106 *p_nz_elts = 0;
6107 *p_init_elts = 0;
6108 *p_complete = true;
6110 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
6113 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6114 of which had type LAST_TYPE. Each element was itself a complete
6115 initializer, in the sense that every meaningful byte was explicitly
6116 given a value. Return true if the same is true for the constructor
6117 as a whole. */
6119 bool
6120 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
6121 const_tree last_type)
6123 if (TREE_CODE (type) == UNION_TYPE
6124 || TREE_CODE (type) == QUAL_UNION_TYPE)
6126 if (num_elts == 0)
6127 return false;
6129 gcc_assert (num_elts == 1 && last_type);
6131 /* ??? We could look at each element of the union, and find the
6132 largest element. Which would avoid comparing the size of the
6133 initialized element against any tail padding in the union.
6134 Doesn't seem worth the effort... */
6135 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
6138 return count_type_elements (type, true) == num_elts;
6141 /* Return 1 if EXP contains mostly (3/4) zeros. */
6143 static int
6144 mostly_zeros_p (const_tree exp)
6146 if (TREE_CODE (exp) == CONSTRUCTOR)
6148 HOST_WIDE_INT nz_elts, init_elts;
6149 bool complete_p;
6151 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6152 return !complete_p || nz_elts < init_elts / 4;
6155 return initializer_zerop (exp);
6158 /* Return 1 if EXP contains all zeros. */
6160 static int
6161 all_zeros_p (const_tree exp)
6163 if (TREE_CODE (exp) == CONSTRUCTOR)
6165 HOST_WIDE_INT nz_elts, init_elts;
6166 bool complete_p;
6168 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6169 return nz_elts == 0;
6172 return initializer_zerop (exp);
6175 /* Helper function for store_constructor.
6176 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6177 CLEARED is as for store_constructor.
6178 ALIAS_SET is the alias set to use for any stores.
6179 If REVERSE is true, the store is to be done in reverse order.
6181 This provides a recursive shortcut back to store_constructor when it isn't
6182 necessary to go through store_field. This is so that we can pass through
6183 the cleared field to let store_constructor know that we may not have to
6184 clear a substructure if the outer structure has already been cleared. */
6186 static void
6187 store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos,
6188 poly_uint64 bitregion_start,
6189 poly_uint64 bitregion_end,
6190 machine_mode mode,
6191 tree exp, int cleared,
6192 alias_set_type alias_set, bool reverse)
6194 poly_int64 bytepos;
6195 poly_uint64 bytesize;
6196 if (TREE_CODE (exp) == CONSTRUCTOR
6197 /* We can only call store_constructor recursively if the size and
6198 bit position are on a byte boundary. */
6199 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
6200 && maybe_ne (bitsize, 0U)
6201 && multiple_p (bitsize, BITS_PER_UNIT, &bytesize)
6202 /* If we have a nonzero bitpos for a register target, then we just
6203 let store_field do the bitfield handling. This is unlikely to
6204 generate unnecessary clear instructions anyways. */
6205 && (known_eq (bitpos, 0) || MEM_P (target)))
6207 if (MEM_P (target))
6209 machine_mode target_mode = GET_MODE (target);
6210 if (target_mode != BLKmode
6211 && !multiple_p (bitpos, GET_MODE_ALIGNMENT (target_mode)))
6212 target_mode = BLKmode;
6213 target = adjust_address (target, target_mode, bytepos);
6217 /* Update the alias set, if required. */
6218 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
6219 && MEM_ALIAS_SET (target) != 0)
6221 target = copy_rtx (target);
6222 set_mem_alias_set (target, alias_set);
6225 store_constructor (exp, target, cleared, bytesize, reverse);
6227 else
6228 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode,
6229 exp, alias_set, false, reverse);
6233 /* Returns the number of FIELD_DECLs in TYPE. */
6235 static int
6236 fields_length (const_tree type)
6238 tree t = TYPE_FIELDS (type);
6239 int count = 0;
6241 for (; t; t = DECL_CHAIN (t))
6242 if (TREE_CODE (t) == FIELD_DECL)
6243 ++count;
6245 return count;
6249 /* Store the value of constructor EXP into the rtx TARGET.
6250 TARGET is either a REG or a MEM; we know it cannot conflict, since
6251 safe_from_p has been called.
6252 CLEARED is true if TARGET is known to have been zero'd.
6253 SIZE is the number of bytes of TARGET we are allowed to modify: this
6254 may not be the same as the size of EXP if we are assigning to a field
6255 which has been packed to exclude padding bits.
6256 If REVERSE is true, the store is to be done in reverse order. */
6258 static void
6259 store_constructor (tree exp, rtx target, int cleared, poly_int64 size,
6260 bool reverse)
6262 tree type = TREE_TYPE (exp);
6263 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6264 poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0;
6266 switch (TREE_CODE (type))
6268 case RECORD_TYPE:
6269 case UNION_TYPE:
6270 case QUAL_UNION_TYPE:
6272 unsigned HOST_WIDE_INT idx;
6273 tree field, value;
6275 /* The storage order is specified for every aggregate type. */
6276 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6278 /* If size is zero or the target is already cleared, do nothing. */
6279 if (known_eq (size, 0) || cleared)
6280 cleared = 1;
6281 /* We either clear the aggregate or indicate the value is dead. */
6282 else if ((TREE_CODE (type) == UNION_TYPE
6283 || TREE_CODE (type) == QUAL_UNION_TYPE)
6284 && ! CONSTRUCTOR_ELTS (exp))
6285 /* If the constructor is empty, clear the union. */
6287 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6288 cleared = 1;
6291 /* If we are building a static constructor into a register,
6292 set the initial value as zero so we can fold the value into
6293 a constant. But if more than one register is involved,
6294 this probably loses. */
6295 else if (REG_P (target) && TREE_STATIC (exp)
6296 && known_le (GET_MODE_SIZE (GET_MODE (target)),
6297 REGMODE_NATURAL_SIZE (GET_MODE (target))))
6299 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6300 cleared = 1;
6303 /* If the constructor has fewer fields than the structure or
6304 if we are initializing the structure to mostly zeros, clear
6305 the whole structure first. Don't do this if TARGET is a
6306 register whose mode size isn't equal to SIZE since
6307 clear_storage can't handle this case. */
6308 else if (known_size_p (size)
6309 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type))
6310 || mostly_zeros_p (exp))
6311 && (!REG_P (target)
6312 || known_eq (GET_MODE_SIZE (GET_MODE (target)), size)))
6314 clear_storage (target, gen_int_mode (size, Pmode),
6315 BLOCK_OP_NORMAL);
6316 cleared = 1;
6319 if (REG_P (target) && !cleared)
6320 emit_clobber (target);
6322 /* Store each element of the constructor into the
6323 corresponding field of TARGET. */
6324 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6326 machine_mode mode;
6327 HOST_WIDE_INT bitsize;
6328 HOST_WIDE_INT bitpos = 0;
6329 tree offset;
6330 rtx to_rtx = target;
6332 /* Just ignore missing fields. We cleared the whole
6333 structure, above, if any fields are missing. */
6334 if (field == 0)
6335 continue;
6337 if (cleared && initializer_zerop (value))
6338 continue;
6340 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6341 bitsize = tree_to_uhwi (DECL_SIZE (field));
6342 else
6343 gcc_unreachable ();
6345 mode = DECL_MODE (field);
6346 if (DECL_BIT_FIELD (field))
6347 mode = VOIDmode;
6349 offset = DECL_FIELD_OFFSET (field);
6350 if (tree_fits_shwi_p (offset)
6351 && tree_fits_shwi_p (bit_position (field)))
6353 bitpos = int_bit_position (field);
6354 offset = NULL_TREE;
6356 else
6357 gcc_unreachable ();
6359 /* If this initializes a field that is smaller than a
6360 word, at the start of a word, try to widen it to a full
6361 word. This special case allows us to output C++ member
6362 function initializations in a form that the optimizers
6363 can understand. */
6364 if (WORD_REGISTER_OPERATIONS
6365 && REG_P (target)
6366 && bitsize < BITS_PER_WORD
6367 && bitpos % BITS_PER_WORD == 0
6368 && GET_MODE_CLASS (mode) == MODE_INT
6369 && TREE_CODE (value) == INTEGER_CST
6370 && exp_size >= 0
6371 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6373 tree type = TREE_TYPE (value);
6375 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6377 type = lang_hooks.types.type_for_mode
6378 (word_mode, TYPE_UNSIGNED (type));
6379 value = fold_convert (type, value);
6380 /* Make sure the bits beyond the original bitsize are zero
6381 so that we can correctly avoid extra zeroing stores in
6382 later constructor elements. */
6383 tree bitsize_mask
6384 = wide_int_to_tree (type, wi::mask (bitsize, false,
6385 BITS_PER_WORD));
6386 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
6389 if (BYTES_BIG_ENDIAN)
6390 value
6391 = fold_build2 (LSHIFT_EXPR, type, value,
6392 build_int_cst (type,
6393 BITS_PER_WORD - bitsize));
6394 bitsize = BITS_PER_WORD;
6395 mode = word_mode;
6398 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6399 && DECL_NONADDRESSABLE_P (field))
6401 to_rtx = copy_rtx (to_rtx);
6402 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6405 store_constructor_field (to_rtx, bitsize, bitpos,
6406 0, bitregion_end, mode,
6407 value, cleared,
6408 get_alias_set (TREE_TYPE (field)),
6409 reverse);
6411 break;
6413 case ARRAY_TYPE:
6415 tree value, index;
6416 unsigned HOST_WIDE_INT i;
6417 int need_to_clear;
6418 tree domain;
6419 tree elttype = TREE_TYPE (type);
6420 int const_bounds_p;
6421 HOST_WIDE_INT minelt = 0;
6422 HOST_WIDE_INT maxelt = 0;
6424 /* The storage order is specified for every aggregate type. */
6425 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6427 domain = TYPE_DOMAIN (type);
6428 const_bounds_p = (TYPE_MIN_VALUE (domain)
6429 && TYPE_MAX_VALUE (domain)
6430 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6431 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6433 /* If we have constant bounds for the range of the type, get them. */
6434 if (const_bounds_p)
6436 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6437 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6440 /* If the constructor has fewer elements than the array, clear
6441 the whole array first. Similarly if this is static
6442 constructor of a non-BLKmode object. */
6443 if (cleared)
6444 need_to_clear = 0;
6445 else if (REG_P (target) && TREE_STATIC (exp))
6446 need_to_clear = 1;
6447 else
6449 unsigned HOST_WIDE_INT idx;
6450 tree index, value;
6451 HOST_WIDE_INT count = 0, zero_count = 0;
6452 need_to_clear = ! const_bounds_p;
6454 /* This loop is a more accurate version of the loop in
6455 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6456 is also needed to check for missing elements. */
6457 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6459 HOST_WIDE_INT this_node_count;
6461 if (need_to_clear)
6462 break;
6464 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6466 tree lo_index = TREE_OPERAND (index, 0);
6467 tree hi_index = TREE_OPERAND (index, 1);
6469 if (! tree_fits_uhwi_p (lo_index)
6470 || ! tree_fits_uhwi_p (hi_index))
6472 need_to_clear = 1;
6473 break;
6476 this_node_count = (tree_to_uhwi (hi_index)
6477 - tree_to_uhwi (lo_index) + 1);
6479 else
6480 this_node_count = 1;
6482 count += this_node_count;
6483 if (mostly_zeros_p (value))
6484 zero_count += this_node_count;
6487 /* Clear the entire array first if there are any missing
6488 elements, or if the incidence of zero elements is >=
6489 75%. */
6490 if (! need_to_clear
6491 && (count < maxelt - minelt + 1
6492 || 4 * zero_count >= 3 * count))
6493 need_to_clear = 1;
6496 if (need_to_clear && maybe_gt (size, 0))
6498 if (REG_P (target))
6499 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6500 else
6501 clear_storage (target, gen_int_mode (size, Pmode),
6502 BLOCK_OP_NORMAL);
6503 cleared = 1;
6506 if (!cleared && REG_P (target))
6507 /* Inform later passes that the old value is dead. */
6508 emit_clobber (target);
6510 /* Store each element of the constructor into the
6511 corresponding element of TARGET, determined by counting the
6512 elements. */
6513 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6515 machine_mode mode;
6516 poly_int64 bitsize;
6517 HOST_WIDE_INT bitpos;
6518 rtx xtarget = target;
6520 if (cleared && initializer_zerop (value))
6521 continue;
6523 mode = TYPE_MODE (elttype);
6524 if (mode != BLKmode)
6525 bitsize = GET_MODE_BITSIZE (mode);
6526 else if (!poly_int_tree_p (TYPE_SIZE (elttype), &bitsize))
6527 bitsize = -1;
6529 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6531 tree lo_index = TREE_OPERAND (index, 0);
6532 tree hi_index = TREE_OPERAND (index, 1);
6533 rtx index_r, pos_rtx;
6534 HOST_WIDE_INT lo, hi, count;
6535 tree position;
6537 /* If the range is constant and "small", unroll the loop. */
6538 if (const_bounds_p
6539 && tree_fits_shwi_p (lo_index)
6540 && tree_fits_shwi_p (hi_index)
6541 && (lo = tree_to_shwi (lo_index),
6542 hi = tree_to_shwi (hi_index),
6543 count = hi - lo + 1,
6544 (!MEM_P (target)
6545 || count <= 2
6546 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6547 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6548 <= 40 * 8)))))
6550 lo -= minelt; hi -= minelt;
6551 for (; lo <= hi; lo++)
6553 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6555 if (MEM_P (target)
6556 && !MEM_KEEP_ALIAS_SET_P (target)
6557 && TREE_CODE (type) == ARRAY_TYPE
6558 && TYPE_NONALIASED_COMPONENT (type))
6560 target = copy_rtx (target);
6561 MEM_KEEP_ALIAS_SET_P (target) = 1;
6564 store_constructor_field
6565 (target, bitsize, bitpos, 0, bitregion_end,
6566 mode, value, cleared,
6567 get_alias_set (elttype), reverse);
6570 else
6572 rtx_code_label *loop_start = gen_label_rtx ();
6573 rtx_code_label *loop_end = gen_label_rtx ();
6574 tree exit_cond;
6576 expand_normal (hi_index);
6578 index = build_decl (EXPR_LOCATION (exp),
6579 VAR_DECL, NULL_TREE, domain);
6580 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6581 SET_DECL_RTL (index, index_r);
6582 store_expr (lo_index, index_r, 0, false, reverse);
6584 /* Build the head of the loop. */
6585 do_pending_stack_adjust ();
6586 emit_label (loop_start);
6588 /* Assign value to element index. */
6589 position =
6590 fold_convert (ssizetype,
6591 fold_build2 (MINUS_EXPR,
6592 TREE_TYPE (index),
6593 index,
6594 TYPE_MIN_VALUE (domain)));
6596 position =
6597 size_binop (MULT_EXPR, position,
6598 fold_convert (ssizetype,
6599 TYPE_SIZE_UNIT (elttype)));
6601 pos_rtx = expand_normal (position);
6602 xtarget = offset_address (target, pos_rtx,
6603 highest_pow2_factor (position));
6604 xtarget = adjust_address (xtarget, mode, 0);
6605 if (TREE_CODE (value) == CONSTRUCTOR)
6606 store_constructor (value, xtarget, cleared,
6607 exact_div (bitsize, BITS_PER_UNIT),
6608 reverse);
6609 else
6610 store_expr (value, xtarget, 0, false, reverse);
6612 /* Generate a conditional jump to exit the loop. */
6613 exit_cond = build2 (LT_EXPR, integer_type_node,
6614 index, hi_index);
6615 jumpif (exit_cond, loop_end,
6616 profile_probability::uninitialized ());
6618 /* Update the loop counter, and jump to the head of
6619 the loop. */
6620 expand_assignment (index,
6621 build2 (PLUS_EXPR, TREE_TYPE (index),
6622 index, integer_one_node),
6623 false);
6625 emit_jump (loop_start);
6627 /* Build the end of the loop. */
6628 emit_label (loop_end);
6631 else if ((index != 0 && ! tree_fits_shwi_p (index))
6632 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6634 tree position;
6636 if (index == 0)
6637 index = ssize_int (1);
6639 if (minelt)
6640 index = fold_convert (ssizetype,
6641 fold_build2 (MINUS_EXPR,
6642 TREE_TYPE (index),
6643 index,
6644 TYPE_MIN_VALUE (domain)));
6646 position =
6647 size_binop (MULT_EXPR, index,
6648 fold_convert (ssizetype,
6649 TYPE_SIZE_UNIT (elttype)));
6650 xtarget = offset_address (target,
6651 expand_normal (position),
6652 highest_pow2_factor (position));
6653 xtarget = adjust_address (xtarget, mode, 0);
6654 store_expr (value, xtarget, 0, false, reverse);
6656 else
6658 if (index != 0)
6659 bitpos = ((tree_to_shwi (index) - minelt)
6660 * tree_to_uhwi (TYPE_SIZE (elttype)));
6661 else
6662 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6664 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6665 && TREE_CODE (type) == ARRAY_TYPE
6666 && TYPE_NONALIASED_COMPONENT (type))
6668 target = copy_rtx (target);
6669 MEM_KEEP_ALIAS_SET_P (target) = 1;
6671 store_constructor_field (target, bitsize, bitpos, 0,
6672 bitregion_end, mode, value,
6673 cleared, get_alias_set (elttype),
6674 reverse);
6677 break;
6680 case VECTOR_TYPE:
6682 unsigned HOST_WIDE_INT idx;
6683 constructor_elt *ce;
6684 int i;
6685 int need_to_clear;
6686 insn_code icode = CODE_FOR_nothing;
6687 tree elt;
6688 tree elttype = TREE_TYPE (type);
6689 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6690 machine_mode eltmode = TYPE_MODE (elttype);
6691 HOST_WIDE_INT bitsize;
6692 HOST_WIDE_INT bitpos;
6693 rtvec vector = NULL;
6694 poly_uint64 n_elts;
6695 unsigned HOST_WIDE_INT const_n_elts;
6696 alias_set_type alias;
6697 bool vec_vec_init_p = false;
6698 machine_mode mode = GET_MODE (target);
6700 gcc_assert (eltmode != BLKmode);
6702 /* Try using vec_duplicate_optab for uniform vectors. */
6703 if (!TREE_SIDE_EFFECTS (exp)
6704 && VECTOR_MODE_P (mode)
6705 && eltmode == GET_MODE_INNER (mode)
6706 && ((icode = optab_handler (vec_duplicate_optab, mode))
6707 != CODE_FOR_nothing)
6708 && (elt = uniform_vector_p (exp)))
6710 struct expand_operand ops[2];
6711 create_output_operand (&ops[0], target, mode);
6712 create_input_operand (&ops[1], expand_normal (elt), eltmode);
6713 expand_insn (icode, 2, ops);
6714 if (!rtx_equal_p (target, ops[0].value))
6715 emit_move_insn (target, ops[0].value);
6716 break;
6719 n_elts = TYPE_VECTOR_SUBPARTS (type);
6720 if (REG_P (target)
6721 && VECTOR_MODE_P (mode)
6722 && n_elts.is_constant (&const_n_elts))
6724 machine_mode emode = eltmode;
6726 if (CONSTRUCTOR_NELTS (exp)
6727 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value))
6728 == VECTOR_TYPE))
6730 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value);
6731 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp)
6732 * TYPE_VECTOR_SUBPARTS (etype),
6733 n_elts));
6734 emode = TYPE_MODE (etype);
6736 icode = convert_optab_handler (vec_init_optab, mode, emode);
6737 if (icode != CODE_FOR_nothing)
6739 unsigned int i, n = const_n_elts;
6741 if (emode != eltmode)
6743 n = CONSTRUCTOR_NELTS (exp);
6744 vec_vec_init_p = true;
6746 vector = rtvec_alloc (n);
6747 for (i = 0; i < n; i++)
6748 RTVEC_ELT (vector, i) = CONST0_RTX (emode);
6752 /* If the constructor has fewer elements than the vector,
6753 clear the whole array first. Similarly if this is static
6754 constructor of a non-BLKmode object. */
6755 if (cleared)
6756 need_to_clear = 0;
6757 else if (REG_P (target) && TREE_STATIC (exp))
6758 need_to_clear = 1;
6759 else
6761 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6762 tree value;
6764 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6766 tree sz = TYPE_SIZE (TREE_TYPE (value));
6767 int n_elts_here
6768 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz,
6769 TYPE_SIZE (elttype)));
6771 count += n_elts_here;
6772 if (mostly_zeros_p (value))
6773 zero_count += n_elts_here;
6776 /* Clear the entire vector first if there are any missing elements,
6777 or if the incidence of zero elements is >= 75%. */
6778 need_to_clear = (maybe_lt (count, n_elts)
6779 || 4 * zero_count >= 3 * count);
6782 if (need_to_clear && maybe_gt (size, 0) && !vector)
6784 if (REG_P (target))
6785 emit_move_insn (target, CONST0_RTX (mode));
6786 else
6787 clear_storage (target, gen_int_mode (size, Pmode),
6788 BLOCK_OP_NORMAL);
6789 cleared = 1;
6792 /* Inform later passes that the old value is dead. */
6793 if (!cleared && !vector && REG_P (target))
6794 emit_move_insn (target, CONST0_RTX (mode));
6796 if (MEM_P (target))
6797 alias = MEM_ALIAS_SET (target);
6798 else
6799 alias = get_alias_set (elttype);
6801 /* Store each element of the constructor into the corresponding
6802 element of TARGET, determined by counting the elements. */
6803 for (idx = 0, i = 0;
6804 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6805 idx++, i += bitsize / elt_size)
6807 HOST_WIDE_INT eltpos;
6808 tree value = ce->value;
6810 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6811 if (cleared && initializer_zerop (value))
6812 continue;
6814 if (ce->index)
6815 eltpos = tree_to_uhwi (ce->index);
6816 else
6817 eltpos = i;
6819 if (vector)
6821 if (vec_vec_init_p)
6823 gcc_assert (ce->index == NULL_TREE);
6824 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE);
6825 eltpos = idx;
6827 else
6828 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6829 RTVEC_ELT (vector, eltpos) = expand_normal (value);
6831 else
6833 machine_mode value_mode
6834 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6835 ? TYPE_MODE (TREE_TYPE (value)) : eltmode);
6836 bitpos = eltpos * elt_size;
6837 store_constructor_field (target, bitsize, bitpos, 0,
6838 bitregion_end, value_mode,
6839 value, cleared, alias, reverse);
6843 if (vector)
6844 emit_insn (GEN_FCN (icode) (target,
6845 gen_rtx_PARALLEL (mode, vector)));
6846 break;
6849 default:
6850 gcc_unreachable ();
6854 /* Store the value of EXP (an expression tree)
6855 into a subfield of TARGET which has mode MODE and occupies
6856 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6857 If MODE is VOIDmode, it means that we are storing into a bit-field.
6859 BITREGION_START is bitpos of the first bitfield in this region.
6860 BITREGION_END is the bitpos of the ending bitfield in this region.
6861 These two fields are 0, if the C++ memory model does not apply,
6862 or we are not interested in keeping track of bitfield regions.
6864 Always return const0_rtx unless we have something particular to
6865 return.
6867 ALIAS_SET is the alias set for the destination. This value will
6868 (in general) be different from that for TARGET, since TARGET is a
6869 reference to the containing structure.
6871 If NONTEMPORAL is true, try generating a nontemporal store.
6873 If REVERSE is true, the store is to be done in reverse order. */
6875 static rtx
6876 store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos,
6877 poly_uint64 bitregion_start, poly_uint64 bitregion_end,
6878 machine_mode mode, tree exp,
6879 alias_set_type alias_set, bool nontemporal, bool reverse)
6881 if (TREE_CODE (exp) == ERROR_MARK)
6882 return const0_rtx;
6884 /* If we have nothing to store, do nothing unless the expression has
6885 side-effects. Don't do that for zero sized addressable lhs of
6886 calls. */
6887 if (known_eq (bitsize, 0)
6888 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6889 || TREE_CODE (exp) != CALL_EXPR))
6890 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6892 if (GET_CODE (target) == CONCAT)
6894 /* We're storing into a struct containing a single __complex. */
6896 gcc_assert (known_eq (bitpos, 0));
6897 return store_expr (exp, target, 0, nontemporal, reverse);
6900 /* If the structure is in a register or if the component
6901 is a bit field, we cannot use addressing to access it.
6902 Use bit-field techniques or SUBREG to store in it. */
6904 poly_int64 decl_bitsize;
6905 if (mode == VOIDmode
6906 || (mode != BLKmode && ! direct_store[(int) mode]
6907 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6908 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6909 || REG_P (target)
6910 || GET_CODE (target) == SUBREG
6911 /* If the field isn't aligned enough to store as an ordinary memref,
6912 store it as a bit field. */
6913 || (mode != BLKmode
6914 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6915 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
6916 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target)))
6917 || !multiple_p (bitpos, BITS_PER_UNIT)))
6918 || (known_size_p (bitsize)
6919 && mode != BLKmode
6920 && maybe_gt (GET_MODE_BITSIZE (mode), bitsize))
6921 /* If the RHS and field are a constant size and the size of the
6922 RHS isn't the same size as the bitfield, we must use bitfield
6923 operations. */
6924 || (known_size_p (bitsize)
6925 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
6926 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
6927 bitsize)
6928 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6929 we will handle specially below. */
6930 && !(TREE_CODE (exp) == CONSTRUCTOR
6931 && multiple_p (bitsize, BITS_PER_UNIT))
6932 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6933 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6934 includes some extra padding. store_expr / expand_expr will in
6935 that case call get_inner_reference that will have the bitsize
6936 we check here and thus the block move will not clobber the
6937 padding that shouldn't be clobbered. In the future we could
6938 replace the TREE_ADDRESSABLE check with a check that
6939 get_base_address needs to live in memory. */
6940 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6941 || TREE_CODE (exp) != COMPONENT_REF
6942 || !multiple_p (bitsize, BITS_PER_UNIT)
6943 || !multiple_p (bitpos, BITS_PER_UNIT)
6944 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)),
6945 &decl_bitsize)
6946 || maybe_ne (decl_bitsize, bitsize)))
6947 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6948 decl we must use bitfield operations. */
6949 || (known_size_p (bitsize)
6950 && TREE_CODE (exp) == MEM_REF
6951 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6952 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6953 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6954 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6956 rtx temp;
6957 gimple *nop_def;
6959 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6960 implies a mask operation. If the precision is the same size as
6961 the field we're storing into, that mask is redundant. This is
6962 particularly common with bit field assignments generated by the
6963 C front end. */
6964 nop_def = get_def_for_expr (exp, NOP_EXPR);
6965 if (nop_def)
6967 tree type = TREE_TYPE (exp);
6968 if (INTEGRAL_TYPE_P (type)
6969 && maybe_ne (TYPE_PRECISION (type),
6970 GET_MODE_BITSIZE (TYPE_MODE (type)))
6971 && known_eq (bitsize, TYPE_PRECISION (type)))
6973 tree op = gimple_assign_rhs1 (nop_def);
6974 type = TREE_TYPE (op);
6975 if (INTEGRAL_TYPE_P (type)
6976 && known_ge (TYPE_PRECISION (type), bitsize))
6977 exp = op;
6981 temp = expand_normal (exp);
6983 /* We don't support variable-sized BLKmode bitfields, since our
6984 handling of BLKmode is bound up with the ability to break
6985 things into words. */
6986 gcc_assert (mode != BLKmode || bitsize.is_constant ());
6988 /* Handle calls that return values in multiple non-contiguous locations.
6989 The Irix 6 ABI has examples of this. */
6990 if (GET_CODE (temp) == PARALLEL)
6992 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6993 machine_mode temp_mode = GET_MODE (temp);
6994 if (temp_mode == BLKmode || temp_mode == VOIDmode)
6995 temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
6996 rtx temp_target = gen_reg_rtx (temp_mode);
6997 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6998 temp = temp_target;
7001 /* Handle calls that return BLKmode values in registers. */
7002 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
7004 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
7005 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
7006 temp = temp_target;
7009 /* If the value has aggregate type and an integral mode then, if BITSIZE
7010 is narrower than this mode and this is for big-endian data, we first
7011 need to put the value into the low-order bits for store_bit_field,
7012 except when MODE is BLKmode and BITSIZE larger than the word size
7013 (see the handling of fields larger than a word in store_bit_field).
7014 Moreover, the field may be not aligned on a byte boundary; in this
7015 case, if it has reverse storage order, it needs to be accessed as a
7016 scalar field with reverse storage order and we must first put the
7017 value into target order. */
7018 scalar_int_mode temp_mode;
7019 if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
7020 && is_int_mode (GET_MODE (temp), &temp_mode))
7022 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode);
7024 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));
7026 if (reverse)
7027 temp = flip_storage_order (temp_mode, temp);
7029 gcc_checking_assert (known_le (bitsize, size));
7030 if (maybe_lt (bitsize, size)
7031 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
7032 /* Use of to_constant for BLKmode was checked above. */
7033 && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD))
7034 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp,
7035 size - bitsize, NULL_RTX, 1);
7038 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7039 if (mode != VOIDmode && mode != BLKmode
7040 && mode != TYPE_MODE (TREE_TYPE (exp)))
7041 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
7043 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7044 and BITPOS must be aligned on a byte boundary. If so, we simply do
7045 a block copy. Likewise for a BLKmode-like TARGET. */
7046 if (GET_MODE (temp) == BLKmode
7047 && (GET_MODE (target) == BLKmode
7048 || (MEM_P (target)
7049 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
7050 && multiple_p (bitpos, BITS_PER_UNIT)
7051 && multiple_p (bitsize, BITS_PER_UNIT))))
7053 gcc_assert (MEM_P (target) && MEM_P (temp));
7054 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
7055 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
7057 target = adjust_address (target, VOIDmode, bytepos);
7058 emit_block_move (target, temp,
7059 gen_int_mode (bytesize, Pmode),
7060 BLOCK_OP_NORMAL);
7062 return const0_rtx;
7065 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7066 word size, we need to load the value (see again store_bit_field). */
7067 if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD))
7069 scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize);
7070 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
7071 temp_mode, false, NULL);
7074 /* Store the value in the bitfield. */
7075 store_bit_field (target, bitsize, bitpos,
7076 bitregion_start, bitregion_end,
7077 mode, temp, reverse);
7079 return const0_rtx;
7081 else
7083 /* Now build a reference to just the desired component. */
7084 rtx to_rtx = adjust_address (target, mode,
7085 exact_div (bitpos, BITS_PER_UNIT));
7087 if (to_rtx == target)
7088 to_rtx = copy_rtx (to_rtx);
7090 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
7091 set_mem_alias_set (to_rtx, alias_set);
7093 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7094 into a target smaller than its type; handle that case now. */
7095 if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (bitsize))
7097 poly_int64 bytesize = exact_div (bitsize, BITS_PER_UNIT);
7098 store_constructor (exp, to_rtx, 0, bytesize, reverse);
7099 return to_rtx;
7102 return store_expr (exp, to_rtx, 0, nontemporal, reverse);
7106 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7107 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7108 codes and find the ultimate containing object, which we return.
7110 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7111 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7112 storage order of the field.
7113 If the position of the field is variable, we store a tree
7114 giving the variable offset (in units) in *POFFSET.
7115 This offset is in addition to the bit position.
7116 If the position is not variable, we store 0 in *POFFSET.
7118 If any of the extraction expressions is volatile,
7119 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7121 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7122 Otherwise, it is a mode that can be used to access the field.
7124 If the field describes a variable-sized object, *PMODE is set to
7125 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7126 this case, but the address of the object can be found. */
7128 tree
7129 get_inner_reference (tree exp, poly_int64_pod *pbitsize,
7130 poly_int64_pod *pbitpos, tree *poffset,
7131 machine_mode *pmode, int *punsignedp,
7132 int *preversep, int *pvolatilep)
7134 tree size_tree = 0;
7135 machine_mode mode = VOIDmode;
7136 bool blkmode_bitfield = false;
7137 tree offset = size_zero_node;
7138 poly_offset_int bit_offset = 0;
7140 /* First get the mode, signedness, storage order and size. We do this from
7141 just the outermost expression. */
7142 *pbitsize = -1;
7143 if (TREE_CODE (exp) == COMPONENT_REF)
7145 tree field = TREE_OPERAND (exp, 1);
7146 size_tree = DECL_SIZE (field);
7147 if (flag_strict_volatile_bitfields > 0
7148 && TREE_THIS_VOLATILE (exp)
7149 && DECL_BIT_FIELD_TYPE (field)
7150 && DECL_MODE (field) != BLKmode)
7151 /* Volatile bitfields should be accessed in the mode of the
7152 field's type, not the mode computed based on the bit
7153 size. */
7154 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
7155 else if (!DECL_BIT_FIELD (field))
7157 mode = DECL_MODE (field);
7158 /* For vector fields re-check the target flags, as DECL_MODE
7159 could have been set with different target flags than
7160 the current function has. */
7161 if (mode == BLKmode
7162 && VECTOR_TYPE_P (TREE_TYPE (field))
7163 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field))))
7164 mode = TYPE_MODE (TREE_TYPE (field));
7166 else if (DECL_MODE (field) == BLKmode)
7167 blkmode_bitfield = true;
7169 *punsignedp = DECL_UNSIGNED (field);
7171 else if (TREE_CODE (exp) == BIT_FIELD_REF)
7173 size_tree = TREE_OPERAND (exp, 1);
7174 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
7175 || TYPE_UNSIGNED (TREE_TYPE (exp)));
7177 /* For vector types, with the correct size of access, use the mode of
7178 inner type. */
7179 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
7180 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
7181 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
7182 mode = TYPE_MODE (TREE_TYPE (exp));
7184 else
7186 mode = TYPE_MODE (TREE_TYPE (exp));
7187 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
7189 if (mode == BLKmode)
7190 size_tree = TYPE_SIZE (TREE_TYPE (exp));
7191 else
7192 *pbitsize = GET_MODE_BITSIZE (mode);
7195 if (size_tree != 0)
7197 if (! tree_fits_uhwi_p (size_tree))
7198 mode = BLKmode, *pbitsize = -1;
7199 else
7200 *pbitsize = tree_to_uhwi (size_tree);
7203 *preversep = reverse_storage_order_for_component_p (exp);
7205 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7206 and find the ultimate containing object. */
7207 while (1)
7209 switch (TREE_CODE (exp))
7211 case BIT_FIELD_REF:
7212 bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2));
7213 break;
7215 case COMPONENT_REF:
7217 tree field = TREE_OPERAND (exp, 1);
7218 tree this_offset = component_ref_field_offset (exp);
7220 /* If this field hasn't been filled in yet, don't go past it.
7221 This should only happen when folding expressions made during
7222 type construction. */
7223 if (this_offset == 0)
7224 break;
7226 offset = size_binop (PLUS_EXPR, offset, this_offset);
7227 bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field));
7229 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7231 break;
7233 case ARRAY_REF:
7234 case ARRAY_RANGE_REF:
7236 tree index = TREE_OPERAND (exp, 1);
7237 tree low_bound = array_ref_low_bound (exp);
7238 tree unit_size = array_ref_element_size (exp);
7240 /* We assume all arrays have sizes that are a multiple of a byte.
7241 First subtract the lower bound, if any, in the type of the
7242 index, then convert to sizetype and multiply by the size of
7243 the array element. */
7244 if (! integer_zerop (low_bound))
7245 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
7246 index, low_bound);
7248 offset = size_binop (PLUS_EXPR, offset,
7249 size_binop (MULT_EXPR,
7250 fold_convert (sizetype, index),
7251 unit_size));
7253 break;
7255 case REALPART_EXPR:
7256 break;
7258 case IMAGPART_EXPR:
7259 bit_offset += *pbitsize;
7260 break;
7262 case VIEW_CONVERT_EXPR:
7263 break;
7265 case MEM_REF:
7266 /* Hand back the decl for MEM[&decl, off]. */
7267 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
7269 tree off = TREE_OPERAND (exp, 1);
7270 if (!integer_zerop (off))
7272 poly_offset_int boff = mem_ref_offset (exp);
7273 boff <<= LOG2_BITS_PER_UNIT;
7274 bit_offset += boff;
7276 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7278 goto done;
7280 default:
7281 goto done;
7284 /* If any reference in the chain is volatile, the effect is volatile. */
7285 if (TREE_THIS_VOLATILE (exp))
7286 *pvolatilep = 1;
7288 exp = TREE_OPERAND (exp, 0);
7290 done:
7292 /* If OFFSET is constant, see if we can return the whole thing as a
7293 constant bit position. Make sure to handle overflow during
7294 this conversion. */
7295 if (poly_int_tree_p (offset))
7297 poly_offset_int tem = wi::sext (wi::to_poly_offset (offset),
7298 TYPE_PRECISION (sizetype));
7299 tem <<= LOG2_BITS_PER_UNIT;
7300 tem += bit_offset;
7301 if (tem.to_shwi (pbitpos))
7302 *poffset = offset = NULL_TREE;
7305 /* Otherwise, split it up. */
7306 if (offset)
7308 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7309 if (!bit_offset.to_shwi (pbitpos) || maybe_lt (*pbitpos, 0))
7311 *pbitpos = num_trailing_bits (bit_offset.force_shwi ());
7312 poly_offset_int bytes = bits_to_bytes_round_down (bit_offset);
7313 offset = size_binop (PLUS_EXPR, offset,
7314 build_int_cst (sizetype, bytes.force_shwi ()));
7317 *poffset = offset;
7320 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7321 if (mode == VOIDmode
7322 && blkmode_bitfield
7323 && multiple_p (*pbitpos, BITS_PER_UNIT)
7324 && multiple_p (*pbitsize, BITS_PER_UNIT))
7325 *pmode = BLKmode;
7326 else
7327 *pmode = mode;
7329 return exp;
7332 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7334 static unsigned HOST_WIDE_INT
7335 target_align (const_tree target)
7337 /* We might have a chain of nested references with intermediate misaligning
7338 bitfields components, so need to recurse to find out. */
7340 unsigned HOST_WIDE_INT this_align, outer_align;
7342 switch (TREE_CODE (target))
7344 case BIT_FIELD_REF:
7345 return 1;
7347 case COMPONENT_REF:
7348 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7349 outer_align = target_align (TREE_OPERAND (target, 0));
7350 return MIN (this_align, outer_align);
7352 case ARRAY_REF:
7353 case ARRAY_RANGE_REF:
7354 this_align = TYPE_ALIGN (TREE_TYPE (target));
7355 outer_align = target_align (TREE_OPERAND (target, 0));
7356 return MIN (this_align, outer_align);
7358 CASE_CONVERT:
7359 case NON_LVALUE_EXPR:
7360 case VIEW_CONVERT_EXPR:
7361 this_align = TYPE_ALIGN (TREE_TYPE (target));
7362 outer_align = target_align (TREE_OPERAND (target, 0));
7363 return MAX (this_align, outer_align);
7365 default:
7366 return TYPE_ALIGN (TREE_TYPE (target));
7371 /* Given an rtx VALUE that may contain additions and multiplications, return
7372 an equivalent value that just refers to a register, memory, or constant.
7373 This is done by generating instructions to perform the arithmetic and
7374 returning a pseudo-register containing the value.
7376 The returned value may be a REG, SUBREG, MEM or constant. */
7379 force_operand (rtx value, rtx target)
7381 rtx op1, op2;
7382 /* Use subtarget as the target for operand 0 of a binary operation. */
7383 rtx subtarget = get_subtarget (target);
7384 enum rtx_code code = GET_CODE (value);
7386 /* Check for subreg applied to an expression produced by loop optimizer. */
7387 if (code == SUBREG
7388 && !REG_P (SUBREG_REG (value))
7389 && !MEM_P (SUBREG_REG (value)))
7391 value
7392 = simplify_gen_subreg (GET_MODE (value),
7393 force_reg (GET_MODE (SUBREG_REG (value)),
7394 force_operand (SUBREG_REG (value),
7395 NULL_RTX)),
7396 GET_MODE (SUBREG_REG (value)),
7397 SUBREG_BYTE (value));
7398 code = GET_CODE (value);
7401 /* Check for a PIC address load. */
7402 if ((code == PLUS || code == MINUS)
7403 && XEXP (value, 0) == pic_offset_table_rtx
7404 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7405 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7406 || GET_CODE (XEXP (value, 1)) == CONST))
7408 if (!subtarget)
7409 subtarget = gen_reg_rtx (GET_MODE (value));
7410 emit_move_insn (subtarget, value);
7411 return subtarget;
7414 if (ARITHMETIC_P (value))
7416 op2 = XEXP (value, 1);
7417 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7418 subtarget = 0;
7419 if (code == MINUS && CONST_INT_P (op2))
7421 code = PLUS;
7422 op2 = negate_rtx (GET_MODE (value), op2);
7425 /* Check for an addition with OP2 a constant integer and our first
7426 operand a PLUS of a virtual register and something else. In that
7427 case, we want to emit the sum of the virtual register and the
7428 constant first and then add the other value. This allows virtual
7429 register instantiation to simply modify the constant rather than
7430 creating another one around this addition. */
7431 if (code == PLUS && CONST_INT_P (op2)
7432 && GET_CODE (XEXP (value, 0)) == PLUS
7433 && REG_P (XEXP (XEXP (value, 0), 0))
7434 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7435 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7437 rtx temp = expand_simple_binop (GET_MODE (value), code,
7438 XEXP (XEXP (value, 0), 0), op2,
7439 subtarget, 0, OPTAB_LIB_WIDEN);
7440 return expand_simple_binop (GET_MODE (value), code, temp,
7441 force_operand (XEXP (XEXP (value,
7442 0), 1), 0),
7443 target, 0, OPTAB_LIB_WIDEN);
7446 op1 = force_operand (XEXP (value, 0), subtarget);
7447 op2 = force_operand (op2, NULL_RTX);
7448 switch (code)
7450 case MULT:
7451 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7452 case DIV:
7453 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7454 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7455 target, 1, OPTAB_LIB_WIDEN);
7456 else
7457 return expand_divmod (0,
7458 FLOAT_MODE_P (GET_MODE (value))
7459 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7460 GET_MODE (value), op1, op2, target, 0);
7461 case MOD:
7462 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7463 target, 0);
7464 case UDIV:
7465 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7466 target, 1);
7467 case UMOD:
7468 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7469 target, 1);
7470 case ASHIFTRT:
7471 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7472 target, 0, OPTAB_LIB_WIDEN);
7473 default:
7474 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7475 target, 1, OPTAB_LIB_WIDEN);
7478 if (UNARY_P (value))
7480 if (!target)
7481 target = gen_reg_rtx (GET_MODE (value));
7482 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7483 switch (code)
7485 case ZERO_EXTEND:
7486 case SIGN_EXTEND:
7487 case TRUNCATE:
7488 case FLOAT_EXTEND:
7489 case FLOAT_TRUNCATE:
7490 convert_move (target, op1, code == ZERO_EXTEND);
7491 return target;
7493 case FIX:
7494 case UNSIGNED_FIX:
7495 expand_fix (target, op1, code == UNSIGNED_FIX);
7496 return target;
7498 case FLOAT:
7499 case UNSIGNED_FLOAT:
7500 expand_float (target, op1, code == UNSIGNED_FLOAT);
7501 return target;
7503 default:
7504 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7508 #ifdef INSN_SCHEDULING
7509 /* On machines that have insn scheduling, we want all memory reference to be
7510 explicit, so we need to deal with such paradoxical SUBREGs. */
7511 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7512 value
7513 = simplify_gen_subreg (GET_MODE (value),
7514 force_reg (GET_MODE (SUBREG_REG (value)),
7515 force_operand (SUBREG_REG (value),
7516 NULL_RTX)),
7517 GET_MODE (SUBREG_REG (value)),
7518 SUBREG_BYTE (value));
7519 #endif
7521 return value;
7524 /* Subroutine of expand_expr: return nonzero iff there is no way that
7525 EXP can reference X, which is being modified. TOP_P is nonzero if this
7526 call is going to be used to determine whether we need a temporary
7527 for EXP, as opposed to a recursive call to this function.
7529 It is always safe for this routine to return zero since it merely
7530 searches for optimization opportunities. */
7533 safe_from_p (const_rtx x, tree exp, int top_p)
7535 rtx exp_rtl = 0;
7536 int i, nops;
7538 if (x == 0
7539 /* If EXP has varying size, we MUST use a target since we currently
7540 have no way of allocating temporaries of variable size
7541 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7542 So we assume here that something at a higher level has prevented a
7543 clash. This is somewhat bogus, but the best we can do. Only
7544 do this when X is BLKmode and when we are at the top level. */
7545 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7546 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7547 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7548 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7549 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7550 != INTEGER_CST)
7551 && GET_MODE (x) == BLKmode)
7552 /* If X is in the outgoing argument area, it is always safe. */
7553 || (MEM_P (x)
7554 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7555 || (GET_CODE (XEXP (x, 0)) == PLUS
7556 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7557 return 1;
7559 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7560 find the underlying pseudo. */
7561 if (GET_CODE (x) == SUBREG)
7563 x = SUBREG_REG (x);
7564 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7565 return 0;
7568 /* Now look at our tree code and possibly recurse. */
7569 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7571 case tcc_declaration:
7572 exp_rtl = DECL_RTL_IF_SET (exp);
7573 break;
7575 case tcc_constant:
7576 return 1;
7578 case tcc_exceptional:
7579 if (TREE_CODE (exp) == TREE_LIST)
7581 while (1)
7583 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7584 return 0;
7585 exp = TREE_CHAIN (exp);
7586 if (!exp)
7587 return 1;
7588 if (TREE_CODE (exp) != TREE_LIST)
7589 return safe_from_p (x, exp, 0);
7592 else if (TREE_CODE (exp) == CONSTRUCTOR)
7594 constructor_elt *ce;
7595 unsigned HOST_WIDE_INT idx;
7597 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7598 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7599 || !safe_from_p (x, ce->value, 0))
7600 return 0;
7601 return 1;
7603 else if (TREE_CODE (exp) == ERROR_MARK)
7604 return 1; /* An already-visited SAVE_EXPR? */
7605 else
7606 return 0;
7608 case tcc_statement:
7609 /* The only case we look at here is the DECL_INITIAL inside a
7610 DECL_EXPR. */
7611 return (TREE_CODE (exp) != DECL_EXPR
7612 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7613 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7614 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7616 case tcc_binary:
7617 case tcc_comparison:
7618 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7619 return 0;
7620 /* Fall through. */
7622 case tcc_unary:
7623 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7625 case tcc_expression:
7626 case tcc_reference:
7627 case tcc_vl_exp:
7628 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7629 the expression. If it is set, we conflict iff we are that rtx or
7630 both are in memory. Otherwise, we check all operands of the
7631 expression recursively. */
7633 switch (TREE_CODE (exp))
7635 case ADDR_EXPR:
7636 /* If the operand is static or we are static, we can't conflict.
7637 Likewise if we don't conflict with the operand at all. */
7638 if (staticp (TREE_OPERAND (exp, 0))
7639 || TREE_STATIC (exp)
7640 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7641 return 1;
7643 /* Otherwise, the only way this can conflict is if we are taking
7644 the address of a DECL a that address if part of X, which is
7645 very rare. */
7646 exp = TREE_OPERAND (exp, 0);
7647 if (DECL_P (exp))
7649 if (!DECL_RTL_SET_P (exp)
7650 || !MEM_P (DECL_RTL (exp)))
7651 return 0;
7652 else
7653 exp_rtl = XEXP (DECL_RTL (exp), 0);
7655 break;
7657 case MEM_REF:
7658 if (MEM_P (x)
7659 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7660 get_alias_set (exp)))
7661 return 0;
7662 break;
7664 case CALL_EXPR:
7665 /* Assume that the call will clobber all hard registers and
7666 all of memory. */
7667 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7668 || MEM_P (x))
7669 return 0;
7670 break;
7672 case WITH_CLEANUP_EXPR:
7673 case CLEANUP_POINT_EXPR:
7674 /* Lowered by gimplify.c. */
7675 gcc_unreachable ();
7677 case SAVE_EXPR:
7678 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7680 default:
7681 break;
7684 /* If we have an rtx, we do not need to scan our operands. */
7685 if (exp_rtl)
7686 break;
7688 nops = TREE_OPERAND_LENGTH (exp);
7689 for (i = 0; i < nops; i++)
7690 if (TREE_OPERAND (exp, i) != 0
7691 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7692 return 0;
7694 break;
7696 case tcc_type:
7697 /* Should never get a type here. */
7698 gcc_unreachable ();
7701 /* If we have an rtl, find any enclosed object. Then see if we conflict
7702 with it. */
7703 if (exp_rtl)
7705 if (GET_CODE (exp_rtl) == SUBREG)
7707 exp_rtl = SUBREG_REG (exp_rtl);
7708 if (REG_P (exp_rtl)
7709 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7710 return 0;
7713 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7714 are memory and they conflict. */
7715 return ! (rtx_equal_p (x, exp_rtl)
7716 || (MEM_P (x) && MEM_P (exp_rtl)
7717 && true_dependence (exp_rtl, VOIDmode, x)));
7720 /* If we reach here, it is safe. */
7721 return 1;
7725 /* Return the highest power of two that EXP is known to be a multiple of.
7726 This is used in updating alignment of MEMs in array references. */
7728 unsigned HOST_WIDE_INT
7729 highest_pow2_factor (const_tree exp)
7731 unsigned HOST_WIDE_INT ret;
7732 int trailing_zeros = tree_ctz (exp);
7733 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7734 return BIGGEST_ALIGNMENT;
7735 ret = HOST_WIDE_INT_1U << trailing_zeros;
7736 if (ret > BIGGEST_ALIGNMENT)
7737 return BIGGEST_ALIGNMENT;
7738 return ret;
7741 /* Similar, except that the alignment requirements of TARGET are
7742 taken into account. Assume it is at least as aligned as its
7743 type, unless it is a COMPONENT_REF in which case the layout of
7744 the structure gives the alignment. */
7746 static unsigned HOST_WIDE_INT
7747 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7749 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7750 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7752 return MAX (factor, talign);
7755 /* Convert the tree comparison code TCODE to the rtl one where the
7756 signedness is UNSIGNEDP. */
7758 static enum rtx_code
7759 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7761 enum rtx_code code;
7762 switch (tcode)
7764 case EQ_EXPR:
7765 code = EQ;
7766 break;
7767 case NE_EXPR:
7768 code = NE;
7769 break;
7770 case LT_EXPR:
7771 code = unsignedp ? LTU : LT;
7772 break;
7773 case LE_EXPR:
7774 code = unsignedp ? LEU : LE;
7775 break;
7776 case GT_EXPR:
7777 code = unsignedp ? GTU : GT;
7778 break;
7779 case GE_EXPR:
7780 code = unsignedp ? GEU : GE;
7781 break;
7782 case UNORDERED_EXPR:
7783 code = UNORDERED;
7784 break;
7785 case ORDERED_EXPR:
7786 code = ORDERED;
7787 break;
7788 case UNLT_EXPR:
7789 code = UNLT;
7790 break;
7791 case UNLE_EXPR:
7792 code = UNLE;
7793 break;
7794 case UNGT_EXPR:
7795 code = UNGT;
7796 break;
7797 case UNGE_EXPR:
7798 code = UNGE;
7799 break;
7800 case UNEQ_EXPR:
7801 code = UNEQ;
7802 break;
7803 case LTGT_EXPR:
7804 code = LTGT;
7805 break;
7807 default:
7808 gcc_unreachable ();
7810 return code;
7813 /* Subroutine of expand_expr. Expand the two operands of a binary
7814 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7815 The value may be stored in TARGET if TARGET is nonzero. The
7816 MODIFIER argument is as documented by expand_expr. */
7818 void
7819 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7820 enum expand_modifier modifier)
7822 if (! safe_from_p (target, exp1, 1))
7823 target = 0;
7824 if (operand_equal_p (exp0, exp1, 0))
7826 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7827 *op1 = copy_rtx (*op0);
7829 else
7831 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7832 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7837 /* Return a MEM that contains constant EXP. DEFER is as for
7838 output_constant_def and MODIFIER is as for expand_expr. */
7840 static rtx
7841 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7843 rtx mem;
7845 mem = output_constant_def (exp, defer);
7846 if (modifier != EXPAND_INITIALIZER)
7847 mem = use_anchored_address (mem);
7848 return mem;
7851 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7852 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7854 static rtx
7855 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode,
7856 enum expand_modifier modifier, addr_space_t as)
7858 rtx result, subtarget;
7859 tree inner, offset;
7860 poly_int64 bitsize, bitpos;
7861 int unsignedp, reversep, volatilep = 0;
7862 machine_mode mode1;
7864 /* If we are taking the address of a constant and are at the top level,
7865 we have to use output_constant_def since we can't call force_const_mem
7866 at top level. */
7867 /* ??? This should be considered a front-end bug. We should not be
7868 generating ADDR_EXPR of something that isn't an LVALUE. The only
7869 exception here is STRING_CST. */
7870 if (CONSTANT_CLASS_P (exp))
7872 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7873 if (modifier < EXPAND_SUM)
7874 result = force_operand (result, target);
7875 return result;
7878 /* Everything must be something allowed by is_gimple_addressable. */
7879 switch (TREE_CODE (exp))
7881 case INDIRECT_REF:
7882 /* This case will happen via recursion for &a->b. */
7883 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7885 case MEM_REF:
7887 tree tem = TREE_OPERAND (exp, 0);
7888 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7889 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7890 return expand_expr (tem, target, tmode, modifier);
7893 case TARGET_MEM_REF:
7894 return addr_for_mem_ref (exp, as, true);
7896 case CONST_DECL:
7897 /* Expand the initializer like constants above. */
7898 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7899 0, modifier), 0);
7900 if (modifier < EXPAND_SUM)
7901 result = force_operand (result, target);
7902 return result;
7904 case REALPART_EXPR:
7905 /* The real part of the complex number is always first, therefore
7906 the address is the same as the address of the parent object. */
7907 offset = 0;
7908 bitpos = 0;
7909 inner = TREE_OPERAND (exp, 0);
7910 break;
7912 case IMAGPART_EXPR:
7913 /* The imaginary part of the complex number is always second.
7914 The expression is therefore always offset by the size of the
7915 scalar type. */
7916 offset = 0;
7917 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp)));
7918 inner = TREE_OPERAND (exp, 0);
7919 break;
7921 case COMPOUND_LITERAL_EXPR:
7922 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7923 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7924 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7925 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7926 the initializers aren't gimplified. */
7927 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7928 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7929 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7930 target, tmode, modifier, as);
7931 /* FALLTHRU */
7932 default:
7933 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7934 expand_expr, as that can have various side effects; LABEL_DECLs for
7935 example, may not have their DECL_RTL set yet. Expand the rtl of
7936 CONSTRUCTORs too, which should yield a memory reference for the
7937 constructor's contents. Assume language specific tree nodes can
7938 be expanded in some interesting way. */
7939 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7940 if (DECL_P (exp)
7941 || TREE_CODE (exp) == CONSTRUCTOR
7942 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7944 result = expand_expr (exp, target, tmode,
7945 modifier == EXPAND_INITIALIZER
7946 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7948 /* If the DECL isn't in memory, then the DECL wasn't properly
7949 marked TREE_ADDRESSABLE, which will be either a front-end
7950 or a tree optimizer bug. */
7952 gcc_assert (MEM_P (result));
7953 result = XEXP (result, 0);
7955 /* ??? Is this needed anymore? */
7956 if (DECL_P (exp))
7957 TREE_USED (exp) = 1;
7959 if (modifier != EXPAND_INITIALIZER
7960 && modifier != EXPAND_CONST_ADDRESS
7961 && modifier != EXPAND_SUM)
7962 result = force_operand (result, target);
7963 return result;
7966 /* Pass FALSE as the last argument to get_inner_reference although
7967 we are expanding to RTL. The rationale is that we know how to
7968 handle "aligning nodes" here: we can just bypass them because
7969 they won't change the final object whose address will be returned
7970 (they actually exist only for that purpose). */
7971 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
7972 &unsignedp, &reversep, &volatilep);
7973 break;
7976 /* We must have made progress. */
7977 gcc_assert (inner != exp);
7979 subtarget = offset || maybe_ne (bitpos, 0) ? NULL_RTX : target;
7980 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7981 inner alignment, force the inner to be sufficiently aligned. */
7982 if (CONSTANT_CLASS_P (inner)
7983 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7985 inner = copy_node (inner);
7986 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7987 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp)));
7988 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7990 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7992 if (offset)
7994 rtx tmp;
7996 if (modifier != EXPAND_NORMAL)
7997 result = force_operand (result, NULL);
7998 tmp = expand_expr (offset, NULL_RTX, tmode,
7999 modifier == EXPAND_INITIALIZER
8000 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
8002 /* expand_expr is allowed to return an object in a mode other
8003 than TMODE. If it did, we need to convert. */
8004 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
8005 tmp = convert_modes (tmode, GET_MODE (tmp),
8006 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
8007 result = convert_memory_address_addr_space (tmode, result, as);
8008 tmp = convert_memory_address_addr_space (tmode, tmp, as);
8010 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8011 result = simplify_gen_binary (PLUS, tmode, result, tmp);
8012 else
8014 subtarget = maybe_ne (bitpos, 0) ? NULL_RTX : target;
8015 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
8016 1, OPTAB_LIB_WIDEN);
8020 if (maybe_ne (bitpos, 0))
8022 /* Someone beforehand should have rejected taking the address
8023 of an object that isn't byte-aligned. */
8024 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
8025 result = convert_memory_address_addr_space (tmode, result, as);
8026 result = plus_constant (tmode, result, bytepos);
8027 if (modifier < EXPAND_SUM)
8028 result = force_operand (result, target);
8031 return result;
8034 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8035 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8037 static rtx
8038 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
8039 enum expand_modifier modifier)
8041 addr_space_t as = ADDR_SPACE_GENERIC;
8042 scalar_int_mode address_mode = Pmode;
8043 scalar_int_mode pointer_mode = ptr_mode;
8044 machine_mode rmode;
8045 rtx result;
8047 /* Target mode of VOIDmode says "whatever's natural". */
8048 if (tmode == VOIDmode)
8049 tmode = TYPE_MODE (TREE_TYPE (exp));
8051 if (POINTER_TYPE_P (TREE_TYPE (exp)))
8053 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
8054 address_mode = targetm.addr_space.address_mode (as);
8055 pointer_mode = targetm.addr_space.pointer_mode (as);
8058 /* We can get called with some Weird Things if the user does silliness
8059 like "(short) &a". In that case, convert_memory_address won't do
8060 the right thing, so ignore the given target mode. */
8061 scalar_int_mode new_tmode = (tmode == pointer_mode
8062 ? pointer_mode
8063 : address_mode);
8065 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
8066 new_tmode, modifier, as);
8068 /* Despite expand_expr claims concerning ignoring TMODE when not
8069 strictly convenient, stuff breaks if we don't honor it. Note
8070 that combined with the above, we only do this for pointer modes. */
8071 rmode = GET_MODE (result);
8072 if (rmode == VOIDmode)
8073 rmode = new_tmode;
8074 if (rmode != new_tmode)
8075 result = convert_memory_address_addr_space (new_tmode, result, as);
8077 return result;
8080 /* Generate code for computing CONSTRUCTOR EXP.
8081 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8082 is TRUE, instead of creating a temporary variable in memory
8083 NULL is returned and the caller needs to handle it differently. */
8085 static rtx
8086 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
8087 bool avoid_temp_mem)
8089 tree type = TREE_TYPE (exp);
8090 machine_mode mode = TYPE_MODE (type);
8092 /* Try to avoid creating a temporary at all. This is possible
8093 if all of the initializer is zero.
8094 FIXME: try to handle all [0..255] initializers we can handle
8095 with memset. */
8096 if (TREE_STATIC (exp)
8097 && !TREE_ADDRESSABLE (exp)
8098 && target != 0 && mode == BLKmode
8099 && all_zeros_p (exp))
8101 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
8102 return target;
8105 /* All elts simple constants => refer to a constant in memory. But
8106 if this is a non-BLKmode mode, let it store a field at a time
8107 since that should make a CONST_INT, CONST_WIDE_INT or
8108 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8109 use, it is best to store directly into the target unless the type
8110 is large enough that memcpy will be used. If we are making an
8111 initializer and all operands are constant, put it in memory as
8112 well.
8114 FIXME: Avoid trying to fill vector constructors piece-meal.
8115 Output them with output_constant_def below unless we're sure
8116 they're zeros. This should go away when vector initializers
8117 are treated like VECTOR_CST instead of arrays. */
8118 if ((TREE_STATIC (exp)
8119 && ((mode == BLKmode
8120 && ! (target != 0 && safe_from_p (target, exp, 1)))
8121 || TREE_ADDRESSABLE (exp)
8122 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
8123 && (! can_move_by_pieces
8124 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
8125 TYPE_ALIGN (type)))
8126 && ! mostly_zeros_p (exp))))
8127 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
8128 && TREE_CONSTANT (exp)))
8130 rtx constructor;
8132 if (avoid_temp_mem)
8133 return NULL_RTX;
8135 constructor = expand_expr_constant (exp, 1, modifier);
8137 if (modifier != EXPAND_CONST_ADDRESS
8138 && modifier != EXPAND_INITIALIZER
8139 && modifier != EXPAND_SUM)
8140 constructor = validize_mem (constructor);
8142 return constructor;
8145 /* Handle calls that pass values in multiple non-contiguous
8146 locations. The Irix 6 ABI has examples of this. */
8147 if (target == 0 || ! safe_from_p (target, exp, 1)
8148 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
8150 if (avoid_temp_mem)
8151 return NULL_RTX;
8153 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
8156 store_constructor (exp, target, 0, int_expr_size (exp), false);
8157 return target;
8161 /* expand_expr: generate code for computing expression EXP.
8162 An rtx for the computed value is returned. The value is never null.
8163 In the case of a void EXP, const0_rtx is returned.
8165 The value may be stored in TARGET if TARGET is nonzero.
8166 TARGET is just a suggestion; callers must assume that
8167 the rtx returned may not be the same as TARGET.
8169 If TARGET is CONST0_RTX, it means that the value will be ignored.
8171 If TMODE is not VOIDmode, it suggests generating the
8172 result in mode TMODE. But this is done only when convenient.
8173 Otherwise, TMODE is ignored and the value generated in its natural mode.
8174 TMODE is just a suggestion; callers must assume that
8175 the rtx returned may not have mode TMODE.
8177 Note that TARGET may have neither TMODE nor MODE. In that case, it
8178 probably will not be used.
8180 If MODIFIER is EXPAND_SUM then when EXP is an addition
8181 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8182 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8183 products as above, or REG or MEM, or constant.
8184 Ordinarily in such cases we would output mul or add instructions
8185 and then return a pseudo reg containing the sum.
8187 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8188 it also marks a label as absolutely required (it can't be dead).
8189 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8190 This is used for outputting expressions used in initializers.
8192 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8193 with a constant address even if that address is not normally legitimate.
8194 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8196 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8197 a call parameter. Such targets require special care as we haven't yet
8198 marked TARGET so that it's safe from being trashed by libcalls. We
8199 don't want to use TARGET for anything but the final result;
8200 Intermediate values must go elsewhere. Additionally, calls to
8201 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8203 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8204 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8205 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8206 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8207 recursively.
8209 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8210 In this case, we don't adjust a returned MEM rtx that wouldn't be
8211 sufficiently aligned for its mode; instead, it's up to the caller
8212 to deal with it afterwards. This is used to make sure that unaligned
8213 base objects for which out-of-bounds accesses are supported, for
8214 example record types with trailing arrays, aren't realigned behind
8215 the back of the caller.
8216 The normal operating mode is to pass FALSE for this parameter. */
8219 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8220 enum expand_modifier modifier, rtx *alt_rtl,
8221 bool inner_reference_p)
8223 rtx ret;
8225 /* Handle ERROR_MARK before anybody tries to access its type. */
8226 if (TREE_CODE (exp) == ERROR_MARK
8227 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8229 ret = CONST0_RTX (tmode);
8230 return ret ? ret : const0_rtx;
8233 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8234 inner_reference_p);
8235 return ret;
8238 /* Try to expand the conditional expression which is represented by
8239 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8240 return the rtl reg which represents the result. Otherwise return
8241 NULL_RTX. */
8243 static rtx
8244 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8245 tree treeop1 ATTRIBUTE_UNUSED,
8246 tree treeop2 ATTRIBUTE_UNUSED)
8248 rtx insn;
8249 rtx op00, op01, op1, op2;
8250 enum rtx_code comparison_code;
8251 machine_mode comparison_mode;
8252 gimple *srcstmt;
8253 rtx temp;
8254 tree type = TREE_TYPE (treeop1);
8255 int unsignedp = TYPE_UNSIGNED (type);
8256 machine_mode mode = TYPE_MODE (type);
8257 machine_mode orig_mode = mode;
8258 static bool expanding_cond_expr_using_cmove = false;
8260 /* Conditional move expansion can end up TERing two operands which,
8261 when recursively hitting conditional expressions can result in
8262 exponential behavior if the cmove expansion ultimatively fails.
8263 It's hardly profitable to TER a cmove into a cmove so avoid doing
8264 that by failing early if we end up recursing. */
8265 if (expanding_cond_expr_using_cmove)
8266 return NULL_RTX;
8268 /* If we cannot do a conditional move on the mode, try doing it
8269 with the promoted mode. */
8270 if (!can_conditionally_move_p (mode))
8272 mode = promote_mode (type, mode, &unsignedp);
8273 if (!can_conditionally_move_p (mode))
8274 return NULL_RTX;
8275 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8277 else
8278 temp = assign_temp (type, 0, 1);
8280 expanding_cond_expr_using_cmove = true;
8281 start_sequence ();
8282 expand_operands (treeop1, treeop2,
8283 temp, &op1, &op2, EXPAND_NORMAL);
8285 if (TREE_CODE (treeop0) == SSA_NAME
8286 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8288 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8289 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8290 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8291 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8292 comparison_mode = TYPE_MODE (type);
8293 unsignedp = TYPE_UNSIGNED (type);
8294 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8296 else if (COMPARISON_CLASS_P (treeop0))
8298 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8299 enum tree_code cmpcode = TREE_CODE (treeop0);
8300 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8301 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8302 unsignedp = TYPE_UNSIGNED (type);
8303 comparison_mode = TYPE_MODE (type);
8304 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8306 else
8308 op00 = expand_normal (treeop0);
8309 op01 = const0_rtx;
8310 comparison_code = NE;
8311 comparison_mode = GET_MODE (op00);
8312 if (comparison_mode == VOIDmode)
8313 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8315 expanding_cond_expr_using_cmove = false;
8317 if (GET_MODE (op1) != mode)
8318 op1 = gen_lowpart (mode, op1);
8320 if (GET_MODE (op2) != mode)
8321 op2 = gen_lowpart (mode, op2);
8323 /* Try to emit the conditional move. */
8324 insn = emit_conditional_move (temp, comparison_code,
8325 op00, op01, comparison_mode,
8326 op1, op2, mode,
8327 unsignedp);
8329 /* If we could do the conditional move, emit the sequence,
8330 and return. */
8331 if (insn)
8333 rtx_insn *seq = get_insns ();
8334 end_sequence ();
8335 emit_insn (seq);
8336 return convert_modes (orig_mode, mode, temp, 0);
8339 /* Otherwise discard the sequence and fall back to code with
8340 branches. */
8341 end_sequence ();
8342 return NULL_RTX;
8346 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8347 enum expand_modifier modifier)
8349 rtx op0, op1, op2, temp;
8350 rtx_code_label *lab;
8351 tree type;
8352 int unsignedp;
8353 machine_mode mode;
8354 scalar_int_mode int_mode;
8355 enum tree_code code = ops->code;
8356 optab this_optab;
8357 rtx subtarget, original_target;
8358 int ignore;
8359 bool reduce_bit_field;
8360 location_t loc = ops->location;
8361 tree treeop0, treeop1, treeop2;
8362 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8363 ? reduce_to_bit_field_precision ((expr), \
8364 target, \
8365 type) \
8366 : (expr))
8368 type = ops->type;
8369 mode = TYPE_MODE (type);
8370 unsignedp = TYPE_UNSIGNED (type);
8372 treeop0 = ops->op0;
8373 treeop1 = ops->op1;
8374 treeop2 = ops->op2;
8376 /* We should be called only on simple (binary or unary) expressions,
8377 exactly those that are valid in gimple expressions that aren't
8378 GIMPLE_SINGLE_RHS (or invalid). */
8379 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8380 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8381 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8383 ignore = (target == const0_rtx
8384 || ((CONVERT_EXPR_CODE_P (code)
8385 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8386 && TREE_CODE (type) == VOID_TYPE));
8388 /* We should be called only if we need the result. */
8389 gcc_assert (!ignore);
8391 /* An operation in what may be a bit-field type needs the
8392 result to be reduced to the precision of the bit-field type,
8393 which is narrower than that of the type's mode. */
8394 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8395 && !type_has_mode_precision_p (type));
8397 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8398 target = 0;
8400 /* Use subtarget as the target for operand 0 of a binary operation. */
8401 subtarget = get_subtarget (target);
8402 original_target = target;
8404 switch (code)
8406 case NON_LVALUE_EXPR:
8407 case PAREN_EXPR:
8408 CASE_CONVERT:
8409 if (treeop0 == error_mark_node)
8410 return const0_rtx;
8412 if (TREE_CODE (type) == UNION_TYPE)
8414 tree valtype = TREE_TYPE (treeop0);
8416 /* If both input and output are BLKmode, this conversion isn't doing
8417 anything except possibly changing memory attribute. */
8418 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8420 rtx result = expand_expr (treeop0, target, tmode,
8421 modifier);
8423 result = copy_rtx (result);
8424 set_mem_attributes (result, type, 0);
8425 return result;
8428 if (target == 0)
8430 if (TYPE_MODE (type) != BLKmode)
8431 target = gen_reg_rtx (TYPE_MODE (type));
8432 else
8433 target = assign_temp (type, 1, 1);
8436 if (MEM_P (target))
8437 /* Store data into beginning of memory target. */
8438 store_expr (treeop0,
8439 adjust_address (target, TYPE_MODE (valtype), 0),
8440 modifier == EXPAND_STACK_PARM,
8441 false, TYPE_REVERSE_STORAGE_ORDER (type));
8443 else
8445 gcc_assert (REG_P (target)
8446 && !TYPE_REVERSE_STORAGE_ORDER (type));
8448 /* Store this field into a union of the proper type. */
8449 poly_uint64 op0_size
8450 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0)));
8451 poly_uint64 union_size = GET_MODE_BITSIZE (mode);
8452 store_field (target,
8453 /* The conversion must be constructed so that
8454 we know at compile time how many bits
8455 to preserve. */
8456 ordered_min (op0_size, union_size),
8457 0, 0, 0, TYPE_MODE (valtype), treeop0, 0,
8458 false, false);
8461 /* Return the entire union. */
8462 return target;
8465 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8467 op0 = expand_expr (treeop0, target, VOIDmode,
8468 modifier);
8470 /* If the signedness of the conversion differs and OP0 is
8471 a promoted SUBREG, clear that indication since we now
8472 have to do the proper extension. */
8473 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8474 && GET_CODE (op0) == SUBREG)
8475 SUBREG_PROMOTED_VAR_P (op0) = 0;
8477 return REDUCE_BIT_FIELD (op0);
8480 op0 = expand_expr (treeop0, NULL_RTX, mode,
8481 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8482 if (GET_MODE (op0) == mode)
8485 /* If OP0 is a constant, just convert it into the proper mode. */
8486 else if (CONSTANT_P (op0))
8488 tree inner_type = TREE_TYPE (treeop0);
8489 machine_mode inner_mode = GET_MODE (op0);
8491 if (inner_mode == VOIDmode)
8492 inner_mode = TYPE_MODE (inner_type);
8494 if (modifier == EXPAND_INITIALIZER)
8495 op0 = lowpart_subreg (mode, op0, inner_mode);
8496 else
8497 op0= convert_modes (mode, inner_mode, op0,
8498 TYPE_UNSIGNED (inner_type));
8501 else if (modifier == EXPAND_INITIALIZER)
8502 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8503 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8505 else if (target == 0)
8506 op0 = convert_to_mode (mode, op0,
8507 TYPE_UNSIGNED (TREE_TYPE
8508 (treeop0)));
8509 else
8511 convert_move (target, op0,
8512 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8513 op0 = target;
8516 return REDUCE_BIT_FIELD (op0);
8518 case ADDR_SPACE_CONVERT_EXPR:
8520 tree treeop0_type = TREE_TYPE (treeop0);
8522 gcc_assert (POINTER_TYPE_P (type));
8523 gcc_assert (POINTER_TYPE_P (treeop0_type));
8525 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8526 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8528 /* Conversions between pointers to the same address space should
8529 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8530 gcc_assert (as_to != as_from);
8532 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8534 /* Ask target code to handle conversion between pointers
8535 to overlapping address spaces. */
8536 if (targetm.addr_space.subset_p (as_to, as_from)
8537 || targetm.addr_space.subset_p (as_from, as_to))
8539 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8541 else
8543 /* For disjoint address spaces, converting anything but a null
8544 pointer invokes undefined behavior. We truncate or extend the
8545 value as if we'd converted via integers, which handles 0 as
8546 required, and all others as the programmer likely expects. */
8547 #ifndef POINTERS_EXTEND_UNSIGNED
8548 const int POINTERS_EXTEND_UNSIGNED = 1;
8549 #endif
8550 op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
8551 op0, POINTERS_EXTEND_UNSIGNED);
8553 gcc_assert (op0);
8554 return op0;
8557 case POINTER_PLUS_EXPR:
8558 /* Even though the sizetype mode and the pointer's mode can be different
8559 expand is able to handle this correctly and get the correct result out
8560 of the PLUS_EXPR code. */
8561 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8562 if sizetype precision is smaller than pointer precision. */
8563 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8564 treeop1 = fold_convert_loc (loc, type,
8565 fold_convert_loc (loc, ssizetype,
8566 treeop1));
8567 /* If sizetype precision is larger than pointer precision, truncate the
8568 offset to have matching modes. */
8569 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8570 treeop1 = fold_convert_loc (loc, type, treeop1);
8571 /* FALLTHRU */
8573 case PLUS_EXPR:
8574 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8575 something else, make sure we add the register to the constant and
8576 then to the other thing. This case can occur during strength
8577 reduction and doing it this way will produce better code if the
8578 frame pointer or argument pointer is eliminated.
8580 fold-const.c will ensure that the constant is always in the inner
8581 PLUS_EXPR, so the only case we need to do anything about is if
8582 sp, ap, or fp is our second argument, in which case we must swap
8583 the innermost first argument and our second argument. */
8585 if (TREE_CODE (treeop0) == PLUS_EXPR
8586 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8587 && VAR_P (treeop1)
8588 && (DECL_RTL (treeop1) == frame_pointer_rtx
8589 || DECL_RTL (treeop1) == stack_pointer_rtx
8590 || DECL_RTL (treeop1) == arg_pointer_rtx))
8592 gcc_unreachable ();
8595 /* If the result is to be ptr_mode and we are adding an integer to
8596 something, we might be forming a constant. So try to use
8597 plus_constant. If it produces a sum and we can't accept it,
8598 use force_operand. This allows P = &ARR[const] to generate
8599 efficient code on machines where a SYMBOL_REF is not a valid
8600 address.
8602 If this is an EXPAND_SUM call, always return the sum. */
8603 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8604 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8606 if (modifier == EXPAND_STACK_PARM)
8607 target = 0;
8608 if (TREE_CODE (treeop0) == INTEGER_CST
8609 && HWI_COMPUTABLE_MODE_P (mode)
8610 && TREE_CONSTANT (treeop1))
8612 rtx constant_part;
8613 HOST_WIDE_INT wc;
8614 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8616 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8617 EXPAND_SUM);
8618 /* Use wi::shwi to ensure that the constant is
8619 truncated according to the mode of OP1, then sign extended
8620 to a HOST_WIDE_INT. Using the constant directly can result
8621 in non-canonical RTL in a 64x32 cross compile. */
8622 wc = TREE_INT_CST_LOW (treeop0);
8623 constant_part =
8624 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8625 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8626 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8627 op1 = force_operand (op1, target);
8628 return REDUCE_BIT_FIELD (op1);
8631 else if (TREE_CODE (treeop1) == INTEGER_CST
8632 && HWI_COMPUTABLE_MODE_P (mode)
8633 && TREE_CONSTANT (treeop0))
8635 rtx constant_part;
8636 HOST_WIDE_INT wc;
8637 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8639 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8640 (modifier == EXPAND_INITIALIZER
8641 ? EXPAND_INITIALIZER : EXPAND_SUM));
8642 if (! CONSTANT_P (op0))
8644 op1 = expand_expr (treeop1, NULL_RTX,
8645 VOIDmode, modifier);
8646 /* Return a PLUS if modifier says it's OK. */
8647 if (modifier == EXPAND_SUM
8648 || modifier == EXPAND_INITIALIZER)
8649 return simplify_gen_binary (PLUS, mode, op0, op1);
8650 goto binop2;
8652 /* Use wi::shwi to ensure that the constant is
8653 truncated according to the mode of OP1, then sign extended
8654 to a HOST_WIDE_INT. Using the constant directly can result
8655 in non-canonical RTL in a 64x32 cross compile. */
8656 wc = TREE_INT_CST_LOW (treeop1);
8657 constant_part
8658 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8659 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8660 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8661 op0 = force_operand (op0, target);
8662 return REDUCE_BIT_FIELD (op0);
8666 /* Use TER to expand pointer addition of a negated value
8667 as pointer subtraction. */
8668 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8669 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8670 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8671 && TREE_CODE (treeop1) == SSA_NAME
8672 && TYPE_MODE (TREE_TYPE (treeop0))
8673 == TYPE_MODE (TREE_TYPE (treeop1)))
8675 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR);
8676 if (def)
8678 treeop1 = gimple_assign_rhs1 (def);
8679 code = MINUS_EXPR;
8680 goto do_minus;
8684 /* No sense saving up arithmetic to be done
8685 if it's all in the wrong mode to form part of an address.
8686 And force_operand won't know whether to sign-extend or
8687 zero-extend. */
8688 if (modifier != EXPAND_INITIALIZER
8689 && (modifier != EXPAND_SUM || mode != ptr_mode))
8691 expand_operands (treeop0, treeop1,
8692 subtarget, &op0, &op1, modifier);
8693 if (op0 == const0_rtx)
8694 return op1;
8695 if (op1 == const0_rtx)
8696 return op0;
8697 goto binop2;
8700 expand_operands (treeop0, treeop1,
8701 subtarget, &op0, &op1, modifier);
8702 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8704 case MINUS_EXPR:
8705 case POINTER_DIFF_EXPR:
8706 do_minus:
8707 /* For initializers, we are allowed to return a MINUS of two
8708 symbolic constants. Here we handle all cases when both operands
8709 are constant. */
8710 /* Handle difference of two symbolic constants,
8711 for the sake of an initializer. */
8712 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8713 && really_constant_p (treeop0)
8714 && really_constant_p (treeop1))
8716 expand_operands (treeop0, treeop1,
8717 NULL_RTX, &op0, &op1, modifier);
8718 return simplify_gen_binary (MINUS, mode, op0, op1);
8721 /* No sense saving up arithmetic to be done
8722 if it's all in the wrong mode to form part of an address.
8723 And force_operand won't know whether to sign-extend or
8724 zero-extend. */
8725 if (modifier != EXPAND_INITIALIZER
8726 && (modifier != EXPAND_SUM || mode != ptr_mode))
8727 goto binop;
8729 expand_operands (treeop0, treeop1,
8730 subtarget, &op0, &op1, modifier);
8732 /* Convert A - const to A + (-const). */
8733 if (CONST_INT_P (op1))
8735 op1 = negate_rtx (mode, op1);
8736 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8739 goto binop2;
8741 case WIDEN_MULT_PLUS_EXPR:
8742 case WIDEN_MULT_MINUS_EXPR:
8743 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8744 op2 = expand_normal (treeop2);
8745 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8746 target, unsignedp);
8747 return target;
8749 case WIDEN_MULT_EXPR:
8750 /* If first operand is constant, swap them.
8751 Thus the following special case checks need only
8752 check the second operand. */
8753 if (TREE_CODE (treeop0) == INTEGER_CST)
8754 std::swap (treeop0, treeop1);
8756 /* First, check if we have a multiplication of one signed and one
8757 unsigned operand. */
8758 if (TREE_CODE (treeop1) != INTEGER_CST
8759 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8760 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8762 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8763 this_optab = usmul_widen_optab;
8764 if (find_widening_optab_handler (this_optab, mode, innermode)
8765 != CODE_FOR_nothing)
8767 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8768 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8769 EXPAND_NORMAL);
8770 else
8771 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8772 EXPAND_NORMAL);
8773 /* op0 and op1 might still be constant, despite the above
8774 != INTEGER_CST check. Handle it. */
8775 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8777 op0 = convert_modes (innermode, mode, op0, true);
8778 op1 = convert_modes (innermode, mode, op1, false);
8779 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8780 target, unsignedp));
8782 goto binop3;
8785 /* Check for a multiplication with matching signedness. */
8786 else if ((TREE_CODE (treeop1) == INTEGER_CST
8787 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8788 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8789 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8791 tree op0type = TREE_TYPE (treeop0);
8792 machine_mode innermode = TYPE_MODE (op0type);
8793 bool zextend_p = TYPE_UNSIGNED (op0type);
8794 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8795 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8797 if (TREE_CODE (treeop0) != INTEGER_CST)
8799 if (find_widening_optab_handler (this_optab, mode, innermode)
8800 != CODE_FOR_nothing)
8802 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8803 EXPAND_NORMAL);
8804 /* op0 and op1 might still be constant, despite the above
8805 != INTEGER_CST check. Handle it. */
8806 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8808 widen_mult_const:
8809 op0 = convert_modes (innermode, mode, op0, zextend_p);
8811 = convert_modes (innermode, mode, op1,
8812 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8813 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8814 target,
8815 unsignedp));
8817 temp = expand_widening_mult (mode, op0, op1, target,
8818 unsignedp, this_optab);
8819 return REDUCE_BIT_FIELD (temp);
8821 if (find_widening_optab_handler (other_optab, mode, innermode)
8822 != CODE_FOR_nothing
8823 && innermode == word_mode)
8825 rtx htem, hipart;
8826 op0 = expand_normal (treeop0);
8827 if (TREE_CODE (treeop1) == INTEGER_CST)
8828 op1 = convert_modes (word_mode, mode,
8829 expand_normal (treeop1),
8830 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8831 else
8832 op1 = expand_normal (treeop1);
8833 /* op0 and op1 might still be constant, despite the above
8834 != INTEGER_CST check. Handle it. */
8835 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8836 goto widen_mult_const;
8837 temp = expand_binop (mode, other_optab, op0, op1, target,
8838 unsignedp, OPTAB_LIB_WIDEN);
8839 hipart = gen_highpart (word_mode, temp);
8840 htem = expand_mult_highpart_adjust (word_mode, hipart,
8841 op0, op1, hipart,
8842 zextend_p);
8843 if (htem != hipart)
8844 emit_move_insn (hipart, htem);
8845 return REDUCE_BIT_FIELD (temp);
8849 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8850 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8851 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8852 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8854 case MULT_EXPR:
8855 /* If this is a fixed-point operation, then we cannot use the code
8856 below because "expand_mult" doesn't support sat/no-sat fixed-point
8857 multiplications. */
8858 if (ALL_FIXED_POINT_MODE_P (mode))
8859 goto binop;
8861 /* If first operand is constant, swap them.
8862 Thus the following special case checks need only
8863 check the second operand. */
8864 if (TREE_CODE (treeop0) == INTEGER_CST)
8865 std::swap (treeop0, treeop1);
8867 /* Attempt to return something suitable for generating an
8868 indexed address, for machines that support that. */
8870 if (modifier == EXPAND_SUM && mode == ptr_mode
8871 && tree_fits_shwi_p (treeop1))
8873 tree exp1 = treeop1;
8875 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8876 EXPAND_SUM);
8878 if (!REG_P (op0))
8879 op0 = force_operand (op0, NULL_RTX);
8880 if (!REG_P (op0))
8881 op0 = copy_to_mode_reg (mode, op0);
8883 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8884 gen_int_mode (tree_to_shwi (exp1),
8885 TYPE_MODE (TREE_TYPE (exp1)))));
8888 if (modifier == EXPAND_STACK_PARM)
8889 target = 0;
8891 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8892 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8894 case TRUNC_MOD_EXPR:
8895 case FLOOR_MOD_EXPR:
8896 case CEIL_MOD_EXPR:
8897 case ROUND_MOD_EXPR:
8899 case TRUNC_DIV_EXPR:
8900 case FLOOR_DIV_EXPR:
8901 case CEIL_DIV_EXPR:
8902 case ROUND_DIV_EXPR:
8903 case EXACT_DIV_EXPR:
8905 /* If this is a fixed-point operation, then we cannot use the code
8906 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8907 divisions. */
8908 if (ALL_FIXED_POINT_MODE_P (mode))
8909 goto binop;
8911 if (modifier == EXPAND_STACK_PARM)
8912 target = 0;
8913 /* Possible optimization: compute the dividend with EXPAND_SUM
8914 then if the divisor is constant can optimize the case
8915 where some terms of the dividend have coeffs divisible by it. */
8916 expand_operands (treeop0, treeop1,
8917 subtarget, &op0, &op1, EXPAND_NORMAL);
8918 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR
8919 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR;
8920 if (SCALAR_INT_MODE_P (mode)
8921 && optimize >= 2
8922 && get_range_pos_neg (treeop0) == 1
8923 && get_range_pos_neg (treeop1) == 1)
8925 /* If both arguments are known to be positive when interpreted
8926 as signed, we can expand it as both signed and unsigned
8927 division or modulo. Choose the cheaper sequence in that case. */
8928 bool speed_p = optimize_insn_for_speed_p ();
8929 do_pending_stack_adjust ();
8930 start_sequence ();
8931 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
8932 rtx_insn *uns_insns = get_insns ();
8933 end_sequence ();
8934 start_sequence ();
8935 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
8936 rtx_insn *sgn_insns = get_insns ();
8937 end_sequence ();
8938 unsigned uns_cost = seq_cost (uns_insns, speed_p);
8939 unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
8941 /* If costs are the same then use as tie breaker the other
8942 other factor. */
8943 if (uns_cost == sgn_cost)
8945 uns_cost = seq_cost (uns_insns, !speed_p);
8946 sgn_cost = seq_cost (sgn_insns, !speed_p);
8949 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp))
8951 emit_insn (uns_insns);
8952 return uns_ret;
8954 emit_insn (sgn_insns);
8955 return sgn_ret;
8957 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp);
8959 case RDIV_EXPR:
8960 goto binop;
8962 case MULT_HIGHPART_EXPR:
8963 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8964 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8965 gcc_assert (temp);
8966 return temp;
8968 case FIXED_CONVERT_EXPR:
8969 op0 = expand_normal (treeop0);
8970 if (target == 0 || modifier == EXPAND_STACK_PARM)
8971 target = gen_reg_rtx (mode);
8973 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8974 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8975 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8976 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8977 else
8978 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8979 return target;
8981 case FIX_TRUNC_EXPR:
8982 op0 = expand_normal (treeop0);
8983 if (target == 0 || modifier == EXPAND_STACK_PARM)
8984 target = gen_reg_rtx (mode);
8985 expand_fix (target, op0, unsignedp);
8986 return target;
8988 case FLOAT_EXPR:
8989 op0 = expand_normal (treeop0);
8990 if (target == 0 || modifier == EXPAND_STACK_PARM)
8991 target = gen_reg_rtx (mode);
8992 /* expand_float can't figure out what to do if FROM has VOIDmode.
8993 So give it the correct mode. With -O, cse will optimize this. */
8994 if (GET_MODE (op0) == VOIDmode)
8995 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8996 op0);
8997 expand_float (target, op0,
8998 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8999 return target;
9001 case NEGATE_EXPR:
9002 op0 = expand_expr (treeop0, subtarget,
9003 VOIDmode, EXPAND_NORMAL);
9004 if (modifier == EXPAND_STACK_PARM)
9005 target = 0;
9006 temp = expand_unop (mode,
9007 optab_for_tree_code (NEGATE_EXPR, type,
9008 optab_default),
9009 op0, target, 0);
9010 gcc_assert (temp);
9011 return REDUCE_BIT_FIELD (temp);
9013 case ABS_EXPR:
9014 op0 = expand_expr (treeop0, subtarget,
9015 VOIDmode, EXPAND_NORMAL);
9016 if (modifier == EXPAND_STACK_PARM)
9017 target = 0;
9019 /* ABS_EXPR is not valid for complex arguments. */
9020 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9021 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
9023 /* Unsigned abs is simply the operand. Testing here means we don't
9024 risk generating incorrect code below. */
9025 if (TYPE_UNSIGNED (type))
9026 return op0;
9028 return expand_abs (mode, op0, target, unsignedp,
9029 safe_from_p (target, treeop0, 1));
9031 case MAX_EXPR:
9032 case MIN_EXPR:
9033 target = original_target;
9034 if (target == 0
9035 || modifier == EXPAND_STACK_PARM
9036 || (MEM_P (target) && MEM_VOLATILE_P (target))
9037 || GET_MODE (target) != mode
9038 || (REG_P (target)
9039 && REGNO (target) < FIRST_PSEUDO_REGISTER))
9040 target = gen_reg_rtx (mode);
9041 expand_operands (treeop0, treeop1,
9042 target, &op0, &op1, EXPAND_NORMAL);
9044 /* First try to do it with a special MIN or MAX instruction.
9045 If that does not win, use a conditional jump to select the proper
9046 value. */
9047 this_optab = optab_for_tree_code (code, type, optab_default);
9048 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9049 OPTAB_WIDEN);
9050 if (temp != 0)
9051 return temp;
9053 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9054 and similarly for MAX <x, y>. */
9055 if (VECTOR_TYPE_P (type))
9057 tree t0 = make_tree (type, op0);
9058 tree t1 = make_tree (type, op1);
9059 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
9060 type, t0, t1);
9061 return expand_vec_cond_expr (type, comparison, t0, t1,
9062 original_target);
9065 /* At this point, a MEM target is no longer useful; we will get better
9066 code without it. */
9068 if (! REG_P (target))
9069 target = gen_reg_rtx (mode);
9071 /* If op1 was placed in target, swap op0 and op1. */
9072 if (target != op0 && target == op1)
9073 std::swap (op0, op1);
9075 /* We generate better code and avoid problems with op1 mentioning
9076 target by forcing op1 into a pseudo if it isn't a constant. */
9077 if (! CONSTANT_P (op1))
9078 op1 = force_reg (mode, op1);
9081 enum rtx_code comparison_code;
9082 rtx cmpop1 = op1;
9084 if (code == MAX_EXPR)
9085 comparison_code = unsignedp ? GEU : GE;
9086 else
9087 comparison_code = unsignedp ? LEU : LE;
9089 /* Canonicalize to comparisons against 0. */
9090 if (op1 == const1_rtx)
9092 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9093 or (a != 0 ? a : 1) for unsigned.
9094 For MIN we are safe converting (a <= 1 ? a : 1)
9095 into (a <= 0 ? a : 1) */
9096 cmpop1 = const0_rtx;
9097 if (code == MAX_EXPR)
9098 comparison_code = unsignedp ? NE : GT;
9100 if (op1 == constm1_rtx && !unsignedp)
9102 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9103 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9104 cmpop1 = const0_rtx;
9105 if (code == MIN_EXPR)
9106 comparison_code = LT;
9109 /* Use a conditional move if possible. */
9110 if (can_conditionally_move_p (mode))
9112 rtx insn;
9114 start_sequence ();
9116 /* Try to emit the conditional move. */
9117 insn = emit_conditional_move (target, comparison_code,
9118 op0, cmpop1, mode,
9119 op0, op1, mode,
9120 unsignedp);
9122 /* If we could do the conditional move, emit the sequence,
9123 and return. */
9124 if (insn)
9126 rtx_insn *seq = get_insns ();
9127 end_sequence ();
9128 emit_insn (seq);
9129 return target;
9132 /* Otherwise discard the sequence and fall back to code with
9133 branches. */
9134 end_sequence ();
9137 if (target != op0)
9138 emit_move_insn (target, op0);
9140 lab = gen_label_rtx ();
9141 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
9142 unsignedp, mode, NULL_RTX, NULL, lab,
9143 profile_probability::uninitialized ());
9145 emit_move_insn (target, op1);
9146 emit_label (lab);
9147 return target;
9149 case BIT_NOT_EXPR:
9150 op0 = expand_expr (treeop0, subtarget,
9151 VOIDmode, EXPAND_NORMAL);
9152 if (modifier == EXPAND_STACK_PARM)
9153 target = 0;
9154 /* In case we have to reduce the result to bitfield precision
9155 for unsigned bitfield expand this as XOR with a proper constant
9156 instead. */
9157 if (reduce_bit_field && TYPE_UNSIGNED (type))
9159 int_mode = SCALAR_INT_TYPE_MODE (type);
9160 wide_int mask = wi::mask (TYPE_PRECISION (type),
9161 false, GET_MODE_PRECISION (int_mode));
9163 temp = expand_binop (int_mode, xor_optab, op0,
9164 immed_wide_int_const (mask, int_mode),
9165 target, 1, OPTAB_LIB_WIDEN);
9167 else
9168 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9169 gcc_assert (temp);
9170 return temp;
9172 /* ??? Can optimize bitwise operations with one arg constant.
9173 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9174 and (a bitwise1 b) bitwise2 b (etc)
9175 but that is probably not worth while. */
9177 case BIT_AND_EXPR:
9178 case BIT_IOR_EXPR:
9179 case BIT_XOR_EXPR:
9180 goto binop;
9182 case LROTATE_EXPR:
9183 case RROTATE_EXPR:
9184 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9185 || type_has_mode_precision_p (type));
9186 /* fall through */
9188 case LSHIFT_EXPR:
9189 case RSHIFT_EXPR:
9191 /* If this is a fixed-point operation, then we cannot use the code
9192 below because "expand_shift" doesn't support sat/no-sat fixed-point
9193 shifts. */
9194 if (ALL_FIXED_POINT_MODE_P (mode))
9195 goto binop;
9197 if (! safe_from_p (subtarget, treeop1, 1))
9198 subtarget = 0;
9199 if (modifier == EXPAND_STACK_PARM)
9200 target = 0;
9201 op0 = expand_expr (treeop0, subtarget,
9202 VOIDmode, EXPAND_NORMAL);
9204 /* Left shift optimization when shifting across word_size boundary.
9206 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9207 there isn't native instruction to support this wide mode
9208 left shift. Given below scenario:
9210 Type A = (Type) B << C
9212 |< T >|
9213 | dest_high | dest_low |
9215 | word_size |
9217 If the shift amount C caused we shift B to across the word
9218 size boundary, i.e part of B shifted into high half of
9219 destination register, and part of B remains in the low
9220 half, then GCC will use the following left shift expand
9221 logic:
9223 1. Initialize dest_low to B.
9224 2. Initialize every bit of dest_high to the sign bit of B.
9225 3. Logic left shift dest_low by C bit to finalize dest_low.
9226 The value of dest_low before this shift is kept in a temp D.
9227 4. Logic left shift dest_high by C.
9228 5. Logic right shift D by (word_size - C).
9229 6. Or the result of 4 and 5 to finalize dest_high.
9231 While, by checking gimple statements, if operand B is
9232 coming from signed extension, then we can simplify above
9233 expand logic into:
9235 1. dest_high = src_low >> (word_size - C).
9236 2. dest_low = src_low << C.
9238 We can use one arithmetic right shift to finish all the
9239 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9240 needed from 6 into 2.
9242 The case is similar for zero extension, except that we
9243 initialize dest_high to zero rather than copies of the sign
9244 bit from B. Furthermore, we need to use a logical right shift
9245 in this case.
9247 The choice of sign-extension versus zero-extension is
9248 determined entirely by whether or not B is signed and is
9249 independent of the current setting of unsignedp. */
9251 temp = NULL_RTX;
9252 if (code == LSHIFT_EXPR
9253 && target
9254 && REG_P (target)
9255 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode)
9256 && mode == int_mode
9257 && TREE_CONSTANT (treeop1)
9258 && TREE_CODE (treeop0) == SSA_NAME)
9260 gimple *def = SSA_NAME_DEF_STMT (treeop0);
9261 if (is_gimple_assign (def)
9262 && gimple_assign_rhs_code (def) == NOP_EXPR)
9264 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE
9265 (TREE_TYPE (gimple_assign_rhs1 (def)));
9267 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode)
9268 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
9269 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
9270 >= GET_MODE_BITSIZE (word_mode)))
9272 rtx_insn *seq, *seq_old;
9273 poly_uint64 high_off = subreg_highpart_offset (word_mode,
9274 int_mode);
9275 bool extend_unsigned
9276 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def)));
9277 rtx low = lowpart_subreg (word_mode, op0, int_mode);
9278 rtx dest_low = lowpart_subreg (word_mode, target, int_mode);
9279 rtx dest_high = simplify_gen_subreg (word_mode, target,
9280 int_mode, high_off);
9281 HOST_WIDE_INT ramount = (BITS_PER_WORD
9282 - TREE_INT_CST_LOW (treeop1));
9283 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
9285 start_sequence ();
9286 /* dest_high = src_low >> (word_size - C). */
9287 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
9288 rshift, dest_high,
9289 extend_unsigned);
9290 if (temp != dest_high)
9291 emit_move_insn (dest_high, temp);
9293 /* dest_low = src_low << C. */
9294 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
9295 treeop1, dest_low, unsignedp);
9296 if (temp != dest_low)
9297 emit_move_insn (dest_low, temp);
9299 seq = get_insns ();
9300 end_sequence ();
9301 temp = target ;
9303 if (have_insn_for (ASHIFT, int_mode))
9305 bool speed_p = optimize_insn_for_speed_p ();
9306 start_sequence ();
9307 rtx ret_old = expand_variable_shift (code, int_mode,
9308 op0, treeop1,
9309 target,
9310 unsignedp);
9312 seq_old = get_insns ();
9313 end_sequence ();
9314 if (seq_cost (seq, speed_p)
9315 >= seq_cost (seq_old, speed_p))
9317 seq = seq_old;
9318 temp = ret_old;
9321 emit_insn (seq);
9326 if (temp == NULL_RTX)
9327 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9328 unsignedp);
9329 if (code == LSHIFT_EXPR)
9330 temp = REDUCE_BIT_FIELD (temp);
9331 return temp;
9334 /* Could determine the answer when only additive constants differ. Also,
9335 the addition of one can be handled by changing the condition. */
9336 case LT_EXPR:
9337 case LE_EXPR:
9338 case GT_EXPR:
9339 case GE_EXPR:
9340 case EQ_EXPR:
9341 case NE_EXPR:
9342 case UNORDERED_EXPR:
9343 case ORDERED_EXPR:
9344 case UNLT_EXPR:
9345 case UNLE_EXPR:
9346 case UNGT_EXPR:
9347 case UNGE_EXPR:
9348 case UNEQ_EXPR:
9349 case LTGT_EXPR:
9351 temp = do_store_flag (ops,
9352 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9353 tmode != VOIDmode ? tmode : mode);
9354 if (temp)
9355 return temp;
9357 /* Use a compare and a jump for BLKmode comparisons, or for function
9358 type comparisons is have_canonicalize_funcptr_for_compare. */
9360 if ((target == 0
9361 || modifier == EXPAND_STACK_PARM
9362 || ! safe_from_p (target, treeop0, 1)
9363 || ! safe_from_p (target, treeop1, 1)
9364 /* Make sure we don't have a hard reg (such as function's return
9365 value) live across basic blocks, if not optimizing. */
9366 || (!optimize && REG_P (target)
9367 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9368 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9370 emit_move_insn (target, const0_rtx);
9372 rtx_code_label *lab1 = gen_label_rtx ();
9373 jumpifnot_1 (code, treeop0, treeop1, lab1,
9374 profile_probability::uninitialized ());
9376 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9377 emit_move_insn (target, constm1_rtx);
9378 else
9379 emit_move_insn (target, const1_rtx);
9381 emit_label (lab1);
9382 return target;
9384 case COMPLEX_EXPR:
9385 /* Get the rtx code of the operands. */
9386 op0 = expand_normal (treeop0);
9387 op1 = expand_normal (treeop1);
9389 if (!target)
9390 target = gen_reg_rtx (TYPE_MODE (type));
9391 else
9392 /* If target overlaps with op1, then either we need to force
9393 op1 into a pseudo (if target also overlaps with op0),
9394 or write the complex parts in reverse order. */
9395 switch (GET_CODE (target))
9397 case CONCAT:
9398 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9400 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9402 complex_expr_force_op1:
9403 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9404 emit_move_insn (temp, op1);
9405 op1 = temp;
9406 break;
9408 complex_expr_swap_order:
9409 /* Move the imaginary (op1) and real (op0) parts to their
9410 location. */
9411 write_complex_part (target, op1, true);
9412 write_complex_part (target, op0, false);
9414 return target;
9416 break;
9417 case MEM:
9418 temp = adjust_address_nv (target,
9419 GET_MODE_INNER (GET_MODE (target)), 0);
9420 if (reg_overlap_mentioned_p (temp, op1))
9422 scalar_mode imode = GET_MODE_INNER (GET_MODE (target));
9423 temp = adjust_address_nv (target, imode,
9424 GET_MODE_SIZE (imode));
9425 if (reg_overlap_mentioned_p (temp, op0))
9426 goto complex_expr_force_op1;
9427 goto complex_expr_swap_order;
9429 break;
9430 default:
9431 if (reg_overlap_mentioned_p (target, op1))
9433 if (reg_overlap_mentioned_p (target, op0))
9434 goto complex_expr_force_op1;
9435 goto complex_expr_swap_order;
9437 break;
9440 /* Move the real (op0) and imaginary (op1) parts to their location. */
9441 write_complex_part (target, op0, false);
9442 write_complex_part (target, op1, true);
9444 return target;
9446 case WIDEN_SUM_EXPR:
9448 tree oprnd0 = treeop0;
9449 tree oprnd1 = treeop1;
9451 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9452 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9453 target, unsignedp);
9454 return target;
9457 case VEC_UNPACK_HI_EXPR:
9458 case VEC_UNPACK_LO_EXPR:
9459 case VEC_UNPACK_FIX_TRUNC_HI_EXPR:
9460 case VEC_UNPACK_FIX_TRUNC_LO_EXPR:
9462 op0 = expand_normal (treeop0);
9463 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9464 target, unsignedp);
9465 gcc_assert (temp);
9466 return temp;
9469 case VEC_UNPACK_FLOAT_HI_EXPR:
9470 case VEC_UNPACK_FLOAT_LO_EXPR:
9472 op0 = expand_normal (treeop0);
9473 /* The signedness is determined from input operand. */
9474 temp = expand_widen_pattern_expr
9475 (ops, op0, NULL_RTX, NULL_RTX,
9476 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9478 gcc_assert (temp);
9479 return temp;
9482 case VEC_WIDEN_MULT_HI_EXPR:
9483 case VEC_WIDEN_MULT_LO_EXPR:
9484 case VEC_WIDEN_MULT_EVEN_EXPR:
9485 case VEC_WIDEN_MULT_ODD_EXPR:
9486 case VEC_WIDEN_LSHIFT_HI_EXPR:
9487 case VEC_WIDEN_LSHIFT_LO_EXPR:
9488 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9489 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9490 target, unsignedp);
9491 gcc_assert (target);
9492 return target;
9494 case VEC_PACK_TRUNC_EXPR:
9495 case VEC_PACK_SAT_EXPR:
9496 case VEC_PACK_FIX_TRUNC_EXPR:
9497 mode = TYPE_MODE (TREE_TYPE (treeop0));
9498 goto binop;
9500 case VEC_PACK_FLOAT_EXPR:
9501 mode = TYPE_MODE (TREE_TYPE (treeop0));
9502 expand_operands (treeop0, treeop1,
9503 subtarget, &op0, &op1, EXPAND_NORMAL);
9504 this_optab = optab_for_tree_code (code, TREE_TYPE (treeop0),
9505 optab_default);
9506 target = expand_binop (mode, this_optab, op0, op1, target,
9507 TYPE_UNSIGNED (TREE_TYPE (treeop0)),
9508 OPTAB_LIB_WIDEN);
9509 gcc_assert (target);
9510 return target;
9512 case VEC_PERM_EXPR:
9514 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9515 vec_perm_builder sel;
9516 if (TREE_CODE (treeop2) == VECTOR_CST
9517 && tree_to_vec_perm_builder (&sel, treeop2))
9519 machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2));
9520 temp = expand_vec_perm_const (mode, op0, op1, sel,
9521 sel_mode, target);
9523 else
9525 op2 = expand_normal (treeop2);
9526 temp = expand_vec_perm_var (mode, op0, op1, op2, target);
9528 gcc_assert (temp);
9529 return temp;
9532 case DOT_PROD_EXPR:
9534 tree oprnd0 = treeop0;
9535 tree oprnd1 = treeop1;
9536 tree oprnd2 = treeop2;
9537 rtx op2;
9539 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9540 op2 = expand_normal (oprnd2);
9541 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9542 target, unsignedp);
9543 return target;
9546 case SAD_EXPR:
9548 tree oprnd0 = treeop0;
9549 tree oprnd1 = treeop1;
9550 tree oprnd2 = treeop2;
9551 rtx op2;
9553 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9554 op2 = expand_normal (oprnd2);
9555 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9556 target, unsignedp);
9557 return target;
9560 case REALIGN_LOAD_EXPR:
9562 tree oprnd0 = treeop0;
9563 tree oprnd1 = treeop1;
9564 tree oprnd2 = treeop2;
9565 rtx op2;
9567 this_optab = optab_for_tree_code (code, type, optab_default);
9568 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9569 op2 = expand_normal (oprnd2);
9570 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9571 target, unsignedp);
9572 gcc_assert (temp);
9573 return temp;
9576 case COND_EXPR:
9578 /* A COND_EXPR with its type being VOID_TYPE represents a
9579 conditional jump and is handled in
9580 expand_gimple_cond_expr. */
9581 gcc_assert (!VOID_TYPE_P (type));
9583 /* Note that COND_EXPRs whose type is a structure or union
9584 are required to be constructed to contain assignments of
9585 a temporary variable, so that we can evaluate them here
9586 for side effect only. If type is void, we must do likewise. */
9588 gcc_assert (!TREE_ADDRESSABLE (type)
9589 && !ignore
9590 && TREE_TYPE (treeop1) != void_type_node
9591 && TREE_TYPE (treeop2) != void_type_node);
9593 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9594 if (temp)
9595 return temp;
9597 /* If we are not to produce a result, we have no target. Otherwise,
9598 if a target was specified use it; it will not be used as an
9599 intermediate target unless it is safe. If no target, use a
9600 temporary. */
9602 if (modifier != EXPAND_STACK_PARM
9603 && original_target
9604 && safe_from_p (original_target, treeop0, 1)
9605 && GET_MODE (original_target) == mode
9606 && !MEM_P (original_target))
9607 temp = original_target;
9608 else
9609 temp = assign_temp (type, 0, 1);
9611 do_pending_stack_adjust ();
9612 NO_DEFER_POP;
9613 rtx_code_label *lab0 = gen_label_rtx ();
9614 rtx_code_label *lab1 = gen_label_rtx ();
9615 jumpifnot (treeop0, lab0,
9616 profile_probability::uninitialized ());
9617 store_expr (treeop1, temp,
9618 modifier == EXPAND_STACK_PARM,
9619 false, false);
9621 emit_jump_insn (targetm.gen_jump (lab1));
9622 emit_barrier ();
9623 emit_label (lab0);
9624 store_expr (treeop2, temp,
9625 modifier == EXPAND_STACK_PARM,
9626 false, false);
9628 emit_label (lab1);
9629 OK_DEFER_POP;
9630 return temp;
9633 case VEC_COND_EXPR:
9634 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9635 return target;
9637 case VEC_DUPLICATE_EXPR:
9638 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
9639 target = expand_vector_broadcast (mode, op0);
9640 gcc_assert (target);
9641 return target;
9643 case VEC_SERIES_EXPR:
9644 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, modifier);
9645 return expand_vec_series_expr (mode, op0, op1, target);
9647 case BIT_INSERT_EXPR:
9649 unsigned bitpos = tree_to_uhwi (treeop2);
9650 unsigned bitsize;
9651 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1)))
9652 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1));
9653 else
9654 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1)));
9655 rtx op0 = expand_normal (treeop0);
9656 rtx op1 = expand_normal (treeop1);
9657 rtx dst = gen_reg_rtx (mode);
9658 emit_move_insn (dst, op0);
9659 store_bit_field (dst, bitsize, bitpos, 0, 0,
9660 TYPE_MODE (TREE_TYPE (treeop1)), op1, false);
9661 return dst;
9664 default:
9665 gcc_unreachable ();
9668 /* Here to do an ordinary binary operator. */
9669 binop:
9670 expand_operands (treeop0, treeop1,
9671 subtarget, &op0, &op1, EXPAND_NORMAL);
9672 binop2:
9673 this_optab = optab_for_tree_code (code, type, optab_default);
9674 binop3:
9675 if (modifier == EXPAND_STACK_PARM)
9676 target = 0;
9677 temp = expand_binop (mode, this_optab, op0, op1, target,
9678 unsignedp, OPTAB_LIB_WIDEN);
9679 gcc_assert (temp);
9680 /* Bitwise operations do not need bitfield reduction as we expect their
9681 operands being properly truncated. */
9682 if (code == BIT_XOR_EXPR
9683 || code == BIT_AND_EXPR
9684 || code == BIT_IOR_EXPR)
9685 return temp;
9686 return REDUCE_BIT_FIELD (temp);
9688 #undef REDUCE_BIT_FIELD
9691 /* Return TRUE if expression STMT is suitable for replacement.
9692 Never consider memory loads as replaceable, because those don't ever lead
9693 into constant expressions. */
9695 static bool
9696 stmt_is_replaceable_p (gimple *stmt)
9698 if (ssa_is_replaceable_p (stmt))
9700 /* Don't move around loads. */
9701 if (!gimple_assign_single_p (stmt)
9702 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9703 return true;
9705 return false;
9709 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9710 enum expand_modifier modifier, rtx *alt_rtl,
9711 bool inner_reference_p)
9713 rtx op0, op1, temp, decl_rtl;
9714 tree type;
9715 int unsignedp;
9716 machine_mode mode, dmode;
9717 enum tree_code code = TREE_CODE (exp);
9718 rtx subtarget, original_target;
9719 int ignore;
9720 tree context;
9721 bool reduce_bit_field;
9722 location_t loc = EXPR_LOCATION (exp);
9723 struct separate_ops ops;
9724 tree treeop0, treeop1, treeop2;
9725 tree ssa_name = NULL_TREE;
9726 gimple *g;
9728 type = TREE_TYPE (exp);
9729 mode = TYPE_MODE (type);
9730 unsignedp = TYPE_UNSIGNED (type);
9732 treeop0 = treeop1 = treeop2 = NULL_TREE;
9733 if (!VL_EXP_CLASS_P (exp))
9734 switch (TREE_CODE_LENGTH (code))
9736 default:
9737 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */
9738 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */
9739 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */
9740 case 0: break;
9742 ops.code = code;
9743 ops.type = type;
9744 ops.op0 = treeop0;
9745 ops.op1 = treeop1;
9746 ops.op2 = treeop2;
9747 ops.location = loc;
9749 ignore = (target == const0_rtx
9750 || ((CONVERT_EXPR_CODE_P (code)
9751 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9752 && TREE_CODE (type) == VOID_TYPE));
9754 /* An operation in what may be a bit-field type needs the
9755 result to be reduced to the precision of the bit-field type,
9756 which is narrower than that of the type's mode. */
9757 reduce_bit_field = (!ignore
9758 && INTEGRAL_TYPE_P (type)
9759 && !type_has_mode_precision_p (type));
9761 /* If we are going to ignore this result, we need only do something
9762 if there is a side-effect somewhere in the expression. If there
9763 is, short-circuit the most common cases here. Note that we must
9764 not call expand_expr with anything but const0_rtx in case this
9765 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9767 if (ignore)
9769 if (! TREE_SIDE_EFFECTS (exp))
9770 return const0_rtx;
9772 /* Ensure we reference a volatile object even if value is ignored, but
9773 don't do this if all we are doing is taking its address. */
9774 if (TREE_THIS_VOLATILE (exp)
9775 && TREE_CODE (exp) != FUNCTION_DECL
9776 && mode != VOIDmode && mode != BLKmode
9777 && modifier != EXPAND_CONST_ADDRESS)
9779 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9780 if (MEM_P (temp))
9781 copy_to_reg (temp);
9782 return const0_rtx;
9785 if (TREE_CODE_CLASS (code) == tcc_unary
9786 || code == BIT_FIELD_REF
9787 || code == COMPONENT_REF
9788 || code == INDIRECT_REF)
9789 return expand_expr (treeop0, const0_rtx, VOIDmode,
9790 modifier);
9792 else if (TREE_CODE_CLASS (code) == tcc_binary
9793 || TREE_CODE_CLASS (code) == tcc_comparison
9794 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9796 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9797 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9798 return const0_rtx;
9801 target = 0;
9804 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9805 target = 0;
9807 /* Use subtarget as the target for operand 0 of a binary operation. */
9808 subtarget = get_subtarget (target);
9809 original_target = target;
9811 switch (code)
9813 case LABEL_DECL:
9815 tree function = decl_function_context (exp);
9817 temp = label_rtx (exp);
9818 temp = gen_rtx_LABEL_REF (Pmode, temp);
9820 if (function != current_function_decl
9821 && function != 0)
9822 LABEL_REF_NONLOCAL_P (temp) = 1;
9824 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9825 return temp;
9828 case SSA_NAME:
9829 /* ??? ivopts calls expander, without any preparation from
9830 out-of-ssa. So fake instructions as if this was an access to the
9831 base variable. This unnecessarily allocates a pseudo, see how we can
9832 reuse it, if partition base vars have it set already. */
9833 if (!currently_expanding_to_rtl)
9835 tree var = SSA_NAME_VAR (exp);
9836 if (var && DECL_RTL_SET_P (var))
9837 return DECL_RTL (var);
9838 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9839 LAST_VIRTUAL_REGISTER + 1);
9842 g = get_gimple_for_ssa_name (exp);
9843 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9844 if (g == NULL
9845 && modifier == EXPAND_INITIALIZER
9846 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9847 && (optimize || !SSA_NAME_VAR (exp)
9848 || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9849 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9850 g = SSA_NAME_DEF_STMT (exp);
9851 if (g)
9853 rtx r;
9854 location_t saved_loc = curr_insn_location ();
9855 location_t loc = gimple_location (g);
9856 if (loc != UNKNOWN_LOCATION)
9857 set_curr_insn_location (loc);
9858 ops.code = gimple_assign_rhs_code (g);
9859 switch (get_gimple_rhs_class (ops.code))
9861 case GIMPLE_TERNARY_RHS:
9862 ops.op2 = gimple_assign_rhs3 (g);
9863 /* Fallthru */
9864 case GIMPLE_BINARY_RHS:
9865 ops.op1 = gimple_assign_rhs2 (g);
9867 /* Try to expand conditonal compare. */
9868 if (targetm.gen_ccmp_first)
9870 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9871 r = expand_ccmp_expr (g, mode);
9872 if (r)
9873 break;
9875 /* Fallthru */
9876 case GIMPLE_UNARY_RHS:
9877 ops.op0 = gimple_assign_rhs1 (g);
9878 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9879 ops.location = loc;
9880 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9881 break;
9882 case GIMPLE_SINGLE_RHS:
9884 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9885 tmode, modifier, alt_rtl,
9886 inner_reference_p);
9887 break;
9889 default:
9890 gcc_unreachable ();
9892 set_curr_insn_location (saved_loc);
9893 if (REG_P (r) && !REG_EXPR (r))
9894 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9895 return r;
9898 ssa_name = exp;
9899 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9900 exp = SSA_NAME_VAR (ssa_name);
9901 goto expand_decl_rtl;
9903 case PARM_DECL:
9904 case VAR_DECL:
9905 /* If a static var's type was incomplete when the decl was written,
9906 but the type is complete now, lay out the decl now. */
9907 if (DECL_SIZE (exp) == 0
9908 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9909 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9910 layout_decl (exp, 0);
9912 /* fall through */
9914 case FUNCTION_DECL:
9915 case RESULT_DECL:
9916 decl_rtl = DECL_RTL (exp);
9917 expand_decl_rtl:
9918 gcc_assert (decl_rtl);
9920 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9921 settings for VECTOR_TYPE_P that might switch for the function. */
9922 if (currently_expanding_to_rtl
9923 && code == VAR_DECL && MEM_P (decl_rtl)
9924 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
9925 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
9926 else
9927 decl_rtl = copy_rtx (decl_rtl);
9929 /* Record writes to register variables. */
9930 if (modifier == EXPAND_WRITE
9931 && REG_P (decl_rtl)
9932 && HARD_REGISTER_P (decl_rtl))
9933 add_to_hard_reg_set (&crtl->asm_clobbers,
9934 GET_MODE (decl_rtl), REGNO (decl_rtl));
9936 /* Ensure variable marked as used even if it doesn't go through
9937 a parser. If it hasn't be used yet, write out an external
9938 definition. */
9939 if (exp)
9940 TREE_USED (exp) = 1;
9942 /* Show we haven't gotten RTL for this yet. */
9943 temp = 0;
9945 /* Variables inherited from containing functions should have
9946 been lowered by this point. */
9947 if (exp)
9948 context = decl_function_context (exp);
9949 gcc_assert (!exp
9950 || SCOPE_FILE_SCOPE_P (context)
9951 || context == current_function_decl
9952 || TREE_STATIC (exp)
9953 || DECL_EXTERNAL (exp)
9954 /* ??? C++ creates functions that are not TREE_STATIC. */
9955 || TREE_CODE (exp) == FUNCTION_DECL);
9957 /* This is the case of an array whose size is to be determined
9958 from its initializer, while the initializer is still being parsed.
9959 ??? We aren't parsing while expanding anymore. */
9961 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9962 temp = validize_mem (decl_rtl);
9964 /* If DECL_RTL is memory, we are in the normal case and the
9965 address is not valid, get the address into a register. */
9967 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9969 if (alt_rtl)
9970 *alt_rtl = decl_rtl;
9971 decl_rtl = use_anchored_address (decl_rtl);
9972 if (modifier != EXPAND_CONST_ADDRESS
9973 && modifier != EXPAND_SUM
9974 && !memory_address_addr_space_p (exp ? DECL_MODE (exp)
9975 : GET_MODE (decl_rtl),
9976 XEXP (decl_rtl, 0),
9977 MEM_ADDR_SPACE (decl_rtl)))
9978 temp = replace_equiv_address (decl_rtl,
9979 copy_rtx (XEXP (decl_rtl, 0)));
9982 /* If we got something, return it. But first, set the alignment
9983 if the address is a register. */
9984 if (temp != 0)
9986 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0)))
9987 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9989 return temp;
9992 if (exp)
9993 dmode = DECL_MODE (exp);
9994 else
9995 dmode = TYPE_MODE (TREE_TYPE (ssa_name));
9997 /* If the mode of DECL_RTL does not match that of the decl,
9998 there are two cases: we are dealing with a BLKmode value
9999 that is returned in a register, or we are dealing with
10000 a promoted value. In the latter case, return a SUBREG
10001 of the wanted mode, but mark it so that we know that it
10002 was already extended. */
10003 if (REG_P (decl_rtl)
10004 && dmode != BLKmode
10005 && GET_MODE (decl_rtl) != dmode)
10007 machine_mode pmode;
10009 /* Get the signedness to be used for this variable. Ensure we get
10010 the same mode we got when the variable was declared. */
10011 if (code != SSA_NAME)
10012 pmode = promote_decl_mode (exp, &unsignedp);
10013 else if ((g = SSA_NAME_DEF_STMT (ssa_name))
10014 && gimple_code (g) == GIMPLE_CALL
10015 && !gimple_call_internal_p (g))
10016 pmode = promote_function_mode (type, mode, &unsignedp,
10017 gimple_call_fntype (g),
10019 else
10020 pmode = promote_ssa_mode (ssa_name, &unsignedp);
10021 gcc_assert (GET_MODE (decl_rtl) == pmode);
10023 temp = gen_lowpart_SUBREG (mode, decl_rtl);
10024 SUBREG_PROMOTED_VAR_P (temp) = 1;
10025 SUBREG_PROMOTED_SET (temp, unsignedp);
10026 return temp;
10029 return decl_rtl;
10031 case INTEGER_CST:
10033 /* Given that TYPE_PRECISION (type) is not always equal to
10034 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10035 the former to the latter according to the signedness of the
10036 type. */
10037 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type);
10038 temp = immed_wide_int_const
10039 (wi::to_wide (exp, GET_MODE_PRECISION (mode)), mode);
10040 return temp;
10043 case VECTOR_CST:
10045 tree tmp = NULL_TREE;
10046 if (VECTOR_MODE_P (mode))
10047 return const_vector_from_tree (exp);
10048 scalar_int_mode int_mode;
10049 if (is_int_mode (mode, &int_mode))
10051 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
10052 return const_scalar_mask_from_tree (int_mode, exp);
10053 else
10055 tree type_for_mode
10056 = lang_hooks.types.type_for_mode (int_mode, 1);
10057 if (type_for_mode)
10058 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR,
10059 type_for_mode, exp);
10062 if (!tmp)
10064 vec<constructor_elt, va_gc> *v;
10065 /* Constructors need to be fixed-length. FIXME. */
10066 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
10067 vec_alloc (v, nunits);
10068 for (unsigned int i = 0; i < nunits; ++i)
10069 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
10070 tmp = build_constructor (type, v);
10072 return expand_expr (tmp, ignore ? const0_rtx : target,
10073 tmode, modifier);
10076 case CONST_DECL:
10077 if (modifier == EXPAND_WRITE)
10079 /* Writing into CONST_DECL is always invalid, but handle it
10080 gracefully. */
10081 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
10082 scalar_int_mode address_mode = targetm.addr_space.address_mode (as);
10083 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode,
10084 EXPAND_NORMAL, as);
10085 op0 = memory_address_addr_space (mode, op0, as);
10086 temp = gen_rtx_MEM (mode, op0);
10087 set_mem_addr_space (temp, as);
10088 return temp;
10090 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
10092 case REAL_CST:
10093 /* If optimized, generate immediate CONST_DOUBLE
10094 which will be turned into memory by reload if necessary.
10096 We used to force a register so that loop.c could see it. But
10097 this does not allow gen_* patterns to perform optimizations with
10098 the constants. It also produces two insns in cases like "x = 1.0;".
10099 On most machines, floating-point constants are not permitted in
10100 many insns, so we'd end up copying it to a register in any case.
10102 Now, we do the copying in expand_binop, if appropriate. */
10103 return const_double_from_real_value (TREE_REAL_CST (exp),
10104 TYPE_MODE (TREE_TYPE (exp)));
10106 case FIXED_CST:
10107 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
10108 TYPE_MODE (TREE_TYPE (exp)));
10110 case COMPLEX_CST:
10111 /* Handle evaluating a complex constant in a CONCAT target. */
10112 if (original_target && GET_CODE (original_target) == CONCAT)
10114 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
10115 rtx rtarg, itarg;
10117 rtarg = XEXP (original_target, 0);
10118 itarg = XEXP (original_target, 1);
10120 /* Move the real and imaginary parts separately. */
10121 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
10122 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
10124 if (op0 != rtarg)
10125 emit_move_insn (rtarg, op0);
10126 if (op1 != itarg)
10127 emit_move_insn (itarg, op1);
10129 return original_target;
10132 /* fall through */
10134 case STRING_CST:
10135 temp = expand_expr_constant (exp, 1, modifier);
10137 /* temp contains a constant address.
10138 On RISC machines where a constant address isn't valid,
10139 make some insns to get that address into a register. */
10140 if (modifier != EXPAND_CONST_ADDRESS
10141 && modifier != EXPAND_INITIALIZER
10142 && modifier != EXPAND_SUM
10143 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
10144 MEM_ADDR_SPACE (temp)))
10145 return replace_equiv_address (temp,
10146 copy_rtx (XEXP (temp, 0)));
10147 return temp;
10149 case POLY_INT_CST:
10150 return immed_wide_int_const (poly_int_cst_value (exp), mode);
10152 case SAVE_EXPR:
10154 tree val = treeop0;
10155 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
10156 inner_reference_p);
10158 if (!SAVE_EXPR_RESOLVED_P (exp))
10160 /* We can indeed still hit this case, typically via builtin
10161 expanders calling save_expr immediately before expanding
10162 something. Assume this means that we only have to deal
10163 with non-BLKmode values. */
10164 gcc_assert (GET_MODE (ret) != BLKmode);
10166 val = build_decl (curr_insn_location (),
10167 VAR_DECL, NULL, TREE_TYPE (exp));
10168 DECL_ARTIFICIAL (val) = 1;
10169 DECL_IGNORED_P (val) = 1;
10170 treeop0 = val;
10171 TREE_OPERAND (exp, 0) = treeop0;
10172 SAVE_EXPR_RESOLVED_P (exp) = 1;
10174 if (!CONSTANT_P (ret))
10175 ret = copy_to_reg (ret);
10176 SET_DECL_RTL (val, ret);
10179 return ret;
10183 case CONSTRUCTOR:
10184 /* If we don't need the result, just ensure we evaluate any
10185 subexpressions. */
10186 if (ignore)
10188 unsigned HOST_WIDE_INT idx;
10189 tree value;
10191 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
10192 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
10194 return const0_rtx;
10197 return expand_constructor (exp, target, modifier, false);
10199 case TARGET_MEM_REF:
10201 addr_space_t as
10202 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10203 enum insn_code icode;
10204 unsigned int align;
10206 op0 = addr_for_mem_ref (exp, as, true);
10207 op0 = memory_address_addr_space (mode, op0, as);
10208 temp = gen_rtx_MEM (mode, op0);
10209 set_mem_attributes (temp, exp, 0);
10210 set_mem_addr_space (temp, as);
10211 align = get_object_alignment (exp);
10212 if (modifier != EXPAND_WRITE
10213 && modifier != EXPAND_MEMORY
10214 && mode != BLKmode
10215 && align < GET_MODE_ALIGNMENT (mode)
10216 /* If the target does not have special handling for unaligned
10217 loads of mode then it can use regular moves for them. */
10218 && ((icode = optab_handler (movmisalign_optab, mode))
10219 != CODE_FOR_nothing))
10221 struct expand_operand ops[2];
10223 /* We've already validated the memory, and we're creating a
10224 new pseudo destination. The predicates really can't fail,
10225 nor can the generator. */
10226 create_output_operand (&ops[0], NULL_RTX, mode);
10227 create_fixed_operand (&ops[1], temp);
10228 expand_insn (icode, 2, ops);
10229 temp = ops[0].value;
10231 return temp;
10234 case MEM_REF:
10236 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp);
10237 addr_space_t as
10238 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10239 machine_mode address_mode;
10240 tree base = TREE_OPERAND (exp, 0);
10241 gimple *def_stmt;
10242 enum insn_code icode;
10243 unsigned align;
10244 /* Handle expansion of non-aliased memory with non-BLKmode. That
10245 might end up in a register. */
10246 if (mem_ref_refers_to_non_mem_p (exp))
10248 poly_int64 offset = mem_ref_offset (exp).force_shwi ();
10249 base = TREE_OPERAND (base, 0);
10250 poly_uint64 type_size;
10251 if (known_eq (offset, 0)
10252 && !reverse
10253 && poly_int_tree_p (TYPE_SIZE (type), &type_size)
10254 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)), type_size))
10255 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
10256 target, tmode, modifier);
10257 if (TYPE_MODE (type) == BLKmode)
10259 temp = assign_stack_temp (DECL_MODE (base),
10260 GET_MODE_SIZE (DECL_MODE (base)));
10261 store_expr (base, temp, 0, false, false);
10262 temp = adjust_address (temp, BLKmode, offset);
10263 set_mem_size (temp, int_size_in_bytes (type));
10264 return temp;
10266 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
10267 bitsize_int (offset * BITS_PER_UNIT));
10268 REF_REVERSE_STORAGE_ORDER (exp) = reverse;
10269 return expand_expr (exp, target, tmode, modifier);
10271 address_mode = targetm.addr_space.address_mode (as);
10272 base = TREE_OPERAND (exp, 0);
10273 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
10275 tree mask = gimple_assign_rhs2 (def_stmt);
10276 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
10277 gimple_assign_rhs1 (def_stmt), mask);
10278 TREE_OPERAND (exp, 0) = base;
10280 align = get_object_alignment (exp);
10281 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
10282 op0 = memory_address_addr_space (mode, op0, as);
10283 if (!integer_zerop (TREE_OPERAND (exp, 1)))
10285 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
10286 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
10287 op0 = memory_address_addr_space (mode, op0, as);
10289 temp = gen_rtx_MEM (mode, op0);
10290 set_mem_attributes (temp, exp, 0);
10291 set_mem_addr_space (temp, as);
10292 if (TREE_THIS_VOLATILE (exp))
10293 MEM_VOLATILE_P (temp) = 1;
10294 if (modifier != EXPAND_WRITE
10295 && modifier != EXPAND_MEMORY
10296 && !inner_reference_p
10297 && mode != BLKmode
10298 && align < GET_MODE_ALIGNMENT (mode))
10300 if ((icode = optab_handler (movmisalign_optab, mode))
10301 != CODE_FOR_nothing)
10303 struct expand_operand ops[2];
10305 /* We've already validated the memory, and we're creating a
10306 new pseudo destination. The predicates really can't fail,
10307 nor can the generator. */
10308 create_output_operand (&ops[0], NULL_RTX, mode);
10309 create_fixed_operand (&ops[1], temp);
10310 expand_insn (icode, 2, ops);
10311 temp = ops[0].value;
10313 else if (targetm.slow_unaligned_access (mode, align))
10314 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
10315 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
10316 (modifier == EXPAND_STACK_PARM
10317 ? NULL_RTX : target),
10318 mode, mode, false, alt_rtl);
10320 if (reverse
10321 && modifier != EXPAND_MEMORY
10322 && modifier != EXPAND_WRITE)
10323 temp = flip_storage_order (mode, temp);
10324 return temp;
10327 case ARRAY_REF:
10330 tree array = treeop0;
10331 tree index = treeop1;
10332 tree init;
10334 /* Fold an expression like: "foo"[2].
10335 This is not done in fold so it won't happen inside &.
10336 Don't fold if this is for wide characters since it's too
10337 difficult to do correctly and this is a very rare case. */
10339 if (modifier != EXPAND_CONST_ADDRESS
10340 && modifier != EXPAND_INITIALIZER
10341 && modifier != EXPAND_MEMORY)
10343 tree t = fold_read_from_constant_string (exp);
10345 if (t)
10346 return expand_expr (t, target, tmode, modifier);
10349 /* If this is a constant index into a constant array,
10350 just get the value from the array. Handle both the cases when
10351 we have an explicit constructor and when our operand is a variable
10352 that was declared const. */
10354 if (modifier != EXPAND_CONST_ADDRESS
10355 && modifier != EXPAND_INITIALIZER
10356 && modifier != EXPAND_MEMORY
10357 && TREE_CODE (array) == CONSTRUCTOR
10358 && ! TREE_SIDE_EFFECTS (array)
10359 && TREE_CODE (index) == INTEGER_CST)
10361 unsigned HOST_WIDE_INT ix;
10362 tree field, value;
10364 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10365 field, value)
10366 if (tree_int_cst_equal (field, index))
10368 if (!TREE_SIDE_EFFECTS (value))
10369 return expand_expr (fold (value), target, tmode, modifier);
10370 break;
10374 else if (optimize >= 1
10375 && modifier != EXPAND_CONST_ADDRESS
10376 && modifier != EXPAND_INITIALIZER
10377 && modifier != EXPAND_MEMORY
10378 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10379 && TREE_CODE (index) == INTEGER_CST
10380 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
10381 && (init = ctor_for_folding (array)) != error_mark_node)
10383 if (init == NULL_TREE)
10385 tree value = build_zero_cst (type);
10386 if (TREE_CODE (value) == CONSTRUCTOR)
10388 /* If VALUE is a CONSTRUCTOR, this optimization is only
10389 useful if this doesn't store the CONSTRUCTOR into
10390 memory. If it does, it is more efficient to just
10391 load the data from the array directly. */
10392 rtx ret = expand_constructor (value, target,
10393 modifier, true);
10394 if (ret == NULL_RTX)
10395 value = NULL_TREE;
10398 if (value)
10399 return expand_expr (value, target, tmode, modifier);
10401 else if (TREE_CODE (init) == CONSTRUCTOR)
10403 unsigned HOST_WIDE_INT ix;
10404 tree field, value;
10406 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10407 field, value)
10408 if (tree_int_cst_equal (field, index))
10410 if (TREE_SIDE_EFFECTS (value))
10411 break;
10413 if (TREE_CODE (value) == CONSTRUCTOR)
10415 /* If VALUE is a CONSTRUCTOR, this
10416 optimization is only useful if
10417 this doesn't store the CONSTRUCTOR
10418 into memory. If it does, it is more
10419 efficient to just load the data from
10420 the array directly. */
10421 rtx ret = expand_constructor (value, target,
10422 modifier, true);
10423 if (ret == NULL_RTX)
10424 break;
10427 return
10428 expand_expr (fold (value), target, tmode, modifier);
10431 else if (TREE_CODE (init) == STRING_CST)
10433 tree low_bound = array_ref_low_bound (exp);
10434 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10436 /* Optimize the special case of a zero lower bound.
10438 We convert the lower bound to sizetype to avoid problems
10439 with constant folding. E.g. suppose the lower bound is
10440 1 and its mode is QI. Without the conversion
10441 (ARRAY + (INDEX - (unsigned char)1))
10442 becomes
10443 (ARRAY + (-(unsigned char)1) + INDEX)
10444 which becomes
10445 (ARRAY + 255 + INDEX). Oops! */
10446 if (!integer_zerop (low_bound))
10447 index1 = size_diffop_loc (loc, index1,
10448 fold_convert_loc (loc, sizetype,
10449 low_bound));
10451 if (tree_fits_uhwi_p (index1)
10452 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10454 tree type = TREE_TYPE (TREE_TYPE (init));
10455 scalar_int_mode mode;
10457 if (is_int_mode (TYPE_MODE (type), &mode)
10458 && GET_MODE_SIZE (mode) == 1)
10459 return gen_int_mode (TREE_STRING_POINTER (init)
10460 [TREE_INT_CST_LOW (index1)],
10461 mode);
10466 goto normal_inner_ref;
10468 case COMPONENT_REF:
10469 /* If the operand is a CONSTRUCTOR, we can just extract the
10470 appropriate field if it is present. */
10471 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10473 unsigned HOST_WIDE_INT idx;
10474 tree field, value;
10475 scalar_int_mode field_mode;
10477 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10478 idx, field, value)
10479 if (field == treeop1
10480 /* We can normally use the value of the field in the
10481 CONSTRUCTOR. However, if this is a bitfield in
10482 an integral mode that we can fit in a HOST_WIDE_INT,
10483 we must mask only the number of bits in the bitfield,
10484 since this is done implicitly by the constructor. If
10485 the bitfield does not meet either of those conditions,
10486 we can't do this optimization. */
10487 && (! DECL_BIT_FIELD (field)
10488 || (is_int_mode (DECL_MODE (field), &field_mode)
10489 && (GET_MODE_PRECISION (field_mode)
10490 <= HOST_BITS_PER_WIDE_INT))))
10492 if (DECL_BIT_FIELD (field)
10493 && modifier == EXPAND_STACK_PARM)
10494 target = 0;
10495 op0 = expand_expr (value, target, tmode, modifier);
10496 if (DECL_BIT_FIELD (field))
10498 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10499 scalar_int_mode imode
10500 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field));
10502 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10504 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1,
10505 imode);
10506 op0 = expand_and (imode, op0, op1, target);
10508 else
10510 int count = GET_MODE_PRECISION (imode) - bitsize;
10512 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10513 target, 0);
10514 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10515 target, 0);
10519 return op0;
10522 goto normal_inner_ref;
10524 case BIT_FIELD_REF:
10525 case ARRAY_RANGE_REF:
10526 normal_inner_ref:
10528 machine_mode mode1, mode2;
10529 poly_int64 bitsize, bitpos, bytepos;
10530 tree offset;
10531 int reversep, volatilep = 0, must_force_mem;
10532 tree tem
10533 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
10534 &unsignedp, &reversep, &volatilep);
10535 rtx orig_op0, memloc;
10536 bool clear_mem_expr = false;
10538 /* If we got back the original object, something is wrong. Perhaps
10539 we are evaluating an expression too early. In any event, don't
10540 infinitely recurse. */
10541 gcc_assert (tem != exp);
10543 /* If TEM's type is a union of variable size, pass TARGET to the inner
10544 computation, since it will need a temporary and TARGET is known
10545 to have to do. This occurs in unchecked conversion in Ada. */
10546 orig_op0 = op0
10547 = expand_expr_real (tem,
10548 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10549 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10550 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10551 != INTEGER_CST)
10552 && modifier != EXPAND_STACK_PARM
10553 ? target : NULL_RTX),
10554 VOIDmode,
10555 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10556 NULL, true);
10558 /* If the field has a mode, we want to access it in the
10559 field's mode, not the computed mode.
10560 If a MEM has VOIDmode (external with incomplete type),
10561 use BLKmode for it instead. */
10562 if (MEM_P (op0))
10564 if (mode1 != VOIDmode)
10565 op0 = adjust_address (op0, mode1, 0);
10566 else if (GET_MODE (op0) == VOIDmode)
10567 op0 = adjust_address (op0, BLKmode, 0);
10570 mode2
10571 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10573 /* If we have either an offset, a BLKmode result, or a reference
10574 outside the underlying object, we must force it to memory.
10575 Such a case can occur in Ada if we have unchecked conversion
10576 of an expression from a scalar type to an aggregate type or
10577 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10578 passed a partially uninitialized object or a view-conversion
10579 to a larger size. */
10580 must_force_mem = (offset
10581 || mode1 == BLKmode
10582 || (mode == BLKmode
10583 && !int_mode_for_size (bitsize, 1).exists ())
10584 || maybe_gt (bitpos + bitsize,
10585 GET_MODE_BITSIZE (mode2)));
10587 /* Handle CONCAT first. */
10588 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10590 if (known_eq (bitpos, 0)
10591 && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0)))
10592 && COMPLEX_MODE_P (mode1)
10593 && COMPLEX_MODE_P (GET_MODE (op0))
10594 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1))
10595 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0)))))
10597 if (reversep)
10598 op0 = flip_storage_order (GET_MODE (op0), op0);
10599 if (mode1 != GET_MODE (op0))
10601 rtx parts[2];
10602 for (int i = 0; i < 2; i++)
10604 rtx op = read_complex_part (op0, i != 0);
10605 if (GET_CODE (op) == SUBREG)
10606 op = force_reg (GET_MODE (op), op);
10607 rtx temp = gen_lowpart_common (GET_MODE_INNER (mode1),
10608 op);
10609 if (temp)
10610 op = temp;
10611 else
10613 if (!REG_P (op) && !MEM_P (op))
10614 op = force_reg (GET_MODE (op), op);
10615 op = gen_lowpart (GET_MODE_INNER (mode1), op);
10617 parts[i] = op;
10619 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]);
10621 return op0;
10623 if (known_eq (bitpos, 0)
10624 && known_eq (bitsize,
10625 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10626 && maybe_ne (bitsize, 0))
10628 op0 = XEXP (op0, 0);
10629 mode2 = GET_MODE (op0);
10631 else if (known_eq (bitpos,
10632 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10633 && known_eq (bitsize,
10634 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))))
10635 && maybe_ne (bitpos, 0)
10636 && maybe_ne (bitsize, 0))
10638 op0 = XEXP (op0, 1);
10639 bitpos = 0;
10640 mode2 = GET_MODE (op0);
10642 else
10643 /* Otherwise force into memory. */
10644 must_force_mem = 1;
10647 /* If this is a constant, put it in a register if it is a legitimate
10648 constant and we don't need a memory reference. */
10649 if (CONSTANT_P (op0)
10650 && mode2 != BLKmode
10651 && targetm.legitimate_constant_p (mode2, op0)
10652 && !must_force_mem)
10653 op0 = force_reg (mode2, op0);
10655 /* Otherwise, if this is a constant, try to force it to the constant
10656 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10657 is a legitimate constant. */
10658 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10659 op0 = validize_mem (memloc);
10661 /* Otherwise, if this is a constant or the object is not in memory
10662 and need be, put it there. */
10663 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10665 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10666 emit_move_insn (memloc, op0);
10667 op0 = memloc;
10668 clear_mem_expr = true;
10671 if (offset)
10673 machine_mode address_mode;
10674 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10675 EXPAND_SUM);
10677 gcc_assert (MEM_P (op0));
10679 address_mode = get_address_mode (op0);
10680 if (GET_MODE (offset_rtx) != address_mode)
10682 /* We cannot be sure that the RTL in offset_rtx is valid outside
10683 of a memory address context, so force it into a register
10684 before attempting to convert it to the desired mode. */
10685 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10686 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10689 /* See the comment in expand_assignment for the rationale. */
10690 if (mode1 != VOIDmode
10691 && maybe_ne (bitpos, 0)
10692 && maybe_gt (bitsize, 0)
10693 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10694 && multiple_p (bitpos, bitsize)
10695 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
10696 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10698 op0 = adjust_address (op0, mode1, bytepos);
10699 bitpos = 0;
10702 op0 = offset_address (op0, offset_rtx,
10703 highest_pow2_factor (offset));
10706 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10707 record its alignment as BIGGEST_ALIGNMENT. */
10708 if (MEM_P (op0)
10709 && known_eq (bitpos, 0)
10710 && offset != 0
10711 && is_aligning_offset (offset, tem))
10712 set_mem_align (op0, BIGGEST_ALIGNMENT);
10714 /* Don't forget about volatility even if this is a bitfield. */
10715 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10717 if (op0 == orig_op0)
10718 op0 = copy_rtx (op0);
10720 MEM_VOLATILE_P (op0) = 1;
10723 /* In cases where an aligned union has an unaligned object
10724 as a field, we might be extracting a BLKmode value from
10725 an integer-mode (e.g., SImode) object. Handle this case
10726 by doing the extract into an object as wide as the field
10727 (which we know to be the width of a basic mode), then
10728 storing into memory, and changing the mode to BLKmode. */
10729 if (mode1 == VOIDmode
10730 || REG_P (op0) || GET_CODE (op0) == SUBREG
10731 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10732 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10733 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10734 && modifier != EXPAND_CONST_ADDRESS
10735 && modifier != EXPAND_INITIALIZER
10736 && modifier != EXPAND_MEMORY)
10737 /* If the bitfield is volatile and the bitsize
10738 is narrower than the access size of the bitfield,
10739 we need to extract bitfields from the access. */
10740 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10741 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10742 && mode1 != BLKmode
10743 && maybe_lt (bitsize, GET_MODE_SIZE (mode1) * BITS_PER_UNIT))
10744 /* If the field isn't aligned enough to fetch as a memref,
10745 fetch it as a bit field. */
10746 || (mode1 != BLKmode
10747 && (((MEM_P (op0)
10748 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10749 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode1))
10750 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10751 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
10752 && modifier != EXPAND_MEMORY
10753 && ((modifier == EXPAND_CONST_ADDRESS
10754 || modifier == EXPAND_INITIALIZER)
10755 ? STRICT_ALIGNMENT
10756 : targetm.slow_unaligned_access (mode1,
10757 MEM_ALIGN (op0))))
10758 || !multiple_p (bitpos, BITS_PER_UNIT)))
10759 /* If the type and the field are a constant size and the
10760 size of the type isn't the same size as the bitfield,
10761 we must use bitfield operations. */
10762 || (known_size_p (bitsize)
10763 && TYPE_SIZE (TREE_TYPE (exp))
10764 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
10765 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
10766 bitsize)))
10768 machine_mode ext_mode = mode;
10770 if (ext_mode == BLKmode
10771 && ! (target != 0 && MEM_P (op0)
10772 && MEM_P (target)
10773 && multiple_p (bitpos, BITS_PER_UNIT)))
10774 ext_mode = int_mode_for_size (bitsize, 1).else_blk ();
10776 if (ext_mode == BLKmode)
10778 if (target == 0)
10779 target = assign_temp (type, 1, 1);
10781 /* ??? Unlike the similar test a few lines below, this one is
10782 very likely obsolete. */
10783 if (known_eq (bitsize, 0))
10784 return target;
10786 /* In this case, BITPOS must start at a byte boundary and
10787 TARGET, if specified, must be a MEM. */
10788 gcc_assert (MEM_P (op0)
10789 && (!target || MEM_P (target)));
10791 bytepos = exact_div (bitpos, BITS_PER_UNIT);
10792 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
10793 emit_block_move (target,
10794 adjust_address (op0, VOIDmode, bytepos),
10795 gen_int_mode (bytesize, Pmode),
10796 (modifier == EXPAND_STACK_PARM
10797 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10799 return target;
10802 /* If we have nothing to extract, the result will be 0 for targets
10803 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10804 return 0 for the sake of consistency, as reading a zero-sized
10805 bitfield is valid in Ada and the value is fully specified. */
10806 if (known_eq (bitsize, 0))
10807 return const0_rtx;
10809 op0 = validize_mem (op0);
10811 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10812 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10814 /* If the result has a record type and the extraction is done in
10815 an integral mode, then the field may be not aligned on a byte
10816 boundary; in this case, if it has reverse storage order, it
10817 needs to be extracted as a scalar field with reverse storage
10818 order and put back into memory order afterwards. */
10819 if (TREE_CODE (type) == RECORD_TYPE
10820 && GET_MODE_CLASS (ext_mode) == MODE_INT)
10821 reversep = TYPE_REVERSE_STORAGE_ORDER (type);
10823 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10824 (modifier == EXPAND_STACK_PARM
10825 ? NULL_RTX : target),
10826 ext_mode, ext_mode, reversep, alt_rtl);
10828 /* If the result has a record type and the mode of OP0 is an
10829 integral mode then, if BITSIZE is narrower than this mode
10830 and this is for big-endian data, we must put the field
10831 into the high-order bits. And we must also put it back
10832 into memory order if it has been previously reversed. */
10833 scalar_int_mode op0_mode;
10834 if (TREE_CODE (type) == RECORD_TYPE
10835 && is_int_mode (GET_MODE (op0), &op0_mode))
10837 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode);
10839 gcc_checking_assert (known_le (bitsize, size));
10840 if (maybe_lt (bitsize, size)
10841 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
10842 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0,
10843 size - bitsize, op0, 1);
10845 if (reversep)
10846 op0 = flip_storage_order (op0_mode, op0);
10849 /* If the result type is BLKmode, store the data into a temporary
10850 of the appropriate type, but with the mode corresponding to the
10851 mode for the data we have (op0's mode). */
10852 if (mode == BLKmode)
10854 rtx new_rtx
10855 = assign_stack_temp_for_type (ext_mode,
10856 GET_MODE_BITSIZE (ext_mode),
10857 type);
10858 emit_move_insn (new_rtx, op0);
10859 op0 = copy_rtx (new_rtx);
10860 PUT_MODE (op0, BLKmode);
10863 return op0;
10866 /* If the result is BLKmode, use that to access the object
10867 now as well. */
10868 if (mode == BLKmode)
10869 mode1 = BLKmode;
10871 /* Get a reference to just this component. */
10872 bytepos = bits_to_bytes_round_down (bitpos);
10873 if (modifier == EXPAND_CONST_ADDRESS
10874 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10875 op0 = adjust_address_nv (op0, mode1, bytepos);
10876 else
10877 op0 = adjust_address (op0, mode1, bytepos);
10879 if (op0 == orig_op0)
10880 op0 = copy_rtx (op0);
10882 /* Don't set memory attributes if the base expression is
10883 SSA_NAME that got expanded as a MEM. In that case, we should
10884 just honor its original memory attributes. */
10885 if (TREE_CODE (tem) != SSA_NAME || !MEM_P (orig_op0))
10886 set_mem_attributes (op0, exp, 0);
10888 if (REG_P (XEXP (op0, 0)))
10889 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10891 /* If op0 is a temporary because the original expressions was forced
10892 to memory, clear MEM_EXPR so that the original expression cannot
10893 be marked as addressable through MEM_EXPR of the temporary. */
10894 if (clear_mem_expr)
10895 set_mem_expr (op0, NULL_TREE);
10897 MEM_VOLATILE_P (op0) |= volatilep;
10899 if (reversep
10900 && modifier != EXPAND_MEMORY
10901 && modifier != EXPAND_WRITE)
10902 op0 = flip_storage_order (mode1, op0);
10904 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10905 || modifier == EXPAND_CONST_ADDRESS
10906 || modifier == EXPAND_INITIALIZER)
10907 return op0;
10909 if (target == 0)
10910 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10912 convert_move (target, op0, unsignedp);
10913 return target;
10916 case OBJ_TYPE_REF:
10917 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10919 case CALL_EXPR:
10920 /* All valid uses of __builtin_va_arg_pack () are removed during
10921 inlining. */
10922 if (CALL_EXPR_VA_ARG_PACK (exp))
10923 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10925 tree fndecl = get_callee_fndecl (exp), attr;
10927 if (fndecl
10928 /* Don't diagnose the error attribute in thunks, those are
10929 artificially created. */
10930 && !CALL_FROM_THUNK_P (exp)
10931 && (attr = lookup_attribute ("error",
10932 DECL_ATTRIBUTES (fndecl))) != NULL)
10934 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
10935 error ("%Kcall to %qs declared with attribute error: %s", exp,
10936 identifier_to_locale (ident),
10937 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10939 if (fndecl
10940 /* Don't diagnose the warning attribute in thunks, those are
10941 artificially created. */
10942 && !CALL_FROM_THUNK_P (exp)
10943 && (attr = lookup_attribute ("warning",
10944 DECL_ATTRIBUTES (fndecl))) != NULL)
10946 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
10947 warning_at (tree_nonartificial_location (exp), 0,
10948 "%Kcall to %qs declared with attribute warning: %s",
10949 exp, identifier_to_locale (ident),
10950 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10953 /* Check for a built-in function. */
10954 if (fndecl && DECL_BUILT_IN (fndecl))
10956 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10957 if (CALL_WITH_BOUNDS_P (exp))
10958 return expand_builtin_with_bounds (exp, target, subtarget,
10959 tmode, ignore);
10960 else
10961 return expand_builtin (exp, target, subtarget, tmode, ignore);
10964 return expand_call (exp, target, ignore);
10966 case VIEW_CONVERT_EXPR:
10967 op0 = NULL_RTX;
10969 /* If we are converting to BLKmode, try to avoid an intermediate
10970 temporary by fetching an inner memory reference. */
10971 if (mode == BLKmode
10972 && poly_int_tree_p (TYPE_SIZE (type))
10973 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10974 && handled_component_p (treeop0))
10976 machine_mode mode1;
10977 poly_int64 bitsize, bitpos, bytepos;
10978 tree offset;
10979 int unsignedp, reversep, volatilep = 0;
10980 tree tem
10981 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1,
10982 &unsignedp, &reversep, &volatilep);
10983 rtx orig_op0;
10985 /* ??? We should work harder and deal with non-zero offsets. */
10986 if (!offset
10987 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10988 && !reversep
10989 && known_size_p (bitsize)
10990 && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize))
10992 /* See the normal_inner_ref case for the rationale. */
10993 orig_op0
10994 = expand_expr_real (tem,
10995 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10996 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10997 != INTEGER_CST)
10998 && modifier != EXPAND_STACK_PARM
10999 ? target : NULL_RTX),
11000 VOIDmode,
11001 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
11002 NULL, true);
11004 if (MEM_P (orig_op0))
11006 op0 = orig_op0;
11008 /* Get a reference to just this component. */
11009 if (modifier == EXPAND_CONST_ADDRESS
11010 || modifier == EXPAND_SUM
11011 || modifier == EXPAND_INITIALIZER)
11012 op0 = adjust_address_nv (op0, mode, bytepos);
11013 else
11014 op0 = adjust_address (op0, mode, bytepos);
11016 if (op0 == orig_op0)
11017 op0 = copy_rtx (op0);
11019 set_mem_attributes (op0, treeop0, 0);
11020 if (REG_P (XEXP (op0, 0)))
11021 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
11023 MEM_VOLATILE_P (op0) |= volatilep;
11028 if (!op0)
11029 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
11030 NULL, inner_reference_p);
11032 /* If the input and output modes are both the same, we are done. */
11033 if (mode == GET_MODE (op0))
11035 /* If neither mode is BLKmode, and both modes are the same size
11036 then we can use gen_lowpart. */
11037 else if (mode != BLKmode
11038 && GET_MODE (op0) != BLKmode
11039 && known_eq (GET_MODE_PRECISION (mode),
11040 GET_MODE_PRECISION (GET_MODE (op0)))
11041 && !COMPLEX_MODE_P (GET_MODE (op0)))
11043 if (GET_CODE (op0) == SUBREG)
11044 op0 = force_reg (GET_MODE (op0), op0);
11045 temp = gen_lowpart_common (mode, op0);
11046 if (temp)
11047 op0 = temp;
11048 else
11050 if (!REG_P (op0) && !MEM_P (op0))
11051 op0 = force_reg (GET_MODE (op0), op0);
11052 op0 = gen_lowpart (mode, op0);
11055 /* If both types are integral, convert from one mode to the other. */
11056 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
11057 op0 = convert_modes (mode, GET_MODE (op0), op0,
11058 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
11059 /* If the output type is a bit-field type, do an extraction. */
11060 else if (reduce_bit_field)
11061 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
11062 TYPE_UNSIGNED (type), NULL_RTX,
11063 mode, mode, false, NULL);
11064 /* As a last resort, spill op0 to memory, and reload it in a
11065 different mode. */
11066 else if (!MEM_P (op0))
11068 /* If the operand is not a MEM, force it into memory. Since we
11069 are going to be changing the mode of the MEM, don't call
11070 force_const_mem for constants because we don't allow pool
11071 constants to change mode. */
11072 tree inner_type = TREE_TYPE (treeop0);
11074 gcc_assert (!TREE_ADDRESSABLE (exp));
11076 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
11077 target
11078 = assign_stack_temp_for_type
11079 (TYPE_MODE (inner_type),
11080 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
11082 emit_move_insn (target, op0);
11083 op0 = target;
11086 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11087 output type is such that the operand is known to be aligned, indicate
11088 that it is. Otherwise, we need only be concerned about alignment for
11089 non-BLKmode results. */
11090 if (MEM_P (op0))
11092 enum insn_code icode;
11094 if (modifier != EXPAND_WRITE
11095 && modifier != EXPAND_MEMORY
11096 && !inner_reference_p
11097 && mode != BLKmode
11098 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
11100 /* If the target does have special handling for unaligned
11101 loads of mode then use them. */
11102 if ((icode = optab_handler (movmisalign_optab, mode))
11103 != CODE_FOR_nothing)
11105 rtx reg;
11107 op0 = adjust_address (op0, mode, 0);
11108 /* We've already validated the memory, and we're creating a
11109 new pseudo destination. The predicates really can't
11110 fail. */
11111 reg = gen_reg_rtx (mode);
11113 /* Nor can the insn generator. */
11114 rtx_insn *insn = GEN_FCN (icode) (reg, op0);
11115 emit_insn (insn);
11116 return reg;
11118 else if (STRICT_ALIGNMENT)
11120 poly_uint64 mode_size = GET_MODE_SIZE (mode);
11121 poly_uint64 temp_size = mode_size;
11122 if (GET_MODE (op0) != BLKmode)
11123 temp_size = upper_bound (temp_size,
11124 GET_MODE_SIZE (GET_MODE (op0)));
11125 rtx new_rtx
11126 = assign_stack_temp_for_type (mode, temp_size, type);
11127 rtx new_with_op0_mode
11128 = adjust_address (new_rtx, GET_MODE (op0), 0);
11130 gcc_assert (!TREE_ADDRESSABLE (exp));
11132 if (GET_MODE (op0) == BLKmode)
11134 rtx size_rtx = gen_int_mode (mode_size, Pmode);
11135 emit_block_move (new_with_op0_mode, op0, size_rtx,
11136 (modifier == EXPAND_STACK_PARM
11137 ? BLOCK_OP_CALL_PARM
11138 : BLOCK_OP_NORMAL));
11140 else
11141 emit_move_insn (new_with_op0_mode, op0);
11143 op0 = new_rtx;
11147 op0 = adjust_address (op0, mode, 0);
11150 return op0;
11152 case MODIFY_EXPR:
11154 tree lhs = treeop0;
11155 tree rhs = treeop1;
11156 gcc_assert (ignore);
11158 /* Check for |= or &= of a bitfield of size one into another bitfield
11159 of size 1. In this case, (unless we need the result of the
11160 assignment) we can do this more efficiently with a
11161 test followed by an assignment, if necessary.
11163 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11164 things change so we do, this code should be enhanced to
11165 support it. */
11166 if (TREE_CODE (lhs) == COMPONENT_REF
11167 && (TREE_CODE (rhs) == BIT_IOR_EXPR
11168 || TREE_CODE (rhs) == BIT_AND_EXPR)
11169 && TREE_OPERAND (rhs, 0) == lhs
11170 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
11171 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
11172 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
11174 rtx_code_label *label = gen_label_rtx ();
11175 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
11176 do_jump (TREE_OPERAND (rhs, 1),
11177 value ? label : 0,
11178 value ? 0 : label,
11179 profile_probability::uninitialized ());
11180 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
11181 false);
11182 do_pending_stack_adjust ();
11183 emit_label (label);
11184 return const0_rtx;
11187 expand_assignment (lhs, rhs, false);
11188 return const0_rtx;
11191 case ADDR_EXPR:
11192 return expand_expr_addr_expr (exp, target, tmode, modifier);
11194 case REALPART_EXPR:
11195 op0 = expand_normal (treeop0);
11196 return read_complex_part (op0, false);
11198 case IMAGPART_EXPR:
11199 op0 = expand_normal (treeop0);
11200 return read_complex_part (op0, true);
11202 case RETURN_EXPR:
11203 case LABEL_EXPR:
11204 case GOTO_EXPR:
11205 case SWITCH_EXPR:
11206 case ASM_EXPR:
11207 /* Expanded in cfgexpand.c. */
11208 gcc_unreachable ();
11210 case TRY_CATCH_EXPR:
11211 case CATCH_EXPR:
11212 case EH_FILTER_EXPR:
11213 case TRY_FINALLY_EXPR:
11214 /* Lowered by tree-eh.c. */
11215 gcc_unreachable ();
11217 case WITH_CLEANUP_EXPR:
11218 case CLEANUP_POINT_EXPR:
11219 case TARGET_EXPR:
11220 case CASE_LABEL_EXPR:
11221 case VA_ARG_EXPR:
11222 case BIND_EXPR:
11223 case INIT_EXPR:
11224 case CONJ_EXPR:
11225 case COMPOUND_EXPR:
11226 case PREINCREMENT_EXPR:
11227 case PREDECREMENT_EXPR:
11228 case POSTINCREMENT_EXPR:
11229 case POSTDECREMENT_EXPR:
11230 case LOOP_EXPR:
11231 case EXIT_EXPR:
11232 case COMPOUND_LITERAL_EXPR:
11233 /* Lowered by gimplify.c. */
11234 gcc_unreachable ();
11236 case FDESC_EXPR:
11237 /* Function descriptors are not valid except for as
11238 initialization constants, and should not be expanded. */
11239 gcc_unreachable ();
11241 case WITH_SIZE_EXPR:
11242 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11243 have pulled out the size to use in whatever context it needed. */
11244 return expand_expr_real (treeop0, original_target, tmode,
11245 modifier, alt_rtl, inner_reference_p);
11247 default:
11248 return expand_expr_real_2 (&ops, target, tmode, modifier);
11252 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11253 signedness of TYPE), possibly returning the result in TARGET.
11254 TYPE is known to be a partial integer type. */
11255 static rtx
11256 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
11258 HOST_WIDE_INT prec = TYPE_PRECISION (type);
11259 if (target && GET_MODE (target) != GET_MODE (exp))
11260 target = 0;
11261 /* For constant values, reduce using build_int_cst_type. */
11262 if (CONST_INT_P (exp))
11264 HOST_WIDE_INT value = INTVAL (exp);
11265 tree t = build_int_cst_type (type, value);
11266 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
11268 else if (TYPE_UNSIGNED (type))
11270 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11271 rtx mask = immed_wide_int_const
11272 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
11273 return expand_and (mode, exp, mask, target);
11275 else
11277 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11278 int count = GET_MODE_PRECISION (mode) - prec;
11279 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0);
11280 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
11284 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11285 when applied to the address of EXP produces an address known to be
11286 aligned more than BIGGEST_ALIGNMENT. */
11288 static int
11289 is_aligning_offset (const_tree offset, const_tree exp)
11291 /* Strip off any conversions. */
11292 while (CONVERT_EXPR_P (offset))
11293 offset = TREE_OPERAND (offset, 0);
11295 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11296 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11297 if (TREE_CODE (offset) != BIT_AND_EXPR
11298 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
11299 || compare_tree_int (TREE_OPERAND (offset, 1),
11300 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
11301 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1))
11302 return 0;
11304 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11305 It must be NEGATE_EXPR. Then strip any more conversions. */
11306 offset = TREE_OPERAND (offset, 0);
11307 while (CONVERT_EXPR_P (offset))
11308 offset = TREE_OPERAND (offset, 0);
11310 if (TREE_CODE (offset) != NEGATE_EXPR)
11311 return 0;
11313 offset = TREE_OPERAND (offset, 0);
11314 while (CONVERT_EXPR_P (offset))
11315 offset = TREE_OPERAND (offset, 0);
11317 /* This must now be the address of EXP. */
11318 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
11321 /* Return the tree node if an ARG corresponds to a string constant or zero
11322 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11323 in bytes within the string that ARG is accessing. The type of the
11324 offset will be `sizetype'. */
11326 tree
11327 string_constant (tree arg, tree *ptr_offset)
11329 tree array, offset, lower_bound;
11330 STRIP_NOPS (arg);
11332 if (TREE_CODE (arg) == ADDR_EXPR)
11334 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
11336 *ptr_offset = size_zero_node;
11337 return TREE_OPERAND (arg, 0);
11339 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
11341 array = TREE_OPERAND (arg, 0);
11342 offset = size_zero_node;
11344 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
11346 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11347 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11348 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11349 return 0;
11351 /* Check if the array has a nonzero lower bound. */
11352 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
11353 if (!integer_zerop (lower_bound))
11355 /* If the offset and base aren't both constants, return 0. */
11356 if (TREE_CODE (lower_bound) != INTEGER_CST)
11357 return 0;
11358 if (TREE_CODE (offset) != INTEGER_CST)
11359 return 0;
11360 /* Adjust offset by the lower bound. */
11361 offset = size_diffop (fold_convert (sizetype, offset),
11362 fold_convert (sizetype, lower_bound));
11365 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
11367 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11368 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11369 if (TREE_CODE (array) != ADDR_EXPR)
11370 return 0;
11371 array = TREE_OPERAND (array, 0);
11372 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11373 return 0;
11375 else
11376 return 0;
11378 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
11380 tree arg0 = TREE_OPERAND (arg, 0);
11381 tree arg1 = TREE_OPERAND (arg, 1);
11383 STRIP_NOPS (arg0);
11384 STRIP_NOPS (arg1);
11386 if (TREE_CODE (arg0) == ADDR_EXPR
11387 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
11388 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
11390 array = TREE_OPERAND (arg0, 0);
11391 offset = arg1;
11393 else if (TREE_CODE (arg1) == ADDR_EXPR
11394 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
11395 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
11397 array = TREE_OPERAND (arg1, 0);
11398 offset = arg0;
11400 else
11401 return 0;
11403 else
11404 return 0;
11406 if (TREE_CODE (array) == STRING_CST)
11408 *ptr_offset = fold_convert (sizetype, offset);
11409 return array;
11411 else if (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
11413 int length;
11414 tree init = ctor_for_folding (array);
11416 /* Variables initialized to string literals can be handled too. */
11417 if (init == error_mark_node
11418 || !init
11419 || TREE_CODE (init) != STRING_CST)
11420 return 0;
11422 /* Avoid const char foo[4] = "abcde"; */
11423 if (DECL_SIZE_UNIT (array) == NULL_TREE
11424 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
11425 || (length = TREE_STRING_LENGTH (init)) <= 0
11426 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
11427 return 0;
11429 /* If variable is bigger than the string literal, OFFSET must be constant
11430 and inside of the bounds of the string literal. */
11431 offset = fold_convert (sizetype, offset);
11432 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
11433 && (! tree_fits_uhwi_p (offset)
11434 || compare_tree_int (offset, length) >= 0))
11435 return 0;
11437 *ptr_offset = offset;
11438 return init;
11441 return 0;
11444 /* Generate code to calculate OPS, and exploded expression
11445 using a store-flag instruction and return an rtx for the result.
11446 OPS reflects a comparison.
11448 If TARGET is nonzero, store the result there if convenient.
11450 Return zero if there is no suitable set-flag instruction
11451 available on this machine.
11453 Once expand_expr has been called on the arguments of the comparison,
11454 we are committed to doing the store flag, since it is not safe to
11455 re-evaluate the expression. We emit the store-flag insn by calling
11456 emit_store_flag, but only expand the arguments if we have a reason
11457 to believe that emit_store_flag will be successful. If we think that
11458 it will, but it isn't, we have to simulate the store-flag with a
11459 set/jump/set sequence. */
11461 static rtx
11462 do_store_flag (sepops ops, rtx target, machine_mode mode)
11464 enum rtx_code code;
11465 tree arg0, arg1, type;
11466 machine_mode operand_mode;
11467 int unsignedp;
11468 rtx op0, op1;
11469 rtx subtarget = target;
11470 location_t loc = ops->location;
11472 arg0 = ops->op0;
11473 arg1 = ops->op1;
11475 /* Don't crash if the comparison was erroneous. */
11476 if (arg0 == error_mark_node || arg1 == error_mark_node)
11477 return const0_rtx;
11479 type = TREE_TYPE (arg0);
11480 operand_mode = TYPE_MODE (type);
11481 unsignedp = TYPE_UNSIGNED (type);
11483 /* We won't bother with BLKmode store-flag operations because it would mean
11484 passing a lot of information to emit_store_flag. */
11485 if (operand_mode == BLKmode)
11486 return 0;
11488 /* We won't bother with store-flag operations involving function pointers
11489 when function pointers must be canonicalized before comparisons. */
11490 if (targetm.have_canonicalize_funcptr_for_compare ()
11491 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11492 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11493 == FUNCTION_TYPE))
11494 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11495 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11496 == FUNCTION_TYPE))))
11497 return 0;
11499 STRIP_NOPS (arg0);
11500 STRIP_NOPS (arg1);
11502 /* For vector typed comparisons emit code to generate the desired
11503 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11504 expander for this. */
11505 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11507 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11508 if (VECTOR_BOOLEAN_TYPE_P (ops->type)
11509 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code))
11510 return expand_vec_cmp_expr (ops->type, ifexp, target);
11511 else
11513 tree if_true = constant_boolean_node (true, ops->type);
11514 tree if_false = constant_boolean_node (false, ops->type);
11515 return expand_vec_cond_expr (ops->type, ifexp, if_true,
11516 if_false, target);
11520 /* Get the rtx comparison code to use. We know that EXP is a comparison
11521 operation of some type. Some comparisons against 1 and -1 can be
11522 converted to comparisons with zero. Do so here so that the tests
11523 below will be aware that we have a comparison with zero. These
11524 tests will not catch constants in the first operand, but constants
11525 are rarely passed as the first operand. */
11527 switch (ops->code)
11529 case EQ_EXPR:
11530 code = EQ;
11531 break;
11532 case NE_EXPR:
11533 code = NE;
11534 break;
11535 case LT_EXPR:
11536 if (integer_onep (arg1))
11537 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11538 else
11539 code = unsignedp ? LTU : LT;
11540 break;
11541 case LE_EXPR:
11542 if (! unsignedp && integer_all_onesp (arg1))
11543 arg1 = integer_zero_node, code = LT;
11544 else
11545 code = unsignedp ? LEU : LE;
11546 break;
11547 case GT_EXPR:
11548 if (! unsignedp && integer_all_onesp (arg1))
11549 arg1 = integer_zero_node, code = GE;
11550 else
11551 code = unsignedp ? GTU : GT;
11552 break;
11553 case GE_EXPR:
11554 if (integer_onep (arg1))
11555 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11556 else
11557 code = unsignedp ? GEU : GE;
11558 break;
11560 case UNORDERED_EXPR:
11561 code = UNORDERED;
11562 break;
11563 case ORDERED_EXPR:
11564 code = ORDERED;
11565 break;
11566 case UNLT_EXPR:
11567 code = UNLT;
11568 break;
11569 case UNLE_EXPR:
11570 code = UNLE;
11571 break;
11572 case UNGT_EXPR:
11573 code = UNGT;
11574 break;
11575 case UNGE_EXPR:
11576 code = UNGE;
11577 break;
11578 case UNEQ_EXPR:
11579 code = UNEQ;
11580 break;
11581 case LTGT_EXPR:
11582 code = LTGT;
11583 break;
11585 default:
11586 gcc_unreachable ();
11589 /* Put a constant second. */
11590 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11591 || TREE_CODE (arg0) == FIXED_CST)
11593 std::swap (arg0, arg1);
11594 code = swap_condition (code);
11597 /* If this is an equality or inequality test of a single bit, we can
11598 do this by shifting the bit being tested to the low-order bit and
11599 masking the result with the constant 1. If the condition was EQ,
11600 we xor it with 1. This does not require an scc insn and is faster
11601 than an scc insn even if we have it.
11603 The code to make this transformation was moved into fold_single_bit_test,
11604 so we just call into the folder and expand its result. */
11606 if ((code == NE || code == EQ)
11607 && integer_zerop (arg1)
11608 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11610 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11611 if (srcstmt
11612 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11614 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11615 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11616 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11617 gimple_assign_rhs1 (srcstmt),
11618 gimple_assign_rhs2 (srcstmt));
11619 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11620 if (temp)
11621 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11625 if (! get_subtarget (target)
11626 || GET_MODE (subtarget) != operand_mode)
11627 subtarget = 0;
11629 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11631 if (target == 0)
11632 target = gen_reg_rtx (mode);
11634 /* Try a cstore if possible. */
11635 return emit_store_flag_force (target, code, op0, op1,
11636 operand_mode, unsignedp,
11637 (TYPE_PRECISION (ops->type) == 1
11638 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11641 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11642 0 otherwise (i.e. if there is no casesi instruction).
11644 DEFAULT_PROBABILITY is the probability of jumping to the default
11645 label. */
11647 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11648 rtx table_label, rtx default_label, rtx fallback_label,
11649 profile_probability default_probability)
11651 struct expand_operand ops[5];
11652 scalar_int_mode index_mode = SImode;
11653 rtx op1, op2, index;
11655 if (! targetm.have_casesi ())
11656 return 0;
11658 /* The index must be some form of integer. Convert it to SImode. */
11659 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type);
11660 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode))
11662 rtx rangertx = expand_normal (range);
11664 /* We must handle the endpoints in the original mode. */
11665 index_expr = build2 (MINUS_EXPR, index_type,
11666 index_expr, minval);
11667 minval = integer_zero_node;
11668 index = expand_normal (index_expr);
11669 if (default_label)
11670 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11671 omode, 1, default_label,
11672 default_probability);
11673 /* Now we can safely truncate. */
11674 index = convert_to_mode (index_mode, index, 0);
11676 else
11678 if (omode != index_mode)
11680 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11681 index_expr = fold_convert (index_type, index_expr);
11684 index = expand_normal (index_expr);
11687 do_pending_stack_adjust ();
11689 op1 = expand_normal (minval);
11690 op2 = expand_normal (range);
11692 create_input_operand (&ops[0], index, index_mode);
11693 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11694 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11695 create_fixed_operand (&ops[3], table_label);
11696 create_fixed_operand (&ops[4], (default_label
11697 ? default_label
11698 : fallback_label));
11699 expand_jump_insn (targetm.code_for_casesi, 5, ops);
11700 return 1;
11703 /* Attempt to generate a tablejump instruction; same concept. */
11704 /* Subroutine of the next function.
11706 INDEX is the value being switched on, with the lowest value
11707 in the table already subtracted.
11708 MODE is its expected mode (needed if INDEX is constant).
11709 RANGE is the length of the jump table.
11710 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11712 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11713 index value is out of range.
11714 DEFAULT_PROBABILITY is the probability of jumping to
11715 the default label. */
11717 static void
11718 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11719 rtx default_label, profile_probability default_probability)
11721 rtx temp, vector;
11723 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11724 cfun->cfg->max_jumptable_ents = INTVAL (range);
11726 /* Do an unsigned comparison (in the proper mode) between the index
11727 expression and the value which represents the length of the range.
11728 Since we just finished subtracting the lower bound of the range
11729 from the index expression, this comparison allows us to simultaneously
11730 check that the original index expression value is both greater than
11731 or equal to the minimum value of the range and less than or equal to
11732 the maximum value of the range. */
11734 if (default_label)
11735 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11736 default_label, default_probability);
11738 /* If index is in range, it must fit in Pmode.
11739 Convert to Pmode so we can index with it. */
11740 if (mode != Pmode)
11742 unsigned int width;
11744 /* We know the value of INDEX is between 0 and RANGE. If we have a
11745 sign-extended subreg, and RANGE does not have the sign bit set, then
11746 we have a value that is valid for both sign and zero extension. In
11747 this case, we get better code if we sign extend. */
11748 if (GET_CODE (index) == SUBREG
11749 && SUBREG_PROMOTED_VAR_P (index)
11750 && SUBREG_PROMOTED_SIGNED_P (index)
11751 && ((width = GET_MODE_PRECISION (as_a <scalar_int_mode> (mode)))
11752 <= HOST_BITS_PER_WIDE_INT)
11753 && ! (UINTVAL (range) & (HOST_WIDE_INT_1U << (width - 1))))
11754 index = convert_to_mode (Pmode, index, 0);
11755 else
11756 index = convert_to_mode (Pmode, index, 1);
11759 /* Don't let a MEM slip through, because then INDEX that comes
11760 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11761 and break_out_memory_refs will go to work on it and mess it up. */
11762 #ifdef PIC_CASE_VECTOR_ADDRESS
11763 if (flag_pic && !REG_P (index))
11764 index = copy_to_mode_reg (Pmode, index);
11765 #endif
11767 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11768 GET_MODE_SIZE, because this indicates how large insns are. The other
11769 uses should all be Pmode, because they are addresses. This code
11770 could fail if addresses and insns are not the same size. */
11771 index = simplify_gen_binary (MULT, Pmode, index,
11772 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11773 Pmode));
11774 index = simplify_gen_binary (PLUS, Pmode, index,
11775 gen_rtx_LABEL_REF (Pmode, table_label));
11777 #ifdef PIC_CASE_VECTOR_ADDRESS
11778 if (flag_pic)
11779 index = PIC_CASE_VECTOR_ADDRESS (index);
11780 else
11781 #endif
11782 index = memory_address (CASE_VECTOR_MODE, index);
11783 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11784 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11785 convert_move (temp, vector, 0);
11787 emit_jump_insn (targetm.gen_tablejump (temp, table_label));
11789 /* If we are generating PIC code or if the table is PC-relative, the
11790 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11791 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11792 emit_barrier ();
11796 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11797 rtx table_label, rtx default_label,
11798 profile_probability default_probability)
11800 rtx index;
11802 if (! targetm.have_tablejump ())
11803 return 0;
11805 index_expr = fold_build2 (MINUS_EXPR, index_type,
11806 fold_convert (index_type, index_expr),
11807 fold_convert (index_type, minval));
11808 index = expand_normal (index_expr);
11809 do_pending_stack_adjust ();
11811 do_tablejump (index, TYPE_MODE (index_type),
11812 convert_modes (TYPE_MODE (index_type),
11813 TYPE_MODE (TREE_TYPE (range)),
11814 expand_normal (range),
11815 TYPE_UNSIGNED (TREE_TYPE (range))),
11816 table_label, default_label, default_probability);
11817 return 1;
11820 /* Return a CONST_VECTOR rtx representing vector mask for
11821 a VECTOR_CST of booleans. */
11822 static rtx
11823 const_vector_mask_from_tree (tree exp)
11825 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11826 machine_mode inner = GET_MODE_INNER (mode);
11828 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11829 VECTOR_CST_NELTS_PER_PATTERN (exp));
11830 unsigned int count = builder.encoded_nelts ();
11831 for (unsigned int i = 0; i < count; ++i)
11833 tree elt = VECTOR_CST_ELT (exp, i);
11834 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11835 if (integer_zerop (elt))
11836 builder.quick_push (CONST0_RTX (inner));
11837 else if (integer_onep (elt)
11838 || integer_minus_onep (elt))
11839 builder.quick_push (CONSTM1_RTX (inner));
11840 else
11841 gcc_unreachable ();
11843 return builder.build ();
11846 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11847 Return a constant scalar rtx of mode MODE in which bit X is set if element
11848 X of EXP is nonzero. */
11849 static rtx
11850 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp)
11852 wide_int res = wi::zero (GET_MODE_PRECISION (mode));
11853 tree elt;
11855 /* The result has a fixed number of bits so the input must too. */
11856 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
11857 for (unsigned int i = 0; i < nunits; ++i)
11859 elt = VECTOR_CST_ELT (exp, i);
11860 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11861 if (integer_all_onesp (elt))
11862 res = wi::set_bit (res, i);
11863 else
11864 gcc_assert (integer_zerop (elt));
11867 return immed_wide_int_const (res, mode);
11870 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11871 static rtx
11872 const_vector_from_tree (tree exp)
11874 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11876 if (initializer_zerop (exp))
11877 return CONST0_RTX (mode);
11879 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
11880 return const_vector_mask_from_tree (exp);
11882 machine_mode inner = GET_MODE_INNER (mode);
11884 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11885 VECTOR_CST_NELTS_PER_PATTERN (exp));
11886 unsigned int count = builder.encoded_nelts ();
11887 for (unsigned int i = 0; i < count; ++i)
11889 tree elt = VECTOR_CST_ELT (exp, i);
11890 if (TREE_CODE (elt) == REAL_CST)
11891 builder.quick_push (const_double_from_real_value (TREE_REAL_CST (elt),
11892 inner));
11893 else if (TREE_CODE (elt) == FIXED_CST)
11894 builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11895 inner));
11896 else
11897 builder.quick_push (immed_wide_int_const (wi::to_poly_wide (elt),
11898 inner));
11900 return builder.build ();
11903 /* Build a decl for a personality function given a language prefix. */
11905 tree
11906 build_personality_function (const char *lang)
11908 const char *unwind_and_version;
11909 tree decl, type;
11910 char *name;
11912 switch (targetm_common.except_unwind_info (&global_options))
11914 case UI_NONE:
11915 return NULL;
11916 case UI_SJLJ:
11917 unwind_and_version = "_sj0";
11918 break;
11919 case UI_DWARF2:
11920 case UI_TARGET:
11921 unwind_and_version = "_v0";
11922 break;
11923 case UI_SEH:
11924 unwind_and_version = "_seh0";
11925 break;
11926 default:
11927 gcc_unreachable ();
11930 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11932 type = build_function_type_list (integer_type_node, integer_type_node,
11933 long_long_unsigned_type_node,
11934 ptr_type_node, ptr_type_node, NULL_TREE);
11935 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11936 get_identifier (name), type);
11937 DECL_ARTIFICIAL (decl) = 1;
11938 DECL_EXTERNAL (decl) = 1;
11939 TREE_PUBLIC (decl) = 1;
11941 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11942 are the flags assigned by targetm.encode_section_info. */
11943 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11945 return decl;
11948 /* Extracts the personality function of DECL and returns the corresponding
11949 libfunc. */
11952 get_personality_function (tree decl)
11954 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11955 enum eh_personality_kind pk;
11957 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11958 if (pk == eh_personality_none)
11959 return NULL;
11961 if (!personality
11962 && pk == eh_personality_any)
11963 personality = lang_hooks.eh_personality ();
11965 if (pk == eh_personality_lang)
11966 gcc_assert (personality != NULL_TREE);
11968 return XEXP (DECL_RTL (personality), 0);
11971 /* Returns a tree for the size of EXP in bytes. */
11973 static tree
11974 tree_expr_size (const_tree exp)
11976 if (DECL_P (exp)
11977 && DECL_SIZE_UNIT (exp) != 0)
11978 return DECL_SIZE_UNIT (exp);
11979 else
11980 return size_in_bytes (TREE_TYPE (exp));
11983 /* Return an rtx for the size in bytes of the value of EXP. */
11986 expr_size (tree exp)
11988 tree size;
11990 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11991 size = TREE_OPERAND (exp, 1);
11992 else
11994 size = tree_expr_size (exp);
11995 gcc_assert (size);
11996 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11999 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
12002 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12003 if the size can vary or is larger than an integer. */
12005 static HOST_WIDE_INT
12006 int_expr_size (tree exp)
12008 tree size;
12010 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
12011 size = TREE_OPERAND (exp, 1);
12012 else
12014 size = tree_expr_size (exp);
12015 gcc_assert (size);
12018 if (size == 0 || !tree_fits_shwi_p (size))
12019 return -1;
12021 return tree_to_shwi (size);