1 ;; Predicates of machine description for CR16.
2 ;; Copyright (C) 2012-2016 Free Software Foundation, Inc.
3 ;; Contributed by KPIT Cummins Infosystems Limited.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
23 ;; Predicates for sbit/cbit instructions
24 ;; bit operand used for the generation of bit insn generation
25 (define_predicate "bit_operand"
28 return ((GET_CODE (op) == MEM && OK_FOR_Z (op)));
31 ;; Unsigned 4-bits constant int or double value.
32 (define_predicate "u4bits_operand"
33 (match_code "const_int,const_double")
35 if (GET_CODE (op) == CONST_DOUBLE)
36 return cr16_const_double_ok (op);
37 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 4)) ? 1 : 0;
40 ;; Operand is a constant integer where
41 ;; only one bit is set to 1.
42 (define_predicate "one_bit_operand"
43 (match_code "const_int")
50 else if (mode == HImode)
56 return (val & (val - 1)) == 0; /* true if only one bit is set. */
61 ;; Operand is a constant integer where
62 ;; only one bit is set to 0.
63 (define_predicate "rev_one_bit_operand"
64 (match_code "const_int")
68 val = ~INTVAL (op); /* Invert and use. */
71 else if (mode == HImode)
77 return (val & (val - 1)) == 0; /* true if only one bit is set. */
82 ;; Predicates for shift instructions
83 ;; Immediate operand predicate for count in shift operations.
84 ;; Immediate shall be 3-bits in case operand to be operated on
85 ;; is a qi mode operand.
86 (define_predicate "shift_qi_imm_operand"
87 (match_code "const_int")
89 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 3)) ? 1 : 0;
92 ;; Immediate shall be 4-bits in case operand to be operated on
93 ;; is a hi mode operand.
94 (define_predicate "shift_hi_imm_operand"
95 (match_code "const_int")
97 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 4)) ? 1 : 0;
100 ;; Immediate shall be 3-bits in case operand to be operated on
101 ;; is a si mode operand.
102 (define_predicate "shift_si_imm_operand"
103 (match_code "const_int")
105 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 5)) ? 1 : 0;
108 ;; Predicates for jump/call instructions
109 ;; Jump immediate cannot be more than 24-bits
110 (define_predicate "jump_imm_operand"
111 (match_code "const_int")
113 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 24)) ? 1 : 0;
116 ;; Call immediate cannot be more than 24-bits
117 (define_predicate "call_imm_operand"
118 (match_operand 0 "immediate_operand")
120 if (GET_CODE (op) != CONST_INT) return 1;
121 return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 24)) ? 1 : 0;
124 ;; Operand is register or 4-bit immediate operand
125 (define_predicate "reg_or_u4bits_operand"
126 (ior (match_operand 0 "u4bits_operand")
127 (match_operand 0 "register_operand")))
129 ;; Operand is a register or symbol reference
130 (define_predicate "reg_or_sym_operand"
131 (ior (match_code "symbol_ref")
132 (match_operand 0 "register_operand")))
134 ;; Operand is a non stack pointer register
135 (define_predicate "nosp_reg_operand"
136 (and (match_operand 0 "register_operand")
137 (match_test "REGNO (op) != SP_REGNUM")))
139 (define_predicate "hard_reg_operand"
140 (and (match_operand 0 "register_operand")
141 (match_test "REGNO (op) <= 15")))
143 ;; Operand is a memory reference and
144 ;; not a push operand.
145 (define_predicate "store_operand"
146 (and (match_operand 0 "memory_operand")
147 (not (match_operand 0 "push_operand"))))
150 (define_predicate "reg_or_int_operand"
151 (ior (match_code "const_int")
152 (match_operand 0 "register_operand")))
156 ;; Atithmetic/logical predicates
159 (define_predicate "arith_qi_operand"
160 (match_code "const_int")
162 return (IN_RAN(INTVAL (op), 0, 15) && ((INTVAL (op) != 9)
163 || (INTVAL (op) != 11))) ? 1 : 0 ;
166 ;;QI Reg, subreg(reg) or const_int.
167 (define_predicate "reg_qi_int_operand"
168 (ior (match_operand 0 "arith_qi_operand")
169 (match_operand 0 "register_operand")))
172 (define_predicate "arith_hi_operand"
173 (match_code "const_int")
175 return (IN_RAN(INTVAL (op), -32768, 32768) ) ? 1 : 0 ;
178 ;;HI Reg, subreg(reg) or const_int.
179 (define_predicate "reg_hi_int_operand"
180 (ior (match_operand 0 "arith_hi_operand")
181 (match_operand 0 "register_operand")))
183 ;;SI Reg, subreg(reg) or const_int.
184 (define_predicate "reg_si_int_operand"
185 (ior (match_operand 0 "const_int_operand")
186 (match_operand 0 "register_operand")))
192 (define_predicate "shift_qi_operand"
193 (match_code "const_int")
195 return (IN_RAN(INTVAL (op), 0, 7) ) ? 1 : 0;
198 ;;QI Reg, subreg(reg) or const_int.
199 (define_predicate "shift_reg_qi_int_operand"
200 (ior (match_operand 0 "shift_qi_operand")
201 (match_operand 0 "register_operand")))
204 (define_predicate "shift_hi_operand"
205 (match_code "const_int")
207 return (IN_RAN(INTVAL (op), 0, 15) ) ? 1 : 0 ;
210 ;;HI Reg, subreg(reg) or const_int.
211 (define_predicate "shift_reg_hi_int_operand"
212 (ior (match_operand 0 "shift_hi_operand")
213 (match_operand 0 "register_operand")))
216 (define_predicate "shift_si_operand"
217 (match_code "const_int")
219 return (IN_RAN(INTVAL (op), 0, 31) ) ? 1 : 0;
222 ;;SI Reg, subreg(reg) or const_int.
223 (define_predicate "shift_reg_si_int_operand"
224 (ior (match_operand 0 "shift_si_operand")
225 (match_operand 0 "register_operand")))