gcc/ChangeLog

   1 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
   2
   3         PR target/83790
   4         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
   5         spaces for function labels.
   6
   7 2018-01-19  Martin Liska  <mliska@suse.cz>
   8
   9         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
  10         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
  11         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
  12         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
  13         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
  14         (PRED_CONST_RETURN): Change from 69 to 65.
  15         (PRED_NULL_RETURN): Change from 91 to 71.
  16         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
  17         (PRED_LOOP_GUARD): Change from 66 to 73.
  18
  19 2018-01-19  Martin Liska  <mliska@suse.cz>
  20
  21         * predict.c (predict_insn_def): Add new assert.
  22         (struct branch_predictor): Change type to signed integer.
  23         (test_prediction_value_range): Amend test to cover
  24         PROB_UNINITIALIZED.
  25         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
  26         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
  27         (PRED_LOOP_ITERATIONS_MAX): Likewise.
  28         (PRED_LOOP_IV_COMPARE): Likewise.
  29         * predict.h (PROB_UNINITIALIZED): Define new constant.
  30
  31 2018-01-19  Martin Liska  <mliska@suse.cz>
  32
  33         * predict.c (dump_prediction): Add new format for
  34         analyze_brprob.py script which is enabled with -details
  35         suboption.
  36         * profile-count.h (precise_p): New function.
  37
  38 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
  39
  40         PR tree-optimization/83922
  41         * tree-vect-loop.c (vect_verify_full_masking): Return false if
  42         there are no statements that need masking.
  43         (vect_active_double_reduction_p): New function.
  44         (vect_analyze_loop_operations): Use it when handling phis that
  45         are not in the loop header.
  46
  47 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
  48
  49         PR tree-optimization/83914
  50         * tree-vect-loop.c (vectorizable_induction): Don't convert
  51         init_expr or apply the peeling adjustment for inductions
  52         that are nested within the vectorized loop.
  53
  54 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  55
  56         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
  57         instead of NEG.
  58
  59 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
  60
  61         PR sanitizer/81715
  62         PR testsuite/83882
  63         * function.h (gimplify_parameters): Add gimple_seq * argument.
  64         * function.c: Include gimple.h and options.h.
  65         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
  66         for the added local temporaries if needed.
  67         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
  68         if there are any parameter cleanups, wrap whole body into a
  69         try/finally with the cleanups.
  70
  71 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
  72
  73         PR target/82964
  74         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
  75         Use GET_MODE_CLASS for scalar floating point.
  76
  77 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
  78
  79         PR ipa/82256
  80         patch by PaX Team
  81         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
  82         Fix call of call_cgraph_insertion_hooks.
  83
  84 2018-01-18  Martin Sebor  <msebor@redhat.com>
  85
  86         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
  87
  88 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
  89
  90         PR ipa/83619
  91         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
  92         frequencies.
  93
  94 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
  95
  96         PR other/70268
  97         * common.opt: (-ffile-prefix-map): New option.
  98         * opts.c (common_handle_option): Defer it.
  99         * opts-global.c (handle_common_deferred_options): Handle it.
 100         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
 101         * file-prefix-map.h: New file.
 102         (remap_debug_filename, add_debug_prefix_map): ...here.
 103         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
 104         * final.c (debug_prefix_map, add_debug_prefix_map
 105         remap_debug_filename): Move to...
 106         * file-prefix-map.c: New file.
 107         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
 108         generalize, get rid of alloca(), use strrchr() instead of strchr().
 109         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
 110         Implement in terms of add_prefix_map().
 111         (remap_macro_filename, remap_debug_filename): Implement in term of
 112         remap_filename().
 113         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
 114         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
 115         * dbxout.c: Include file-prefix-map.h.
 116         * varasm.c: Likewise.
 117         * vmsdbgout.c: Likewise.
 118         * xcoffout.c: Likewise.
 119         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
 120         * doc/cppopts.texi (-fmacro-prefix-map): Document.
 121         * doc/invoke.texi (-ffile-prefix-map): Document.
 122         (-fdebug-prefix-map): Update description.
 123
 124 2018-01-18  Martin Liska  <mliska@suse.cz>
 125
 126         * config/i386/i386.c (indirect_thunk_name): Document that also
 127         lfence is emitted.
 128         (output_indirect_thunk): Document why both instructions
 129         (pause and lfence) are generated.
 130
 131 2018-01-18  Richard Biener  <rguenther@suse.de>
 132
 133         PR tree-optimization/83887
 134         * graphite-scop-detection.c
 135         (scop_detection::get_nearest_dom_with_single_entry): Remove.
 136         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
 137         (scop_detection::merge_sese): Re-implement with a flood-fill
 138         algorithm that properly finds a SESE region if it exists.
 139
 140 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
 141
 142         PR c/61240
 143         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
 144         pointer_diff optimizations use view_convert instead of convert.
 145
 146 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 147
 148         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
 149         Generate different code for -mno-speculate-indirect-jumps.
 150         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
 151         (*call_indirect_aix<mode>): Disable for
 152         -mno-speculate-indirect-jumps.
 153         (*call_indirect_aix<mode>_nospec): New define_insn.
 154         (*call_value_indirect_aix<mode>): Disable for
 155         -mno-speculate-indirect-jumps.
 156         (*call_value_indirect_aix<mode>_nospec): New define_insn.
 157         (*sibcall_nonlocal_sysv<mode>): Generate different code for
 158         -mno-speculate-indirect-jumps.
 159         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
 160
 161 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
 162
 163         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
 164         long double type, set the flags for noting the default long double
 165         type, even if we don't pass or return a long double type.
 166
 167 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
 168
 169         PR ipa/83051
 170         * ipa-inline.c (flatten_function): Do not overwrite final inlining
 171         failure.
 172
 173 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
 174
 175         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
 176         support for merge[hl].
 177         (fold_mergehl_helper): New helper function.
 178         (tree-vector-builder.h): New #include for tree_vector_builder usage.
 179         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
 180         (altivec_vmrglw_direct): Add xxmrglw insn.
 181
 182 2018-01-17  Andrew Waterman  <andrew@sifive.com>
 183
 184         * config/riscv/riscv.c (riscv_conditional_register_usage): If
 185         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
 186
 187 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
 188
 189         PR lto/83121
 190         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
 191         call the lto_location_cache before reading the
 192         DECL_SOURCE_LOCATION of the types.
 193
 194 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
 195             Richard Sandiford  <richard.sandiford@linaro.org>
 196
 197         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
 198         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
 199         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
 200         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
 201         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
 202         Add declaration.
 203         * config/aarch64/constraints.md (aarch64_movti_operand):
 204         Limit immediates.
 205         * config/aarch64/predicates.md (Uti): Add new constraint.
 206
 207 2018-01-17 Carl Love  <cel@us.ibm.com>
 208         * config/rs6000/vsx.md (define_expand xl_len_r,
 209         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
 210         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
 211         lxvll.
 212         (define_expand, define_insn): Move the shift left from  the
 213         define_insn to the define_expand for lxvl and stxvl instructions.
 214         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
 215         and XL_LEN_R definitions to PURE.
 216
 217 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
 218
 219         * config/i386/i386.c (indirect_thunk_name): Declare regno
 220         as unsigned int.  Compare regno with INVALID_REGNUM.
 221         (output_indirect_thunk): Ditto.
 222         (output_indirect_thunk_function): Ditto.
 223         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
 224         in the call to output_indirect_thunk_function.
 225
 226 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
 227
 228         PR middle-end/83884
 229         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
 230         rather than the size of inner_type to determine the stack slot size
 231         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
 232
 233 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
 234
 235         PR target/83546
 236         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
 237         to PTA_SILVERMONT.
 238
 239 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
 240
 241         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
 242         endian Linux systems to optionally enable multilibs for selecting
 243         the long double type if the user configured an explicit type.
 244         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
 245         have no long double multilibs if not defined.
 246         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
 247         warn if the user used -mabi={ieee,ibm}longdouble and we built
 248         multilibs for long double.
 249         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
 250         appropriate multilib option.
 251         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
 252         multilib options.
 253         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
 254         for building long double multilibs.
 255         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
 256
 257 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
 258
 259         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
 260         copies.
 261
 262         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
 263         64 bits.
 264         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
 265         128 bits.
 266
 267         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
 268         variables.
 269
 270         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
 271         return value.
 272
 273 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
 274
 275         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
 276         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
 277
 278 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
 279
 280         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
 281         different rtl trees depending on TARGET_64BIT.
 282         (rs6000_gen_lvx): Likewise.
 283
 284 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
 285
 286         * config/visium/visium.md (nop): Tweak comment.
 287         (hazard_nop): Likewise.
 288
 289 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 290
 291         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
 292         -mspeculate-indirect-jumps.
 293         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
 294         for -mno-speculate-indirect-jumps.
 295         (*call_indirect_elfv2<mode>_nospec): New define_insn.
 296         (*call_value_indirect_elfv2<mode>): Disable for
 297         -mno-speculate-indirect-jumps.
 298         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
 299         (indirect_jump): Emit different RTL for
 300         -mno-speculate-indirect-jumps.
 301         (*indirect_jump<mode>): Disable for
 302         -mno-speculate-indirect-jumps.
 303         (*indirect_jump<mode>_nospec): New define_insn.
 304         (tablejump): Emit different RTL for
 305         -mno-speculate-indirect-jumps.
 306         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
 307         (tablejumpsi_nospec): New define_expand.
 308         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
 309         (tablejumpdi_nospec): New define_expand.
 310         (*tablejump<mode>_internal1): Disable for
 311         -mno-speculate-indirect-jumps.
 312         (*tablejump<mode>_internal1_nospec): New define_insn.
 313         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
 314         option.
 315
 316 2018-01-16  Artyom Skrobov tyomitch@gmail.com
 317
 318         * caller-save.c (insert_save): Drop unnecessary parameter.  All
 319         callers updated.
 320
 321 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
 322             Richard Biener  <rguenth@suse.de>
 323
 324         PR libgomp/83590
 325         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
 326         return early, inline manually is_gimple_sizepos.  Make sure if we
 327         call gimplify_expr we don't end up with a gimple constant.
 328         * tree.c (variably_modified_type_p): Don't return true for
 329         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
 330         * gimplify.h (is_gimple_sizepos): Remove.
 331
 332 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
 333
 334         PR tree-optimization/83857
 335         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
 336         vectorizable_live_operation for pure SLP statements.
 337         (vectorizable_live_operation): Handle PHIs.
 338
 339 2018-01-16  Richard Biener  <rguenther@suse.de>
 340
 341         PR tree-optimization/83867
 342         * tree-vect-stmts.c (vect_transform_stmt): Precompute
 343         nested_in_vect_loop_p since the scalar stmt may get invalidated.
 344
 345 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
 346
 347         PR c/83844
 348         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
 349         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
 350         If off is not INTEGER_CST, issue a may not be aligned warning
 351         rather than isn't aligned.  Use isn%'t rather than isn't.
 352         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
 353         into MULT_EXPR.
 354         <case MULT_EXPR>: Improve the case when bottom and one of the
 355         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
 356         operand, in that case check if the other operand is multiple of
 357         bottom divided by the INTEGER_CST operand.
 358
 359 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
 360
 361         PR target/83858
 362         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
 363         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
 364         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
 365         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
 366         * config/pa/pa.c (pa_function_arg_advance): Likewise.
 367         (pa_function_arg, pa_arg_partial_bytes): Likewise.
 368         (pa_function_arg_size): New function.
 369
 370 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
 371
 372         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
 373         in a separate statement.
 374
 375 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
 376
 377         PR tree-optimization/83847
 378         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
 379         group gathers and scatters.
 380
 381 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
 382
 383         PR rtl-optimization/86620
 384         * params.def (max-sched-ready-insns): Bump minimum value to 1.
 385
 386         PR rtl-optimization/83213
 387         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
 388         to last if both are JUMP_INSNs.
 389
 390         PR tree-optimization/83843
 391         * gimple-ssa-store-merging.c
 392         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
 393         store_immediate_info for bswap/nop orig_stores.
 394
 395 2018-01-15  Andrew Waterman  <andrew@sifive.com>
 396
 397         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
 398         !TARGET_MUL.
 399         <UDIV>: Increase cost if !TARGET_DIV.
 400
 401 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
 402
 403         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
 404         (define_attr "cr_logical_3op"): New.
 405         (cceq_ior_compare): Adjust.
 406         (cceq_ior_compare_complement): Adjust.
 407         (*cceq_rev_compare): Adjust.
 408         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
 409         (is_cracked_insn): Adjust.
 410         (insn_must_be_first_in_group): Adjust.
 411         * config/rs6000/40x.md: Adjust.
 412         * config/rs6000/440.md: Adjust.
 413         * config/rs6000/476.md: Adjust.
 414         * config/rs6000/601.md: Adjust.
 415         * config/rs6000/603.md: Adjust.
 416         * config/rs6000/6xx.md: Adjust.
 417         * config/rs6000/7450.md: Adjust.
 418         * config/rs6000/7xx.md: Adjust.
 419         * config/rs6000/8540.md: Adjust.
 420         * config/rs6000/cell.md: Adjust.
 421         * config/rs6000/e300c2c3.md: Adjust.
 422         * config/rs6000/e500mc.md: Adjust.
 423         * config/rs6000/e500mc64.md: Adjust.
 424         * config/rs6000/e5500.md: Adjust.
 425         * config/rs6000/e6500.md: Adjust.
 426         * config/rs6000/mpc.md: Adjust.
 427         * config/rs6000/power4.md: Adjust.
 428         * config/rs6000/power5.md: Adjust.
 429         * config/rs6000/power6.md: Adjust.
 430         * config/rs6000/power7.md: Adjust.
 431         * config/rs6000/power8.md: Adjust.
 432         * config/rs6000/power9.md: Adjust.
 433         * config/rs6000/rs64.md: Adjust.
 434         * config/rs6000/titan.md: Adjust.
 435
 436 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 437
 438         * config/i386/predicates.md (indirect_branch_operand): Rewrite
 439         ix86_indirect_branch_register logic.
 440
 441 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 442
 443         * config/i386/constraints.md (Bs): Update
 444         ix86_indirect_branch_register check.  Don't check
 445         ix86_indirect_branch_register with GOT_memory_operand.
 446         (Bw): Likewise.
 447         * config/i386/predicates.md (GOT_memory_operand): Don't check
 448         ix86_indirect_branch_register here.
 449         (GOT32_symbol_operand): Likewise.
 450
 451 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 452
 453         * config/i386/predicates.md (constant_call_address_operand):
 454         Rewrite ix86_indirect_branch_register logic.
 455         (sibcall_insn_operand): Likewise.
 456
 457 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 458
 459         * config/i386/constraints.md (Bs): Replace
 460         ix86_indirect_branch_thunk_register with
 461         ix86_indirect_branch_register.
 462         (Bw): Likewise.
 463         * config/i386/i386.md (indirect_jump): Likewise.
 464         (tablejump): Likewise.
 465         (*sibcall_memory): Likewise.
 466         (*sibcall_value_memory): Likewise.
 467         Peepholes of indirect call and jump via memory: Likewise.
 468         * config/i386/i386.opt: Likewise.
 469         * config/i386/predicates.md (indirect_branch_operand): Likewise.
 470         (GOT_memory_operand): Likewise.
 471         (call_insn_operand): Likewise.
 472         (sibcall_insn_operand): Likewise.
 473         (GOT32_symbol_operand): Likewise.
 474
 475 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
 476
 477         PR middle-end/83837
 478         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
 479         type rather than type addr's type points to.
 480         (expand_omp_atomic_mutex): Likewise.
 481         (expand_omp_atomic): Likewise.
 482
 483 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 484
 485         PR target/83839
 486         * config/i386/i386.c (output_indirect_thunk_function): Use
 487         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
 488         for  __x86_return_thunk.
 489
 490 2018-01-15  Richard Biener  <rguenther@suse.de>
 491
 492         PR middle-end/83850
 493         * expmed.c (extract_bit_field_1): Fix typo.
 494
 495 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 496
 497         PR target/83687
 498         * config/arm/iterators.md (VF): New mode iterator.
 499         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
 500         Remove integer-related logic from pattern.
 501         (neon_vabd<mode>_3): Likewise.
 502
 503 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
 504
 505         PR middle-end/82694
 506         * common.opt (fstrict-overflow): No longer an alias.
 507         (fwrapv-pointer): New option.
 508         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
 509         also for pointer types based on flag_wrapv_pointer.
 510         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
 511         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
 512         opts->x_flag_wrapv got set.
 513         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
 514         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
 515         POINTER_TYPE_OVERFLOW_UNDEFINED.
 516         * match.pd: Likewise in address comparison pattern.
 517         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
 518
 519 2018-01-15  Richard Biener  <rguenther@suse.de>
 520
 521         PR lto/83804
 522         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
 523         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
 524         Reset type names to their identifier if their TYPE_DECL doesn't
 525         have linkage (and thus is used for ODR and devirt).
 526         (save_debug_info_for_decl): Remove.
 527         (save_debug_info_for_type): Likewise.
 528         (add_tree_to_fld_list): Adjust.
 529         * tree-pretty-print.c (dump_generic_node): Make dumping of
 530         type names more robust.
 531
 532 2018-01-15  Richard Biener  <rguenther@suse.de>
 533
 534         * BASE-VER: Bump to 8.0.1.
 535
 536 2018-01-14  Martin Sebor  <msebor@redhat.com>
 537
 538         PR other/83508
 539         * builtins.c (check_access): Avoid warning when the no-warning bit
 540         is set.
 541
 542 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
 543
 544         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
 545         * ira-color (allocno_hard_regs_compare): Likewise.
 546
 547 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
 548
 549         PR target/83013
 550         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
 551         Use .pushsection/.popsection.
 552
 553 2018-01-14  Martin Sebor  <msebor@redhat.com>
 554
 555         PR c++/81327
 556         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
 557
 558 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
 559
 560         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
 561         entry from extra_headers.
 562         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
 563         extra_headers, make the list bitwise identical to the i?86-*-* one.
 564
 565 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 566
 567         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
 568         -mcmodel=large with -mindirect-branch=thunk,
 569         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
 570         -mfunction-return=thunk-extern.
 571         * doc/invoke.texi: Document -mcmodel=large is incompatible with
 572         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
 573         -mfunction-return=thunk and -mfunction-return=thunk-extern.
 574
 575 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 576
 577         * config/i386/i386.c (print_reg): Print the name of the full
 578         integer register without '%'.
 579         (ix86_print_operand): Handle 'V'.
 580          * doc/extend.texi: Document 'V' modifier.
 581
 582 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 583
 584         * config/i386/constraints.md (Bs): Disallow memory operand for
 585         -mindirect-branch-register.
 586         (Bw): Likewise.
 587         * config/i386/predicates.md (indirect_branch_operand): Likewise.
 588         (GOT_memory_operand): Likewise.
 589         (call_insn_operand): Likewise.
 590         (sibcall_insn_operand): Likewise.
 591         (GOT32_symbol_operand): Likewise.
 592         * config/i386/i386.md (indirect_jump): Call convert_memory_address
 593         for -mindirect-branch-register.
 594         (tablejump): Likewise.
 595         (*sibcall_memory): Likewise.
 596         (*sibcall_value_memory): Likewise.
 597         Disallow peepholes of indirect call and jump via memory for
 598         -mindirect-branch-register.
 599         (*call_pop): Replace m with Bw.
 600         (*call_value_pop): Likewise.
 601         (*sibcall_pop_memory): Replace m with Bs.
 602         * config/i386/i386.opt (mindirect-branch-register): New option.
 603         * doc/invoke.texi: Document -mindirect-branch-register option.
 604
 605 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 606
 607         * config/i386/i386-protos.h (ix86_output_function_return): New.
 608         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
 609         set function_return_type.
 610         (indirect_thunk_name): Add ret_p to indicate thunk for function
 611         return.
 612         (output_indirect_thunk_function): Pass false to
 613         indirect_thunk_name.
 614         (ix86_output_indirect_branch_via_reg): Likewise.
 615         (ix86_output_indirect_branch_via_push): Likewise.
 616         (output_indirect_thunk_function): Create alias for function
 617         return thunk if regno < 0.
 618         (ix86_output_function_return): New function.
 619         (ix86_handle_fndecl_attribute): Handle function_return.
 620         (ix86_attribute_table): Add function_return.
 621         * config/i386/i386.h (machine_function): Add
 622         function_return_type.
 623         * config/i386/i386.md (simple_return_internal): Use
 624         ix86_output_function_return.
 625         (simple_return_internal_long): Likewise.
 626         * config/i386/i386.opt (mfunction-return=): New option.
 627         (indirect_branch): Mention -mfunction-return=.
 628         * doc/extend.texi: Document function_return function attribute.
 629         * doc/invoke.texi: Document -mfunction-return= option.
 630
 631 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         * config/i386/i386-opts.h (indirect_branch): New.
 634         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
 635         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
 636         with local indirect jump when converting indirect call and jump.
 637         (ix86_set_indirect_branch_type): New.
 638         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
 639         (indirectlabelno): New.
 640         (indirect_thunk_needed): Likewise.
 641         (indirect_thunk_bnd_needed): Likewise.
 642         (indirect_thunks_used): Likewise.
 643         (indirect_thunks_bnd_used): Likewise.
 644         (INDIRECT_LABEL): Likewise.
 645         (indirect_thunk_name): Likewise.
 646         (output_indirect_thunk): Likewise.
 647         (output_indirect_thunk_function): Likewise.
 648         (ix86_output_indirect_branch_via_reg): Likewise.
 649         (ix86_output_indirect_branch_via_push): Likewise.
 650         (ix86_output_indirect_branch): Likewise.
 651         (ix86_output_indirect_jmp): Likewise.
 652         (ix86_code_end): Call output_indirect_thunk_function if needed.
 653         (ix86_output_call_insn): Call ix86_output_indirect_branch if
 654         needed.
 655         (ix86_handle_fndecl_attribute): Handle indirect_branch.
 656         (ix86_attribute_table): Add indirect_branch.
 657         * config/i386/i386.h (machine_function): Add indirect_branch_type
 658         and has_local_indirect_jump.
 659         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
 660         to true.
 661         (tablejump): Likewise.
 662         (*indirect_jump): Use ix86_output_indirect_jmp.
 663         (*tablejump_1): Likewise.
 664         (simple_return_indirect_internal): Likewise.
 665         * config/i386/i386.opt (mindirect-branch=): New option.
 666         (indirect_branch): New.
 667         (keep): Likewise.
 668         (thunk): Likewise.
 669         (thunk-inline): Likewise.
 670         (thunk-extern): Likewise.
 671         * doc/extend.texi: Document indirect_branch function attribute.
 672         * doc/invoke.texi: Document -mindirect-branch= option.
 673
 674 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
 675
 676         PR ipa/83051
 677         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
 678
 679 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
 680
 681         * ipa-inline.c (want_inline_small_function_p): Return false if
 682         inlining has already failed with CIF_FINAL_ERROR.
 683         (update_caller_keys): Call want_inline_small_function_p before
 684         can_inline_edge_p.
 685         (update_callee_keys): Likewise.
 686
 687 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
 688
 689         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
 690         New function.
 691         (rs6000_quadword_masked_address_p): Likewise.
 692         (quad_aligned_load_p): Likewise.
 693         (quad_aligned_store_p): Likewise.
 694         (const_load_sequence_p): Add comment to describe the outer-most loop.
 695         (mimic_memory_attributes_and_flags): New function.
 696         (rs6000_gen_stvx): Likewise.
 697         (replace_swapped_aligned_store): Likewise.
 698         (rs6000_gen_lvx): Likewise.
 699         (replace_swapped_aligned_load): Likewise.
 700         (replace_swapped_load_constant): Capitalize argument name in
 701         comment describing this function.
 702         (rs6000_analyze_swaps): Add a third pass to search for vector loads
 703         and stores that access quad-word aligned addresses and replace
 704         with stvx or lvx instructions when appropriate.
 705         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
 706         New function prototype.
 707         (rs6000_quadword_masked_address_p): Likewise.
 708         (rs6000_gen_lvx): Likewise.
 709         (rs6000_gen_stvx): Likewise.
 710         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
 711         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
 712         when memory address is aligned.
 713         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
 714         this split to select lvx instruction when memory address is aligned.
 715         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
 716         instruction when memory address is aligned.
 717         (*vsx_le_perm_load_v16qi): Likewise.
 718         (four unnamed splitters): Modify to select the stvx instruction
 719         when memory is aligned.
 720
 721 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
 722
 723         * predict.c (determine_unlikely_bbs): Handle correctly BBs
 724         which appears in the queue multiple times.
 725
 726 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 727             Alan Hayward  <alan.hayward@arm.com>
 728             David Sherwood  <david.sherwood@arm.com>
 729
 730         * tree-vectorizer.h (vec_lower_bound): New structure.
 731         (_loop_vec_info): Add check_nonzero and lower_bounds.
 732         (LOOP_VINFO_CHECK_NONZERO): New macro.
 733         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
 734         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
 735         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
 736         fields.  Make seg_len the distance travelled, not including the
 737         access size.
 738         (dr_direction_indicator): Declare.
 739         (dr_zero_step_indicator): Likewise.
 740         (dr_known_forward_stride_p): Likewise.
 741         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
 742         tree-ssanames.h.
 743         (runtime_alias_check_p): Allow runtime alias checks with
 744         variable strides.
 745         (operator ==): Compare access_size and align.
 746         (prune_runtime_alias_test_list): Rework for new distinction between
 747         the access_size and seg_len.
 748         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
 749         segment lengths.
 750         (get_segment_min_max): New function.
 751         (create_intersect_range_checks): Use it.
 752         (dr_step_indicator): New function.
 753         (dr_direction_indicator): Likewise.
 754         (dr_zero_step_indicator): Likewise.
 755         (dr_known_forward_stride_p): Likewise.
 756         * tree-loop-distribution.c (data_ref_segment_size): Return
 757         DR_STEP * (niters - 1).
 758         (compute_alias_check_pairs): Update call to the dr_with_seg_len
 759         constructor.
 760         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
 761         (vect_preserves_scalar_order_p): New function, split out from...
 762         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
 763         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
 764         (vect_vfa_access_size): New function.
 765         (vect_vfa_align): Likewise.
 766         (vect_compile_time_alias): Take access_size_a and access_b arguments.
 767         (dump_lower_bound): New function.
 768         (vect_check_lower_bound): Likewise.
 769         (vect_small_gap_p): Likewise.
 770         (vectorizable_with_step_bound_p): Likewise.
 771         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
 772         depencies if the vectorization factor is 1.  Convert the checks
 773         for nonzero steps into checks on the bounds of DR_STEP.  Try using
 774         a bunds check for variable steps if the minimum required step is
 775         relatively small. Update calls to the dr_with_seg_len
 776         constructor and to vect_compile_time_alias.
 777         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
 778         function.
 779         (vect_loop_versioning): Call it.
 780         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
 781         when retrying.
 782         (vect_estimate_min_profitable_iters): Account for any bounds checks.
 783
 784 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 785             Alan Hayward  <alan.hayward@arm.com>
 786             David Sherwood  <david.sherwood@arm.com>
 787
 788         * doc/sourcebuild.texi (vect_scatter_store): Document.
 789         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
 790         optabs.
 791         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
 792         Document.
 793         * genopinit.c (main): Add supports_vec_scatter_store and
 794         supports_vec_scatter_store_cached to target_optabs.
 795         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
 796         IFN_MASK_SCATTER_STORE.
 797         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
 798         functions.
 799         * internal-fn.h (internal_store_fn_p): Declare.
 800         (internal_fn_stored_value_index): Likewise.
 801         * internal-fn.c (scatter_store_direct): New macro.
 802         (expand_scatter_store_optab_fn): New function.
 803         (direct_scatter_store_optab_supported_p): New macro.
 804         (internal_store_fn_p): New function.
 805         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
 806         IFN_MASK_SCATTER_STORE.
 807         (internal_fn_mask_index): Likewise.
 808         (internal_fn_stored_value_index): New function.
 809         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
 810         for scatter stores.
 811         * optabs-query.h (supports_vec_scatter_store_p): Declare.
 812         * optabs-query.c (supports_vec_scatter_store_p): New function.
 813         * tree-vectorizer.h (vect_get_store_rhs): Declare.
 814         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
 815         true for scatter stores.
 816         (vect_gather_scatter_fn_p): Handle scatter stores too.
 817         (vect_check_gather_scatter): Consider using scatter stores if
 818         supports_vec_scatter_store_p.
 819         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
 820         scatter stores too.
 821         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
 822         internal_fn_stored_value_index.
 823         (check_load_store_masking): Handle scatter stores too.
 824         (vect_get_store_rhs): Make public.
 825         (vectorizable_call): Use internal_store_fn_p.
 826         (vectorizable_store): Handle scatter store internal functions.
 827         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
 828         when deciding whether the end of the group has been reached.
 829         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
 830         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
 831         (mask_scatter_store<mode>): New insns.
 832
 833 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 834             Alan Hayward  <alan.hayward@arm.com>
 835             David Sherwood  <david.sherwood@arm.com>
 836
 837         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
 838         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
 839         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
 840         function.
 841         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
 842         Use vect_truncate_gather_scatter_offset if we can't treat the
 843         operation as a normal gather load or scatter store.
 844         (get_group_load_store_type): Take the gather_scatter_info
 845         as argument.  Try using a gather load or scatter store for
 846         single-element groups.
 847         (get_load_store_type): Update calls to get_group_load_store_type
 848         and vect_use_strided_gather_scatters_p.
 849
 850 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 851             Alan Hayward  <alan.hayward@arm.com>
 852             David Sherwood  <david.sherwood@arm.com>
 853
 854         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
 855         optional tree argument.
 856         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
 857         null target hooks.
 858         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
 859         but continue to use the current value as a fallback.
 860         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
 861         to compare the updates.
 862         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
 863         (get_load_store_type): Use it when handling a strided access.
 864         (vect_get_strided_load_store_ops): New function.
 865         (vect_get_data_ptr_increment): Likewise.
 866         (vectorizable_load): Handle strided gather loads.  Always pass
 867         a step to vect_create_data_ref_ptr and bump_vector_ptr.
 868
 869 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 870             Alan Hayward  <alan.hayward@arm.com>
 871             David Sherwood  <david.sherwood@arm.com>
 872
 873         * doc/md.texi (gather_load@var{m}): Document.
 874         (mask_gather_load@var{m}): Likewise.
 875         * genopinit.c (main): Add supports_vec_gather_load and
 876         supports_vec_gather_load_cached to target_optabs.
 877         * optabs-tree.c (init_tree_optimization_optabs): Use
 878         ggc_cleared_alloc to allocate target_optabs.
 879         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
 880         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
 881         functions.
 882         * internal-fn.h (internal_load_fn_p): Declare.
 883         (internal_gather_scatter_fn_p): Likewise.
 884         (internal_fn_mask_index): Likewise.
 885         (internal_gather_scatter_fn_supported_p): Likewise.
 886         * internal-fn.c (gather_load_direct): New macro.
 887         (expand_gather_load_optab_fn): New function.
 888         (direct_gather_load_optab_supported_p): New macro.
 889         (direct_internal_fn_optab): New function.
 890         (internal_load_fn_p): Likewise.
 891         (internal_gather_scatter_fn_p): Likewise.
 892         (internal_fn_mask_index): Likewise.
 893         (internal_gather_scatter_fn_supported_p): Likewise.
 894         * optabs-query.c (supports_at_least_one_mode_p): New function.
 895         (supports_vec_gather_load_p): Likewise.
 896         * optabs-query.h (supports_vec_gather_load_p): Declare.
 897         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
 898         and memory_type field.
 899         (NUM_PATTERNS): Bump to 15.
 900         * tree-vect-data-refs.c: Include internal-fn.h.
 901         (vect_gather_scatter_fn_p): New function.
 902         (vect_describe_gather_scatter_call): Likewise.
 903         (vect_check_gather_scatter): Try using internal functions for
 904         gather loads.  Recognize existing calls to a gather load function.
 905         (vect_analyze_data_refs): Consider using gather loads if
 906         supports_vec_gather_load_p.
 907         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
 908         (vect_get_gather_scatter_offset_type): Likewise.
 909         (vect_convert_mask_for_vectype): Likewise.
 910         (vect_add_conversion_to_patterm): Likewise.
 911         (vect_try_gather_scatter_pattern): Likewise.
 912         (vect_recog_gather_scatter_pattern): New pattern recognizer.
 913         (vect_vect_recog_func_ptrs): Add it.
 914         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
 915         internal_fn_mask_index and internal_gather_scatter_fn_p.
 916         (check_load_store_masking): Take the gather_scatter_info as an
 917         argument and handle gather loads.
 918         (vect_get_gather_scatter_ops): New function.
 919         (vectorizable_call): Check internal_load_fn_p.
 920         (vectorizable_load): Likewise.  Handle gather load internal
 921         functions.
 922         (vectorizable_store): Update call to check_load_store_masking.
 923         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
 924         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
 925         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
 926         (aarch64_gather_scale_operand_d): New predicates.
 927         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
 928         (mask_gather_load<mode>): New insns.
 929
 930 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 931             Alan Hayward  <alan.hayward@arm.com>
 932             David Sherwood  <david.sherwood@arm.com>
 933
 934         * optabs.def (fold_left_plus_optab): New optab.
 935         * doc/md.texi (fold_left_plus_@var{m}): Document.
 936         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
 937         * internal-fn.c (fold_left_direct): Define.
 938         (expand_fold_left_optab_fn): Likewise.
 939         (direct_fold_left_optab_supported_p): Likewise.
 940         * fold-const-call.c (fold_const_fold_left): New function.
 941         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
 942         * tree-parloops.c (valid_reduction_p): New function.
 943         (gather_scalar_reductions): Use it.
 944         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
 945         (vect_finish_replace_stmt): Declare.
 946         * tree-vect-loop.c (fold_left_reduction_fn): New function.
 947         (needs_fold_left_reduction_p): New function, split out from...
 948         (vect_is_simple_reduction): ...here.  Accept reductions that
 949         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
 950         (vect_force_simple_reduction): Also store the reduction type in
 951         the assignment's STMT_VINFO_REDUC_TYPE.
 952         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
 953         (merge_with_identity): New function.
 954         (vect_expand_fold_left): Likewise.
 955         (vectorize_fold_left_reduction): Likewise.
 956         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
 957         scalar phi in place for it.  Check for target support and reject
 958         cases that would reassociate the operation.  Defer the transform
 959         phase to vectorize_fold_left_reduction.
 960         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
 961         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
 962         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
 963
 964 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 965
 966         * tree-if-conv.c (predicate_mem_writes): Remove redundant
 967         call to ifc_temp_var.
 968
 969 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 970             Alan Hayward  <alan.hayward@arm.com>
 971             David Sherwood  <david.sherwood@arm.com>
 972
 973         * target.def (legitimize_address_displacement): Take the original
 974         offset as a poly_int.
 975         * targhooks.h (default_legitimize_address_displacement): Update
 976         accordingly.
 977         * targhooks.c (default_legitimize_address_displacement): Likewise.
 978         * doc/tm.texi: Regenerate.
 979         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
 980         as an argument, moving assert of ad->disp == ad->disp_term to...
 981         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
 982         Try calling targetm.legitimize_address_displacement before expanding
 983         the address rather than afterwards, and adjust for the new interface.
 984         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
 985         Match the new hook interface.  Handle SVE addresses.
 986         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
 987         new hook interface.
 988
 989 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 990
 991         * Makefile.in (OBJS): Add early-remat.o.
 992         * target.def (select_early_remat_modes): New hook.
 993         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
 994         * doc/tm.texi: Regenerate.
 995         * targhooks.h (default_select_early_remat_modes): Declare.
 996         * targhooks.c (default_select_early_remat_modes): New function.
 997         * timevar.def (TV_EARLY_REMAT): New timevar.
 998         * passes.def (pass_early_remat): New pass.
 999         * tree-pass.h (make_pass_early_remat): Declare.
1000         * early-remat.c: New file.
1001         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1002         function.
1003         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1004
1005 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1006             Alan Hayward  <alan.hayward@arm.com>
1007             David Sherwood  <david.sherwood@arm.com>
1008
1009         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1010         vfm1 with a bound_epilog parameter.
1011         (vect_do_peeling): Update calls accordingly, and move the prologue
1012         call earlier in the function.  Treat the base bound_epilog as 0 for
1013         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
1014         this base when peeling for gaps.
1015         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1016         with fully-masked loops.
1017         (vect_estimate_min_profitable_iters): Handle the single peeled
1018         iteration in that case.
1019
1020 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1021             Alan Hayward  <alan.hayward@arm.com>
1022             David Sherwood  <david.sherwood@arm.com>
1023
1024         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1025         single-element interleaving even if the size is not a power of 2.
1026         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1027         accesses for single-element interleaving if the group size is
1028         not a power of 2.
1029
1030 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1031             Alan Hayward  <alan.hayward@arm.com>
1032             David Sherwood  <david.sherwood@arm.com>
1033
1034         * doc/md.texi (fold_extract_last_@var{m}): Document.
1035         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1036         * optabs.def (fold_extract_last_optab): New optab.
1037         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1038         * internal-fn.c (fold_extract_direct): New macro.
1039         (expand_fold_extract_optab_fn): Likewise.
1040         (direct_fold_extract_optab_supported_p): Likewise.
1041         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1042         * tree-vect-loop.c (vect_model_reduction_cost): Handle
1043         EXTRACT_LAST_REDUCTION.
1044         (get_initial_def_for_reduction): Do not create an initial vector
1045         for EXTRACT_LAST_REDUCTION reductions.
1046         (vectorizable_reduction): Leave the scalar phi in place for
1047         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
1048         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
1049         epilogue code for EXTRACT_LAST_REDUCTION and defer the
1050         transform phase to vectorizable_condition.
1051         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1052         split out from...
1053         (vect_finish_stmt_generation): ...here.
1054         (vect_finish_replace_stmt): New function.
1055         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1056         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1057         pattern.
1058         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1059
1060 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1061             Alan Hayward  <alan.hayward@arm.com>
1062             David Sherwood  <david.sherwood@arm.com>
1063
1064         * doc/md.texi (extract_last_@var{m}): Document.
1065         * optabs.def (extract_last_optab): New optab.
1066         * internal-fn.def (EXTRACT_LAST): New internal function.
1067         * internal-fn.c (cond_unary_direct): New macro.
1068         (expand_cond_unary_optab_fn): Likewise.
1069         (direct_cond_unary_optab_supported_p): Likewise.
1070         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1071         loops using EXTRACT_LAST.
1072         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1073         (extract_last_<mode>): ...this optab.
1074         (vec_extract<mode><Vel>): Update accordingly.
1075
1076 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1077             Alan Hayward  <alan.hayward@arm.com>
1078             David Sherwood  <david.sherwood@arm.com>
1079
1080         * target.def (empty_mask_is_expensive): New hook.
1081         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1082         * doc/tm.texi: Regenerate.
1083         * targhooks.h (default_empty_mask_is_expensive): Declare.
1084         * targhooks.c (default_empty_mask_is_expensive): New function.
1085         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1086         if the target says that empty masks are expensive.
1087         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1088         New function.
1089         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1090
1091 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1092             Alan Hayward  <alan.hayward@arm.com>
1093             David Sherwood  <david.sherwood@arm.com>
1094
1095         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1096         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1097         (vect_use_loop_mask_for_alignment_p): New function.
1098         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1099         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1100         niters_skip argument.  Make sure that the first niters_skip elements
1101         of the first iteration are inactive.
1102         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1103         Update call to vect_set_loop_masks_directly.
1104         (get_misalign_in_elems): New function, split out from...
1105         (vect_gen_prolog_loop_niters): ...here.
1106         (vect_update_init_of_dr): Take a code argument that specifies whether
1107         the adjustment should be added or subtracted.
1108         (vect_update_init_of_drs): Likewise.
1109         (vect_prepare_for_masked_peels): New function.
1110         (vect_do_peeling): Skip prologue peeling if we're using a mask
1111         instead.  Update call to vect_update_inits_of_drs.
1112         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1113         mask_skip_niters.
1114         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1115         alignment.  Do not include the number of peeled iterations in
1116         the minimum threshold in that case.
1117         (vectorizable_induction): Adjust the start value down by
1118         LOOP_VINFO_MASK_SKIP_NITERS iterations.
1119         (vect_transform_loop): Call vect_prepare_for_masked_peels.
1120         Take the number of skipped iterations into account when calculating
1121         the loop bounds.
1122         * tree-vect-stmts.c (vect_gen_while_not): New function.
1123
1124 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1125             Alan Hayward  <alan.hayward@arm.com>
1126             David Sherwood  <david.sherwood@arm.com>
1127
1128         * doc/sourcebuild.texi (vect_fully_masked): Document.
1129         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1130         default value to 0.
1131         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1132         split out from...
1133         (vect_analyze_loop_2): ...here. Don't check the vectorization
1134         factor against the number of loop iterations if the loop is
1135         fully-masked.
1136
1137 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1138             Alan Hayward  <alan.hayward@arm.com>
1139             David Sherwood  <david.sherwood@arm.com>
1140
1141         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1142         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1143         (dump_groups): Update accordingly.
1144         (iv_use::mem_type): New member variable.
1145         (address_p): New function.
1146         (record_use): Add a mem_type argument and initialize the new
1147         mem_type field.
1148         (record_group_use): Add a mem_type argument.  Use address_p.
1149         Remove obsolete null checks of base_object.  Update call to record_use.
1150         (find_interesting_uses_op): Update call to record_group_use.
1151         (find_interesting_uses_cond): Likewise.
1152         (find_interesting_uses_address): Likewise.
1153         (get_mem_type_for_internal_fn): New function.
1154         (find_address_like_use): Likewise.
1155         (find_interesting_uses_stmt): Try find_address_like_use before
1156         calling find_interesting_uses_op.
1157         (addr_offset_valid_p): Use the iv mem_type field as the type
1158         of the addressed memory.
1159         (add_autoinc_candidates): Likewise.
1160         (get_address_cost): Likewise.
1161         (split_small_address_groups_p): Use address_p.
1162         (split_address_groups): Likewise.
1163         (add_iv_candidate_for_use): Likewise.
1164         (autoinc_possible_for_pair): Likewise.
1165         (rewrite_groups): Likewise.
1166         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1167         (determine_group_iv_cost): Update after split of USE_ADDRESS.
1168         (get_alias_ptr_type_for_ptr_address): New function.
1169         (rewrite_use_address): Rewrite address uses in calls that were
1170         identified by find_address_like_use.
1171
1172 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1173             Alan Hayward  <alan.hayward@arm.com>
1174             David Sherwood  <david.sherwood@arm.com>
1175
1176         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1177         TARGET_MEM_REFs.
1178         * gimple-expr.h (is_gimple_addressable: Likewise.
1179         * gimple-expr.c (is_gimple_address): Likewise.
1180         * internal-fn.c (expand_call_mem_ref): New function.
1181         (expand_mask_load_optab_fn): Use it.
1182         (expand_mask_store_optab_fn): Likewise.
1183
1184 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1185             Alan Hayward  <alan.hayward@arm.com>
1186             David Sherwood  <david.sherwood@arm.com>
1187
1188         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1189         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1190         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1191         (cond_umax@var{mode}): Document.
1192         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1193         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1194         (cond_umin_optab, cond_umax_optab): New optabs.
1195         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1196         (COND_IOR, COND_XOR): New internal functions.
1197         * internal-fn.h (get_conditional_internal_fn): Declare.
1198         * internal-fn.c (cond_binary_direct): New macro.
1199         (expand_cond_binary_optab_fn): Likewise.
1200         (direct_cond_binary_optab_supported_p): Likewise.
1201         (get_conditional_internal_fn): New function.
1202         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1203         Cope with reduction statements that are vectorized as calls rather
1204         than assignments.
1205         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1206         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1207         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1208         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1209         (UNSPEC_COND_EOR): New unspecs.
1210         (optab): Add mappings for them.
1211         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1212         (sve_int_op, sve_fp_op): New int attributes.
1213
1214 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1215             Alan Hayward  <alan.hayward@arm.com>
1216             David Sherwood  <david.sherwood@arm.com>
1217
1218         * optabs.def (while_ult_optab): New optab.
1219         * doc/md.texi (while_ult@var{m}@var{n}): Document.
1220         * internal-fn.def (WHILE_ULT): New internal function.
1221         * internal-fn.h (direct_internal_fn_supported_p): New override
1222         that takes two types as argument.
1223         * internal-fn.c (while_direct): New macro.
1224         (expand_while_optab_fn): New function.
1225         (convert_optab_supported_p): Likewise.
1226         (direct_while_optab_supported_p): New macro.
1227         * wide-int.h (wi::udiv_ceil): New function.
1228         * tree-vectorizer.h (rgroup_masks): New structure.
1229         (vec_loop_masks): New typedef.
1230         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1231         and fully_masked_p.
1232         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1233         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1234         (vect_max_vf): New function.
1235         (slpeel_make_loop_iterate_ntimes): Delete.
1236         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1237         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1238         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1239         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1240         internal-fn.h, stor-layout.h and optabs-query.h.
1241         (vect_set_loop_mask): New function.
1242         (add_preheader_seq): Likewise.
1243         (add_header_seq): Likewise.
1244         (interleave_supported_p): Likewise.
1245         (vect_maybe_permute_loop_masks): Likewise.
1246         (vect_set_loop_masks_directly): Likewise.
1247         (vect_set_loop_condition_masked): Likewise.
1248         (vect_set_loop_condition_unmasked): New function, split out from
1249         slpeel_make_loop_iterate_ntimes.
1250         (slpeel_make_loop_iterate_ntimes): Rename to..
1251         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
1252         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1253         (vect_do_peeling): Update call accordingly.
1254         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1255         loops.
1256         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1257         mask_compare_type, can_fully_mask_p and fully_masked_p.
1258         (release_vec_loop_masks): New function.
1259         (_loop_vec_info): Use it to free the loop masks.
1260         (can_produce_all_loop_masks_p): New function.
1261         (vect_get_max_nscalars_per_iter): Likewise.
1262         (vect_verify_full_masking): Likewise.
1263         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1264         retries, and free the mask rgroups before retrying.  Check loop-wide
1265         reasons for disallowing fully-masked loops.  Make the final decision
1266         about whether use a fully-masked loop or not.
1267         (vect_estimate_min_profitable_iters): Do not assume that peeling
1268         for the number of iterations will be needed for fully-masked loops.
1269         (vectorizable_reduction): Disable fully-masked loops.
1270         (vectorizable_live_operation): Likewise.
1271         (vect_halve_mask_nunits): New function.
1272         (vect_double_mask_nunits): Likewise.
1273         (vect_record_loop_mask): Likewise.
1274         (vect_get_loop_mask): Likewise.
1275         (vect_transform_loop): Handle the case in which the final loop
1276         iteration might handle a partial vector.  Call vect_set_loop_condition
1277         instead of slpeel_make_loop_iterate_ntimes.
1278         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1279         (check_load_store_masking): New function.
1280         (prepare_load_store_mask): Likewise.
1281         (vectorizable_store): Handle fully-masked loops.
1282         (vectorizable_load): Likewise.
1283         (supportable_widening_operation): Use vect_halve_mask_nunits for
1284         booleans.
1285         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1286         (vect_gen_while): New function.
1287         * config/aarch64/aarch64.md (umax<mode>3): New expander.
1288         (aarch64_uqdec<mode>): New insn.
1289
1290 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1291             Alan Hayward  <alan.hayward@arm.com>
1292             David Sherwood  <david.sherwood@arm.com>
1293
1294         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1295         (reduc_xor_scal_optab): New optabs.
1296         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1297         (reduc_xor_scal_@var{m}): Document.
1298         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1299         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1300         internal functions.
1301         * fold-const-call.c (fold_const_call): Handle them.
1302         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1303         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1304         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1305         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1306         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1307         (UNSPEC_XORV): New unspecs.
1308         (optab): Add entries for them.
1309         (BITWISEV): New int iterator.
1310         (bit_reduc_op): New int attributes.
1311
1312 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1313             Alan Hayward  <alan.hayward@arm.com>
1314             David Sherwood  <david.sherwood@arm.com>
1315
1316         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1317         * internal-fn.def (VEC_SHL_INSERT): New internal function.
1318         * optabs.def (vec_shl_insert_optab): New optab.
1319         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1320         (duplicate_and_interleave): Likewise.
1321         * tree-vect-loop.c: Include internal-fn.h.
1322         (neutral_op_for_slp_reduction): New function, split out from
1323         get_initial_defs_for_reduction.
1324         (get_initial_def_for_reduction): Handle option 2 for variable-length
1325         vectors by loading the neutral value into a vector and then shifting
1326         the initial value into element 0.
1327         (get_initial_defs_for_reduction): Replace the code argument with
1328         the neutral value calculated by neutral_op_for_slp_reduction.
1329         Use gimple_build_vector for constant-length vectors.
1330         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1331         but the first group_size elements have a neutral value.
1332         Use duplicate_and_interleave otherwise.
1333         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1334         Update call to get_initial_defs_for_reduction.  Handle SLP
1335         reductions for variable-length vectors by creating one vector
1336         result for each scalar result, with the elements associated
1337         with other scalar results stubbed out with the neutral value.
1338         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1339         Require IFN_VEC_SHL_INSERT for double reductions on
1340         variable-length vectors, or SLP reductions that have
1341         a neutral value.  Require can_duplicate_and_interleave_p
1342         support for variable-length unchained SLP reductions if there
1343         is no neutral value, such as for MIN/MAX reductions.  Also require
1344         the number of vector elements to be a multiple of the number of
1345         SLP statements when doing variable-length unchained SLP reductions.
1346         Update call to vect_create_epilog_for_reduction.
1347         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1348         and remove initial values.
1349         (duplicate_and_interleave): Make public.
1350         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1351         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1352
1353 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1354             Alan Hayward  <alan.hayward@arm.com>
1355             David Sherwood  <david.sherwood@arm.com>
1356
1357         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1358         (can_duplicate_and_interleave_p): New function.
1359         (vect_get_and_check_slp_defs): Take the vector of statements
1360         rather than just the current one.  Remove excess parentheses.
1361         Restriction rejectinon of vect_constant_def and vect_external_def
1362         for variable-length vectors to boolean types, or types for which
1363         can_duplicate_and_interleave_p is false.
1364         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1365         (duplicate_and_interleave): New function.
1366         (vect_get_constant_vectors): Use gimple_build_vector for
1367         constant-length vectors and suitable variable-length constant
1368         vectors.  Use duplicate_and_interleave for other variable-length
1369         vectors.  Don't defer the update when inserting new statements.
1370
1371 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1372             Alan Hayward  <alan.hayward@arm.com>
1373             David Sherwood  <david.sherwood@arm.com>
1374
1375         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1376         min_profitable_iters doesn't go negative.
1377
1378 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1379             Alan Hayward  <alan.hayward@arm.com>
1380             David Sherwood  <david.sherwood@arm.com>
1381
1382         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1383         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1384         * optabs.def (vec_mask_load_lanes_optab): New optab.
1385         (vec_mask_store_lanes_optab): Likewise.
1386         * internal-fn.def (MASK_LOAD_LANES): New internal function.
1387         (MASK_STORE_LANES): Likewise.
1388         * internal-fn.c (mask_load_lanes_direct): New macro.
1389         (mask_store_lanes_direct): Likewise.
1390         (expand_mask_load_optab_fn): Handle masked operations.
1391         (expand_mask_load_lanes_optab_fn): New macro.
1392         (expand_mask_store_optab_fn): Handle masked operations.
1393         (expand_mask_store_lanes_optab_fn): New macro.
1394         (direct_mask_load_lanes_optab_supported_p): Likewise.
1395         (direct_mask_store_lanes_optab_supported_p): Likewise.
1396         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1397         parameter.
1398         (vect_load_lanes_supported): Likewise.
1399         * tree-vect-data-refs.c (strip_conversion): New function.
1400         (can_group_stmts_p): Likewise.
1401         (vect_analyze_data_ref_accesses): Use it instead of checking
1402         for a pair of assignments.
1403         (vect_store_lanes_supported): Take a masked_p parameter.
1404         (vect_load_lanes_supported): Likewise.
1405         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1406         vect_store_lanes_supported and vect_load_lanes_supported.
1407         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1408         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1409         parameter.  Don't allow gaps for masked accesses.
1410         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
1411         and vect_load_lanes_supported.
1412         (get_load_store_type): Take a masked_p parameter and update
1413         call to get_group_load_store_type.
1414         (vectorizable_store): Update call to get_load_store_type.
1415         Handle IFN_MASK_STORE_LANES.
1416         (vectorizable_load): Update call to get_load_store_type.
1417         Handle IFN_MASK_LOAD_LANES.
1418
1419 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1420             Alan Hayward  <alan.hayward@arm.com>
1421             David Sherwood  <david.sherwood@arm.com>
1422
1423         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1424         modes for SVE.
1425         * config/aarch64/aarch64-protos.h
1426         (aarch64_sve_struct_memory_operand_p): Declare.
1427         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1428         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1429         (VPRED, vpred): Handle SVE structure modes.
1430         * config/aarch64/constraints.md (Utx): New constraint.
1431         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1432         (aarch64_sve_struct_nonimmediate_operand): New predicates.
1433         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1434         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1435         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1436         structure modes.  Split into pieces after RA.
1437         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1438         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1439         New patterns.
1440         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1441         SVE structure modes.
1442         (aarch64_classify_address): Likewise.
1443         (sizetochar): Move earlier in file.
1444         (aarch64_print_operand): Handle SVE register lists.
1445         (aarch64_array_mode): New function.
1446         (aarch64_sve_struct_memory_operand_p): Likewise.
1447         (TARGET_ARRAY_MODE): Redefine.
1448
1449 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1450             Alan Hayward  <alan.hayward@arm.com>
1451             David Sherwood  <david.sherwood@arm.com>
1452
1453         * target.def (array_mode): New target hook.
1454         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1455         * doc/tm.texi: Regenerate.
1456         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1457         * hooks.c (hook_optmode_mode_uhwi_none): New function.
1458         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1459         targetm.array_mode.
1460         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
1461         type sizes.
1462
1463 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1464             Alan Hayward  <alan.hayward@arm.com>
1465             David Sherwood  <david.sherwood@arm.com>
1466
1467         * fold-const.c (fold_binary_loc): Check the argument types
1468         rather than the result type when testing for a vector operation.
1469
1470 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1471
1472         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1473         * doc/tm.texi: Regenerate.
1474
1475 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1476             Alan Hayward  <alan.hayward@arm.com>
1477             David Sherwood  <david.sherwood@arm.com>
1478
1479         * doc/invoke.texi (-msve-vector-bits=): Document new option.
1480         (sve): Document new AArch64 extension.
1481         * doc/md.texi (w): Extend the description of the AArch64
1482         constraint to include SVE vectors.
1483         (Upl, Upa): Document new AArch64 predicate constraints.
1484         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1485         enum.
1486         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1487         (msve-vector-bits=): New option.
1488         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1489         SVE when these are disabled.
1490         (sve): New extension.
1491         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1492         modes.  Adjust their number of units based on aarch64_sve_vg.
1493         (MAX_BITSIZE_MODE_ANY_MODE): Define.
1494         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1495         aarch64_addr_query_type.
1496         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1497         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1498         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1499         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1500         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1501         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1502         (aarch64_simd_imm_zero_p): Delete.
1503         (aarch64_check_zero_based_sve_index_immediate): Declare.
1504         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1505         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1506         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1507         (aarch64_sve_float_mul_immediate_p): Likewise.
1508         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1509         rather than an rtx.
1510         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1511         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1512         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1513         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1514         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1515         (aarch64_regmode_natural_size): Likewise.
1516         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1517         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1518         left one place.
1519         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1520         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1521         for VG and the SVE predicate registers.
1522         (V_ALIASES): Add a "z"-prefixed alias.
1523         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1524         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1525         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1526         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1527         (REG_CLASS_NAMES): Add entries for them.
1528         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
1529         and the predicate registers.
1530         (aarch64_sve_vg): Declare.
1531         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1532         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1533         (REGMODE_NATURAL_SIZE): Define.
1534         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1535         SVE macros.
1536         * config/aarch64/aarch64.c: Include cfgrtl.h.
1537         (simd_immediate_info): Add a constructor for series vectors,
1538         and an associated step field.
1539         (aarch64_sve_vg): New variable.
1540         (aarch64_dbx_register_number): Handle VG and the predicate registers.
1541         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1542         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1543         (VEC_ANY_DATA, VEC_STRUCT): New constants.
1544         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1545         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1546         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1547         (aarch64_get_mask_mode): New functions.
1548         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1549         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1550         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
1551         predicate modes and predicate registers.  Explicitly restrict
1552         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
1553         to store a vector mode if it is recognized by
1554         aarch64_classify_vector_mode.
1555         (aarch64_regmode_natural_size): New function.
1556         (aarch64_hard_regno_caller_save_mode): Return the original mode
1557         for predicates.
1558         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1559         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1560         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1561         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1562         functions.
1563         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
1564         does not overlap dest if the function is frame-related.  Handle
1565         SVE constants.
1566         (aarch64_split_add_offset): New function.
1567         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1568         them aarch64_add_offset.
1569         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1570         and update call to aarch64_sub_sp.
1571         (aarch64_add_cfa_expression): New function.
1572         (aarch64_expand_prologue): Pass extra temporary registers to the
1573         functions above.  Handle the case in which we need to emit new
1574         DW_CFA_expressions for registers that were originally saved
1575         relative to the stack pointer, but now have to be expressed
1576         relative to the frame pointer.
1577         (aarch64_output_mi_thunk): Pass extra temporary registers to the
1578         functions above.
1579         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
1580         IP0 and IP1 values for SVE frames.
1581         (aarch64_expand_vec_series): New function.
1582         (aarch64_expand_sve_widened_duplicate): Likewise.
1583         (aarch64_expand_sve_const_vector): Likewise.
1584         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1585         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
1586         into the register, rather than emitting a SET directly.
1587         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1588         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1589         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1590         (offset_9bit_signed_scaled_p): New functions.
1591         (aarch64_replicate_bitmask_imm): New function.
1592         (aarch64_bitmask_imm): Use it.
1593         (aarch64_cannot_force_const_mem): Reject expressions involving
1594         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
1595         (aarch64_classify_index): Handle SVE indices, by requiring
1596         a plain register index with a scale that matches the element size.
1597         (aarch64_classify_address): Handle SVE addresses.  Assert that
1598         the mode of the address is VOIDmode or an integer mode.
1599         Update call to aarch64_classify_symbol.
1600         (aarch64_classify_symbolic_expression): Update call to
1601         aarch64_classify_symbol.
1602         (aarch64_const_vec_all_in_range_p): New function.
1603         (aarch64_print_vector_float_operand): Likewise.
1604         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
1605         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
1606         and the FP immediates 1.0 and 0.5.
1607         (aarch64_print_address_internal): Handle SVE addresses.
1608         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1609         (aarch64_regno_regclass): Handle predicate registers.
1610         (aarch64_secondary_reload): Handle big-endian reloads of SVE
1611         data modes.
1612         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1613         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1614         (aarch64_convert_sve_vector_bits): New function.
1615         (aarch64_override_options): Use it to handle -msve-vector-bits=.
1616         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1617         rather than an rtx.
1618         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1619         Handle SVE vector and predicate modes.  Accept VL-based constants
1620         that need only one temporary register, and VL offsets that require
1621         no temporary registers.
1622         (aarch64_conditional_register_usage): Mark the predicate registers
1623         as fixed if SVE isn't available.
1624         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1625         Return true for SVE vector and predicate modes.
1626         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1627         rather than an unsigned int.  Handle SVE modes.
1628         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
1629         SVE modes.
1630         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1631         if SVE is enabled.
1632         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1633         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1634         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1635         (aarch64_sve_float_mul_immediate_p): New functions.
1636         (aarch64_sve_valid_immediate): New function.
1637         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1638         Explicitly reject structure modes.  Check for INDEX constants.
1639         Handle PTRUE and PFALSE constants.
1640         (aarch64_check_zero_based_sve_index_immediate): New function.
1641         (aarch64_simd_imm_zero_p): Delete.
1642         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1643         vector modes.  Accept constants in the range of CNT[BHWD].
1644         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1645         ask for an Advanced SIMD mode.
1646         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1647         (aarch64_simd_vector_alignment): Handle SVE predicates.
1648         (aarch64_vectorize_preferred_vector_alignment): New function.
1649         (aarch64_simd_vector_alignment_reachable): Use it instead of
1650         the vector size.
1651         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1652         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1653         functions.
1654         (MAX_VECT_LEN): Delete.
1655         (expand_vec_perm_d): Add a vec_flags field.
1656         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1657         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1658         (aarch64_evpc_ext): Don't apply a big-endian lane correction
1659         for SVE modes.
1660         (aarch64_evpc_rev): Rename to...
1661         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
1662         (aarch64_evpc_rev_global): New function.
1663         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1664         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1665         MAX_VECT_LEN.
1666         (aarch64_evpc_sve_tbl): New function.
1667         (aarch64_expand_vec_perm_const_1): Update after rename of
1668         aarch64_evpc_rev.  Handle SVE permutes too, trying
1669         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1670         than aarch64_evpc_tbl.
1671         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1672         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1673         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1674         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1675         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1676         (aarch64_expand_sve_vcond): New functions.
1677         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1678         of aarch64_vector_mode_p.
1679         (aarch64_dwarf_poly_indeterminate_value): New function.
1680         (aarch64_compute_pressure_classes): Likewise.
1681         (aarch64_can_change_mode_class): Likewise.
1682         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1683         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1684         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1685         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1686         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1687         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1688         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1689         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1690         constraints.
1691         (Dn, Dl, Dr): Accept const as well as const_vector.
1692         (Dz): Likewise.  Compare against CONST0_RTX.
1693         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1694         of "vector" where appropriate.
1695         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1696         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1697         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1698         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1699         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1700         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1701         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1702         (v_int_equiv): Extend to SVE modes.
1703         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1704         mode attributes.
1705         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1706         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1707         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1708         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1709         (SVE_COND_FP_CMP): New int iterators.
1710         (perm_hilo): Handle the new unpack unspecs.
1711         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1712         attributes.
1713         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1714         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1715         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1716         (aarch64_equality_operator, aarch64_constant_vector_operand)
1717         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1718         (aarch64_sve_nonimmediate_operand): Likewise.
1719         (aarch64_sve_general_operand): Likewise.
1720         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1721         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1722         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1723         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1724         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1725         (aarch64_sve_float_arith_immediate): Likewise.
1726         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1727         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1728         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1729         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1730         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1731         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1732         (aarch64_sve_float_arith_operand): Likewise.
1733         (aarch64_sve_float_arith_with_sub_operand): Likewise.
1734         (aarch64_sve_float_mul_operand): Likewise.
1735         (aarch64_sve_vec_perm_operand): Likewise.
1736         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1737         (aarch64_mov_operand): Accept const_poly_int and const_vector.
1738         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1739         as well as const_vector.
1740         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1741         in file.  Use CONST0_RTX and CONSTM1_RTX.
1742         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
1743         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1744         Use aarch64_simd_imm_zero.
1745         * config/aarch64/aarch64-sve.md: New file.
1746         * config/aarch64/aarch64.md: Include it.
1747         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1748         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1749         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1750         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1751         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1752         (sve): New attribute.
1753         (enabled): Disable instructions with the sve attribute unless
1754         TARGET_SVE.
1755         (movqi, movhi): Pass CONST_POLY_INT operaneds through
1756         aarch64_expand_mov_immediate.
1757         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1758         CNT[BHSD] immediates.
1759         (movti): Split CONST_POLY_INT moves into two halves.
1760         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1761         Split additions that need a temporary here if the destination
1762         is the stack pointer.
1763         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1764         (*add<mode>3_poly_1): New instruction.
1765         (set_clobber_cc): New expander.
1766
1767 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1768
1769         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1770         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
1771         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1772         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1773         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
1774         Change innermode from fixed_mode_size to machine_mode.
1775         (simplify_subreg): Update call accordingly.  Handle a constant-sized
1776         subreg of a variable-length CONST_VECTOR.
1777
1778 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1779             Alan Hayward  <alan.hayward@arm.com>
1780             David Sherwood  <david.sherwood@arm.com>
1781
1782         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1783         (add_offset_to_base): New function, split out from...
1784         (create_mem_ref): ...here.  When handling a scale other than 1,
1785         check first whether the address is valid without the offset.
1786         Add it into the base if so, leaving the index and scale as-is.
1787
1788 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
1789
1790         PR c++/83778
1791         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1792         fold_for_warn before checking if arg2 is INTEGER_CST.
1793
1794 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
1795
1796         * config/rs6000/predicates.md (load_multiple_operation): Delete.
1797         (store_multiple_operation): Delete.
1798         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1799         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1800         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1801         guarded by TARGET_STRING.
1802         (rs6000_output_load_multiple): Delete.
1803         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1804         OPTION_MASK_STRING / TARGET_STRING handling.
1805         (print_operand) <'N', 'O'>: Add comment that these are unused now.
1806         (const rs6000_opt_masks) <"string">: Change mask to 0.
1807         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1808         (MASK_STRING): Delete.
1809         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1810         parts.  Simplify.
1811         (load_multiple): Delete.
1812         (*ldmsi8): Delete.
1813         (*ldmsi7): Delete.
1814         (*ldmsi6): Delete.
1815         (*ldmsi5): Delete.
1816         (*ldmsi4): Delete.
1817         (*ldmsi3): Delete.
1818         (store_multiple): Delete.
1819         (*stmsi8): Delete.
1820         (*stmsi7): Delete.
1821         (*stmsi6): Delete.
1822         (*stmsi5): Delete.
1823         (*stmsi4): Delete.
1824         (*stmsi3): Delete.
1825         (movmemsi_8reg): Delete.
1826         (corresponding unnamed define_insn): Delete.
1827         (movmemsi_6reg): Delete.
1828         (corresponding unnamed define_insn): Delete.
1829         (movmemsi_4reg): Delete.
1830         (corresponding unnamed define_insn): Delete.
1831         (movmemsi_2reg): Delete.
1832         (corresponding unnamed define_insn): Delete.
1833         (movmemsi_1reg): Delete.
1834         (corresponding unnamed define_insn): Delete.
1835         * config/rs6000/rs6000.opt (mno-string): New.
1836         (mstring): Replace by deprecation warning stub.
1837         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1838
1839 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
1840
1841         * regrename.c (regrename_do_replace): If replacing the same
1842         reg multiple times, try to reuse last created gen_raw_REG.
1843
1844         PR debug/81155
1845         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1846         main to workaround a bug in GDB.
1847
1848 2018-01-12  Tom de Vries  <tom@codesourcery.com>
1849
1850         PR target/83737
1851         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1852
1853 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
1854
1855         PR rtl-optimization/80481
1856         * ira-color.c (get_cap_member): New function.
1857         (allocnos_conflict_by_live_ranges_p): Use it.
1858         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1859         (setup_slot_coalesced_allocno_live_ranges): Ditto.
1860
1861 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
1862
1863         PR target/83628
1864         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1865         (*saddl_se_1): Ditto.
1866         (*ssubsi_1): Ditto.
1867         (*ssubl_se_1): Ditto.
1868
1869 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1870
1871         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1872         rather than wi::to_widest for DR_INITs.
1873         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1874         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1875         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1876         INTEGER_CSTs.
1877         (vect_analyze_group_access_1): Note that here.
1878
1879 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1880
1881         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1882         polynomial type sizes.
1883
1884 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1885
1886         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1887         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1888         (gimple_add_tmp_var): Likewise.
1889
1890 2018-01-12  Martin Liska  <mliska@suse.cz>
1891
1892         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1893         (gimple_alloc_sizes): Likewise.
1894         (dump_gimple_statistics): Use PRIu64 in printf format.
1895         * gimple.h: Change uint64_t to int.
1896
1897 2018-01-12  Martin Liska  <mliska@suse.cz>
1898
1899         * tree-core.h: Use uint64_t instead of int.
1900         * tree.c (tree_node_counts): Likewise.
1901         (tree_node_sizes): Likewise.
1902         (dump_tree_statistics): Use PRIu64 in printf format.
1903
1904 2018-01-12  Martin Liska  <mliska@suse.cz>
1905
1906         * Makefile.in: As qsort_chk is implemented in vec.c, add
1907         vec.o to linkage of gencfn-macros.
1908         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1909         passing the info to record_node_allocation_statistics.
1910         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1911         and pass the info.
1912         * ggc-common.c (struct ggc_usage): Add operator== and use
1913         it in operator< and compare function.
1914         * mem-stats.h (struct mem_usage): Likewise.
1915         * vec.c (struct vec_usage): Remove operator< and compare
1916         function. Can be simply inherited.
1917
1918 2018-01-12  Martin Jambor  <mjambor@suse.cz>
1919
1920         PR target/81616
1921         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1922         * tree-ssa-math-opts.c: Include domwalk.h.
1923         (convert_mult_to_fma_1): New function.
1924         (fma_transformation_info): New type.
1925         (fma_deferring_state): Likewise.
1926         (cancel_fma_deferring): New function.
1927         (result_of_phi): Likewise.
1928         (last_fma_candidate_feeds_initial_phi): Likewise.
1929         (convert_mult_to_fma): Added deferring logic, split actual
1930         transformation to convert_mult_to_fma_1.
1931         (math_opts_dom_walker): New type.
1932         (math_opts_dom_walker::after_dom_children): New method, body moved
1933         here from pass_optimize_widening_mul::execute, added deferring logic
1934         bits.
1935         (pass_optimize_widening_mul::execute): Moved most of code to
1936         math_opts_dom_walker::after_dom_children.
1937         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1938         * config/i386/i386.c (ix86_option_override_internal): Added
1939         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1940
1941 2018-01-12  Richard Biener  <rguenther@suse.de>
1942
1943         PR debug/83157
1944         * dwarf2out.c (gen_variable_die): Do not reset old_die for
1945         inline instance vars.
1946
1947 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
1948
1949         PR target/81819
1950         * config/rx/rx.c (rx_is_restricted_memory_address):
1951         Handle SUBREG case.
1952
1953 2018-01-12  Richard Biener  <rguenther@suse.de>
1954
1955         PR tree-optimization/80846
1956         * target.def (split_reduction): New target hook.
1957         * targhooks.c (default_split_reduction): New function.
1958         * targhooks.h (default_split_reduction): Declare.
1959         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1960         target requests first reduce vectors by combining low and high
1961         parts.
1962         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1963         (get_vectype_for_scalar_type_and_size): Export.
1964         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1965         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1966         * doc/tm.texi: Regenerate.
1967         * config/i386/i386.c (ix86_split_reduction): Implement
1968         TARGET_VECTORIZE_SPLIT_REDUCTION.
1969
1970 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1971
1972         PR target/83368
1973         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1974         in PIC mode except for TARGET_VXWORKS_RTP.
1975         * config/sparc/sparc.c: Include cfgrtl.h.
1976         (TARGET_INIT_PIC_REG): Define.
1977         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1978         (sparc_pic_register_p): New predicate.
1979         (sparc_legitimate_address_p): Use it.
1980         (sparc_legitimize_pic_address): Likewise.
1981         (sparc_delegitimize_address): Likewise.
1982         (sparc_mode_dependent_address_p): Likewise.
1983         (gen_load_pcrel_sym): Remove 4th parameter.
1984         (load_got_register): Adjust call to above.  Remove obsolete stuff.
1985         (sparc_expand_prologue): Do not call load_got_register here.
1986         (sparc_flat_expand_prologue): Likewise.
1987         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1988         (sparc_use_pseudo_pic_reg): New function.
1989         (sparc_init_pic_reg): Likewise.
1990         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1991         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1992
1993 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
1994
1995         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1996         Add item for branch_cost.
1997
1998 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1999
2000         PR rtl-optimization/83565
2001         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2002         not extend the result to a larger mode for rotate operations.
2003         (num_sign_bit_copies1): Likewise.
2004
2005 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2006
2007         PR target/40411
2008         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2009         -symbolic.
2010         Use values-Xc.o for -pedantic.
2011         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2012
2013 2018-01-12  Martin Liska  <mliska@suse.cz>
2014
2015         PR ipa/83054
2016         * ipa-devirt.c (final_warning_record::grow_type_warnings):
2017         New function.
2018         (possible_polymorphic_call_targets): Use it.
2019         (ipa_devirt): Likewise.
2020
2021 2018-01-12  Martin Liska  <mliska@suse.cz>
2022
2023         * profile-count.h (enum profile_quality): Use 0 as invalid
2024         enum value of profile_quality.
2025
2026 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
2027
2028         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2029         -mext-string options.
2030
2031 2018-01-12  Richard Biener  <rguenther@suse.de>
2032
2033         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2034         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2035         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2036         Likewise.
2037         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2038
2039 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
2040
2041         * configure.ac (--with-long-double-format): Add support for the
2042         configuration option to change the default long double format on
2043         PowerPC systems.
2044         * config.gcc (powerpc*-linux*-*): Likewise.
2045         * configure: Regenerate.
2046         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2047         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2048         used without modification.
2049
2050 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2051
2052         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2053         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2054         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2055         MISC_BUILTIN_SPEC_BARRIER.
2056         (rs6000_init_builtins): Likewise.
2057         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2058         enum value.
2059         (speculation_barrier): New define_insn.
2060         * doc/extend.texi: Document __builtin_speculation_barrier.
2061
2062 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2063
2064         PR target/83203
2065         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2066         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2067         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2068         iterators.
2069         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
2070         integral modes instead of "ss" and "sd".
2071         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2072         vectors with 32-bit and 64-bit elements.
2073         (vecdupssescalarmodesuffix): New mode attribute.
2074         (vec_dup<mode>): Use it.
2075
2076 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
2077
2078         PR target/83330
2079         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2080         frame if argument is passed on stack.
2081
2082 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2083
2084         PR target/82682
2085         * ree.c (combine_reaching_defs): Optimize also
2086         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2087         reg2=any_extend(exp); reg1=reg2;, formatting fix.
2088
2089 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2090
2091         PR middle-end/83189
2092         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2093
2094 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2095
2096         PR middle-end/83718
2097         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2098         after they are computed.
2099
2100 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
2101
2102         PR tree-optimization/83695
2103         * gimple-loop-linterchange.cc
2104         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2105         reset cached scev information after interchange.
2106         (pass_linterchange::execute): Remove call to scev_reset_htab.
2107
2108 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2109
2110         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2111         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2112         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2113         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2114         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2115         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2116         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2117         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2118         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2119         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2120         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2121         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2122         (V_lane_reg): Likewise.
2123         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2124         New define_expand.
2125         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2126         (vfmal_lane_low<mode>_intrinsic,
2127         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2128         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2129         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2130         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2131         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2132         vfmsl_lane_high<mode>_intrinsic): New define_insns.
2133
2134 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2135
2136         * config/arm/arm-cpus.in (fp16fml): New feature.
2137         (ALL_SIMD): Add fp16fml.
2138         (armv8.2-a): Add fp16fml as an option.
2139         (armv8.3-a): Likewise.
2140         (armv8.4-a): Add fp16fml as part of fp16.
2141         * config/arm/arm.h (TARGET_FP16FML): Define.
2142         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2143         when appropriate.
2144         * config/arm/arm-modes.def (V2HF): Define.
2145         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2146         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2147         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2148         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2149         vfmsl_low, vfmsl_high): New set of builtins.
2150         * config/arm/iterators.md (PLUSMINUS): New code iterator.
2151         (vfml_op): New code attribute.
2152         (VFMLHALVES): New int iterator.
2153         (VFML, VFMLSEL): New mode attributes.
2154         (V_reg): Define mapping for V2HF.
2155         (V_hi, V_lo): New mode attributes.
2156         (VF_constraint): Likewise.
2157         (vfml_half, vfml_half_selector): New int attributes.
2158         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2159         define_expand.
2160         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2161         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2162         New define_insn.
2163         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2164         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2165         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2166         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
2167         documentation.
2168         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2169         Document new effective target and option set.
2170
2171 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2172
2173         * config/arm/arm-cpus.in (armv8_4): New feature.
2174         (ARMv8_4a): New fgroup.
2175         (armv8.4-a): New arch.
2176         * config/arm/arm-tables.opt: Regenerate.
2177         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2178         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2179         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2180         Add matching rules for -march=armv8.4-a and extensions.
2181         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2182
2183 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
2184
2185         PR target/81821
2186         * config/rx/rx.md (BW): New mode attribute.
2187         (sync_lock_test_and_setsi): Add mode suffix to insn output.
2188
2189 2018-01-11  Richard Biener  <rguenther@suse.de>
2190
2191         PR tree-optimization/83435
2192         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2193         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2194         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2195
2196 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2197             Alan Hayward  <alan.hayward@arm.com>
2198             David Sherwood  <david.sherwood@arm.com>
2199
2200         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2201         field.
2202         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
2203         (aarch64_print_address_internal): Use it to check for a zero offset.
2204
2205 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2206             Alan Hayward  <alan.hayward@arm.com>
2207             David Sherwood  <david.sherwood@arm.com>
2208
2209         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2210         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2211         Return a poly_int64 rather than a HOST_WIDE_INT.
2212         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2213         rather than a HOST_WIDE_INT.
2214         * config/aarch64/aarch64.h (aarch64_frame): Protect with
2215         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
2216         hard_fp_offset, frame_size, initial_adjust, callee_offset and
2217         final_offset from HOST_WIDE_INT to poly_int64.
2218         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2219         to_constant when getting the number of units in an Advanced SIMD
2220         mode.
2221         (aarch64_builtin_vectorized_function): Check for a constant number
2222         of units.
2223         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2224         GET_MODE_SIZE.
2225         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2226         attribute instead of GET_MODE_NUNITS.
2227         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2228         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2229         GET_MODE_SIZE for fixed-size registers.
2230         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2231         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2232         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2233         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2234         (aarch64_print_operand, aarch64_print_address_internal)
2235         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2236         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2237         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2238         Handle polynomial GET_MODE_SIZE.
2239         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
2240         wider than SImode without modification.
2241         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2242         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2243         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2244         passing and returning SVE modes.
2245         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2246         rather than GEN_INT.
2247         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2248         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2249         (aarch64_allocate_and_probe_stack_space): Likewise.
2250         (aarch64_layout_frame): Cope with polynomial offsets.
2251         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2252         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
2253         polynomial offsets.
2254         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2255         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2256         poly_int64 rather than a HOST_WIDE_INT.
2257         (aarch64_get_separate_components, aarch64_process_components)
2258         (aarch64_expand_prologue, aarch64_expand_epilogue)
2259         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2260         (aarch64_anchor_offset): New function, split out from...
2261         (aarch64_legitimize_address): ...here.
2262         (aarch64_builtin_vectorization_cost): Handle polynomial
2263         TYPE_VECTOR_SUBPARTS.
2264         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2265         GET_MODE_NUNITS.
2266         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2267         number of elements from the PARALLEL rather than the mode.
2268         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2269         rather than GET_MODE_BITSIZE.
2270         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2271         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2272         (aarch64_expand_vec_perm_const_1): Handle polynomial
2273         d->perm.length () and d->perm elements.
2274         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
2275         Apply to_constant to d->perm elements.
2276         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2277         polynomial CONST_VECTOR_NUNITS.
2278         (aarch64_move_pointer): Take amount as a poly_int64 rather
2279         than an int.
2280         (aarch64_progress_pointer): Avoid temporary variable.
2281         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2282         the mode attribute instead of GET_MODE.
2283
2284 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2285             Alan Hayward  <alan.hayward@arm.com>
2286             David Sherwood  <david.sherwood@arm.com>
2287
2288         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2289         x exists before using it.
2290         (aarch64_add_constant_internal): Rename to...
2291         (aarch64_add_offset_1): ...this.  Replace regnum with separate
2292         src and dest rtxes.  Handle the case in which they're different,
2293         including when the offset is zero.  Replace scratchreg with an rtx.
2294         Use 2 additions if there is no spare register into which we can
2295         move a 16-bit constant.
2296         (aarch64_add_constant): Delete.
2297         (aarch64_add_offset): Replace reg with separate src and dest
2298         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
2299         Use aarch64_add_offset_1.
2300         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2301         an rtx rather than an int.  Take the delta as a poly_int64
2302         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
2303         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2304         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2305         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2306         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2307         and aarch64_add_sp.
2308         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2309         aarch64_add_constant.
2310
2311 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2312
2313         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2314         Use scalar_float_mode.
2315
2316 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2317
2318         * config/aarch64/aarch64-simd.md
2319         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2320         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2321         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2322         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2323         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2324         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2325         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2326         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2327         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2328         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2329
2330 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
2331
2332         PR target/83514
2333         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2334         targ_options->x_arm_arch_string is non NULL.
2335
2336 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
2337
2338         * config/aarch64/aarch64.h
2339         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
2340
2341 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
2342
2343         PR target/82096
2344         * expmed.c (emit_store_flag_force): Swap if const op0
2345         and change VOIDmode to mode of op0.
2346
2347 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2348
2349         PR rtl-optimization/83761
2350         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2351         than bytes to mode_for_size.
2352
2353 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
2354
2355         PR middle-end/83189
2356         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2357         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2358         profile.
2359
2360 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
2361
2362         PR middle-end/83575
2363         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2364         when in layout mode.
2365         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2366         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2367         partition fixup.
2368
2369 2018-01-10  Michael Collison  <michael.collison@arm.com>
2370
2371         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2372         * config/aarch64/aarch64-option-extension.def: Add
2373         AARCH64_OPT_EXTENSION of 'fp16fml'.
2374         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2375         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2376         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2377         * config/aarch64/constraints.md (Ui7): New constraint.
2378         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2379         (VFMLA_SEL_W): Ditto.
2380         (f16quad): Ditto.
2381         (f16mac1): Ditto.
2382         (VFMLA16_LOW): New int iterator.
2383         (VFMLA16_HIGH): Ditto.
2384         (UNSPEC_FMLAL): New unspec.
2385         (UNSPEC_FMLSL): Ditto.
2386         (UNSPEC_FMLAL2): Ditto.
2387         (UNSPEC_FMLSL2): Ditto.
2388         (f16mac): New code attribute.
2389         * config/aarch64/aarch64-simd-builtins.def
2390         (aarch64_fmlal_lowv2sf): Ditto.
2391         (aarch64_fmlsl_lowv2sf): Ditto.
2392         (aarch64_fmlalq_lowv4sf): Ditto.
2393         (aarch64_fmlslq_lowv4sf): Ditto.
2394         (aarch64_fmlal_highv2sf): Ditto.
2395         (aarch64_fmlsl_highv2sf): Ditto.
2396         (aarch64_fmlalq_highv4sf): Ditto.
2397         (aarch64_fmlslq_highv4sf): Ditto.
2398         (aarch64_fmlal_lane_lowv2sf): Ditto.
2399         (aarch64_fmlsl_lane_lowv2sf): Ditto.
2400         (aarch64_fmlal_laneq_lowv2sf): Ditto.
2401         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2402         (aarch64_fmlalq_lane_lowv4sf): Ditto.
2403         (aarch64_fmlsl_lane_lowv4sf): Ditto.
2404         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2405         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2406         (aarch64_fmlal_lane_highv2sf): Ditto.
2407         (aarch64_fmlsl_lane_highv2sf): Ditto.
2408         (aarch64_fmlal_laneq_highv2sf): Ditto.
2409         (aarch64_fmlsl_laneq_highv2sf): Ditto.
2410         (aarch64_fmlalq_lane_highv4sf): Ditto.
2411         (aarch64_fmlsl_lane_highv4sf): Ditto.
2412         (aarch64_fmlalq_laneq_highv4sf): Ditto.
2413         (aarch64_fmlsl_laneq_highv4sf): Ditto.
2414         * config/aarch64/aarch64-simd.md:
2415         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2416         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2417         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2418         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2419         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2420         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2421         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2422         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2423         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2424         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2425         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2426         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2427         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2428         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2429         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2430         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2431         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2432         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2433         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2434         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2435         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2436         (vfmlsl_low_u32): Ditto.
2437         (vfmlalq_low_u32): Ditto.
2438         (vfmlslq_low_u32): Ditto.
2439         (vfmlal_high_u32): Ditto.
2440         (vfmlsl_high_u32): Ditto.
2441         (vfmlalq_high_u32): Ditto.
2442         (vfmlslq_high_u32): Ditto.
2443         (vfmlal_lane_low_u32): Ditto.
2444         (vfmlsl_lane_low_u32): Ditto.
2445         (vfmlal_laneq_low_u32): Ditto.
2446         (vfmlsl_laneq_low_u32): Ditto.
2447         (vfmlalq_lane_low_u32): Ditto.
2448         (vfmlslq_lane_low_u32): Ditto.
2449         (vfmlalq_laneq_low_u32): Ditto.
2450         (vfmlslq_laneq_low_u32): Ditto.
2451         (vfmlal_lane_high_u32): Ditto.
2452         (vfmlsl_lane_high_u32): Ditto.
2453         (vfmlal_laneq_high_u32): Ditto.
2454         (vfmlsl_laneq_high_u32): Ditto.
2455         (vfmlalq_lane_high_u32): Ditto.
2456         (vfmlslq_lane_high_u32): Ditto.
2457         (vfmlalq_laneq_high_u32): Ditto.
2458         (vfmlslq_laneq_high_u32): Ditto.
2459         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2460         (AARCH64_FL_FOR_ARCH8_4): New.
2461         (AARCH64_ISA_F16FML): New ISA flag.
2462         (TARGET_F16FML): New feature flag for fp16fml.
2463         (doc/invoke.texi): Document new fp16fml option.
2464
2465 2018-01-10  Michael Collison  <michael.collison@arm.com>
2466
2467         * config/aarch64/aarch64-builtins.c:
2468         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2469         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2470         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2471         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2472         (AARCH64_ISA_SHA3): New ISA flag.
2473         (TARGET_SHA3): New feature flag for sha3.
2474         * config/aarch64/iterators.md (sha512_op): New int attribute.
2475         (CRYPTO_SHA512): New int iterator.
2476         (UNSPEC_SHA512H): New unspec.
2477         (UNSPEC_SHA512H2): Ditto.
2478         (UNSPEC_SHA512SU0): Ditto.
2479         (UNSPEC_SHA512SU1): Ditto.
2480         * config/aarch64/aarch64-simd-builtins.def
2481         (aarch64_crypto_sha512hqv2di): New builtin.
2482         (aarch64_crypto_sha512h2qv2di): Ditto.
2483         (aarch64_crypto_sha512su0qv2di): Ditto.
2484         (aarch64_crypto_sha512su1qv2di): Ditto.
2485         (aarch64_eor3qv8hi): Ditto.
2486         (aarch64_rax1qv2di): Ditto.
2487         (aarch64_xarqv2di): Ditto.
2488         (aarch64_bcaxqv8hi): Ditto.
2489         * config/aarch64/aarch64-simd.md:
2490         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2491         (aarch64_crypto_sha512su0qv2di): Ditto.
2492         (aarch64_crypto_sha512su1qv2di): Ditto.
2493         (aarch64_eor3qv8hi): Ditto.
2494         (aarch64_rax1qv2di): Ditto.
2495         (aarch64_xarqv2di): Ditto.
2496         (aarch64_bcaxqv8hi): Ditto.
2497         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2498         (vsha512h2q_u64): Ditto.
2499         (vsha512su0q_u64): Ditto.
2500         (vsha512su1q_u64): Ditto.
2501         (veor3q_u16): Ditto.
2502         (vrax1q_u64): Ditto.
2503         (vxarq_u64): Ditto.
2504         (vbcaxq_u16): Ditto.
2505         * config/arm/types.md (crypto_sha512): New type attribute.
2506         (crypto_sha3): Ditto.
2507         (doc/invoke.texi): Document new sha3 option.
2508
2509 2018-01-10  Michael Collison  <michael.collison@arm.com>
2510
2511         * config/aarch64/aarch64-builtins.c:
2512         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2513         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2514         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2515         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2516         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2517         (AARCH64_ISA_SM4): New ISA flag.
2518         (TARGET_SM4): New feature flag for sm4.
2519         * config/aarch64/aarch64-simd-builtins.def
2520         (aarch64_sm3ss1qv4si): Ditto.
2521         (aarch64_sm3tt1aq4si): Ditto.
2522         (aarch64_sm3tt1bq4si): Ditto.
2523         (aarch64_sm3tt2aq4si): Ditto.
2524         (aarch64_sm3tt2bq4si): Ditto.
2525         (aarch64_sm3partw1qv4si): Ditto.
2526         (aarch64_sm3partw2qv4si): Ditto.
2527         (aarch64_sm4eqv4si): Ditto.
2528         (aarch64_sm4ekeyqv4si): Ditto.
2529         * config/aarch64/aarch64-simd.md:
2530         (aarch64_sm3ss1qv4si): Ditto.
2531         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2532         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2533         (aarch64_sm4eqv4si): Ditto.
2534         (aarch64_sm4ekeyqv4si): Ditto.
2535         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2536         (sm3part_op): Ditto.
2537         (CRYPTO_SM3TT): Ditto.
2538         (CRYPTO_SM3PART): Ditto.
2539         (UNSPEC_SM3SS1): New unspec.
2540         (UNSPEC_SM3TT1A): Ditto.
2541         (UNSPEC_SM3TT1B): Ditto.
2542         (UNSPEC_SM3TT2A): Ditto.
2543         (UNSPEC_SM3TT2B): Ditto.
2544         (UNSPEC_SM3PARTW1): Ditto.
2545         (UNSPEC_SM3PARTW2): Ditto.
2546         (UNSPEC_SM4E): Ditto.
2547         (UNSPEC_SM4EKEY): Ditto.
2548         * config/aarch64/constraints.md (Ui2): New constraint.
2549         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2550         * config/arm/types.md (crypto_sm3): New type attribute.
2551         (crypto_sm4): Ditto.
2552         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2553         (vsm3tt1aq_u32): Ditto.
2554         (vsm3tt1bq_u32): Ditto.
2555         (vsm3tt2aq_u32): Ditto.
2556         (vsm3tt2bq_u32): Ditto.
2557         (vsm3partw1q_u32): Ditto.
2558         (vsm3partw2q_u32): Ditto.
2559         (vsm4eq_u32): Ditto.
2560         (vsm4ekeyq_u32): Ditto.
2561         (doc/invoke.texi): Document new sm4 option.
2562
2563 2018-01-10  Michael Collison  <michael.collison@arm.com>
2564
2565         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2566         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2567         (AARCH64_FL_FOR_ARCH8_4): New.
2568         (AARCH64_FL_V8_4): New flag.
2569         (doc/invoke.texi): Document new armv8.4-a option.
2570
2571 2018-01-10  Michael Collison  <michael.collison@arm.com>
2572
2573         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2574         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2575         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2576         * config/aarch64/aarch64-option-extension.def: Add
2577         AARCH64_OPT_EXTENSION of 'sha2'.
2578         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2579         (crypto): Disable sha2 and aes if crypto disabled.
2580         (crypto): Enable aes and sha2 if enabled.
2581         (simd): Disable sha2 and aes if simd disabled.
2582         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2583         New flags.
2584         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2585         (TARGET_SHA2): New feature flag for sha2.
2586         (TARGET_AES): New feature flag for aes.
2587         * config/aarch64/aarch64-simd.md:
2588         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2589         conditional on TARGET_AES.
2590         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2591         (aarch64_crypto_sha1hsi): Make pattern conditional
2592         on TARGET_SHA2.
2593         (aarch64_crypto_sha1hv4si): Ditto.
2594         (aarch64_be_crypto_sha1hv4si): Ditto.
2595         (aarch64_crypto_sha1su1v4si): Ditto.
2596         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2597         (aarch64_crypto_sha1su0v4si): Ditto.
2598         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2599         (aarch64_crypto_sha256su0v4si): Ditto.
2600         (aarch64_crypto_sha256su1v4si): Ditto.
2601         (doc/invoke.texi): Document new aes and sha2 options.
2602
2603 2018-01-10  Martin Sebor  <msebor@redhat.com>
2604
2605         PR tree-optimization/83781
2606         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2607         as string arrays.
2608
2609 2018-01-11  Martin Sebor  <msebor@gmail.com>
2610             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
2611
2612         PR tree-optimization/83501
2613         PR tree-optimization/81703
2614
2615         * tree-ssa-strlen.c (get_string_cst): Rename...
2616         (get_string_len): ...to this.  Handle global constants.
2617         (handle_char_store): Adjust.
2618
2619 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
2620             Jim Wilson  <jimw@sifive.com>
2621
2622         * config/riscv/riscv-protos.h (riscv_output_return): New.
2623         * config/riscv/riscv.c (struct machine_function): New naked_p field.
2624         (riscv_attribute_table, riscv_output_return),
2625         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2626         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2627         (riscv_compute_frame_info): Only compute frame->mask if not a naked
2628         function.
2629         (riscv_expand_prologue): Add early return for naked function.
2630         (riscv_expand_epilogue): Likewise.
2631         (riscv_function_ok_for_sibcall): Return false for naked function.
2632         (riscv_set_current_function): New.
2633         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2634         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2635         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2636         * doc/extend.texi (RISC-V Function Attributes): New.
2637
2638 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
2639
2640         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2641         check for 128-bit long double before checking TCmode.
2642         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2643         128-bit long doubles before checking TFmode or TCmode.
2644         (FLOAT128_IBM_P): Likewise.
2645
2646 2018-01-10  Martin Sebor  <msebor@redhat.com>
2647
2648         PR tree-optimization/83671
2649         * builtins.c (c_strlen): Unconditionally return zero for the empty
2650         string.
2651         Use -Warray-bounds for warnings.
2652         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2653         for non-constant array indices with COMPONENT_REF, arrays of
2654         arrays, and pointers to arrays.
2655         (gimple_fold_builtin_strlen): Determine and set length range for
2656         non-constant character arrays.
2657
2658 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
2659
2660         PR middle-end/81897
2661         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2662         empty blocks.
2663
2664 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
2665
2666         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2667
2668 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
2669
2670         PR target/83399
2671         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2672         VECTOR_MEM_ALTIVEC_OR_VSX_P.
2673         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2674         indexed_or_indirect_operand predicate.
2675         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2676         (*vsx_le_perm_load_v8hi): Likewise.
2677         (*vsx_le_perm_load_v16qi): Likewise.
2678         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2679         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2680         (*vsx_le_perm_store_v8hi): Likewise.
2681         (*vsx_le_perm_store_v16qi): Likewise.
2682         (eight unnamed splitters): Likewise.
2683
2684 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
2685
2686         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2687         * config/rs6000/emmintrin.h: Likewise.
2688         * config/rs6000/mmintrin.h: Likewise.
2689         * config/rs6000/xmmintrin.h: Likewise.
2690
2691 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
2692
2693         PR c++/43486
2694         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2695         "public_flag".
2696         * tree.c (tree_nop_conversion): Return true for location wrapper
2697         nodes.
2698         (maybe_wrap_with_location): New function.
2699         (selftest::check_strip_nops): New function.
2700         (selftest::test_location_wrappers): New function.
2701         (selftest::tree_c_tests): Call it.
2702         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2703         (maybe_wrap_with_location): New decl.
2704         (EXPR_LOCATION_WRAPPER_P): New macro.
2705         (location_wrapper_p): New inline function.
2706         (tree_strip_any_location_wrapper): New inline function.
2707
2708 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
2709
2710         PR target/83735
2711         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2712         stack_realign_offset for the largest alignment of stack slot
2713         actually used.
2714         (ix86_find_max_used_stack_alignment): New function.
2715         (ix86_finalize_stack_frame_flags): Use it.  Set
2716         max_used_stack_alignment if we don't realign stack.
2717         * config/i386/i386.h (machine_function): Add
2718         max_used_stack_alignment.
2719
2720 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
2721
2722         * config/arm/arm.opt (-mbranch-cost): New option.
2723         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2724         account.
2725
2726 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
2727
2728         PR target/83629
2729         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2730         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2731
2732 2018-01-10  Richard Biener  <rguenther@suse.de>
2733
2734         PR debug/83765
2735         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2736         early out so it also covers the case where we have a non-NULL
2737         origin.
2738
2739 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
2740
2741         PR tree-optimization/83753
2742         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2743         for non-strided grouped accesses if the number of elements is 1.
2744
2745 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
2746
2747         PR target/81616
2748         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2749         * i386.h (TARGET_USE_GATHER): Define.
2750         * x86-tune.def (X86_TUNE_USE_GATHER): New.
2751
2752 2018-01-10  Martin Liska  <mliska@suse.cz>
2753
2754         PR bootstrap/82831
2755         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2756         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2757         partitioning.
2758         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2759         CLEANUP_NO_PARTITIONING is not set.
2760
2761 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
2762
2763         * doc/rtl.texi: Remove documentation of (const ...) wrappers
2764         for vectors, as a partial revert of r254296.
2765         * rtl.h (const_vec_p): Delete.
2766         (const_vec_duplicate_p): Don't test for vector CONSTs.
2767         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2768         * expmed.c (make_tree): Likewise.
2769
2770         Revert:
2771         * common.md (E, F): Use CONSTANT_P instead of checking for
2772         CONST_VECTOR.
2773         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2774         checking for CONST_VECTOR.
2775
2776 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
2777
2778         PR middle-end/83575
2779         * predict.c (force_edge_cold): Handle in more sane way edges
2780         with no prediction.
2781
2782 2018-01-09  Carl Love  <cel@us.ibm.com>
2783
2784         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2785         V4SI, V4SF types.
2786         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2787         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2788         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2789         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
2790         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2791         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
2792         * config/rs6000/rs6000-protos.h: Add extern defition for
2793         rs6000_generate_float2_double_code.
2794         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2795         function.
2796         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2797         (float2_v2df): Add define_expand.
2798
2799 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
2800
2801         PR target/83628
2802         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2803         op_mode in the force_to_mode call.
2804
2805 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
2806
2807         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2808         instead of checking each element individually.
2809         (aarch64_evpc_uzp): Likewise.
2810         (aarch64_evpc_zip): Likewise.
2811         (aarch64_evpc_ext): Likewise.
2812         (aarch64_evpc_rev): Likewise.
2813         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2814         instead of checking each element individually.  Return true without
2815         generating rtl if
2816         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2817         whether all selected elements come from the same input, instead of
2818         checking each element individually.  Remove calls to gen_rtx_REG,
2819         start_sequence and end_sequence and instead assert that no rtl is
2820         generated.
2821
2822 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
2823
2824         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2825         order of HIGH and CONST checks.
2826
2827 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
2828
2829         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2830         if the destination isn't an SSA_NAME.
2831
2832 2018-01-09  Richard Biener  <rguenther@suse.de>
2833
2834         PR tree-optimization/83668
2835         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2836         move prologue...
2837         (canonicalize_loop_form): ... here, renamed from ...
2838         (canonicalize_loop_closed_ssa_form): ... this and amended to
2839         swap successor edges for loop exit blocks to make us use
2840         the RPO order we need for initial schedule generation.
2841
2842 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
2843
2844         PR tree-optimization/64811
2845         * match.pd: When optimizing comparisons with Inf, avoid
2846         introducing or losing exceptions from comparisons with NaN.
2847
2848 2018-01-09  Martin Liska  <mliska@suse.cz>
2849
2850         PR sanitizer/82517
2851         * asan.c (shadow_mem_size): Add gcc_assert.
2852
2853 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
2854
2855         Don't save registers in main().
2856
2857         PR target/83738
2858         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2859         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2860         * config/avr/avr.c (avr_set_current_function): Don't error if
2861         naked, OS_task or OS_main are specified at the same time.
2862         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2863         OS_main.
2864         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2865         attribute.
2866         * common/config/avr/avr-common.c (avr_option_optimization_table):
2867         Switch on -mmain-is-OS_task for optimizing compilations.
2868
2869 2018-01-09  Richard Biener  <rguenther@suse.de>
2870
2871         PR tree-optimization/83572
2872         * graphite.c: Include cfganal.h.
2873         (graphite_transform_loops): Connect infinite loops to exit
2874         and remove fake edges at the end.
2875
2876 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
2877
2878         * ipa-inline.c (edge_badness): Revert accidental checkin.
2879
2880 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
2881
2882         PR ipa/80763
2883         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2884         symbols; not inline clones.
2885
2886 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
2887
2888         PR target/83507
2889         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2890         hard registers.  Formatting fixes.
2891
2892         PR preprocessor/83722
2893         * gcc.c (try_generate_repro): Pass
2894         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2895         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2896         do_report_bug.
2897
2898 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
2899             Kito Cheng  <kito.cheng@gmail.com>
2900
2901         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2902         (riscv_leaf_function_p): Delete.
2903         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2904
2905 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
2906
2907         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2908         function.
2909         (do_ifelse): New function.
2910         (do_isel): New function.
2911         (do_sub3): New function.
2912         (do_add3): New function.
2913         (do_load_mask_compare): New function.
2914         (do_overlap_load_compare): New function.
2915         (expand_compare_loop): New function.
2916         (expand_block_compare): Call expand_compare_loop() when appropriate.
2917         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2918         option description.
2919         (-mblock-compare-inline-loop-limit): New option.
2920
2921 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2922
2923         PR target/83677
2924         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2925         Reverse order of second and third operands in first alternative.
2926         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2927         of first and second elements in UNSPEC_VPERMR vector.
2928         (altivec_expand_vec_perm_le): Likewise.
2929
2930 2017-01-08  Jeff Law  <law@redhat.com>
2931
2932         PR rtl-optimizatin/81308
2933         * tree-switch-conversion.c (cfg_altered): New file scoped static.
2934         (process_switch): If group_case_labels makes a change, then set
2935         cfg_altered.
2936         (pass_convert_switch::execute): If a switch is converted, then
2937         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
2938
2939         PR rtl-optimization/81308
2940         * recog.c (split_all_insns): Conditionally cleanup the CFG after
2941         splitting insns.
2942
2943 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
2944
2945         PR target/83663 - Revert r255946
2946         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2947         generation for cases where splatting a value is not useful.
2948         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2949         across a vec_duplicate and a paradoxical subreg forming a vector
2950         mode to a vec_concat.
2951
2952 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2953
2954         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2955         -march=armv8.3-a variants.
2956         * config/arm/t-multilib: Likewise.
2957         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
2958
2959 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
2960
2961         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2962         to generate rtl.
2963         (cceq_ior_compare_complement): Give it a name so I can use it, and
2964         change boolean_or_operator predicate to boolean_operator so it can
2965         be used to generate a crand.
2966         (eqne): New code iterator.
2967         (bd/bd_neg): New code_attrs.
2968         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2969         a single define_insn.
2970         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2971         decrement (bdnzt/bdnzf/bdzt/bdzf).
2972         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2973         with the new names of the branch decrement patterns, and added the
2974         names of the branch decrement conditional patterns.
2975
2976 2018-01-08  Richard Biener  <rguenther@suse.de>
2977
2978         PR tree-optimization/83563
2979         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2980         cache.
2981
2982 2018-01-08  Richard Biener  <rguenther@suse.de>
2983
2984         PR middle-end/83713
2985         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2986
2987 2018-01-08  Richard Biener  <rguenther@suse.de>
2988
2989         PR tree-optimization/83685
2990         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2991         references to abnormals.
2992
2993 2018-01-08  Richard Biener  <rguenther@suse.de>
2994
2995         PR lto/83719
2996         * dwarf2out.c (output_indirect_strings): Handle empty
2997         skeleton_debug_str_hash.
2998         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2999
3000 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3001
3002         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3003         (emit_store_direct): Likewise.
3004         (arc_trampoline_adjust_address): Likewise.
3005         (arc_asm_trampoline_template): New function.
3006         (arc_initialize_trampoline): Use asm_trampoline_template.
3007         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3008         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3009         * config/arc/arc.md (flush_icache): Delete pattern.
3010
3011 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3012
3013         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3014         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3015         munaligned-access.
3016
3017 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3018
3019         PR target/83681
3020         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3021         by not USED_FOR_TARGET.
3022         (make_pass_resolve_sw_modes): Likewise.
3023
3024 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3025
3026         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3027         USED_FOR_TARGET.
3028
3029 2018-01-08  Richard Biener  <rguenther@suse.de>
3030
3031         PR middle-end/83580
3032         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3033
3034 2018-01-08  Richard Biener  <rguenther@suse.de>
3035
3036         PR middle-end/83517
3037         * match.pd ((t * 2) / 2) -> t): Add missing :c.
3038
3039 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
3040
3041         PR middle-end/81897
3042         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3043         basic blocks with a small number of successors.
3044         (convert_control_dep_chain_into_preds): Improve handling of
3045         forwarder blocks.
3046         (dump_predicates): Split apart into...
3047         (dump_pred_chain): ...here...
3048         (dump_pred_info): ...and here.
3049         (can_one_predicate_be_invalidated_p): Add debugging printfs.
3050         (can_chain_union_be_invalidated_p): Improve check for invalidation
3051         of paths.
3052         (uninit_uses_cannot_happen): Avoid unnecessary if
3053         convert_control_dep_chain_into_preds yielded nothing.
3054
3055 2018-01-06  Martin Sebor  <msebor@redhat.com>
3056
3057         PR tree-optimization/83640
3058         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3059         subtracting negative offset from size.
3060         (builtin_access::overlap): Adjust offset bounds of the access to fall
3061         within the size of the object if possible.
3062
3063 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
3064
3065         PR rtl-optimization/83699
3066         * expmed.c (extract_bit_field_1): Restrict the vector usage of
3067         extract_bit_field_as_subreg to cases in which the extracted
3068         value is also a vector.
3069
3070         * lra-constraints.c (process_alt_operands): Test for the equivalence
3071         substitutions when detecting a possible reload cycle.
3072
3073 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
3074
3075         PR debug/83480
3076         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3077         by default if flag_selective_schedling{,2}.  Formatting fixes.
3078
3079         PR rtl-optimization/83682
3080         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3081         if it has non-VECTOR_MODE element mode.
3082         (vec_duplicate_p): Likewise.
3083
3084         PR middle-end/83694
3085         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3086         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3087
3088 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3089
3090         PR target/83604
3091         * config/i386/i386-builtin.def
3092         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3093         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3094         Require also OPTION_MASK_ISA_AVX512F in addition to
3095         OPTION_MASK_ISA_GFNI.
3096         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3097         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3098         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3099         to OPTION_MASK_ISA_GFNI.
3100         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3101         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3102         OPTION_MASK_ISA_AVX512BW.
3103         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3104         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3105         addition to OPTION_MASK_ISA_GFNI.
3106         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3107         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3108         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3109         to OPTION_MASK_ISA_GFNI.
3110         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3111         a requirement for all ISAs rather than any of them with a few
3112         exceptions.
3113         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3114         processing.
3115         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3116         bitmasks to be enabled with 3 exceptions, instead of requiring any
3117         enabled ISA with lots of exceptions.
3118         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3119         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3120         Change avx512bw in isa attribute to avx512f.
3121         * config/i386/sgxintrin.h: Add license boilerplate.
3122         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
3123         to __AVX512F__ and __AVX512VL to __AVX512VL__.
3124         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3125         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3126         defined.
3127         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3128         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3129         temporarily sse2 rather than sse if not enabled already.
3130
3131         PR target/83604
3132         * config/i386/sse.md (VI248_VLBW): Rename to ...
3133         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
3134         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3135         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3136         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3137         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3138         mode iterator instead of VI248_VLBW.
3139
3140 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
3141
3142         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3143         (record_modified): Skip clobbers; add debug output.
3144         (param_change_prob): Use sreal frequencies.
3145
3146 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3147
3148         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3149         punt for user-aligned variables.
3150
3151 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3152
3153         * tree-chrec.c (chrec_contains_symbols): Return true for
3154         POLY_INT_CST.
3155
3156 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
3157
3158         PR target/82439
3159         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3160         of (x|y) == x for BICS pattern.
3161
3162 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3163
3164         PR tree-optimization/83605
3165         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3166         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3167         can throw.
3168
3169 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3170
3171         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3172         * config/epiphany/rtems.h: New file.
3173
3174 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3175             Uros Bizjak  <ubizjak@gmail.com>
3176
3177         PR target/83554
3178         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3179         QIreg_operand instead of register_operand predicate.
3180         * config/i386/i386.c (ix86_rop_should_change_byte_p,
3181         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3182         comments instead of -fmitigate[-_]rop.
3183
3184 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3185
3186         PR bootstrap/81926
3187         * cgraphunit.c (symbol_table::compile): Switch to text_section
3188         before calling assembly_start debug hook.
3189         * run-rtl-passes.c (run_rtl_passes): Likewise.
3190         Include output.h.
3191
3192 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3193
3194         * tree-vrp.c (extract_range_from_binary_expr_1): Check
3195         range_int_cst_p rather than !symbolic_range_p before calling
3196         extract_range_from_multiplicative_op_1.
3197
3198 2017-01-04  Jeff Law  <law@redhat.com>
3199
3200         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3201         redundant test in assertion.
3202
3203 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3204
3205         * doc/rtl.texi: Document machine_mode wrapper classes.
3206
3207 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3208
3209         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3210         using tree_to_uhwi.
3211
3212 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3213
3214         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3215         the VEC_PERM_EXPR fold to fail.
3216
3217 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3218
3219         PR debug/83585
3220         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3221         to switched_sections.
3222
3223 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3224
3225         PR target/83680
3226         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3227         test for d.testing.
3228
3229 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
3230
3231         PR target/83387
3232         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3233         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3234
3235 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3236
3237         PR debug/83666
3238         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3239         is BLKmode and bitpos not zero or mode change is needed.
3240
3241 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3242
3243         PR target/83675
3244         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3245         TARGET_VIS2.
3246
3247 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
3248
3249         PR target/83628
3250         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3251         instead of MULT rtx.  Update all corresponding splitters.
3252         (*saddl_se): Ditto.
3253         (*ssub<modesuffix>): Ditto.
3254         (*ssubl_se): Ditto.
3255         (*cmp_sadd_di): Update split patterns.
3256         (*cmp_sadd_si): Ditto.
3257         (*cmp_sadd_sidi): Ditto.
3258         (*cmp_ssub_di): Ditto.
3259         (*cmp_ssub_si): Ditto.
3260         (*cmp_ssub_sidi): Ditto.
3261         * config/alpha/predicates.md (const23_operand): New predicate.
3262         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3263         Look for ASHIFT, not MULT inner operand.
3264         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3265
3266 2018-01-04  Martin Liska  <mliska@suse.cz>
3267
3268         PR gcov-profile/83669
3269         * gcov.c (output_intermediate_file): Add version to intermediate
3270         gcov file.
3271         * doc/gcov.texi: Document new field 'version' in intermediate
3272         file format. Fix location of '-k' option of gcov command.
3273
3274 2018-01-04  Martin Liska  <mliska@suse.cz>
3275
3276         PR ipa/82352
3277         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3278
3279 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3280
3281         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3282
3283 2018-01-03  Martin Sebor  <msebor@redhat.com>
3284
3285         PR tree-optimization/83655
3286         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3287         checking calls with invalid arguments.
3288
3289 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3290
3291         * tree-vect-stmts.c (vect_get_store_rhs): New function.
3292         (vectorizable_mask_load_store): Delete.
3293         (vectorizable_call): Return false for masked loads and stores.
3294         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
3295         instead of gimple_assign_rhs1.
3296         (vectorizable_load): Handle IFN_MASK_LOAD.
3297         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3298
3299 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3300
3301         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3302         split out from..,
3303         (vectorizable_mask_load_store): ...here.
3304         (vectorizable_load): ...and here.
3305
3306 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3307
3308         * tree-vect-stmts.c (vect_build_all_ones_mask)
3309         (vect_build_zero_merge_argument): New functions, split out from...
3310         (vectorizable_load): ...here.
3311
3312 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3313
3314         * tree-vect-stmts.c (vect_check_store_rhs): New function,
3315         split out from...
3316         (vectorizable_mask_load_store): ...here.
3317         (vectorizable_store): ...and here.
3318
3319 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3320
3321         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3322         split out from...
3323         (vectorizable_mask_load_store): ...here.
3324
3325 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3326
3327         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3328         (vect_model_store_cost): Take a vec_load_store_type instead of a
3329         vect_def_type.
3330         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3331         (vect_model_store_cost): Take a vec_load_store_type instead of a
3332         vect_def_type.
3333         (vectorizable_mask_load_store): Update accordingly.
3334         (vectorizable_store): Likewise.
3335         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3336
3337 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3338
3339         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3340         IFN_MASK_LOAD calls here rather than...
3341         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3342
3343 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3344             Alan Hayward  <alan.hayward@arm.com>
3345             David Sherwood  <david.sherwood@arm.com>
3346
3347         * expmed.c (extract_bit_field_1): For vector extracts,
3348         fall back to extract_bit_field_as_subreg if vec_extract
3349         isn't available.
3350
3351 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3352             Alan Hayward  <alan.hayward@arm.com>
3353             David Sherwood  <david.sherwood@arm.com>
3354
3355         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3356         they are variable or constant sized.
3357         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3358         slots for constant-sized data.
3359
3360 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3361             Alan Hayward  <alan.hayward@arm.com>
3362             David Sherwood  <david.sherwood@arm.com>
3363
3364         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3365         handling COND_EXPRs with boolean comparisons, try to find a better
3366         basis for the mask type than the boolean itself.
3367
3368 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3369
3370         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3371         is calculated and how it can be overridden.
3372         * genmodes.c (max_bitsize_mode_any_mode): New variable.
3373         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3374         if defined.
3375         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3376         if nonzero.
3377
3378 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3379             Alan Hayward  <alan.hayward@arm.com>
3380             David Sherwood  <david.sherwood@arm.com>
3381
3382         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3383         Remove the mode argument.
3384         (aarch64_simd_valid_immediate): Remove the mode and inverse
3385         arguments.
3386         * config/aarch64/iterators.md (bitsize): New iterator.
3387         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3388         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3389         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3390         aarch64_simd_valid_immediate.
3391         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3392         (aarch64_reg_or_bic_imm): Likewise.
3393         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3394         with an insn_type enum and msl with a modifier_type enum.
3395         Replace element_width with a scalar_mode.  Change the shift
3396         to unsigned int.  Add constructors for scalar_float_mode and
3397         scalar_int_mode elements.
3398         (aarch64_vect_float_const_representable_p): Delete.
3399         (aarch64_can_const_movi_rtx_p)
3400         (aarch64_simd_scalar_immediate_valid_for_move)
3401         (aarch64_simd_make_constant): Update call to
3402         aarch64_simd_valid_immediate.
3403         (aarch64_advsimd_valid_immediate_hs): New function.
3404         (aarch64_advsimd_valid_immediate): Likewise.
3405         (aarch64_simd_valid_immediate): Remove mode and inverse
3406         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
3407         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3408         and aarch64_float_const_representable_p on the result.
3409         (aarch64_output_simd_mov_immediate): Remove mode argument.
3410         Update call to aarch64_simd_valid_immediate and use of
3411         simd_immediate_info.
3412         (aarch64_output_scalar_simd_mov_immediate): Update call
3413         accordingly.
3414
3415 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3416             Alan Hayward  <alan.hayward@arm.com>
3417             David Sherwood  <david.sherwood@arm.com>
3418
3419         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3420         (mode_nunits): Likewise CONST_MODE_NUNITS.
3421         * machmode.def (ADJUST_NUNITS): Document.
3422         * genmodes.c (mode_data::need_nunits_adj): New field.
3423         (blank_mode): Update accordingly.
3424         (adj_nunits): New variable.
3425         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3426         parameter.
3427         (emit_mode_size_inline): Set need_bytesize_adj for all modes
3428         listed in adj_nunits.
3429         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3430         listed in adj_nunits.  Don't emit case statements for such modes.
3431         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3432         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
3433         nothing if adj_nunits is nonnull.
3434         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3435         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3436         (emit_mode_fbit): Update use of print_maybe_const_decl.
3437         (emit_move_size): Likewise.  Treat the array as non-const
3438         if adj_nunits.
3439         (emit_mode_adjustments): Handle adj_nunits.
3440
3441 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3442
3443         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3444         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3445         (VECTOR_MODES): Use it.
3446         (make_vector_modes): Take the prefix as an argument.
3447
3448 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3449             Alan Hayward  <alan.hayward@arm.com>
3450             David Sherwood  <david.sherwood@arm.com>
3451
3452         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3453         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3454         for MODE_VECTOR_BOOL.
3455         * machmode.def (VECTOR_BOOL_MODE): Document.
3456         * genmodes.c (VECTOR_BOOL_MODE): New macro.
3457         (make_vector_bool_mode): New function.
3458         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3459         MODE_VECTOR_BOOL.
3460         * lto-streamer-in.c (lto_input_mode_table): Likewise.
3461         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3462         Likewise.
3463         * stor-layout.c (int_mode_for_mode): Likewise.
3464         * tree.c (build_vector_type_for_mode): Likewise.
3465         * varasm.c (output_constant_pool_2): Likewise.
3466         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3467         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
3468         for MODE_VECTOR_BOOL.
3469         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3470         of mode class checks.
3471         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3472         instead of a list of mode class checks.
3473         (expand_vector_scalar_condition): Likewise.
3474         (type_for_widest_vector_mode): Handle BImode as an inner mode.
3475
3476 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3477             Alan Hayward  <alan.hayward@arm.com>
3478             David Sherwood  <david.sherwood@arm.com>
3479
3480         * machmode.h (mode_size): Change from unsigned short to
3481         poly_uint16_pod.
3482         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3483         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3484         or if measurement_type is not polynomial.
3485         (fixed_size_mode::includes_p): Check for constant-sized modes.
3486         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3487         return a poly_uint16 rather than an unsigned short.
3488         (emit_mode_size): Change the type of mode_size from unsigned short
3489         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
3490         (emit_mode_adjustments): Cope with polynomial vector sizes.
3491         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3492         for GET_MODE_SIZE.
3493         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3494         for GET_MODE_SIZE.
3495         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3496         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3497         * caller-save.c (setup_save_areas): Likewise.
3498         (replace_reg_with_saved_mem): Likewise.
3499         * calls.c (emit_library_call_value_1): Likewise.
3500         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3501         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3502         (gen_lowpart_for_combine): Likewise.
3503         * convert.c (convert_to_integer_1): Likewise.
3504         * cse.c (equiv_constant, cse_insn): Likewise.
3505         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3506         (cselib_subst_to_values): Likewise.
3507         * dce.c (word_dce_process_block): Likewise.
3508         * df-problems.c (df_word_lr_mark_ref): Likewise.
3509         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3510         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3511         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3512         (rtl_for_decl_location): Likewise.
3513         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3514         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3515         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3516         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3517         (expand_expr_real_1): Likewise.
3518         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3519         (pad_below): Likewise.
3520         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3521         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3522         * ira.c (get_subreg_tracking_sizes): Likewise.
3523         * ira-build.c (ira_create_allocno_objects): Likewise.
3524         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3525         (ira_sort_regnos_for_alter_reg): Likewise.
3526         * ira-costs.c (record_operand_costs): Likewise.
3527         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3528         (resolve_simple_move): Likewise.
3529         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3530         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3531         (lra_constraints): Likewise.
3532         (CONST_POOL_OK_P): Reject variable-sized modes.
3533         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3534         (add_pseudo_to_slot, lra_spill): Likewise.
3535         * omp-low.c (omp_clause_aligned_alignment): Likewise.
3536         * optabs-query.c (get_best_extraction_insn): Likewise.
3537         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3538         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3539         (expand_mult_highpart, valid_multiword_target_p): Likewise.
3540         * recog.c (offsettable_address_addr_space_p): Likewise.
3541         * regcprop.c (maybe_mode_change): Likewise.
3542         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3543         * regrename.c (build_def_use): Likewise.
3544         * regstat.c (dump_reg_info): Likewise.
3545         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3546         (find_reloads, find_reloads_subreg_address): Likewise.
3547         * reload1.c (eliminate_regs_1): Likewise.
3548         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3549         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3550         (simplify_binary_operation_1, simplify_subreg): Likewise.
3551         * targhooks.c (default_function_arg_padding): Likewise.
3552         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3553         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3554         (verify_gimple_assign_ternary): Likewise.
3555         * tree-inline.c (estimate_move_cost): Likewise.
3556         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3557         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3558         (get_address_cost_ainc): Likewise.
3559         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3560         (vect_supportable_dr_alignment): Likewise.
3561         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3562         (vectorizable_reduction): Likewise.
3563         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3564         (vectorizable_operation, vectorizable_load): Likewise.
3565         * tree.c (build_same_sized_truth_vector_type): Likewise.
3566         * valtrack.c (cleanup_auto_inc_dec): Likewise.
3567         * var-tracking.c (emit_note_insn_var_location): Likewise.
3568         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3569         (ADDR_VEC_ALIGN): Likewise.
3570
3571 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3572             Alan Hayward  <alan.hayward@arm.com>
3573             David Sherwood  <david.sherwood@arm.com>
3574
3575         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3576         unsigned short.
3577         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3578         or if measurement_type is polynomial.
3579         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3580         * combine.c (make_extraction): Likewise.
3581         * dse.c (find_shift_sequence): Likewise.
3582         * dwarf2out.c (mem_loc_descriptor): Likewise.
3583         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3584         (extract_bit_field, extract_low_bits): Likewise.
3585         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3586         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3587         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3588         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3589         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3590         * reload.c (find_reloads): Likewise.
3591         * reload1.c (alter_reg): Likewise.
3592         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3593         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3594         * tree-if-conv.c (predicate_mem_writes): Likewise.
3595         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3596         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3597         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3598         * valtrack.c (dead_debug_insert_temp): Likewise.
3599         * varasm.c (mergeable_constant_section): Likewise.
3600         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3601
3602 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3603             Alan Hayward  <alan.hayward@arm.com>
3604             David Sherwood  <david.sherwood@arm.com>
3605
3606         * expr.c (expand_assignment): Cope with polynomial mode sizes
3607         when assigning to a CONCAT.
3608
3609 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3610             Alan Hayward  <alan.hayward@arm.com>
3611             David Sherwood  <david.sherwood@arm.com>
3612
3613         * machmode.h (mode_precision): Change from unsigned short to
3614         poly_uint16_pod.
3615         (mode_to_precision): Return a poly_uint16 rather than an unsigned
3616         short.
3617         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3618         or if measurement_type is not polynomial.
3619         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
3620         in which the mode is already known to be a scalar_int_mode.
3621         * genmodes.c (emit_mode_precision): Change the type of mode_precision
3622         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
3623         initializer.
3624         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3625         for GET_MODE_PRECISION.
3626         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3627         for GET_MODE_PRECISION.
3628         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3629         as polynomial.
3630         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3631         (expand_field_assignment, make_extraction): Likewise.
3632         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3633         (get_last_value): Likewise.
3634         * convert.c (convert_to_integer_1): Likewise.
3635         * cse.c (cse_insn): Likewise.
3636         * expr.c (expand_expr_real_1): Likewise.
3637         * lra-constraints.c (simplify_operand_subreg): Likewise.
3638         * optabs-query.c (can_atomic_load_p): Likewise.
3639         * optabs.c (expand_atomic_load): Likewise.
3640         (expand_atomic_store): Likewise.
3641         * ree.c (combine_reaching_defs): Likewise.
3642         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3643         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3644         * tree.h (type_has_mode_precision_p): Likewise.
3645         * ubsan.c (instrument_si_overflow): Likewise.
3646
3647 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3648             Alan Hayward  <alan.hayward@arm.com>
3649             David Sherwood  <david.sherwood@arm.com>
3650
3651         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3652         polynomial numbers of units.
3653         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3654         (valid_vector_subparts_p): New function.
3655         (build_vector_type): Remove temporary shim and take the number
3656         of units as a poly_uint64 rather than an int.
3657         (build_opaque_vector_type): Take the number of units as a
3658         poly_uint64 rather than an int.
3659         * tree.c (build_vector_from_ctor): Handle polynomial
3660         TYPE_VECTOR_SUBPARTS.
3661         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3662         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3663         (build_vector_from_val): If the number of units is variable,
3664         use build_vec_duplicate_cst for constant operands and
3665         VEC_DUPLICATE_EXPR otherwise.
3666         (make_vector_type): Remove temporary is_constant ().
3667         (build_vector_type, build_opaque_vector_type): Take the number of
3668         units as a poly_uint64 rather than an int.
3669         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3670         VECTOR_CST_NELTS.
3671         * cfgexpand.c (expand_debug_expr): Likewise.
3672         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3673         (store_constructor, expand_expr_real_1): Likewise.
3674         (const_scalar_mask_from_tree): Likewise.
3675         * fold-const-call.c (fold_const_reduction): Likewise.
3676         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3677         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3678         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3679         (fold_relational_const): Likewise.
3680         (native_interpret_vector): Likewise.  Change the size from an
3681         int to an unsigned int.
3682         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3683         TYPE_VECTOR_SUBPARTS.
3684         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3685         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3686         duplicating a non-constant operand into a variable-length vector.
3687         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3688         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3689         * ipa-icf.c (sem_variable::equals): Likewise.
3690         * match.pd: Likewise.
3691         * omp-simd-clone.c (simd_clone_subparts): Likewise.
3692         * print-tree.c (print_node): Likewise.
3693         * stor-layout.c (layout_type): Likewise.
3694         * targhooks.c (default_builtin_vectorization_cost): Likewise.
3695         * tree-cfg.c (verify_gimple_comparison): Likewise.
3696         (verify_gimple_assign_binary): Likewise.
3697         (verify_gimple_assign_ternary): Likewise.
3698         (verify_gimple_assign_single): Likewise.
3699         * tree-pretty-print.c (dump_generic_node): Likewise.
3700         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3701         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3702         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3703         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3704         (vect_shift_permute_load_chain): Likewise.
3705         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3706         (expand_vector_condition, optimize_vector_constructor): Likewise.
3707         (lower_vec_perm, get_compute_type): Likewise.
3708         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3709         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3710         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3711         (vect_recog_mask_conversion_pattern): Likewise.
3712         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3713         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3714         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3715         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3716         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3717         (vectorizable_shift, vectorizable_operation, vectorizable_store)
3718         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3719         (supportable_widening_operation): Likewise.
3720         (supportable_narrowing_operation): Likewise.
3721         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3722         Likewise.
3723         * varasm.c (output_constant): Likewise.
3724
3725 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3726             Alan Hayward  <alan.hayward@arm.com>
3727             David Sherwood  <david.sherwood@arm.com>
3728
3729         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3730         so that both the length == 3 and length != 3 cases set up their
3731         own permute vectors.  Add comments explaining why we know the
3732         number of elements is constant.
3733         (vect_permute_load_chain): Likewise.
3734
3735 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3736             Alan Hayward  <alan.hayward@arm.com>
3737             David Sherwood  <david.sherwood@arm.com>
3738
3739         * machmode.h (mode_nunits): Change from unsigned char to
3740         poly_uint16_pod.
3741         (ONLY_FIXED_SIZE_MODES): New macro.
3742         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3743         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3744         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3745         New typedefs.
3746         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3747         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3748         or if measurement_type is not polynomial.
3749         * genmodes.c (ZERO_COEFFS): New macro.
3750         (emit_mode_nunits_inline): Make mode_nunits_inline return a
3751         poly_uint16.
3752         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3753         Use ZERO_COEFFS when emitting initializers.
3754         * data-streamer.h (bp_pack_poly_value): New function.
3755         (bp_unpack_poly_value): Likewise.
3756         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3757         for GET_MODE_NUNITS.
3758         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3759         for GET_MODE_NUNITS.
3760         * tree.c (make_vector_type): Remove temporary shim and make
3761         the real function take the number of units as a poly_uint64
3762         rather than an int.
3763         (build_vector_type_for_mode): Handle polynomial nunits.
3764         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3765         * emit-rtl.c (const_vec_series_p_1): Likewise.
3766         (gen_rtx_CONST_VECTOR): Likewise.
3767         * fold-const.c (test_vec_duplicate_folding): Likewise.
3768         * genrecog.c (validate_pattern): Likewise.
3769         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3770         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3771         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3772         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3773         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3774         * rtlanal.c (subreg_get_info): Likewise.
3775         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3776         (vect_grouped_load_supported): Likewise.
3777         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3778         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3779         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3780         (simplify_const_unary_operation, simplify_binary_operation_1)
3781         (simplify_const_binary_operation, simplify_ternary_operation)
3782         (test_vector_ops_duplicate, test_vector_ops): Likewise.
3783         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3784         instead of CONST_VECTOR_NUNITS.
3785         * varasm.c (output_constant_pool_2): Likewise.
3786         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3787         explicit-encoded elements in the XVEC for variable-length vectors.
3788
3789 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3790
3791         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3792
3793 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3794             Alan Hayward  <alan.hayward@arm.com>
3795             David Sherwood  <david.sherwood@arm.com>
3796
3797         * coretypes.h (fixed_size_mode): Declare.
3798         (fixed_size_mode_pod): New typedef.
3799         * builtins.h (target_builtins::x_apply_args_mode)
3800         (target_builtins::x_apply_result_mode): Change type to
3801         fixed_size_mode_pod.
3802         * builtins.c (apply_args_size, apply_result_size, result_vector)
3803         (expand_builtin_apply_args_1, expand_builtin_apply)
3804         (expand_builtin_return): Update accordingly.
3805
3806 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3807
3808         * cse.c (hash_rtx_cb): Hash only the encoded elements.
3809         * cselib.c (cselib_hash_rtx): Likewise.
3810         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3811         CONST_VECTOR encoding.
3812
3813 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
3814             Jeff Law  <law@redhat.com>
3815
3816         PR target/83641
3817         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3818         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3819         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3820         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3821
3822         PR target/83641
3823         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3824         explicitly probe *sp in a noreturn function if there were any callee
3825         register saves or frame pointer is needed.
3826
3827 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
3828
3829         PR debug/83621
3830         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3831         BLKmode for ternary, binary or unary expressions.
3832
3833         PR debug/83645
3834         * var-tracking.c (delete_vta_debug_insn): New inline function.
3835         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3836         insns from get_insns () to NULL instead of each bb separately.
3837         Use delete_vta_debug_insn.  No longer static.
3838         (vt_debug_insns_local, variable_tracking_main_1): Adjust
3839         delete_vta_debug_insns callers.
3840         * rtl.h (delete_vta_debug_insns): Declare.
3841         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3842         instead of variable_tracking_main.
3843
3844 2018-01-03  Martin Sebor  <msebor@redhat.com>
3845
3846         PR tree-optimization/83603
3847         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3848         arguments past the endof the argument list in functions declared
3849         without a prototype.
3850         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3851         Avoid checking when arguments are null.
3852
3853 2018-01-03  Martin Sebor  <msebor@redhat.com>
3854
3855         PR c/83559
3856         * doc/extend.texi (attribute const): Fix a typo.
3857         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3858         issuing -Wsuggest-attribute for void functions.
3859
3860 2018-01-03  Martin Sebor  <msebor@redhat.com>
3861
3862         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3863         offset_int::from instead of wide_int::to_shwi.
3864         (maybe_diag_overlap): Remove assertion.
3865         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3866         * gimple-ssa-sprintf.c (format_directive): Same.
3867         (parse_directive): Same.
3868         (sprintf_dom_walker::compute_format_length): Same.
3869         (try_substitute_return_value): Same.
3870
3871 2017-01-03  Jeff Law  <law@redhat.com>
3872
3873         PR middle-end/83654
3874         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3875         non-constant residual for zero at runtime and avoid probing in
3876         that case.  Reorganize code for trailing problem to mirror handling
3877         of the residual.
3878
3879 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3880
3881         PR tree-optimization/83501
3882         * tree-ssa-strlen.c (get_string_cst): New.
3883         (handle_char_store): Call get_string_cst.
3884
3885 2018-01-03  Martin Liska  <mliska@suse.cz>
3886
3887         PR tree-optimization/83593
3888         * tree-ssa-strlen.c: Include tree-cfg.h.
3889         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3890         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3891         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3892         to false.
3893         (strlen_dom_walker::before_dom_children): Call
3894         gimple_purge_dead_eh_edges. Dump tranformation with details
3895         dump flags.
3896         (strlen_dom_walker::before_dom_children): Update call by adding
3897         new argument cleanup_eh.
3898         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3899
3900 2018-01-03  Martin Liska  <mliska@suse.cz>
3901
3902         PR ipa/83549
3903         * cif-code.def (VARIADIC_THUNK): New enum value.
3904         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3905         thunks.
3906
3907 2018-01-03  Jan Beulich  <jbeulich@suse.com>
3908
3909         * sse.md (mov<mode>_internal): Tighten condition for when to use
3910         vmovdqu<ssescalarsize> for TI and OI modes.
3911
3912 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
3913
3914         Update copyright years.
3915
3916 2018-01-03  Martin Liska  <mliska@suse.cz>
3917
3918         PR ipa/83594
3919         * ipa-visibility.c (function_and_variable_visibility): Skip
3920         functions with noipa attribure.
3921
3922 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
3923
3924         * gcc.c (process_command): Update copyright notice dates.
3925         * gcov-dump.c (print_version): Ditto.
3926         * gcov.c (print_version): Ditto.
3927         * gcov-tool.c (print_version): Ditto.
3928         * gengtype.c (create_file): Ditto.
3929         * doc/cpp.texi: Bump @copying's copyright year.
3930         * doc/cppinternals.texi: Ditto.
3931         * doc/gcc.texi: Ditto.
3932         * doc/gccint.texi: Ditto.
3933         * doc/gcov.texi: Ditto.
3934         * doc/install.texi: Ditto.
3935         * doc/invoke.texi: Ditto.
3936
3937 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3938
3939         * vector-builder.h (vector_builder::m_full_nelts): Change from
3940         unsigned int to poly_uint64.
3941         (vector_builder::full_nelts): Update prototype accordingly.
3942         (vector_builder::new_vector): Likewise.
3943         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3944         (vector_builder::operator ==): Likewise.
3945         (vector_builder::finalize): Likewise.
3946         * int-vector-builder.h (int_vector_builder::int_vector_builder):
3947         Take the number of elements as a poly_uint64 rather than an
3948         unsigned int.
3949         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3950         from unsigned int to poly_uint64.
3951         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3952         (vec_perm_indices::new_vector): Likewise.
3953         (vec_perm_indices::length): Likewise.
3954         (vec_perm_indices::nelts_per_input): Likewise.
3955         (vec_perm_indices::input_nelts): Likewise.
3956         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3957         number of elements per input as a poly_uint64 rather than an
3958         unsigned int.  Use the original encoding for variable-length
3959         vectors, rather than clamping each individual element.
3960         For the second and subsequent elements in each pattern,
3961         clamp the step and base before clamping their sum.
3962         (vec_perm_indices::series_p): Handle polynomial element counts.
3963         (vec_perm_indices::all_in_range_p): Likewise.
3964         (vec_perm_indices_to_tree): Likewise.
3965         (vec_perm_indices_to_rtx): Likewise.
3966         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3967         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3968         (tree_vector_builder::new_binary_operation): Handle polynomial
3969         element counts.  Return false if we need to know the number
3970         of elements at compile time.
3971         * fold-const.c (fold_vec_perm): Punt if the number of elements
3972         isn't known at compile time.
3973
3974 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3975
3976         * vec-perm-indices.h (vec_perm_builder): Change element type
3977         from HOST_WIDE_INT to poly_int64.
3978         (vec_perm_indices::element_type): Update accordingly.
3979         (vec_perm_indices::clamp): Handle polynomial element_types.
3980         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3981         (vec_perm_indices::all_in_range_p): Likewise.
3982         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3983         than shwi trees.
3984         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3985         polynomial vec_perm_indices element types.
3986         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3987         * fold-const.c (fold_vec_perm): Likewise.
3988         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3989         * tree-vect-generic.c (lower_vec_perm): Likewise.
3990         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3991         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3992         element type to HOST_WIDE_INT.
3993
3994 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3995             Alan Hayward  <alan.hayward@arm.com>
3996             David Sherwood  <david.sherwood@arm.com>
3997
3998         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3999         rather than an int.  Use plus_constant.
4000         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4001         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4002
4003 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4004             Alan Hayward  <alan.hayward@arm.com>
4005             David Sherwood  <david.sherwood@arm.com>
4006
4007         * calls.c (emit_call_1, expand_call): Change struct_value_size from
4008         a HOST_WIDE_INT to a poly_int64.
4009
4010 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4011             Alan Hayward  <alan.hayward@arm.com>
4012             David Sherwood  <david.sherwood@arm.com>
4013
4014         * calls.c (load_register_parameters): Cope with polynomial
4015         mode sizes.  Require a constant size for BLKmode parameters
4016         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
4017         forces a parameter to be padded at the lsb end in order to
4018         fill a complete number of words, require the parameter size
4019         to be ordered wrt UNITS_PER_WORD.
4020
4021 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4022             Alan Hayward  <alan.hayward@arm.com>
4023             David Sherwood  <david.sherwood@arm.com>
4024
4025         * reload1.c (spill_stack_slot_width): Change element type
4026         from unsigned int to poly_uint64_pod.
4027         (alter_reg): Treat mode sizes as polynomial.
4028
4029 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4030             Alan Hayward  <alan.hayward@arm.com>
4031             David Sherwood  <david.sherwood@arm.com>
4032
4033         * reload.c (complex_word_subreg_p): New function.
4034         (reload_inner_reg_of_subreg, push_reload): Use it.
4035
4036 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4037             Alan Hayward  <alan.hayward@arm.com>
4038             David Sherwood  <david.sherwood@arm.com>
4039
4040         * lra-constraints.c (process_alt_operands): Reject matched
4041         operands whose sizes aren't ordered.
4042         (match_reload): Refer to this check here.
4043
4044 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4045             Alan Hayward  <alan.hayward@arm.com>
4046             David Sherwood  <david.sherwood@arm.com>
4047
4048         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4049         that the mode size is in the set {1, 2, 4, 8, 16}.
4050
4051 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4052             Alan Hayward  <alan.hayward@arm.com>
4053             David Sherwood  <david.sherwood@arm.com>
4054
4055         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4056         Use plus_constant instead of gen_rtx_PLUS.
4057
4058 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4059             Alan Hayward  <alan.hayward@arm.com>
4060             David Sherwood  <david.sherwood@arm.com>
4061
4062         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4063         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4064         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4065         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4066         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4067         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4068         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4069         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4070         * config/i386/i386.c (ix86_push_rounding): ...this new function.
4071         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4072         a poly_int64.
4073         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4074         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4075         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4076         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4077         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4078         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4079         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4080         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4081         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4082         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4083         function.
4084         * expr.c (emit_move_resolve_push): Treat the input and result
4085         of PUSH_ROUNDING as a poly_int64.
4086         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4087         (emit_push_insn): Likewise.
4088         * lra-eliminations.c (mark_not_eliminable): Likewise.
4089         * recog.c (push_operand): Likewise.
4090         * reload1.c (elimination_effects): Likewise.
4091         * rtlanal.c (nonzero_bits1): Likewise.
4092         * calls.c (store_one_arg): Likewise.  Require the padding to be
4093         known at compile time.
4094
4095 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4096             Alan Hayward  <alan.hayward@arm.com>
4097             David Sherwood  <david.sherwood@arm.com>
4098
4099         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4100         Use plus_constant instead of gen_rtx_PLUS.
4101
4102 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4103             Alan Hayward  <alan.hayward@arm.com>
4104             David Sherwood  <david.sherwood@arm.com>
4105
4106         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4107         rather than an int.
4108
4109 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4110             Alan Hayward  <alan.hayward@arm.com>
4111             David Sherwood  <david.sherwood@arm.com>
4112
4113         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4114         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4115         via stack temporaries.  Treat the mode size as polynomial too.
4116
4117 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4118             Alan Hayward  <alan.hayward@arm.com>
4119             David Sherwood  <david.sherwood@arm.com>
4120
4121         * expr.c (expand_expr_real_2): When handling conversions involving
4122         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4123         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
4124         as a poly_uint64 too.
4125
4126 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4127             Alan Hayward  <alan.hayward@arm.com>
4128             David Sherwood  <david.sherwood@arm.com>
4129
4130         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4131
4132 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4133             Alan Hayward  <alan.hayward@arm.com>
4134             David Sherwood  <david.sherwood@arm.com>
4135
4136         * combine.c (can_change_dest_mode): Handle polynomial
4137         REGMODE_NATURAL_SIZE.
4138         * expmed.c (store_bit_field_1): Likewise.
4139         * expr.c (store_constructor): Likewise.
4140         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4141         and polynomial REGMODE_NATURAL_SIZE.
4142         (gen_lowpart_common): Likewise.
4143         * reginfo.c (record_subregs_of_mode): Likewise.
4144         * rtlanal.c (read_modify_subreg_p): Likewise.
4145
4146 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4147             Alan Hayward  <alan.hayward@arm.com>
4148             David Sherwood  <david.sherwood@arm.com>
4149
4150         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4151         numbers of elements.
4152
4153 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4154             Alan Hayward  <alan.hayward@arm.com>
4155             David Sherwood  <david.sherwood@arm.com>
4156
4157         * match.pd: Cope with polynomial numbers of vector elements.
4158
4159 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4160             Alan Hayward  <alan.hayward@arm.com>
4161             David Sherwood  <david.sherwood@arm.com>
4162
4163         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4164         in a POINTER_PLUS_EXPR.
4165
4166 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4167             Alan Hayward  <alan.hayward@arm.com>
4168             David Sherwood  <david.sherwood@arm.com>
4169
4170         * omp-simd-clone.c (simd_clone_subparts): New function.
4171         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4172         (ipa_simd_modify_function_body): Likewise.
4173
4174 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4175             Alan Hayward  <alan.hayward@arm.com>
4176             David Sherwood  <david.sherwood@arm.com>
4177
4178         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4179         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4180         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4181         (expand_vector_condition, vector_element): Likewise.
4182         (subparts_gt): New function.
4183         (get_compute_type): Use subparts_gt.
4184         (count_type_subparts): Delete.
4185         (expand_vector_operations_1): Use subparts_gt instead of
4186         count_type_subparts.
4187
4188 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4189             Alan Hayward  <alan.hayward@arm.com>
4190             David Sherwood  <david.sherwood@arm.com>
4191
4192         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4193         (vect_compile_time_alias): ...this new function.  Do the calculation
4194         on poly_ints rather than trees.
4195         (vect_prune_runtime_alias_test_list): Update call accordingly.
4196
4197 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4198             Alan Hayward  <alan.hayward@arm.com>
4199             David Sherwood  <david.sherwood@arm.com>
4200
4201         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4202         numbers of units.
4203         (vect_schedule_slp_instance): Likewise.
4204
4205 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4206             Alan Hayward  <alan.hayward@arm.com>
4207             David Sherwood  <david.sherwood@arm.com>
4208
4209         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4210         constant and extern definitions for variable-length vectors.
4211         (vect_get_constant_vectors): Note that the number of units
4212         is known to be constant.
4213
4214 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4215             Alan Hayward  <alan.hayward@arm.com>
4216             David Sherwood  <david.sherwood@arm.com>
4217
4218         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4219         of units as polynomial.  Choose between WIDE and NARROW based
4220         on multiple_p.
4221
4222 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4223             Alan Hayward  <alan.hayward@arm.com>
4224             David Sherwood  <david.sherwood@arm.com>
4225
4226         * tree-vect-stmts.c (simd_clone_subparts): New function.
4227         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4228
4229 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4230             Alan Hayward  <alan.hayward@arm.com>
4231             David Sherwood  <david.sherwood@arm.com>
4232
4233         * tree-vect-stmts.c (vectorizable_call): Treat the number of
4234         vectors as polynomial.  Use build_index_vector for
4235         IFN_GOMP_SIMD_LANE.
4236
4237 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4238             Alan Hayward  <alan.hayward@arm.com>
4239             David Sherwood  <david.sherwood@arm.com>
4240
4241         * tree-vect-stmts.c (get_load_store_type): Treat the number of
4242         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4243         for variable-length vectors.
4244         (vectorizable_mask_load_store): Treat the number of units as
4245         polynomial, asserting that it is constant if the condition has
4246         already been enforced.
4247         (vectorizable_store, vectorizable_load): Likewise.
4248
4249 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4250             Alan Hayward  <alan.hayward@arm.com>
4251             David Sherwood  <david.sherwood@arm.com>
4252
4253         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4254         of units as polynomial.  Punt if we can't tell at compile time
4255         which vector contains the final result.
4256
4257 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4258             Alan Hayward  <alan.hayward@arm.com>
4259             David Sherwood  <david.sherwood@arm.com>
4260
4261         * tree-vect-loop.c (vectorizable_induction): Treat the number
4262         of units as polynomial.  Punt on SLP inductions.  Use an integer
4263         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
4264         cast of such a series for variable-length floating-point
4265         reductions.
4266
4267 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4268             Alan Hayward  <alan.hayward@arm.com>
4269             David Sherwood  <david.sherwood@arm.com>
4270
4271         * tree.h (build_index_vector): Declare.
4272         * tree.c (build_index_vector): New function.
4273         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4274         of units as polynomial, forcibly converting it to a constant if
4275         vectorizable_reduction has already enforced the condition.
4276         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
4277         to create a {1,2,3,...} vector.
4278         (vectorizable_reduction): Treat the number of units as polynomial.
4279         Choose vectype_in based on the largest scalar element size rather
4280         than the smallest number of units.  Enforce the restrictions
4281         relied on above.
4282
4283 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4284             Alan Hayward  <alan.hayward@arm.com>
4285             David Sherwood  <david.sherwood@arm.com>
4286
4287         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4288         number of units as polynomial.
4289
4290 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4291             Alan Hayward  <alan.hayward@arm.com>
4292             David Sherwood  <david.sherwood@arm.com>
4293
4294         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4295         * target.def (autovectorize_vector_sizes): Return the vector sizes
4296         by pointer, using vector_sizes rather than a bitmask.
4297         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4298         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4299         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4300         Likewise.
4301         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4302         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4303         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4304         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4305         * omp-general.c (omp_max_vf): Likewise.
4306         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4307         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4308         * tree-vect-loop.c (vect_analyze_loop): Likewise.
4309         * tree-vect-slp.c (vect_slp_bb): Likewise.
4310         * doc/tm.texi: Regenerate.
4311         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4312         to a poly_uint64.
4313         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4314         the vector size as a poly_uint64 rather than an unsigned int.
4315         (current_vector_size): Change from an unsigned int to a poly_uint64.
4316         (get_vectype_for_scalar_type): Update accordingly.
4317         * tree.h (build_truth_vector_type): Take the size and number of
4318         units as a poly_uint64 rather than an unsigned int.
4319         (build_vector_type): Add a temporary overload that takes
4320         the number of units as a poly_uint64 rather than an unsigned int.
4321         * tree.c (make_vector_type): Likewise.
4322         (build_truth_vector_type): Take the number of units as a poly_uint64
4323         rather than an unsigned int.
4324
4325 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4326             Alan Hayward  <alan.hayward@arm.com>
4327             David Sherwood  <david.sherwood@arm.com>
4328
4329         * target.def (get_mask_mode): Take the number of units and length
4330         as poly_uint64s rather than unsigned ints.
4331         * targhooks.h (default_get_mask_mode): Update accordingly.
4332         * targhooks.c (default_get_mask_mode): Likewise.
4333         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4334         * doc/tm.texi: Regenerate.
4335
4336 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4337             Alan Hayward  <alan.hayward@arm.com>
4338             David Sherwood  <david.sherwood@arm.com>
4339
4340         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4341         * omp-general.c (omp_max_vf): Likewise.
4342         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4343         (expand_omp_simd): Handle polynomial safelen.
4344         * omp-low.c (omplow_simd_context): Add a default constructor.
4345         (omplow_simd_context::max_vf): Change from int to poly_uint64.
4346         (lower_rec_simd_input_clauses): Update accordingly.
4347         (lower_rec_input_clauses): Likewise.
4348
4349 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4350             Alan Hayward  <alan.hayward@arm.com>
4351             David Sherwood  <david.sherwood@arm.com>
4352
4353         * tree-vectorizer.h (vect_nunits_for_cost): New function.
4354         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4355         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4356         (vect_analyze_slp_cost): Likewise.
4357         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4358         (vect_model_load_cost): Likewise.
4359
4360 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4361             Alan Hayward  <alan.hayward@arm.com>
4362             David Sherwood  <david.sherwood@arm.com>
4363
4364         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4365         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4366         from an unsigned int * to a poly_uint64_pod *.
4367         (calculate_unrolling_factor): New function.
4368         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
4369
4370 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4371             Alan Hayward  <alan.hayward@arm.com>
4372             David Sherwood  <david.sherwood@arm.com>
4373
4374         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4375         from an unsigned int to a poly_uint64.
4376         (_loop_vec_info::slp_unrolling_factor): Likewise.
4377         (_loop_vec_info::vectorization_factor): Change from an int
4378         to a poly_uint64.
4379         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4380         (vect_get_num_vectors): New function.
4381         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4382         (vect_get_num_copies): Use vect_get_num_vectors.
4383         (vect_analyze_data_ref_dependences): Change max_vf from an int *
4384         to an unsigned int *.
4385         (vect_analyze_data_refs): Change min_vf from an int * to a
4386         poly_uint64 *.
4387         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4388         than an unsigned HOST_WIDE_INT.
4389         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4390         (vect_analyze_data_ref_dependence): Change max_vf from an int *
4391         to an unsigned int *.
4392         (vect_analyze_data_ref_dependences): Likewise.
4393         (vect_compute_data_ref_alignment): Handle polynomial vf.
4394         (vect_enhance_data_refs_alignment): Likewise.
4395         (vect_prune_runtime_alias_test_list): Likewise.
4396         (vect_shift_permute_load_chain): Likewise.
4397         (vect_supportable_dr_alignment): Likewise.
4398         (dependence_distance_ge_vf): Take the vectorization factor as a
4399         poly_uint64 rather than an unsigned HOST_WIDE_INT.
4400         (vect_analyze_data_refs): Change min_vf from an int * to a
4401         poly_uint64 *.
4402         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4403         vfm1 as a poly_uint64 rather than an int.  Make the same change
4404         for the returned bound_scalar.
4405         (vect_gen_vector_loop_niters): Handle polynomial vf.
4406         (vect_do_peeling): Likewise.  Update call to
4407         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4408         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4409         be constant.
4410         * tree-vect-loop.c (vect_determine_vectorization_factor)
4411         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4412         (vect_get_known_peeling_cost): Likewise.
4413         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4414         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4415         (vect_transform_loop): Likewise.  Use the lowest possible VF when
4416         updating the upper bounds of the loop.
4417         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
4418         rather than an int.
4419         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4420         polynomial unroll factors.
4421         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4422         (vect_make_slp_decision): Likewise.
4423         (vect_supported_load_permutation_p): Likewise, and polynomial
4424         vf too.
4425         (vect_analyze_slp_cost): Handle polynomial vf.
4426         (vect_slp_analyze_node_operations): Likewise.
4427         (vect_slp_analyze_bb_1): Likewise.
4428         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4429         than an unsigned HOST_WIDE_INT.
4430         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4431         (vectorizable_load): Handle polynomial vf.
4432         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4433         a poly_uint64.
4434         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4435
4436 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4437             Alan Hayward  <alan.hayward@arm.com>
4438             David Sherwood  <david.sherwood@arm.com>
4439
4440         * match.pd: Handle bit operations involving three constants
4441         and try to fold one pair.
4442
4443 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4444
4445         * tree-vect-loop-manip.c: Include gimple-fold.h.
4446         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4447         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
4448         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4449         Add a path that uses a step of VF instead of 1, but disable it
4450         for now.
4451         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4452         and niters_no_overflow parameters.  Update calls to
4453         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4454         Create a new SSA name if the latter choses to use a ste other
4455         than zero, and return it via niters_vector_mult_vf_var.
4456         * tree-vect-loop.c (vect_transform_loop): Update calls to
4457         vect_do_peeling, vect_gen_vector_loop_niters and
4458         slpeel_make_loop_iterate_ntimes.
4459         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4460         (vect_gen_vector_loop_niters): Update declarations after above changes.
4461
4462 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
4463
4464         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4465         128-bit round to integer instructions.
4466         (ceil<mode>2): Likewise.
4467         (btrunc<mode>2): Likewise.
4468         (round<mode>2): Likewise.
4469
4470 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4471
4472         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4473         unaligned VSX load/store on P8/P9.
4474         (expand_block_clear): Allow the use of unaligned VSX
4475         load/store on P8/P9.
4476
4477 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
4478
4479         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4480         New function.
4481         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4482         swap associated with both a load and a store.
4483
4484 2018-01-02  Andrew Waterman  <andrew@sifive.com>
4485
4486         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4487         * config/riscv/riscv.md (clear_cache): Use it.
4488
4489 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
4490
4491         * web.c: Remove out-of-date comment.
4492
4493 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4494
4495         * expr.c (fixup_args_size_notes): Check that any existing
4496         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4497         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4498         (emit_single_push_insn): ...here.
4499
4500 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4501
4502         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4503         (const_vector_encoded_nelts): New function.
4504         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4505         (const_vector_int_elt, const_vector_elt): Declare.
4506         * emit-rtl.c (const_vector_int_elt_1): New function.
4507         (const_vector_elt): Likewise.
4508         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4509         of CONST_VECTOR_ELT.
4510
4511 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4512
4513         * expr.c: Include rtx-vector-builder.h.
4514         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4515         directly on the tree encoding.
4516         (const_vector_from_tree): Likewise.
4517         * optabs.c: Include rtx-vector-builder.h.
4518         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4519         sequence of "u" values.
4520         * vec-perm-indices.c: Include rtx-vector-builder.h.
4521         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4522         directly on the vec_perm_indices encoding.
4523
4524 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4525
4526         * doc/rtl.texi (const_vector): Describe new encoding scheme.
4527         * Makefile.in (OBJS): Add rtx-vector-builder.o.
4528         * rtx-vector-builder.h: New file.
4529         * rtx-vector-builder.c: Likewise.
4530         * rtl.h (rtx_def::u2): Add a const_vector field.
4531         (CONST_VECTOR_NPATTERNS): New macro.
4532         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4533         (CONST_VECTOR_DUPLICATE_P): Likewise.
4534         (CONST_VECTOR_STEPPED_P): Likewise.
4535         (CONST_VECTOR_ENCODED_ELT): Likewise.
4536         (const_vec_duplicate_p): Check for a duplicated vector encoding.
4537         (unwrap_const_vec_duplicate): Likewise.
4538         (const_vec_series_p): Check for a non-duplicated vector encoding.
4539         Say that the function only returns true for integer vectors.
4540         * emit-rtl.c: Include rtx-vector-builder.h.
4541         (gen_const_vec_duplicate_1): Delete.
4542         (gen_const_vector): Call gen_const_vec_duplicate instead of
4543         gen_const_vec_duplicate_1.
4544         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4545         (gen_const_vec_duplicate): Use rtx_vector_builder.
4546         (gen_const_vec_series): Likewise.
4547         (gen_rtx_CONST_VECTOR): Likewise.
4548         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4549         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4550         Build a new vector rather than modifying a CONST_VECTOR in-place.
4551         (handle_special_swappables): Update call accordingly.
4552         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4553         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4554         Build a new vector rather than modifying a CONST_VECTOR in-place.
4555         (handle_special_swappables): Update call accordingly.
4556
4557 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4558
4559         * simplify-rtx.c (simplify_const_binary_operation): Use
4560         CONST_VECTOR_ELT instead of XVECEXP.
4561
4562 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4563
4564         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4565         the selector elements to be different from the data elements
4566         if the selector is a VECTOR_CST.
4567         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4568         ssizetype for the selector.
4569
4570 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4571
4572         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4573         before testing each element individually.
4574         * tree-vect-generic.c (lower_vec_perm): Likewise.
4575
4576 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4577
4578         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4579         * selftest-run-tests.c (selftest::run_tests): Call it.
4580         * vector-builder.h (vector_builder::operator ==): New function.
4581         (vector_builder::operator !=): Likewise.
4582         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4583         (vec_perm_indices::all_from_input_p): New function.
4584         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4585         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4586         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4587         instead of reading the VECTOR_CST directly.  Detect whether both
4588         vector inputs are the same before constructing the vec_perm_indices,
4589         and update the number of inputs argument accordingly.  Use the
4590         utility functions added above.  Only construct sel2 if we need to.
4591
4592 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4593
4594         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4595         the broadcast of the low byte.
4596         (expand_mult_highpart): Use an explicit encoding for the permutes.
4597         * optabs-query.c (can_mult_highpart_p): Likewise.
4598         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4599         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4600         (vectorizable_bswap): Likewise.
4601         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4602         explicit encoding for the power-of-2 permutes.
4603         (vect_permute_store_chain): Likewise.
4604         (vect_grouped_load_supported): Likewise.
4605         (vect_permute_load_chain): Likewise.
4606
4607 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4608
4609         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4610         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4611         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4612         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4613         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4614         (vect_gen_perm_mask_any): Likewise.
4615
4616 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4617
4618         * int-vector-builder.h: New file.
4619         * vec-perm-indices.h: Include int-vector-builder.h.
4620         (vec_perm_indices): Redefine as an int_vector_builder.
4621         (auto_vec_perm_indices): Delete.
4622         (vec_perm_builder): Redefine as a stand-alone class.
4623         (vec_perm_indices::vec_perm_indices): New function.
4624         (vec_perm_indices::clamp): Likewise.
4625         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4626         (vec_perm_indices::new_vector): New function.
4627         (vec_perm_indices::new_expanded_vector): Update for new
4628         vec_perm_indices class.
4629         (vec_perm_indices::rotate_inputs): New function.
4630         (vec_perm_indices::all_in_range_p): Operate directly on the
4631         encoded form, without computing elided elements.
4632         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4633         encoding.  Update for new vec_perm_indices class.
4634         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4635         the given vec_perm_builder.
4636         (expand_vec_perm_var): Update vec_perm_builder constructor.
4637         (expand_mult_highpart): Use vec_perm_builder instead of
4638         auto_vec_perm_indices.
4639         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4640         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
4641         or double series encoding as appropriate.
4642         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4643         vec_perm_indices instead of auto_vec_perm_indices.
4644         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4645         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4646         (vect_permute_store_chain): Likewise.
4647         (vect_grouped_load_supported): Likewise.
4648         (vect_permute_load_chain): Likewise.
4649         (vect_shift_permute_load_chain): Likewise.
4650         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4651         (vect_transform_slp_perm_load): Likewise.
4652         (vect_schedule_slp_instance): Likewise.
4653         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4654         (vectorizable_mask_load_store): Likewise.
4655         (vectorizable_bswap): Likewise.
4656         (vectorizable_store): Likewise.
4657         (vectorizable_load): Likewise.
4658         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4659         vec_perm_indices instead of auto_vec_perm_indices.  Use
4660         tree_to_vec_perm_builder to read the vector from a tree.
4661         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4662         vec_perm_builder instead of a vec_perm_indices.
4663         (have_whole_vector_shift): Use vec_perm_builder and
4664         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
4665         truncation to calc_vec_perm_mask_for_shift.
4666         (vect_create_epilog_for_reduction): Likewise.
4667         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4668         from auto_vec_perm_indices to vec_perm_indices.
4669         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4670         instead of changing individual elements.
4671         (aarch64_vectorize_vec_perm_const): Use new_vector to install
4672         the vector in d.perm.
4673         * config/arm/arm.c (expand_vec_perm_d::perm): Change
4674         from auto_vec_perm_indices to vec_perm_indices.
4675         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4676         instead of changing individual elements.
4677         (arm_vectorize_vec_perm_const): Use new_vector to install
4678         the vector in d.perm.
4679         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4680         Update vec_perm_builder constructor.
4681         (rs6000_expand_interleave): Likewise.
4682         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4683         (rs6000_expand_interleave): Likewise.
4684
4685 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4686
4687         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4688         to qimode could truncate the indices.
4689         * optabs.c (expand_vec_perm_var): Likewise.
4690
4691 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4692
4693         * Makefile.in (OBJS): Add vec-perm-indices.o.
4694         * vec-perm-indices.h: New file.
4695         * vec-perm-indices.c: Likewise.
4696         * target.h (vec_perm_indices): Replace with a forward class
4697         declaration.
4698         (auto_vec_perm_indices): Move to vec-perm-indices.h.
4699         * optabs.h: Include vec-perm-indices.h.
4700         (expand_vec_perm): Delete.
4701         (selector_fits_mode_p, expand_vec_perm_var): Declare.
4702         (expand_vec_perm_const): Declare.
4703         * target.def (vec_perm_const_ok): Replace with...
4704         (vec_perm_const): ...this new hook.
4705         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4706         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4707         * doc/tm.texi: Regenerate.
4708         * optabs.def (vec_perm_const): Delete.
4709         * doc/md.texi (vec_perm_const): Likewise.
4710         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4711         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4712         expand_vec_perm for constant permutation vectors.  Assert that
4713         the mode of variable permutation vectors is the integer equivalent
4714         of the mode that is being permuted.
4715         * optabs-query.h (selector_fits_mode_p): Declare.
4716         * optabs-query.c: Include vec-perm-indices.h.
4717         (selector_fits_mode_p): New function.
4718         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4719         is defined, instead of checking whether the vec_perm_const_optab
4720         exists.  Use targetm.vectorize.vec_perm_const instead of
4721         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
4722         fit in the vector mode before using a variable permute.
4723         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4724         vec_perm_indices instead of an rtx.
4725         (expand_vec_perm): Replace with...
4726         (expand_vec_perm_const): ...this new function.  Take the selector
4727         as a vec_perm_indices rather than an rtx.  Also take the mode of
4728         the selector.  Update call to shift_amt_for_vec_perm_mask.
4729         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4730         Use vec_perm_indices::new_expanded_vector to expand the original
4731         selector into bytes.  Check whether the indices fit in the vector
4732         mode before using a variable permute.
4733         (expand_vec_perm_var): Make global.
4734         (expand_mult_highpart): Use expand_vec_perm_const.
4735         * fold-const.c: Includes vec-perm-indices.h.
4736         * tree-ssa-forwprop.c: Likewise.
4737         * tree-vect-data-refs.c: Likewise.
4738         * tree-vect-generic.c: Likewise.
4739         * tree-vect-loop.c: Likewise.
4740         * tree-vect-slp.c: Likewise.
4741         * tree-vect-stmts.c: Likewise.
4742         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4743         Delete.
4744         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4745         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4746         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4747         (aarch64_vectorize_vec_perm_const): ...this new function.
4748         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4749         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4750         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4751         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4752         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4753         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4754         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4755         into...
4756         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
4757         check for NEON modes.
4758         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4759         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4760         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4761         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4762         into...
4763         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
4764         the old VEC_PERM_CONST conditions.
4765         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4766         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4767         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4768         (ia64_vectorize_vec_perm_const_ok): Merge into...
4769         (ia64_vectorize_vec_perm_const): ...this new function.
4770         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4771         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4772         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4773         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4774         * config/mips/mips.c (mips_expand_vec_perm_const)
4775         (mips_vectorize_vec_perm_const_ok): Merge into...
4776         (mips_vectorize_vec_perm_const): ...this new function.
4777         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4778         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4779         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4780         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4781         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4782         (rs6000_expand_vec_perm_const): Delete.
4783         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4784         Delete.
4785         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4786         (altivec_expand_vec_perm_const_le): Take each operand individually.
4787         Operate on constant selectors rather than rtxes.
4788         (altivec_expand_vec_perm_const): Likewise.  Update call to
4789         altivec_expand_vec_perm_const_le.
4790         (rs6000_expand_vec_perm_const): Delete.
4791         (rs6000_vectorize_vec_perm_const_ok): Delete.
4792         (rs6000_vectorize_vec_perm_const): New function.
4793         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4794         an element count and rtx array.
4795         (rs6000_expand_extract_even): Update call accordingly.
4796         (rs6000_expand_interleave): Likewise.
4797         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4798         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4799         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4800         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4801         (rs6000_expand_vec_perm_const): Delete.
4802         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4803         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4804         (altivec_expand_vec_perm_const_le): Take each operand individually.
4805         Operate on constant selectors rather than rtxes.
4806         (altivec_expand_vec_perm_const): Likewise.  Update call to
4807         altivec_expand_vec_perm_const_le.
4808         (rs6000_expand_vec_perm_const): Delete.
4809         (rs6000_vectorize_vec_perm_const_ok): Delete.
4810         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
4811         reference to the SPE evmerge intructions.
4812         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4813         an element count and rtx array.
4814         (rs6000_expand_extract_even): Update call accordingly.
4815         (rs6000_expand_interleave): Likewise.
4816         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4817         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4818         new function.
4819         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4820
4821 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4822
4823         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4824         vector mode and that that mode matches the mode of the data
4825         being permuted.
4826         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4827         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
4828         directly using expand_vec_perm_1 when forcing selectors into
4829         registers.
4830         (expand_vec_perm_var): New function, split out from expand_vec_perm.
4831
4832 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4833
4834         * optabs-query.h (can_vec_perm_p): Delete.
4835         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4836         * optabs-query.c (can_vec_perm_p): Split into...
4837         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4838         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4839         particular selector is valid.
4840         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4841         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4842         (vect_grouped_load_supported): Likewise.
4843         (vect_shift_permute_load_chain): Likewise.
4844         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4845         (vect_transform_slp_perm_load): Likewise.
4846         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4847         (vectorizable_bswap): Likewise.
4848         (vect_gen_perm_mask_checked): Likewise.
4849         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
4850         implementations of variable permutation vectors into account
4851         when deciding which selector to use.
4852         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4853         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4854         with a false third argument.
4855         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4856         to test whether the constant selector is valid and can_vec_perm_var_p
4857         to test whether a variable selector is valid.
4858
4859 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4860
4861         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4862         * optabs-query.c (can_vec_perm_p): Likewise.
4863         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4864         instead of vec_perm_indices.
4865         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4866         (vect_gen_perm_mask_checked): Likewise,
4867         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4868         (vect_gen_perm_mask_checked): Likewise,
4869
4870 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4871
4872         * optabs-query.h (qimode_for_vec_perm): Declare.
4873         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4874         (qimode_for_vec_perm): ...this new function.
4875         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4876
4877 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4878
4879         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4880         does not have a conditional at the top.
4881
4882 2018-01-02  Richard Biener  <rguenther@suse.de>
4883
4884         * ipa-inline.c (big_speedup_p): Fix expression.
4885
4886 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
4887
4888         PR target/81616
4889         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4890         for generic 4->6.
4891
4892 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
4893
4894         PR target/81616
4895         Generic tuning.
4896         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4897         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4898         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4899         cond_taken_branch_cost 3->4.
4900
4901 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
4902
4903         PR tree-optimization/83581
4904         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4905         TODO_cleanup_cfg if any changes have been made.
4906
4907         PR middle-end/83608
4908         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4909         convert_modes if target mode has the right side, but different mode
4910         class.
4911
4912         PR middle-end/83609
4913         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4914         last argument when extracting from CONCAT.  If either from_real or
4915         from_imag is NULL, use expansion through memory.  If result is not
4916         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4917         the parts directly to inner mode, if even that fails, use expansion
4918         through memory.
4919
4920         PR middle-end/83623
4921         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4922         check for bswap in mode rather than HImode and use that in expand_unop
4923         too.
4924 \f
4925 Copyright (C) 2018 Free Software Foundation, Inc.
4926
4927 Copying and distribution of this file, with or without modification,
4928 are permitted in any medium without royalty provided the copyright
4929 notice and this notice are preserved.