1 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
3 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
4 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
5 when scaling loop profile
7 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
9 PR tree-optimization/111694
10 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
12 * value-relation.cc (adjust_equivalence_range): New.
13 * value-relation.h (adjust_equivalence_range): New prototype.
15 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
17 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
18 not call get_identity_relation.
19 (gori_compute::compute_operand2_range): Ditto.
20 * value-relation.cc (get_identity_relation): Remove.
21 * value-relation.h (get_identity_relation): Remove protyotype.
23 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
25 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
26 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
28 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
30 (TARGET_SCHED_ADJUST_COST): Define.
31 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
32 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
33 * config/riscv/generic-ooo.md: New file.
34 * config/riscv/vector.md: Add vsetvl_pre.
36 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
39 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
40 * config/riscv/vector.md (movmisalign<mode>): New pattern.
42 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
45 directives for store-pair instruction.
47 2023-10-09 Richard Biener <rguenther@suse.de>
49 PR tree-optimization/111715
50 * alias.cc (reference_alias_ptr_type_1): When we have
51 a type-punning ref at the base search for the access
52 path part that's still semantically valid.
54 2023-10-09 Pan Li <pan2.li@intel.com>
56 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
58 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
60 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
62 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
63 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
65 (ix86_split_lshr): Likewise, split shifts by one bit into
66 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
67 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
68 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
69 (rcrdi2): New define_insn for rcrq.
70 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
71 set the carry flag from the least significant bit, modelled using
73 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
74 controlling use of rcr 1 vs. shrd, which is significantly faster on
77 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
79 * config/i386/i386.opt: Allow -mno-evex512.
81 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
82 Hu, Lin1 <lin1.hu@intel.com>
84 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
87 (VFH_AVX512VL): Ditto.
89 (VHF_AVX512VL): Ditto.
90 (VI2H_AVX512VL): Ditto.
91 (VI2F_256_512): Ditto.
92 (VF48_I1248): Remove unused iterator.
93 (VF48H_AVX512VL): Add TARGET_EVEX512.
94 (VF_AVX512): Remove unused iterator.
95 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
96 (REDUC_SMINMAX_MODE): Ditto.
98 (VFH_SF_AVX512VL): Ditto.
99 (VEC_PERM_AVX2): Ditto.
101 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
102 Hu, Lin1 <lin1.hu@intel.com>
104 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
106 (VI1_AVX512F): Ditto.
107 (VI1_AVX512VNNI): Ditto.
108 (VI1_AVX512VL_F): Ditto.
109 (VI12_VI48F_AVX512VL): Ditto.
110 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
111 (sdot_prod<mode>): Ditto.
112 (VEC_PERM_AVX2): Ditto.
115 (vpmadd52<vpmadd52type>v8di): Ditto.
116 (usdot_prod<mode>): Ditto.
117 (vpdpbusd_v16si): Ditto.
118 (vpdpbusds_v16si): Ditto.
119 (vpdpwssd_v16si): Ditto.
120 (vpdpwssds_v16si): Ditto.
121 (VI48_AVX512VP2VL): Ditto.
122 (avx512vp2intersect_2intersectv16si): Ditto.
123 (VF_AVX512BF16VL): Ditto.
124 (VF1_AVX512_256): Ditto.
126 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
128 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
129 Make sure there is EVEX512 enabled.
130 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
131 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
132 when !TARGET_EVEX512.
133 * config/i386/i386.md (avx512bw_512): New.
134 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
135 (*zero_extendsidi2): Change isa to avx512bw_512.
138 (*andn<mode>_1): Change isa to kmov_isa.
139 (*<code><mode>_1): Ditto.
140 (*notxor<mode>_1): Ditto.
141 (*one_cmpl<mode>2_1): Ditto.
142 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
143 (*ashl<mode>3_1): Change isa to kmov_isa.
144 (*lshr<mode>3_1): Ditto.
145 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
146 (VI1248_AVX512VLBW): Ditto.
147 (VHFBF_AVX512VL): Ditto.
152 (VI12_256_512_AVX512VL): Ditto.
153 (VI2_AVX2_AVX512BW): Ditto.
154 (VI2_AVX512VNNIBW): Ditto.
155 (VI2_AVX512VL): Ditto.
156 (VI2HFBF_AVX512VL): Ditto.
157 (VI8_AVX2_AVX512BW): Ditto.
158 (VIMAX_AVX2_AVX512BW): Ditto.
159 (VIMAX_AVX512VL): Ditto.
160 (VI12_AVX2_AVX512BW): Ditto.
161 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
162 (VI248_AVX512VL): Ditto.
163 (VI248_AVX512VLBW): Ditto.
164 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
165 (VI248_AVX512BW): Ditto.
166 (VI248_AVX512BW_AVX512VL): Ditto.
168 (VI124_256_AVX512F_AVX512BW): Ditto.
169 (VI_AVX512BW): Ditto.
170 (VIHFBF_AVX512BW): Ditto.
171 (SWI1248_AVX512BWDQ): Ditto.
172 (SWI1248_AVX512BW): Ditto.
173 (SWI1248_AVX512BWDQ2): Ditto.
174 (*knotsi_1_zext): Ditto.
175 (define_split for zero_extend + not): Ditto.
177 (REDUC_SMINMAX_MODE): Ditto.
178 (VEC_EXTRACT_MODE): Ditto.
179 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
180 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
181 (truncv32hiv32qi2): Ditto.
182 (avx512bw_<code>v32hiv32qi2): Ditto.
183 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
184 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
186 (VEC_PERM_AVX2): Ditto.
187 (AVX512ZEXTMASK): Ditto.
189 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
190 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
191 (avx512bw_packssdw<mask_name>): Ditto.
192 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
193 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
194 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
195 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
196 (vec_unpacks_lo_di): Ditto.
198 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
199 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
200 (VI1248_AVX512VL_AVX512BW): Ditto.
201 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
202 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
203 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
204 (<insn>v32qiv32hi2): Ditto.
205 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
206 (VPERMI2): Add TARGET_EVEX512.
209 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
211 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
212 Add TARGET_EVEX512 for 512 bit usage.
213 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
214 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
215 (VF1_128_256VL): Ditto.
216 (VF2_AVX512VL): Ditto.
217 (VI8_256_512): Ditto.
218 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
221 (AVX512_VEC_2): Ditto.
222 (VI4F_BRCST32x2): Ditto.
223 (VI8F_BRCST64x2): Ditto.
225 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
227 * config/i386/i386-builtins.cc
228 (ix86_vectorize_builtin_gather): Disable 512 bit gather
229 when !TARGET_EVEX512.
230 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
232 (ix86_expand_int_sse_cmp): Ditto.
233 (ix86_expand_vector_init_one_nonzero): Disable subroutine
234 when !TARGET_EVEX512.
235 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
236 (ix86_vectorize_vec_perm_const): Disable subroutine when
238 * config/i386/i386.cc
239 (standard_sse_constant_p): Add TARGET_EVEX512.
240 (standard_sse_constant_opcode): Ditto.
241 (ix86_get_ssemov): Ditto.
242 (ix86_legitimate_constant_p): Ditto.
243 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
244 when !TARGET_EVEX512.
245 * config/i386/i386.md (avx512f_512): New.
246 (movxi): Add TARGET_EVEX512.
247 (*movxi_internal_avx512f): Ditto.
248 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
250 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
252 (*movhi_internal): Change alternative 11 to *Yv.
253 (*movdf_internal): Change alternative 12 to Yv.
254 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
256 (*mov<mode>_internal): Change alternative 4 to Yv.
257 (define_split for convert SF to DF): Add TARGET_EVEX512.
258 (extendbfsf2_1): Ditto.
259 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
260 for 512 bit when !TARGET_EVEX512.
261 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
262 (V48_AVX512VL): Ditto.
263 (V48_256_512_AVX512VL): Ditto.
264 (V48H_AVX512VL): Ditto.
265 (VI12_AVX512VL): Ditto.
270 (VF1_VF2_AVX512DQ): Ditto.
277 (VF2_512_256): Ditto.
278 (VF2_512_256VL): Ditto.
281 (VI48_AVX512VL): Ditto.
282 (VI1248_AVX512VLBW): Ditto.
283 (VF_AVX512VL): Ditto.
284 (VFH_AVX512VL): Ditto.
285 (VF1_AVX512VL): Ditto.
290 (VI8_AVX512VL): Ditto.
291 (VI2_AVX512F): Ditto.
292 (VI4_AVX512F): Ditto.
293 (VI4_AVX512VL): Ditto.
294 (VI48_AVX512F_AVX512VL): Ditto.
295 (VI8_AVX2_AVX512F): Ditto.
296 (VI8_AVX_AVX512F): Ditto.
299 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
300 (VI248_AVX512VLBW): Ditto.
301 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
302 (VI248_AVX512BW): Ditto.
303 (VI248_AVX512BW_AVX512VL): Ditto.
304 (VI48_AVX512F): Ditto.
305 (VI48_AVX_AVX512F): Ditto.
306 (VI12_AVX_AVX512F): Ditto.
308 (VI124_256_AVX512F_AVX512BW): Ditto.
310 (VI_AVX512BW): Ditto.
311 (VIHFBF_AVX512BW): Ditto.
312 (VI4F_256_512): Ditto.
313 (VI48F_256_512): Ditto.
315 (VI12_VI48F_AVX512VL): Ditto.
317 (AVX512MODE2P): Ditto.
318 (STORENT_MODE): Ditto.
319 (REDUC_PLUS_MODE): Ditto.
320 (REDUC_SMINMAX_MODE): Ditto.
321 (*andnot<mode>3): Change isa attribute to avx512f_512.
322 (*andnot<mode>3): Ditto.
323 (<code><mode>3): Ditto.
325 (FMAMODEM): Add TARGET_EVEX512.
326 (FMAMODE_AVX512): Ditto.
327 (VFH_SF_AVX512VL): Ditto.
328 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
329 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
331 (avx512f_cvtdq2pd512_2): Ditto.
332 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
333 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
335 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
336 (vec_unpacks_lo_v16sf): Ditto.
337 (vec_unpacks_hi_v16sf): Ditto.
338 (vec_unpacks_float_hi_v16si): Ditto.
339 (vec_unpacks_float_lo_v16si): Ditto.
340 (vec_unpacku_float_hi_v16si): Ditto.
341 (vec_unpacku_float_lo_v16si): Ditto.
342 (vec_pack_sfix_trunc_v8df): Ditto.
343 (avx512f_vec_pack_sfix_v8df): Ditto.
344 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
345 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
346 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
347 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
349 (AVX512_VEC_2): Ditto.
350 (vec_extract_lo_v64qi): Ditto.
351 (vec_extract_hi_v64qi): Ditto.
352 (VEC_EXTRACT_MODE): Ditto.
353 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
354 (avx512f_movddup512<mask_name>): Ditto.
355 (avx512f_unpcklpd512<mask_name>): Ditto.
356 (*<avx512>_vternlog<mode>_all): Ditto.
357 (*<avx512>_vpternlog<mode>_1): Ditto.
358 (*<avx512>_vpternlog<mode>_2): Ditto.
359 (*<avx512>_vpternlog<mode>_3): Ditto.
360 (avx512f_shufps512_mask): Ditto.
361 (avx512f_shufps512_1<mask_name>): Ditto.
362 (avx512f_shufpd512_mask): Ditto.
363 (avx512f_shufpd512_1<mask_name>): Ditto.
364 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
365 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
366 (vec_dupv2df<mask_name>): Ditto.
367 (trunc<pmov_src_lower><mode>2): Ditto.
368 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
369 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
370 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
371 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
372 (truncv8div8qi2): Ditto.
373 (avx512f_<code>v8div16qi2): Ditto.
374 (*avx512f_<code>v8div16qi2_store_1): Ditto.
375 (*avx512f_<code>v8div16qi2_store_2): Ditto.
376 (avx512f_<code>v8div16qi2_mask): Ditto.
377 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
378 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
379 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
380 (vec_widen_umult_even_v16si<mask_name>): Ditto.
381 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
382 (vec_widen_smult_even_v16si<mask_name>): Ditto.
383 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
384 (VEC_PERM_AVX2): Ditto.
385 (one_cmpl<mode>2): Ditto.
386 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
387 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
388 (define_split to xor): Ditto.
389 (*andnot<mode>3): Ditto.
390 (define_split for ior): Ditto.
391 (*iornot<mode>3): Ditto.
392 (*xnor<mode>3): Ditto.
393 (*<nlogic><mode>3): Ditto.
394 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
395 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
396 (avx512f_pshufdv3_mask): Ditto.
397 (avx512f_pshufd_1<mask_name>): Ditto.
398 (*vec_extractv4ti): Ditto.
399 (VEXTRACTI128_MODE): Ditto.
400 (define_split to vec_extract): Ditto.
401 (VI1248_AVX512VL_AVX512BW): Ditto.
402 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
403 (<insn>v16qiv16si2): Ditto.
404 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
405 (<insn>v16hiv16si2): Ditto.
406 (avx512f_zero_extendv16hiv16si2_1): Ditto.
407 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
408 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
409 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
410 (<insn>v8qiv8di2): Ditto.
411 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
412 (<insn>v8hiv8di2): Ditto.
413 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
414 (*avx512f_zero_extendv8siv8di2_1): Ditto.
415 (*avx512f_zero_extendv8siv8di2_2): Ditto.
416 (<insn>v8siv8di2): Ditto.
417 (avx512f_roundps512_sfix): Ditto.
419 (vashrv16si3): Ditto.
420 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
421 (vec_dupv4sf): Add TARGET_EVEX512.
422 (*vec_dupv4si): Ditto.
423 (*vec_dupv2di): Ditto.
424 (vec_dup<mode>): Change isa attribute to avx512f_512.
425 (VPERMI2): Add TARGET_EVEX512.
427 (VEC_INIT_MODE): Ditto.
428 (VEC_INIT_HALF_MODE): Ditto.
429 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
431 (avx512f_vcvtps2ph512_mask_sae): Ditto.
432 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
434 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
435 (INT_BROADCAST_MODE): Ditto.
437 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
439 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
440 Disable zmm broadcast for !TARGET_EVEX512.
441 * config/i386/i386-options.cc (ix86_option_override_internal):
442 Do not use PVW_512 when no-evex512.
443 (ix86_simd_clone_adjust): Add evex512 target into string.
444 * config/i386/i386.cc (type_natural_mode): Report ABI warning
445 when using zmm register w/o evex512.
446 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
447 (ix86_hard_regno_mode_ok): Ditto.
448 (ix86_set_reg_reg_cost): Ditto.
449 (ix86_rtx_costs): Ditto.
450 (ix86_vector_mode_supported_p): Ditto.
451 (ix86_preferred_simd_mode): Ditto.
452 (ix86_get_mask_mode): Ditto.
453 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
454 libmvec call when !TARGET_EVEX512.
455 (ix86_simd_clone_usable): Ditto.
456 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
458 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
459 (STORE_MAX_PIECES): Ditto.
461 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
463 * config/i386/i386-builtin.def (BDESC): Add
464 OPTION_MASK_ISA2_EVEX512.
466 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
468 * config/i386/i386-builtin.def (BDESC): Add
469 OPTION_MASK_ISA2_EVEX512.
471 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
473 * config/i386/i386-builtin.def (BDESC): Add
474 OPTION_MASK_ISA2_EVEX512.
476 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
478 * config/i386/i386-builtin.def (BDESC): Add
479 OPTION_MASK_ISA2_EVEX512.
481 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
483 * config/i386/i386-builtin.def (BDESC): Add
484 OPTION_MASK_ISA2_EVEX512.
485 * config/i386/i386-builtins.cc
486 (ix86_init_mmx_sse_builtins): Ditto.
488 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
489 Hu, Lin1 <lin1.hu@intel.com>
491 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
494 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
496 * config.gcc: Add avx512bitalgvlintrin.h.
497 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
499 * config/i386/avx5124vnniwintrin.h: Ditto.
500 * config/i386/avx512bf16intrin.h: Ditto.
501 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
502 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
503 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
505 * config/i386/avx512ifmaintrin.h: Ditto
506 * config/i386/avx512pfintrin.h: Ditto
507 * config/i386/avx512vbmi2intrin.h: Ditto.
508 * config/i386/avx512vbmiintrin.h: Ditto.
509 * config/i386/avx512vnniintrin.h: Ditto.
510 * config/i386/avx512vp2intersectintrin.h: Ditto.
511 * config/i386/avx512vpopcntdqintrin.h: Ditto.
512 * config/i386/gfniintrin.h: Ditto.
513 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
514 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
515 * config/i386/vpclmulqdqintrin.h: Ditto.
516 * config/i386/avx512bitalgvlintrin.h: New.
518 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
520 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
523 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
525 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
528 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
530 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
532 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
534 * common/config/i386/i386-common.cc
535 (OPTION_MASK_ISA2_EVEX512_SET): New.
536 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
537 (ix86_handle_option): Handle EVEX512.
538 * config/i386/i386-c.cc
539 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
540 when AVX512VL is set.
541 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
542 (ix86_valid_target_attribute_inner_p): Ditto.
543 (ix86_option_override_internal): Set EVEX512 target if it is not
544 explicitly set when AVX512 is enabled. Disable
545 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
546 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
548 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
551 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
553 (lrint<mode>si2): New insn pattern for 32bit lrint.
555 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
558 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
559 Enable SImode on FP registers for P7.
560 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
561 move between FP registers. Set attribute isa of stfiwx to "*"
562 and attribute of stxsiwx to "p7".
564 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
566 * config/s390/s390.md: Make use of new copysign RTL.
568 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
570 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
571 with "jm" for alternative 0 and 1 of operand 2.
572 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
573 "ja" for alternative 0 and 1 of operand2.
575 2023-10-08 David Malcolm <dmalcolm@redhat.com>
578 * text-art/table.cc (table::maybe_set_cell_span): New.
579 (table::add_other_table): New.
580 * text-art/table.h (class table::cell_placement): Add class table
582 (table::add_rows): New.
583 (table::add_row): Reimplement in terms of add_rows.
584 (table::maybe_set_cell_span): New decl.
585 (table::add_other_table): New decl.
586 * text-art/types.h (operator+): New operator for rect + coord.
588 2023-10-08 David Malcolm <dmalcolm@redhat.com>
590 * genmatch.cc (main): Update for "m_" prefix of some fields of
592 * input.cc (make_location): Update for removal of
593 COMBINE_LOCATION_DATA.
594 (dump_line_table_statistics): Update for "m_" prefix of some
596 (location_with_discriminator): Update for removal of
597 COMBINE_LOCATION_DATA.
598 (line_table_test::line_table_test): Update for "m_" prefix of some
600 * toplev.cc (general_init): Likewise.
601 * tree.cc (set_block): Update for removal of
602 COMBINE_LOCATION_DATA.
603 (set_source_range): Likewise.
605 2023-10-08 David Malcolm <dmalcolm@redhat.com>
607 * input.cc (make_location): Move implementation to
608 line_maps::make_location.
610 2023-10-08 David Malcolm <dmalcolm@redhat.com>
613 * input.cc (file_cache::add_file): Update leading comment to
614 clarify that it can fail.
615 (file_cache::lookup_or_add_file): Likewise.
616 (file_cache::get_source_file_content): Gracefully handle
617 lookup_or_add_file failing.
619 2023-10-08 liuhongt <hongtao.liu@intel.com>
621 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
623 (ix86_build_signbit_mask): Ditto.
624 * config/i386/mmx.md (mmxintvecmode): Ditto.
625 (<code><mode>2): New define_expand.
626 (*mmx_<code><mode>): New define_insn_and_split.
627 (*mmx_nabs<mode>2): Ditto.
628 (*mmx_andnot<mode>3): New define_insn.
629 (<code><mode>3): Ditto.
630 (copysign<mode>3): New define_expand.
631 (xorsign<mode>3): Ditto.
632 (signbit<mode>2): Ditto.
634 2023-10-08 liuhongt <hongtao.liu@intel.com>
636 * config/i386/mmx.md (VHF_32_64): New mode iterator.
637 (<insn><mode>3): New define_expand, merged from ..
638 (<insn>v4hf3): .. this and
639 (<insn>v2hf3): .. this.
640 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
641 (movd_v2hf_to_sse): .. this.
642 (<code><mode>3): New define_expand.
644 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
646 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
647 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
649 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
651 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
653 (can_be_built_by_li_lis_and_rldicr): New function.
654 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
655 can_be_built_by_li_lis_and_rldicl.
657 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
659 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
661 (can_be_built_by_li_and_rotldi): Rename to ...
662 (can_be_built_by_li_lis_and_rotldi): ... this function.
663 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
665 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
667 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
668 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
670 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
672 * config/riscv/linux.h: Pass the static-pie specific options to
675 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
677 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
679 * config/aarch64/aarch64-tune.md: Regenerated.
680 * doc/invoke.texi: Add command-line option for cortex-x4 core.
682 2023-10-07 Kong Lingling <lingling.kong@intel.com>
683 Hongyu Wang <hongyu.wang@intel.com>
684 Hongtao Liu <hongtao.liu@intel.com>
686 * config/i386/constraints.md (jb): New constraint for vsib memory
687 that does not allow gpr32.
688 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
689 alternative and set attr_gpr32 to 0.
690 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
692 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
693 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
694 (*rsqrtsf2_sse): Likewise.
695 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
696 avx/noavx and assign jr/r constraint to dest.
697 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
698 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
699 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
700 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
701 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
702 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
703 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
704 (<sse2_avx2>_pmovmskb): Likewise.
705 (*<sse2_avx2>_pmovmskb_zext): Likewise.
706 (*sse2_pmovmskb_ext): Likewise.
707 (*<sse2_avx2>_pmovmskb_lt): Likewise.
708 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
709 (*sse2_pmovmskb_ext_lt): Likewise.
710 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
711 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
712 (sse_vmrcpv4sf2): Likewise.
713 (*sse_vmrcpv4sf2): Likewise.
714 (rsqrt<mode>2): Likewise.
715 (sse_vmrsqrtv4sf2): Likewise.
716 (*sse_vmrsqrtv4sf2): Likewise.
717 (avx_h<insn>v4df3): Likewise.
718 (sse3_hsubv2df3): Likewise.
719 (avx_h<insn>v8sf3): Likewise.
720 (sse3_h<insn>v4sf3): Likewise.
721 (<sse3>_lddqu<avxsizesuffix>): Likewise.
722 (avx_cmp<mode>3): Likewise.
723 (avx_vmcmp<mode>3): Likewise.
724 (*sse2_gt<mode>3): Likewise.
725 (sse_ldmxcsr): Likewise.
726 (sse_stmxcsr): Likewise.
727 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
728 avx alternative and set attr_gpr32 to 0.
729 (avx2_permv2ti): Likewise.
730 (*avx_vperm2f128<mode>_full): Likewise.
731 (*avx_vperm2f128<mode>_nozero): Likewise.
732 (vec_set_lo_v32qi): Likewise.
733 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
734 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
735 (avx_cmp<mode>3): Likewise.
736 (avx_vmcmp<mode>3): Likewise.
737 (*<sse>_maskcmp<mode>3_comm): Likewise.
738 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
740 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
741 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
742 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
743 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
744 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
745 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
746 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
747 (vec_set_lo_<mode><mask_name>): Likewise.
748 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
749 (vec_set_hi_<mode><mask_name>): Likewise.
750 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
751 (vec_set_hi_<mode>): Likewise.
752 (vec_set_lo_<mode>): Likewise.
753 (avx2_set_hi_v32qi): Likewise.
755 2023-10-07 Kong Lingling <lingling.kong@intel.com>
756 Hongyu Wang <hongyu.wang@intel.com>
757 Hongtao Liu <hongtao.liu@intel.com>
759 * config/i386/i386.md (*movhi_internal): Split out non-gpr
760 supported pextrw with mem constraint to avx/noavx alternatives,
761 set jm and attr gpr32 0 to the noavx alternative.
762 (*mov<mode>_internal): Likewise.
763 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
764 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
765 (mmx_pshufbv4qi3): Likewise.
766 (*mmx_pinsrd): Likewise.
767 (*mmx_pinsrb): Likewise.
769 (mmx_pshufbv8qi3): Likewise.
770 (mmx_pshufbv4qi3): Likewise.
771 (@sse4_1_insertps_<mode>): Likewise.
772 (*mmx_pextrw): Split altrenatives and map non-EGPR
773 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
774 (*movv2qi_internal): Likewise.
776 (*mmx_pextrb): Likewise.
777 (*mmx_pextrb_zext): Likewise.
779 (*pextrb_zext): Likewise.
780 (vec_extractv2si_1): Likewise.
781 (vec_extractv2si_1_zext): Likewise.
782 * config/i386/sse.md: (vi128_h_r): New mode attr for
783 pinsr{bw}/pextr{bw} with reg operand.
784 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
785 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
786 (*vec_extract<mode>): Likewise.
787 (*vec_extract<mode>): Likewise for HFBF pattern.
788 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
789 (*vec_extractv4si_1): Likewise.
790 (*vec_extractv4si_zext): Likewise.
791 (*vec_extractv2di_1): Likewise.
792 (*vec_concatv2si_sse4_1): Likewise.
793 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
794 (vec_concatv2di): Likewise.
795 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
796 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
797 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
798 %v for avx/noavx alternatives if necessary.
799 (*vec_concatv2sf_sse4_1): Likewise.
800 (*sse4_1_extractps): Likewise.
801 (vec_set<mode>_0): Likewise for VI4F_128.
802 (*vec_setv4sf_sse4_1): Likewise.
803 (@sse4_1_insertps<mode>): Likewise.
804 (ssse3_pmaddubsw128): Likewise.
805 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
806 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
807 (<ssse3_avx2>_palignr<mode>): Likewise.
808 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
809 (<sse4_1_avx2>_mpsadbw): Likewise.
810 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
811 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
812 (*sse4_1_<code><mode>3<mask_name>): Likewise.
813 (*<code>v8hi3): Likewise.
814 (*<code>v16qi3): Likewise.
815 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
816 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
817 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
818 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
819 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
820 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
821 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
822 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
823 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
824 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
825 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
827 (aesdeclast): Likewise.
829 (aesenclast): Likewise.
830 (pclmulqdq): Likewise.
831 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
832 (vgf2p8affineqb_<mode><mask_name>): Likewise.
833 (vgf2p8mulb_<mode><mask_name>): Likewise.
835 2023-10-07 Kong Lingling <lingling.kong@intel.com>
836 Hongyu Wang <hongyu.wang@intel.com>
837 Hongtao Liu <hongtao.liu@intel.com>
839 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
841 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
843 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
844 and constraint jm to all non-evex alternatives, adjust
845 alternative outputs if evex reg is mentioned.
846 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
847 and constraint jm/ja to all non-evex alternatives.
848 (ptesttf2): Likewise.
849 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
850 (sse4_1_round<ssescalarmodesuffix>): Likewise.
851 (sse4_2_pcmpestri): Likewise.
852 (sse4_2_pcmpestrm): Likewise.
853 (sse4_2_pcmpestr_cconly): Likewise.
854 (sse4_2_pcmpistr): Likewise.
855 (sse4_2_pcmpistri): Likewise.
856 (sse4_2_pcmpistrm): Likewise.
857 (sse4_2_pcmpistr_cconly): Likewise.
859 (aeskeygenassist): Likewise.
861 2023-10-07 Kong Lingling <lingling.kong@intel.com>
862 Hongyu Wang <hongyu.wang@intel.com>
863 Hongtao Liu <hongtao.liu@intel.com>
865 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
866 attr gpr32 0 and constraint jm/ja to all mem alternatives.
867 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
868 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
869 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
870 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
871 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
872 (<ssse3_avx2>_psign<mode>3): Likewise.
873 (ssse3_psign<mode>3): Likewise.
874 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
875 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
876 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
877 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
878 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
879 (<sse4_1_avx2>_mpsadbw): Likewise.
880 (<sse4_1_avx2>_pblendvb): Likewise.
881 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
882 (sse4_1_pblend<ssemodesuffix>): Likewise.
883 (*avx2_pblend<ssemodesuffix>): Likewise.
884 (avx2_permv2ti): Likewise.
885 (*avx_vperm2f128<mode>_nozero): Likewise.
886 (*avx2_eq<mode>3): Likewise.
887 (*sse4_1_eqv2di3): Likewise.
888 (sse4_2_gtv2di3): Likewise.
889 (avx2_gt<mode>3): Likewise.
891 2023-10-07 Kong Lingling <lingling.kong@intel.com>
892 Hongyu Wang <hongyu.wang@intel.com>
893 Hongtao Liu <hongtao.liu@intel.com>
895 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
897 (<xsave>_rex64): Likewise.
898 (<xrstor>_rex64): Likewise.
899 (<xrstor>64): Likewise.
900 (fxsave64): Likewise.
901 (fxstore64): Likewise.
903 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
904 Kong Lingling <lingling.kong@intel.com>
905 Hongtao Liu <hongtao.liu@intel.com>
907 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
908 adjust mnemonic for vmovduq/vmovdqa.
909 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
910 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
911 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
914 2023-10-07 Kong Lingling <lingling.kong@intel.com>
915 Hongyu Wang <hongyu.wang@intel.com>
916 Hongtao Liu <hongtao.liu@intel.com>
918 * config/i386/i386.cc (map_egpr_constraints): New funciton to
919 map common constraints to EGPR prohibited constraints.
920 (ix86_md_asm_adjust): Calls map_egpr_constraints.
921 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
923 2023-10-07 Kong Lingling <lingling.kong@intel.com>
924 Hongyu Wang <hongyu.wang@intel.com>
925 Hongtao Liu <hongtao.liu@intel.com>
927 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
929 (ix86_regno_ok_for_insn_base_p): Likewise.
930 (ix86_insn_index_reg_class): Likewise.
931 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
932 New helper function to scan the insn.
933 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
934 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
935 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
936 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
937 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
938 (INSN_INDEX_REG_CLASS): Likewise.
939 (enum reg_class): Add INDEX_GPR16.
940 (GENERAL_GPR16_REGNO_P): Define.
941 * config/i386/i386.md (gpr32): New attribute.
943 2023-10-07 Kong Lingling <lingling.kong@intel.com>
944 Hongyu Wang <hongyu.wang@intel.com>
945 Hongtao Liu <hongtao.liu@intel.com>
947 * config/i386/constraints.md (jr): New register constraint
949 (jR): Constraint that force usage of EGPR.
950 (jm): New memory constraint that prohibits EGPR.
951 (ja): Likewise for Bm constraint.
952 (jb): Likewise for Tv constraint.
953 (j<): New auto-dec memory constraint that prohibits EGPR.
954 (j>): Likewise for ">" constraint.
955 (jo): Likewise for "o" constraint.
956 (jv): Likewise for "V" constraint.
957 (jp): Likewise for "p" constraint.
958 * config/i386/i386.h (enum reg_class): Add new reg class
961 2023-10-07 Kong Lingling <lingling.kong@intel.com>
962 Hongyu Wang <hongyu.wang@intel.com>
963 Hongtao Liu <hongtao.liu@intel.com>
965 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
966 New function prototype.
967 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
969 (debugger64_register_map): Likewise.
970 (ix86_conditional_register_usage): Clear REX2 register when APX
972 (ix86_code_end): Add handling for REX2 reg.
973 (print_reg): Likewise.
974 (ix86_output_jmp_thunk_or_indirect): Likewise.
975 (ix86_output_indirect_branch_via_reg): Likewise.
976 (ix86_attr_length_vex_default): Likewise.
977 (ix86_emit_save_regs): Adjust to allow saving r31.
978 (ix86_register_priority): Set REX2 reg priority same as REX.
979 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
980 (x86_extended_rex2reg_mentioned_p): New function.
981 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
983 (REG_ALLOC_ORDER): Likewise.
984 (FIRST_REX2_INT_REG): Define.
985 (LAST_REX2_INT_REG): Ditto.
986 (GENERAL_REGS): Add 16 new registers.
987 (INT_SSE_REGS): Likewise.
988 (FLOAT_INT_REGS): Likewise.
989 (FLOAT_INT_SSE_REGS): Likewise.
990 (INT_MASK_REGS): Likewise.
992 (REX2_INT_REG_P): Define.
993 (REX2_INT_REGNO_P): Ditto.
994 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
995 (REGNO_OK_FOR_INDEX_P): Ditto.
996 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
997 * config/i386/i386.md: Add 16 new integer general
1000 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1001 Hongyu Wang <hongyu.wang@intel.com>
1002 Hongtao Liu <hongtao.liu@intel.com>
1004 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
1005 (XCR_APX_F_ENABLED_MASK): Likewise.
1006 (get_available_features): Detect APX_F under
1007 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
1008 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
1009 (ix86_handle_option): Handle -mapxf.
1010 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
1011 * common/config/i386/i386-isas.h: Add entry for APX_F.
1012 * config/i386/cpuid.h (bit_APX_F): New.
1013 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
1014 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
1015 * config/i386/i386-opts.h (enum apx_features): New enum.
1016 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
1017 * config/i386/i386-options.cc (ix86_function_specific_save):
1018 Save ix86_apx_features.
1019 (ix86_function_specific_restore): Restore it.
1020 (ix86_valid_target_attribute_inner_p): Add mapxf.
1021 (ix86_option_override_internal): Set ix86_apx_features for PTA
1022 and TARGET_APX_F. Also reports error when APX_F is set but not
1023 having TARGET_64BIT.
1024 * config/i386/i386.opt: (-mapxf): New ISA flag option.
1025 (-mapx=): New enumeration option.
1026 (apx_features): New enum type.
1027 (apx_none): New enum value.
1028 (apx_egpr): Likewise.
1029 (apx_push2pop2): Likewise.
1030 (apx_ndd): Likewise.
1031 (apx_all): Likewise.
1032 * doc/invoke.texi: Document mapxf.
1034 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
1035 Kong Lingling <lingling.kong@intel.com>
1036 Hongtao Liu <hongtao.liu@intel.com>
1038 * addresses.h (index_reg_class): New wrapper function like
1040 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
1041 * doc/tm.texi.in: Ditto.
1042 * lra-constraints.cc (index_part_to_reg): Pass index_class.
1043 (process_address_1): Calls index_reg_class with curr_insn and
1044 replace INDEX_REG_CLASS with its return value index_cl.
1045 * reload.cc (find_reloads_address): Likewise.
1046 (find_reloads_address_1): Likewise.
1048 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1049 Hongyu Wang <hongyu.wang@intel.com>
1050 Hongtao Liu <hongtao.liu@intel.com>
1052 * addresses.h (base_reg_class): Add insn argument and new macro
1053 INSN_BASE_REG_CLASS.
1054 (regno_ok_for_base_p_1): Add insn argument and new macro
1055 REGNO_OK_FOR_INSN_BASE_P.
1056 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
1057 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
1058 REGNO_OK_FOR_INSN_BASE_P.
1059 * doc/tm.texi.in: Ditto.
1060 * lra-constraints.cc (process_address_1): Pass insn to
1062 (curr_insn_transform): Ditto.
1063 * reload.cc (find_reloads): Ditto.
1064 (find_reloads_address): Ditto.
1065 (find_reloads_address_1): Ditto.
1066 (find_reloads_subreg_address): Ditto.
1067 * reload1.cc (maybe_fix_stack_asms): Ditto.
1069 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1072 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
1075 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1078 * config/rs6000/predicates.md (lowpart_subreg_operator): New
1080 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
1081 (movsf_from_si2): Rename to ...
1082 (movsf_from_si2_<code>): ... this.
1084 2023-10-07 Pan Li <pan2.li@intel.com>
1087 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
1088 object is a REG before extracting its' REGNO.
1090 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1092 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
1093 one into add3_cc_overflow_1 followed by add3_carry.
1094 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
1095 "*add<mode>3_cc_overflow_1" to provide generator function.
1097 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1098 Uros Bizjak <ubizjak@gmail.com>
1100 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
1101 to perform left shifts into shorter instructions with -Oz.
1103 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
1105 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
1107 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
1109 * doc/extend.texi (Function Attributes): Mention standard attribute
1111 (Variable Attributes): Likewise.
1112 (Type Attributes): Likewise.
1113 (Attribute Syntax): Likewise.
1115 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1117 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
1118 (mov<mode>_exec): Likewise.
1119 (mov<mode>_sgprbase): Likewise.
1120 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
1121 (*movti_insn): Likewise.
1123 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1125 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
1127 2023-10-06 Andrew Pinski <pinskia@gmail.com>
1129 PR middle-end/111699
1130 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1131 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
1133 2023-10-06 Jakub Jelinek <jakub@redhat.com>
1135 * ipa-prop.h (ipa_bits): Remove.
1136 (struct ipa_jump_func): Remove bits member.
1137 (struct ipcp_transformation): Remove bits member, adjust
1139 (ipa_get_ipa_bits_for_value): Remove.
1140 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
1141 (ipa_bits_hash_table): Remove.
1142 (ipa_print_node_jump_functions_for_edge): Don't print bits.
1143 (ipa_get_ipa_bits_for_value): Remove.
1144 (ipa_set_jfunc_bits): Remove.
1145 (ipa_compute_jump_functions_for_edge): For pointers query
1146 pointer alignment before ipa_set_jfunc_vr and update_bitmask
1147 in there. For integral types, just rely on bitmask already
1148 being handled in value ranges.
1149 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
1150 (ipcp_transformation_initialize): Neither here.
1151 (ipcp_transformation_t::duplicate): Don't copy bits vector.
1152 (ipa_write_jump_function): Don't stream bits here.
1153 (ipa_read_jump_function): Neither here.
1154 (useful_ipcp_transformation_info_p): Don't test bits vec.
1155 (write_ipcp_transformation_info): Don't stream bits here.
1156 (read_ipcp_transformation_info): Neither here.
1157 (ipcp_get_parm_bits): Get mask and value from m_vr rather
1159 (ipcp_update_bits): Remove.
1160 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
1161 bitmask stored in value range.
1162 (ipcp_transform_function): Don't test bits vector, don't call
1164 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
1165 jfunc->bits, instead get mask and value from jfunc->m_vr.
1166 (ipcp_store_bits_results): Remove.
1167 (ipcp_store_vr_results): Incorporate parts of
1168 ipcp_store_bits_results here, merge the bitmasks with value
1169 range if both are supplied.
1170 (ipcp_driver): Don't call ipcp_store_bits_results.
1171 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
1174 2023-10-06 Pan Li <pan2.li@intel.com>
1176 * config/riscv/autovec.md: Update comments.
1178 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
1180 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
1182 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1184 * timevar.def (TV_TREE_FAST_VRP): New.
1185 * tree-pass.h (make_pass_fast_vrp): New prototype.
1186 * tree-vrp.cc (class fvrp_folder): New.
1187 (fvrp_folder::fvrp_folder): New.
1188 (fvrp_folder::~fvrp_folder): New.
1189 (fvrp_folder::value_of_expr): New.
1190 (fvrp_folder::value_on_edge): New.
1191 (fvrp_folder::value_of_stmt): New.
1192 (fvrp_folder::pre_fold_bb): New.
1193 (fvrp_folder::post_fold_bb): New.
1194 (fvrp_folder::pre_fold_stmt): New.
1195 (fvrp_folder::fold_stmt): New.
1196 (execute_fast_vrp): New.
1197 (pass_data_fast_vrp): New.
1198 (pass_vrp:execute): Check for fast VRP pass.
1199 (make_pass_fast_vrp): New.
1201 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1203 * gimple-range.cc (dom_ranger::dom_ranger): New.
1204 (dom_ranger::~dom_ranger): New.
1205 (dom_ranger::range_of_expr): New.
1206 (dom_ranger::edge_range): New.
1207 (dom_ranger::range_on_edge): New.
1208 (dom_ranger::range_in_bb): New.
1209 (dom_ranger::range_of_stmt): New.
1210 (dom_ranger::maybe_push_edge): New.
1211 (dom_ranger::pre_bb): New.
1212 (dom_ranger::post_bb): New.
1213 * gimple-range.h (class dom_ranger): New.
1215 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1217 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
1218 (gori_calc_operands): New.
1219 (gori_on_edge): New.
1220 (gori_name_helper): New.
1221 (gori_name_on_edge): New.
1222 * gimple-range-gori.h (gori_on_edge): New prototype.
1223 (gori_name_on_edge): New prototype.
1225 2023-10-05 Sergei Trofimovich <siarheit@google.com>
1228 PR gcov-profile/111559
1229 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
1230 uninitialized probabilities when merging counters with zero
1233 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
1236 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
1237 strategy for non-default address spaces.
1238 (decide_alg): Use loop strategy as a fallback strategy for
1239 non-default address spaces.
1241 2023-10-05 Jakub Jelinek <jakub@redhat.com>
1243 * sreal.cc (verify_aritmetics): Rename to ...
1244 (verify_arithmetics): ... this.
1245 (sreal_verify_arithmetics): Adjust caller.
1247 2023-10-05 Martin Jambor <mjambor@suse.cz>
1250 2023-10-03 Martin Jambor <mjambor@suse.cz>
1253 * cgraph.h (cgraph_edge): Add a parameter to
1254 redirect_call_stmt_to_callee.
1255 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
1256 parameter to modify_call.
1257 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
1258 parameter killed_ssas, pass it to padjs->modify_call.
1259 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
1260 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
1261 Instead of substituting uses, invoke purge_transitive_uses. If
1262 hash of killed SSAs has not been provided, create a temporary one
1263 and release SSAs that have been added to it.
1264 * tree-inline.cc (redirect_all_calls): Create
1265 id->killed_new_ssa_names earlier, pass it to edge redirection,
1267 (copy_body): Release SSAs in id->killed_new_ssa_names.
1269 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1271 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
1272 (vec_series<mode>): Ditto.
1273 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
1274 (shuffle_decompress_patterns): Ditto.
1276 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1278 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
1279 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
1280 (arc_ccfsm_record_branch_deleted): Likewise.
1281 (arc_ccfsm_cond_exec_p): Likewise.
1282 (arc_ccfsm): Likewise.
1283 (arc_ccfsm_record_condition): Likewise.
1284 (make_pass_arc_ifcvt): Likewise.
1285 * config/arc/arc.cc (arc_ccfsm): Remove.
1286 (arc_ccfsm_current): Likewise.
1287 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
1288 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
1289 (ARC_CCFSM_COND_EXEC_P): Likewise.
1290 (CCFSM_ISCOMPACT): Likewise.
1291 (CCFSM_DBR_ISCOMPACT): Likewise.
1292 (machine_function): Remove ccfsm related fields.
1293 (arc_ifcvt): Remove pass.
1294 (arc_print_operand): Remove `#` punct operand and other ccfsm
1296 (arc_ccfsm_advance): Remove.
1297 (arc_ccfsm_at_label): Likewise.
1298 (arc_ccfsm_record_condition): Likewise.
1299 (arc_ccfsm_post_advance): Likewise.
1300 (arc_ccfsm_branch_deleted_p): Likewise.
1301 (arc_ccfsm_record_branch_deleted): Likewise.
1302 (arc_ccfsm_cond_exec_p): Likewise.
1303 (arc_get_ccfsm_cond): Likewise.
1304 (arc_final_prescan_insn): Remove ccfsm references.
1305 (arc_internal_label): Likewise.
1306 (arc_reorg): Likewise.
1307 (arc_output_libcall): Likewise.
1308 * config/arc/arc.md: Remove ccfsm references and update related
1309 instruction patterns.
1311 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1313 * config/arc/arc.cc (arc_init): Remove '^' punct char.
1314 (arc_print_operand): Remove related code.
1315 * config/arc/arc.md: Update patterns which uses '%&'.
1317 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1319 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
1320 (arc_toggle_unalign): Likewise.
1321 * config/arc/arc.cc (machine_function) Remove unalign.
1322 (arc_init): Remove `&` punct character.
1323 (arc_print_operand): Remove `&` related functions.
1324 (arc_verify_short): Update function's number of parameters.
1325 (output_short_suffix): Update function.
1326 (arc_short_long): Likewise.
1327 (arc_clear_unalign): Remove.
1328 (arc_toggle_unalign): Likewise.
1329 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
1330 (ASM_OUTPUT_ALIGN): Update.
1331 * config/arc/arc.md: Remove all `%&` references.
1332 * config/arc/arc.opt (mannotate-align): Ignore option.
1333 * doc/invoke.texi (mannotate-align): Update description.
1335 2023-10-05 Richard Biener <rguenther@suse.de>
1337 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
1338 ask for internal_fn_p (CFN_LAST).
1340 2023-10-05 Richard Biener <rguenther@suse.de>
1342 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
1343 visited value numbers are available itself.
1345 2023-10-05 Richard Biener <rguenther@suse.de>
1348 * doc/extend.texi (attribute flatten): Clarify.
1350 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
1352 * config/arc/arc-protos.h (emit_shift): Delete prototype.
1353 (arc_pre_reload_split): New function prototype.
1354 * config/arc/arc.cc (emit_shift): Delete function.
1355 (arc_pre_reload_split): New predicate function, copied from i386,
1356 to schedule define_insn_and_split splitters to the split1 pass.
1357 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
1358 (ashrsi3): Likewise.
1359 (lshrsi3): Likewise.
1360 (shift_si3): Move after other shift patterns, and disable when
1361 operands[2] is one (which is handled by its own define_insn).
1362 Use shiftr4_operator, instead of shift4_operator, as this is no
1363 longer used for left shifts.
1364 (shift_si3_loop): Likewise. Additionally remove match_scratch.
1365 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
1366 (*ashrsi3_nobs): Likewise.
1367 (*lshrsi3_nobs): Likewise.
1368 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
1369 (add_shift): Rename define_insn from *add_shift.
1370 * config/arc/predicates.md (shiftl4_operator): Delete.
1371 (shift4_operator): Delete.
1373 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
1375 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
1376 Change type attribute to "unary", as this doesn't have operands[2].
1377 Change length attribute to "*,4" to allow compact representation.
1378 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
1379 insn type attribute to "unary", as this doesn't have operands[2].
1380 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
1381 insn type attribute to "unary", as this doesn't have operands[2].
1383 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
1385 PR rtl-optimization/110701
1386 * combine.cc (record_dead_and_set_regs_1): Split comment into
1387 pieces placed before the relevant clauses. When the SET_DEST
1388 is a partial_subreg_p, mark the bits outside of the updated
1389 portion of the destination as undefined.
1391 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
1394 * opt-read.awk: Drop multidimensional arrays.
1395 * opth-gen.awk: Ditto.
1397 2023-10-04 Xi Ruoyao <xry111@xry111.site>
1399 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
1400 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
1402 2023-10-04 Jakub Jelinek <jakub@redhat.com>
1404 PR middle-end/111369
1405 * match.pd (x == cstN ? cst4 : cst3): Use
1406 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
1407 Fix comment typo. Formatting fix.
1408 (a?~t:t -> (-(a))^t): Always convert to type rather
1409 than using build_nonstandard_integer_type. Perform negation
1410 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
1412 2023-10-04 Jakub Jelinek <jakub@redhat.com>
1414 PR tree-optimization/111668
1415 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
1416 a ? 0 : -1 cases before the powerof2cst cases and differentiate
1417 between 1-bit precision types, larger precision boolean types
1418 and other integral types. Fix comment pastos and formatting.
1420 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
1422 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
1423 pointers rather than range_info_get_range.
1425 2023-10-03 Martin Jambor <mjambor@suse.cz>
1427 * ipa-modref.h (modref_summary::dump): Make const.
1428 * ipa-modref.cc (modref_summary::dump): Likewise.
1429 (dump_lto_records): Dump to out instead of dump_file.
1431 2023-10-03 Martin Jambor <mjambor@suse.cz>
1434 * ipa-param-manipulation.cc
1435 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
1436 return uses of PARAM will be removed.
1437 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
1438 * ipa-sra.cc (isra_param_desc): New fields
1439 remove_only_when_retval_removed and split_only_when_retval_removed.
1440 (struct gensum_param_desc): Likewise. Fix comment long line.
1441 (ipa_sra_function_summaries::duplicate): Copy the new flags.
1442 (dump_gensum_param_descriptor): Dump the new flags.
1443 (dump_isra_param_descriptor): Likewise.
1444 (isra_track_scalar_value_uses): New parameter desc. Set its flag
1445 remove_only_when_retval_removed when encountering a simple return.
1446 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
1447 with desc. Pass it to isra_track_scalar_value_uses and set its
1449 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
1450 parameter. If there is a direct return use, mark any..
1451 (create_parameter_descriptors): Pass the whole parameter descriptor to
1452 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
1453 (process_scan_results): Copy the new flags.
1454 (isra_write_node_summary): Stream the new flags.
1455 (isra_read_node_info): Likewise.
1456 (adjust_parameter_descriptions): Check that transformations
1457 requring return removal only happen when return value is removed.
1458 Restructure main loop. Adjust dump message.
1460 2023-10-03 Martin Jambor <mjambor@suse.cz>
1463 * cgraph.h (cgraph_edge): Add a parameter to
1464 redirect_call_stmt_to_callee.
1465 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
1466 parameter to modify_call.
1467 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
1468 parameter killed_ssas, pass it to padjs->modify_call.
1469 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
1470 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
1471 Instead of substituting uses, invoke purge_transitive_uses. If
1472 hash of killed SSAs has not been provided, create a temporary one
1473 and release SSAs that have been added to it.
1474 * tree-inline.cc (redirect_all_calls): Create
1475 id->killed_new_ssa_names earlier, pass it to edge redirection,
1477 (copy_body): Release SSAs in id->killed_new_ssa_names.
1479 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
1481 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
1482 * tree-vrp.cc (vrp_pass_num): Remove.
1483 (pass_vrp::my_pass): Remove.
1484 (pass_vrp::pass_vrp): Add warn_p as a parameter.
1485 (pass_vrp::final_p): New.
1486 (pass_vrp::set_pass_param): Set final_p param.
1487 (pass_vrp::execute): Call execute_range_vrp with no conditions.
1488 (make_pass_vrp): Pass additional parameter.
1489 (make_pass_early_vrp): Ditto.
1491 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
1493 * tree-ssanames.cc (set_range_info): Return true only if the
1494 current value changes.
1496 2023-10-03 David Malcolm <dmalcolm@redhat.com>
1498 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
1499 prefixes to text_info fields.
1500 (diagnostic_report_diagnostic): Likewise.
1501 (verbatim): Use text_info ctor.
1502 (simple_diagnostic_path::add_event): Likewise.
1503 (simple_diagnostic_path::add_thread_event): Likewise.
1504 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
1505 "m_" prefixes to text_info fields.
1506 (dump_context::dump_printf_va): Use text_info ctor.
1507 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
1508 (graphviz_out::print): Likewise.
1509 * opt-problem.cc (opt_problem::opt_problem): Likewise.
1510 * pretty-print.cc (pp_format): Update for "m_" prefixes to
1512 (pp_printf): Use text_info ctor.
1513 (pp_verbatim): Likewise.
1514 (assert_pp_format_va): Likewise.
1515 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
1517 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
1519 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
1520 prefixes to text_info fields.
1521 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
1523 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
1525 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
1526 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
1527 (*scc_insn): Don't split to a conditional move sequence for LTU.
1529 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
1531 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
1532 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
1533 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
1534 (load_pair_dw_<DX:mode><DX2:mode>)
1535 (store_pair_sw_<SX:mode><SX2:mode>)
1536 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
1537 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
1538 (*extend<SHORT:mode><GPI:mode>2_aarch64)
1539 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
1540 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
1541 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
1542 (add<mode>3_compare0, *addsi3_compare0_uxtw)
1543 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
1544 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
1545 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
1546 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
1547 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
1548 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
1549 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
1550 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
1551 (*aarch64_ashl_sisd_or_int_<mode>3)
1552 (*aarch64_lshr_sisd_or_int_<mode>3)
1553 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
1554 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
1555 (<optab><fcvt_target><GPF:mode>2)
1556 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
1557 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
1558 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
1560 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
1561 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
1562 (*aarch64_mul_unpredicated_<mode>)
1563 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
1564 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
1565 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
1566 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
1567 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
1568 (@aarch64_sve_<sve_int_op>_lane_<mode>)
1569 (@aarch64_sve_add_mul_lane_<mode>)
1570 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
1571 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
1572 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
1573 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
1574 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
1575 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
1576 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
1577 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
1578 (@aarch64_sve_qadd_<sve_int_op><mode>)
1579 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
1580 (@aarch64_sve_sub_<sve_int_op><mode>)
1581 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
1582 (@aarch64_sve_qsub_<sve_int_op><mode>)
1583 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
1584 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
1585 (@aarch64_pred_<sve_int_op><mode>)
1586 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
1587 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
1588 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
1589 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
1590 (*cond_<sve_fp_op><mode>_any_relaxed)
1591 (*cond_<sve_fp_op><mode>_any_strict)
1592 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
1593 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
1594 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
1595 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
1596 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
1597 (*aarch64_sve_mov<mode>, aarch64_wrffr)
1598 (mask_scatter_store<mode><v_int_container>)
1599 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
1600 (*mask_scatter_store<mode><v_int_container>_sxtw)
1601 (*mask_scatter_store<mode><v_int_container>_uxtw)
1602 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
1603 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
1604 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
1605 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
1606 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
1607 (vec_series<mode>, @extract_<last_op>_<mode>)
1608 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
1609 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
1610 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
1611 (@cond_<optab><mode>)
1612 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
1613 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
1614 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
1615 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
1616 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
1617 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
1618 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
1619 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
1620 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
1621 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
1622 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
1623 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
1624 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
1625 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
1626 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
1627 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
1628 (*cond_bic<mode>_2, *cond_bic<mode>_any)
1629 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
1630 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
1631 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
1632 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
1633 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
1634 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
1635 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
1636 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
1637 (*cond_<optab><mode>_2_const_relaxed)
1638 (*cond_<optab><mode>_2_const_strict)
1639 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
1640 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
1641 (*cond_<optab><mode>_any_const_relaxed)
1642 (*cond_<optab><mode>_any_const_strict)
1643 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
1644 (*cond_add<mode>_2_const_strict)
1645 (*cond_add<mode>_any_const_relaxed)
1646 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
1647 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
1648 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
1649 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
1650 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
1651 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
1652 (*aarch64_pred_abd<mode>_strict)
1653 (*aarch64_cond_abd<mode>_2_relaxed)
1654 (*aarch64_cond_abd<mode>_2_strict)
1655 (*aarch64_cond_abd<mode>_3_relaxed)
1656 (*aarch64_cond_abd<mode>_3_strict)
1657 (*aarch64_cond_abd<mode>_any_relaxed)
1658 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
1659 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
1660 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
1661 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
1662 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
1663 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
1664 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
1665 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
1666 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
1667 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
1668 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
1669 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
1670 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
1671 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
1672 (@aarch64_sve_<sve_fp_op>vnx4sf)
1673 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
1674 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
1675 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
1676 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
1677 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
1678 (@aarch64_fold_extract_vector_<last_op>_<mode>)
1679 (@aarch64_sve_splice<mode>)
1680 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
1681 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
1682 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
1683 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
1684 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
1685 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
1686 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
1687 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
1688 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
1689 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
1690 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
1691 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
1692 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
1693 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
1694 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
1695 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
1696 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
1698 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
1699 (load_pair<DREG:mode><DREG2:mode>)
1700 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
1701 (aarch64_simd_mov_from_<mode>low)
1702 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
1703 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
1704 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
1705 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
1706 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
1707 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
1708 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
1709 (*aarch64_combinez_be<mode>)
1710 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
1711 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
1712 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
1714 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
1716 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
1717 in new compact pattern syntax.
1719 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
1721 * gensupport.cc (convert_syntax): Updated to support unordered
1722 constraints in compact syntax.
1724 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
1726 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
1727 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
1728 (copysign<mode>3_hard): Likewise.
1729 (copysign<mode>3_soft): Likewise.
1730 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
1732 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
1735 2023-10-02 David Malcolm <dmalcolm@redhat.com>
1737 * diagnostic-format-json.cc (toplevel_array): Remove global in
1738 favor of json_output_format::m_top_level_array.
1739 (cur_group): Likewise, for json_output_format::m_cur_group.
1740 (cur_children_array): Likewise, for
1741 json_output_format::m_cur_children_array.
1742 (class json_output_format): New.
1743 (json_begin_diagnostic): Remove, in favor of
1744 json_output_format::on_begin_diagnostic.
1745 (json_end_diagnostic): Convert to...
1746 (json_output_format::on_end_diagnostic): ...this.
1747 (json_begin_group): Remove, in favor of
1748 json_output_format::on_begin_group.
1749 (json_end_group): Remove, in favor of
1750 json_output_format::on_end_group.
1751 (json_flush_to_file): Remove, in favor of
1752 json_output_format::flush_to_file.
1753 (json_stderr_final_cb): Remove, in favor of json_output_format
1755 (json_output_base_file_name): Remove global.
1756 (class json_stderr_output_format): New.
1757 (json_file_final_cb): Remove.
1758 (class json_file_output_format): New.
1759 (json_emit_diagram): Remove.
1760 (diagnostic_output_format_init_json): Update.
1761 (diagnostic_output_format_init_json_file): Update.
1762 * diagnostic-format-sarif.cc (the_builder): Remove this global,
1763 moving to a field of the sarif_output_format.
1764 (sarif_builder::maybe_make_artifact_content_object): Use the
1765 context's m_file_cache.
1766 (get_source_lines): Convert to...
1767 (sarif_builder::get_source_lines): ...this, using context's
1769 (sarif_begin_diagnostic): Remove, in favor of
1770 sarif_output_format::on_begin_diagnostic.
1771 (sarif_end_diagnostic): Remove, in favor of
1772 sarif_output_format::on_end_diagnostic.
1773 (sarif_begin_group): Remove, in favor of
1774 sarif_output_format::on_begin_group.
1775 (sarif_end_group): Remove, in favor of
1776 sarif_output_format::on_end_group.
1777 (sarif_flush_to_file): Delete.
1778 (sarif_stderr_final_cb): Delete.
1779 (sarif_output_base_file_name): Delete.
1780 (sarif_file_final_cb): Delete.
1781 (class sarif_output_format): New.
1782 (sarif_emit_diagram): Delete.
1783 (class sarif_stream_output_format): New.
1784 (class sarif_file_output_format): New.
1785 (diagnostic_output_format_init_sarif): Update.
1786 (diagnostic_output_format_init_sarif_stderr): Update.
1787 (diagnostic_output_format_init_sarif_file): Update.
1788 (diagnostic_output_format_init_sarif_stream): Update.
1789 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
1790 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
1791 diagnostic_text_output_format's dtor.
1792 (diagnostic_initialize): Update, making a new instance of
1793 diagnostic_text_output_format.
1794 (diagnostic_finish): Delete m_output_format, rather than calling
1796 (diagnostic_report_diagnostic): Assert that m_output_format is
1797 non-NULL. Replace call to begin_group_cb with call to
1798 m_output_format->on_begin_group. Replace call to
1799 diagnostic_starter with call to
1800 m_output_format->on_begin_diagnostic. Replace call to
1801 diagnostic_finalizer with call to
1802 m_output_format->on_end_diagnostic.
1803 (diagnostic_emit_diagram): Replace both optional call to
1804 m_diagrams.m_emission_cb and default implementation with call to
1805 m_output_format->on_diagram. Move default implementation to
1806 diagnostic_text_output_format::on_diagram.
1807 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
1808 end_group_cb with call to m_output_format->on_end_group.
1809 (diagnostic_text_output_format::~diagnostic_text_output_format):
1810 New, based on default_diagnostic_final_cb.
1811 (diagnostic_text_output_format::on_begin_diagnostic): New, based
1812 on code from diagnostic_report_diagnostic.
1813 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
1814 (diagnostic_text_output_format::on_diagram): New, based on code
1815 from diagnostic_emit_diagram.
1816 * diagnostic.h (class diagnostic_output_format): New.
1817 (class diagnostic_text_output_format): New.
1818 (diagnostic_context::begin_diagnostic): Move to...
1819 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
1820 (diagnostic_context::start_span): Move to...
1821 (diagnostic_context::m_text_callbacks::start_span): ...here.
1822 (diagnostic_context::end_diagnostic): Move to...
1823 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
1824 (diagnostic_context::begin_group_cb): Remove, in favor of
1825 m_output_format->on_begin_group.
1826 (diagnostic_context::end_group_cb): Remove, in favor of
1827 m_output_format->on_end_group.
1828 (diagnostic_context::final_cb): Remove, in favor of
1829 m_output_format's dtor.
1830 (diagnostic_context::m_output_format): New field.
1831 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
1832 of m_output_format->on_diagram.
1833 (diagnostic_starter): Update.
1834 (diagnostic_finalizer): Update.
1835 (diagnostic_output_format_init_sarif_stream): New.
1836 * input.cc (location_get_source_line): Move implementation apart from
1837 call to diagnostic_file_cache_init to...
1838 (file_cache::get_source_line): ...this new function...
1839 (location_get_source_line): ...and reintroduce, rewritten in terms of
1840 file_cache::get_source_line.
1841 (get_source_file_content): Likewise, refactor into...
1842 (file_cache::get_source_file_content): ...this new function.
1843 * input.h (file_cache::get_source_line): New decl.
1844 (file_cache::get_source_file_content): New decl.
1845 * selftest-diagnostic.cc
1846 (test_diagnostic_context::test_diagnostic_context): Update.
1847 * tree-diagnostic-path.cc (event_range::print): Update for
1848 change to diagnostic_context's start_span callback.
1850 2023-10-02 David Malcolm <dmalcolm@redhat.com>
1852 * diagnostic-show-locus.cc: Update for reorganization of
1853 source-printing fields of diagnostic_context.
1854 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
1855 (diagnostic_initialize): Likewise.
1856 * diagnostic.h (diagnostic_context::show_caret): Move to...
1857 (diagnostic_context::m_source_printing::enabled): ...here.
1858 (diagnostic_context::caret_max_width): Move to...
1859 (diagnostic_context::m_source_printing::max_width): ...here.
1860 (diagnostic_context::caret_chars): Move to...
1861 (diagnostic_context::m_source_printing::caret_chars): ...here.
1862 (diagnostic_context::colorize_source_p): Move to...
1863 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
1864 (diagnostic_context::show_labels_p): Move to...
1865 (diagnostic_context::m_source_printing::show_labels_p): ...here.
1866 (diagnostic_context::show_line_numbers_p): Move to...
1867 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
1868 (diagnostic_context::min_margin_width): Move to...
1869 (diagnostic_context::m_source_printing::min_margin_width): ...here.
1870 (diagnostic_context::show_ruler_p): Move to...
1871 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
1872 (diagnostic_same_line): Update for above changes.
1873 * opts.cc (common_handle_option): Update for reorganization of
1874 source-printing fields of diagnostic_context.
1875 * selftest-diagnostic.cc
1876 (test_diagnostic_context::test_diagnostic_context): Likewise.
1877 * toplev.cc (general_init): Likewise.
1878 * tree-diagnostic-path.cc (struct event_range): Likewise.
1880 2023-10-02 David Malcolm <dmalcolm@redhat.com>
1882 * diagnostic.cc (diagnostic_initialize): Initialize
1883 set_locations_cb to nullptr.
1885 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
1888 * config/arm/constraints.md: Remove Pf constraint.
1889 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
1890 (arm_atomic_load_acquire<mode>): Likewise.
1891 (arm_atomic_store<mode>): Likewise.
1892 (arm_atomic_store_release<mode>): Likewise.
1893 (atomic_load<mode>): Switch patterns to define_expand.
1894 (atomic_store<mode>): Likewise.
1895 (arm_atomic_loaddi2_ldrd): Remove predication.
1896 (arm_load_exclusive<mode>): Likewise.
1897 (arm_load_acquire_exclusive<mode>): Likewise.
1898 (arm_load_exclusivesi): Likewise.
1899 (arm_load_acquire_exclusivesi): Likewise.
1900 (arm_load_exclusivedi): Likewise.
1901 (arm_load_acquire_exclusivedi): Likewise.
1902 (arm_store_exclusive<mode>): Likewise.
1903 (arm_store_release_exclusivedi): Likewise.
1904 (arm_store_release_exclusive<mode>): Likewise.
1905 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
1907 2023-10-02 Tamar Christina <tamar.christina@arm.com>
1910 2023-10-02 Tamar Christina <tamar.christina@arm.com>
1912 PR tree-optimization/109154
1913 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
1914 (cmp_arg_entry): New.
1915 (predicate_scalar_phi): Use it.
1917 2023-10-02 Tamar Christina <tamar.christina@arm.com>
1919 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
1920 (@xorsign<mode>3): ...This.
1921 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
1922 (@xorsign<mode>3): ..This and emit vectors directly
1923 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
1925 2023-10-02 Tamar Christina <tamar.christina@arm.com>
1927 * emit-rtl.cc (validate_subreg): Relax subreg rule.
1929 2023-10-02 Tamar Christina <tamar.christina@arm.com>
1931 PR tree-optimization/109154
1932 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
1933 (cmp_arg_entry): New.
1934 (predicate_scalar_phi): Use it.
1936 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
1939 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
1941 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
1943 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
1944 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1946 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
1948 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
1950 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
1952 (cpymem<P:mode>) .. this.
1954 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1956 * combine.cc (simplify_compare_const): Properly handle unsigned
1957 constants while narrowing comparison of memory and constants.
1959 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
1961 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
1962 (MASK_ZIFENCEI): Delete;
1963 (MASK_ZIHINTNTL): Ditto.
1964 (MASK_ZIHINTPAUSE): Ditto.
1965 (TARGET_ZICSR): Ditto.
1966 (TARGET_ZIFENCEI): Ditto.
1967 (TARGET_ZIHINTNTL): Ditto.
1968 (TARGET_ZIHINTPAUSE): Ditto.
1969 (MASK_ZAWRS): Ditto.
1970 (TARGET_ZAWRS): Ditto.
1975 (TARGET_ZBA): Ditto.
1976 (TARGET_ZBB): Ditto.
1977 (TARGET_ZBC): Ditto.
1978 (TARGET_ZBS): Ditto.
1979 (MASK_ZFINX): Ditto.
1980 (MASK_ZDINX): Ditto.
1981 (MASK_ZHINX): Ditto.
1982 (MASK_ZHINXMIN): Ditto.
1983 (TARGET_ZFINX): Ditto.
1984 (TARGET_ZDINX): Ditto.
1985 (TARGET_ZHINX): Ditto.
1986 (TARGET_ZHINXMIN): Ditto.
1994 (MASK_ZKSED): Ditto.
1997 (TARGET_ZBKB): Ditto.
1998 (TARGET_ZBKC): Ditto.
1999 (TARGET_ZBKX): Ditto.
2000 (TARGET_ZKNE): Ditto.
2001 (TARGET_ZKND): Ditto.
2002 (TARGET_ZKNH): Ditto.
2003 (TARGET_ZKR): Ditto.
2004 (TARGET_ZKSED): Ditto.
2005 (TARGET_ZKSH): Ditto.
2006 (TARGET_ZKT): Ditto.
2008 (TARGET_ZTSO): Ditto.
2009 (MASK_VECTOR_ELEN_32): Ditto.
2010 (MASK_VECTOR_ELEN_64): Ditto.
2011 (MASK_VECTOR_ELEN_FP_32): Ditto.
2012 (MASK_VECTOR_ELEN_FP_64): Ditto.
2013 (MASK_VECTOR_ELEN_FP_16): Ditto.
2014 (TARGET_VECTOR_ELEN_32): Ditto.
2015 (TARGET_VECTOR_ELEN_64): Ditto.
2016 (TARGET_VECTOR_ELEN_FP_32): Ditto.
2017 (TARGET_VECTOR_ELEN_FP_64): Ditto.
2018 (TARGET_VECTOR_ELEN_FP_16): Ditto.
2021 (TARGET_ZVBB): Ditto.
2022 (TARGET_ZVBC): Ditto.
2024 (MASK_ZVKNED): Ditto.
2025 (MASK_ZVKNHA): Ditto.
2026 (MASK_ZVKNHB): Ditto.
2027 (MASK_ZVKSED): Ditto.
2028 (MASK_ZVKSH): Ditto.
2030 (MASK_ZVKNC): Ditto.
2031 (MASK_ZVKNG): Ditto.
2033 (MASK_ZVKSC): Ditto.
2034 (MASK_ZVKSG): Ditto.
2036 (TARGET_ZVKG): Ditto.
2037 (TARGET_ZVKNED): Ditto.
2038 (TARGET_ZVKNHA): Ditto.
2039 (TARGET_ZVKNHB): Ditto.
2040 (TARGET_ZVKSED): Ditto.
2041 (TARGET_ZVKSH): Ditto.
2042 (TARGET_ZVKN): Ditto.
2043 (TARGET_ZVKNC): Ditto.
2044 (TARGET_ZVKNG): Ditto.
2045 (TARGET_ZVKS): Ditto.
2046 (TARGET_ZVKSC): Ditto.
2047 (TARGET_ZVKSG): Ditto.
2048 (TARGET_ZVKT): Ditto.
2049 (MASK_ZVL32B): Ditto.
2050 (MASK_ZVL64B): Ditto.
2051 (MASK_ZVL128B): Ditto.
2052 (MASK_ZVL256B): Ditto.
2053 (MASK_ZVL512B): Ditto.
2054 (MASK_ZVL1024B): Ditto.
2055 (MASK_ZVL2048B): Ditto.
2056 (MASK_ZVL4096B): Ditto.
2057 (MASK_ZVL8192B): Ditto.
2058 (MASK_ZVL16384B): Ditto.
2059 (MASK_ZVL32768B): Ditto.
2060 (MASK_ZVL65536B): Ditto.
2061 (TARGET_ZVL32B): Ditto.
2062 (TARGET_ZVL64B): Ditto.
2063 (TARGET_ZVL128B): Ditto.
2064 (TARGET_ZVL256B): Ditto.
2065 (TARGET_ZVL512B): Ditto.
2066 (TARGET_ZVL1024B): Ditto.
2067 (TARGET_ZVL2048B): Ditto.
2068 (TARGET_ZVL4096B): Ditto.
2069 (TARGET_ZVL8192B): Ditto.
2070 (TARGET_ZVL16384B): Ditto.
2071 (TARGET_ZVL32768B): Ditto.
2072 (TARGET_ZVL65536B): Ditto.
2073 (MASK_ZICBOZ): Ditto.
2074 (MASK_ZICBOM): Ditto.
2075 (MASK_ZICBOP): Ditto.
2076 (TARGET_ZICBOZ): Ditto.
2077 (TARGET_ZICBOM): Ditto.
2078 (TARGET_ZICBOP): Ditto.
2079 (MASK_ZICOND): Ditto.
2080 (TARGET_ZICOND): Ditto.
2082 (TARGET_ZFA): Ditto.
2083 (MASK_ZFHMIN): Ditto.
2085 (MASK_ZVFHMIN): Ditto.
2087 (TARGET_ZFHMIN): Ditto.
2088 (TARGET_ZFH): Ditto.
2089 (TARGET_ZVFHMIN): Ditto.
2090 (TARGET_ZVFH): Ditto.
2091 (MASK_ZMMUL): Ditto.
2092 (TARGET_ZMMUL): Ditto.
2100 (TARGET_ZCA): Ditto.
2101 (TARGET_ZCB): Ditto.
2102 (TARGET_ZCE): Ditto.
2103 (TARGET_ZCF): Ditto.
2104 (TARGET_ZCD): Ditto.
2105 (TARGET_ZCMP): Ditto.
2106 (TARGET_ZCMT): Ditto.
2107 (MASK_SVINVAL): Ditto.
2108 (MASK_SVNAPOT): Ditto.
2109 (TARGET_SVINVAL): Ditto.
2110 (TARGET_SVNAPOT): Ditto.
2111 (MASK_XTHEADBA): Ditto.
2112 (MASK_XTHEADBB): Ditto.
2113 (MASK_XTHEADBS): Ditto.
2114 (MASK_XTHEADCMO): Ditto.
2115 (MASK_XTHEADCONDMOV): Ditto.
2116 (MASK_XTHEADFMEMIDX): Ditto.
2117 (MASK_XTHEADFMV): Ditto.
2118 (MASK_XTHEADINT): Ditto.
2119 (MASK_XTHEADMAC): Ditto.
2120 (MASK_XTHEADMEMIDX): Ditto.
2121 (MASK_XTHEADMEMPAIR): Ditto.
2122 (MASK_XTHEADSYNC): Ditto.
2123 (TARGET_XTHEADBA): Ditto.
2124 (TARGET_XTHEADBB): Ditto.
2125 (TARGET_XTHEADBS): Ditto.
2126 (TARGET_XTHEADCMO): Ditto.
2127 (TARGET_XTHEADCONDMOV): Ditto.
2128 (TARGET_XTHEADFMEMIDX): Ditto.
2129 (TARGET_XTHEADFMV): Ditto.
2130 (TARGET_XTHEADINT): Ditto.
2131 (TARGET_XTHEADMAC): Ditto.
2132 (TARGET_XTHEADMEMIDX): Ditto.
2133 (TARGET_XTHEADMEMPAIR): Ditto.
2134 (TARGET_XTHEADSYNC): Ditto.
2135 (MASK_XVENTANACONDOPS): Ditto.
2136 (TARGET_XVENTANACONDOPS): Ditto.
2137 * config/riscv/riscv.opt: Add new Mask defination.
2138 * doc/options.texi: Add explanation for this new usage.
2139 * opt-functions.awk: Add new function to find the index
2140 of target variable from extra_target_vars.
2141 * opt-read.awk: Add new function to store the Mask flags.
2142 * opth-gen.awk: Add new function to output the defination of
2143 Mask Macro and Target Macro.
2145 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
2146 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2147 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2150 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
2151 Change second parameter to rtx *.
2152 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
2153 * config/riscv/vector.md: Changed callers of
2154 riscv_vector::legitimize_move.
2155 (*mov<mode>_mem_to_mem): Remove.
2157 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2160 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
2161 Replace safe_grow with safe_grow_cleared.
2163 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2165 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
2166 in function comment.
2168 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2170 PR middle-end/111625
2171 PR middle-end/111637
2172 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
2174 (bitint_large_huge::handle_operand_addr): For uninitialized operands
2175 use limb_prec or -limb_prec precision.
2177 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2179 * vec.h (quick_grow): Uncomment static_assert.
2181 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2183 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
2185 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
2187 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
2188 SETs when the outer code is INSN.
2190 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2192 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
2195 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
2197 * poly-int.h (poly_int_pod): Delete.
2198 (poly_coeff_traits::init_cast): New type.
2199 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
2200 (poly_int): Replace constructors that take 1 and 2 coefficients with
2201 a general one that takes an arbitrary number of coefficients.
2202 Delegate initialization to two new private constructors, one of
2203 which uses the coefficients as-is and one of which adds an extra
2204 zero of the appropriate type (and precision, where applicable).
2205 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
2206 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
2207 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
2208 * gengtype.cc (main): Don't register poly_int64_pod.
2209 * calls.cc (initialize_argument_information): Use poly_int rather
2211 (combine_pending_stack_adjustment_and_call): Likewise.
2212 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
2213 * data-streamer.h (bp_unpack_poly_value): Likewise.
2214 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
2215 (struct queued_reg_save): Likewise.
2216 * dwarf2out.h (struct dw_cfa_location): Likewise.
2217 * emit-rtl.h (struct incoming_args): Likewise.
2218 (struct rtl_data): Likewise.
2219 * expr.cc (get_bit_range): Likewise.
2220 (get_inner_reference): Likewise.
2221 * expr.h (get_bit_range): Likewise.
2222 * fold-const.cc (split_address_to_core_and_offset): Likewise.
2223 (ptr_difference_const): Likewise.
2224 * fold-const.h (ptr_difference_const): Likewise.
2225 * function.cc (try_fit_stack_local): Likewise.
2226 (instantiate_new_reg): Likewise.
2227 * function.h (struct expr_status): Likewise.
2228 (struct args_size): Likewise.
2229 * genmodes.cc (ZERO_COEFFS): Likewise.
2230 (mode_size_inline): Likewise.
2231 (mode_nunits_inline): Likewise.
2232 (emit_mode_precision): Likewise.
2233 (emit_mode_size): Likewise.
2234 (emit_mode_nunits): Likewise.
2235 * gimple-fold.cc (get_base_constructor): Likewise.
2236 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
2237 * inchash.h (class hash): Likewise.
2238 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
2239 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
2241 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
2242 * lra-eliminations.cc (self_elim_offsets): Likewise.
2243 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
2244 * omp-low.cc (omplow_simd_context): Likewise.
2245 * pretty-print.cc (pp_wide_integer): Likewise.
2246 * pretty-print.h (pp_wide_integer): Likewise.
2247 * reload.cc (struct decomposition): Likewise.
2248 * reload.h (struct reload): Likewise.
2249 * reload1.cc (spill_stack_slot_width): Likewise.
2250 (struct elim_table): Likewise.
2251 (offsets_at): Likewise.
2252 (init_eliminable_invariants): Likewise.
2253 * rtl.h (union rtunion): Likewise.
2254 (poly_int_rtx_p): Likewise.
2255 (strip_offset): Likewise.
2256 (strip_offset_and_add): Likewise.
2257 * rtlanal.cc (strip_offset): Likewise.
2258 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
2259 (get_addr_base_and_unit_offset_1): Likewise.
2260 (get_addr_base_and_unit_offset): Likewise.
2261 * tree-dfa.h (get_ref_base_and_extent): Likewise.
2262 (get_addr_base_and_unit_offset_1): Likewise.
2263 (get_addr_base_and_unit_offset): Likewise.
2264 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
2265 (strip_offset): Likewise.
2266 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
2267 * tree.cc (ptrdiff_tree_p): Likewise.
2268 * tree.h (poly_int_tree_p): Likewise.
2269 (ptrdiff_tree_p): Likewise.
2270 (get_inner_reference): Likewise.
2272 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
2274 * config/pa/pa.md (memory_barrier): Revise comment.
2275 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
2276 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
2278 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2280 * vec.h (quick_insert, ordered_remove, unordered_remove,
2281 block_remove, qsort, sort, stablesort, quick_grow): Guard
2282 std::is_trivially_{copyable,default_constructible} and
2283 vec_detail::is_trivially_copyable_or_pair static assertions
2284 with GCC_VERSION >= 5000.
2285 (vec_detail::is_trivially_copyable_or_pair): Guard definition
2286 with GCC_VERSION >= 5000.
2288 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
2290 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
2291 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
2292 and aarch64_stp_policy to aarch64_ldp_stp_policy.
2293 (enum aarch64_stp_policy): Removed.
2294 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
2295 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
2296 and left only the definitions to the aarch64-opts one.
2297 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
2298 (aarch64_parse_stp_policy): Removed.
2299 (aarch64_override_options_internal): Removed calls to parsing
2300 functions and added obvious direct assignments.
2301 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
2302 code quality based on the new changes.
2303 * config/aarch64/aarch64.opt: Use single enum type
2304 aarch64_ldp_stp_policy for both ldp and stp options.
2306 2023-09-29 Richard Biener <rguenther@suse.de>
2308 PR tree-optimization/111583
2309 * tree-loop-distribution.cc (find_single_drs): Ensure the
2310 load/store are always executed.
2312 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2314 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
2315 quick_grow_cleared method on unprom rather than quick_grow.
2317 2023-09-29 Sergei Trofimovich <siarheit@google.com>
2319 PR middle-end/111505
2320 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
2321 Add new helper. Use helper instead of memset() to wipe out pointers.
2323 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
2325 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
2327 * builtins.cc (c_readstr): Likewise. Build a local array of
2328 bytes and use native_decode_rtx to get the rtx image.
2329 (builtin_memcpy_read_str): Simplify accordingly.
2330 (builtin_strncpy_read_str): Likewise.
2331 (builtin_memset_read_str): Likewise.
2332 (builtin_memset_gen_str): Likewise.
2333 * expr.cc (string_cst_read_str): Likewise.
2335 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2337 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
2338 instead of quick_grow on vec<bitmap_head> members.
2339 * cfganal.cc (control_dependences::control_dependences): Likewise.
2340 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
2341 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
2342 on auto_vec<bitmap_head> vars.
2343 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
2344 of quick_grow on vec<bitmap_head> var.
2346 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
2349 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
2351 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
2354 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
2357 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
2358 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
2359 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
2361 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
2364 2023-09-28 Pan Li <pan2.li@intel.com>
2367 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
2369 * config/riscv/vector-iterators.md: New iterator.
2371 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
2373 * rtl.h (lra_in_progress): Change type to bool.
2374 (ira_in_progress): Add new extern.
2375 * ira.cc (ira_in_progress): New global.
2376 (pass_ira::execute): Set up ira_in_progress.
2377 * lra.cc: (lra_in_progress): Change type to bool and initialize.
2378 (lra): Use bool values for lra_in_progress.
2379 * lra-eliminations.cc (init_elim_table): Ditto.
2381 2023-09-28 Richard Biener <rguenther@suse.de>
2384 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
2385 Use a heap allocated worklist for CFG traversal instead of
2388 2023-09-28 Jakub Jelinek <jakub@redhat.com>
2389 Jonathan Wakely <jwakely@redhat.com>
2391 * vec.h: Mention in file comment limited support for non-POD types
2393 (vec_destruct): New function template.
2394 (release): Use it for non-trivially destructible T.
2395 (truncate): Likewise.
2396 (quick_push): Perform a placement new into slot
2397 instead of assignment.
2398 (pop): For non-trivially destructible T return void
2399 rather than T & and destruct the popped element.
2400 (quick_insert, ordered_remove): Note that they aren't suitable
2401 for non-trivially copyable types. Add static_asserts for that.
2402 (block_remove): Assert T is trivially copyable.
2403 (vec_detail::is_trivially_copyable_or_pair): New trait.
2404 (qsort, sort, stablesort): Assert T is trivially copyable or
2405 std::pair with both trivally copyable types.
2406 (quick_grow): Add assert T is trivially default constructible,
2407 for now commented out.
2408 (quick_grow_cleared): Don't call quick_grow, instead inline it
2409 by hand except for the new static_assert.
2410 (gt_ggc_mx): Assert T is trivially destructable.
2411 (auto_vec::operator=): Formatting fixes.
2412 (auto_vec::auto_vec): Likewise.
2413 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
2414 it manually and call quick_grow_cleared method rather than quick_grow.
2415 (safe_grow_cleared): Likewise.
2416 * edit-context.cc (class line_event): Move definition earlier.
2417 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
2419 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
2420 safe_grow_cleared instead of safe_grow followed by placement new
2421 constructing the elements.
2423 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
2425 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
2426 * tree-affine.cc (expr_to_aff_combination): Likewise.
2428 2023-09-28 Richard Biener <rguenther@suse.de>
2430 PR tree-optimization/111614
2431 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
2432 convert the first vector when required.
2434 2023-09-28 xuli <xuli1@eswincomputing.com>
2437 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
2438 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
2440 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
2442 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
2444 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
2447 * configure: Regenerate.
2448 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
2450 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
2451 Philipp Tomsich <philipp.tomsich@vrull.eu>
2452 Manolis Tsamis <manolis.tsamis@vrull.eu>
2454 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
2456 (enum aarch64_stp_policy): New enum type.
2457 * config/aarch64/aarch64-protos.h (struct tune_params): Add
2458 appropriate enums for the policies.
2459 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
2460 * config/aarch64/aarch64-tuning-flags.def
2461 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
2463 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
2464 function to parse ldp-policy parameter.
2465 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
2466 (aarch64_override_options_internal): Call parsing functions.
2467 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
2468 (aarch64_operands_ok_for_ldpstp): Add call to
2469 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
2470 check and alignment check and remove superseded ones.
2471 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
2472 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
2473 check and alignment check and remove superseded ones.
2474 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
2475 (aarch64-stp-policy): New param.
2476 * doc/invoke.texi: Document the parameters accordingly.
2478 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
2480 * tree-data-ref.cc (include calls.h): Add new include.
2481 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
2483 2023-09-27 Richard Biener <rguenther@suse.de>
2485 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
2487 2023-09-27 Jakub Jelinek <jakub@redhat.com>
2490 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
2491 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
2493 * function.cc (assign_parm_find_data_types): Likewise.
2495 2023-09-27 Pan Li <pan2.li@intel.com>
2497 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
2498 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
2499 (enum insn_type): Ditto.
2500 (expand_vec_roundeven): New func decl.
2501 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
2503 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2506 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
2508 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2510 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
2512 2023-09-27 Pan Li <pan2.li@intel.com>
2514 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
2515 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
2516 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
2517 (expand_vec_trunc): Ditto.
2519 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
2523 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
2524 Handle failure from expand_builtin_atomic_test_and_set.
2525 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
2526 generate atomic code through target support, return NULL
2527 instead of emitting non-atomic code. Also, for code handling
2528 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
2529 from calling emit_store_flag_force instead of returning NULL.
2531 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
2533 PR tree-optimization/111599
2534 * value-relation.cc (relation_oracle::valid_equivs): Ensure
2537 2023-09-26 Andrew Pinski <apinski@marvell.com>
2539 PR tree-optimization/106164
2540 PR tree-optimization/111456
2541 * match.pd (`(A ==/!= B) & (A CMP C)`):
2542 Support an optional cast on the second A.
2543 (`(A ==/!= B) | (A CMP C)`): Likewise.
2545 2023-09-26 Andrew Pinski <apinski@marvell.com>
2547 PR tree-optimization/111469
2548 * tree-ssa-phiopt.cc (minmax_replacement): Fix
2549 the assumption for the `non-diamond` handling cases
2552 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2554 * match.pd: Optimize COND_ADD reduction pattern.
2556 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2558 PR tree-optimization/111594
2559 PR tree-optimization/110660
2560 * match.pd: Optimize COND_LEN_ADD reduction.
2562 2023-09-26 Pan Li <pan2.li@intel.com>
2564 * config/riscv/autovec.md (round<mode>2): New pattern.
2565 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
2566 (enum insn_type): Ditto.
2567 (expand_vec_round): New function decl.
2568 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
2570 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
2572 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
2574 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
2576 PR middle-end/111547
2577 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
2578 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
2580 2023-09-26 Pan Li <pan2.li@intel.com>
2582 * config/riscv/autovec.md (rint<mode>2): New pattern.
2583 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
2584 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
2586 2023-09-26 Pan Li <pan2.li@intel.com>
2588 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
2589 * config/riscv/riscv-protos.h (enum insn_type): New enum.
2590 (expand_vec_nearbyint): New function decl.
2591 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
2593 2023-09-26 Pan Li <pan2.li@intel.com>
2595 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
2596 (get_fp_rounding_coefficient): Rename.
2597 (gen_floor_const_fp): Remove.
2598 (expand_vec_ceil): Take renamed func.
2599 (expand_vec_floor): Ditto.
2601 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
2603 PR middle-end/111497
2604 * lra-constraints.cc (lra_constraints): Copy substituted
2606 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
2608 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
2610 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
2611 return statement in the varying case.
2613 2023-09-25 Xi Ruoyao <xry111@xry111.site>
2615 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
2617 2023-09-25 Andrew Pinski <apinski@marvell.com>
2619 PR tree-optimization/110386
2620 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
2622 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2625 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
2627 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
2630 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
2633 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
2636 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
2637 target_option_default_node when the callee has no option
2638 attributes, also simplify the existing code accordingly.
2640 2023-09-25 Guo Jie <guojie@loongson.cn>
2642 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
2643 pattern for vector construction.
2644 (vec_set<mode>_internal): Ditto.
2645 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
2646 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
2647 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
2648 Optimized the implementation of vector construction.
2649 (loongarch_expand_vector_init_same): New function.
2650 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
2651 pattern for vector construction.
2652 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
2654 (vec_concatv2df): Ditto.
2655 (vec_concatv4sf): Ditto.
2657 2023-09-24 Pan Li <pan2.li@intel.com>
2660 * config/riscv/riscv-v.cc
2661 (expand_vector_init_merge_repeating_sequence): Bugfix
2663 2023-09-24 Andrew Pinski <apinski@marvell.com>
2665 PR tree-optimization/111543
2666 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
2668 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2670 * config/riscv/autovec-opt.md: Extend VLS modes
2671 * config/riscv/vector-iterators.md: Ditto.
2673 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2675 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
2677 2023-09-23 Pan Li <pan2.li@intel.com>
2679 * config/riscv/autovec.md (floor<mode>2): New pattern.
2680 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
2681 (enum insn_type): Ditto.
2682 (expand_vec_floor): New function decl.
2683 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
2684 (expand_vec_floor): Ditto.
2686 2023-09-22 Pan Li <pan2.li@intel.com>
2688 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
2689 (emit_vec_float_cmp_mask): Rename.
2690 (expand_vec_copysign): Ditto.
2691 (emit_vec_copysign): Ditto.
2692 (emit_vec_abs): New function impl.
2693 (emit_vec_cvt_x_f): Ditto.
2694 (emit_vec_cvt_f_x): Ditto.
2695 (expand_vec_ceil): Ditto.
2697 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2699 * config/riscv/vector-iterators.md: Extend VLS modes.
2701 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2703 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
2704 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
2705 (vec_duplicate<mode>): Ditto.
2707 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2709 * config/riscv/autovec.md: Add VLS conditional patterns.
2710 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
2711 (expand_cond_binop): Ditto.
2712 (expand_cond_ternop): Ditto.
2713 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
2714 (expand_cond_binop): Ditto.
2715 (expand_cond_ternop): Ditto.
2717 2023-09-22 xuli <xuli1@eswincomputing.com>
2720 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
2721 into vrgatherei16.vv.
2723 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
2725 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
2726 New combine patterns.
2727 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
2729 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
2731 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
2732 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
2734 2023-09-22 Pan Li <pan2.li@intel.com>
2736 * config/riscv/autovec.md (ceil<mode>2): New pattern.
2737 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
2738 (enum insn_type): Ditto.
2739 (expand_vec_ceil): New function decl.
2740 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
2741 (expand_vec_float_cmp_mask): Ditto.
2742 (expand_vec_copysign): Ditto.
2743 (expand_vec_ceil): Ditto.
2744 * config/riscv/vector.md: Add VLS mode support.
2746 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2748 * config/riscv/autovec.md: Extend VLS modes.
2750 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2752 * config/riscv/vector-iterators.md: Extend VLS modes.
2754 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
2755 Robin Dapp <rdapp.gcc@gmail.com>
2757 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
2758 (emit_nonvlmax_insn): Adjust comments.
2759 (emit_vlmax_insn_lra): Adjust comments.
2761 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2763 * config.gcc (*linux*): Set rust target_objs, and
2764 target_has_targetrustm,
2765 * config/t-linux (linux-rust.o): New rule.
2766 * config/linux-rust.cc: New file.
2768 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2770 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
2771 rust_target_objs and target_has_targetrustm.
2772 * config/t-winnt (winnt-rust.o): New rule.
2773 * config/winnt-rust.cc: New file.
2775 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2777 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
2778 and target_has_targetrustm.
2779 * config/fuchsia-rust.cc: New file.
2780 * config/t-fuchsia: New file.
2782 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2784 * config.gcc (*-*-vxworks*): Set rust_target_objs and
2785 target_has_targetrustm.
2786 * config/t-vxworks (vxworks-rust.o): New rule.
2787 * config/vxworks-rust.cc: New file.
2789 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2791 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
2792 target_has_targetrustm.
2793 * config/t-dragonfly (dragonfly-rust.o): New rule.
2794 * config/dragonfly-rust.cc: New file.
2796 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2798 * config.gcc (*-*-solaris2*): Set rust_target_objs and
2799 target_has_targetrustm.
2800 * config/t-sol2 (sol2-rust.o): New rule.
2801 * config/sol2-rust.cc: New file.
2803 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2805 * config.gcc (*-*-openbsd*): Set rust_target_objs and
2806 target_has_targetrustm.
2807 * config/t-openbsd (openbsd-rust.o): New rule.
2808 * config/openbsd-rust.cc: New file.
2810 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2812 * config.gcc (*-*-netbsd*): Set rust_target_objs and
2813 target_has_targetrustm.
2814 * config/t-netbsd (netbsd-rust.o): New rule.
2815 * config/netbsd-rust.cc: New file.
2817 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2819 * config.gcc (*-*-freebsd*): Set rust_target_objs and
2820 target_has_targetrustm.
2821 * config/t-freebsd (freebsd-rust.o): New rule.
2822 * config/freebsd-rust.cc: New file.
2824 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2826 * config.gcc (*-*-darwin*): Set rust_target_objs and
2827 target_has_targetrustm.
2828 * config/t-darwin (darwin-rust.o): New rule.
2829 * config/darwin-rust.cc: New file.
2831 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2833 * config/i386/t-i386 (i386-rust.o): New rule.
2834 * config/i386/i386-rust.cc: New file.
2835 * config/i386/i386-rust.h: New file.
2837 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2839 * doc/tm.texi: Regenerate.
2840 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
2842 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2844 * doc/tm.texi: Regenerate.
2845 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
2846 TARGET_RUST_CPU_INFO.
2848 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
2850 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
2851 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
2852 (tm_rust.h, cs-tm_rust.h, default-rust.o,
2853 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
2854 (s-tm-texi): Also check timestamp on rust-target.def.
2855 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
2856 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
2857 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
2859 * configure: Regenerate.
2860 * configure.ac (tm_rust_file_list, tm_rust_include_list,
2861 rust_target_objs): Add substitutes.
2862 * doc/tm.texi: Regenerate.
2863 * doc/tm.texi.in (targetrustm): Document.
2864 (target_has_targetrustm): Document.
2865 * genhooks.cc: Include rust/rust-target.def.
2866 * config/default-rust.cc: New file.
2868 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2871 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
2872 * config/riscv/predicates.md (autovec_else_operand): New predicate.
2873 * config/riscv/riscv-v.cc (get_else_operand): New function.
2874 (expand_cond_len_unop): Adapt ELSE value.
2875 (expand_cond_len_binop): Ditto.
2876 (expand_cond_len_ternop): Ditto.
2877 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
2878 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
2880 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2883 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
2885 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
2887 PR tree-optimization/111355
2888 * match.pd ((X + C) / N): Update pattern.
2890 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
2892 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
2894 2023-09-21 xuli <xuli1@eswincomputing.com>
2897 * config/riscv/constraints.md (c01): const_int 1.
2901 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
2902 (vector_eew16_stride_operand): Ditto.
2903 (vector_eew32_stride_operand): Ditto.
2904 (vector_eew64_stride_operand): Ditto.
2905 * config/riscv/vector-iterators.md: New iterator for stride operand.
2906 * config/riscv/vector.md: Add stride = element width constraint.
2908 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
2910 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
2911 (const_1_or_4_operand): Ditto.
2912 (vector_gs_scale_operand_16): Ditto.
2913 (vector_gs_scale_operand_32): Ditto.
2914 * config/riscv/vector-iterators.md: Adjust.
2916 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2918 * config/riscv/autovec.md: Extend VLS modes.
2919 * config/riscv/vector-iterators.md: Ditto.
2920 * config/riscv/vector.md: Ditto.
2922 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
2924 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
2925 of the return value.
2926 (ssa_cache::dump): Don't print GLOBAL RANGE header.
2927 (ssa_lazy_cache::merge_range): Adjust return value meaning.
2928 (ranger_cache::dump): Print GLOBAL RANGE header.
2930 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
2932 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
2934 (foperator_unordered_gt::fold_range): Same.
2935 (foperator_unordered_lt::fold_range): Same.
2936 (foperator_unordered_le::fold_range): Same.
2938 2023-09-20 Jakub Jelinek <jakub@redhat.com>
2940 * builtins.h (type_to_class): Declare.
2941 * builtins.cc (type_to_class): No longer static. Return
2942 int rather than enum.
2943 * doc/extend.texi (__builtin_classify_type): Document.
2945 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2948 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
2949 * optabs.cc (maybe_legitimize_operand): Ditto.
2950 (can_reuse_operands_p): Ditto.
2951 * optabs.h (enum expand_operand_type): Ditto.
2952 (create_undefined_input_operand): Ditto.
2954 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
2956 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
2957 'omp allocate' variables; move stack cleanup after other
2959 (omp_notice_variable): Process original decl when decl
2960 of the value-expression for a 'omp allocate' variable is passed.
2961 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
2963 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
2965 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
2966 support simplifying vector int not only scalar int.
2968 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2970 * config/riscv/vector-iterators.md: Extend VLS floating-point.
2972 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2974 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
2976 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
2979 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
2980 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
2982 2023-09-20 Richard Biener <rguenther@suse.de>
2984 PR tree-optimization/111489
2985 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
2987 2023-09-20 Richard Biener <rguenther@suse.de>
2989 PR tree-optimization/111489
2990 * doc/invoke.texi (--param uninit-max-chain-len): Document.
2991 (--param uninit-max-num-chains): Likewise.
2992 * params.opt (-param=uninit-max-chain-len=): New.
2993 (-param=uninit-max-num-chains=): Likewise.
2994 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
2995 param_uninit_max_num_chains.
2996 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
2997 (uninit_analysis::init_use_preds): Avoid VLA.
2998 (uninit_analysis::init_from_phi_def): Likewise.
2999 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
3002 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3004 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
3005 GET_MODE_PRECISION of TImode or DImode depending on whether
3006 TImode is supported scalar mode.
3007 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
3008 * expr.cc (expand_expr_real_1): Likewise.
3009 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
3010 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
3012 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3014 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
3015 (*n<optab><mode>): Ditto.
3016 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
3017 (*<any_shiftrt:optab>trunc<mode>): Ditto.
3018 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
3019 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
3020 (*single_widen_mult<any_extend:su><mode>): Ditto.
3021 (*single_widen_mul<any_extend:su><mode>): Ditto.
3022 (*single_widen_mult<mode>): Ditto.
3023 (*single_widen_mul<mode>): Ditto.
3024 (*dual_widen_fma<mode>): Ditto.
3025 (*dual_widen_fma<su><mode>): Ditto.
3026 (*single_widen_fma<mode>): Ditto.
3027 (*single_widen_fma<su><mode>): Ditto.
3028 (*dual_fma<mode>): Ditto.
3029 (*single_fma<mode>): Ditto.
3030 (*dual_fnma<mode>): Ditto.
3031 (*dual_widen_fnma<mode>): Ditto.
3032 (*single_fnma<mode>): Ditto.
3033 (*single_widen_fnma<mode>): Ditto.
3034 (*dual_fms<mode>): Ditto.
3035 (*dual_widen_fms<mode>): Ditto.
3036 (*single_fms<mode>): Ditto.
3037 (*single_widen_fms<mode>): Ditto.
3038 (*dual_fnms<mode>): Ditto.
3039 (*dual_widen_fnms<mode>): Ditto.
3040 (*single_fnms<mode>): Ditto.
3041 (*single_widen_fnms<mode>): Ditto.
3043 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3046 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
3047 on vars or function decls if -fopenmp or -fopenmp-simd.
3049 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3052 * config/riscv/autovec-opt.md: Add missed operand.
3054 2023-09-20 Omar Sandoval <osandov@osandov.com>
3057 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
3058 dwarf_split_debug_info.
3060 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3062 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
3063 (vectorize_related_mode): Add VLS related modes.
3064 * config/riscv/vector-iterators.md: Extend VLS modes.
3066 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
3068 PR rtl-optimization/110071
3069 * ira-color.cc (improve_allocation): Consider cost of callee
3072 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
3073 Xi Ruoyao <xry111@xry111.site>
3075 * configure: Regenerate.
3076 * configure.ac: Checking assembler for -mno-relax support.
3077 Disable relaxation when probing leb128 support.
3079 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
3081 * config.in: Regenerate.
3082 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
3083 mrelax. And set the initial value of explicit-relocs according to the
3085 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
3086 --no-relax option to the linker.
3087 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
3088 -mno-relax, pass the -mno-relax option to the assembler.
3089 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
3090 * config/loongarch/loongarch.opt: Regenerate.
3091 * configure: Regenerate.
3092 * configure.ac: Add detection of support for binutils relax function.
3094 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3096 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
3097 -fdeps-target= flags.
3098 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
3099 only -fdeps-format= is specified.
3100 * json.h: Add a TODO item to refactor out to share with
3103 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3104 Jason Merrill <jason@redhat.com>
3106 * gcc.cc (join_spec_func): Add a spec function to join all
3109 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
3111 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
3112 src_op_0 var to avoid rtl check error.
3114 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3116 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
3118 (operator_not_equal::fold_range): Handle VREL_EQ.
3119 (operator_lt::fold_range): Remove special casing for VREL_EQ.
3120 (operator_gt::fold_range): Same.
3121 (foperator_unordered_equal::fold_range): Same.
3123 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
3125 * doc/extend.texi: Document attributes hot, cold on C++ types.
3127 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
3129 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
3130 modulo instruction is disabled.
3131 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
3132 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
3133 (define_expand umod<mode>3): New.
3134 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
3135 instruction is disabled.
3136 (umodti3, modti3): Check if the modulo instruction is disabled.
3138 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
3140 * doc/gm2.texi (fdebug-builtins): Correct description.
3142 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
3144 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
3145 * config/iq2000/iq2000.md (rotrsi3): Use it.
3147 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3149 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
3150 (operator_lt::op2_range): Same.
3151 (operator_le::op1_range): Same.
3152 (operator_le::op2_range): Same.
3153 (operator_gt::op1_range): Same.
3154 (operator_gt::op2_range): Same.
3155 (operator_ge::op1_range): Same.
3156 (operator_ge::op2_range): Same.
3157 (foperator_unordered_lt::op1_range): Same.
3158 (foperator_unordered_lt::op2_range): Same.
3159 (foperator_unordered_le::op1_range): Same.
3160 (foperator_unordered_le::op2_range): Same.
3161 (foperator_unordered_gt::op1_range): Same.
3162 (foperator_unordered_gt::op2_range): Same.
3163 (foperator_unordered_ge::op1_range): Same.
3164 (foperator_unordered_ge::op2_range): Same.
3166 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3168 * value-range.h (frange::update_nan): New.
3170 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3172 * range-op-float.cc (operator_not_equal::op2_range): New.
3173 * range-op-mixed.h: Add operator_not_equal::op2_range.
3175 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
3177 PR tree-optimization/110080
3178 PR tree-optimization/110249
3179 * tree-vrp.cc (remove_unreachable::final_p): New.
3180 (remove_unreachable::maybe_register): Rename from
3181 maybe_register_block and call early or final routine.
3182 (fully_replaceable): New.
3183 (remove_unreachable::handle_early): New.
3184 (remove_unreachable::remove_and_update_globals): Remove
3185 non-final processing.
3186 (rvrp_folder::rvrp_folder): Add final flag to constructor.
3187 (rvrp_folder::post_fold_bb): Remove unreachable registration.
3188 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
3189 (execute_ranger_vrp): Adjust some call parameters.
3191 2023-09-19 Richard Biener <rguenther@suse.de>
3194 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
3196 * tree-pretty-print.cc (op_symbol): Likewise.
3197 (op_symbol_code): Print TDF_GIMPLE variant if requested.
3198 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
3200 (dump_gimple_cond): Likewise.
3202 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
3203 Pan Li <pan2.li@intel.com>
3205 * tree-streamer.h (bp_unpack_machine_mode): If
3206 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
3208 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3210 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
3212 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3214 * config/riscv/autovec.md: Extend VLS modes.
3215 * config/riscv/vector.md: Ditto.
3217 2023-09-19 Richard Biener <rguenther@suse.de>
3219 PR tree-optimization/111465
3220 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
3221 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
3223 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3225 * config/riscv/autovec.md: Extend VLS floating-point modes.
3226 * config/riscv/vector.md: Ditto.
3228 2023-09-19 Jakub Jelinek <jakub@redhat.com>
3230 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
3231 nor check type_has_mode_precision_p for width larger than [TD]Imode
3233 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
3234 to type. Use boolean_true_node instead of
3235 constant_boolean_node (true, boolean_type_node). Formatting fixes.
3237 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3239 * config/riscv/autovec.md: Add VLS modes.
3240 * config/riscv/vector.md: Ditto.
3242 2023-09-19 Jakub Jelinek <jakub@redhat.com>
3244 * tree.cc (build_bitint_type): Assert precision is not 0, or
3246 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
3247 of unsigned _BitInt(1).
3249 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
3251 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
3252 Removed old combine patterns.
3253 (*single_<optab>mult_plus<mode>): Ditto.
3254 (*double_<optab>mult_plus<mode>): Ditto.
3255 (*sign_zero_extend_fma): Ditto.
3256 (*zero_sign_extend_fma): Ditto.
3257 (*double_widen_fma<mode>): Ditto.
3258 (*single_widen_fma<mode>): Ditto.
3259 (*double_widen_fnma<mode>): Ditto.
3260 (*single_widen_fnma<mode>): Ditto.
3261 (*double_widen_fms<mode>): Ditto.
3262 (*single_widen_fms<mode>): Ditto.
3263 (*double_widen_fnms<mode>): Ditto.
3264 (*single_widen_fnms<mode>): Ditto.
3265 (*reduc_plus_scal_<mode>): Adjust name.
3266 (*widen_reduc_plus_scal_<mode>): Adjust name.
3267 (*dual_widen_fma<mode>): New combine pattern.
3268 (*dual_widen_fmasu<mode>): Ditto.
3269 (*dual_widen_fmaus<mode>): Ditto.
3270 (*dual_fma<mode>): Ditto.
3271 (*single_fma<mode>): Ditto.
3272 (*dual_fnma<mode>): Ditto.
3273 (*single_fnma<mode>): Ditto.
3274 (*dual_fms<mode>): Ditto.
3275 (*single_fms<mode>): Ditto.
3276 (*dual_fnms<mode>): Ditto.
3277 (*single_fnms<mode>): Ditto.
3278 * config/riscv/autovec.md (fma<mode>4):
3279 Reafctor fma pattern.
3280 (*fma<VI:mode><P:mode>): Removed.
3281 (fnma<mode>4): Reafctor.
3282 (*fnma<VI:mode><P:mode>): Removed.
3283 (*fma<VF:mode><P:mode>): Removed.
3284 (*fnma<VF:mode><P:mode>): Removed.
3285 (fms<mode>4): Reafctor.
3286 (*fms<VF:mode><P:mode>): Removed.
3287 (fnms<mode>4): Reafctor.
3288 (*fnms<VF:mode><P:mode>): Removed.
3289 * config/riscv/riscv-protos.h (prepare_ternary_operands):
3291 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
3292 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
3293 (*pred_mul_plus<mode>): Removed.
3294 (*pred_mul_plus<mode>_scalar): Removed.
3295 (*pred_mul_plus<mode>_extended_scalar): Removed.
3296 (*pred_minus_mul<mode>_undef): New pattern.
3297 (*pred_minus_mul<mode>): Removed.
3298 (*pred_minus_mul<mode>_scalar): Removed.
3299 (*pred_minus_mul<mode>_extended_scalar): Removed.
3300 (*pred_mul_<optab><mode>_undef): New pattern.
3301 (*pred_mul_<optab><mode>): Removed.
3302 (*pred_mul_<optab><mode>_scalar): Removed.
3303 (*pred_mul_neg_<optab><mode>_undef): New pattern.
3304 (*pred_mul_neg_<optab><mode>): Removed.
3305 (*pred_mul_neg_<optab><mode>_scalar): Removed.
3307 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
3309 * config/riscv/riscv-vector-builtins.cc
3310 (builtin_decl, expand_builtin): Replace SVE with RVV.
3312 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
3314 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
3315 riscv-cmo.def and riscv-scalar-crypto.def.
3317 2023-09-18 Pan Li <pan2.li@intel.com>
3319 * config/riscv/autovec.md: Extend to vls mode.
3321 2023-09-18 Pan Li <pan2.li@intel.com>
3323 * config/riscv/autovec.md: Bugfix.
3324 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
3326 2023-09-18 Andrew Pinski <apinski@marvell.com>
3328 PR tree-optimization/111442
3329 * match.pd (zero_one_valued_p): Have the bit_and match not be
3332 2023-09-18 Andrew Pinski <apinski@marvell.com>
3334 PR tree-optimization/111435
3335 * match.pd (zero_one_valued_p): Don't do recursion
3338 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
3340 * config/darwin-protos.h (enum darwin_external_toolchain): New.
3341 * config/darwin.cc (DSYMUTIL_VERSION): New.
3342 (darwin_override_options): Choose the default debug DWARF version
3343 depending on the configured dsymutil version.
3345 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
3347 * configure: Regenerate.
3348 * configure.ac: Handle explict disable of stdlib option, set
3349 defaults for Darwin.
3351 2023-09-18 Andrew Pinski <apinski@marvell.com>
3353 PR tree-optimization/111431
3354 * match.pd (`(a == CST) & a`): New pattern.
3356 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3358 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
3359 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
3361 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
3364 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
3365 Add support for immediates using shifted ORR/BIC.
3366 (aarch64_split_dimode_const_store): Apply if we save one instruction.
3367 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
3368 Make pattern global.
3370 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
3372 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
3373 (neoverse-v1): Place before zeus.
3374 (neoverse-v2): Place before demeter.
3375 * config/aarch64/aarch64-tune.md: Regenerate.
3377 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3379 * config/riscv/autovec.md: Add VLS modes.
3380 * config/riscv/vector-iterators.md: Ditto.
3381 * config/riscv/vector.md: Ditto.
3383 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3385 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
3386 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
3388 2023-09-18 Richard Biener <rguenther@suse.de>
3390 PR tree-optimization/111294
3391 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
3393 (back_threader::find_paths_to_names): Adjust.
3394 (back_threader::maybe_thread_block): Likewise.
3395 (back_threader_profitability::possibly_profitable_path_p): Remove
3396 code applying extra costs to copies PHIs.
3398 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3400 * config/riscv/autovec.md: Extend VLS modes.
3401 * config/riscv/vector.md: Ditto.
3403 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3405 * config/riscv/vector.md (mov<mode>): New pattern.
3406 (*mov<mode>_mem_to_mem): Ditto.
3407 (*mov<mode>): Ditto.
3408 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
3409 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
3410 (*mov<mode>_vls): Ditto.
3411 (movmisalign<mode>): Ditto.
3412 (@vec_duplicate<mode>): Ditto.
3413 * config/riscv/autovec-vls.md: Removed.
3415 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3418 * config/riscv/autovec.md: Add VLS modes.
3420 2023-09-18 Jason Merrill <jason@redhat.com>
3422 * doc/gty.texi: Add discussion of cache vs. deletable.
3424 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3426 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
3427 (copysign<mode>3): Ditto.
3428 (xorsign<mode>3): Ditto.
3429 (<optab><mode>2): Ditto.
3430 * config/riscv/autovec.md: Extend VLS modes.
3432 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
3434 PR middle-end/111303
3435 * match.pd ((t * 2) / 2): Update pattern.
3437 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
3439 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
3441 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3444 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
3445 (vec_extract<mode><vel>): Ditto.
3446 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
3447 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
3448 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
3450 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
3452 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
3453 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
3454 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
3455 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
3456 new insn/expansions.
3457 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
3458 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
3459 (*riscv_<sha256_op>_si): New raw instruction for RV32.
3460 (*riscv_<sm3_op>_si): Ditto.
3461 (*riscv_<sm4_op>_si): Ditto.
3462 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
3463 (riscv_<sm3_op>_di_extended): Ditto.
3464 (riscv_<sm4_op>_di_extended): Ditto.
3465 (riscv_<sha256_op>_si): New common instruction expansion.
3466 (riscv_<sm3_op>_si): Ditto.
3467 (riscv_<sm4_op>_si): Ditto.
3468 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
3469 "crypto_zksh" and "crypto_zksed". Remove availability
3470 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
3471 * config/riscv/riscv-ftypes.def: Remove unused function type.
3472 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
3473 intrinsics to operate on uint32_t.
3475 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
3477 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
3478 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
3479 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
3480 Removed as no longer used.
3481 (RISCV_ATYPE_UDI): New for uint64_t.
3482 * config/riscv/riscv-cmo.def: Make types unsigned for not working
3483 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
3484 argument/return types.
3485 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
3486 number and shift amount types unsigned.
3487 * config/riscv/riscv-scalar-crypto.def: Ditto.
3489 2023-09-16 Pan Li <pan2.li@intel.com>
3491 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
3493 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
3495 * config/riscv/predicates.md: Restrict predicate
3496 to allow 'reg' only.
3498 2023-09-15 Andrew Pinski <apinski@marvell.com>
3500 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
3501 Also match `a & zero_one_valued_p` too.
3503 2023-09-15 Andrew Pinski <apinski@marvell.com>
3505 PR tree-optimization/111414
3506 * match.pd (`(1 >> X) != 0`): Check to see if
3507 the integer_onep was an integral type (not a vector type).
3509 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
3511 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
3512 run phi analysis, and do it before loop analysis.
3514 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
3516 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
3519 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
3521 PR tree-optimization/111407
3522 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
3523 when one of the operands is subject to abnormal coalescing.
3525 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
3527 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
3528 (enum insn_type): Ditto.
3529 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
3530 (emit_vlmax_insn): Adjust.
3531 (emit_nonvlmax_insn): Adjust.
3532 (emit_vlmax_insn_lra): Adjust.
3534 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
3536 * config/riscv/autovec-opt.md: Adjust.
3537 * config/riscv/autovec.md: Ditto.
3538 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
3539 (expand_reduction): Adjust expand_reduction prototype.
3540 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
3541 (expand_reduction): Refactor expand_reduction.
3543 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
3546 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
3547 the lower memory access to a mem-pair operand.
3549 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
3551 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
3552 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
3553 before the driver canonicalization routines.
3554 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
3555 to loongarch-driver.h
3556 * config/loongarch/t-linux: Move multilib-related definitions to
3558 * config/loongarch/t-multilib: New file. Inject library build
3559 options obtained from --with-multilib-list.
3560 * config/loongarch/t-loongarch: Same.
3562 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
3565 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
3566 New combine pattern.
3567 (*fold_left_widen_plus_<mode>): Ditto.
3568 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
3569 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
3570 Change from define_expand to define_insn_and_split.
3571 (fold_left_plus_<mode>): Ditto.
3572 (mask_len_fold_left_plus_<mode>): Ditto.
3573 * config/riscv/riscv-v.cc (expand_reduction):
3574 Support widen reduction.
3575 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
3576 Add new iterators and attrs.
3578 2023-09-14 David Malcolm <dmalcolm@redhat.com>
3580 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
3581 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
3582 (sarif_thread_flow::sarif_thread_flow): New.
3583 (sarif_builder::make_code_flow_object): Reimplement, creating
3584 per-thread threadFlow objects, populating them with the relevant
3586 (sarif_builder::make_thread_flow_object): Delete, moving the
3587 code into sarif_builder::make_code_flow_object.
3588 (sarif_builder::make_thread_flow_location_object): Add
3589 "path_event_idx" param. Use it to set "executionOrder"
3591 * diagnostic-path.h (diagnostic_event::get_thread_id): New
3593 (class diagnostic_thread): New.
3594 (diagnostic_path::num_threads): New pure-virtual vfunc.
3595 (diagnostic_path::get_thread): New pure-virtual vfunc.
3596 (diagnostic_path::multithreaded_p): New decl.
3597 (simple_diagnostic_event::simple_diagnostic_event): Add optional
3599 (simple_diagnostic_event::get_thread_id): New accessor.
3600 (simple_diagnostic_event::m_thread_id): New.
3601 (class simple_diagnostic_thread): New.
3602 (simple_diagnostic_path::simple_diagnostic_path): Move definition
3604 (simple_diagnostic_path::num_threads): New.
3605 (simple_diagnostic_path::get_thread): New.
3606 (simple_diagnostic_path::add_thread): New.
3607 (simple_diagnostic_path::add_thread_event): New.
3608 (simple_diagnostic_path::m_threads): New.
3609 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
3610 param for overriding the context's printer.
3611 (diagnostic_show_locus): Likwise.
3612 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
3613 Move here from diagnostic-path.h. Add main thread.
3614 (simple_diagnostic_path::num_threads): New.
3615 (simple_diagnostic_path::get_thread): New.
3616 (simple_diagnostic_path::add_thread): New.
3617 (simple_diagnostic_path::add_thread_event): New.
3618 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
3619 param and use it to initialize m_thread_id. Reformat.
3620 * diagnostic.h: Add pretty_printer param for overriding the
3622 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
3623 (can_consolidate_events): Compare thread ids.
3624 (class per_thread_summary): New.
3625 (event_range::event_range): Add per_thread_summary arg.
3626 (event_range::print): Add "pp" param and use it rather than dc's
3628 (event_range::m_thread_id): New field.
3629 (event_range::m_per_thread_summary): New field.
3630 (path_summary::multithreaded_p): New.
3631 (path_summary::get_events_for_thread_id): New.
3632 (path_summary::m_per_thread_summary): New field.
3633 (path_summary::m_thread_id_to_events): New field.
3634 (path_summary::get_or_create_events_for_thread_id): New.
3635 (path_summary::path_summary): Create per_thread_summary instances
3636 as needed and associate the event_range instances with them.
3637 (base_indent): Move here from print_path_summary_as_text.
3638 (per_frame_indent): Likewise.
3639 (class thread_event_printer): New, adapted from parts of
3640 print_path_summary_as_text.
3641 (print_path_summary_as_text): Make static. Reimplement to
3642 moving most of existing code to class thread_event_printer,
3643 capturing state as per-thread as appropriate.
3644 (default_tree_diagnostic_path_printer): Add missing 'break' on
3647 2023-09-14 David Malcolm <dmalcolm@redhat.com>
3649 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
3650 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
3651 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
3652 clearing the deletable gcc_root_tab_t.
3653 (ggc_common_finalize): New.
3654 * ggc.h (ggc_common_finalize): New decl.
3655 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
3656 ggc_common_finalize.
3658 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
3660 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
3661 unsigned comparisons.
3662 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
3663 generation of salt/saltu instructions.
3664 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
3665 * config/xtensa/xtensa.md (salt, saltu): New instruction
3668 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
3670 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
3673 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
3675 * config/riscv/autovec.md: Change rtx code to unspec.
3676 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
3677 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
3678 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
3680 (class widen_freducop): Removed.
3681 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
3682 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
3683 (@pred_<reduc_op><mode>): New name.
3684 (@pred_widen_reduc_plus<v_su><mode>): Change name.
3685 (@pred_reduc_plus<order><mode>): Change name.
3686 (@pred_widen_reduc_plus<order><mode>): Change name.
3688 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
3690 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
3691 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
3692 * config/riscv/vector-iterators.md: New iterators and attrs.
3693 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
3695 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
3696 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
3697 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
3698 (@pred_reduc_<reduc><mode>): Added.
3699 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
3700 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
3701 (@pred_widen_reduc_plus<v_su><mode>): Added.
3702 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
3703 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
3704 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
3705 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
3706 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
3707 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
3708 (@pred_reduc_plus<order><mode>): Added.
3709 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
3710 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
3711 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
3712 (@pred_widen_reduc_plus<order><mode>): Added.
3714 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
3716 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
3717 Move WHILELO handling to...
3718 (aarch64_vector_costs::finish_cost): ...here. Check whether the
3719 vectorizer has decided to use a predicated loop.
3721 2023-09-14 Andrew Pinski <apinski@marvell.com>
3723 PR tree-optimization/106164
3724 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
3725 Expand to support constants that are off by one.
3727 2023-09-14 Andrew Pinski <apinski@marvell.com>
3729 * genmatch.cc (parser::parse_result): For an else clause
3730 of an if statement inside a switch, error out explictly.
3732 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3734 * config/riscv/autovec-opt.md: Add VLS mask modes.
3735 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
3736 (vcond_mask_<mode><vm>): Add VLS mask modes.
3737 * config/riscv/vector.md: Ditto.
3739 2023-09-14 Richard Biener <rguenther@suse.de>
3741 PR tree-optimization/111294
3742 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
3743 operands that eventually become dead and use simple_dce_from_worklist
3744 to remove their definitions if they did so.
3746 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
3748 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
3749 Accept all nonimmediate_operands, but keep the existing constraints.
3750 If the instruction is split before RA, load invalid addresses into
3751 a temporary register.
3752 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
3754 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3757 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
3758 (vector_insn_info::global_merge): Ditto.
3759 (vector_insn_info::get_avl_or_vl_reg): Ditto.
3761 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3763 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
3765 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
3767 * config/loongarch/loongarch-def.c: Modify the default value of
3770 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
3772 * config/xtensa/xtensa.cc (xtensa_expand_scc):
3773 Revert the changes from the last patch, as the work in the RTL
3774 expansion pass is too far to determine the physical registers.
3775 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
3776 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
3778 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
3781 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
3783 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3785 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
3786 (@vec_extract<mode><vel>): Ditto.
3787 * config/riscv/vector.md: Ditto
3789 2023-09-13 Andrew Pinski <apinski@marvell.com>
3791 * match.pd (`X <= MAX(X, Y)`):
3792 Move before `MIN (X, C1) < C2` pattern.
3794 2023-09-13 Andrew Pinski <apinski@marvell.com>
3796 PR tree-optimization/111364
3797 * match.pd (`MIN (X, Y) == X`): Extend
3798 to min/lt, min/ge, max/gt, max/le.
3800 2023-09-13 Andrew Pinski <apinski@marvell.com>
3802 PR tree-optimization/111345
3803 * match.pd (`Y > (X % Y)`): Merge
3805 (`(X % Y) < Y`): Pattern by adding `:c`
3808 2023-09-13 Richard Biener <rguenther@suse.de>
3810 PR tree-optimization/111387
3811 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
3812 EDGE_DFS_BACK when doing BB vectorization.
3813 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
3814 to compute RPO and mark backedges.
3816 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
3818 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
3819 New combine pattern.
3820 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
3821 (<mulh_table><mode>3_highpart): Merged pattern.
3822 (umul<mode>3_highpart): Mrege smul and umul.
3823 * config/riscv/vector-iterators.md (umul): New iterators.
3824 (UNSPEC_VMULHU): New iterators.
3826 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
3828 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
3829 New combine pattern.
3830 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
3832 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
3834 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
3835 (*cond_copysign<mode>): New combine pattern.
3836 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
3838 2023-09-13 Richard Biener <rguenther@suse.de>
3840 PR tree-optimization/111397
3841 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
3842 argument to specify whether the PHI destination doesn't flow in
3843 from an abnormal PHI.
3844 (propagate_value): Adjust.
3845 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
3847 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
3849 (process_bb): Likewise.
3851 2023-09-13 Pan Li <pan2.li@intel.com>
3854 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
3856 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
3858 PR tree-optimization/111303
3859 * match.pd ((X - N * M) / N): Add undefined_p checking.
3860 ((X + N * M) / N): Likewise.
3861 ((X + C) div_rshift N): Likewise.
3863 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3866 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
3868 2023-09-12 Martin Jambor <mjambor@suse.cz>
3870 * dbgcnt.def (form_fma): New.
3871 * tree-ssa-math-opts.cc: Include dbgcnt.h.
3872 (convert_mult_to_fma): Bail out if the debug counter say so.
3874 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
3876 * config/riscv/autovec-opt.md: Update type
3877 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
3879 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3881 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
3883 (aarch64_layout_frame): Use it to decide whether locals should
3884 go above or below the saved registers.
3885 (aarch64_expand_prologue): Update stack layout comment.
3886 Emit a stack tie after the final adjustment.
3888 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3890 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
3891 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
3892 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
3894 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3896 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
3897 (aarch64_frame::hard_fp_save_and_probe): New fields.
3898 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
3899 Rather than asserting that a leaf function saves LR, instead assert
3900 that a leaf function saves something.
3901 (aarch64_get_separate_components): Prevent the chosen probe
3902 registers from being individually shrink-wrapped.
3903 (aarch64_allocate_and_probe_stack_space): Remove workaround for
3904 probe registers that aren't at the bottom of the previous allocation.
3906 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3908 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
3909 Always probe the residual allocation at offset 1024, asserting
3910 that that is in range.
3912 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3914 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
3915 the LR save slot is in the first 16 bytes of the register save area.
3916 Only form STP/LDP push/pop candidates if both registers are valid.
3917 (aarch64_allocate_and_probe_stack_space): Remove workaround for
3918 when LR was not in the first 16 bytes.
3920 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3922 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
3923 Don't probe final allocations that are exactly 1KiB in size (after
3924 unprobed space above the final allocation has been deducted).
3926 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3928 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
3929 calculation of initial_adjust for frames in which all saves
3932 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3934 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
3935 the allocation of the top of the frame.
3937 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3939 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
3941 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
3942 from the bottom of the frame, rather than the bottom of the saved
3943 register area. Measure reg_offset from the bottom of the frame
3944 rather than the bottom of the saved register area.
3945 (aarch64_save_callee_saves): Update accordingly.
3946 (aarch64_restore_callee_saves): Likewise.
3947 (aarch64_get_separate_components): Likewise.
3948 (aarch64_process_components): Likewise.
3950 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3952 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
3954 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3956 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
3958 (aarch64_frame::bytes_above_hard_fp): ...this.
3959 * config/aarch64/aarch64.cc (aarch64_layout_frame)
3960 (aarch64_expand_prologue): Update accordingly.
3961 (aarch64_initial_elimination_offset): Likewise.
3963 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3965 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
3966 (aarch64_frame::bytes_above_locals): ...this.
3967 * config/aarch64/aarch64.cc (aarch64_layout_frame)
3968 (aarch64_initial_elimination_offset): Update accordingly.
3970 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3972 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
3973 calculation of chain_offset into the emit_frame_chain block.
3975 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3977 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
3978 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
3979 callee_offset handling.
3980 (aarch64_save_callee_saves): Replace the start_offset parameter
3981 with a bytes_below_sp parameter.
3982 (aarch64_restore_callee_saves): Likewise.
3983 (aarch64_expand_prologue): Update accordingly.
3984 (aarch64_expand_epilogue): Likewise.
3986 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3988 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
3990 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
3991 (aarch64_expand_epilogue): Use it instead of
3992 below_hard_fp_saved_regs_size.
3994 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
3996 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
3998 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
3999 and use it instead of crtl->outgoing_args_size.
4000 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
4001 of outgoing_args_size.
4002 (aarch64_process_components): Likewise.
4004 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4006 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
4007 allocate the frame in one go if there are no saved registers.
4009 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4011 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
4012 chain_offset rather than callee_offset.
4014 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4016 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
4017 a local shorthand for cfun->machine->frame.
4018 (aarch64_restore_callee_saves, aarch64_get_separate_components):
4019 (aarch64_process_components): Likewise.
4020 (aarch64_allocate_and_probe_stack_space): Likewise.
4021 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
4022 (aarch64_layout_frame): Use existing shorthand for one more case.
4024 2023-09-12 Andrew Pinski <apinski@marvell.com>
4026 PR tree-optimization/107881
4027 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
4028 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
4030 2023-09-12 Pan Li <pan2.li@intel.com>
4032 * config/riscv/riscv-vector-costs.h (struct range): Removed.
4034 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4036 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
4037 (compute_nregs_for_mode): Ditto.
4038 (live_range_conflict_p): Ditto.
4039 (max_number_of_live_regs): Ditto.
4040 (compute_lmul): Ditto.
4041 (costs::prefer_new_lmul_p): Ditto.
4042 (costs::better_main_loop_than_p): Ditto.
4043 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
4044 (struct var_live_range): Ditto.
4045 (struct autovec_info): Ditto.
4046 * config/riscv/t-riscv: Update makefile for COST model.
4048 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4050 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
4053 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4055 PR middle-end/111338
4056 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
4058 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
4059 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
4060 optimization if type's precision is too large for
4061 vn_walk_cb_data::bufsize.
4063 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
4065 * doc/gm2.texi (Compiler options): Document new option
4068 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4070 * doc/sourcebuild.texi (stack_size): Update.
4072 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4074 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
4075 (<optab>_not<mode>3): Likewise.
4076 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
4078 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
4080 (GEN_EMIT_HELPER2): Likewise.
4081 (emit_strcmp_scalar_compare_byte): New function.
4082 (emit_strcmp_scalar_compare_subword): Likewise.
4083 (emit_strcmp_scalar_compare_word): Likewise.
4084 (emit_strcmp_scalar_load_and_compare): Likewise.
4085 (emit_strcmp_scalar_call_to_libc): Likewise.
4086 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
4087 (emit_strcmp_scalar_result_calculation): Likewise.
4088 (riscv_expand_strcmp_scalar): Likewise.
4089 (riscv_expand_strcmp): Likewise.
4090 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
4092 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
4093 (cmpstrnsi): Invoke expansion function for str(n)cmp.
4094 (cmpstrsi): Likewise.
4095 * config/riscv/riscv.opt: Add new parameter
4096 '-mstring-compare-inline-limit'.
4097 * doc/invoke.texi: Document new parameter
4098 '-mstring-compare-inline-limit'.
4100 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4102 * config.gcc: Add new object riscv-string.o.
4104 * config/riscv/riscv-protos.h (riscv_expand_strlen):
4106 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
4107 * config/riscv/riscv.opt: New flag 'minline-strlen'.
4108 * config/riscv/t-riscv: Add new object riscv-string.o.
4109 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
4110 (th_rev<mode>2): Likewise.
4111 (th_tstnbz<mode>2): New INSN.
4112 * doc/invoke.texi: Document '-minline-strlen'.
4113 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
4114 (emit_unlikely_jump_insn): Likewise.
4115 * rtl.h (emit_likely_jump_insn): New prototype.
4116 (emit_unlikely_jump_insn): Likewise.
4117 * config/riscv/riscv-string.cc: New file.
4119 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4121 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
4122 (TARGET_SUPPORTS_ALIASES): Define.
4124 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4126 * doc/sourcebuild.texi (check-function-bodies): Update.
4128 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
4130 * gimplify.cc (gimplify_bind_expr): Check for
4131 insertion after variable cleanup. Convert 'omp allocate'
4132 var-decl attribute to GOMP_alloc/GOMP_free calls.
4134 2023-09-12 xuli <xuli1@eswincomputing.com>
4136 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
4137 parameter e and replace NULL_RTX with gcc_unreachable.
4139 2023-09-12 xuli <xuli1@eswincomputing.com>
4141 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
4143 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4144 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
4145 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
4147 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
4148 * config/riscv/riscv-vector-builtins.cc: Add args type.
4150 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4152 * config/riscv/riscv.cc
4153 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
4154 riscv_avoid_shrink_wrapping_separate.
4155 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
4157 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
4159 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4161 * shrink-wrap.cc (try_shrink_wrapping_separate):call
4162 use_shrink_wrapping_separate.
4163 (use_shrink_wrapping_separate): wrap the condition
4164 check in use_shrink_wrapping_separate.
4165 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
4167 2023-09-11 Andrew Pinski <apinski@marvell.com>
4169 PR tree-optimization/111348
4170 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
4171 the cmp part of the pattern.
4173 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
4176 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
4177 Call output_addr_const for CASE_CONST_SCALAR_INT.
4179 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4181 * config/riscv/thead.md: Update types
4183 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4185 * config/riscv/riscv.md: Update types
4187 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4189 * config/riscv/riscv.md: Add "zicond" type
4190 * config/riscv/zicond.md: Update types
4192 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4194 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
4195 * config/riscv/zc.md: Update types
4197 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4199 * config/riscv/autovec-opt.md: Update types
4200 * config/riscv/autovec.md: likewise
4202 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4204 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
4206 (s390_vec_unsigned_flt): Ditto.
4207 (s390_vec_revb_flt): Ditto.
4208 (s390_vec_reve_flt): Ditto.
4209 (s390_vclfnhs): Fix operand flags.
4210 (s390_vclfnls): Ditto.
4211 (s390_vcrnfs): Ditto.
4215 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4217 * config/s390/s390-builtins.def (O_U64): New.
4222 (O_M12): Change bit position.
4233 (OB_DEF_VAR): Add operand constraints.
4235 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
4238 2023-09-11 Andrew Pinski <apinski@marvell.com>
4240 PR tree-optimization/111349
4241 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
4242 the cmp part of the pattern.
4244 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4247 * config/riscv/riscv.opt: Set default as scalable vectorization.
4249 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4251 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
4252 (get_all_successors): Ditto.
4253 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
4254 (get_all_successors): Ditto.
4256 2023-09-11 Jakub Jelinek <jakub@redhat.com>
4258 PR middle-end/111329
4259 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
4260 function. For printing values which don't fit into digit_buffer
4261 use out-of-line function.
4262 * wide-int-print.h (pp_wide_int_large): Declare.
4263 * wide-int-print.cc: Include pretty-print.h.
4264 (pp_wide_int_large): Define.
4266 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4268 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
4269 Use dominance analysis.
4270 (pass_vsetvl::init): Ditto.
4271 (pass_vsetvl::done): Ditto.
4273 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4276 * config/riscv/autovec.md: Add VLS modes.
4277 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
4278 (cmp_lmul_gt_one): Ditto.
4279 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
4280 (cmp_lmul_gt_one): Ditto.
4281 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
4282 (riscv_vectorize_vec_perm_const): Ditto.
4283 * config/riscv/vector-iterators.md: Ditto.
4284 * config/riscv/vector.md: Ditto.
4286 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4288 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
4289 * config/riscv/vector-iterators.md: New iterator
4291 2023-09-11 Andrew Pinski <apinski@marvell.com>
4293 PR tree-optimization/111346
4294 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
4297 2023-09-11 liuhongt <hongtao.liu@intel.com>
4301 * config/i386/sse.md (int_comm): New int_attr.
4302 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
4303 Remove % for Complex conjugate operations since they're not
4305 (fma_<complexpairopname>_<mode>_pair): Ditto.
4306 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
4307 (cmul<conj_op><mode>3): Ditto.
4309 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4311 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
4312 fixed-vlmax/vls vector permutation.
4314 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4316 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
4318 2023-09-10 Andrew Pinski <apinski@marvell.com>
4320 PR tree-optimization/111331
4321 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
4322 Fix the LE/GE comparison to the correct value.
4323 * tree-ssa-phiopt.cc (minmax_replacement):
4324 Fix the LE/GE comparison for the
4325 `(a CMP CST1) ? max<a,CST2> : a` optimization.
4327 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
4329 * config/darwin.cc (darwin_function_section): Place unlikely
4330 executed global init code into the standard cold section.
4332 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4335 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
4336 (pass_vsetvl::pre_vsetvl): Ditto.
4337 (pass_vsetvl::init): Ditto.
4338 (pass_vsetvl::lazy_vsetvl): Ditto.
4340 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
4342 * config/loongarch/loongarch.md (mulsidi3_64bit):
4343 Field unsigned extension support.
4344 (<u>muldi3_highpart): Modify template name.
4345 (<u>mulsi3_highpart): Likewise.
4346 (<u>mulsidi3_64bit): Field unsigned extension support.
4347 (<su>muldi3_highpart): Modify muldi3_highpart to
4349 (<su>mulsi3_highpart): Modify mulsi3_highpart to
4352 2023-09-09 Xi Ruoyao <xry111@xry111.site>
4354 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
4355 Check precondition (delta must be a power of 2) and use
4356 popcount_hwi instead of a homebrew loop.
4358 2023-09-09 Xi Ruoyao <xry111@xry111.site>
4360 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
4361 Define to the maximum amount of bytes able to be loaded or
4362 stored with one machine instruction.
4363 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
4364 New static function.
4365 (loongarch_block_move_straight): Call
4366 loongarch_mode_for_move_size for machine_mode to be moved.
4367 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
4368 instead of UNITS_PER_WORD.
4370 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4372 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
4374 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
4376 * fold-const.cc (can_min_p): New function.
4377 (poly_int_binop): Try fold MIN_EXPR.
4379 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
4381 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
4382 case VREL_EQ nor call frelop_early_resolve.
4384 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
4386 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
4388 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
4389 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
4391 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
4393 * config/riscv/thead.md: Use more appropriate mode attributes
4396 2023-09-08 Guo Jie <guojie@loongson.cn>
4398 * common/config/loongarch/loongarch-common.cc:
4399 (default_options loongarch_option_optimization_table):
4400 Default to -fsched-pressure.
4402 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
4404 * config.gcc: remove non-POSIX syntax "<<<".
4406 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
4408 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
4409 Rename postfix to _bitmanip.
4410 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
4411 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
4413 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4415 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
4417 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4419 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
4421 2023-09-07 liuhongt <hongtao.liu@intel.com>
4423 * config/i386/sse.md
4424 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
4425 (VHFBF_AVX512VL): New mode iterator.
4426 (VI2HFBF_AVX512VL): New mode iterator.
4428 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
4430 * value-range.h (contains_zero_p): Return false for undefined ranges.
4431 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
4432 contains_zero_p change above.
4433 (operator_ge::op1_op2_relation): Same.
4434 (operator_equal::op1_op2_relation): Same.
4435 (operator_not_equal::op1_op2_relation): Same.
4436 (operator_lt::op1_op2_relation): Same.
4437 (operator_le::op1_op2_relation): Same.
4438 (operator_ge::op1_op2_relation): Same.
4439 * range-op.cc (operator_equal::op1_op2_relation): Same.
4440 (operator_not_equal::op1_op2_relation): Same.
4441 (operator_lt::op1_op2_relation): Same.
4442 (operator_le::op1_op2_relation): Same.
4443 (operator_cast::op1_range): Same.
4444 (set_nonzero_range_from_mask): Same.
4445 (operator_bitwise_xor::op1_range): Same.
4446 (operator_addr_expr::fold_range): Same.
4447 (operator_addr_expr::op1_range): Same.
4449 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
4451 PR tree-optimization/110875
4452 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
4453 cache-prefilling routine when the ssa-name has no global value.
4455 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
4458 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
4459 (process_alt_operands): Set up the flag. Clear flag for chosen
4460 alternative with special memory constraints.
4461 (process_alt_operands): Set up used insn alternative depending on the flag.
4463 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4465 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
4466 * config/riscv/riscv.md: Ditto.
4467 * config/riscv/vector-iterators.md: Ditto.
4468 * config/riscv/vector.md: Ditto.
4470 2023-09-07 David Malcolm <dmalcolm@redhat.com>
4472 * diagnostic-core.h (error_meta): New decl.
4473 * diagnostic.cc (error_meta): New.
4475 2023-09-07 Jakub Jelinek <jakub@redhat.com>
4478 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
4479 inside gcc_assert, as later code relies on it filling info variable.
4480 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
4481 clear_padding_type): Likewise.
4482 * varasm.cc (output_constant): Likewise.
4483 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
4484 * stor-layout.cc (finish_bitfield_representative, layout_type):
4486 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
4488 2023-09-07 Xi Ruoyao <xry111@xry111.site>
4491 * config/loongarch/loongarch-protos.h
4492 (loongarch_pre_reload_split): Declare new function.
4493 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
4494 * config/loongarch/loongarch.cc
4495 (loongarch_pre_reload_split): Implement.
4496 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
4497 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
4499 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
4500 New define_insn_and_split.
4501 (bstrins_<mode>_for_ior_mask): Likewise.
4502 (define_peephole2): Further optimize code sequence produced by
4503 bstrins_<mode>_for_ior_mask if possible.
4505 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
4507 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
4508 rather than gen_rtx_PLUS.
4510 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4513 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
4514 (pass_vsetvl::df_post_optimization): Remove incorrect function.
4516 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
4518 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
4519 Parse 'XVentanaCondOps' extension.
4520 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
4521 (TARGET_XVENTANACONDOPS): Ditto.
4522 (TARGET_ZICOND_LIKE): New to represent targets with conditional
4523 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
4524 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
4525 with TARGET_ZICOND_LIKE.
4526 (riscv_expand_conditional_move): Ditto.
4527 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
4529 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
4530 * config/riscv/zicond.md: Modify description.
4531 (eqz_ventana): New to match corresponding czero instructions.
4532 (nez_ventana): Ditto.
4533 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
4534 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
4535 (*czero.<eqz>.<GPR><X>): Ditto.
4536 (*czero.eqz.<GPR><X>.opt1): Ditto.
4537 (*czero.nez.<GPR><X>.opt2): Ditto.
4539 2023-09-06 Ian Lance Taylor <iant@golang.org>
4542 * godump.cc (go_format_type): Handle BITINT_TYPE.
4544 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4547 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
4550 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4553 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
4554 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
4555 rather than make_edge, initialize bb->count.
4557 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4560 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
4561 Document general rules for _BitInt support library functions
4562 and document __mulbitint3 and __divmodbitint4.
4563 (Conversion functions): Document __fix{s,d,x,t}fbitint,
4564 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
4565 __bid_floatbitint{s,d,t}d.
4567 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4570 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
4573 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4576 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
4577 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
4578 check if all padding bits up to mode precision are zeros or sign
4579 bit copies and if not, jump to DO_ERROR.
4580 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
4581 Adjust expand_ubsan_result_store callers.
4582 * ubsan.cc: Include target.h and langhooks.h.
4583 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
4584 size converted to pointer sized integer, pass BITINT_TYPE values
4585 which fit into TImode (if supported) or DImode as those integer types
4586 or otherwise for now punt (pass 0).
4587 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
4588 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
4589 TImode/DImode precision rather than TK_Unknown used otherwise for
4590 large/huge BITINT_TYPEs.
4591 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
4592 they don't have mode precision.
4593 * ubsan.h (enum ubsan_print_style): New enumerator.
4595 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4598 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
4599 (ix86_bitint_type_info): New function.
4600 (TARGET_C_BITINT_TYPE_INFO): Redefine.
4602 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4605 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
4606 * passes.def: Add pass_lower_bitint after pass_lower_complex and
4607 pass_lower_bitint_O0 after pass_lower_complex_O0.
4608 * tree-pass.h (PROP_gimple_lbitint): Define.
4609 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
4610 * gimple-lower-bitint.h: New file.
4611 * tree-ssa-live.h (struct _var_map): Add bitint member.
4612 (init_var_map): Adjust declaration.
4613 (region_contains_p): Handle map->bitint like map->outofssa_p.
4614 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
4615 map->bitint and set map->outofssa_p to false if it is non-NULL.
4616 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
4617 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
4619 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
4620 not in that bitmap, and allow res without default def.
4621 (compute_optimized_partition_bases): In map->bitint mode try hard to
4622 coalesce any SSA_NAMEs with the same size.
4623 (coalesce_bitint): New function.
4624 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
4625 used_in_copies and call coalesce_bitint.
4626 * gimple-lower-bitint.cc: New file.
4628 2023-09-06 Jakub Jelinek <jakub@redhat.com>
4631 * tree.def (BITINT_TYPE): New type.
4632 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
4633 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
4635 (BITINT_TYPE_P): Define.
4636 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
4637 they have BITINT_TYPE type.
4638 (tree_check6, tree_not_check6): New inline functions.
4639 (any_integral_type_check): Include BITINT_TYPE.
4640 (build_bitint_type): Declare.
4641 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
4642 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
4643 type_hash_canon): Handle BITINT_TYPE.
4644 (bitint_type_cache): New variable.
4645 (build_bitint_type): New function.
4646 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
4648 (tree_cc_finalize): Free bitint_type_cache.
4649 * builtins.cc (type_to_class): Handle BITINT_TYPE.
4650 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
4651 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
4653 * convert.cc (convert_to_pointer_1, convert_to_real_1,
4654 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
4655 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
4656 GET_MODE_PRECISION (TYPE_MODE (type)).
4657 * doc/generic.texi (BITINT_TYPE): Document.
4658 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
4659 * doc/tm.texi: Regenerated.
4660 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
4661 gen_type_die_with_usage): Handle BITINT_TYPE.
4662 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
4663 handle those which fit into shwi.
4664 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
4665 to bitfield precision reads from BITINT_TYPE vars, parameters or
4666 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
4668 * fold-const.cc (fold_convert_loc, make_range_step): Handle
4670 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
4671 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
4672 (native_encode_int, native_interpret_int, native_interpret_expr):
4674 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
4675 to some other integral type or vice versa conversions non-useless.
4676 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
4677 (clear_padding_unit): Mention in comment that _BitInt types don't need
4679 (clear_padding_bitint_needs_padding_p): New function.
4680 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
4681 (clear_padding_type): Likewise.
4682 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
4683 precision operands force pos_neg? to 1.
4684 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
4685 expand_BITINTTOFLOAT): New functions.
4686 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
4687 BITINTTOFLOAT): New internal functions.
4688 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
4689 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
4690 * match.pd (non-equality compare simplifications from fold_binary):
4691 Punt if TYPE_MODE (arg1_type) is BLKmode.
4692 * pretty-print.h (pp_wide_int): Handle printing of large precision
4693 wide_ints which would buffer overflow digit_buffer.
4694 * stor-layout.cc (finish_bitfield_representative): For bit-fields
4695 with BITINT_TYPE, prefer representatives with precisions in
4696 multiple of limb precision.
4697 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
4698 element type and assert it is BITINT_TYPE.
4699 * target.def (bitint_type_info): New C target hook.
4700 * target.h (struct bitint_info): New type.
4701 * targhooks.cc (default_bitint_type_info): New function.
4702 * targhooks.h (default_bitint_type_info): Declare.
4703 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
4704 Handle printing large wide_ints which would buffer overflow
4706 * tree-ssa-sccvn.cc: Include target.h.
4707 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
4709 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
4710 64-bit BITINT_TYPE subtract low bound from expression and cast to
4711 64-bit integer type both the controlling expression and case labels.
4712 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
4713 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
4714 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
4716 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
4717 unsigned_type_for rather than build_nonstandard_integer_type.
4719 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4722 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
4723 tieable for RVV modes.
4725 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4728 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
4730 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4732 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
4734 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
4736 * config/xtensa/xtensa.cc (xtensa_expand_scc):
4737 Add code for particular constants (only 0 and INT_MIN for now)
4738 for EQ/NE boolean evaluation in SImode.
4739 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
4740 implementation has been integrated into the above.
4742 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
4745 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
4747 (*pred_widen_mulsu<mode>): Delete.
4748 (*pred_single_widen_mul<mode>): Delete.
4749 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
4750 Add new combine patterns.
4751 (*single_widen_sub<any_extend:su><mode>): Ditto.
4752 (*single_widen_add<any_extend:su><mode>): Ditto.
4753 (*single_widen_mult<any_extend:su><mode>): Ditto.
4754 (*dual_widen_mulsu<mode>): Ditto.
4755 (*dual_widen_mulus<mode>): Ditto.
4756 (*dual_widen_<optab><mode>): Ditto.
4757 (*single_widen_add<mode>): Ditto.
4758 (*single_widen_sub<mode>): Ditto.
4759 (*single_widen_mult<mode>): Ditto.
4760 * config/riscv/autovec.md (<optab><mode>3):
4761 Change define_expand to define_insn_and_split.
4762 (<optab><mode>2): Ditto.
4763 (abs<mode>2): Ditto.
4764 (smul<mode>3_highpart): Ditto.
4765 (umul<mode>3_highpart): Ditto.
4767 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
4769 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
4770 (riscv_asm_output_alias): Ditto.
4771 (riscv_asm_output_external): Ditto.
4772 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
4773 Output .variant_cc directive for vector function.
4774 (riscv_declare_function_name): Ditto.
4775 (riscv_asm_output_alias): Ditto.
4776 (riscv_asm_output_external): Ditto.
4777 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
4778 Implement ASM_DECLARE_FUNCTION_NAME.
4779 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
4780 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
4782 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
4784 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
4785 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
4786 (riscv_frame_info::reset): Reset new fileds.
4787 (riscv_call_tls_get_addr): Pass riscv_cc.
4788 (riscv_function_arg): Return riscv_cc for call patterm.
4789 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
4790 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
4791 (riscv_save_reg_p): Add vector callee-saved check.
4792 (riscv_stack_align): Add vector save area comment.
4793 (riscv_compute_frame_info): Ditto.
4794 (riscv_restore_reg): Update for type change.
4795 (riscv_for_each_saved_v_reg): New function save vector registers.
4796 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
4797 (riscv_expand_prologue): Ditto.
4798 (riscv_expand_epilogue): Ditto.
4799 (riscv_output_mi_thunk): Pass riscv_cc.
4800 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
4801 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
4802 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
4804 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
4806 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
4807 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
4808 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
4809 (riscv_init_cumulative_args): Setup variant_cc field.
4810 (riscv_vector_type_p): New function for checking vector type.
4811 (riscv_hard_regno_nregs): Hoist declare.
4812 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
4813 (riscv_get_arg_info): Support vector cc.
4814 (riscv_function_arg_advance): Update cum.
4815 (riscv_pass_by_reference): Handle vector args.
4816 (riscv_v_abi): New function return vector abi.
4817 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
4818 (riscv_arguments_is_vector_type_p): New function for check vector returns.
4819 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
4820 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
4821 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
4822 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
4823 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
4824 (V_ARG_FIRST): Ditto.
4825 (V_ARG_LAST): Ditto.
4826 (enum riscv_cc): Define all RISCV_CC variants.
4827 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
4829 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
4831 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
4832 Add sqrt + vcond_mask combine pattern.
4833 * config/riscv/autovec.md (<optab><mode>2):
4834 Change define_expand to define_insn_and_split.
4836 2023-09-06 Jason Merrill <jason@redhat.com>
4838 * common.opt: Update -fabi-version=19.
4840 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
4842 * config/riscv/zicond.md: Add closing parent to a comment.
4844 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
4846 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
4847 large constant cons/alt into a register.
4849 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
4851 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
4852 require one zero bit in the upper 32 bits for LI+RORI synthesis.
4854 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
4856 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
4858 2023-09-05 Andrew Pinski <apinski@marvell.com>
4860 PR tree-optimization/98710
4861 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
4862 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
4864 2023-09-05 Andrew Pinski <apinski@marvell.com>
4866 PR tree-optimization/103536
4867 * match.pd (`(x | y) & (x & z)`,
4868 `(x & y) | (x | z)`): New patterns.
4870 2023-09-05 Andrew Pinski <apinski@marvell.com>
4872 PR tree-optimization/107137
4873 * match.pd (`(nop_convert)-(convert)a`): New pattern.
4875 2023-09-05 Andrew Pinski <apinski@marvell.com>
4877 PR tree-optimization/96694
4878 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
4880 2023-09-05 Andrew Pinski <apinski@marvell.com>
4882 PR tree-optimization/105832
4883 * match.pd (`(1 >> X) != 0`): New pattern
4885 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
4887 * config/riscv/riscv.md: Update/Add types
4889 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
4891 * config/riscv/pic.md: Update types
4893 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
4895 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
4896 synthesis with rotate-right for XTheadBb.
4898 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
4900 * config/riscv/zicond.md: Fix op2 pattern.
4902 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
4904 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
4906 2023-09-05 Xi Ruoyao <xry111@xry111.site>
4908 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
4909 Define to 0 if not defined yet.
4911 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
4913 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
4914 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
4916 2023-09-05 Pan Li <pan2.li@intel.com>
4918 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
4919 * config/riscv/vector.md: Extend iterator for VLS.
4921 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
4923 * config.gcc: Export the header file lasxintrin.h.
4924 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
4925 Add Loongson ASX builtin functions support.
4927 (LASX_BUILTIN): Ditto.
4928 (LASX_NO_TARGET_BUILTIN): Ditto.
4929 (LASX_BUILTIN_TEST_BRANCH): Ditto.
4930 (CODE_FOR_lasx_xvsadd_b): Ditto.
4931 (CODE_FOR_lasx_xvsadd_h): Ditto.
4932 (CODE_FOR_lasx_xvsadd_w): Ditto.
4933 (CODE_FOR_lasx_xvsadd_d): Ditto.
4934 (CODE_FOR_lasx_xvsadd_bu): Ditto.
4935 (CODE_FOR_lasx_xvsadd_hu): Ditto.
4936 (CODE_FOR_lasx_xvsadd_wu): Ditto.
4937 (CODE_FOR_lasx_xvsadd_du): Ditto.
4938 (CODE_FOR_lasx_xvadd_b): Ditto.
4939 (CODE_FOR_lasx_xvadd_h): Ditto.
4940 (CODE_FOR_lasx_xvadd_w): Ditto.
4941 (CODE_FOR_lasx_xvadd_d): Ditto.
4942 (CODE_FOR_lasx_xvaddi_bu): Ditto.
4943 (CODE_FOR_lasx_xvaddi_hu): Ditto.
4944 (CODE_FOR_lasx_xvaddi_wu): Ditto.
4945 (CODE_FOR_lasx_xvaddi_du): Ditto.
4946 (CODE_FOR_lasx_xvand_v): Ditto.
4947 (CODE_FOR_lasx_xvandi_b): Ditto.
4948 (CODE_FOR_lasx_xvbitsel_v): Ditto.
4949 (CODE_FOR_lasx_xvseqi_b): Ditto.
4950 (CODE_FOR_lasx_xvseqi_h): Ditto.
4951 (CODE_FOR_lasx_xvseqi_w): Ditto.
4952 (CODE_FOR_lasx_xvseqi_d): Ditto.
4953 (CODE_FOR_lasx_xvslti_b): Ditto.
4954 (CODE_FOR_lasx_xvslti_h): Ditto.
4955 (CODE_FOR_lasx_xvslti_w): Ditto.
4956 (CODE_FOR_lasx_xvslti_d): Ditto.
4957 (CODE_FOR_lasx_xvslti_bu): Ditto.
4958 (CODE_FOR_lasx_xvslti_hu): Ditto.
4959 (CODE_FOR_lasx_xvslti_wu): Ditto.
4960 (CODE_FOR_lasx_xvslti_du): Ditto.
4961 (CODE_FOR_lasx_xvslei_b): Ditto.
4962 (CODE_FOR_lasx_xvslei_h): Ditto.
4963 (CODE_FOR_lasx_xvslei_w): Ditto.
4964 (CODE_FOR_lasx_xvslei_d): Ditto.
4965 (CODE_FOR_lasx_xvslei_bu): Ditto.
4966 (CODE_FOR_lasx_xvslei_hu): Ditto.
4967 (CODE_FOR_lasx_xvslei_wu): Ditto.
4968 (CODE_FOR_lasx_xvslei_du): Ditto.
4969 (CODE_FOR_lasx_xvdiv_b): Ditto.
4970 (CODE_FOR_lasx_xvdiv_h): Ditto.
4971 (CODE_FOR_lasx_xvdiv_w): Ditto.
4972 (CODE_FOR_lasx_xvdiv_d): Ditto.
4973 (CODE_FOR_lasx_xvdiv_bu): Ditto.
4974 (CODE_FOR_lasx_xvdiv_hu): Ditto.
4975 (CODE_FOR_lasx_xvdiv_wu): Ditto.
4976 (CODE_FOR_lasx_xvdiv_du): Ditto.
4977 (CODE_FOR_lasx_xvfadd_s): Ditto.
4978 (CODE_FOR_lasx_xvfadd_d): Ditto.
4979 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
4980 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
4981 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
4982 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
4983 (CODE_FOR_lasx_xvffint_s_w): Ditto.
4984 (CODE_FOR_lasx_xvffint_d_l): Ditto.
4985 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
4986 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
4987 (CODE_FOR_lasx_xvfsub_s): Ditto.
4988 (CODE_FOR_lasx_xvfsub_d): Ditto.
4989 (CODE_FOR_lasx_xvfmul_s): Ditto.
4990 (CODE_FOR_lasx_xvfmul_d): Ditto.
4991 (CODE_FOR_lasx_xvfdiv_s): Ditto.
4992 (CODE_FOR_lasx_xvfdiv_d): Ditto.
4993 (CODE_FOR_lasx_xvfmax_s): Ditto.
4994 (CODE_FOR_lasx_xvfmax_d): Ditto.
4995 (CODE_FOR_lasx_xvfmin_s): Ditto.
4996 (CODE_FOR_lasx_xvfmin_d): Ditto.
4997 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
4998 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
4999 (CODE_FOR_lasx_xvflogb_s): Ditto.
5000 (CODE_FOR_lasx_xvflogb_d): Ditto.
5001 (CODE_FOR_lasx_xvmax_b): Ditto.
5002 (CODE_FOR_lasx_xvmax_h): Ditto.
5003 (CODE_FOR_lasx_xvmax_w): Ditto.
5004 (CODE_FOR_lasx_xvmax_d): Ditto.
5005 (CODE_FOR_lasx_xvmaxi_b): Ditto.
5006 (CODE_FOR_lasx_xvmaxi_h): Ditto.
5007 (CODE_FOR_lasx_xvmaxi_w): Ditto.
5008 (CODE_FOR_lasx_xvmaxi_d): Ditto.
5009 (CODE_FOR_lasx_xvmax_bu): Ditto.
5010 (CODE_FOR_lasx_xvmax_hu): Ditto.
5011 (CODE_FOR_lasx_xvmax_wu): Ditto.
5012 (CODE_FOR_lasx_xvmax_du): Ditto.
5013 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
5014 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
5015 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
5016 (CODE_FOR_lasx_xvmaxi_du): Ditto.
5017 (CODE_FOR_lasx_xvmin_b): Ditto.
5018 (CODE_FOR_lasx_xvmin_h): Ditto.
5019 (CODE_FOR_lasx_xvmin_w): Ditto.
5020 (CODE_FOR_lasx_xvmin_d): Ditto.
5021 (CODE_FOR_lasx_xvmini_b): Ditto.
5022 (CODE_FOR_lasx_xvmini_h): Ditto.
5023 (CODE_FOR_lasx_xvmini_w): Ditto.
5024 (CODE_FOR_lasx_xvmini_d): Ditto.
5025 (CODE_FOR_lasx_xvmin_bu): Ditto.
5026 (CODE_FOR_lasx_xvmin_hu): Ditto.
5027 (CODE_FOR_lasx_xvmin_wu): Ditto.
5028 (CODE_FOR_lasx_xvmin_du): Ditto.
5029 (CODE_FOR_lasx_xvmini_bu): Ditto.
5030 (CODE_FOR_lasx_xvmini_hu): Ditto.
5031 (CODE_FOR_lasx_xvmini_wu): Ditto.
5032 (CODE_FOR_lasx_xvmini_du): Ditto.
5033 (CODE_FOR_lasx_xvmod_b): Ditto.
5034 (CODE_FOR_lasx_xvmod_h): Ditto.
5035 (CODE_FOR_lasx_xvmod_w): Ditto.
5036 (CODE_FOR_lasx_xvmod_d): Ditto.
5037 (CODE_FOR_lasx_xvmod_bu): Ditto.
5038 (CODE_FOR_lasx_xvmod_hu): Ditto.
5039 (CODE_FOR_lasx_xvmod_wu): Ditto.
5040 (CODE_FOR_lasx_xvmod_du): Ditto.
5041 (CODE_FOR_lasx_xvmul_b): Ditto.
5042 (CODE_FOR_lasx_xvmul_h): Ditto.
5043 (CODE_FOR_lasx_xvmul_w): Ditto.
5044 (CODE_FOR_lasx_xvmul_d): Ditto.
5045 (CODE_FOR_lasx_xvclz_b): Ditto.
5046 (CODE_FOR_lasx_xvclz_h): Ditto.
5047 (CODE_FOR_lasx_xvclz_w): Ditto.
5048 (CODE_FOR_lasx_xvclz_d): Ditto.
5049 (CODE_FOR_lasx_xvnor_v): Ditto.
5050 (CODE_FOR_lasx_xvor_v): Ditto.
5051 (CODE_FOR_lasx_xvori_b): Ditto.
5052 (CODE_FOR_lasx_xvnori_b): Ditto.
5053 (CODE_FOR_lasx_xvpcnt_b): Ditto.
5054 (CODE_FOR_lasx_xvpcnt_h): Ditto.
5055 (CODE_FOR_lasx_xvpcnt_w): Ditto.
5056 (CODE_FOR_lasx_xvpcnt_d): Ditto.
5057 (CODE_FOR_lasx_xvxor_v): Ditto.
5058 (CODE_FOR_lasx_xvxori_b): Ditto.
5059 (CODE_FOR_lasx_xvsll_b): Ditto.
5060 (CODE_FOR_lasx_xvsll_h): Ditto.
5061 (CODE_FOR_lasx_xvsll_w): Ditto.
5062 (CODE_FOR_lasx_xvsll_d): Ditto.
5063 (CODE_FOR_lasx_xvslli_b): Ditto.
5064 (CODE_FOR_lasx_xvslli_h): Ditto.
5065 (CODE_FOR_lasx_xvslli_w): Ditto.
5066 (CODE_FOR_lasx_xvslli_d): Ditto.
5067 (CODE_FOR_lasx_xvsra_b): Ditto.
5068 (CODE_FOR_lasx_xvsra_h): Ditto.
5069 (CODE_FOR_lasx_xvsra_w): Ditto.
5070 (CODE_FOR_lasx_xvsra_d): Ditto.
5071 (CODE_FOR_lasx_xvsrai_b): Ditto.
5072 (CODE_FOR_lasx_xvsrai_h): Ditto.
5073 (CODE_FOR_lasx_xvsrai_w): Ditto.
5074 (CODE_FOR_lasx_xvsrai_d): Ditto.
5075 (CODE_FOR_lasx_xvsrl_b): Ditto.
5076 (CODE_FOR_lasx_xvsrl_h): Ditto.
5077 (CODE_FOR_lasx_xvsrl_w): Ditto.
5078 (CODE_FOR_lasx_xvsrl_d): Ditto.
5079 (CODE_FOR_lasx_xvsrli_b): Ditto.
5080 (CODE_FOR_lasx_xvsrli_h): Ditto.
5081 (CODE_FOR_lasx_xvsrli_w): Ditto.
5082 (CODE_FOR_lasx_xvsrli_d): Ditto.
5083 (CODE_FOR_lasx_xvsub_b): Ditto.
5084 (CODE_FOR_lasx_xvsub_h): Ditto.
5085 (CODE_FOR_lasx_xvsub_w): Ditto.
5086 (CODE_FOR_lasx_xvsub_d): Ditto.
5087 (CODE_FOR_lasx_xvsubi_bu): Ditto.
5088 (CODE_FOR_lasx_xvsubi_hu): Ditto.
5089 (CODE_FOR_lasx_xvsubi_wu): Ditto.
5090 (CODE_FOR_lasx_xvsubi_du): Ditto.
5091 (CODE_FOR_lasx_xvpackod_d): Ditto.
5092 (CODE_FOR_lasx_xvpackev_d): Ditto.
5093 (CODE_FOR_lasx_xvpickod_d): Ditto.
5094 (CODE_FOR_lasx_xvpickev_d): Ditto.
5095 (CODE_FOR_lasx_xvrepli_b): Ditto.
5096 (CODE_FOR_lasx_xvrepli_h): Ditto.
5097 (CODE_FOR_lasx_xvrepli_w): Ditto.
5098 (CODE_FOR_lasx_xvrepli_d): Ditto.
5099 (CODE_FOR_lasx_xvandn_v): Ditto.
5100 (CODE_FOR_lasx_xvorn_v): Ditto.
5101 (CODE_FOR_lasx_xvneg_b): Ditto.
5102 (CODE_FOR_lasx_xvneg_h): Ditto.
5103 (CODE_FOR_lasx_xvneg_w): Ditto.
5104 (CODE_FOR_lasx_xvneg_d): Ditto.
5105 (CODE_FOR_lasx_xvbsrl_v): Ditto.
5106 (CODE_FOR_lasx_xvbsll_v): Ditto.
5107 (CODE_FOR_lasx_xvfmadd_s): Ditto.
5108 (CODE_FOR_lasx_xvfmadd_d): Ditto.
5109 (CODE_FOR_lasx_xvfmsub_s): Ditto.
5110 (CODE_FOR_lasx_xvfmsub_d): Ditto.
5111 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
5112 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
5113 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
5114 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
5115 (CODE_FOR_lasx_xvpermi_q): Ditto.
5116 (CODE_FOR_lasx_xvpermi_d): Ditto.
5117 (CODE_FOR_lasx_xbnz_v): Ditto.
5118 (CODE_FOR_lasx_xbz_v): Ditto.
5119 (CODE_FOR_lasx_xvssub_b): Ditto.
5120 (CODE_FOR_lasx_xvssub_h): Ditto.
5121 (CODE_FOR_lasx_xvssub_w): Ditto.
5122 (CODE_FOR_lasx_xvssub_d): Ditto.
5123 (CODE_FOR_lasx_xvssub_bu): Ditto.
5124 (CODE_FOR_lasx_xvssub_hu): Ditto.
5125 (CODE_FOR_lasx_xvssub_wu): Ditto.
5126 (CODE_FOR_lasx_xvssub_du): Ditto.
5127 (CODE_FOR_lasx_xvabsd_b): Ditto.
5128 (CODE_FOR_lasx_xvabsd_h): Ditto.
5129 (CODE_FOR_lasx_xvabsd_w): Ditto.
5130 (CODE_FOR_lasx_xvabsd_d): Ditto.
5131 (CODE_FOR_lasx_xvabsd_bu): Ditto.
5132 (CODE_FOR_lasx_xvabsd_hu): Ditto.
5133 (CODE_FOR_lasx_xvabsd_wu): Ditto.
5134 (CODE_FOR_lasx_xvabsd_du): Ditto.
5135 (CODE_FOR_lasx_xvavg_b): Ditto.
5136 (CODE_FOR_lasx_xvavg_h): Ditto.
5137 (CODE_FOR_lasx_xvavg_w): Ditto.
5138 (CODE_FOR_lasx_xvavg_d): Ditto.
5139 (CODE_FOR_lasx_xvavg_bu): Ditto.
5140 (CODE_FOR_lasx_xvavg_hu): Ditto.
5141 (CODE_FOR_lasx_xvavg_wu): Ditto.
5142 (CODE_FOR_lasx_xvavg_du): Ditto.
5143 (CODE_FOR_lasx_xvavgr_b): Ditto.
5144 (CODE_FOR_lasx_xvavgr_h): Ditto.
5145 (CODE_FOR_lasx_xvavgr_w): Ditto.
5146 (CODE_FOR_lasx_xvavgr_d): Ditto.
5147 (CODE_FOR_lasx_xvavgr_bu): Ditto.
5148 (CODE_FOR_lasx_xvavgr_hu): Ditto.
5149 (CODE_FOR_lasx_xvavgr_wu): Ditto.
5150 (CODE_FOR_lasx_xvavgr_du): Ditto.
5151 (CODE_FOR_lasx_xvmuh_b): Ditto.
5152 (CODE_FOR_lasx_xvmuh_h): Ditto.
5153 (CODE_FOR_lasx_xvmuh_w): Ditto.
5154 (CODE_FOR_lasx_xvmuh_d): Ditto.
5155 (CODE_FOR_lasx_xvmuh_bu): Ditto.
5156 (CODE_FOR_lasx_xvmuh_hu): Ditto.
5157 (CODE_FOR_lasx_xvmuh_wu): Ditto.
5158 (CODE_FOR_lasx_xvmuh_du): Ditto.
5159 (CODE_FOR_lasx_xvssran_b_h): Ditto.
5160 (CODE_FOR_lasx_xvssran_h_w): Ditto.
5161 (CODE_FOR_lasx_xvssran_w_d): Ditto.
5162 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
5163 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
5164 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
5165 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
5166 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
5167 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
5168 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
5169 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
5170 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
5171 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
5172 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
5173 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
5174 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
5175 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
5176 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
5177 (CODE_FOR_lasx_xvftint_w_s): Ditto.
5178 (CODE_FOR_lasx_xvftint_l_d): Ditto.
5179 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
5180 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
5181 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
5182 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
5183 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
5184 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
5185 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
5186 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
5187 (CODE_FOR_lasx_xvsat_b): Ditto.
5188 (CODE_FOR_lasx_xvsat_h): Ditto.
5189 (CODE_FOR_lasx_xvsat_w): Ditto.
5190 (CODE_FOR_lasx_xvsat_d): Ditto.
5191 (CODE_FOR_lasx_xvsat_bu): Ditto.
5192 (CODE_FOR_lasx_xvsat_hu): Ditto.
5193 (CODE_FOR_lasx_xvsat_wu): Ditto.
5194 (CODE_FOR_lasx_xvsat_du): Ditto.
5195 (loongarch_builtin_vectorized_function): Ditto.
5196 (loongarch_expand_builtin_insn): Ditto.
5197 (loongarch_expand_builtin): Ditto.
5198 * config/loongarch/loongarch-ftypes.def (1): Ditto.
5202 * config/loongarch/lasxintrin.h: New file.
5204 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5206 * config/loongarch/loongarch-modes.def
5207 (VECTOR_MODES): Add Loongson ASX instruction support.
5208 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
5209 (loongarch_split_256bit_move_p): Ditto.
5210 (loongarch_expand_vector_group_init): Ditto.
5211 (loongarch_expand_vec_perm_1): Ditto.
5212 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
5213 (loongarch_valid_offset_p): Ditto.
5214 (loongarch_address_insns): Ditto.
5215 (loongarch_const_insns): Ditto.
5216 (loongarch_legitimize_move): Ditto.
5217 (loongarch_builtin_vectorization_cost): Ditto.
5218 (loongarch_split_move_p): Ditto.
5219 (loongarch_split_move): Ditto.
5220 (loongarch_output_move_index_float): Ditto.
5221 (loongarch_split_256bit_move_p): Ditto.
5222 (loongarch_split_256bit_move): Ditto.
5223 (loongarch_output_move): Ditto.
5224 (loongarch_print_operand_reloc): Ditto.
5225 (loongarch_print_operand): Ditto.
5226 (loongarch_hard_regno_mode_ok_uncached): Ditto.
5227 (loongarch_hard_regno_nregs): Ditto.
5228 (loongarch_class_max_nregs): Ditto.
5229 (loongarch_can_change_mode_class): Ditto.
5230 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
5231 (loongarch_vector_mode_supported_p): Ditto.
5232 (loongarch_preferred_simd_mode): Ditto.
5233 (loongarch_autovectorize_vector_modes): Ditto.
5234 (loongarch_lsx_output_division): Ditto.
5235 (loongarch_expand_lsx_shuffle): Ditto.
5236 (loongarch_expand_vec_perm): Ditto.
5237 (loongarch_expand_vec_perm_interleave): Ditto.
5238 (loongarch_try_expand_lsx_vshuf_const): Ditto.
5239 (loongarch_expand_vec_perm_even_odd_1): Ditto.
5240 (loongarch_expand_vec_perm_even_odd): Ditto.
5241 (loongarch_expand_vec_perm_1): Ditto.
5242 (loongarch_expand_vec_perm_const_2): Ditto.
5243 (loongarch_is_quad_duplicate): Ditto.
5244 (loongarch_is_double_duplicate): Ditto.
5245 (loongarch_is_odd_extraction): Ditto.
5246 (loongarch_is_even_extraction): Ditto.
5247 (loongarch_is_extraction_permutation): Ditto.
5248 (loongarch_is_center_extraction): Ditto.
5249 (loongarch_is_reversing_permutation): Ditto.
5250 (loongarch_is_di_misalign_extract): Ditto.
5251 (loongarch_is_si_misalign_extract): Ditto.
5252 (loongarch_is_lasx_lowpart_interleave): Ditto.
5253 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
5254 (COMPARE_SELECTOR): Ditto.
5255 (loongarch_is_lasx_lowpart_extract): Ditto.
5256 (loongarch_is_lasx_highpart_interleave): Ditto.
5257 (loongarch_is_lasx_highpart_interleave_2): Ditto.
5258 (loongarch_is_elem_duplicate): Ditto.
5259 (loongarch_is_op_reverse_perm): Ditto.
5260 (loongarch_is_single_op_perm): Ditto.
5261 (loongarch_is_divisible_perm): Ditto.
5262 (loongarch_is_triple_stride_extract): Ditto.
5263 (loongarch_vectorize_vec_perm_const): Ditto.
5264 (loongarch_cpu_sched_reassociation_width): Ditto.
5265 (loongarch_expand_vector_extract): Ditto.
5266 (emit_reduc_half): Ditto.
5267 (loongarch_expand_vec_unpack): Ditto.
5268 (loongarch_expand_vector_group_init): Ditto.
5269 (loongarch_expand_vector_init): Ditto.
5270 (loongarch_expand_lsx_cmp): Ditto.
5271 (loongarch_builtin_support_vector_misalignment): Ditto.
5272 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
5273 (BITS_PER_LASX_REG): Ditto.
5274 (STRUCTURE_SIZE_BOUNDARY): Ditto.
5275 (LASX_REG_FIRST): Ditto.
5276 (LASX_REG_LAST): Ditto.
5277 (LASX_REG_NUM): Ditto.
5278 (LASX_REG_P): Ditto.
5279 (LASX_REG_RTX_P): Ditto.
5280 (LASX_SUPPORTED_MODE_P): Ditto.
5281 * config/loongarch/loongarch.md: Ditto.
5282 * config/loongarch/lasx.md: New file.
5284 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5286 * config.gcc: Export the header file lsxintrin.h.
5287 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
5288 (enum loongarch_builtin_type): Ditto.
5290 (LARCH_BUILTIN): Ditto.
5291 (LSX_BUILTIN): Ditto.
5292 (LSX_BUILTIN_TEST_BRANCH): Ditto.
5293 (LSX_NO_TARGET_BUILTIN): Ditto.
5294 (CODE_FOR_lsx_vsadd_b): Ditto.
5295 (CODE_FOR_lsx_vsadd_h): Ditto.
5296 (CODE_FOR_lsx_vsadd_w): Ditto.
5297 (CODE_FOR_lsx_vsadd_d): Ditto.
5298 (CODE_FOR_lsx_vsadd_bu): Ditto.
5299 (CODE_FOR_lsx_vsadd_hu): Ditto.
5300 (CODE_FOR_lsx_vsadd_wu): Ditto.
5301 (CODE_FOR_lsx_vsadd_du): Ditto.
5302 (CODE_FOR_lsx_vadd_b): Ditto.
5303 (CODE_FOR_lsx_vadd_h): Ditto.
5304 (CODE_FOR_lsx_vadd_w): Ditto.
5305 (CODE_FOR_lsx_vadd_d): Ditto.
5306 (CODE_FOR_lsx_vaddi_bu): Ditto.
5307 (CODE_FOR_lsx_vaddi_hu): Ditto.
5308 (CODE_FOR_lsx_vaddi_wu): Ditto.
5309 (CODE_FOR_lsx_vaddi_du): Ditto.
5310 (CODE_FOR_lsx_vand_v): Ditto.
5311 (CODE_FOR_lsx_vandi_b): Ditto.
5312 (CODE_FOR_lsx_bnz_v): Ditto.
5313 (CODE_FOR_lsx_bz_v): Ditto.
5314 (CODE_FOR_lsx_vbitsel_v): Ditto.
5315 (CODE_FOR_lsx_vseqi_b): Ditto.
5316 (CODE_FOR_lsx_vseqi_h): Ditto.
5317 (CODE_FOR_lsx_vseqi_w): Ditto.
5318 (CODE_FOR_lsx_vseqi_d): Ditto.
5319 (CODE_FOR_lsx_vslti_b): Ditto.
5320 (CODE_FOR_lsx_vslti_h): Ditto.
5321 (CODE_FOR_lsx_vslti_w): Ditto.
5322 (CODE_FOR_lsx_vslti_d): Ditto.
5323 (CODE_FOR_lsx_vslti_bu): Ditto.
5324 (CODE_FOR_lsx_vslti_hu): Ditto.
5325 (CODE_FOR_lsx_vslti_wu): Ditto.
5326 (CODE_FOR_lsx_vslti_du): Ditto.
5327 (CODE_FOR_lsx_vslei_b): Ditto.
5328 (CODE_FOR_lsx_vslei_h): Ditto.
5329 (CODE_FOR_lsx_vslei_w): Ditto.
5330 (CODE_FOR_lsx_vslei_d): Ditto.
5331 (CODE_FOR_lsx_vslei_bu): Ditto.
5332 (CODE_FOR_lsx_vslei_hu): Ditto.
5333 (CODE_FOR_lsx_vslei_wu): Ditto.
5334 (CODE_FOR_lsx_vslei_du): Ditto.
5335 (CODE_FOR_lsx_vdiv_b): Ditto.
5336 (CODE_FOR_lsx_vdiv_h): Ditto.
5337 (CODE_FOR_lsx_vdiv_w): Ditto.
5338 (CODE_FOR_lsx_vdiv_d): Ditto.
5339 (CODE_FOR_lsx_vdiv_bu): Ditto.
5340 (CODE_FOR_lsx_vdiv_hu): Ditto.
5341 (CODE_FOR_lsx_vdiv_wu): Ditto.
5342 (CODE_FOR_lsx_vdiv_du): Ditto.
5343 (CODE_FOR_lsx_vfadd_s): Ditto.
5344 (CODE_FOR_lsx_vfadd_d): Ditto.
5345 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
5346 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
5347 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
5348 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
5349 (CODE_FOR_lsx_vffint_s_w): Ditto.
5350 (CODE_FOR_lsx_vffint_d_l): Ditto.
5351 (CODE_FOR_lsx_vffint_s_wu): Ditto.
5352 (CODE_FOR_lsx_vffint_d_lu): Ditto.
5353 (CODE_FOR_lsx_vfsub_s): Ditto.
5354 (CODE_FOR_lsx_vfsub_d): Ditto.
5355 (CODE_FOR_lsx_vfmul_s): Ditto.
5356 (CODE_FOR_lsx_vfmul_d): Ditto.
5357 (CODE_FOR_lsx_vfdiv_s): Ditto.
5358 (CODE_FOR_lsx_vfdiv_d): Ditto.
5359 (CODE_FOR_lsx_vfmax_s): Ditto.
5360 (CODE_FOR_lsx_vfmax_d): Ditto.
5361 (CODE_FOR_lsx_vfmin_s): Ditto.
5362 (CODE_FOR_lsx_vfmin_d): Ditto.
5363 (CODE_FOR_lsx_vfsqrt_s): Ditto.
5364 (CODE_FOR_lsx_vfsqrt_d): Ditto.
5365 (CODE_FOR_lsx_vflogb_s): Ditto.
5366 (CODE_FOR_lsx_vflogb_d): Ditto.
5367 (CODE_FOR_lsx_vmax_b): Ditto.
5368 (CODE_FOR_lsx_vmax_h): Ditto.
5369 (CODE_FOR_lsx_vmax_w): Ditto.
5370 (CODE_FOR_lsx_vmax_d): Ditto.
5371 (CODE_FOR_lsx_vmaxi_b): Ditto.
5372 (CODE_FOR_lsx_vmaxi_h): Ditto.
5373 (CODE_FOR_lsx_vmaxi_w): Ditto.
5374 (CODE_FOR_lsx_vmaxi_d): Ditto.
5375 (CODE_FOR_lsx_vmax_bu): Ditto.
5376 (CODE_FOR_lsx_vmax_hu): Ditto.
5377 (CODE_FOR_lsx_vmax_wu): Ditto.
5378 (CODE_FOR_lsx_vmax_du): Ditto.
5379 (CODE_FOR_lsx_vmaxi_bu): Ditto.
5380 (CODE_FOR_lsx_vmaxi_hu): Ditto.
5381 (CODE_FOR_lsx_vmaxi_wu): Ditto.
5382 (CODE_FOR_lsx_vmaxi_du): Ditto.
5383 (CODE_FOR_lsx_vmin_b): Ditto.
5384 (CODE_FOR_lsx_vmin_h): Ditto.
5385 (CODE_FOR_lsx_vmin_w): Ditto.
5386 (CODE_FOR_lsx_vmin_d): Ditto.
5387 (CODE_FOR_lsx_vmini_b): Ditto.
5388 (CODE_FOR_lsx_vmini_h): Ditto.
5389 (CODE_FOR_lsx_vmini_w): Ditto.
5390 (CODE_FOR_lsx_vmini_d): Ditto.
5391 (CODE_FOR_lsx_vmin_bu): Ditto.
5392 (CODE_FOR_lsx_vmin_hu): Ditto.
5393 (CODE_FOR_lsx_vmin_wu): Ditto.
5394 (CODE_FOR_lsx_vmin_du): Ditto.
5395 (CODE_FOR_lsx_vmini_bu): Ditto.
5396 (CODE_FOR_lsx_vmini_hu): Ditto.
5397 (CODE_FOR_lsx_vmini_wu): Ditto.
5398 (CODE_FOR_lsx_vmini_du): Ditto.
5399 (CODE_FOR_lsx_vmod_b): Ditto.
5400 (CODE_FOR_lsx_vmod_h): Ditto.
5401 (CODE_FOR_lsx_vmod_w): Ditto.
5402 (CODE_FOR_lsx_vmod_d): Ditto.
5403 (CODE_FOR_lsx_vmod_bu): Ditto.
5404 (CODE_FOR_lsx_vmod_hu): Ditto.
5405 (CODE_FOR_lsx_vmod_wu): Ditto.
5406 (CODE_FOR_lsx_vmod_du): Ditto.
5407 (CODE_FOR_lsx_vmul_b): Ditto.
5408 (CODE_FOR_lsx_vmul_h): Ditto.
5409 (CODE_FOR_lsx_vmul_w): Ditto.
5410 (CODE_FOR_lsx_vmul_d): Ditto.
5411 (CODE_FOR_lsx_vclz_b): Ditto.
5412 (CODE_FOR_lsx_vclz_h): Ditto.
5413 (CODE_FOR_lsx_vclz_w): Ditto.
5414 (CODE_FOR_lsx_vclz_d): Ditto.
5415 (CODE_FOR_lsx_vnor_v): Ditto.
5416 (CODE_FOR_lsx_vor_v): Ditto.
5417 (CODE_FOR_lsx_vori_b): Ditto.
5418 (CODE_FOR_lsx_vnori_b): Ditto.
5419 (CODE_FOR_lsx_vpcnt_b): Ditto.
5420 (CODE_FOR_lsx_vpcnt_h): Ditto.
5421 (CODE_FOR_lsx_vpcnt_w): Ditto.
5422 (CODE_FOR_lsx_vpcnt_d): Ditto.
5423 (CODE_FOR_lsx_vxor_v): Ditto.
5424 (CODE_FOR_lsx_vxori_b): Ditto.
5425 (CODE_FOR_lsx_vsll_b): Ditto.
5426 (CODE_FOR_lsx_vsll_h): Ditto.
5427 (CODE_FOR_lsx_vsll_w): Ditto.
5428 (CODE_FOR_lsx_vsll_d): Ditto.
5429 (CODE_FOR_lsx_vslli_b): Ditto.
5430 (CODE_FOR_lsx_vslli_h): Ditto.
5431 (CODE_FOR_lsx_vslli_w): Ditto.
5432 (CODE_FOR_lsx_vslli_d): Ditto.
5433 (CODE_FOR_lsx_vsra_b): Ditto.
5434 (CODE_FOR_lsx_vsra_h): Ditto.
5435 (CODE_FOR_lsx_vsra_w): Ditto.
5436 (CODE_FOR_lsx_vsra_d): Ditto.
5437 (CODE_FOR_lsx_vsrai_b): Ditto.
5438 (CODE_FOR_lsx_vsrai_h): Ditto.
5439 (CODE_FOR_lsx_vsrai_w): Ditto.
5440 (CODE_FOR_lsx_vsrai_d): Ditto.
5441 (CODE_FOR_lsx_vsrl_b): Ditto.
5442 (CODE_FOR_lsx_vsrl_h): Ditto.
5443 (CODE_FOR_lsx_vsrl_w): Ditto.
5444 (CODE_FOR_lsx_vsrl_d): Ditto.
5445 (CODE_FOR_lsx_vsrli_b): Ditto.
5446 (CODE_FOR_lsx_vsrli_h): Ditto.
5447 (CODE_FOR_lsx_vsrli_w): Ditto.
5448 (CODE_FOR_lsx_vsrli_d): Ditto.
5449 (CODE_FOR_lsx_vsub_b): Ditto.
5450 (CODE_FOR_lsx_vsub_h): Ditto.
5451 (CODE_FOR_lsx_vsub_w): Ditto.
5452 (CODE_FOR_lsx_vsub_d): Ditto.
5453 (CODE_FOR_lsx_vsubi_bu): Ditto.
5454 (CODE_FOR_lsx_vsubi_hu): Ditto.
5455 (CODE_FOR_lsx_vsubi_wu): Ditto.
5456 (CODE_FOR_lsx_vsubi_du): Ditto.
5457 (CODE_FOR_lsx_vpackod_d): Ditto.
5458 (CODE_FOR_lsx_vpackev_d): Ditto.
5459 (CODE_FOR_lsx_vpickod_d): Ditto.
5460 (CODE_FOR_lsx_vpickev_d): Ditto.
5461 (CODE_FOR_lsx_vrepli_b): Ditto.
5462 (CODE_FOR_lsx_vrepli_h): Ditto.
5463 (CODE_FOR_lsx_vrepli_w): Ditto.
5464 (CODE_FOR_lsx_vrepli_d): Ditto.
5465 (CODE_FOR_lsx_vsat_b): Ditto.
5466 (CODE_FOR_lsx_vsat_h): Ditto.
5467 (CODE_FOR_lsx_vsat_w): Ditto.
5468 (CODE_FOR_lsx_vsat_d): Ditto.
5469 (CODE_FOR_lsx_vsat_bu): Ditto.
5470 (CODE_FOR_lsx_vsat_hu): Ditto.
5471 (CODE_FOR_lsx_vsat_wu): Ditto.
5472 (CODE_FOR_lsx_vsat_du): Ditto.
5473 (CODE_FOR_lsx_vavg_b): Ditto.
5474 (CODE_FOR_lsx_vavg_h): Ditto.
5475 (CODE_FOR_lsx_vavg_w): Ditto.
5476 (CODE_FOR_lsx_vavg_d): Ditto.
5477 (CODE_FOR_lsx_vavg_bu): Ditto.
5478 (CODE_FOR_lsx_vavg_hu): Ditto.
5479 (CODE_FOR_lsx_vavg_wu): Ditto.
5480 (CODE_FOR_lsx_vavg_du): Ditto.
5481 (CODE_FOR_lsx_vavgr_b): Ditto.
5482 (CODE_FOR_lsx_vavgr_h): Ditto.
5483 (CODE_FOR_lsx_vavgr_w): Ditto.
5484 (CODE_FOR_lsx_vavgr_d): Ditto.
5485 (CODE_FOR_lsx_vavgr_bu): Ditto.
5486 (CODE_FOR_lsx_vavgr_hu): Ditto.
5487 (CODE_FOR_lsx_vavgr_wu): Ditto.
5488 (CODE_FOR_lsx_vavgr_du): Ditto.
5489 (CODE_FOR_lsx_vssub_b): Ditto.
5490 (CODE_FOR_lsx_vssub_h): Ditto.
5491 (CODE_FOR_lsx_vssub_w): Ditto.
5492 (CODE_FOR_lsx_vssub_d): Ditto.
5493 (CODE_FOR_lsx_vssub_bu): Ditto.
5494 (CODE_FOR_lsx_vssub_hu): Ditto.
5495 (CODE_FOR_lsx_vssub_wu): Ditto.
5496 (CODE_FOR_lsx_vssub_du): Ditto.
5497 (CODE_FOR_lsx_vabsd_b): Ditto.
5498 (CODE_FOR_lsx_vabsd_h): Ditto.
5499 (CODE_FOR_lsx_vabsd_w): Ditto.
5500 (CODE_FOR_lsx_vabsd_d): Ditto.
5501 (CODE_FOR_lsx_vabsd_bu): Ditto.
5502 (CODE_FOR_lsx_vabsd_hu): Ditto.
5503 (CODE_FOR_lsx_vabsd_wu): Ditto.
5504 (CODE_FOR_lsx_vabsd_du): Ditto.
5505 (CODE_FOR_lsx_vftint_w_s): Ditto.
5506 (CODE_FOR_lsx_vftint_l_d): Ditto.
5507 (CODE_FOR_lsx_vftint_wu_s): Ditto.
5508 (CODE_FOR_lsx_vftint_lu_d): Ditto.
5509 (CODE_FOR_lsx_vandn_v): Ditto.
5510 (CODE_FOR_lsx_vorn_v): Ditto.
5511 (CODE_FOR_lsx_vneg_b): Ditto.
5512 (CODE_FOR_lsx_vneg_h): Ditto.
5513 (CODE_FOR_lsx_vneg_w): Ditto.
5514 (CODE_FOR_lsx_vneg_d): Ditto.
5515 (CODE_FOR_lsx_vshuf4i_d): Ditto.
5516 (CODE_FOR_lsx_vbsrl_v): Ditto.
5517 (CODE_FOR_lsx_vbsll_v): Ditto.
5518 (CODE_FOR_lsx_vfmadd_s): Ditto.
5519 (CODE_FOR_lsx_vfmadd_d): Ditto.
5520 (CODE_FOR_lsx_vfmsub_s): Ditto.
5521 (CODE_FOR_lsx_vfmsub_d): Ditto.
5522 (CODE_FOR_lsx_vfnmadd_s): Ditto.
5523 (CODE_FOR_lsx_vfnmadd_d): Ditto.
5524 (CODE_FOR_lsx_vfnmsub_s): Ditto.
5525 (CODE_FOR_lsx_vfnmsub_d): Ditto.
5526 (CODE_FOR_lsx_vmuh_b): Ditto.
5527 (CODE_FOR_lsx_vmuh_h): Ditto.
5528 (CODE_FOR_lsx_vmuh_w): Ditto.
5529 (CODE_FOR_lsx_vmuh_d): Ditto.
5530 (CODE_FOR_lsx_vmuh_bu): Ditto.
5531 (CODE_FOR_lsx_vmuh_hu): Ditto.
5532 (CODE_FOR_lsx_vmuh_wu): Ditto.
5533 (CODE_FOR_lsx_vmuh_du): Ditto.
5534 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
5535 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
5536 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
5537 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
5538 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
5539 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
5540 (CODE_FOR_lsx_vssran_b_h): Ditto.
5541 (CODE_FOR_lsx_vssran_h_w): Ditto.
5542 (CODE_FOR_lsx_vssran_w_d): Ditto.
5543 (CODE_FOR_lsx_vssran_bu_h): Ditto.
5544 (CODE_FOR_lsx_vssran_hu_w): Ditto.
5545 (CODE_FOR_lsx_vssran_wu_d): Ditto.
5546 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
5547 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
5548 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
5549 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
5550 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
5551 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
5552 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
5553 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
5554 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
5555 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
5556 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
5557 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
5558 (loongarch_builtin_vector_type): Ditto.
5559 (loongarch_build_cvpointer_type): Ditto.
5560 (LARCH_ATYPE_CVPOINTER): Ditto.
5561 (LARCH_ATYPE_BOOLEAN): Ditto.
5562 (LARCH_ATYPE_V2SF): Ditto.
5563 (LARCH_ATYPE_V2HI): Ditto.
5564 (LARCH_ATYPE_V2SI): Ditto.
5565 (LARCH_ATYPE_V4QI): Ditto.
5566 (LARCH_ATYPE_V4HI): Ditto.
5567 (LARCH_ATYPE_V8QI): Ditto.
5568 (LARCH_ATYPE_V2DI): Ditto.
5569 (LARCH_ATYPE_V4SI): Ditto.
5570 (LARCH_ATYPE_V8HI): Ditto.
5571 (LARCH_ATYPE_V16QI): Ditto.
5572 (LARCH_ATYPE_V2DF): Ditto.
5573 (LARCH_ATYPE_V4SF): Ditto.
5574 (LARCH_ATYPE_V4DI): Ditto.
5575 (LARCH_ATYPE_V8SI): Ditto.
5576 (LARCH_ATYPE_V16HI): Ditto.
5577 (LARCH_ATYPE_V32QI): Ditto.
5578 (LARCH_ATYPE_V4DF): Ditto.
5579 (LARCH_ATYPE_V8SF): Ditto.
5580 (LARCH_ATYPE_UV2DI): Ditto.
5581 (LARCH_ATYPE_UV4SI): Ditto.
5582 (LARCH_ATYPE_UV8HI): Ditto.
5583 (LARCH_ATYPE_UV16QI): Ditto.
5584 (LARCH_ATYPE_UV4DI): Ditto.
5585 (LARCH_ATYPE_UV8SI): Ditto.
5586 (LARCH_ATYPE_UV16HI): Ditto.
5587 (LARCH_ATYPE_UV32QI): Ditto.
5588 (LARCH_ATYPE_UV2SI): Ditto.
5589 (LARCH_ATYPE_UV4HI): Ditto.
5590 (LARCH_ATYPE_UV8QI): Ditto.
5591 (loongarch_builtin_vectorized_function): Ditto.
5592 (LARCH_GET_BUILTIN): Ditto.
5593 (loongarch_expand_builtin_insn): Ditto.
5594 (loongarch_expand_builtin_lsx_test_branch): Ditto.
5595 (loongarch_expand_builtin): Ditto.
5596 * config/loongarch/loongarch-ftypes.def (1): Ditto.
5600 * config/loongarch/lsxintrin.h: New file.
5602 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5604 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
5624 * config/loongarch/genopts/loongarch.opt.in: Ditto.
5625 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
5626 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
5627 (VECTOR_MODE): Ditto.
5629 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
5630 (loongarch_split_move_insn): Ditto.
5631 (loongarch_split_128bit_move): Ditto.
5632 (loongarch_split_128bit_move_p): Ditto.
5633 (loongarch_split_lsx_copy_d): Ditto.
5634 (loongarch_split_lsx_insert_d): Ditto.
5635 (loongarch_split_lsx_fill_d): Ditto.
5636 (loongarch_expand_vec_cmp): Ditto.
5637 (loongarch_const_vector_same_val_p): Ditto.
5638 (loongarch_const_vector_same_bytes_p): Ditto.
5639 (loongarch_const_vector_same_int_p): Ditto.
5640 (loongarch_const_vector_shuffle_set_p): Ditto.
5641 (loongarch_const_vector_bitimm_set_p): Ditto.
5642 (loongarch_const_vector_bitimm_clr_p): Ditto.
5643 (loongarch_lsx_vec_parallel_const_half): Ditto.
5644 (loongarch_gen_const_int_vector): Ditto.
5645 (loongarch_lsx_output_division): Ditto.
5646 (loongarch_expand_vector_init): Ditto.
5647 (loongarch_expand_vec_unpack): Ditto.
5648 (loongarch_expand_vec_perm): Ditto.
5649 (loongarch_expand_vector_extract): Ditto.
5650 (loongarch_expand_vector_reduc): Ditto.
5651 (loongarch_ldst_scaled_shift): Ditto.
5652 (loongarch_expand_vec_cond_expr): Ditto.
5653 (loongarch_expand_vec_cond_mask_expr): Ditto.
5654 (loongarch_builtin_vectorized_function): Ditto.
5655 (loongarch_gen_const_int_vector_shuffle): Ditto.
5656 (loongarch_build_signbit_mask): Ditto.
5657 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
5658 (loongarch_setup_incoming_varargs): Ditto.
5659 (loongarch_emit_move): Ditto.
5660 (loongarch_const_vector_bitimm_set_p): Ditto.
5661 (loongarch_const_vector_bitimm_clr_p): Ditto.
5662 (loongarch_const_vector_same_val_p): Ditto.
5663 (loongarch_const_vector_same_bytes_p): Ditto.
5664 (loongarch_const_vector_same_int_p): Ditto.
5665 (loongarch_const_vector_shuffle_set_p): Ditto.
5666 (loongarch_symbol_insns): Ditto.
5667 (loongarch_cannot_force_const_mem): Ditto.
5668 (loongarch_valid_offset_p): Ditto.
5669 (loongarch_valid_index_p): Ditto.
5670 (loongarch_classify_address): Ditto.
5671 (loongarch_address_insns): Ditto.
5672 (loongarch_ldst_scaled_shift): Ditto.
5673 (loongarch_const_insns): Ditto.
5674 (loongarch_split_move_insn_p): Ditto.
5675 (loongarch_subword_at_byte): Ditto.
5676 (loongarch_legitimize_move): Ditto.
5677 (loongarch_builtin_vectorization_cost): Ditto.
5678 (loongarch_split_move_p): Ditto.
5679 (loongarch_split_move): Ditto.
5680 (loongarch_split_move_insn): Ditto.
5681 (loongarch_output_move_index_float): Ditto.
5682 (loongarch_split_128bit_move_p): Ditto.
5683 (loongarch_split_128bit_move): Ditto.
5684 (loongarch_split_lsx_copy_d): Ditto.
5685 (loongarch_split_lsx_insert_d): Ditto.
5686 (loongarch_split_lsx_fill_d): Ditto.
5687 (loongarch_output_move): Ditto.
5688 (loongarch_extend_comparands): Ditto.
5689 (loongarch_print_operand_reloc): Ditto.
5690 (loongarch_print_operand): Ditto.
5691 (loongarch_hard_regno_mode_ok_uncached): Ditto.
5692 (loongarch_hard_regno_call_part_clobbered): Ditto.
5693 (loongarch_hard_regno_nregs): Ditto.
5694 (loongarch_class_max_nregs): Ditto.
5695 (loongarch_can_change_mode_class): Ditto.
5696 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
5697 (loongarch_secondary_reload): Ditto.
5698 (loongarch_vector_mode_supported_p): Ditto.
5699 (loongarch_preferred_simd_mode): Ditto.
5700 (loongarch_autovectorize_vector_modes): Ditto.
5701 (loongarch_lsx_output_division): Ditto.
5702 (loongarch_option_override_internal): Ditto.
5703 (loongarch_hard_regno_caller_save_mode): Ditto.
5704 (MAX_VECT_LEN): Ditto.
5705 (loongarch_spill_class): Ditto.
5706 (struct expand_vec_perm_d): Ditto.
5707 (loongarch_promote_function_mode): Ditto.
5708 (loongarch_expand_vselect): Ditto.
5709 (loongarch_starting_frame_offset): Ditto.
5710 (loongarch_expand_vselect_vconcat): Ditto.
5711 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
5712 (TARGET_OPTION_OVERRIDE): Ditto.
5713 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
5714 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
5715 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
5716 (loongarch_expand_lsx_shuffle): Ditto.
5717 (TARGET_SCHED_INIT): Ditto.
5718 (TARGET_SCHED_REORDER): Ditto.
5719 (TARGET_SCHED_REORDER2): Ditto.
5720 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
5721 (TARGET_SCHED_ADJUST_COST): Ditto.
5722 (TARGET_SCHED_ISSUE_RATE): Ditto.
5723 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
5724 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
5725 (TARGET_VALID_POINTER_MODE): Ditto.
5726 (TARGET_REGISTER_MOVE_COST): Ditto.
5727 (TARGET_MEMORY_MOVE_COST): Ditto.
5728 (TARGET_RTX_COSTS): Ditto.
5729 (TARGET_ADDRESS_COST): Ditto.
5730 (TARGET_IN_SMALL_DATA_P): Ditto.
5731 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
5732 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
5733 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
5734 (loongarch_expand_vec_perm): Ditto.
5735 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
5736 (TARGET_RETURN_IN_MEMORY): Ditto.
5737 (TARGET_FUNCTION_VALUE): Ditto.
5738 (TARGET_LIBCALL_VALUE): Ditto.
5739 (loongarch_try_expand_lsx_vshuf_const): Ditto.
5740 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
5741 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
5742 (TARGET_PRINT_OPERAND): Ditto.
5743 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
5744 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
5745 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
5746 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
5747 (TARGET_MUST_PASS_IN_STACK): Ditto.
5748 (TARGET_PASS_BY_REFERENCE): Ditto.
5749 (TARGET_ARG_PARTIAL_BYTES): Ditto.
5750 (TARGET_FUNCTION_ARG): Ditto.
5751 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
5752 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
5753 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
5754 (TARGET_INIT_BUILTINS): Ditto.
5755 (loongarch_expand_vec_perm_const_1): Ditto.
5756 (loongarch_expand_vec_perm_const_2): Ditto.
5757 (loongarch_vectorize_vec_perm_const): Ditto.
5758 (loongarch_cpu_sched_reassociation_width): Ditto.
5759 (loongarch_sched_reassociation_width): Ditto.
5760 (loongarch_expand_vector_extract): Ditto.
5761 (emit_reduc_half): Ditto.
5762 (loongarch_expand_vector_reduc): Ditto.
5763 (loongarch_expand_vec_unpack): Ditto.
5764 (loongarch_lsx_vec_parallel_const_half): Ditto.
5765 (loongarch_constant_elt_p): Ditto.
5766 (loongarch_gen_const_int_vector_shuffle): Ditto.
5767 (loongarch_expand_vector_init): Ditto.
5768 (loongarch_expand_lsx_cmp): Ditto.
5769 (loongarch_expand_vec_cond_expr): Ditto.
5770 (loongarch_expand_vec_cond_mask_expr): Ditto.
5771 (loongarch_expand_vec_cmp): Ditto.
5772 (loongarch_case_values_threshold): Ditto.
5773 (loongarch_build_const_vector): Ditto.
5774 (loongarch_build_signbit_mask): Ditto.
5775 (loongarch_builtin_support_vector_misalignment): Ditto.
5776 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
5777 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
5778 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
5779 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
5780 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
5781 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
5782 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
5783 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
5784 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
5785 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
5786 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
5787 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
5788 (UNITS_PER_LSX_REG): Ditto.
5789 (BITS_PER_LSX_REG): Ditto.
5790 (BIGGEST_ALIGNMENT): Ditto.
5791 (LSX_REG_FIRST): Ditto.
5792 (LSX_REG_LAST): Ditto.
5793 (LSX_REG_NUM): Ditto.
5795 (LSX_REG_RTX_P): Ditto.
5796 (IMM13_OPERAND): Ditto.
5797 (LSX_SUPPORTED_MODE_P): Ditto.
5798 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
5799 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
5800 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
5807 * config/loongarch/loongarch.opt: Ditto.
5808 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
5809 (const_uimm3_operand): Ditto.
5810 (const_8_to_11_operand): Ditto.
5811 (const_12_to_15_operand): Ditto.
5812 (const_uimm4_operand): Ditto.
5813 (const_uimm6_operand): Ditto.
5814 (const_uimm7_operand): Ditto.
5815 (const_uimm8_operand): Ditto.
5816 (const_imm5_operand): Ditto.
5817 (const_imm10_operand): Ditto.
5818 (const_imm13_operand): Ditto.
5819 (reg_imm10_operand): Ditto.
5820 (aq8b_operand): Ditto.
5821 (aq8h_operand): Ditto.
5822 (aq8w_operand): Ditto.
5823 (aq8d_operand): Ditto.
5824 (aq10b_operand): Ditto.
5825 (aq10h_operand): Ditto.
5826 (aq10w_operand): Ditto.
5827 (aq10d_operand): Ditto.
5828 (aq12b_operand): Ditto.
5829 (aq12h_operand): Ditto.
5830 (aq12w_operand): Ditto.
5831 (aq12d_operand): Ditto.
5832 (const_m1_operand): Ditto.
5833 (reg_or_m1_operand): Ditto.
5834 (const_exp_2_operand): Ditto.
5835 (const_exp_4_operand): Ditto.
5836 (const_exp_8_operand): Ditto.
5837 (const_exp_16_operand): Ditto.
5838 (const_exp_32_operand): Ditto.
5839 (const_0_or_1_operand): Ditto.
5840 (const_0_to_3_operand): Ditto.
5841 (const_0_to_7_operand): Ditto.
5842 (const_2_or_3_operand): Ditto.
5843 (const_4_to_7_operand): Ditto.
5844 (const_8_to_15_operand): Ditto.
5845 (const_16_to_31_operand): Ditto.
5846 (qi_mask_operand): Ditto.
5847 (hi_mask_operand): Ditto.
5848 (si_mask_operand): Ditto.
5850 (db4_operand): Ditto.
5851 (db7_operand): Ditto.
5852 (db8_operand): Ditto.
5853 (ib3_operand): Ditto.
5854 (sb4_operand): Ditto.
5855 (sb5_operand): Ditto.
5856 (sb8_operand): Ditto.
5857 (sd8_operand): Ditto.
5858 (ub4_operand): Ditto.
5859 (ub8_operand): Ditto.
5860 (uh4_operand): Ditto.
5861 (uw4_operand): Ditto.
5862 (uw5_operand): Ditto.
5863 (uw6_operand): Ditto.
5864 (uw8_operand): Ditto.
5865 (addiur2_operand): Ditto.
5866 (addiusp_operand): Ditto.
5867 (andi16_operand): Ditto.
5868 (movep_src_register): Ditto.
5869 (movep_src_operand): Ditto.
5870 (fcc_reload_operand): Ditto.
5871 (muldiv_target_operand): Ditto.
5872 (const_vector_same_val_operand): Ditto.
5873 (const_vector_same_simm5_operand): Ditto.
5874 (const_vector_same_uimm5_operand): Ditto.
5875 (const_vector_same_ximm5_operand): Ditto.
5876 (const_vector_same_uimm6_operand): Ditto.
5877 (par_const_vector_shf_set_operand): Ditto.
5878 (reg_or_vector_same_val_operand): Ditto.
5879 (reg_or_vector_same_simm5_operand): Ditto.
5880 (reg_or_vector_same_uimm5_operand): Ditto.
5881 (reg_or_vector_same_ximm5_operand): Ditto.
5882 (reg_or_vector_same_uimm6_operand): Ditto.
5883 * doc/md.texi: Ditto.
5884 * config/loongarch/lsx.md: New file.
5886 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5888 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
5889 (get_all_predecessors): New function.
5890 (get_all_successors): Ditto.
5891 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
5892 (get_all_successors): Ditto.
5893 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
5894 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
5896 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
5898 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
5899 (split_addsi): Likewise.
5900 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
5901 'N', 'x', and 'J' code letters.
5902 (arc_output_addsi): Make it static.
5903 (split_addsi): Remove it.
5904 * config/arc/arc.h (UNSIGNED_INT*): New defines.
5905 (SINNED_INT*): Likewise.
5906 * config/arc/arc.md (type): Add add, sub, bxor types.
5907 (tst_movb): Change code letter from 's' to 'x'.
5908 (andsi3_i): Likewise.
5909 (addsi3_mixed): Refurbish the pattern.
5910 (call_i): Change code letter from 'S' to 'J'.
5911 * config/arc/arc700.md: Add newly introduced types.
5912 * config/arc/arcHS.md: Likewsie.
5913 * config/arc/arcHS4x.md: Likewise.
5914 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
5915 (CM4): Update description.
5916 (CP4, C6u, C6n, CIs, C4p): New constraint.
5918 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
5920 * common/config/arc/arc-common.cc (arc_option_optimization_table):
5921 Remove mbbit_peephole.
5922 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
5923 (store_direct): Likewise.
5924 (BBIT peephole2): Likewise.
5925 * config/arc/arc.opt (mbbit-peephole): Ignore option.
5926 * doc/invoke.texi (mbbit-peephole): Update document.
5928 2023-09-05 Jakub Jelinek <jakub@redhat.com>
5930 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
5933 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
5935 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
5936 options passed from driver to gnat1 as explicit for multilib.
5938 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
5940 * config.gcc: add loongarch*-elf target.
5941 * config/loongarch/elf.h: New file.
5942 Link against newlib by default.
5944 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
5946 * config.gcc: use -mstrict-align for building libraries
5947 if --with-strict-align-lib is given.
5948 * doc/install.texi: likewise.
5950 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
5952 * config/loongarch/loongarch-c.cc: Export macros
5953 "__loongarch_{arch,tune}" in the preprocessor.
5955 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
5957 * config.gcc: Make --with-abi= obsolete, decide the default ABI
5958 with target triplet. Allow specifying multilib library build
5959 options with --with-multilib-list and --with-multilib-default.
5960 * config/loongarch/t-linux: Likewise.
5961 * config/loongarch/genopts/loongarch-strings: Likewise.
5962 * config/loongarch/loongarch-str.h: Likewise.
5963 * doc/install.texi: Likewise.
5964 * config/loongarch/genopts/loongarch.opt.in: Introduce
5965 -m[no-]l[a]sx options. Only process -m*-float and
5966 -m[no-]l[a]sx in the GCC driver.
5967 * config/loongarch/loongarch.opt: Likewise.
5968 * config/loongarch/la464.md: Likewise.
5969 * config/loongarch/loongarch-c.cc: Likewise.
5970 * config/loongarch/loongarch-cpu.cc: Likewise.
5971 * config/loongarch/loongarch-cpu.h: Likewise.
5972 * config/loongarch/loongarch-def.c: Likewise.
5973 * config/loongarch/loongarch-def.h: Likewise.
5974 * config/loongarch/loongarch-driver.cc: Likewise.
5975 * config/loongarch/loongarch-driver.h: Likewise.
5976 * config/loongarch/loongarch-opts.cc: Likewise.
5977 * config/loongarch/loongarch-opts.h: Likewise.
5978 * config/loongarch/loongarch.cc: Likewise.
5979 * doc/invoke.texi: Likewise.
5981 2023-09-05 liuhongt <hongtao.liu@intel.com>
5983 * config/i386/sse.md: (V8BFH_128): Renamed to ..
5984 (VHFBF_128): .. this.
5985 (V16BFH_256): Renamed to ..
5986 (VHFBF_256): .. this.
5987 (avx512f_mov<mode>): Extend to V_128.
5988 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
5989 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
5990 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
5991 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
5992 * config/i386/i386-expand.cc (expand_vec_perm_blend):
5993 Canonicalize vec_merge.
5995 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5997 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
5998 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
5999 (autovectorize_vector_modes): Ditto.
6000 (vectorize_related_mode): Ditto.
6002 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6004 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
6005 all 32b Darwin PowerPC cases.
6007 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6009 * config/darwin-sections.def (static_init_section): Add the
6010 __TEXT,__StaticInit section.
6011 * config/darwin.cc (darwin_function_section): Use the static init
6012 section for global initializers, to match other platform toolchains.
6014 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6016 * config/darwin-sections.def (darwin_exception_section): Move to
6018 * config/darwin.cc (darwin_emit_except_table_label): Align before
6019 the exception table label.
6020 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
6021 relative 4byte relocs.
6023 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6025 * config/darwin.cc (dump_machopic_symref_flags): New.
6026 (debug_machopic_symref_flags): New.
6028 2023-09-04 Pan Li <pan2.li@intel.com>
6030 * config/riscv/riscv-vector-builtins-types.def
6031 (vfloat16mf4_t): Add FP16 intrinsic def.
6032 (vfloat16mf2_t): Ditto.
6033 (vfloat16m1_t): Ditto.
6034 (vfloat16m2_t): Ditto.
6035 (vfloat16m4_t): Ditto.
6036 (vfloat16m8_t): Ditto.
6038 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
6040 PR tree-optimization/108757
6041 * match.pd ((X - N * M) / N): New pattern.
6042 ((X + N * M) / N): New pattern.
6043 ((X + C) div_rshift N): New pattern.
6045 2023-09-04 Guo Jie <guojie@loongson.cn>
6047 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
6048 movsf_hardfloat and movdf_hardfloat.
6050 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6052 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
6053 In unsigned QImode test, check for sign extended subreg and/or
6054 constant operands, and do a sign extension in that case.
6055 * config/loongarch/loongarch.md (TARGET_64BIT): Define
6056 template cbranchqi4.
6058 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6060 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
6061 from memory into floating-point registers.
6063 2023-09-03 Pan Li <pan2.li@intel.com>
6065 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6067 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
6069 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
6071 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
6072 pointer before overwriting it.
6074 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
6076 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
6077 Associate the __float128 type to float128_type_node so that it can
6078 be recognized by the compiler.
6079 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
6080 Add the flag "FLOAT128_TYPE" to gcc and associate a function
6081 with the suffix "q" to "f128".
6082 * doc/extend.texi:Added support for 128-bit floating-point functions on
6083 the LoongArch architecture.
6085 2023-09-01 Jakub Jelinek <jakub@redhat.com>
6088 * common.opt (fabi-version=): Document version 19.
6089 * doc/invoke.texi (-fabi-version=): Likewise.
6091 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6093 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
6094 New combine pattern.
6095 (*cond_<float_cvt><vconvert><mode>): Ditto.
6096 (*cond_<optab><vnconvert><mode>): Ditto.
6097 (*cond_<float_cvt><vnconvert><mode>): Ditto.
6098 (*cond_<optab><mode><vnconvert>): Ditto.
6099 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
6100 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
6101 (<float_cvt><vconvert><mode>2): Adjust.
6102 (<optab><vnconvert><mode>2): Adjust.
6103 (<float_cvt><vnconvert><mode>2): Adjust.
6104 (<optab><mode><vnconvert>2): Adjust.
6105 (<float_cvt><mode><vnconvert>2): Adjust.
6106 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
6108 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6110 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
6111 New combine pattern.
6112 (*cond_trunc<mode><v_double_trunc>): Ditto.
6113 * config/riscv/autovec.md: Adjust.
6114 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
6116 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6118 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
6119 New combine pattern.
6120 (*cond_<optab><v_quad_trunc><mode>): Ditto.
6121 (*cond_<optab><v_oct_trunc><mode>): Ditto.
6122 (*cond_trunc<mode><v_double_trunc>): Ditto.
6123 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
6124 (<optab><v_oct_trunc><mode>2): Ditto.
6126 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6128 * config/riscv/autovec.md: Adjust.
6129 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
6130 (expand_cond_len_binop): Ditto.
6131 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
6132 (expand_cond_len_op): Ditto.
6133 (expand_cond_len_unop): Ditto.
6134 (expand_cond_len_binop): Ditto.
6135 (expand_cond_len_ternop): Ditto.
6137 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6139 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
6140 VECT_COMPARE_COSTS by default.
6142 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
6144 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
6146 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6148 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
6150 * config/riscv/riscv.opt: Add dynamic compile option.
6152 2023-09-01 Pan Li <pan2.li@intel.com>
6154 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6155 vls floating-point autovec.
6156 * config/riscv/vector-iterators.md: New iterator for
6157 floating-point V and VLS.
6158 * config/riscv/vector.md: Add VLS to floating-point binop.
6160 2023-09-01 Andrew Pinski <apinski@marvell.com>
6162 PR tree-optimization/19832
6163 * match.pd: Add pattern to optimize
6164 `(a != b) ? a OP b : c`.
6166 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
6167 Guo Jie <guojie@loongson.cn>
6170 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
6171 frame_pointer_needed to determine whether to use the $fp register.
6173 2023-08-31 Andrew Pinski <apinski@marvell.com>
6175 PR tree-optimization/110915
6176 * match.pd (min_value, max_value): Extend to vector constants.
6178 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6180 * config.in: Regenerate.
6181 * config/darwin-c.cc: Change spelling to macOS.
6182 * config/darwin-driver.cc: Likewise.
6183 * config/darwin.h: Likewise.
6184 * configure.ac: Likewise.
6185 * doc/contrib.texi: Likewise.
6186 * doc/extend.texi: Likewise.
6187 * doc/invoke.texi: Likewise.
6188 * doc/plugins.texi: Likewise.
6189 * doc/tm.texi: Regenerate.
6190 * doc/tm.texi.in: Change spelling to macOS.
6191 * plugin.cc: Likewise.
6193 2023-08-31 Pan Li <pan2.li@intel.com>
6195 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
6196 * config/riscv/autovec.md: Ditto.
6198 2023-08-31 Pan Li <pan2.li@intel.com>
6200 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
6201 * config/riscv/autovec.md: Ditto.
6203 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
6205 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
6206 rather than a call. List each possible destination register
6207 in the call pattern.
6209 2023-08-31 Pan Li <pan2.li@intel.com>
6211 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
6212 * config/riscv/autovec.md: Ditto.
6214 2023-08-31 Pan Li <pan2.li@intel.com>
6215 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6217 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
6218 * config/riscv/autovec.md: Ditto.
6219 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
6221 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
6223 * config/riscv/autovec.md (shifts): Use
6224 vector_scalar_shift_operand.
6225 * config/riscv/predicates.md (vector_scalar_shift_operand): New
6228 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6230 * config.gcc: Add vector cost model framework for RVV.
6231 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
6232 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
6233 * config/riscv/t-riscv: Ditto.
6234 * config/riscv/riscv-vector-costs.cc: New file.
6235 * config/riscv/riscv-vector-costs.h: New file.
6237 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
6240 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
6241 AltiVec address operands.
6242 (define_insn_and_split movxo): Likewise.
6243 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
6244 redundant mode size check.
6246 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
6248 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
6249 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
6250 Change to default policy.
6251 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
6252 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
6253 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
6255 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
6257 * config/riscv/autovec-opt.md: Adjust.
6258 * config/riscv/autovec-vls.md: Ditto.
6259 * config/riscv/autovec.md: Ditto.
6260 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
6261 (enum insn_flags): Add insn flags.
6262 (emit_vlmax_insn): Adjust.
6263 (emit_vlmax_fp_insn): Delete.
6264 (emit_vlmax_ternary_insn): Delete.
6265 (emit_vlmax_fp_ternary_insn): Delete.
6266 (emit_nonvlmax_insn): Adjust.
6267 (emit_vlmax_slide_insn): Delete.
6268 (emit_nonvlmax_slide_tu_insn): Delete.
6269 (emit_vlmax_merge_insn): Delete.
6270 (emit_vlmax_cmp_insn): Delete.
6271 (emit_vlmax_cmp_mu_insn): Delete.
6272 (emit_vlmax_masked_mu_insn): Delete.
6273 (emit_scalar_move_insn): Delete.
6274 (emit_nonvlmax_integer_move_insn): Delete.
6275 (emit_vlmax_insn_lra): Add.
6276 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
6277 (emit_vlmax_insn): Adjust.
6278 (emit_nonvlmax_insn): Adjust.
6279 (emit_vlmax_insn_lra): Add.
6280 (emit_vlmax_fp_insn): Delete.
6281 (emit_vlmax_ternary_insn): Delete.
6282 (emit_vlmax_fp_ternary_insn): Delete.
6283 (emit_vlmax_slide_insn): Delete.
6284 (emit_nonvlmax_slide_tu_insn): Delete.
6285 (emit_nonvlmax_slide_insn): Delete.
6286 (emit_vlmax_merge_insn): Delete.
6287 (emit_vlmax_cmp_insn): Delete.
6288 (emit_vlmax_cmp_mu_insn): Delete.
6289 (emit_vlmax_masked_insn): Delete.
6290 (emit_nonvlmax_masked_insn): Delete.
6291 (emit_vlmax_masked_store_insn): Delete.
6292 (emit_nonvlmax_masked_store_insn): Delete.
6293 (emit_vlmax_masked_mu_insn): Delete.
6294 (emit_vlmax_masked_fp_mu_insn): Delete.
6295 (emit_nonvlmax_tu_insn): Delete.
6296 (emit_nonvlmax_fp_tu_insn): Delete.
6297 (emit_nonvlmax_tumu_insn): Delete.
6298 (emit_nonvlmax_fp_tumu_insn): Delete.
6299 (emit_scalar_move_insn): Delete.
6300 (emit_cpop_insn): Delete.
6301 (emit_vlmax_integer_move_insn): Delete.
6302 (emit_nonvlmax_integer_move_insn): Delete.
6303 (emit_vlmax_gather_insn): Delete.
6304 (emit_vlmax_masked_gather_mu_insn): Delete.
6305 (emit_vlmax_compress_insn): Delete.
6306 (emit_nonvlmax_compress_insn): Delete.
6307 (emit_vlmax_reduction_insn): Delete.
6308 (emit_vlmax_fp_reduction_insn): Delete.
6309 (emit_nonvlmax_fp_reduction_insn): Delete.
6310 (expand_vec_series): Adjust.
6311 (expand_const_vector): Adjust.
6312 (legitimize_move): Adjust.
6313 (sew64_scalar_helper): Adjust.
6314 (expand_tuple_move): Adjust.
6315 (expand_vector_init_insert_elems): Adjust.
6316 (expand_vector_init_merge_repeating_sequence): Adjust.
6317 (expand_vec_cmp): Adjust.
6318 (expand_vec_cmp_float): Adjust.
6319 (expand_vec_perm): Adjust.
6320 (shuffle_merge_patterns): Adjust.
6321 (shuffle_compress_patterns): Adjust.
6322 (shuffle_decompress_patterns): Adjust.
6323 (expand_load_store): Adjust.
6324 (expand_cond_len_op): Adjust.
6325 (expand_cond_len_unop): Adjust.
6326 (expand_cond_len_binop): Adjust.
6327 (expand_gather_scatter): Adjust.
6328 (expand_cond_len_ternop): Adjust.
6329 (expand_reduction): Adjust.
6330 (expand_lanes_load_store): Adjust.
6331 (expand_fold_extract_last): Adjust.
6332 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
6333 * config/riscv/vector.md: Adjust.
6335 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
6338 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
6339 load/store with length only on 64-bit Power10.
6341 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
6343 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
6344 SWAP option is enabled.
6345 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
6347 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
6349 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
6350 Use common insn for signed and unsigned front-end definitions.
6351 * config/arm/arm_mve_builtins.def
6352 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
6353 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
6354 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
6357 (mve_rot): Likewise.
6359 (VxCADDQ_M): Likewise.
6360 * config/arm/unspecs.md (unspec): Likewise.
6361 * config/arm/mve.md: Fix minor typo.
6363 2023-08-31 liuhongt <hongtao.liu@intel.com>
6365 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
6366 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
6367 (VF_AVX512HFBF16): Renamed to VHFBF.
6368 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
6369 (VF_AVX512FP16): Removed.
6370 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
6371 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
6372 (rsqrt<mode>2): Ditto.
6373 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
6374 (vcond<mode><code>): Ditto.
6375 (vcond<sseintvecmodelower><mode>): Ditto.
6376 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
6377 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
6378 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
6379 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
6380 (cmla<conj_op><mode>4): Ditto.
6381 (fma_<mode>_fadd_fmul): Ditto.
6382 (fma_<mode>_fadd_fcmul): Ditto.
6383 (fma_<complexopname>_<mode>_fma_zero): Ditto.
6384 (fma_<mode>_fmaddc_bcst): Ditto.
6385 (fma_<mode>_fcmaddc_bcst): Ditto.
6386 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
6387 (cmul<conj_op><mode>3): Ditto.
6388 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
6390 (vec_unpacks_lo_<mode>): Ditto.
6391 (vec_unpacks_hi_<mode>): Ditto.
6392 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
6393 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
6394 (*vec_extract<mode>_0): Ditto.
6395 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
6397 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
6400 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
6402 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
6404 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
6405 (operator_minus::overflow_free_p): New declare.
6406 (operator_mult::overflow_free_p): New declare.
6407 * range-op.cc (range_op_handler::overflow_free_p): New function.
6408 (range_operator::overflow_free_p): New default function.
6409 (operator_plus::overflow_free_p): New function.
6410 (operator_minus::overflow_free_p): New function.
6411 (operator_mult::overflow_free_p): New function.
6412 * range-op.h (range_op_handler::overflow_free_p): New declare.
6413 (range_operator::overflow_free_p): New declare.
6414 * value-range.cc (irange::nonnegative_p): New function.
6415 (irange::nonpositive_p): New function.
6416 * value-range.h (irange::nonnegative_p): New declare.
6417 (irange::nonpositive_p): New declare.
6419 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
6422 * config/pru/predicates.md (const_0_operand): New predicate.
6423 (pru_cstore_comparison_operator): Ditto.
6424 * config/pru/pru.md (cstore<mode>4): New pattern.
6427 2023-08-30 Richard Biener <rguenther@suse.de>
6429 PR tree-optimization/111228
6430 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
6431 New simplifications.
6433 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6435 * config/riscv/autovec.md (movmisalign<mode>): Delete.
6437 2023-08-30 Die Li <lidie@eswincomputing.com>
6438 Fei Gao <gaofei@eswincomputing.com>
6440 * config/riscv/peephole.md: New pattern.
6441 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
6442 (zcmp_mv_sreg_operand): New predicate.
6443 * config/riscv/riscv.md: New predicate.
6444 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
6445 (*mvsa01<X:mode>): New pattern.
6447 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
6449 * config/riscv/riscv.cc
6450 (riscv_zcmp_can_use_popretz): true if popretz can be used
6451 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
6452 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
6453 * config/riscv/riscv.md: define A0_REGNUM
6454 * config/riscv/zc.md
6455 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
6456 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
6457 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
6458 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
6459 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
6460 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
6461 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
6462 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
6463 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
6464 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
6465 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
6466 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
6468 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
6470 * config/riscv/iterators.md
6471 (slot0_offset): slot 0 offset in stack GPRs area in bytes
6472 (slot1_offset): slot 1 offset in stack GPRs area in bytes
6473 (slot2_offset): likewise
6474 (slot3_offset): likewise
6475 (slot4_offset): likewise
6476 (slot5_offset): likewise
6477 (slot6_offset): likewise
6478 (slot7_offset): likewise
6479 (slot8_offset): likewise
6480 (slot9_offset): likewise
6481 (slot10_offset): likewise
6482 (slot11_offset): likewise
6483 (slot12_offset): likewise
6484 * config/riscv/predicates.md
6485 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
6486 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
6487 (stack_push_up_to_s1_operand): likewise
6488 (stack_push_up_to_s2_operand): likewise
6489 (stack_push_up_to_s3_operand): likewise
6490 (stack_push_up_to_s4_operand): likewise
6491 (stack_push_up_to_s5_operand): likewise
6492 (stack_push_up_to_s6_operand): likewise
6493 (stack_push_up_to_s7_operand): likewise
6494 (stack_push_up_to_s8_operand): likewise
6495 (stack_push_up_to_s9_operand): likewise
6496 (stack_push_up_to_s11_operand): likewise
6497 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
6498 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
6499 (stack_pop_up_to_s1_operand): likewise
6500 (stack_pop_up_to_s2_operand): likewise
6501 (stack_pop_up_to_s3_operand): likewise
6502 (stack_pop_up_to_s4_operand): likewise
6503 (stack_pop_up_to_s5_operand): likewise
6504 (stack_pop_up_to_s6_operand): likewise
6505 (stack_pop_up_to_s7_operand): likewise
6506 (stack_pop_up_to_s8_operand): likewise
6507 (stack_pop_up_to_s9_operand): likewise
6508 (stack_pop_up_to_s11_operand): likewise
6509 * config/riscv/riscv-protos.h
6510 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
6511 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
6512 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
6513 (riscv_use_multi_push): true if multi push is used
6514 (riscv_multi_push_sregs_count): num of sregs in multi-push
6515 (riscv_multi_push_regs_count): num of regs in multi-push
6516 (riscv_16bytes_align): align to 16 bytes
6517 (riscv_stack_align): moved to a better place
6518 (riscv_save_libcall_count): no functional change
6519 (riscv_compute_frame_info): add zcmp frame info
6520 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
6521 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
6522 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
6523 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
6524 (riscv_expand_prologue): allocate stack by cm.push
6525 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
6526 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
6527 (zcmp_base_adj): calculate stack adjustment base size
6528 (zcmp_additional_adj): calculate stack adjustment additional size
6529 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
6530 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
6541 (S10_MASK): likewise
6542 (S11_MASK): likewise
6543 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
6544 (ZCMP_MAX_SPIMM): max spimm value
6545 (ZCMP_SP_INC_STEP): zcmp sp increment step
6546 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
6547 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
6548 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
6549 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
6550 * config/riscv/riscv.md: include zc.md
6551 * config/riscv/zc.md: New file. machine description for zcmp
6553 2023-08-30 Jakub Jelinek <jakub@redhat.com>
6555 PR tree-optimization/110914
6556 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
6557 adjust_last_stmt unless len is known constant.
6559 2023-08-30 Jakub Jelinek <jakub@redhat.com>
6561 PR tree-optimization/111015
6562 * gimple-ssa-store-merging.cc
6563 (imm_store_chain_info::output_merged_store): Use wi::mask and
6564 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
6565 build_int_cst to build BIT_AND_EXPR mask.
6567 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6569 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
6570 (call_may_clobber_ref_p_1): Ditto.
6571 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
6572 (get_alias_ptr_type_for_ptr_address): Ditto.
6574 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6576 * config/riscv/riscv-vsetvl.cc
6577 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
6579 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6581 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
6582 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
6585 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
6587 * config/riscv/zicond.md: New splitters to rewrite single bit
6588 sign extension as the condition to a czero in the desired form.
6590 2023-08-29 David Malcolm <dmalcolm@redhat.com>
6593 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
6595 2023-08-29 David Malcolm <dmalcolm@redhat.com>
6598 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
6600 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
6602 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
6603 zvfh can generate zfa extended instruction fli.h, just like zfh.
6605 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
6606 Vineet Gupta <vineetg@rivosinc.com>
6608 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
6609 __riscv_unaligned_avoid with value 1 or
6610 __riscv_unaligned_slow with value 1 or
6611 __riscv_unaligned_fast with value 1
6612 * config/riscv/riscv.cc (riscv_option_override): Define
6613 riscv_user_wants_strict_align. Set
6614 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
6615 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
6617 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
6619 * config/riscv/autovec-vls.md: Update types
6620 * config/riscv/riscv.md: Add vector placeholder type
6621 * config/riscv/vector.md: Update types
6623 2023-08-29 Carl Love <cel@us.ibm.com>
6625 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
6626 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
6627 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
6628 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
6629 New buit-in definitions.
6630 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
6631 overloaded definition.
6632 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
6634 2023-08-29 Pan Li <pan2.li@intel.com>
6635 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6637 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
6638 (riscv_legitimize_const_move): Handle ref plus const poly.
6640 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
6642 * common/config/riscv/riscv-common.cc
6643 (riscv_implied_info): Add implications from unprivileged extensions.
6644 (riscv_ext_version_table): Add stub support for all unprivileged
6645 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
6647 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
6649 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6650 Add stub support for all vendor extensions supported by Binutils.
6652 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
6654 * common/config/riscv/riscv-common.cc
6655 (riscv_implied_info): Add implications from privileged extensions.
6656 (riscv_ext_version_table): Add stub support for all privileged
6657 extensions supported by Binutils.
6659 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
6661 * config/riscv/autovec.md: Adjust
6662 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
6663 (get_vlmax_rtx): Exported.
6664 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
6665 (emit_vlmax_masked_gather_mu_insn): Adjust.
6666 (get_vlmax_rtx): New func.
6667 (expand_load_store): Adjust.
6668 (expand_cond_len_unop): Call expand_cond_len_op.
6669 (expand_cond_len_op): New subroutine.
6670 (expand_cond_len_binop): Call expand_cond_len_op.
6671 (expand_cond_len_ternop): Call expand_cond_len_op.
6672 (expand_lanes_load_store): Adjust.
6674 2023-08-29 Jakub Jelinek <jakub@redhat.com>
6677 PR middle-end/111209
6678 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
6679 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
6680 carry-out on higher limb. Don't match it though if it could be
6681 matched later on 4 argument addition/subtraction.
6683 2023-08-29 Andrew Pinski <apinski@marvell.com>
6685 PR tree-optimization/111147
6686 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
6687 instead of matching bit_not.
6689 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
6691 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
6694 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6696 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
6697 (pass_vsetvl::compute_local_properties): Fix bug.
6698 (pass_vsetvl::commit_vsetvls): Ditto.
6699 * config/riscv/riscv-vsetvl.h: New function.
6701 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
6704 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
6706 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
6707 force_reg mem target operand.
6708 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
6709 (*pred_mov<mode>): Remove imm -> reg pattern.
6710 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
6712 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
6714 * common/config/loongarch/loongarch-common.cc:
6715 Enable '-free' on O2 and above.
6716 * doc/invoke.texi: Modify the description information
6717 of the '-free' compilation option and add the LoongArch
6720 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
6722 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
6724 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
6726 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6727 Implement the 'Zihintpause' extension, version 2.0.
6728 (riscv_ext_flag_table) Add 'Zihintpause' handling.
6729 * config/riscv/riscv-builtins.cc: Remove availability predicate
6730 "always" and add "hint_pause".
6731 (riscv_builtins) : Add "pause" extension.
6732 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
6733 * config/riscv/riscv.md (riscv_pause): Adjust output based on
6736 2023-08-28 Andrew Pinski <apinski@marvell.com>
6738 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
6739 instead of specifically checking for ~X.
6741 2023-08-28 Andrew Pinski <apinski@marvell.com>
6743 PR tree-optimization/111146
6744 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
6747 2023-08-28 Andrew Pinski <apinski@marvell.com>
6749 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
6750 when resimplify returns true.
6751 (match_simplify_replacement): Print only if accepted the match-and-simplify
6752 result rather than the full sequence.
6754 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6756 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
6758 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
6760 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6762 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
6764 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6766 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
6767 (vmulltq_poly): New.
6768 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
6769 (vmulltq_poly): New.
6770 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
6771 (vmulltq_poly): New.
6772 * config/arm/arm_mve.h (vmulltq_poly): Remove.
6773 (vmullbq_poly): Remove.
6774 (vmullbq_poly_m): Remove.
6775 (vmulltq_poly_m): Remove.
6776 (vmullbq_poly_x): Remove.
6777 (vmulltq_poly_x): Remove.
6778 (vmulltq_poly_p8): Remove.
6779 (vmullbq_poly_p8): Remove.
6780 (vmulltq_poly_p16): Remove.
6781 (vmullbq_poly_p16): Remove.
6782 (vmullbq_poly_m_p8): Remove.
6783 (vmullbq_poly_m_p16): Remove.
6784 (vmulltq_poly_m_p8): Remove.
6785 (vmulltq_poly_m_p16): Remove.
6786 (vmullbq_poly_x_p8): Remove.
6787 (vmullbq_poly_x_p16): Remove.
6788 (vmulltq_poly_x_p8): Remove.
6789 (vmulltq_poly_x_p16): Remove.
6790 (__arm_vmulltq_poly_p8): Remove.
6791 (__arm_vmullbq_poly_p8): Remove.
6792 (__arm_vmulltq_poly_p16): Remove.
6793 (__arm_vmullbq_poly_p16): Remove.
6794 (__arm_vmullbq_poly_m_p8): Remove.
6795 (__arm_vmullbq_poly_m_p16): Remove.
6796 (__arm_vmulltq_poly_m_p8): Remove.
6797 (__arm_vmulltq_poly_m_p16): Remove.
6798 (__arm_vmullbq_poly_x_p8): Remove.
6799 (__arm_vmullbq_poly_x_p16): Remove.
6800 (__arm_vmulltq_poly_x_p8): Remove.
6801 (__arm_vmulltq_poly_x_p16): Remove.
6802 (__arm_vmulltq_poly): Remove.
6803 (__arm_vmullbq_poly): Remove.
6804 (__arm_vmullbq_poly_m): Remove.
6805 (__arm_vmulltq_poly_m): Remove.
6806 (__arm_vmullbq_poly_x): Remove.
6807 (__arm_vmulltq_poly_x): Remove.
6809 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6811 * config/arm/arm-mve-builtins-functions.h (class
6812 unspec_mve_function_exact_insn_vmull_poly): New.
6814 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6816 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
6817 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
6819 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6821 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
6822 support for 'U' and 'p' format specifiers.
6824 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6826 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
6828 (TYPES_poly_8_16): New.
6830 * config/arm/arm-mve-builtins.def (p8): New type suffix.
6832 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
6834 (struct type_suffix_info): Add poly_p field.
6836 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6838 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
6840 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
6842 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
6844 * config/arm/arm_mve.h (vmulltq_int): Remove.
6845 (vmullbq_int): Remove.
6846 (vmullbq_int_m): Remove.
6847 (vmulltq_int_m): Remove.
6848 (vmullbq_int_x): Remove.
6849 (vmulltq_int_x): Remove.
6850 (vmulltq_int_u8): Remove.
6851 (vmullbq_int_u8): Remove.
6852 (vmulltq_int_s8): Remove.
6853 (vmullbq_int_s8): Remove.
6854 (vmulltq_int_u16): Remove.
6855 (vmullbq_int_u16): Remove.
6856 (vmulltq_int_s16): Remove.
6857 (vmullbq_int_s16): Remove.
6858 (vmulltq_int_u32): Remove.
6859 (vmullbq_int_u32): Remove.
6860 (vmulltq_int_s32): Remove.
6861 (vmullbq_int_s32): Remove.
6862 (vmullbq_int_m_s8): Remove.
6863 (vmullbq_int_m_s32): Remove.
6864 (vmullbq_int_m_s16): Remove.
6865 (vmullbq_int_m_u8): Remove.
6866 (vmullbq_int_m_u32): Remove.
6867 (vmullbq_int_m_u16): Remove.
6868 (vmulltq_int_m_s8): Remove.
6869 (vmulltq_int_m_s32): Remove.
6870 (vmulltq_int_m_s16): Remove.
6871 (vmulltq_int_m_u8): Remove.
6872 (vmulltq_int_m_u32): Remove.
6873 (vmulltq_int_m_u16): Remove.
6874 (vmullbq_int_x_s8): Remove.
6875 (vmullbq_int_x_s16): Remove.
6876 (vmullbq_int_x_s32): Remove.
6877 (vmullbq_int_x_u8): Remove.
6878 (vmullbq_int_x_u16): Remove.
6879 (vmullbq_int_x_u32): Remove.
6880 (vmulltq_int_x_s8): Remove.
6881 (vmulltq_int_x_s16): Remove.
6882 (vmulltq_int_x_s32): Remove.
6883 (vmulltq_int_x_u8): Remove.
6884 (vmulltq_int_x_u16): Remove.
6885 (vmulltq_int_x_u32): Remove.
6886 (__arm_vmulltq_int_u8): Remove.
6887 (__arm_vmullbq_int_u8): Remove.
6888 (__arm_vmulltq_int_s8): Remove.
6889 (__arm_vmullbq_int_s8): Remove.
6890 (__arm_vmulltq_int_u16): Remove.
6891 (__arm_vmullbq_int_u16): Remove.
6892 (__arm_vmulltq_int_s16): Remove.
6893 (__arm_vmullbq_int_s16): Remove.
6894 (__arm_vmulltq_int_u32): Remove.
6895 (__arm_vmullbq_int_u32): Remove.
6896 (__arm_vmulltq_int_s32): Remove.
6897 (__arm_vmullbq_int_s32): Remove.
6898 (__arm_vmullbq_int_m_s8): Remove.
6899 (__arm_vmullbq_int_m_s32): Remove.
6900 (__arm_vmullbq_int_m_s16): Remove.
6901 (__arm_vmullbq_int_m_u8): Remove.
6902 (__arm_vmullbq_int_m_u32): Remove.
6903 (__arm_vmullbq_int_m_u16): Remove.
6904 (__arm_vmulltq_int_m_s8): Remove.
6905 (__arm_vmulltq_int_m_s32): Remove.
6906 (__arm_vmulltq_int_m_s16): Remove.
6907 (__arm_vmulltq_int_m_u8): Remove.
6908 (__arm_vmulltq_int_m_u32): Remove.
6909 (__arm_vmulltq_int_m_u16): Remove.
6910 (__arm_vmullbq_int_x_s8): Remove.
6911 (__arm_vmullbq_int_x_s16): Remove.
6912 (__arm_vmullbq_int_x_s32): Remove.
6913 (__arm_vmullbq_int_x_u8): Remove.
6914 (__arm_vmullbq_int_x_u16): Remove.
6915 (__arm_vmullbq_int_x_u32): Remove.
6916 (__arm_vmulltq_int_x_s8): Remove.
6917 (__arm_vmulltq_int_x_s16): Remove.
6918 (__arm_vmulltq_int_x_s32): Remove.
6919 (__arm_vmulltq_int_x_u8): Remove.
6920 (__arm_vmulltq_int_x_u16): Remove.
6921 (__arm_vmulltq_int_x_u32): Remove.
6922 (__arm_vmulltq_int): Remove.
6923 (__arm_vmullbq_int): Remove.
6924 (__arm_vmullbq_int_m): Remove.
6925 (__arm_vmulltq_int_m): Remove.
6926 (__arm_vmullbq_int_x): Remove.
6927 (__arm_vmulltq_int_x): Remove.
6929 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6931 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
6932 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
6934 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6936 * config/arm/arm-mve-builtins-functions.h (class
6937 unspec_mve_function_exact_insn_vmull): New.
6939 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6941 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
6942 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
6944 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
6946 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
6947 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
6948 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
6949 (mve_vmulltq_int_<supf><mode>): Merge into ...
6950 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
6951 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
6952 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
6953 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
6954 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
6955 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
6956 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
6958 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6960 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
6963 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
6965 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
6966 (binary_acca_int64): Likewise.
6968 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
6970 * range-op-float.cc (fold_range): Handle relations.
6972 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
6974 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
6975 Optimize the function implementation.
6977 2023-08-28 liuhongt <hongtao.liu@intel.com>
6980 * config/i386/sse.md (V48_AVX2): Rename to ..
6981 (V48_128_256): .. this.
6982 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
6983 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
6984 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
6985 integral modes when TARGET_AVX2 is not available.
6986 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
6987 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
6989 (maskstore<mode><sseintvecmodelower>): Ditto.
6991 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6993 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
6995 (after_or_same_p): Ditto.
6996 (find_reg_killed_by): Delete.
6997 (has_vsetvl_killed_avl_p): Ditto.
6998 (anticipatable_occurrence_p): Refactor.
6999 (any_set_in_bb_p): Delete.
7000 (count_regno_occurrences): Ditto.
7001 (backward_propagate_worthwhile_p): Ditto.
7002 (demands_can_be_fused_p): Ditto.
7003 (earliest_pred_can_be_fused_p): New function.
7004 (vsetvl_dominated_by_p): Ditto.
7005 (vector_insn_info::parse_insn): Refactor.
7006 (vector_insn_info::merge): Refactor.
7007 (vector_insn_info::dump): Refactor.
7008 (vector_infos_manager::vector_infos_manager): Refactor.
7009 (vector_infos_manager::all_empty_predecessor_p): Delete.
7010 (vector_infos_manager::all_same_avl_p): Ditto.
7011 (vector_infos_manager::create_bitmap_vectors): Refactor.
7012 (vector_infos_manager::free_bitmap_vectors): Refactor.
7013 (vector_infos_manager::dump): Refactor.
7014 (pass_vsetvl::update_block_info): New function.
7015 (enum fusion_type): Ditto.
7016 (pass_vsetvl::get_backward_fusion_type): Delete.
7017 (pass_vsetvl::hard_empty_block_p): Ditto.
7018 (pass_vsetvl::backward_demand_fusion): Ditto.
7019 (pass_vsetvl::forward_demand_fusion): Ditto.
7020 (pass_vsetvl::demand_fusion): Ditto.
7021 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
7022 (pass_vsetvl::compute_local_properties): Ditto.
7023 (pass_vsetvl::earliest_fusion): New function.
7024 (pass_vsetvl::vsetvl_fusion): Ditto.
7025 (pass_vsetvl::commit_vsetvls): Refactor.
7026 (get_first_vsetvl_before_rvv_insns): Ditto.
7027 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
7028 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
7029 (pass_vsetvl::df_post_optimization): Refactor.
7030 (pass_vsetvl::lazy_vsetvl): Ditto.
7031 * config/riscv/riscv-vsetvl.h: Ditto.
7033 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7035 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
7036 * config/riscv/riscv-protos.h (enum insn_type): New enum.
7037 (expand_fold_extract_last): New function.
7038 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
7039 (emit_cpop_insn): Ditto.
7040 (emit_nonvlmax_compress_insn): Ditto.
7041 (expand_fold_extract_last): Ditto.
7042 * config/riscv/vector.md: Fix vcpop.m ratio demand.
7044 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
7046 * config/riscv/sync-rvwmo.md: updated types to "multi" or
7047 "atomic" based on number of assembly lines generated
7048 * config/riscv/sync-ztso.md: likewise
7049 * config/riscv/sync.md: likewise
7051 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
7053 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
7055 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
7056 instructions FLI.H/S/D can load.
7057 * config/riscv/iterators.md (ceil): New.
7058 * config/riscv/riscv-opts.h (MASK_ZFA): New.
7060 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
7061 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
7062 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
7064 (riscv_const_insns): Likewise.
7065 (riscv_legitimize_const_move): Likewise.
7066 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
7068 (riscv_split_doubleword_move): Likewise.
7069 (riscv_output_move): Output the mov instructions in zfa extension.
7070 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
7072 (riscv_secondary_memory_needed): Likewise.
7073 * config/riscv/riscv.md (fminm<mode>3): New.
7074 (fmaxm<mode>3): New.
7075 (movsidf2_low_rv32): New.
7076 (movsidf2_high_rv32): New.
7077 (movdfsisi3_rv32): New.
7078 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
7079 * config/riscv/riscv.opt: New.
7081 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7084 * omp-general.cc (omp_runtime_api_procname): New.
7085 (omp_runtime_api_call): Moved here from omp-low.cc, and make
7087 * omp-general.h: Include omp-api.h.
7088 * omp-low.cc (omp_runtime_api_call): Delete this copy.
7090 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7092 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
7093 * doc/gimple.texi (GIMPLE instruction set): Add
7094 GIMPLE_OMP_STRUCTURED_BLOCK.
7095 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
7096 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
7097 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
7098 GIMPLE_OMP_STRUCTURED_BLOCK.
7099 (pp_gimple_stmt_1): Likewise.
7100 * gimple-walk.cc (walk_gimple_stmt): Likewise.
7101 * gimple.cc (gimple_build_omp_structured_block): New.
7102 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
7103 * gimple.h (gimple_build_omp_structured_block): Declare.
7104 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7105 (CASE_GIMPLE_OMP): Likewise.
7106 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
7107 (gimplify_expr): Likewise.
7108 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
7109 GIMPLE_OMP_STRUCTURED_BLOCK.
7110 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7111 (lower_omp_1): Likewise.
7112 (diagnose_sb_1): Likewise.
7113 (diagnose_sb_2): Likewise.
7114 * tree-inline.cc (remap_gimple_stmt): Handle
7115 GIMPLE_OMP_STRUCTURED_BLOCK.
7116 (estimate_num_insns): Likewise.
7117 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
7118 (convert_local_reference_stmt): Likewise.
7119 (convert_gimple_call): Likewise.
7120 * tree-pretty-print.cc (dump_generic_node): Handle
7121 OMP_STRUCTURED_BLOCK.
7122 * tree.def (OMP_STRUCTURED_BLOCK): New.
7123 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
7125 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
7127 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
7128 cost. Add some comments about different constants handling.
7130 2023-08-25 Andrew Pinski <apinski@marvell.com>
7132 * match.pd (`a ? one_zero : one_zero`): Move
7133 below detection of minmax.
7135 2023-08-25 Andrew Pinski <apinski@marvell.com>
7137 * match.pd (`a | C -> C`): New pattern.
7139 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
7141 * caller-save.cc (new_saved_hard_reg):
7142 Rename TRUE/FALSE to true/false.
7143 (setup_save_areas): Ditto.
7144 * gcc.cc (set_collect_gcc_options): Ditto.
7145 (driver::build_multilib_strings): Ditto.
7146 (print_multilib_info): Ditto.
7147 * genautomata.cc (gen_cpu_unit): Ditto.
7148 (gen_query_cpu_unit): Ditto.
7149 (gen_bypass): Ditto.
7150 (gen_excl_set): Ditto.
7151 (gen_presence_absence_set): Ditto.
7152 (gen_presence_set): Ditto.
7153 (gen_final_presence_set): Ditto.
7154 (gen_absence_set): Ditto.
7155 (gen_final_absence_set): Ditto.
7156 (gen_automaton): Ditto.
7157 (gen_regexp_repeat): Ditto.
7158 (gen_regexp_allof): Ditto.
7159 (gen_regexp_oneof): Ditto.
7160 (gen_regexp_sequence): Ditto.
7161 (process_decls): Ditto.
7162 (reserv_sets_are_intersected): Ditto.
7163 (initiate_excl_sets): Ditto.
7164 (form_reserv_sets_list): Ditto.
7165 (check_presence_pattern_sets): Ditto.
7166 (check_absence_pattern_sets): Ditto.
7167 (check_regexp_units_distribution): Ditto.
7168 (check_unit_distributions_to_automata): Ditto.
7169 (create_ainsns): Ditto.
7170 (output_insn_code_cases): Ditto.
7171 (output_internal_dead_lock_func): Ditto.
7172 (form_important_insn_automata_lists): Ditto.
7173 * gengtype-state.cc (read_state_files_list): Ditto.
7174 * gengtype.cc (main): Ditto.
7175 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
7177 * gimple.cc (gimple_build_call_from_tree): Ditto.
7178 (preprocess_case_label_vec_for_gimple): Ditto.
7179 * gimplify.cc (gimplify_call_expr): Ditto.
7180 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
7182 2023-08-25 Richard Biener <rguenther@suse.de>
7184 PR tree-optimization/111137
7185 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
7186 Properly handle grouped stores from other SLP instances.
7188 2023-08-25 Richard Biener <rguenther@suse.de>
7190 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
7191 Split out from vect_slp_analyze_node_dependences, remove
7193 (vect_slp_analyze_load_dependences): Split out from
7194 vect_slp_analyze_node_dependences, adjust comments. Process
7195 queued stores before any disambiguation.
7196 (vect_slp_analyze_node_dependences): Remove.
7197 (vect_slp_analyze_instance_dependence): Adjust.
7199 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
7201 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
7203 (operator_not_equal::fold_range): Adjust for relations.
7204 (operator_lt::fold_range): Same.
7205 (operator_gt::fold_range): Same.
7206 (foperator_unordered_equal::fold_range): Same.
7207 (foperator_unordered_lt::fold_range): Same.
7208 (foperator_unordered_le::fold_range): Same.
7209 (foperator_unordered_gt::fold_range): Same.
7210 (foperator_unordered_ge::fold_range): Same.
7212 2023-08-25 Richard Biener <rguenther@suse.de>
7214 PR tree-optimization/111136
7215 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
7216 stores force STMT_VINFO_STRIDED_P and also duplicate that
7219 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7221 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
7224 2023-08-25 liuhongt <hongtao.liu@intel.com>
7226 * config/i386/sse.md (vec_set<mode>): Removed.
7227 (V_128H): Merge into ..
7229 (V_256H): Merge into ..
7231 (V_512): Add V32HF, V32BF.
7232 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
7234 (vcond<mode><sseintvecmodelower>): Removed
7235 (vcondu<mode><sseintvecmodelower>): Removed.
7236 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
7238 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
7241 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
7242 Adjust paramter order.
7244 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
7247 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
7249 2023-08-24 David Malcolm <dmalcolm@redhat.com>
7252 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
7253 list of functions known to the analyzer.
7255 2023-08-24 Richard Biener <rguenther@suse.de>
7257 PR tree-optimization/111123
7258 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
7259 remove indirect clobbers here ...
7260 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
7261 (remove_indirect_clobbers): New function.
7263 2023-08-24 Jan Hubicka <jh@suse.cz>
7265 * cfg.h (struct control_flow_graph): New field full_profile.
7266 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
7267 * cfg.cc (init_flow): Set full_profile to false.
7268 * graphite.cc (graphite_transform_loops): Set full_profile to false.
7269 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
7270 * predict.cc (pass_profile::execute): Set full_profile to true.
7271 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
7272 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
7273 if full_profile is set.
7274 * tree-inline.cc (initialize_cfun): Initialize full_profile.
7275 (expand_call_inline): Combine full_profile.
7277 2023-08-24 Richard Biener <rguenther@suse.de>
7279 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
7280 load_p to ldst_p, fix mistakes and rely on
7281 STMT_VINFO_DATA_REF.
7283 2023-08-24 Jan Hubicka <jh@suse.cz>
7285 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
7286 of newly build trap bb.
7288 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7290 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
7291 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
7292 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
7294 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
7296 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
7297 * config/riscv/riscv.cc (riscv_option_override): Set sched
7300 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
7302 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
7304 2023-08-24 Richard Biener <rguenther@suse.de>
7306 PR tree-optimization/111125
7307 * tree-vect-slp.cc (vect_slp_function): Split at novector
7308 loop entry, do not push blocks in novector loops.
7310 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
7312 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
7314 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7316 * genmatch.cc (decision_tree::gen): Support
7317 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
7318 * gimple-match-exports.cc (gimple_simplify): Ditto.
7319 (gimple_resimplify6): New function.
7320 (gimple_resimplify7): New function.
7321 (gimple_match_op::resimplify): Support
7322 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
7323 (convert_conditional_op): Ditto.
7324 (build_call_internal): Ditto.
7325 (try_conditional_simplification): Ditto.
7326 (gimple_extract): Ditto.
7327 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
7328 * internal-fn.cc (CASE): Ditto.
7330 2023-08-24 Richard Biener <rguenther@suse.de>
7332 PR tree-optimization/111115
7333 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
7334 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
7336 * tree-vect-slp.cc (arg3_arg2_map): New.
7337 (vect_get_operand_map): Handle IFN_MASK_STORE.
7338 (vect_slp_child_index_for_operand): New function.
7339 (vect_build_slp_tree_1): Handle statements with no LHS,
7341 (vect_remove_slp_scalar_calls): Likewise.
7342 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
7343 SLP child corresponding to the ifn value index.
7344 (vectorizable_store): Likewise for the mask index. Support
7346 (vectorizable_load): Lookup the SLP child corresponding to the
7349 2023-08-24 Richard Biener <rguenther@suse.de>
7351 PR tree-optimization/111125
7352 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
7353 for the remain_defs processing.
7355 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
7357 * config/aarch64/aarch64.cc: Include ssa.h.
7358 (aarch64_multiply_add_p): Require the second operand of an
7359 Advanced SIMD subtraction to be a multiplication. Assume that
7360 such an operation won't be fused if the second operand is used
7361 multiple times and if the first operand is also a multiplication.
7363 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7365 * tree-vect-loop.cc (vectorizable_reduction): Apply
7366 LEN_FOLD_EXTRACT_LAST.
7367 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
7369 2023-08-24 Richard Biener <rguenther@suse.de>
7371 PR tree-optimization/111128
7372 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
7373 Emit external shift operand inline if we promoted it with
7374 another pattern stmt.
7376 2023-08-24 Pan Li <pan2.li@intel.com>
7378 * config/riscv/autovec.md: Fix typo.
7380 2023-08-24 Pan Li <pan2.li@intel.com>
7382 * config/riscv/riscv-vector-builtins-bases.cc
7383 (class binop_frm): Removed.
7384 (class reverse_binop_frm): Ditto.
7385 (class widen_binop_frm): Ditto.
7386 (class vfmacc_frm): Ditto.
7387 (class vfnmacc_frm): Ditto.
7388 (class vfmsac_frm): Ditto.
7389 (class vfnmsac_frm): Ditto.
7390 (class vfmadd_frm): Ditto.
7391 (class vfnmadd_frm): Ditto.
7392 (class vfmsub_frm): Ditto.
7393 (class vfnmsub_frm): Ditto.
7394 (class vfwmacc_frm): Ditto.
7395 (class vfwnmacc_frm): Ditto.
7396 (class vfwmsac_frm): Ditto.
7397 (class vfwnmsac_frm): Ditto.
7398 (class unop_frm): Ditto.
7399 (class vfrec7_frm): Ditto.
7400 (class binop): Add frm_op_type template arg.
7401 (class unop): Ditto.
7402 (class widen_binop): Ditto.
7403 (class widen_binop_fp): Ditto.
7404 (class reverse_binop): Ditto.
7405 (class vfmacc): Ditto.
7406 (class vfnmsac): Ditto.
7407 (class vfmadd): Ditto.
7408 (class vfnmsub): Ditto.
7409 (class vfnmacc): Ditto.
7410 (class vfmsac): Ditto.
7411 (class vfnmadd): Ditto.
7412 (class vfmsub): Ditto.
7413 (class vfwmacc): Ditto.
7414 (class vfwnmacc): Ditto.
7415 (class vfwmsac): Ditto.
7416 (class vfwnmsac): Ditto.
7417 (class float_misc): Ditto.
7419 2023-08-24 Andrew Pinski <apinski@marvell.com>
7421 PR tree-optimization/111109
7422 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
7423 Add check to make sure cmp and icmp are inverse.
7425 2023-08-24 Andrew Pinski <apinski@marvell.com>
7427 PR tree-optimization/95929
7428 * match.pd (convert?(-a)): New pattern
7429 for 1bit integer types.
7431 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7434 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7436 * common/config/i386/cpuinfo.h (get_available_features):
7437 Add avx10_set and version and detect avx10.1.
7438 (cpu_indicator_init): Handle avx10.1-512.
7439 * common/config/i386/i386-common.cc
7440 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
7441 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
7442 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
7443 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
7444 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
7445 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
7447 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7448 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
7449 FEATURE_AVX10_512BIT.
7450 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7451 AVX10_512BIT, AVX10_1 and AVX10_1_512.
7452 * config/i386/constraints.md (Yk): Add AVX10_1.
7455 * config/i386/cpuid.h (bit_AVX10): New.
7456 (bit_AVX10_256): Ditto.
7457 (bit_AVX10_512): Ditto.
7458 * config/i386/i386-c.cc (ix86_target_macros_internal):
7459 Define AVX10_512BIT and AVX10_1.
7460 * config/i386/i386-isa.def
7461 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
7462 (AVX10_1): Add DEF_PTA(AVX10_1).
7463 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
7464 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
7466 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
7467 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
7468 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
7469 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
7470 (ix86_conditional_register_usage): Ditto.
7471 (ix86_hard_regno_mode_ok): Ditto.
7472 (ix86_rtx_costs): Ditto.
7473 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
7474 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
7476 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
7477 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
7478 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
7481 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7484 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7486 * common/config/i386/i386-common.cc
7487 (ix86_check_avx10): New function to check isa_flags and
7488 isa_flags_explicit to emit warning when AVX10 is enabled
7490 (ix86_check_avx512): New function to check isa_flags and
7491 isa_flags_explicit to emit warning when AVX512 is enabled
7493 (ix86_handle_option): Do not change the flags when warning
7495 * config/i386/driver-i386.cc (host_detect_local_cpu):
7496 Do not append -mno-avx10.1 for -march=native.
7498 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7501 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7503 * common/config/i386/i386-common.cc
7504 (ix86_check_avx10_vector_width): New function to check isa_flags
7505 to emit a warning when there is a conflict in AVX10 options for
7507 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
7508 * config/i386/driver-i386.cc (host_detect_local_cpu):
7509 Do not append -mno-avx10-max-512bit for -march=native.
7511 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7514 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7516 * config/i386/avx512vldqintrin.h: Remove target attribute.
7517 * config/i386/i386-builtin.def (BDESC):
7518 Add OPTION_MASK_ISA2_AVX10_1.
7519 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
7520 * config/i386/i386-expand.cc
7521 (ix86_check_builtin_isa_match): Ditto.
7522 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
7523 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
7524 and avx10_1_or_avx512vl.
7525 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
7526 (VF1_128_256VLDQ_AVX10_1): Ditto.
7527 (VI8_AVX512VLDQ_AVX10_1): Ditto.
7528 (<sse>_andnot<mode>3<mask_name>):
7529 Add TARGET_AVX10_1 and change isa attr from avx512dq to
7530 avx10_1_or_avx512dq.
7531 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
7532 avx512vl to avx10_1_or_avx512vl.
7533 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
7534 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
7535 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
7537 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
7539 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
7540 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
7541 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
7543 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
7544 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
7545 Remove target check.
7546 (avx512dq_mul<mode>3<mask_name>): Ditto.
7547 (*avx512dq_mul<mode>3<mask_name>): Ditto.
7548 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
7549 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
7550 Remove target check.
7551 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
7552 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
7553 Remove target check.
7554 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
7555 (mask_avx512vl_condition): Ditto.
7558 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7561 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7563 * config/i386/avx512vldqintrin.h: Remove target attribute.
7564 * config/i386/i386-builtin.def (BDESC):
7565 Add OPTION_MASK_ISA2_AVX10_1.
7566 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
7567 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
7568 (VI48_AVX512VLDQ_AVX10_1): Ditto.
7569 (VF2_AVX512VL): Remove.
7570 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
7572 (*<code><mode>3<mask_name>): Change isa attribute to
7573 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
7574 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
7575 to avx10_1_or_avx512vl.
7576 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
7577 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
7578 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
7580 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
7581 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
7582 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
7584 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
7585 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
7586 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
7587 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
7588 (float<floatunssuffix>v4div4sf2<mask_name>):
7590 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
7591 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
7592 (float<floatunssuffix>v2div2sf2): Ditto.
7593 (float<floatunssuffix>v2div2sf2_mask): Ditto.
7594 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
7595 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
7596 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
7597 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
7598 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
7599 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
7600 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
7601 Change when constraint is enabled.
7603 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7606 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
7608 * config/i386/avx512vldqintrin.h: Remove target attribute.
7609 * config/i386/i386-builtin.def (BDESC):
7610 Add OPTION_MASK_ISA2_AVX10_1.
7611 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
7612 (VFH_AVX512VLDQ_AVX10_1): Ditto.
7613 (VF1_AVX512VLDQ_AVX10_1): Ditto.
7614 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
7615 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
7616 (vec_pack<floatprefix>_float_<mode>): Change iterator to
7617 VI8_AVX512VLDQ_AVX10_1. Remove target check.
7618 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
7619 VF1_AVX512VLDQ_AVX10_1. Remove target check.
7620 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
7621 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
7622 (avx512vl_vextractf128<mode>): Change iterator to
7623 VI48F_256_DQVL_AVX10_1. Remove target check.
7624 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
7625 (vec_extract_hi_<mode>): Ditto.
7626 (avx512vl_vinsert<mode>): Ditto.
7627 (vec_set_lo_<mode><mask_name>): Ditto.
7628 (vec_set_hi_<mode><mask_name>): Ditto.
7629 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
7630 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
7631 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
7632 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
7633 * config/i386/subst.md (mask_avx512dq_condition): Add
7635 (mask_scalar_merge): Ditto.
7637 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
7640 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
7643 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
7646 2023-08-24 Richard Biener <rguenther@suse.de>
7649 * dwarf2out.cc (prune_unused_types_walk): Handle
7650 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
7651 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
7652 and DW_TAG_dynamic_type as to only output them when referenced.
7654 2023-08-24 liuhongt <hongtao.liu@intel.com>
7656 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
7659 2023-08-24 liuhongt <hongtao.liu@intel.com>
7661 * common/config/i386/i386-common.cc (processor_names): Add new
7662 member graniterapids-s and arrowlake-s.
7663 * config/i386/i386-options.cc (processor_alias_table): Update
7664 table with PROCESSOR_ARROWLAKE_S and
7665 PROCESSOR_GRANITERAPIDS_D.
7666 (m_GRANITERAPID_D): New macro.
7667 (m_ARROWLAKE_S): Ditto.
7668 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
7669 (processor_cost_table): Add icelake_cost for
7670 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
7671 PROCESSOR_ARROWLAKE_S.
7672 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
7674 * config/i386/i386.h (enum processor_type): Add new member
7675 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
7676 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
7677 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
7679 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
7681 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
7682 to help simplify code further.
7684 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
7686 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
7687 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
7688 Initialize using a range instead of value and edge.
7689 (phi_group::calculate_using_modifier): Use initializer value and
7690 process for relations after trying for iteration convergence.
7691 (phi_group::refine_using_relation): Use initializer range.
7692 (phi_group::dump): Rework the dump output.
7693 (phi_analyzer::process_phi): Allow multiple constant initilizers.
7694 Dump groups immediately as created.
7695 (phi_analyzer::dump): Tweak output.
7696 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
7697 (phi_group::initial_value): Delete.
7698 (phi_group::refine_using_relation): Adjust prototype.
7699 (phi_group::m_initial_value): Delete.
7700 (phi_group::m_initial_edge): Delete.
7701 (phi_group::m_vr): Use int_range_max.
7702 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
7704 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
7706 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
7707 no group was created.
7708 (phi_analyzer::process_phi): Do not create groups of one phi node.
7710 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
7712 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
7713 CODE, CMP_CODE and BIT_CODE arguments.
7714 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
7715 (aarch64_gen_ccmp_next): Likewise.
7716 * doc/tm.texi: Regenerated.
7718 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
7720 * coretypes.h (rtx_code): Add forward declaration.
7721 * rtl.h (rtx_code): Make compatible with forward declaration.
7723 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
7726 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
7727 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
7728 DWIH mode iterator. Disable (=&r,m,m) alternative for
7730 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
7731 alternative for 32-bit targets.
7733 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
7735 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
7736 appropriate type attribute.
7738 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
7740 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
7741 (*copysign<mode>_neg): Ditto.
7742 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
7743 (<optab><mode>2): Ditto.
7744 (cond_<optab><mode>): New.
7745 (cond_len_<optab><mode>): Ditto.
7746 * config/riscv/riscv-protos.h (enum insn_type): New.
7747 (expand_cond_len_unop): New helper func.
7748 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
7749 (expand_cond_len_unop): New helper func.
7751 2023-08-23 Jan Hubicka <jh@suse.cz>
7753 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
7754 (should_duplicate_loop_header_p): Fix return value for static exits.
7755 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
7757 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
7759 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
7760 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
7761 and update the final nest accordingly.
7763 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
7765 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
7766 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
7767 and update the final nest accordingly.
7769 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
7771 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
7772 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
7773 gvec_oprnds with auto_delete_vec.
7775 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7777 * config/riscv/riscv-vsetvl.cc
7778 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
7780 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7782 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
7784 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
7786 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7788 * config/riscv/vector.md: Add attribute.
7790 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7792 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
7793 (vector_infos_manager::all_same_ratio_p): Ditto.
7794 (vector_infos_manager::all_same_avl_p): Ditto.
7795 (pass_vsetvl::refine_vsetvls): Ditto.
7796 (pass_vsetvl::cleanup_vsetvls): Ditto.
7797 (pass_vsetvl::commit_vsetvls): Ditto.
7798 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
7799 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
7800 (pass_vsetvl::compute_probabilities): Ditto.
7802 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7804 * config/riscv/t-riscv: Add riscv-vsetvl.def
7806 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
7808 * config/riscv/riscv.opt: Add --param names
7809 riscv-autovec-preference and riscv-autovec-lmul
7811 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
7813 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
7815 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
7817 * tree-core.h (enum omp_clause_defaultmap_kind): Add
7818 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
7819 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
7820 * tree-pretty-print.cc (dump_omp_clause): Likewise.
7822 2023-08-22 Jakub Jelinek <jakub@redhat.com>
7825 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
7826 types aren't supported in C++.
7828 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7830 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
7831 * internal-fn.cc (fold_len_extract_direct): Ditto.
7832 (expand_fold_len_extract_optab_fn): Ditto.
7833 (direct_fold_len_extract_optab_supported_p): Ditto.
7834 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
7835 * optabs.def (OPTAB_D): Ditto.
7837 2023-08-22 Richard Biener <rguenther@suse.de>
7839 * tree-vect-stmts.cc (vectorizable_store): Do not bump
7840 DR_GROUP_STORE_COUNT here. Remove early out.
7841 (vect_transform_stmt): Only call vectorizable_store on
7842 the last element of an interleaving chain.
7844 2023-08-22 Richard Biener <rguenther@suse.de>
7846 PR tree-optimization/94864
7847 PR tree-optimization/94865
7848 PR tree-optimization/93080
7849 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
7850 for vector insertion from vector extraction.
7852 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7853 Kewen.Lin <linkw@linux.ibm.com>
7855 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
7856 (vectorizable_live_operation): Add live vectorization for length loop
7859 2023-08-22 David Malcolm <dmalcolm@redhat.com>
7862 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
7864 2023-08-22 Pan Li <pan2.li@intel.com>
7866 * config/riscv/riscv-vector-builtins-bases.cc
7867 (vfwredusum_frm_obj): New declaration.
7869 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7870 * config/riscv/riscv-vector-builtins-functions.def
7871 (vfwredusum_frm): New intrinsic function def.
7873 2023-08-21 David Faust <david.faust@oracle.com>
7875 * config/bpf/bpf.md (neg): Second operand must be a register.
7877 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
7879 * config/riscv/bitmanip.md: Added bitmanip type to insns
7880 that are missing types.
7882 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
7884 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
7887 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
7889 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
7890 Fix format specifier.
7892 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
7894 * value-range.cc (frange::union_nans): Return false if nothing
7896 (range_tests_floats): New test.
7898 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
7900 PR tree-optimization/111048
7901 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
7903 (fold_vec_perm_cst): Remove workaround and again call
7904 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
7905 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
7907 2023-08-21 Richard Biener <rguenther@suse.de>
7909 PR tree-optimization/111082
7910 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
7911 pun operations that can overflow.
7913 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7915 * lcm.cc (compute_antinout_edge): Export as global use.
7916 (compute_earliest): Ditto.
7917 (compute_rev_insert_delete): Ditto.
7918 * lcm.h (compute_antinout_edge): Ditto.
7919 (compute_earliest): Ditto.
7921 2023-08-21 Richard Biener <rguenther@suse.de>
7923 PR tree-optimization/111070
7924 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
7925 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
7927 2023-08-21 Andrew Pinski <apinski@marvell.com>
7929 PR tree-optimization/111002
7930 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
7932 2023-08-21 liuhongt <hongtao.liu@intel.com>
7934 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
7936 * common/config/i386/i386-common.cc (alias_table): Support
7937 -march=gracemont as an alias of -march=alderlake.
7939 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
7941 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
7942 instead of src in the call to ix86_expand_sse_cmp.
7943 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
7944 force operands[1] to a register.
7945 (<any_extend:insn>v4hiv4si2): Ditto.
7946 (<any_extend:insn>v2siv2di2): Ditto.
7948 2023-08-20 Andrew Pinski <apinski@marvell.com>
7950 PR tree-optimization/111006
7951 PR tree-optimization/110986
7952 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
7954 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
7957 * Makefile.in: improve error message when /usr/include is
7960 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
7962 PR middle-end/111017
7963 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
7964 to expand_omp_build_cond for 'factor != 0' condition, resulting
7965 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
7967 2023-08-19 Guo Jie <guojie@loongson.cn>
7968 Lulu Cheng <chenglulu@loongson.cn>
7970 * config/loongarch/t-loongarch: Add loongarch-driver.h into
7971 TM_H. Add loongarch-def.h and loongarch-tune.h into
7974 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
7977 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
7978 Also handle V2QImode.
7979 (ix86_expand_sse_extend): New function.
7980 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
7981 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
7982 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
7983 (<any_extend:insn>v2hiv2si2): Ditto.
7984 (<any_extend:insn>v2qiv2hi2): Ditto.
7985 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
7986 (<any_extend:insn>v4hiv4si2): Ditto.
7987 (<any_extend:insn>v2siv2di2): Ditto.
7989 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
7992 * value-range.cc (irange::union_bitmask): Return FALSE if updated
7993 bitmask is semantically equivalent to the original mask.
7994 (irange::intersect_bitmask): Same.
7995 (irange::get_bitmask): Add comment.
7997 2023-08-18 Richard Biener <rguenther@suse.de>
7999 PR tree-optimization/111019
8000 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
8001 also scrap base and offset in case the ref is indirect.
8003 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
8005 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
8007 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8010 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
8012 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8014 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
8016 (vectorizable_store): ... here.
8018 2023-08-18 Richard Biener <rguenther@suse.de>
8020 PR tree-optimization/111048
8021 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
8024 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8027 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8030 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8032 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
8033 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
8034 and update the final nest accordingly.
8036 2023-08-18 Andrew Pinski <apinski@marvell.com>
8038 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
8039 cond_len_neg and cond_len_one_cmpl.
8041 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8043 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
8044 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
8045 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
8046 (*local_pic_load_32d<ANYF:mode>): Ditto.
8047 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
8048 (*local_pic_store<ANYF:mode>): Ditto.
8049 (*local_pic_store<ANYLSF:mode>): Ditto.
8050 (*local_pic_store_32d<ANYF:mode>): Ditto.
8051 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
8053 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8054 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8056 * config/riscv/predicates.md (vector_const_0_operand): New.
8057 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
8059 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8061 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
8064 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
8066 PR tree-optimization/111009
8067 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
8069 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
8071 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
8072 slots_num initialization from here ...
8073 (lra_spill): ... to here before the 1st call of
8074 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
8077 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8080 * doc/invoke.texi (Option Summary): Mention
8081 -Wcompare-distinct-pointer-types under `Warning Options'.
8082 (Warning Options): Document -Wcompare-distinct-pointer-types.
8084 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
8086 * recog.cc (memory_address_addr_space_p): Mark possibly unused
8089 2023-08-17 Richard Biener <rguenther@suse.de>
8091 PR tree-optimization/111039
8092 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
8093 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
8095 2023-08-17 Alex Coplan <alex.coplan@arm.com>
8097 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
8099 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8102 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
8103 `naked' function attribute.
8104 (bpf_warn_func_return): New function.
8105 (TARGET_WARN_FUNC_RETURN): Define.
8106 (bpf_expand_prologue): Add preventive comment.
8107 (bpf_expand_epilogue): Likewise.
8108 * doc/extend.texi (BPF Function Attributes): Document the `naked'
8111 2023-08-17 Richard Biener <rguenther@suse.de>
8113 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
8114 !needs_fold_left_reduction_p to decide whether we can
8115 handle the reduction with association.
8116 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
8117 reductions perform all arithmetic in an unsigned type.
8119 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8121 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
8123 * configure: Regenerate.
8125 2023-08-17 Pan Li <pan2.li@intel.com>
8127 * config/riscv/riscv-vector-builtins-bases.cc
8128 (widen_freducop): Add frm_opt_type template arg.
8129 (vfwredosum_frm_obj): New declaration.
8131 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8132 * config/riscv/riscv-vector-builtins-functions.def
8133 (vfwredosum_frm): New intrinsic function def.
8135 2023-08-17 Pan Li <pan2.li@intel.com>
8137 * config/riscv/riscv-vector-builtins-bases.cc
8138 (vfredosum_frm_obj): New declaration.
8140 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8141 * config/riscv/riscv-vector-builtins-functions.def
8142 (vfredosum_frm): New intrinsic function def.
8144 2023-08-17 Pan Li <pan2.li@intel.com>
8146 * config/riscv/riscv-vector-builtins-bases.cc
8147 (class freducop): Add frm_op_type template arg.
8148 (vfredusum_frm_obj): New declaration.
8150 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8151 * config/riscv/riscv-vector-builtins-functions.def
8152 (vfredusum_frm): New intrinsic function def.
8153 * config/riscv/riscv-vector-builtins-shapes.cc
8154 (struct reduc_alu_frm_def): New class for frm shape.
8155 (SHAPE): New declaration.
8156 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8158 2023-08-17 Pan Li <pan2.li@intel.com>
8160 * config/riscv/riscv-vector-builtins-bases.cc
8161 (class vfncvt_f): Add frm_op_type template arg.
8162 (vfncvt_f_frm_obj): New declaration.
8164 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8165 * config/riscv/riscv-vector-builtins-functions.def
8166 (vfncvt_f_frm): New intrinsic function def.
8168 2023-08-17 Pan Li <pan2.li@intel.com>
8170 * config/riscv/riscv-vector-builtins-bases.cc
8171 (vfncvt_xu_frm_obj): New declaration.
8173 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8174 * config/riscv/riscv-vector-builtins-functions.def
8175 (vfncvt_xu_frm): New intrinsic function def.
8177 2023-08-17 Pan Li <pan2.li@intel.com>
8179 * config/riscv/riscv-vector-builtins-bases.cc
8180 (class vfncvt_x): Add frm_op_type template arg.
8181 (BASE): New declaration.
8182 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8183 * config/riscv/riscv-vector-builtins-functions.def
8184 (vfncvt_x_frm): New intrinsic function def.
8185 * config/riscv/riscv-vector-builtins-shapes.cc
8186 (struct narrow_alu_frm_def): New shape function for frm.
8187 (SHAPE): New declaration.
8188 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8190 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8192 * config/i386/avx512vldqintrin.h: Remove target attribute.
8193 * config/i386/i386-builtin.def (BDESC):
8194 Add OPTION_MASK_ISA2_AVX10_1.
8195 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8196 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8197 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8198 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8199 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8200 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8201 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8202 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8203 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8204 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8205 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8206 (avx512vl_vextractf128<mode>): Change iterator to
8207 VI48F_256_DQVL_AVX10_1. Remove target check.
8208 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8209 (vec_extract_hi_<mode>): Ditto.
8210 (avx512vl_vinsert<mode>): Ditto.
8211 (vec_set_lo_<mode><mask_name>): Ditto.
8212 (vec_set_hi_<mode><mask_name>): Ditto.
8213 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
8214 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
8215 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
8216 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8217 * config/i386/subst.md (mask_avx512dq_condition): Add
8219 (mask_scalar_merge): Ditto.
8221 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8223 * config/i386/avx512vldqintrin.h: Remove target attribute.
8224 * config/i386/i386-builtin.def (BDESC):
8225 Add OPTION_MASK_ISA2_AVX10_1.
8226 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
8227 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
8228 (VI48_AVX512VLDQ_AVX10_1): Ditto.
8229 (VF2_AVX512VL): Remove.
8230 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
8232 (*<code><mode>3<mask_name>): Change isa attribute to
8233 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
8234 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
8235 to avx10_1_or_avx512vl.
8236 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
8237 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8238 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
8240 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
8241 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8242 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
8244 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
8245 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8246 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
8247 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8248 (float<floatunssuffix>v4div4sf2<mask_name>):
8250 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8251 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8252 (float<floatunssuffix>v2div2sf2): Ditto.
8253 (float<floatunssuffix>v2div2sf2_mask): Ditto.
8254 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
8255 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
8256 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
8257 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
8258 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8259 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
8260 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
8261 Change when constraint is enabled.
8263 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8266 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
8267 (second_sew_less_than_first_sew_p): Fix bug.
8268 (first_sew_less_than_second_sew_p): Ditto.
8270 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8272 * config/i386/avx512vldqintrin.h: Remove target attribute.
8273 * config/i386/i386-builtin.def (BDESC):
8274 Add OPTION_MASK_ISA2_AVX10_1.
8275 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
8276 * config/i386/i386-expand.cc
8277 (ix86_check_builtin_isa_match): Ditto.
8278 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
8279 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
8280 and avx10_1_or_avx512vl.
8281 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
8282 (VF1_128_256VLDQ_AVX10_1): Ditto.
8283 (VI8_AVX512VLDQ_AVX10_1): Ditto.
8284 (<sse>_andnot<mode>3<mask_name>):
8285 Add TARGET_AVX10_1 and change isa attr from avx512dq to
8286 avx10_1_or_avx512dq.
8287 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
8288 avx512vl to avx10_1_or_avx512vl.
8289 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
8290 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8291 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8293 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8295 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
8296 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8297 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8299 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8300 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
8301 Remove target check.
8302 (avx512dq_mul<mode>3<mask_name>): Ditto.
8303 (*avx512dq_mul<mode>3<mask_name>): Ditto.
8304 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8305 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
8306 Remove target check.
8307 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8308 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
8309 Remove target check.
8310 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
8311 (mask_avx512vl_condition): Ditto.
8314 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8316 * common/config/i386/i386-common.cc
8317 (ix86_check_avx10_vector_width): New function to check isa_flags
8318 to emit a warning when there is a conflict in AVX10 options for
8320 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
8321 * config/i386/driver-i386.cc (host_detect_local_cpu):
8322 Do not append -mno-avx10-max-512bit for -march=native.
8324 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8326 * common/config/i386/i386-common.cc
8327 (ix86_check_avx10): New function to check isa_flags and
8328 isa_flags_explicit to emit warning when AVX10 is enabled
8330 (ix86_check_avx512): New function to check isa_flags and
8331 isa_flags_explicit to emit warning when AVX512 is enabled
8333 (ix86_handle_option): Do not change the flags when warning
8335 * config/i386/driver-i386.cc (host_detect_local_cpu):
8336 Do not append -mno-avx10.1 for -march=native.
8338 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8340 * common/config/i386/cpuinfo.h (get_available_features):
8341 Add avx10_set and version and detect avx10.1.
8342 (cpu_indicator_init): Handle avx10.1-512.
8343 * common/config/i386/i386-common.cc
8344 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
8345 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
8346 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
8347 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
8348 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
8349 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
8351 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8352 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
8353 FEATURE_AVX10_512BIT.
8354 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8355 AVX10_512BIT, AVX10_1 and AVX10_1_512.
8356 * config/i386/constraints.md (Yk): Add AVX10_1.
8359 * config/i386/cpuid.h (bit_AVX10): New.
8360 (bit_AVX10_256): Ditto.
8361 (bit_AVX10_512): Ditto.
8362 * config/i386/i386-c.cc (ix86_target_macros_internal):
8363 Define AVX10_512BIT and AVX10_1.
8364 * config/i386/i386-isa.def
8365 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
8366 (AVX10_1): Add DEF_PTA(AVX10_1).
8367 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
8368 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
8370 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
8371 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
8372 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
8373 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
8374 (ix86_conditional_register_usage): Ditto.
8375 (ix86_hard_regno_mode_ok): Ditto.
8376 (ix86_rtx_costs): Ditto.
8377 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
8378 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
8380 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
8381 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
8382 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
8385 2023-08-17 Sergei Trofimovich <siarheit@google.com>
8387 * flag-types.h (vrp_mode): Remove unused.
8389 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
8391 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
8394 2023-08-17 Andrew Pinski <apinski@marvell.com>
8396 * internal-fn.def (COND_NOT): New internal function.
8397 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
8399 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
8400 into conditional not.
8401 * optabs.def (cond_one_cmpl): New optab.
8402 (cond_len_one_cmpl): Likewise.
8404 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
8406 PR rtl-optimization/110254
8407 * ira-color.cc (improve_allocation): Update array
8408 allocated_hard_reg_p.
8410 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
8412 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
8413 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
8414 (lra_update_fp2sp_elimination): Ditto.
8415 (update_reg_eliminate): Adjust spill_pseudos call.
8416 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
8417 in lra_update_fp2sp_elimination.
8419 2023-08-16 Richard Ball <richard.ball@arm.com>
8421 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
8422 * config/aarch64/aarch64-tune.md: Regenerate.
8423 * doc/invoke.texi: Document Cortex-A720 CPU.
8425 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
8427 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
8429 (<u>avg<v_double_trunc>3_ceil): Ditto.
8430 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
8433 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
8435 * internal-fn.cc (vec_extract_direct): Change type argument
8437 (expand_vec_extract_optab_fn): Call convert_optab_fn.
8438 (direct_vec_extract_optab_supported_p): Use
8439 convert_optab_supported_p.
8441 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
8442 Richard Sandiford <richard.sandiford@arm.com>
8444 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
8445 (valid_mask_for_fold_vec_perm_cst_p): New function.
8446 (fold_vec_perm_cst): Likewise.
8447 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
8448 (test_fold_vec_perm_cst): New namespace.
8449 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
8450 (test_fold_vec_perm_cst::validate_res): Likewise.
8451 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
8452 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
8453 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
8454 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
8455 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
8456 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
8457 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
8458 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
8459 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
8460 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
8461 (test_fold_vec_perm_cst::test): Likewise.
8462 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
8464 2023-08-16 Pan Li <pan2.li@intel.com>
8466 * config/riscv/riscv-vector-builtins-bases.cc
8467 (BASE): New declaration.
8468 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8469 * config/riscv/riscv-vector-builtins-functions.def
8470 (vfwcvt_xu_frm): New intrinsic function def.
8472 2023-08-16 Pan Li <pan2.li@intel.com>
8474 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
8476 2023-08-16 Pan Li <pan2.li@intel.com>
8478 * config/riscv/riscv-vector-builtins-bases.cc
8479 (BASE): New declaration.
8480 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8481 * config/riscv/riscv-vector-builtins-functions.def
8482 (vfwcvt_x_frm): New intrinsic function def.
8484 2023-08-16 Pan Li <pan2.li@intel.com>
8486 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
8487 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8488 * config/riscv/riscv-vector-builtins-functions.def
8489 (vfcvt_f_frm): New intrinsic function def.
8491 2023-08-16 Pan Li <pan2.li@intel.com>
8493 * config/riscv/riscv-vector-builtins-bases.cc
8494 (BASE): New declaration.
8495 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8496 * config/riscv/riscv-vector-builtins-functions.def
8497 (vfcvt_xu_frm): New intrinsic function def..
8499 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
8502 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
8503 extract when the element is 7 on BE while 8 on LE for byte or 3 on
8504 BE while 4 on LE for halfword.
8506 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
8509 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
8511 (vsx_extract_v4si): New expand for V4SI extraction.
8512 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
8513 word 1 from BE order.
8514 (*mfvsrwz): New insn pattern for mfvsrwz.
8515 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
8516 word 1 from BE order.
8517 (*vsx_extract_si): Remove.
8518 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
8521 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8523 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
8525 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
8526 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
8527 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
8528 (expand_lanes_load_store): New function.
8529 * config/riscv/vector-iterators.md: New iterator.
8531 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8533 * internal-fn.cc (internal_load_fn_p): Apply
8534 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
8535 (internal_store_fn_p): Ditto.
8536 (internal_fn_len_index): Ditto.
8537 (internal_fn_mask_index): Ditto.
8538 (internal_fn_stored_value_index): Ditto.
8539 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
8540 (vect_load_lanes_supported): Ditto.
8541 * tree-vect-loop.cc: Ditto.
8542 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
8543 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
8544 (get_group_load_store_type): Ditto.
8545 (vectorizable_store): Ditto.
8546 (vectorizable_load): Ditto.
8547 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
8548 (vect_load_lanes_supported): Ditto.
8550 2023-08-16 Pan Li <pan2.li@intel.com>
8552 * config/riscv/riscv-vector-builtins-bases.cc
8553 (enum frm_op_type): New type for frm.
8554 (BASE): New declaration.
8555 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8556 * config/riscv/riscv-vector-builtins-functions.def
8557 (vfcvt_x_frm): New intrinsic function def.
8559 2023-08-16 liuhongt <hongtao.liu@intel.com>
8561 * config/i386/i386-builtins.cc
8562 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
8563 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
8564 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
8565 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
8566 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
8567 for use_scatter_8parts
8568 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
8569 (TARGET_USE_GATHER_8PARTS): .. this.
8570 (TARGET_USE_SCATTER): Rename to ..
8571 (TARGET_USE_SCATTER_8PARTS): .. this.
8572 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
8573 (X86_TUNE_USE_GATHER_8PARTS): .. this.
8574 (X86_TUNE_USE_SCATTER): Rename to
8575 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
8576 * config/i386/i386.opt: Add new options mgather, mscatter.
8578 2023-08-16 liuhongt <hongtao.liu@intel.com>
8580 * config/i386/i386-options.cc (m_GDS): New macro.
8581 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
8583 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
8584 (X86_TUNE_USE_GATHER): Ditto.
8586 2023-08-16 liuhongt <hongtao.liu@intel.com>
8588 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
8589 vmovsd when moving DFmode between SSE_REGS.
8590 (movhi_internal): Generate vmovdqa instead of vmovsh when
8591 moving HImode between SSE_REGS.
8592 (mov<mode>_internal): Use vmovaps instead of vmovsh when
8593 moving HF/BFmode between SSE_REGS.
8595 2023-08-15 David Faust <david.faust@oracle.com>
8597 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
8599 2023-08-15 David Faust <david.faust@oracle.com>
8602 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
8603 for any mode 32-bits or smaller, not just SImode.
8605 2023-08-15 Martin Jambor <mjambor@suse.cz>
8609 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
8610 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
8611 (ipcp_transform_function): Do not deallocate transformation info.
8612 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
8614 (vn_reference_lookup_2): When hitting default-def vuse, query
8615 IPA-CP transformation info for any known constants.
8617 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
8618 Thomas Schwinge <thomas@codesourcery.com>
8620 * gimplify.cc (oacc_region_type_name): New function.
8621 (oacc_default_clause): If no 'default' clause appears on this
8622 compute construct, see if one appears on a lexically containing
8624 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
8625 ctx->oacc_default_clause_ctx to current context.
8627 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8630 * config/riscv/predicates.md: Fix predicate.
8632 2023-08-15 Richard Biener <rguenther@suse.de>
8634 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
8635 slp_inst_kind_ctor handling.
8636 (vect_analyze_slp): Simplify.
8637 (vect_build_slp_instance): Dump when we analyze a CTOR.
8638 (vect_slp_check_for_constructors): Rename to ...
8639 (vect_slp_check_for_roots): ... this. Register a
8640 slp_root for CONSTRUCTORs instead of shoving them to
8641 the set of grouped stores.
8642 (vect_slp_analyze_bb_1): Adjust.
8644 2023-08-15 Richard Biener <rguenther@suse.de>
8646 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
8648 (_slp_instance::remain_defs): ... this.
8649 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
8650 (SLP_INSTANCE_REMAIN_DEFS): ... this.
8651 (slp_root::remain): New.
8652 (slp_root::slp_root): Adjust.
8653 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
8654 (vect_build_slp_instance): Get extra remain parameter,
8655 adjust former handling of a cut off stmt.
8656 (vect_analyze_slp_instance): Adjust.
8657 (vect_analyze_slp): Likewise.
8658 (_bb_vec_info::~_bb_vec_info): Likewise.
8659 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
8660 (vect_slp_check_for_constructors): Handle non-internal
8661 defs as remain defs of a reduction.
8662 (vectorize_slp_instance_root_stmt): Adjust.
8664 2023-08-15 Richard Biener <rguenther@suse.de>
8666 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
8667 (canonicalize_loop_induction_variables): Use find_loop_location.
8669 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
8672 * config/cris/cris-protos.h: Revert recent change.
8673 * config/cris/cris.cc (cris_legitimate_address_p): Remove
8674 code_helper unused parameter.
8675 (cris_legitimate_address_p_hook): New wrapper function.
8676 (TARGET_LEGITIMATE_ADDRESS_P): Change to
8677 cris_legitimate_address_p_hook.
8679 2023-08-15 Richard Biener <rguenther@suse.de>
8681 PR tree-optimization/110963
8682 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
8683 a PHI node when the expression is available on all edges
8684 and we insert at most one copy from a constant.
8686 2023-08-15 Richard Biener <rguenther@suse.de>
8688 PR tree-optimization/110991
8689 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
8690 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
8691 that will end up constant.
8693 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
8696 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
8698 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
8700 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
8701 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
8702 and update the final nest accordingly.
8704 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
8706 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
8709 2023-08-15 Pan Li <pan2.li@intel.com>
8711 * mode-switching.cc (create_pre_exit): Add SET insn check.
8713 2023-08-15 Pan Li <pan2.li@intel.com>
8715 * config/riscv/riscv-vector-builtins-bases.cc
8716 (class vfrec7_frm): New class for frm.
8717 (vfrec7_frm_obj): New declaration.
8719 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8720 * config/riscv/riscv-vector-builtins-functions.def
8721 (vfrec7_frm): New intrinsic function definition.
8722 * config/riscv/vector-iterators.md
8723 (VFMISC): Remove VFREC7.
8725 (float_insn_type): Ditto.
8726 (VFMISC_FRM): New int iterator.
8727 (misc_frm_op): New op for frm.
8728 (float_frm_insn_type): New type for frm.
8729 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
8730 New pattern for misc frm.
8732 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
8734 * lra-constraints.cc (curr_insn_transform): Process output stack
8735 pointer reloads before emitting reload insns.
8737 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
8740 * doc/invoke.texi: Add documentation of
8741 fanalyzer-show-events-in-system-headers
8743 2023-08-14 Jan Hubicka <jh@suse.cz>
8745 PR gcov-profile/110988
8746 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
8748 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
8750 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
8751 Enable compressed builtins when ZC* extensions enabled.
8752 * config/riscv/riscv-shorten-memrefs.cc:
8753 Enable shorten_memrefs pass when ZC* extensions enabled.
8754 * config/riscv/riscv.cc (riscv_compressed_reg_p):
8755 Enable compressible registers when ZC* extensions enabled.
8756 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
8757 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
8758 (riscv_first_stack_step): Allow compression of the register saves
8759 without adding extra instructions.
8760 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
8761 to 16 bits when ZC* extensions enabled.
8763 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
8765 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
8766 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
8773 (TARGET_ZCA): New target.
8774 (TARGET_ZCB): Ditto.
8775 (TARGET_ZCE): Ditto.
8776 (TARGET_ZCF): Ditto.
8777 (TARGET_ZCD): Ditto.
8778 (TARGET_ZCMP): Ditto.
8779 (TARGET_ZCMT): Ditto.
8780 * config/riscv/riscv.opt: New target variable.
8782 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8785 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
8787 * genrecog.cc (print_nonbool_test): Fix type error of
8788 switch (SUBREG_BYTE (op))'.
8790 2023-08-14 Richard Biener <rguenther@suse.de>
8792 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
8794 2023-08-14 Pan Li <pan2.li@intel.com>
8796 * config/riscv/riscv-vector-builtins-bases.cc
8797 (class unop_frm): New class for frm.
8798 (vfsqrt_frm_obj): New declaration.
8800 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8801 * config/riscv/riscv-vector-builtins-functions.def
8802 (vfsqrt_frm): New intrinsic function definition.
8804 2023-08-14 Pan Li <pan2.li@intel.com>
8806 * config/riscv/riscv-vector-builtins-bases.cc
8807 (class vfwnmsac_frm): New class for frm.
8808 (vfwnmsac_frm_obj): New declaration.
8810 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8811 * config/riscv/riscv-vector-builtins-functions.def
8812 (vfwnmsac_frm): New intrinsic function definition.
8814 2023-08-14 Pan Li <pan2.li@intel.com>
8816 * config/riscv/riscv-vector-builtins-bases.cc
8817 (class vfwmsac_frm): New class for frm.
8818 (vfwmsac_frm_obj): New declaration.
8820 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8821 * config/riscv/riscv-vector-builtins-functions.def
8822 (vfwmsac_frm): New intrinsic function definition.
8824 2023-08-14 Pan Li <pan2.li@intel.com>
8826 * config/riscv/riscv-vector-builtins-bases.cc
8827 (class vfwnmacc_frm): New class for frm.
8828 (vfwnmacc_frm_obj): New declaration.
8830 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8831 * config/riscv/riscv-vector-builtins-functions.def
8832 (vfwnmacc_frm): New intrinsic function definition.
8834 2023-08-14 Cui, Lili <lili.cui@intel.com>
8836 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
8839 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
8841 * config/mmix/predicates.md (mmix_address_operand): Use
8842 lra_in_progress, not reload_in_progress.
8844 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
8846 * config/mmix/mmix.cc: Re-enable LRA.
8848 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
8850 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
8851 when lra_in_progress.
8853 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
8855 * config/mmix/mmix.cc: Disable LRA for MMIX.
8857 2023-08-14 Pan Li <pan2.li@intel.com>
8859 * config/riscv/riscv-vector-builtins-bases.cc
8860 (class vfwmacc_frm): New class for vfwmacc frm.
8861 (vfwmacc_frm_obj): New declaration.
8863 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8864 * config/riscv/riscv-vector-builtins-functions.def
8865 (vfwmacc_frm): Function definition for vfwmacc.
8866 * config/riscv/riscv-vector-builtins.cc
8867 (function_expander::use_widen_ternop_insn): Add frm support.
8869 2023-08-14 Pan Li <pan2.li@intel.com>
8871 * config/riscv/riscv-vector-builtins-bases.cc
8872 (class vfnmsub_frm): New class for vfnmsub frm.
8873 (vfnmsub_frm): New declaration.
8875 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8876 * config/riscv/riscv-vector-builtins-functions.def
8877 (vfnmsub_frm): New function declaration.
8879 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
8881 * lra-constraints.cc (curr_insn_transform): Set done_p up and
8882 check it on true after processing output stack pointer reload.
8884 2023-08-12 Jakub Jelinek <jakub@redhat.com>
8886 * Makefile.in (USER_H): Add stdckdint.h.
8887 * ginclude/stdckdint.h: New file.
8889 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8892 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
8894 2023-08-12 Patrick Palka <ppalka@redhat.com>
8896 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
8897 Delimit output with braces.
8899 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8902 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
8904 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8906 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
8907 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
8908 * config/riscv/vector.md: Ditto.
8910 2023-08-11 David Malcolm <dmalcolm@redhat.com>
8913 * doc/analyzer.texi (__analyzer_get_strlen): New.
8914 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
8916 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
8918 * config/rx/rx.md (subdi3): Fix test for borrow.
8920 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8922 PR middle-end/110989
8923 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
8924 (vectorizable_load): Ditto.
8926 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
8928 * config/bpf/bpf.md (allocate_stack): Define.
8929 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
8930 stack pointer register.
8931 (FIXED_REGISTERS): Adjust accordingly.
8932 (CALL_USED_REGISTERS): Likewise.
8933 (REG_CLASS_CONTENTS): Likewise.
8934 (REGISTER_NAMES): Likewise.
8935 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
8936 space for callee-saved registers.
8937 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
8938 (bpf_expand_epilogue): Do not restore callee-saved registers in
8941 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
8943 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
8944 about too many arguments if function is always inlined.
8946 2023-08-11 Patrick Palka <ppalka@redhat.com>
8948 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
8949 Don't call component_ref_field_offset if the RHS isn't a decl.
8951 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
8954 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
8956 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
8958 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
8959 (process_alt_operands): Set the flag.
8960 (curr_insn_transform): Modify stack pointer offsets if output
8961 stack pointer reload is generated.
8963 2023-08-11 Joseph Myers <joseph@codesourcery.com>
8965 * configure: Regenerate.
8967 2023-08-11 Richard Biener <rguenther@suse.de>
8969 PR tree-optimization/110979
8970 * tree-vect-loop.cc (vectorizable_reduction): For
8971 FOLD_LEFT_REDUCTION without target support make sure
8972 we don't need to honor signed zeros and sign dependent rounding.
8974 2023-08-11 Richard Biener <rguenther@suse.de>
8976 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
8977 subgraph entries. Dump the used vector size based on the
8978 SLP subgraph entry root vector type.
8980 2023-08-11 Pan Li <pan2.li@intel.com>
8982 * config/riscv/riscv-vector-builtins-bases.cc
8983 (class vfmsub_frm): New class for vfmsub frm.
8984 (vfmsub_frm): New declaration.
8986 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8987 * config/riscv/riscv-vector-builtins-functions.def
8988 (vfmsub_frm): New function declaration.
8990 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8992 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
8993 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
8994 (expand_partial_store_optab_fn): Ditto.
8995 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
8996 (MASK_LEN_STORE_LANES): Ditto.
8997 * optabs.def (OPTAB_CD): Ditto.
8999 2023-08-11 Pan Li <pan2.li@intel.com>
9001 * config/riscv/riscv-vector-builtins-bases.cc
9002 (class vfnmadd_frm): New class for vfnmadd frm.
9003 (vfnmadd_frm): New declaration.
9005 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9006 * config/riscv/riscv-vector-builtins-functions.def
9007 (vfnmadd_frm): New function declaration.
9009 2023-08-11 Drew Ross <drross@redhat.com>
9010 Jakub Jelinek <jakub@redhat.com>
9012 PR tree-optimization/109938
9013 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
9015 2023-08-11 Pan Li <pan2.li@intel.com>
9017 * config/riscv/riscv-vector-builtins-bases.cc
9018 (class vfmadd_frm): New class for vfmadd frm.
9019 (vfmadd_frm_obj): New declaration.
9021 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9022 * config/riscv/riscv-vector-builtins-functions.def
9023 (vfmadd_frm): New function definition.
9025 2023-08-11 Pan Li <pan2.li@intel.com>
9027 * config/riscv/riscv-vector-builtins-bases.cc
9028 (class vfnmsac_frm): New class for vfnmsac frm.
9029 (vfnmsac_frm_obj): New declaration.
9031 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9032 * config/riscv/riscv-vector-builtins-functions.def
9033 (vfnmsac_frm): New function definition.
9035 2023-08-11 Jakub Jelinek <jakub@redhat.com>
9037 * doc/extend.texi (Typeof): Document typeof_unqual
9038 and __typeof_unqual__.
9040 2023-08-11 Andrew Pinski <apinski@marvell.com>
9042 PR tree-optimization/110954
9043 * generic-match-head.cc (bitwise_inverted_equal_p): Add
9044 wascmp argument and set it accordingly.
9045 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
9046 wascmp argument to the macro.
9047 (gimple_bitwise_inverted_equal_p): Add
9048 wascmp argument and set it accordingly.
9049 * match.pd (`a & ~a`, `a ^| ~a`): Update call
9050 to bitwise_inverted_equal_p and handle wascmp case.
9051 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
9052 call to bitwise_inverted_equal_p and check to see
9053 if was !wascmp or if precision was 1.
9055 2023-08-11 Martin Uecker <uecker@tugraz.at>
9058 * doc/invoke.texi: Update.
9060 2023-08-11 Pan Li <pan2.li@intel.com>
9062 * config/riscv/riscv-vector-builtins-bases.cc
9063 (class vfmsac_frm): New class for vfmsac frm.
9064 (vfmsac_frm_obj): New declaration.
9066 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9067 * config/riscv/riscv-vector-builtins-functions.def
9068 (vfmsac_frm): New function definition
9070 2023-08-10 Jan Hubicka <jh@suse.cz>
9072 PR middle-end/110923
9073 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
9075 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
9077 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
9078 dependent on 'a' extension.
9079 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
9080 (TARGET_ZTSO): New target.
9081 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
9083 (riscv_memmodel_needs_amo_release): Add Ztso case.
9084 (riscv_print_operand): Add Ztso case for LR/SC annotations.
9085 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
9086 * config/riscv/riscv.opt: Add Ztso target variable.
9087 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
9089 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
9090 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
9091 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
9092 specific load/store/fence mappings.
9093 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
9094 specific load/store/fence mappings.
9096 2023-08-10 Jan Hubicka <jh@suse.cz>
9098 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
9101 2023-08-10 Jan Hubicka <jh@suse.cz>
9103 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
9105 2023-08-10 Jan Hubicka <jh@suse.cz>
9107 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
9108 handling of undefined values.
9110 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9113 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
9114 return virtual phis and return NULL if there is a virtual phi
9115 where the arguments from E0 and E1 edges aren't equal.
9117 2023-08-10 Richard Biener <rguenther@suse.de>
9119 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
9120 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
9122 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9125 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
9127 2023-08-10 Pan Li <pan2.li@intel.com>
9129 * config/riscv/riscv-vector-builtins-bases.cc
9130 (class vfnmacc_frm): New class for vfnmacc.
9131 (vfnmacc_frm_obj): New declaration.
9133 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9134 * config/riscv/riscv-vector-builtins-functions.def
9135 (vfnmacc_frm): New function definition.
9137 2023-08-10 Pan Li <pan2.li@intel.com>
9139 * config/riscv/riscv-vector-builtins-bases.cc
9140 (class vfmacc_frm): New class for vfmacc frm.
9141 (vfmacc_frm_obj): New declaration.
9143 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9144 * config/riscv/riscv-vector-builtins-functions.def
9145 (vfmacc_frm): New function definition.
9147 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9150 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
9152 2023-08-10 Richard Biener <rguenther@suse.de>
9154 * tree-vectorizer.h (vectorizable_live_operation): Remove
9155 gimple_stmt_iterator * argument.
9156 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
9157 Adjust plumbing around vect_get_loop_mask.
9158 (vect_analyze_loop_operations): Adjust.
9159 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
9160 (vect_bb_slp_mark_live_stmts): Likewise.
9161 (vect_schedule_slp_node): Likewise.
9162 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
9163 Remove gimple_stmt_iterator * argument.
9164 (vect_transform_stmt): Adjust.
9166 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9168 * config/riscv/vector-iterators.md: Add missing modes.
9170 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9173 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
9174 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
9176 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9179 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
9180 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
9183 2023-08-10 liuhongt <hongtao.liu@intel.com>
9186 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
9187 sanitize upper part of V4HFmode register with
9189 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
9191 (<insn>v2hf3): Ditto.
9193 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
9194 register with -fno-trapping-math.
9196 2023-08-10 Pan Li <pan2.li@intel.com>
9197 Kito Cheng <kito.cheng@sifive.com>
9199 * config/riscv/riscv-protos.h
9200 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
9201 (get_frm_mode): New declaration.
9202 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
9203 * config/riscv/riscv-vector-builtins.cc
9204 (function_expander::use_ternop_insn): Take care of frm reg.
9205 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
9206 (riscv_emit_frm_mode_set): Ditto.
9207 (riscv_emit_mode_set): Ditto.
9208 (riscv_frm_adjust_mode_after_call): Ditto.
9209 (riscv_frm_mode_needed): Ditto.
9210 (riscv_frm_mode_after): Ditto.
9211 (riscv_mode_entry): Ditto.
9212 (riscv_mode_exit): Ditto.
9213 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
9214 * config/riscv/vector.md
9215 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
9216 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
9218 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9220 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
9221 incorrect anticipate info.
9223 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
9225 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
9226 Remove 'Zve32d' from the version list.
9228 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
9230 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
9231 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
9232 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
9233 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
9235 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9237 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
9238 (mem_shadd_or_shadd_rtx_p): New function.
9240 2023-08-09 Andrew Pinski <apinski@marvell.com>
9242 PR tree-optimization/110937
9243 PR tree-optimization/100798
9244 * match.pd (`a ? ~b : b`): Handle this
9247 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
9249 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
9251 2023-08-09 Richard Ball <richard.ball@arm.com>
9253 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
9254 * config/aarch64/aarch64-tune.md: Regenerate.
9255 * doc/invoke.texi: Document Cortex-A520 CPU.
9257 2023-08-09 Carl Love <cel@us.ibm.com>
9259 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
9260 Move definitions to Altivec stanza.
9261 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
9264 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9267 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
9268 stepped vector support.
9270 2023-08-09 liuhongt <hongtao.liu@intel.com>
9272 * common/config/i386/cpuinfo.h (get_available_features):
9273 Rename local variable subleaf_level to max_subleaf_level.
9275 2023-08-09 Richard Biener <rguenther@suse.de>
9277 PR rtl-optimization/110587
9278 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
9280 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9282 PR tree-optimization/110248
9283 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
9284 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
9285 legitimate when outer code is PLUS.
9287 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9289 PR tree-optimization/110248
9290 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
9291 type code_helper and pass it to targetm.addr_space.legitimate_address_p
9292 instead of ERROR_MARK.
9293 (offsettable_address_addr_space_p): Update one function pointer with
9294 one more argument of type code_helper as its assignees
9295 memory_address_addr_space_p and strict_memory_address_addr_space_p
9296 have been adjusted, and adjust some call sites with ERROR_MARK.
9297 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
9298 (memory_address_addr_space_p): Adjust with one more unnamed argument
9299 of type code_helper with default ERROR_MARK.
9300 (strict_memory_address_addr_space_p): Likewise.
9301 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
9302 argument of type code_helper.
9303 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
9304 type code_helper and pass it to memory_address_addr_space_p.
9305 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
9306 one more unnamed argument of type code_helper with default value
9308 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
9309 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
9310 pass it to all valid_mem_ref_p calls.
9312 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9314 PR tree-optimization/110248
9315 * coretypes.h (class code_helper): Add forward declaration.
9316 * doc/tm.texi: Regenerate.
9317 * lra-constraints.cc (valid_address_p): Call target hook
9318 targetm.addr_space.legitimate_address_p with an extra parameter
9319 ERROR_MARK as its prototype changes.
9320 * recog.cc (memory_address_addr_space_p): Likewise.
9321 * reload.cc (strict_memory_address_addr_space_p): Likewise.
9322 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
9323 Extend with one more argument of type code_helper, update the
9324 documentation accordingly.
9325 * targhooks.cc (default_legitimate_address_p): Adjust for the
9326 new code_helper argument.
9327 (default_addr_space_legitimate_address_p): Likewise.
9328 * targhooks.h (default_legitimate_address_p): Likewise.
9329 (default_addr_space_legitimate_address_p): Likewise.
9330 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
9331 with extra unnamed code_helper argument with default ERROR_MARK.
9332 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
9333 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
9334 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
9335 (tree.h): New include for tree_code ERROR_MARK.
9336 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
9337 unnamed code_helper argument with default ERROR_MARK.
9338 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
9339 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
9340 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
9341 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
9342 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
9343 (tree.h): New include for tree_code ERROR_MARK.
9344 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
9345 unnamed code_helper argument with default ERROR_MARK.
9346 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
9347 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
9349 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
9350 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
9351 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
9352 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
9353 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
9354 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
9355 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
9356 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
9357 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
9359 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
9360 (m32c_addr_space_legitimate_address_p): Likewise.
9361 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
9362 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
9363 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
9364 * config/microblaze/microblaze-protos.h (tree.h): New include for
9365 tree_code ERROR_MARK.
9366 (microblaze_legitimate_address_p): Adjust with extra unnamed
9367 code_helper argument with default ERROR_MARK.
9368 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
9370 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
9371 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
9372 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
9373 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
9374 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
9375 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
9376 argument with default ERROR_MARK and adjust the call to function
9377 msp430_legitimate_address_p.
9378 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
9379 unnamed code_helper argument with default ERROR_MARK.
9380 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
9381 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
9382 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
9383 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
9384 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
9385 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
9386 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
9387 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
9388 (tree.h): New include for tree_code ERROR_MARK.
9389 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
9390 extra unnamed code_helper argument with default ERROR_MARK.
9391 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
9392 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
9393 argument and adjust the call to function rs6000_legitimate_address_p.
9394 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
9395 unnamed code_helper argument with default ERROR_MARK.
9396 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
9397 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
9398 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
9399 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
9400 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
9401 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
9402 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
9403 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
9405 (tree.h): New include for tree_code ERROR_MARK.
9406 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
9407 Adjust with extra unnamed code_helper argument with default
9410 2023-08-09 liuhongt <hongtao.liu@intel.com>
9412 * common/config/i386/cpuinfo.h (get_available_features): Check
9413 EAX for valid subleaf before use CPUID.
9415 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
9417 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
9418 for the temporary when canonicalizing the condition.
9420 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
9422 * config/bpf/core-builtins.cc: Cleaned include headers.
9423 (struct cr_builtins): Added GTY.
9424 (cr_builtins_ref): Created.
9425 (builtins_data) Changed to GC root.
9426 (allocate_builtin_data): Changed.
9427 Included gt-core-builtins.h.
9428 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
9429 (bpf_core_extra_ref): Created.
9430 (bpf_comment_info): Changed to GC root.
9431 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
9433 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
9436 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
9437 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
9438 upper part of V2SFmode register with -fno-trapping-math.
9439 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
9441 (<smaxmin:code>v2sf3): Ditto.
9443 (*mmx_haddv2sf3_low): Ditto.
9444 (*mmx_hsubv2sf3_low): Ditto.
9445 (vec_addsubv2sf3): Ditto.
9446 (vec_cmpv2sfv2si): Ditto.
9447 (vcond<V2FI:mode>v2sf): Ditto.
9452 (fix_truncv2sfv2si2): Ditto.
9453 (fixuns_truncv2sfv2si2): Ditto.
9454 (floatv2siv2sf2): Ditto.
9455 (floatunsv2siv2sf2): Ditto.
9456 (nearbyintv2sf2): Ditto.
9458 (lrintv2sfv2si2): Ditto.
9460 (lceilv2sfv2si2): Ditto.
9461 (floorv2sf2): Ditto.
9462 (lfloorv2sfv2si2): Ditto.
9463 (btruncv2sf2): Ditto.
9464 (roundv2sf2): Ditto.
9465 (lroundv2sfv2si2): Ditto.
9466 * doc/invoke.texi (x86 Options): Document
9467 -mpartial-vector-fp-math option.
9469 2023-08-08 Andrew Pinski <apinski@marvell.com>
9471 PR tree-optimization/103281
9472 PR tree-optimization/28794
9473 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
9475 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
9476 (simplify_using_ranges::simplify_casted_cond): Rename to ...
9477 (simplify_using_ranges::simplify_casted_compare): This
9478 and change arguments to take op0 and op1.
9479 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
9480 (simplify_using_ranges::simplify): For tcc_comparison assignments call
9481 simplify_compare_assign_using_ranges_1.
9482 * vr-values.h (simplify_using_ranges): Add
9483 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
9484 Rename simplify_casted_cond and simplify_casted_compare and
9485 update argument types.
9487 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
9489 * genmatch.cc: Log line numbers indirectly.
9491 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
9493 * genmatch.cc: Make sinfo map ordered.
9494 * Makefile.in: Require the ordered map header for genmatch.o.
9496 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
9498 * ordered-hash-map.h: Add get_or_insert.
9499 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
9501 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9503 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
9504 (cond_len_<optab><mode>): Ditto.
9505 (cond_fma<mode>): Ditto.
9506 (cond_len_fma<mode>): Ditto.
9507 (cond_fnma<mode>): Ditto.
9508 (cond_len_fnma<mode>): Ditto.
9509 (cond_fms<mode>): Ditto.
9510 (cond_len_fms<mode>): Ditto.
9511 (cond_fnms<mode>): Ditto.
9512 (cond_len_fnms<mode>): Ditto.
9513 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
9515 (enum insn_type): Add new enum type.
9516 (prepare_ternary_operands): New function.
9517 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
9518 (emit_nonvlmax_tumu_insn): Ditto.
9519 (emit_nonvlmax_fp_tumu_insn): Ditto.
9520 (expand_cond_len_binop): Add condtional operations.
9521 (expand_cond_len_ternop): Ditto.
9522 (prepare_ternary_operands): New function.
9523 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
9524 riscv_get_v_regno_alignment as global scope.
9525 * config/riscv/vector.md: Fix ternary bugs.
9527 2023-08-08 Richard Biener <rguenther@suse.de>
9529 PR tree-optimization/49955
9530 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
9531 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
9532 * tree-vect-slp.cc (vect_free_slp_instance): Release
9533 SLP_INSTANCE_REMAIN_STMTS.
9534 (vect_build_slp_instance): Make the number of lanes of
9535 a BB reduction even.
9536 (vectorize_slp_instance_root_stmt): Handle unvectorized
9537 defs of a BB reduction.
9539 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9541 * internal-fn.cc (get_len_internal_fn): New function.
9542 (DEF_INTERNAL_COND_FN): Ditto.
9543 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
9544 * internal-fn.h (get_len_internal_fn): Ditto.
9545 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
9547 2023-08-08 Richard Biener <rguenther@suse.de>
9549 PR tree-optimization/110924
9550 * tree-ssa-live.h (virtual_operand_live): Update comment.
9551 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
9552 optimization, look at each predecessor.
9553 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
9555 2023-08-08 yulong <shiyulong@iscas.ac.cn>
9557 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
9559 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9561 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
9562 * config/riscv/vector.md: Ditto.
9564 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9566 * config/riscv/autovec.md: Add VLS shift.
9568 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9570 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
9571 * config/riscv/vector-iterators.md: Ditto.
9572 * config/riscv/vector.md: Ditto.
9574 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
9576 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
9578 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
9580 * configure: Regenerate.
9582 2023-08-07 John Ericson <git@JohnEricson.me>
9584 * configure: Regenerate.
9586 2023-08-07 Alan Modra <amodra@gmail.com>
9588 * configure: Regenerate.
9590 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
9592 * configure: Regenerate.
9594 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
9596 * configure: Regenerate.
9598 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
9600 * configure: Regenerate.
9602 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
9604 * configure: Regenerate.
9606 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
9608 * configure: Regenerate.
9610 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
9612 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
9613 VOIDmode operands to conditional before canonicalization.
9615 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
9617 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
9618 (find_oldest_value_reg): Inline stack_pointer_rtx check.
9619 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
9621 2023-08-07 Martin Jambor <mjambor@suse.cz>
9624 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
9625 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
9626 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
9627 (ptr_parm_has_nonarg_uses): Likewise.
9628 * ipa-param-manipulation.cc
9629 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
9630 (ipa_param_body_adjustments::mark_dead_statements): Move initial
9631 checks to get_ddef_if_exists_and_is_used.
9632 (ipa_param_body_adjustments::mark_clobbers_dead): New.
9633 (ipa_param_body_adjustments::common_initialization): Call
9634 mark_clobbers_dead when splitting.
9636 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
9638 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
9639 as an argument and pass it to riscv_emit_int_order_test.
9640 (riscv_expand_conditional_move): Handle cases where the condition
9641 is not EQ/NE or the second argument to the conditional is not
9643 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
9644 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
9646 2023-08-07 Andrew Pinski <apinski@marvell.com>
9648 PR tree-optimization/109959
9649 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
9652 2023-08-07 Richard Biener <rguenther@suse.de>
9654 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
9655 calculate post-dominators. Calculate RPO on the inverted
9656 graph and process blocks in that order.
9658 2023-08-07 liuhongt <hongtao.liu@intel.com>
9661 * config/i386/i386-protos.h
9662 (vpternlog_redundant_operand_mask): Adjust parameter type.
9663 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
9664 INTVAL instead of XINT, also adjust parameter type from rtx*
9665 to rtx since the function only needs operands[4] in vpternlog
9667 (substitute_vpternlog_operands): Pass operands[4] instead of
9668 operands to vpternlog_redundant_operand_mask.
9669 * config/i386/sse.md: Ditto.
9671 2023-08-07 Richard Biener <rguenther@suse.de>
9673 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
9674 around dumping code.
9676 2023-08-07 liuhongt <hongtao.liu@intel.com>
9679 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
9680 to define_expand and break into ..
9681 (<insn>v4hf3): .. this.
9682 (divv4hf3): .. this.
9683 (<insn>v2hf3): .. this.
9684 (divv2hf3): .. this.
9685 (movd_v2hf_to_sse): New define_expand.
9686 (movq_<mode>_to_sse): Extend to V4HFmode.
9687 (mmxdoublevecmode): Ditto.
9688 (V2FI_V4HF): New mode iterator.
9689 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
9690 by using mode iterator V4SF_V8HF, renamed to ..
9691 (*vec_concat<mode>): .. this.
9692 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
9693 iterator V4SF_V8HF, renamed to ..
9694 (*vec_concat<mode>_0): .. this.
9695 (*vec_concatv8hf_movss): New define_insn.
9696 (V4SF_V8HF): New mode iterator.
9698 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9700 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
9702 2023-08-07 Jan Beulich <jbeulich@suse.com>
9704 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
9705 (*mmx_pinsrb): Likewise.
9706 (*mmx_pextrb): Likewise.
9707 (*mmx_pextrb_zext): Likewise.
9708 (mmx_pshufbv8qi3): Likewise.
9709 (mmx_pshufbv4qi3): Likewise.
9710 (mmx_pswapdv2si2): Likewise.
9711 (*pinsrb): Likewise.
9712 (*pextrb): Likewise.
9713 (*pextrb_zext): Likewise.
9714 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
9715 (*sse2_eq<mode>3): Likewise.
9716 (*sse2_gt<mode>3): Likewise.
9717 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
9718 (*vec_extract<mode>): Likewise.
9719 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
9720 (*vec_extractv16qi_zext): Likewise.
9721 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
9722 (ssse3_pmaddubsw128): Likewise.
9723 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
9724 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
9725 (<ssse3_avx2>_psign<mode>3): Likewise.
9726 (<ssse3_avx2>_palignr<mode>): Likewise.
9727 (*abs<mode>2): Likewise.
9728 (sse4_2_pcmpestr): Likewise.
9729 (sse4_2_pcmpestri): Likewise.
9730 (sse4_2_pcmpestrm): Likewise.
9731 (sse4_2_pcmpestr_cconly): Likewise.
9732 (sse4_2_pcmpistr): Likewise.
9733 (sse4_2_pcmpistri): Likewise.
9734 (sse4_2_pcmpistrm): Likewise.
9735 (sse4_2_pcmpistr_cconly): Likewise.
9736 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
9737 (vgf2p8affineqb_<mode><mask_name>): Likewise.
9738 (vgf2p8mulb_<mode><mask_name>): Likewise.
9739 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
9741 (*<code>v16qi3 [umaxmin]): Likewise.
9743 2023-08-07 Jan Beulich <jbeulich@suse.com>
9745 * config/i386/i386.md (sse4_1_round<mode>2): Make
9746 "length_immediate" uniformly 1.
9747 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
9748 (mmx_pblendvb_<mode>): Likewise.
9750 2023-08-07 Jan Beulich <jbeulich@suse.com>
9752 * config/i386/sse.md
9753 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
9755 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
9758 2023-08-07 Jan Beulich <jbeulich@suse.com>
9760 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
9761 "prefix_extra", and "mode" attributes.
9762 (xop_phadd<u>bd): Likewise.
9763 (xop_phadd<u>bq): Likewise.
9764 (xop_phadd<u>wd): Likewise.
9765 (xop_phadd<u>wq): Likewise.
9766 (xop_phadd<u>dq): Likewise.
9767 (xop_phsubbw): Likewise.
9768 (xop_phsubwd): Likewise.
9769 (xop_phsubdq): Likewise.
9770 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
9771 (xop_rotr<mode>3): Likewise.
9772 (xop_frcz<mode>2): Likewise.
9773 (*xop_vmfrcz<mode>2): Likewise.
9774 (xop_vrotl<mode>3): Add "prefix" attribute. Change
9775 "prefix_extra" to 1.
9776 (xop_sha<mode>3): Likewise.
9777 (xop_shl<mode>3): Likewise.
9779 2023-08-07 Jan Beulich <jbeulich@suse.com>
9781 * config/i386/sse.md
9782 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
9784 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
9785 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
9786 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
9787 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
9788 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
9789 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
9790 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
9791 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
9792 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
9793 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
9794 (vec_extract_lo_v64qi): Likewise.
9795 (vec_extract_hi_v64qi): Likewise.
9796 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
9797 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
9798 (*avx512f_<code><mode>3<mask_name>): Likewise.
9799 (*vec_extractv4ti): Likewise.
9800 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
9801 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
9802 Add "length_immediate".
9804 2023-08-07 Jan Beulich <jbeulich@suse.com>
9806 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
9808 (@rdseed<mode>): Likewise.
9809 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
9810 Adjust "prefix_extra".
9811 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
9812 (*sse4_1_<code><mode>3<mask_name>): Likewise.
9813 (*avx2_eq<mode>3): Likewise.
9814 (avx2_gt<mode>3): Likewise.
9815 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
9816 (*vec_extract<mode>): Likewise.
9817 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
9819 2023-08-07 Jan Beulich <jbeulich@suse.com>
9821 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
9822 "prefix_rep". Drop "prefix_extra".
9823 (wr<fsgs>base<mode>): Likewise.
9824 (ptwrite<mode>): Likewise.
9826 2023-08-07 Jan Beulich <jbeulich@suse.com>
9828 * config/i386/i386.md (isa): Move up.
9829 (length_immediate): Handle "fma4".
9830 (prefix): Handle "ssemuladd".
9831 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
9832 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
9834 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
9835 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
9836 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
9838 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
9839 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
9840 (*fma_fnmadd_<mode>): Likewise.
9841 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
9843 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
9844 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
9845 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
9847 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
9848 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
9849 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
9851 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
9852 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
9853 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
9855 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
9856 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
9857 (*fmai_fmadd_<mode>): Likewise.
9858 (*fmai_fmsub_<mode>): Likewise.
9859 (*fmai_fnmadd_<mode><round_name>): Likewise.
9860 (*fmai_fnmsub_<mode><round_name>): Likewise.
9861 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
9862 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
9863 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
9864 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
9865 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
9866 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
9867 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
9868 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
9869 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
9870 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
9871 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
9872 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
9873 (*fma4i_vmfmadd_<mode>): Likewise.
9874 (*fma4i_vmfmsub_<mode>): Likewise.
9875 (*fma4i_vmfnmadd_<mode>): Likewise.
9876 (*fma4i_vmfnmsub_<mode>): Likewise.
9877 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
9878 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
9879 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
9881 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
9882 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
9883 (xop_p<macs>dql): Likewise.
9884 (xop_p<macs>dqh): Likewise.
9885 (xop_p<macs>wd): Likewise.
9886 (xop_p<madcs>wd): Likewise.
9887 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
9889 2023-08-07 Jan Beulich <jbeulich@suse.com>
9891 * config/i386/i386.md (length_immediate): Handle "sse4arg".
9893 (*xop_pcmov_<mode>): Add "mode" attribute.
9894 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
9895 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
9896 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
9897 (*xop_pcmov_<mode>): Add "mode" attribute.
9898 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
9900 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
9901 "prefix_extra", and "length_immediate" attributes.
9902 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
9903 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
9904 and "length_immediate" attributes. Switch "type" to "sse4arg".
9905 (xop_pcom_tf<mode>3): Likewise.
9906 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
9908 2023-08-07 Jan Beulich <jbeulich@suse.com>
9910 * config/i386/i386.md (prefix_extra): Correct comment. Fold
9911 cases yielding 2 into ones yielding 1.
9913 2023-08-07 Jan Hubicka <jh@suse.cz>
9915 PR tree-optimization/106293
9916 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
9917 * tree-vect-loop.cc (vect_transform_loop): Likewise.
9919 2023-08-07 Andrew Pinski <apinski@marvell.com>
9921 PR tree-optimization/96695
9922 * match.pd (min_value, max_value): Extend to
9925 2023-08-06 Jan Hubicka <jh@suse.cz>
9927 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
9928 __builtin_expect that CPU likely supports cpuid.
9930 2023-08-06 Jan Hubicka <jh@suse.cz>
9932 * tree-loop-distribution.cc (loop_distribution::execute): Disable
9933 distribution for loops with estimated iterations 0.
9935 2023-08-06 Jan Hubicka <jh@suse.cz>
9937 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
9939 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
9941 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
9942 more Zicond patterns. Fix whitespace typo.
9943 (riscv_rtx_costs): Remove accidental code duplication.
9944 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
9946 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
9949 * config/i386/i386-protos.h
9950 (vpternlog_redundant_operand_mask): Declare.
9951 (substitute_vpternlog_operands): Declare.
9952 * config/i386/i386.cc
9953 (vpternlog_redundant_operand_mask): New helper.
9954 (substitute_vpternlog_operands): New function. Use them...
9955 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
9957 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
9959 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
9960 value of -1 is equivalent to don't care.
9961 (extract_integral_bit_field): Indicate that we don't require
9962 the most significant word to be zero extended, if we're about
9964 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
9965 of -1 is equivalent to don't care. Don't clear the most
9966 significant bits with AND mask when UNSIGNEDP is -1.
9968 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
9970 * config/i386/sse.md (define_split): Convert highpart:DF extract
9971 from V2DFmode register into a sse2_storehpd instruction.
9972 (define_split): Likewise, convert lowpart:DF extract from V2DF
9973 register into a sse2_storelpd instruction.
9975 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
9977 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
9980 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
9982 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
9983 against early clobber hard regs.
9985 2023-08-04 Tamar Christina <tamar.christina@arm.com>
9987 * doc/extend.texi: Document it.
9989 2023-08-04 Tamar Christina <tamar.christina@arm.com>
9992 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
9993 vec_widen_<sur>shiftl_hi_<mode>): Remove.
9994 (aarch64_<sur>shll<mode>_internal): Renamed to...
9995 (aarch64_<su>shll<mode>): .. This.
9996 (aarch64_<sur>shll2<mode>_internal): Renamed to...
9997 (aarch64_<su>shll2<mode>): .. This.
9998 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
10000 * config/aarch64/constraints.md (D2, DL): New.
10001 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
10003 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10005 * gensupport.cc (conlist): Support length 0 attribute.
10007 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10009 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
10010 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
10012 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10014 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
10016 (aarch64_adjust_stmt_cost): Use it.
10017 (aarch64_vector_costs::count_ops): Likewise.
10018 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
10019 aarch64_adjust_stmt_cost.
10021 2023-08-04 Richard Biener <rguenther@suse.de>
10023 PR tree-optimization/110838
10024 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
10025 Fix right-shift value sanitizing. Properly emit external
10026 def mangling in the preheader rather than in the pattern
10027 def sequence where it will fail vectorizing.
10029 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
10031 PR middle-end/110316
10033 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
10034 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
10035 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
10036 (timer::validate_phases): Use integral arithmetic to check
10038 (timer::print_row, timer::print): Convert from integral
10039 nanoseconds to floating point seconds before printing.
10040 (timer::all_zero): Change limit to nanosec count instead of
10041 fractional count of seconds.
10042 (make_json_for_timevar_time_def): Convert from integral
10043 nanoseconds to floating point seconds before recording.
10044 * timevar.h (struct timevar_time_def): Update all measurements
10045 to use uint64_t nanoseconds rather than seconds stored in a
10048 2023-08-04 Richard Biener <rguenther@suse.de>
10050 PR tree-optimization/110838
10051 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
10052 the arithmetic right-shift case to non-negative operands.
10054 2023-08-04 Pan Li <pan2.li@intel.com>
10057 2023-08-04 Pan Li <pan2.li@intel.com>
10059 * config/riscv/riscv-vector-builtins-bases.cc
10060 (class vfmacc_frm): New class for vfmacc frm.
10061 (vfmacc_frm_obj): New declaration.
10063 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10064 * config/riscv/riscv-vector-builtins-functions.def
10065 (vfmacc_frm): New function definition.
10066 * config/riscv/riscv-vector-builtins.cc
10067 (function_expander::use_ternop_insn): Add frm operand support.
10068 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10070 2023-08-04 Pan Li <pan2.li@intel.com>
10073 2023-08-04 Pan Li <pan2.li@intel.com>
10075 * config/riscv/riscv-vector-builtins-bases.cc
10076 (class vfnmacc_frm): New class for vfnmacc.
10077 (vfnmacc_frm_obj): New declaration.
10079 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10080 * config/riscv/riscv-vector-builtins-functions.def
10081 (vfnmacc_frm): New function definition.
10083 2023-08-04 Pan Li <pan2.li@intel.com>
10086 2023-08-04 Pan Li <pan2.li@intel.com>
10088 * config/riscv/riscv-vector-builtins-bases.cc
10089 (class vfmsac_frm): New class for vfmsac frm.
10090 (vfmsac_frm_obj): New declaration.
10092 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10093 * config/riscv/riscv-vector-builtins-functions.def
10094 (vfmsac_frm): New function definition.
10096 2023-08-04 Pan Li <pan2.li@intel.com>
10099 2023-08-04 Pan Li <pan2.li@intel.com>
10101 * config/riscv/riscv-vector-builtins-bases.cc
10102 (class vfnmsac_frm): New class for vfnmsac frm.
10103 (vfnmsac_frm_obj): New declaration.
10105 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10106 * config/riscv/riscv-vector-builtins-functions.def
10107 (vfnmsac_frm): New function definition.
10109 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10111 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
10112 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
10113 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
10114 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
10115 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
10116 (attiny102, attiny104): New devices.
10117 * doc/avr-mmcu.texi: Regenerate.
10119 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10121 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
10122 and PM_OFFSET entries.
10124 2023-08-04 Andrew Pinski <apinski@marvell.com>
10126 PR tree-optimization/110874
10127 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
10128 (gimple_maybe_cmp): Likewise.
10129 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
10130 and gimple_maybe_cmp instead of being recursive.
10131 * match.pd (bit_not_with_nop): New match pattern.
10132 (maybe_cmp): Likewise.
10134 2023-08-04 Drew Ross <drross@redhat.com>
10136 PR middle-end/101955
10137 * match.pd ((signed x << c) >> c): New canonicalization.
10139 2023-08-04 Pan Li <pan2.li@intel.com>
10141 * config/riscv/riscv-vector-builtins-bases.cc
10142 (class vfnmsac_frm): New class for vfnmsac frm.
10143 (vfnmsac_frm_obj): New declaration.
10145 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10146 * config/riscv/riscv-vector-builtins-functions.def
10147 (vfnmsac_frm): New function definition.
10149 2023-08-04 Pan Li <pan2.li@intel.com>
10151 * config/riscv/riscv-vector-builtins-bases.cc
10152 (class vfmsac_frm): New class for vfmsac frm.
10153 (vfmsac_frm_obj): New declaration.
10155 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10156 * config/riscv/riscv-vector-builtins-functions.def
10157 (vfmsac_frm): New function definition.
10159 2023-08-04 Pan Li <pan2.li@intel.com>
10161 * config/riscv/riscv-vector-builtins-bases.cc
10162 (class vfnmacc_frm): New class for vfnmacc.
10163 (vfnmacc_frm_obj): New declaration.
10165 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10166 * config/riscv/riscv-vector-builtins-functions.def
10167 (vfnmacc_frm): New function definition.
10169 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
10172 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
10173 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
10175 2023-08-04 Pan Li <pan2.li@intel.com>
10177 * config/riscv/riscv-vector-builtins-bases.cc
10178 (class vfmacc_frm): New class for vfmacc frm.
10179 (vfmacc_frm_obj): New declaration.
10181 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10182 * config/riscv/riscv-vector-builtins-functions.def
10183 (vfmacc_frm): New function definition.
10184 * config/riscv/riscv-vector-builtins.cc
10185 (function_expander::use_ternop_insn): Add frm operand support.
10186 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10188 2023-08-04 Pan Li <pan2.li@intel.com>
10190 * config/riscv/riscv-vector-builtins-bases.cc
10191 (vfwmul_frm_obj): New declaration.
10192 (vfwmul_frm): Ditto.
10193 * config/riscv/riscv-vector-builtins-bases.h:
10194 (vfwmul_frm): Ditto.
10195 * config/riscv/riscv-vector-builtins-functions.def
10196 (vfwmul_frm): New function definition.
10197 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
10199 2023-08-04 Pan Li <pan2.li@intel.com>
10201 * config/riscv/riscv-vector-builtins-bases.cc
10202 (binop_frm): New declaration.
10203 (reverse_binop_frm): Likewise.
10205 * config/riscv/riscv-vector-builtins-bases.h:
10206 (vfdiv_frm): New extern declaration.
10207 (vfrdiv_frm): Likewise.
10208 * config/riscv/riscv-vector-builtins-functions.def
10209 (vfdiv_frm): New function definition.
10210 (vfrdiv_frm): Likewise.
10211 * config/riscv/vector.md: Add vfdiv to frm_mode.
10213 2023-08-03 Jan Hubicka <jh@suse.cz>
10215 * tree-cfg.cc (print_loop_info): Print entry count.
10217 2023-08-03 Jan Hubicka <jh@suse.cz>
10219 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
10221 2023-08-03 Jan Hubicka <jh@suse.cz>
10223 PR bootstrap/110857
10224 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
10225 unadjusted_exit_count.
10227 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
10229 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
10232 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
10234 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
10235 various Zicond patterns.
10236 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
10237 sfb_alu_operand for both arms of the conditional move.
10238 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10240 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
10246 * config.gcc: Added core-builtins.cc and .o files.
10247 * config/bpf/bpf-passes.def: Removed file.
10248 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
10249 bpf_replace_core_move_operands): New prototypes.
10250 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
10251 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
10252 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
10253 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
10254 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
10256 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
10257 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
10258 (mov_reloc_core<mode>): Added.
10259 * config/bpf/core-builtins.cc (struct cr_builtin, enum
10260 cr_decision struct cr_local, struct cr_final, struct
10261 core_builtin_helpers, enum bpf_plugin_states): Added types.
10262 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
10264 (allocate_builtin_data, get_builtin-data, search_builtin_data,
10265 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
10266 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
10267 bpf_core_get_index, compute_field_expr,
10268 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
10269 process_field_expr, pack_enum_value, process_enum_value, pack_type,
10270 process_type, bpf_require_core_support, make_core_relo, read_kind,
10271 kind_access_index, kind_preserve_field_info, kind_enum_value,
10272 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
10273 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
10274 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
10275 bpf_expand_core_builtin, bpf_add_core_reloc,
10276 bpf_replace_core_move_operands): Added functions.
10277 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
10278 (bpf_init_core_builtins, bpf_expand_core_builtin,
10279 bpf_resolve_overloaded_core_builtin): Added functions.
10280 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
10281 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
10282 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
10283 * config/bpf/t-bpf: Added core-builtins.o.
10284 * doc/extend.texi: Added documentation for new BPF builtins.
10286 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10288 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
10289 ranges to the call to relation_fold_and_or.
10290 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
10291 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
10292 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
10293 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
10294 a varying op1 and op2 to call.
10295 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
10296 (operator_equal::op1_op2_relation): New float version.
10297 (operator_not_equal::op1_op2_relation): Ditto.
10298 (operator_lt::op1_op2_relation): Ditto.
10299 (operator_le::op1_op2_relation): Ditto.
10300 (operator_gt::op1_op2_relation): Ditto.
10301 (operator_ge::op1_op2_relation) Ditto.
10302 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
10304 (operator_not_equal::op1_op2_relation): Ditto.
10305 (operator_lt::op1_op2_relation): Ditto.
10306 (operator_le::op1_op2_relation): Ditto.
10307 (operator_gt::op1_op2_relation): Ditto.
10308 (operator_ge::op1_op2_relation): Ditto.
10309 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
10311 (range_operator::op1_op2_relation): Add extra params.
10312 (operator_equal::op1_op2_relation): Ditto.
10313 (operator_not_equal::op1_op2_relation): Ditto.
10314 (operator_lt::op1_op2_relation): Ditto.
10315 (operator_le::op1_op2_relation): Ditto.
10316 (operator_gt::op1_op2_relation): Ditto.
10317 (operator_ge::op1_op2_relation): Ditto.
10318 * range-op.h (range_operator): New prototypes.
10319 (range_op_handler): Ditto.
10321 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10323 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
10324 Use identity relation.
10325 (gori_compute::compute_operand2_range): Ditto.
10326 * value-relation.cc (get_identity_relation): New.
10327 * value-relation.h (get_identity_relation): New prototype.
10329 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10331 * value-range.h (Value_Range::set_varying): Set the type.
10332 (Value_Range::set_zero): Ditto.
10333 (Value_Range::set_nonzero): Ditto.
10335 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
10337 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
10340 2023-08-03 Pan Li <pan2.li@intel.com>
10342 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
10344 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
10346 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
10348 2023-08-03 Richard Biener <rguenther@suse.de>
10350 PR tree-optimization/110838
10351 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
10352 Adjust the shift operand of RSHIFT_EXPRs.
10354 2023-08-03 Richard Biener <rguenther@suse.de>
10356 PR tree-optimization/110702
10357 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
10358 we created a NULL pointer based access rewrite that to
10361 2023-08-03 Richard Biener <rguenther@suse.de>
10363 * tree-ssa-sink.cc: Include tree-ssa-live.h.
10364 (pass_sink_code::execute): Instantiate virtual_operand_live
10366 (sink_code_in_bb): Pass down virtual_operand_live.
10367 (statement_sink_location): Get virtual_operand_live and
10368 verify we are not sinking loads across stores by looking up
10369 the live virtual operand at the sink location.
10371 2023-08-03 Richard Biener <rguenther@suse.de>
10373 * tree-ssa-live.h (class virtual_operand_live): New.
10374 * tree-ssa-live.cc (virtual_operand_live::init): New.
10375 (virtual_operand_live::get_live_in): Likewise.
10376 (virtual_operand_live::get_live_out): Likewise.
10378 2023-08-03 Richard Biener <rguenther@suse.de>
10380 * passes.def: Exchange loop splitting and final value
10381 replacement passes.
10383 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10385 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
10386 New function which handles bswap patterns for vec_perm_const.
10387 (vectorize_vec_perm_const_1): Call new function.
10388 * config/s390/vector.md (*bswap<mode>): Fix operands in output
10390 (*vstbr<mode>): New insn.
10392 2023-08-03 Alexandre Oliva <oliva@adacore.com>
10394 * config/vxworks-smp.opt: New. Introduce -msmp.
10395 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
10396 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
10397 lib_smp when -msmp is present in the command line.
10398 * doc/invoke.texi: Document it.
10400 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
10402 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
10403 when enabling -mno-omit-leaf-frame-pointer
10404 (riscv_option_override): Override omit-frame-pointer.
10405 (riscv_frame_pointer_required): Save s0 for non-leaf function
10406 (TARGET_FRAME_POINTER_REQUIRED): Override defination
10407 * config/riscv/riscv.opt: Add option support.
10409 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
10412 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
10413 place operand in a register before gen_<insn>64ti2_doubleword.
10414 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
10415 operand in a register before gen_<insn>32di2_doubleword.
10416 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
10417 (<any_rotate>64ti2_doubleword): Likewise.
10419 2023-08-03 Pan Li <pan2.li@intel.com>
10421 * config/riscv/riscv-vector-builtins-bases.cc
10422 (vfmul_frm_obj): New declaration.
10424 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
10425 * config/riscv/riscv-vector-builtins-functions.def
10426 (vfmul_frm): New function definition.
10427 * config/riscv/vector.md: Add vfmul to frm_mode.
10429 2023-08-03 Andrew Pinski <apinski@marvell.com>
10431 * match.pd (`~X & X`): Check that the types match.
10432 (`~x | x`, `~x ^ x`): Likewise.
10434 2023-08-03 Pan Li <pan2.li@intel.com>
10436 * config/riscv/riscv-vector-builtins-bases.h: Remove
10437 redudant declaration.
10439 2023-08-03 Pan Li <pan2.li@intel.com>
10441 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
10443 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
10444 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
10445 Add vfwsub function definitions.
10447 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10449 PR rtl-optimization/110867
10450 * combine.cc (simplify_compare_const): Try the optimization only
10451 in case the constant fits into the comparison mode.
10453 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
10455 * config/riscv/zicond.md: Remove incorrect zicond patterns and
10456 renumber/rename them.
10457 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
10459 2023-08-02 Richard Biener <rguenther@suse.de>
10461 * tree-phinodes.h (add_phi_node_to_bb): Remove.
10462 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
10464 2023-08-02 Jan Beulich <jbeulich@suse.com>
10466 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
10467 two of the alternatives.
10469 2023-08-02 Richard Biener <rguenther@suse.de>
10471 PR tree-optimization/92335
10472 * tree-ssa-sink.cc (select_best_block): Before loop
10473 optimizations avoid sinking unconditional loads/stores
10474 in innermost loops to conditional executed places.
10476 2023-08-02 Andrew Pinski <apinski@marvell.com>
10478 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
10479 the comparison operands before comparing them.
10481 2023-08-02 Andrew Pinski <apinski@marvell.com>
10483 * match.pd (`~X & X`, `~X | X`): Move over to
10484 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
10485 handles that already.
10486 Remove range test simplifications to true/false as they
10487 are now handled by these patterns.
10489 2023-08-02 Andrew Pinski <apinski@marvell.com>
10491 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
10492 statement's lhs and rhs to check if trivial dead.
10493 Rename inserted_exprs to exprs_maybe_dce; also move it so
10494 bitmap is not allocated if not needed.
10496 2023-08-02 Pan Li <pan2.li@intel.com>
10498 * config/riscv/riscv-vector-builtins-bases.cc
10499 (class widen_binop_frm): New class for binop frm.
10500 (BASE): Add vfwadd_frm.
10501 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
10502 * config/riscv/riscv-vector-builtins-functions.def
10503 (vfwadd_frm): New function definition.
10504 * config/riscv/riscv-vector-builtins-shapes.cc
10505 (BASE_NAME_MAX_LEN): New macro.
10506 (struct alu_frm_def): Leverage new base class.
10507 (struct build_frm_base): New build base for frm.
10508 (struct widen_alu_frm_def): New struct for widen alu frm.
10509 (SHAPE): Add widen_alu_frm shape.
10510 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
10511 * config/riscv/vector.md (frm_mode): Add vfwalu type.
10513 2023-08-02 Jan Hubicka <jh@suse.cz>
10515 * cfgloop.h (loop_count_in): Declare.
10516 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
10517 (loop_count_in): Move here from ...
10518 * cfgloopmanip.cc (loop_count_in): ... here.
10519 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
10521 2023-08-02 Jan Hubicka <jh@suse.cz>
10523 * cfg.cc (scale_strictly_dominated_blocks): New function.
10524 * cfg.h (scale_strictly_dominated_blocks): Declare.
10525 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
10527 2023-08-02 Richard Biener <rguenther@suse.de>
10529 PR rtl-optimization/110587
10530 * lra-spills.cc (return_regno_p): Remove.
10531 (regno_in_use_p): Likewise.
10532 (lra_final_code_change): Do not remove noop moves
10533 between hard registers.
10535 2023-08-02 liuhongt <hongtao.liu@intel.com>
10538 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
10539 HFmode, use mode iterator VFH instead.
10540 (vec_fmsubadd<mode>4): Ditto.
10541 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
10542 Remove scalar mode from iterator, use VFH_AVX512VL instead.
10543 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
10546 2023-08-02 liuhongt <hongtao.liu@intel.com>
10548 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
10549 pre_reload define_insn_and_split.
10551 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
10553 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
10554 using Zicond to implement some conditional moves.
10556 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
10558 * config/riscv/zicond.md: Use the X iterator instead of ANYI
10559 on the comparison input operands.
10561 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
10563 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
10565 (case SET): For INSNs that just set a REG, take the cost from the
10567 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10569 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
10571 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
10572 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
10573 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
10574 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
10575 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
10576 (OPTION_MASK_ISA_ABM_SET):
10577 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
10579 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
10581 * config/s390/s390.cc (s390_encode_section_info): Assume external
10582 symbols without explicit alignment to be unaligned if
10583 -munaligned-symbols has been specified.
10584 * config/s390/s390.opt (-munaligned-symbols): New option.
10586 2023-08-01 Richard Ball <richard.ball@arm.com>
10588 * gimple-fold.cc (fold_ctor_reference):
10589 Add support for poly_int.
10591 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
10594 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
10595 LABEL_NUSES of new conditional branch instruction.
10597 2023-08-01 Jan Hubicka <jh@suse.cz>
10599 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
10600 constant prologue peeling.
10602 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
10604 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
10606 2023-08-01 Pan Li <pan2.li@intel.com>
10607 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10609 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
10610 (STATIC_FRM_P): Ditto.
10611 (struct mode_switching_info): New struct for mode switching.
10612 (struct machine_function): Add new field mode switching.
10613 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
10614 (riscv_frm_adjust_mode_after_call): New function for call mode.
10615 (riscv_frm_emit_after_call_in_bb_end): New function for emit
10616 insn when call as the end of bb.
10617 (riscv_frm_mode_needed): New function for frm mode needed.
10618 (frm_unknown_dynamic_p): Remove call check.
10619 (riscv_mode_needed): Extrac function for frm.
10620 (riscv_frm_mode_after): Add DYN_CALL after.
10621 (riscv_mode_entry): Remove backup rtl initialization.
10622 * config/riscv/vector.md (frm_mode): Add dyn_call.
10623 (fsrmsi_restore_exit): Rename to _volatile.
10624 (fsrmsi_restore_volatile): Likewise.
10626 2023-08-01 Pan Li <pan2.li@intel.com>
10628 * config/riscv/riscv-vector-builtins-bases.cc
10629 (class reverse_binop_frm): Add new template for reversed frm.
10630 (vfsub_frm_obj): New obj.
10631 (vfrsub_frm_obj): Likewise.
10632 * config/riscv/riscv-vector-builtins-bases.h:
10633 (vfsub_frm): New declaration.
10634 (vfrsub_frm): Likewise.
10635 * config/riscv/riscv-vector-builtins-functions.def
10636 (vfsub_frm): New function define.
10637 (vfrsub_frm): Likewise.
10639 2023-08-01 Andrew Pinski <apinski@marvell.com>
10641 PR tree-optimization/93044
10642 * match.pd (nested int casts): A truncation (to the same size or smaller)
10643 can always remove the inner cast.
10645 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
10648 * doc/invoke.texi (-Wmissing-variable-declarations): Document
10651 2023-07-31 Andrew Pinski <apinski@marvell.com>
10653 PR tree-optimization/106164
10654 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
10655 `a == b | a < b`, `a == b | a > b`): Handle these cases
10658 2023-07-31 Andrew Pinski <apinski@marvell.com>
10660 PR tree-optimization/106164
10661 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
10662 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
10664 2023-07-31 Andrew Pinski <apinski@marvell.com>
10666 PR tree-optimization/100864
10667 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
10668 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
10669 (gimple_bitwise_inverted_equal_p): New function.
10670 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
10671 instead of direct matching bit_not.
10673 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
10676 * gcc-ar.cc (main): Expand argv and use
10677 temporary response file to call ar if any
10678 expansions were made.
10680 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
10682 PR tree-optimization/110582
10683 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
10684 range vector for non-ssa names.
10686 2023-07-31 David Malcolm <dmalcolm@redhat.com>
10689 * diagnostic-client-data-hooks.h (class sarif_object): New forward
10691 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
10693 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
10694 (class sarif_invocation): Inherit from sarif_object rather than
10696 (class sarif_result): Likewise.
10697 (class sarif_ice_notification): Likewise.
10698 (sarif_object::get_or_create_properties): New.
10699 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
10700 to call the context's add_sarif_invocation_properties hook.
10701 (sarif_builder::flush_to_file): Pass m_context to
10702 sarif_invocation::prepare_to_flush.
10703 * diagnostic-format-sarif.h: New header.
10704 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
10705 writes to stderr. Document that if SARIF diagnostic output is
10706 requested then any timing information is written in JSON form as
10707 part of the SARIF output, rather than to stderr.
10708 * timevar.cc: Include "json.h".
10709 (timer::named_items::m_hash_map): Split out type into...
10710 (timer::named_items::hash_map_t): ...this new typedef.
10711 (timer::named_items::make_json): New function.
10712 (timevar_diff): New function.
10713 (make_json_for_timevar_time_def): New function.
10714 (timer::timevar_def::make_json): New function.
10715 (timer::make_json): New function.
10716 * timevar.h (class json::value): New forward decl.
10717 (timer::make_json): New decl.
10718 (timer::timevar_def::make_json): New decl.
10719 * tree-diagnostic-client-data-hooks.cc: Include
10720 "diagnostic-format-sarif.h" and "timevar.h".
10721 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
10724 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10726 * combine.cc (simplify_compare_const): Narrow comparison of
10727 memory and constant.
10728 (try_combine): Adapt new function signature.
10729 (simplify_comparison): Adapt new function signature.
10731 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
10733 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
10735 (expand_vector_init_insert_elems): Ditto.
10737 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
10740 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
10741 single_defuse_cycle while counting reduction_latency.
10743 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10745 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
10746 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
10747 (COND_ADD): Remove.
10752 (COND_RDIV): Ditto.
10755 (COND_FMIN): Ditto.
10756 (COND_FMAX): Ditto.
10764 (COND_FNMA): Ditto.
10765 (COND_FNMS): Ditto.
10767 (COND_LEN_ADD): Ditto.
10768 (COND_LEN_SUB): Ditto.
10769 (COND_LEN_MUL): Ditto.
10770 (COND_LEN_DIV): Ditto.
10771 (COND_LEN_MOD): Ditto.
10772 (COND_LEN_RDIV): Ditto.
10773 (COND_LEN_MIN): Ditto.
10774 (COND_LEN_MAX): Ditto.
10775 (COND_LEN_FMIN): Ditto.
10776 (COND_LEN_FMAX): Ditto.
10777 (COND_LEN_AND): Ditto.
10778 (COND_LEN_IOR): Ditto.
10779 (COND_LEN_XOR): Ditto.
10780 (COND_LEN_SHL): Ditto.
10781 (COND_LEN_SHR): Ditto.
10782 (COND_LEN_FMA): Ditto.
10783 (COND_LEN_FMS): Ditto.
10784 (COND_LEN_FNMA): Ditto.
10785 (COND_LEN_FNMS): Ditto.
10786 (COND_LEN_NEG): Ditto.
10787 (ADD): New macro define.
10808 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
10811 * config/i386/i386-features.cc (compute_convert_gain): Check
10812 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
10813 and V4SImode rotates in STV.
10814 (general_scalar_chain::convert_rotate): Likewise.
10816 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
10818 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
10819 * config/riscv/riscv-protos.h (get_mask_mode): Update return
10821 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
10823 (emit_vlmax_insn): Ditto.
10824 (emit_vlmax_fp_insn): Ditto.
10825 (emit_vlmax_ternary_insn): Ditto.
10826 (emit_vlmax_fp_ternary_insn): Ditto.
10827 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
10828 (emit_nonvlmax_insn): Ditto.
10829 (emit_vlmax_slide_insn): Ditto.
10830 (emit_nonvlmax_slide_tu_insn): Ditto.
10831 (emit_vlmax_merge_insn): Ditto.
10832 (emit_vlmax_masked_insn): Ditto.
10833 (emit_nonvlmax_masked_insn): Ditto.
10834 (emit_vlmax_masked_store_insn): Ditto.
10835 (emit_nonvlmax_masked_store_insn): Ditto.
10836 (emit_vlmax_masked_mu_insn): Ditto.
10837 (emit_nonvlmax_tu_insn): Ditto.
10838 (emit_nonvlmax_fp_tu_insn): Ditto.
10839 (emit_scalar_move_insn): Ditto.
10840 (emit_vlmax_compress_insn): Ditto.
10841 (emit_vlmax_reduction_insn): Ditto.
10842 (emit_vlmax_fp_reduction_insn): Ditto.
10843 (emit_nonvlmax_fp_reduction_insn): Ditto.
10844 (expand_vec_series): Ditto.
10845 (expand_vector_init_merge_repeating_sequence): Ditto.
10846 (expand_vec_perm): Ditto.
10847 (shuffle_merge_patterns): Ditto.
10848 (shuffle_compress_patterns): Ditto.
10849 (shuffle_decompress_patterns): Ditto.
10850 (expand_reduction): Ditto.
10851 (get_mask_mode): Update return type.
10852 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
10853 is valid, and use new get_mask_mode interface.
10855 2023-07-31 Pan Li <pan2.li@intel.com>
10857 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
10858 Move rm suffix before mask.
10860 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10862 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
10863 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
10866 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
10869 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
10870 (extzv<mode>): Likewise.
10871 (insv<mode>): Likewise.
10872 (*testqi_ext_3): Likewise.
10873 (*btr<mode>_2): Likewise.
10874 (define_split): Likewise.
10875 (*btsq_imm): Likewise.
10876 (*btrq_imm): Likewise.
10877 (*btcq_imm): Likewise.
10878 (define_peephole2 x3): Likewise.
10879 (*bt<mode>): Likewise
10880 (*bt<mode>_mask): New define_insn_and_split.
10881 (*jcc_bt<mode>): Use QImode for offsets.
10882 (*jcc_bt<mode>_1): Delete obsolete pattern.
10883 (*jcc_bt<mode>_mask): Use QImode offsets.
10884 (*jcc_bt<mode>_mask_1): Likewise.
10885 (define_split): Likewise.
10886 (*bt<mode>_setcqi): Likewise.
10887 (*bt<mode>_setncqi): Likewise.
10888 (*bt<mode>_setnc<mode>): Likewise.
10889 (*bt<mode>_setncqi_2): Likewise.
10890 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
10891 (bmi2_bzhi_<mode>3): Use QImode offsets.
10892 (*bmi2_bzhi_<mode>3): Likewise.
10893 (*bmi2_bzhi_<mode>3_1): Likewise.
10894 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
10895 (@tbm_bextri_<mode>): Likewise.
10897 2023-07-29 Jan Hubicka <jh@suse.cz>
10899 * profile-count.cc (profile_probability::sqrt): New member function.
10900 (profile_probability::pow): Likewise.
10901 * profile-count.h: (profile_probability::sqrt): Declare
10902 (profile_probability::pow): Likewise.
10903 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
10905 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
10907 * gimple-range-cache.cc (ssa_cache::merge_range): New.
10908 (ssa_lazy_cache::merge_range): New.
10909 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
10910 (class ssa_lazy_cache): Ditto.
10911 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
10913 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
10915 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
10916 Move from value-query.cc.
10917 (substitute_and_fold_engine::value_of_stmt): Ditto.
10918 (substitute_and_fold_engine::range_of_expr): New.
10919 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
10920 range_query. New prototypes.
10921 * value-query.cc (value_query::value_on_edge): Relocate.
10922 (value_query::value_of_stmt): Ditto.
10923 * value-query.h (class value_query): Remove.
10924 (class range_query): Remove base class. Adjust prototypes.
10926 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
10928 PR tree-optimization/110205
10929 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
10930 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
10931 Add final override.
10932 * range-op.cc (operator_lshift): Add missing final overrides.
10933 (operator_rshift): Ditto.
10935 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
10937 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
10938 optimizations in BPF target.
10940 2023-07-28 Honza <jh@ryzen4.suse.cz>
10942 * cfgloopmanip.cc (loop_count_in): Break out from ...
10943 (loop_exit_for_scaling): Break out from ...
10944 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
10945 add more sanity check and debug info.
10946 (scale_loop_profile): ... here.
10947 (create_empty_loop_on_edge): Fix whitespac.
10948 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
10949 * loop-unroll.cc (unroll_loop_constant_iterations): Use
10950 update_loop_exit_probability_scale_dom_bbs.
10951 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
10952 (tree_transform_and_unroll_loop): Use
10953 update_loop_exit_probability_scale_dom_bbs.
10954 * tree-ssa-loop-split.cc (split_loop): Use
10955 update_loop_exit_probability_scale_dom_bbs.
10957 2023-07-28 Jan Hubicka <jh@suse.cz>
10959 PR middle-end/77689
10960 * tree-ssa-loop-split.cc: Include value-query.h.
10961 (split_at_bb_p): Analyze cases where EQ/NE can be turned
10962 into LT/LE/GT/GE; return updated guard code.
10963 (split_loop): Use guard code.
10965 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
10966 Richard Biener <rguenther@suse.de>
10968 PR middle-end/28071
10969 PR rtl-optimization/110587
10970 * expr.cc (emit_group_load_1): Simplify logic for calling
10971 force_reg on ORIG_SRC, to avoid making a copy if the source
10972 is already in a pseudo register.
10974 2023-07-28 Jan Hubicka <jh@suse.cz>
10976 PR middle-end/106923
10977 * tree-ssa-loop-split.cc (connect_loops): Change probability
10978 of the test preconditioning second loop to very_likely.
10979 (fix_loop_bb_probability): Handle correctly case where
10980 on of the arms of the conditional is empty.
10981 (split_loop): Fold the test guarding first condition to
10982 see if it is constant true; Set correct entry block
10983 probabilities of the split loops; determine correct loop
10984 eixt probabilities.
10986 2023-07-28 xuli <xuli1@eswincomputing.com>
10988 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
10989 vsadd[u] and vssub[u].
10990 * config/riscv/vector.md: Ditto.
10992 2023-07-28 Jan Hubicka <jh@suse.cz>
10994 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
10995 loops when IV test is not overflowing.
10997 2023-07-28 liuhongt <hongtao.liu@intel.com>
11000 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
11002 (avx512cd_maskw_vec_dup<mode>): Ditto.
11004 2023-07-27 David Faust <david.faust@oracle.com>
11008 * config/bpf/bpf.opt (msmov): New option.
11009 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11010 * config/bpf/bpf.md (*extendsidi2): New.
11011 (extendhidi2): New.
11012 (extendqidi2): New.
11013 (extendsisi2): New.
11014 (extendhisi2): New.
11015 (extendqisi2): New.
11016 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
11017 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
11018 also enables -msmov.
11020 2023-07-27 David Faust <david.faust@oracle.com>
11022 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
11023 Add -mbswap and -msdiv eBPF options.
11024 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
11025 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
11028 2023-07-27 David Faust <david.faust@oracle.com>
11030 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
11031 in pseudo-C dialect output template.
11032 (sub<AM:mode>3): Likewise.
11034 2023-07-27 Jan Hubicka <jh@suse.cz>
11036 * tree-vect-loop.cc (optimize_mask_stores): Make store
11039 2023-07-27 Jan Hubicka <jh@suse.cz>
11041 * cfgloop.h (single_dom_exit): Declare.
11042 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
11043 * cfgrtl.cc (struct cfg_hooks): Fix comment.
11044 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
11045 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
11046 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
11048 (tree_transform_and_unroll_loop): ... here;
11050 2023-07-27 Jan Hubicka <jh@suse.cz>
11052 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
11053 tree-ssa-loop-manip.cc and avoid recursion.
11054 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
11055 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
11057 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
11058 (scale_dominated_blocks_in_loop): Declare.
11059 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
11060 (change_edge_frequency): Remove.
11061 * predict.h (change_edge_frequency): Remove.
11062 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
11064 (niter_for_unrolled_loop): Remove.
11065 (tree_transform_and_unroll_loop): Fix profile update.
11067 2023-07-27 Jan Hubicka <jh@suse.cz>
11069 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
11070 to guessed; fix count of new_bb.
11072 2023-07-27 Jan Hubicka <jh@suse.cz>
11074 * profile-count.h (profile_count::apply_probability): Fix
11075 handling of uninitialized probabilities, optimize scaling
11078 2023-07-27 Richard Biener <rguenther@suse.de>
11080 PR tree-optimization/91838
11081 * gimple-match-head.cc: Include attribs.h and asan.h.
11082 * generic-match-head.cc: Likewise.
11083 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
11085 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11087 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
11088 (ADJUST_ALIGNMENT): Ditto.
11089 (ADJUST_PRECISION): Ditto.
11090 (VLS_MODES): Ditto.
11091 (VECTOR_MODE_WITH_PREFIX): Ditto.
11092 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
11093 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
11094 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
11095 (legitimize_move): Enable basic VLS modes support.
11096 (get_vlmul): Ditto.
11097 (get_ratio): Ditto.
11098 (get_vector_mode): Ditto.
11099 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
11100 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
11101 (VLS_ENTRY): New macro.
11102 (riscv_v_ext_mode_p): Add vls modes.
11103 (riscv_get_v_regno_alignment): New function.
11104 (riscv_print_operand): Add vls modes.
11105 (riscv_hard_regno_nregs): Ditto.
11106 (riscv_hard_regno_mode_ok): Ditto.
11107 (riscv_regmode_natural_size): Ditto.
11108 (riscv_vectorize_preferred_vector_alignment): Ditto.
11109 * config/riscv/riscv.md: Ditto.
11110 * config/riscv/vector-iterators.md: Ditto.
11111 * config/riscv/vector.md: Ditto.
11112 * config/riscv/autovec-vls.md: New file.
11114 2023-07-27 Pan Li <pan2.li@intel.com>
11116 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
11117 (vread_csr): Ditto.
11118 (vwrite_csr): Ditto.
11120 2023-07-27 demin.han <demin.han@starfivetech.com>
11122 * config/riscv/autovec.md: Delete which_alternative use in split
11124 2023-07-27 Richard Biener <rguenther@suse.de>
11126 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
11128 (pass_sink_code::execute): ... in the caller.
11130 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
11131 Richard Biener <rguenther@suse.de>
11133 PR tree-optimization/110776
11134 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
11137 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11139 * config/riscv/riscv.md: Include zicond.md
11140 * config/riscv/zicond.md: New file.
11142 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11144 * common/config/riscv/riscv-common.cc: New extension.
11145 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
11146 (TARGET_ZICOND): New target.
11148 2023-07-26 Carl Love <cel@us.ibm.com>
11150 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
11151 specifies the number of built-in arguments to check.
11152 (altivec_resolve_overloaded_builtin): Update calls to find_instance
11153 to pass the number of built-in arguments to be checked.
11155 2023-07-26 David Faust <david.faust@oracle.com>
11157 * config/bpf/bpf.opt (mv3-atomics): New option.
11158 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11159 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
11160 (REG_CLASS_NAMES): Likewise.
11161 (REG_CLASS_CONTENTS): Likewise.
11162 (REGNO_REG_CLASS): Handle R0.
11163 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
11164 (UNSPEC_AAND): New unspec.
11165 (UNSPEC_AOR): Likewise.
11166 (UNSPEC_AXOR): Likewise.
11167 (UNSPEC_AFADD): Likewise.
11168 (UNSPEC_AFAND): Likewise.
11169 (UNSPEC_AFOR): Likewise.
11170 (UNSPEC_AFXOR): Likewise.
11171 (UNSPEC_AXCHG): Likewise.
11172 (UNSPEC_ACMPX): Likewise.
11173 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
11175 * config/bpf/atomic.md: ...Here. New file.
11176 * config/bpf/constraints.md (t): New constraint for R0.
11177 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
11179 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
11181 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
11184 2023-07-26 Carl Love <cel@us.ibm.com>
11186 * config/rs6000/rs6000-builtins.def: Rename
11187 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
11188 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
11189 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
11190 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
11191 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
11192 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
11193 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
11194 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
11195 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
11196 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
11197 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
11198 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
11199 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
11200 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
11201 * config/rs6000/rs6000-c.cc (find_instance): Add case
11202 RS6000_OVLD_VEC_REPLACE_UN.
11203 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
11204 Fix first argument type. Rename VREPLACE_UN_UV4SI as
11205 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
11206 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
11207 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
11208 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
11209 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
11210 REPLACE_ELT_V for vector modes.
11211 (REPLACE_ELT): New scalar mode iterator.
11212 (REPLACE_ELT_char): Add scalar attributes.
11213 (vreplace_un_<mode>): Change iterator and mode attribute.
11215 2023-07-26 David Malcolm <dmalcolm@redhat.com>
11218 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
11220 2023-07-26 Richard Biener <rguenther@suse.de>
11222 PR tree-optimization/106081
11223 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
11224 Assign layout -1 to splats.
11226 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11228 * range-op-mixed.h (class operator_cast): Add update_bitmask.
11229 * range-op.cc (operator_cast::update_bitmask): New.
11230 (operator_cast::fold_range): Call update_bitmask.
11232 2023-07-26 Li Xu <xuli1@eswincomputing.com>
11234 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
11235 scalar type to float16, eliminate warning.
11236 (vfloat16mf4x3_t): Ditto.
11237 (vfloat16mf4x4_t): Ditto.
11238 (vfloat16mf4x5_t): Ditto.
11239 (vfloat16mf4x6_t): Ditto.
11240 (vfloat16mf4x7_t): Ditto.
11241 (vfloat16mf4x8_t): Ditto.
11242 (vfloat16mf2x2_t): Ditto.
11243 (vfloat16mf2x3_t): Ditto.
11244 (vfloat16mf2x4_t): Ditto.
11245 (vfloat16mf2x5_t): Ditto.
11246 (vfloat16mf2x6_t): Ditto.
11247 (vfloat16mf2x7_t): Ditto.
11248 (vfloat16mf2x8_t): Ditto.
11249 (vfloat16m1x2_t): Ditto.
11250 (vfloat16m1x3_t): Ditto.
11251 (vfloat16m1x4_t): Ditto.
11252 (vfloat16m1x5_t): Ditto.
11253 (vfloat16m1x6_t): Ditto.
11254 (vfloat16m1x7_t): Ditto.
11255 (vfloat16m1x8_t): Ditto.
11256 (vfloat16m2x2_t): Ditto.
11257 (vfloat16m2x3_t): Ditto.
11258 (vfloat16m2x4_t): Ditto.
11259 (vfloat16m4x2_t): Ditto.
11260 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
11261 * config/riscv/vector.md: add tuple mode in attr sew.
11263 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
11266 * config/i386/i386.md (plusminusmult): New code iterator.
11267 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
11268 (movq_<mode>_to_sse): New expander.
11269 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
11270 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
11271 as a wrapper around V4SFmode operation.
11272 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
11273 nonimmediate_operand.
11274 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
11275 operand 2 predicates to nonimmediate_operand.
11276 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
11277 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
11278 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
11279 operand 2 predicates to nonimmediate_operand.
11280 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
11281 nonimmediate_operand.
11282 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
11283 operand 2 predicates to nonimmediate_operand.
11284 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
11285 (<smaxmin:code>v2sf3): Ditto.
11286 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
11287 predicates to nonimmediate_operand.
11288 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
11289 operand 1 and operand 2 predicates to nonimmediate_operand.
11290 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
11291 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
11292 (*mmx_haddv2sf3_low): Ditto.
11293 (*mmx_hsubv2sf3_low): Ditto.
11294 (vec_addsubv2sf3): Ditto.
11295 (*mmx_maskcmpv2sf3_comm): Remove.
11296 (*mmx_maskcmpv2sf3): Remove.
11297 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
11298 (vcond<V2FI:mode>v2sf): Ditto.
11301 (fnmav2sf4): Ditto.
11302 (fnmsv2sf4): Ditto.
11303 (fix_truncv2sfv2si2): Ditto.
11304 (fixuns_truncv2sfv2si2): Ditto.
11305 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
11306 Change operand 1 predicate to nonimmediate_operand.
11307 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
11308 (floatunsv2siv2sf2): Ditto.
11309 (mmx_floatv2siv2sf2): Remove SSE alternatives.
11310 Change operand 1 predicate to nonimmediate_operand.
11311 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
11312 (rintv2sf2): Ditto.
11313 (lrintv2sfv2si2): Ditto.
11314 (ceilv2sf2): Ditto.
11315 (lceilv2sfv2si2): Ditto.
11316 (floorv2sf2): Ditto.
11317 (lfloorv2sfv2si2): Ditto.
11318 (btruncv2sf2): Ditto.
11319 (roundv2sf2): Ditto.
11320 (lroundv2sfv2si2): Ditto.
11321 (*mmx_roundv2sf2): Remove.
11323 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
11325 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
11327 2023-07-26 Richard Biener <rguenther@suse.de>
11329 PR tree-optimization/110799
11330 * tree-ssa-pre.cc (compute_avail): More thoroughly match
11331 up TBAA behavior of redundant loads.
11333 2023-07-26 Jakub Jelinek <jakub@redhat.com>
11335 PR tree-optimization/110755
11336 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
11337 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
11338 it is exact op1 + (-op1) or op1 - op1.
11340 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
11343 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
11344 operands output with "x".
11346 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11348 * range-op.cc (class operator_absu): Add update_bitmask.
11349 (operator_absu::update_bitmask): New.
11351 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11353 * range-op-mixed.h (class operator_abs): Add update_bitmask.
11354 * range-op.cc (operator_abs::update_bitmask): New.
11356 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11358 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
11359 * range-op.cc (operator_bitwise_not::update_bitmask): New.
11361 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11363 * range-op.cc (update_known_bitmask): Handle unary operators.
11365 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11367 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
11369 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
11371 * config/riscv/riscv.md: Likewise.
11373 2023-07-26 Jan Hubicka <jh@suse.cz>
11375 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
11376 if we divide by zero.
11378 2023-07-25 David Faust <david.faust@oracle.com>
11380 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
11381 enclosing parentheses for pseudo-C dialect.
11382 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
11383 operands of pseudo-C dialect output templates where needed.
11384 (zero_extendqidi2): Likewise.
11385 (zero_extendsidi2): Likewise.
11386 (*mov<MM:mode>): Likewise.
11388 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
11390 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
11391 (bit_value_mult_const): Same.
11392 (get_individual_bits): Same.
11394 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
11397 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
11398 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
11399 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
11400 (minmax_op): New int attribute.
11401 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
11402 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
11403 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
11404 pattern to fmaxdf3.
11405 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
11407 2023-07-24 David Faust <david.faust@oracle.com>
11409 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
11411 2023-07-24 Drew Ross <drross@redhat.com>
11412 Jakub Jelinek <jakub@redhat.com>
11414 PR middle-end/109986
11415 * generic-match-head.cc (bitwise_equal_p): New macro.
11416 * gimple-match-head.cc (bitwise_equal_p): New macro.
11417 (gimple_nop_convert): Declare.
11418 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
11419 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
11421 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
11423 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
11424 single quote rather than backquote in diagnostic.
11426 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
11429 * config/bpf/bpf.opt: New command-line option -msdiv.
11430 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
11431 * config/bpf/bpf.cc (bpf_option_override): Initialize
11433 * doc/invoke.texi (eBPF Options): Document -msdiv.
11435 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
11437 * config/riscv/riscv.cc (riscv_option_override): Spell out
11438 greater than and use cannot in diagnostic string.
11440 2023-07-24 Richard Biener <rguenther@suse.de>
11442 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
11443 (_slp_tree::vec_stmts): Remove.
11444 (SLP_TREE_VEC_STMTS): Remove.
11445 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
11446 (_slp_tree::_slp_tree): Adjust.
11447 (_slp_tree::~_slp_tree): Likewise.
11448 (vect_get_slp_vect_def): Simplify.
11449 (vect_get_slp_defs): Likewise.
11450 (vect_transform_slp_perm_load_1): Adjust.
11451 (vect_add_slp_permutation): Likewise.
11452 (vect_schedule_slp_node): Likewise.
11453 (vectorize_slp_instance_root_stmt): Likewise.
11454 (vect_schedule_scc): Likewise.
11455 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
11456 (vectorizable_call): Likewise.
11457 (vectorizable_call): Likewise.
11458 (vect_create_vectorized_demotion_stmts): Likewise.
11459 (vectorizable_conversion): Likewise.
11460 (vectorizable_assignment): Likewise.
11461 (vectorizable_shift): Likewise.
11462 (vectorizable_operation): Likewise.
11463 (vectorizable_load): Likewise.
11464 (vectorizable_condition): Likewise.
11465 (vectorizable_comparison): Likewise.
11466 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
11467 (vectorize_fold_left_reduction): Use push_vec_def.
11468 (vect_transform_reduction): Likewise.
11469 (vect_transform_cycle_phi): Likewise.
11470 (vectorizable_lc_phi): Likewise.
11471 (vectorizable_phi): Likewise.
11472 (vectorizable_recurr): Likewise.
11473 (vectorizable_induction): Likewise.
11474 (vectorizable_live_operation): Likewise.
11476 2023-07-24 Richard Biener <rguenther@suse.de>
11478 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
11480 2023-07-24 Richard Biener <rguenther@suse.de>
11482 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
11483 * config/i386/i386-expand.cc: Likewise.
11484 * config/i386/i386-features.cc: Likewise.
11485 * config/i386/i386-options.cc: Likewise.
11487 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
11489 * tree-vect-stmts.cc (vectorizable_conversion): Handle
11490 more demotion/promotion for modifier == NONE.
11492 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
11497 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
11498 (extzv<mode>): Likewise.
11499 (insv<mode>): Likewise.
11500 (*testqi_ext_3): Likewise.
11501 (*btr<mode>_2): Likewise.
11502 (define_split): Likewise.
11503 (*btsq_imm): Likewise.
11504 (*btrq_imm): Likewise.
11505 (*btcq_imm): Likewise.
11506 (define_peephole2 x3): Likewise.
11507 (*bt<mode>): Likewise
11508 (*bt<mode>_mask): New define_insn_and_split.
11509 (*jcc_bt<mode>): Use QImode for offsets.
11510 (*jcc_bt<mode>_1): Delete obsolete pattern.
11511 (*jcc_bt<mode>_mask): Use QImode offsets.
11512 (*jcc_bt<mode>_mask_1): Likewise.
11513 (define_split): Likewise.
11514 (*bt<mode>_setcqi): Likewise.
11515 (*bt<mode>_setncqi): Likewise.
11516 (*bt<mode>_setnc<mode>): Likewise.
11517 (*bt<mode>_setncqi_2): Likewise.
11518 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
11519 (bmi2_bzhi_<mode>3): Use QImode offsets.
11520 (*bmi2_bzhi_<mode>3): Likewise.
11521 (*bmi2_bzhi_<mode>3_1): Likewise.
11522 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
11523 (@tbm_bextri_<mode>): Likewise.
11525 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
11527 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
11528 * config/bpf/bpf.opt (mkernel): Remove option.
11529 * config/bpf/bpf.cc (bpf_target_macros): Do not define
11530 BPF_KERNEL_VERSION_CODE.
11532 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
11535 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
11536 (mbswap): New option.
11537 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
11538 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
11539 * config/bpf/bpf.md: Use bswap instructions if available for
11540 bswap* insn, and fix constraint.
11541 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
11543 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11545 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
11546 (mask_len_fold_left_plus_<mode>): Ditto.
11547 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11548 (enum reduction_type): Ditto.
11549 (expand_reduction): Add in-order reduction.
11550 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
11551 (expand_reduction): Add in-order reduction.
11553 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11555 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
11556 (vectorize_fold_left_reduction): Ditto.
11557 (vectorizable_reduction): Ditto.
11558 (vect_transform_reduction): Ditto.
11560 2023-07-24 Richard Biener <rguenther@suse.de>
11562 PR tree-optimization/110777
11563 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
11564 Avoid propagating abnormals.
11566 2023-07-24 Richard Biener <rguenther@suse.de>
11568 PR tree-optimization/110766
11569 * tree-scalar-evolution.cc
11570 (analyze_and_compute_bitwise_induction_effect): Check the PHI
11571 is defined in the loop header.
11573 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
11575 PR tree-optimization/110740
11576 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
11577 loop with a single scalar iteration.
11579 2023-07-24 Pan Li <pan2.li@intel.com>
11581 * config/riscv/riscv-vector-builtins-shapes.cc
11582 (struct alu_frm_def): Take range check.
11584 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
11587 * config/riscv/predicates.md (const_0_operand): Add back
11590 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
11592 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
11593 64-bit insertions into TImode optimizations with -O0, unless
11594 the function has the "naked" attribute (for PR target/110533).
11596 2023-07-22 Andrew Pinski <apinski@marvell.com>
11599 * rtl.h (extended_count): Change last argument type
11602 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
11604 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
11605 (extzv<mode>): Likewise.
11606 (insv<mode>): Likewise.
11607 (*testqi_ext_3): Likewise.
11608 (*btr<mode>_2): Likewise.
11609 (define_split): Likewise.
11610 (*btsq_imm): Likewise.
11611 (*btrq_imm): Likewise.
11612 (*btcq_imm): Likewise.
11613 (define_peephole2 x3): Likewise.
11614 (*bt<mode>): Likewise
11615 (*bt<mode>_mask): New define_insn_and_split.
11616 (*jcc_bt<mode>): Use QImode for offsets.
11617 (*jcc_bt<mode>_1): Delete obsolete pattern.
11618 (*jcc_bt<mode>_mask): Use QImode offsets.
11619 (*jcc_bt<mode>_mask_1): Likewise.
11620 (define_split): Likewise.
11621 (*bt<mode>_setcqi): Likewise.
11622 (*bt<mode>_setncqi): Likewise.
11623 (*bt<mode>_setnc<mode>): Likewise.
11624 (*bt<mode>_setncqi_2): Likewise.
11625 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
11626 (bmi2_bzhi_<mode>3): Use QImode offsets.
11627 (*bmi2_bzhi_<mode>3): Likewise.
11628 (*bmi2_bzhi_<mode>3_1): Likewise.
11629 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
11630 (@tbm_bextri_<mode>): Likewise.
11632 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
11634 * config/bfin/bfin.md (ones): Fix length computation.
11636 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
11638 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
11639 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
11640 instead of FRAME_POINTER_REGNUM to spill pseudos.
11642 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
11643 Richard Biener <rguenther@suse.de>
11646 * gimplify.cc (gimplify_compound_lval): If the array's type
11647 is error_mark_node then return GS_ERROR.
11649 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
11652 * config/bpf/bpf.opt: Added option -masm=<dialect>.
11653 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
11654 * config/bpf/bpf.cc (bpf_print_register): New function.
11655 (bpf_print_register): Support pseudo-c syntax for registers.
11656 (bpf_print_operand_address): Likewise.
11657 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
11658 (ASSEMBLER_DIALECT): Define.
11659 * config/bpf/bpf.md: Added pseudo-c templates.
11660 * doc/invoke.texi (-masm=): New eBPF option item.
11662 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
11664 * config/bpf/bpf.md: fixed template for neg instruction.
11666 2023-07-21 Jan Hubicka <jh@suse.cz>
11669 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
11670 profiles by vectorization factor.
11671 (vect_transform_loop): Check for flat profiles.
11673 2023-07-21 Jan Hubicka <jh@suse.cz>
11675 * cfgloop.h (maybe_flat_loop_profile): Declare
11676 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
11677 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
11679 2023-07-21 Jan Hubicka <jh@suse.cz>
11681 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
11682 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
11683 * predict.cc (estimate_bb_frequencies): Likewise.
11684 * profile.cc (branch_prob): Likewise.
11685 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
11687 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
11689 * config.in: Regenerate.
11690 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
11691 (LINK_COMMAND_SPEC_A): Add demangle handling.
11692 * configure: Regenerate.
11693 * configure.ac: Detect linker support for '-demangle'.
11695 2023-07-21 Jan Hubicka <jh@suse.cz>
11697 * sreal.cc (sreal::to_nearest_int): New.
11698 (sreal_verify_basics): Verify also to_nearest_int.
11699 (verify_aritmetics): Likewise.
11700 (sreal_verify_conversions): New.
11701 (sreal_cc_tests): Call sreal_verify_conversions.
11702 * sreal.h: (sreal::to_nearest_int): Declare
11704 2023-07-21 Jan Hubicka <jh@suse.cz>
11706 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
11707 (should_duplicate_loop_header_p): Return info on profitability.
11708 (do_while_loop_p): Watch for constant conditionals.
11709 (update_profile_after_ch): Do not sanity check that all
11710 static exits are taken.
11711 (ch_base::copy_headers): Run on all loops.
11712 (pass_ch::process_loop_p): Improve heuristics by handling also
11713 do_while loop and duplicating shortest sequence containing all
11716 2023-07-21 Jan Hubicka <jh@suse.cz>
11718 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
11719 tests first; update finite_p flag.
11721 2023-07-21 Jan Hubicka <jh@suse.cz>
11723 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
11724 * cfgloop.h (print_loop_info): Declare.
11725 * tree-cfg.cc (print_loop_info): Break out from ...; add
11726 printing of missing fields and profile
11727 (print_loop): ... here.
11729 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11731 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
11733 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11735 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
11736 (vectorizable_operation): Ditto.
11738 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11740 * config/riscv/autovec.md: Align order of mask and len.
11741 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
11742 (expand_gather_scatter): Ditto.
11743 * doc/md.texi: Ditto.
11744 * internal-fn.cc (add_len_and_mask_args): Ditto.
11745 (add_mask_and_len_args): Ditto.
11746 (expand_partial_load_optab_fn): Ditto.
11747 (expand_partial_store_optab_fn): Ditto.
11748 (expand_scatter_store_optab_fn): Ditto.
11749 (expand_gather_load_optab_fn): Ditto.
11750 (internal_fn_len_index): Ditto.
11751 (internal_fn_mask_index): Ditto.
11752 (internal_len_load_store_bias): Ditto.
11753 * tree-vect-stmts.cc (vectorizable_store): Ditto.
11754 (vectorizable_load): Ditto.
11756 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11758 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
11759 (mask_len_load<mode><vm>): Ditto.
11760 (len_maskstore<mode><vm>): Ditto.
11761 (mask_len_store<mode><vm>): Ditto.
11762 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
11763 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
11764 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
11765 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
11766 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
11767 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
11768 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
11769 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
11770 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
11771 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
11772 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
11773 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
11774 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
11775 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
11776 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
11777 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
11778 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
11779 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
11780 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
11781 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
11782 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
11783 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
11784 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
11785 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
11786 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
11787 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
11788 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
11789 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
11790 * doc/md.texi: Ditto.
11791 * genopinit.cc (main): Ditto.
11792 (CMP_NAME): Ditto. Ditto.
11793 * gimple-fold.cc (arith_overflowed_p): Ditto.
11794 (gimple_fold_partial_load_store_mem_ref): Ditto.
11795 (gimple_fold_call): Ditto.
11796 * internal-fn.cc (len_maskload_direct): Ditto.
11797 (mask_len_load_direct): Ditto.
11798 (len_maskstore_direct): Ditto.
11799 (mask_len_store_direct): Ditto.
11800 (expand_call_mem_ref): Ditto.
11801 (expand_len_maskload_optab_fn): Ditto.
11802 (expand_mask_len_load_optab_fn): Ditto.
11803 (expand_len_maskstore_optab_fn): Ditto.
11804 (expand_mask_len_store_optab_fn): Ditto.
11805 (direct_len_maskload_optab_supported_p): Ditto.
11806 (direct_mask_len_load_optab_supported_p): Ditto.
11807 (direct_len_maskstore_optab_supported_p): Ditto.
11808 (direct_mask_len_store_optab_supported_p): Ditto.
11809 (internal_load_fn_p): Ditto.
11810 (internal_store_fn_p): Ditto.
11811 (internal_gather_scatter_fn_p): Ditto.
11812 (internal_fn_len_index): Ditto.
11813 (internal_fn_mask_index): Ditto.
11814 (internal_fn_stored_value_index): Ditto.
11815 (internal_len_load_store_bias): Ditto.
11816 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
11817 (MASK_LEN_GATHER_LOAD): Ditto.
11818 (LEN_MASK_LOAD): Ditto.
11819 (MASK_LEN_LOAD): Ditto.
11820 (LEN_MASK_SCATTER_STORE): Ditto.
11821 (MASK_LEN_SCATTER_STORE): Ditto.
11822 (LEN_MASK_STORE): Ditto.
11823 (MASK_LEN_STORE): Ditto.
11824 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
11825 (supports_vec_scatter_store_p): Ditto.
11826 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
11827 (target_supports_len_load_store_p): Ditto.
11828 * optabs.def (OPTAB_CD): Ditto.
11829 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
11830 (call_may_clobber_ref_p_1): Ditto.
11831 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
11832 (dse_optimize_stmt): Ditto.
11833 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
11834 (get_alias_ptr_type_for_ptr_address): Ditto.
11835 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
11836 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
11837 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11838 (vect_get_strided_load_store_ops): Ditto.
11839 (vectorizable_store): Ditto.
11840 (vectorizable_load): Ditto.
11842 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
11844 * config/i386/i386.opt: Fix a typo.
11846 2023-07-21 Richard Biener <rguenther@suse.de>
11848 PR tree-optimization/88540
11849 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
11850 with NaNs but handle the simple case by if-converting to a
11853 2023-07-21 Andrew Pinski <apinski@marvell.com>
11855 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
11858 2023-07-21 Richard Biener <rguenther@suse.de>
11860 PR tree-optimization/110742
11861 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
11862 Do not materialize an edge permutation in an external node with
11864 (vect_slp_analyze_node_operations_1): Guard purely internal
11867 2023-07-21 Jan Hubicka <jh@suse.cz>
11869 * cfgloop.cc: Include sreal.h.
11870 (flow_loop_dump): Dump sreal iteration exsitmate.
11871 (get_estimated_loop_iterations): Update.
11872 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
11873 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
11874 (expected_loop_iterations_unbounded): Use new API.
11875 * cfgloopmanip.cc (scale_loop_profile): Use
11876 expected_loop_iterations_by_profile
11877 * predict.cc (pass_profile::execute): Likewise.
11878 * profile.cc (branch_prob): Likewise.
11879 * tree-ssa-loop-niter.cc: Include sreal.h.
11880 (estimate_numbers_of_iterations): Likewise
11882 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
11884 PR tree-optimization/110744
11885 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
11886 operand for ifn IFN_LEN_STORE.
11888 2023-07-21 liuhongt <hongtao.liu@intel.com>
11891 * common.opt: (fcf-protection=): Add EnumSet attribute to
11892 support combination of params.
11894 2023-07-21 David Malcolm <dmalcolm@redhat.com>
11896 PR middle-end/110612
11897 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
11899 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
11900 (table_geometry::table_y_to_canvas_y): Likewise.
11901 * text-art/table.h (table_geometry::m_table): Drop unused field.
11902 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
11905 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
11908 * config/i386/i386-features.cc
11909 (general_scalar_chain::compute_convert_gain): Calculate gain
11910 for extend higpart case.
11911 (general_scalar_chain::convert_op): Handle
11912 ASHIFTRT/ASHIFT combined RTX.
11913 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
11914 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
11915 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
11916 New define_insn_and_split pattern.
11917 (*extendv2di2_highpart_stv): Ditto.
11919 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
11921 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
11924 2023-07-20 Andrew Pinski <apinski@marvell.com>
11926 * combine.cc (dump_combine_stats): Remove.
11927 (dump_combine_total_stats): Remove.
11928 (total_attempts, total_merges, total_extras,
11929 total_successes): Remove.
11930 (combine_instructions): Don't increment total stats
11931 instead use statistics_counter_event.
11932 * dumpfile.cc (print_combine_total_stats): Remove.
11933 * dumpfile.h (print_combine_total_stats): Remove.
11934 (dump_combine_total_stats): Remove.
11935 * passes.cc (finish_optimization_passes):
11936 Don't call print_combine_total_stats.
11937 * rtl.h (dump_combine_total_stats): Remove.
11938 (dump_combine_stats): Remove.
11940 2023-07-20 Jan Hubicka <jh@suse.cz>
11942 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
11945 2023-07-20 Martin Jambor <mjambor@suse.cz>
11947 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
11948 (analyzer-text-art-ideal-canvas-width): Likewise.
11949 (analyzer-text-art-string-ellipsis-head-len): Likewise.
11950 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
11952 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11954 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
11955 Refine code structure.
11957 2023-07-20 Jan Hubicka <jh@suse.cz>
11959 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
11960 (get_range_query): ... this one; do
11961 (static_loop_exit): Add query parametr, turn ranger to reference.
11962 (loop_static_stmt_p): New function.
11963 (loop_static_op_p): New function.
11964 (loop_iv_derived_p): Remove.
11965 (loop_combined_static_and_iv_p): New function.
11966 (should_duplicate_loop_header_p): Discover combined onditionals;
11967 do not track iv derived; improve dumps.
11968 (pass_ch::execute): Fix whitespace.
11970 2023-07-20 Richard Biener <rguenther@suse.de>
11972 PR tree-optimization/110204
11973 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
11974 Look through copies generated by PRE.
11976 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
11978 * tree-vect-stmts.cc (get_group_load_store_type): Account for
11979 `gap` when checking if need to peel twice.
11981 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
11983 PR middle-end/77928
11984 * doc/extend.texi: Document iseqsig builtin.
11985 * builtins.cc (fold_builtin_iseqsig): New function.
11986 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
11987 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
11988 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
11990 2023-07-20 Pan Li <pan2.li@intel.com>
11992 * config/riscv/vector.md: Fix incorrect match_operand.
11994 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
11996 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
11997 force_reg, to use SUBREG rather than create a new pseudo when
11998 inserting DFmode fields into TImode with insvti_{high,low}part.
11999 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
12000 define_insn_and_split...
12001 (*concatditi3_3): 64-bit implementation. Provide alternative
12002 that allows register allocation to use SSE registers that is
12003 split into vec_concatv2di after reload.
12004 (*concatsidi3_3): 32-bit implementation.
12006 2023-07-20 Richard Biener <rguenther@suse.de>
12008 PR middle-end/61747
12009 * internal-fn.cc (expand_vec_cond_optab_fn): When the
12010 value operands are equal to the original comparison operands
12011 preserve that equality by re-using the comparison expansion.
12012 * optabs.cc (emit_conditional_move): When the value operands
12013 are equal to the comparison operands and would be forced to
12014 a register by prepare_cmp_insn do so earlier, preserving the
12017 2023-07-20 Pan Li <pan2.li@intel.com>
12019 * config/riscv/vector.md: Align pattern format.
12021 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
12023 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
12024 Granite Rapids{, D} from documentation.
12026 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12028 * config/riscv/autovec.md
12029 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
12030 Refactor RVV machine modes.
12031 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12032 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12033 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12034 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12035 (len_mask_gather_load<mode><mode>): Ditto.
12036 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12037 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12038 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12039 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12040 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12041 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12042 (len_mask_scatter_store<mode><mode>): Ditto.
12043 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12044 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
12045 (ADJUST_NUNITS): Ditto.
12046 (ADJUST_ALIGNMENT): Ditto.
12047 (ADJUST_BYTESIZE): Ditto.
12048 (ADJUST_PRECISION): Ditto.
12049 (RVV_MODES): Ditto.
12050 (RVV_WHOLE_MODES): Ditto.
12051 (RVV_FRACT_MODE): Ditto.
12052 (RVV_NF8_MODES): Ditto.
12053 (RVV_NF4_MODES): Ditto.
12054 (VECTOR_MODES_WITH_PREFIX): Ditto.
12055 (VECTOR_MODE_WITH_PREFIX): Ditto.
12056 (RVV_TUPLE_MODES): Ditto.
12057 (RVV_NF2_MODES): Ditto.
12058 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12059 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
12061 (TUPLE_ENTRY): Ditto.
12062 (get_vlmul): Ditto.
12064 (get_ratio): Ditto.
12065 (preferred_simd_mode): Ditto.
12066 (autovectorize_vector_modes): Ditto.
12067 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
12068 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
12069 (vbool64_t): Ditto.
12070 (vbool32_t): Ditto.
12071 (vbool16_t): Ditto.
12076 (vint8mf8_t): Ditto.
12077 (vuint8mf8_t): Ditto.
12078 (vint8mf4_t): Ditto.
12079 (vuint8mf4_t): Ditto.
12080 (vint8mf2_t): Ditto.
12081 (vuint8mf2_t): Ditto.
12082 (vint8m1_t): Ditto.
12083 (vuint8m1_t): Ditto.
12084 (vint8m2_t): Ditto.
12085 (vuint8m2_t): Ditto.
12086 (vint8m4_t): Ditto.
12087 (vuint8m4_t): Ditto.
12088 (vint8m8_t): Ditto.
12089 (vuint8m8_t): Ditto.
12090 (vint16mf4_t): Ditto.
12091 (vuint16mf4_t): Ditto.
12092 (vint16mf2_t): Ditto.
12093 (vuint16mf2_t): Ditto.
12094 (vint16m1_t): Ditto.
12095 (vuint16m1_t): Ditto.
12096 (vint16m2_t): Ditto.
12097 (vuint16m2_t): Ditto.
12098 (vint16m4_t): Ditto.
12099 (vuint16m4_t): Ditto.
12100 (vint16m8_t): Ditto.
12101 (vuint16m8_t): Ditto.
12102 (vint32mf2_t): Ditto.
12103 (vuint32mf2_t): Ditto.
12104 (vint32m1_t): Ditto.
12105 (vuint32m1_t): Ditto.
12106 (vint32m2_t): Ditto.
12107 (vuint32m2_t): Ditto.
12108 (vint32m4_t): Ditto.
12109 (vuint32m4_t): Ditto.
12110 (vint32m8_t): Ditto.
12111 (vuint32m8_t): Ditto.
12112 (vint64m1_t): Ditto.
12113 (vuint64m1_t): Ditto.
12114 (vint64m2_t): Ditto.
12115 (vuint64m2_t): Ditto.
12116 (vint64m4_t): Ditto.
12117 (vuint64m4_t): Ditto.
12118 (vint64m8_t): Ditto.
12119 (vuint64m8_t): Ditto.
12120 (vfloat16mf4_t): Ditto.
12121 (vfloat16mf2_t): Ditto.
12122 (vfloat16m1_t): Ditto.
12123 (vfloat16m2_t): Ditto.
12124 (vfloat16m4_t): Ditto.
12125 (vfloat16m8_t): Ditto.
12126 (vfloat32mf2_t): Ditto.
12127 (vfloat32m1_t): Ditto.
12128 (vfloat32m2_t): Ditto.
12129 (vfloat32m4_t): Ditto.
12130 (vfloat32m8_t): Ditto.
12131 (vfloat64m1_t): Ditto.
12132 (vfloat64m2_t): Ditto.
12133 (vfloat64m4_t): Ditto.
12134 (vfloat64m8_t): Ditto.
12135 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
12136 (TUPLE_ENTRY): Ditto.
12137 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
12138 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
12139 (riscv_v_adjust_nunits): Ditto.
12140 (riscv_v_adjust_bytesize): Ditto.
12141 (riscv_v_adjust_precision): Ditto.
12142 (riscv_convert_vector_bits): Ditto.
12143 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
12144 * config/riscv/riscv.md: Ditto.
12145 * config/riscv/vector-iterators.md: Ditto.
12146 * config/riscv/vector.md
12147 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12148 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12149 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12150 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12151 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12152 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12153 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
12154 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
12155 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12156 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
12157 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12158 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
12159 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12160 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
12161 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12162 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
12163 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
12164 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
12165 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
12166 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
12167 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
12168 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12169 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
12170 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12171 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
12172 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12173 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
12174 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12175 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
12176 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
12177 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
12178 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
12179 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
12181 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
12183 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
12184 (lra_asm_insn_error): New prototype.
12185 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
12187 (lra_spill): Call lra_update_fp2sp_elimination.
12188 * lra-eliminations.cc: Remove trailing spaces.
12189 (elimination_fp2sp_occured_p): New static flag.
12190 (lra_eliminate_regs_1): Set the flag up.
12191 (update_reg_eliminate): Modify the assert for stack to frame
12192 pointer elimination.
12193 (lra_update_fp2sp_elimination): New function.
12194 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
12196 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
12198 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
12200 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
12201 dependencies from target pragmas.
12202 * config/aarch64/arm_fp16.h (target): Likewise.
12203 * config/aarch64/arm_neon.h (target): Likewise.
12205 2023-07-19 Andrew Pinski <apinski@marvell.com>
12207 PR tree-optimization/110252
12208 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
12209 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
12210 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
12211 (match_simplify_replacement): Temporarily
12212 remove the flow sensitive info on the two statements that might
12215 2023-07-19 Andrew Pinski <apinski@marvell.com>
12217 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
12218 with flow_sensitive_info_storage.
12219 (follow_outer_ssa_edges): Update how to save off the flow
12221 (maybe_fold_comparisons_from_match_pd): Update restoring
12222 of flow sensitive info.
12223 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
12224 (flow_sensitive_info_storage::restore): New method.
12225 (flow_sensitive_info_storage::save_and_clear): New method.
12226 (flow_sensitive_info_storage::clear_storage): New method.
12227 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
12229 2023-07-19 Andrew Pinski <apinski@marvell.com>
12231 PR tree-optimization/110726
12232 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
12233 Add checks to make sure the type was one bit precision
12236 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12238 * doc/md.texi: Add mask_len_fold_left_plus.
12239 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
12240 (expand_mask_len_fold_left_optab_fn): Ditto.
12241 (direct_mask_len_fold_left_optab_supported_p): Ditto.
12242 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
12243 * optabs.def (OPTAB_D): Ditto.
12245 2023-07-19 Jakub Jelinek <jakub@redhat.com>
12247 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
12249 2023-07-19 Jakub Jelinek <jakub@redhat.com>
12251 PR tree-optimization/110731
12252 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
12253 divisor as UNSIGNED regardless of sgn.
12255 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
12257 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
12258 (standard_extensions_p): Add check.
12259 (riscv_subset_list::add): Just return NULL if it failed before.
12260 (riscv_subset_list::parse_std_ext): Continue parse when find a error
12261 (riscv_subset_list::parse): Just return NULL if it failed before.
12262 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
12264 2023-07-19 Jan Beulich <jbeulich@suse.com>
12266 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
12268 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
12269 gen_vec_extract_hi.
12270 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
12271 gen_vec_interleave_low. Rename local variable.
12273 2023-07-19 Jan Beulich <jbeulich@suse.com>
12275 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
12276 alternative. Move AVX512VL part of condition to new "enabled"
12279 2023-07-19 liuhongt <hongtao.liu@intel.com>
12282 * config/i386/i386-builtins.cc
12283 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
12284 (ix86_register_bf16_builtin_type): Ditto.
12285 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
12286 isn't available, undef the macros which are used to check the
12287 backend support of the _Float16/__bf16 types when building
12288 libstdc++ and libgcc.
12289 * config/i386/i386.cc (construct_container): Issue errors for
12290 HFmode/BFmode when TARGET_SSE2 is not available.
12291 (function_value_32): Ditto.
12292 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
12293 (ix86_libgcc_floating_mode_supported_p): Ditto.
12294 (ix86_emit_support_tinfos): Adjust codes.
12295 (ix86_invalid_conversion): Return diagnostic message string
12296 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
12297 (ix86_invalid_unary_op): New function.
12298 (ix86_invalid_binary_op): Ditto.
12299 (TARGET_INVALID_UNARY_OP): Define.
12300 (TARGET_INVALID_BINARY_OP): Define.
12301 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
12302 related instrinsics header files.
12303 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
12305 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
12307 * dwarf2asm.cc: Change FALSE to false.
12308 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
12309 * dwarf2out.cc (matches_main_base): Change return type from
12310 int to bool. Change "last_match" variable to bool.
12311 (dump_struct_debug): Change return type from int to bool.
12312 Change "matches" and "result" function arguments to bool.
12313 (is_pseudo_reg): Change return type from int to bool.
12314 (is_tagged_type): Ditto.
12315 (same_loc_p): Ditto.
12316 (same_dw_val_p): Change return type from int to bool and adjust
12317 function body accordingly.
12318 (same_attr_p): Ditto.
12319 (same_die_p): Ditto.
12320 (is_type_die): Ditto.
12321 (is_declaration_die): Ditto.
12322 (should_move_die_to_comdat): Ditto.
12323 (is_base_type): Ditto.
12324 (is_based_loc): Ditto.
12325 (local_scope_p): Ditto.
12326 (class_scope_p): Ditto.
12327 (class_or_namespace_scope_p): Ditto.
12328 (is_tagged_type): Ditto.
12329 (is_rust): Use void argument.
12330 (is_nested_in_subprogram): Change return type from int to bool.
12331 (contains_subprogram_definition): Ditto.
12332 (gen_struct_or_union_type_die): Change "nested", "complete"
12333 and "ns_decl" variables to bool.
12334 (is_naming_typedef_decl): Change FALSE to false.
12336 2023-07-18 Jan Hubicka <jh@suse.cz>
12338 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
12339 for queries not in headers.
12340 (static_loop_exit): Add basic blck parameter; update use of
12342 (should_duplicate_loop_header_p): Add ranger and static_exits
12343 parameter. Do not account statements that will be optimized
12344 out after duplicaiton in overall size. Add ranger query to
12346 (update_profile_after_ch): Take static_exits has set instead of
12347 single eliminated_edge.
12348 (ch_base::copy_headers): Do all analysis in the first pass;
12349 remember invariant_exits and static_exits.
12351 2023-07-18 Jason Merrill <jason@redhat.com>
12353 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
12355 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
12357 * doc/gm2.texi (Semantic checking): Change example testwithptr
12360 2023-07-18 Richard Biener <rguenther@suse.de>
12362 PR middle-end/105715
12363 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
12364 (pass_gimple_isel::execute): ... this. Duplicate
12365 comparison defs of COND_EXPRs.
12367 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12369 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
12370 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
12371 (riscv_convert_vector_bits): Ditto.
12373 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12375 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
12376 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
12378 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
12380 * config/s390/vx-builtins.md: New vsel pattern.
12382 2023-07-18 liuhongt <hongtao.liu@intel.com>
12385 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
12386 Remove # from assemble output.
12388 2023-07-18 liuhongt <hongtao.liu@intel.com>
12391 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
12392 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
12393 3 define_peephole2 after the pattern.
12395 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12397 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
12399 2023-07-18 Pan Li <pan2.li@intel.com>
12400 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12402 * config/riscv/riscv.cc (struct machine_function): Add new field.
12403 (riscv_static_frm_mode_p): New function.
12404 (riscv_emit_frm_mode_set): New function for emit FRM.
12405 (riscv_emit_mode_set): Extract function for FRM.
12406 (riscv_mode_needed): Fix the TODO.
12407 (riscv_mode_entry): Initial dynamic frm RTL.
12408 (riscv_mode_exit): Return DYN_EXIT.
12409 * config/riscv/riscv.md: Add rdfrm.
12410 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
12411 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
12413 (fsrmsi_backup): New pattern for swap.
12414 (fsrmsi_restore): New pattern for restore.
12415 (fsrmsi_restore_exit): New pattern for restore exit.
12416 (frrmsi): New pattern for backup.
12418 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
12420 * doc/extend.texi: Add @cindex on __auto_type.
12422 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
12424 * combine-stack-adj.cc (stack_memref_p): Change return type from
12425 int to bool and adjust function body accordingly.
12426 (rest_of_handle_stack_adjustments): Change return type to void.
12428 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
12430 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
12431 (cant_combine_insn_p): Change return type from int to bool and adjust
12432 function body accordingly.
12433 (can_combine_p): Ditto.
12434 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
12435 function arguments from int to bool.
12436 (contains_muldiv): Change return type from int to bool and adjust
12437 function body accordingly.
12438 (try_combine): Ditto. Change "new_direct_jump" pointer function
12439 argument from int to bool. Change "substed_i2", "substed_i1",
12440 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
12441 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
12442 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
12443 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
12444 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
12445 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
12447 (subst): Change "in_dest", "in_cond" and "unique_copy" function
12448 arguments from int to bool.
12449 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
12450 arguments from int to bool.
12451 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
12452 function argument from int to bool.
12453 (force_int_to_mode): Change "just_select" function argument
12454 from int to bool. Change "next_select" variable to bool.
12455 (rtx_equal_for_field_assignment_p): Change return type from
12456 int to bool and adjust function body accordingly.
12457 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
12458 argument from int to bool.
12459 (get_last_value_validate): Change return type from int to bool
12460 and adjust function body accordingly.
12461 (reg_dead_at_p): Ditto.
12462 (reg_bitfield_target_p): Ditto.
12463 (combine_instructions): Ditto. Change "new_direct_jump"
12465 (can_combine_p): Change return type from int to bool
12466 and adjust function body accordingly.
12467 (likely_spilled_retval_p): Ditto.
12468 (can_change_dest_mode): Change "added_sets" function argument
12470 (find_split_point): Change "unsignedp" variable to bool.
12471 (simplify_if_then_else): Change "comparison_p" and "swapped"
12473 (simplify_set): Change "other_changed" variable to bool.
12474 (expand_compound_operation): Change "unsignedp" variable to bool.
12475 (force_to_mode): Change "just_select" function argument
12476 from int to bool. Change "next_select" variable to bool.
12477 (extended_count): Change "unsignedp" function argument to bool.
12478 (simplify_shift_const_1): Change "complement_p" variable to bool.
12479 (simplify_comparison): Change "changed" variable to bool.
12480 (rest_of_handle_combine): Change return type to void.
12482 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12485 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
12487 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
12489 * ira.cc (setup_reg_class_relations): Continue
12490 if regclass cl3 is hard_reg_set_empty_p.
12492 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12494 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
12496 2023-07-17 Martin Jambor <mjambor@suse.cz>
12498 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
12501 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
12503 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
12505 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
12508 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
12509 recur add all implied extensions.
12510 (riscv_subset_list::check_implied_ext): Add new method.
12511 (riscv_subset_list::parse): Call checker check_implied_ext.
12512 * config/riscv/riscv-subset.h: Add new method.
12514 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12516 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
12517 (reduc_smax_scal_<mode>): Ditto.
12518 (reduc_umax_scal_<mode>): Ditto.
12519 (reduc_smin_scal_<mode>): Ditto.
12520 (reduc_umin_scal_<mode>): Ditto.
12521 (reduc_and_scal_<mode>): Ditto.
12522 (reduc_ior_scal_<mode>): Ditto.
12523 (reduc_xor_scal_<mode>): Ditto.
12524 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
12525 (expand_reduction): New function.
12526 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
12527 (emit_vlmax_fp_reduction_insn): Ditto.
12528 (get_m1_mode): Ditto.
12529 (expand_cond_len_binop): Fix name.
12530 (expand_reduction): New function
12531 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
12532 (validate_change_or_fail): New function.
12533 (change_insn): Fix VSETVL BUG.
12534 (change_vsetvl_insn): Ditto.
12535 (pass_vsetvl::backward_demand_fusion): Ditto.
12536 (pass_vsetvl::df_post_optimization): Ditto.
12538 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
12540 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
12542 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
12544 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
12545 Remove parameter name from declaration of unused parameter.
12547 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
12549 PR tree-optimization/110652
12550 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
12553 2023-07-17 Richard Biener <rguenther@suse.de>
12555 PR tree-optimization/110669
12556 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
12557 Check we matched a header PHI.
12559 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
12561 * tree-ssanames.cc (set_bitmask): New.
12562 * tree-ssanames.h (set_bitmask): New.
12564 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
12566 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
12568 * value-range.h (irange_bitmask::union_): Normalize beforehand.
12569 (irange_bitmask::intersect): Same.
12571 2023-07-17 Andrew Pinski <apinski@marvell.com>
12573 PR tree-optimization/95923
12574 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
12576 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
12578 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
12579 to the std::sort comparison lambda function const.
12581 2023-07-17 Andrew Pinski <apinski@marvell.com>
12583 PR tree-optimization/110666
12584 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
12586 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
12588 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
12589 Arrow Lake and Arrow Lake S.
12590 * common/config/i386/i386-common.cc:
12591 (processor_name): Add arrowlake.
12592 (processor_alias_table): Add arrow lake, arrow lake s and lunar
12594 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
12595 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
12596 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
12597 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
12599 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
12601 * config/i386/i386-options.cc (m_ARROWLAKE): New.
12602 (processor_cost_table): Add arrowlake.
12603 * config/i386/i386.h (enum processor_type):
12604 Add PROCESSOR_ARROWLAKE.
12605 * config/i386/x86-tune.def: Add m_ARROWLAKE.
12606 * doc/extend.texi: Add arrowlake and arrowlake-s.
12607 * doc/invoke.texi: Ditto.
12609 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
12611 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
12612 have the same iterator. Also renaming all the occurence to
12614 (usdot_prod<mode>): New define_expand.
12615 (udot_prod<mode>): Ditto.
12617 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
12619 * common/config/i386/cpuinfo.h (get_available_features):
12621 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
12622 OPTION_MASK_ISA2_SM4_UNSET): New.
12623 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
12624 (ix86_handle_option): Handle -msm4.
12625 * common/config/i386/i386-cpuinfo.h (enum processor_features):
12627 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
12629 * config.gcc: Add sm4intrin.h.
12630 * config/i386/cpuid.h (bit_SM4): New.
12631 * config/i386/i386-builtin.def (BDESC): Add new builtins.
12632 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12634 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
12635 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
12636 (ix86_valid_target_attribute_inner_p): Handle sm4.
12637 * config/i386/i386.opt: Add option -msm4.
12638 * config/i386/immintrin.h: Include sm4intrin.h
12639 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
12640 (vsm4rnds4_<mode>): Ditto.
12641 * doc/extend.texi: Document sm4.
12642 * doc/invoke.texi: Document -msm4.
12643 * doc/sourcebuild.texi: Document target sm4.
12644 * config/i386/sm4intrin.h: New file.
12646 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
12648 * common/config/i386/cpuinfo.h (get_available_features):
12650 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
12651 OPTION_MASK_ISA2_SHA512_UNSET): New.
12652 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
12653 (ix86_handle_option): Handle -msha512.
12654 * common/config/i386/i386-cpuinfo.h (enum processor_features):
12655 Add FEATURE_SHA512.
12656 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
12658 * config.gcc: Add sha512intrin.h.
12659 * config/i386/cpuid.h (bit_SHA512): New.
12660 * config/i386/i386-builtin-types.def:
12661 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
12662 * config/i386/i386-builtin.def (BDESC): Add new builtins.
12663 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12665 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
12666 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
12667 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
12668 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
12669 (ix86_valid_target_attribute_inner_p): Handle sha512.
12670 * config/i386/i386.opt: Add option -msha512.
12671 * config/i386/immintrin.h: Include sha512intrin.h.
12672 * config/i386/sse.md (vsha512msg1): New define insn.
12673 (vsha512msg2): Ditto.
12674 (vsha512rnds2): Ditto.
12675 * doc/extend.texi: Document sha512.
12676 * doc/invoke.texi: Document -msha512.
12677 * doc/sourcebuild.texi: Document target sha512.
12678 * config/i386/sha512intrin.h: New file.
12680 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
12682 * common/config/i386/cpuinfo.h (get_available_features):
12684 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
12685 OPTION_MASK_ISA2_SM3_UNSET): New.
12686 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
12687 (ix86_handle_option): Handle -msm3.
12688 * common/config/i386/i386-cpuinfo.h (enum processor_features):
12690 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
12692 * config.gcc: Add sm3intrin.h
12693 * config/i386/cpuid.h (bit_SM3): New.
12694 * config/i386/i386-builtin-types.def:
12695 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
12696 * config/i386/i386-builtin.def (BDESC): Add new builtins.
12697 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12699 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
12700 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
12701 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
12702 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
12703 (ix86_valid_target_attribute_inner_p): Handle sm3.
12704 * config/i386/i386.opt: Add option -msm3.
12705 * config/i386/immintrin.h: Include sm3intrin.h.
12706 * config/i386/sse.md (vsm3msg1): New define insn.
12708 (vsm3rnds2): Ditto.
12709 * doc/extend.texi: Document sm3.
12710 * doc/invoke.texi: Document -msm3.
12711 * doc/sourcebuild.texi: Document target sm3.
12712 * config/i386/sm3intrin.h: New file.
12714 2023-07-17 Kong Lingling <lingling.kong@intel.com>
12715 Haochen Jiang <haochen.jiang@intel.com>
12717 * common/config/i386/cpuinfo.h (get_available_features): Detect
12719 * common/config/i386/i386-common.cc
12720 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
12721 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
12722 (ix86_handle_option): Handle -mavxvnniint16.
12723 * common/config/i386/i386-cpuinfo.h (enum processor_features):
12724 Add FEATURE_AVXVNNIINT16.
12725 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
12727 * config.gcc: Add avxvnniint16.h.
12728 * config/i386/avxvnniint16intrin.h: New file.
12729 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
12730 * config/i386/i386-builtin.def: Add new builtins.
12731 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12733 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
12734 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
12735 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
12736 * config/i386/i386.opt: Add option -mavxvnniint16.
12737 * config/i386/immintrin.h: Include avxvnniint16.h.
12738 * config/i386/sse.md
12739 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
12740 * doc/extend.texi: Document avxvnniint16.
12741 * doc/invoke.texi: Document -mavxvnniint16.
12742 * doc/sourcebuild.texi: Document target avxvnniint16.
12744 2023-07-16 Jan Hubicka <jh@suse.cz>
12746 PR middle-end/110649
12747 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
12748 (vect_transform_loop): Move scale_profile_for_vect_loop after
12749 upper bound updates.
12751 2023-07-16 Jan Hubicka <jh@suse.cz>
12753 PR tree-optimization/110649
12754 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
12755 probability of the if-then-else construct.
12757 2023-07-16 Jan Hubicka <jh@suse.cz>
12759 PR middle-end/110649
12760 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
12762 2023-07-15 Andrew Pinski <apinski@marvell.com>
12764 * doc/contrib.texi: Update my entry.
12766 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
12768 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
12770 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
12771 (tld_load): Likewise.
12772 (tgd_load_pic): Change to expander.
12773 (tld_load_pic, tld_offset_load, tp_load): Likewise.
12774 (tie_load_pic, tle_load): Likewise.
12775 (tgd_load_picsi, tgd_load_picdi): New.
12776 (tld_load_picsi, tld_load_picdi): New.
12777 (tld_offset_load<P:mode>): New.
12778 (tp_load<P:mode>): New.
12779 (tie_load_picsi, tie_load_picdi): New.
12780 (tle_load<P:mode>): New.
12782 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
12784 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
12785 (vcmlaq_rot180, vcmlaq_rot270): New.
12786 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
12787 (vcmlaq_rot180, vcmlaq_rot270): New.
12788 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
12789 (vcmlaq_rot180, vcmlaq_rot270): New.
12790 * config/arm/arm-mve-builtins.cc
12791 (function_instance::has_inactive_argument): Handle vcmlaq,
12792 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
12793 * config/arm/arm_mve.h (vcmlaq): Delete.
12794 (vcmlaq_rot180): Delete.
12795 (vcmlaq_rot270): Delete.
12796 (vcmlaq_rot90): Delete.
12797 (vcmlaq_m): Delete.
12798 (vcmlaq_rot180_m): Delete.
12799 (vcmlaq_rot270_m): Delete.
12800 (vcmlaq_rot90_m): Delete.
12801 (vcmlaq_f16): Delete.
12802 (vcmlaq_rot180_f16): Delete.
12803 (vcmlaq_rot270_f16): Delete.
12804 (vcmlaq_rot90_f16): Delete.
12805 (vcmlaq_f32): Delete.
12806 (vcmlaq_rot180_f32): Delete.
12807 (vcmlaq_rot270_f32): Delete.
12808 (vcmlaq_rot90_f32): Delete.
12809 (vcmlaq_m_f32): Delete.
12810 (vcmlaq_m_f16): Delete.
12811 (vcmlaq_rot180_m_f32): Delete.
12812 (vcmlaq_rot180_m_f16): Delete.
12813 (vcmlaq_rot270_m_f32): Delete.
12814 (vcmlaq_rot270_m_f16): Delete.
12815 (vcmlaq_rot90_m_f32): Delete.
12816 (vcmlaq_rot90_m_f16): Delete.
12817 (__arm_vcmlaq_f16): Delete.
12818 (__arm_vcmlaq_rot180_f16): Delete.
12819 (__arm_vcmlaq_rot270_f16): Delete.
12820 (__arm_vcmlaq_rot90_f16): Delete.
12821 (__arm_vcmlaq_f32): Delete.
12822 (__arm_vcmlaq_rot180_f32): Delete.
12823 (__arm_vcmlaq_rot270_f32): Delete.
12824 (__arm_vcmlaq_rot90_f32): Delete.
12825 (__arm_vcmlaq_m_f32): Delete.
12826 (__arm_vcmlaq_m_f16): Delete.
12827 (__arm_vcmlaq_rot180_m_f32): Delete.
12828 (__arm_vcmlaq_rot180_m_f16): Delete.
12829 (__arm_vcmlaq_rot270_m_f32): Delete.
12830 (__arm_vcmlaq_rot270_m_f16): Delete.
12831 (__arm_vcmlaq_rot90_m_f32): Delete.
12832 (__arm_vcmlaq_rot90_m_f16): Delete.
12833 (__arm_vcmlaq): Delete.
12834 (__arm_vcmlaq_rot180): Delete.
12835 (__arm_vcmlaq_rot270): Delete.
12836 (__arm_vcmlaq_rot90): Delete.
12837 (__arm_vcmlaq_m): Delete.
12838 (__arm_vcmlaq_rot180_m): Delete.
12839 (__arm_vcmlaq_rot270_m): Delete.
12840 (__arm_vcmlaq_rot90_m): Delete.
12842 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
12844 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
12845 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
12846 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
12847 (mve_insn): Add vcmla.
12848 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
12850 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
12852 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
12853 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
12854 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
12855 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
12857 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
12859 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
12861 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
12862 (vcmulq_rot180, vcmulq_rot270): New.
12863 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
12864 (vcmulq_rot180, vcmulq_rot270): New.
12865 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
12866 (vcmulq_rot180, vcmulq_rot270): New.
12867 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
12868 (vcmulq_rot270): Delete.
12869 (vcmulq_rot180): Delete.
12871 (vcmulq_m): Delete.
12872 (vcmulq_rot180_m): Delete.
12873 (vcmulq_rot270_m): Delete.
12874 (vcmulq_rot90_m): Delete.
12875 (vcmulq_x): Delete.
12876 (vcmulq_rot90_x): Delete.
12877 (vcmulq_rot180_x): Delete.
12878 (vcmulq_rot270_x): Delete.
12879 (vcmulq_rot90_f16): Delete.
12880 (vcmulq_rot270_f16): Delete.
12881 (vcmulq_rot180_f16): Delete.
12882 (vcmulq_f16): Delete.
12883 (vcmulq_rot90_f32): Delete.
12884 (vcmulq_rot270_f32): Delete.
12885 (vcmulq_rot180_f32): Delete.
12886 (vcmulq_f32): Delete.
12887 (vcmulq_m_f32): Delete.
12888 (vcmulq_m_f16): Delete.
12889 (vcmulq_rot180_m_f32): Delete.
12890 (vcmulq_rot180_m_f16): Delete.
12891 (vcmulq_rot270_m_f32): Delete.
12892 (vcmulq_rot270_m_f16): Delete.
12893 (vcmulq_rot90_m_f32): Delete.
12894 (vcmulq_rot90_m_f16): Delete.
12895 (vcmulq_x_f16): Delete.
12896 (vcmulq_x_f32): Delete.
12897 (vcmulq_rot90_x_f16): Delete.
12898 (vcmulq_rot90_x_f32): Delete.
12899 (vcmulq_rot180_x_f16): Delete.
12900 (vcmulq_rot180_x_f32): Delete.
12901 (vcmulq_rot270_x_f16): Delete.
12902 (vcmulq_rot270_x_f32): Delete.
12903 (__arm_vcmulq_rot90_f16): Delete.
12904 (__arm_vcmulq_rot270_f16): Delete.
12905 (__arm_vcmulq_rot180_f16): Delete.
12906 (__arm_vcmulq_f16): Delete.
12907 (__arm_vcmulq_rot90_f32): Delete.
12908 (__arm_vcmulq_rot270_f32): Delete.
12909 (__arm_vcmulq_rot180_f32): Delete.
12910 (__arm_vcmulq_f32): Delete.
12911 (__arm_vcmulq_m_f32): Delete.
12912 (__arm_vcmulq_m_f16): Delete.
12913 (__arm_vcmulq_rot180_m_f32): Delete.
12914 (__arm_vcmulq_rot180_m_f16): Delete.
12915 (__arm_vcmulq_rot270_m_f32): Delete.
12916 (__arm_vcmulq_rot270_m_f16): Delete.
12917 (__arm_vcmulq_rot90_m_f32): Delete.
12918 (__arm_vcmulq_rot90_m_f16): Delete.
12919 (__arm_vcmulq_x_f16): Delete.
12920 (__arm_vcmulq_x_f32): Delete.
12921 (__arm_vcmulq_rot90_x_f16): Delete.
12922 (__arm_vcmulq_rot90_x_f32): Delete.
12923 (__arm_vcmulq_rot180_x_f16): Delete.
12924 (__arm_vcmulq_rot180_x_f32): Delete.
12925 (__arm_vcmulq_rot270_x_f16): Delete.
12926 (__arm_vcmulq_rot270_x_f32): Delete.
12927 (__arm_vcmulq_rot90): Delete.
12928 (__arm_vcmulq_rot270): Delete.
12929 (__arm_vcmulq_rot180): Delete.
12930 (__arm_vcmulq): Delete.
12931 (__arm_vcmulq_m): Delete.
12932 (__arm_vcmulq_rot180_m): Delete.
12933 (__arm_vcmulq_rot270_m): Delete.
12934 (__arm_vcmulq_rot90_m): Delete.
12935 (__arm_vcmulq_x): Delete.
12936 (__arm_vcmulq_rot90_x): Delete.
12937 (__arm_vcmulq_rot180_x): Delete.
12938 (__arm_vcmulq_rot270_x): Delete.
12940 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
12942 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
12943 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
12944 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
12945 (MVE_VCADDQ_VCMULQ_M): New.
12946 (mve_insn): Add vcmul.
12947 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
12950 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
12952 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
12953 @mve_<mve_insn>q<mve_rot>_f<mode>.
12954 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
12955 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
12956 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
12958 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
12960 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
12961 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
12962 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
12963 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
12964 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
12965 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
12966 * config/arm/arm-mve-builtins-functions.h (class
12967 unspec_mve_function_exact_insn_rot): New.
12968 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
12969 (vcaddq_rot270): Delete.
12970 (vhcaddq_rot90): Delete.
12971 (vhcaddq_rot270): Delete.
12972 (vcaddq_rot270_m): Delete.
12973 (vcaddq_rot90_m): Delete.
12974 (vhcaddq_rot270_m): Delete.
12975 (vhcaddq_rot90_m): Delete.
12976 (vcaddq_rot90_x): Delete.
12977 (vcaddq_rot270_x): Delete.
12978 (vhcaddq_rot90_x): Delete.
12979 (vhcaddq_rot270_x): Delete.
12980 (vcaddq_rot90_u8): Delete.
12981 (vcaddq_rot270_u8): Delete.
12982 (vhcaddq_rot90_s8): Delete.
12983 (vhcaddq_rot270_s8): Delete.
12984 (vcaddq_rot90_s8): Delete.
12985 (vcaddq_rot270_s8): Delete.
12986 (vcaddq_rot90_u16): Delete.
12987 (vcaddq_rot270_u16): Delete.
12988 (vhcaddq_rot90_s16): Delete.
12989 (vhcaddq_rot270_s16): Delete.
12990 (vcaddq_rot90_s16): Delete.
12991 (vcaddq_rot270_s16): Delete.
12992 (vcaddq_rot90_u32): Delete.
12993 (vcaddq_rot270_u32): Delete.
12994 (vhcaddq_rot90_s32): Delete.
12995 (vhcaddq_rot270_s32): Delete.
12996 (vcaddq_rot90_s32): Delete.
12997 (vcaddq_rot270_s32): Delete.
12998 (vcaddq_rot90_f16): Delete.
12999 (vcaddq_rot270_f16): Delete.
13000 (vcaddq_rot90_f32): Delete.
13001 (vcaddq_rot270_f32): Delete.
13002 (vcaddq_rot270_m_s8): Delete.
13003 (vcaddq_rot270_m_s32): Delete.
13004 (vcaddq_rot270_m_s16): Delete.
13005 (vcaddq_rot270_m_u8): Delete.
13006 (vcaddq_rot270_m_u32): Delete.
13007 (vcaddq_rot270_m_u16): Delete.
13008 (vcaddq_rot90_m_s8): Delete.
13009 (vcaddq_rot90_m_s32): Delete.
13010 (vcaddq_rot90_m_s16): Delete.
13011 (vcaddq_rot90_m_u8): Delete.
13012 (vcaddq_rot90_m_u32): Delete.
13013 (vcaddq_rot90_m_u16): Delete.
13014 (vhcaddq_rot270_m_s8): Delete.
13015 (vhcaddq_rot270_m_s32): Delete.
13016 (vhcaddq_rot270_m_s16): Delete.
13017 (vhcaddq_rot90_m_s8): Delete.
13018 (vhcaddq_rot90_m_s32): Delete.
13019 (vhcaddq_rot90_m_s16): Delete.
13020 (vcaddq_rot270_m_f32): Delete.
13021 (vcaddq_rot270_m_f16): Delete.
13022 (vcaddq_rot90_m_f32): Delete.
13023 (vcaddq_rot90_m_f16): Delete.
13024 (vcaddq_rot90_x_s8): Delete.
13025 (vcaddq_rot90_x_s16): Delete.
13026 (vcaddq_rot90_x_s32): Delete.
13027 (vcaddq_rot90_x_u8): Delete.
13028 (vcaddq_rot90_x_u16): Delete.
13029 (vcaddq_rot90_x_u32): Delete.
13030 (vcaddq_rot270_x_s8): Delete.
13031 (vcaddq_rot270_x_s16): Delete.
13032 (vcaddq_rot270_x_s32): Delete.
13033 (vcaddq_rot270_x_u8): Delete.
13034 (vcaddq_rot270_x_u16): Delete.
13035 (vcaddq_rot270_x_u32): Delete.
13036 (vhcaddq_rot90_x_s8): Delete.
13037 (vhcaddq_rot90_x_s16): Delete.
13038 (vhcaddq_rot90_x_s32): Delete.
13039 (vhcaddq_rot270_x_s8): Delete.
13040 (vhcaddq_rot270_x_s16): Delete.
13041 (vhcaddq_rot270_x_s32): Delete.
13042 (vcaddq_rot90_x_f16): Delete.
13043 (vcaddq_rot90_x_f32): Delete.
13044 (vcaddq_rot270_x_f16): Delete.
13045 (vcaddq_rot270_x_f32): Delete.
13046 (__arm_vcaddq_rot90_u8): Delete.
13047 (__arm_vcaddq_rot270_u8): Delete.
13048 (__arm_vhcaddq_rot90_s8): Delete.
13049 (__arm_vhcaddq_rot270_s8): Delete.
13050 (__arm_vcaddq_rot90_s8): Delete.
13051 (__arm_vcaddq_rot270_s8): Delete.
13052 (__arm_vcaddq_rot90_u16): Delete.
13053 (__arm_vcaddq_rot270_u16): Delete.
13054 (__arm_vhcaddq_rot90_s16): Delete.
13055 (__arm_vhcaddq_rot270_s16): Delete.
13056 (__arm_vcaddq_rot90_s16): Delete.
13057 (__arm_vcaddq_rot270_s16): Delete.
13058 (__arm_vcaddq_rot90_u32): Delete.
13059 (__arm_vcaddq_rot270_u32): Delete.
13060 (__arm_vhcaddq_rot90_s32): Delete.
13061 (__arm_vhcaddq_rot270_s32): Delete.
13062 (__arm_vcaddq_rot90_s32): Delete.
13063 (__arm_vcaddq_rot270_s32): Delete.
13064 (__arm_vcaddq_rot270_m_s8): Delete.
13065 (__arm_vcaddq_rot270_m_s32): Delete.
13066 (__arm_vcaddq_rot270_m_s16): Delete.
13067 (__arm_vcaddq_rot270_m_u8): Delete.
13068 (__arm_vcaddq_rot270_m_u32): Delete.
13069 (__arm_vcaddq_rot270_m_u16): Delete.
13070 (__arm_vcaddq_rot90_m_s8): Delete.
13071 (__arm_vcaddq_rot90_m_s32): Delete.
13072 (__arm_vcaddq_rot90_m_s16): Delete.
13073 (__arm_vcaddq_rot90_m_u8): Delete.
13074 (__arm_vcaddq_rot90_m_u32): Delete.
13075 (__arm_vcaddq_rot90_m_u16): Delete.
13076 (__arm_vhcaddq_rot270_m_s8): Delete.
13077 (__arm_vhcaddq_rot270_m_s32): Delete.
13078 (__arm_vhcaddq_rot270_m_s16): Delete.
13079 (__arm_vhcaddq_rot90_m_s8): Delete.
13080 (__arm_vhcaddq_rot90_m_s32): Delete.
13081 (__arm_vhcaddq_rot90_m_s16): Delete.
13082 (__arm_vcaddq_rot90_x_s8): Delete.
13083 (__arm_vcaddq_rot90_x_s16): Delete.
13084 (__arm_vcaddq_rot90_x_s32): Delete.
13085 (__arm_vcaddq_rot90_x_u8): Delete.
13086 (__arm_vcaddq_rot90_x_u16): Delete.
13087 (__arm_vcaddq_rot90_x_u32): Delete.
13088 (__arm_vcaddq_rot270_x_s8): Delete.
13089 (__arm_vcaddq_rot270_x_s16): Delete.
13090 (__arm_vcaddq_rot270_x_s32): Delete.
13091 (__arm_vcaddq_rot270_x_u8): Delete.
13092 (__arm_vcaddq_rot270_x_u16): Delete.
13093 (__arm_vcaddq_rot270_x_u32): Delete.
13094 (__arm_vhcaddq_rot90_x_s8): Delete.
13095 (__arm_vhcaddq_rot90_x_s16): Delete.
13096 (__arm_vhcaddq_rot90_x_s32): Delete.
13097 (__arm_vhcaddq_rot270_x_s8): Delete.
13098 (__arm_vhcaddq_rot270_x_s16): Delete.
13099 (__arm_vhcaddq_rot270_x_s32): Delete.
13100 (__arm_vcaddq_rot90_f16): Delete.
13101 (__arm_vcaddq_rot270_f16): Delete.
13102 (__arm_vcaddq_rot90_f32): Delete.
13103 (__arm_vcaddq_rot270_f32): Delete.
13104 (__arm_vcaddq_rot270_m_f32): Delete.
13105 (__arm_vcaddq_rot270_m_f16): Delete.
13106 (__arm_vcaddq_rot90_m_f32): Delete.
13107 (__arm_vcaddq_rot90_m_f16): Delete.
13108 (__arm_vcaddq_rot90_x_f16): Delete.
13109 (__arm_vcaddq_rot90_x_f32): Delete.
13110 (__arm_vcaddq_rot270_x_f16): Delete.
13111 (__arm_vcaddq_rot270_x_f32): Delete.
13112 (__arm_vcaddq_rot90): Delete.
13113 (__arm_vcaddq_rot270): Delete.
13114 (__arm_vhcaddq_rot90): Delete.
13115 (__arm_vhcaddq_rot270): Delete.
13116 (__arm_vcaddq_rot270_m): Delete.
13117 (__arm_vcaddq_rot90_m): Delete.
13118 (__arm_vhcaddq_rot270_m): Delete.
13119 (__arm_vhcaddq_rot90_m): Delete.
13120 (__arm_vcaddq_rot90_x): Delete.
13121 (__arm_vcaddq_rot270_x): Delete.
13122 (__arm_vhcaddq_rot90_x): Delete.
13123 (__arm_vhcaddq_rot270_x): Delete.
13125 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13127 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
13128 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
13129 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
13130 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
13131 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
13132 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
13134 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
13135 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
13136 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
13137 VHCADDQ_ROT270_M_S.
13138 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
13139 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
13140 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
13141 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
13142 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
13143 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
13145 (VCADDQ_ROT270_M): Delete.
13146 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
13147 (VCADDQ_ROT90_M): Delete.
13148 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
13149 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
13151 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
13152 (mve_vcaddq<mve_rot><mode>): Rename into ...
13153 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
13154 (mve_vcaddq_rot270_m_<supf><mode>)
13155 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
13156 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
13157 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
13158 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
13160 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
13162 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13165 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
13166 preparation statement over braces for a single statement.
13167 (*bt<mode>_setncqi): Likewise.
13168 (*bt<mode>_setncqi_2): New define_insn_and_split.
13170 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13172 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
13173 case inserting of 64-bit values into a TImode register, to handle
13174 both DImode and DFmode using either *insvti_lowpart_1
13175 or *isnvti_highpart_1.
13177 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
13180 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
13181 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
13182 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
13183 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
13184 when the original source contains a paradoxical subreg.
13186 2023-07-14 Jan Hubicka <jh@suse.cz>
13188 * passes.cc (execute_function_todo): Remove
13189 TODO_rebuild_frequencies
13190 * passes.def: Add rebuild_frequencies pass.
13191 * predict.cc (estimate_bb_frequencies): Drop
13193 (tree_estimate_probability): Update call of
13194 estimate_bb_frequencies.
13195 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
13196 first and do not rebuild if not necessary.
13197 (class pass_rebuild_frequencies): New.
13198 (make_pass_rebuild_frequencies): New.
13199 * profile-count.h: Add profile_count::very_large_p.
13200 * tree-inline.cc (optimize_inline_calls): Do not return
13201 TODO_rebuild_frequencies
13202 * tree-pass.h (TODO_rebuild_frequencies): Remove.
13203 (make_pass_rebuild_frequencies): Declare.
13205 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13207 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
13208 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13209 (expand_cond_len_ternop): New function.
13210 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
13211 (expand_cond_len_ternop): Ditto.
13213 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
13216 * config/bpf/bpf.md: Enable instruction scheduling.
13218 2023-07-14 Tamar Christina <tamar.christina@arm.com>
13220 PR tree-optimization/109154
13221 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
13222 (struct bb_predicate): Add no_predicate_stmts.
13223 (set_bb_predicate): Increase predicate count.
13224 (set_bb_predicate_gimplified_stmts): Conditionally initialize
13225 no_predicate_stmts.
13226 (get_bb_num_predicate_stmts): New.
13227 (init_bb_predicate): Initialzie no_predicate_stmts.
13228 (release_bb_predicate): Cleanup no_predicate_stmts.
13229 (insert_gimplified_predicates): Preserve no_predicate_stmts.
13231 2023-07-14 Tamar Christina <tamar.christina@arm.com>
13233 PR tree-optimization/109154
13234 * tree-if-conv.cc (gen_simplified_condition,
13235 gen_phi_nest_statement): New.
13236 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
13238 2023-07-14 Richard Biener <rguenther@suse.de>
13240 * gimple.h (gimple_phi_arg): New const overload.
13241 (gimple_phi_arg_def): Make gimple arg const.
13242 (gimple_phi_arg_def_from_edge): New inline function.
13243 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
13245 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
13246 new inline function.
13247 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
13249 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
13251 * common/config/riscv/riscv-common.cc:
13252 (riscv_implied_info): Add zihintntl item.
13253 (riscv_ext_version_table): Ditto.
13254 (riscv_ext_flag_table): Ditto.
13255 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
13256 (TARGET_ZIHINTNTL): Ditto.
13258 2023-07-14 Die Li <lidie@eswincomputing.com>
13260 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
13262 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
13265 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
13266 used by the address of the following memory operand.
13268 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
13271 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
13272 deallocate alloca-only frame.
13274 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
13277 * config/darwin.h (DARWIN_PLATFORM_ID): New.
13278 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
13279 and SDK data to the static linker.
13281 2023-07-13 Carl Love <cel@us.ibm.com>
13283 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
13284 built-in definition return type.
13285 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
13286 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
13287 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
13288 argument to return FPSCR fields.
13289 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
13290 the return value. Add description for
13291 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
13293 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
13296 * config/alpha/alpha.cc (alpha_emit_set_long_const):
13297 Always use DImode when constructing long const.
13299 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
13301 * haifa-sched.cc: Change TRUE/FALSE to true/false.
13303 * lra-assigns.cc: Ditto.
13304 * lra-constraints.cc: Ditto.
13305 * sel-sched.cc: Ditto.
13307 2023-07-13 Andrew Pinski <apinski@marvell.com>
13309 PR tree-optimization/110293
13310 PR tree-optimization/110539
13311 * match.pd: Expand the `x != (typeof x)(x == 0)`
13312 pattern to handle where the inner and outer comparsions
13313 are either `!=` or `==` and handle other constants
13316 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
13318 PR middle-end/109520
13319 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
13320 (lra_asm_insn_error): New prototype.
13321 * lra.cc: Include rtl_error.h.
13322 (lra_set_insn_recog_data): Initialize asm_reloads_num.
13323 (lra_asm_insn_error): New func whose code is taken from ...
13324 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
13325 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
13327 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13329 * genmatch.cc (commutative_op): Add COND_LEN_*
13330 * internal-fn.cc (first_commutative_argument): Ditto.
13332 (get_unconditional_internal_fn): Ditto.
13333 (can_interpret_as_conditional_op_p): Ditto.
13334 (internal_fn_len_index): Ditto.
13335 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
13336 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
13337 (convert_mult_to_fma): Ditto.
13338 (math_opts_dom_walker::after_dom_children): Ditto.
13340 2023-07-13 Pan Li <pan2.li@intel.com>
13342 * config/riscv/riscv.cc (vxrm_rtx): New static var.
13344 (global_state_unknown_p): Removed.
13345 (riscv_entity_mode_after): Removed.
13346 (asm_insn_p): New function.
13347 (vxrm_unknown_p): New function for fixed-point.
13348 (riscv_vxrm_mode_after): Ditto.
13349 (frm_unknown_dynamic_p): New function for floating-point.
13350 (riscv_frm_mode_after): Ditto.
13351 (riscv_mode_after): Leverage new functions.
13353 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13355 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
13356 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
13357 calling vect_model_load_cost.
13359 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13361 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
13362 handle memory_access_type VMAT_CONTIGUOUS, remove some
13363 VMAT_CONTIGUOUS_PERMUTE related handlings.
13364 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
13365 without calling vect_model_load_cost.
13367 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13369 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
13370 VMAT_CONTIGUOUS_REVERSE any more.
13371 (vectorizable_load): Adjust the costing handling on
13372 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
13374 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13376 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
13377 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
13378 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
13379 assert it will never get VMAT_LOAD_STORE_LANES.
13381 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13383 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
13384 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
13385 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
13386 remove VMAT_GATHER_SCATTER related handlings and the related parameter
13389 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13391 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
13392 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
13393 vect_model_load_cost.
13394 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
13395 VMAT_STRIDED_SLP any more, and remove their related handlings.
13397 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13399 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
13400 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
13401 hoisting decision and without calling vect_model_load_cost.
13402 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
13403 and remove VMAT_INVARIANT related handlings.
13405 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13407 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
13408 on costing with one extra argument cost_vec.
13409 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
13410 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
13411 gs_info.decl set any more.
13413 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13415 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
13416 to vect_model_load_cost down to some different transform paths
13417 according to the handlings of different vect_memory_access_types.
13419 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13421 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
13423 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13425 * config/riscv/autovec.md
13426 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
13427 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
13428 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
13429 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
13430 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
13431 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
13432 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
13433 (len_mask_gather_load<mode><mode>): Ditto.
13434 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
13435 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
13436 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
13437 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
13438 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
13439 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
13440 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
13441 (len_mask_scatter_store<mode><mode>): Ditto.
13442 * config/riscv/predicates.md (const_1_operand): New predicate.
13443 (vector_gs_scale_operand_16): Ditto.
13444 (vector_gs_scale_operand_32): Ditto.
13445 (vector_gs_scale_operand_64): Ditto.
13446 (vector_gs_extension_operand): Ditto.
13447 (vector_gs_scale_operand_16_rv32): Ditto.
13448 (vector_gs_scale_operand_32_rv32): Ditto.
13449 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
13450 (expand_gather_scatter): New function.
13451 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
13452 (emit_vlmax_masked_store_insn): New function.
13453 (emit_nonvlmax_masked_store_insn): Ditto.
13454 (modulo_sel_indices): Ditto.
13455 (expand_vec_perm): Fix SLP for gather/scatter.
13456 (prepare_gather_scatter): New function.
13457 (expand_gather_scatter): Ditto.
13458 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
13459 (subreg:SI (DI CONST_POLY_INT)).
13460 * config/riscv/vector-iterators.md: Add gather/scatter.
13461 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
13462 (@vec_duplicate<mode>): Ditto.
13463 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
13465 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
13467 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13469 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
13470 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13471 (expand_cond_len_binop): New function.
13472 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
13473 (emit_nonvlmax_fp_tu_insn): Ditto.
13474 (need_fp_rounding_p): Ditto.
13475 (expand_cond_len_binop): Ditto.
13476 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
13477 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
13479 2023-07-12 Jan Hubicka <jh@suse.cz>
13481 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
13482 (gimple_duplicate_seme_region): ... this; break out profile updating
13484 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
13485 (ch_base::copy_headers): Update.
13486 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
13487 (gimple_duplicate_seme_region): ... this.
13489 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
13491 PR tree-optimization/107043
13492 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
13494 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
13496 PR tree-optimization/107053
13497 * gimple-range-op.cc (cfn_popcount): Use known set bits.
13499 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
13501 * ira.cc (equiv_init_varies_p): Change return type from int to bool
13502 and adjust function body accordingly.
13503 (equiv_init_movable_p): Ditto.
13504 (memref_used_between_p): Ditto.
13505 * lra-constraints.cc (valid_address_p): Ditto.
13507 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
13509 * range-op.cc (irange_to_masked_value): Remove.
13510 (update_known_bitmask): Update irange value/mask pair instead of
13511 only updating nonzero bits.
13513 2023-07-12 Jan Hubicka <jh@suse.cz>
13515 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
13516 parameter and rewrite profile updating code to handle edges elimination.
13517 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
13518 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
13519 (loop_iv_derived_p): New function.
13520 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
13521 of PHIs and propagation of IV derived variables.
13522 (ch_base::copy_headers): Pass around the invariant edges hash set.
13524 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
13526 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
13527 (last_active_insn): Change "skip_use_p" function argument to bool.
13528 (noce_operand_ok): Change return type from int to bool.
13529 (find_cond_trap): Ditto.
13530 (block_jumps_and_fallthru_p): Change "fallthru_p" and
13531 "jump_p" variables to bool.
13532 (noce_find_if_block): Change return type from int to bool.
13533 (cond_exec_find_if_block): Ditto.
13534 (find_if_case_1): Ditto.
13535 (find_if_case_2): Ditto.
13536 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
13537 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
13538 (cond_exec_process_insns): Change return type from int to bool.
13539 Change "mod_ok" function arg to bool.
13540 (cond_exec_process_if_block): Change return type from int to bool.
13541 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
13543 (noce_emit_store_flag): Change return type from int to bool.
13544 Change "reversep" function arg to bool. Change "cond_complex"
13546 (noce_try_move): Change return type from int to bool.
13547 (noce_try_ifelse_collapse): Ditto.
13548 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
13549 (noce_try_addcc): Change return type from int to bool. Change
13550 "subtract" variable to bool.
13551 (noce_try_store_flag_constants): Change return type from int to bool.
13552 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
13553 (noce_try_cmove): Change return type from int to bool.
13554 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
13555 (noce_try_minmax): Change return type from int to bool. Change
13556 "unsignedp" variable to bool.
13557 (noce_try_abs): Change return type from int to bool. Change
13558 "negate" variable to bool.
13559 (noce_try_sign_mask): Change return type from int to bool.
13560 (noce_try_move): Ditto.
13561 (noce_try_store_flag_constants): Ditto.
13562 (noce_try_cmove): Ditto.
13563 (noce_try_cmove_arith): Ditto.
13564 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
13565 (noce_try_bitop): Change return type from int to bool.
13566 (noce_operand_ok): Ditto.
13567 (noce_convert_multiple_sets): Ditto.
13568 (noce_convert_multiple_sets_1): Ditto.
13569 (noce_process_if_block): Ditto.
13570 (check_cond_move_block): Ditto.
13571 (cond_move_process_if_block): Ditto. Change "success_p"
13573 (rest_of_handle_if_conversion): Change return type to void.
13575 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13577 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
13579 (get_conditional_len_internal_fn): New function.
13580 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
13581 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
13584 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
13587 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
13589 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
13592 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
13593 define_insn_and_split derived from *add<dwi>3_doubleword_concat
13594 and *add<dwi>3_doubleword_zext.
13596 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
13599 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
13600 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
13601 (peephole2): Simplify rega = 0; rega op= rega cases.
13603 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
13605 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
13606 testing a TImode SUBREG of a 128-bit vector register against
13607 zero, use a PTEST instruction instead of first moving it to
13608 a pair of scalar registers.
13610 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
13612 * genopinit.cc (main): Adjust maximal number of optabs and
13614 * gensupport.cc (find_optab): Shift optab by 20 and mode by
13616 * optabs-query.h (optab_handler): Ditto.
13617 (convert_optab_handler): Ditto.
13619 2023-07-12 Richard Biener <rguenther@suse.de>
13621 PR tree-optimization/110630
13622 * tree-vect-slp.cc (vect_add_slp_permutation): New
13623 offset parameter, honor that for the extract code generation.
13624 (vectorizable_slp_permutation_1): Handle offsetted identities.
13626 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13628 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
13629 (umul<mode>3_highpart): Ditto.
13631 2023-07-12 Jan Beulich <jbeulich@suse.com>
13633 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
13634 alternative. Adjust original last alternative's "prefix"
13635 attribute to maybe_evex.
13637 2023-07-12 Jan Beulich <jbeulich@suse.com>
13639 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
13640 vbroadcastss for AVX2. New AVX512F alternative.
13641 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
13642 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
13644 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13646 * config/riscv/peephole.md: Remove XThead* peephole passes.
13647 * config/riscv/thead.md: Include thead-peephole.md.
13648 * config/riscv/thead-peephole.md: New file.
13650 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13652 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
13654 (riscv_index_reg_class): Likewise.
13655 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
13656 (riscv_index_reg_class): New function.
13657 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
13658 riscv_index_reg_class().
13659 (REGNO_OK_FOR_INDEX_P): Call new function
13660 riscv_regno_ok_for_index_p().
13662 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13664 * config/riscv/riscv-protos.h (enum riscv_address_type):
13665 New location of type definition.
13666 (struct riscv_address_info): Likewise.
13667 * config/riscv/riscv.cc (enum riscv_address_type):
13668 Old location of type definition.
13669 (struct riscv_address_info): Likewise.
13671 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13673 * config/riscv/riscv.h (Xmode): New macro.
13675 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13677 * config/riscv/riscv.cc (riscv_print_operand_address): Use
13678 output_addr_const rather than riscv_print_operand.
13680 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13682 * config/riscv/thead.md: Adjust constraints of th_addsl.
13684 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13686 * config/riscv/thead.cc (th_mempair_operands_p):
13687 Fix documentation of th_mempair_order_operands().
13689 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13691 * config/riscv/thead.cc (th_mempair_save_regs):
13692 Emit REG_FRAME_RELATED_EXPR notes in prologue.
13694 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
13696 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
13697 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
13698 New XThead extension INSN.
13699 (*zero_extendsidi2_th_extu): New XThead extension INSN.
13700 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
13702 2023-07-12 liuhongt <hongtao.liu@intel.com>
13706 * config/i386/predicates.md
13707 (int_float_vector_all_ones_operand): New predicate.
13708 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
13710 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
13712 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
13714 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
13715 define_insn_and_split to avoid false dependence.
13716 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
13717 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
13718 of operands 1 to '0' to avoid false dependence.
13719 (*andnot<mode>3): Ditto.
13720 (iornot<mode>3): Ditto.
13721 (*<nlogic><mode>3): Ditto.
13723 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
13725 * common/config/i386/cpuinfo.h
13726 (get_intel_cpu): Handle Granite Rapids D.
13727 * common/config/i386/i386-common.cc:
13728 (processor_alias_table): Add graniterapids-d.
13729 * common/config/i386/i386-cpuinfo.h
13730 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
13731 * config.gcc: Add -march=graniterapids-d.
13732 * config/i386/driver-i386.cc (host_detect_local_cpu):
13733 Handle graniterapids-d.
13734 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
13735 * doc/extend.texi: Add graniterapids-d.
13736 * doc/invoke.texi: Ditto.
13738 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
13740 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
13741 Add OPTION_MASK_ISA_AVX512VL.
13742 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
13745 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13747 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
13748 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
13749 (shuffle_compress_patterns): Ditto.
13750 (expand_vec_perm_const_1): Ditto.
13752 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
13754 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
13755 * cfghooks.h (struct cfg_hooks): Change return type of
13756 verify_flow_info from integer to bool.
13757 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
13758 (can_delete_label_p): Ditto.
13759 (rtl_verify_flow_info): Change return type from int to bool
13760 and adjust function body accordingly. Change "err" variable to bool.
13761 (rtl_verify_flow_info_1): Ditto.
13762 (free_bb_for_insn): Change return type to void.
13763 (rtl_merge_blocks): Change "b_empty" variable to bool.
13764 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
13765 (verify_hot_cold_block_grouping): Change return type from int to bool.
13766 Change "err" variable to bool.
13767 (rtl_verify_edges): Ditto.
13768 (rtl_verify_bb_insns): Ditto.
13769 (rtl_verify_bb_pointers): Ditto.
13770 (rtl_verify_bb_insn_chain): Ditto.
13771 (rtl_verify_fallthru): Ditto.
13772 (rtl_verify_bb_layout): Ditto.
13773 (purge_all_dead_edges): Change "purged" variable to bool.
13774 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
13775 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
13776 (load_killed_in_block_p): Change return type from int to bool
13777 and adjust function body accordingly.
13778 (oprs_unchanged_p): Return true/false.
13779 (rest_of_handle_gcse2): Change return type to void.
13780 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
13781 int to bool. Change "err" variable to bool.
13783 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
13785 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
13787 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13789 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
13790 * internal-fn.cc (cond_len_unary_direct): Ditto.
13791 (cond_len_binary_direct): Ditto.
13792 (cond_len_ternary_direct): Ditto.
13793 (expand_cond_len_unary_optab_fn): Ditto.
13794 (expand_cond_len_binary_optab_fn): Ditto.
13795 (expand_cond_len_ternary_optab_fn): Ditto.
13796 (direct_cond_len_unary_optab_supported_p): Ditto.
13797 (direct_cond_len_binary_optab_supported_p): Ditto.
13798 (direct_cond_len_ternary_optab_supported_p): Ditto.
13799 * internal-fn.def (COND_LEN_ADD): Ditto.
13800 (COND_LEN_SUB): Ditto.
13801 (COND_LEN_MUL): Ditto.
13802 (COND_LEN_DIV): Ditto.
13803 (COND_LEN_MOD): Ditto.
13804 (COND_LEN_RDIV): Ditto.
13805 (COND_LEN_MIN): Ditto.
13806 (COND_LEN_MAX): Ditto.
13807 (COND_LEN_FMIN): Ditto.
13808 (COND_LEN_FMAX): Ditto.
13809 (COND_LEN_AND): Ditto.
13810 (COND_LEN_IOR): Ditto.
13811 (COND_LEN_XOR): Ditto.
13812 (COND_LEN_SHL): Ditto.
13813 (COND_LEN_SHR): Ditto.
13814 (COND_LEN_FMA): Ditto.
13815 (COND_LEN_FMS): Ditto.
13816 (COND_LEN_FNMA): Ditto.
13817 (COND_LEN_FNMS): Ditto.
13818 (COND_LEN_NEG): Ditto.
13819 * optabs.def (OPTAB_D): Ditto.
13821 2023-07-11 Richard Biener <rguenther@suse.de>
13823 PR tree-optimization/110614
13824 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
13825 SLP splats are not suitable for re-align ops.
13827 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
13829 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
13831 (vsx_quad_dform_memory_operand): Likewise.
13833 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
13835 * reorg.cc (stop_search_p): Change return type from int to bool
13836 and adjust function body accordingly.
13837 (resource_conflicts_p): Ditto.
13838 (insn_references_resource_p): Change return type from int to bool.
13839 (insn_sets_resource_p): Ditto.
13840 (redirect_with_delay_slots_safe_p): Ditto.
13841 (condition_dominates_p): Change return type from int to bool
13842 and adjust function body accordingly.
13843 (redirect_with_delay_list_safe_p): Ditto.
13844 (check_annul_list_true_false): Ditto. Change "annul_true_p"
13845 function argument to bool.
13846 (steal_delay_list_from_target): Change "pannul_p" function
13847 argument to bool pointer. Change "must_annul" and "used_annul"
13848 variables from int to bool.
13849 (steal_delay_list_from_fallthrough): Ditto.
13850 (own_thread_p): Change return type from int to bool and adjust
13851 function body accordingly. Change "allow_fallthrough" function
13853 (reorg_redirect_jump): Change return type from int to bool.
13854 (fill_simple_delay_slots): Change "non_jumps_p" function
13855 argument from int to bool. Change "maybe_never" varible to bool.
13856 (fill_slots_from_thread): Change "likely", "thread_if_true" and
13857 "own_thread" function arguments to bool. Change "lose" and
13858 "must_annul" variables to bool.
13859 (delete_from_delay_slot): Change "had_barrier" variable to bool.
13860 (try_merge_delay_insns): Change "annul_p" variable to bool.
13861 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
13863 (rest_of_handle_delay_slots): Change return type from int to void
13864 and adjust function body accordingly.
13866 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
13868 * doc/extend.texi (RISC-V Operand Modifiers): New.
13870 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13872 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
13873 (insert_insn_end_basic_block): Ditto.
13874 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
13875 * gcse.cc (insert_insn_end_basic_block): Export as global function.
13876 * gcse.h (insert_insn_end_basic_block): Ditto.
13878 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
13881 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
13882 (arm_builtin_decl): Hahndle MVE builtins.
13883 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
13884 (add_unique_function): Fix handling of
13885 __ARM_MVE_PRESERVE_USER_NAMESPACE.
13886 (add_overloaded_function): Likewise.
13887 * config/arm/arm-protos.h (builtin_decl): New declaration.
13889 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
13891 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
13893 2023-07-10 Xi Ruoyao <xry111@xry111.site>
13895 PR tree-optimization/110557
13896 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
13897 Ensure the output sign-extended if necessary.
13899 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
13901 * config/i386/i386.md (peephole2): Transform xchg insn with a
13902 REG_UNUSED note to a (simple) move.
13903 (*insvti_lowpart_1): New define_insn_and_split.
13904 (*insvdi_lowpart_1): Likewise.
13906 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
13908 * config/i386/i386-features.cc (compute_convert_gain): Tweak
13909 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
13910 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
13911 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
13913 2023-07-10 liuhongt <hongtao.liu@intel.com>
13916 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
13917 splitter to detect fp max pattern.
13918 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
13920 2023-07-09 Jan Hubicka <jh@suse.cz>
13922 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
13923 (dump_edge_info): Likewise.
13924 (dump_bb_info): Likewise.
13925 * profile-count.cc (profile_count::dump): Add comma between quality and
13928 2023-07-08 Jan Hubicka <jh@suse.cz>
13930 PR tree-optimization/110600
13931 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
13933 2023-07-08 Jan Hubicka <jh@suse.cz>
13935 PR middle-end/110590
13936 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
13937 inner loops and be more careful about inconsistent profiles.
13938 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
13939 exit is followed by other exit.
13941 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
13943 * cprop.cc (reg_available_p): Change return type from int to bool.
13944 (reg_not_set_p): Ditto.
13945 (try_replace_reg): Ditto. Change "success" variable to bool.
13946 (cprop_jump): Change return type from int to void
13947 and adjust function body accordingly.
13948 (constprop_register): Ditto.
13949 (cprop_insn): Ditto. Change "changed" variable to bool.
13950 (local_cprop_pass): Change return type from int to void
13951 and adjust function body accordingly.
13952 (bypass_block): Ditto. Change "change", "may_be_loop_header"
13953 and "removed_p" variables to bool.
13954 (bypass_conditional_jumps): Change return type from int to void
13955 and adjust function body accordingly. Change "changed"
13957 (one_cprop_pass): Ditto.
13959 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
13961 * gcse.cc (expr_equiv_p): Change return type from int to bool.
13962 (oprs_unchanged_p): Change return type from int to void
13963 and adjust function body accordingly.
13964 (oprs_anticipatable_p): Ditto.
13965 (oprs_available_p): Ditto.
13966 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
13967 arguments to bool. Change "found" variable to bool.
13968 (load_killed_in_block_p): Change return type from int to void and
13969 adjust function body accordingly. Change "avail_p" argument to bool.
13970 (pre_expr_reaches_here_p): Change return type from int to void
13971 and adjust function body accordingly.
13972 (pre_delete): Ditto. Change "changed" variable to bool.
13973 (pre_gcse): Change return type from int to void
13974 and adjust function body accordingly. Change "did_insert" and
13975 "changed" variables to bool.
13976 (one_pre_gcse_pass): Change return type from int to void
13977 and adjust function body accordingly. Change "changed" variable
13979 (should_hoist_expr_to_dom): Change return type from int to void
13980 and adjust function body accordingly. Change
13981 "visited_allocated_locally" variable to bool.
13982 (hoist_code): Change return type from int to void and adjust
13983 function body accordingly. Change "changed" variable to bool.
13984 (one_code_hoisting_pass): Ditto.
13985 (pre_edge_insert): Change return type from int to void and adjust
13986 function body accordingly. Change "did_insert" variable to bool.
13987 (pre_expr_reaches_here_p_work): Change return type from int to void
13988 and adjust function body accordingly.
13989 (simple_mem): Ditto.
13990 (want_to_gcse_p): Change return type from int to void
13991 and adjust function body accordingly.
13992 (can_assign_to_reg_without_clobbers_p): Update function body
13993 for bool return type.
13994 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
13995 (pre_insert_copies): Change "added_copy" variable to bool.
13997 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
14001 * doc/invoke.texi (Warning Options): Fix typos.
14003 2023-07-07 Jan Hubicka <jh@suse.cz>
14005 * profile-count.cc (profile_count::dump): Add FUN
14006 parameter; print relative frequency.
14007 (profile_count::debug): Update.
14008 * profile-count.h (profile_count::dump): Update
14011 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
14015 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
14016 TImode destinations from paradoxical SUBREGs (setting the lowpart)
14017 into explicit zero extensions. Use *insvti_highpart_1 instruction
14018 to set the highpart of a TImode destination.
14020 2023-07-07 Jan Hubicka <jh@suse.cz>
14022 * predict.cc (force_edge_cold): Use
14023 set_edge_probability_and_rescale_others; improve dumps.
14025 2023-07-07 Jan Hubicka <jh@suse.cz>
14027 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
14029 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
14032 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
14034 * config/s390/s390.cc (vec_init): Fix default case
14036 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
14038 * lra-assigns.cc (assign_by_spills): Add reload insns involving
14039 reload pseudos with non-refined class to be processed on the next
14041 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
14042 (in_class_p): Use it.
14043 (print_curr_insn_alt): New func.
14044 (process_alt_operands): Use it. Improve debug info.
14045 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
14046 pseudo class if it is not refined yet.
14048 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14050 * value-range.cc (irange::get_bitmask_from_range): Return all the
14051 known bits for a singleton.
14052 (irange::set_range_from_bitmask): Set a range of a singleton when
14053 all bits are known.
14055 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14057 * value-range.cc (irange::intersect): Leave normalization to
14060 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14062 * data-streamer-in.cc (streamer_read_value_range): Adjust for
14064 * data-streamer-out.cc (streamer_write_vrange): Same.
14065 * range-op.cc (operator_cast::fold_range): Same.
14066 * value-range-pretty-print.cc
14067 (vrange_printer::print_irange_bitmasks): Same.
14068 * value-range-storage.cc (irange_storage::write_lengths_address):
14070 (irange_storage::set_irange): Same.
14071 (irange_storage::get_irange): Same.
14072 (irange_storage::size): Same.
14073 (irange_storage::dump): Same.
14074 * value-range-storage.h: Same.
14075 * value-range.cc (debug): New.
14076 (irange_bitmask::dump): New.
14077 (add_vrange): Adjust for value/mask.
14078 (irange::operator=): Same.
14079 (irange::set): Same.
14080 (irange::verify_range): Same.
14081 (irange::operator==): Same.
14082 (irange::contains_p): Same.
14083 (irange::irange_single_pair_union): Same.
14084 (irange::union_): Same.
14085 (irange::intersect): Same.
14086 (irange::invert): Same.
14087 (irange::get_nonzero_bits_from_range): Rename to...
14088 (irange::get_bitmask_from_range): ...this.
14089 (irange::set_range_from_nonzero_bits): Rename to...
14090 (irange::set_range_from_bitmask): ...this.
14091 (irange::set_nonzero_bits): Rename to...
14092 (irange::update_bitmask): ...this.
14093 (irange::get_nonzero_bits): Rename to...
14094 (irange::get_bitmask): ...this.
14095 (irange::intersect_nonzero_bits): Rename to...
14096 (irange::intersect_bitmask): ...this.
14097 (irange::union_nonzero_bits): Rename to...
14098 (irange::union_bitmask): ...this.
14099 (irange_bitmask::verify_mask): New.
14100 * value-range.h (class irange_bitmask): New.
14101 (irange_bitmask::set_unknown): New.
14102 (irange_bitmask::unknown_p): New.
14103 (irange_bitmask::irange_bitmask): New.
14104 (irange_bitmask::get_precision): New.
14105 (irange_bitmask::get_nonzero_bits): New.
14106 (irange_bitmask::set_nonzero_bits): New.
14107 (irange_bitmask::operator==): New.
14108 (irange_bitmask::union_): New.
14109 (irange_bitmask::intersect): New.
14110 (class irange): Friend vrange_printer.
14111 (irange::varying_compatible_p): Adjust for bitmask.
14112 (irange::set_varying): Same.
14113 (irange::set_nonzero): Same.
14115 2023-07-07 Jan Beulich <jbeulich@suse.com>
14117 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
14119 2023-07-07 Jan Beulich <jbeulich@suse.com>
14121 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
14122 alternative. Switch new last alternative's "isa" attribute to
14124 (vec_extract_hi_v32qi): Likewise.
14126 2023-07-07 Pan Li <pan2.li@intel.com>
14127 Robin Dapp <rdapp@ventanamicro.com>
14129 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
14131 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
14132 (riscv_mode_exit): Likewise for exit mode.
14133 (riscv_mode_needed): Likewise for needed mode.
14134 (riscv_mode_after): Likewise for after mode.
14136 2023-07-07 Pan Li <pan2.li@intel.com>
14138 * config/riscv/vector.md: Fix typo.
14140 2023-07-06 Jan Hubicka <jh@suse.cz>
14142 PR middle-end/25623
14143 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
14144 of iterations determined.
14145 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
14147 2023-07-06 Jan Hubicka <jh@suse.cz>
14149 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
14150 probability update to be safe on loops with subloops.
14151 Make bound parameter to be iteration bound.
14152 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
14153 of scale_loop_profile.
14154 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
14156 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
14158 PR tree-optimization/110449
14159 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
14160 vec_loop for the unrolled loop.
14162 2023-07-06 Jan Hubicka <jh@suse.cz>
14164 * cfg.cc (set_edge_probability_and_rescale_others): New function.
14165 (update_bb_profile_for_threading): Use it; simplify the rest.
14166 * cfg.h (set_edge_probability_and_rescale_others): Declare.
14167 * profile-count.h (profile_probability::apply_scale): New.
14169 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
14171 * doc/extend.texi (ARC Built-in Functions): Update documentation
14172 with missing builtins.
14174 2023-07-06 Richard Biener <rguenther@suse.de>
14176 PR tree-optimization/110556
14177 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
14178 assign code and all operands of non-stores.
14180 2023-07-06 Richard Biener <rguenther@suse.de>
14182 PR tree-optimization/110563
14183 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
14184 Remove second argument.
14185 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
14186 Remove for_epilogue_p argument. Merge assert ...
14187 (vect_analyze_loop_2): ... with check done before determining
14188 partial vectors by moving it after.
14189 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
14191 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14193 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
14194 few things re 'reorder' option and strings.
14195 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
14197 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14199 * gengtype-parse.cc: Clean up obsolete parametrized structs
14201 * gengtype.cc: Likewise.
14202 * gengtype.h: Likewise.
14204 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14206 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
14209 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14211 * gengtype-parse.cc (token_names): Add '"user"'.
14212 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
14213 'FIRST_TOKEN_WITH_VALUE'.
14215 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14217 * doc/gty.texi (GTY Options) <string_length>: Enhance.
14219 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14221 * gengtype.cc (write_root, write_roots): Explicitly reject
14222 'string_length' option.
14223 * doc/gty.texi (GTY Options) <string_length>: Document.
14225 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14227 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
14228 (ggc_pch_write_object): Remove 'bool is_string' argument.
14229 * ggc-common.cc: Adjust.
14230 * ggc-page.cc: Likewise.
14232 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
14234 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
14236 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
14238 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
14239 and add description for inling of function with arch and tune
14242 2023-07-06 Richard Biener <rguenther@suse.de>
14244 PR tree-optimization/110515
14245 * tree-ssa-pre.cc (compute_avail): Make code dealing
14246 with hoisting loads with different alias-sets more
14249 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14251 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
14253 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
14255 * config/i386/i386.cc (ix86_can_inline_p): If callee has
14256 default arch=x86-64 and tune=generic, do not block the
14257 inlining to its caller. Also allow callee with different
14258 arch= to be inlined if it has always_inline attribute and
14259 it's ISA is subset of caller's.
14261 2023-07-06 liuhongt <hongtao.liu@intel.com>
14263 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
14264 DF/SFmode AND/IOR/XOR/ANDN operations.
14266 2023-07-06 Andrew Pinski <apinski@marvell.com>
14268 PR middle-end/110554
14269 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
14270 just build using boolean_type_node instead of the cond_type.
14271 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
14272 that will feed into the COND_EXPR.
14274 2023-07-06 liuhongt <hongtao.liu@intel.com>
14277 * config/i386/i386.md (movdf_internal): Disparage slightly for
14278 2 alternatives (r,v) and (v,r) by adding constraint modifier
14281 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14284 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
14285 initialization of new_addr.
14287 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
14289 PR tree-optimization/110474
14290 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
14291 unroll factor while selecting the epilog vect loop VF.
14293 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14295 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
14298 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14300 * gimple-range-gori.cc (compute_operand_range): After calling
14301 compute_operand2_range, recursively call self if needed.
14302 (compute_operand2_range): Turn into a leaf function.
14303 (gori_compute::compute_operand1_and_operand2_range): Finish
14304 operand2 calculation.
14305 * gimple-range-gori.h (compute_operand2_range): Remove name param.
14307 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14309 * gimple-range-gori.cc (compute_operand_range): After calling
14310 compute_operand1_range, recursively call self if needed.
14311 (compute_operand1_range): Turn into a leaf function.
14312 (gori_compute::compute_operand1_and_operand2_range): Finish
14313 operand1 calculation.
14314 * gimple-range-gori.h (compute_operand1_range): Remove name param.
14316 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14318 * gimple-range-gori.cc (compute_operand_range): Check for
14319 operand interdependence when both op1 and op2 are computed.
14320 (compute_operand1_and_operand2_range): No checks required now.
14322 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14324 * gimple-range-gori.cc (compute_operand_range): Check for
14325 a relation between op1 and op2 and use that instead.
14326 (compute_operand1_range): Don't look for a relation override.
14327 (compute_operand2_range): Ditto.
14329 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
14331 * doc/contrib.texi (Contributors): Update my entry.
14333 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
14335 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
14338 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
14340 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
14341 scehdule_more_p and contributes_to_priority indirect frunction
14342 type from int to bool.
14343 (no_real_insns_p): Change return type from int to bool.
14344 (contributes_to_priority): Ditto.
14345 * haifa-sched.cc (no_real_insns_p): Change return type from
14346 int to bool and adjust function body accordingly.
14347 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
14348 variable type from int to bool.
14349 (ps_insn_advance_column): Change return type from int to bool.
14350 (ps_has_conflicts): Ditto. Change "has_conflicts"
14351 variable type from int to bool.
14352 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
14353 (conditions_mutex_p): Ditto.
14354 * sched-ebb.cc (schedule_more_p): Ditto.
14355 (ebb_contributes_to_priority): Change return type from
14356 int to bool and adjust function body accordingly.
14357 * sched-rgn.cc (is_cfg_nonregular): Ditto.
14358 (check_live_1): Ditto.
14360 (find_conditional_protection): Ditto.
14361 (is_conditionally_protected): Ditto.
14362 (is_prisky): Ditto.
14363 (is_exception_free): Ditto.
14364 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
14365 variables from int to bool.
14366 (extend_rgns): Change "rescan" variable from int to bool.
14367 (check_live): Change return type from
14368 int to bool and adjust function body accordingly.
14369 (can_schedule_ready_p): Ditto.
14370 (schedule_more_p): Ditto.
14371 (contributes_to_priority): Ditto.
14373 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
14375 * doc/md.texi: Document that vec_set and vec_extract must not
14377 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
14378 (gimple_expand_vec_set_extract_expr): ...to this.
14379 (gimple_expand_vec_exprs): Call renamed function.
14380 * internal-fn.cc (vec_extract_direct): Add.
14381 (expand_vec_extract_optab_fn): New function to expand
14383 (direct_vec_extract_optab_supported_p): Add.
14384 * internal-fn.def (VEC_EXTRACT): Add.
14385 * optabs.cc (can_vec_extract_var_idx_p): New function.
14386 * optabs.h (can_vec_extract_var_idx_p): Declare.
14388 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
14390 * config/riscv/autovec.md: Add gen_lowpart.
14392 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
14394 * config/riscv/autovec.md: Allow register index operand.
14396 2023-07-05 Pan Li <pan2.li@intel.com>
14398 * config/riscv/riscv-vector-builtins.cc
14399 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
14401 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
14403 * config/riscv/autovec.md: Use float_truncate.
14405 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14407 * internal-fn.cc (internal_fn_len_index): Apply
14408 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
14409 (internal_fn_mask_index): Ditto.
14410 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
14411 (supports_vec_scatter_store_p): Ditto.
14412 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
14413 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
14414 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
14415 (vect_get_strided_load_store_ops): Ditto.
14416 (vectorizable_store): Ditto.
14417 (vectorizable_load): Ditto.
14419 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
14420 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14422 * simplify-rtx.cc (native_encode_rtx): Ditto.
14423 (native_decode_vector_rtx): Ditto.
14424 (simplify_const_vector_byte_offset): Ditto.
14425 (simplify_const_vector_subreg): Ditto.
14426 * tree.cc (build_truth_vector_type_for_mode): Ditto.
14427 * varasm.cc (output_constant_pool_2): Ditto.
14429 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
14431 * config/mips/mips.cc (mips_expand_block_move): don't expand for
14432 r6 with -mno-unaligned-access option if one or both of src and
14433 dest are unaligned. restruct: return directly if length is not const.
14434 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
14436 2023-07-05 Jan Beulich <jbeulich@suse.com>
14439 * config/i386/sse.md: New splitters to simplify
14440 not;vec_duplicate as a singular vpternlog.
14441 (one_cmpl<mode>2): Allow broadcast for operand 1.
14442 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
14444 2023-07-05 Jan Beulich <jbeulich@suse.com>
14447 * config/i386/sse.md: New splitters to simplify
14448 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
14450 2023-07-05 Jan Beulich <jbeulich@suse.com>
14453 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
14454 form of splitter for PR target/100711.
14456 2023-07-05 Richard Biener <rguenther@suse.de>
14458 PR middle-end/110541
14459 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
14462 2023-07-05 Jan Beulich <jbeulich@suse.com>
14465 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
14466 for memory form operand 1.
14468 2023-07-05 Jan Beulich <jbeulich@suse.com>
14471 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
14472 bitwise vector operations.
14473 * config/i386/sse.md (*iornot<mode>3): New insn.
14474 (*xnor<mode>3): Likewise.
14475 (*<nlogic><mode>3): Likewise.
14476 (andor): New code iterator.
14477 (nlogic): New code attribute.
14478 (ternlog_nlogic): Likewise.
14480 2023-07-05 Richard Biener <rguenther@suse.de>
14482 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
14484 2023-07-05 yulong <shiyulong@iscas.ac.cn>
14486 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
14488 2023-07-05 yulong <shiyulong@iscas.ac.cn>
14490 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
14491 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
14492 (ADJUST_ALIGNMENT): Ditto.
14493 (RVV_TUPLE_PARTIAL_MODES): Ditto.
14494 (ADJUST_NUNITS): Ditto.
14495 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
14497 (vfloat16mf4x3_t): Ditto.
14498 (vfloat16mf4x4_t): Ditto.
14499 (vfloat16mf4x5_t): Ditto.
14500 (vfloat16mf4x6_t): Ditto.
14501 (vfloat16mf4x7_t): Ditto.
14502 (vfloat16mf4x8_t): Ditto.
14503 (vfloat16mf2x2_t): Ditto.
14504 (vfloat16mf2x3_t): Ditto.
14505 (vfloat16mf2x4_t): Ditto.
14506 (vfloat16mf2x5_t): Ditto.
14507 (vfloat16mf2x6_t): Ditto.
14508 (vfloat16mf2x7_t): Ditto.
14509 (vfloat16mf2x8_t): Ditto.
14510 (vfloat16m1x2_t): Ditto.
14511 (vfloat16m1x3_t): Ditto.
14512 (vfloat16m1x4_t): Ditto.
14513 (vfloat16m1x5_t): Ditto.
14514 (vfloat16m1x6_t): Ditto.
14515 (vfloat16m1x7_t): Ditto.
14516 (vfloat16m1x8_t): Ditto.
14517 (vfloat16m2x2_t): Ditto.
14518 (vfloat16m2x3_t): Ditto.
14519 (vfloat16m2x4_t): Ditto.
14520 (vfloat16m4x2_t): Ditto.
14521 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
14522 (vfloat16mf4x3_t): Ditto.
14523 (vfloat16mf4x4_t): Ditto.
14524 (vfloat16mf4x5_t): Ditto.
14525 (vfloat16mf4x6_t): Ditto.
14526 (vfloat16mf4x7_t): Ditto.
14527 (vfloat16mf4x8_t): Ditto.
14528 (vfloat16mf2x2_t): Ditto.
14529 (vfloat16mf2x3_t): Ditto.
14530 (vfloat16mf2x4_t): Ditto.
14531 (vfloat16mf2x5_t): Ditto.
14532 (vfloat16mf2x6_t): Ditto.
14533 (vfloat16mf2x7_t): Ditto.
14534 (vfloat16mf2x8_t): Ditto.
14535 (vfloat16m1x2_t): Ditto.
14536 (vfloat16m1x3_t): Ditto.
14537 (vfloat16m1x4_t): Ditto.
14538 (vfloat16m1x5_t): Ditto.
14539 (vfloat16m1x6_t): Ditto.
14540 (vfloat16m1x7_t): Ditto.
14541 (vfloat16m1x8_t): Ditto.
14542 (vfloat16m2x2_t): Ditto.
14543 (vfloat16m2x3_t): Ditto.
14544 (vfloat16m2x4_t): Ditto.
14545 (vfloat16m4x2_t): Ditto.
14546 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
14547 * config/riscv/riscv.md: New.
14548 * config/riscv/vector-iterators.md: New.
14550 2023-07-04 Andrew Pinski <apinski@marvell.com>
14552 PR tree-optimization/110487
14553 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
14554 build a nonstandard integer and use that.
14556 2023-07-04 Andrew Pinski <apinski@marvell.com>
14558 * match.pd (a?-1:0): Cast type an integer type
14559 rather the type before the negative.
14560 (a?0:-1): Likewise.
14562 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14564 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
14565 Change to use HARD_REG_BIT and its macros.
14566 * config/xtensa/xtensa.md
14567 (peephole2: regmove elimination during DFmode input reload):
14570 2023-07-04 Richard Biener <rguenther@suse.de>
14572 PR tree-optimization/110491
14573 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
14574 whether the PHI args are possibly undefined before folding
14577 2023-07-04 Pan Li <pan2.li@intel.com>
14578 Thomas Schwinge <thomas@codesourcery.com>
14580 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
14581 bits for machine mode table.
14582 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
14583 HOST machine mode bits.
14584 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
14585 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
14587 * tree-streamer.h (streamer_mode_table): Ditto.
14588 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
14589 as the packing limit.
14590 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
14592 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
14594 * lto-streamer.h (class lto_input_block): Capture
14595 'lto_file_decl_data *file_data' instead of just
14596 'unsigned char *mode_table'.
14597 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
14598 * ipa-fnsummary.cc (inline_read_section): Likewise.
14599 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
14600 * ipa-modref.cc (read_section): Likewise.
14601 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
14603 * ipa-sra.cc (isra_read_summary_section): Likewise.
14604 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
14605 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
14606 * lto-streamer-in.cc (lto_read_body_or_constructor)
14607 (lto_input_toplevel_asms): Likewise.
14608 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
14610 2023-07-04 Richard Biener <rguenther@suse.de>
14612 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
14613 (empty_bb_or_one_feeding_into_p): Check for them.
14614 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
14615 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
14617 2023-07-04 Richard Biener <rguenther@suse.de>
14619 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
14620 check guarding scalar_niter underflow.
14622 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
14624 PR tree-optimization/110531
14625 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
14626 slp_done_for_suggested_uf to false.
14628 2023-07-04 Richard Biener <rguenther@suse.de>
14630 PR tree-optimization/110228
14631 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
14632 Mark SSA may-undefs.
14633 (bb_no_side_effects_p): Check stmt uses for undefs.
14635 2023-07-04 Richard Biener <rguenther@suse.de>
14637 PR tree-optimization/110436
14638 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
14639 force live but not relevant pattern stmts relevant.
14641 2023-07-04 Lili Cui <lili.cui@intel.com>
14643 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
14644 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
14646 2023-07-04 Richard Biener <rguenther@suse.de>
14648 PR middle-end/110495
14649 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
14650 since we do not set TREE_OVERFLOW on those since the
14651 introduction of VL vectors.
14652 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
14653 at TREE_OVERFLOW to determine validity of association.
14655 2023-07-04 Richard Biener <rguenther@suse.de>
14657 PR tree-optimization/110310
14658 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
14659 Move costing part ...
14660 (vect_analyze_loop_costing): ... here. Integrate better
14661 estimate for epilogues from ...
14662 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
14663 with actual epilogue status.
14664 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
14665 avoid cancelling epilogue vectorization.
14666 (vect_update_epilogue_niters): Remove. No longer update
14667 epilogue LOOP_VINFO_NITERS.
14669 2023-07-04 Pan Li <pan2.li@intel.com>
14672 2023-07-03 Pan Li <pan2.li@intel.com>
14674 * config/riscv/vector.md: Fix typo.
14676 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14678 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
14679 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
14680 (expand_gather_load_optab_fn): Ditto.
14681 (internal_load_fn_p): Ditto.
14682 (internal_store_fn_p): Ditto.
14683 (internal_gather_scatter_fn_p): Ditto.
14684 (internal_fn_len_index): Ditto.
14685 (internal_fn_mask_index): Ditto.
14686 (internal_fn_stored_value_index): Ditto.
14687 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
14688 (LEN_MASK_SCATTER_STORE): Ditto.
14689 * optabs.def (OPTAB_CD): Ditto.
14691 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14693 * config/riscv/riscv-vsetvl.cc
14694 (vector_insn_info::parse_insn): Add early break.
14696 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
14698 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
14699 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
14701 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
14703 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
14705 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
14707 * common/config/riscv/riscv-common.cc: Add support for zvbb,
14708 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
14709 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
14710 * config/riscv/arch-canonicalize: Add canonicalization info for
14711 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
14712 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
14713 (MASK_ZVBC): Likewise.
14714 (TARGET_ZVBB): Likewise.
14715 (TARGET_ZVBC): Likewise.
14716 (MASK_ZVKG): Likewise.
14717 (MASK_ZVKNED): Likewise.
14718 (MASK_ZVKNHA): Likewise.
14719 (MASK_ZVKNHB): Likewise.
14720 (MASK_ZVKSED): Likewise.
14721 (MASK_ZVKSH): Likewise.
14722 (MASK_ZVKN): Likewise.
14723 (MASK_ZVKNC): Likewise.
14724 (MASK_ZVKNG): Likewise.
14725 (MASK_ZVKS): Likewise.
14726 (MASK_ZVKSC): Likewise.
14727 (MASK_ZVKSG): Likewise.
14728 (MASK_ZVKT): Likewise.
14729 (TARGET_ZVKG): Likewise.
14730 (TARGET_ZVKNED): Likewise.
14731 (TARGET_ZVKNHA): Likewise.
14732 (TARGET_ZVKNHB): Likewise.
14733 (TARGET_ZVKSED): Likewise.
14734 (TARGET_ZVKSH): Likewise.
14735 (TARGET_ZVKN): Likewise.
14736 (TARGET_ZVKNC): Likewise.
14737 (TARGET_ZVKNG): Likewise.
14738 (TARGET_ZVKS): Likewise.
14739 (TARGET_ZVKSC): Likewise.
14740 (TARGET_ZVKSG): Likewise.
14741 (TARGET_ZVKT): Likewise.
14742 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
14744 2023-07-03 Andrew Pinski <apinski@marvell.com>
14746 PR middle-end/110510
14747 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
14749 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
14751 * config/darwin.h: Avoid duplicate multiply_defined specs on
14752 earlier Darwin versions with shared libgcc.
14754 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
14756 * tree.h (tree_int_cst_equal): Change return type from int to bool.
14757 (operand_equal_for_phi_arg_p): Ditto.
14758 (tree_map_base_marked_p): Ditto.
14759 * tree.cc (contains_placeholder_p): Update function body
14760 for bool return type.
14761 (type_cache_hasher::equal): Ditto.
14762 (tree_map_base_hash): Change return type
14763 from int to void and adjust function body accordingly.
14764 (tree_int_cst_equal): Ditto.
14765 (operand_equal_for_phi_arg_p): Ditto.
14766 (get_narrower): Change "first" variable to bool.
14767 (cl_option_hasher::equal): Update function body for bool return type.
14768 * ggc.h (ggc_set_mark): Change return type from int to bool.
14769 (ggc_marked_p): Ditto.
14770 * ggc-page.cc (gt_ggc_mx): Change return type
14771 from int to void and adjust function body accordingly.
14772 (ggc_set_mark): Ditto.
14774 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14776 * config/riscv/autovec.md: Change order of
14777 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
14778 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
14779 * doc/md.texi: Ditto.
14780 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
14781 * internal-fn.cc (len_maskload_direct): Ditto.
14782 (len_maskstore_direct): Ditto.
14783 (add_len_and_mask_args): New function.
14784 (expand_partial_load_optab_fn): Change order of
14785 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
14786 (expand_partial_store_optab_fn): Ditto.
14787 (internal_fn_len_index): New function.
14788 (internal_fn_mask_index): Change order of
14789 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
14790 (internal_fn_stored_value_index): Ditto.
14791 (internal_len_load_store_bias): Ditto.
14792 * internal-fn.h (internal_fn_len_index): New function.
14793 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
14794 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
14795 * tree-vect-stmts.cc (vectorizable_store): Ditto.
14796 (vectorizable_load): Ditto.
14798 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
14801 * doc/gm2.texi (Semantic checking): Include examples using
14802 -Wuninit-variable-checking.
14804 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14806 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
14807 (*single_widen_fnma<mode>): Ditto.
14808 (*double_widen_fms<mode>): Ditto.
14809 (*single_widen_fms<mode>): Ditto.
14810 (*double_widen_fnms<mode>): Ditto.
14811 (*single_widen_fnms<mode>): Ditto.
14813 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14815 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
14816 into "*" in pattern name which simplifies build files.
14817 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
14818 (*pred_single_widen_mul<mode>): New pattern.
14820 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
14822 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
14823 the index to be 0 or 1.
14825 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
14828 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14830 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
14831 (*single_widen_fnma<mode>): Ditto.
14832 (*double_widen_fms<mode>): Ditto.
14833 (*single_widen_fms<mode>): Ditto.
14834 (*double_widen_fnms<mode>): Ditto.
14835 (*single_widen_fnms<mode>): Ditto.
14837 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14839 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
14840 (*single_widen_fnma<mode>): Ditto.
14841 (*double_widen_fms<mode>): Ditto.
14842 (*single_widen_fms<mode>): Ditto.
14843 (*double_widen_fnms<mode>): Ditto.
14844 (*single_widen_fnms<mode>): Ditto.
14846 2023-07-03 Pan Li <pan2.li@intel.com>
14848 * config/riscv/vector.md: Fix typo.
14850 2023-07-03 Richard Biener <rguenther@suse.de>
14852 PR tree-optimization/110506
14853 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
14854 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
14856 2023-07-03 Richard Biener <rguenther@suse.de>
14858 PR tree-optimization/110506
14859 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
14860 type before relying on TYPE_PRECISION to produce a nonzero mask.
14862 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14864 * config/mips/mips.md(*and<mode>3_mips16): Generates
14865 ZEB/ZEH instructions.
14867 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14869 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
14870 address register to M16_REGS for MIPS16.
14871 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
14872 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
14873 (AVAIL_NON_MIPS16 (cache..)): Update to
14874 AVAIL_MIPS16E2_OR_NON_MIPS16.
14875 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
14876 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
14878 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14880 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
14881 for ISA_HAS_MIPS16E2.
14882 (ISA_HAS_SYNC): Same as above.
14883 (ISA_HAS_LL_SC): Same as above.
14885 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14887 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
14888 Add logics for generating instruction.
14889 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
14890 * config/mips/mips.md(mov_<load>l): Generates instructions.
14891 (mov_<load>r): Same as above.
14892 (mov_<store>l): Adjusted for the conditions above.
14893 (mov_<store>r): Same as above.
14894 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
14895 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
14897 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14899 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
14900 (mips_const_insns): Same as above.
14901 (mips_output_move): Same as above.
14902 (mips_output_function_prologue): Same as above.
14903 * config/mips/mips.md: Same as above
14905 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14907 * config/mips/constraints.md(Yz): New constraints for mips16e2.
14908 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
14909 (mips_bit_clear_info): Same as above.
14910 * config/mips/mips.cc(mips_bit_clear_info): New function for
14911 generating instructions.
14912 (mips_bit_clear_p): Same as above.
14913 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
14914 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
14915 (*and<mode>3): Generates INS instruction.
14916 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
14917 (ior<mode>3): Add logics for ORI instruction.
14918 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
14919 (*ior<mode>3_mips16): Add logics for XORI instruction.
14920 (*xor<mode>3_mips16): Generates XORI instrucion.
14921 (*extzv<mode>): Add logics for EXT instruction.
14922 (*insv<mode>): Add logics for INS instruction.
14923 * config/mips/predicates.md(bit_clear_operand): New predicate for
14924 generating bitwise instructions.
14925 (and_reg_operand): Add logics for generating bitwise instructions.
14927 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14929 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
14930 that uses global pointer register.
14931 (mips16_unextended_reference_p): Same as above.
14932 (mips_pic_base_register): Same as above.
14933 (mips_init_relocs): Same as above.
14934 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
14935 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
14936 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
14937 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
14939 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14941 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
14942 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
14943 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
14944 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
14945 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
14946 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
14948 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
14950 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
14952 * config/mips/mips.h(__mips_mips16e2): Defined a new
14954 (ISA_HAS_MIPS16E2): Defined a new macro.
14955 (ASM_SPEC): Pass mmips16e2 to the assembler.
14956 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
14957 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
14958 * doc/invoke.texi: Add -m(no-)mips16e2 option..
14960 2023-07-02 Jakub Jelinek <jakub@redhat.com>
14962 PR tree-optimization/110508
14963 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
14964 REALPART_EXPR opf nlhs if re2 is non-NULL.
14966 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14968 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
14970 * config/xtensa/xtensa.md (*xtensa_clamps):
14971 Add TARGET_MINMAX to the condition.
14973 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14975 * config/xtensa/xtensa.md (*eqne_INT_MIN):
14976 Add missing ":SI" to the match_operator.
14978 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
14981 * config/darwin.opt: Add fconstant-cfstrings alias to
14982 mconstant-cfstrings.
14983 * doc/invoke.texi: Amend invocation descriptions to reflect
14984 that the fconstant-cfstrings is a target-option alias and to
14985 add the missing mconstant-cfstrings option description to the
14988 2023-07-01 Jan Hubicka <jh@suse.cz>
14990 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
14991 parmaeter; update profile.
14992 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
14993 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
14994 (static_loop_exit): ... this; return the edge to be elliminated.
14995 (ch_base::copy_headers): Handle profile updating for eliminated exits.
14997 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
14999 * config/i386/i386-features.cc (compute_convert_gain): Provide
15000 gains/costs for ROTATE and ROTATERT (by an integer constant).
15001 (general_scalar_chain::convert_rotate): New helper function to
15002 convert a DImode or SImode rotation by an integer constant into
15004 (general_scalar_chain::convert_insn): Call the new convert_rotate
15005 for ROTATE and ROTATERT.
15006 (general_scalar_to_vector_candidate_p): Consider ROTATE and
15007 ROTATERT to be candidates if the second operand is an integer
15008 constant, valid for a rotation (or shift) in the given mode.
15009 * config/i386/i386-features.h (general_scalar_chain): Add new
15010 helper method convert_rotate.
15012 2023-07-01 Jan Hubicka <jh@suse.cz>
15014 PR tree-optimization/103680
15015 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
15016 make message clearer.
15018 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
15020 PR tree-optimization/101832
15021 * tree-object-size.cc (addr_object_size): Handle structure/union type
15022 when it has flexible size.
15024 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
15026 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
15027 (fold_nonarray_ctor_reference): Likewise. Specifically deal
15028 with integral bit-fields.
15029 (fold_ctor_reference): Make sure that the constructor uses the
15030 native storage order.
15032 2023-06-30 Jan Hubicka <jh@suse.cz>
15034 PR middle-end/109849
15035 * predict.cc (estimate_bb_frequencies): Turn to static function.
15036 (expr_expected_value_1): Fix handling of binary expressions with
15038 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
15039 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
15041 * predict.h (estimate_bb_frequencies): No longer declare it.
15043 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
15045 * fold-const.h (multiple_of_p): Change return type from int to bool.
15046 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
15047 neg_conp_p and neg_var_p variables to bool.
15048 (const_binop): Change sat_p variable to bool.
15049 (merge_ranges): Change no_overlap variable to bool.
15050 (extract_muldiv_1): Change same_p variable to bool.
15051 (tree_swap_operands_p): Update function body for bool return type.
15052 (fold_truth_andor): Change commutative variable to bool.
15053 (multiple_of_p): Change return type
15054 from int to void and adjust function body accordingly.
15055 * optabs.h (expand_twoval_unop): Change return type from int to bool.
15056 (expand_twoval_binop): Ditto.
15057 (can_compare_p): Ditto.
15058 (have_add2_insn): Ditto.
15059 (have_addptr3_insn): Ditto.
15060 (have_sub2_insn): Ditto.
15061 (have_insn_for): Ditto.
15062 * optabs.cc (add_equal_note): Ditto.
15063 (widen_operand): Change no_extend argument from int to bool.
15064 (expand_binop): Ditto.
15065 (expand_twoval_unop): Change return type
15066 from int to void and adjust function body accordingly.
15067 (expand_twoval_binop): Ditto.
15068 (can_compare_p): Ditto.
15069 (have_add2_insn): Ditto.
15070 (have_addptr3_insn): Ditto.
15071 (have_sub2_insn): Ditto.
15072 (have_insn_for): Ditto.
15074 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15076 * config/aarch64/aarch64-simd.md
15077 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
15078 Expansions for abd vec widen optabs.
15079 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
15080 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
15081 that give the appropriate extend RTL for the max RTL.
15083 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15085 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
15086 * optabs.def (vec_widen_sabd_optab,
15087 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
15088 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
15089 vec_widen_uabd_optab,
15090 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
15091 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
15093 * doc/md.texi: Document them.
15094 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
15095 to build a VEC_WIDEN_ABD call if the input precision is smaller
15096 than the precision of the output.
15097 (vect_recog_widen_abd_pattern): Should an ABD expression be
15098 found preceeding an extension, replace the two with a
15101 2023-06-30 Pan Li <pan2.li@intel.com>
15103 * config/riscv/vector.md: Refactor the common condition.
15105 2023-06-30 Richard Biener <rguenther@suse.de>
15107 PR tree-optimization/110496
15108 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
15109 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
15111 2023-06-30 Richard Biener <rguenther@suse.de>
15113 PR middle-end/110489
15114 * statistics.cc (curr_statistics_hash): Add argument
15115 indicating whether we should allocate the hash.
15116 (statistics_fini_pass): If the hash isn't allocated
15117 only print the summary header.
15119 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
15120 Thomas Schwinge <thomas@codesourcery.com>
15122 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
15124 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
15127 * config/mips/mips.cc (mips_function_arg_alignment): Returns
15128 the alignment of function argument. In case of typedef type,
15129 it returns the aligment of the aliased type.
15130 (mips_function_arg_boundary): Relocated calculation of the
15131 aligment of function arguments.
15133 2023-06-29 Jan Hubicka <jh@suse.cz>
15135 PR tree-optimization/109849
15136 * ipa-fnsummary.cc (decompose_param_expr): Skip
15137 functions returning its parameter.
15138 (set_cond_stmt_execution_predicate): Return early
15139 if predicate was constructed.
15141 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15144 * doc/extend.texi: Document GCC extension on a structure containing
15145 a flexible array member to be a member of another structure.
15147 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15149 * print-tree.cc (print_node): Print new bit type_include_flexarray.
15150 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
15151 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
15152 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
15153 in bit no_named_args_stdarg_p properly for its corresponding type.
15154 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
15155 out bit no_named_args_stdarg_p properly for its corresponding type.
15156 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
15158 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15160 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
15161 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
15162 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
15164 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15166 * value-range.cc (frange::set): Do not call verify_range.
15167 (frange::normalize_kind): Verify range.
15168 (frange::union_nans): Do not call verify_range.
15169 (frange::union_): Same.
15170 (frange::intersect): Same.
15171 (irange::irange_single_pair_union): Call normalize_kind if
15173 (irange::union_): Same.
15174 (irange::intersect): Same.
15175 (irange::set_range_from_nonzero_bits): Verify range.
15176 (irange::set_nonzero_bits): Call normalize_kind if necessary.
15177 (irange::get_nonzero_bits): Tweak comment.
15178 (irange::intersect_nonzero_bits): Call normalize_kind if
15180 (irange::union_nonzero_bits): Same.
15181 * value-range.h (irange::normalize_kind): Verify range.
15183 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
15185 * cselib.h (rtx_equal_for_cselib_1):
15186 Change return type from int to bool.
15187 (references_value_p): Ditto.
15188 (rtx_equal_for_cselib_p): Ditto.
15189 * expr.h (can_store_by_pieces): Ditto.
15190 (try_casesi): Ditto.
15191 (try_tablejump): Ditto.
15192 (safe_from_p): Ditto.
15193 * sbitmap.h (bitmap_equal_p): Ditto.
15194 * cselib.cc (references_value_p): Change return type
15195 from int to void and adjust function body accordingly.
15196 (rtx_equal_for_cselib_1): Ditto.
15197 * expr.cc (is_aligning_offset): Ditto.
15198 (can_store_by_pieces): Ditto.
15199 (mostly_zeros_p): Ditto.
15200 (all_zeros_p): Ditto.
15201 (safe_from_p): Ditto.
15202 (is_aligning_offset): Ditto.
15203 (try_casesi): Ditto.
15204 (try_tablejump): Ditto.
15205 (store_constructor): Change "need_to_clear" and
15206 "const_bounds_p" variables to bool.
15207 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
15209 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
15211 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
15214 2023-06-29 Richard Biener <rguenther@suse.de>
15216 PR tree-optimization/110460
15217 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
15218 Only allow integral, pointer and scalar float type scalar_type.
15220 2023-06-29 Lili Cui <lili.cui@intel.com>
15222 PR tree-optimization/110148
15223 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
15224 ops in this function.
15226 2023-06-29 Richard Biener <rguenther@suse.de>
15228 PR middle-end/110452
15229 * expr.cc (store_constructor): Handle uniform boolean
15230 vectors with integer mode specially.
15232 2023-06-29 Richard Biener <rguenther@suse.de>
15234 PR middle-end/110461
15235 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
15238 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
15240 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
15241 (array_slice): Relax va_gc constructor to handle all vectors
15242 with a vl_embed layout.
15244 2023-06-29 Pan Li <pan2.li@intel.com>
15246 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
15247 (riscv_mode_needed): Likewise.
15248 (riscv_entity_mode_after): Likewise.
15249 (riscv_mode_after): Likewise.
15250 (riscv_mode_entry): Likewise.
15251 (riscv_mode_exit): Likewise.
15252 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
15254 * config/riscv/riscv.md: Add FRM register.
15255 * config/riscv/vector-iterators.md: Add FRM type.
15256 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
15257 (fsrm): Define new insn for fsrm instruction.
15259 2023-06-29 Pan Li <pan2.li@intel.com>
15261 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
15262 Add macro for static frm min and max.
15263 * config/riscv/riscv-vector-builtins-bases.cc
15264 (class binop_frm): New class for floating-point with frm.
15265 (BASE): Add vfadd for frm.
15266 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
15267 * config/riscv/riscv-vector-builtins-functions.def
15268 (vfadd_frm): Likewise.
15269 * config/riscv/riscv-vector-builtins-shapes.cc
15270 (struct alu_frm_def): New struct for alu with frm.
15271 (SHAPE): Add alu with frm.
15272 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
15273 * config/riscv/riscv-vector-builtins.cc
15274 (function_checker::report_out_of_range_and_not): New function
15275 for report out of range and not val.
15276 (function_checker::require_immediate_range_or): New function
15277 for checking in range or one val.
15278 * config/riscv/riscv-vector-builtins.h: Add function decl.
15280 2023-06-29 Cui, Lili <lili.cui@intel.com>
15282 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
15283 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
15285 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
15288 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
15289 to insn before validating it.
15291 2023-06-28 Jan Hubicka <jh@suse.cz>
15293 PR middle-end/110334
15294 * ipa-fnsummary.h (ipa_fn_summary): Add
15295 safe_to_inline_to_always_inline.
15296 * ipa-inline.cc (can_early_inline_edge_p): ICE
15297 if SSA is not built; do cycle checking for
15298 always_inline functions.
15299 (inline_always_inline_functions): Be recrusive;
15300 watch for cycles; do not updat overall summary.
15301 (early_inliner): Do not give up on always_inlines.
15302 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
15305 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
15307 * output.h (leaf_function_p): Change return type from int to bool.
15308 (final_forward_branch_p): Ditto.
15309 (only_leaf_regs_used): Ditto.
15310 (maybe_assemble_visibility): Ditto.
15311 * varasm.h (supports_one_only): Ditto.
15312 * rtl.h (compute_alignments): Change return type from int to void.
15313 * final.cc (app_on): Change return type from int to bool.
15314 (compute_alignments): Change return type from int to void
15315 and adjust function body accordingly.
15316 (shorten_branches): Change "something_changed" variable
15317 type from int to bool.
15318 (leaf_function_p): Change return type from int to bool
15319 and adjust function body accordingly.
15320 (final_forward_branch_p): Ditto.
15321 (only_leaf_regs_used): Ditto.
15322 * varasm.cc (contains_pointers_p): Change return type from
15323 int to bool and adjust function body accordingly.
15324 (compare_constant): Ditto.
15325 (maybe_assemble_visibility): Ditto.
15326 (supports_one_only): Ditto.
15328 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
15331 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
15332 (maybe_copy_reg_attrs): New function.
15333 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
15334 (copyprop_hardreg_forward_1): Ditto.
15336 2023-06-28 Richard Biener <rguenther@suse.de>
15338 PR tree-optimization/110434
15339 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
15340 VAR we replace with <retval>.
15342 2023-06-28 Richard Biener <rguenther@suse.de>
15344 PR tree-optimization/110451
15345 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
15346 tcc_comparison are expensive.
15348 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
15350 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
15351 for TImode comparisons on 32-bit architectures.
15352 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
15353 SWIM1248x to exclude/avoid TImode being conditional on -m64.
15354 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
15355 and/or with TARGET_SSE4_1.
15356 * config/i386/predicates.md (ix86_timode_comparison_operator):
15357 New predicate that depends upon TARGET_64BIT.
15358 (ix86_timode_comparison_operand): Likewise.
15360 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
15363 * config/i386/i386-features.cc (compute_convert_gain): Provide
15364 more accurate gains for conversion of scalar comparisons to
15367 2023-06-28 Richard Biener <rguenther@suse.de>
15369 PR tree-optimization/110443
15370 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
15373 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
15375 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
15376 (peephole2 for move_and_compare): New.
15377 (mode_iterator WORD): New. Set the mode to SI/DImode by
15379 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
15380 (split pattern for compare_and_move): Likewise.
15382 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15384 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
15385 (*single_widen_fma<mode>): Ditto.
15387 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
15390 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
15392 (altivec_vupkhs<VU_char>_direct): ...this.
15393 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
15394 predicate to test if a constant can be loaded with vspltisw and
15396 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
15397 a vector constant can be synthesized with a vspltisw and a vupkhsw.
15398 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
15400 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
15401 function to return true if OP mode is V2DI and can be synthesized
15402 with vupkhsw and vspltisw.
15403 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
15404 constants with vspltisw and vupkhsw.
15406 2023-06-28 Jan Hubicka <jh@suse.cz>
15408 PR tree-optimization/110377
15409 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
15411 (ipa_analyze_node): Enable ranger.
15413 2023-06-28 Richard Biener <rguenther@suse.de>
15415 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
15416 (TYPE_PRECISION_RAW): Provide raw access to the precision
15418 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
15419 (gimple_canonical_types_compatible_p): Likewise.
15420 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
15421 Stream TYPE_PRECISION_RAW.
15422 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
15424 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
15426 2023-06-28 Alexandre Oliva <oliva@adacore.com>
15428 * doc/extend.texi (zero-call-used-regs): Document leafy and
15430 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
15431 LEAFY and variants.
15432 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
15433 functions in leafy mode.
15434 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
15436 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15438 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
15439 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
15441 (@pred_single_widen_add<mode>): New pattern.
15442 (@pred_single_widen_sub<mode>): New pattern.
15444 2023-06-28 liuhongt <hongtao.liu@intel.com>
15446 * config/i386/i386.cc (ix86_invalid_conversion): New function.
15447 (TARGET_INVALID_CONVERSION): Define as
15448 ix86_invalid_conversion.
15450 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15452 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
15454 (<float_cvt><vnconvert><mode>2): Ditto.
15455 (<optab><mode><vnconvert>2): Ditto.
15456 (<float_cvt><mode><vnconvert>2): Ditto.
15457 * config/riscv/vector-iterators.md: Add vnconvert.
15459 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15461 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
15463 (extend<v_quad_trunc><mode>2): Ditto.
15464 (trunc<mode><v_double_trunc>2): Ditto.
15465 (trunc<mode><v_quad_trunc>2): Ditto.
15466 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
15467 V_QUAD_TRUNC and v_quad_trunc.
15469 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15471 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
15474 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15476 * config/riscv/autovec.md (copysign<mode>3): Add expander.
15477 (xorsign<mode>3): Ditto.
15478 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
15480 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
15484 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
15485 (@pred_ncopysign<mode>_scalar): Ditto.
15487 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15489 * config/riscv/autovec.md: VF_AUTO -> VF.
15490 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
15491 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
15493 * config/riscv/vector.md: Use new iterators.
15495 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
15497 * match.pd: Use element_mode and check if target supports
15498 operation with new type.
15500 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15502 * config/aarch64/aarch64-sve-builtins-base.cc
15503 (svdupq_impl::fold_nonconst_dupq): New method.
15504 (svdupq_impl::fold): Call fold_nonconst_dupq.
15506 2023-06-27 Andrew Pinski <apinski@marvell.com>
15508 PR middle-end/110420
15509 PR middle-end/103979
15510 PR middle-end/98619
15511 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
15513 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
15515 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
15516 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
15518 (set_switch_stmt_execution_predicate): Same.
15519 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
15521 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
15523 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
15524 ipa_vr instead of value_range.
15527 (ipa_get_value_range): Same.
15528 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
15532 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
15534 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
15535 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
15536 (ipa_set_jfunc_vr): Take a range.
15537 (ipa_compute_jump_functions_for_edge): Pass range to
15539 (ipa_write_jump_function): Call streamer write helper.
15540 (ipa_read_jump_function): Call streamer read helper.
15541 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
15543 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
15545 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
15546 as a probable initializer rather than a probable complete statement.
15548 2023-06-27 Richard Biener <rguenther@suse.de>
15550 PR tree-optimization/96208
15551 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
15552 a non-grouped load if it is the same for all lanes.
15553 (vect_build_slp_tree_2): Handle not grouped loads.
15554 (vect_optimize_slp_pass::remove_redundant_permutations):
15556 (vect_transform_slp_perm_load_1): Likewise.
15557 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
15558 (get_group_load_store_type): Likewise. Handle
15559 invariant accesses.
15560 (vectorizable_load): Likewise.
15562 2023-06-27 liuhongt <hongtao.liu@intel.com>
15564 PR rtl-optimization/110237
15565 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
15567 (maskstore<mode><avx512fmaskmodelower): Ditto.
15568 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
15569 from original <avx512>_store<mode>_mask.
15571 2023-06-27 liuhongt <hongtao.liu@intel.com>
15573 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
15574 Move flag_expensive_optimizations && !optimize_size to ..
15575 * config/i386/i386-options.cc (ix86_option_override_internal):
15576 .. this, it makes -mvzeroupper independent of optimization
15577 level, but still keeps the behavior of architecture
15578 tuning(emit_vzeroupper) unchanged.
15580 2023-06-27 liuhongt <hongtao.liu@intel.com>
15583 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
15584 vzeroupper for vzeroupper call_insn.
15586 2023-06-27 Andrew Pinski <apinski@marvell.com>
15588 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
15591 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15593 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
15596 2023-06-26 Andrew Pinski <apinski@marvell.com>
15598 * doc/extend.texi (access attribute): Add
15600 (interrupt/interrupt_handler attribute):
15603 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15605 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
15606 Use <DWI> instead of <V2XWIDE>.
15607 (aarch64_sqrshrun_n<mode>): Likewise.
15609 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15611 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
15613 (aarch64_rnd_imm_p): ... This.
15614 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
15616 (aarch64_int_rnd_operand): ... This.
15617 (aarch64_simd_rshrn_imm_vec): Delete.
15618 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
15619 Adjust for the above.
15620 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
15621 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
15622 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
15623 (aarch64_sqrshrun_n<mode>_insn): Likewise.
15624 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
15625 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
15626 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
15627 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
15628 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
15630 (aarch64_rnd_imm_p): ... This.
15632 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
15634 * config/s390/s390.cc (s390_encode_section_info): Set
15635 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
15638 2023-06-26 Jan Hubicka <jh@suse.cz>
15640 PR tree-optimization/109849
15641 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
15642 count of newly constructed forwarder block.
15644 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
15646 * doc/optinfo.texi: Fix "steam" -> "stream".
15648 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15650 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
15652 (dse_optimize_stmt): Add LEN_MASK_STORE.
15654 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15656 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
15657 fold of LOAD/STORE with length.
15659 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
15661 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
15662 Check for interdependence between operands 1 and 2.
15664 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
15666 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
15667 into account when costing non-widening/truncating conversions.
15669 2023-06-26 Richard Biener <rguenther@suse.de>
15671 PR tree-optimization/110381
15672 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
15673 Materialize permutes before fold-left reductions.
15675 2023-06-26 Pan Li <pan2.li@intel.com>
15677 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
15679 2023-06-26 Richard Biener <rguenther@suse.de>
15681 * varasm.cc (initializer_constant_valid_p_1): Also
15682 constrain the type of value to be scalar integral
15683 before dispatching to narrowing_initializer_constant_valid_p.
15685 2023-06-26 Richard Biener <rguenther@suse.de>
15687 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
15688 Use element_precision.
15690 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15692 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
15694 (vcondu<V:mode><VI:mode>): Ditto.
15695 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
15696 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
15698 2023-06-26 Richard Biener <rguenther@suse.de>
15700 PR tree-optimization/110392
15701 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
15702 Do early exits on true/false predicate only after normalization.
15704 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15706 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
15709 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
15711 * config/i386/i386.md (peephole2): Simplify zeroing a register
15712 followed by an IOR, XOR or PLUS operation on it, into a move.
15713 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
15714 eliminate (and hide from reload) unnecessary word to doubleword
15715 extensions that are followed by left shifts by sufficiently large,
15716 but valid, bit counts.
15718 2023-06-26 liuhongt <hongtao.liu@intel.com>
15720 PR tree-optimization/110371
15721 PR tree-optimization/110018
15722 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
15723 save intermediate type operand instead of "subtle" vec_dest
15726 2023-06-26 liuhongt <hongtao.liu@intel.com>
15728 PR tree-optimization/110371
15729 PR tree-optimization/110018
15730 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
15731 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
15733 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
15735 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
15736 Override tune_string with arch_string if tune_string is not
15737 explicitly specified.
15739 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15741 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
15743 * config/riscv/riscv-vsetvl.h: New function.
15745 2023-06-25 Li Xu <xuli1@eswincomputing.com>
15747 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
15750 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15752 * config/riscv/autovec.md (len_load_<mode>): Remove.
15753 (len_maskload<mode><vm>): Remove.
15754 (len_store_<mode>): New pattern.
15755 (len_maskstore<mode><vm>): New pattern.
15756 * config/riscv/predicates.md (autovec_length_operand): New predicate.
15757 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15758 (expand_load_store): New function.
15759 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
15760 (emit_nonvlmax_masked_insn): Ditto.
15761 (expand_load_store): Ditto.
15762 * config/riscv/riscv-vector-builtins.cc
15763 (function_expander::use_contiguous_store_insn): Add avl_type operand
15765 * config/riscv/vector.md: Ditto.
15767 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15769 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
15772 2023-06-25 Pan Li <pan2.li@intel.com>
15774 * config/riscv/vector.md: Revert.
15776 2023-06-25 Pan Li <pan2.li@intel.com>
15778 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
15779 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
15780 (ADJUST_ALIGNMENT): Ditto.
15781 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15782 (ADJUST_NUNITS): Ditto.
15783 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
15784 (vfloat16mf4x3_t): Ditto.
15785 (vfloat16mf4x4_t): Ditto.
15786 (vfloat16mf4x5_t): Ditto.
15787 (vfloat16mf4x6_t): Ditto.
15788 (vfloat16mf4x7_t): Ditto.
15789 (vfloat16mf4x8_t): Ditto.
15790 (vfloat16mf2x2_t): Ditto.
15791 (vfloat16mf2x3_t): Ditto.
15792 (vfloat16mf2x4_t): Ditto.
15793 (vfloat16mf2x5_t): Ditto.
15794 (vfloat16mf2x6_t): Ditto.
15795 (vfloat16mf2x7_t): Ditto.
15796 (vfloat16mf2x8_t): Ditto.
15797 (vfloat16m1x2_t): Ditto.
15798 (vfloat16m1x3_t): Ditto.
15799 (vfloat16m1x4_t): Ditto.
15800 (vfloat16m1x5_t): Ditto.
15801 (vfloat16m1x6_t): Ditto.
15802 (vfloat16m1x7_t): Ditto.
15803 (vfloat16m1x8_t): Ditto.
15804 (vfloat16m2x2_t): Ditto.
15805 (vfloat16m2x3_t): Diito.
15806 (vfloat16m2x4_t): Diito.
15807 (vfloat16m4x2_t): Diito.
15808 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
15809 (vfloat16mf4x3_t): Ditto.
15810 (vfloat16mf4x4_t): Ditto.
15811 (vfloat16mf4x5_t): Ditto.
15812 (vfloat16mf4x6_t): Ditto.
15813 (vfloat16mf4x7_t): Ditto.
15814 (vfloat16mf4x8_t): Ditto.
15815 (vfloat16mf2x2_t): Ditto.
15816 (vfloat16mf2x3_t): Ditto.
15817 (vfloat16mf2x4_t): Ditto.
15818 (vfloat16mf2x5_t): Ditto.
15819 (vfloat16mf2x6_t): Ditto.
15820 (vfloat16mf2x7_t): Ditto.
15821 (vfloat16mf2x8_t): Ditto.
15822 (vfloat16m1x2_t): Ditto.
15823 (vfloat16m1x3_t): Ditto.
15824 (vfloat16m1x4_t): Ditto.
15825 (vfloat16m1x5_t): Ditto.
15826 (vfloat16m1x6_t): Ditto.
15827 (vfloat16m1x7_t): Ditto.
15828 (vfloat16m1x8_t): Ditto.
15829 (vfloat16m2x2_t): Ditto.
15830 (vfloat16m2x3_t): Ditto.
15831 (vfloat16m2x4_t): Ditto.
15832 (vfloat16m4x2_t): Ditto.
15833 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
15834 * config/riscv/riscv.md: Ditto.
15835 * config/riscv/vector-iterators.md: Ditto.
15837 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15839 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
15840 (gimple_fold_partial_load_store_mem_ref): Ditto.
15841 (gimple_fold_partial_store): Ditto.
15842 (gimple_fold_call): Ditto.
15844 2023-06-25 liuhongt <hongtao.liu@intel.com>
15847 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
15848 Refine pattern with UNSPEC_MASKLOAD.
15849 (maskload<mode><avx512fmaskmodelower>): Ditto.
15850 (*<avx512>_load<mode>_mask): Extend mode iterator to
15852 (*<avx512>_load<mode>): Ditto.
15854 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15856 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
15858 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15860 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
15861 LEN_MASK_{LOAD,STORE}
15863 2023-06-25 yulong <shiyulong@iscas.ac.cn>
15865 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
15867 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
15869 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
15871 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15873 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
15874 (*fma<VI:mode><P:mode>): Ditto.
15875 (*fnma<mode>): Ditto.
15876 (*fnma<VI:mode><P:mode>): Ditto.
15878 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15880 * config/riscv/autovec.md (fma<mode>4): New pattern.
15881 (*fma<mode>): Ditto.
15882 (fnma<mode>4): Ditto.
15883 (*fnma<mode>): Ditto.
15884 (fms<mode>4): Ditto.
15885 (*fms<mode>): Ditto.
15886 (fnms<mode>4): Ditto.
15887 (*fnms<mode>): Ditto.
15888 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
15890 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
15891 * config/riscv/vector.md: Fix attribute bug.
15893 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15895 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
15896 Apply LEN_MASK_{LOAD,STORE}.
15898 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15900 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
15901 Add LEN_MASK_{LOAD,STORE}.
15903 2023-06-24 David Malcolm <dmalcolm@redhat.com>
15905 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
15906 * diagnostic.cc: Likewise.
15907 * text-art/box-drawing.cc: Likewise.
15908 * text-art/canvas.cc: Likewise.
15909 * text-art/ruler.cc: Likewise.
15910 * text-art/selftests.cc: Likewise.
15911 * text-art/selftests.h (text_art::canvas): New forward decl.
15912 * text-art/style.cc: Add #define INCLUDE_VECTOR.
15913 * text-art/styled-string.cc: Likewise.
15914 * text-art/table.cc: Likewise.
15915 * text-art/table.h: Remove #include <vector>.
15916 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
15917 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
15918 Remove #include of <vector> and <string>.
15919 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
15920 * text-art/widget.h: Remove #include <vector>.
15922 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15924 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
15925 (internal_load_fn_p): Add LEN_MASK_LOAD.
15926 (internal_store_fn_p): Add LEN_MASK_STORE.
15927 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
15928 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
15929 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
15930 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
15931 (get_len_load_store_mode): Ditto.
15932 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
15933 (get_len_load_store_mode): Ditto.
15934 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
15935 (get_all_ones_mask): New function.
15936 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
15937 (vectorizable_load): Ditto.
15939 2023-06-23 Marek Polacek <polacek@redhat.com>
15941 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
15942 -std=gnu++26. Document that for C++23, its value is 202302L.
15943 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
15944 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
15945 (gen_compile_unit_die): Likewise.
15947 2023-06-23 Jan Hubicka <jh@suse.cz>
15949 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
15951 (pass_phiprop::execute): Do not compute it here; return
15952 update_ssa_only_virtuals if something changed.
15953 (pass_data_phiprop): Remove TODO_update_ssa from todos.
15955 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
15956 Aaron Sawdey <acsawdey@linux.ibm.com>
15959 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
15960 allowed prefixed lwa to be generated.
15961 * config/rs6000/fusion.md: Regenerate.
15962 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
15963 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
15964 plus compare immediate fused insns.
15965 (maybe_prefixed): Likewise.
15967 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
15969 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
15970 of ASHIFT to const0_rtx with sufficiently large shift count.
15971 Optimize highpart SUBREGs of ASHIFT as the shift operand when
15972 the shift count is the correct offset. Optimize SUBREGs of
15973 multi-word logic operations if the SUBREGs of both operands
15976 2023-06-23 Richard Biener <rguenther@suse.de>
15978 * varasm.cc (initializer_constant_valid_p_1): Only
15979 allow conversions between scalar floating point types.
15981 2023-06-23 Richard Biener <rguenther@suse.de>
15983 * tree-vect-stmts.cc (vectorizable_assignment):
15984 Properly handle non-integral operands when analyzing
15987 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15989 PR tree-optimization/110280
15990 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
15991 using build_vector_from_val with the element of input operand, and
15992 mask's type if operand and mask's types don't match.
15994 2023-06-23 Richard Biener <rguenther@suse.de>
15996 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
15997 the truth_value_p case with !VECTOR_TYPE_P.
15999 2023-06-23 Richard Biener <rguenther@suse.de>
16001 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
16002 Exit early when the type isn't scalar integral.
16004 2023-06-23 Richard Biener <rguenther@suse.de>
16006 * match.pd ((outertype)((innertype0)a+(innertype1)b)
16007 -> ((newtype)a+(newtype)b)): Use element_precision
16010 2023-06-23 Richard Biener <rguenther@suse.de>
16012 * fold-const.cc (fold_binary_loc): Use element_precision
16013 when trying (double)float1 CMP (double)float2 to
16014 float1 CMP float2 simplification.
16015 * match.pd: Likewise.
16017 2023-06-23 Richard Biener <rguenther@suse.de>
16019 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
16020 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
16022 2023-06-23 Richard Biener <rguenther@suse.de>
16024 * tree-vect-stmts.cc (vector_vector_composition_type):
16025 Handle composition of a vector from a number of elements that
16026 happens to match its number of lanes.
16028 2023-06-22 Marek Polacek <polacek@redhat.com>
16030 * configure.ac (--enable-host-bind-now): New check. Add
16031 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
16032 * configure: Regenerate.
16033 * doc/install.texi: Document --enable-host-bind-now.
16035 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
16037 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
16039 2023-06-22 Richard Biener <rguenther@suse.de>
16041 PR tree-optimization/110332
16042 * tree-ssa-phiprop.cc (propagate_with_phi): Always
16043 check aliasing with edge inserted loads.
16045 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
16046 Uros Bizjak <ubizjak@gmail.com>
16048 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
16049 expansion of ptestc with equal operands as producing const1_rtx.
16050 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
16051 estimates of UNSPEC_PTEST, where the ptest performs the PAND
16052 or PAND of its operands.
16053 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
16054 of reg_equal_p operands into an x86_stc instruction.
16055 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
16056 (define_split): Similar to above for strict_low_part destinations.
16057 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
16059 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16062 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
16063 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
16065 (fanalyzer-debug-text-art): New.
16067 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16069 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
16070 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
16071 text-art/style.o, text-art/styled-string.o, text-art/table.o,
16072 text-art/theme.o, and text-art/widget.o.
16073 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
16074 (COLOR_FG_BRIGHT_RED): New.
16075 (COLOR_FG_BRIGHT_GREEN): New.
16076 (COLOR_FG_BRIGHT_YELLOW): New.
16077 (COLOR_FG_BRIGHT_BLUE): New.
16078 (COLOR_FG_BRIGHT_MAGENTA): New.
16079 (COLOR_FG_BRIGHT_CYAN): New.
16080 (COLOR_FG_BRIGHT_WHITE): New.
16081 (COLOR_BG_BRIGHT_BLACK): New.
16082 (COLOR_BG_BRIGHT_RED): New.
16083 (COLOR_BG_BRIGHT_GREEN): New.
16084 (COLOR_BG_BRIGHT_YELLOW): New.
16085 (COLOR_BG_BRIGHT_BLUE): New.
16086 (COLOR_BG_BRIGHT_MAGENTA): New.
16087 (COLOR_BG_BRIGHT_CYAN): New.
16088 (COLOR_BG_BRIGHT_WHITE): New.
16089 * common.opt (fdiagnostics-text-art-charset=): New option.
16090 (diagnostic-text-art.h): New SourceInclude.
16091 (diagnostic_text_art_charset) New Enum and EnumValues.
16092 * configure: Regenerate.
16093 * configure.ac (gccdepdir): Add text-art to loop.
16094 * diagnostic-diagram.h: New file.
16095 * diagnostic-format-json.cc (json_emit_diagram): New.
16096 (diagnostic_output_format_init_json): Wire it up to
16097 context->m_diagrams.m_emission_cb.
16098 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
16099 "text-art/canvas.h".
16100 (sarif_result::on_nested_diagnostic): Move code to...
16101 (sarif_result::add_related_location): ...this new function.
16102 (sarif_result::on_diagram): New.
16103 (sarif_builder::emit_diagram): New.
16104 (sarif_builder::make_message_object_for_diagram): New.
16105 (sarif_emit_diagram): New.
16106 (diagnostic_output_format_init_sarif): Set
16107 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
16108 * diagnostic-text-art.h: New file.
16109 * diagnostic.cc: Include "diagnostic-text-art.h",
16110 "diagnostic-diagram.h", and "text-art/theme.h".
16111 (diagnostic_initialize): Initialize context->m_diagrams and
16112 call diagnostics_text_art_charset_init.
16113 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
16114 (diagnostic_emit_diagram): New.
16115 (diagnostics_text_art_charset_init): New.
16116 * diagnostic.h (text_art::theme): New forward decl.
16117 (class diagnostic_diagram): Likewise.
16118 (diagnostic_context::m_diagrams): New field.
16119 (diagnostic_emit_diagram): New decl.
16120 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
16121 -fdiagnostics-text-art-charset=.
16122 (-fdiagnostics-plain-output): Add
16123 -fdiagnostics-text-art-charset=none.
16124 * gcc.cc: Include "diagnostic-text-art.h".
16125 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16126 * opts-common.cc (decode_cmdline_options_to_array): Add
16127 "-fdiagnostics-text-art-charset=none" to expanded_args for
16128 -fdiagnostics-plain-output.
16129 * opts.cc: Include "diagnostic-text-art.h".
16130 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16131 * pretty-print.cc (pp_unicode_character): New.
16132 * pretty-print.h (pp_unicode_character): New decl.
16133 * selftest-run-tests.cc: Include "text-art/selftests.h".
16134 (selftest::run_tests): Call text_art_tests.
16135 * text-art/box-drawing-chars.inc: New file, generated by
16136 contrib/unicode/gen-box-drawing-chars.py.
16137 * text-art/box-drawing.cc: New file.
16138 * text-art/box-drawing.h: New file.
16139 * text-art/canvas.cc: New file.
16140 * text-art/canvas.h: New file.
16141 * text-art/ruler.cc: New file.
16142 * text-art/ruler.h: New file.
16143 * text-art/selftests.cc: New file.
16144 * text-art/selftests.h: New file.
16145 * text-art/style.cc: New file.
16146 * text-art/styled-string.cc: New file.
16147 * text-art/table.cc: New file.
16148 * text-art/table.h: New file.
16149 * text-art/theme.cc: New file.
16150 * text-art/theme.h: New file.
16151 * text-art/types.h: New file.
16152 * text-art/widget.cc: New file.
16153 * text-art/widget.h: New file.
16155 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
16157 * function.h (emit_initial_value_sets):
16158 Change return type from int to void.
16159 (aggregate_value_p): Change return type from int to bool.
16160 (prologue_contains): Ditto.
16161 (epilogue_contains): Ditto.
16162 (prologue_epilogue_contains): Ditto.
16163 * function.cc (temp_slot): Make "in_use" variable bool.
16164 (make_slot_available): Update for changed "in_use" variable.
16165 (assign_stack_temp_for_type): Ditto.
16166 (emit_initial_value_sets): Change return type from int to void
16167 and update function body accordingly.
16168 (instantiate_virtual_regs): Ditto.
16169 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
16170 (safe_insn_predicate): Change return type from int to bool.
16171 (aggregate_value_p): Change return type from int to bool
16172 and update function body accordingly.
16173 (prologue_contains): Change return type from int to bool.
16174 (prologue_epilogue_contains): Ditto.
16176 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
16178 * common.opt (fp_contract_mode) [on]: Remove fallback.
16179 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
16180 * doc/invoke.texi (-ffp-contract): Update.
16181 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
16183 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16185 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16186 Add alternatives to prefer to avoid same input and output Z register.
16187 (mask_gather_load<mode><v_int_container>): Likewise.
16188 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16189 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16190 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16191 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16193 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16195 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16196 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16197 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16198 <SVE_2BHSI:mode>_sxtw): Likewise.
16199 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16200 <SVE_2BHSI:mode>_uxtw): Likewise.
16201 (@aarch64_ldff1_gather<mode>): Likewise.
16202 (@aarch64_ldff1_gather<mode>): Likewise.
16203 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16204 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16205 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16206 <VNx4_NARROW:mode>): Likewise.
16207 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16208 <VNx2_NARROW:mode>): Likewise.
16209 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16210 <VNx2_NARROW:mode>_sxtw): Likewise.
16211 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16212 <VNx2_NARROW:mode>_uxtw): Likewise.
16213 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16214 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16215 <SVE_PARTIAL_I:mode>): Likewise.
16217 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16219 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16220 Convert to compact alternatives syntax.
16221 (mask_gather_load<mode><v_int_container>): Likewise.
16222 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16223 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16224 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16225 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16227 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16229 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16230 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16231 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16232 <SVE_2BHSI:mode>_sxtw): Likewise.
16233 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16234 <SVE_2BHSI:mode>_uxtw): Likewise.
16235 (@aarch64_ldff1_gather<mode>): Likewise.
16236 (@aarch64_ldff1_gather<mode>): Likewise.
16237 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16238 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16239 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16240 <VNx4_NARROW:mode>): Likewise.
16241 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16242 <VNx2_NARROW:mode>): Likewise.
16243 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16244 <VNx2_NARROW:mode>_sxtw): Likewise.
16245 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16246 <VNx2_NARROW:mode>_uxtw): Likewise.
16247 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16248 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16249 <SVE_PARTIAL_I:mode>): Likewise.
16251 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16254 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16256 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16257 Convert to compact alternatives syntax.
16258 (mask_gather_load<mode><v_int_container>): Likewise.
16259 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16260 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16261 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16262 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16264 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16266 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16267 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16268 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16269 <SVE_2BHSI:mode>_sxtw): Likewise.
16270 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16271 <SVE_2BHSI:mode>_uxtw): Likewise.
16272 (@aarch64_ldff1_gather<mode>): Likewise.
16273 (@aarch64_ldff1_gather<mode>): Likewise.
16274 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16275 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16276 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16277 <VNx4_NARROW:mode>): Likewise.
16278 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16279 <VNx2_NARROW:mode>): Likewise.
16280 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16281 <VNx2_NARROW:mode>_sxtw): Likewise.
16282 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16283 <VNx2_NARROW:mode>_uxtw): Likewise.
16284 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16285 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16286 <SVE_PARTIAL_I:mode>): Likewise.
16288 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16290 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
16291 (get_len_load_store_mode): Ditto.
16292 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
16293 (get_len_load_store_mode): Ditto.
16294 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
16295 (get_len_load_store_mode): Ditto.
16296 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
16297 (get_len_load_store_mode): Ditto.
16298 * tree-if-conv.cc: include optabs-tree instead of optabs-query
16300 2023-06-21 Richard Biener <rguenther@suse.de>
16302 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
16303 split_constant_offset for the POINTER_PLUS_EXPR case.
16305 2023-06-21 Richard Biener <rguenther@suse.de>
16307 * tree-ssa-loop-ivopts.cc (record_group_use): Use
16308 split_constant_offset.
16310 2023-06-21 Richard Biener <rguenther@suse.de>
16312 * tree-loop-distribution.cc (classify_builtin_st): Use
16313 split_constant_offset.
16314 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
16315 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
16317 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16319 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16320 Convert to compact alternatives syntax.
16321 (mask_gather_load<mode><v_int_container>): Likewise.
16322 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16323 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16324 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16325 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16327 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16329 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16330 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16331 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16332 <SVE_2BHSI:mode>_sxtw): Likewise.
16333 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16334 <SVE_2BHSI:mode>_uxtw): Likewise.
16335 (@aarch64_ldff1_gather<mode>): Likewise.
16336 (@aarch64_ldff1_gather<mode>): Likewise.
16337 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16338 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16339 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16340 <VNx4_NARROW:mode>): Likewise.
16341 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16342 <VNx2_NARROW:mode>): Likewise.
16343 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16344 <VNx2_NARROW:mode>_sxtw): Likewise.
16345 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16346 <VNx2_NARROW:mode>_uxtw): Likewise.
16347 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16348 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16349 <SVE_PARTIAL_I:mode>): Likewise.
16351 2023-06-21 Tamar Christina <tamar.christina@arm.com>
16354 * doc/md.texi: Replace backslashchar.
16356 2023-06-21 Richard Biener <rguenther@suse.de>
16358 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
16359 Overload. For masked main loops make sure the vectorization
16360 factor isn't more than double the number of iterations.
16362 2023-06-21 Jan Beulich <jbeulich@suse.com>
16364 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
16365 value duplication by ix86_build_signbit_mask() when AVX512F and
16367 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
16368 2-alternative form. Adjust "mode" attribute. Add "enabled"
16370 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
16371 && !TARGET_PREFER_AVX256.
16372 (*<avx512>_vpternlog<mode>_2): Likewise.
16373 (*<avx512>_vpternlog<mode>_3): Likewise.
16375 2023-06-21 liuhongt <hongtao.liu@intel.com>
16378 * tree-vect-stmts.cc (vectorizable_conversion): Use
16379 intermiediate integer type for float_expr/fix_trunc_expr when
16380 direct optab is not existed.
16382 2023-06-20 Tamar Christina <tamar.christina@arm.com>
16384 PR bootstrap/110324
16385 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
16387 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
16389 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
16390 register operand to the stack pointer. Require the second register
16391 operand to have the number specified in a separate const_int operand.
16392 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
16393 (aarch64_allocate_and_probe_stack_space): Use it.
16394 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
16395 (aarch64_expand_epilogue): Likewise.
16397 2023-06-20 Jakub Jelinek <jakub@redhat.com>
16399 PR middle-end/79173
16400 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
16401 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
16404 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
16406 * calls.h (setjmp_call_p): Change return type from int to bool.
16407 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
16408 (store_one_arg): Change return type from int to bool
16409 and adjust function body accordingly. Change "sibcall_failure"
16411 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
16412 argument to bool. Change "partial_seen" variable to bool.
16413 (load_register_parameters): Change *sibcall_failure
16414 pointer argument to bool.
16415 (check_sibcall_argument_overlap_1): Change return type from int to bool
16416 and adjust function body accordingly.
16417 (check_sibcall_argument_overlap): Ditto. Change
16418 "mark_stored_args_map" argument to bool.
16419 (emit_call_1): Change "already_popped" variable to bool.
16420 (setjmp_call_p): Change return type from int to bool
16421 and adjust function body accordingly.
16422 (initialize_argument_information): Change *must_preallocate
16423 pointer argument to bool.
16424 (expand_call): Change "pcc_struct_value", "must_preallocate"
16425 and "sibcall_failure" variables to bool.
16426 (emit_library_call_value_1): Change "pcc_struct_value"
16429 2023-06-20 Martin Jambor <mjambor@suse.cz>
16432 * ipa-sra.cc (struct caller_issues): New field there_is_one.
16433 (check_for_caller_issues): Set it.
16434 (check_all_callers_for_issues): Check it.
16436 2023-06-20 Martin Jambor <mjambor@suse.cz>
16438 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
16439 (struct ipcp_transformation): Rearrange members according to
16440 C++ class coding convention, add m_uid_to_idx,
16441 get_param_index and maybe_create_parm_idx_map.
16442 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
16443 (compare_uids): Likewise.
16444 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
16445 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
16446 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
16447 (ipcp_update_vr): Likewise.
16448 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
16449 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
16451 2023-06-20 Carl Love <cel@us.ibm.com>
16453 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
16454 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
16455 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
16456 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
16457 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
16458 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
16459 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
16460 * config/rs6000/rs6000-builtins.def
16461 (__builtin_vsx_scalar_extract_exp_to_vec,
16462 __builtin_vsx_scalar_extract_sig_to_vec,
16463 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
16464 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
16465 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
16466 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
16467 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
16468 overloaded instance. Update comments.
16469 * config/rs6000/rs6000-overload.def
16470 (__builtin_vec_scalar_insert_exp): Add new overload definition with
16472 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
16473 overloaded definitions.
16474 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
16475 (DI_to_TI): New mode attribute.
16476 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
16477 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
16478 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
16479 * doc/extend.texi (scalar_extract_exp_to_vec,
16480 scalar_extract_sig_to_vec): Add documentation for new builtins.
16481 (scalar_insert_exp): Add new overloaded builtin definition.
16483 2023-06-20 Li Xu <xuli1@eswincomputing.com>
16485 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
16486 size of vector mask mode to one rvv register.
16488 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16490 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
16492 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
16494 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
16497 2023-06-20 Richard Biener <rguenther@suse.de>
16499 * tree-ssa-dse.cc (dse_classify_store): When we found
16500 no defs and the basic-block with the original definition
16501 ends in __builtin_unreachable[_trap] the store is dead.
16503 2023-06-20 Richard Biener <rguenther@suse.de>
16505 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
16506 keep the virtual SSA form up-to-date.
16508 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16510 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
16511 New define_insn_and_split.
16513 2023-06-20 Tamar Christina <tamar.christina@arm.com>
16515 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
16517 2023-06-20 Jan Beulich <jbeulich@suse.com>
16519 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
16520 constraint. Add new AVX512F alternative.
16522 2023-06-20 Richard Biener <rguenther@suse.de>
16525 * dwarf2out.cc (process_scope_var): Continue processing
16526 the decl after setting a parent in case the existing DIE
16529 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
16531 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
16532 (riscv_arg_has_vector): Simplify.
16533 (riscv_pass_in_vector_p): Adjust warning message.
16535 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
16537 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
16538 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
16539 * config/riscv/riscv.md (riscv_frcsr): New patterns.
16540 (riscv_fscsr): Likewise.
16542 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
16544 PR rtl-optimization/110305
16545 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
16546 Handle HONOR_SNANS for x + 0.0.
16548 2023-06-19 Jan Hubicka <jh@suse.cz>
16550 PR tree-optimization/109811
16551 PR tree-optimization/109849
16552 * passes.def: Add phiprop to early optimization passes.
16553 * tree-ssa-phiprop.cc: Allow clonning.
16555 2023-06-19 Tamar Christina <tamar.christina@arm.com>
16557 * config/aarch64/aarch64.md (arches): Add nosimd.
16558 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
16561 2023-06-19 Tamar Christina <tamar.christina@arm.com>
16562 Omar Tahir <Omar.Tahir2@arm.com>
16564 * gensupport.cc (class conlist, add_constraints, add_attributes,
16565 skip_spaces, expect_char, preprocess_compact_syntax,
16566 parse_section_layout, parse_section, convert_syntax): New.
16567 (process_rtx): Check for conversion.
16568 * genoutput.cc (process_template): Check for unresolved iterators.
16569 (class data): Add compact_syntax_p.
16570 (gen_insn): Use it.
16571 * gensupport.h (compact_syntax): New.
16572 (hash-set.h): Include.
16573 * doc/md.texi: Document it.
16575 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
16577 * recog.h (check_asm_operands): Change return type from int to bool.
16578 (insn_invalid_p): Ditto.
16579 (verify_changes): Ditto.
16580 (apply_change_group): Ditto.
16581 (constrain_operands): Ditto.
16582 (constrain_operands_cached): Ditto.
16583 (validate_replace_rtx_subexp): Ditto.
16584 (validate_replace_rtx): Ditto.
16585 (validate_replace_rtx_part): Ditto.
16586 (validate_replace_rtx_part_nosimplify): Ditto.
16587 (added_clobbers_hard_reg_p): Ditto.
16588 (peep2_regno_dead_p): Ditto.
16589 (peep2_reg_dead_p): Ditto.
16590 (store_data_bypass_p): Ditto.
16591 (if_test_bypass_p): Ditto.
16592 * rtl.h (split_all_insns_noflow): Change
16593 return type from unsigned int to void.
16594 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
16595 of generated added_clobbers_hard_reg_p from int to bool and adjust
16596 function body accordingly. Change "used" variable type from
16598 * recog.cc (check_asm_operands): Change return type
16599 from int to bool and adjust function body accordingly.
16600 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
16601 (verify_changes): Change return type from int to bool.
16602 (apply_change_group): Change return type from int to bool
16603 and adjust function body accordingly.
16604 (validate_replace_rtx_subexp): Change return type from int to bool.
16605 (validate_replace_rtx): Ditto.
16606 (validate_replace_rtx_part): Ditto.
16607 (validate_replace_rtx_part_nosimplify): Ditto.
16608 (constrain_operands_cached): Ditto.
16609 (constrain_operands): Ditto. Change "lose" and "win"
16610 variables type from int to bool.
16611 (split_all_insns_noflow): Change return type from unsigned int
16612 to void and adjust function body accordingly.
16613 (peep2_regno_dead_p): Change return type from int to bool.
16614 (peep2_reg_dead_p): Ditto.
16615 (peep2_find_free_register): Change "success"
16616 variable type from int to bool
16617 (store_data_bypass_p_1): Change return type from int to bool.
16618 (store_data_bypass_p): Ditto.
16620 2023-06-19 Li Xu <xuli1@eswincomputing.com>
16622 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
16625 2023-06-19 Pan Li <pan2.li@intel.com>
16628 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
16630 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
16631 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
16632 VF_ZVE63 and VF_ZVE32.
16633 * config/riscv/vector.md
16634 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
16635 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
16636 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
16637 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
16638 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
16639 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
16640 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
16641 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
16642 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
16643 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
16645 2023-06-19 Pan Li <pan2.li@intel.com>
16648 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
16650 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
16651 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
16652 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
16653 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
16654 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
16655 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
16656 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
16657 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
16658 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
16659 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
16660 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
16661 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
16662 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
16663 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
16665 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
16667 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
16668 (gcn_init_libfuncs): Add div and mod functions for all modes.
16669 Add placeholders for divmod functions.
16670 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
16672 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
16674 * tree-vect-generic.cc: Include optabs-libfuncs.h.
16675 (get_compute_type): Check optab_libfunc.
16676 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
16677 (vectorizable_operation): Check optab_libfunc.
16679 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
16681 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
16682 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
16683 (V_MOV, V_MOV_ALT): Likewise.
16684 (scalar_mode, SCALAR_MODE): Add TImode.
16685 (vnsi, VnSI, vndi, VnDI): Likewise.
16686 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
16687 (mov<mode>, mov<mode>_unspec): Use V_MOV.
16688 (*mov<mode>_4reg): New insn.
16689 (mov<mode>_exec): New 4reg variant.
16690 (mov<mode>_sgprbase): Likewise.
16691 (reload_in<mode>, reload_out<mode>): Use V_MOV.
16692 (vec_set<mode>): Likewise.
16693 (vec_duplicate<mode><exec>): New 4reg variant.
16694 (vec_extract<mode><scalar_mode>): Likewise.
16695 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
16696 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
16697 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
16698 (fold_extract_last_<mode>): Use V_MOV.
16699 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
16700 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
16701 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
16702 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
16703 gather<mode>_insn_2offsets<exec>): Use V_MOV.
16704 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
16705 scatter<mode>_insn_1offset<exec_scatter>,
16706 scatter<mode>_insn_1offset_ds<exec_scatter>,
16707 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
16708 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
16709 mask_scatter_store<mode><vnsi>): Likewise.
16710 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
16711 (gcn_hard_regno_mode_ok): Likewise.
16712 (GEN_VNM): Add TImode support.
16713 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
16714 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
16715 V8TImode, and V2TImode.
16716 (print_operand): Add 'J' and 'K' print codes.
16718 2023-06-19 Richard Biener <rguenther@suse.de>
16720 PR tree-optimization/110298
16721 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
16722 Clear number of iterations info before cleaning up the CFG.
16724 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16726 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
16727 Simplify vec_concat of lowpart subreg and high part vec_select.
16729 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
16731 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
16733 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
16735 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
16736 Handle null niters_skip.
16738 2023-06-19 Richard Biener <rguenther@suse.de>
16740 * config/aarch64/aarch64.cc
16741 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
16742 to LOOP_VINFO_MASKS.
16744 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
16747 * common/config/avr/avr-common.cc: Remove setting
16748 of OPT_fdelete_null_pointer_checks.
16749 * config/avr/avr.cc (avr_option_override): Clear
16750 flag_delete_null_pointer_checks if zero_address_valid.
16751 (avr_addr_space_zero_address_valid): New function.
16752 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
16755 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16756 Robin Dapp <rdapp.gcc@gmail.com>
16758 * doc/md.texi: Add len_mask{load,store}.
16759 * genopinit.cc (main): Ditto.
16761 * internal-fn.cc (len_maskload_direct): Ditto.
16762 (len_maskstore_direct): Ditto.
16763 (expand_call_mem_ref): Ditto.
16764 (expand_partial_load_optab_fn): Ditto.
16765 (expand_len_maskload_optab_fn): Ditto.
16766 (expand_partial_store_optab_fn): Ditto.
16767 (expand_len_maskstore_optab_fn): Ditto.
16768 (direct_len_maskload_optab_supported_p): Ditto.
16769 (direct_len_maskstore_optab_supported_p): Ditto.
16770 * internal-fn.def (LEN_MASK_LOAD): Ditto.
16771 (LEN_MASK_STORE): Ditto.
16772 * optabs.def (OPTAB_CD): Ditto.
16774 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
16776 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
16778 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
16780 * config/riscv/autovec.md (<optab><mode>3): Implement binop
16782 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
16783 (enum vxrm_field_enum): Rename this...
16784 (enum fixed_point_rounding_mode): ...to this.
16785 (enum frm_field_enum): Rename this...
16786 (enum floating_point_rounding_mode): ...to this.
16787 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
16788 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
16790 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
16791 (riscv_excess_precision): Do not convert to float for ZVFH.
16792 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
16794 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
16796 * config/riscv/vector-iterators.md: Add VI_QH iterator.
16797 * config/riscv/autovec-opt.md
16798 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
16799 that includes sign extension.
16800 (@pred_extract_first_sextsi<mode>): Dito for SImode.
16802 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
16804 * config/riscv/autovec.md (vec_set<mode>): Implement.
16805 (vec_extract<mode><vel>): Implement.
16806 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
16807 (emit_vlmax_slide_insn): Declare.
16808 (emit_nonvlmax_slide_tu_insn): Declare.
16809 (emit_scalar_move_insn): Export.
16810 (emit_nonvlmax_integer_move_insn): Export.
16811 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
16812 (emit_nonvlmax_slide_tu_insn): New function.
16813 (emit_vlmax_masked_mu_insn): No change.
16814 (emit_vlmax_integer_move_insn): Export.
16816 2023-06-19 Richard Biener <rguenther@suse.de>
16818 * tree-vectorizer.h (enum vect_partial_vector_style): New.
16819 (_loop_vec_info::partial_vector_style): Likewise.
16820 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
16821 (rgroup_controls::compare_type): Add.
16822 (vec_loop_masks): Change from a typedef to auto_vec<>
16824 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
16825 Adjust. Convert niters_skip to compare_type.
16826 (vect_set_loop_condition_partial_vectors_avx512): New function
16827 implementing the AVX512 partial vector codegen.
16828 (vect_set_loop_condition): Dispatch to the correct
16829 vect_set_loop_condition_partial_vectors_* function based on
16830 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
16831 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
16832 in the original niter type.
16833 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
16834 partial_vector_style.
16835 (can_produce_all_loop_masks_p): Adjust.
16836 (vect_verify_full_masking): Produce the rgroup_controls vector
16837 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
16838 (vect_verify_full_masking_avx512): New function implementing
16839 verification of AVX512 style masking.
16840 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
16841 (vect_analyze_loop_2): Also try AVX512 style masking.
16843 (vect_estimate_min_profitable_iters): Implement AVX512 style
16844 mask producing cost.
16845 (vect_record_loop_mask): Do not build the rgroup_controls
16846 vector here but record masks in a hash-set.
16847 (vect_get_loop_mask): Implement AVX512 style mask query,
16848 complementing the existing while_ult style.
16850 2023-06-19 Richard Biener <rguenther@suse.de>
16852 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
16854 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
16855 (vectorize_fold_left_reduction): Adjust.
16856 (vect_transform_reduction): Likewise.
16857 (vectorizable_live_operation): Likewise.
16858 * tree-vect-stmts.cc (vectorizable_call): Likewise.
16859 (vectorizable_operation): Likewise.
16860 (vectorizable_store): Likewise.
16861 (vectorizable_load): Likewise.
16862 (vectorizable_condition): Likewise.
16864 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
16867 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
16868 Add Optimization option property.
16870 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16872 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
16873 Add new pattern for the abovementioned case.
16875 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16877 * config/xtensa/xtensa.cc
16878 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
16880 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
16882 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
16884 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
16886 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
16888 2023-06-19 liuhongt <hongtao.liu@intel.com>
16891 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
16893 (sse2_packsswb<mask_name>): .. this, ..
16894 (avx2_packsswb<mask_name>): .. this and ..
16895 (avx512bw_packsswb<mask_name>): .. this.
16896 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
16897 (sse2_packssdw<mask_name>): .. this, ..
16898 (avx2_packssdw<mask_name>): .. this and ..
16899 (avx512bw_packssdw<mask_name>): .. this.
16901 2023-06-19 liuhongt <hongtao.liu@intel.com>
16904 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
16905 UNSPEC_US_TRUNCATE instead of original us_truncate for
16907 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
16909 (mmx_packsswb): .. this and ..
16910 (mmx_packuswb): .. this.
16911 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
16913 (s_trunsuffix): Removed code iterator.
16914 (any_s_truncate): Ditto.
16915 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
16916 UNSPEC_US_TRUNCATE instead of original us_truncate.
16917 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
16918 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
16920 2023-06-18 Pan Li <pan2.li@intel.com>
16922 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
16924 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
16926 * rtl.h (*rtx_equal_p_callback_function):
16927 Change return type from int to bool.
16928 (rtx_equal_p): Ditto.
16929 (*hash_rtx_callback_function): Ditto.
16930 * rtl.cc (rtx_equal_p): Change return type from int to bool
16931 and adjust function body accordingly.
16932 * early-remat.cc (scratch_equal): Ditto.
16933 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
16934 (hash_with_unspec_callback): Ditto.
16936 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
16938 * config/arc/arc.md (movqi_insn): Allow certain constants to
16939 be stored into memory in the pattern's condition.
16940 (movsf_insn): Similarly.
16942 2023-06-18 Honza <jh@ryzen3.suse.cz>
16944 PR tree-optimization/109849
16945 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
16946 ES; handle ipa_predicate::not_sra_candidate.
16947 (evaluate_properties_for_edge): Pass es to
16948 evaluate_conditions_for_known_args.
16949 (ipa_fn_summary_t::duplicate): Handle sra candidates.
16950 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
16951 (load_or_store_of_ptr_parameter): New function.
16952 (points_to_possible_sra_candidate_p): New function.
16953 (analyze_function_body): Initialize points_to_possible_sra_candidate;
16954 determine sra predicates.
16955 (estimate_ipcp_clone_size_and_time): Update call of
16956 evaluate_conditions_for_known_args.
16957 (remap_edge_params): Update points_to_possible_sra_candidate.
16958 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
16959 (write_ipa_call_summary): Likewise.
16960 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
16961 (dump_condition): Dump it.
16962 * ipa-predicate.h (struct inline_param_summary): Add
16963 points_to_possible_sra_candidate.
16965 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
16967 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
16968 function for setting the carry flag.
16969 (ix86_expand_builtin) <handlecarry>: Use it here.
16970 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
16971 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
16972 (usubc<mode>5): Likewise.
16974 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
16976 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
16977 for the immediate constant shift count.
16978 (*concat<mode><dwi>3_2): Likewise.
16979 (*concat<mode><dwi>3_3): Likewise.
16980 (*concat<mode><dwi>3_4): Likewise.
16981 (*concat<mode><dwi>3_5): Likewise.
16982 (*concat<mode><dwi>3_6): Likewise.
16984 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
16986 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
16987 (hash_rtx): Remove.
16988 * early-remat.cc (remat_candidate_hasher::equal): Update
16989 to call rtx_equal_p with rtx_equal_p_callback_function argument.
16990 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
16991 (rtx_equal_p): Remove.
16992 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
16993 argument with NULL default value.
16994 (rtx_equal_p_cb): Remove function declaration.
16995 (hash_rtx_cb): Ditto.
16996 (hash_rtx): Add hash_rtx_callback_function argument
16997 with NULL default value.
16998 * sel-sched-ir.cc (free_nop_pool): Update function comment.
16999 (skip_unspecs_callback): Ditto.
17000 (vinsn_init): Update to call hash_rtx with
17001 hash_rtx_callback_function argument.
17002 (vinsn_equal_p): Ditto.
17004 2023-06-18 yulong <shiyulong@iscas.ac.cn>
17006 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
17007 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
17008 (ADJUST_ALIGNMENT): Ditto.
17009 (RVV_TUPLE_PARTIAL_MODES): Ditto.
17010 (ADJUST_NUNITS): Ditto.
17011 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
17013 (vfloat16mf4x3_t): Ditto.
17014 (vfloat16mf4x4_t): Ditto.
17015 (vfloat16mf4x5_t): Ditto.
17016 (vfloat16mf4x6_t): Ditto.
17017 (vfloat16mf4x7_t): Ditto.
17018 (vfloat16mf4x8_t): Ditto.
17019 (vfloat16mf2x2_t): Ditto.
17020 (vfloat16mf2x3_t): Ditto.
17021 (vfloat16mf2x4_t): Ditto.
17022 (vfloat16mf2x5_t): Ditto.
17023 (vfloat16mf2x6_t): Ditto.
17024 (vfloat16mf2x7_t): Ditto.
17025 (vfloat16mf2x8_t): Ditto.
17026 (vfloat16m1x2_t): Ditto.
17027 (vfloat16m1x3_t): Ditto.
17028 (vfloat16m1x4_t): Ditto.
17029 (vfloat16m1x5_t): Ditto.
17030 (vfloat16m1x6_t): Ditto.
17031 (vfloat16m1x7_t): Ditto.
17032 (vfloat16m1x8_t): Ditto.
17033 (vfloat16m2x2_t): Ditto.
17034 (vfloat16m2x3_t): Ditto.
17035 (vfloat16m2x4_t): Ditto.
17036 (vfloat16m4x2_t): Ditto.
17037 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
17038 (vfloat16mf4x3_t): Ditto.
17039 (vfloat16mf4x4_t): Ditto.
17040 (vfloat16mf4x5_t): Ditto.
17041 (vfloat16mf4x6_t): Ditto.
17042 (vfloat16mf4x7_t): Ditto.
17043 (vfloat16mf4x8_t): Ditto.
17044 (vfloat16mf2x2_t): Ditto.
17045 (vfloat16mf2x3_t): Ditto.
17046 (vfloat16mf2x4_t): Ditto.
17047 (vfloat16mf2x5_t): Ditto.
17048 (vfloat16mf2x6_t): Ditto.
17049 (vfloat16mf2x7_t): Ditto.
17050 (vfloat16mf2x8_t): Ditto.
17051 (vfloat16m1x2_t): Ditto.
17052 (vfloat16m1x3_t): Ditto.
17053 (vfloat16m1x4_t): Ditto.
17054 (vfloat16m1x5_t): Ditto.
17055 (vfloat16m1x6_t): Ditto.
17056 (vfloat16m1x7_t): Ditto.
17057 (vfloat16m1x8_t): Ditto.
17058 (vfloat16m2x2_t): Ditto.
17059 (vfloat16m2x3_t): Ditto.
17060 (vfloat16m2x4_t): Ditto.
17061 (vfloat16m4x2_t): Ditto.
17062 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
17063 * config/riscv/riscv.md: New.
17064 * config/riscv/vector-iterators.md: New.
17066 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
17068 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
17069 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
17070 Generalize special case for converting TImode to V1TImode to handle
17071 all 128-bit vector conversions.
17073 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
17075 * gcc-ar.cc (main): Refactor to slightly reduce code
17076 duplication. Avoid unnecessary elements in nargv.
17078 2023-06-16 Pan Li <pan2.li@intel.com>
17081 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
17082 integer reduction expand.
17083 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
17084 and the LMUL1 attr respectively.
17085 * config/riscv/vector.md
17086 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17087 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
17088 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
17089 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
17090 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
17091 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
17092 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
17094 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17097 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
17099 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17101 PR middle-end/79173
17102 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
17103 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
17104 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
17106 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
17107 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
17108 * builtins.cc (fold_builtin_addc_subc): New function.
17109 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
17110 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
17112 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17114 PR tree-optimization/110271
17115 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
17116 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
17117 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
17119 2023-06-16 Martin Jambor <mjambor@suse.cz>
17121 * configure: Regenerate.
17123 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
17124 Uros Bizjak <ubizjak@gmail.com>
17127 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
17128 define_insn_and_split combine *add<dwi>3_doubleword with
17129 a *concat<mode><dwi>3 for more efficient lowering after reload.
17131 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
17133 * ira-lives.cc: Include except.h.
17134 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
17135 when the pseudo does not live at the exception landing pad.
17137 2023-06-16 Alex Coplan <alex.coplan@arm.com>
17139 * doc/invoke.texi: Document -Welaborated-enum-base.
17141 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17143 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
17144 (ushrn2_n): ... This.
17145 (sqshrn2_n): Rename builtins to...
17146 (ssqshrn2_n): ... This.
17147 (uqshrn2_n): Rename builtins to...
17148 (uqushrn2_n): ... This.
17149 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
17150 (vqshrn_high_n_s32): Likewise.
17151 (vqshrn_high_n_s64): Likewise.
17152 (vqshrn_high_n_u16): Likewise.
17153 (vqshrn_high_n_u32): Likewise.
17154 (vqshrn_high_n_u64): Likewise.
17155 (vshrn_high_n_s16): Likewise.
17156 (vshrn_high_n_s32): Likewise.
17157 (vshrn_high_n_s64): Likewise.
17158 (vshrn_high_n_u16): Likewise.
17159 (vshrn_high_n_u32): Likewise.
17160 (vshrn_high_n_u64): Likewise.
17161 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
17163 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
17164 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17165 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
17166 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
17167 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17168 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
17169 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
17170 Update expander for the above.
17172 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17174 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
17175 (shrn2_n): ... This.
17176 (rshrn2): Rename builtins to...
17177 (rshrn2_n): ... This.
17178 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
17179 (vrshrn_high_n_s32): Likewise.
17180 (vrshrn_high_n_s64): Likewise.
17181 (vrshrn_high_n_u16): Likewise.
17182 (vrshrn_high_n_u32): Likewise.
17183 (vrshrn_high_n_u64): Likewise.
17184 (vshrn_high_n_s16): Likewise.
17185 (vshrn_high_n_s32): Likewise.
17186 (vshrn_high_n_s64): Likewise.
17187 (vshrn_high_n_u16): Likewise.
17188 (vshrn_high_n_u32): Likewise.
17189 (vshrn_high_n_u64): Likewise.
17190 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
17192 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
17193 (aarch64_shrn2<mode>_insn_le): Likewise.
17194 (aarch64_shrn2<mode>_insn_be): Likewise.
17195 (aarch64_shrn2<mode>): Likewise.
17196 (aarch64_rshrn2<mode>_insn_le): Likewise.
17197 (aarch64_rshrn2<mode>_insn_be): Likewise.
17198 (aarch64_rshrn2<mode>): Likewise.
17199 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
17200 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
17201 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
17202 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
17203 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
17204 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
17205 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
17206 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
17207 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
17208 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
17209 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
17210 (aarch64_sqshrun2_n<mode>): New define_expand.
17211 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
17212 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
17213 (aarch64_sqrshrun2_n<mode>): New define_expand.
17214 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
17215 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
17216 Delete unspec values.
17217 (VQSHRN_N): Delete int iterator.
17219 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17221 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
17222 * config/aarch64/aarch64-simd.md
17223 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
17224 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
17225 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
17226 * config/aarch64/iterators.md (shrn_s): New code attribute.
17228 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17230 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
17232 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
17233 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
17234 (aarch64_sqrshrun_n<mode>_insn): Likewise.
17235 (aarch64_sqshrun_n<mode>_insn): Likewise.
17236 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
17237 (aarch64_sqshrun_n<mode>): Likewise.
17238 (aarch64_sqrshrun_n<mode>): Likewise.
17239 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
17241 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17243 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
17244 (shrn_n): ... This.
17245 (rshrn): Rename builtins to...
17246 (rshrn_n): ... This.
17247 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
17248 (vshrn_n_s32): Likewise.
17249 (vshrn_n_s64): Likewise.
17250 (vshrn_n_u16): Likewise.
17251 (vshrn_n_u32): Likewise.
17252 (vshrn_n_u64): Likewise.
17253 (vrshrn_n_s16): Likewise.
17254 (vrshrn_n_s32): Likewise.
17255 (vrshrn_n_s64): Likewise.
17256 (vrshrn_n_u16): Likewise.
17257 (vrshrn_n_u32): Likewise.
17258 (vrshrn_n_u64): Likewise.
17259 * config/aarch64/aarch64-simd.md
17260 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
17261 (aarch64_shrn<mode>): Likewise.
17262 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
17263 (aarch64_rshrn<mode>): Likewise.
17264 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
17265 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
17266 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
17267 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
17268 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
17269 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
17270 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
17271 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
17272 (aarch64_sqshrun_n<mode>): Likewise.
17273 (aarch64_sqrshrun_n<mode>): Likewise.
17274 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
17275 (TRUNCEXTEND): New code attribute.
17276 (TRUNC_SHIFT): Likewise.
17277 (shrn_op): Likewise.
17278 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
17281 2023-06-16 Pan Li <pan2.li@intel.com>
17283 * config/riscv/riscv-vsetvl.cc
17284 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
17286 2023-06-16 Richard Biener <rguenther@suse.de>
17288 PR tree-optimization/110278
17289 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
17290 (x != (typeof x)(x == 0) -> true): Likewise.
17292 2023-06-16 Pali Rohár <pali@kernel.org>
17294 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
17295 (REAL_LIBGCC_SPEC): New define.
17296 * config/i386/mingw.opt: Add mcrtdll=
17297 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
17298 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
17299 (STARTFILE_SPEC): Adjust for -mcrtdll=.
17300 * doc/invoke.texi: Add mcrtdll= documentation.
17302 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
17304 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
17305 (mips_handle_code_readable_attr):New static function.
17306 (mips_get_code_readable_attr):New static enum function.
17307 (mips_set_current_function):Set the code_readable mode.
17308 (mips_option_override):Same as above.
17309 * doc/extend.texi:Document code_readable.
17311 2023-06-16 Richard Biener <rguenther@suse.de>
17313 PR tree-optimization/110269
17314 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
17315 with tree_expr_nonzero_p ...
17316 * match.pd (cmp (convert? addr@0) integer_zerop): With this
17319 2023-06-15 Marek Polacek <polacek@redhat.com>
17321 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
17322 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
17323 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
17324 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
17325 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
17327 * configure: Regenerate.
17328 * doc/install.texi: Document --enable-host-pie.
17330 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
17332 * regcprop.cc (maybe_mode_change): Enable stack pointer
17335 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
17337 PR tree-optimization/110266
17338 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
17340 (adjust_realpart_expr): Ditto.
17342 2023-06-15 Jan Beulich <jbeulich@suse.com>
17344 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
17347 2023-06-15 Jan Beulich <jbeulich@suse.com>
17349 * config/i386/constraints.md: Mention k and r for B.
17351 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
17352 Andrew Pinski <apinski@marvell.com>
17355 * config/loongarch/loongarch.md: Modify the register constraints for template
17356 "jumptable" and "indirect_jump" from "r" to "e".
17358 2023-06-15 Xi Ruoyao <xry111@xry111.site>
17360 * config/loongarch/loongarch-tune.h (loongarch_align): New
17362 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
17364 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
17366 * config/loongarch/loongarch.cc
17367 (loongarch_option_override_internal): Set the value of
17368 -falign-functions= if -falign-functions is enabled but no value
17369 is given. Likewise for -falign-labels=.
17371 2023-06-15 Jakub Jelinek <jakub@redhat.com>
17373 PR middle-end/79173
17374 * internal-fn.def (UADDC, USUBC): New internal functions.
17375 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
17376 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
17377 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
17378 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
17379 match_uaddc_usubc): New functions.
17380 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
17381 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
17382 other optimizations have been successful for those.
17383 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
17384 * fold-const-call.cc (fold_const_call): Likewise.
17385 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
17386 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
17387 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
17389 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
17390 define_expand patterns.
17391 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
17392 into NOTE_INSN_DELETED note rather than nop instruction.
17393 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
17396 2023-06-15 Jakub Jelinek <jakub@redhat.com>
17398 PR middle-end/79173
17399 * config/i386/i386.md (subborrow<mode>): Add alternative with
17400 memory destination and add for it define_peephole2
17401 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
17402 destination in these patterns.
17404 2023-06-15 Jakub Jelinek <jakub@redhat.com>
17406 PR middle-end/79173
17407 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
17408 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
17409 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
17410 using memory destination in these patterns.
17412 2023-06-15 Jakub Jelinek <jakub@redhat.com>
17414 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
17415 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
17416 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
17417 * fold-const-call.cc (fold_const_call): ... here.
17419 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
17421 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
17422 Rename to <su>abd<mode>3.
17423 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
17426 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
17428 * doc/md.texi (sabd, uabd): Document them.
17429 * internal-fn.def (ABD): Use new optab.
17430 * optabs.def (sabd_optab, uabd_optab): New optabs,
17431 * tree-vect-patterns.cc (vect_recog_absolute_difference):
17432 Recognize the following idiom abs (a - b).
17433 (vect_recog_sad_pattern): Refactor to use
17434 vect_recog_absolute_difference.
17435 (vect_recog_abd_pattern): Use patterns found by
17436 vect_recog_absolute_difference to build a new ABD
17439 2023-06-15 chenxiaolong <chenxl04200420@163.com>
17441 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
17442 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
17444 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17446 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
17447 (expand_vec_perm_const_1): Add merge optmization.
17449 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
17452 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
17453 (riscv_pass_by_reference): Return true for vector mode
17455 2023-06-15 Pan Li <pan2.li@intel.com>
17457 * config/riscv/autovec-opt.md: Align the predictor sytle.
17458 * config/riscv/autovec.md: Ditto.
17460 2023-06-15 Pan Li <pan2.li@intel.com>
17462 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
17463 Take elen instead of scalar BITS_PER_WORD.
17464 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
17465 instead of scaler BITS_PER_WORD.
17467 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17469 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
17471 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17473 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
17474 Fix signed comparison warning in loop from npats to enelts.
17476 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
17478 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
17479 to offloading compilation.
17480 * config/gcn/mkoffload.cc (main): Adjust.
17481 * config/nvptx/mkoffload.cc (main): Likewise.
17482 * doc/invoke.texi (foffload-options): Update example.
17484 2023-06-14 liuhongt <hongtao.liu@intel.com>
17487 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
17488 for alternative 2 since there's no evex version for vpcmpeqd
17491 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
17493 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
17495 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
17497 * config/sh/divtab.cc: Remove.
17499 2023-06-13 Jakub Jelinek <jakub@redhat.com>
17501 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
17502 superfluous spaces around \t for vpcmpeqd.
17504 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
17506 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
17507 clearing vectors with only a single element. Set CLEARED if the
17508 vector was initialized to zero.
17510 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
17512 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
17515 (TUPLE_ENTRY): Undef.
17517 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17519 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
17520 (shuffle_generic_patterns): Ditto.
17521 (expand_vec_perm_const_1): Ditto.
17523 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17525 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
17526 (shuffle_decompress_patterns): Ditto.
17528 2023-06-13 Richard Biener <rguenther@suse.de>
17530 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
17532 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
17533 Kito Cheng <kito.cheng@sifive.com>
17535 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
17536 warning flag if func is not builtin
17537 * config/riscv/riscv.cc
17538 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
17539 (riscv_arg_has_vector): Determine whether the arg is vector type.
17540 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
17541 (riscv_init_cumulative_args): The same as header.
17542 (riscv_get_arg_info): Add the checking.
17543 (riscv_function_value): Check the func return and set warning flag
17544 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
17545 determine whether warning psabi or not.
17547 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17549 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
17550 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
17551 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
17552 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
17554 (arm_output_load_tpidr): Define.
17555 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
17556 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
17558 (reload_tp_hard): Likewise.
17559 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
17561 * doc/invoke.texi (Arm Options, mtp): Document new values.
17563 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17566 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
17567 AARCH64_TPIDRRO_EL0 value.
17568 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
17569 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
17570 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
17571 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
17573 2023-06-13 Alexandre Oliva <oliva@adacore.com>
17575 * range-op-float.cc (frange_nextafter): Drop inline.
17576 (frelop_early_resolve): Add static.
17577 (frange_float): Likewise.
17579 2023-06-13 Richard Biener <rguenther@suse.de>
17581 PR middle-end/110232
17582 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
17583 to check whether the buffer covers the whole vector.
17585 2023-06-13 Richard Biener <rguenther@suse.de>
17587 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
17588 .MASK_LOAD and friends set the size of the access to unknown.
17590 2023-06-13 Tejas Belagod <tbelagod@arm.com>
17593 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
17594 calls that have a constant input predicate vector.
17595 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
17596 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
17597 (svlast_impl::vect_all_same): Check if all vector elements are equal.
17599 2023-06-13 Andi Kleen <ak@linux.intel.com>
17601 * config/i386/gcc-auto-profile: Regenerate.
17603 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17605 * config/riscv/vector-iterators.md: Fix requirement.
17607 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17609 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
17610 (shuffle_decompress_patterns): New function.
17611 (expand_vec_perm_const_1): Add decompress optimization.
17613 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
17615 PR rtl-optimization/101188
17616 * postreload.cc (reload_cse_move2add_invalidate): New function,
17618 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
17620 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17622 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
17623 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
17624 and if maxv == 1, use constant element for duplicating into register.
17626 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
17628 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
17629 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
17630 (gimplify_adjust_omp_clauses): Change
17631 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
17632 GOMP_MAP_FORCE_PRESENT.
17633 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
17634 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
17635 to/from clauses with present modifier.
17637 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17639 PR tree-optimization/110205
17640 * range-op-float.cc (range_operator::fold_range): Add default FII
17642 * range-op-mixed.h (class operator_gt): Add missing final overrides.
17643 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
17644 (operator_lshift ::update_bitmask): Add final override.
17645 (operator_rshift ::update_bitmask): Add final override.
17646 * range-op.h (range_operator::fold_range): Add FII prototype.
17648 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17650 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
17651 Use range_op_handler directly.
17652 * range-op.cc (range_op_handler::range_op_handler): Unsigned
17653 param instead of tree-code.
17654 (ptr_op_widen_plus_signed): Delete.
17655 (ptr_op_widen_plus_unsigned): Delete.
17656 (ptr_op_widen_mult_signed): Delete.
17657 (ptr_op_widen_mult_unsigned): Delete.
17658 (range_op_table::initialize_integral_ops): Add new opcodes.
17659 * range-op.h (range_op_handler): Use unsigned.
17660 (OP_WIDEN_MULT_SIGNED): New.
17661 (OP_WIDEN_MULT_UNSIGNED): New.
17662 (OP_WIDEN_PLUS_SIGNED): New.
17663 (OP_WIDEN_PLUS_UNSIGNED): New.
17664 (RANGE_OP_TABLE_SIZE): New.
17665 (range_op_table::operator []): Use unsigned.
17666 (range_op_table::set): Use unsigned.
17667 (m_range_tree): Make unsigned.
17668 (ptr_op_widen_mult_signed): Remove.
17669 (ptr_op_widen_mult_unsigned): Remove.
17670 (ptr_op_widen_plus_signed): Remove.
17671 (ptr_op_widen_plus_unsigned): Remove.
17673 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17675 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
17676 manually as there is no access to the default operator.
17677 (cfn_copysign::fold_range): Don't check for validity.
17678 (cfn_ubsan::fold_range): Ditto.
17679 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
17680 * range-op.cc (default_operator): New.
17681 (range_op_handler::range_op_handler): Use default_operator
17683 (range_op_handler::operator bool): Move from header, compare
17684 against default operator.
17685 (range_op_handler::range_op): New.
17686 * range-op.h (range_op_handler::operator bool): Move.
17688 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17690 * range-op.cc (unified_table): Delete.
17691 (range_op_table operator_table): Instantiate.
17692 (range_op_table::range_op_table): Rename from unified_table.
17693 (range_op_handler::range_op_handler): Use range_op_table.
17694 * range-op.h (range_op_table::operator []): Inline.
17695 (range_op_table::set): Inline.
17697 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17699 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
17701 * gimple-range-op.cc (get_code): Rename from get_code_and_type
17703 (gimple_range_op_handler::supported_p): No need for type.
17704 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
17705 (cfn_copysign::fold_range): Ditto.
17706 (cfn_ubsan::fold_range): Ditto.
17707 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
17708 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
17709 * range-op-float.cc (operator_plus::op1_range): Ditto.
17710 (operator_mult::op1_range): Ditto.
17711 (range_op_float_tests): Ditto.
17712 * range-op.cc (get_op_handler): Remove.
17713 (range_op_handler::set_op_handler): Remove.
17714 (operator_plus::op1_range): No need for type.
17715 (operator_minus::op1_range): Ditto.
17716 (operator_mult::op1_range): Ditto.
17717 (operator_exact_divide::op1_range): Ditto.
17718 (operator_cast::op1_range): Ditto.
17719 (perator_bitwise_not::fold_range): Ditto.
17720 (operator_negate::fold_range): Ditto.
17721 * range-op.h (range_op_handler::range_op_handler): Remove type param.
17722 (range_cast): No need for type.
17723 (range_op_table::operator[]): Check for enum_code >= 0.
17724 * tree-data-ref.cc (compute_distributive_range): No need for type.
17725 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
17726 * value-query.cc (range_query::get_tree_range): Ditto.
17727 * value-relation.cc (relation_oracle::validate_relation): Ditto.
17728 * vr-values.cc (range_of_var_in_loop): Ditto.
17729 (simplify_using_ranges::fold_cond_with_ops): Ditto.
17731 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17733 * range-op-mixed.h (operator_max): Remove final.
17734 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
17735 (pointer_table::pointer_table): Remove.
17736 (class hybrid_max_operator): New.
17737 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
17738 * range-op.cc (pointer_tree_table): Remove.
17739 (unified_table::unified_table): Comment out MAX_EXPR.
17740 (get_op_handler): Remove check of pointer table.
17741 * range-op.h (class pointer_table): Remove.
17743 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17745 * range-op-mixed.h (operator_min): Remove final.
17746 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
17747 (class hybrid_min_operator): New.
17748 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
17749 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
17751 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17753 * range-op-mixed.h (operator_bitwise_or): Remove final.
17754 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
17755 (class hybrid_or_operator): New.
17756 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
17757 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
17759 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17761 * range-op-mixed.h (operator_bitwise_and): Remove final.
17762 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
17763 (class hybrid_and_operator): New.
17764 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
17765 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
17767 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17769 * Makefile.in (OBJS): Add range-op-ptr.o.
17770 * range-op-mixed.h (update_known_bitmask): Move prototype here.
17771 (minus_op1_op2_relation_effect): Move prototype here.
17772 (wi_includes_zero_p): Move function to here.
17773 (wi_zero_p): Ditto.
17774 * range-op.cc (update_known_bitmask): Remove static.
17775 (wi_includes_zero_p): Move to header.
17776 (wi_zero_p): Move to header.
17777 (minus_op1_op2_relation_effect): Remove static.
17778 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
17779 (pointer_plus_operator): Ditto.
17780 (pointer_min_max_operator): Ditto.
17781 (pointer_and_operator): Ditto.
17782 (pointer_or_operator): Ditto.
17783 (pointer_table): Ditto.
17784 (range_op_table::initialize_pointer_ops): Ditto.
17785 * range-op-ptr.cc: New.
17787 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17789 * range-op-mixed.h (class operator_max): Move from...
17790 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
17791 (get_op_handler): Remove the integral table.
17792 (class operator_max): Move from here.
17793 (integral_table::integral_table): Delete.
17794 * range-op.h (class integral_table): Delete.
17796 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17798 * range-op-mixed.h (class operator_min): Move from...
17799 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
17800 (class operator_min): Move from here.
17801 (integral_table::integral_table): Remove MIN_EXPR.
17803 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17805 * range-op-mixed.h (class operator_bitwise_or): Move from...
17806 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
17807 (class operator_bitwise_or): Move from here.
17808 (integral_table::integral_table): Remove BIT_IOR_EXPR.
17810 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17812 * range-op-mixed.h (class operator_bitwise_and): Move from...
17813 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
17814 (get_op_handler): Check for a pointer table entry first.
17815 (class operator_bitwise_and): Move from here.
17816 (integral_table::integral_table): Remove BIT_AND_EXPR.
17818 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17820 * range-op-mixed.h (class operator_bitwise_xor): Move from...
17821 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
17822 (class operator_bitwise_xor): Move from here.
17823 (integral_table::integral_table): Remove BIT_XOR_EXPR.
17824 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
17826 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17828 * range-op-mixed.h (class operator_bitwise_not): Move from...
17829 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
17830 (class operator_bitwise_not): Move from here.
17831 (integral_table::integral_table): Remove BIT_NOT_EXPR.
17832 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
17834 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
17836 * range-op-mixed.h (class operator_addr_expr): Move from...
17837 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
17838 (class operator_addr_expr): Move from here.
17839 (integral_table::integral_table): Remove ADDR_EXPR.
17840 (pointer_table::pointer_table): Remove ADDR_EXPR.
17842 2023-06-12 Pan Li <pan2.li@intel.com>
17844 * config/riscv/riscv-vector-builtins-types.def
17845 (vfloat16m1_t): Add type to lmul1 ops.
17846 (vfloat16m2_t): Likewise.
17847 (vfloat16m4_t): Likewise.
17849 2023-06-12 Richard Biener <rguenther@suse.de>
17851 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
17852 .MASK_STORE and friend set the size of the access to
17855 2023-06-12 Tamar Christina <tamar.christina@arm.com>
17857 * config.in: Regenerate.
17858 * configure: Regenerate.
17859 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
17861 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17863 * config/riscv/autovec-opt.md
17864 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
17865 (*<any_shiftrt:optab>trunc<mode>): Ditto.
17866 * config/riscv/autovec.md (<optab><mode>3): Change to
17867 define_insn_and_split.
17868 (v<optab><mode>3): Ditto.
17869 (trunc<mode><v_double_trunc>2): Ditto.
17871 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17873 * simplify-rtx.cc (simplify_const_unary_operation):
17874 Handle US_TRUNCATE, SS_TRUNCATE.
17876 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
17879 * doc/gm2.texi (Standard procedures): Fix Next link.
17881 2023-06-12 Tamar Christina <tamar.christina@arm.com>
17883 * config.in: Regenerate.
17885 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
17887 PR middle-end/110142
17888 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
17889 subtype to vect_widened_op_tree and remove subtype parameter, also
17890 remove superfluous overloaded function definition.
17891 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
17892 to call to vect_recog_widen_op_pattern.
17893 (vect_recog_widen_minus_pattern): Likewise.
17895 2023-06-12 liuhongt <hongtao.liu@intel.com>
17897 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
17898 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
17899 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
17900 (vec_unpacks_lo_<mode>): Ditto.
17901 (vec_unpacks_hi_<mode>): Ditto.
17902 (sse_movlhps_<mode>): New define_insn.
17903 (ssse3_palignr<mode>_perm): Extend to V_128H.
17904 (V_128H): New mode iterator.
17905 (ssepackPHmode): New mode attribute.
17906 (vunpck_extract_mode): Ditto.
17907 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
17908 (vpckfloat_temp_mode): Ditto.
17909 (vpckfloat_op_mode): Ditto.
17910 (vunpckfixt_mode): Extend to VxHF.
17911 (vunpckfixt_model): Ditto.
17912 (vunpckfixt_extract_mode): Ditto.
17914 2023-06-12 Richard Biener <rguenther@suse.de>
17916 PR middle-end/110200
17917 * genmatch.cc (expr::gen_transform): Put braces around
17918 the if arm for the (convert ...) short-cut.
17920 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
17923 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
17924 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
17926 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
17929 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
17930 floating constant itself for real_to_target call.
17932 2023-06-12 Pan Li <pan2.li@intel.com>
17934 * config/riscv/riscv-vector-builtins-types.def
17935 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
17936 (vfloat16mf2_t): Ditto.
17937 (vfloat16m1_t): Ditto.
17938 (vfloat16m2_t): Ditto.
17939 (vfloat16m4_t): Ditto.
17941 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
17943 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
17944 Do not require a stack frame when debugging is enabled for AIX.
17946 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
17948 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
17949 Remove attribute values.
17950 (insv_notbit): New post-reload insn.
17951 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
17952 (*insv.not-bit.0_split, *insv.not-bit.7_split)
17953 (*insv.xor-extract_split): Split to insv_notbit.
17954 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
17955 (*insv.xor-extract): Remove post-reload insns.
17956 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
17957 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
17958 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
17959 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
17961 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
17964 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
17965 (MSB, SIZE): New mode attributes.
17966 (any_shift): New code iterator.
17967 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
17968 (*lshr<mode>3_const_split): Add constraint alternative for
17969 the case of shift-offset = MSB. Ditch "length" attribute.
17970 (extzv<mode): New. replaces extzv. Adjust following patterns.
17971 Use avr_out_extr, avr_out_extr_not to print asm.
17972 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
17973 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
17974 * config/avr/constraints.md (C15, C23, C31, Yil): New
17975 * config/avr/predicates.md (reg_or_low_io_operand)
17976 (const7_operand, reg_or_low_io_operand)
17977 (const15_operand, const_0_to_15_operand)
17978 (const23_operand, const_0_to_23_operand)
17979 (const31_operand, const_0_to_31_operand): New.
17980 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
17981 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
17982 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
17983 MSB case to new insn constraint "r" for operands[1].
17984 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
17985 Handle these cases.
17986 (avr_rtx_costs_1): Adjust cost for a new pattern.
17988 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17990 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
17991 (vector_insn_info::parse_insn): Add rtx_insn parse.
17992 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
17993 (get_first_vsetvl): New function.
17994 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
17995 (pass_vsetvl::cleanup_insns): Remove it.
17996 (pass_vsetvl::ssa_post_optimization): New function.
17997 (has_no_uses): Ditto.
17998 (pass_vsetvl::propagate_avl): Remove it.
17999 (pass_vsetvl::df_post_optimization): New function.
18000 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
18001 * config/riscv/riscv-vsetvl.h: Adapt declaration.
18003 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
18005 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
18006 (ipcp_vr_lattice::print): Call dump method.
18007 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
18009 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
18010 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
18012 (initialize_node_lattices): Pass type when appropriate.
18013 (ipa_vr_operation_and_type_effects): Make type agnostic.
18014 (ipa_value_range_from_jfunc): Same.
18015 (propagate_vr_across_jump_function): Same.
18016 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
18017 (evaluate_properties_for_edge): Same.
18018 * ipa-prop.cc (ipa_vr::get_vrange): Same.
18019 (ipcp_update_vr): Same.
18020 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
18021 (ipa_range_set_and_normalize): Same.
18023 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
18027 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
18028 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
18029 (avr_pass_data_ifelse): New pass_data for it.
18030 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
18031 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
18032 (avr_out_cmp_ext): New functions.
18033 (compare_condtition): Make sure REG_CC dies in the branch insn.
18034 (avr_rtx_costs_1): Add computation of cbranch costs.
18035 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
18036 [ADJUST_LEN_CMP_SEXT]Handle them.
18037 (TARGET_CANONICALIZE_COMPARISON): New define.
18038 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
18039 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
18040 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
18041 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
18042 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
18043 (avr_out_cmp_zext): New Protos
18044 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
18045 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
18046 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
18047 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
18048 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
18049 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
18050 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
18051 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
18052 (adjust_len) [add_set_ZN, cmp_zext]: New.
18053 (QIPSI): New mode iterator.
18054 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
18055 (gelt): New code iterator.
18056 (gelt_eqne): New code attribute.
18057 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
18058 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
18059 (*cmpqi_sign_extend): Remove insns.
18060 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
18061 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
18062 * config/avr/predicates.md (scratch_or_d_register_operand): New.
18063 * config/avr/constraints.md (Yxx): New constraint.
18065 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18067 * config/riscv/autovec.md (select_vl<mode>): New pattern.
18068 * config/riscv/riscv-protos.h (expand_select_vl): New function.
18069 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
18071 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18073 * range-op-float.cc (foperator_mult_div_base): Delete.
18074 (foperator_mult_div_base::find_range): Make static local function.
18075 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
18076 (operator_mult::op1_range): Rename from foperator_mult.
18077 (operator_mult::op2_range): Ditto.
18078 (operator_mult::rv_fold): Ditto.
18079 (float_table::float_table): Remove MULT_EXPR.
18080 (class foperator_div): Inherit from range_operator.
18081 (float_table::float_table): Delete.
18082 * range-op-mixed.h (class operator_mult): Combined from integer
18084 * range-op.cc (float_tree_table): Delete.
18085 (op_mult): New object.
18086 (unified_table::unified_table): Add MULT_EXPR.
18087 (get_op_handler): Do not check float table any longer.
18088 (class cross_product_operator): Move to range-op-mixed.h.
18089 (class operator_mult): Move to range-op-mixed.h.
18090 (integral_table::integral_table): Remove MULT_EXPR.
18091 (pointer_table::pointer_table): Remove MULT_EXPR.
18092 * range-op.h (float_table): Remove.
18094 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18096 * range-op-float.cc (foperator_negate): Remove. Move prototypes
18097 to range-op-mixed.h
18098 (operator_negate::fold_range): Rename from foperator_negate.
18099 (operator_negate::op1_range): Ditto.
18100 (float_table::float_table): Remove NEGATE_EXPR.
18101 * range-op-mixed.h (class operator_negate): Combined from integer
18103 * range-op.cc (op_negate): New object.
18104 (unified_table::unified_table): Add NEGATE_EXPR.
18105 (class operator_negate): Move to range-op-mixed.h.
18106 (integral_table::integral_table): Remove NEGATE_EXPR.
18107 (pointer_table::pointer_table): Remove NEGATE_EXPR.
18109 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18111 * range-op-float.cc (foperator_minus): Remove. Move prototypes
18112 to range-op-mixed.h
18113 (operator_minus::fold_range): Rename from foperator_minus.
18114 (operator_minus::op1_range): Ditto.
18115 (operator_minus::op2_range): Ditto.
18116 (operator_minus::rv_fold): Ditto.
18117 (float_table::float_table): Remove MINUS_EXPR.
18118 * range-op-mixed.h (class operator_minus): Combined from integer
18120 * range-op.cc (op_minus): New object.
18121 (unified_table::unified_table): Add MINUS_EXPR.
18122 (class operator_minus): Move to range-op-mixed.h.
18123 (integral_table::integral_table): Remove MINUS_EXPR.
18124 (pointer_table::pointer_table): Remove MINUS_EXPR.
18126 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18128 * range-op-float.cc (foperator_abs): Remove. Move prototypes
18129 to range-op-mixed.h
18130 (operator_abs::fold_range): Rename from foperator_abs.
18131 (operator_abs::op1_range): Ditto.
18132 (float_table::float_table): Remove ABS_EXPR.
18133 * range-op-mixed.h (class operator_abs): Combined from integer
18135 * range-op.cc (op_abs): New object.
18136 (unified_table::unified_table): Add ABS_EXPR.
18137 (class operator_abs): Move to range-op-mixed.h.
18138 (integral_table::integral_table): Remove ABS_EXPR.
18139 (pointer_table::pointer_table): Remove ABS_EXPR.
18141 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18143 * range-op-float.cc (foperator_plus): Remove. Move prototypes
18144 to range-op-mixed.h
18145 (operator_plus::fold_range): Rename from foperator_plus.
18146 (operator_plus::op1_range): Ditto.
18147 (operator_plus::op2_range): Ditto.
18148 (operator_plus::rv_fold): Ditto.
18149 (float_table::float_table): Remove PLUS_EXPR.
18150 * range-op-mixed.h (class operator_plus): Combined from integer
18152 * range-op.cc (op_plus): New object.
18153 (unified_table::unified_table): Add PLUS_EXPR.
18154 (class operator_plus): Move to range-op-mixed.h.
18155 (integral_table::integral_table): Remove PLUS_EXPR.
18156 (pointer_table::pointer_table): Remove PLUS_EXPR.
18158 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18160 * range-op-mixed.h (class operator_cast): Combined from integer
18162 * range-op.cc (op_cast): New object.
18163 (unified_table::unified_table): Add op_cast
18164 (class operator_cast): Move to range-op-mixed.h.
18165 (integral_table::integral_table): Remove op_cast
18166 (pointer_table::pointer_table): Remove op_cast.
18168 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18170 * range-op-float.cc (operator_cst::fold_range): New.
18171 * range-op-mixed.h (class operator_cst): Move from integer file.
18172 * range-op.cc (op_cst): New object.
18173 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
18174 (class operator_cst): Move to range-op-mixed.h.
18175 (integral_table::integral_table): Remove op_cst.
18176 (pointer_table::pointer_table): Remove op_cst.
18178 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18180 * range-op-float.cc (foperator_identity): Remove. Move prototypes
18181 to range-op-mixed.h
18182 (operator_identity::fold_range): Rename from foperator_identity.
18183 (operator_identity::op1_range): Ditto.
18184 (float_table::float_table): Remove fop_identity.
18185 * range-op-mixed.h (class operator_identity): Combined from integer
18187 * range-op.cc (op_identity): New object.
18188 (unified_table::unified_table): Add op_identity.
18189 (class operator_identity): Move to range-op-mixed.h.
18190 (integral_table::integral_table): Remove identity.
18191 (pointer_table::pointer_table): Remove identity.
18193 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18195 * range-op-float.cc (foperator_ge): Remove. Move prototypes
18196 to range-op-mixed.h
18197 (operator_ge::fold_range): Rename from foperator_ge.
18198 (operator_ge::op1_range): Ditto.
18199 (float_table::float_table): Remove GE_EXPR.
18200 * range-op-mixed.h (class operator_ge): Combined from integer
18202 * range-op.cc (op_ge): New object.
18203 (unified_table::unified_table): Add GE_EXPR.
18204 (class operator_ge): Move to range-op-mixed.h.
18205 (ge_op1_op2_relation): Fold into
18206 operator_ge::op1_op2_relation.
18207 (integral_table::integral_table): Remove GE_EXPR.
18208 (pointer_table::pointer_table): Remove GE_EXPR.
18209 * range-op.h (ge_op1_op2_relation): Delete.
18211 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18213 * range-op-float.cc (foperator_gt): Remove. Move prototypes
18214 to range-op-mixed.h
18215 (operator_gt::fold_range): Rename from foperator_gt.
18216 (operator_gt::op1_range): Ditto.
18217 (float_table::float_table): Remove GT_EXPR.
18218 * range-op-mixed.h (class operator_gt): Combined from integer
18220 * range-op.cc (op_gt): New object.
18221 (unified_table::unified_table): Add GT_EXPR.
18222 (class operator_gt): Move to range-op-mixed.h.
18223 (gt_op1_op2_relation): Fold into
18224 operator_gt::op1_op2_relation.
18225 (integral_table::integral_table): Remove GT_EXPR.
18226 (pointer_table::pointer_table): Remove GT_EXPR.
18227 * range-op.h (gt_op1_op2_relation): Delete.
18229 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18231 * range-op-float.cc (foperator_le): Remove. Move prototypes
18232 to range-op-mixed.h
18233 (operator_le::fold_range): Rename from foperator_le.
18234 (operator_le::op1_range): Ditto.
18235 (float_table::float_table): Remove LE_EXPR.
18236 * range-op-mixed.h (class operator_le): Combined from integer
18238 * range-op.cc (op_le): New object.
18239 (unified_table::unified_table): Add LE_EXPR.
18240 (class operator_le): Move to range-op-mixed.h.
18241 (le_op1_op2_relation): Fold into
18242 operator_le::op1_op2_relation.
18243 (integral_table::integral_table): Remove LE_EXPR.
18244 (pointer_table::pointer_table): Remove LE_EXPR.
18245 * range-op.h (le_op1_op2_relation): Delete.
18247 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18249 * range-op-float.cc (foperator_lt): Remove. Move prototypes
18250 to range-op-mixed.h
18251 (operator_lt::fold_range): Rename from foperator_lt.
18252 (operator_lt::op1_range): Ditto.
18253 (float_table::float_table): Remove LT_EXPR.
18254 * range-op-mixed.h (class operator_lt): Combined from integer
18256 * range-op.cc (op_lt): New object.
18257 (unified_table::unified_table): Add LT_EXPR.
18258 (class operator_lt): Move to range-op-mixed.h.
18259 (lt_op1_op2_relation): Fold into
18260 operator_lt::op1_op2_relation.
18261 (integral_table::integral_table): Remove LT_EXPR.
18262 (pointer_table::pointer_table): Remove LT_EXPR.
18263 * range-op.h (lt_op1_op2_relation): Delete.
18265 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18267 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
18268 to range-op-mixed.h
18269 (operator_equal::fold_range): Rename from foperator_not_equal.
18270 (operator_equal::op1_range): Ditto.
18271 (float_table::float_table): Remove NE_EXPR.
18272 * range-op-mixed.h (class operator_not_equal): Combined from integer
18274 * range-op.cc (op_equal): New object.
18275 (unified_table::unified_table): Add NE_EXPR.
18276 (class operator_not_equal): Move to range-op-mixed.h.
18277 (not_equal_op1_op2_relation): Fold into
18278 operator_not_equal::op1_op2_relation.
18279 (integral_table::integral_table): Remove NE_EXPR.
18280 (pointer_table::pointer_table): Remove NE_EXPR.
18281 * range-op.h (not_equal_op1_op2_relation): Delete.
18283 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18285 * range-op-float.cc (foperator_equal): Remove. Move prototypes
18286 to range-op-mixed.h
18287 (operator_equal::fold_range): Rename from foperator_equal.
18288 (operator_equal::op1_range): Ditto.
18289 (float_table::float_table): Remove EQ_EXPR.
18290 * range-op-mixed.h (class operator_equal): Combined from integer
18292 * range-op.cc (op_equal): New object.
18293 (unified_table::unified_table): Add EQ_EXPR.
18294 (class operator_equal): Move to range-op-mixed.h.
18295 (equal_op1_op2_relation): Fold into
18296 operator_equal::op1_op2_relation.
18297 (integral_table::integral_table): Remove EQ_EXPR.
18298 (pointer_table::pointer_table): Remove EQ_EXPR.
18299 * range-op.h (equal_op1_op2_relation): Delete.
18301 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18303 * range-op-float.cc (class float_table): Move to header.
18304 (float_table::float_table): Move float only operators to...
18305 (range_op_table::initialize_float_ops): Here.
18306 * range-op-mixed.h: New.
18307 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
18309 (float_tree_table): Moved from range-op-float.cc.
18310 (unified_tree_table): New.
18311 (unified_table::unified_table): New. Call initialize routines.
18312 (get_op_handler): Check unified table first.
18313 (range_op_handler::range_op_handler): Handle no type constructor.
18314 (integral_table::integral_table): Move integral only operators to...
18315 (range_op_table::initialize_integral_ops): Here.
18316 (pointer_table::pointer_table): Move pointer only operators to...
18317 (range_op_table::initialize_pointer_ops): Here.
18318 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
18319 (get_bool_state): Ditto.
18320 (empty_range_varying): Ditto.
18321 (relop_early_resolve): Ditto.
18322 (class range_op_table): Add new init methods for range types.
18323 (class integral_table): Move declaration to here.
18324 (class pointer_table): Move declaration to here.
18325 (class float_table): Move declaration to here.
18327 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18328 Richard Sandiford <richard.sandiford@arm.com>
18329 Richard Biener <rguenther@suse.de>
18331 * doc/md.texi: Add SELECT_VL support.
18332 * internal-fn.def (SELECT_VL): Ditto.
18333 * optabs.def (OPTAB_D): Ditto.
18334 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
18335 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
18336 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
18337 (vectorizable_store): Ditto.
18338 (vectorizable_load): Ditto.
18339 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
18341 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
18344 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
18347 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
18349 * range-op.cc (range_cast): Move to...
18350 * range-op.h (range_cast): Here and add generic a version.
18352 2023-06-09 Marek Polacek <polacek@redhat.com>
18356 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
18357 warn about designated initializers in C only.
18359 2023-06-09 Andrew Pinski <apinski@marvell.com>
18361 PR tree-optimization/97711
18362 PR tree-optimization/110155
18363 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
18364 ((zero_one != 0) ? z <op> y : y): Likewise.
18366 2023-06-09 Andrew Pinski <apinski@marvell.com>
18368 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
18369 multiply rather than negation/bit_and.
18371 2023-06-09 Andrew Pinski <apinski@marvell.com>
18373 * match.pd (`X & -Y -> X * Y`): Allow for truncation
18374 and the same type for unsigned types.
18376 2023-06-09 Andrew Pinski <apinski@marvell.com>
18378 PR tree-optimization/110165
18379 PR tree-optimization/110166
18380 * match.pd (zero_one_valued_p): Don't accept
18381 signed 1-bit integers.
18383 2023-06-09 Richard Biener <rguenther@suse.de>
18385 * match.pd (two conversions in a row): Use element_precision
18386 to DTRT for VECTOR_TYPE.
18388 2023-06-09 Pan Li <pan2.li@intel.com>
18390 * config/riscv/riscv.md (enabled): Move to another place, and
18391 add fp_vector_disabled to the cond.
18392 (fp_vector_disabled): New attr defined for disabling fp.
18393 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
18395 2023-06-09 Pan Li <pan2.li@intel.com>
18397 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
18400 2023-06-09 liuhongt <hongtao.liu@intel.com>
18403 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
18404 view_convert_expr mask to signed type when folding pblendvb
18407 2023-06-09 liuhongt <hongtao.liu@intel.com>
18410 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
18411 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
18412 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
18414 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
18415 real codename for __builtin_ia32_pabs{b,w,d}.
18417 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
18419 * gimple-range-op.cc
18420 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
18421 (gimple_range_op_handler::maybe_builtin_call): Adjust.
18422 * gimple-range-op.h (operand1, operand2): Use m_operator.
18423 * range-op.cc (integral_table, pointer_table): Relocate.
18424 (get_op_handler): Rename from get_handler and handle all types.
18425 (range_op_handler::range_op_handler): Relocate.
18426 (range_op_handler::set_op_handler): Relocate and adjust.
18427 (range_op_handler::range_op_handler): Relocate.
18428 (dispatch_trio): New.
18429 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
18430 (range_op_handler::dispatch_kind): New.
18431 (range_op_handler::fold_range): Relocate and Use new dispatch value.
18432 (range_op_handler::op1_range): Ditto.
18433 (range_op_handler::op2_range): Ditto.
18434 (range_op_handler::lhs_op1_relation): Ditto.
18435 (range_op_handler::lhs_op2_relation): Ditto.
18436 (range_op_handler::op1_op2_relation): Ditto.
18437 (range_op_handler::set_op_handler): Use m_operator member.
18438 * range-op.h (range_op_handler::operator bool): Use m_operator.
18439 (range_op_handler::dispatch_kind): New.
18440 (range_op_handler::m_valid): Delete.
18441 (range_op_handler::m_int): Delete
18442 (range_op_handler::m_float): Delete
18443 (range_op_handler::m_operator): New.
18444 (range_op_table::operator[]): Relocate from .cc file.
18445 (range_op_table::set): Ditto.
18446 * value-range.h (class vrange): Make range_op_handler a friend.
18448 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
18450 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
18451 (cfn_pass_through_arg1): Adjust using statemenmt.
18452 (cfn_signbit): Change base class, adjust using statement.
18453 (cfn_copysign): Ditto.
18455 (cfn_sincos): Ditto.
18456 * range-op-float.cc (fold_range): Change class to range_operator.
18460 (lhs_op1_relation): Ditto.
18461 (lhs_op2_relation): Ditto.
18462 (op1_op2_relation): Ditto.
18463 (foperator_*): Ditto.
18464 (class float_table): New. Inherit from range_op_table.
18465 (floating_tree_table) Change to range_op_table pointer.
18466 (class floating_op_table): Delete.
18467 * range-op.cc (operator_equal): Adjust using statement.
18468 (operator_not_equal): Ditto.
18469 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
18470 (operator_minus, operator_cast): Ditto.
18471 (operator_bitwise_and, pointer_plus_operator): Ditto.
18472 (get_float_handle): Change return type.
18473 * range-op.h (range_operator_float): Delete. Relocate all methods
18474 into class range_operator.
18475 (range_op_handler::m_float): Change type to range_operator.
18476 (floating_op_table): Delete.
18477 (floating_tree_table): Change type.
18479 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
18481 * range-op.cc (range_operator::fold_range): Call virtual routine.
18482 (range_operator::update_bitmask): New.
18483 (operator_equal::update_bitmask): New.
18484 (operator_not_equal::update_bitmask): New.
18485 (operator_lt::update_bitmask): New.
18486 (operator_le::update_bitmask): New.
18487 (operator_gt::update_bitmask): New.
18488 (operator_ge::update_bitmask): New.
18489 (operator_ge::update_bitmask): New.
18490 (operator_plus::update_bitmask): New.
18491 (operator_minus::update_bitmask): New.
18492 (operator_pointer_diff::update_bitmask): New.
18493 (operator_min::update_bitmask): New.
18494 (operator_max::update_bitmask): New.
18495 (operator_mult::update_bitmask): New.
18496 (operator_div:operator_div):New.
18497 (operator_div::update_bitmask): New.
18498 (operator_div::m_code): New member.
18499 (operator_exact_divide::operator_exact_divide): New constructor.
18500 (operator_lshift::update_bitmask): New.
18501 (operator_rshift::update_bitmask): New.
18502 (operator_bitwise_and::update_bitmask): New.
18503 (operator_bitwise_or::update_bitmask): New.
18504 (operator_bitwise_xor::update_bitmask): New.
18505 (operator_trunc_mod::update_bitmask): New.
18506 (op_ident, op_unknown, op_ptr_min_max): New.
18507 (op_nop, op_convert): Delete.
18508 (op_ssa, op_paren, op_obj_type): Delete.
18509 (op_realpart, op_imagpart): Delete.
18510 (op_ptr_min, op_ptr_max): Delete.
18511 (pointer_plus_operator:update_bitmask): New.
18512 (range_op_table::set): Do not use m_code.
18513 (integral_table::integral_table): Adjust to single instances.
18514 * range-op.h (range_operator::range_operator): Delete.
18515 (range_operator::m_code): Delete.
18516 (range_operator::update_bitmask): New.
18518 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
18520 * range-op-float.cc (range_operator_float::fold_range): Return
18521 NAN of the result type.
18523 2023-06-08 Jakub Jelinek <jakub@redhat.com>
18525 * optabs.cc (expand_ffs): Add forward declaration.
18526 (expand_doubleword_clz): Rename to ...
18527 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
18528 handle also doubleword CTZ and FFS in addition to CLZ.
18529 (expand_unop): Adjust caller. Also call it for doubleword
18530 ctz_optab and ffs_optab.
18532 2023-06-08 Jakub Jelinek <jakub@redhat.com>
18535 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
18536 n_words == 2 recurse with mmx_ok as first argument rather than false.
18538 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
18540 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
18541 avoid sign extension/undefined behaviour when setting each bit.
18543 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
18544 Uros Bizjak <ubizjak@gmail.com>
18546 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
18547 Use new x86_stc instruction when the carry flag must be set.
18548 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
18549 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
18550 * config/i386/i386.h (TARGET_SLOW_STC): New define.
18551 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
18552 (x86_stc): New define_insn.
18553 (define_peephole2): Convert x86_stc into alternate implementation
18554 on pentium4 without -Os when a QImode register is available.
18555 (*x86_cmc): New define_insn.
18556 (define_peephole2): Convert *x86_cmc into alternate implementation
18557 on pentium4 without -Os when a QImode register is available.
18558 (*setccc): New define_insn_and_split for a no-op CCCmode move.
18559 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
18560 recognize (and eliminate) the carry flag being copied to itself.
18561 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
18562 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
18564 2023-06-07 Andrew Pinski <apinski@marvell.com>
18566 * match.pd: Fix comment for the
18567 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
18569 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
18570 Jeff Law <jlaw@ventanamicro.com>
18572 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
18573 (rotrsi3_sext): Expose generator.
18574 (rotlsi3 pattern): Hide generator.
18575 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
18577 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
18578 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
18579 (mulsi3, <optab>si3): Likewise.
18580 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
18581 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
18582 (<u>mulsidi3): Likewise.
18583 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
18584 (mulsi3_extended, <optab>si3_extended): Likewise.
18585 (splitter for shadd feeding divison): Update RTL pattern to account
18586 for changes in how 32 bit ops are expanded for TARGET_64BIT.
18587 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
18589 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
18592 * config/riscv/riscv.cc (riscv_print_operand): Calculate
18593 memmodel only when it is valid.
18595 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
18597 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
18598 for constant element of a vector.
18600 2023-06-07 Jakub Jelinek <jakub@redhat.com>
18602 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
18603 instead compare tree_nonzero_bits <= 1U rather than just == 1.
18605 2023-06-07 Alex Coplan <alex.coplan@arm.com>
18608 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
18610 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
18611 names for builtins.
18612 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
18613 setup if in_lto_p, just like we do for SVE.
18614 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
18615 (__arm_st64b): Delete.
18616 (__arm_st64bv): Delete.
18617 (__arm_st64bv0): Delete.
18619 2023-06-07 Alex Coplan <alex.coplan@arm.com>
18622 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
18623 Use input operand for the destination address.
18624 * config/aarch64/aarch64.md (st64b): Fix constraint on address
18627 2023-06-07 Alex Coplan <alex.coplan@arm.com>
18630 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
18631 Replace eight consecutive spaces with tabs.
18632 (aarch64_init_ls64_builtins): Likewise.
18633 (aarch64_expand_builtin_ls64): Likewise.
18634 * config/aarch64/aarch64.md (ld64b): Likewise.
18637 (st64bv0): Likewise.
18639 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
18641 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
18642 offset table pseudo to a general reg subset.
18644 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18646 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
18648 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
18650 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
18651 (aarch64_sqxtun2<mode>_le): Likewise.
18652 (aarch64_sqxtun2<mode>_be): Likewise.
18653 (aarch64_sqxtun2<mode>): Adjust for the above.
18654 (aarch64_sqmovun<mode>): New define_expand.
18655 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
18656 (half_mask): New mode attribute.
18657 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
18660 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18662 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
18664 (aarch64_addp<mode>_insn): ... This...
18665 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
18666 (aarch64_addp<mode>): New define_expand.
18668 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18670 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
18671 * config/riscv/riscv-v.cc
18672 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
18674 (rvv_builder::single_step_npatterns_p): New function.
18675 (rvv_builder::npatterns_all_equal_p): Ditto.
18676 (const_vec_all_in_range_p): Support POLY handling.
18677 (gen_const_vector_dup): Ditto.
18678 (emit_vlmax_gather_insn): Add vrgatherei16.
18679 (emit_vlmax_masked_gather_mu_insn): Ditto.
18680 (expand_const_vector): Add VLA SLP const vector support.
18681 (expand_vec_perm): Support POLY.
18682 (struct expand_vec_perm_d): New struct.
18683 (shuffle_generic_patterns): New function.
18684 (expand_vec_perm_const_1): Ditto.
18685 (expand_vec_perm_const): Ditto.
18686 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
18687 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
18689 2023-06-07 Andrew Pinski <apinski@marvell.com>
18691 PR middle-end/110117
18692 * expr.cc (expand_single_bit_test): Handle
18693 const_int from expand_expr.
18695 2023-06-07 Andrew Pinski <apinski@marvell.com>
18697 * expr.cc (do_store_flag): Rearrange the
18698 TER code so that it overrides the nonzero bits
18699 info if we had `a & POW2`.
18701 2023-06-07 Andrew Pinski <apinski@marvell.com>
18703 PR tree-optimization/110134
18704 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
18706 (-A CMP CST -> B CMP (-CST)): Likewise.
18708 2023-06-07 Andrew Pinski <apinski@marvell.com>
18710 PR tree-optimization/89263
18711 PR tree-optimization/99069
18712 PR tree-optimization/20083
18713 PR tree-optimization/94898
18714 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
18715 one of the operands are constant.
18717 2023-06-07 Andrew Pinski <apinski@marvell.com>
18719 * match.pd (zero_one_valued_p): Match 0 integer constant
18722 2023-06-07 Pan Li <pan2.li@intel.com>
18724 * config/riscv/riscv-vector-builtins-types.def
18725 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
18726 (vfloat32m1_t): Ditto.
18727 (vfloat32m2_t): Ditto.
18728 (vfloat32m4_t): Ditto.
18729 (vfloat32m8_t): Ditto.
18730 (vint16mf4_t): Ditto.
18731 (vint16mf2_t): Ditto.
18732 (vint16m1_t): Ditto.
18733 (vint16m2_t): Ditto.
18734 (vint16m4_t): Ditto.
18735 (vint16m8_t): Ditto.
18736 (vuint16mf4_t): Ditto.
18737 (vuint16mf2_t): Ditto.
18738 (vuint16m1_t): Ditto.
18739 (vuint16m2_t): Ditto.
18740 (vuint16m4_t): Ditto.
18741 (vuint16m8_t): Ditto.
18742 (vint32mf2_t): Ditto.
18743 (vint32m1_t): Ditto.
18744 (vint32m2_t): Ditto.
18745 (vint32m4_t): Ditto.
18746 (vint32m8_t): Ditto.
18747 (vuint32mf2_t): Ditto.
18748 (vuint32m1_t): Ditto.
18749 (vuint32m2_t): Ditto.
18750 (vuint32m4_t): Ditto.
18751 (vuint32m8_t): Ditto.
18753 2023-06-07 Jason Merrill <jason@redhat.com>
18756 * doc/invoke.texi: Document it.
18758 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
18760 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
18761 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
18762 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
18763 NOT (BITREVERSE x) as BITREVERSE (NOT x).
18764 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
18765 Optimize PARITY (BITREVERSE x) as PARITY x.
18766 Optimize BITREVERSE (BITREVERSE x) as x.
18767 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
18768 BITREVERSE of a constant integer at compile-time.
18769 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
18770 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
18771 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
18772 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
18773 Optimize COPYSIGN (x, ABS y) as ABS x.
18774 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
18775 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
18776 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
18777 arguments at compile-time.
18779 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
18781 * rtl.h (function_invariant_p): Change return type from int to bool.
18782 * reload1.cc (function_invariant_p): Change return type from
18783 int to bool and adjust function body accordingly.
18785 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18787 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
18788 (*single_<optab>mult_plus<mode>): Ditto.
18789 (*double_<optab>mult_plus<mode>): Ditto.
18790 (*sign_zero_extend_fma): Ditto.
18791 (*zero_sign_extend_fma): Ditto.
18792 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18794 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
18795 Tobias Burnus <tobias@codesourcery.com>
18797 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
18798 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
18800 (omp_get_attachment): Handle map clauses with 'present' modifier.
18801 (omp_group_base): Likewise.
18802 (gimplify_scan_omp_clauses): Reorder present maps to come first.
18803 Set GOVD flags for present defaultmaps.
18804 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
18805 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
18807 (lower_omp_target): Handle map clauses with 'present' modifier.
18808 Handle 'to' and 'from' clauses with 'present'.
18809 * tree-core.h (enum omp_clause_defaultmap_kind): Add
18810 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
18811 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
18812 'from' clauses with 'present' modifier. Handle present defaultmap.
18813 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
18815 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
18817 * config/rs6000/genfusion.pl: Delete some dead code.
18819 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
18821 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
18823 (gen_ld_cmpi_p10): ... this.
18825 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
18828 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
18829 duplicate expression.
18831 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18833 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
18834 Handle unsigned reduc_plus_scal_ builtins.
18835 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
18836 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
18837 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
18838 __builtin_aarch64_reduc_plus_scal_v2di.
18839 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
18841 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18843 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
18844 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
18845 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
18847 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18849 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
18850 (aarch64_shrn<mode>_insn_be): Delete.
18851 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
18852 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
18853 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
18854 (aarch64_rshrn<mode>_insn_le): Delete.
18855 (aarch64_rshrn<mode>_insn_be): Delete.
18856 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
18857 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
18859 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18861 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
18863 (aarch64_pars_overlap_p): Likewise.
18864 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
18865 Express in terms of UNSPEC_ADDV.
18866 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
18867 (*aarch64_<su>addlv<mode>_reduction): Define.
18868 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
18869 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
18870 (aarch64_pars_overlap_p): Likewise.
18871 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
18872 (VQUADW): New mode attribute.
18873 (VWIDE2X_S): Likewise.
18875 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
18876 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
18878 2023-06-06 Richard Biener <rguenther@suse.de>
18880 PR middle-end/110055
18881 * gimplify.cc (gimplify_target_expr): Do not emit
18882 CLOBBERs for variables which have static storage duration
18883 after gimplifying their initializers.
18885 2023-06-06 Richard Biener <rguenther@suse.de>
18887 PR tree-optimization/109143
18888 * tree-ssa-structalias.cc (solution_set_expand): Avoid
18889 one bitmap iteration and optimize bit range setting.
18891 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
18893 PR bootstrap/110120
18894 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
18895 XVECEXP, not XEXP, to access first item of a PARALLEL.
18897 2023-06-06 Pan Li <pan2.li@intel.com>
18899 * config/riscv/riscv-vector-builtins-types.def
18900 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
18901 (vfloat16mf2_t): Likewise.
18902 (vfloat16m1_t): Likewise.
18903 (vfloat16m2_t): Likewise.
18904 (vfloat16m4_t): Likewise.
18905 (vfloat16m8_t): Likewise.
18906 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
18907 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
18909 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
18911 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
18912 for cfi reg/mem machmode
18913 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
18915 2023-06-06 Li Xu <xuli1@eswincomputing.com>
18917 * config/riscv/vector-iterators.md:
18918 Fix 'REQUIREMENT' for machine_mode 'MODE'.
18919 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
18920 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
18921 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
18923 2023-06-06 Pan Li <pan2.li@intel.com>
18925 * config/riscv/vector-iterators.md: Fix typo in mode attr.
18927 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
18928 Joel Hutton <joel.hutton@arm.com>
18930 * doc/generic.texi: Remove old tree codes.
18931 * expr.cc (expand_expr_real_2): Remove old tree code cases.
18932 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
18933 * optabs-tree.cc (optab_for_tree_code): Likewise.
18934 (supportable_half_widening_operation): Likewise.
18935 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
18936 * tree-inline.cc (estimate_operator_cost): Likewise.
18937 (op_symbol_code): Likewise.
18938 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
18939 (vect_analyze_data_ref_accesses): Likewise.
18940 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
18941 * cfgexpand.cc (expand_debug_expr): Likewise.
18942 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
18943 (supportable_widening_operation): Likewise.
18944 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
18946 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
18947 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
18948 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
18949 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
18950 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
18951 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
18952 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
18953 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
18955 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
18956 Joel Hutton <joel.hutton@arm.com>
18957 Tamar Christina <tamar.christina@arm.com>
18959 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
18961 (vec_widen_<su>add_lo_<mode>): ... to this.
18962 (vec_widen_<su>addl_hi_<mode>): Rename this ...
18963 (vec_widen_<su>add_hi_<mode>): ... to this.
18964 (vec_widen_<su>subl_lo_<mode>): Rename this ...
18965 (vec_widen_<su>sub_lo_<mode>): ... to this.
18966 (vec_widen_<su>subl_hi_<mode>): Rename this ...
18967 (vec_widen_<su>sub_hi_<mode>): ...to this.
18968 * doc/generic.texi: Document new IFN codes.
18969 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
18970 (commutative_binary_fn_p): Add widen_plus fn's.
18971 (widening_fn_p): New function.
18972 (narrowing_fn_p): New function.
18973 (direct_internal_fn_optab): Change visibility.
18974 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
18975 internal_fn that expands into multiple internal_fns for widening.
18976 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
18977 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
18978 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
18979 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
18980 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
18981 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
18982 (lookup_hilo_internal_fn): Likewise.
18983 (widening_fn_p): Likewise.
18984 (Narrowing_fn_p): Likewise.
18985 * optabs.cc (commutative_optab_p): Add widening plus optabs.
18986 * optabs.def (OPTAB_D): Define widen add, sub optabs.
18987 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
18988 patterns with a hi/lo or even/odd split.
18989 (vect_recog_sad_pattern): Refactor to use new IFN codes.
18990 (vect_recog_widen_plus_pattern): Likewise.
18991 (vect_recog_widen_minus_pattern): Likewise.
18992 (vect_recog_average_pattern): Likewise.
18993 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
18995 (supportable_widening_operation): Likewise.
18996 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
18998 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
18999 Joel Hutton <joel.hutton@arm.com>
19001 * tree-vect-patterns.cc: Add include for gimple-iterator.
19002 (vect_recog_widen_op_pattern): Refactor to use code_helper.
19003 (vect_gimple_build): New function.
19004 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
19006 (vectorizable_call): Likewise.
19007 (vect_gen_widened_results_half): Likewise.
19008 (vect_create_vectorized_demotion_stmts): Likewise.
19009 (vect_create_vectorized_promotion_stmts): Likewise.
19010 (vect_create_half_widening_stmts): Likewise.
19011 (vectorizable_conversion): Likewise.
19012 (supportable_widening_operation): Likewise.
19013 (supportable_narrowing_operation): Likewise.
19014 * tree-vectorizer.h (supportable_widening_operation): Change
19015 prototype to use code_helper.
19016 (supportable_narrowing_operation): Likewise.
19017 (vect_gimple_build): New function prototype.
19018 * tree.h (code_helper::safe_as_tree_code): New function.
19019 (code_helper::safe_as_fn_code): New function.
19021 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
19023 * wide-int.cc (wi::bitreverse_large): New function implementing
19024 bit reversal of an integer.
19025 * wide-int.h (wi::bitreverse): New (template) function prototype.
19026 (bitreverse_large): Prototype helper function/implementation.
19027 (wi::bitreverse): New template wrapper around bitreverse_large.
19029 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19031 * rtl.h (print_rtl_single): Change return type from int to void.
19032 (print_rtl_single_with_indent): Ditto.
19033 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
19034 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
19035 (rtx_writer::print_rtx_operand_code_0): Ditto.
19036 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
19037 (rtx_writer::print_rtx_operand_code_i): Ditto.
19038 (rtx_writer::print_rtx_operand_code_u): Ditto.
19039 (rtx_writer::print_rtx_operand): Ditto.
19040 (rtx_writer::print_rtx): Ditto.
19041 (rtx_writer::finish_directive): Ditto.
19042 (print_rtl_single): Change return type from int to void
19043 and adjust function body accordingly.
19044 (rtx_writer::print_rtl_single_with_indent): Ditto.
19046 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19048 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
19049 (reg_class_subset_p): Ditto.
19050 * reginfo.cc (reg_classes_intersect_p): Ditto.
19051 (reg_class_subset_p): Ditto.
19053 2023-06-05 Pan Li <pan2.li@intel.com>
19055 * config/riscv/riscv-vector-builtins-types.def
19056 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
19057 (vfloat32m1_t): Ditto.
19058 (vfloat32m2_t): Ditto.
19059 (vfloat32m4_t): Ditto.
19060 (vfloat32m8_t): Ditto.
19061 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
19062 (vint16mf2_t): Ditto.
19063 (vint16m1_t): Ditto.
19064 (vint16m2_t): Ditto.
19065 (vint16m4_t): Ditto.
19066 (vint16m8_t): Ditto.
19067 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
19068 (vuint16mf2_t): Ditto.
19069 (vuint16m1_t): Ditto.
19070 (vuint16m2_t): Ditto.
19071 (vuint16m4_t): Ditto.
19072 (vuint16m8_t): Ditto.
19073 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
19074 (vint32m1_t): Ditto.
19075 (vint32m2_t): Ditto.
19076 (vint32m4_t): Ditto.
19077 (vint32m8_t): Ditto.
19078 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
19079 (vuint32m1_t): Ditto.
19080 (vuint32m2_t): Ditto.
19081 (vuint32m4_t): Ditto.
19082 (vuint32m8_t): Ditto.
19083 * config/riscv/vector-iterators.md: Add FP=16 support for V,
19084 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
19086 2023-06-05 Andrew Pinski <apinski@marvell.com>
19088 PR bootstrap/110085
19089 * Makefile.in (clean): Remove the removing of
19090 MULTILIB_DIR/MULTILIB_OPTIONS directories.
19092 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
19094 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
19096 * config/mips/mips.cc (speculation_barrier_libfunc): New static
19098 (mips_init_libfuncs): Initialize it.
19099 (mips_emit_speculation_barrier): New function.
19100 * config/mips/mips.md (speculation_barrier): Call
19101 mips_emit_speculation_barrier.
19103 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19105 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
19106 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
19107 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
19108 (rvv_builder::get_merged_repeating_sequence): Ditto.
19109 (rvv_builder::get_merge_scalar_mask): Ditto.
19110 (emit_scalar_move_insn): Ditto.
19111 (emit_vlmax_integer_move_insn): Ditto.
19112 (emit_nonvlmax_integer_move_insn): Ditto.
19113 (emit_vlmax_gather_insn): Ditto.
19114 (emit_vlmax_masked_gather_mu_insn): Ditto.
19115 (get_repeating_sequence_dup_machine_mode): Ditto.
19117 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19119 * config/riscv/autovec.md: Split arguments.
19120 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
19121 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
19123 2023-06-04 Andrew Pinski <apinski@marvell.com>
19125 * expr.cc (do_store_flag): Improve for single bit testing
19126 not against zero but against that single bit.
19128 2023-06-04 Andrew Pinski <apinski@marvell.com>
19130 * expr.cc (do_store_flag): Extend the one bit checking case
19131 to handle the case where we don't have an and but rather still
19132 one bit is known to be non-zero.
19134 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
19136 * config/h8300/constraints.md (Zz): Make this a normal
19138 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
19139 * config/h8300/logical.md (H8/SX bit patterns): Remove.
19141 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19143 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
19144 New insn_and_split patterns.
19146 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19149 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
19150 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
19151 (@vlmul_extx4<mode>): Ditto.
19152 (@vlmul_extx8<mode>): Ditto.
19153 (@vlmul_extx16<mode>): Ditto.
19154 (@vlmul_extx32<mode>): Ditto.
19155 (@vlmul_extx64<mode>): Ditto.
19156 (*vlmul_extx2<mode>): Ditto.
19157 (*vlmul_extx4<mode>): Ditto.
19158 (*vlmul_extx8<mode>): Ditto.
19159 (*vlmul_extx16<mode>): Ditto.
19160 (*vlmul_extx32<mode>): Ditto.
19161 (*vlmul_extx64<mode>): Ditto.
19163 2023-06-04 Pan Li <pan2.li@intel.com>
19165 * config/riscv/riscv-vector-builtins-types.def
19166 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
19167 (vfloat32m1_t): Likewise.
19168 (vfloat32m2_t): Likewise.
19169 (vfloat32m4_t): Likewise.
19170 (vfloat32m8_t): Likewise.
19171 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
19172 * config/riscv/vector-iterators.md: Add single to half machine
19175 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19177 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
19178 (*n<optab><mode>): Ditto.
19179 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
19180 (*n<optab><mode>): Ditto.
19181 * config/riscv/vector.md: Ditto.
19183 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
19186 * config/i386/i386-features.cc (scalar_chain::convert_compare):
19187 Update or delete REG_EQUAL notes, converting CONST_INT and
19188 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
19190 2023-06-04 Jason Merrill <jason@redhat.com>
19193 * tree-eh.cc (lower_resx): Pass the exception pointer to the
19195 * except.h: Tweak comment.
19197 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
19199 * postreload.cc (move2add_use_add2_insn): Handle
19200 trivial single_sets. Rename variable PAT to SET.
19201 (move2add_use_add3_insn, reload_cse_move2add): Similar.
19203 2023-06-04 Pan Li <pan2.li@intel.com>
19205 * config/riscv/riscv-vector-builtins-types.def
19206 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
19207 (vfloat16mf2_t): Likewise.
19208 (vfloat16m1_t): Likewise.
19209 (vfloat16m2_t): Likewise.
19210 (vfloat16m4_t): Likewise.
19211 (vfloat16m8_t): Likewise.
19212 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
19213 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
19214 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
19215 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
19218 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
19220 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
19223 2023-06-03 Die Li <lidie@eswincomputing.com>
19225 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
19227 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19229 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
19231 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19233 * config/riscv/vector.md: Add vector-opt.md.
19234 * config/riscv/autovec-opt.md: New file.
19236 2023-06-03 liuhongt <hongtao.liu@intel.com>
19238 PR tree-optimization/110067
19239 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
19240 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
19242 2023-06-03 liuhongt <hongtao.liu@intel.com>
19245 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
19246 (truncv2si<mode>2): Ditto.
19248 2023-06-02 Andrew Pinski <apinski@marvell.com>
19250 PR rtl-optimization/102733
19251 * dse.cc (store_info): Add addrspace field.
19252 (record_store): Record the address space
19253 and check to make sure they are the same.
19255 2023-06-02 Andrew Pinski <apinski@marvell.com>
19257 PR rtl-optimization/110042
19258 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
19259 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
19261 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
19264 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
19265 Make sure that we do not have a cap on field alignment before altering
19266 the struct layout based on the type alignment of the first entry.
19268 2023-06-02 David Faust <david.faust@oracle.com>
19271 * btfout.cc (btf_absolute_func_id): New function.
19272 (btf_asm_func_type): Call it here. Change index parameter from
19273 size_t to ctf_id_t. Use PRIu64 formatter.
19275 2023-06-02 Alex Coplan <alex.coplan@arm.com>
19277 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
19278 (btf_asm_datasec_type): Likewise.
19280 2023-06-02 Carl Love <cel@us.ibm.com>
19282 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
19283 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
19285 2023-06-02 Jason Merrill <jason@redhat.com>
19289 * tree.h (DECL_MERGEABLE): New.
19290 * tree-core.h (struct tree_decl_common): Mention it.
19291 * gimplify.cc (gimplify_init_constructor): Check it.
19292 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
19293 * varasm.cc (categorize_decl_for_section): Likewise.
19295 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
19297 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
19298 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
19299 (stack_regs_mentioned_p): Change return type from int to bool
19300 and adjust function body accordingly.
19301 (stack_regs_mentioned): Ditto.
19302 (check_asm_stack_operands): Ditto. Change "malformed_asm"
19304 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
19305 (swap_rtx_condition_1): Change return type from int to bool
19306 and adjust function body accordingly. Change "r" variable to bool.
19307 (swap_rtx_condition): Change return type from int to bool
19308 and adjust function body accordingly.
19309 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
19310 (subst_stack_regs): Ditto.
19311 (convert_regs_entry): Change return type from int to bool and adjust
19312 function body accordingly. Change "inserted" variable to bool.
19313 (convert_regs_1): Recode handling of control_flow_insn_deleted.
19314 (convert_regs_2): Recode handling of cfg_altered.
19315 (convert_regs): Ditto. Change "inserted" variable to bool.
19317 2023-06-02 Jason Merrill <jason@redhat.com>
19320 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
19321 (initializer_constant_valid_p_1): Compare float precision.
19323 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
19325 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
19328 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19330 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
19331 (vect_set_loop_condition_partial_vectors): Ditto.
19333 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
19336 * config/avr/avr.md: Add an RTL peephole to optimize operations on
19337 non-LD_REGS after a move from LD_REGS.
19338 (piaop): New code iterator.
19340 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
19343 * doc/install.texi: Document (optional) Perl usage for parallel
19344 testing of libgomp.
19346 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
19349 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
19352 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19353 KuanLin Chen <best124612@gmail.com>
19355 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
19356 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
19358 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19360 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
19362 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19364 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
19366 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19368 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
19370 (DEF_RVV_FRM_ENUM): Ditto.
19372 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19374 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
19375 intrinsic API expander
19376 * config/riscv/vector.md
19377 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
19378 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
19379 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
19381 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19383 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
19384 * config/riscv/predicates.md (vector_perm_operand): New predicate.
19385 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19386 (expand_vec_perm): New function.
19387 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
19388 (gen_const_vector_dup): Ditto.
19389 (emit_vlmax_gather_insn): Ditto.
19390 (emit_vlmax_masked_gather_mu_insn): Ditto.
19391 (expand_vec_perm): Ditto.
19393 2023-06-01 Jason Merrill <jason@redhat.com>
19395 * doc/invoke.texi (-Wpedantic): Improve clarity.
19397 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
19399 * rtl.h (exp_equiv_p): Change return type from int to bool.
19400 * cse.cc (mention_regs): Change return type from int to bool
19401 and adjust function body accordingly.
19402 (exp_equiv_p): Ditto.
19403 (insert_regs): Ditto. Change "modified" function argument to bool
19404 and update usage accordingly.
19405 (record_jump_cond): Remove always zero "reversed_nonequality"
19406 function argument and update usage accordingly.
19407 (fold_rtx): Change "changed" variable to bool.
19408 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
19409 (is_dead_reg): Change return type from int to bool.
19411 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19413 * config/xtensa/xtensa.md (adddi3, subdi3):
19414 New RTL generation patterns implemented according to the instruc-
19415 tion idioms described in the Xtensa ISA reference manual (p. 600).
19417 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
19418 Uros Bizjak <ubizjak@gmail.com>
19421 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
19422 CODE_for_sse4_1_ptestzv2di.
19423 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
19424 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
19425 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
19426 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
19427 when expanding UNSPEC_PTEST to compare against zero.
19428 * config/i386/i386-features.cc (scalar_chain::convert_compare):
19429 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
19430 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
19431 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
19432 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
19433 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
19434 check for suitable matching modes for the UNSPEC_PTEST pattern.
19435 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
19436 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
19437 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
19438 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
19439 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
19440 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
19441 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
19443 (*ptest<mode>_and): Specify CCZ to only perform this optimization
19444 when only the Z flag is required.
19446 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
19449 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
19451 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19453 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
19454 Add =r,m and =r,m alternatives.
19455 (load_pair<DREG:mode><DREG2:mode>): Likewise.
19456 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
19458 2023-06-01 Pan Li <pan2.li@intel.com>
19460 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
19462 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
19463 (main): Disable FP16 tuple.
19464 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
19465 (TARGET_VECTOR_ELEN_FP_16): Ditto.
19466 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
19468 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
19469 (vfloat16mf2_t): Ditto.
19470 (vfloat16m1_t): Ditto.
19471 (vfloat16m2_t): Ditto.
19472 (vfloat16m4_t): Ditto.
19473 (vfloat16m8_t): Ditto.
19474 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
19476 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
19477 machine mode based on TARGET_VECTOR_ELEN_FP_16.
19479 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19481 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
19482 (DEF_RVV_FRM_ENUM): New macro.
19483 (handle_pragma_vector): Add FRM enum
19484 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
19491 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
19492 Richard Sandiford <richard.sandiford@arm.com>
19494 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
19495 Update call to wi::bswap.
19496 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
19497 Update call to wi::bswap.
19498 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
19499 Update calls to wi::bswap.
19500 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
19501 (wi::bswap_large): New function, with revised API.
19502 * wide-int.h (wi::bswap): New (template) function prototype.
19503 (wide_int_storage::bswap): Remove method.
19504 (sext_large, zext_large): Consistent indentation/line wrapping.
19505 (bswap_large): Prototype helper function containing implementation.
19506 (wi::bswap): New template wrapper around bswap_large.
19508 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19511 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
19512 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
19513 (usdot_prod<vsi2qi>): Rename to...
19514 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
19515 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
19516 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
19517 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
19518 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
19519 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
19520 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
19523 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19526 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
19527 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
19528 (aarch64_sq<r>dmulh_n<mode>): Rename to...
19529 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
19530 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
19531 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
19532 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
19533 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
19534 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
19535 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
19536 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
19537 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
19538 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
19539 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
19541 2023-05-31 David Faust <david.faust@oracle.com>
19543 * btfout.cc (btf_kind_names): New.
19544 (btf_kind_name): New.
19545 (btf_absolute_var_id): New utility function.
19546 (btf_relative_var_id): Likewise.
19547 (btf_relative_func_id): Likewise.
19548 (btf_absolute_datasec_id): Likewise.
19549 (btf_asm_type_ref): New.
19550 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
19551 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
19552 (btf_asm_varent): Likewise.
19553 (btf_asm_func_arg): Likewise.
19554 (btf_asm_datasec_entry): Likewise.
19555 (btf_asm_datasec_type): Likewise.
19556 (btf_asm_func_type): Likewise. Add index parameter.
19557 (btf_asm_enum_const): Likewise.
19558 (btf_asm_sou_member): Likewise.
19559 (output_btf_vars): Update btf_asm_* call accordingly.
19560 (output_asm_btf_sou_fields): Likewise.
19561 (output_asm_btf_enum_list): Likewise.
19562 (output_asm_btf_func_args_list): Likewise.
19563 (output_asm_btf_vlen_bytes): Likewise.
19564 (output_btf_func_types): Add ctf_container_ref parameter.
19565 Pass it to btf_asm_func_type.
19566 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
19567 (btf_output): Update output_btf_func_types call similarly.
19569 2023-05-31 David Faust <david.faust@oracle.com>
19571 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
19572 and BTF_KIND_FWD which do not use the size/type field at all.
19574 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
19576 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
19577 (active_insn_p): Ditto.
19578 (in_sequence_p): Ditto.
19579 (unshare_all_rtl): Change return type from int to void.
19580 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
19581 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
19582 and adjust function body accordingly.
19583 (mem_expr_equal_p): Ditto.
19584 (unshare_all_rtl): Change return type from int to void
19585 and adjust function body accordingly.
19586 (verify_rtx_sharing): Remove unneeded return.
19587 (active_insn_p): Change return type from int to bool
19588 and adjust function body accordingly.
19589 (in_sequence_p): Ditto.
19591 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
19593 * rtl.h (true_dependence): Change return type from int to bool.
19594 (canon_true_dependence): Ditto.
19595 (read_dependence): Ditto.
19596 (anti_dependence): Ditto.
19597 (canon_anti_dependence): Ditto.
19598 (output_dependence): Ditto.
19599 (canon_output_dependence): Ditto.
19600 (may_alias_p): Ditto.
19601 * alias.h (alias_sets_conflict_p): Ditto.
19602 (alias_sets_must_conflict_p): Ditto.
19603 (objects_must_conflict_p): Ditto.
19604 (nonoverlapping_memrefs_p): Ditto.
19605 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
19606 (record_set): Ditto.
19607 (base_alias_check): Ditto.
19608 (find_base_value): Ditto.
19609 (mems_in_disjoint_alias_sets_p): Ditto.
19610 (get_alias_set_entry): Ditto.
19611 (decl_for_component_ref): Ditto.
19612 (write_dependence_p): Ditto.
19613 (memory_modified_1): Ditto.
19614 (mems_in_disjoint_alias_set_p): Change return type from int to bool
19615 and adjust function body accordingly.
19616 (alias_sets_conflict_p): Ditto.
19617 (alias_sets_must_conflict_p): Ditto.
19618 (objects_must_conflict_p): Ditto.
19619 (rtx_equal_for_memref_p): Ditto.
19620 (base_alias_check): Ditto.
19621 (read_dependence): Ditto.
19622 (nonoverlapping_memrefs_p): Ditto.
19623 (true_dependence_1): Ditto.
19624 (true_dependence): Ditto.
19625 (canon_true_dependence): Ditto.
19626 (write_dependence_p): Ditto.
19627 (anti_dependence): Ditto.
19628 (canon_anti_dependence): Ditto.
19629 (output_dependence): Ditto.
19630 (canon_output_dependence): Ditto.
19631 (may_alias_p): Ditto.
19632 (init_alias_analysis): Change "changed" variable to bool.
19634 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19636 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
19637 expand into define_insn_and_split.
19639 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19641 * config/riscv/vector.md: Remove FRM.
19643 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19645 * config/riscv/vector.md: Remove FRM.
19647 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19649 * config/riscv/vector.md: Remove FRM.
19651 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
19654 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
19657 2023-05-31 Richard Biener <rguenther@suse.de>
19660 PR tree-optimization/109143
19661 * tree-ssa-structalias.cc (struct topo_info): Remove.
19662 (init_topo_info): Likewise.
19663 (free_topo_info): Likewise.
19664 (compute_topo_order): Simplify API, put the component
19665 with ESCAPED last so it's processed first.
19666 (topo_visit): Adjust.
19667 (solve_graph): Likewise.
19669 2023-05-31 Richard Biener <rguenther@suse.de>
19671 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
19673 (add_graph_edge): Count redundant edges we avoid to create.
19674 (dump_sa_stats): Dump them.
19675 (ipa_pta_execute): Do not dump generating constraints when
19676 we are not dumping them.
19678 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19680 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
19681 output template to avoid explicit switch on which_alternative.
19682 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
19683 (and<mode>3): Likewise.
19684 (ior<mode>3): Likewise.
19685 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
19687 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19689 * config/xtensa/predicates.md (xtensa_bit_join_operator):
19691 * config/xtensa/xtensa.md (ior_op): Remove.
19692 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
19693 insn_and_split pattern of the same name to express and capture
19694 the bit-combining operation with both sides swapped.
19695 In addition, replace use of code iterator with new operator
19697 (*shlrd_const, *shlrd_per_byte):
19698 Likewise regarding the code iterator.
19700 2023-05-31 Cui, Lili <lili.cui@intel.com>
19702 PR tree-optimization/110038
19703 * params.opt: Add a limit on tree-reassoc-width.
19704 * tree-ssa-reassoc.cc
19705 (rewrite_expr_tree_parallel): Add width limit.
19707 2023-05-31 Pan Li <pan2.li@intel.com>
19709 * common/config/riscv/riscv-common.cc:
19710 (riscv_implied_info): Add zvfh item.
19711 (riscv_ext_version_table): Ditto.
19712 (riscv_ext_flag_table): Ditto.
19713 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
19714 (TARGET_ZVFH): Ditto.
19716 2023-05-30 liuhongt <hongtao.liu@intel.com>
19718 PR tree-optimization/108804
19719 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
19720 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
19721 Add new parameter narrow_src_p.
19722 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
19723 vectorization by truncating to lower precision.
19724 * tree-vectorizer.h (vect_get_range_info): New declare.
19726 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
19728 * lra-int.h (lra_update_sp_offset): Add the prototype.
19729 * lra.cc (setup_sp_offset): Change the return type. Use
19730 lra_update_sp_offset.
19731 * lra-eliminations.cc (lra_update_sp_offset): New function.
19732 (lra_process_new_insns): Push the current insn to reprocess if the
19733 input reload changes sp offset.
19735 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
19738 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
19739 Fix misleading identation.
19741 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
19743 * rtl.h (comparison_dominates_p): Change return type from int to bool.
19744 (condjump_p): Ditto.
19745 (any_condjump_p): Ditto.
19746 (any_uncondjump_p): Ditto.
19747 (simplejump_p): Ditto.
19748 (returnjump_p): Ditto.
19749 (eh_returnjump_p): Ditto.
19750 (onlyjump_p): Ditto.
19751 (invert_jump_1): Ditto.
19752 (invert_jump): Ditto.
19753 (rtx_renumbered_equal_p): Ditto.
19754 (redirect_jump_1): Ditto.
19755 (redirect_jump): Ditto.
19756 (condjump_in_parallel_p): Ditto.
19757 * jump.cc (invert_exp_1): Adjust forward declaration.
19758 (comparison_dominates_p): Change return type from int to bool
19759 and adjust function body accordingly.
19760 (simplejump_p): Ditto.
19761 (condjump_p): Ditto.
19762 (condjump_in_parallel_p): Ditto.
19763 (any_uncondjump_p): Ditto.
19764 (any_condjump_p): Ditto.
19765 (returnjump_p): Ditto.
19766 (eh_returnjump_p): Ditto.
19767 (onlyjump_p): Ditto.
19768 (redirect_jump_1): Ditto.
19769 (redirect_jump): Ditto.
19770 (invert_exp_1): Ditto.
19771 (invert_jump_1): Ditto.
19772 (invert_jump): Ditto.
19773 (rtx_renumbered_equal_p): Ditto.
19775 2023-05-30 Andrew Pinski <apinski@marvell.com>
19777 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
19778 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
19779 Add ne as a possible cmp.
19780 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
19782 2023-05-30 Andrew Pinski <apinski@marvell.com>
19784 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
19787 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
19789 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
19790 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
19791 (and (extend X) C) as (zero_extend (and X C)), to also optimize
19792 modes wider than HOST_WIDE_INT.
19794 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
19797 * simplify-rtx.cc (simplify_const_relational_operation): Return
19798 early if we have a MODE_CC comparison that isn't a COMPARE against
19801 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
19803 * config/riscv/riscv.cc (riscv_const_insns): Allow
19804 const_vec_duplicates.
19806 2023-05-30 liuhongt <hongtao.liu@intel.com>
19808 PR middle-end/108938
19809 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
19810 function, cut from original find_bswap_or_nop function.
19811 (find_bswap_or_nop): Add a new parameter, detect bswap +
19812 rotate and save rotate result in the new parameter.
19813 (bswap_replace): Add a new parameter to indicate rotate and
19814 generate rotate stmt if needed.
19815 (maybe_optimize_vector_constructor): Adjust for new rotate
19816 parameter in the upper 2 functions.
19817 (pass_optimize_bswap::execute): Ditto.
19818 (imm_store_chain_info::output_merged_store): Ditto.
19820 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19822 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
19823 (aarch64_<su>adalp<mode>): New define_expand.
19824 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
19825 (aarch64_<su>addlp<mode>): Convert to define_expand.
19826 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
19827 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
19829 (USADDLP): Likewise.
19830 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
19832 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19834 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
19835 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
19836 srhadd, urhadd builtin codes for standard optab ones.
19837 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
19838 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
19840 (<u>avg<mode>3_ceil): Rename to...
19841 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
19843 (aarch64_<su>hsub<mode>): New define_expand.
19844 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
19845 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
19846 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
19848 2023-05-30 Andreas Schwab <schwab@suse.de>
19851 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
19852 match libsanitizer.
19854 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19856 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
19857 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
19859 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
19860 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
19861 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
19862 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
19863 (aarch64_<sra_op>sra_n<mode>): New define_expand.
19864 (aarch64_<sra_op>rsra_n<mode>): Likewise.
19865 (aarch64_<sur>sra_n<mode>): Rename to...
19866 (aarch64_<sur>sra_ndi): ... This.
19867 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
19868 any_target_p argument.
19869 (aarch64_extract_vec_duplicate_wide_int): Define.
19870 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
19871 (aarch64_const_vec_rnd_cst_p): Likewise.
19872 (aarch64_vector_mode_supported_any_target_p): Likewise.
19873 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
19874 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
19875 (VSRA): Adjust for the above.
19877 (V2XWIDE): New mode_attr.
19878 (vec_or_offset): Likewise.
19879 (SHIFTEXTEND): Likewise.
19880 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
19882 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
19883 clarify that it applies to current target options.
19884 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
19885 * doc/tm.texi.in: Regenerate.
19886 * stor-layout.cc (mode_for_vector): Check
19887 vector_mode_supported_any_target_p when iterating through vector modes.
19888 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
19889 clarify that it applies to current target options.
19890 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
19892 2023-05-30 Lili Cui <lili.cui@intel.com>
19894 PR tree-optimization/98350
19895 * tree-ssa-reassoc.cc
19896 (rewrite_expr_tree_parallel): Rewrite this function.
19897 (rank_ops_for_fma): New.
19898 (reassociate_bb): Handle new function.
19900 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
19902 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
19903 (rtx_unstable_p): Ditto.
19904 (reg_mentioned_p): Ditto.
19905 (reg_referenced_p): Ditto.
19906 (reg_used_between_p): Ditto.
19907 (reg_set_between_p): Ditto.
19908 (modified_between_p): Ditto.
19909 (no_labels_between_p): Ditto.
19910 (modified_in_p): Ditto.
19911 (reg_set_p): Ditto.
19912 (multiple_sets): Ditto.
19913 (set_noop_p): Ditto.
19914 (noop_move_p): Ditto.
19915 (reg_overlap_mentioned_p): Ditto.
19916 (dead_or_set_p): Ditto.
19917 (dead_or_set_regno_p): Ditto.
19918 (find_reg_fusage): Ditto.
19919 (find_regno_fusage): Ditto.
19920 (side_effects_p): Ditto.
19921 (volatile_refs_p): Ditto.
19922 (volatile_insn_p): Ditto.
19923 (may_trap_p_1): Ditto.
19924 (may_trap_p): Ditto.
19925 (may_trap_or_fault_p): Ditto.
19926 (computed_jump_p): Ditto.
19927 (auto_inc_p): Ditto.
19928 (loc_mentioned_in_p): Ditto.
19929 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
19930 (rtx_unstable_p): Change return type from int to bool
19931 and adjust function body accordingly.
19932 (rtx_addr_can_trap_p): Ditto.
19933 (reg_mentioned_p): Ditto.
19934 (no_labels_between_p): Ditto.
19935 (reg_used_between_p): Ditto.
19936 (reg_referenced_p): Ditto.
19937 (reg_set_between_p): Ditto.
19938 (reg_set_p): Ditto.
19939 (modified_between_p): Ditto.
19940 (modified_in_p): Ditto.
19941 (multiple_sets): Ditto.
19942 (set_noop_p): Ditto.
19943 (noop_move_p): Ditto.
19944 (reg_overlap_mentioned_p): Ditto.
19945 (dead_or_set_p): Ditto.
19946 (dead_or_set_regno_p): Ditto.
19947 (find_reg_fusage): Ditto.
19948 (find_regno_fusage): Ditto.
19949 (remove_node_from_insn_list): Ditto.
19950 (volatile_insn_p): Ditto.
19951 (volatile_refs_p): Ditto.
19952 (side_effects_p): Ditto.
19953 (may_trap_p_1): Ditto.
19954 (may_trap_p): Ditto.
19955 (may_trap_or_fault_p): Ditto.
19956 (computed_jump_p): Ditto.
19957 (auto_inc_p): Ditto.
19958 (loc_mentioned_in_p): Ditto.
19959 * combine.cc (can_combine_p): Update indirect function.
19961 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19963 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
19964 * config/riscv/iterators.md: New attribute.
19965 * config/riscv/vector-iterators.md: New attribute.
19967 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
19969 * config/riscv/riscv.md: Fix signed and unsigned comparison
19972 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19974 * config/riscv/autovec.md (fnma<mode>4): New pattern.
19975 (*fnma<mode>): Ditto.
19977 2023-05-29 Die Li <lidie@eswincomputing.com>
19979 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
19981 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
19982 process for TARGET_XTHEADCONDMOV
19984 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
19987 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
19988 TARGET_AVX512BW to generate truncv16hiv16qi2.
19990 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
19992 * config/riscv/riscv.md (and<mode>3): New expander.
19993 (*and<mode>3) New pattern.
19994 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
19997 2023-05-29 Pan Li <pan2.li@intel.com>
19999 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
20000 comments and rename local variables.
20001 (emit_nonvlmax_insn): Diito.
20002 (emit_vlmax_merge_insn): Ditto.
20003 (emit_vlmax_cmp_insn): Ditto.
20004 (emit_vlmax_cmp_mu_insn): Ditto.
20005 (emit_scalar_move_insn): Ditto.
20007 2023-05-29 Pan Li <pan2.li@intel.com>
20009 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
20011 (emit_nonvlmax_insn): Ditto.
20012 (emit_vlmax_merge_insn): Ditto.
20013 (emit_vlmax_cmp_insn): Ditto.
20014 (emit_vlmax_cmp_mu_insn): Ditto.
20015 (expand_vec_series): Ditto.
20017 2023-05-29 Pan Li <pan2.li@intel.com>
20019 * config/riscv/riscv-protos.h (enum insn_type): New type.
20020 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
20021 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
20023 (rvv_builder::get_merged_repeating_sequence): Ditto.
20024 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
20025 to evaluate the optimization cost.
20026 (rvv_builder::get_merge_scalar_mask): New function to get the merge
20028 (emit_scalar_move_insn): New function to emit vmv.s.x.
20029 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
20030 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
20032 (get_repeating_sequence_dup_machine_mode): New function to get the dup
20034 (expand_vector_init_merge_repeating_sequence): New function to perform
20036 (expand_vec_init): Add this vector init optimization.
20037 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
20039 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20041 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
20042 put onto the increment when it is inserted after the position.
20044 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20046 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
20049 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20051 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
20053 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20055 * config/riscv/autovec.md (fma<mode>4): New pattern.
20056 (*fma<mode>): Ditto.
20057 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20058 (emit_vlmax_ternary_insn): New function.
20059 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
20061 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20063 * config/riscv/vector.md: Fix vimuladd instruction bug.
20065 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20067 * config/riscv/riscv.cc (global_state_unknown_p): New function.
20068 (riscv_mode_after): Fix incorrect VXM.
20070 2023-05-29 Pan Li <pan2.li@intel.com>
20072 * common/config/riscv/riscv-common.cc:
20073 (riscv_implied_info): Add zvfhmin item.
20074 (riscv_ext_version_table): Ditto.
20075 (riscv_ext_flag_table): Ditto.
20076 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
20077 (TARGET_ZFHMIN): Align indent.
20078 (TARGET_ZFH): Ditto.
20079 (TARGET_ZVFHMIN): New macro.
20081 2023-05-27 liuhongt <hongtao.liu@intel.com>
20084 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
20085 to VI_AVX2 to cover more modes.
20087 2023-05-27 liuhongt <hongtao.liu@intel.com>
20089 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
20090 Remove ATOM and ICELAKE(and later) core processors.
20092 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20094 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
20096 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
20098 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
20101 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20102 Juzhe Zhong <juzhe.zhong@rivai.ai>
20104 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
20106 (<optab><v_quad_trunc><mode>2): Dito.
20107 (<optab><v_oct_trunc><mode>2): Dito.
20108 (trunc<mode><v_double_trunc>2): Dito.
20109 (trunc<mode><v_quad_trunc>2): Dito.
20110 (trunc<mode><v_oct_trunc>2): Dito.
20111 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
20112 (autovectorize_vector_modes): Define.
20113 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
20115 (autovectorize_vector_modes): Implement hook.
20116 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
20117 Implement target hook.
20118 (riscv_vectorize_related_mode): Implement target hook.
20119 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
20120 (TARGET_VECTORIZE_RELATED_MODE): Define.
20121 * config/riscv/vector-iterators.md: Add lowercase versions of
20122 mode_attr iterators.
20124 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
20125 Tobias Burnus <tobias@codesourcery.com>
20127 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
20128 (ASM_SPEC): Use XNACKOPT.
20129 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
20130 (enum hsaco_attr_type): ... this, and generalize the names.
20131 (TARGET_XNACK): New macro.
20132 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
20134 (output_file_start): Update xnack handling.
20135 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
20136 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
20137 (sram_ecc_type): Rename to ...
20138 (hsaco_attr_type: ... this.)
20139 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
20140 (TEST_XNACK): Delete.
20141 (TEST_XNACK_ANY): New macro.
20142 (TEST_XNACK_ON): New macro.
20143 (main): Support the new -mxnack=on/off/any syntax.
20144 * doc/invoke.texi (-mxnack): Update for new syntax.
20146 2023-05-26 Andrew Pinski <apinski@marvell.com>
20148 * genmatch.cc (emit_debug_printf): New function.
20149 (dt_simplify::gen_1): Emit printf into the code
20150 before the `return true` or returning the folded result
20151 instead of emitting it always.
20153 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20155 * config/xtensa/xtensa-protos.h
20156 (xtensa_expand_block_set_unrolled_loop,
20157 xtensa_expand_block_set_small_loop): Remove.
20158 (xtensa_expand_block_set): New prototype.
20159 * config/xtensa/xtensa.cc
20160 (xtensa_expand_block_set_libcall): New subfunction.
20161 (xtensa_expand_block_set_unrolled_loop,
20162 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
20163 (xtensa_expand_block_set): New function that calls the above
20165 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
20166 xtensa_expand_block_set().
20168 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20170 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
20172 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
20174 * config/xtensa/constraints.md (O):
20175 Change to use the above function.
20176 * config/xtensa/xtensa.md (*subsi3_from_const):
20177 New insn_and_split pattern.
20179 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20181 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
20182 Retract excessive line folding, and correct the value of
20183 the "length" insn attribute related to TARGET_DENSITY.
20184 (*extzvsi-1bit_addsubx): Ditto.
20186 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
20188 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
20189 Do not disable call to ix86_expand_vecop_qihi2.
20191 2023-05-26 liuhongt <hongtao.liu@intel.com>
20195 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
20196 calculation when !hard_regno_mode_ok for GENERAL_REGS and
20197 mode, otherwise still use GENERAL_REGS.
20199 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20201 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
20202 explict VL and drop VL in ops.
20204 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
20206 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
20207 in different BB blocks.
20209 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
20211 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20212 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
20213 instructions when available. Emulate truncation via
20214 ix86_expand_vec_perm_const_1 when native truncate insn
20216 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
20217 when available. Trivially rename some variables.
20218 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
20219 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
20220 calculation of V*QImode emulations to account for generation of
20221 2x-wider mode instructions.
20222 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
20223 emulations to account for generation of 2x-wider mode instructions.
20225 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
20228 * config/avr/avr.cc (avr_can_inline_p): New static function.
20229 (TARGET_CAN_INLINE_P): Define to that function.
20231 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
20234 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
20235 Handle any bit position and use mode QISI.
20236 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
20237 of 2 insns for bit-transfer of respective style.
20239 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
20241 * config/arm/iterators.md (MVE_6): Remove.
20242 * config/arm/mve.md: Replace MVE_6 with MVE_5.
20244 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20245 Richard Sandiford <richard.sandiford@arm.com>
20247 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
20249 (vect_set_loop_controls_directly): Add decrement IV support.
20250 (vect_set_loop_condition_partial_vectors): Ditto.
20251 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
20253 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
20256 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20259 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
20260 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
20261 Fix canonicalization of PLUS operands.
20262 (aarch64_fcmla<rot><mode>): Rename to...
20263 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
20264 Fix canonicalization of PLUS operands.
20265 (aarch64_fcmla_lane<rot><mode>): Rename to...
20266 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
20267 Fix canonicalization of PLUS operands.
20268 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
20269 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
20270 Fix canonicalization of PLUS operands.
20271 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
20273 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
20275 * config/arm/arm.md (rbitsi2): Rename to...
20276 (arm_rbit): ... This.
20277 (ctzsi2): Adjust for the above.
20278 (arm_rev16si2): Convert to define_expand.
20279 (arm_rev16si2_alt1): New pattern.
20280 (arm_rev16si2_alt): Rename to...
20281 (*arm_rev16si2_alt2): ... This.
20282 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
20283 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
20284 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
20285 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
20287 2023-05-25 Alex Coplan <alex.coplan@arm.com>
20290 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
20292 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
20293 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
20294 DFmode as an rvalue.
20296 2023-05-25 Richard Biener <rguenther@suse.de>
20299 * tree-vect-stmts.cc (vectorizable_condition): For
20300 embedded comparisons also handle the case when the target
20301 only provides vec_cmp and vcond_mask.
20303 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
20305 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
20308 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20310 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
20311 (seq_cost_ignoring_scalar_moves): Likewise.
20312 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
20314 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20316 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
20317 (vcage_f32): Likewise.
20318 (vcages_f32): Likewise.
20319 (vcageq_f32): Likewise.
20320 (vcaged_f64): Likewise.
20321 (vcageq_f64): Likewise.
20322 (vcagts_f32): Likewise.
20323 (vcagt_f32): Likewise.
20324 (vcagt_f64): Likewise.
20325 (vcagtq_f32): Likewise.
20326 (vcagtd_f64): Likewise.
20327 (vcagtq_f64): Likewise.
20328 (vcale_f32): Likewise.
20329 (vcale_f64): Likewise.
20330 (vcaled_f64): Likewise.
20331 (vcales_f32): Likewise.
20332 (vcaleq_f32): Likewise.
20333 (vcaleq_f64): Likewise.
20334 (vcalt_f32): Likewise.
20335 (vcalt_f64): Likewise.
20336 (vcaltd_f64): Likewise.
20337 (vcaltq_f32): Likewise.
20338 (vcaltq_f64): Likewise.
20339 (vcalts_f32): Likewise.
20341 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
20345 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
20346 int to const int or const int to const unsigned int.
20347 (_mm512_mask_srli_epi16): Ditto.
20348 (_mm512_slli_epi16): Ditto.
20349 (_mm512_mask_slli_epi16): Ditto.
20350 (_mm512_maskz_slli_epi16): Ditto.
20351 (_mm512_srai_epi16): Ditto.
20352 (_mm512_mask_srai_epi16): Ditto.
20353 (_mm512_maskz_srai_epi16): Ditto.
20354 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
20355 (_mm512_mask_slli_epi64): Ditto.
20356 (_mm512_maskz_slli_epi64): Ditto.
20357 (_mm512_srli_epi64): Ditto.
20358 (_mm512_mask_srli_epi64): Ditto.
20359 (_mm512_maskz_srli_epi64): Ditto.
20360 (_mm512_srai_epi64): Ditto.
20361 (_mm512_mask_srai_epi64): Ditto.
20362 (_mm512_maskz_srai_epi64): Ditto.
20363 (_mm512_slli_epi32): Ditto.
20364 (_mm512_mask_slli_epi32): Ditto.
20365 (_mm512_maskz_slli_epi32): Ditto.
20366 (_mm512_srli_epi32): Ditto.
20367 (_mm512_mask_srli_epi32): Ditto.
20368 (_mm512_maskz_srli_epi32): Ditto.
20369 (_mm512_srai_epi32): Ditto.
20370 (_mm512_mask_srai_epi32): Ditto.
20371 (_mm512_maskz_srai_epi32): Ditto.
20372 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
20373 (_mm256_maskz_srai_epi16): Ditto.
20374 (_mm_mask_srai_epi16): Ditto.
20375 (_mm_maskz_srai_epi16): Ditto.
20376 (_mm256_mask_slli_epi16): Ditto.
20377 (_mm256_maskz_slli_epi16): Ditto.
20378 (_mm_mask_slli_epi16): Ditto.
20379 (_mm_maskz_slli_epi16): Ditto.
20380 (_mm_maskz_srli_epi16): Ditto.
20381 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
20382 (_mm256_maskz_srli_epi32): Ditto.
20383 (_mm_mask_srli_epi32): Ditto.
20384 (_mm_maskz_srli_epi32): Ditto.
20385 (_mm256_mask_srli_epi64): Ditto.
20386 (_mm256_maskz_srli_epi64): Ditto.
20387 (_mm_mask_srli_epi64): Ditto.
20388 (_mm_maskz_srli_epi64): Ditto.
20389 (_mm256_mask_srai_epi32): Ditto.
20390 (_mm256_maskz_srai_epi32): Ditto.
20391 (_mm_mask_srai_epi32): Ditto.
20392 (_mm_maskz_srai_epi32): Ditto.
20393 (_mm256_srai_epi64): Ditto.
20394 (_mm256_mask_srai_epi64): Ditto.
20395 (_mm256_maskz_srai_epi64): Ditto.
20396 (_mm_srai_epi64): Ditto.
20397 (_mm_mask_srai_epi64): Ditto.
20398 (_mm_maskz_srai_epi64): Ditto.
20399 (_mm_mask_slli_epi32): Ditto.
20400 (_mm_maskz_slli_epi32): Ditto.
20401 (_mm_mask_slli_epi64): Ditto.
20402 (_mm_maskz_slli_epi64): Ditto.
20403 (_mm256_mask_slli_epi32): Ditto.
20404 (_mm256_maskz_slli_epi32): Ditto.
20405 (_mm256_mask_slli_epi64): Ditto.
20406 (_mm256_maskz_slli_epi64): Ditto.
20408 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20410 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
20413 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
20415 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
20416 * data-streamer-out.cc (streamer_write_vrange): Same.
20417 * value-range.h (class vrange): Make streamer_write_vrange a friend.
20419 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
20421 * value-query.cc (range_query::get_tree_range): Set NAN directly
20423 * value-range.cc (frange::set): Assert that bounds are not NAN.
20425 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
20427 * value-range.cc (add_vrange): Handle known NANs.
20429 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
20431 * value-range.h (frange::set_nan): New.
20433 2023-05-25 Alexandre Oliva <oliva@adacore.com>
20436 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
20437 requires stricter alignment than MEM's.
20439 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20441 PR tree-optimization/107822
20442 PR tree-optimization/107986
20443 * Makefile.in (OBJS): Add gimple-range-phi.o.
20444 * gimple-range-cache.h (ranger_cache::m_estimate): New
20445 phi_analyzer pointer member.
20446 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
20447 phi_analyzer if no loop info is available.
20448 * gimple-range-phi.cc: New file.
20449 * gimple-range-phi.h: New file.
20450 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
20452 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20454 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
20456 (fold_range): Add range_query parameter.
20457 (fur_relation::fur_relation): New.
20458 (fur_relation::trio): New.
20459 (fur_relation::register_relation): New.
20460 (fold_relations): New.
20461 * gimple-range-fold.h (fold_range): Adjust prototypes.
20462 (fold_relations): New.
20464 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20466 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
20467 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
20468 (ranger_cache::const_query): New.
20469 * gimple-range.cc (gimple_ranger::const_query): New.
20470 * gimple-range.h (gimple_ranger::const_query): New prototype.
20472 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20474 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
20475 (ssa_cache::dump_range_query): Delete.
20476 (ssa_lazy_cache::dump_range_query): Delete.
20477 (ssa_lazy_cache::get_range): Move from header file.
20478 (ssa_lazy_cache::clear_range): ditto.
20479 (ssa_lazy_cache::clear): Ditto.
20480 * gimple-range-cache.h (class ssa_cache): Virtualize.
20481 (class ssa_lazy_cache): Inherit and virtualize.
20483 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
20485 * value-range.h (vrange::kind): Remove.
20487 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
20489 PR middle-end/109840
20490 * match.pd <popcount optimizations>: Preserve zero-extension when
20491 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
20492 popcount((T)x), so the popcount's argument keeps the same type.
20493 <parity optimizations>: Likewise preserve extensions when
20494 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
20495 parity((T)x), so that the parity's argument type is the same.
20497 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
20499 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
20500 (ipcp_store_vr_results): Same.
20501 * ipa-prop.cc (ipa_vr::ipa_vr): New.
20502 (ipa_vr::get_vrange): New.
20503 (ipa_vr::set_unknown): New.
20504 (ipa_vr::streamer_read): New.
20505 (ipa_vr::streamer_write): New.
20506 (write_ipcp_transformation_info): Use new ipa_vr API.
20507 (read_ipcp_transformation_info): Same.
20508 (ipa_vr::nonzero_p): Delete.
20509 (ipcp_update_vr): Use new ipa_vr API.
20510 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
20511 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
20513 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
20515 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
20516 silence overflow warnings later on.
20518 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
20520 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20521 Remove handling of V8QImode.
20522 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
20523 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
20524 (v<insn>v4qi3): Ditto.
20525 * config/i386/sse.md (v<insn>v8qi3): Remove.
20527 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20530 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
20531 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
20532 (aarch64_simd_ashr<mode>): Rename to...
20533 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
20534 (aarch64_simd_imm_shl<mode>): Rename to...
20535 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
20536 (aarch64_simd_reg_sshl<mode>): Rename to...
20537 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
20538 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
20539 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
20540 (aarch64_simd_reg_shl<mode>_signed): Rename to...
20541 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
20542 (vec_shr_<mode>): Rename to...
20543 (vec_shr_<mode><vczle><vczbe>): ... This.
20544 (aarch64_<sur>shl<mode>): Rename to...
20545 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
20546 (aarch64_<sur>q<r>shl<mode>): Rename to...
20547 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
20549 2023-05-24 Richard Biener <rguenther@suse.de>
20552 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
20553 Perform final vector composition using
20554 ix86_expand_vector_init_general instead of setting
20555 the highpart and lowpart which causes spilling.
20557 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20559 PR tree-optimization/109695
20560 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
20562 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
20563 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
20564 flag to set_global_range.
20565 (gimple_ranger::prefill_stmt_dependencies): Ditto.
20567 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20569 PR tree-optimization/109695
20570 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
20572 (temporal_cache::current_p): Check always_current method.
20573 (temporal_cache::set_always_current): Add param and set value
20575 (temporal_cache::always_current_p): New.
20576 (ranger_cache::get_global_range): Adjust.
20577 (ranger_cache::set_global_range): set always current first.
20579 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
20581 PR tree-optimization/109695
20582 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
20583 fold_range with global query to choose an initial value.
20585 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20587 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
20590 2023-05-24 Richard Biener <rguenther@suse.de>
20592 PR tree-optimization/109849
20593 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
20594 expressions but take the first sets.
20596 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
20599 * doc/gm2.texi (High procedure function): New node.
20600 (Using): New menu entry for High procedure function.
20602 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
20604 PR rtl-optimization/109940
20605 * early-remat.cc (postorder_index): Rename to...
20606 (rpo_index): ...this.
20607 (compare_candidates): Sort by decreasing rpo_index rather than
20608 increasing postorder_index.
20609 (early_remat::sort_candidates): Calculate the forward RPO from
20611 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
20612 rather than DF_BACKWARD in reverse.
20614 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20617 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
20618 qualifier_none for the return operand.
20620 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20622 * config/riscv/autovec.md (<optab><mode>3): New pattern.
20623 (one_cmpl<mode>2): Ditto.
20624 (*<optab>not<mode>): Ditto.
20625 (*n<optab><mode>): Ditto.
20626 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
20629 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
20631 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
20632 calculation on n_perms by considering nvectors_per_build.
20634 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20635 Richard Sandiford <richard.sandiford@arm.com>
20637 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
20638 (vec_cmp<mode><vm>): New pattern.
20639 (vec_cmpu<mode><vm>): New pattern.
20640 (vcond<V:mode><VI:mode>): New pattern.
20641 (vcondu<V:mode><VI:mode>): New pattern.
20642 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
20643 (emit_vlmax_merge_insn): New function.
20644 (emit_vlmax_cmp_insn): Ditto.
20645 (emit_vlmax_cmp_mu_insn): Ditto.
20646 (expand_vec_cmp): Ditto.
20647 (expand_vec_cmp_float): Ditto.
20648 (expand_vcond): Ditto.
20649 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
20650 (emit_vlmax_cmp_insn): Ditto.
20651 (emit_vlmax_cmp_mu_insn): Ditto.
20652 (get_cmp_insn_code): Ditto.
20653 (expand_vec_cmp): Ditto.
20654 (expand_vec_cmp_float): Ditto.
20655 (expand_vcond): Ditto.
20657 2023-05-24 Pan Li <pan2.li@intel.com>
20659 * config/riscv/genrvv-type-indexer.cc (main): Add
20660 unsigned_eew*_lmul1_interpret for indexer.
20661 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
20662 Register vuint*m1_t interpret function.
20663 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
20664 New macro for vuint8m1_t.
20665 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
20666 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
20667 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
20668 (vbool1_t): Add to unsigned_eew*_interpret_ops.
20669 (vbool2_t): Likewise.
20670 (vbool4_t): Likewise.
20671 (vbool8_t): Likewise.
20672 (vbool16_t): Likewise.
20673 (vbool32_t): Likewise.
20674 (vbool64_t): Likewise.
20675 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
20676 New macro for vuint*m1_t.
20677 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
20678 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
20679 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
20680 (required_extensions_p): Add vuint*m1_t interpret case.
20681 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
20682 Add vuint*m1_t interpret to base type.
20683 (unsigned_eew16_lmul1_interpret): Likewise.
20684 (unsigned_eew32_lmul1_interpret): Likewise.
20685 (unsigned_eew64_lmul1_interpret): Likewise.
20687 2023-05-24 Pan Li <pan2.li@intel.com>
20689 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
20690 for the eew size list.
20691 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
20692 (main): Add signed_eew*_lmul1_interpret for indexer.
20693 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
20694 Register vint*m1_t interpret function.
20695 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
20696 New macro for vint8m1_t.
20697 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
20698 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
20699 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
20700 (vbool1_t): Add to signed_eew*_interpret_ops.
20701 (vbool2_t): Likewise.
20702 (vbool4_t): Likewise.
20703 (vbool8_t): Likewise.
20704 (vbool16_t): Likewise.
20705 (vbool32_t): Likewise.
20706 (vbool64_t): Likewise.
20707 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
20708 New macro for vint*m1_t.
20709 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
20710 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
20711 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
20712 (required_extensions_p): Add vint8m1_t interpret case.
20713 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
20714 Add vint*m1_t interpret to base type.
20715 (signed_eew16_lmul1_interpret): Likewise.
20716 (signed_eew32_lmul1_interpret): Likewise.
20717 (signed_eew64_lmul1_interpret): Likewise.
20719 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20721 * config/riscv/autovec.md: Adjust for new interface.
20722 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
20723 (emit_nonvlmax_insn): Add AVL operand.
20724 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
20725 (emit_nonvlmax_insn): Add AVL operand.
20726 (sew64_scalar_helper): Adjust for new interface.
20727 (expand_tuple_move): Ditto.
20728 * config/riscv/vector.md: Ditto.
20730 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20732 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
20733 (expand_const_vector): Ditto.
20734 (legitimize_move): Ditto.
20735 (sew64_scalar_helper): Ditto.
20736 (expand_tuple_move): Ditto.
20737 (expand_vector_init_insert_elems): Ditto.
20738 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
20740 2023-05-24 liuhongt <hongtao.liu@intel.com>
20743 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
20744 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
20745 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
20746 (ix86_masked_all_ones): Handle 64-bit mask.
20747 * config/i386/i386-builtin.def: Replace icode of related
20748 non-mask simd abs builtins with CODE_FOR_nothing.
20750 2023-05-23 Martin Uecker <uecker@tugraz.at>
20753 * function.cc (gimplify_parm_type): Remove function.
20754 (gimplify_parameters): Call gimplify_type_sizes.
20756 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20758 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
20759 and change to also accept '*subx' pattern.
20762 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20764 * config/xtensa/predicates.md (addsub_operator): New.
20765 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
20766 *extzvsi-1bit_addsubx): New insn_and_split patterns.
20767 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
20768 Add a special case about ifcvt 'noce_try_cmove()' to handle
20769 constant loads that do not fit into signed 12 bits in the
20770 patterns added above.
20772 2023-05-23 Richard Biener <rguenther@suse.de>
20774 PR tree-optimization/109747
20775 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
20776 the SLP node only once to the cost hook.
20778 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
20780 * config/avr/avr.cc (avr_insn_cost): New static function.
20781 (TARGET_INSN_COST): Define to that function.
20783 2023-05-23 Richard Biener <rguenther@suse.de>
20786 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
20787 For vector construction or splats apply GPR->XMM move
20788 costing. QImode memory can be handled directly only
20789 with SSE4.1 pinsrb.
20791 2023-05-23 Richard Biener <rguenther@suse.de>
20793 PR tree-optimization/108752
20794 * tree-vect-stmts.cc (vectorizable_operation): For bit
20795 operations with generic word_mode vectors do not cost
20796 an extra stmt. For plus, minus and negate also cost the
20797 constant materialization.
20799 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
20801 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
20802 Call ix86_expand_vec_shift_qihi_constant for shifts
20803 with constant count operand.
20804 * config/i386/i386.cc (ix86_shift_rotate_cost):
20805 Handle V4QImode and V8QImode.
20806 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
20807 (<insn>v4qi3): Ditto.
20809 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20811 * config/riscv/vector.md: Add mode.
20813 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
20815 PR tree-optimization/109934
20816 * value-range.cc (irange::invert): Remove buggy special case.
20818 2023-05-23 Richard Biener <rguenther@suse.de>
20820 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
20823 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
20826 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
20827 subregs between any scalars that are 64 bits or smaller.
20828 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
20829 (bits_etype): New int attribute.
20830 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
20831 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
20832 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
20834 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
20836 * doc/md.texi: Document that <FOO> can be used to refer to the
20837 numerical value of an int iterator FOO. Tweak other parts of
20838 the int iterator documentation.
20839 * read-rtl.cc (iterator_group::has_self_attr): New field.
20840 (map_attr_string): When has_self_attr is true, make <FOO>
20841 expand to the current value of iterator FOO.
20842 (initialize_iterators): Set has_self_attr for int iterators.
20844 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20846 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
20847 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
20848 (RVV_UNOP_NUM): New macro.
20849 (RVV_BINOP_NUM): Ditto.
20850 (legitimize_move): Refactor the framework of RVV auto-vectorization.
20851 (emit_vlmax_op): Ditto.
20852 (emit_vlmax_reg_op): Ditto.
20853 (emit_len_op): Ditto.
20854 (emit_len_binop): Ditto.
20855 (emit_vlmax_tany_many): Ditto.
20856 (emit_nonvlmax_tany_many): Ditto.
20857 (sew64_scalar_helper): Ditto.
20858 (expand_tuple_move): Ditto.
20859 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
20860 (emit_pred_binop): Ditto.
20861 (emit_vlmax_op): Ditto.
20862 (emit_vlmax_tany_many): New function.
20863 (emit_len_op): Remove.
20864 (emit_nonvlmax_tany_many): New function.
20865 (emit_vlmax_reg_op): Remove.
20866 (emit_len_binop): Ditto.
20867 (emit_index_op): Ditto.
20868 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
20869 (expand_const_vector): Ditto.
20870 (legitimize_move): Ditto.
20871 (sew64_scalar_helper): Ditto.
20872 (expand_tuple_move): Ditto.
20873 (expand_vector_init_insert_elems): Ditto.
20874 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
20875 * config/riscv/vector.md: Ditto.
20877 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20880 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
20881 and constraint for operand 0.
20882 (add_vec_concat_subst_be): Likewise.
20884 2023-05-23 Richard Biener <rguenther@suse.de>
20886 PR tree-optimization/109849
20887 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
20888 and use that to determine what to hoist.
20890 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
20892 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
20893 specific treatment for bit-fields only if they have an integral type
20894 and filter out non-integral bit-fields that do not start and end on
20897 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
20899 PR tree-optimization/109920
20900 * value-range.h (RESIZABLE>::~int_range): Use delete[].
20902 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
20904 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
20905 calcuation of integer vector mode costs to reflect generated
20906 instruction sequences of different integer vector modes and
20907 different target ABIs. Remove "speed" function argument.
20908 (ix86_rtx_costs): Update call for removed function argument.
20909 (ix86_vector_costs::add_stmt_cost): Ditto.
20911 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
20913 * value-range.h (class Value_Range): Implement set_zero,
20914 set_nonzero, and nonzero_p.
20916 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
20918 * config/i386/i386.cc (ix86_multiplication_cost): Add
20919 the cost of a memory read to the cost of V?QImode sequences.
20921 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20923 * config/riscv/riscv-v.cc: Add "m_" prefix.
20925 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20927 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
20928 multiple-rgroup of length.
20929 * tree-vect-stmts.cc (vectorizable_store): Ditto.
20930 (vectorizable_load): Ditto.
20931 * tree-vectorizer.h (vect_get_loop_len): Ditto.
20933 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20935 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
20938 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
20940 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
20941 handling for the case index == count.
20943 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
20946 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
20947 Don't fold to XOR / AND / XOR if just one bit is copied to the
20950 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
20952 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
20953 builtin for bit reversal using brev instruction.
20954 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
20955 NVPTX_BUILTIN_BREVLL.
20956 (nvptx_init_builtins): Define "brev" and "brevll".
20957 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
20958 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
20959 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
20960 section, document __builtin_nvptx_brev{,ll}.
20962 2023-05-21 Jakub Jelinek <jakub@redhat.com>
20964 PR tree-optimization/109505
20965 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
20966 Combine successive equal operations with constants,
20967 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
20968 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
20971 2023-05-21 Andrew Pinski <apinski@marvell.com>
20973 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
20975 2023-05-21 Pan Li <pan2.li@intel.com>
20977 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
20978 rest bool size, aka 2, 4, 8, 16, 32, 64.
20979 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
20980 Register vbool[2|4|8|16|32|64] interpret function.
20981 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
20982 New macro for vbool2_t.
20983 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
20984 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
20985 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
20986 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
20987 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
20988 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
20989 (vint16m1_t): Likewise.
20990 (vint32m1_t): Likewise.
20991 (vint64m1_t): Likewise.
20992 (vuint8m1_t): Likewise.
20993 (vuint16m1_t): Likewise.
20994 (vuint32m1_t): Likewise.
20995 (vuint64m1_t): Likewise.
20996 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
20997 New macro for vbool2_t.
20998 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
20999 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
21000 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
21001 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
21002 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
21003 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
21004 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
21005 vbool2_t interprect to base type.
21006 (bool4_interpret): Likewise.
21007 (bool8_interpret): Likewise.
21008 (bool16_interpret): Likewise.
21009 (bool32_interpret): Likewise.
21010 (bool64_interpret): Likewise.
21012 2023-05-21 Andrew Pinski <apinski@marvell.com>
21014 PR middle-end/109919
21015 * expr.cc (expand_single_bit_test): Don't use the
21016 target for expand_expr.
21018 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
21020 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
21023 2023-05-20 Pan Li <pan2.li@intel.com>
21025 * mode-switching.cc (entity_map): Initialize the array to zero.
21028 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
21031 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
21032 Remove superfluous "parallel" in insn pattern.
21033 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
21034 printing error text to assembly.
21036 2023-05-20 Andrew Pinski <apinski@marvell.com>
21038 * expr.cc (fold_single_bit_test): Rename to ...
21039 (expand_single_bit_test): This and expand directly.
21040 (do_store_flag): Update for the rename function.
21042 2023-05-20 Andrew Pinski <apinski@marvell.com>
21044 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
21045 instead of shift/and.
21047 2023-05-20 Andrew Pinski <apinski@marvell.com>
21049 * expr.cc (fold_single_bit_test): Add an assert
21050 and simplify based on code being NE_EXPR or EQ_EXPR.
21052 2023-05-20 Andrew Pinski <apinski@marvell.com>
21054 * expr.cc (fold_single_bit_test): Take inner and bitnum
21055 instead of arg0 and arg1. Update the code.
21056 (do_store_flag): Don't create a tree when calling
21057 fold_single_bit_test instead just call it with the bitnum
21058 and the inner tree.
21060 2023-05-20 Andrew Pinski <apinski@marvell.com>
21062 * expr.cc (fold_single_bit_test): Use get_def_for_expr
21063 instead of checking the inner's code.
21065 2023-05-20 Andrew Pinski <apinski@marvell.com>
21067 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
21068 (fold_single_bit_test): This and simplify.
21070 2023-05-20 Andrew Pinski <apinski@marvell.com>
21072 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
21074 (fold_single_bit_test): Likewise.
21075 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
21076 (fold_single_bit_test): Likewise and make static.
21077 * fold-const.h (fold_single_bit_test): Remove declaration.
21079 2023-05-20 Die Li <lidie@eswincomputing.com>
21081 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
21084 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21086 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
21088 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21091 * config/riscv/bitmanip.md
21092 (<bitmanip_optab>disi2): Match with any_extend.
21093 (<bitmanip_optab>disi2_sext): New pattern to match
21094 with sign extend using an ANDI instruction.
21096 2023-05-19 Nathan Sidwell <nathan@acm.org>
21099 * opts.h (handle_deferred_dump_options): Declare.
21100 * opts-global.cc (handle_common_deferred_options): Do not handle
21102 (handle_deferred_dump_options): New.
21103 * toplev.cc (toplev::main): Call it after plugin init.
21105 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
21107 * config/riscv/constraints.md (DsS, DsD): Restore agreement
21108 with shiftm1 mode attribute.
21110 2023-05-19 Andrew Pinski <apinski@marvell.com>
21113 * gcc.cc (default_compilers["@c-header"]): Add %w
21114 after the --output-pch.
21116 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
21118 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
21119 to hival, ASHIFT the corresponding regs.
21121 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
21123 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
21125 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21127 PR tree-optimization/105776
21128 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
21129 non-NULL, allow division statement to have a cast as single imm use
21130 rather than comparison/condition.
21131 (match_arith_overflow): In that case remove the cast stmt in addition
21132 to the division statement.
21134 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21136 PR tree-optimization/101856
21137 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
21138 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
21139 support it but umul_highpart_optab does.
21141 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
21143 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
21144 of tree_to_shwi on array indices. Minor tweaks.
21146 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21148 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
21149 * attribs.cc (diag_attr_exclusions): Ditto.
21150 (decl_attributes): Ditto.
21151 (build_type_attribute_qual_variant): Ditto.
21152 * builtins.cc (fold_builtin_carg): Ditto.
21153 (fold_builtin_next_arg): Ditto.
21154 (do_mpc_arg2): Ditto.
21155 * cfgexpand.cc (expand_return): Ditto.
21156 * cgraph.h (decl_in_symtab_p): Ditto.
21157 (symtab_node::get_create): Ditto.
21158 * dwarf2out.cc (base_type_die): Ditto.
21159 (implicit_ptr_descriptor): Ditto.
21160 (gen_array_type_die): Ditto.
21161 (gen_type_die_with_usage): Ditto.
21162 (optimize_location_into_implicit_ptr): Ditto.
21163 * expr.cc (do_store_flag): Ditto.
21164 * fold-const.cc (negate_expr_p): Ditto.
21165 (fold_negate_expr_1): Ditto.
21166 (fold_convert_const): Ditto.
21167 (fold_convert_loc): Ditto.
21168 (constant_boolean_node): Ditto.
21169 (fold_binary_op_with_conditional_arg): Ditto.
21170 (build_fold_addr_expr_with_type_loc): Ditto.
21171 (fold_comparison): Ditto.
21172 (fold_checksum_tree): Ditto.
21173 (tree_unary_nonnegative_warnv_p): Ditto.
21174 (integer_valued_real_unary_p): Ditto.
21175 (fold_read_from_constant_string): Ditto.
21176 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
21177 * gimple-expr.cc (useless_type_conversion_p): Ditto.
21178 (is_gimple_reg): Ditto.
21179 (is_gimple_asm_val): Ditto.
21180 (mark_addressable): Ditto.
21181 * gimple-expr.h (is_gimple_variable): Ditto.
21182 (virtual_operand_p): Ditto.
21183 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
21184 * gimplify.cc (gimplify_bind_expr): Ditto.
21185 (gimplify_return_expr): Ditto.
21186 (gimple_add_padding_init_for_auto_var): Ditto.
21187 (gimplify_addr_expr): Ditto.
21188 (omp_add_variable): Ditto.
21189 (omp_notice_variable): Ditto.
21190 (omp_get_base_pointer): Ditto.
21191 (omp_strip_components_and_deref): Ditto.
21192 (omp_strip_indirections): Ditto.
21193 (omp_accumulate_sibling_list): Ditto.
21194 (omp_build_struct_sibling_lists): Ditto.
21195 (gimplify_adjust_omp_clauses_1): Ditto.
21196 (gimplify_adjust_omp_clauses): Ditto.
21197 (gimplify_omp_for): Ditto.
21198 (goa_lhs_expr_p): Ditto.
21199 (gimplify_one_sizepos): Ditto.
21200 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
21201 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
21202 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
21203 (propagate_controlled_uses): Ditto.
21204 * ipa-sra.cc (type_prevails_p): Ditto.
21205 (scan_expr_access): Ditto.
21206 * optabs-tree.cc (optab_for_tree_code): Ditto.
21207 * toplev.cc (wrapup_global_declaration_1): Ditto.
21208 * trans-mem.cc (transaction_invariant_address_p): Ditto.
21209 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
21210 (verify_gimple_comparison): Ditto.
21211 (verify_gimple_assign_binary): Ditto.
21212 (verify_gimple_assign_single): Ditto.
21213 * tree-complex.cc (get_component_ssa_name): Ditto.
21214 * tree-emutls.cc (lower_emutls_2): Ditto.
21215 * tree-inline.cc (copy_tree_body_r): Ditto.
21216 (estimate_move_cost): Ditto.
21217 (copy_decl_for_dup_finish): Ditto.
21218 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
21219 (note_nonlocal_vla_type): Ditto.
21220 (convert_local_omp_clauses): Ditto.
21221 (remap_vla_decls): Ditto.
21222 (fixup_vla_decls): Ditto.
21223 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
21224 * tree-pretty-print.cc (print_declaration): Ditto.
21225 (print_call_name): Ditto.
21226 * tree-sra.cc (compare_access_positions): Ditto.
21227 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
21228 * tree-ssa-ccp.cc (get_default_value): Ditto.
21229 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
21230 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
21231 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
21232 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
21233 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
21234 * tree-ssa-sink.cc (statement_sink_location): Ditto.
21235 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
21236 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
21237 * tree-ssa-uninit.cc (warn_uninit): Ditto.
21238 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
21239 (non_rewritable_mem_ref_base): Ditto.
21240 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
21241 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
21242 * tree-vect-generic.cc (do_binop): Ditto.
21244 * tree-vect-stmts.cc (vect_init_vector): Ditto.
21245 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
21246 * tree.cc (sign_mask_for): Ditto.
21247 (verify_type_variant): Ditto.
21248 (gimple_canonical_types_compatible_p): Ditto.
21249 (verify_type): Ditto.
21250 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
21251 * var-tracking.cc (prepare_call_arguments): Ditto.
21252 (vt_add_function_parameters): Ditto.
21253 * varasm.cc (decode_addr_const): Ditto.
21255 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21257 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
21258 (lower_reduction_clauses): Ditto.
21259 (lower_send_clauses): Ditto.
21260 (lower_omp_task_reductions): Ditto.
21261 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
21262 (worker_single_copy): Ditto.
21263 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
21264 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
21266 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21268 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
21270 (lto_read_body_or_constructor): Ditto.
21271 * lto-streamer-out.cc (tree_is_indexable): Ditto.
21272 (lto_output_var_decl_ref): Ditto.
21273 (DFS::DFS_write_tree_body): Ditto.
21274 (wrap_refs): Ditto.
21275 (write_symbol_extension_info): Ditto.
21277 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21279 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
21280 defines from tree.h.
21281 (aarch64_mangle_type): Ditto.
21282 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
21283 (alpha_gimplify_va_arg_1): Ditto.
21284 * config/arc/arc.cc (arc_encode_section_info): Ditto.
21285 (arc_is_aux_reg_p): Ditto.
21286 (arc_is_uncached_mem_p): Ditto.
21287 (arc_handle_aux_attribute): Ditto.
21288 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
21289 (arm_handle_cmse_nonsecure_call): Ditto.
21290 (arm_set_default_type_attributes): Ditto.
21291 (arm_is_segment_info_known): Ditto.
21292 (arm_mangle_type): Ditto.
21293 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
21294 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
21295 (avr_decl_absdata_p): Ditto.
21296 (avr_insert_attributes): Ditto.
21297 (avr_section_type_flags): Ditto.
21298 (avr_encode_section_info): Ditto.
21299 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
21300 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
21301 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
21302 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
21303 (csky_mangle_type): Ditto.
21304 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
21305 * config/darwin.cc (is_objc_metadata): Ditto.
21306 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
21307 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
21308 * config/frv/frv.cc (frv_emit_movsi): Ditto.
21309 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
21310 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
21311 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
21312 * config/i386/i386-expand.cc: Ditto.
21313 * config/i386/i386.cc (type_natural_mode): Ditto.
21314 (ix86_function_arg): Ditto.
21315 (ix86_data_alignment): Ditto.
21316 (ix86_local_alignment): Ditto.
21317 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
21318 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
21319 (i386_pe_type_dllexport_p): Ditto.
21320 (i386_pe_adjust_class_at_definition): Ditto.
21321 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
21322 (i386_pe_binds_local_p): Ditto.
21323 (i386_pe_section_type_flags): Ditto.
21324 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
21325 (ia64_gimplify_va_arg): Ditto.
21326 (ia64_in_small_data_p): Ditto.
21327 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
21328 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
21329 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
21330 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
21331 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
21332 (mcore_encode_section_info): Ditto.
21333 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
21334 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
21335 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
21336 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
21337 (pass_in_memory): Ditto.
21338 (nvptx_generate_vector_shuffle): Ditto.
21339 (nvptx_lockless_update): Ditto.
21340 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
21341 (pa_function_value): Ditto.
21342 (pa_function_arg): Ditto.
21343 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
21344 (TEXT_SPACE_P): Ditto.
21345 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
21346 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
21347 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
21348 (riscv_mangle_type): Ditto.
21349 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
21350 (rl78_addsi3_internal): Ditto.
21351 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
21352 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
21353 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
21354 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
21355 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
21356 (rs6000_function_arg_advance_1): Ditto.
21357 (rs6000_function_arg): Ditto.
21358 (rs6000_pass_by_reference): Ditto.
21359 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
21360 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
21361 (rs6000_set_default_type_attributes): Ditto.
21362 (rs6000_elf_in_small_data_p): Ditto.
21363 (IN_NAMED_SECTION): Ditto.
21364 (rs6000_xcoff_encode_section_info): Ditto.
21365 (rs6000_function_value): Ditto.
21366 (invalid_arg_for_unprototyped_fn): Ditto.
21367 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
21368 (s390_vec_n_elem): Ditto.
21369 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
21370 (s390_function_arg_integer): Ditto.
21371 (s390_return_in_memory): Ditto.
21372 (s390_encode_section_info): Ditto.
21373 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
21374 (sh_function_value): Ditto.
21375 * config/sol2.cc (solaris_insert_attributes): Ditto.
21376 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
21377 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
21378 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
21379 (xstormy16_handle_below100_attribute): Ditto.
21380 * config/v850/v850.cc (v850_encode_section_info): Ditto.
21381 (v850_insert_attributes): Ditto.
21382 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
21383 (visium_return_in_memory): Ditto.
21384 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
21386 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
21388 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
21389 (ix86_expand_vecop_qihi): Add op2vec bool variable.
21390 Do not set REG_EQUAL note.
21391 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
21393 * config/i386/i386.cc (ix86_multiplication_cost): Handle
21394 V4QImode and V8QImode.
21395 * config/i386/mmx.md (mulv8qi3): New expander.
21397 * config/i386/sse.md (mulv8qi3): Remove.
21399 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
21401 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
21403 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
21405 PR bootstrap/105831
21406 * config.gcc: Use = operator instead of ==.
21408 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
21410 PR bootstrap/105831
21411 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
21412 * configure.ac: Likewise.
21413 * configure: Regenerate.
21415 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21417 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
21418 (__ARM_mve_coerce1): Remove.
21419 (__ARM_mve_coerce2): Remove.
21420 (__ARM_mve_coerce3): Remove.
21421 (__ARM_mve_coerce_i_scalar): New.
21422 (__ARM_mve_coerce_s8_ptr): New.
21423 (__ARM_mve_coerce_u8_ptr): New.
21424 (__ARM_mve_coerce_s16_ptr): New.
21425 (__ARM_mve_coerce_u16_ptr): New.
21426 (__ARM_mve_coerce_s32_ptr): New.
21427 (__ARM_mve_coerce_u32_ptr): New.
21428 (__ARM_mve_coerce_s64_ptr): New.
21429 (__ARM_mve_coerce_u64_ptr): New.
21430 (__ARM_mve_coerce_f_scalar): New.
21431 (__ARM_mve_coerce_f16_ptr): New.
21432 (__ARM_mve_coerce_f32_ptr): New.
21433 (__arm_vst4q): Change _coerce_ overloads.
21434 (__arm_vbicq): Change _coerce_ overloads.
21435 (__arm_vld1q): Change _coerce_ overloads.
21436 (__arm_vld1q_z): Change _coerce_ overloads.
21437 (__arm_vld2q): Change _coerce_ overloads.
21438 (__arm_vld4q): Change _coerce_ overloads.
21439 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
21440 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
21441 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
21442 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
21443 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
21444 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
21445 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
21446 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
21447 (__arm_vst1q_p): Change _coerce_ overloads.
21448 (__arm_vst2q): Change _coerce_ overloads.
21449 (__arm_vst1q): Change _coerce_ overloads.
21450 (__arm_vstrhq): Change _coerce_ overloads.
21451 (__arm_vstrhq_p): Change _coerce_ overloads.
21452 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
21453 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
21454 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
21455 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
21456 (__arm_vstrwq_p): Change _coerce_ overloads.
21457 (__arm_vstrwq): Change _coerce_ overloads.
21458 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
21459 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
21460 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
21461 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
21462 (__arm_vsetq_lane): Change _coerce_ overloads.
21463 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
21464 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
21465 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
21466 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
21467 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
21468 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
21469 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
21470 (__arm_vidupq_x_u8): Change _coerce_ overloads.
21471 (__arm_vddupq_x_u8): Change _coerce_ overloads.
21472 (__arm_vidupq_x_u16): Change _coerce_ overloads.
21473 (__arm_vddupq_x_u16): Change _coerce_ overloads.
21474 (__arm_vidupq_x_u32): Change _coerce_ overloads.
21475 (__arm_vddupq_x_u32): Change _coerce_ overloads.
21476 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
21477 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
21478 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
21479 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
21480 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
21481 (__arm_vidupq_u16): Change _coerce_ overloads.
21482 (__arm_vidupq_u32): Change _coerce_ overloads.
21483 (__arm_vidupq_u8): Change _coerce_ overloads.
21484 (__arm_vddupq_u16): Change _coerce_ overloads.
21485 (__arm_vddupq_u32): Change _coerce_ overloads.
21486 (__arm_vddupq_u8): Change _coerce_ overloads.
21487 (__arm_viwdupq_m): Change _coerce_ overloads.
21488 (__arm_viwdupq_u16): Change _coerce_ overloads.
21489 (__arm_viwdupq_u32): Change _coerce_ overloads.
21490 (__arm_viwdupq_u8): Change _coerce_ overloads.
21491 (__arm_vdwdupq_m): Change _coerce_ overloads.
21492 (__arm_vdwdupq_u16): Change _coerce_ overloads.
21493 (__arm_vdwdupq_u32): Change _coerce_ overloads.
21494 (__arm_vdwdupq_u8): Change _coerce_ overloads.
21495 (__arm_vstrbq): Change _coerce_ overloads.
21496 (__arm_vstrbq_p): Change _coerce_ overloads.
21497 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
21498 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
21499 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
21500 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
21501 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
21503 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21505 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
21508 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21510 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
21511 (__arm_vadcq_u32): Likewise.
21512 (__arm_vadcq_m_s32): Likewise.
21513 (__arm_vadcq_m_u32): Likewise.
21514 (__arm_vsbcq_s32): Likewise.
21515 (__arm_vsbcq_u32): Likewise.
21516 (__arm_vsbcq_m_s32): Likewise.
21517 (__arm_vsbcq_m_u32): Likewise.
21518 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
21520 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
21522 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
21523 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
21524 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
21525 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
21526 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
21527 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
21528 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
21529 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
21530 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
21531 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
21532 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
21533 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
21534 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
21535 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
21536 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
21537 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
21538 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
21539 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
21540 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
21541 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
21542 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
21543 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
21544 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
21545 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
21546 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
21547 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
21548 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
21549 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
21550 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
21551 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
21552 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
21553 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
21554 (mve_vorrq_m_f<mode>)
21555 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
21556 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
21557 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
21558 capitalization in the emitted asm.
21560 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
21562 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
21564 (Ri): Move constraint definition from predicates.md.
21565 (Rl): Define new constraint.
21566 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
21567 missing constraint.
21568 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
21569 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
21570 op 2. Fix asm output spacing.
21571 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
21572 * config/arm/predicates.md (Ri) Move constraint to constraints.md
21573 (mve_vldrd_immediate): Move it from
21575 (mve_vstrw_immediate): New predicate.
21577 2023-05-18 Pan Li <pan2.li@intel.com>
21578 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21579 Kito Cheng <kito.cheng@sifive.com>
21580 Richard Biener <rguenther@suse.de>
21581 Richard Sandiford <richard.sandiford@arm.com>
21583 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
21584 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
21585 (struct table_elt): Extend machine_mode to 16 bits.
21586 (struct set): Ditto.
21587 * genmodes.cc (emit_mode_wider): Extend type from char to short.
21588 (emit_mode_complex): Ditto.
21589 (emit_mode_inner): Ditto.
21590 (emit_class_narrowest_mode): Ditto.
21591 * genopinit.cc (main): Extend the machine_mode limit.
21592 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
21593 re-ordered the struct fields for padding.
21594 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
21595 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
21596 (get_mode_alignment): Extend type from char to short.
21597 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
21598 removed the ATTRIBUTE_PACKED.
21599 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
21600 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
21601 m_kind to 2 bits and remove m_spare.
21602 * rtl.h (RTX_CODE_BITSIZE): New macro.
21603 (struct rtx_def): Swap both the bit size and location between the
21604 rtx_code and the machine_mode.
21605 (subreg_shape::unique_id): Extend the machine_mode limit.
21606 * rtlanal.h: Extend machine_mode to 16 bits.
21607 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
21608 bits and re-ordered the struct fields for padding.
21609 (struct tree_decl_common): Extend machine_mode to 16 bits.
21611 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
21613 * genrecog.cc (print_nonbool_test): Fix type error of
21614 switch (SUBREG_BYTE (op))'.
21616 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
21618 * common/config/riscv/riscv-common.cc: Remove
21619 trailing spaces on lines.
21620 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
21621 * config/riscv/riscv.h (enum reg_class): Likewise.
21622 * config/riscv/riscv.md: Likewise.
21624 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
21626 * config/pa/pa.md (clear_cache): New.
21628 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
21630 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
21631 parenthesis. Fix misnamed index entry.
21632 <concept>: Fix misnamed index entry.
21634 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
21636 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
21638 (*<optab>si3_mask, *<optab>di3_mask): Here.
21639 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
21640 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
21642 (*<bitmanip_optab>si3_sext_mask): Likewise.
21643 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
21644 and const_di_mask_operand.
21645 (bitmanip_rotate): New iterator.
21646 (bitmanip_optab): Add rotates.
21647 * config/riscv/predicates.md (const_si_mask_operand): Renamed
21648 from const31_operand. Generalize to handle more mask constants.
21649 (const_di_mask_operand): Similarly.
21651 2023-05-17 Jakub Jelinek <jakub@redhat.com>
21654 * config/i386/i386-builtin-types.def (FLOAT128): Use
21655 float128t_type_node rather than float128_type_node.
21657 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
21659 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
21660 FP_CONTRACT_FAST (no functional change).
21662 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
21664 * config/i386/i386.cc (ix86_multiplication_cost): Correct
21665 calcuation of integer vector mode costs to reflect generated
21666 instruction sequences of different integer vector modes and
21667 different target ABIs.
21669 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21671 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
21672 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
21673 (riscv_mode_needed): Ditto.
21674 (riscv_mode_after): Ditto.
21675 (riscv_mode_entry): Ditto.
21676 (riscv_mode_exit): Ditto.
21677 (riscv_mode_priority): Ditto.
21678 (TARGET_MODE_EMIT): New target hook.
21679 (TARGET_MODE_NEEDED): Ditto.
21680 (TARGET_MODE_AFTER): Ditto.
21681 (TARGET_MODE_ENTRY): Ditto.
21682 (TARGET_MODE_EXIT): Ditto.
21683 (TARGET_MODE_PRIORITY): Ditto.
21684 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
21685 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
21686 * config/riscv/riscv.md: Add csrwvxrm.
21687 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
21688 (vxrmsi): New pattern.
21690 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21692 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
21693 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
21694 (struct narrow_alu_def): Ditto.
21695 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
21696 (function_expander::use_exact_insn): Ditto.
21697 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
21698 (function_base::has_rounding_mode_operand_p): New function.
21700 2023-05-17 Andrew Pinski <apinski@marvell.com>
21702 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
21703 against 0 instead of calling integer_zerop.
21705 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21707 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
21708 (DEF_RVV_VXRM_ENUM): New macro.
21709 (handle_pragma_vector): Add vxrm enum register.
21710 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
21716 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
21718 * value-range.h (Value_Range::operator=): New.
21720 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
21722 * value-range.cc (vrange::operator=): Add a stub to copy
21723 unsupported ranges.
21724 * value-range.h (is_a <unsupported_range>): New.
21725 (Value_Range::operator=): Support copying unsupported ranges.
21727 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
21729 * data-streamer-in.cc (streamer_read_real_value): New.
21730 (streamer_read_value_range): New.
21731 * data-streamer-out.cc (streamer_write_real_value): New.
21732 (streamer_write_vrange): New.
21733 * data-streamer.h (streamer_write_vrange): New.
21734 (streamer_read_value_range): New.
21736 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
21739 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
21740 is ignored for a fixed underlying type.
21741 (C++ Dialect Options): Likewise for -fstrict-enums.
21743 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
21745 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
21748 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
21750 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
21752 (s390_atomic_align_for_mode): New.
21754 2023-05-17 Jakub Jelinek <jakub@redhat.com>
21756 * wide-int.cc (wi::from_array): Add missing closing paren in function
21759 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
21761 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
21762 suggested unroll factor once the previous analysis fails.
21764 2023-05-17 Pan Li <pan2.li@intel.com>
21766 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
21768 (main): Add bool1 to the type indexer.
21769 * config/riscv/riscv-vector-builtins-functions.def
21770 (vreinterpret): Register vbool1 interpret function.
21771 * config/riscv/riscv-vector-builtins-types.def
21772 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
21773 (vint8m1_t): Add the type to bool1_interpret_ops.
21774 (vint16m1_t): Ditto.
21775 (vint32m1_t): Ditto.
21776 (vint64m1_t): Ditto.
21777 (vuint8m1_t): Ditto.
21778 (vuint16m1_t): Ditto.
21779 (vuint32m1_t): Ditto.
21780 (vuint64m1_t): Ditto.
21781 * config/riscv/riscv-vector-builtins.cc
21782 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
21783 (required_extensions_p): Add bool1 interpret case.
21784 * config/riscv/riscv-vector-builtins.def
21785 (bool1_interpret): Add bool1 interpret to base type.
21786 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
21787 with VB dest for vreinterpret.
21789 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
21792 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
21793 constants through "lis; xoris".
21795 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
21797 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
21798 default rs6000 target pass for O2 and above.
21799 * doc/invoke.texi: Document -free
21801 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
21803 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
21804 Fix wrong select_kind...
21806 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
21808 * config/s390/s390-protos.h (s390_expand_setmem): Change
21809 function signature.
21810 * config/s390/s390.cc (s390_expand_setmem): For memset's less
21811 than or equal to 256 byte do not perform a libc call.
21812 * config/s390/s390.md: Change expander into a version which
21815 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
21817 * config/s390/s390-protos.h (s390_expand_movmem): New.
21818 * config/s390/s390.cc (s390_expand_movmem): New.
21819 * config/s390/s390.md (movmem<mode>): New.
21823 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
21825 * config/s390/s390-protos.h (s390_expand_cpymem): Change
21826 function signature.
21827 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
21828 than or equal to 256 byte do not perform a libc call.
21829 (s390_expand_insv): Adapt new function signature of
21830 s390_expand_cpymem.
21831 * config/s390/s390.md: Change expander into a version which
21834 2023-05-16 Andrew Pinski <apinski@marvell.com>
21836 PR tree-optimization/109424
21837 * match.pd: Add patterns for min/max of zero_one_valued
21840 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21842 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
21843 * config/riscv/riscv-vector-builtins.cc
21844 (function_expander::use_ternop_insn): Add default rounding mode.
21845 (function_expander::use_widen_ternop_insn): Ditto.
21846 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
21847 (riscv_hard_regno_mode_ok): Ditto.
21848 (riscv_conditional_register_usage): Ditto.
21849 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
21850 (FRM_REG_P): Ditto.
21851 (RISCV_DWARF_FRM): Ditto.
21852 * config/riscv/riscv.md: Ditto.
21853 * config/riscv/vector-iterators.md: split no frm and has frm operations.
21854 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
21855 (@pred_<optab><mode>): Ditto.
21857 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
21859 PR tree-optimization/109695
21860 * value-range.cc (irange::operator=): Resize range.
21861 (irange::union_): Same.
21862 (irange::intersect): Same.
21863 (irange::invert): Same.
21864 (int_range_max): Default to 3 sub-ranges and resize as needed.
21865 * value-range.h (irange::maybe_resize): New.
21867 (int_range::int_range): Adjust for resizing.
21868 (int_range::operator=): Same.
21870 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
21872 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
21874 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
21875 when range changed.
21877 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21879 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
21880 * config/riscv/riscv-vector-builtins.cc
21881 (function_expander::use_exact_insn): Add default rounding mode operand.
21882 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
21883 (riscv_hard_regno_mode_ok): Ditto.
21884 (riscv_conditional_register_usage): Ditto.
21885 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
21886 (VXRM_REG_P): Ditto.
21887 (RISCV_DWARF_VXRM): Ditto.
21888 * config/riscv/riscv.md: Ditto.
21889 * config/riscv/vector.md: Ditto
21891 2023-05-15 Pan Li <pan2.li@intel.com>
21893 * optabs.cc (maybe_gen_insn): Add case to generate instruction
21894 that has 11 operands.
21896 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21898 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
21899 logic for vector modes.
21901 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21904 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
21905 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
21906 (aarch64_cmtst<mode>): Rename to...
21907 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
21908 (*aarch64_cmtst_same_<mode>): Rename to...
21909 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
21910 (*aarch64_cmtstdi): Rename to...
21911 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
21912 (aarch64_fac<optab><mode>): Rename to...
21913 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
21915 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21918 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
21919 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
21921 2023-05-15 Pan Li <pan2.li@intel.com>
21922 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21923 kito-cheng <kito.cheng@sifive.com>
21925 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
21926 deciding the mode is constant or not.
21927 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
21929 2023-05-15 Richard Biener <rguenther@suse.de>
21931 PR tree-optimization/109848
21932 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
21933 TARGET_MEM_REF address preparation before the store, not
21936 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21938 * config/riscv/riscv.cc
21939 (riscv_vectorize_preferred_vector_alignment): New function.
21940 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
21942 2023-05-14 Andrew Pinski <apinski@marvell.com>
21944 PR tree-optimization/109829
21945 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
21947 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
21950 * config/i386/i386.cc: Revert the 2023-05-11 change.
21951 (ix86_widen_mult_cost): Return high value instead of
21952 ICEing for unsupported modes.
21954 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
21956 * config/i386/i386.cc (x86_function_profiler): Take
21957 ix86_direct_extern_access into account when generating calls
21960 2023-05-14 Pan Li <pan2.li@intel.com>
21962 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
21963 Refactor the or pattern to switch cases.
21965 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21967 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
21968 aarch64_expand_vector_init to this, and remove interleaving case.
21969 Recursively call aarch64_expand_vector_init_fallback, instead of
21970 aarch64_expand_vector_init.
21971 (aarch64_unzip_vector_init): New function.
21972 (aarch64_expand_vector_init): Likewise.
21974 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
21976 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
21977 Pull out function call from the gcc_assert.
21979 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
21981 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
21982 (policy_to_str): New.
21983 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
21985 2023-05-13 Andrew Pinski <apinski@marvell.com>
21987 PR tree-optimization/109834
21988 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
21989 (popcount(rotate(x,y))->popcount(x)): Likewise.
21991 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
21993 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
21994 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
21995 gen_extend_insn to generate zero/sign extension instructions.
21997 (ix86_expand_vecop_qihi): Initialize interleave functions
21998 for MULT code only. Fix comments.
22000 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
22003 * config/i386/mmx.md (mulv2si3): Remove expander.
22004 (mulv2si3): Rename insn pattern from *mulv2si.
22006 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
22008 PR libstdc++/109816
22009 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
22010 '!lto_stream_offload_p'.
22012 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
22013 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22016 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
22017 (local_avl_compatible_p): New.
22018 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
22019 for LCM, rewrite as a backward algorithm.
22020 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
22021 interface, handle a BB at once.
22023 2023-05-12 Richard Biener <rguenther@suse.de>
22025 PR tree-optimization/64731
22026 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
22027 handle TARGET_MEM_REF destinations of stores from vector
22030 2023-05-12 Richard Biener <rguenther@suse.de>
22032 PR tree-optimization/109791
22033 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
22035 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
22038 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22040 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
22041 * config/arm/arm-mve-builtins-base.def (vsriq): New.
22042 * config/arm/arm-mve-builtins-base.h (vsriq): New.
22043 * config/arm/arm-mve-builtins.cc
22044 (function_instance::has_inactive_argument): Handle vsriq.
22045 * config/arm/arm_mve.h (vsriq): Remove.
22047 (vsriq_n_u8): Remove.
22048 (vsriq_n_s8): Remove.
22049 (vsriq_n_u16): Remove.
22050 (vsriq_n_s16): Remove.
22051 (vsriq_n_u32): Remove.
22052 (vsriq_n_s32): Remove.
22053 (vsriq_m_n_s8): Remove.
22054 (vsriq_m_n_u8): Remove.
22055 (vsriq_m_n_s16): Remove.
22056 (vsriq_m_n_u16): Remove.
22057 (vsriq_m_n_s32): Remove.
22058 (vsriq_m_n_u32): Remove.
22059 (__arm_vsriq_n_u8): Remove.
22060 (__arm_vsriq_n_s8): Remove.
22061 (__arm_vsriq_n_u16): Remove.
22062 (__arm_vsriq_n_s16): Remove.
22063 (__arm_vsriq_n_u32): Remove.
22064 (__arm_vsriq_n_s32): Remove.
22065 (__arm_vsriq_m_n_s8): Remove.
22066 (__arm_vsriq_m_n_u8): Remove.
22067 (__arm_vsriq_m_n_s16): Remove.
22068 (__arm_vsriq_m_n_u16): Remove.
22069 (__arm_vsriq_m_n_s32): Remove.
22070 (__arm_vsriq_m_n_u32): Remove.
22071 (__arm_vsriq): Remove.
22072 (__arm_vsriq_m): Remove.
22074 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22076 * config/arm/iterators.md (mve_insn): Add vsri.
22077 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
22078 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
22079 (mve_vsriq_m_n_<supf><mode>): Rename into ...
22080 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22082 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22084 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
22085 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
22087 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22089 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
22090 * config/arm/arm-mve-builtins-base.def (vsliq): New.
22091 * config/arm/arm-mve-builtins-base.h (vsliq): New.
22092 * config/arm/arm-mve-builtins.cc
22093 (function_instance::has_inactive_argument): Handle vsliq.
22094 * config/arm/arm_mve.h (vsliq): Remove.
22096 (vsliq_n_u8): Remove.
22097 (vsliq_n_s8): Remove.
22098 (vsliq_n_u16): Remove.
22099 (vsliq_n_s16): Remove.
22100 (vsliq_n_u32): Remove.
22101 (vsliq_n_s32): Remove.
22102 (vsliq_m_n_s8): Remove.
22103 (vsliq_m_n_s32): Remove.
22104 (vsliq_m_n_s16): Remove.
22105 (vsliq_m_n_u8): Remove.
22106 (vsliq_m_n_u32): Remove.
22107 (vsliq_m_n_u16): Remove.
22108 (__arm_vsliq_n_u8): Remove.
22109 (__arm_vsliq_n_s8): Remove.
22110 (__arm_vsliq_n_u16): Remove.
22111 (__arm_vsliq_n_s16): Remove.
22112 (__arm_vsliq_n_u32): Remove.
22113 (__arm_vsliq_n_s32): Remove.
22114 (__arm_vsliq_m_n_s8): Remove.
22115 (__arm_vsliq_m_n_s32): Remove.
22116 (__arm_vsliq_m_n_s16): Remove.
22117 (__arm_vsliq_m_n_u8): Remove.
22118 (__arm_vsliq_m_n_u32): Remove.
22119 (__arm_vsliq_m_n_u16): Remove.
22120 (__arm_vsliq): Remove.
22121 (__arm_vsliq_m): Remove.
22123 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22125 * config/arm/iterators.md (mve_insn>): Add vsli.
22126 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
22127 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22128 (mve_vsliq_m_n_<supf><mode>): Rename into ...
22129 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22131 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22133 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
22134 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
22136 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22138 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
22139 * config/arm/arm-mve-builtins-base.def (vpselq): New.
22140 * config/arm/arm-mve-builtins-base.h (vpselq): New.
22141 * config/arm/arm_mve.h (vpselq): Remove.
22142 (vpselq_u8): Remove.
22143 (vpselq_s8): Remove.
22144 (vpselq_u16): Remove.
22145 (vpselq_s16): Remove.
22146 (vpselq_u32): Remove.
22147 (vpselq_s32): Remove.
22148 (vpselq_u64): Remove.
22149 (vpselq_s64): Remove.
22150 (vpselq_f16): Remove.
22151 (vpselq_f32): Remove.
22152 (__arm_vpselq_u8): Remove.
22153 (__arm_vpselq_s8): Remove.
22154 (__arm_vpselq_u16): Remove.
22155 (__arm_vpselq_s16): Remove.
22156 (__arm_vpselq_u32): Remove.
22157 (__arm_vpselq_s32): Remove.
22158 (__arm_vpselq_u64): Remove.
22159 (__arm_vpselq_s64): Remove.
22160 (__arm_vpselq_f16): Remove.
22161 (__arm_vpselq_f32): Remove.
22162 (__arm_vpselq): Remove.
22164 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22166 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
22167 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
22169 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22171 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
22173 * config/arm/iterators.md (MVE_VPSELQ_F): New.
22174 (mve_insn): Add vpsel.
22175 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
22176 (@mve_<mve_insn>q_<supf><mode>): ... this.
22177 (@mve_vpselq_f<mode>): Rename into ...
22178 (@mve_<mve_insn>q_f<mode>): ... this.
22180 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22182 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
22183 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
22184 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
22185 * config/arm/arm-mve-builtins.cc
22186 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
22188 * config/arm/arm_mve.h (vfmaq): Remove.
22192 (vfmasq_m): Remove.
22194 (vfmaq_f16): Remove.
22195 (vfmaq_n_f16): Remove.
22196 (vfmasq_n_f16): Remove.
22197 (vfmsq_f16): Remove.
22198 (vfmaq_f32): Remove.
22199 (vfmaq_n_f32): Remove.
22200 (vfmasq_n_f32): Remove.
22201 (vfmsq_f32): Remove.
22202 (vfmaq_m_f32): Remove.
22203 (vfmaq_m_f16): Remove.
22204 (vfmaq_m_n_f32): Remove.
22205 (vfmaq_m_n_f16): Remove.
22206 (vfmasq_m_n_f32): Remove.
22207 (vfmasq_m_n_f16): Remove.
22208 (vfmsq_m_f32): Remove.
22209 (vfmsq_m_f16): Remove.
22210 (__arm_vfmaq_f16): Remove.
22211 (__arm_vfmaq_n_f16): Remove.
22212 (__arm_vfmasq_n_f16): Remove.
22213 (__arm_vfmsq_f16): Remove.
22214 (__arm_vfmaq_f32): Remove.
22215 (__arm_vfmaq_n_f32): Remove.
22216 (__arm_vfmasq_n_f32): Remove.
22217 (__arm_vfmsq_f32): Remove.
22218 (__arm_vfmaq_m_f32): Remove.
22219 (__arm_vfmaq_m_f16): Remove.
22220 (__arm_vfmaq_m_n_f32): Remove.
22221 (__arm_vfmaq_m_n_f16): Remove.
22222 (__arm_vfmasq_m_n_f32): Remove.
22223 (__arm_vfmasq_m_n_f16): Remove.
22224 (__arm_vfmsq_m_f32): Remove.
22225 (__arm_vfmsq_m_f16): Remove.
22226 (__arm_vfmaq): Remove.
22227 (__arm_vfmasq): Remove.
22228 (__arm_vfmsq): Remove.
22229 (__arm_vfmaq_m): Remove.
22230 (__arm_vfmasq_m): Remove.
22231 (__arm_vfmsq_m): Remove.
22233 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22235 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
22237 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
22238 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
22239 (mve_insn): Add vfma, vfmas, vfms.
22240 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
22242 (@mve_<mve_insn>q_f<mode>): ... this.
22243 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
22244 (@mve_<mve_insn>q_n_f<mode>): ... this.
22245 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
22246 @mve_<mve_insn>q_m_f<mode>.
22247 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
22248 @mve_<mve_insn>q_m_n_f<mode>.
22250 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22252 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
22253 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
22255 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22257 * config/arm/arm-mve-builtins-base.cc
22258 (FUNCTION_WITH_RTX_M_N_NO_F): New.
22260 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
22261 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
22262 * config/arm/arm_mve.h (vmvnq): Remove.
22265 (vmvnq_s8): Remove.
22266 (vmvnq_s16): Remove.
22267 (vmvnq_s32): Remove.
22268 (vmvnq_n_s16): Remove.
22269 (vmvnq_n_s32): Remove.
22270 (vmvnq_u8): Remove.
22271 (vmvnq_u16): Remove.
22272 (vmvnq_u32): Remove.
22273 (vmvnq_n_u16): Remove.
22274 (vmvnq_n_u32): Remove.
22275 (vmvnq_m_u8): Remove.
22276 (vmvnq_m_s8): Remove.
22277 (vmvnq_m_u16): Remove.
22278 (vmvnq_m_s16): Remove.
22279 (vmvnq_m_u32): Remove.
22280 (vmvnq_m_s32): Remove.
22281 (vmvnq_m_n_s16): Remove.
22282 (vmvnq_m_n_u16): Remove.
22283 (vmvnq_m_n_s32): Remove.
22284 (vmvnq_m_n_u32): Remove.
22285 (vmvnq_x_s8): Remove.
22286 (vmvnq_x_s16): Remove.
22287 (vmvnq_x_s32): Remove.
22288 (vmvnq_x_u8): Remove.
22289 (vmvnq_x_u16): Remove.
22290 (vmvnq_x_u32): Remove.
22291 (vmvnq_x_n_s16): Remove.
22292 (vmvnq_x_n_s32): Remove.
22293 (vmvnq_x_n_u16): Remove.
22294 (vmvnq_x_n_u32): Remove.
22295 (__arm_vmvnq_s8): Remove.
22296 (__arm_vmvnq_s16): Remove.
22297 (__arm_vmvnq_s32): Remove.
22298 (__arm_vmvnq_n_s16): Remove.
22299 (__arm_vmvnq_n_s32): Remove.
22300 (__arm_vmvnq_u8): Remove.
22301 (__arm_vmvnq_u16): Remove.
22302 (__arm_vmvnq_u32): Remove.
22303 (__arm_vmvnq_n_u16): Remove.
22304 (__arm_vmvnq_n_u32): Remove.
22305 (__arm_vmvnq_m_u8): Remove.
22306 (__arm_vmvnq_m_s8): Remove.
22307 (__arm_vmvnq_m_u16): Remove.
22308 (__arm_vmvnq_m_s16): Remove.
22309 (__arm_vmvnq_m_u32): Remove.
22310 (__arm_vmvnq_m_s32): Remove.
22311 (__arm_vmvnq_m_n_s16): Remove.
22312 (__arm_vmvnq_m_n_u16): Remove.
22313 (__arm_vmvnq_m_n_s32): Remove.
22314 (__arm_vmvnq_m_n_u32): Remove.
22315 (__arm_vmvnq_x_s8): Remove.
22316 (__arm_vmvnq_x_s16): Remove.
22317 (__arm_vmvnq_x_s32): Remove.
22318 (__arm_vmvnq_x_u8): Remove.
22319 (__arm_vmvnq_x_u16): Remove.
22320 (__arm_vmvnq_x_u32): Remove.
22321 (__arm_vmvnq_x_n_s16): Remove.
22322 (__arm_vmvnq_x_n_s32): Remove.
22323 (__arm_vmvnq_x_n_u16): Remove.
22324 (__arm_vmvnq_x_n_u32): Remove.
22325 (__arm_vmvnq): Remove.
22326 (__arm_vmvnq_m): Remove.
22327 (__arm_vmvnq_x): Remove.
22329 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22331 * config/arm/iterators.md (mve_insn): Add vmvn.
22332 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
22333 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22334 (mve_vmvnq_m_<supf><mode>): Rename into ...
22335 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22336 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
22337 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22339 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22341 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
22342 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
22344 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22346 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
22347 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
22348 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
22349 * config/arm/arm_mve.h (vbrsrq): Remove.
22350 (vbrsrq_m): Remove.
22351 (vbrsrq_x): Remove.
22352 (vbrsrq_n_f16): Remove.
22353 (vbrsrq_n_f32): Remove.
22354 (vbrsrq_n_u8): Remove.
22355 (vbrsrq_n_s8): Remove.
22356 (vbrsrq_n_u16): Remove.
22357 (vbrsrq_n_s16): Remove.
22358 (vbrsrq_n_u32): Remove.
22359 (vbrsrq_n_s32): Remove.
22360 (vbrsrq_m_n_s8): Remove.
22361 (vbrsrq_m_n_s32): Remove.
22362 (vbrsrq_m_n_s16): Remove.
22363 (vbrsrq_m_n_u8): Remove.
22364 (vbrsrq_m_n_u32): Remove.
22365 (vbrsrq_m_n_u16): Remove.
22366 (vbrsrq_m_n_f32): Remove.
22367 (vbrsrq_m_n_f16): Remove.
22368 (vbrsrq_x_n_s8): Remove.
22369 (vbrsrq_x_n_s16): Remove.
22370 (vbrsrq_x_n_s32): Remove.
22371 (vbrsrq_x_n_u8): Remove.
22372 (vbrsrq_x_n_u16): Remove.
22373 (vbrsrq_x_n_u32): Remove.
22374 (vbrsrq_x_n_f16): Remove.
22375 (vbrsrq_x_n_f32): Remove.
22376 (__arm_vbrsrq_n_u8): Remove.
22377 (__arm_vbrsrq_n_s8): Remove.
22378 (__arm_vbrsrq_n_u16): Remove.
22379 (__arm_vbrsrq_n_s16): Remove.
22380 (__arm_vbrsrq_n_u32): Remove.
22381 (__arm_vbrsrq_n_s32): Remove.
22382 (__arm_vbrsrq_m_n_s8): Remove.
22383 (__arm_vbrsrq_m_n_s32): Remove.
22384 (__arm_vbrsrq_m_n_s16): Remove.
22385 (__arm_vbrsrq_m_n_u8): Remove.
22386 (__arm_vbrsrq_m_n_u32): Remove.
22387 (__arm_vbrsrq_m_n_u16): Remove.
22388 (__arm_vbrsrq_x_n_s8): Remove.
22389 (__arm_vbrsrq_x_n_s16): Remove.
22390 (__arm_vbrsrq_x_n_s32): Remove.
22391 (__arm_vbrsrq_x_n_u8): Remove.
22392 (__arm_vbrsrq_x_n_u16): Remove.
22393 (__arm_vbrsrq_x_n_u32): Remove.
22394 (__arm_vbrsrq_n_f16): Remove.
22395 (__arm_vbrsrq_n_f32): Remove.
22396 (__arm_vbrsrq_m_n_f32): Remove.
22397 (__arm_vbrsrq_m_n_f16): Remove.
22398 (__arm_vbrsrq_x_n_f16): Remove.
22399 (__arm_vbrsrq_x_n_f32): Remove.
22400 (__arm_vbrsrq): Remove.
22401 (__arm_vbrsrq_m): Remove.
22402 (__arm_vbrsrq_x): Remove.
22404 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22406 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
22407 (mve_insn): Add vbrsr.
22408 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
22409 (@mve_<mve_insn>q_n_f<mode>): ... this.
22410 (mve_vbrsrq_n_<supf><mode>): Rename into ...
22411 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22412 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
22413 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22414 (mve_vbrsrq_m_n_f<mode>): Rename into ...
22415 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
22417 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22419 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
22420 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
22422 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22424 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
22425 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
22426 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
22427 * config/arm/arm_mve.h (vqshluq): Remove.
22428 (vqshluq_m): Remove.
22429 (vqshluq_n_s8): Remove.
22430 (vqshluq_n_s16): Remove.
22431 (vqshluq_n_s32): Remove.
22432 (vqshluq_m_n_s8): Remove.
22433 (vqshluq_m_n_s16): Remove.
22434 (vqshluq_m_n_s32): Remove.
22435 (__arm_vqshluq_n_s8): Remove.
22436 (__arm_vqshluq_n_s16): Remove.
22437 (__arm_vqshluq_n_s32): Remove.
22438 (__arm_vqshluq_m_n_s8): Remove.
22439 (__arm_vqshluq_m_n_s16): Remove.
22440 (__arm_vqshluq_m_n_s32): Remove.
22441 (__arm_vqshluq): Remove.
22442 (__arm_vqshluq_m): Remove.
22444 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22446 * config/arm/iterators.md (mve_insn): Add vqshlu.
22447 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
22448 (VQSHLUQ_M_N, VQSHLUQ_N): New.
22449 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
22450 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22451 (mve_vqshluq_m_n_s<mode>): Change name into ...
22452 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22454 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22456 * config/arm/arm-mve-builtins-shapes.cc
22457 (binary_lshift_unsigned): New.
22458 * config/arm/arm-mve-builtins-shapes.h
22459 (binary_lshift_unsigned): New.
22461 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22463 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
22464 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
22465 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
22466 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
22467 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
22468 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
22469 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
22470 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
22471 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
22472 (vrmlaldavhaxq): Remove.
22473 (vrmlsldavhaq): Remove.
22474 (vrmlsldavhaxq): Remove.
22475 (vrmlaldavhaq_p): Remove.
22476 (vrmlaldavhaxq_p): Remove.
22477 (vrmlsldavhaq_p): Remove.
22478 (vrmlsldavhaxq_p): Remove.
22479 (vrmlaldavhaq_s32): Remove.
22480 (vrmlaldavhaq_u32): Remove.
22481 (vrmlaldavhaxq_s32): Remove.
22482 (vrmlsldavhaq_s32): Remove.
22483 (vrmlsldavhaxq_s32): Remove.
22484 (vrmlaldavhaq_p_s32): Remove.
22485 (vrmlaldavhaq_p_u32): Remove.
22486 (vrmlaldavhaxq_p_s32): Remove.
22487 (vrmlsldavhaq_p_s32): Remove.
22488 (vrmlsldavhaxq_p_s32): Remove.
22489 (__arm_vrmlaldavhaq_s32): Remove.
22490 (__arm_vrmlaldavhaq_u32): Remove.
22491 (__arm_vrmlaldavhaxq_s32): Remove.
22492 (__arm_vrmlsldavhaq_s32): Remove.
22493 (__arm_vrmlsldavhaxq_s32): Remove.
22494 (__arm_vrmlaldavhaq_p_s32): Remove.
22495 (__arm_vrmlaldavhaq_p_u32): Remove.
22496 (__arm_vrmlaldavhaxq_p_s32): Remove.
22497 (__arm_vrmlsldavhaq_p_s32): Remove.
22498 (__arm_vrmlsldavhaxq_p_s32): Remove.
22499 (__arm_vrmlaldavhaq): Remove.
22500 (__arm_vrmlaldavhaxq): Remove.
22501 (__arm_vrmlsldavhaq): Remove.
22502 (__arm_vrmlsldavhaxq): Remove.
22503 (__arm_vrmlaldavhaq_p): Remove.
22504 (__arm_vrmlaldavhaxq_p): Remove.
22505 (__arm_vrmlsldavhaq_p): Remove.
22506 (__arm_vrmlsldavhaxq_p): Remove.
22508 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22510 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
22511 (MVE_VRMLxLDAVHAxQ_P): New.
22512 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
22514 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
22515 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
22517 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
22518 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
22519 (mve_vrmlsldavhaq_sv4si): Merge into ...
22520 (@mve_<mve_insn>q_<supf>v4si): ... this.
22521 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
22522 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
22523 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
22524 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
22526 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22528 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
22529 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
22531 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
22532 * config/arm/arm_mve.h (vqdmulltq): Remove.
22533 (vqdmullbq): Remove.
22534 (vqdmullbq_m): Remove.
22535 (vqdmulltq_m): Remove.
22536 (vqdmulltq_s16): Remove.
22537 (vqdmulltq_n_s16): Remove.
22538 (vqdmullbq_s16): Remove.
22539 (vqdmullbq_n_s16): Remove.
22540 (vqdmulltq_s32): Remove.
22541 (vqdmulltq_n_s32): Remove.
22542 (vqdmullbq_s32): Remove.
22543 (vqdmullbq_n_s32): Remove.
22544 (vqdmullbq_m_n_s32): Remove.
22545 (vqdmullbq_m_n_s16): Remove.
22546 (vqdmullbq_m_s32): Remove.
22547 (vqdmullbq_m_s16): Remove.
22548 (vqdmulltq_m_n_s32): Remove.
22549 (vqdmulltq_m_n_s16): Remove.
22550 (vqdmulltq_m_s32): Remove.
22551 (vqdmulltq_m_s16): Remove.
22552 (__arm_vqdmulltq_s16): Remove.
22553 (__arm_vqdmulltq_n_s16): Remove.
22554 (__arm_vqdmullbq_s16): Remove.
22555 (__arm_vqdmullbq_n_s16): Remove.
22556 (__arm_vqdmulltq_s32): Remove.
22557 (__arm_vqdmulltq_n_s32): Remove.
22558 (__arm_vqdmullbq_s32): Remove.
22559 (__arm_vqdmullbq_n_s32): Remove.
22560 (__arm_vqdmullbq_m_n_s32): Remove.
22561 (__arm_vqdmullbq_m_n_s16): Remove.
22562 (__arm_vqdmullbq_m_s32): Remove.
22563 (__arm_vqdmullbq_m_s16): Remove.
22564 (__arm_vqdmulltq_m_n_s32): Remove.
22565 (__arm_vqdmulltq_m_n_s16): Remove.
22566 (__arm_vqdmulltq_m_s32): Remove.
22567 (__arm_vqdmulltq_m_s16): Remove.
22568 (__arm_vqdmulltq): Remove.
22569 (__arm_vqdmullbq): Remove.
22570 (__arm_vqdmullbq_m): Remove.
22571 (__arm_vqdmulltq_m): Remove.
22573 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22575 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
22576 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
22577 (mve_insn): Add vqdmullb, vqdmullt.
22578 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
22579 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
22581 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
22582 (mve_vqdmulltq_n_s<mode>): Merge into ...
22583 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22584 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
22585 (@mve_<mve_insn>q_<supf><mode>): ... this.
22586 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
22588 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22589 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
22590 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22592 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22594 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
22595 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
22597 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
22599 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
22600 Drop unused parameter.
22601 (riscv_select_multilib): Ditto.
22602 (riscv_compute_multilib): Update call site of
22603 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
22605 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
22607 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
22608 * config/riscv/riscv-protos.h (expand_vec_init): New function.
22609 * config/riscv/riscv-v.cc (class rvv_builder): New class.
22610 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
22611 (rvv_builder::get_merged_repeating_sequence): Ditto.
22612 (expand_vector_init_insert_elems): Ditto.
22613 (expand_vec_init): Ditto.
22614 * config/riscv/vector-iterators.md: New attribute.
22616 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
22618 * config/rs6000/rs6000-builtins.def
22619 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
22621 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
22622 xsiexpdpf to xsiexpdpf_di.
22623 * config/rs6000/vsx.md (xsiexpdp): Rename to...
22624 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
22625 replace TARGET_64BIT with TARGET_POWERPC64.
22626 (xsiexpdpf): Rename to...
22627 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
22628 replace TARGET_64BIT with TARGET_POWERPC64.
22630 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
22632 * config/rs6000/rs6000-builtins.def
22633 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
22635 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
22638 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
22640 * config/rs6000/rs6000-builtins.def
22641 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
22642 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
22644 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
22645 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
22646 TARGET_64BIT check.
22647 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
22648 requirement when it has a 64-bit argument.
22650 2023-05-12 Pan Li <pan2.li@intel.com>
22651 Richard Sandiford <richard.sandiford@arm.com>
22652 Richard Biener <rguenther@suse.de>
22653 Jakub Jelinek <jakub@redhat.com>
22655 * mux-utils.h: Add overload operator == and != for pointer_mux.
22656 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
22657 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
22658 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
22659 (dv_as_decl): Ditto.
22660 (dv_as_opaque): Removed due to unnecessary.
22661 (struct variable_hasher): Take decl_or_value as compare_type.
22662 (variable_hasher::equal): Diito.
22663 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
22664 (dv_from_value): Ditto.
22665 (attrs_list_member): Ditto.
22666 (vars_copy): Ditto.
22667 (var_reg_decl_set): Ditto.
22668 (var_reg_delete_and_set): Ditto.
22669 (find_loc_in_1pdv): Ditto.
22670 (canonicalize_values_star): Ditto.
22671 (variable_post_merge_new_vals): Ditto.
22672 (dump_onepart_variable_differences): Ditto.
22673 (variable_different_p): Ditto.
22674 (set_slot_part): Ditto.
22675 (clobber_slot_part): Ditto.
22676 (clobber_variable_part): Ditto.
22678 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
22680 * match.pd: simplify vector shift + bit_and + multiply.
22682 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22684 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
22685 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
22686 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
22687 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
22688 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
22689 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
22690 * config/arm/arm-mve-builtins.cc
22691 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
22692 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
22693 * config/arm/arm_mve.h (vqrdmlashq): Remove.
22694 (vqrdmlahq): Remove.
22695 (vqdmlashq): Remove.
22696 (vqdmlahq): Remove.
22700 (vmlasq_m): Remove.
22701 (vqdmlashq_m): Remove.
22702 (vqdmlahq_m): Remove.
22703 (vqrdmlahq_m): Remove.
22704 (vqrdmlashq_m): Remove.
22705 (vmlasq_n_u8): Remove.
22706 (vmlaq_n_u8): Remove.
22707 (vqrdmlashq_n_s8): Remove.
22708 (vqrdmlahq_n_s8): Remove.
22709 (vqdmlahq_n_s8): Remove.
22710 (vqdmlashq_n_s8): Remove.
22711 (vmlasq_n_s8): Remove.
22712 (vmlaq_n_s8): Remove.
22713 (vmlasq_n_u16): Remove.
22714 (vmlaq_n_u16): Remove.
22715 (vqrdmlashq_n_s16): Remove.
22716 (vqrdmlahq_n_s16): Remove.
22717 (vqdmlashq_n_s16): Remove.
22718 (vqdmlahq_n_s16): Remove.
22719 (vmlasq_n_s16): Remove.
22720 (vmlaq_n_s16): Remove.
22721 (vmlasq_n_u32): Remove.
22722 (vmlaq_n_u32): Remove.
22723 (vqrdmlashq_n_s32): Remove.
22724 (vqrdmlahq_n_s32): Remove.
22725 (vqdmlashq_n_s32): Remove.
22726 (vqdmlahq_n_s32): Remove.
22727 (vmlasq_n_s32): Remove.
22728 (vmlaq_n_s32): Remove.
22729 (vmlaq_m_n_s8): Remove.
22730 (vmlaq_m_n_s32): Remove.
22731 (vmlaq_m_n_s16): Remove.
22732 (vmlaq_m_n_u8): Remove.
22733 (vmlaq_m_n_u32): Remove.
22734 (vmlaq_m_n_u16): Remove.
22735 (vmlasq_m_n_s8): Remove.
22736 (vmlasq_m_n_s32): Remove.
22737 (vmlasq_m_n_s16): Remove.
22738 (vmlasq_m_n_u8): Remove.
22739 (vmlasq_m_n_u32): Remove.
22740 (vmlasq_m_n_u16): Remove.
22741 (vqdmlashq_m_n_s8): Remove.
22742 (vqdmlashq_m_n_s32): Remove.
22743 (vqdmlashq_m_n_s16): Remove.
22744 (vqdmlahq_m_n_s8): Remove.
22745 (vqdmlahq_m_n_s32): Remove.
22746 (vqdmlahq_m_n_s16): Remove.
22747 (vqrdmlahq_m_n_s8): Remove.
22748 (vqrdmlahq_m_n_s32): Remove.
22749 (vqrdmlahq_m_n_s16): Remove.
22750 (vqrdmlashq_m_n_s8): Remove.
22751 (vqrdmlashq_m_n_s32): Remove.
22752 (vqrdmlashq_m_n_s16): Remove.
22753 (__arm_vmlasq_n_u8): Remove.
22754 (__arm_vmlaq_n_u8): Remove.
22755 (__arm_vqrdmlashq_n_s8): Remove.
22756 (__arm_vqdmlashq_n_s8): Remove.
22757 (__arm_vqrdmlahq_n_s8): Remove.
22758 (__arm_vqdmlahq_n_s8): Remove.
22759 (__arm_vmlasq_n_s8): Remove.
22760 (__arm_vmlaq_n_s8): Remove.
22761 (__arm_vmlasq_n_u16): Remove.
22762 (__arm_vmlaq_n_u16): Remove.
22763 (__arm_vqrdmlashq_n_s16): Remove.
22764 (__arm_vqdmlashq_n_s16): Remove.
22765 (__arm_vqrdmlahq_n_s16): Remove.
22766 (__arm_vqdmlahq_n_s16): Remove.
22767 (__arm_vmlasq_n_s16): Remove.
22768 (__arm_vmlaq_n_s16): Remove.
22769 (__arm_vmlasq_n_u32): Remove.
22770 (__arm_vmlaq_n_u32): Remove.
22771 (__arm_vqrdmlashq_n_s32): Remove.
22772 (__arm_vqdmlashq_n_s32): Remove.
22773 (__arm_vqrdmlahq_n_s32): Remove.
22774 (__arm_vqdmlahq_n_s32): Remove.
22775 (__arm_vmlasq_n_s32): Remove.
22776 (__arm_vmlaq_n_s32): Remove.
22777 (__arm_vmlaq_m_n_s8): Remove.
22778 (__arm_vmlaq_m_n_s32): Remove.
22779 (__arm_vmlaq_m_n_s16): Remove.
22780 (__arm_vmlaq_m_n_u8): Remove.
22781 (__arm_vmlaq_m_n_u32): Remove.
22782 (__arm_vmlaq_m_n_u16): Remove.
22783 (__arm_vmlasq_m_n_s8): Remove.
22784 (__arm_vmlasq_m_n_s32): Remove.
22785 (__arm_vmlasq_m_n_s16): Remove.
22786 (__arm_vmlasq_m_n_u8): Remove.
22787 (__arm_vmlasq_m_n_u32): Remove.
22788 (__arm_vmlasq_m_n_u16): Remove.
22789 (__arm_vqdmlahq_m_n_s8): Remove.
22790 (__arm_vqdmlahq_m_n_s32): Remove.
22791 (__arm_vqdmlahq_m_n_s16): Remove.
22792 (__arm_vqrdmlahq_m_n_s8): Remove.
22793 (__arm_vqrdmlahq_m_n_s32): Remove.
22794 (__arm_vqrdmlahq_m_n_s16): Remove.
22795 (__arm_vqrdmlashq_m_n_s8): Remove.
22796 (__arm_vqrdmlashq_m_n_s32): Remove.
22797 (__arm_vqrdmlashq_m_n_s16): Remove.
22798 (__arm_vqdmlashq_m_n_s8): Remove.
22799 (__arm_vqdmlashq_m_n_s16): Remove.
22800 (__arm_vqdmlashq_m_n_s32): Remove.
22801 (__arm_vmlasq): Remove.
22802 (__arm_vmlaq): Remove.
22803 (__arm_vqrdmlashq): Remove.
22804 (__arm_vqdmlashq): Remove.
22805 (__arm_vqrdmlahq): Remove.
22806 (__arm_vqdmlahq): Remove.
22807 (__arm_vmlaq_m): Remove.
22808 (__arm_vmlasq_m): Remove.
22809 (__arm_vqdmlahq_m): Remove.
22810 (__arm_vqrdmlahq_m): Remove.
22811 (__arm_vqrdmlashq_m): Remove.
22812 (__arm_vqdmlashq_m): Remove.
22814 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22816 * config/arm/iterators.md (MVE_VMLxQ_N): New.
22817 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
22819 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
22821 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
22822 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
22823 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
22824 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
22825 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22827 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22829 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
22830 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
22832 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22834 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
22835 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
22836 (vqrdmlsdhxq): New.
22837 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
22838 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
22839 (vqrdmlsdhxq): New.
22840 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
22841 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
22842 (vqrdmlsdhxq): New.
22843 * config/arm/arm-mve-builtins.cc
22844 (function_instance::has_inactive_argument): Handle vqrdmladhq,
22845 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
22846 vqdmlsdhq, vqdmlsdhxq.
22847 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
22848 (vqrdmlsdhq): Remove.
22849 (vqrdmladhxq): Remove.
22850 (vqrdmladhq): Remove.
22851 (vqdmlsdhxq): Remove.
22852 (vqdmlsdhq): Remove.
22853 (vqdmladhxq): Remove.
22854 (vqdmladhq): Remove.
22855 (vqdmladhq_m): Remove.
22856 (vqdmladhxq_m): Remove.
22857 (vqdmlsdhq_m): Remove.
22858 (vqdmlsdhxq_m): Remove.
22859 (vqrdmladhq_m): Remove.
22860 (vqrdmladhxq_m): Remove.
22861 (vqrdmlsdhq_m): Remove.
22862 (vqrdmlsdhxq_m): Remove.
22863 (vqrdmlsdhxq_s8): Remove.
22864 (vqrdmlsdhq_s8): Remove.
22865 (vqrdmladhxq_s8): Remove.
22866 (vqrdmladhq_s8): Remove.
22867 (vqdmlsdhxq_s8): Remove.
22868 (vqdmlsdhq_s8): Remove.
22869 (vqdmladhxq_s8): Remove.
22870 (vqdmladhq_s8): Remove.
22871 (vqrdmlsdhxq_s16): Remove.
22872 (vqrdmlsdhq_s16): Remove.
22873 (vqrdmladhxq_s16): Remove.
22874 (vqrdmladhq_s16): Remove.
22875 (vqdmlsdhxq_s16): Remove.
22876 (vqdmlsdhq_s16): Remove.
22877 (vqdmladhxq_s16): Remove.
22878 (vqdmladhq_s16): Remove.
22879 (vqrdmlsdhxq_s32): Remove.
22880 (vqrdmlsdhq_s32): Remove.
22881 (vqrdmladhxq_s32): Remove.
22882 (vqrdmladhq_s32): Remove.
22883 (vqdmlsdhxq_s32): Remove.
22884 (vqdmlsdhq_s32): Remove.
22885 (vqdmladhxq_s32): Remove.
22886 (vqdmladhq_s32): Remove.
22887 (vqdmladhq_m_s8): Remove.
22888 (vqdmladhq_m_s32): Remove.
22889 (vqdmladhq_m_s16): Remove.
22890 (vqdmladhxq_m_s8): Remove.
22891 (vqdmladhxq_m_s32): Remove.
22892 (vqdmladhxq_m_s16): Remove.
22893 (vqdmlsdhq_m_s8): Remove.
22894 (vqdmlsdhq_m_s32): Remove.
22895 (vqdmlsdhq_m_s16): Remove.
22896 (vqdmlsdhxq_m_s8): Remove.
22897 (vqdmlsdhxq_m_s32): Remove.
22898 (vqdmlsdhxq_m_s16): Remove.
22899 (vqrdmladhq_m_s8): Remove.
22900 (vqrdmladhq_m_s32): Remove.
22901 (vqrdmladhq_m_s16): Remove.
22902 (vqrdmladhxq_m_s8): Remove.
22903 (vqrdmladhxq_m_s32): Remove.
22904 (vqrdmladhxq_m_s16): Remove.
22905 (vqrdmlsdhq_m_s8): Remove.
22906 (vqrdmlsdhq_m_s32): Remove.
22907 (vqrdmlsdhq_m_s16): Remove.
22908 (vqrdmlsdhxq_m_s8): Remove.
22909 (vqrdmlsdhxq_m_s32): Remove.
22910 (vqrdmlsdhxq_m_s16): Remove.
22911 (__arm_vqrdmlsdhxq_s8): Remove.
22912 (__arm_vqrdmlsdhq_s8): Remove.
22913 (__arm_vqrdmladhxq_s8): Remove.
22914 (__arm_vqrdmladhq_s8): Remove.
22915 (__arm_vqdmlsdhxq_s8): Remove.
22916 (__arm_vqdmlsdhq_s8): Remove.
22917 (__arm_vqdmladhxq_s8): Remove.
22918 (__arm_vqdmladhq_s8): Remove.
22919 (__arm_vqrdmlsdhxq_s16): Remove.
22920 (__arm_vqrdmlsdhq_s16): Remove.
22921 (__arm_vqrdmladhxq_s16): Remove.
22922 (__arm_vqrdmladhq_s16): Remove.
22923 (__arm_vqdmlsdhxq_s16): Remove.
22924 (__arm_vqdmlsdhq_s16): Remove.
22925 (__arm_vqdmladhxq_s16): Remove.
22926 (__arm_vqdmladhq_s16): Remove.
22927 (__arm_vqrdmlsdhxq_s32): Remove.
22928 (__arm_vqrdmlsdhq_s32): Remove.
22929 (__arm_vqrdmladhxq_s32): Remove.
22930 (__arm_vqrdmladhq_s32): Remove.
22931 (__arm_vqdmlsdhxq_s32): Remove.
22932 (__arm_vqdmlsdhq_s32): Remove.
22933 (__arm_vqdmladhxq_s32): Remove.
22934 (__arm_vqdmladhq_s32): Remove.
22935 (__arm_vqdmladhq_m_s8): Remove.
22936 (__arm_vqdmladhq_m_s32): Remove.
22937 (__arm_vqdmladhq_m_s16): Remove.
22938 (__arm_vqdmladhxq_m_s8): Remove.
22939 (__arm_vqdmladhxq_m_s32): Remove.
22940 (__arm_vqdmladhxq_m_s16): Remove.
22941 (__arm_vqdmlsdhq_m_s8): Remove.
22942 (__arm_vqdmlsdhq_m_s32): Remove.
22943 (__arm_vqdmlsdhq_m_s16): Remove.
22944 (__arm_vqdmlsdhxq_m_s8): Remove.
22945 (__arm_vqdmlsdhxq_m_s32): Remove.
22946 (__arm_vqdmlsdhxq_m_s16): Remove.
22947 (__arm_vqrdmladhq_m_s8): Remove.
22948 (__arm_vqrdmladhq_m_s32): Remove.
22949 (__arm_vqrdmladhq_m_s16): Remove.
22950 (__arm_vqrdmladhxq_m_s8): Remove.
22951 (__arm_vqrdmladhxq_m_s32): Remove.
22952 (__arm_vqrdmladhxq_m_s16): Remove.
22953 (__arm_vqrdmlsdhq_m_s8): Remove.
22954 (__arm_vqrdmlsdhq_m_s32): Remove.
22955 (__arm_vqrdmlsdhq_m_s16): Remove.
22956 (__arm_vqrdmlsdhxq_m_s8): Remove.
22957 (__arm_vqrdmlsdhxq_m_s32): Remove.
22958 (__arm_vqrdmlsdhxq_m_s16): Remove.
22959 (__arm_vqrdmlsdhxq): Remove.
22960 (__arm_vqrdmlsdhq): Remove.
22961 (__arm_vqrdmladhxq): Remove.
22962 (__arm_vqrdmladhq): Remove.
22963 (__arm_vqdmlsdhxq): Remove.
22964 (__arm_vqdmlsdhq): Remove.
22965 (__arm_vqdmladhxq): Remove.
22966 (__arm_vqdmladhq): Remove.
22967 (__arm_vqdmladhq_m): Remove.
22968 (__arm_vqdmladhxq_m): Remove.
22969 (__arm_vqdmlsdhq_m): Remove.
22970 (__arm_vqdmlsdhxq_m): Remove.
22971 (__arm_vqrdmladhq_m): Remove.
22972 (__arm_vqrdmladhxq_m): Remove.
22973 (__arm_vqrdmlsdhq_m): Remove.
22974 (__arm_vqrdmlsdhxq_m): Remove.
22976 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22978 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
22979 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
22980 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
22981 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
22982 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
22983 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
22984 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
22985 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
22986 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
22987 (mve_vqdmladhq_s<mode>): Merge into ...
22988 (@mve_<mve_insn>q_<supf><mode>): ... this.
22990 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22992 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
22993 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
22995 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22997 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
22998 (vmlsldavaq, vmlsldavaxq): New.
22999 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
23000 (vmlsldavaq, vmlsldavaxq): New.
23001 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
23002 (vmlsldavaq, vmlsldavaxq): New.
23003 * config/arm/arm_mve.h (vmlaldavaq): Remove.
23004 (vmlaldavaxq): Remove.
23005 (vmlsldavaq): Remove.
23006 (vmlsldavaxq): Remove.
23007 (vmlaldavaq_p): Remove.
23008 (vmlaldavaxq_p): Remove.
23009 (vmlsldavaq_p): Remove.
23010 (vmlsldavaxq_p): Remove.
23011 (vmlaldavaq_s16): Remove.
23012 (vmlaldavaxq_s16): Remove.
23013 (vmlsldavaq_s16): Remove.
23014 (vmlsldavaxq_s16): Remove.
23015 (vmlaldavaq_u16): Remove.
23016 (vmlaldavaq_s32): Remove.
23017 (vmlaldavaxq_s32): Remove.
23018 (vmlsldavaq_s32): Remove.
23019 (vmlsldavaxq_s32): Remove.
23020 (vmlaldavaq_u32): Remove.
23021 (vmlaldavaq_p_s32): Remove.
23022 (vmlaldavaq_p_s16): Remove.
23023 (vmlaldavaq_p_u32): Remove.
23024 (vmlaldavaq_p_u16): Remove.
23025 (vmlaldavaxq_p_s32): Remove.
23026 (vmlaldavaxq_p_s16): Remove.
23027 (vmlsldavaq_p_s32): Remove.
23028 (vmlsldavaq_p_s16): Remove.
23029 (vmlsldavaxq_p_s32): Remove.
23030 (vmlsldavaxq_p_s16): Remove.
23031 (__arm_vmlaldavaq_s16): Remove.
23032 (__arm_vmlaldavaxq_s16): Remove.
23033 (__arm_vmlsldavaq_s16): Remove.
23034 (__arm_vmlsldavaxq_s16): Remove.
23035 (__arm_vmlaldavaq_u16): Remove.
23036 (__arm_vmlaldavaq_s32): Remove.
23037 (__arm_vmlaldavaxq_s32): Remove.
23038 (__arm_vmlsldavaq_s32): Remove.
23039 (__arm_vmlsldavaxq_s32): Remove.
23040 (__arm_vmlaldavaq_u32): Remove.
23041 (__arm_vmlaldavaq_p_s32): Remove.
23042 (__arm_vmlaldavaq_p_s16): Remove.
23043 (__arm_vmlaldavaq_p_u32): Remove.
23044 (__arm_vmlaldavaq_p_u16): Remove.
23045 (__arm_vmlaldavaxq_p_s32): Remove.
23046 (__arm_vmlaldavaxq_p_s16): Remove.
23047 (__arm_vmlsldavaq_p_s32): Remove.
23048 (__arm_vmlsldavaq_p_s16): Remove.
23049 (__arm_vmlsldavaxq_p_s32): Remove.
23050 (__arm_vmlsldavaxq_p_s16): Remove.
23051 (__arm_vmlaldavaq): Remove.
23052 (__arm_vmlaldavaxq): Remove.
23053 (__arm_vmlsldavaq): Remove.
23054 (__arm_vmlsldavaxq): Remove.
23055 (__arm_vmlaldavaq_p): Remove.
23056 (__arm_vmlaldavaxq_p): Remove.
23057 (__arm_vmlsldavaq_p): Remove.
23058 (__arm_vmlsldavaxq_p): Remove.
23060 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23062 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
23064 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
23065 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
23066 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
23067 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
23068 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
23069 (mve_vmlaldavaxq_s<mode>): Merge into ...
23070 (@mve_<mve_insn>q_<supf><mode>): ... this.
23071 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
23072 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
23074 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23076 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23078 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
23079 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
23081 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23083 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
23084 (vrmlsldavhq, vrmlsldavhxq): New.
23085 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
23086 (vrmlsldavhq, vrmlsldavhxq): New.
23087 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
23088 (vrmlsldavhq, vrmlsldavhxq): New.
23089 * config/arm/arm-mve-builtins-functions.h
23090 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
23091 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
23092 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
23093 (vrmlsldavhxq): Remove.
23094 (vrmlsldavhq): Remove.
23095 (vrmlaldavhxq): Remove.
23096 (vrmlaldavhq_p): Remove.
23097 (vrmlaldavhxq_p): Remove.
23098 (vrmlsldavhq_p): Remove.
23099 (vrmlsldavhxq_p): Remove.
23100 (vrmlaldavhq_u32): Remove.
23101 (vrmlsldavhxq_s32): Remove.
23102 (vrmlsldavhq_s32): Remove.
23103 (vrmlaldavhxq_s32): Remove.
23104 (vrmlaldavhq_s32): Remove.
23105 (vrmlaldavhq_p_s32): Remove.
23106 (vrmlaldavhxq_p_s32): Remove.
23107 (vrmlsldavhq_p_s32): Remove.
23108 (vrmlsldavhxq_p_s32): Remove.
23109 (vrmlaldavhq_p_u32): Remove.
23110 (__arm_vrmlaldavhq_u32): Remove.
23111 (__arm_vrmlsldavhxq_s32): Remove.
23112 (__arm_vrmlsldavhq_s32): Remove.
23113 (__arm_vrmlaldavhxq_s32): Remove.
23114 (__arm_vrmlaldavhq_s32): Remove.
23115 (__arm_vrmlaldavhq_p_s32): Remove.
23116 (__arm_vrmlaldavhxq_p_s32): Remove.
23117 (__arm_vrmlsldavhq_p_s32): Remove.
23118 (__arm_vrmlsldavhxq_p_s32): Remove.
23119 (__arm_vrmlaldavhq_p_u32): Remove.
23120 (__arm_vrmlaldavhq): Remove.
23121 (__arm_vrmlsldavhxq): Remove.
23122 (__arm_vrmlsldavhq): Remove.
23123 (__arm_vrmlaldavhxq): Remove.
23124 (__arm_vrmlaldavhq_p): Remove.
23125 (__arm_vrmlaldavhxq_p): Remove.
23126 (__arm_vrmlsldavhq_p): Remove.
23127 (__arm_vrmlsldavhxq_p): Remove.
23129 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23131 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
23133 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
23134 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
23135 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
23136 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
23137 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
23138 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
23139 (@mve_<mve_insn>q_<supf>v4si): ... this.
23140 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
23141 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
23143 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23145 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23147 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
23148 (vmlsldavq, vmlsldavxq): New.
23149 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
23150 (vmlsldavq, vmlsldavxq): New.
23151 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
23152 (vmlsldavq, vmlsldavxq): New.
23153 * config/arm/arm_mve.h (vmlaldavq): Remove.
23154 (vmlsldavxq): Remove.
23155 (vmlsldavq): Remove.
23156 (vmlaldavxq): Remove.
23157 (vmlaldavq_p): Remove.
23158 (vmlaldavxq_p): Remove.
23159 (vmlsldavq_p): Remove.
23160 (vmlsldavxq_p): Remove.
23161 (vmlaldavq_u16): Remove.
23162 (vmlsldavxq_s16): Remove.
23163 (vmlsldavq_s16): Remove.
23164 (vmlaldavxq_s16): Remove.
23165 (vmlaldavq_s16): Remove.
23166 (vmlaldavq_u32): Remove.
23167 (vmlsldavxq_s32): Remove.
23168 (vmlsldavq_s32): Remove.
23169 (vmlaldavxq_s32): Remove.
23170 (vmlaldavq_s32): Remove.
23171 (vmlaldavq_p_s16): Remove.
23172 (vmlaldavxq_p_s16): Remove.
23173 (vmlsldavq_p_s16): Remove.
23174 (vmlsldavxq_p_s16): Remove.
23175 (vmlaldavq_p_u16): Remove.
23176 (vmlaldavq_p_s32): Remove.
23177 (vmlaldavxq_p_s32): Remove.
23178 (vmlsldavq_p_s32): Remove.
23179 (vmlsldavxq_p_s32): Remove.
23180 (vmlaldavq_p_u32): Remove.
23181 (__arm_vmlaldavq_u16): Remove.
23182 (__arm_vmlsldavxq_s16): Remove.
23183 (__arm_vmlsldavq_s16): Remove.
23184 (__arm_vmlaldavxq_s16): Remove.
23185 (__arm_vmlaldavq_s16): Remove.
23186 (__arm_vmlaldavq_u32): Remove.
23187 (__arm_vmlsldavxq_s32): Remove.
23188 (__arm_vmlsldavq_s32): Remove.
23189 (__arm_vmlaldavxq_s32): Remove.
23190 (__arm_vmlaldavq_s32): Remove.
23191 (__arm_vmlaldavq_p_s16): Remove.
23192 (__arm_vmlaldavxq_p_s16): Remove.
23193 (__arm_vmlsldavq_p_s16): Remove.
23194 (__arm_vmlsldavxq_p_s16): Remove.
23195 (__arm_vmlaldavq_p_u16): Remove.
23196 (__arm_vmlaldavq_p_s32): Remove.
23197 (__arm_vmlaldavxq_p_s32): Remove.
23198 (__arm_vmlsldavq_p_s32): Remove.
23199 (__arm_vmlsldavxq_p_s32): Remove.
23200 (__arm_vmlaldavq_p_u32): Remove.
23201 (__arm_vmlaldavq): Remove.
23202 (__arm_vmlsldavxq): Remove.
23203 (__arm_vmlsldavq): Remove.
23204 (__arm_vmlaldavxq): Remove.
23205 (__arm_vmlaldavq_p): Remove.
23206 (__arm_vmlaldavxq_p): Remove.
23207 (__arm_vmlsldavq_p): Remove.
23208 (__arm_vmlsldavxq_p): Remove.
23210 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23212 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
23213 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
23214 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
23215 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
23216 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
23217 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
23218 (mve_vmlsldavxq_s<mode>): Merge into ...
23219 (@mve_<mve_insn>q_<supf><mode>): ... this.
23220 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
23221 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
23223 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23225 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23227 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
23228 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
23230 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23232 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
23233 * config/arm/arm-mve-builtins-base.def (vabavq): New.
23234 * config/arm/arm-mve-builtins-base.h (vabavq): New.
23235 * config/arm/arm_mve.h (vabavq): Remove.
23236 (vabavq_p): Remove.
23237 (vabavq_s8): Remove.
23238 (vabavq_s16): Remove.
23239 (vabavq_s32): Remove.
23240 (vabavq_u8): Remove.
23241 (vabavq_u16): Remove.
23242 (vabavq_u32): Remove.
23243 (vabavq_p_s8): Remove.
23244 (vabavq_p_u8): Remove.
23245 (vabavq_p_s16): Remove.
23246 (vabavq_p_u16): Remove.
23247 (vabavq_p_s32): Remove.
23248 (vabavq_p_u32): Remove.
23249 (__arm_vabavq_s8): Remove.
23250 (__arm_vabavq_s16): Remove.
23251 (__arm_vabavq_s32): Remove.
23252 (__arm_vabavq_u8): Remove.
23253 (__arm_vabavq_u16): Remove.
23254 (__arm_vabavq_u32): Remove.
23255 (__arm_vabavq_p_s8): Remove.
23256 (__arm_vabavq_p_u8): Remove.
23257 (__arm_vabavq_p_s16): Remove.
23258 (__arm_vabavq_p_u16): Remove.
23259 (__arm_vabavq_p_s32): Remove.
23260 (__arm_vabavq_p_u32): Remove.
23261 (__arm_vabavq): Remove.
23262 (__arm_vabavq_p): Remove.
23264 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23266 * config/arm/iterators.md (mve_insn): Add vabav.
23267 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
23268 (@mve_<mve_insn>q_<supf><mode>): ... this,.
23269 (mve_vabavq_p_<supf><mode>): Rename into ...
23270 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
23272 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23274 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
23275 (vmlsdavaq, vmlsdavaxq): New.
23276 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
23277 (vmlsdavaq, vmlsdavaxq): New.
23278 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
23279 (vmlsdavaq, vmlsdavaxq): New.
23280 * config/arm/arm_mve.h (vmladavaq): Remove.
23281 (vmlsdavaxq): Remove.
23282 (vmlsdavaq): Remove.
23283 (vmladavaxq): Remove.
23284 (vmladavaq_p): Remove.
23285 (vmladavaxq_p): Remove.
23286 (vmlsdavaq_p): Remove.
23287 (vmlsdavaxq_p): Remove.
23288 (vmladavaq_u8): Remove.
23289 (vmlsdavaxq_s8): Remove.
23290 (vmlsdavaq_s8): Remove.
23291 (vmladavaxq_s8): Remove.
23292 (vmladavaq_s8): Remove.
23293 (vmladavaq_u16): Remove.
23294 (vmlsdavaxq_s16): Remove.
23295 (vmlsdavaq_s16): Remove.
23296 (vmladavaxq_s16): Remove.
23297 (vmladavaq_s16): Remove.
23298 (vmladavaq_u32): Remove.
23299 (vmlsdavaxq_s32): Remove.
23300 (vmlsdavaq_s32): Remove.
23301 (vmladavaxq_s32): Remove.
23302 (vmladavaq_s32): Remove.
23303 (vmladavaq_p_s8): Remove.
23304 (vmladavaq_p_s32): Remove.
23305 (vmladavaq_p_s16): Remove.
23306 (vmladavaq_p_u8): Remove.
23307 (vmladavaq_p_u32): Remove.
23308 (vmladavaq_p_u16): Remove.
23309 (vmladavaxq_p_s8): Remove.
23310 (vmladavaxq_p_s32): Remove.
23311 (vmladavaxq_p_s16): Remove.
23312 (vmlsdavaq_p_s8): Remove.
23313 (vmlsdavaq_p_s32): Remove.
23314 (vmlsdavaq_p_s16): Remove.
23315 (vmlsdavaxq_p_s8): Remove.
23316 (vmlsdavaxq_p_s32): Remove.
23317 (vmlsdavaxq_p_s16): Remove.
23318 (__arm_vmladavaq_u8): Remove.
23319 (__arm_vmlsdavaxq_s8): Remove.
23320 (__arm_vmlsdavaq_s8): Remove.
23321 (__arm_vmladavaxq_s8): Remove.
23322 (__arm_vmladavaq_s8): Remove.
23323 (__arm_vmladavaq_u16): Remove.
23324 (__arm_vmlsdavaxq_s16): Remove.
23325 (__arm_vmlsdavaq_s16): Remove.
23326 (__arm_vmladavaxq_s16): Remove.
23327 (__arm_vmladavaq_s16): Remove.
23328 (__arm_vmladavaq_u32): Remove.
23329 (__arm_vmlsdavaxq_s32): Remove.
23330 (__arm_vmlsdavaq_s32): Remove.
23331 (__arm_vmladavaxq_s32): Remove.
23332 (__arm_vmladavaq_s32): Remove.
23333 (__arm_vmladavaq_p_s8): Remove.
23334 (__arm_vmladavaq_p_s32): Remove.
23335 (__arm_vmladavaq_p_s16): Remove.
23336 (__arm_vmladavaq_p_u8): Remove.
23337 (__arm_vmladavaq_p_u32): Remove.
23338 (__arm_vmladavaq_p_u16): Remove.
23339 (__arm_vmladavaxq_p_s8): Remove.
23340 (__arm_vmladavaxq_p_s32): Remove.
23341 (__arm_vmladavaxq_p_s16): Remove.
23342 (__arm_vmlsdavaq_p_s8): Remove.
23343 (__arm_vmlsdavaq_p_s32): Remove.
23344 (__arm_vmlsdavaq_p_s16): Remove.
23345 (__arm_vmlsdavaxq_p_s8): Remove.
23346 (__arm_vmlsdavaxq_p_s32): Remove.
23347 (__arm_vmlsdavaxq_p_s16): Remove.
23348 (__arm_vmladavaq): Remove.
23349 (__arm_vmlsdavaxq): Remove.
23350 (__arm_vmlsdavaq): Remove.
23351 (__arm_vmladavaxq): Remove.
23352 (__arm_vmladavaq_p): Remove.
23353 (__arm_vmladavaxq_p): Remove.
23354 (__arm_vmlsdavaq_p): Remove.
23355 (__arm_vmlsdavaxq_p): Remove.
23357 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23359 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
23360 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
23362 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23364 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
23365 (vmlsdavq, vmlsdavxq): New.
23366 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
23367 (vmlsdavq, vmlsdavxq): New.
23368 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
23369 (vmlsdavq, vmlsdavxq): New.
23370 * config/arm/arm_mve.h (vmladavq): Remove.
23371 (vmlsdavxq): Remove.
23372 (vmlsdavq): Remove.
23373 (vmladavxq): Remove.
23374 (vmladavq_p): Remove.
23375 (vmlsdavxq_p): Remove.
23376 (vmlsdavq_p): Remove.
23377 (vmladavxq_p): Remove.
23378 (vmladavq_u8): Remove.
23379 (vmlsdavxq_s8): Remove.
23380 (vmlsdavq_s8): Remove.
23381 (vmladavxq_s8): Remove.
23382 (vmladavq_s8): Remove.
23383 (vmladavq_u16): Remove.
23384 (vmlsdavxq_s16): Remove.
23385 (vmlsdavq_s16): Remove.
23386 (vmladavxq_s16): Remove.
23387 (vmladavq_s16): Remove.
23388 (vmladavq_u32): Remove.
23389 (vmlsdavxq_s32): Remove.
23390 (vmlsdavq_s32): Remove.
23391 (vmladavxq_s32): Remove.
23392 (vmladavq_s32): Remove.
23393 (vmladavq_p_u8): Remove.
23394 (vmlsdavxq_p_s8): Remove.
23395 (vmlsdavq_p_s8): Remove.
23396 (vmladavxq_p_s8): Remove.
23397 (vmladavq_p_s8): Remove.
23398 (vmladavq_p_u16): Remove.
23399 (vmlsdavxq_p_s16): Remove.
23400 (vmlsdavq_p_s16): Remove.
23401 (vmladavxq_p_s16): Remove.
23402 (vmladavq_p_s16): Remove.
23403 (vmladavq_p_u32): Remove.
23404 (vmlsdavxq_p_s32): Remove.
23405 (vmlsdavq_p_s32): Remove.
23406 (vmladavxq_p_s32): Remove.
23407 (vmladavq_p_s32): Remove.
23408 (__arm_vmladavq_u8): Remove.
23409 (__arm_vmlsdavxq_s8): Remove.
23410 (__arm_vmlsdavq_s8): Remove.
23411 (__arm_vmladavxq_s8): Remove.
23412 (__arm_vmladavq_s8): Remove.
23413 (__arm_vmladavq_u16): Remove.
23414 (__arm_vmlsdavxq_s16): Remove.
23415 (__arm_vmlsdavq_s16): Remove.
23416 (__arm_vmladavxq_s16): Remove.
23417 (__arm_vmladavq_s16): Remove.
23418 (__arm_vmladavq_u32): Remove.
23419 (__arm_vmlsdavxq_s32): Remove.
23420 (__arm_vmlsdavq_s32): Remove.
23421 (__arm_vmladavxq_s32): Remove.
23422 (__arm_vmladavq_s32): Remove.
23423 (__arm_vmladavq_p_u8): Remove.
23424 (__arm_vmlsdavxq_p_s8): Remove.
23425 (__arm_vmlsdavq_p_s8): Remove.
23426 (__arm_vmladavxq_p_s8): Remove.
23427 (__arm_vmladavq_p_s8): Remove.
23428 (__arm_vmladavq_p_u16): Remove.
23429 (__arm_vmlsdavxq_p_s16): Remove.
23430 (__arm_vmlsdavq_p_s16): Remove.
23431 (__arm_vmladavxq_p_s16): Remove.
23432 (__arm_vmladavq_p_s16): Remove.
23433 (__arm_vmladavq_p_u32): Remove.
23434 (__arm_vmlsdavxq_p_s32): Remove.
23435 (__arm_vmlsdavq_p_s32): Remove.
23436 (__arm_vmladavxq_p_s32): Remove.
23437 (__arm_vmladavq_p_s32): Remove.
23438 (__arm_vmladavq): Remove.
23439 (__arm_vmlsdavxq): Remove.
23440 (__arm_vmlsdavq): Remove.
23441 (__arm_vmladavxq): Remove.
23442 (__arm_vmladavq_p): Remove.
23443 (__arm_vmlsdavxq_p): Remove.
23444 (__arm_vmlsdavq_p): Remove.
23445 (__arm_vmladavxq_p): Remove.
23447 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23449 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
23450 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
23451 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
23452 vmlsdavax, vmlsdav, vmlsdavx.
23453 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
23454 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
23455 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
23457 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
23458 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
23459 (mve_vmlsdavxq_s<mode>): Merge into ...
23460 (@mve_<mve_insn>q_<supf><mode>): ... this.
23461 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
23462 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
23464 (@mve_<mve_insn>q_<supf><mode>): ... this.
23465 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
23466 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
23467 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23468 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
23469 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
23471 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23473 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23475 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
23476 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
23478 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23480 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
23481 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
23482 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
23483 * config/arm/arm_mve.h (vaddlvaq): Remove.
23484 (vaddlvaq_p): Remove.
23485 (vaddlvaq_u32): Remove.
23486 (vaddlvaq_s32): Remove.
23487 (vaddlvaq_p_s32): Remove.
23488 (vaddlvaq_p_u32): Remove.
23489 (__arm_vaddlvaq_u32): Remove.
23490 (__arm_vaddlvaq_s32): Remove.
23491 (__arm_vaddlvaq_p_s32): Remove.
23492 (__arm_vaddlvaq_p_u32): Remove.
23493 (__arm_vaddlvaq): Remove.
23494 (__arm_vaddlvaq_p): Remove.
23496 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23498 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
23499 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
23501 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23503 * config/arm/iterators.md (mve_insn): Add vaddlva.
23504 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
23505 (@mve_<mve_insn>q_<supf>v4si): ... this.
23506 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
23507 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23509 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
23512 * config/i386/i386.cc (ix86_widen_mult_cost):
23513 Handle V4HImode and V2SImode.
23515 2023-05-11 Andrew Pinski <apinski@marvell.com>
23517 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
23518 defined by a phi node with more than one uses, allow for the
23519 only uses are in that same defining statement.
23521 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
23523 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
23526 2023-05-11 Pan Li <pan2.li@intel.com>
23528 * config/riscv/vector.md: Add comments for simplifying to vmset.
23530 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
23532 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
23534 (v<optab><mode>3): Add vector shift pattern.
23535 * config/riscv/vector-iterators.md: New iterator.
23537 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
23539 * config/riscv/autovec.md: Use renamed functions.
23540 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
23541 (emit_vlmax_reg_op): To this.
23542 (emit_nonvlmax_op): Rename.
23543 (emit_len_op): To this.
23544 (emit_nonvlmax_binop): Rename.
23545 (emit_len_binop): To this.
23546 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
23547 (emit_pred_binop): Remove vlmax_p.
23548 (emit_vlmax_op): Rename.
23549 (emit_vlmax_reg_op): To this.
23550 (emit_nonvlmax_op): Rename.
23551 (emit_len_op): To this.
23552 (emit_nonvlmax_binop): Rename.
23553 (emit_len_binop): To this.
23554 (sew64_scalar_helper): Use renamed functions.
23555 (expand_tuple_move): Use renamed functions.
23556 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
23558 * config/riscv/vector.md: Use renamed functions.
23560 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
23561 Michael Collison <collison@rivosinc.com>
23563 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
23564 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
23565 * config/riscv/riscv-v.cc (emit_pred_op): New function.
23566 (set_expander_dest_and_mask): New function.
23567 (emit_pred_binop): New function.
23568 (emit_nonvlmax_binop): New function.
23570 2023-05-11 Pan Li <pan2.li@intel.com>
23572 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
23573 * gimple-loop-interchange.cc
23574 (tree_loop_interchange::map_inductions_to_loop): Ditto.
23575 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
23576 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
23577 * tree-ssa-loop-manip.cc (create_iv): Ditto.
23578 (tree_transform_and_unroll_loop): Ditto.
23579 (canonicalize_loop_ivs): Ditto.
23580 * tree-ssa-loop-manip.h (create_iv): Ditto.
23581 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
23582 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
23584 (vect_set_loop_condition_normal): Ditto.
23585 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
23586 * tree-vect-stmts.cc (vectorizable_store): Ditto.
23587 (vectorizable_load): Ditto.
23589 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23591 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
23592 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
23593 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
23594 * config/arm/arm_mve.h (vmovlbq): Remove.
23596 (vmovlbq_m): Remove.
23597 (vmovltq_m): Remove.
23598 (vmovlbq_x): Remove.
23599 (vmovltq_x): Remove.
23600 (vmovlbq_s8): Remove.
23601 (vmovlbq_s16): Remove.
23602 (vmovltq_s8): Remove.
23603 (vmovltq_s16): Remove.
23604 (vmovltq_u8): Remove.
23605 (vmovltq_u16): Remove.
23606 (vmovlbq_u8): Remove.
23607 (vmovlbq_u16): Remove.
23608 (vmovlbq_m_s8): Remove.
23609 (vmovltq_m_s8): Remove.
23610 (vmovlbq_m_u8): Remove.
23611 (vmovltq_m_u8): Remove.
23612 (vmovlbq_m_s16): Remove.
23613 (vmovltq_m_s16): Remove.
23614 (vmovlbq_m_u16): Remove.
23615 (vmovltq_m_u16): Remove.
23616 (vmovlbq_x_s8): Remove.
23617 (vmovlbq_x_s16): Remove.
23618 (vmovlbq_x_u8): Remove.
23619 (vmovlbq_x_u16): Remove.
23620 (vmovltq_x_s8): Remove.
23621 (vmovltq_x_s16): Remove.
23622 (vmovltq_x_u8): Remove.
23623 (vmovltq_x_u16): Remove.
23624 (__arm_vmovlbq_s8): Remove.
23625 (__arm_vmovlbq_s16): Remove.
23626 (__arm_vmovltq_s8): Remove.
23627 (__arm_vmovltq_s16): Remove.
23628 (__arm_vmovltq_u8): Remove.
23629 (__arm_vmovltq_u16): Remove.
23630 (__arm_vmovlbq_u8): Remove.
23631 (__arm_vmovlbq_u16): Remove.
23632 (__arm_vmovlbq_m_s8): Remove.
23633 (__arm_vmovltq_m_s8): Remove.
23634 (__arm_vmovlbq_m_u8): Remove.
23635 (__arm_vmovltq_m_u8): Remove.
23636 (__arm_vmovlbq_m_s16): Remove.
23637 (__arm_vmovltq_m_s16): Remove.
23638 (__arm_vmovlbq_m_u16): Remove.
23639 (__arm_vmovltq_m_u16): Remove.
23640 (__arm_vmovlbq_x_s8): Remove.
23641 (__arm_vmovlbq_x_s16): Remove.
23642 (__arm_vmovlbq_x_u8): Remove.
23643 (__arm_vmovlbq_x_u16): Remove.
23644 (__arm_vmovltq_x_s8): Remove.
23645 (__arm_vmovltq_x_s16): Remove.
23646 (__arm_vmovltq_x_u8): Remove.
23647 (__arm_vmovltq_x_u16): Remove.
23648 (__arm_vmovlbq): Remove.
23649 (__arm_vmovltq): Remove.
23650 (__arm_vmovlbq_m): Remove.
23651 (__arm_vmovltq_m): Remove.
23652 (__arm_vmovlbq_x): Remove.
23653 (__arm_vmovltq_x): Remove.
23655 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23657 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
23658 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
23660 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23662 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
23663 (VMOVLBQ, VMOVLTQ): Merge into ...
23664 (VMOVLxQ): ... this.
23665 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
23666 (VMOVLxQ_M): ... this.
23667 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
23668 (mve_vmovlbq_<supf><mode>): Merge into ...
23669 (@mve_<mve_insn>q_<supf><mode>): ... this.
23670 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
23672 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23674 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23676 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
23677 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
23678 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
23679 * config/arm/arm-mve-builtins-functions.h
23680 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
23681 * config/arm/arm_mve.h (vaddlvq): Remove.
23682 (vaddlvq_p): Remove.
23683 (vaddlvq_s32): Remove.
23684 (vaddlvq_u32): Remove.
23685 (vaddlvq_p_s32): Remove.
23686 (vaddlvq_p_u32): Remove.
23687 (__arm_vaddlvq_s32): Remove.
23688 (__arm_vaddlvq_u32): Remove.
23689 (__arm_vaddlvq_p_s32): Remove.
23690 (__arm_vaddlvq_p_u32): Remove.
23691 (__arm_vaddlvq): Remove.
23692 (__arm_vaddlvq_p): Remove.
23694 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23696 * config/arm/iterators.md (mve_insn): Add vaddlv.
23697 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
23698 (@mve_<mve_insn>q_<supf>v4si): ... this.
23699 (mve_vaddlvq_p_<supf>v4si): Rename into ...
23700 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23702 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23704 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
23705 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
23707 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23709 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
23710 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
23711 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
23712 * config/arm/arm_mve.h (vaddvaq): Remove.
23713 (vaddvaq_p): Remove.
23714 (vaddvaq_u8): Remove.
23715 (vaddvaq_s8): Remove.
23716 (vaddvaq_u16): Remove.
23717 (vaddvaq_s16): Remove.
23718 (vaddvaq_u32): Remove.
23719 (vaddvaq_s32): Remove.
23720 (vaddvaq_p_u8): Remove.
23721 (vaddvaq_p_s8): Remove.
23722 (vaddvaq_p_u16): Remove.
23723 (vaddvaq_p_s16): Remove.
23724 (vaddvaq_p_u32): Remove.
23725 (vaddvaq_p_s32): Remove.
23726 (__arm_vaddvaq_u8): Remove.
23727 (__arm_vaddvaq_s8): Remove.
23728 (__arm_vaddvaq_u16): Remove.
23729 (__arm_vaddvaq_s16): Remove.
23730 (__arm_vaddvaq_u32): Remove.
23731 (__arm_vaddvaq_s32): Remove.
23732 (__arm_vaddvaq_p_u8): Remove.
23733 (__arm_vaddvaq_p_s8): Remove.
23734 (__arm_vaddvaq_p_u16): Remove.
23735 (__arm_vaddvaq_p_s16): Remove.
23736 (__arm_vaddvaq_p_u32): Remove.
23737 (__arm_vaddvaq_p_s32): Remove.
23738 (__arm_vaddvaq): Remove.
23739 (__arm_vaddvaq_p): Remove.
23741 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23743 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
23744 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
23746 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23748 * config/arm/iterators.md (mve_insn): Add vaddva.
23749 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
23750 (@mve_<mve_insn>q_<supf><mode>): ... this.
23751 (mve_vaddvaq_p_<supf><mode>): Rename into ...
23752 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23754 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23756 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
23757 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
23758 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
23759 * config/arm/arm_mve.h (vaddvq): Remove.
23760 (vaddvq_p): Remove.
23761 (vaddvq_s8): Remove.
23762 (vaddvq_s16): Remove.
23763 (vaddvq_s32): Remove.
23764 (vaddvq_u8): Remove.
23765 (vaddvq_u16): Remove.
23766 (vaddvq_u32): Remove.
23767 (vaddvq_p_u8): Remove.
23768 (vaddvq_p_s8): Remove.
23769 (vaddvq_p_u16): Remove.
23770 (vaddvq_p_s16): Remove.
23771 (vaddvq_p_u32): Remove.
23772 (vaddvq_p_s32): Remove.
23773 (__arm_vaddvq_s8): Remove.
23774 (__arm_vaddvq_s16): Remove.
23775 (__arm_vaddvq_s32): Remove.
23776 (__arm_vaddvq_u8): Remove.
23777 (__arm_vaddvq_u16): Remove.
23778 (__arm_vaddvq_u32): Remove.
23779 (__arm_vaddvq_p_u8): Remove.
23780 (__arm_vaddvq_p_s8): Remove.
23781 (__arm_vaddvq_p_u16): Remove.
23782 (__arm_vaddvq_p_s16): Remove.
23783 (__arm_vaddvq_p_u32): Remove.
23784 (__arm_vaddvq_p_s32): Remove.
23785 (__arm_vaddvq): Remove.
23786 (__arm_vaddvq_p): Remove.
23788 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23790 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
23791 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
23793 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23795 * config/arm/iterators.md (mve_insn): Add vaddv.
23796 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
23797 (@mve_<mve_insn>q_<supf><mode>): ... this.
23798 (mve_vaddvq_p_<supf><mode>): Rename into ...
23799 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23800 * config/arm/vec-common.md: Use gen_mve_q instead of
23803 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23805 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
23807 * config/arm/arm-mve-builtins-base.def (vdupq): New.
23808 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
23809 * config/arm/arm_mve.h (vdupq_n): Remove.
23811 (vdupq_n_f16): Remove.
23812 (vdupq_n_f32): Remove.
23813 (vdupq_n_s8): Remove.
23814 (vdupq_n_s16): Remove.
23815 (vdupq_n_s32): Remove.
23816 (vdupq_n_u8): Remove.
23817 (vdupq_n_u16): Remove.
23818 (vdupq_n_u32): Remove.
23819 (vdupq_m_n_u8): Remove.
23820 (vdupq_m_n_s8): Remove.
23821 (vdupq_m_n_u16): Remove.
23822 (vdupq_m_n_s16): Remove.
23823 (vdupq_m_n_u32): Remove.
23824 (vdupq_m_n_s32): Remove.
23825 (vdupq_m_n_f16): Remove.
23826 (vdupq_m_n_f32): Remove.
23827 (vdupq_x_n_s8): Remove.
23828 (vdupq_x_n_s16): Remove.
23829 (vdupq_x_n_s32): Remove.
23830 (vdupq_x_n_u8): Remove.
23831 (vdupq_x_n_u16): Remove.
23832 (vdupq_x_n_u32): Remove.
23833 (vdupq_x_n_f16): Remove.
23834 (vdupq_x_n_f32): Remove.
23835 (__arm_vdupq_n_s8): Remove.
23836 (__arm_vdupq_n_s16): Remove.
23837 (__arm_vdupq_n_s32): Remove.
23838 (__arm_vdupq_n_u8): Remove.
23839 (__arm_vdupq_n_u16): Remove.
23840 (__arm_vdupq_n_u32): Remove.
23841 (__arm_vdupq_m_n_u8): Remove.
23842 (__arm_vdupq_m_n_s8): Remove.
23843 (__arm_vdupq_m_n_u16): Remove.
23844 (__arm_vdupq_m_n_s16): Remove.
23845 (__arm_vdupq_m_n_u32): Remove.
23846 (__arm_vdupq_m_n_s32): Remove.
23847 (__arm_vdupq_x_n_s8): Remove.
23848 (__arm_vdupq_x_n_s16): Remove.
23849 (__arm_vdupq_x_n_s32): Remove.
23850 (__arm_vdupq_x_n_u8): Remove.
23851 (__arm_vdupq_x_n_u16): Remove.
23852 (__arm_vdupq_x_n_u32): Remove.
23853 (__arm_vdupq_n_f16): Remove.
23854 (__arm_vdupq_n_f32): Remove.
23855 (__arm_vdupq_m_n_f16): Remove.
23856 (__arm_vdupq_m_n_f32): Remove.
23857 (__arm_vdupq_x_n_f16): Remove.
23858 (__arm_vdupq_x_n_f32): Remove.
23859 (__arm_vdupq_n): Remove.
23860 (__arm_vdupq_m): Remove.
23862 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23864 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
23865 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
23867 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23869 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
23870 (MVE_FP_N_VDUPQ_ONLY): New.
23871 (mve_insn): Add vdupq.
23872 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
23873 (@mve_<mve_insn>q_n_f<mode>): ... this.
23874 (mve_vdupq_n_<supf><mode>): Rename into ...
23875 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23876 (mve_vdupq_m_n_<supf><mode>): Rename into ...
23877 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23878 (mve_vdupq_m_n_f<mode>): Rename into ...
23879 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23881 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23883 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
23885 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
23887 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
23889 * config/arm/arm_mve.h (vrev16q): Remove.
23892 (vrev64q_m): Remove.
23893 (vrev16q_m): Remove.
23894 (vrev32q_m): Remove.
23895 (vrev16q_x): Remove.
23896 (vrev32q_x): Remove.
23897 (vrev64q_x): Remove.
23898 (vrev64q_f16): Remove.
23899 (vrev64q_f32): Remove.
23900 (vrev32q_f16): Remove.
23901 (vrev16q_s8): Remove.
23902 (vrev32q_s8): Remove.
23903 (vrev32q_s16): Remove.
23904 (vrev64q_s8): Remove.
23905 (vrev64q_s16): Remove.
23906 (vrev64q_s32): Remove.
23907 (vrev64q_u8): Remove.
23908 (vrev64q_u16): Remove.
23909 (vrev64q_u32): Remove.
23910 (vrev32q_u8): Remove.
23911 (vrev32q_u16): Remove.
23912 (vrev16q_u8): Remove.
23913 (vrev64q_m_u8): Remove.
23914 (vrev64q_m_s8): Remove.
23915 (vrev64q_m_u16): Remove.
23916 (vrev64q_m_s16): Remove.
23917 (vrev64q_m_u32): Remove.
23918 (vrev64q_m_s32): Remove.
23919 (vrev16q_m_s8): Remove.
23920 (vrev32q_m_f16): Remove.
23921 (vrev16q_m_u8): Remove.
23922 (vrev32q_m_s8): Remove.
23923 (vrev64q_m_f16): Remove.
23924 (vrev32q_m_u8): Remove.
23925 (vrev32q_m_s16): Remove.
23926 (vrev64q_m_f32): Remove.
23927 (vrev32q_m_u16): Remove.
23928 (vrev16q_x_s8): Remove.
23929 (vrev16q_x_u8): Remove.
23930 (vrev32q_x_s8): Remove.
23931 (vrev32q_x_s16): Remove.
23932 (vrev32q_x_u8): Remove.
23933 (vrev32q_x_u16): Remove.
23934 (vrev64q_x_s8): Remove.
23935 (vrev64q_x_s16): Remove.
23936 (vrev64q_x_s32): Remove.
23937 (vrev64q_x_u8): Remove.
23938 (vrev64q_x_u16): Remove.
23939 (vrev64q_x_u32): Remove.
23940 (vrev32q_x_f16): Remove.
23941 (vrev64q_x_f16): Remove.
23942 (vrev64q_x_f32): Remove.
23943 (__arm_vrev16q_s8): Remove.
23944 (__arm_vrev32q_s8): Remove.
23945 (__arm_vrev32q_s16): Remove.
23946 (__arm_vrev64q_s8): Remove.
23947 (__arm_vrev64q_s16): Remove.
23948 (__arm_vrev64q_s32): Remove.
23949 (__arm_vrev64q_u8): Remove.
23950 (__arm_vrev64q_u16): Remove.
23951 (__arm_vrev64q_u32): Remove.
23952 (__arm_vrev32q_u8): Remove.
23953 (__arm_vrev32q_u16): Remove.
23954 (__arm_vrev16q_u8): Remove.
23955 (__arm_vrev64q_m_u8): Remove.
23956 (__arm_vrev64q_m_s8): Remove.
23957 (__arm_vrev64q_m_u16): Remove.
23958 (__arm_vrev64q_m_s16): Remove.
23959 (__arm_vrev64q_m_u32): Remove.
23960 (__arm_vrev64q_m_s32): Remove.
23961 (__arm_vrev16q_m_s8): Remove.
23962 (__arm_vrev16q_m_u8): Remove.
23963 (__arm_vrev32q_m_s8): Remove.
23964 (__arm_vrev32q_m_u8): Remove.
23965 (__arm_vrev32q_m_s16): Remove.
23966 (__arm_vrev32q_m_u16): Remove.
23967 (__arm_vrev16q_x_s8): Remove.
23968 (__arm_vrev16q_x_u8): Remove.
23969 (__arm_vrev32q_x_s8): Remove.
23970 (__arm_vrev32q_x_s16): Remove.
23971 (__arm_vrev32q_x_u8): Remove.
23972 (__arm_vrev32q_x_u16): Remove.
23973 (__arm_vrev64q_x_s8): Remove.
23974 (__arm_vrev64q_x_s16): Remove.
23975 (__arm_vrev64q_x_s32): Remove.
23976 (__arm_vrev64q_x_u8): Remove.
23977 (__arm_vrev64q_x_u16): Remove.
23978 (__arm_vrev64q_x_u32): Remove.
23979 (__arm_vrev64q_f16): Remove.
23980 (__arm_vrev64q_f32): Remove.
23981 (__arm_vrev32q_f16): Remove.
23982 (__arm_vrev32q_m_f16): Remove.
23983 (__arm_vrev64q_m_f16): Remove.
23984 (__arm_vrev64q_m_f32): Remove.
23985 (__arm_vrev32q_x_f16): Remove.
23986 (__arm_vrev64q_x_f16): Remove.
23987 (__arm_vrev64q_x_f32): Remove.
23988 (__arm_vrev16q): Remove.
23989 (__arm_vrev32q): Remove.
23990 (__arm_vrev64q): Remove.
23991 (__arm_vrev64q_m): Remove.
23992 (__arm_vrev16q_m): Remove.
23993 (__arm_vrev32q_m): Remove.
23994 (__arm_vrev16q_x): Remove.
23995 (__arm_vrev32q_x): Remove.
23996 (__arm_vrev64q_x): Remove.
23998 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24000 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
24001 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
24002 (MVE_FP_M_VREV32Q_ONLY): New iterators.
24003 (mve_insn): Add vrev16q, vrev32q, vrev64q.
24004 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
24005 (@mve_<mve_insn>q_f<mode>): ... this
24006 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
24007 (mve_vrev64q_<supf><mode>): Rename into ...
24008 (@mve_<mve_insn>q_<supf><mode>): ... this.
24009 (mve_vrev32q_<supf><mode>): Rename into
24010 @mve_<mve_insn>q_<supf><mode>.
24011 (mve_vrev16q_<supf>v16qi): Rename into
24012 @mve_<mve_insn>q_<supf><mode>.
24013 (mve_vrev64q_m_<supf><mode>): Rename into
24014 @mve_<mve_insn>q_m_<supf><mode>.
24015 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
24016 (mve_vrev32q_m_<supf><mode>): Rename into
24017 @mve_<mve_insn>q_m_<supf><mode>.
24018 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
24019 (mve_vrev16q_m_<supf>v16qi): Rename into
24020 @mve_<mve_insn>q_m_<supf><mode>.
24022 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24024 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
24025 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24026 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
24027 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24028 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
24029 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24030 * config/arm/arm-mve-builtins-functions.h (class
24031 unspec_based_mve_function_exact_insn_vcmp): New.
24032 * config/arm/arm-mve-builtins.cc
24033 (function_instance::has_inactive_argument): Handle vcmp.
24034 * config/arm/arm_mve.h (vcmpneq): Remove.
24042 (vcmpneq_m): Remove.
24043 (vcmphiq_m): Remove.
24044 (vcmpeqq_m): Remove.
24045 (vcmpcsq_m): Remove.
24046 (vcmpcsq_m_n): Remove.
24047 (vcmpltq_m): Remove.
24048 (vcmpleq_m): Remove.
24049 (vcmpgtq_m): Remove.
24050 (vcmpgeq_m): Remove.
24051 (vcmpneq_s8): Remove.
24052 (vcmpneq_s16): Remove.
24053 (vcmpneq_s32): Remove.
24054 (vcmpneq_u8): Remove.
24055 (vcmpneq_u16): Remove.
24056 (vcmpneq_u32): Remove.
24057 (vcmpneq_n_u8): Remove.
24058 (vcmphiq_u8): Remove.
24059 (vcmphiq_n_u8): Remove.
24060 (vcmpeqq_u8): Remove.
24061 (vcmpeqq_n_u8): Remove.
24062 (vcmpcsq_u8): Remove.
24063 (vcmpcsq_n_u8): Remove.
24064 (vcmpneq_n_s8): Remove.
24065 (vcmpltq_s8): Remove.
24066 (vcmpltq_n_s8): Remove.
24067 (vcmpleq_s8): Remove.
24068 (vcmpleq_n_s8): Remove.
24069 (vcmpgtq_s8): Remove.
24070 (vcmpgtq_n_s8): Remove.
24071 (vcmpgeq_s8): Remove.
24072 (vcmpgeq_n_s8): Remove.
24073 (vcmpeqq_s8): Remove.
24074 (vcmpeqq_n_s8): Remove.
24075 (vcmpneq_n_u16): Remove.
24076 (vcmphiq_u16): Remove.
24077 (vcmphiq_n_u16): Remove.
24078 (vcmpeqq_u16): Remove.
24079 (vcmpeqq_n_u16): Remove.
24080 (vcmpcsq_u16): Remove.
24081 (vcmpcsq_n_u16): Remove.
24082 (vcmpneq_n_s16): Remove.
24083 (vcmpltq_s16): Remove.
24084 (vcmpltq_n_s16): Remove.
24085 (vcmpleq_s16): Remove.
24086 (vcmpleq_n_s16): Remove.
24087 (vcmpgtq_s16): Remove.
24088 (vcmpgtq_n_s16): Remove.
24089 (vcmpgeq_s16): Remove.
24090 (vcmpgeq_n_s16): Remove.
24091 (vcmpeqq_s16): Remove.
24092 (vcmpeqq_n_s16): Remove.
24093 (vcmpneq_n_u32): Remove.
24094 (vcmphiq_u32): Remove.
24095 (vcmphiq_n_u32): Remove.
24096 (vcmpeqq_u32): Remove.
24097 (vcmpeqq_n_u32): Remove.
24098 (vcmpcsq_u32): Remove.
24099 (vcmpcsq_n_u32): Remove.
24100 (vcmpneq_n_s32): Remove.
24101 (vcmpltq_s32): Remove.
24102 (vcmpltq_n_s32): Remove.
24103 (vcmpleq_s32): Remove.
24104 (vcmpleq_n_s32): Remove.
24105 (vcmpgtq_s32): Remove.
24106 (vcmpgtq_n_s32): Remove.
24107 (vcmpgeq_s32): Remove.
24108 (vcmpgeq_n_s32): Remove.
24109 (vcmpeqq_s32): Remove.
24110 (vcmpeqq_n_s32): Remove.
24111 (vcmpneq_n_f16): Remove.
24112 (vcmpneq_f16): Remove.
24113 (vcmpltq_n_f16): Remove.
24114 (vcmpltq_f16): Remove.
24115 (vcmpleq_n_f16): Remove.
24116 (vcmpleq_f16): Remove.
24117 (vcmpgtq_n_f16): Remove.
24118 (vcmpgtq_f16): Remove.
24119 (vcmpgeq_n_f16): Remove.
24120 (vcmpgeq_f16): Remove.
24121 (vcmpeqq_n_f16): Remove.
24122 (vcmpeqq_f16): Remove.
24123 (vcmpneq_n_f32): Remove.
24124 (vcmpneq_f32): Remove.
24125 (vcmpltq_n_f32): Remove.
24126 (vcmpltq_f32): Remove.
24127 (vcmpleq_n_f32): Remove.
24128 (vcmpleq_f32): Remove.
24129 (vcmpgtq_n_f32): Remove.
24130 (vcmpgtq_f32): Remove.
24131 (vcmpgeq_n_f32): Remove.
24132 (vcmpgeq_f32): Remove.
24133 (vcmpeqq_n_f32): Remove.
24134 (vcmpeqq_f32): Remove.
24135 (vcmpeqq_m_f16): Remove.
24136 (vcmpeqq_m_f32): Remove.
24137 (vcmpneq_m_u8): Remove.
24138 (vcmpneq_m_n_u8): Remove.
24139 (vcmphiq_m_u8): Remove.
24140 (vcmphiq_m_n_u8): Remove.
24141 (vcmpeqq_m_u8): Remove.
24142 (vcmpeqq_m_n_u8): Remove.
24143 (vcmpcsq_m_u8): Remove.
24144 (vcmpcsq_m_n_u8): Remove.
24145 (vcmpneq_m_s8): Remove.
24146 (vcmpneq_m_n_s8): Remove.
24147 (vcmpltq_m_s8): Remove.
24148 (vcmpltq_m_n_s8): Remove.
24149 (vcmpleq_m_s8): Remove.
24150 (vcmpleq_m_n_s8): Remove.
24151 (vcmpgtq_m_s8): Remove.
24152 (vcmpgtq_m_n_s8): Remove.
24153 (vcmpgeq_m_s8): Remove.
24154 (vcmpgeq_m_n_s8): Remove.
24155 (vcmpeqq_m_s8): Remove.
24156 (vcmpeqq_m_n_s8): Remove.
24157 (vcmpneq_m_u16): Remove.
24158 (vcmpneq_m_n_u16): Remove.
24159 (vcmphiq_m_u16): Remove.
24160 (vcmphiq_m_n_u16): Remove.
24161 (vcmpeqq_m_u16): Remove.
24162 (vcmpeqq_m_n_u16): Remove.
24163 (vcmpcsq_m_u16): Remove.
24164 (vcmpcsq_m_n_u16): Remove.
24165 (vcmpneq_m_s16): Remove.
24166 (vcmpneq_m_n_s16): Remove.
24167 (vcmpltq_m_s16): Remove.
24168 (vcmpltq_m_n_s16): Remove.
24169 (vcmpleq_m_s16): Remove.
24170 (vcmpleq_m_n_s16): Remove.
24171 (vcmpgtq_m_s16): Remove.
24172 (vcmpgtq_m_n_s16): Remove.
24173 (vcmpgeq_m_s16): Remove.
24174 (vcmpgeq_m_n_s16): Remove.
24175 (vcmpeqq_m_s16): Remove.
24176 (vcmpeqq_m_n_s16): Remove.
24177 (vcmpneq_m_u32): Remove.
24178 (vcmpneq_m_n_u32): Remove.
24179 (vcmphiq_m_u32): Remove.
24180 (vcmphiq_m_n_u32): Remove.
24181 (vcmpeqq_m_u32): Remove.
24182 (vcmpeqq_m_n_u32): Remove.
24183 (vcmpcsq_m_u32): Remove.
24184 (vcmpcsq_m_n_u32): Remove.
24185 (vcmpneq_m_s32): Remove.
24186 (vcmpneq_m_n_s32): Remove.
24187 (vcmpltq_m_s32): Remove.
24188 (vcmpltq_m_n_s32): Remove.
24189 (vcmpleq_m_s32): Remove.
24190 (vcmpleq_m_n_s32): Remove.
24191 (vcmpgtq_m_s32): Remove.
24192 (vcmpgtq_m_n_s32): Remove.
24193 (vcmpgeq_m_s32): Remove.
24194 (vcmpgeq_m_n_s32): Remove.
24195 (vcmpeqq_m_s32): Remove.
24196 (vcmpeqq_m_n_s32): Remove.
24197 (vcmpeqq_m_n_f16): Remove.
24198 (vcmpgeq_m_f16): Remove.
24199 (vcmpgeq_m_n_f16): Remove.
24200 (vcmpgtq_m_f16): Remove.
24201 (vcmpgtq_m_n_f16): Remove.
24202 (vcmpleq_m_f16): Remove.
24203 (vcmpleq_m_n_f16): Remove.
24204 (vcmpltq_m_f16): Remove.
24205 (vcmpltq_m_n_f16): Remove.
24206 (vcmpneq_m_f16): Remove.
24207 (vcmpneq_m_n_f16): Remove.
24208 (vcmpeqq_m_n_f32): Remove.
24209 (vcmpgeq_m_f32): Remove.
24210 (vcmpgeq_m_n_f32): Remove.
24211 (vcmpgtq_m_f32): Remove.
24212 (vcmpgtq_m_n_f32): Remove.
24213 (vcmpleq_m_f32): Remove.
24214 (vcmpleq_m_n_f32): Remove.
24215 (vcmpltq_m_f32): Remove.
24216 (vcmpltq_m_n_f32): Remove.
24217 (vcmpneq_m_f32): Remove.
24218 (vcmpneq_m_n_f32): Remove.
24219 (__arm_vcmpneq_s8): Remove.
24220 (__arm_vcmpneq_s16): Remove.
24221 (__arm_vcmpneq_s32): Remove.
24222 (__arm_vcmpneq_u8): Remove.
24223 (__arm_vcmpneq_u16): Remove.
24224 (__arm_vcmpneq_u32): Remove.
24225 (__arm_vcmpneq_n_u8): Remove.
24226 (__arm_vcmphiq_u8): Remove.
24227 (__arm_vcmphiq_n_u8): Remove.
24228 (__arm_vcmpeqq_u8): Remove.
24229 (__arm_vcmpeqq_n_u8): Remove.
24230 (__arm_vcmpcsq_u8): Remove.
24231 (__arm_vcmpcsq_n_u8): Remove.
24232 (__arm_vcmpneq_n_s8): Remove.
24233 (__arm_vcmpltq_s8): Remove.
24234 (__arm_vcmpltq_n_s8): Remove.
24235 (__arm_vcmpleq_s8): Remove.
24236 (__arm_vcmpleq_n_s8): Remove.
24237 (__arm_vcmpgtq_s8): Remove.
24238 (__arm_vcmpgtq_n_s8): Remove.
24239 (__arm_vcmpgeq_s8): Remove.
24240 (__arm_vcmpgeq_n_s8): Remove.
24241 (__arm_vcmpeqq_s8): Remove.
24242 (__arm_vcmpeqq_n_s8): Remove.
24243 (__arm_vcmpneq_n_u16): Remove.
24244 (__arm_vcmphiq_u16): Remove.
24245 (__arm_vcmphiq_n_u16): Remove.
24246 (__arm_vcmpeqq_u16): Remove.
24247 (__arm_vcmpeqq_n_u16): Remove.
24248 (__arm_vcmpcsq_u16): Remove.
24249 (__arm_vcmpcsq_n_u16): Remove.
24250 (__arm_vcmpneq_n_s16): Remove.
24251 (__arm_vcmpltq_s16): Remove.
24252 (__arm_vcmpltq_n_s16): Remove.
24253 (__arm_vcmpleq_s16): Remove.
24254 (__arm_vcmpleq_n_s16): Remove.
24255 (__arm_vcmpgtq_s16): Remove.
24256 (__arm_vcmpgtq_n_s16): Remove.
24257 (__arm_vcmpgeq_s16): Remove.
24258 (__arm_vcmpgeq_n_s16): Remove.
24259 (__arm_vcmpeqq_s16): Remove.
24260 (__arm_vcmpeqq_n_s16): Remove.
24261 (__arm_vcmpneq_n_u32): Remove.
24262 (__arm_vcmphiq_u32): Remove.
24263 (__arm_vcmphiq_n_u32): Remove.
24264 (__arm_vcmpeqq_u32): Remove.
24265 (__arm_vcmpeqq_n_u32): Remove.
24266 (__arm_vcmpcsq_u32): Remove.
24267 (__arm_vcmpcsq_n_u32): Remove.
24268 (__arm_vcmpneq_n_s32): Remove.
24269 (__arm_vcmpltq_s32): Remove.
24270 (__arm_vcmpltq_n_s32): Remove.
24271 (__arm_vcmpleq_s32): Remove.
24272 (__arm_vcmpleq_n_s32): Remove.
24273 (__arm_vcmpgtq_s32): Remove.
24274 (__arm_vcmpgtq_n_s32): Remove.
24275 (__arm_vcmpgeq_s32): Remove.
24276 (__arm_vcmpgeq_n_s32): Remove.
24277 (__arm_vcmpeqq_s32): Remove.
24278 (__arm_vcmpeqq_n_s32): Remove.
24279 (__arm_vcmpneq_m_u8): Remove.
24280 (__arm_vcmpneq_m_n_u8): Remove.
24281 (__arm_vcmphiq_m_u8): Remove.
24282 (__arm_vcmphiq_m_n_u8): Remove.
24283 (__arm_vcmpeqq_m_u8): Remove.
24284 (__arm_vcmpeqq_m_n_u8): Remove.
24285 (__arm_vcmpcsq_m_u8): Remove.
24286 (__arm_vcmpcsq_m_n_u8): Remove.
24287 (__arm_vcmpneq_m_s8): Remove.
24288 (__arm_vcmpneq_m_n_s8): Remove.
24289 (__arm_vcmpltq_m_s8): Remove.
24290 (__arm_vcmpltq_m_n_s8): Remove.
24291 (__arm_vcmpleq_m_s8): Remove.
24292 (__arm_vcmpleq_m_n_s8): Remove.
24293 (__arm_vcmpgtq_m_s8): Remove.
24294 (__arm_vcmpgtq_m_n_s8): Remove.
24295 (__arm_vcmpgeq_m_s8): Remove.
24296 (__arm_vcmpgeq_m_n_s8): Remove.
24297 (__arm_vcmpeqq_m_s8): Remove.
24298 (__arm_vcmpeqq_m_n_s8): Remove.
24299 (__arm_vcmpneq_m_u16): Remove.
24300 (__arm_vcmpneq_m_n_u16): Remove.
24301 (__arm_vcmphiq_m_u16): Remove.
24302 (__arm_vcmphiq_m_n_u16): Remove.
24303 (__arm_vcmpeqq_m_u16): Remove.
24304 (__arm_vcmpeqq_m_n_u16): Remove.
24305 (__arm_vcmpcsq_m_u16): Remove.
24306 (__arm_vcmpcsq_m_n_u16): Remove.
24307 (__arm_vcmpneq_m_s16): Remove.
24308 (__arm_vcmpneq_m_n_s16): Remove.
24309 (__arm_vcmpltq_m_s16): Remove.
24310 (__arm_vcmpltq_m_n_s16): Remove.
24311 (__arm_vcmpleq_m_s16): Remove.
24312 (__arm_vcmpleq_m_n_s16): Remove.
24313 (__arm_vcmpgtq_m_s16): Remove.
24314 (__arm_vcmpgtq_m_n_s16): Remove.
24315 (__arm_vcmpgeq_m_s16): Remove.
24316 (__arm_vcmpgeq_m_n_s16): Remove.
24317 (__arm_vcmpeqq_m_s16): Remove.
24318 (__arm_vcmpeqq_m_n_s16): Remove.
24319 (__arm_vcmpneq_m_u32): Remove.
24320 (__arm_vcmpneq_m_n_u32): Remove.
24321 (__arm_vcmphiq_m_u32): Remove.
24322 (__arm_vcmphiq_m_n_u32): Remove.
24323 (__arm_vcmpeqq_m_u32): Remove.
24324 (__arm_vcmpeqq_m_n_u32): Remove.
24325 (__arm_vcmpcsq_m_u32): Remove.
24326 (__arm_vcmpcsq_m_n_u32): Remove.
24327 (__arm_vcmpneq_m_s32): Remove.
24328 (__arm_vcmpneq_m_n_s32): Remove.
24329 (__arm_vcmpltq_m_s32): Remove.
24330 (__arm_vcmpltq_m_n_s32): Remove.
24331 (__arm_vcmpleq_m_s32): Remove.
24332 (__arm_vcmpleq_m_n_s32): Remove.
24333 (__arm_vcmpgtq_m_s32): Remove.
24334 (__arm_vcmpgtq_m_n_s32): Remove.
24335 (__arm_vcmpgeq_m_s32): Remove.
24336 (__arm_vcmpgeq_m_n_s32): Remove.
24337 (__arm_vcmpeqq_m_s32): Remove.
24338 (__arm_vcmpeqq_m_n_s32): Remove.
24339 (__arm_vcmpneq_n_f16): Remove.
24340 (__arm_vcmpneq_f16): Remove.
24341 (__arm_vcmpltq_n_f16): Remove.
24342 (__arm_vcmpltq_f16): Remove.
24343 (__arm_vcmpleq_n_f16): Remove.
24344 (__arm_vcmpleq_f16): Remove.
24345 (__arm_vcmpgtq_n_f16): Remove.
24346 (__arm_vcmpgtq_f16): Remove.
24347 (__arm_vcmpgeq_n_f16): Remove.
24348 (__arm_vcmpgeq_f16): Remove.
24349 (__arm_vcmpeqq_n_f16): Remove.
24350 (__arm_vcmpeqq_f16): Remove.
24351 (__arm_vcmpneq_n_f32): Remove.
24352 (__arm_vcmpneq_f32): Remove.
24353 (__arm_vcmpltq_n_f32): Remove.
24354 (__arm_vcmpltq_f32): Remove.
24355 (__arm_vcmpleq_n_f32): Remove.
24356 (__arm_vcmpleq_f32): Remove.
24357 (__arm_vcmpgtq_n_f32): Remove.
24358 (__arm_vcmpgtq_f32): Remove.
24359 (__arm_vcmpgeq_n_f32): Remove.
24360 (__arm_vcmpgeq_f32): Remove.
24361 (__arm_vcmpeqq_n_f32): Remove.
24362 (__arm_vcmpeqq_f32): Remove.
24363 (__arm_vcmpeqq_m_f16): Remove.
24364 (__arm_vcmpeqq_m_f32): Remove.
24365 (__arm_vcmpeqq_m_n_f16): Remove.
24366 (__arm_vcmpgeq_m_f16): Remove.
24367 (__arm_vcmpgeq_m_n_f16): Remove.
24368 (__arm_vcmpgtq_m_f16): Remove.
24369 (__arm_vcmpgtq_m_n_f16): Remove.
24370 (__arm_vcmpleq_m_f16): Remove.
24371 (__arm_vcmpleq_m_n_f16): Remove.
24372 (__arm_vcmpltq_m_f16): Remove.
24373 (__arm_vcmpltq_m_n_f16): Remove.
24374 (__arm_vcmpneq_m_f16): Remove.
24375 (__arm_vcmpneq_m_n_f16): Remove.
24376 (__arm_vcmpeqq_m_n_f32): Remove.
24377 (__arm_vcmpgeq_m_f32): Remove.
24378 (__arm_vcmpgeq_m_n_f32): Remove.
24379 (__arm_vcmpgtq_m_f32): Remove.
24380 (__arm_vcmpgtq_m_n_f32): Remove.
24381 (__arm_vcmpleq_m_f32): Remove.
24382 (__arm_vcmpleq_m_n_f32): Remove.
24383 (__arm_vcmpltq_m_f32): Remove.
24384 (__arm_vcmpltq_m_n_f32): Remove.
24385 (__arm_vcmpneq_m_f32): Remove.
24386 (__arm_vcmpneq_m_n_f32): Remove.
24387 (__arm_vcmpneq): Remove.
24388 (__arm_vcmphiq): Remove.
24389 (__arm_vcmpeqq): Remove.
24390 (__arm_vcmpcsq): Remove.
24391 (__arm_vcmpltq): Remove.
24392 (__arm_vcmpleq): Remove.
24393 (__arm_vcmpgtq): Remove.
24394 (__arm_vcmpgeq): Remove.
24395 (__arm_vcmpneq_m): Remove.
24396 (__arm_vcmphiq_m): Remove.
24397 (__arm_vcmpeqq_m): Remove.
24398 (__arm_vcmpcsq_m): Remove.
24399 (__arm_vcmpltq_m): Remove.
24400 (__arm_vcmpleq_m): Remove.
24401 (__arm_vcmpgtq_m): Remove.
24402 (__arm_vcmpgeq_m): Remove.
24404 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24406 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
24407 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
24409 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24411 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
24412 (MVE_CMP_M_N_F, mve_cmp_op1): New.
24415 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
24416 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
24417 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
24418 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
24419 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
24420 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
24421 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
24422 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
24423 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
24424 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
24426 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
24427 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
24428 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
24429 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
24430 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
24432 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
24433 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
24434 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
24435 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
24436 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
24438 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
24440 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
24441 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
24442 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
24445 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
24447 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
24448 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
24449 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
24450 Simplify parity(rotate(x,y)) as parity(x).
24452 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24454 * config/riscv/autovec.md (@vec_series<mode>): New pattern
24455 * config/riscv/riscv-protos.h (expand_vec_series): New function.
24456 * config/riscv/riscv-v.cc (emit_binop): Ditto.
24457 (emit_index_op): Ditto.
24458 (expand_vec_series): Ditto.
24459 (expand_const_vector): Add series vector handling.
24460 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
24462 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
24464 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
24465 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
24466 (*concat<mode><dwi>3_2): Likewise.
24467 (*concat<mode><dwi>3_3): Likewise.
24468 (*concat<mode><dwi>3_4): Likewise.
24469 (*concat<mode><dwi>3_5): Likewise.
24470 (*concat<mode><dwi>3_6): Likewise.
24471 (*concat<mode><dwi>3_7): Likewise.
24473 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
24476 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
24477 (<insn>v4qiv4hi2): New expander.
24478 (<insn>v2hiv2si2): Ditto.
24479 (<insn>v2qiv2si2): Ditto.
24480 (<insn>v2qiv2hi2): Ditto.
24482 2023-05-10 Jeff Law <jlaw@ventanamicro>
24484 * config/h8300/constraints.md (Q): Make this a special memory
24488 2023-05-10 Jakub Jelinek <jakub@redhat.com>
24491 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
24492 if t is void_list_node.
24494 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24496 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
24497 (aarch64_sqmovun<mode>_insn_be): Delete.
24498 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
24499 (aarch64_sqmovun<mode>): Delete expander.
24501 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24504 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
24506 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
24507 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
24508 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
24510 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24513 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
24515 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
24516 (aarch64_<sur>qadd<mode>): Rename to...
24517 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
24519 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24521 * config/aarch64/aarch64-simd.md
24522 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
24523 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
24524 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
24525 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
24527 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24530 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
24531 (aarch64_xtn<mode>_insn_be): Likewise.
24532 (trunc<mode><Vnarrowq>2): Rename to...
24533 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
24534 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
24535 (aarch64_<su>qmovn<mode>): Likewise.
24536 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
24537 (aarch64_<su>qmovn<mode>_insn_le): Delete.
24538 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
24540 2023-05-10 Li Xu <xuli1@eswincomputing.com>
24542 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
24543 intruction replace null avl with (const_int 0).
24545 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24547 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
24550 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24553 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
24554 (source_equal_p): Fix dead loop in vsetvl avl checking.
24556 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
24558 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
24559 of modeadjusted_dccr.
24561 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24563 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
24564 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
24565 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
24566 * config/arm/arm-mve-builtins.cc
24567 (function_instance::has_inactive_argument): Handle vmaxaq and
24569 * config/arm/arm_mve.h (vminaq): Remove.
24571 (vminaq_m): Remove.
24572 (vmaxaq_m): Remove.
24573 (vminaq_s8): Remove.
24574 (vmaxaq_s8): Remove.
24575 (vminaq_s16): Remove.
24576 (vmaxaq_s16): Remove.
24577 (vminaq_s32): Remove.
24578 (vmaxaq_s32): Remove.
24579 (vminaq_m_s8): Remove.
24580 (vmaxaq_m_s8): Remove.
24581 (vminaq_m_s16): Remove.
24582 (vmaxaq_m_s16): Remove.
24583 (vminaq_m_s32): Remove.
24584 (vmaxaq_m_s32): Remove.
24585 (__arm_vminaq_s8): Remove.
24586 (__arm_vmaxaq_s8): Remove.
24587 (__arm_vminaq_s16): Remove.
24588 (__arm_vmaxaq_s16): Remove.
24589 (__arm_vminaq_s32): Remove.
24590 (__arm_vmaxaq_s32): Remove.
24591 (__arm_vminaq_m_s8): Remove.
24592 (__arm_vmaxaq_m_s8): Remove.
24593 (__arm_vminaq_m_s16): Remove.
24594 (__arm_vmaxaq_m_s16): Remove.
24595 (__arm_vminaq_m_s32): Remove.
24596 (__arm_vmaxaq_m_s32): Remove.
24597 (__arm_vminaq): Remove.
24598 (__arm_vmaxaq): Remove.
24599 (__arm_vminaq_m): Remove.
24600 (__arm_vmaxaq_m): Remove.
24602 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24604 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
24606 (mve_insn): Add vmaxa, vmina.
24607 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
24608 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
24610 (@mve_<mve_insn>q_<supf><mode>): ... this.
24611 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
24612 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24614 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24616 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
24617 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
24619 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24621 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
24622 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
24623 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
24624 * config/arm/arm-mve-builtins.cc
24625 (function_instance::has_inactive_argument): Handle vmaxnmaq and
24627 * config/arm/arm_mve.h (vminnmaq): Remove.
24628 (vmaxnmaq): Remove.
24629 (vmaxnmaq_m): Remove.
24630 (vminnmaq_m): Remove.
24631 (vminnmaq_f16): Remove.
24632 (vmaxnmaq_f16): Remove.
24633 (vminnmaq_f32): Remove.
24634 (vmaxnmaq_f32): Remove.
24635 (vmaxnmaq_m_f16): Remove.
24636 (vminnmaq_m_f16): Remove.
24637 (vmaxnmaq_m_f32): Remove.
24638 (vminnmaq_m_f32): Remove.
24639 (__arm_vminnmaq_f16): Remove.
24640 (__arm_vmaxnmaq_f16): Remove.
24641 (__arm_vminnmaq_f32): Remove.
24642 (__arm_vmaxnmaq_f32): Remove.
24643 (__arm_vmaxnmaq_m_f16): Remove.
24644 (__arm_vminnmaq_m_f16): Remove.
24645 (__arm_vmaxnmaq_m_f32): Remove.
24646 (__arm_vminnmaq_m_f32): Remove.
24647 (__arm_vminnmaq): Remove.
24648 (__arm_vmaxnmaq): Remove.
24649 (__arm_vmaxnmaq_m): Remove.
24650 (__arm_vminnmaq_m): Remove.
24652 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24654 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
24655 (MVE_VMAXNMA_VMINNMAQ_M): New.
24656 (mve_insn): Add vmaxnma, vminnma.
24657 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
24659 (@mve_<mve_insn>q_f<mode>): ... this.
24660 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
24661 (@mve_<mve_insn>q_m_f<mode>): ... this.
24663 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24665 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
24666 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
24667 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
24668 (vminnmavq, vminnmvq): New.
24669 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
24670 (vminnmavq, vminnmvq): New.
24671 * config/arm/arm_mve.h (vminnmvq): Remove.
24672 (vminnmavq): Remove.
24673 (vmaxnmvq): Remove.
24674 (vmaxnmavq): Remove.
24675 (vmaxnmavq_p): Remove.
24676 (vmaxnmvq_p): Remove.
24677 (vminnmavq_p): Remove.
24678 (vminnmvq_p): Remove.
24679 (vminnmvq_f16): Remove.
24680 (vminnmavq_f16): Remove.
24681 (vmaxnmvq_f16): Remove.
24682 (vmaxnmavq_f16): Remove.
24683 (vminnmvq_f32): Remove.
24684 (vminnmavq_f32): Remove.
24685 (vmaxnmvq_f32): Remove.
24686 (vmaxnmavq_f32): Remove.
24687 (vmaxnmavq_p_f16): Remove.
24688 (vmaxnmvq_p_f16): Remove.
24689 (vminnmavq_p_f16): Remove.
24690 (vminnmvq_p_f16): Remove.
24691 (vmaxnmavq_p_f32): Remove.
24692 (vmaxnmvq_p_f32): Remove.
24693 (vminnmavq_p_f32): Remove.
24694 (vminnmvq_p_f32): Remove.
24695 (__arm_vminnmvq_f16): Remove.
24696 (__arm_vminnmavq_f16): Remove.
24697 (__arm_vmaxnmvq_f16): Remove.
24698 (__arm_vmaxnmavq_f16): Remove.
24699 (__arm_vminnmvq_f32): Remove.
24700 (__arm_vminnmavq_f32): Remove.
24701 (__arm_vmaxnmvq_f32): Remove.
24702 (__arm_vmaxnmavq_f32): Remove.
24703 (__arm_vmaxnmavq_p_f16): Remove.
24704 (__arm_vmaxnmvq_p_f16): Remove.
24705 (__arm_vminnmavq_p_f16): Remove.
24706 (__arm_vminnmvq_p_f16): Remove.
24707 (__arm_vmaxnmavq_p_f32): Remove.
24708 (__arm_vmaxnmvq_p_f32): Remove.
24709 (__arm_vminnmavq_p_f32): Remove.
24710 (__arm_vminnmvq_p_f32): Remove.
24711 (__arm_vminnmvq): Remove.
24712 (__arm_vminnmavq): Remove.
24713 (__arm_vmaxnmvq): Remove.
24714 (__arm_vmaxnmavq): Remove.
24715 (__arm_vmaxnmavq_p): Remove.
24716 (__arm_vmaxnmvq_p): Remove.
24717 (__arm_vminnmavq_p): Remove.
24718 (__arm_vminnmvq_p): Remove.
24719 (__arm_vmaxnmavq_m): Remove.
24720 (__arm_vmaxnmvq_m): Remove.
24722 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24724 * config/arm/arm-mve-builtins-functions.h
24725 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
24727 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24729 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
24730 (MVE_VMAXNMxV_MINNMxVQ_P): New.
24731 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
24732 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
24733 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
24734 (@mve_<mve_insn>q_f<mode>): ... this.
24735 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
24736 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
24737 (@mve_<mve_insn>q_p_f<mode>): ... this.
24739 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24741 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
24742 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
24743 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
24744 * config/arm/arm_mve.h (vminnmq): Remove.
24746 (vmaxnmq_m): Remove.
24747 (vminnmq_m): Remove.
24748 (vminnmq_x): Remove.
24749 (vmaxnmq_x): Remove.
24750 (vminnmq_f16): Remove.
24751 (vmaxnmq_f16): Remove.
24752 (vminnmq_f32): Remove.
24753 (vmaxnmq_f32): Remove.
24754 (vmaxnmq_m_f32): Remove.
24755 (vmaxnmq_m_f16): Remove.
24756 (vminnmq_m_f32): Remove.
24757 (vminnmq_m_f16): Remove.
24758 (vminnmq_x_f16): Remove.
24759 (vminnmq_x_f32): Remove.
24760 (vmaxnmq_x_f16): Remove.
24761 (vmaxnmq_x_f32): Remove.
24762 (__arm_vminnmq_f16): Remove.
24763 (__arm_vmaxnmq_f16): Remove.
24764 (__arm_vminnmq_f32): Remove.
24765 (__arm_vmaxnmq_f32): Remove.
24766 (__arm_vmaxnmq_m_f32): Remove.
24767 (__arm_vmaxnmq_m_f16): Remove.
24768 (__arm_vminnmq_m_f32): Remove.
24769 (__arm_vminnmq_m_f16): Remove.
24770 (__arm_vminnmq_x_f16): Remove.
24771 (__arm_vminnmq_x_f32): Remove.
24772 (__arm_vmaxnmq_x_f16): Remove.
24773 (__arm_vmaxnmq_x_f32): Remove.
24774 (__arm_vminnmq): Remove.
24775 (__arm_vmaxnmq): Remove.
24776 (__arm_vmaxnmq_m): Remove.
24777 (__arm_vminnmq_m): Remove.
24778 (__arm_vminnmq_x): Remove.
24779 (__arm_vmaxnmq_x): Remove.
24781 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24783 * config/arm/iterators.md (MAX_MIN_F): New.
24784 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
24785 (mve_insn): Add vmaxnm, vminnm.
24786 (max_min_f_str): New.
24787 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
24789 (@mve_<max_min_f_str>q_f<mode>): ... this.
24790 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
24791 (@mve_<mve_insn>q_m_f<mode>): ... this.
24793 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24795 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
24796 (smax<mode>3): Likewise.
24798 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24800 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
24801 (FUNCTION_PRED_P_S): New.
24802 (vmaxavq, vminavq, vmaxvq, vminvq): New.
24803 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
24805 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
24807 * config/arm/arm_mve.h (vminvq): Remove.
24809 (vminvq_p): Remove.
24810 (vmaxvq_p): Remove.
24811 (vminvq_u8): Remove.
24812 (vmaxvq_u8): Remove.
24813 (vminvq_s8): Remove.
24814 (vmaxvq_s8): Remove.
24815 (vminvq_u16): Remove.
24816 (vmaxvq_u16): Remove.
24817 (vminvq_s16): Remove.
24818 (vmaxvq_s16): Remove.
24819 (vminvq_u32): Remove.
24820 (vmaxvq_u32): Remove.
24821 (vminvq_s32): Remove.
24822 (vmaxvq_s32): Remove.
24823 (vminvq_p_u8): Remove.
24824 (vmaxvq_p_u8): Remove.
24825 (vminvq_p_s8): Remove.
24826 (vmaxvq_p_s8): Remove.
24827 (vminvq_p_u16): Remove.
24828 (vmaxvq_p_u16): Remove.
24829 (vminvq_p_s16): Remove.
24830 (vmaxvq_p_s16): Remove.
24831 (vminvq_p_u32): Remove.
24832 (vmaxvq_p_u32): Remove.
24833 (vminvq_p_s32): Remove.
24834 (vmaxvq_p_s32): Remove.
24835 (__arm_vminvq_u8): Remove.
24836 (__arm_vmaxvq_u8): Remove.
24837 (__arm_vminvq_s8): Remove.
24838 (__arm_vmaxvq_s8): Remove.
24839 (__arm_vminvq_u16): Remove.
24840 (__arm_vmaxvq_u16): Remove.
24841 (__arm_vminvq_s16): Remove.
24842 (__arm_vmaxvq_s16): Remove.
24843 (__arm_vminvq_u32): Remove.
24844 (__arm_vmaxvq_u32): Remove.
24845 (__arm_vminvq_s32): Remove.
24846 (__arm_vmaxvq_s32): Remove.
24847 (__arm_vminvq_p_u8): Remove.
24848 (__arm_vmaxvq_p_u8): Remove.
24849 (__arm_vminvq_p_s8): Remove.
24850 (__arm_vmaxvq_p_s8): Remove.
24851 (__arm_vminvq_p_u16): Remove.
24852 (__arm_vmaxvq_p_u16): Remove.
24853 (__arm_vminvq_p_s16): Remove.
24854 (__arm_vmaxvq_p_s16): Remove.
24855 (__arm_vminvq_p_u32): Remove.
24856 (__arm_vmaxvq_p_u32): Remove.
24857 (__arm_vminvq_p_s32): Remove.
24858 (__arm_vmaxvq_p_s32): Remove.
24859 (__arm_vminvq): Remove.
24860 (__arm_vmaxvq): Remove.
24861 (__arm_vminvq_p): Remove.
24862 (__arm_vmaxvq_p): Remove.
24865 (vminavq_p): Remove.
24866 (vmaxavq_p): Remove.
24867 (vminavq_s8): Remove.
24868 (vmaxavq_s8): Remove.
24869 (vminavq_s16): Remove.
24870 (vmaxavq_s16): Remove.
24871 (vminavq_s32): Remove.
24872 (vmaxavq_s32): Remove.
24873 (vminavq_p_s8): Remove.
24874 (vmaxavq_p_s8): Remove.
24875 (vminavq_p_s16): Remove.
24876 (vmaxavq_p_s16): Remove.
24877 (vminavq_p_s32): Remove.
24878 (vmaxavq_p_s32): Remove.
24879 (__arm_vminavq_s8): Remove.
24880 (__arm_vmaxavq_s8): Remove.
24881 (__arm_vminavq_s16): Remove.
24882 (__arm_vmaxavq_s16): Remove.
24883 (__arm_vminavq_s32): Remove.
24884 (__arm_vmaxavq_s32): Remove.
24885 (__arm_vminavq_p_s8): Remove.
24886 (__arm_vmaxavq_p_s8): Remove.
24887 (__arm_vminavq_p_s16): Remove.
24888 (__arm_vmaxavq_p_s16): Remove.
24889 (__arm_vminavq_p_s32): Remove.
24890 (__arm_vmaxavq_p_s32): Remove.
24891 (__arm_vminavq): Remove.
24892 (__arm_vmaxavq): Remove.
24893 (__arm_vminavq_p): Remove.
24894 (__arm_vmaxavq_p): Remove.
24896 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24898 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
24899 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
24900 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
24901 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
24902 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
24903 (@mve_<mve_insn>q_<supf><mode>): ... this.
24904 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
24905 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
24906 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24908 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24910 * config/arm/arm-mve-builtins-functions.h (class
24911 unspec_mve_function_exact_insn_pred_p): New.
24913 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24915 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
24916 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
24918 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24920 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
24921 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
24923 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
24925 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
24927 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
24928 (ADJUST_REG_ALLOC_ORDER): Likewise.
24929 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
24931 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
24932 Upa rather than Upl for unpredicated movprfx alternatives.
24934 2023-05-09 Jeff Law <jlaw@ventanamicro>
24936 * config/h8300/testcompare.md: Add peephole2 which uses a memory
24937 load to set flags, thus eliminating a compare against zero.
24939 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24941 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
24942 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
24943 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
24944 * config/arm/arm_mve.h (vshlltq): Remove.
24946 (vshllbq_m): Remove.
24947 (vshlltq_m): Remove.
24948 (vshllbq_x): Remove.
24949 (vshlltq_x): Remove.
24950 (vshlltq_n_u8): Remove.
24951 (vshllbq_n_u8): Remove.
24952 (vshlltq_n_s8): Remove.
24953 (vshllbq_n_s8): Remove.
24954 (vshlltq_n_u16): Remove.
24955 (vshllbq_n_u16): Remove.
24956 (vshlltq_n_s16): Remove.
24957 (vshllbq_n_s16): Remove.
24958 (vshllbq_m_n_s8): Remove.
24959 (vshllbq_m_n_s16): Remove.
24960 (vshllbq_m_n_u8): Remove.
24961 (vshllbq_m_n_u16): Remove.
24962 (vshlltq_m_n_s8): Remove.
24963 (vshlltq_m_n_s16): Remove.
24964 (vshlltq_m_n_u8): Remove.
24965 (vshlltq_m_n_u16): Remove.
24966 (vshllbq_x_n_s8): Remove.
24967 (vshllbq_x_n_s16): Remove.
24968 (vshllbq_x_n_u8): Remove.
24969 (vshllbq_x_n_u16): Remove.
24970 (vshlltq_x_n_s8): Remove.
24971 (vshlltq_x_n_s16): Remove.
24972 (vshlltq_x_n_u8): Remove.
24973 (vshlltq_x_n_u16): Remove.
24974 (__arm_vshlltq_n_u8): Remove.
24975 (__arm_vshllbq_n_u8): Remove.
24976 (__arm_vshlltq_n_s8): Remove.
24977 (__arm_vshllbq_n_s8): Remove.
24978 (__arm_vshlltq_n_u16): Remove.
24979 (__arm_vshllbq_n_u16): Remove.
24980 (__arm_vshlltq_n_s16): Remove.
24981 (__arm_vshllbq_n_s16): Remove.
24982 (__arm_vshllbq_m_n_s8): Remove.
24983 (__arm_vshllbq_m_n_s16): Remove.
24984 (__arm_vshllbq_m_n_u8): Remove.
24985 (__arm_vshllbq_m_n_u16): Remove.
24986 (__arm_vshlltq_m_n_s8): Remove.
24987 (__arm_vshlltq_m_n_s16): Remove.
24988 (__arm_vshlltq_m_n_u8): Remove.
24989 (__arm_vshlltq_m_n_u16): Remove.
24990 (__arm_vshllbq_x_n_s8): Remove.
24991 (__arm_vshllbq_x_n_s16): Remove.
24992 (__arm_vshllbq_x_n_u8): Remove.
24993 (__arm_vshllbq_x_n_u16): Remove.
24994 (__arm_vshlltq_x_n_s8): Remove.
24995 (__arm_vshlltq_x_n_s16): Remove.
24996 (__arm_vshlltq_x_n_u8): Remove.
24997 (__arm_vshlltq_x_n_u16): Remove.
24998 (__arm_vshlltq): Remove.
24999 (__arm_vshllbq): Remove.
25000 (__arm_vshllbq_m): Remove.
25001 (__arm_vshlltq_m): Remove.
25002 (__arm_vshllbq_x): Remove.
25003 (__arm_vshlltq_x): Remove.
25005 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25007 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
25008 (VSHLLBQ_N, VSHLLTQ_N): Remove.
25010 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
25011 (VSHLLxQ_M_N): New.
25012 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
25013 (mve_vshlltq_n_<supf><mode>): Merge into ...
25014 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25015 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
25017 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25019 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25021 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
25022 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
25024 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25026 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
25027 (vqmovntq, vqmovunbq, vqmovuntq): New.
25028 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
25029 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
25030 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
25031 (vqmovntq, vqmovunbq, vqmovuntq): New.
25032 * config/arm/arm-mve-builtins.cc
25033 (function_instance::has_inactive_argument): Handle vmovnbq,
25034 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
25035 * config/arm/arm_mve.h (vqmovntq): Remove.
25036 (vqmovnbq): Remove.
25037 (vqmovnbq_m): Remove.
25038 (vqmovntq_m): Remove.
25039 (vqmovntq_u16): Remove.
25040 (vqmovnbq_u16): Remove.
25041 (vqmovntq_s16): Remove.
25042 (vqmovnbq_s16): Remove.
25043 (vqmovntq_u32): Remove.
25044 (vqmovnbq_u32): Remove.
25045 (vqmovntq_s32): Remove.
25046 (vqmovnbq_s32): Remove.
25047 (vqmovnbq_m_s16): Remove.
25048 (vqmovntq_m_s16): Remove.
25049 (vqmovnbq_m_u16): Remove.
25050 (vqmovntq_m_u16): Remove.
25051 (vqmovnbq_m_s32): Remove.
25052 (vqmovntq_m_s32): Remove.
25053 (vqmovnbq_m_u32): Remove.
25054 (vqmovntq_m_u32): Remove.
25055 (__arm_vqmovntq_u16): Remove.
25056 (__arm_vqmovnbq_u16): Remove.
25057 (__arm_vqmovntq_s16): Remove.
25058 (__arm_vqmovnbq_s16): Remove.
25059 (__arm_vqmovntq_u32): Remove.
25060 (__arm_vqmovnbq_u32): Remove.
25061 (__arm_vqmovntq_s32): Remove.
25062 (__arm_vqmovnbq_s32): Remove.
25063 (__arm_vqmovnbq_m_s16): Remove.
25064 (__arm_vqmovntq_m_s16): Remove.
25065 (__arm_vqmovnbq_m_u16): Remove.
25066 (__arm_vqmovntq_m_u16): Remove.
25067 (__arm_vqmovnbq_m_s32): Remove.
25068 (__arm_vqmovntq_m_s32): Remove.
25069 (__arm_vqmovnbq_m_u32): Remove.
25070 (__arm_vqmovntq_m_u32): Remove.
25071 (__arm_vqmovntq): Remove.
25072 (__arm_vqmovnbq): Remove.
25073 (__arm_vqmovnbq_m): Remove.
25074 (__arm_vqmovntq_m): Remove.
25077 (vmovnbq_m): Remove.
25078 (vmovntq_m): Remove.
25079 (vmovntq_u16): Remove.
25080 (vmovnbq_u16): Remove.
25081 (vmovntq_s16): Remove.
25082 (vmovnbq_s16): Remove.
25083 (vmovntq_u32): Remove.
25084 (vmovnbq_u32): Remove.
25085 (vmovntq_s32): Remove.
25086 (vmovnbq_s32): Remove.
25087 (vmovnbq_m_s16): Remove.
25088 (vmovntq_m_s16): Remove.
25089 (vmovnbq_m_u16): Remove.
25090 (vmovntq_m_u16): Remove.
25091 (vmovnbq_m_s32): Remove.
25092 (vmovntq_m_s32): Remove.
25093 (vmovnbq_m_u32): Remove.
25094 (vmovntq_m_u32): Remove.
25095 (__arm_vmovntq_u16): Remove.
25096 (__arm_vmovnbq_u16): Remove.
25097 (__arm_vmovntq_s16): Remove.
25098 (__arm_vmovnbq_s16): Remove.
25099 (__arm_vmovntq_u32): Remove.
25100 (__arm_vmovnbq_u32): Remove.
25101 (__arm_vmovntq_s32): Remove.
25102 (__arm_vmovnbq_s32): Remove.
25103 (__arm_vmovnbq_m_s16): Remove.
25104 (__arm_vmovntq_m_s16): Remove.
25105 (__arm_vmovnbq_m_u16): Remove.
25106 (__arm_vmovntq_m_u16): Remove.
25107 (__arm_vmovnbq_m_s32): Remove.
25108 (__arm_vmovntq_m_s32): Remove.
25109 (__arm_vmovnbq_m_u32): Remove.
25110 (__arm_vmovntq_m_u32): Remove.
25111 (__arm_vmovntq): Remove.
25112 (__arm_vmovnbq): Remove.
25113 (__arm_vmovnbq_m): Remove.
25114 (__arm_vmovntq_m): Remove.
25115 (vqmovuntq): Remove.
25116 (vqmovunbq): Remove.
25117 (vqmovunbq_m): Remove.
25118 (vqmovuntq_m): Remove.
25119 (vqmovuntq_s16): Remove.
25120 (vqmovunbq_s16): Remove.
25121 (vqmovuntq_s32): Remove.
25122 (vqmovunbq_s32): Remove.
25123 (vqmovunbq_m_s16): Remove.
25124 (vqmovuntq_m_s16): Remove.
25125 (vqmovunbq_m_s32): Remove.
25126 (vqmovuntq_m_s32): Remove.
25127 (__arm_vqmovuntq_s16): Remove.
25128 (__arm_vqmovunbq_s16): Remove.
25129 (__arm_vqmovuntq_s32): Remove.
25130 (__arm_vqmovunbq_s32): Remove.
25131 (__arm_vqmovunbq_m_s16): Remove.
25132 (__arm_vqmovuntq_m_s16): Remove.
25133 (__arm_vqmovunbq_m_s32): Remove.
25134 (__arm_vqmovuntq_m_s32): Remove.
25135 (__arm_vqmovuntq): Remove.
25136 (__arm_vqmovunbq): Remove.
25137 (__arm_vqmovunbq_m): Remove.
25138 (__arm_vqmovuntq_m): Remove.
25140 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25142 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
25143 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
25146 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
25148 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
25149 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
25150 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
25151 (mve_vqmovuntq_s<mode>): Merge into ...
25152 (@mve_<mve_insn>q_<supf><mode>): ... this.
25153 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
25154 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
25155 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
25156 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25158 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25160 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
25161 (binary_move_narrow_unsigned): New.
25162 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
25163 (binary_move_narrow_unsigned): New.
25165 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25167 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
25168 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
25169 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
25170 (vrndpq, vrndq, vrndxq): New.
25171 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
25172 (vrndpq, vrndq, vrndxq): New.
25173 * config/arm/arm_mve.h (vrndxq): Remove.
25179 (vrndaq_m): Remove.
25180 (vrndmq_m): Remove.
25181 (vrndnq_m): Remove.
25182 (vrndpq_m): Remove.
25184 (vrndxq_m): Remove.
25186 (vrndnq_x): Remove.
25187 (vrndmq_x): Remove.
25188 (vrndpq_x): Remove.
25189 (vrndaq_x): Remove.
25190 (vrndxq_x): Remove.
25191 (vrndxq_f16): Remove.
25192 (vrndxq_f32): Remove.
25193 (vrndq_f16): Remove.
25194 (vrndq_f32): Remove.
25195 (vrndpq_f16): Remove.
25196 (vrndpq_f32): Remove.
25197 (vrndnq_f16): Remove.
25198 (vrndnq_f32): Remove.
25199 (vrndmq_f16): Remove.
25200 (vrndmq_f32): Remove.
25201 (vrndaq_f16): Remove.
25202 (vrndaq_f32): Remove.
25203 (vrndaq_m_f16): Remove.
25204 (vrndmq_m_f16): Remove.
25205 (vrndnq_m_f16): Remove.
25206 (vrndpq_m_f16): Remove.
25207 (vrndq_m_f16): Remove.
25208 (vrndxq_m_f16): Remove.
25209 (vrndaq_m_f32): Remove.
25210 (vrndmq_m_f32): Remove.
25211 (vrndnq_m_f32): Remove.
25212 (vrndpq_m_f32): Remove.
25213 (vrndq_m_f32): Remove.
25214 (vrndxq_m_f32): Remove.
25215 (vrndq_x_f16): Remove.
25216 (vrndq_x_f32): Remove.
25217 (vrndnq_x_f16): Remove.
25218 (vrndnq_x_f32): Remove.
25219 (vrndmq_x_f16): Remove.
25220 (vrndmq_x_f32): Remove.
25221 (vrndpq_x_f16): Remove.
25222 (vrndpq_x_f32): Remove.
25223 (vrndaq_x_f16): Remove.
25224 (vrndaq_x_f32): Remove.
25225 (vrndxq_x_f16): Remove.
25226 (vrndxq_x_f32): Remove.
25227 (__arm_vrndxq_f16): Remove.
25228 (__arm_vrndxq_f32): Remove.
25229 (__arm_vrndq_f16): Remove.
25230 (__arm_vrndq_f32): Remove.
25231 (__arm_vrndpq_f16): Remove.
25232 (__arm_vrndpq_f32): Remove.
25233 (__arm_vrndnq_f16): Remove.
25234 (__arm_vrndnq_f32): Remove.
25235 (__arm_vrndmq_f16): Remove.
25236 (__arm_vrndmq_f32): Remove.
25237 (__arm_vrndaq_f16): Remove.
25238 (__arm_vrndaq_f32): Remove.
25239 (__arm_vrndaq_m_f16): Remove.
25240 (__arm_vrndmq_m_f16): Remove.
25241 (__arm_vrndnq_m_f16): Remove.
25242 (__arm_vrndpq_m_f16): Remove.
25243 (__arm_vrndq_m_f16): Remove.
25244 (__arm_vrndxq_m_f16): Remove.
25245 (__arm_vrndaq_m_f32): Remove.
25246 (__arm_vrndmq_m_f32): Remove.
25247 (__arm_vrndnq_m_f32): Remove.
25248 (__arm_vrndpq_m_f32): Remove.
25249 (__arm_vrndq_m_f32): Remove.
25250 (__arm_vrndxq_m_f32): Remove.
25251 (__arm_vrndq_x_f16): Remove.
25252 (__arm_vrndq_x_f32): Remove.
25253 (__arm_vrndnq_x_f16): Remove.
25254 (__arm_vrndnq_x_f32): Remove.
25255 (__arm_vrndmq_x_f16): Remove.
25256 (__arm_vrndmq_x_f32): Remove.
25257 (__arm_vrndpq_x_f16): Remove.
25258 (__arm_vrndpq_x_f32): Remove.
25259 (__arm_vrndaq_x_f16): Remove.
25260 (__arm_vrndaq_x_f32): Remove.
25261 (__arm_vrndxq_x_f16): Remove.
25262 (__arm_vrndxq_x_f32): Remove.
25263 (__arm_vrndxq): Remove.
25264 (__arm_vrndq): Remove.
25265 (__arm_vrndpq): Remove.
25266 (__arm_vrndnq): Remove.
25267 (__arm_vrndmq): Remove.
25268 (__arm_vrndaq): Remove.
25269 (__arm_vrndaq_m): Remove.
25270 (__arm_vrndmq_m): Remove.
25271 (__arm_vrndnq_m): Remove.
25272 (__arm_vrndpq_m): Remove.
25273 (__arm_vrndq_m): Remove.
25274 (__arm_vrndxq_m): Remove.
25275 (__arm_vrndq_x): Remove.
25276 (__arm_vrndnq_x): Remove.
25277 (__arm_vrndmq_x): Remove.
25278 (__arm_vrndpq_x): Remove.
25279 (__arm_vrndaq_x): Remove.
25280 (__arm_vrndxq_x): Remove.
25282 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25284 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
25285 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
25286 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
25287 (vclzq, vqabsq, vqnegq): New.
25288 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
25289 (vqabsq, vqnegq): New.
25290 * config/arm/arm_mve.h (vabsq): Remove.
25293 (vabsq_f16): Remove.
25294 (vabsq_f32): Remove.
25295 (vabsq_s8): Remove.
25296 (vabsq_s16): Remove.
25297 (vabsq_s32): Remove.
25298 (vabsq_m_s8): Remove.
25299 (vabsq_m_s16): Remove.
25300 (vabsq_m_s32): Remove.
25301 (vabsq_m_f16): Remove.
25302 (vabsq_m_f32): Remove.
25303 (vabsq_x_s8): Remove.
25304 (vabsq_x_s16): Remove.
25305 (vabsq_x_s32): Remove.
25306 (vabsq_x_f16): Remove.
25307 (vabsq_x_f32): Remove.
25308 (__arm_vabsq_s8): Remove.
25309 (__arm_vabsq_s16): Remove.
25310 (__arm_vabsq_s32): Remove.
25311 (__arm_vabsq_m_s8): Remove.
25312 (__arm_vabsq_m_s16): Remove.
25313 (__arm_vabsq_m_s32): Remove.
25314 (__arm_vabsq_x_s8): Remove.
25315 (__arm_vabsq_x_s16): Remove.
25316 (__arm_vabsq_x_s32): Remove.
25317 (__arm_vabsq_f16): Remove.
25318 (__arm_vabsq_f32): Remove.
25319 (__arm_vabsq_m_f16): Remove.
25320 (__arm_vabsq_m_f32): Remove.
25321 (__arm_vabsq_x_f16): Remove.
25322 (__arm_vabsq_x_f32): Remove.
25323 (__arm_vabsq): Remove.
25324 (__arm_vabsq_m): Remove.
25325 (__arm_vabsq_x): Remove.
25329 (vnegq_f16): Remove.
25330 (vnegq_f32): Remove.
25331 (vnegq_s8): Remove.
25332 (vnegq_s16): Remove.
25333 (vnegq_s32): Remove.
25334 (vnegq_m_s8): Remove.
25335 (vnegq_m_s16): Remove.
25336 (vnegq_m_s32): Remove.
25337 (vnegq_m_f16): Remove.
25338 (vnegq_m_f32): Remove.
25339 (vnegq_x_s8): Remove.
25340 (vnegq_x_s16): Remove.
25341 (vnegq_x_s32): Remove.
25342 (vnegq_x_f16): Remove.
25343 (vnegq_x_f32): Remove.
25344 (__arm_vnegq_s8): Remove.
25345 (__arm_vnegq_s16): Remove.
25346 (__arm_vnegq_s32): Remove.
25347 (__arm_vnegq_m_s8): Remove.
25348 (__arm_vnegq_m_s16): Remove.
25349 (__arm_vnegq_m_s32): Remove.
25350 (__arm_vnegq_x_s8): Remove.
25351 (__arm_vnegq_x_s16): Remove.
25352 (__arm_vnegq_x_s32): Remove.
25353 (__arm_vnegq_f16): Remove.
25354 (__arm_vnegq_f32): Remove.
25355 (__arm_vnegq_m_f16): Remove.
25356 (__arm_vnegq_m_f32): Remove.
25357 (__arm_vnegq_x_f16): Remove.
25358 (__arm_vnegq_x_f32): Remove.
25359 (__arm_vnegq): Remove.
25360 (__arm_vnegq_m): Remove.
25361 (__arm_vnegq_x): Remove.
25365 (vclsq_s8): Remove.
25366 (vclsq_s16): Remove.
25367 (vclsq_s32): Remove.
25368 (vclsq_m_s8): Remove.
25369 (vclsq_m_s16): Remove.
25370 (vclsq_m_s32): Remove.
25371 (vclsq_x_s8): Remove.
25372 (vclsq_x_s16): Remove.
25373 (vclsq_x_s32): Remove.
25374 (__arm_vclsq_s8): Remove.
25375 (__arm_vclsq_s16): Remove.
25376 (__arm_vclsq_s32): Remove.
25377 (__arm_vclsq_m_s8): Remove.
25378 (__arm_vclsq_m_s16): Remove.
25379 (__arm_vclsq_m_s32): Remove.
25380 (__arm_vclsq_x_s8): Remove.
25381 (__arm_vclsq_x_s16): Remove.
25382 (__arm_vclsq_x_s32): Remove.
25383 (__arm_vclsq): Remove.
25384 (__arm_vclsq_m): Remove.
25385 (__arm_vclsq_x): Remove.
25389 (vclzq_s8): Remove.
25390 (vclzq_s16): Remove.
25391 (vclzq_s32): Remove.
25392 (vclzq_u8): Remove.
25393 (vclzq_u16): Remove.
25394 (vclzq_u32): Remove.
25395 (vclzq_m_u8): Remove.
25396 (vclzq_m_s8): Remove.
25397 (vclzq_m_u16): Remove.
25398 (vclzq_m_s16): Remove.
25399 (vclzq_m_u32): Remove.
25400 (vclzq_m_s32): Remove.
25401 (vclzq_x_s8): Remove.
25402 (vclzq_x_s16): Remove.
25403 (vclzq_x_s32): Remove.
25404 (vclzq_x_u8): Remove.
25405 (vclzq_x_u16): Remove.
25406 (vclzq_x_u32): Remove.
25407 (__arm_vclzq_s8): Remove.
25408 (__arm_vclzq_s16): Remove.
25409 (__arm_vclzq_s32): Remove.
25410 (__arm_vclzq_u8): Remove.
25411 (__arm_vclzq_u16): Remove.
25412 (__arm_vclzq_u32): Remove.
25413 (__arm_vclzq_m_u8): Remove.
25414 (__arm_vclzq_m_s8): Remove.
25415 (__arm_vclzq_m_u16): Remove.
25416 (__arm_vclzq_m_s16): Remove.
25417 (__arm_vclzq_m_u32): Remove.
25418 (__arm_vclzq_m_s32): Remove.
25419 (__arm_vclzq_x_s8): Remove.
25420 (__arm_vclzq_x_s16): Remove.
25421 (__arm_vclzq_x_s32): Remove.
25422 (__arm_vclzq_x_u8): Remove.
25423 (__arm_vclzq_x_u16): Remove.
25424 (__arm_vclzq_x_u32): Remove.
25425 (__arm_vclzq): Remove.
25426 (__arm_vclzq_m): Remove.
25427 (__arm_vclzq_x): Remove.
25430 (vqnegq_m): Remove.
25431 (vqabsq_m): Remove.
25432 (vqabsq_s8): Remove.
25433 (vqabsq_s16): Remove.
25434 (vqabsq_s32): Remove.
25435 (vqnegq_s8): Remove.
25436 (vqnegq_s16): Remove.
25437 (vqnegq_s32): Remove.
25438 (vqnegq_m_s8): Remove.
25439 (vqabsq_m_s8): Remove.
25440 (vqnegq_m_s16): Remove.
25441 (vqabsq_m_s16): Remove.
25442 (vqnegq_m_s32): Remove.
25443 (vqabsq_m_s32): Remove.
25444 (__arm_vqabsq_s8): Remove.
25445 (__arm_vqabsq_s16): Remove.
25446 (__arm_vqabsq_s32): Remove.
25447 (__arm_vqnegq_s8): Remove.
25448 (__arm_vqnegq_s16): Remove.
25449 (__arm_vqnegq_s32): Remove.
25450 (__arm_vqnegq_m_s8): Remove.
25451 (__arm_vqabsq_m_s8): Remove.
25452 (__arm_vqnegq_m_s16): Remove.
25453 (__arm_vqabsq_m_s16): Remove.
25454 (__arm_vqnegq_m_s32): Remove.
25455 (__arm_vqabsq_m_s32): Remove.
25456 (__arm_vqabsq): Remove.
25457 (__arm_vqnegq): Remove.
25458 (__arm_vqnegq_m): Remove.
25459 (__arm_vqabsq_m): Remove.
25461 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25463 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
25464 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
25465 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
25466 vrndm, vrndn, vrndp, vrnd, vrndx.
25467 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
25468 VQABSQ_M_S, VQNEGQ_M_S.
25470 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
25471 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
25472 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
25473 (@mve_<mve_insn>q_f<mode>): ... this.
25474 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
25475 (mve_v<absneg_str>q_f<mode>): ... this.
25476 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
25477 (mve_v<absneg_str>q_s<mode>): ... this.
25478 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
25479 (@mve_<mve_insn>q_<supf><mode>): ... this.
25480 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
25481 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
25482 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
25483 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25484 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
25485 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
25486 (mve_vrndxq_m_f<mode>): Merge into ...
25487 (@mve_<mve_insn>q_m_f<mode>): ... this.
25489 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25491 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
25492 * config/arm/arm-mve-builtins-shapes.h (unary): New.
25494 2023-05-09 Jakub Jelinek <jakub@redhat.com>
25496 * mux-utils.h: Fix comment typo, avoides -> avoids.
25498 2023-05-09 Jakub Jelinek <jakub@redhat.com>
25500 PR tree-optimization/109778
25501 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
25502 wi::zext (x, width) rather than x if width != precision, rather
25503 than using wi::zext (right, width) after the shift.
25504 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
25505 of wi::lrotate or wi::rrotate.
25507 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
25509 * genmatch.cc (get_out_file): Make static and rename to ...
25510 (choose_output): ... this. Reimplement. Update all uses ...
25511 (decision_tree::gen): ... here and ...
25514 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
25516 * genmatch.cc (showUsage): Reimplement as ...
25517 (usage): ...this. Adjust all uses.
25518 (main): Print usage when no arguments. Add missing 'return 1'.
25520 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
25522 * genmatch.cc (header_file): Make static.
25523 (emit_func): Rename to...
25524 (fp_decl): ... this. Adjust all uses.
25525 (fp_decl_done): New function. Use it...
25526 (decision_tree::gen): ... here and...
25527 (write_predicate): ... here.
25530 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
25532 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
25535 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
25536 Uros Bizjak <ubizjak@gmail.com>
25538 * config/i386/i386.md (any_or_plus): Move definition earlier.
25539 (*insvti_highpart_1): New define_insn_and_split to overwrite
25540 (insv) the highpart of a TImode register/memory.
25542 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
25544 * auto-profile.cc (auto_profile): Check todo from early_inline
25545 to see if cleanup_tree_vfg needs to be called.
25546 (early_inline): Return todo from early_inliner.
25548 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
25550 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
25552 (pass_vsetvl::get_block_info): New.
25553 (pass_vsetvl::update_vector_info): New.
25554 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
25555 (pass_vsetvl::compute_local_backward_infos): Ditto.
25556 (pass_vsetvl::transfer_before): Ditto.
25557 (pass_vsetvl::transfer_after): Ditto.
25558 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
25559 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
25560 (pass_vsetvl::cleanup_insns): Ditto.
25561 (pass_vsetvl::compute_local_backward_infos): Use
25562 update_vector_info.
25564 2023-05-08 Jeff Law <jlaw@ventanamicro>
25566 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
25568 2023-05-08 Richard Biener <rguenther@suse.de>
25569 Michael Meissner <meissner@linux.ibm.com>
25571 PR middle-end/108623
25572 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
25573 Align bit fields > 1 bit to at least an 8-bit boundary.
25575 2023-05-08 Andrew Pinski <apinski@marvell.com>
25577 PR tree-optimization/109424
25578 PR tree-optimization/59424
25579 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
25580 (factor_out_conditional_operation): This and add support for all unary
25582 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
25583 to call factor_out_conditional_operation instead.
25585 2023-05-08 Andrew Pinski <apinski@marvell.com>
25587 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
25588 over factor_out_conditional_conversion.
25590 2023-05-08 Andrew Pinski <apinski@marvell.com>
25592 PR tree-optimization/49959
25593 PR tree-optimization/103771
25594 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
25595 Diamond shapped bb form for factor_out_conditional_conversion.
25597 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25599 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
25600 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
25601 (riscv_vector_get_mask_mode): Ditto.
25602 (get_mask_policy_no_pred): Ditto.
25603 (get_tail_policy_no_pred): Ditto.
25604 (get_mask_mode): New function.
25605 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
25606 (get_tail_policy_no_pred): Ditto.
25607 (riscv_vector_mask_mode_p): Ditto.
25608 (riscv_vector_get_mask_mode): Ditto.
25609 (get_mask_mode): New function.
25610 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
25612 (get_tail_policy_for_pred): Ditto.
25613 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
25614 (get_mask_policy_for_pred): Ditto
25615 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
25617 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
25619 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
25620 (riscv_select_multilib): New.
25621 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
25622 also handle select_by_abi.
25623 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
25624 to select_by_abi_arch_cmodel from 1.
25625 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
25626 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
25628 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
25630 * Makefile.in: (gimple-match-head.o-warn): Remove.
25631 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
25632 gimple-match-exports.cc.
25633 (gimple-match-auto.h): Only depend on s-gimple-match.
25634 (generic-match-auto.h): Likewise.
25636 2023-05-08 Andrew Pinski <apinski@marvell.com>
25638 PR tree-optimization/109691
25639 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
25641 If the removed statement can throw, have need_eh_cleanup
25642 include the bb of that statement.
25643 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
25644 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
25646 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
25647 Initialize dceworklist instead of stmts_to_remove.
25648 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
25649 Destore dceworklist instead of stmts_to_remove.
25650 (substitute_and_fold_dom_walker::before_dom_children):
25651 Set dceworklist instead of adding to stmts_to_remove.
25652 (substitute_and_fold_engine::substitute_and_fold):
25653 Call simple_dce_from_worklist instead of poping
25655 Don't update the stat on removal statements.
25657 2023-05-07 Andrew Pinski <apinski@marvell.com>
25660 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
25661 Change argument type to aarch64_feature_flags.
25662 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
25663 constructor argument type to aarch64_feature_flags.
25664 Change m_old_asm_isa_flags to be aarch64_feature_flags.
25666 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
25668 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
25669 more parallel code if can_create_pseudo_p.
25671 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
25674 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
25675 immediately before moving a multi-word register by parts.
25677 2023-05-06 Jeff Law <jlaw@ventanamicro>
25679 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
25681 2023-05-06 Michael Collison <collison@rivosinc.com>
25683 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
25684 Check that GET_MODE_NUNITS is a multiple of 2.
25686 2023-05-06 Michael Collison <collison@rivosinc.com>
25688 * config/riscv/riscv.cc
25689 (riscv_estimated_poly_value): Implement
25690 TARGET_ESTIMATED_POLY_VALUE.
25691 (riscv_preferred_simd_mode): Implement
25692 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
25693 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
25694 (riscv_empty_mask_is_expensive): Implement
25695 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
25696 (riscv_vectorize_create_costs): Implement
25697 TARGET_VECTORIZE_CREATE_COSTS.
25698 (riscv_support_vector_misalignment): Implement
25699 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
25700 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
25701 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
25702 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
25703 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
25705 2023-05-06 Jeff Law <jlaw@ventanamicro>
25707 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
25708 duplicate definition.
25710 2023-05-06 Michael Collison <collison@rivosinc.com>
25712 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
25713 (riscv_vector_preferred_simd_mode): Ditto.
25714 (get_mask_policy_no_pred): Ditto.
25715 (get_tail_policy_no_pred): Ditto.
25716 (riscv_vector_mask_mode_p): Ditto.
25717 (riscv_vector_get_mask_mode): Ditto.
25719 2023-05-06 Michael Collison <collison@rivosinc.com>
25721 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
25722 Remove static declaration to to make externally visible.
25723 (get_mask_policy_for_pred): Ditto.
25724 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
25725 New external declaration.
25726 (get_mask_policy_for_pred): Ditto.
25728 2023-05-06 Michael Collison <collison@rivosinc.com>
25730 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
25731 (riscv_vector_get_mask_mode): Ditto.
25732 (get_mask_policy_no_pred): Ditto.
25733 (get_tail_policy_no_pred): Ditto.
25735 2023-05-06 Xi Ruoyao <xry111@xry111.site>
25737 * config/loongarch/loongarch.h (struct machine_function): Add
25738 reg_is_wrapped_separately array for register wrapping
25740 * config/loongarch/loongarch.cc
25741 (loongarch_get_separate_components): New function.
25742 (loongarch_components_for_bb): Likewise.
25743 (loongarch_disqualify_components): Likewise.
25744 (loongarch_process_components): Likewise.
25745 (loongarch_emit_prologue_components): Likewise.
25746 (loongarch_emit_epilogue_components): Likewise.
25747 (loongarch_set_handled_components): Likewise.
25748 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
25749 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
25750 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
25751 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
25752 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
25753 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
25754 (loongarch_for_each_saved_reg): Skip registers that are wrapped
25757 2023-05-06 Xi Ruoyao <xry111@xry111.site>
25760 * Makefile.in (s-macro_list): Pass -nostdinc to
25763 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25765 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
25766 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
25767 (preferred_simd_mode): Ditto.
25768 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
25769 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
25770 (riscv_preferred_simd_mode): New function.
25771 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
25772 * config/riscv/vector.md: Add autovec.md.
25773 * config/riscv/autovec.md: New file.
25775 2023-05-06 Jakub Jelinek <jakub@redhat.com>
25777 * real.h (dconst_pi): Define.
25778 (dconst_e_ptr): Formatting fix.
25779 (dconst_pi_ptr): Declare.
25780 * real.cc (dconst_pi_ptr): New function.
25781 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
25782 boundaries range with range computed from sin/cos of the particular
25783 bounds if the argument range is shorter than 2*pi.
25784 (cfn_sincos::op1_range): Take bulps into account when determining
25785 which result ranges are always invalid or behave like known NAN.
25787 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
25789 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
25790 pass type to vrange_storage::equal_p.
25791 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
25792 (irange_storage::equal_p): Same.
25793 (frange_storage::equal_p): Same.
25794 * value-range-storage.h (class frange_storage): Same.
25796 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25799 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
25800 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
25802 2023-05-06 liuhongt <hongtao.liu@intel.com>
25804 * combine.cc (maybe_swap_commutative_operands): Canonicalize
25805 vec_merge when mask is constant.
25806 * doc/md.texi: Document vec_merge canonicalization.
25808 2023-05-06 Jakub Jelinek <jakub@redhat.com>
25810 * value-range.h (frange_arithmetic): Declare.
25811 * range-op-float.cc (frange_arithmetic): No longer static.
25812 * gimple-range-op.cc (frange_mpfr_arg1): New function.
25813 (cfn_sqrt::fold_range): Intersect the generic boundaries range
25814 with range computed from sqrt of the particular bounds.
25815 (cfn_sqrt::op1_range): Intersect the generic boundaries range
25816 with range computed from squared particular bounds.
25818 2023-05-06 Jakub Jelinek <jakub@redhat.com>
25820 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
25821 earlier with helper variables also renamed.
25822 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
25823 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
25824 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
25826 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
25828 * config/cris/cris.md (splitop): Add PLUS.
25829 * config/cris/cris.cc (cris_split_constant): Also handle
25830 PLUS when a split into two insns may be useful.
25832 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
25834 * config/cris/cris.md (movandsplit1): New define_peephole2.
25836 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
25838 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
25840 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
25842 * doc/md.texi (define_peephole2): Document order of scanning.
25844 2023-05-05 Pan Li <pan2.li@intel.com>
25845 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25847 * config/riscv/vector.md: Allow const as the operand of RVV
25848 indexed load/store.
25850 2023-05-05 Pan Li <pan2.li@intel.com>
25852 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
25853 consumed by simplify_rtx.
25855 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25857 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
25858 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
25859 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
25860 * config/arm/arm_mve.h (vshrq): Remove.
25862 (vrshrq_m): Remove.
25864 (vrshrq_x): Remove.
25866 (vshrq_n_s8): Remove.
25867 (vshrq_n_s16): Remove.
25868 (vshrq_n_s32): Remove.
25869 (vshrq_n_u8): Remove.
25870 (vshrq_n_u16): Remove.
25871 (vshrq_n_u32): Remove.
25872 (vrshrq_n_u8): Remove.
25873 (vrshrq_n_s8): Remove.
25874 (vrshrq_n_u16): Remove.
25875 (vrshrq_n_s16): Remove.
25876 (vrshrq_n_u32): Remove.
25877 (vrshrq_n_s32): Remove.
25878 (vrshrq_m_n_s8): Remove.
25879 (vrshrq_m_n_s32): Remove.
25880 (vrshrq_m_n_s16): Remove.
25881 (vrshrq_m_n_u8): Remove.
25882 (vrshrq_m_n_u32): Remove.
25883 (vrshrq_m_n_u16): Remove.
25884 (vshrq_m_n_s8): Remove.
25885 (vshrq_m_n_s32): Remove.
25886 (vshrq_m_n_s16): Remove.
25887 (vshrq_m_n_u8): Remove.
25888 (vshrq_m_n_u32): Remove.
25889 (vshrq_m_n_u16): Remove.
25890 (vrshrq_x_n_s8): Remove.
25891 (vrshrq_x_n_s16): Remove.
25892 (vrshrq_x_n_s32): Remove.
25893 (vrshrq_x_n_u8): Remove.
25894 (vrshrq_x_n_u16): Remove.
25895 (vrshrq_x_n_u32): Remove.
25896 (vshrq_x_n_s8): Remove.
25897 (vshrq_x_n_s16): Remove.
25898 (vshrq_x_n_s32): Remove.
25899 (vshrq_x_n_u8): Remove.
25900 (vshrq_x_n_u16): Remove.
25901 (vshrq_x_n_u32): Remove.
25902 (__arm_vshrq_n_s8): Remove.
25903 (__arm_vshrq_n_s16): Remove.
25904 (__arm_vshrq_n_s32): Remove.
25905 (__arm_vshrq_n_u8): Remove.
25906 (__arm_vshrq_n_u16): Remove.
25907 (__arm_vshrq_n_u32): Remove.
25908 (__arm_vrshrq_n_u8): Remove.
25909 (__arm_vrshrq_n_s8): Remove.
25910 (__arm_vrshrq_n_u16): Remove.
25911 (__arm_vrshrq_n_s16): Remove.
25912 (__arm_vrshrq_n_u32): Remove.
25913 (__arm_vrshrq_n_s32): Remove.
25914 (__arm_vrshrq_m_n_s8): Remove.
25915 (__arm_vrshrq_m_n_s32): Remove.
25916 (__arm_vrshrq_m_n_s16): Remove.
25917 (__arm_vrshrq_m_n_u8): Remove.
25918 (__arm_vrshrq_m_n_u32): Remove.
25919 (__arm_vrshrq_m_n_u16): Remove.
25920 (__arm_vshrq_m_n_s8): Remove.
25921 (__arm_vshrq_m_n_s32): Remove.
25922 (__arm_vshrq_m_n_s16): Remove.
25923 (__arm_vshrq_m_n_u8): Remove.
25924 (__arm_vshrq_m_n_u32): Remove.
25925 (__arm_vshrq_m_n_u16): Remove.
25926 (__arm_vrshrq_x_n_s8): Remove.
25927 (__arm_vrshrq_x_n_s16): Remove.
25928 (__arm_vrshrq_x_n_s32): Remove.
25929 (__arm_vrshrq_x_n_u8): Remove.
25930 (__arm_vrshrq_x_n_u16): Remove.
25931 (__arm_vrshrq_x_n_u32): Remove.
25932 (__arm_vshrq_x_n_s8): Remove.
25933 (__arm_vshrq_x_n_s16): Remove.
25934 (__arm_vshrq_x_n_s32): Remove.
25935 (__arm_vshrq_x_n_u8): Remove.
25936 (__arm_vshrq_x_n_u16): Remove.
25937 (__arm_vshrq_x_n_u32): Remove.
25938 (__arm_vshrq): Remove.
25939 (__arm_vrshrq): Remove.
25940 (__arm_vrshrq_m): Remove.
25941 (__arm_vshrq_m): Remove.
25942 (__arm_vrshrq_x): Remove.
25943 (__arm_vshrq_x): Remove.
25945 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25947 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
25948 (mve_insn): Add vrshr, vshr.
25949 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
25950 (mve_vrshrq_n_<supf><mode>): Merge into ...
25951 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25952 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
25954 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25956 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25958 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
25959 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
25961 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25963 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
25964 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
25965 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
25966 (vqrshrunbq, vqrshruntq): New.
25967 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
25968 (vqrshrunbq, vqrshruntq): New.
25969 * config/arm/arm-mve-builtins.cc
25970 (function_instance::has_inactive_argument): Handle vqshrunbq,
25971 vqshruntq, vqrshrunbq, vqrshruntq.
25972 * config/arm/arm_mve.h (vqrshrunbq): Remove.
25973 (vqrshruntq): Remove.
25974 (vqrshrunbq_m): Remove.
25975 (vqrshruntq_m): Remove.
25976 (vqrshrunbq_n_s16): Remove.
25977 (vqrshrunbq_n_s32): Remove.
25978 (vqrshruntq_n_s16): Remove.
25979 (vqrshruntq_n_s32): Remove.
25980 (vqrshrunbq_m_n_s32): Remove.
25981 (vqrshrunbq_m_n_s16): Remove.
25982 (vqrshruntq_m_n_s32): Remove.
25983 (vqrshruntq_m_n_s16): Remove.
25984 (__arm_vqrshrunbq_n_s16): Remove.
25985 (__arm_vqrshrunbq_n_s32): Remove.
25986 (__arm_vqrshruntq_n_s16): Remove.
25987 (__arm_vqrshruntq_n_s32): Remove.
25988 (__arm_vqrshrunbq_m_n_s32): Remove.
25989 (__arm_vqrshrunbq_m_n_s16): Remove.
25990 (__arm_vqrshruntq_m_n_s32): Remove.
25991 (__arm_vqrshruntq_m_n_s16): Remove.
25992 (__arm_vqrshrunbq): Remove.
25993 (__arm_vqrshruntq): Remove.
25994 (__arm_vqrshrunbq_m): Remove.
25995 (__arm_vqrshruntq_m): Remove.
25996 (vqshrunbq): Remove.
25997 (vqshruntq): Remove.
25998 (vqshrunbq_m): Remove.
25999 (vqshruntq_m): Remove.
26000 (vqshrunbq_n_s16): Remove.
26001 (vqshruntq_n_s16): Remove.
26002 (vqshrunbq_n_s32): Remove.
26003 (vqshruntq_n_s32): Remove.
26004 (vqshrunbq_m_n_s32): Remove.
26005 (vqshrunbq_m_n_s16): Remove.
26006 (vqshruntq_m_n_s32): Remove.
26007 (vqshruntq_m_n_s16): Remove.
26008 (__arm_vqshrunbq_n_s16): Remove.
26009 (__arm_vqshruntq_n_s16): Remove.
26010 (__arm_vqshrunbq_n_s32): Remove.
26011 (__arm_vqshruntq_n_s32): Remove.
26012 (__arm_vqshrunbq_m_n_s32): Remove.
26013 (__arm_vqshrunbq_m_n_s16): Remove.
26014 (__arm_vqshruntq_m_n_s32): Remove.
26015 (__arm_vqshruntq_m_n_s16): Remove.
26016 (__arm_vqshrunbq): Remove.
26017 (__arm_vqshruntq): Remove.
26018 (__arm_vqshrunbq_m): Remove.
26019 (__arm_vqshruntq_m): Remove.
26021 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26023 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
26024 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26025 (MVE_SHRN_M_N): Likewise.
26026 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
26027 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26029 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
26030 (mve_vqrshruntq_n_s<mode>): Remove.
26031 (mve_vqshrunbq_n_s<mode>): Remove.
26032 (mve_vqshruntq_n_s<mode>): Remove.
26033 (mve_vqrshrunbq_m_n_s<mode>): Remove.
26034 (mve_vqrshruntq_m_n_s<mode>): Remove.
26035 (mve_vqshrunbq_m_n_s<mode>): Remove.
26036 (mve_vqshruntq_m_n_s<mode>): Remove.
26038 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26040 * config/arm/arm-mve-builtins-shapes.cc
26041 (binary_rshift_narrow_unsigned): New.
26042 * config/arm/arm-mve-builtins-shapes.h
26043 (binary_rshift_narrow_unsigned): New.
26045 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26047 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
26048 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
26049 (vqrshrnbq, vqrshrntq): New.
26050 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
26051 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
26053 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
26054 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
26055 * config/arm/arm-mve-builtins.cc
26056 (function_instance::has_inactive_argument): Handle vshrnbq,
26057 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
26059 * config/arm/arm_mve.h (vshrnbq): Remove.
26061 (vshrnbq_m): Remove.
26062 (vshrntq_m): Remove.
26063 (vshrnbq_n_s16): Remove.
26064 (vshrntq_n_s16): Remove.
26065 (vshrnbq_n_u16): Remove.
26066 (vshrntq_n_u16): Remove.
26067 (vshrnbq_n_s32): Remove.
26068 (vshrntq_n_s32): Remove.
26069 (vshrnbq_n_u32): Remove.
26070 (vshrntq_n_u32): Remove.
26071 (vshrnbq_m_n_s32): Remove.
26072 (vshrnbq_m_n_s16): Remove.
26073 (vshrnbq_m_n_u32): Remove.
26074 (vshrnbq_m_n_u16): Remove.
26075 (vshrntq_m_n_s32): Remove.
26076 (vshrntq_m_n_s16): Remove.
26077 (vshrntq_m_n_u32): Remove.
26078 (vshrntq_m_n_u16): Remove.
26079 (__arm_vshrnbq_n_s16): Remove.
26080 (__arm_vshrntq_n_s16): Remove.
26081 (__arm_vshrnbq_n_u16): Remove.
26082 (__arm_vshrntq_n_u16): Remove.
26083 (__arm_vshrnbq_n_s32): Remove.
26084 (__arm_vshrntq_n_s32): Remove.
26085 (__arm_vshrnbq_n_u32): Remove.
26086 (__arm_vshrntq_n_u32): Remove.
26087 (__arm_vshrnbq_m_n_s32): Remove.
26088 (__arm_vshrnbq_m_n_s16): Remove.
26089 (__arm_vshrnbq_m_n_u32): Remove.
26090 (__arm_vshrnbq_m_n_u16): Remove.
26091 (__arm_vshrntq_m_n_s32): Remove.
26092 (__arm_vshrntq_m_n_s16): Remove.
26093 (__arm_vshrntq_m_n_u32): Remove.
26094 (__arm_vshrntq_m_n_u16): Remove.
26095 (__arm_vshrnbq): Remove.
26096 (__arm_vshrntq): Remove.
26097 (__arm_vshrnbq_m): Remove.
26098 (__arm_vshrntq_m): Remove.
26099 (vrshrnbq): Remove.
26100 (vrshrntq): Remove.
26101 (vrshrnbq_m): Remove.
26102 (vrshrntq_m): Remove.
26103 (vrshrnbq_n_s16): Remove.
26104 (vrshrntq_n_s16): Remove.
26105 (vrshrnbq_n_u16): Remove.
26106 (vrshrntq_n_u16): Remove.
26107 (vrshrnbq_n_s32): Remove.
26108 (vrshrntq_n_s32): Remove.
26109 (vrshrnbq_n_u32): Remove.
26110 (vrshrntq_n_u32): Remove.
26111 (vrshrnbq_m_n_s32): Remove.
26112 (vrshrnbq_m_n_s16): Remove.
26113 (vrshrnbq_m_n_u32): Remove.
26114 (vrshrnbq_m_n_u16): Remove.
26115 (vrshrntq_m_n_s32): Remove.
26116 (vrshrntq_m_n_s16): Remove.
26117 (vrshrntq_m_n_u32): Remove.
26118 (vrshrntq_m_n_u16): Remove.
26119 (__arm_vrshrnbq_n_s16): Remove.
26120 (__arm_vrshrntq_n_s16): Remove.
26121 (__arm_vrshrnbq_n_u16): Remove.
26122 (__arm_vrshrntq_n_u16): Remove.
26123 (__arm_vrshrnbq_n_s32): Remove.
26124 (__arm_vrshrntq_n_s32): Remove.
26125 (__arm_vrshrnbq_n_u32): Remove.
26126 (__arm_vrshrntq_n_u32): Remove.
26127 (__arm_vrshrnbq_m_n_s32): Remove.
26128 (__arm_vrshrnbq_m_n_s16): Remove.
26129 (__arm_vrshrnbq_m_n_u32): Remove.
26130 (__arm_vrshrnbq_m_n_u16): Remove.
26131 (__arm_vrshrntq_m_n_s32): Remove.
26132 (__arm_vrshrntq_m_n_s16): Remove.
26133 (__arm_vrshrntq_m_n_u32): Remove.
26134 (__arm_vrshrntq_m_n_u16): Remove.
26135 (__arm_vrshrnbq): Remove.
26136 (__arm_vrshrntq): Remove.
26137 (__arm_vrshrnbq_m): Remove.
26138 (__arm_vrshrntq_m): Remove.
26139 (vqshrnbq): Remove.
26140 (vqshrntq): Remove.
26141 (vqshrnbq_m): Remove.
26142 (vqshrntq_m): Remove.
26143 (vqshrnbq_n_s16): Remove.
26144 (vqshrntq_n_s16): Remove.
26145 (vqshrnbq_n_u16): Remove.
26146 (vqshrntq_n_u16): Remove.
26147 (vqshrnbq_n_s32): Remove.
26148 (vqshrntq_n_s32): Remove.
26149 (vqshrnbq_n_u32): Remove.
26150 (vqshrntq_n_u32): Remove.
26151 (vqshrnbq_m_n_s32): Remove.
26152 (vqshrnbq_m_n_s16): Remove.
26153 (vqshrnbq_m_n_u32): Remove.
26154 (vqshrnbq_m_n_u16): Remove.
26155 (vqshrntq_m_n_s32): Remove.
26156 (vqshrntq_m_n_s16): Remove.
26157 (vqshrntq_m_n_u32): Remove.
26158 (vqshrntq_m_n_u16): Remove.
26159 (__arm_vqshrnbq_n_s16): Remove.
26160 (__arm_vqshrntq_n_s16): Remove.
26161 (__arm_vqshrnbq_n_u16): Remove.
26162 (__arm_vqshrntq_n_u16): Remove.
26163 (__arm_vqshrnbq_n_s32): Remove.
26164 (__arm_vqshrntq_n_s32): Remove.
26165 (__arm_vqshrnbq_n_u32): Remove.
26166 (__arm_vqshrntq_n_u32): Remove.
26167 (__arm_vqshrnbq_m_n_s32): Remove.
26168 (__arm_vqshrnbq_m_n_s16): Remove.
26169 (__arm_vqshrnbq_m_n_u32): Remove.
26170 (__arm_vqshrnbq_m_n_u16): Remove.
26171 (__arm_vqshrntq_m_n_s32): Remove.
26172 (__arm_vqshrntq_m_n_s16): Remove.
26173 (__arm_vqshrntq_m_n_u32): Remove.
26174 (__arm_vqshrntq_m_n_u16): Remove.
26175 (__arm_vqshrnbq): Remove.
26176 (__arm_vqshrntq): Remove.
26177 (__arm_vqshrnbq_m): Remove.
26178 (__arm_vqshrntq_m): Remove.
26179 (vqrshrnbq): Remove.
26180 (vqrshrntq): Remove.
26181 (vqrshrnbq_m): Remove.
26182 (vqrshrntq_m): Remove.
26183 (vqrshrnbq_n_s16): Remove.
26184 (vqrshrnbq_n_u16): Remove.
26185 (vqrshrnbq_n_s32): Remove.
26186 (vqrshrnbq_n_u32): Remove.
26187 (vqrshrntq_n_s16): Remove.
26188 (vqrshrntq_n_u16): Remove.
26189 (vqrshrntq_n_s32): Remove.
26190 (vqrshrntq_n_u32): Remove.
26191 (vqrshrnbq_m_n_s32): Remove.
26192 (vqrshrnbq_m_n_s16): Remove.
26193 (vqrshrnbq_m_n_u32): Remove.
26194 (vqrshrnbq_m_n_u16): Remove.
26195 (vqrshrntq_m_n_s32): Remove.
26196 (vqrshrntq_m_n_s16): Remove.
26197 (vqrshrntq_m_n_u32): Remove.
26198 (vqrshrntq_m_n_u16): Remove.
26199 (__arm_vqrshrnbq_n_s16): Remove.
26200 (__arm_vqrshrnbq_n_u16): Remove.
26201 (__arm_vqrshrnbq_n_s32): Remove.
26202 (__arm_vqrshrnbq_n_u32): Remove.
26203 (__arm_vqrshrntq_n_s16): Remove.
26204 (__arm_vqrshrntq_n_u16): Remove.
26205 (__arm_vqrshrntq_n_s32): Remove.
26206 (__arm_vqrshrntq_n_u32): Remove.
26207 (__arm_vqrshrnbq_m_n_s32): Remove.
26208 (__arm_vqrshrnbq_m_n_s16): Remove.
26209 (__arm_vqrshrnbq_m_n_u32): Remove.
26210 (__arm_vqrshrnbq_m_n_u16): Remove.
26211 (__arm_vqrshrntq_m_n_s32): Remove.
26212 (__arm_vqrshrntq_m_n_s16): Remove.
26213 (__arm_vqrshrntq_m_n_u32): Remove.
26214 (__arm_vqrshrntq_m_n_u16): Remove.
26215 (__arm_vqrshrnbq): Remove.
26216 (__arm_vqrshrntq): Remove.
26217 (__arm_vqrshrnbq_m): Remove.
26218 (__arm_vqrshrntq_m): Remove.
26220 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26222 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
26223 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
26224 vrshrnt, vshrnb, vshrnt.
26226 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
26227 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
26228 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
26229 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
26230 (mve_vshrntq_n_<supf><mode>): Merge into ...
26231 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26232 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
26233 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
26234 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
26235 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
26237 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26239 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26241 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
26243 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
26245 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26247 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
26248 (vmaxq, vminq): New.
26249 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
26250 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
26251 * config/arm/arm_mve.h (vminq): Remove.
26257 (vminq_u8): Remove.
26258 (vmaxq_u8): Remove.
26259 (vminq_s8): Remove.
26260 (vmaxq_s8): Remove.
26261 (vminq_u16): Remove.
26262 (vmaxq_u16): Remove.
26263 (vminq_s16): Remove.
26264 (vmaxq_s16): Remove.
26265 (vminq_u32): Remove.
26266 (vmaxq_u32): Remove.
26267 (vminq_s32): Remove.
26268 (vmaxq_s32): Remove.
26269 (vmaxq_m_s8): Remove.
26270 (vmaxq_m_s32): Remove.
26271 (vmaxq_m_s16): Remove.
26272 (vmaxq_m_u8): Remove.
26273 (vmaxq_m_u32): Remove.
26274 (vmaxq_m_u16): Remove.
26275 (vminq_m_s8): Remove.
26276 (vminq_m_s32): Remove.
26277 (vminq_m_s16): Remove.
26278 (vminq_m_u8): Remove.
26279 (vminq_m_u32): Remove.
26280 (vminq_m_u16): Remove.
26281 (vminq_x_s8): Remove.
26282 (vminq_x_s16): Remove.
26283 (vminq_x_s32): Remove.
26284 (vminq_x_u8): Remove.
26285 (vminq_x_u16): Remove.
26286 (vminq_x_u32): Remove.
26287 (vmaxq_x_s8): Remove.
26288 (vmaxq_x_s16): Remove.
26289 (vmaxq_x_s32): Remove.
26290 (vmaxq_x_u8): Remove.
26291 (vmaxq_x_u16): Remove.
26292 (vmaxq_x_u32): Remove.
26293 (__arm_vminq_u8): Remove.
26294 (__arm_vmaxq_u8): Remove.
26295 (__arm_vminq_s8): Remove.
26296 (__arm_vmaxq_s8): Remove.
26297 (__arm_vminq_u16): Remove.
26298 (__arm_vmaxq_u16): Remove.
26299 (__arm_vminq_s16): Remove.
26300 (__arm_vmaxq_s16): Remove.
26301 (__arm_vminq_u32): Remove.
26302 (__arm_vmaxq_u32): Remove.
26303 (__arm_vminq_s32): Remove.
26304 (__arm_vmaxq_s32): Remove.
26305 (__arm_vmaxq_m_s8): Remove.
26306 (__arm_vmaxq_m_s32): Remove.
26307 (__arm_vmaxq_m_s16): Remove.
26308 (__arm_vmaxq_m_u8): Remove.
26309 (__arm_vmaxq_m_u32): Remove.
26310 (__arm_vmaxq_m_u16): Remove.
26311 (__arm_vminq_m_s8): Remove.
26312 (__arm_vminq_m_s32): Remove.
26313 (__arm_vminq_m_s16): Remove.
26314 (__arm_vminq_m_u8): Remove.
26315 (__arm_vminq_m_u32): Remove.
26316 (__arm_vminq_m_u16): Remove.
26317 (__arm_vminq_x_s8): Remove.
26318 (__arm_vminq_x_s16): Remove.
26319 (__arm_vminq_x_s32): Remove.
26320 (__arm_vminq_x_u8): Remove.
26321 (__arm_vminq_x_u16): Remove.
26322 (__arm_vminq_x_u32): Remove.
26323 (__arm_vmaxq_x_s8): Remove.
26324 (__arm_vmaxq_x_s16): Remove.
26325 (__arm_vmaxq_x_s32): Remove.
26326 (__arm_vmaxq_x_u8): Remove.
26327 (__arm_vmaxq_x_u16): Remove.
26328 (__arm_vmaxq_x_u32): Remove.
26329 (__arm_vminq): Remove.
26330 (__arm_vmaxq): Remove.
26331 (__arm_vmaxq_m): Remove.
26332 (__arm_vminq_m): Remove.
26333 (__arm_vminq_x): Remove.
26334 (__arm_vmaxq_x): Remove.
26336 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26338 * config/arm/iterators.md (MAX_MIN_SU): New.
26339 (max_min_su_str): New.
26340 (max_min_supf): New.
26341 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
26342 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
26343 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
26345 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26347 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
26348 (vqshlq, vshlq): New.
26349 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
26350 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
26351 * config/arm/arm_mve.h (vshlq): Remove.
26354 (vshlq_m_r): Remove.
26356 (vshlq_m_n): Remove.
26358 (vshlq_x_n): Remove.
26359 (vshlq_s8): Remove.
26360 (vshlq_s16): Remove.
26361 (vshlq_s32): Remove.
26362 (vshlq_u8): Remove.
26363 (vshlq_u16): Remove.
26364 (vshlq_u32): Remove.
26365 (vshlq_r_u8): Remove.
26366 (vshlq_n_u8): Remove.
26367 (vshlq_r_s8): Remove.
26368 (vshlq_n_s8): Remove.
26369 (vshlq_r_u16): Remove.
26370 (vshlq_n_u16): Remove.
26371 (vshlq_r_s16): Remove.
26372 (vshlq_n_s16): Remove.
26373 (vshlq_r_u32): Remove.
26374 (vshlq_n_u32): Remove.
26375 (vshlq_r_s32): Remove.
26376 (vshlq_n_s32): Remove.
26377 (vshlq_m_r_u8): Remove.
26378 (vshlq_m_r_s8): Remove.
26379 (vshlq_m_r_u16): Remove.
26380 (vshlq_m_r_s16): Remove.
26381 (vshlq_m_r_u32): Remove.
26382 (vshlq_m_r_s32): Remove.
26383 (vshlq_m_u8): Remove.
26384 (vshlq_m_s8): Remove.
26385 (vshlq_m_u16): Remove.
26386 (vshlq_m_s16): Remove.
26387 (vshlq_m_u32): Remove.
26388 (vshlq_m_s32): Remove.
26389 (vshlq_m_n_s8): Remove.
26390 (vshlq_m_n_s32): Remove.
26391 (vshlq_m_n_s16): Remove.
26392 (vshlq_m_n_u8): Remove.
26393 (vshlq_m_n_u32): Remove.
26394 (vshlq_m_n_u16): Remove.
26395 (vshlq_x_s8): Remove.
26396 (vshlq_x_s16): Remove.
26397 (vshlq_x_s32): Remove.
26398 (vshlq_x_u8): Remove.
26399 (vshlq_x_u16): Remove.
26400 (vshlq_x_u32): Remove.
26401 (vshlq_x_n_s8): Remove.
26402 (vshlq_x_n_s16): Remove.
26403 (vshlq_x_n_s32): Remove.
26404 (vshlq_x_n_u8): Remove.
26405 (vshlq_x_n_u16): Remove.
26406 (vshlq_x_n_u32): Remove.
26407 (__arm_vshlq_s8): Remove.
26408 (__arm_vshlq_s16): Remove.
26409 (__arm_vshlq_s32): Remove.
26410 (__arm_vshlq_u8): Remove.
26411 (__arm_vshlq_u16): Remove.
26412 (__arm_vshlq_u32): Remove.
26413 (__arm_vshlq_r_u8): Remove.
26414 (__arm_vshlq_n_u8): Remove.
26415 (__arm_vshlq_r_s8): Remove.
26416 (__arm_vshlq_n_s8): Remove.
26417 (__arm_vshlq_r_u16): Remove.
26418 (__arm_vshlq_n_u16): Remove.
26419 (__arm_vshlq_r_s16): Remove.
26420 (__arm_vshlq_n_s16): Remove.
26421 (__arm_vshlq_r_u32): Remove.
26422 (__arm_vshlq_n_u32): Remove.
26423 (__arm_vshlq_r_s32): Remove.
26424 (__arm_vshlq_n_s32): Remove.
26425 (__arm_vshlq_m_r_u8): Remove.
26426 (__arm_vshlq_m_r_s8): Remove.
26427 (__arm_vshlq_m_r_u16): Remove.
26428 (__arm_vshlq_m_r_s16): Remove.
26429 (__arm_vshlq_m_r_u32): Remove.
26430 (__arm_vshlq_m_r_s32): Remove.
26431 (__arm_vshlq_m_u8): Remove.
26432 (__arm_vshlq_m_s8): Remove.
26433 (__arm_vshlq_m_u16): Remove.
26434 (__arm_vshlq_m_s16): Remove.
26435 (__arm_vshlq_m_u32): Remove.
26436 (__arm_vshlq_m_s32): Remove.
26437 (__arm_vshlq_m_n_s8): Remove.
26438 (__arm_vshlq_m_n_s32): Remove.
26439 (__arm_vshlq_m_n_s16): Remove.
26440 (__arm_vshlq_m_n_u8): Remove.
26441 (__arm_vshlq_m_n_u32): Remove.
26442 (__arm_vshlq_m_n_u16): Remove.
26443 (__arm_vshlq_x_s8): Remove.
26444 (__arm_vshlq_x_s16): Remove.
26445 (__arm_vshlq_x_s32): Remove.
26446 (__arm_vshlq_x_u8): Remove.
26447 (__arm_vshlq_x_u16): Remove.
26448 (__arm_vshlq_x_u32): Remove.
26449 (__arm_vshlq_x_n_s8): Remove.
26450 (__arm_vshlq_x_n_s16): Remove.
26451 (__arm_vshlq_x_n_s32): Remove.
26452 (__arm_vshlq_x_n_u8): Remove.
26453 (__arm_vshlq_x_n_u16): Remove.
26454 (__arm_vshlq_x_n_u32): Remove.
26455 (__arm_vshlq): Remove.
26456 (__arm_vshlq_r): Remove.
26457 (__arm_vshlq_n): Remove.
26458 (__arm_vshlq_m_r): Remove.
26459 (__arm_vshlq_m): Remove.
26460 (__arm_vshlq_m_n): Remove.
26461 (__arm_vshlq_x): Remove.
26462 (__arm_vshlq_x_n): Remove.
26464 (vqshlq_r): Remove.
26465 (vqshlq_n): Remove.
26466 (vqshlq_m_r): Remove.
26467 (vqshlq_m_n): Remove.
26468 (vqshlq_m): Remove.
26469 (vqshlq_u8): Remove.
26470 (vqshlq_r_u8): Remove.
26471 (vqshlq_n_u8): Remove.
26472 (vqshlq_s8): Remove.
26473 (vqshlq_r_s8): Remove.
26474 (vqshlq_n_s8): Remove.
26475 (vqshlq_u16): Remove.
26476 (vqshlq_r_u16): Remove.
26477 (vqshlq_n_u16): Remove.
26478 (vqshlq_s16): Remove.
26479 (vqshlq_r_s16): Remove.
26480 (vqshlq_n_s16): Remove.
26481 (vqshlq_u32): Remove.
26482 (vqshlq_r_u32): Remove.
26483 (vqshlq_n_u32): Remove.
26484 (vqshlq_s32): Remove.
26485 (vqshlq_r_s32): Remove.
26486 (vqshlq_n_s32): Remove.
26487 (vqshlq_m_r_u8): Remove.
26488 (vqshlq_m_r_s8): Remove.
26489 (vqshlq_m_r_u16): Remove.
26490 (vqshlq_m_r_s16): Remove.
26491 (vqshlq_m_r_u32): Remove.
26492 (vqshlq_m_r_s32): Remove.
26493 (vqshlq_m_n_s8): Remove.
26494 (vqshlq_m_n_s32): Remove.
26495 (vqshlq_m_n_s16): Remove.
26496 (vqshlq_m_n_u8): Remove.
26497 (vqshlq_m_n_u32): Remove.
26498 (vqshlq_m_n_u16): Remove.
26499 (vqshlq_m_s8): Remove.
26500 (vqshlq_m_s32): Remove.
26501 (vqshlq_m_s16): Remove.
26502 (vqshlq_m_u8): Remove.
26503 (vqshlq_m_u32): Remove.
26504 (vqshlq_m_u16): Remove.
26505 (__arm_vqshlq_u8): Remove.
26506 (__arm_vqshlq_r_u8): Remove.
26507 (__arm_vqshlq_n_u8): Remove.
26508 (__arm_vqshlq_s8): Remove.
26509 (__arm_vqshlq_r_s8): Remove.
26510 (__arm_vqshlq_n_s8): Remove.
26511 (__arm_vqshlq_u16): Remove.
26512 (__arm_vqshlq_r_u16): Remove.
26513 (__arm_vqshlq_n_u16): Remove.
26514 (__arm_vqshlq_s16): Remove.
26515 (__arm_vqshlq_r_s16): Remove.
26516 (__arm_vqshlq_n_s16): Remove.
26517 (__arm_vqshlq_u32): Remove.
26518 (__arm_vqshlq_r_u32): Remove.
26519 (__arm_vqshlq_n_u32): Remove.
26520 (__arm_vqshlq_s32): Remove.
26521 (__arm_vqshlq_r_s32): Remove.
26522 (__arm_vqshlq_n_s32): Remove.
26523 (__arm_vqshlq_m_r_u8): Remove.
26524 (__arm_vqshlq_m_r_s8): Remove.
26525 (__arm_vqshlq_m_r_u16): Remove.
26526 (__arm_vqshlq_m_r_s16): Remove.
26527 (__arm_vqshlq_m_r_u32): Remove.
26528 (__arm_vqshlq_m_r_s32): Remove.
26529 (__arm_vqshlq_m_n_s8): Remove.
26530 (__arm_vqshlq_m_n_s32): Remove.
26531 (__arm_vqshlq_m_n_s16): Remove.
26532 (__arm_vqshlq_m_n_u8): Remove.
26533 (__arm_vqshlq_m_n_u32): Remove.
26534 (__arm_vqshlq_m_n_u16): Remove.
26535 (__arm_vqshlq_m_s8): Remove.
26536 (__arm_vqshlq_m_s32): Remove.
26537 (__arm_vqshlq_m_s16): Remove.
26538 (__arm_vqshlq_m_u8): Remove.
26539 (__arm_vqshlq_m_u32): Remove.
26540 (__arm_vqshlq_m_u16): Remove.
26541 (__arm_vqshlq): Remove.
26542 (__arm_vqshlq_r): Remove.
26543 (__arm_vqshlq_n): Remove.
26544 (__arm_vqshlq_m_r): Remove.
26545 (__arm_vqshlq_m_n): Remove.
26546 (__arm_vqshlq_m): Remove.
26548 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26550 * config/arm/arm-mve-builtins-functions.h (class
26551 unspec_mve_function_exact_insn_vshl): New.
26553 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26555 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
26556 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
26558 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26560 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
26561 (finish_opt_n_resolution): Handle MODE_r.
26562 * config/arm/arm-mve-builtins.def (r): New mode.
26564 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26566 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
26567 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
26569 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26571 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
26573 * config/arm/arm-mve-builtins-base.def (vabdq): New.
26574 * config/arm/arm-mve-builtins-base.h (vabdq): New.
26575 * config/arm/arm_mve.h (vabdq): Remove.
26578 (vabdq_u8): Remove.
26579 (vabdq_s8): Remove.
26580 (vabdq_u16): Remove.
26581 (vabdq_s16): Remove.
26582 (vabdq_u32): Remove.
26583 (vabdq_s32): Remove.
26584 (vabdq_f16): Remove.
26585 (vabdq_f32): Remove.
26586 (vabdq_m_s8): Remove.
26587 (vabdq_m_s32): Remove.
26588 (vabdq_m_s16): Remove.
26589 (vabdq_m_u8): Remove.
26590 (vabdq_m_u32): Remove.
26591 (vabdq_m_u16): Remove.
26592 (vabdq_m_f32): Remove.
26593 (vabdq_m_f16): Remove.
26594 (vabdq_x_s8): Remove.
26595 (vabdq_x_s16): Remove.
26596 (vabdq_x_s32): Remove.
26597 (vabdq_x_u8): Remove.
26598 (vabdq_x_u16): Remove.
26599 (vabdq_x_u32): Remove.
26600 (vabdq_x_f16): Remove.
26601 (vabdq_x_f32): Remove.
26602 (__arm_vabdq_u8): Remove.
26603 (__arm_vabdq_s8): Remove.
26604 (__arm_vabdq_u16): Remove.
26605 (__arm_vabdq_s16): Remove.
26606 (__arm_vabdq_u32): Remove.
26607 (__arm_vabdq_s32): Remove.
26608 (__arm_vabdq_m_s8): Remove.
26609 (__arm_vabdq_m_s32): Remove.
26610 (__arm_vabdq_m_s16): Remove.
26611 (__arm_vabdq_m_u8): Remove.
26612 (__arm_vabdq_m_u32): Remove.
26613 (__arm_vabdq_m_u16): Remove.
26614 (__arm_vabdq_x_s8): Remove.
26615 (__arm_vabdq_x_s16): Remove.
26616 (__arm_vabdq_x_s32): Remove.
26617 (__arm_vabdq_x_u8): Remove.
26618 (__arm_vabdq_x_u16): Remove.
26619 (__arm_vabdq_x_u32): Remove.
26620 (__arm_vabdq_f16): Remove.
26621 (__arm_vabdq_f32): Remove.
26622 (__arm_vabdq_m_f32): Remove.
26623 (__arm_vabdq_m_f16): Remove.
26624 (__arm_vabdq_x_f16): Remove.
26625 (__arm_vabdq_x_f32): Remove.
26626 (__arm_vabdq): Remove.
26627 (__arm_vabdq_m): Remove.
26628 (__arm_vabdq_x): Remove.
26630 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26632 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
26633 (MVE_FP_VABDQ_ONLY): New.
26634 (mve_insn): Add vabd.
26635 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
26636 (@mve_<mve_insn>q_f<mode>): ... this.
26637 (mve_vabdq_m_f<mode>): Remove.
26639 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26641 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
26642 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
26643 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
26644 * config/arm/arm_mve.h (vqrdmulhq): Remove.
26645 (vqrdmulhq_m): Remove.
26646 (vqrdmulhq_s8): Remove.
26647 (vqrdmulhq_n_s8): Remove.
26648 (vqrdmulhq_s16): Remove.
26649 (vqrdmulhq_n_s16): Remove.
26650 (vqrdmulhq_s32): Remove.
26651 (vqrdmulhq_n_s32): Remove.
26652 (vqrdmulhq_m_n_s8): Remove.
26653 (vqrdmulhq_m_n_s32): Remove.
26654 (vqrdmulhq_m_n_s16): Remove.
26655 (vqrdmulhq_m_s8): Remove.
26656 (vqrdmulhq_m_s32): Remove.
26657 (vqrdmulhq_m_s16): Remove.
26658 (__arm_vqrdmulhq_s8): Remove.
26659 (__arm_vqrdmulhq_n_s8): Remove.
26660 (__arm_vqrdmulhq_s16): Remove.
26661 (__arm_vqrdmulhq_n_s16): Remove.
26662 (__arm_vqrdmulhq_s32): Remove.
26663 (__arm_vqrdmulhq_n_s32): Remove.
26664 (__arm_vqrdmulhq_m_n_s8): Remove.
26665 (__arm_vqrdmulhq_m_n_s32): Remove.
26666 (__arm_vqrdmulhq_m_n_s16): Remove.
26667 (__arm_vqrdmulhq_m_s8): Remove.
26668 (__arm_vqrdmulhq_m_s32): Remove.
26669 (__arm_vqrdmulhq_m_s16): Remove.
26670 (__arm_vqrdmulhq): Remove.
26671 (__arm_vqrdmulhq_m): Remove.
26673 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26675 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
26676 (MVE_SHIFT_N, MVE_SHIFT_R): New.
26677 (mve_insn): Add vqshl, vshl.
26678 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
26679 (mve_vshlq_n_<supf><mode>): Merge into ...
26680 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26681 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
26683 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
26684 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
26686 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
26687 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
26689 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26690 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
26692 (@mve_<mve_insn>q_<supf><mode>): ... this.
26694 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26696 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
26697 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
26698 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
26699 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
26701 * config/arm/arm_mve.h (vrshlq): Remove.
26702 (vrshlq_m_n): Remove.
26703 (vrshlq_m): Remove.
26704 (vrshlq_x): Remove.
26705 (vrshlq_u8): Remove.
26706 (vrshlq_n_u8): Remove.
26707 (vrshlq_s8): Remove.
26708 (vrshlq_n_s8): Remove.
26709 (vrshlq_u16): Remove.
26710 (vrshlq_n_u16): Remove.
26711 (vrshlq_s16): Remove.
26712 (vrshlq_n_s16): Remove.
26713 (vrshlq_u32): Remove.
26714 (vrshlq_n_u32): Remove.
26715 (vrshlq_s32): Remove.
26716 (vrshlq_n_s32): Remove.
26717 (vrshlq_m_n_u8): Remove.
26718 (vrshlq_m_n_s8): Remove.
26719 (vrshlq_m_n_u16): Remove.
26720 (vrshlq_m_n_s16): Remove.
26721 (vrshlq_m_n_u32): Remove.
26722 (vrshlq_m_n_s32): Remove.
26723 (vrshlq_m_s8): Remove.
26724 (vrshlq_m_s32): Remove.
26725 (vrshlq_m_s16): Remove.
26726 (vrshlq_m_u8): Remove.
26727 (vrshlq_m_u32): Remove.
26728 (vrshlq_m_u16): Remove.
26729 (vrshlq_x_s8): Remove.
26730 (vrshlq_x_s16): Remove.
26731 (vrshlq_x_s32): Remove.
26732 (vrshlq_x_u8): Remove.
26733 (vrshlq_x_u16): Remove.
26734 (vrshlq_x_u32): Remove.
26735 (__arm_vrshlq_u8): Remove.
26736 (__arm_vrshlq_n_u8): Remove.
26737 (__arm_vrshlq_s8): Remove.
26738 (__arm_vrshlq_n_s8): Remove.
26739 (__arm_vrshlq_u16): Remove.
26740 (__arm_vrshlq_n_u16): Remove.
26741 (__arm_vrshlq_s16): Remove.
26742 (__arm_vrshlq_n_s16): Remove.
26743 (__arm_vrshlq_u32): Remove.
26744 (__arm_vrshlq_n_u32): Remove.
26745 (__arm_vrshlq_s32): Remove.
26746 (__arm_vrshlq_n_s32): Remove.
26747 (__arm_vrshlq_m_n_u8): Remove.
26748 (__arm_vrshlq_m_n_s8): Remove.
26749 (__arm_vrshlq_m_n_u16): Remove.
26750 (__arm_vrshlq_m_n_s16): Remove.
26751 (__arm_vrshlq_m_n_u32): Remove.
26752 (__arm_vrshlq_m_n_s32): Remove.
26753 (__arm_vrshlq_m_s8): Remove.
26754 (__arm_vrshlq_m_s32): Remove.
26755 (__arm_vrshlq_m_s16): Remove.
26756 (__arm_vrshlq_m_u8): Remove.
26757 (__arm_vrshlq_m_u32): Remove.
26758 (__arm_vrshlq_m_u16): Remove.
26759 (__arm_vrshlq_x_s8): Remove.
26760 (__arm_vrshlq_x_s16): Remove.
26761 (__arm_vrshlq_x_s32): Remove.
26762 (__arm_vrshlq_x_u8): Remove.
26763 (__arm_vrshlq_x_u16): Remove.
26764 (__arm_vrshlq_x_u32): Remove.
26765 (__arm_vrshlq): Remove.
26766 (__arm_vrshlq_m_n): Remove.
26767 (__arm_vrshlq_m): Remove.
26768 (__arm_vrshlq_x): Remove.
26770 (vqrshlq_m_n): Remove.
26771 (vqrshlq_m): Remove.
26772 (vqrshlq_u8): Remove.
26773 (vqrshlq_n_u8): Remove.
26774 (vqrshlq_s8): Remove.
26775 (vqrshlq_n_s8): Remove.
26776 (vqrshlq_u16): Remove.
26777 (vqrshlq_n_u16): Remove.
26778 (vqrshlq_s16): Remove.
26779 (vqrshlq_n_s16): Remove.
26780 (vqrshlq_u32): Remove.
26781 (vqrshlq_n_u32): Remove.
26782 (vqrshlq_s32): Remove.
26783 (vqrshlq_n_s32): Remove.
26784 (vqrshlq_m_n_u8): Remove.
26785 (vqrshlq_m_n_s8): Remove.
26786 (vqrshlq_m_n_u16): Remove.
26787 (vqrshlq_m_n_s16): Remove.
26788 (vqrshlq_m_n_u32): Remove.
26789 (vqrshlq_m_n_s32): Remove.
26790 (vqrshlq_m_s8): Remove.
26791 (vqrshlq_m_s32): Remove.
26792 (vqrshlq_m_s16): Remove.
26793 (vqrshlq_m_u8): Remove.
26794 (vqrshlq_m_u32): Remove.
26795 (vqrshlq_m_u16): Remove.
26796 (__arm_vqrshlq_u8): Remove.
26797 (__arm_vqrshlq_n_u8): Remove.
26798 (__arm_vqrshlq_s8): Remove.
26799 (__arm_vqrshlq_n_s8): Remove.
26800 (__arm_vqrshlq_u16): Remove.
26801 (__arm_vqrshlq_n_u16): Remove.
26802 (__arm_vqrshlq_s16): Remove.
26803 (__arm_vqrshlq_n_s16): Remove.
26804 (__arm_vqrshlq_u32): Remove.
26805 (__arm_vqrshlq_n_u32): Remove.
26806 (__arm_vqrshlq_s32): Remove.
26807 (__arm_vqrshlq_n_s32): Remove.
26808 (__arm_vqrshlq_m_n_u8): Remove.
26809 (__arm_vqrshlq_m_n_s8): Remove.
26810 (__arm_vqrshlq_m_n_u16): Remove.
26811 (__arm_vqrshlq_m_n_s16): Remove.
26812 (__arm_vqrshlq_m_n_u32): Remove.
26813 (__arm_vqrshlq_m_n_s32): Remove.
26814 (__arm_vqrshlq_m_s8): Remove.
26815 (__arm_vqrshlq_m_s32): Remove.
26816 (__arm_vqrshlq_m_s16): Remove.
26817 (__arm_vqrshlq_m_u8): Remove.
26818 (__arm_vqrshlq_m_u32): Remove.
26819 (__arm_vqrshlq_m_u16): Remove.
26820 (__arm_vqrshlq): Remove.
26821 (__arm_vqrshlq_m_n): Remove.
26822 (__arm_vqrshlq_m): Remove.
26824 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26826 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
26827 (mve_insn): Add vqrshl, vrshl.
26828 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
26829 (mve_vrshlq_n_<supf><mode>): Merge into ...
26830 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26831 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
26833 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26835 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26837 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
26838 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
26840 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26843 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
26844 denegrate PHI optmization.
26846 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
26848 * config/i386/predicates.md (register_no_SP_operand):
26849 Rename from index_register_operand.
26850 (call_register_operand): Update for rename.
26851 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
26853 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26856 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
26857 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
26858 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
26859 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
26860 (s-match): Split into s-generic-match and s-gimple-match.
26861 * configure.ac (with-matchpd-partitions,
26862 DEFAULT_MATCHPD_PARTITIONS): New.
26863 * configure: Regenerate.
26865 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26868 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
26869 (decision_tree::gen): Accept list of files instead of single and update
26870 to write function definition to header and main file.
26871 (write_predicate): Likewise.
26872 (write_header): Emit pragmas and new includes.
26873 (main): Create file buffers and cleanup.
26874 (showUsage, write_header_includes): New.
26876 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26879 * Makefile.in (OBJS): Add gimple-match-exports.o.
26880 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
26881 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
26882 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
26883 gimple_resimplify5, constant_for_folding, convert_conditional_op,
26884 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
26885 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
26886 do_valueize, try_conditional_simplification, gimple_extract,
26887 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
26888 commutative_ternary_op_p, first_commutative_argument,
26889 associative_binary_op_p, directly_supported_p,
26890 get_conditional_internal_fn): Moved to gimple-match-exports.cc
26891 * gimple-match-exports.cc: New file.
26893 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26896 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
26898 (dt_simplify::gen_1): Use it.
26900 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26903 * genmatch.cc (output_line_directive): Only emit commented directive
26906 2023-05-05 Tamar Christina <tamar.christina@arm.com>
26909 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
26911 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
26913 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
26914 unused in_mode/in_n variables.
26916 2023-05-05 Richard Biener <rguenther@suse.de>
26918 PR tree-optimization/109735
26919 * tree-vect-stmts.cc (vectorizable_operation): Perform
26920 conversion for POINTER_DIFF_EXPR unconditionally.
26922 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
26924 * config/i386/mmx.md (mulv2si3): New expander.
26925 (*mulv2si3): New insn pattern.
26927 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
26928 Thomas Schwinge <thomas@codesourcery.com>
26931 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
26932 alongside reverse-offload function table to prevent NULL values
26933 of the function addresses.
26935 2023-05-05 Jakub Jelinek <jakub@redhat.com>
26937 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
26939 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
26941 2023-05-05 Andrew Pinski <apinski@marvell.com>
26943 PR tree-optimization/109732
26944 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
26945 of the argtrue/argfalse.
26947 2023-05-05 Andrew Pinski <apinski@marvell.com>
26949 PR tree-optimization/109722
26950 * match.pd: Extend the `ABS<a> == 0` pattern
26951 to cover `ABSU<a> == 0` too.
26953 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
26956 * config/i386/predicates.md (index_reg_operand): New predicate.
26957 * config/i386/i386.md (ashift to lea spliter): Use
26958 general_reg_operand and index_reg_operand predicates.
26960 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26962 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
26963 Rename and reimplement with RTL codes to...
26964 (aarch64_<optab>hn2<mode>_insn_le): .. This.
26965 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
26966 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
26968 (aarch64_<optab>hn2<mode>_insn_be): ... This.
26969 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
26970 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
26971 (aarch64_<optab>hn2<mode>): ... This.
26972 (aarch64_r<optab>hn2<mode>): New expander.
26973 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
26974 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
26975 (ADDSUBHN): Delete.
26976 (sur): Remove handling of the above.
26977 (addsub): Likewise.
26979 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26981 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
26983 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
26984 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
26985 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
26986 (aarch64_<sur><addsub>hn<mode>): Delete.
26987 (aarch64_<optab>hn<mode>): New define_expand.
26988 (aarch64_r<optab>hn<mode>): Likewise.
26989 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
26992 2023-05-04 Andrew Pinski <apinski@marvell.com>
26994 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
26995 diamond form bb with forwarder only empty blocks better.
26997 2023-05-04 Andrew Pinski <apinski@marvell.com>
26999 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
27000 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
27001 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
27002 of an inline version of it.
27003 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
27004 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
27006 2023-05-04 Andrew Pinski <apinski@marvell.com>
27008 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
27009 the default argument value for dce_ssa_names to nullptr.
27010 Check to make sure dce_ssa_names is a non-nullptr before
27011 calling simple_dce_from_worklist.
27013 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
27015 * config/i386/predicates.md (index_register_operand): Reject
27016 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
27017 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
27018 (call_register_no_elim_operand): Rewrite as ...
27019 (call_register_operand): ... this.
27020 (call_insn_operand): Use call_register_operand predicate.
27022 2023-05-04 Richard Biener <rguenther@suse.de>
27024 PR tree-optimization/109721
27025 * tree-vect-stmts.cc (vectorizable_operation): Make sure
27026 to test word_mode for all !target_support_p operations.
27028 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27031 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
27032 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
27033 (aarch64_mla<mode>): Rename to...
27034 (aarch64_mla<mode><vczle><vczbe>): ... This.
27035 (*aarch64_mla_elt<mode>): Rename to...
27036 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
27037 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
27038 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27039 (aarch64_mla_n<mode>): Rename to...
27040 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
27041 (aarch64_mls<mode>): Rename to...
27042 (aarch64_mls<mode><vczle><vczbe>): ... This.
27043 (*aarch64_mls_elt<mode>): Rename to...
27044 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
27045 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
27046 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27047 (aarch64_mls_n<mode>): Rename to...
27048 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
27049 (fma<mode>4): Rename to...
27050 (fma<mode>4<vczle><vczbe>): ... This.
27051 (*aarch64_fma4_elt<mode>): Rename to...
27052 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
27053 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
27054 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27055 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
27056 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27057 (fnma<mode>4): Rename to...
27058 (fnma<mode>4<vczle><vczbe>): ... This.
27059 (*aarch64_fnma4_elt<mode>): Rename to...
27060 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
27061 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
27062 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27063 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
27064 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27065 (aarch64_simd_bsl<mode>_internal): Rename to...
27066 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
27067 (*aarch64_simd_bsl<mode>_alt): Rename to...
27068 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
27070 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27073 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
27074 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
27075 (fabd<mode>3): Rename to...
27076 (fabd<mode>3<vczle><vczbe>): ... This.
27077 (aarch64_<optab>p<mode>): Rename to...
27078 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
27079 (aarch64_faddp<mode>): Rename to...
27080 (aarch64_faddp<mode><vczle><vczbe>): ... This.
27082 2023-05-04 Martin Liska <mliska@suse.cz>
27084 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
27085 (print_version): Use it.
27086 (generate_results): Likewise.
27088 2023-05-04 Richard Biener <rguenther@suse.de>
27090 * tree-cfg.h (last_stmt): Rename to ...
27091 (last_nondebug_stmt): ... this.
27092 * tree-cfg.cc (last_stmt): Rename to ...
27093 (last_nondebug_stmt): ... this.
27094 (assign_discriminators): Adjust.
27095 (group_case_labels_stmt): Likewise.
27096 (gimple_can_duplicate_bb_p): Likewise.
27097 (execute_fixup_cfg): Likewise.
27098 * auto-profile.cc (afdo_propagate_circuit): Likewise.
27099 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
27100 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
27101 (determine_parallel_type): Likewise.
27102 (adjust_context_and_scope): Likewise.
27103 (expand_task_call): Likewise.
27104 (remove_exit_barrier): Likewise.
27105 (expand_omp_taskreg): Likewise.
27106 (expand_omp_for_init_counts): Likewise.
27107 (expand_omp_for_init_vars): Likewise.
27108 (expand_omp_for_static_chunk): Likewise.
27109 (expand_omp_simd): Likewise.
27110 (expand_oacc_for): Likewise.
27111 (expand_omp_for): Likewise.
27112 (expand_omp_sections): Likewise.
27113 (expand_omp_atomic_fetch_op): Likewise.
27114 (expand_omp_atomic_cas): Likewise.
27115 (expand_omp_atomic): Likewise.
27116 (expand_omp_target): Likewise.
27117 (expand_omp): Likewise.
27118 (omp_make_gimple_edges): Likewise.
27119 * trans-mem.cc (tm_region_init): Likewise.
27120 * tree-inline.cc (redirect_all_calls): Likewise.
27121 * tree-parloops.cc (gen_parallel_loop): Likewise.
27122 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
27123 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
27125 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
27126 (may_eliminate_iv): Likewise.
27127 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
27128 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
27130 (estimate_numbers_of_iterations): Likewise.
27131 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
27132 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
27133 (set_predicates_for_bb): Likewise.
27134 (init_loop_unswitch_info): Likewise.
27135 (hoist_guard): Likewise.
27136 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
27137 (minmax_replacement): Likewise.
27138 * tree-ssa-reassoc.cc (update_range_test): Likewise.
27139 (optimize_range_tests_to_bit_test): Likewise.
27140 (optimize_range_tests_var_bound): Likewise.
27141 (optimize_range_tests): Likewise.
27142 (no_side_effect_bb): Likewise.
27143 (suitable_cond_bb): Likewise.
27144 (maybe_optimize_range_tests): Likewise.
27145 (reassociate_bb): Likewise.
27146 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
27148 2023-05-04 Jakub Jelinek <jakub@redhat.com>
27151 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
27152 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
27153 for it only if it still has TImode. Don't decide whether to call
27154 fix_debug_reg_uses based on whether SRC is ever set or not.
27156 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27158 * config/cris/cris.cc (cris_split_constant): New function.
27159 * config/cris/cris.md (splitop): New iterator.
27160 (opsplit1): New define_peephole2.
27161 * config/cris/cris-protos.h (cris_split_constant): Declare.
27162 (cris_splittable_constant_p): New macro.
27164 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27166 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
27169 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27171 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
27172 lra_in_progress, not reload_in_progress.
27173 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
27174 * config/cris/constraints.md ("Q"): Ditto.
27176 2023-05-03 Andrew Pinski <apinski@marvell.com>
27178 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
27179 stats on removed number of statements and phis.
27181 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
27183 PR tree-optimization/109711
27184 * value-range.cc (irange::verify_range): Allow types of
27187 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
27190 * calls.cc (can_implement_as_sibling_call_p): Reject calls
27191 to __sanitizer_cov_trace_pc.
27193 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27196 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
27197 a new ABI break parameter for GCC 14. Set it to the alignment
27198 of enums that have an underlying type. Take the true alignment
27199 of such enums from the TYPE_ALIGN of the underlying type's
27201 (aarch64_function_arg_boundary): Update accordingly.
27202 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
27203 Warn about ABI differences.
27205 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27208 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
27209 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
27210 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
27211 (aarch64_gimplify_va_arg_expr): Likewise.
27213 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27215 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
27216 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
27217 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
27219 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
27220 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
27221 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
27222 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
27223 * config/arm/arm_mve.h (vhsubq): Remove.
27225 (vhaddq_m): Remove.
27226 (vhsubq_m): Remove.
27227 (vhaddq_x): Remove.
27228 (vhsubq_x): Remove.
27229 (vhsubq_u8): Remove.
27230 (vhsubq_n_u8): Remove.
27231 (vhaddq_u8): Remove.
27232 (vhaddq_n_u8): Remove.
27233 (vhsubq_s8): Remove.
27234 (vhsubq_n_s8): Remove.
27235 (vhaddq_s8): Remove.
27236 (vhaddq_n_s8): Remove.
27237 (vhsubq_u16): Remove.
27238 (vhsubq_n_u16): Remove.
27239 (vhaddq_u16): Remove.
27240 (vhaddq_n_u16): Remove.
27241 (vhsubq_s16): Remove.
27242 (vhsubq_n_s16): Remove.
27243 (vhaddq_s16): Remove.
27244 (vhaddq_n_s16): Remove.
27245 (vhsubq_u32): Remove.
27246 (vhsubq_n_u32): Remove.
27247 (vhaddq_u32): Remove.
27248 (vhaddq_n_u32): Remove.
27249 (vhsubq_s32): Remove.
27250 (vhsubq_n_s32): Remove.
27251 (vhaddq_s32): Remove.
27252 (vhaddq_n_s32): Remove.
27253 (vhaddq_m_n_s8): Remove.
27254 (vhaddq_m_n_s32): Remove.
27255 (vhaddq_m_n_s16): Remove.
27256 (vhaddq_m_n_u8): Remove.
27257 (vhaddq_m_n_u32): Remove.
27258 (vhaddq_m_n_u16): Remove.
27259 (vhaddq_m_s8): Remove.
27260 (vhaddq_m_s32): Remove.
27261 (vhaddq_m_s16): Remove.
27262 (vhaddq_m_u8): Remove.
27263 (vhaddq_m_u32): Remove.
27264 (vhaddq_m_u16): Remove.
27265 (vhsubq_m_n_s8): Remove.
27266 (vhsubq_m_n_s32): Remove.
27267 (vhsubq_m_n_s16): Remove.
27268 (vhsubq_m_n_u8): Remove.
27269 (vhsubq_m_n_u32): Remove.
27270 (vhsubq_m_n_u16): Remove.
27271 (vhsubq_m_s8): Remove.
27272 (vhsubq_m_s32): Remove.
27273 (vhsubq_m_s16): Remove.
27274 (vhsubq_m_u8): Remove.
27275 (vhsubq_m_u32): Remove.
27276 (vhsubq_m_u16): Remove.
27277 (vhaddq_x_n_s8): Remove.
27278 (vhaddq_x_n_s16): Remove.
27279 (vhaddq_x_n_s32): Remove.
27280 (vhaddq_x_n_u8): Remove.
27281 (vhaddq_x_n_u16): Remove.
27282 (vhaddq_x_n_u32): Remove.
27283 (vhaddq_x_s8): Remove.
27284 (vhaddq_x_s16): Remove.
27285 (vhaddq_x_s32): Remove.
27286 (vhaddq_x_u8): Remove.
27287 (vhaddq_x_u16): Remove.
27288 (vhaddq_x_u32): Remove.
27289 (vhsubq_x_n_s8): Remove.
27290 (vhsubq_x_n_s16): Remove.
27291 (vhsubq_x_n_s32): Remove.
27292 (vhsubq_x_n_u8): Remove.
27293 (vhsubq_x_n_u16): Remove.
27294 (vhsubq_x_n_u32): Remove.
27295 (vhsubq_x_s8): Remove.
27296 (vhsubq_x_s16): Remove.
27297 (vhsubq_x_s32): Remove.
27298 (vhsubq_x_u8): Remove.
27299 (vhsubq_x_u16): Remove.
27300 (vhsubq_x_u32): Remove.
27301 (__arm_vhsubq_u8): Remove.
27302 (__arm_vhsubq_n_u8): Remove.
27303 (__arm_vhaddq_u8): Remove.
27304 (__arm_vhaddq_n_u8): Remove.
27305 (__arm_vhsubq_s8): Remove.
27306 (__arm_vhsubq_n_s8): Remove.
27307 (__arm_vhaddq_s8): Remove.
27308 (__arm_vhaddq_n_s8): Remove.
27309 (__arm_vhsubq_u16): Remove.
27310 (__arm_vhsubq_n_u16): Remove.
27311 (__arm_vhaddq_u16): Remove.
27312 (__arm_vhaddq_n_u16): Remove.
27313 (__arm_vhsubq_s16): Remove.
27314 (__arm_vhsubq_n_s16): Remove.
27315 (__arm_vhaddq_s16): Remove.
27316 (__arm_vhaddq_n_s16): Remove.
27317 (__arm_vhsubq_u32): Remove.
27318 (__arm_vhsubq_n_u32): Remove.
27319 (__arm_vhaddq_u32): Remove.
27320 (__arm_vhaddq_n_u32): Remove.
27321 (__arm_vhsubq_s32): Remove.
27322 (__arm_vhsubq_n_s32): Remove.
27323 (__arm_vhaddq_s32): Remove.
27324 (__arm_vhaddq_n_s32): Remove.
27325 (__arm_vhaddq_m_n_s8): Remove.
27326 (__arm_vhaddq_m_n_s32): Remove.
27327 (__arm_vhaddq_m_n_s16): Remove.
27328 (__arm_vhaddq_m_n_u8): Remove.
27329 (__arm_vhaddq_m_n_u32): Remove.
27330 (__arm_vhaddq_m_n_u16): Remove.
27331 (__arm_vhaddq_m_s8): Remove.
27332 (__arm_vhaddq_m_s32): Remove.
27333 (__arm_vhaddq_m_s16): Remove.
27334 (__arm_vhaddq_m_u8): Remove.
27335 (__arm_vhaddq_m_u32): Remove.
27336 (__arm_vhaddq_m_u16): Remove.
27337 (__arm_vhsubq_m_n_s8): Remove.
27338 (__arm_vhsubq_m_n_s32): Remove.
27339 (__arm_vhsubq_m_n_s16): Remove.
27340 (__arm_vhsubq_m_n_u8): Remove.
27341 (__arm_vhsubq_m_n_u32): Remove.
27342 (__arm_vhsubq_m_n_u16): Remove.
27343 (__arm_vhsubq_m_s8): Remove.
27344 (__arm_vhsubq_m_s32): Remove.
27345 (__arm_vhsubq_m_s16): Remove.
27346 (__arm_vhsubq_m_u8): Remove.
27347 (__arm_vhsubq_m_u32): Remove.
27348 (__arm_vhsubq_m_u16): Remove.
27349 (__arm_vhaddq_x_n_s8): Remove.
27350 (__arm_vhaddq_x_n_s16): Remove.
27351 (__arm_vhaddq_x_n_s32): Remove.
27352 (__arm_vhaddq_x_n_u8): Remove.
27353 (__arm_vhaddq_x_n_u16): Remove.
27354 (__arm_vhaddq_x_n_u32): Remove.
27355 (__arm_vhaddq_x_s8): Remove.
27356 (__arm_vhaddq_x_s16): Remove.
27357 (__arm_vhaddq_x_s32): Remove.
27358 (__arm_vhaddq_x_u8): Remove.
27359 (__arm_vhaddq_x_u16): Remove.
27360 (__arm_vhaddq_x_u32): Remove.
27361 (__arm_vhsubq_x_n_s8): Remove.
27362 (__arm_vhsubq_x_n_s16): Remove.
27363 (__arm_vhsubq_x_n_s32): Remove.
27364 (__arm_vhsubq_x_n_u8): Remove.
27365 (__arm_vhsubq_x_n_u16): Remove.
27366 (__arm_vhsubq_x_n_u32): Remove.
27367 (__arm_vhsubq_x_s8): Remove.
27368 (__arm_vhsubq_x_s16): Remove.
27369 (__arm_vhsubq_x_s32): Remove.
27370 (__arm_vhsubq_x_u8): Remove.
27371 (__arm_vhsubq_x_u16): Remove.
27372 (__arm_vhsubq_x_u32): Remove.
27373 (__arm_vhsubq): Remove.
27374 (__arm_vhaddq): Remove.
27375 (__arm_vhaddq_m): Remove.
27376 (__arm_vhsubq_m): Remove.
27377 (__arm_vhaddq_x): Remove.
27378 (__arm_vhsubq_x): Remove.
27380 (vmulhq_m): Remove.
27381 (vmulhq_x): Remove.
27382 (vmulhq_u8): Remove.
27383 (vmulhq_s8): Remove.
27384 (vmulhq_u16): Remove.
27385 (vmulhq_s16): Remove.
27386 (vmulhq_u32): Remove.
27387 (vmulhq_s32): Remove.
27388 (vmulhq_m_s8): Remove.
27389 (vmulhq_m_s32): Remove.
27390 (vmulhq_m_s16): Remove.
27391 (vmulhq_m_u8): Remove.
27392 (vmulhq_m_u32): Remove.
27393 (vmulhq_m_u16): Remove.
27394 (vmulhq_x_s8): Remove.
27395 (vmulhq_x_s16): Remove.
27396 (vmulhq_x_s32): Remove.
27397 (vmulhq_x_u8): Remove.
27398 (vmulhq_x_u16): Remove.
27399 (vmulhq_x_u32): Remove.
27400 (__arm_vmulhq_u8): Remove.
27401 (__arm_vmulhq_s8): Remove.
27402 (__arm_vmulhq_u16): Remove.
27403 (__arm_vmulhq_s16): Remove.
27404 (__arm_vmulhq_u32): Remove.
27405 (__arm_vmulhq_s32): Remove.
27406 (__arm_vmulhq_m_s8): Remove.
27407 (__arm_vmulhq_m_s32): Remove.
27408 (__arm_vmulhq_m_s16): Remove.
27409 (__arm_vmulhq_m_u8): Remove.
27410 (__arm_vmulhq_m_u32): Remove.
27411 (__arm_vmulhq_m_u16): Remove.
27412 (__arm_vmulhq_x_s8): Remove.
27413 (__arm_vmulhq_x_s16): Remove.
27414 (__arm_vmulhq_x_s32): Remove.
27415 (__arm_vmulhq_x_u8): Remove.
27416 (__arm_vmulhq_x_u16): Remove.
27417 (__arm_vmulhq_x_u32): Remove.
27418 (__arm_vmulhq): Remove.
27419 (__arm_vmulhq_m): Remove.
27420 (__arm_vmulhq_x): Remove.
27423 (vqaddq_m): Remove.
27424 (vqsubq_m): Remove.
27425 (vqsubq_u8): Remove.
27426 (vqsubq_n_u8): Remove.
27427 (vqaddq_u8): Remove.
27428 (vqaddq_n_u8): Remove.
27429 (vqsubq_s8): Remove.
27430 (vqsubq_n_s8): Remove.
27431 (vqaddq_s8): Remove.
27432 (vqaddq_n_s8): Remove.
27433 (vqsubq_u16): Remove.
27434 (vqsubq_n_u16): Remove.
27435 (vqaddq_u16): Remove.
27436 (vqaddq_n_u16): Remove.
27437 (vqsubq_s16): Remove.
27438 (vqsubq_n_s16): Remove.
27439 (vqaddq_s16): Remove.
27440 (vqaddq_n_s16): Remove.
27441 (vqsubq_u32): Remove.
27442 (vqsubq_n_u32): Remove.
27443 (vqaddq_u32): Remove.
27444 (vqaddq_n_u32): Remove.
27445 (vqsubq_s32): Remove.
27446 (vqsubq_n_s32): Remove.
27447 (vqaddq_s32): Remove.
27448 (vqaddq_n_s32): Remove.
27449 (vqaddq_m_n_s8): Remove.
27450 (vqaddq_m_n_s32): Remove.
27451 (vqaddq_m_n_s16): Remove.
27452 (vqaddq_m_n_u8): Remove.
27453 (vqaddq_m_n_u32): Remove.
27454 (vqaddq_m_n_u16): Remove.
27455 (vqaddq_m_s8): Remove.
27456 (vqaddq_m_s32): Remove.
27457 (vqaddq_m_s16): Remove.
27458 (vqaddq_m_u8): Remove.
27459 (vqaddq_m_u32): Remove.
27460 (vqaddq_m_u16): Remove.
27461 (vqsubq_m_n_s8): Remove.
27462 (vqsubq_m_n_s32): Remove.
27463 (vqsubq_m_n_s16): Remove.
27464 (vqsubq_m_n_u8): Remove.
27465 (vqsubq_m_n_u32): Remove.
27466 (vqsubq_m_n_u16): Remove.
27467 (vqsubq_m_s8): Remove.
27468 (vqsubq_m_s32): Remove.
27469 (vqsubq_m_s16): Remove.
27470 (vqsubq_m_u8): Remove.
27471 (vqsubq_m_u32): Remove.
27472 (vqsubq_m_u16): Remove.
27473 (__arm_vqsubq_u8): Remove.
27474 (__arm_vqsubq_n_u8): Remove.
27475 (__arm_vqaddq_u8): Remove.
27476 (__arm_vqaddq_n_u8): Remove.
27477 (__arm_vqsubq_s8): Remove.
27478 (__arm_vqsubq_n_s8): Remove.
27479 (__arm_vqaddq_s8): Remove.
27480 (__arm_vqaddq_n_s8): Remove.
27481 (__arm_vqsubq_u16): Remove.
27482 (__arm_vqsubq_n_u16): Remove.
27483 (__arm_vqaddq_u16): Remove.
27484 (__arm_vqaddq_n_u16): Remove.
27485 (__arm_vqsubq_s16): Remove.
27486 (__arm_vqsubq_n_s16): Remove.
27487 (__arm_vqaddq_s16): Remove.
27488 (__arm_vqaddq_n_s16): Remove.
27489 (__arm_vqsubq_u32): Remove.
27490 (__arm_vqsubq_n_u32): Remove.
27491 (__arm_vqaddq_u32): Remove.
27492 (__arm_vqaddq_n_u32): Remove.
27493 (__arm_vqsubq_s32): Remove.
27494 (__arm_vqsubq_n_s32): Remove.
27495 (__arm_vqaddq_s32): Remove.
27496 (__arm_vqaddq_n_s32): Remove.
27497 (__arm_vqaddq_m_n_s8): Remove.
27498 (__arm_vqaddq_m_n_s32): Remove.
27499 (__arm_vqaddq_m_n_s16): Remove.
27500 (__arm_vqaddq_m_n_u8): Remove.
27501 (__arm_vqaddq_m_n_u32): Remove.
27502 (__arm_vqaddq_m_n_u16): Remove.
27503 (__arm_vqaddq_m_s8): Remove.
27504 (__arm_vqaddq_m_s32): Remove.
27505 (__arm_vqaddq_m_s16): Remove.
27506 (__arm_vqaddq_m_u8): Remove.
27507 (__arm_vqaddq_m_u32): Remove.
27508 (__arm_vqaddq_m_u16): Remove.
27509 (__arm_vqsubq_m_n_s8): Remove.
27510 (__arm_vqsubq_m_n_s32): Remove.
27511 (__arm_vqsubq_m_n_s16): Remove.
27512 (__arm_vqsubq_m_n_u8): Remove.
27513 (__arm_vqsubq_m_n_u32): Remove.
27514 (__arm_vqsubq_m_n_u16): Remove.
27515 (__arm_vqsubq_m_s8): Remove.
27516 (__arm_vqsubq_m_s32): Remove.
27517 (__arm_vqsubq_m_s16): Remove.
27518 (__arm_vqsubq_m_u8): Remove.
27519 (__arm_vqsubq_m_u32): Remove.
27520 (__arm_vqsubq_m_u16): Remove.
27521 (__arm_vqsubq): Remove.
27522 (__arm_vqaddq): Remove.
27523 (__arm_vqaddq_m): Remove.
27524 (__arm_vqsubq_m): Remove.
27525 (vqdmulhq): Remove.
27526 (vqdmulhq_m): Remove.
27527 (vqdmulhq_s8): Remove.
27528 (vqdmulhq_n_s8): Remove.
27529 (vqdmulhq_s16): Remove.
27530 (vqdmulhq_n_s16): Remove.
27531 (vqdmulhq_s32): Remove.
27532 (vqdmulhq_n_s32): Remove.
27533 (vqdmulhq_m_n_s8): Remove.
27534 (vqdmulhq_m_n_s32): Remove.
27535 (vqdmulhq_m_n_s16): Remove.
27536 (vqdmulhq_m_s8): Remove.
27537 (vqdmulhq_m_s32): Remove.
27538 (vqdmulhq_m_s16): Remove.
27539 (__arm_vqdmulhq_s8): Remove.
27540 (__arm_vqdmulhq_n_s8): Remove.
27541 (__arm_vqdmulhq_s16): Remove.
27542 (__arm_vqdmulhq_n_s16): Remove.
27543 (__arm_vqdmulhq_s32): Remove.
27544 (__arm_vqdmulhq_n_s32): Remove.
27545 (__arm_vqdmulhq_m_n_s8): Remove.
27546 (__arm_vqdmulhq_m_n_s32): Remove.
27547 (__arm_vqdmulhq_m_n_s16): Remove.
27548 (__arm_vqdmulhq_m_s8): Remove.
27549 (__arm_vqdmulhq_m_s32): Remove.
27550 (__arm_vqdmulhq_m_s16): Remove.
27551 (__arm_vqdmulhq): Remove.
27552 (__arm_vqdmulhq_m): Remove.
27554 (vrhaddq_m): Remove.
27555 (vrhaddq_x): Remove.
27556 (vrhaddq_u8): Remove.
27557 (vrhaddq_s8): Remove.
27558 (vrhaddq_u16): Remove.
27559 (vrhaddq_s16): Remove.
27560 (vrhaddq_u32): Remove.
27561 (vrhaddq_s32): Remove.
27562 (vrhaddq_m_s8): Remove.
27563 (vrhaddq_m_s32): Remove.
27564 (vrhaddq_m_s16): Remove.
27565 (vrhaddq_m_u8): Remove.
27566 (vrhaddq_m_u32): Remove.
27567 (vrhaddq_m_u16): Remove.
27568 (vrhaddq_x_s8): Remove.
27569 (vrhaddq_x_s16): Remove.
27570 (vrhaddq_x_s32): Remove.
27571 (vrhaddq_x_u8): Remove.
27572 (vrhaddq_x_u16): Remove.
27573 (vrhaddq_x_u32): Remove.
27574 (__arm_vrhaddq_u8): Remove.
27575 (__arm_vrhaddq_s8): Remove.
27576 (__arm_vrhaddq_u16): Remove.
27577 (__arm_vrhaddq_s16): Remove.
27578 (__arm_vrhaddq_u32): Remove.
27579 (__arm_vrhaddq_s32): Remove.
27580 (__arm_vrhaddq_m_s8): Remove.
27581 (__arm_vrhaddq_m_s32): Remove.
27582 (__arm_vrhaddq_m_s16): Remove.
27583 (__arm_vrhaddq_m_u8): Remove.
27584 (__arm_vrhaddq_m_u32): Remove.
27585 (__arm_vrhaddq_m_u16): Remove.
27586 (__arm_vrhaddq_x_s8): Remove.
27587 (__arm_vrhaddq_x_s16): Remove.
27588 (__arm_vrhaddq_x_s32): Remove.
27589 (__arm_vrhaddq_x_u8): Remove.
27590 (__arm_vrhaddq_x_u16): Remove.
27591 (__arm_vrhaddq_x_u32): Remove.
27592 (__arm_vrhaddq): Remove.
27593 (__arm_vrhaddq_m): Remove.
27594 (__arm_vrhaddq_x): Remove.
27596 (vrmulhq_m): Remove.
27597 (vrmulhq_x): Remove.
27598 (vrmulhq_u8): Remove.
27599 (vrmulhq_s8): Remove.
27600 (vrmulhq_u16): Remove.
27601 (vrmulhq_s16): Remove.
27602 (vrmulhq_u32): Remove.
27603 (vrmulhq_s32): Remove.
27604 (vrmulhq_m_s8): Remove.
27605 (vrmulhq_m_s32): Remove.
27606 (vrmulhq_m_s16): Remove.
27607 (vrmulhq_m_u8): Remove.
27608 (vrmulhq_m_u32): Remove.
27609 (vrmulhq_m_u16): Remove.
27610 (vrmulhq_x_s8): Remove.
27611 (vrmulhq_x_s16): Remove.
27612 (vrmulhq_x_s32): Remove.
27613 (vrmulhq_x_u8): Remove.
27614 (vrmulhq_x_u16): Remove.
27615 (vrmulhq_x_u32): Remove.
27616 (__arm_vrmulhq_u8): Remove.
27617 (__arm_vrmulhq_s8): Remove.
27618 (__arm_vrmulhq_u16): Remove.
27619 (__arm_vrmulhq_s16): Remove.
27620 (__arm_vrmulhq_u32): Remove.
27621 (__arm_vrmulhq_s32): Remove.
27622 (__arm_vrmulhq_m_s8): Remove.
27623 (__arm_vrmulhq_m_s32): Remove.
27624 (__arm_vrmulhq_m_s16): Remove.
27625 (__arm_vrmulhq_m_u8): Remove.
27626 (__arm_vrmulhq_m_u32): Remove.
27627 (__arm_vrmulhq_m_u16): Remove.
27628 (__arm_vrmulhq_x_s8): Remove.
27629 (__arm_vrmulhq_x_s16): Remove.
27630 (__arm_vrmulhq_x_s32): Remove.
27631 (__arm_vrmulhq_x_u8): Remove.
27632 (__arm_vrmulhq_x_u16): Remove.
27633 (__arm_vrmulhq_x_u32): Remove.
27634 (__arm_vrmulhq): Remove.
27635 (__arm_vrmulhq_m): Remove.
27636 (__arm_vrmulhq_x): Remove.
27638 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27640 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
27641 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
27642 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
27643 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
27644 * config/arm/mve.md (mve_vabdq_<supf><mode>)
27645 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
27646 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
27647 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
27648 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
27649 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
27650 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
27652 (@mve_<mve_insn>q_<supf><mode>): ... this.
27653 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
27654 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
27655 gen_mve_vhaddq / gen_mve_vrhaddq.
27657 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27659 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
27660 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
27661 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
27662 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
27663 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
27664 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
27665 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
27666 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
27667 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
27668 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
27669 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
27670 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
27671 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27673 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27675 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
27676 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
27678 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
27679 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
27680 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
27681 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
27682 (mve_vqsubq_n_<supf><mode>): Merge into ...
27683 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27685 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27687 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
27688 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
27689 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
27690 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
27691 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
27692 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
27693 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
27694 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
27695 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
27696 (mve_vshlq_m_<supf><mode>): Merged into
27697 @mve_<mve_insn>q_m_<supf><mode>.
27698 (mve_vabdq_m_<supf><mode>): Likewise.
27699 (mve_vhaddq_m_<supf><mode>): Likewise.
27700 (mve_vhsubq_m_<supf><mode>): Likewise.
27701 (mve_vmaxq_m_<supf><mode>): Likewise.
27702 (mve_vminq_m_<supf><mode>): Likewise.
27703 (mve_vmulhq_m_<supf><mode>): Likewise.
27704 (mve_vqaddq_m_<supf><mode>): Likewise.
27705 (mve_vqrshlq_m_<supf><mode>): Likewise.
27706 (mve_vqshlq_m_<supf><mode>): Likewise.
27707 (mve_vqsubq_m_<supf><mode>): Likewise.
27708 (mve_vrhaddq_m_<supf><mode>): Likewise.
27709 (mve_vrmulhq_m_<supf><mode>): Likewise.
27710 (mve_vrshlq_m_<supf><mode>): Likewise.
27711 (mve_vqdmladhq_m_s<mode>): Likewise.
27712 (mve_vqdmladhxq_m_s<mode>): Likewise.
27713 (mve_vqdmlsdhq_m_s<mode>): Likewise.
27714 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
27715 (mve_vqdmulhq_m_s<mode>): Likewise.
27716 (mve_vqrdmladhq_m_s<mode>): Likewise.
27717 (mve_vqrdmladhxq_m_s<mode>): Likewise.
27718 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
27719 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
27720 (mve_vqrdmulhq_m_s<mode>): Likewise.
27722 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27724 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
27725 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
27726 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
27727 * config/arm/arm_mve.h (vcreateq_f16): Remove.
27728 (vcreateq_f32): Remove.
27729 (vcreateq_u8): Remove.
27730 (vcreateq_u16): Remove.
27731 (vcreateq_u32): Remove.
27732 (vcreateq_u64): Remove.
27733 (vcreateq_s8): Remove.
27734 (vcreateq_s16): Remove.
27735 (vcreateq_s32): Remove.
27736 (vcreateq_s64): Remove.
27737 (__arm_vcreateq_u8): Remove.
27738 (__arm_vcreateq_u16): Remove.
27739 (__arm_vcreateq_u32): Remove.
27740 (__arm_vcreateq_u64): Remove.
27741 (__arm_vcreateq_s8): Remove.
27742 (__arm_vcreateq_s16): Remove.
27743 (__arm_vcreateq_s32): Remove.
27744 (__arm_vcreateq_s64): Remove.
27745 (__arm_vcreateq_f16): Remove.
27746 (__arm_vcreateq_f32): Remove.
27748 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27750 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
27751 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
27752 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
27753 (@mve_<mve_insn>q_f<mode>): ... this.
27754 (mve_vcreateq_<supf><mode>): Rename into ...
27755 (@mve_<mve_insn>q_<supf><mode>): ... this.
27757 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27759 * config/arm/arm-mve-builtins-shapes.cc (create): New.
27760 * config/arm/arm-mve-builtins-shapes.h: (create): New.
27762 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27764 * config/arm/arm-mve-builtins-functions.h (class
27765 unspec_mve_function_exact_insn): New.
27767 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27769 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
27771 * config/arm/arm-mve-builtins-base.def (vorrq): New.
27772 * config/arm/arm-mve-builtins-base.h (vorrq): New.
27773 * config/arm/arm-mve-builtins.cc
27774 (function_instance::has_inactive_argument): Handle vorrq.
27775 * config/arm/arm_mve.h (vorrq): Remove.
27776 (vorrq_m_n): Remove.
27779 (vorrq_u8): Remove.
27780 (vorrq_s8): Remove.
27781 (vorrq_u16): Remove.
27782 (vorrq_s16): Remove.
27783 (vorrq_u32): Remove.
27784 (vorrq_s32): Remove.
27785 (vorrq_n_u16): Remove.
27786 (vorrq_f16): Remove.
27787 (vorrq_n_s16): Remove.
27788 (vorrq_n_u32): Remove.
27789 (vorrq_f32): Remove.
27790 (vorrq_n_s32): Remove.
27791 (vorrq_m_n_s16): Remove.
27792 (vorrq_m_n_u16): Remove.
27793 (vorrq_m_n_s32): Remove.
27794 (vorrq_m_n_u32): Remove.
27795 (vorrq_m_s8): Remove.
27796 (vorrq_m_s32): Remove.
27797 (vorrq_m_s16): Remove.
27798 (vorrq_m_u8): Remove.
27799 (vorrq_m_u32): Remove.
27800 (vorrq_m_u16): Remove.
27801 (vorrq_m_f32): Remove.
27802 (vorrq_m_f16): Remove.
27803 (vorrq_x_s8): Remove.
27804 (vorrq_x_s16): Remove.
27805 (vorrq_x_s32): Remove.
27806 (vorrq_x_u8): Remove.
27807 (vorrq_x_u16): Remove.
27808 (vorrq_x_u32): Remove.
27809 (vorrq_x_f16): Remove.
27810 (vorrq_x_f32): Remove.
27811 (__arm_vorrq_u8): Remove.
27812 (__arm_vorrq_s8): Remove.
27813 (__arm_vorrq_u16): Remove.
27814 (__arm_vorrq_s16): Remove.
27815 (__arm_vorrq_u32): Remove.
27816 (__arm_vorrq_s32): Remove.
27817 (__arm_vorrq_n_u16): Remove.
27818 (__arm_vorrq_n_s16): Remove.
27819 (__arm_vorrq_n_u32): Remove.
27820 (__arm_vorrq_n_s32): Remove.
27821 (__arm_vorrq_m_n_s16): Remove.
27822 (__arm_vorrq_m_n_u16): Remove.
27823 (__arm_vorrq_m_n_s32): Remove.
27824 (__arm_vorrq_m_n_u32): Remove.
27825 (__arm_vorrq_m_s8): Remove.
27826 (__arm_vorrq_m_s32): Remove.
27827 (__arm_vorrq_m_s16): Remove.
27828 (__arm_vorrq_m_u8): Remove.
27829 (__arm_vorrq_m_u32): Remove.
27830 (__arm_vorrq_m_u16): Remove.
27831 (__arm_vorrq_x_s8): Remove.
27832 (__arm_vorrq_x_s16): Remove.
27833 (__arm_vorrq_x_s32): Remove.
27834 (__arm_vorrq_x_u8): Remove.
27835 (__arm_vorrq_x_u16): Remove.
27836 (__arm_vorrq_x_u32): Remove.
27837 (__arm_vorrq_f16): Remove.
27838 (__arm_vorrq_f32): Remove.
27839 (__arm_vorrq_m_f32): Remove.
27840 (__arm_vorrq_m_f16): Remove.
27841 (__arm_vorrq_x_f16): Remove.
27842 (__arm_vorrq_x_f32): Remove.
27843 (__arm_vorrq): Remove.
27844 (__arm_vorrq_m_n): Remove.
27845 (__arm_vorrq_m): Remove.
27846 (__arm_vorrq_x): Remove.
27848 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27850 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
27851 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
27852 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
27853 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
27855 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27857 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
27858 (vandq,veorq): New.
27859 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
27860 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
27861 * config/arm/arm_mve.h (vandq): Remove.
27864 (vandq_u8): Remove.
27865 (vandq_s8): Remove.
27866 (vandq_u16): Remove.
27867 (vandq_s16): Remove.
27868 (vandq_u32): Remove.
27869 (vandq_s32): Remove.
27870 (vandq_f16): Remove.
27871 (vandq_f32): Remove.
27872 (vandq_m_s8): Remove.
27873 (vandq_m_s32): Remove.
27874 (vandq_m_s16): Remove.
27875 (vandq_m_u8): Remove.
27876 (vandq_m_u32): Remove.
27877 (vandq_m_u16): Remove.
27878 (vandq_m_f32): Remove.
27879 (vandq_m_f16): Remove.
27880 (vandq_x_s8): Remove.
27881 (vandq_x_s16): Remove.
27882 (vandq_x_s32): Remove.
27883 (vandq_x_u8): Remove.
27884 (vandq_x_u16): Remove.
27885 (vandq_x_u32): Remove.
27886 (vandq_x_f16): Remove.
27887 (vandq_x_f32): Remove.
27888 (__arm_vandq_u8): Remove.
27889 (__arm_vandq_s8): Remove.
27890 (__arm_vandq_u16): Remove.
27891 (__arm_vandq_s16): Remove.
27892 (__arm_vandq_u32): Remove.
27893 (__arm_vandq_s32): Remove.
27894 (__arm_vandq_m_s8): Remove.
27895 (__arm_vandq_m_s32): Remove.
27896 (__arm_vandq_m_s16): Remove.
27897 (__arm_vandq_m_u8): Remove.
27898 (__arm_vandq_m_u32): Remove.
27899 (__arm_vandq_m_u16): Remove.
27900 (__arm_vandq_x_s8): Remove.
27901 (__arm_vandq_x_s16): Remove.
27902 (__arm_vandq_x_s32): Remove.
27903 (__arm_vandq_x_u8): Remove.
27904 (__arm_vandq_x_u16): Remove.
27905 (__arm_vandq_x_u32): Remove.
27906 (__arm_vandq_f16): Remove.
27907 (__arm_vandq_f32): Remove.
27908 (__arm_vandq_m_f32): Remove.
27909 (__arm_vandq_m_f16): Remove.
27910 (__arm_vandq_x_f16): Remove.
27911 (__arm_vandq_x_f32): Remove.
27912 (__arm_vandq): Remove.
27913 (__arm_vandq_m): Remove.
27914 (__arm_vandq_x): Remove.
27917 (veorq_u8): Remove.
27918 (veorq_s8): Remove.
27919 (veorq_u16): Remove.
27920 (veorq_s16): Remove.
27921 (veorq_u32): Remove.
27922 (veorq_s32): Remove.
27923 (veorq_f16): Remove.
27924 (veorq_f32): Remove.
27925 (veorq_m_s8): Remove.
27926 (veorq_m_s32): Remove.
27927 (veorq_m_s16): Remove.
27928 (veorq_m_u8): Remove.
27929 (veorq_m_u32): Remove.
27930 (veorq_m_u16): Remove.
27931 (veorq_m_f32): Remove.
27932 (veorq_m_f16): Remove.
27933 (veorq_x_s8): Remove.
27934 (veorq_x_s16): Remove.
27935 (veorq_x_s32): Remove.
27936 (veorq_x_u8): Remove.
27937 (veorq_x_u16): Remove.
27938 (veorq_x_u32): Remove.
27939 (veorq_x_f16): Remove.
27940 (veorq_x_f32): Remove.
27941 (__arm_veorq_u8): Remove.
27942 (__arm_veorq_s8): Remove.
27943 (__arm_veorq_u16): Remove.
27944 (__arm_veorq_s16): Remove.
27945 (__arm_veorq_u32): Remove.
27946 (__arm_veorq_s32): Remove.
27947 (__arm_veorq_m_s8): Remove.
27948 (__arm_veorq_m_s32): Remove.
27949 (__arm_veorq_m_s16): Remove.
27950 (__arm_veorq_m_u8): Remove.
27951 (__arm_veorq_m_u32): Remove.
27952 (__arm_veorq_m_u16): Remove.
27953 (__arm_veorq_x_s8): Remove.
27954 (__arm_veorq_x_s16): Remove.
27955 (__arm_veorq_x_s32): Remove.
27956 (__arm_veorq_x_u8): Remove.
27957 (__arm_veorq_x_u16): Remove.
27958 (__arm_veorq_x_u32): Remove.
27959 (__arm_veorq_f16): Remove.
27960 (__arm_veorq_f32): Remove.
27961 (__arm_veorq_m_f32): Remove.
27962 (__arm_veorq_m_f16): Remove.
27963 (__arm_veorq_x_f16): Remove.
27964 (__arm_veorq_x_f32): Remove.
27965 (__arm_veorq): Remove.
27966 (__arm_veorq_m): Remove.
27967 (__arm_veorq_x): Remove.
27969 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27971 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
27972 (MVE_FP_M_BINARY_LOGIC): New.
27973 (MVE_INT_M_N_BINARY_LOGIC): New.
27974 (MVE_INT_N_BINARY_LOGIC): New.
27975 (mve_insn): Add vand, veor, vorr, vbic.
27976 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
27977 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
27978 (mve_vbicq_m_<supf><mode>): Merge into ...
27979 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
27980 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
27981 (mve_vbicq_m_f<mode>): Merge into ...
27982 (@mve_<mve_insn>q_m_f<mode>): ... this.
27983 (mve_vorrq_n_<supf><mode>)
27984 (mve_vbicq_n_<supf><mode>): Merge into ...
27985 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27986 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
27988 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27990 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27992 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
27993 * config/arm/arm-mve-builtins-shapes.h (binary): New.
27995 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27997 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
27999 (vaddq, vmulq, vsubq): New.
28000 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
28001 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
28002 * config/arm/arm_mve.h (vaddq): Remove.
28005 (vaddq_n_u8): Remove.
28006 (vaddq_n_s8): Remove.
28007 (vaddq_n_u16): Remove.
28008 (vaddq_n_s16): Remove.
28009 (vaddq_n_u32): Remove.
28010 (vaddq_n_s32): Remove.
28011 (vaddq_n_f16): Remove.
28012 (vaddq_n_f32): Remove.
28013 (vaddq_m_n_s8): Remove.
28014 (vaddq_m_n_s32): Remove.
28015 (vaddq_m_n_s16): Remove.
28016 (vaddq_m_n_u8): Remove.
28017 (vaddq_m_n_u32): Remove.
28018 (vaddq_m_n_u16): Remove.
28019 (vaddq_m_s8): Remove.
28020 (vaddq_m_s32): Remove.
28021 (vaddq_m_s16): Remove.
28022 (vaddq_m_u8): Remove.
28023 (vaddq_m_u32): Remove.
28024 (vaddq_m_u16): Remove.
28025 (vaddq_m_f32): Remove.
28026 (vaddq_m_f16): Remove.
28027 (vaddq_m_n_f32): Remove.
28028 (vaddq_m_n_f16): Remove.
28029 (vaddq_s8): Remove.
28030 (vaddq_s16): Remove.
28031 (vaddq_s32): Remove.
28032 (vaddq_u8): Remove.
28033 (vaddq_u16): Remove.
28034 (vaddq_u32): Remove.
28035 (vaddq_f16): Remove.
28036 (vaddq_f32): Remove.
28037 (vaddq_x_s8): Remove.
28038 (vaddq_x_s16): Remove.
28039 (vaddq_x_s32): Remove.
28040 (vaddq_x_n_s8): Remove.
28041 (vaddq_x_n_s16): Remove.
28042 (vaddq_x_n_s32): Remove.
28043 (vaddq_x_u8): Remove.
28044 (vaddq_x_u16): Remove.
28045 (vaddq_x_u32): Remove.
28046 (vaddq_x_n_u8): Remove.
28047 (vaddq_x_n_u16): Remove.
28048 (vaddq_x_n_u32): Remove.
28049 (vaddq_x_f16): Remove.
28050 (vaddq_x_f32): Remove.
28051 (vaddq_x_n_f16): Remove.
28052 (vaddq_x_n_f32): Remove.
28053 (__arm_vaddq_n_u8): Remove.
28054 (__arm_vaddq_n_s8): Remove.
28055 (__arm_vaddq_n_u16): Remove.
28056 (__arm_vaddq_n_s16): Remove.
28057 (__arm_vaddq_n_u32): Remove.
28058 (__arm_vaddq_n_s32): Remove.
28059 (__arm_vaddq_m_n_s8): Remove.
28060 (__arm_vaddq_m_n_s32): Remove.
28061 (__arm_vaddq_m_n_s16): Remove.
28062 (__arm_vaddq_m_n_u8): Remove.
28063 (__arm_vaddq_m_n_u32): Remove.
28064 (__arm_vaddq_m_n_u16): Remove.
28065 (__arm_vaddq_m_s8): Remove.
28066 (__arm_vaddq_m_s32): Remove.
28067 (__arm_vaddq_m_s16): Remove.
28068 (__arm_vaddq_m_u8): Remove.
28069 (__arm_vaddq_m_u32): Remove.
28070 (__arm_vaddq_m_u16): Remove.
28071 (__arm_vaddq_s8): Remove.
28072 (__arm_vaddq_s16): Remove.
28073 (__arm_vaddq_s32): Remove.
28074 (__arm_vaddq_u8): Remove.
28075 (__arm_vaddq_u16): Remove.
28076 (__arm_vaddq_u32): Remove.
28077 (__arm_vaddq_x_s8): Remove.
28078 (__arm_vaddq_x_s16): Remove.
28079 (__arm_vaddq_x_s32): Remove.
28080 (__arm_vaddq_x_n_s8): Remove.
28081 (__arm_vaddq_x_n_s16): Remove.
28082 (__arm_vaddq_x_n_s32): Remove.
28083 (__arm_vaddq_x_u8): Remove.
28084 (__arm_vaddq_x_u16): Remove.
28085 (__arm_vaddq_x_u32): Remove.
28086 (__arm_vaddq_x_n_u8): Remove.
28087 (__arm_vaddq_x_n_u16): Remove.
28088 (__arm_vaddq_x_n_u32): Remove.
28089 (__arm_vaddq_n_f16): Remove.
28090 (__arm_vaddq_n_f32): Remove.
28091 (__arm_vaddq_m_f32): Remove.
28092 (__arm_vaddq_m_f16): Remove.
28093 (__arm_vaddq_m_n_f32): Remove.
28094 (__arm_vaddq_m_n_f16): Remove.
28095 (__arm_vaddq_f16): Remove.
28096 (__arm_vaddq_f32): Remove.
28097 (__arm_vaddq_x_f16): Remove.
28098 (__arm_vaddq_x_f32): Remove.
28099 (__arm_vaddq_x_n_f16): Remove.
28100 (__arm_vaddq_x_n_f32): Remove.
28101 (__arm_vaddq): Remove.
28102 (__arm_vaddq_m): Remove.
28103 (__arm_vaddq_x): Remove.
28107 (vmulq_u8): Remove.
28108 (vmulq_n_u8): Remove.
28109 (vmulq_s8): Remove.
28110 (vmulq_n_s8): Remove.
28111 (vmulq_u16): Remove.
28112 (vmulq_n_u16): Remove.
28113 (vmulq_s16): Remove.
28114 (vmulq_n_s16): Remove.
28115 (vmulq_u32): Remove.
28116 (vmulq_n_u32): Remove.
28117 (vmulq_s32): Remove.
28118 (vmulq_n_s32): Remove.
28119 (vmulq_n_f16): Remove.
28120 (vmulq_f16): Remove.
28121 (vmulq_n_f32): Remove.
28122 (vmulq_f32): Remove.
28123 (vmulq_m_n_s8): Remove.
28124 (vmulq_m_n_s32): Remove.
28125 (vmulq_m_n_s16): Remove.
28126 (vmulq_m_n_u8): Remove.
28127 (vmulq_m_n_u32): Remove.
28128 (vmulq_m_n_u16): Remove.
28129 (vmulq_m_s8): Remove.
28130 (vmulq_m_s32): Remove.
28131 (vmulq_m_s16): Remove.
28132 (vmulq_m_u8): Remove.
28133 (vmulq_m_u32): Remove.
28134 (vmulq_m_u16): Remove.
28135 (vmulq_m_f32): Remove.
28136 (vmulq_m_f16): Remove.
28137 (vmulq_m_n_f32): Remove.
28138 (vmulq_m_n_f16): Remove.
28139 (vmulq_x_s8): Remove.
28140 (vmulq_x_s16): Remove.
28141 (vmulq_x_s32): Remove.
28142 (vmulq_x_n_s8): Remove.
28143 (vmulq_x_n_s16): Remove.
28144 (vmulq_x_n_s32): Remove.
28145 (vmulq_x_u8): Remove.
28146 (vmulq_x_u16): Remove.
28147 (vmulq_x_u32): Remove.
28148 (vmulq_x_n_u8): Remove.
28149 (vmulq_x_n_u16): Remove.
28150 (vmulq_x_n_u32): Remove.
28151 (vmulq_x_f16): Remove.
28152 (vmulq_x_f32): Remove.
28153 (vmulq_x_n_f16): Remove.
28154 (vmulq_x_n_f32): Remove.
28155 (__arm_vmulq_u8): Remove.
28156 (__arm_vmulq_n_u8): Remove.
28157 (__arm_vmulq_s8): Remove.
28158 (__arm_vmulq_n_s8): Remove.
28159 (__arm_vmulq_u16): Remove.
28160 (__arm_vmulq_n_u16): Remove.
28161 (__arm_vmulq_s16): Remove.
28162 (__arm_vmulq_n_s16): Remove.
28163 (__arm_vmulq_u32): Remove.
28164 (__arm_vmulq_n_u32): Remove.
28165 (__arm_vmulq_s32): Remove.
28166 (__arm_vmulq_n_s32): Remove.
28167 (__arm_vmulq_m_n_s8): Remove.
28168 (__arm_vmulq_m_n_s32): Remove.
28169 (__arm_vmulq_m_n_s16): Remove.
28170 (__arm_vmulq_m_n_u8): Remove.
28171 (__arm_vmulq_m_n_u32): Remove.
28172 (__arm_vmulq_m_n_u16): Remove.
28173 (__arm_vmulq_m_s8): Remove.
28174 (__arm_vmulq_m_s32): Remove.
28175 (__arm_vmulq_m_s16): Remove.
28176 (__arm_vmulq_m_u8): Remove.
28177 (__arm_vmulq_m_u32): Remove.
28178 (__arm_vmulq_m_u16): Remove.
28179 (__arm_vmulq_x_s8): Remove.
28180 (__arm_vmulq_x_s16): Remove.
28181 (__arm_vmulq_x_s32): Remove.
28182 (__arm_vmulq_x_n_s8): Remove.
28183 (__arm_vmulq_x_n_s16): Remove.
28184 (__arm_vmulq_x_n_s32): Remove.
28185 (__arm_vmulq_x_u8): Remove.
28186 (__arm_vmulq_x_u16): Remove.
28187 (__arm_vmulq_x_u32): Remove.
28188 (__arm_vmulq_x_n_u8): Remove.
28189 (__arm_vmulq_x_n_u16): Remove.
28190 (__arm_vmulq_x_n_u32): Remove.
28191 (__arm_vmulq_n_f16): Remove.
28192 (__arm_vmulq_f16): Remove.
28193 (__arm_vmulq_n_f32): Remove.
28194 (__arm_vmulq_f32): Remove.
28195 (__arm_vmulq_m_f32): Remove.
28196 (__arm_vmulq_m_f16): Remove.
28197 (__arm_vmulq_m_n_f32): Remove.
28198 (__arm_vmulq_m_n_f16): Remove.
28199 (__arm_vmulq_x_f16): Remove.
28200 (__arm_vmulq_x_f32): Remove.
28201 (__arm_vmulq_x_n_f16): Remove.
28202 (__arm_vmulq_x_n_f32): Remove.
28203 (__arm_vmulq): Remove.
28204 (__arm_vmulq_m): Remove.
28205 (__arm_vmulq_x): Remove.
28209 (vsubq_n_f16): Remove.
28210 (vsubq_n_f32): Remove.
28211 (vsubq_u8): Remove.
28212 (vsubq_n_u8): Remove.
28213 (vsubq_s8): Remove.
28214 (vsubq_n_s8): Remove.
28215 (vsubq_u16): Remove.
28216 (vsubq_n_u16): Remove.
28217 (vsubq_s16): Remove.
28218 (vsubq_n_s16): Remove.
28219 (vsubq_u32): Remove.
28220 (vsubq_n_u32): Remove.
28221 (vsubq_s32): Remove.
28222 (vsubq_n_s32): Remove.
28223 (vsubq_f16): Remove.
28224 (vsubq_f32): Remove.
28225 (vsubq_m_s8): Remove.
28226 (vsubq_m_u8): Remove.
28227 (vsubq_m_s16): Remove.
28228 (vsubq_m_u16): Remove.
28229 (vsubq_m_s32): Remove.
28230 (vsubq_m_u32): Remove.
28231 (vsubq_m_n_s8): Remove.
28232 (vsubq_m_n_s32): Remove.
28233 (vsubq_m_n_s16): Remove.
28234 (vsubq_m_n_u8): Remove.
28235 (vsubq_m_n_u32): Remove.
28236 (vsubq_m_n_u16): Remove.
28237 (vsubq_m_f32): Remove.
28238 (vsubq_m_f16): Remove.
28239 (vsubq_m_n_f32): Remove.
28240 (vsubq_m_n_f16): Remove.
28241 (vsubq_x_s8): Remove.
28242 (vsubq_x_s16): Remove.
28243 (vsubq_x_s32): Remove.
28244 (vsubq_x_n_s8): Remove.
28245 (vsubq_x_n_s16): Remove.
28246 (vsubq_x_n_s32): Remove.
28247 (vsubq_x_u8): Remove.
28248 (vsubq_x_u16): Remove.
28249 (vsubq_x_u32): Remove.
28250 (vsubq_x_n_u8): Remove.
28251 (vsubq_x_n_u16): Remove.
28252 (vsubq_x_n_u32): Remove.
28253 (vsubq_x_f16): Remove.
28254 (vsubq_x_f32): Remove.
28255 (vsubq_x_n_f16): Remove.
28256 (vsubq_x_n_f32): Remove.
28257 (__arm_vsubq_u8): Remove.
28258 (__arm_vsubq_n_u8): Remove.
28259 (__arm_vsubq_s8): Remove.
28260 (__arm_vsubq_n_s8): Remove.
28261 (__arm_vsubq_u16): Remove.
28262 (__arm_vsubq_n_u16): Remove.
28263 (__arm_vsubq_s16): Remove.
28264 (__arm_vsubq_n_s16): Remove.
28265 (__arm_vsubq_u32): Remove.
28266 (__arm_vsubq_n_u32): Remove.
28267 (__arm_vsubq_s32): Remove.
28268 (__arm_vsubq_n_s32): Remove.
28269 (__arm_vsubq_m_s8): Remove.
28270 (__arm_vsubq_m_u8): Remove.
28271 (__arm_vsubq_m_s16): Remove.
28272 (__arm_vsubq_m_u16): Remove.
28273 (__arm_vsubq_m_s32): Remove.
28274 (__arm_vsubq_m_u32): Remove.
28275 (__arm_vsubq_m_n_s8): Remove.
28276 (__arm_vsubq_m_n_s32): Remove.
28277 (__arm_vsubq_m_n_s16): Remove.
28278 (__arm_vsubq_m_n_u8): Remove.
28279 (__arm_vsubq_m_n_u32): Remove.
28280 (__arm_vsubq_m_n_u16): Remove.
28281 (__arm_vsubq_x_s8): Remove.
28282 (__arm_vsubq_x_s16): Remove.
28283 (__arm_vsubq_x_s32): Remove.
28284 (__arm_vsubq_x_n_s8): Remove.
28285 (__arm_vsubq_x_n_s16): Remove.
28286 (__arm_vsubq_x_n_s32): Remove.
28287 (__arm_vsubq_x_u8): Remove.
28288 (__arm_vsubq_x_u16): Remove.
28289 (__arm_vsubq_x_u32): Remove.
28290 (__arm_vsubq_x_n_u8): Remove.
28291 (__arm_vsubq_x_n_u16): Remove.
28292 (__arm_vsubq_x_n_u32): Remove.
28293 (__arm_vsubq_n_f16): Remove.
28294 (__arm_vsubq_n_f32): Remove.
28295 (__arm_vsubq_f16): Remove.
28296 (__arm_vsubq_f32): Remove.
28297 (__arm_vsubq_m_f32): Remove.
28298 (__arm_vsubq_m_f16): Remove.
28299 (__arm_vsubq_m_n_f32): Remove.
28300 (__arm_vsubq_m_n_f16): Remove.
28301 (__arm_vsubq_x_f16): Remove.
28302 (__arm_vsubq_x_f32): Remove.
28303 (__arm_vsubq_x_n_f16): Remove.
28304 (__arm_vsubq_x_n_f32): Remove.
28305 (__arm_vsubq): Remove.
28306 (__arm_vsubq_m): Remove.
28307 (__arm_vsubq_x): Remove.
28308 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
28310 (vmulq_u, vmulq_s, vmulq_f): Remove.
28311 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
28312 (mve_vmulq_<supf><mode>): Remove.
28314 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28316 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
28317 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
28318 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
28320 * config/arm/mve.md
28321 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
28323 (@mve_<mve_insn>q_n_f<mode>): ... this.
28324 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
28325 (mve_vsubq_n_<supf><mode>): Factorize into ...
28326 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28327 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
28329 (mve_<mve_addsubmul>q<mode>): ... this.
28330 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
28332 (mve_<mve_addsubmul>q_f<mode>): ... this.
28333 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
28334 (mve_vsubq_m_<supf><mode>): Factorize into ...
28335 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
28336 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
28337 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
28338 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28339 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
28341 (@mve_<mve_insn>q_m_f<mode>): ... this.
28342 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
28343 (mve_vsubq_m_n_f<mode>): Factorize into ...
28344 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
28346 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28348 * config/arm/arm-mve-builtins-functions.h (class
28349 unspec_based_mve_function_base): New.
28350 (class unspec_based_mve_function_exact_insn): New.
28352 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28354 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
28355 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
28357 2023-05-03 Murray Steele <murray.steele@arm.com>
28358 Christophe Lyon <christophe.lyon@arm.com>
28360 * config/arm/arm-mve-builtins-base.cc (class
28361 vuninitializedq_impl): New.
28362 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
28363 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
28365 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
28366 * config/arm/arm-mve-builtins-shapes.h (inherent): New
28368 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
28369 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
28370 (__arm_vuninitializedq_u8): Remove.
28371 (__arm_vuninitializedq_u16): Remove.
28372 (__arm_vuninitializedq_u32): Remove.
28373 (__arm_vuninitializedq_u64): Remove.
28374 (__arm_vuninitializedq_s8): Remove.
28375 (__arm_vuninitializedq_s16): Remove.
28376 (__arm_vuninitializedq_s32): Remove.
28377 (__arm_vuninitializedq_s64): Remove.
28378 (__arm_vuninitializedq_f16): Remove.
28379 (__arm_vuninitializedq_f32): Remove.
28381 2023-05-03 Murray Steele <murray.steele@arm.com>
28382 Christophe Lyon <christophe.lyon@arm.com>
28384 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
28385 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
28386 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
28387 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
28388 (parse_type): Likewise.
28389 (parse_signature): Likewise.
28390 (build_one): Likewise.
28391 (build_all): Likewise.
28392 (overloaded_base): New struct.
28393 (unary_convert_def): Likewise.
28394 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
28395 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
28397 (TYPES_reinterpret_unsigned1): Likewise.
28398 (TYPES_reinterpret_integer): Likewise.
28399 (TYPES_reinterpret_integer1): Likewise.
28400 (TYPES_reinterpret_float1): Likewise.
28401 (TYPES_reinterpret_float): Likewise.
28402 (reinterpret_integer): New.
28403 (reinterpret_float): New.
28404 (handle_arm_mve_h): Register builtins.
28405 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
28406 (vreinterpretq_s32): Likewise.
28407 (vreinterpretq_s64): Likewise.
28408 (vreinterpretq_s8): Likewise.
28409 (vreinterpretq_u16): Likewise.
28410 (vreinterpretq_u32): Likewise.
28411 (vreinterpretq_u64): Likewise.
28412 (vreinterpretq_u8): Likewise.
28413 (vreinterpretq_f16): Likewise.
28414 (vreinterpretq_f32): Likewise.
28415 (vreinterpretq_s16_s32): Likewise.
28416 (vreinterpretq_s16_s64): Likewise.
28417 (vreinterpretq_s16_s8): Likewise.
28418 (vreinterpretq_s16_u16): Likewise.
28419 (vreinterpretq_s16_u32): Likewise.
28420 (vreinterpretq_s16_u64): Likewise.
28421 (vreinterpretq_s16_u8): Likewise.
28422 (vreinterpretq_s32_s16): Likewise.
28423 (vreinterpretq_s32_s64): Likewise.
28424 (vreinterpretq_s32_s8): Likewise.
28425 (vreinterpretq_s32_u16): Likewise.
28426 (vreinterpretq_s32_u32): Likewise.
28427 (vreinterpretq_s32_u64): Likewise.
28428 (vreinterpretq_s32_u8): Likewise.
28429 (vreinterpretq_s64_s16): Likewise.
28430 (vreinterpretq_s64_s32): Likewise.
28431 (vreinterpretq_s64_s8): Likewise.
28432 (vreinterpretq_s64_u16): Likewise.
28433 (vreinterpretq_s64_u32): Likewise.
28434 (vreinterpretq_s64_u64): Likewise.
28435 (vreinterpretq_s64_u8): Likewise.
28436 (vreinterpretq_s8_s16): Likewise.
28437 (vreinterpretq_s8_s32): Likewise.
28438 (vreinterpretq_s8_s64): Likewise.
28439 (vreinterpretq_s8_u16): Likewise.
28440 (vreinterpretq_s8_u32): Likewise.
28441 (vreinterpretq_s8_u64): Likewise.
28442 (vreinterpretq_s8_u8): Likewise.
28443 (vreinterpretq_u16_s16): Likewise.
28444 (vreinterpretq_u16_s32): Likewise.
28445 (vreinterpretq_u16_s64): Likewise.
28446 (vreinterpretq_u16_s8): Likewise.
28447 (vreinterpretq_u16_u32): Likewise.
28448 (vreinterpretq_u16_u64): Likewise.
28449 (vreinterpretq_u16_u8): Likewise.
28450 (vreinterpretq_u32_s16): Likewise.
28451 (vreinterpretq_u32_s32): Likewise.
28452 (vreinterpretq_u32_s64): Likewise.
28453 (vreinterpretq_u32_s8): Likewise.
28454 (vreinterpretq_u32_u16): Likewise.
28455 (vreinterpretq_u32_u64): Likewise.
28456 (vreinterpretq_u32_u8): Likewise.
28457 (vreinterpretq_u64_s16): Likewise.
28458 (vreinterpretq_u64_s32): Likewise.
28459 (vreinterpretq_u64_s64): Likewise.
28460 (vreinterpretq_u64_s8): Likewise.
28461 (vreinterpretq_u64_u16): Likewise.
28462 (vreinterpretq_u64_u32): Likewise.
28463 (vreinterpretq_u64_u8): Likewise.
28464 (vreinterpretq_u8_s16): Likewise.
28465 (vreinterpretq_u8_s32): Likewise.
28466 (vreinterpretq_u8_s64): Likewise.
28467 (vreinterpretq_u8_s8): Likewise.
28468 (vreinterpretq_u8_u16): Likewise.
28469 (vreinterpretq_u8_u32): Likewise.
28470 (vreinterpretq_u8_u64): Likewise.
28471 (vreinterpretq_s32_f16): Likewise.
28472 (vreinterpretq_s32_f32): Likewise.
28473 (vreinterpretq_u16_f16): Likewise.
28474 (vreinterpretq_u16_f32): Likewise.
28475 (vreinterpretq_u32_f16): Likewise.
28476 (vreinterpretq_u32_f32): Likewise.
28477 (vreinterpretq_u64_f16): Likewise.
28478 (vreinterpretq_u64_f32): Likewise.
28479 (vreinterpretq_u8_f16): Likewise.
28480 (vreinterpretq_u8_f32): Likewise.
28481 (vreinterpretq_f16_f32): Likewise.
28482 (vreinterpretq_f16_s16): Likewise.
28483 (vreinterpretq_f16_s32): Likewise.
28484 (vreinterpretq_f16_s64): Likewise.
28485 (vreinterpretq_f16_s8): Likewise.
28486 (vreinterpretq_f16_u16): Likewise.
28487 (vreinterpretq_f16_u32): Likewise.
28488 (vreinterpretq_f16_u64): Likewise.
28489 (vreinterpretq_f16_u8): Likewise.
28490 (vreinterpretq_f32_f16): Likewise.
28491 (vreinterpretq_f32_s16): Likewise.
28492 (vreinterpretq_f32_s32): Likewise.
28493 (vreinterpretq_f32_s64): Likewise.
28494 (vreinterpretq_f32_s8): Likewise.
28495 (vreinterpretq_f32_u16): Likewise.
28496 (vreinterpretq_f32_u32): Likewise.
28497 (vreinterpretq_f32_u64): Likewise.
28498 (vreinterpretq_f32_u8): Likewise.
28499 (vreinterpretq_s16_f16): Likewise.
28500 (vreinterpretq_s16_f32): Likewise.
28501 (vreinterpretq_s64_f16): Likewise.
28502 (vreinterpretq_s64_f32): Likewise.
28503 (vreinterpretq_s8_f16): Likewise.
28504 (vreinterpretq_s8_f32): Likewise.
28505 (__arm_vreinterpretq_f16): Likewise.
28506 (__arm_vreinterpretq_f32): Likewise.
28507 (__arm_vreinterpretq_s16): Likewise.
28508 (__arm_vreinterpretq_s32): Likewise.
28509 (__arm_vreinterpretq_s64): Likewise.
28510 (__arm_vreinterpretq_s8): Likewise.
28511 (__arm_vreinterpretq_u16): Likewise.
28512 (__arm_vreinterpretq_u32): Likewise.
28513 (__arm_vreinterpretq_u64): Likewise.
28514 (__arm_vreinterpretq_u8): Likewise.
28515 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
28516 (__arm_vreinterpretq_s16_s64): Likewise.
28517 (__arm_vreinterpretq_s16_s8): Likewise.
28518 (__arm_vreinterpretq_s16_u16): Likewise.
28519 (__arm_vreinterpretq_s16_u32): Likewise.
28520 (__arm_vreinterpretq_s16_u64): Likewise.
28521 (__arm_vreinterpretq_s16_u8): Likewise.
28522 (__arm_vreinterpretq_s32_s16): Likewise.
28523 (__arm_vreinterpretq_s32_s64): Likewise.
28524 (__arm_vreinterpretq_s32_s8): Likewise.
28525 (__arm_vreinterpretq_s32_u16): Likewise.
28526 (__arm_vreinterpretq_s32_u32): Likewise.
28527 (__arm_vreinterpretq_s32_u64): Likewise.
28528 (__arm_vreinterpretq_s32_u8): Likewise.
28529 (__arm_vreinterpretq_s64_s16): Likewise.
28530 (__arm_vreinterpretq_s64_s32): Likewise.
28531 (__arm_vreinterpretq_s64_s8): Likewise.
28532 (__arm_vreinterpretq_s64_u16): Likewise.
28533 (__arm_vreinterpretq_s64_u32): Likewise.
28534 (__arm_vreinterpretq_s64_u64): Likewise.
28535 (__arm_vreinterpretq_s64_u8): Likewise.
28536 (__arm_vreinterpretq_s8_s16): Likewise.
28537 (__arm_vreinterpretq_s8_s32): Likewise.
28538 (__arm_vreinterpretq_s8_s64): Likewise.
28539 (__arm_vreinterpretq_s8_u16): Likewise.
28540 (__arm_vreinterpretq_s8_u32): Likewise.
28541 (__arm_vreinterpretq_s8_u64): Likewise.
28542 (__arm_vreinterpretq_s8_u8): Likewise.
28543 (__arm_vreinterpretq_u16_s16): Likewise.
28544 (__arm_vreinterpretq_u16_s32): Likewise.
28545 (__arm_vreinterpretq_u16_s64): Likewise.
28546 (__arm_vreinterpretq_u16_s8): Likewise.
28547 (__arm_vreinterpretq_u16_u32): Likewise.
28548 (__arm_vreinterpretq_u16_u64): Likewise.
28549 (__arm_vreinterpretq_u16_u8): Likewise.
28550 (__arm_vreinterpretq_u32_s16): Likewise.
28551 (__arm_vreinterpretq_u32_s32): Likewise.
28552 (__arm_vreinterpretq_u32_s64): Likewise.
28553 (__arm_vreinterpretq_u32_s8): Likewise.
28554 (__arm_vreinterpretq_u32_u16): Likewise.
28555 (__arm_vreinterpretq_u32_u64): Likewise.
28556 (__arm_vreinterpretq_u32_u8): Likewise.
28557 (__arm_vreinterpretq_u64_s16): Likewise.
28558 (__arm_vreinterpretq_u64_s32): Likewise.
28559 (__arm_vreinterpretq_u64_s64): Likewise.
28560 (__arm_vreinterpretq_u64_s8): Likewise.
28561 (__arm_vreinterpretq_u64_u16): Likewise.
28562 (__arm_vreinterpretq_u64_u32): Likewise.
28563 (__arm_vreinterpretq_u64_u8): Likewise.
28564 (__arm_vreinterpretq_u8_s16): Likewise.
28565 (__arm_vreinterpretq_u8_s32): Likewise.
28566 (__arm_vreinterpretq_u8_s64): Likewise.
28567 (__arm_vreinterpretq_u8_s8): Likewise.
28568 (__arm_vreinterpretq_u8_u16): Likewise.
28569 (__arm_vreinterpretq_u8_u32): Likewise.
28570 (__arm_vreinterpretq_u8_u64): Likewise.
28571 (__arm_vreinterpretq_s32_f16): Likewise.
28572 (__arm_vreinterpretq_s32_f32): Likewise.
28573 (__arm_vreinterpretq_s16_f16): Likewise.
28574 (__arm_vreinterpretq_s16_f32): Likewise.
28575 (__arm_vreinterpretq_s64_f16): Likewise.
28576 (__arm_vreinterpretq_s64_f32): Likewise.
28577 (__arm_vreinterpretq_s8_f16): Likewise.
28578 (__arm_vreinterpretq_s8_f32): Likewise.
28579 (__arm_vreinterpretq_u16_f16): Likewise.
28580 (__arm_vreinterpretq_u16_f32): Likewise.
28581 (__arm_vreinterpretq_u32_f16): Likewise.
28582 (__arm_vreinterpretq_u32_f32): Likewise.
28583 (__arm_vreinterpretq_u64_f16): Likewise.
28584 (__arm_vreinterpretq_u64_f32): Likewise.
28585 (__arm_vreinterpretq_u8_f16): Likewise.
28586 (__arm_vreinterpretq_u8_f32): Likewise.
28587 (__arm_vreinterpretq_f16_f32): Likewise.
28588 (__arm_vreinterpretq_f16_s16): Likewise.
28589 (__arm_vreinterpretq_f16_s32): Likewise.
28590 (__arm_vreinterpretq_f16_s64): Likewise.
28591 (__arm_vreinterpretq_f16_s8): Likewise.
28592 (__arm_vreinterpretq_f16_u16): Likewise.
28593 (__arm_vreinterpretq_f16_u32): Likewise.
28594 (__arm_vreinterpretq_f16_u64): Likewise.
28595 (__arm_vreinterpretq_f16_u8): Likewise.
28596 (__arm_vreinterpretq_f32_f16): Likewise.
28597 (__arm_vreinterpretq_f32_s16): Likewise.
28598 (__arm_vreinterpretq_f32_s32): Likewise.
28599 (__arm_vreinterpretq_f32_s64): Likewise.
28600 (__arm_vreinterpretq_f32_s8): Likewise.
28601 (__arm_vreinterpretq_f32_u16): Likewise.
28602 (__arm_vreinterpretq_f32_u32): Likewise.
28603 (__arm_vreinterpretq_f32_u64): Likewise.
28604 (__arm_vreinterpretq_f32_u8): Likewise.
28605 (__arm_vreinterpretq_s16): Likewise.
28606 (__arm_vreinterpretq_s32): Likewise.
28607 (__arm_vreinterpretq_s64): Likewise.
28608 (__arm_vreinterpretq_s8): Likewise.
28609 (__arm_vreinterpretq_u16): Likewise.
28610 (__arm_vreinterpretq_u32): Likewise.
28611 (__arm_vreinterpretq_u64): Likewise.
28612 (__arm_vreinterpretq_u8): Likewise.
28613 (__arm_vreinterpretq_f16): Likewise.
28614 (__arm_vreinterpretq_f32): Likewise.
28615 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
28616 * config/arm/unspecs.md: (REINTERPRET): New unspec.
28618 2023-05-03 Murray Steele <murray.steele@arm.com>
28619 Christophe Lyon <christophe.lyon@arm.com>
28620 Christophe Lyon <christophe.lyon@arm.com
28622 * config.gcc: Add arm-mve-builtins-base.o and
28623 arm-mve-builtins-shapes.o to extra_objs.
28624 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
28626 (arm_expand_builtin): Likewise
28627 (arm_check_builtin_call): Likewise
28628 (arm_describe_resolver): Likewise.
28629 * config/arm/arm-builtins.h (enum resolver_ident): Add
28631 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
28632 (arm_resolve_overloaded_builtin): Handle MVE builtins.
28633 (arm_register_target_pragmas): Register arm_check_builtin_call.
28634 * config/arm/arm-mve-builtins.cc (class registered_function): New
28636 (struct registered_function_hasher): New struct.
28637 (pred_suffixes): New table.
28638 (mode_suffixes): New table.
28639 (type_suffix_info): New table.
28640 (TYPES_float16): New.
28641 (TYPES_all_float): New.
28642 (TYPES_integer_8): New.
28643 (TYPES_integer_8_16): New.
28644 (TYPES_integer_16_32): New.
28645 (TYPES_integer_32): New.
28646 (TYPES_signed_16_32): New.
28647 (TYPES_signed_32): New.
28648 (TYPES_all_signed): New.
28649 (TYPES_all_unsigned): New.
28650 (TYPES_all_integer): New.
28651 (TYPES_all_integer_with_64): New.
28652 (DEF_VECTOR_TYPE): New.
28653 (DEF_DOUBLE_TYPE): New.
28654 (DEF_MVE_TYPES_ARRAY): New.
28655 (all_integer): New.
28656 (all_integer_with_64): New.
28660 (all_unsigned): New.
28662 (integer_8_16): New.
28663 (integer_16_32): New.
28665 (signed_16_32): New.
28667 (register_vector_type): Use void_type_node for mve.fp-only types when
28668 mve.fp is not enabled.
28669 (register_builtin_tuple_types): Likewise.
28670 (handle_arm_mve_h): New function..
28671 (matches_type_p): Likewise..
28672 (report_out_of_range): Likewise.
28673 (report_not_enum): Likewise.
28674 (report_missing_float): Likewise.
28675 (report_non_ice): Likewise.
28676 (check_requires_float): Likewise.
28677 (function_instance::hash): Likewise
28678 (function_instance::call_properties): Likewise.
28679 (function_instance::reads_global_state_p): Likewise.
28680 (function_instance::modifies_global_state_p): Likewise.
28681 (function_instance::could_trap_p): Likewise.
28682 (function_instance::has_inactive_argument): Likewise.
28683 (registered_function_hasher::hash): Likewise.
28684 (registered_function_hasher::equal): Likewise.
28685 (function_builder::function_builder): Likewise.
28686 (function_builder::~function_builder): Likewise.
28687 (function_builder::append_name): Likewise.
28688 (function_builder::finish_name): Likewise.
28689 (function_builder::get_name): Likewise.
28690 (add_attribute): Likewise.
28691 (function_builder::get_attributes): Likewise.
28692 (function_builder::add_function): Likewise.
28693 (function_builder::add_unique_function): Likewise.
28694 (function_builder::add_overloaded_function): Likewise.
28695 (function_builder::add_overloaded_functions): Likewise.
28696 (function_builder::register_function_group): Likewise.
28697 (function_call_info::function_call_info): Likewise.
28698 (function_resolver::function_resolver): Likewise.
28699 (function_resolver::get_vector_type): Likewise.
28700 (function_resolver::get_scalar_type_name): Likewise.
28701 (function_resolver::get_argument_type): Likewise.
28702 (function_resolver::scalar_argument_p): Likewise.
28703 (function_resolver::report_no_such_form): Likewise.
28704 (function_resolver::lookup_form): Likewise.
28705 (function_resolver::resolve_to): Likewise.
28706 (function_resolver::infer_vector_or_tuple_type): Likewise.
28707 (function_resolver::infer_vector_type): Likewise.
28708 (function_resolver::require_vector_or_scalar_type): Likewise.
28709 (function_resolver::require_vector_type): Likewise.
28710 (function_resolver::require_matching_vector_type): Likewise.
28711 (function_resolver::require_derived_vector_type): Likewise.
28712 (function_resolver::require_derived_scalar_type): Likewise.
28713 (function_resolver::require_integer_immediate): Likewise.
28714 (function_resolver::require_scalar_type): Likewise.
28715 (function_resolver::check_num_arguments): Likewise.
28716 (function_resolver::check_gp_argument): Likewise.
28717 (function_resolver::finish_opt_n_resolution): Likewise.
28718 (function_resolver::resolve_unary): Likewise.
28719 (function_resolver::resolve_unary_n): Likewise.
28720 (function_resolver::resolve_uniform): Likewise.
28721 (function_resolver::resolve_uniform_opt_n): Likewise.
28722 (function_resolver::resolve): Likewise.
28723 (function_checker::function_checker): Likewise.
28724 (function_checker::argument_exists_p): Likewise.
28725 (function_checker::require_immediate): Likewise.
28726 (function_checker::require_immediate_enum): Likewise.
28727 (function_checker::require_immediate_range): Likewise.
28728 (function_checker::check): Likewise.
28729 (gimple_folder::gimple_folder): Likewise.
28730 (gimple_folder::fold): Likewise.
28731 (function_expander::function_expander): Likewise.
28732 (function_expander::direct_optab_handler): Likewise.
28733 (function_expander::get_fallback_value): Likewise.
28734 (function_expander::get_reg_target): Likewise.
28735 (function_expander::add_output_operand): Likewise.
28736 (function_expander::add_input_operand): Likewise.
28737 (function_expander::add_integer_operand): Likewise.
28738 (function_expander::generate_insn): Likewise.
28739 (function_expander::use_exact_insn): Likewise.
28740 (function_expander::use_unpred_insn): Likewise.
28741 (function_expander::use_pred_x_insn): Likewise.
28742 (function_expander::use_cond_insn): Likewise.
28743 (function_expander::map_to_rtx_codes): Likewise.
28744 (function_expander::expand): Likewise.
28745 (resolve_overloaded_builtin): Likewise.
28746 (check_builtin_call): Likewise.
28747 (gimple_fold_builtin): Likewise.
28748 (expand_builtin): Likewise.
28749 (gt_ggc_mx): Likewise.
28750 (gt_pch_nx): Likewise.
28751 (gt_pch_nx): Likewise.
28752 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
28763 (offset): New mode.
28764 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
28765 (CP_READ_FPCR): Likewise.
28766 (CP_RAISE_FP_EXCEPTIONS): Likewise.
28767 (CP_READ_MEMORY): Likewise.
28768 (CP_WRITE_MEMORY): Likewise.
28769 (enum units_index): New enum.
28770 (enum predication_index): New.
28771 (enum type_class_index): New.
28772 (enum mode_suffix_index): New enum.
28773 (enum type_suffix_index): New.
28774 (struct mode_suffix_info): New struct.
28775 (struct type_suffix_info): New.
28776 (struct function_group_info): Likewise.
28777 (class function_instance): Likewise.
28778 (class registered_function): Likewise.
28779 (class function_builder): Likewise.
28780 (class function_call_info): Likewise.
28781 (class function_resolver): Likewise.
28782 (class function_checker): Likewise.
28783 (class gimple_folder): Likewise.
28784 (class function_expander): Likewise.
28785 (get_mve_pred16_t): Likewise.
28786 (find_mode_suffix): New function.
28787 (class function_base): Likewise.
28788 (class function_shape): Likewise.
28789 (function_instance::operator==): New function.
28790 (function_instance::operator!=): Likewise.
28791 (function_instance::vectors_per_tuple): Likewise.
28792 (function_instance::mode_suffix): Likewise.
28793 (function_instance::type_suffix): Likewise.
28794 (function_instance::scalar_type): Likewise.
28795 (function_instance::vector_type): Likewise.
28796 (function_instance::tuple_type): Likewise.
28797 (function_instance::vector_mode): Likewise.
28798 (function_call_info::function_returns_void_p): Likewise.
28799 (function_base::call_properties): Likewise.
28800 * config/arm/arm-protos.h (enum arm_builtin_class): Add
28802 (handle_arm_mve_h): New.
28803 (resolve_overloaded_builtin): New.
28804 (check_builtin_call): New.
28805 (gimple_fold_builtin): New.
28806 (expand_builtin): New.
28807 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
28808 arm_gimple_fold_builtin.
28809 (arm_gimple_fold_builtin): New function.
28810 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
28811 * config/arm/predicates.md (arm_any_register_operand): New predicate.
28812 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
28813 (arm-mve-builtins-shapes.o): New target.
28814 (arm-mve-builtins-base.o): New target.
28815 * config/arm/arm-mve-builtins-base.cc: New file.
28816 * config/arm/arm-mve-builtins-base.def: New file.
28817 * config/arm/arm-mve-builtins-base.h: New file.
28818 * config/arm/arm-mve-builtins-functions.h: New file.
28819 * config/arm/arm-mve-builtins-shapes.cc: New file.
28820 * config/arm/arm-mve-builtins-shapes.h: New file.
28822 2023-05-03 Murray Steele <murray.steele@arm.com>
28823 Christophe Lyon <christophe.lyon@arm.com>
28824 Christophe Lyon <christophe.lyon@arm.com>
28826 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
28828 (arm_init_builtin): Use arm_general_add_builtin_function instead
28829 of arm_add_builtin_function.
28830 (arm_init_acle_builtins): Likewise.
28831 (arm_init_mve_builtins): Likewise.
28832 (arm_init_crypto_builtins): Likewise.
28833 (arm_init_builtins): Likewise.
28834 (arm_general_builtin_decl): New function.
28835 (arm_builtin_decl): Defer to numberspace-specialized functions.
28836 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
28837 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
28838 (arm_general_expand_builtin_1): ... specialize for general builtins.
28839 (arm_expand_acle_builtin): Use arm_general_expand_builtin
28840 instead of arm_expand_builtin.
28841 (arm_expand_mve_builtin): Likewise.
28842 (arm_expand_neon_builtin): Likewise.
28843 (arm_expand_vfp_builtin): Likewise.
28844 (arm_general_expand_builtin): New function.
28845 (arm_expand_builtin): Specialize for general builtins.
28846 (arm_general_check_builtin_call): New function.
28847 (arm_check_builtin_call): Specialize for general builtins.
28848 (arm_describe_resolver): Validate numberspace.
28849 (arm_cde_end_args): Likewise.
28850 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
28851 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
28853 2023-05-03 Martin Liska <mliska@suse.cz>
28856 * config/riscv/sync.md: Add gcc_unreachable to a switch.
28858 2023-05-03 Richard Biener <rguenther@suse.de>
28860 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
28861 (patch_loop_exit): Likewise.
28862 (connect_loops): Likewise.
28863 (split_loop): Likewise.
28864 (control_dep_semi_invariant_p): Likewise.
28865 (do_split_loop_on_cond): Likewise.
28866 (split_loop_on_cond): Likewise.
28867 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
28869 (simplify_loop_version): Likewise.
28870 (evaluate_bbs): Likewise.
28871 (find_loop_guard): Likewise.
28872 (clean_up_after_unswitching): Likewise.
28873 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
28875 (optimize_spaceship): Take a gcond * argument, avoid
28877 (math_opts_dom_walker::after_dom_children): Adjust call to
28878 optimize_spaceship.
28879 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
28880 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
28883 2023-05-03 Andreas Schwab <schwab@suse.de>
28885 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
28887 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28889 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
28891 (class vlseg): New class.
28892 (class vsseg): Ditto.
28893 (class vlsseg): Ditto.
28894 (class vssseg): Ditto.
28895 (class seg_indexed_load): Ditto.
28896 (class seg_indexed_store): Ditto.
28897 (class vlsegff): Ditto.
28899 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
28900 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
28910 * config/riscv/riscv-vector-builtins-shapes.cc (struct
28911 seg_loadstore_def): Ditto.
28912 (struct seg_indexed_loadstore_def): Ditto.
28913 (struct seg_fault_load_def): Ditto.
28915 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
28916 * config/riscv/riscv-vector-builtins.cc
28917 (function_builder::append_nf): New function.
28918 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
28919 Change ptr from double into float.
28920 (vfloat32m1x3_t): Ditto.
28921 (vfloat32m1x4_t): Ditto.
28922 (vfloat32m1x5_t): Ditto.
28923 (vfloat32m1x6_t): Ditto.
28924 (vfloat32m1x7_t): Ditto.
28925 (vfloat32m1x8_t): Ditto.
28926 (vfloat32m2x2_t): Ditto.
28927 (vfloat32m2x3_t): Ditto.
28928 (vfloat32m2x4_t): Ditto.
28929 (vfloat32m4x2_t): Ditto.
28930 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
28931 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
28933 * config/riscv/riscv.md: Add segment instructions.
28934 * config/riscv/vector-iterators.md: Support segment intrinsics.
28935 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
28937 (@pred_unit_strided_store<mode>): Ditto.
28938 (@pred_strided_load<mode>): Ditto.
28939 (@pred_strided_store<mode>): Ditto.
28940 (@pred_fault_load<mode>): Ditto.
28941 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
28942 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
28943 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
28944 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
28945 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
28946 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
28947 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
28948 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
28949 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
28950 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
28951 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
28952 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
28953 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
28954 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
28956 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28958 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
28959 tuple type support.
28961 (floattype): Ditto.
28963 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
28964 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
28966 (vget): Add tuple type vget.
28967 * config/riscv/riscv-vector-builtins-types.def
28968 (DEF_RVV_TUPLE_OPS): New macro.
28969 (vint8mf8x2_t): Ditto.
28970 (vuint8mf8x2_t): Ditto.
28971 (vint8mf8x3_t): Ditto.
28972 (vuint8mf8x3_t): Ditto.
28973 (vint8mf8x4_t): Ditto.
28974 (vuint8mf8x4_t): Ditto.
28975 (vint8mf8x5_t): Ditto.
28976 (vuint8mf8x5_t): Ditto.
28977 (vint8mf8x6_t): Ditto.
28978 (vuint8mf8x6_t): Ditto.
28979 (vint8mf8x7_t): Ditto.
28980 (vuint8mf8x7_t): Ditto.
28981 (vint8mf8x8_t): Ditto.
28982 (vuint8mf8x8_t): Ditto.
28983 (vint8mf4x2_t): Ditto.
28984 (vuint8mf4x2_t): Ditto.
28985 (vint8mf4x3_t): Ditto.
28986 (vuint8mf4x3_t): Ditto.
28987 (vint8mf4x4_t): Ditto.
28988 (vuint8mf4x4_t): Ditto.
28989 (vint8mf4x5_t): Ditto.
28990 (vuint8mf4x5_t): Ditto.
28991 (vint8mf4x6_t): Ditto.
28992 (vuint8mf4x6_t): Ditto.
28993 (vint8mf4x7_t): Ditto.
28994 (vuint8mf4x7_t): Ditto.
28995 (vint8mf4x8_t): Ditto.
28996 (vuint8mf4x8_t): Ditto.
28997 (vint8mf2x2_t): Ditto.
28998 (vuint8mf2x2_t): Ditto.
28999 (vint8mf2x3_t): Ditto.
29000 (vuint8mf2x3_t): Ditto.
29001 (vint8mf2x4_t): Ditto.
29002 (vuint8mf2x4_t): Ditto.
29003 (vint8mf2x5_t): Ditto.
29004 (vuint8mf2x5_t): Ditto.
29005 (vint8mf2x6_t): Ditto.
29006 (vuint8mf2x6_t): Ditto.
29007 (vint8mf2x7_t): Ditto.
29008 (vuint8mf2x7_t): Ditto.
29009 (vint8mf2x8_t): Ditto.
29010 (vuint8mf2x8_t): Ditto.
29011 (vint8m1x2_t): Ditto.
29012 (vuint8m1x2_t): Ditto.
29013 (vint8m1x3_t): Ditto.
29014 (vuint8m1x3_t): Ditto.
29015 (vint8m1x4_t): Ditto.
29016 (vuint8m1x4_t): Ditto.
29017 (vint8m1x5_t): Ditto.
29018 (vuint8m1x5_t): Ditto.
29019 (vint8m1x6_t): Ditto.
29020 (vuint8m1x6_t): Ditto.
29021 (vint8m1x7_t): Ditto.
29022 (vuint8m1x7_t): Ditto.
29023 (vint8m1x8_t): Ditto.
29024 (vuint8m1x8_t): Ditto.
29025 (vint8m2x2_t): Ditto.
29026 (vuint8m2x2_t): Ditto.
29027 (vint8m2x3_t): Ditto.
29028 (vuint8m2x3_t): Ditto.
29029 (vint8m2x4_t): Ditto.
29030 (vuint8m2x4_t): Ditto.
29031 (vint8m4x2_t): Ditto.
29032 (vuint8m4x2_t): Ditto.
29033 (vint16mf4x2_t): Ditto.
29034 (vuint16mf4x2_t): Ditto.
29035 (vint16mf4x3_t): Ditto.
29036 (vuint16mf4x3_t): Ditto.
29037 (vint16mf4x4_t): Ditto.
29038 (vuint16mf4x4_t): Ditto.
29039 (vint16mf4x5_t): Ditto.
29040 (vuint16mf4x5_t): Ditto.
29041 (vint16mf4x6_t): Ditto.
29042 (vuint16mf4x6_t): Ditto.
29043 (vint16mf4x7_t): Ditto.
29044 (vuint16mf4x7_t): Ditto.
29045 (vint16mf4x8_t): Ditto.
29046 (vuint16mf4x8_t): Ditto.
29047 (vint16mf2x2_t): Ditto.
29048 (vuint16mf2x2_t): Ditto.
29049 (vint16mf2x3_t): Ditto.
29050 (vuint16mf2x3_t): Ditto.
29051 (vint16mf2x4_t): Ditto.
29052 (vuint16mf2x4_t): Ditto.
29053 (vint16mf2x5_t): Ditto.
29054 (vuint16mf2x5_t): Ditto.
29055 (vint16mf2x6_t): Ditto.
29056 (vuint16mf2x6_t): Ditto.
29057 (vint16mf2x7_t): Ditto.
29058 (vuint16mf2x7_t): Ditto.
29059 (vint16mf2x8_t): Ditto.
29060 (vuint16mf2x8_t): Ditto.
29061 (vint16m1x2_t): Ditto.
29062 (vuint16m1x2_t): Ditto.
29063 (vint16m1x3_t): Ditto.
29064 (vuint16m1x3_t): Ditto.
29065 (vint16m1x4_t): Ditto.
29066 (vuint16m1x4_t): Ditto.
29067 (vint16m1x5_t): Ditto.
29068 (vuint16m1x5_t): Ditto.
29069 (vint16m1x6_t): Ditto.
29070 (vuint16m1x6_t): Ditto.
29071 (vint16m1x7_t): Ditto.
29072 (vuint16m1x7_t): Ditto.
29073 (vint16m1x8_t): Ditto.
29074 (vuint16m1x8_t): Ditto.
29075 (vint16m2x2_t): Ditto.
29076 (vuint16m2x2_t): Ditto.
29077 (vint16m2x3_t): Ditto.
29078 (vuint16m2x3_t): Ditto.
29079 (vint16m2x4_t): Ditto.
29080 (vuint16m2x4_t): Ditto.
29081 (vint16m4x2_t): Ditto.
29082 (vuint16m4x2_t): Ditto.
29083 (vint32mf2x2_t): Ditto.
29084 (vuint32mf2x2_t): Ditto.
29085 (vint32mf2x3_t): Ditto.
29086 (vuint32mf2x3_t): Ditto.
29087 (vint32mf2x4_t): Ditto.
29088 (vuint32mf2x4_t): Ditto.
29089 (vint32mf2x5_t): Ditto.
29090 (vuint32mf2x5_t): Ditto.
29091 (vint32mf2x6_t): Ditto.
29092 (vuint32mf2x6_t): Ditto.
29093 (vint32mf2x7_t): Ditto.
29094 (vuint32mf2x7_t): Ditto.
29095 (vint32mf2x8_t): Ditto.
29096 (vuint32mf2x8_t): Ditto.
29097 (vint32m1x2_t): Ditto.
29098 (vuint32m1x2_t): Ditto.
29099 (vint32m1x3_t): Ditto.
29100 (vuint32m1x3_t): Ditto.
29101 (vint32m1x4_t): Ditto.
29102 (vuint32m1x4_t): Ditto.
29103 (vint32m1x5_t): Ditto.
29104 (vuint32m1x5_t): Ditto.
29105 (vint32m1x6_t): Ditto.
29106 (vuint32m1x6_t): Ditto.
29107 (vint32m1x7_t): Ditto.
29108 (vuint32m1x7_t): Ditto.
29109 (vint32m1x8_t): Ditto.
29110 (vuint32m1x8_t): Ditto.
29111 (vint32m2x2_t): Ditto.
29112 (vuint32m2x2_t): Ditto.
29113 (vint32m2x3_t): Ditto.
29114 (vuint32m2x3_t): Ditto.
29115 (vint32m2x4_t): Ditto.
29116 (vuint32m2x4_t): Ditto.
29117 (vint32m4x2_t): Ditto.
29118 (vuint32m4x2_t): Ditto.
29119 (vint64m1x2_t): Ditto.
29120 (vuint64m1x2_t): Ditto.
29121 (vint64m1x3_t): Ditto.
29122 (vuint64m1x3_t): Ditto.
29123 (vint64m1x4_t): Ditto.
29124 (vuint64m1x4_t): Ditto.
29125 (vint64m1x5_t): Ditto.
29126 (vuint64m1x5_t): Ditto.
29127 (vint64m1x6_t): Ditto.
29128 (vuint64m1x6_t): Ditto.
29129 (vint64m1x7_t): Ditto.
29130 (vuint64m1x7_t): Ditto.
29131 (vint64m1x8_t): Ditto.
29132 (vuint64m1x8_t): Ditto.
29133 (vint64m2x2_t): Ditto.
29134 (vuint64m2x2_t): Ditto.
29135 (vint64m2x3_t): Ditto.
29136 (vuint64m2x3_t): Ditto.
29137 (vint64m2x4_t): Ditto.
29138 (vuint64m2x4_t): Ditto.
29139 (vint64m4x2_t): Ditto.
29140 (vuint64m4x2_t): Ditto.
29141 (vfloat32mf2x2_t): Ditto.
29142 (vfloat32mf2x3_t): Ditto.
29143 (vfloat32mf2x4_t): Ditto.
29144 (vfloat32mf2x5_t): Ditto.
29145 (vfloat32mf2x6_t): Ditto.
29146 (vfloat32mf2x7_t): Ditto.
29147 (vfloat32mf2x8_t): Ditto.
29148 (vfloat32m1x2_t): Ditto.
29149 (vfloat32m1x3_t): Ditto.
29150 (vfloat32m1x4_t): Ditto.
29151 (vfloat32m1x5_t): Ditto.
29152 (vfloat32m1x6_t): Ditto.
29153 (vfloat32m1x7_t): Ditto.
29154 (vfloat32m1x8_t): Ditto.
29155 (vfloat32m2x2_t): Ditto.
29156 (vfloat32m2x3_t): Ditto.
29157 (vfloat32m2x4_t): Ditto.
29158 (vfloat32m4x2_t): Ditto.
29159 (vfloat64m1x2_t): Ditto.
29160 (vfloat64m1x3_t): Ditto.
29161 (vfloat64m1x4_t): Ditto.
29162 (vfloat64m1x5_t): Ditto.
29163 (vfloat64m1x6_t): Ditto.
29164 (vfloat64m1x7_t): Ditto.
29165 (vfloat64m1x8_t): Ditto.
29166 (vfloat64m2x2_t): Ditto.
29167 (vfloat64m2x3_t): Ditto.
29168 (vfloat64m2x4_t): Ditto.
29169 (vfloat64m4x2_t): Ditto.
29170 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
29172 (DEF_RVV_TYPE_INDEX): Ditto.
29173 (rvv_arg_type_info::get_tuple_subpart_type): New function.
29174 (DEF_RVV_TUPLE_TYPE): New macro.
29175 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
29176 Adapt for tuple vget/vset support.
29177 (vint8mf4_t): Ditto.
29178 (vuint8mf4_t): Ditto.
29179 (vint8mf2_t): Ditto.
29180 (vuint8mf2_t): Ditto.
29181 (vint8m1_t): Ditto.
29182 (vuint8m1_t): Ditto.
29183 (vint8m2_t): Ditto.
29184 (vuint8m2_t): Ditto.
29185 (vint8m4_t): Ditto.
29186 (vuint8m4_t): Ditto.
29187 (vint8m8_t): Ditto.
29188 (vuint8m8_t): Ditto.
29189 (vint16mf4_t): Ditto.
29190 (vuint16mf4_t): Ditto.
29191 (vint16mf2_t): Ditto.
29192 (vuint16mf2_t): Ditto.
29193 (vint16m1_t): Ditto.
29194 (vuint16m1_t): Ditto.
29195 (vint16m2_t): Ditto.
29196 (vuint16m2_t): Ditto.
29197 (vint16m4_t): Ditto.
29198 (vuint16m4_t): Ditto.
29199 (vint16m8_t): Ditto.
29200 (vuint16m8_t): Ditto.
29201 (vint32mf2_t): Ditto.
29202 (vuint32mf2_t): Ditto.
29203 (vint32m1_t): Ditto.
29204 (vuint32m1_t): Ditto.
29205 (vint32m2_t): Ditto.
29206 (vuint32m2_t): Ditto.
29207 (vint32m4_t): Ditto.
29208 (vuint32m4_t): Ditto.
29209 (vint32m8_t): Ditto.
29210 (vuint32m8_t): Ditto.
29211 (vint64m1_t): Ditto.
29212 (vuint64m1_t): Ditto.
29213 (vint64m2_t): Ditto.
29214 (vuint64m2_t): Ditto.
29215 (vint64m4_t): Ditto.
29216 (vuint64m4_t): Ditto.
29217 (vint64m8_t): Ditto.
29218 (vuint64m8_t): Ditto.
29219 (vfloat32mf2_t): Ditto.
29220 (vfloat32m1_t): Ditto.
29221 (vfloat32m2_t): Ditto.
29222 (vfloat32m4_t): Ditto.
29223 (vfloat32m8_t): Ditto.
29224 (vfloat64m1_t): Ditto.
29225 (vfloat64m2_t): Ditto.
29226 (vfloat64m4_t): Ditto.
29227 (vfloat64m8_t): Ditto.
29228 (tuple_subpart): Add tuple subpart base type.
29229 * config/riscv/riscv-vector-builtins.h (struct
29230 rvv_arg_type_info): Ditto.
29231 (tuple_type_field): New function.
29233 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29235 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
29236 (RVV_TUPLE_PARTIAL_MODES): Ditto.
29237 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
29240 (get_subpart_mode): Ditto.
29241 (get_tuple_mode): Ditto.
29242 (expand_tuple_move): Ditto.
29243 * config/riscv/riscv-v.cc (ENTRY): New macro.
29244 (TUPLE_ENTRY): Ditto.
29245 (get_nf): New function.
29246 (get_subpart_mode): Ditto.
29247 (get_tuple_mode): Ditto.
29248 (expand_tuple_move): Ditto.
29249 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
29251 (register_tuple_type): New function
29252 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
29254 (vint8mf8x2_t): New macro.
29255 (vuint8mf8x2_t): Ditto.
29256 (vint8mf8x3_t): Ditto.
29257 (vuint8mf8x3_t): Ditto.
29258 (vint8mf8x4_t): Ditto.
29259 (vuint8mf8x4_t): Ditto.
29260 (vint8mf8x5_t): Ditto.
29261 (vuint8mf8x5_t): Ditto.
29262 (vint8mf8x6_t): Ditto.
29263 (vuint8mf8x6_t): Ditto.
29264 (vint8mf8x7_t): Ditto.
29265 (vuint8mf8x7_t): Ditto.
29266 (vint8mf8x8_t): Ditto.
29267 (vuint8mf8x8_t): Ditto.
29268 (vint8mf4x2_t): Ditto.
29269 (vuint8mf4x2_t): Ditto.
29270 (vint8mf4x3_t): Ditto.
29271 (vuint8mf4x3_t): Ditto.
29272 (vint8mf4x4_t): Ditto.
29273 (vuint8mf4x4_t): Ditto.
29274 (vint8mf4x5_t): Ditto.
29275 (vuint8mf4x5_t): Ditto.
29276 (vint8mf4x6_t): Ditto.
29277 (vuint8mf4x6_t): Ditto.
29278 (vint8mf4x7_t): Ditto.
29279 (vuint8mf4x7_t): Ditto.
29280 (vint8mf4x8_t): Ditto.
29281 (vuint8mf4x8_t): Ditto.
29282 (vint8mf2x2_t): Ditto.
29283 (vuint8mf2x2_t): Ditto.
29284 (vint8mf2x3_t): Ditto.
29285 (vuint8mf2x3_t): Ditto.
29286 (vint8mf2x4_t): Ditto.
29287 (vuint8mf2x4_t): Ditto.
29288 (vint8mf2x5_t): Ditto.
29289 (vuint8mf2x5_t): Ditto.
29290 (vint8mf2x6_t): Ditto.
29291 (vuint8mf2x6_t): Ditto.
29292 (vint8mf2x7_t): Ditto.
29293 (vuint8mf2x7_t): Ditto.
29294 (vint8mf2x8_t): Ditto.
29295 (vuint8mf2x8_t): Ditto.
29296 (vint8m1x2_t): Ditto.
29297 (vuint8m1x2_t): Ditto.
29298 (vint8m1x3_t): Ditto.
29299 (vuint8m1x3_t): Ditto.
29300 (vint8m1x4_t): Ditto.
29301 (vuint8m1x4_t): Ditto.
29302 (vint8m1x5_t): Ditto.
29303 (vuint8m1x5_t): Ditto.
29304 (vint8m1x6_t): Ditto.
29305 (vuint8m1x6_t): Ditto.
29306 (vint8m1x7_t): Ditto.
29307 (vuint8m1x7_t): Ditto.
29308 (vint8m1x8_t): Ditto.
29309 (vuint8m1x8_t): Ditto.
29310 (vint8m2x2_t): Ditto.
29311 (vuint8m2x2_t): Ditto.
29312 (vint8m2x3_t): Ditto.
29313 (vuint8m2x3_t): Ditto.
29314 (vint8m2x4_t): Ditto.
29315 (vuint8m2x4_t): Ditto.
29316 (vint8m4x2_t): Ditto.
29317 (vuint8m4x2_t): Ditto.
29318 (vint16mf4x2_t): Ditto.
29319 (vuint16mf4x2_t): Ditto.
29320 (vint16mf4x3_t): Ditto.
29321 (vuint16mf4x3_t): Ditto.
29322 (vint16mf4x4_t): Ditto.
29323 (vuint16mf4x4_t): Ditto.
29324 (vint16mf4x5_t): Ditto.
29325 (vuint16mf4x5_t): Ditto.
29326 (vint16mf4x6_t): Ditto.
29327 (vuint16mf4x6_t): Ditto.
29328 (vint16mf4x7_t): Ditto.
29329 (vuint16mf4x7_t): Ditto.
29330 (vint16mf4x8_t): Ditto.
29331 (vuint16mf4x8_t): Ditto.
29332 (vint16mf2x2_t): Ditto.
29333 (vuint16mf2x2_t): Ditto.
29334 (vint16mf2x3_t): Ditto.
29335 (vuint16mf2x3_t): Ditto.
29336 (vint16mf2x4_t): Ditto.
29337 (vuint16mf2x4_t): Ditto.
29338 (vint16mf2x5_t): Ditto.
29339 (vuint16mf2x5_t): Ditto.
29340 (vint16mf2x6_t): Ditto.
29341 (vuint16mf2x6_t): Ditto.
29342 (vint16mf2x7_t): Ditto.
29343 (vuint16mf2x7_t): Ditto.
29344 (vint16mf2x8_t): Ditto.
29345 (vuint16mf2x8_t): Ditto.
29346 (vint16m1x2_t): Ditto.
29347 (vuint16m1x2_t): Ditto.
29348 (vint16m1x3_t): Ditto.
29349 (vuint16m1x3_t): Ditto.
29350 (vint16m1x4_t): Ditto.
29351 (vuint16m1x4_t): Ditto.
29352 (vint16m1x5_t): Ditto.
29353 (vuint16m1x5_t): Ditto.
29354 (vint16m1x6_t): Ditto.
29355 (vuint16m1x6_t): Ditto.
29356 (vint16m1x7_t): Ditto.
29357 (vuint16m1x7_t): Ditto.
29358 (vint16m1x8_t): Ditto.
29359 (vuint16m1x8_t): Ditto.
29360 (vint16m2x2_t): Ditto.
29361 (vuint16m2x2_t): Ditto.
29362 (vint16m2x3_t): Ditto.
29363 (vuint16m2x3_t): Ditto.
29364 (vint16m2x4_t): Ditto.
29365 (vuint16m2x4_t): Ditto.
29366 (vint16m4x2_t): Ditto.
29367 (vuint16m4x2_t): Ditto.
29368 (vint32mf2x2_t): Ditto.
29369 (vuint32mf2x2_t): Ditto.
29370 (vint32mf2x3_t): Ditto.
29371 (vuint32mf2x3_t): Ditto.
29372 (vint32mf2x4_t): Ditto.
29373 (vuint32mf2x4_t): Ditto.
29374 (vint32mf2x5_t): Ditto.
29375 (vuint32mf2x5_t): Ditto.
29376 (vint32mf2x6_t): Ditto.
29377 (vuint32mf2x6_t): Ditto.
29378 (vint32mf2x7_t): Ditto.
29379 (vuint32mf2x7_t): Ditto.
29380 (vint32mf2x8_t): Ditto.
29381 (vuint32mf2x8_t): Ditto.
29382 (vint32m1x2_t): Ditto.
29383 (vuint32m1x2_t): Ditto.
29384 (vint32m1x3_t): Ditto.
29385 (vuint32m1x3_t): Ditto.
29386 (vint32m1x4_t): Ditto.
29387 (vuint32m1x4_t): Ditto.
29388 (vint32m1x5_t): Ditto.
29389 (vuint32m1x5_t): Ditto.
29390 (vint32m1x6_t): Ditto.
29391 (vuint32m1x6_t): Ditto.
29392 (vint32m1x7_t): Ditto.
29393 (vuint32m1x7_t): Ditto.
29394 (vint32m1x8_t): Ditto.
29395 (vuint32m1x8_t): Ditto.
29396 (vint32m2x2_t): Ditto.
29397 (vuint32m2x2_t): Ditto.
29398 (vint32m2x3_t): Ditto.
29399 (vuint32m2x3_t): Ditto.
29400 (vint32m2x4_t): Ditto.
29401 (vuint32m2x4_t): Ditto.
29402 (vint32m4x2_t): Ditto.
29403 (vuint32m4x2_t): Ditto.
29404 (vint64m1x2_t): Ditto.
29405 (vuint64m1x2_t): Ditto.
29406 (vint64m1x3_t): Ditto.
29407 (vuint64m1x3_t): Ditto.
29408 (vint64m1x4_t): Ditto.
29409 (vuint64m1x4_t): Ditto.
29410 (vint64m1x5_t): Ditto.
29411 (vuint64m1x5_t): Ditto.
29412 (vint64m1x6_t): Ditto.
29413 (vuint64m1x6_t): Ditto.
29414 (vint64m1x7_t): Ditto.
29415 (vuint64m1x7_t): Ditto.
29416 (vint64m1x8_t): Ditto.
29417 (vuint64m1x8_t): Ditto.
29418 (vint64m2x2_t): Ditto.
29419 (vuint64m2x2_t): Ditto.
29420 (vint64m2x3_t): Ditto.
29421 (vuint64m2x3_t): Ditto.
29422 (vint64m2x4_t): Ditto.
29423 (vuint64m2x4_t): Ditto.
29424 (vint64m4x2_t): Ditto.
29425 (vuint64m4x2_t): Ditto.
29426 (vfloat32mf2x2_t): Ditto.
29427 (vfloat32mf2x3_t): Ditto.
29428 (vfloat32mf2x4_t): Ditto.
29429 (vfloat32mf2x5_t): Ditto.
29430 (vfloat32mf2x6_t): Ditto.
29431 (vfloat32mf2x7_t): Ditto.
29432 (vfloat32mf2x8_t): Ditto.
29433 (vfloat32m1x2_t): Ditto.
29434 (vfloat32m1x3_t): Ditto.
29435 (vfloat32m1x4_t): Ditto.
29436 (vfloat32m1x5_t): Ditto.
29437 (vfloat32m1x6_t): Ditto.
29438 (vfloat32m1x7_t): Ditto.
29439 (vfloat32m1x8_t): Ditto.
29440 (vfloat32m2x2_t): Ditto.
29441 (vfloat32m2x3_t): Ditto.
29442 (vfloat32m2x4_t): Ditto.
29443 (vfloat32m4x2_t): Ditto.
29444 (vfloat64m1x2_t): Ditto.
29445 (vfloat64m1x3_t): Ditto.
29446 (vfloat64m1x4_t): Ditto.
29447 (vfloat64m1x5_t): Ditto.
29448 (vfloat64m1x6_t): Ditto.
29449 (vfloat64m1x7_t): Ditto.
29450 (vfloat64m1x8_t): Ditto.
29451 (vfloat64m2x2_t): Ditto.
29452 (vfloat64m2x3_t): Ditto.
29453 (vfloat64m2x4_t): Ditto.
29454 (vfloat64m4x2_t): Ditto.
29455 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
29457 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
29458 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
29460 (TUPLE_ENTRY): Ditto.
29461 (riscv_v_ext_mode_p): New function.
29462 (riscv_v_adjust_nunits): Add tuple mode adjustment.
29463 (riscv_classify_address): Ditto.
29464 (riscv_binary_cost): Ditto.
29465 (riscv_rtx_costs): Ditto.
29466 (riscv_secondary_memory_needed): Ditto.
29467 (riscv_hard_regno_nregs): Ditto.
29468 (riscv_hard_regno_mode_ok): Ditto.
29469 (riscv_vector_mode_supported_p): Ditto.
29470 (riscv_regmode_natural_size): Ditto.
29471 (riscv_array_mode): New function.
29472 (TARGET_ARRAY_MODE): New target hook.
29473 * config/riscv/riscv.md: Add tuple modes.
29474 * config/riscv/vector-iterators.md: Ditto.
29475 * config/riscv/vector.md (mov<mode>): Add tuple modes data
29477 (*mov<VT:mode>_<P:mode>): Ditto.
29479 2023-05-03 Richard Biener <rguenther@suse.de>
29481 * cse.cc (cse_insn): Track an equivalence to the destination
29482 separately and delay using src_related for it.
29484 2023-05-03 Richard Biener <rguenther@suse.de>
29486 * cse.cc (HASH): Turn into inline function and mix
29487 in another HASH_SHIFT bits.
29488 (SAFE_HASH): Likewise.
29490 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29493 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
29494 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
29496 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29499 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
29500 (add<mode>3<vczle><vczbe>): ... This.
29501 (sub<mode>3): Rename to...
29502 (sub<mode>3<vczle><vczbe>): ... This.
29503 (mul<mode>3): Rename to...
29504 (mul<mode>3<vczle><vczbe>): ... This.
29505 (*div<mode>3): Rename to...
29506 (*div<mode>3<vczle><vczbe>): ... This.
29507 (neg<mode>2): Rename to...
29508 (neg<mode>2<vczle><vczbe>): ... This.
29509 (abs<mode>2): Rename to...
29510 (abs<mode>2<vczle><vczbe>): ... This.
29511 (<frint_pattern><mode>2): Rename to...
29512 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
29513 (<fmaxmin><mode>3): Rename to...
29514 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
29515 (*sqrt<mode>2): Rename to...
29516 (*sqrt<mode>2<vczle><vczbe>): ... This.
29518 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
29520 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
29522 2023-05-03 Martin Liska <mliska@suse.cz>
29524 PR tree-optimization/109693
29525 * value-range-storage.cc (vrange_allocator::vrange_allocator):
29526 Remove unused field.
29527 * value-range-storage.h: Likewise.
29529 2023-05-02 Andrew Pinski <apinski@marvell.com>
29531 * tree-ssa-phiopt.cc (move_stmt): New function.
29532 (match_simplify_replacement): Use move_stmt instead
29533 of the inlined version.
29535 2023-05-02 Andrew Pinski <apinski@marvell.com>
29537 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
29540 2023-05-02 Andrew Pinski <apinski@marvell.com>
29542 PR tree-optimization/109702
29543 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
29544 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
29546 2023-05-02 Andrew Pinski <apinski@marvell.com>
29549 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
29550 insn_and_split pattern.
29552 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29554 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
29557 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29559 * config/riscv/sync.md (mem_thread_fence_1): Change fence
29560 depending on the given memory model.
29562 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29564 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
29565 riscv_union_memmodels function to sync.md.
29566 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
29567 get the union of two memmodels in sync.md.
29568 (riscv_print_operand): Add %I and %J flags that output the
29569 optimal LR/SC flag bits for a given memory model.
29570 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
29571 bits on SC op and replace with optimized %I, %J flags.
29573 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29575 * config/riscv/riscv.cc
29576 (riscv_memmodel_needs_amo_release): Change function name.
29577 (riscv_print_operand): Remove unneeded %F case.
29578 * config/riscv/sync.md: Remove unneeded fences.
29580 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29583 * config/riscv/sync.md (atomic_store<mode>): Use simple store
29584 instruction in combination with fence(s).
29586 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29588 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
29589 of %A to include release bits.
29591 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29593 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
29594 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
29597 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29599 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
29600 sequentially consistent LR.aqrl/SC.rl pairs.
29602 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
29604 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
29605 sanitize memmodel input with memmodel_base.
29607 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
29608 Pan Li <pan2.li@intel.com>
29611 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
29613 2023-05-02 Romain Naour <romain.naour@gmail.com>
29615 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
29618 2023-05-02 Martin Liska <mliska@suse.cz>
29620 * doc/invoke.texi: Update documentation based on param.opt file.
29622 2023-05-02 Richard Biener <rguenther@suse.de>
29624 PR tree-optimization/109672
29625 * tree-vect-stmts.cc (vectorizable_operation): For plus,
29626 minus and negate always check the vector mode is word mode.
29628 2023-05-01 Andrew Pinski <apinski@marvell.com>
29630 * tree-ssa-phiopt.cc: Update comment about
29631 how the transformation are implemented.
29633 2023-05-01 Jeff Law <jlaw@ventanamicro>
29635 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
29637 2023-05-01 Jeff Law <jlaw@ventanamicro>
29639 * config/cris/cris.cc (TARGET_LRA_P): Remove.
29640 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
29641 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
29642 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
29643 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
29644 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
29646 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
29648 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
29649 * print-tree.cc (print_decl_identifier): Implement it.
29650 * toplev.cc (output_stack_usage_1): Use it.
29652 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29654 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
29657 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29659 * value-range.h (irange::set_nonzero): Inline.
29661 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29663 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
29665 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
29666 invalid_range, as it is an inverse range.
29667 * tree-vrp.cc (find_case_label_range): Avoid trees.
29668 * value-range.cc (irange::irange_set): Delete.
29669 (irange::irange_set_1bit_anti_range): Delete.
29670 (irange::irange_set_anti_range): Delete.
29671 (irange::set): Cleanup.
29672 * value-range.h (class irange): Remove irange_set,
29673 irange_set_anti_range, irange_set_1bit_anti_range.
29674 (irange::set_undefined): Remove set to m_type.
29676 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29678 * range-op.cc (update_known_bitmask): Adjust for irange containing
29679 wide_ints internally.
29680 * tree-ssanames.cc (set_nonzero_bits): Same.
29681 * tree-ssanames.h (set_nonzero_bits): Same.
29682 * value-range-storage.cc (irange_storage::set_irange): Same.
29683 (irange_storage::get_irange): Same.
29684 * value-range.cc (irange::operator=): Same.
29685 (irange::irange_set): Same.
29686 (irange::irange_set_1bit_anti_range): Same.
29687 (irange::irange_set_anti_range): Same.
29688 (irange::set): Same.
29689 (irange::verify_range): Same.
29690 (irange::contains_p): Same.
29691 (irange::irange_single_pair_union): Same.
29692 (irange::union_): Same.
29693 (irange::irange_contains_p): Same.
29694 (irange::intersect): Same.
29695 (irange::invert): Same.
29696 (irange::set_range_from_nonzero_bits): Same.
29697 (irange::set_nonzero_bits): Same.
29698 (mask_to_wi): Same.
29699 (irange::intersect_nonzero_bits): Same.
29700 (irange::union_nonzero_bits): Same.
29703 (tree_range): Same.
29704 (range_tests_strict_enum): Same.
29705 (range_tests_misc): Same.
29706 (range_tests_nonzero_bits): Same.
29707 * value-range.h (irange::type): Same.
29708 (irange::varying_compatible_p): Same.
29709 (irange::irange): Same.
29710 (int_range::int_range): Same.
29711 (irange::set_undefined): Same.
29712 (irange::set_varying): Same.
29713 (irange::lower_bound): Same.
29714 (irange::upper_bound): Same.
29716 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29718 * gimple-range-fold.cc (tree_lower_bound): Delete.
29719 (tree_upper_bound): Delete.
29720 (vrp_val_max): Delete.
29721 (vrp_val_min): Delete.
29722 (fold_using_range::range_of_ssa_name_with_loop_info): Call
29723 range_of_var_in_loop.
29724 * vr-values.cc (valid_value_p): Delete.
29725 (fix_overflow): Delete.
29726 (get_scev_info): New.
29727 (bounds_of_var_in_loop): Refactor into...
29728 (induction_variable_may_overflow_p): ...this,
29729 (range_from_loop_direction): ...and this,
29730 (range_of_var_in_loop): ...and this.
29731 * vr-values.h (bounds_of_var_in_loop): Delete.
29732 (range_of_var_in_loop): New.
29734 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29736 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
29738 (vrp_val_max): New.
29739 (vrp_val_min): New.
29740 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
29741 * range-op.cc (max_limit): Same.
29743 (plus_minus_ranges): Same.
29744 (operator_rshift::op1_range): Same.
29745 (operator_cast::inside_domain_p): Same.
29746 * value-range.cc (vrp_val_is_max): Delete.
29747 (vrp_val_is_min): Delete.
29748 (range_tests_misc): Use irange_val_*.
29749 * value-range.h (vrp_val_is_min): Delete.
29750 (vrp_val_is_max): Delete.
29751 (vrp_val_max): Delete.
29752 (irange_val_min): New.
29753 (vrp_val_min): Delete.
29754 (irange_val_max): New.
29755 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
29757 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29759 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
29760 * gimple-fold.cc (size_must_be_zero_p): Same.
29761 * gimple-loop-versioning.cc
29762 (loop_versioning::prune_loop_conditions): Same.
29763 * gimple-range-edge.cc (gcond_edge_range): Same.
29764 (gimple_outgoing_range::calc_switch_ranges): Same.
29765 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
29766 (adjust_realpart_expr): Same.
29767 (fold_using_range::range_of_address): Same.
29768 (fold_using_range::relation_fold_and_or): Same.
29769 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
29770 (range_is_either_true_or_false): Same.
29771 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
29772 (cfn_clz::fold_range): Same.
29773 (cfn_ctz::fold_range): Same.
29774 * gimple-range-tests.cc (class test_expr_eval): Same.
29775 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
29776 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
29777 (propagate_vr_across_jump_function): Same.
29778 (decide_whether_version_node): Same.
29779 * ipa-prop.cc (ipa_get_value_range): Same.
29780 * ipa-prop.h (ipa_range_set_and_normalize): Same.
29781 * range-op.cc (get_shift_range): Same.
29782 (value_range_from_overflowed_bounds): Same.
29783 (value_range_with_overflow): Same.
29784 (create_possibly_reversed_range): Same.
29785 (equal_op1_op2_relation): Same.
29786 (not_equal_op1_op2_relation): Same.
29787 (lt_op1_op2_relation): Same.
29788 (le_op1_op2_relation): Same.
29789 (gt_op1_op2_relation): Same.
29790 (ge_op1_op2_relation): Same.
29791 (operator_mult::op1_range): Same.
29792 (operator_exact_divide::op1_range): Same.
29793 (operator_lshift::op1_range): Same.
29794 (operator_rshift::op1_range): Same.
29795 (operator_cast::op1_range): Same.
29796 (operator_logical_and::fold_range): Same.
29797 (set_nonzero_range_from_mask): Same.
29798 (operator_bitwise_or::op1_range): Same.
29799 (operator_bitwise_xor::op1_range): Same.
29800 (operator_addr_expr::fold_range): Same.
29801 (pointer_plus_operator::wi_fold): Same.
29802 (pointer_or_operator::op1_range): Same.
29809 (range_op_cast_tests): Same.
29810 (range_op_lshift_tests): Same.
29811 (range_op_rshift_tests): Same.
29812 (range_op_bitwise_and_tests): Same.
29813 (range_relational_tests): Same.
29814 * range.cc (range_zero): Same.
29815 (range_nonzero): Same.
29816 * range.h (range_true): Same.
29817 (range_false): Same.
29818 (range_true_and_false): Same.
29819 * tree-data-ref.cc (split_constant_offset_1): Same.
29820 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
29821 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
29822 (find_unswitching_predicates_for_bb): Same.
29823 * tree-ssa-phiopt.cc (value_replacement): Same.
29824 * tree-ssa-threadbackward.cc
29825 (back_threader::find_taken_edge_cond): Same.
29826 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
29827 * tree-vrp.cc (find_case_label_range): Same.
29828 * value-query.cc (range_query::get_tree_range): Same.
29829 * value-range.cc (irange::set_nonnegative): Same.
29830 (frange::contains_p): Same.
29831 (frange::singleton_p): Same.
29832 (frange::internal_singleton_p): Same.
29833 (irange::irange_set): Same.
29834 (irange::irange_set_1bit_anti_range): Same.
29835 (irange::irange_set_anti_range): Same.
29836 (irange::set): Same.
29837 (irange::operator==): Same.
29838 (irange::singleton_p): Same.
29839 (irange::contains_p): Same.
29840 (irange::set_range_from_nonzero_bits): Same.
29841 (DEFINE_INT_RANGE_INSTANCE): Same.
29851 (range_uint128): New.
29852 (range_uchar): New.
29854 (build_range3): Convert to irange wide_int API.
29855 (range_tests_irange3): Same.
29856 (range_tests_int_range_max): Same.
29857 (range_tests_strict_enum): Same.
29858 (range_tests_misc): Same.
29859 (range_tests_nonzero_bits): Same.
29860 (range_tests_nan): Same.
29861 (range_tests_signed_zeros): Same.
29862 * value-range.h (Value_Range::Value_Range): Same.
29863 (irange::set): Same.
29864 (irange::nonzero_p): Same.
29865 (irange::contains_p): Same.
29866 (range_includes_zero_p): Same.
29867 (irange::set_nonzero): Same.
29868 (irange::set_zero): Same.
29869 (contains_zero_p): Same.
29870 (frange::contains_p): Same.
29872 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
29873 (bounds_of_var_in_loop): Same.
29874 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
29876 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29878 * value-range.cc (irange::irange_union): Rename to...
29879 (irange::union_): ...this.
29880 (irange::irange_intersect): Rename to...
29881 (irange::intersect): ...this.
29882 * value-range.h (irange::union_): Delete.
29883 (irange::intersect): Delete.
29885 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29887 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
29889 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29891 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
29893 (compare_ranges): Delete.
29894 (compare_range_with_value): Delete.
29895 (bounds_of_var_in_loop): Tidy up by using ranger API.
29896 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
29897 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
29898 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
29899 strict_overflow_p and only_ranges.
29900 (simplify_using_ranges::legacy_fold_cond): Adjust call to
29901 legacy_fold_cond_overflow.
29902 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
29904 (range_fits_type_p): Rename value_range to irange.
29905 * vr-values.h (range_fits_type_p): Adjust prototype.
29907 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29909 * value-range.cc (irange::irange_set_anti_range): Remove uses of
29910 tree_lower_bound and tree_upper_bound.
29911 (irange::verify_range): Same.
29912 (irange::operator==): Same.
29913 (irange::singleton_p): Same.
29914 * value-range.h (irange::tree_lower_bound): Delete.
29915 (irange::tree_upper_bound): Delete.
29916 (irange::lower_bound): Delete.
29917 (irange::upper_bound): Delete.
29918 (irange::zero_p): Remove uses of tree_lower_bound and
29921 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29923 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
29925 (determine_value_range): Same.
29926 (record_nonwrapping_iv): Same.
29927 (infer_loop_bounds_from_signedness): Same.
29928 (scev_var_range_cant_overflow): Same.
29929 * tree-vrp.cc (operand_less_p): Delete.
29930 * tree-vrp.h (operand_less_p): Delete.
29931 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
29932 (irange::value_inside_range): Delete.
29933 * value-range.h (vrange::kind): Delete.
29934 (irange::num_pairs): Remove check of m_kind.
29935 (irange::min): Delete.
29936 (irange::max): Delete.
29938 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
29940 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
29941 for vrange_storage.
29942 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
29943 (sbr_vector::grow): Same.
29944 (sbr_vector::set_bb_range): Same.
29945 (sbr_vector::get_bb_range): Same.
29946 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
29947 (sbr_sparse_bitmap::set_bb_range): Same.
29948 (sbr_sparse_bitmap::get_bb_range): Same.
29949 (block_range_cache::block_range_cache): Same.
29950 (ssa_global_cache::ssa_global_cache): Same.
29951 (ssa_global_cache::get_global_range): Same.
29952 (ssa_global_cache::set_global_range): Same.
29953 * gimple-range-cache.h: Same.
29954 * gimple-range-edge.cc
29955 (gimple_outgoing_range::gimple_outgoing_range): Same.
29956 (gimple_outgoing_range::switch_edge_range): Same.
29957 (gimple_outgoing_range::calc_switch_ranges): Same.
29958 * gimple-range-edge.h: Same.
29959 * gimple-range-infer.cc
29960 (infer_range_manager::infer_range_manager): Same.
29961 (infer_range_manager::get_nonzero): Same.
29962 (infer_range_manager::maybe_adjust_range): Same.
29963 (infer_range_manager::add_range): Same.
29964 * gimple-range-infer.h: Rename obstack_vrange_allocator to
29966 * tree-core.h (struct irange_storage_slot): Remove.
29967 (struct tree_ssa_name): Remove irange_info and frange_info. Make
29968 range_info a pointer to vrange_storage.
29969 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
29970 (range_info_alloc): Same.
29971 (range_info_free): Same.
29972 (range_info_get_range): Same.
29973 (range_info_set_range): Same.
29974 (get_nonzero_bits): Same.
29975 * value-query.cc (get_ssa_name_range_info): Same.
29976 * value-range-storage.cc (class vrange_internal_alloc): New.
29977 (class vrange_obstack_alloc): New.
29978 (class vrange_ggc_alloc): New.
29979 (vrange_allocator::vrange_allocator): New.
29980 (vrange_allocator::~vrange_allocator): New.
29981 (vrange_storage::alloc_slot): New.
29982 (vrange_allocator::alloc): New.
29983 (vrange_allocator::free): New.
29984 (vrange_allocator::clone): New.
29985 (vrange_allocator::clone_varying): New.
29986 (vrange_allocator::clone_undefined): New.
29987 (vrange_storage::alloc): New.
29988 (vrange_storage::set_vrange): Remove slot argument.
29989 (vrange_storage::get_vrange): Same.
29990 (vrange_storage::fits_p): Same.
29991 (vrange_storage::equal_p): New.
29992 (irange_storage::write_lengths_address): New.
29993 (irange_storage::lengths_address): New.
29994 (irange_storage_slot::alloc_slot): Remove.
29995 (irange_storage::alloc): New.
29996 (irange_storage_slot::irange_storage_slot): Remove.
29997 (irange_storage::irange_storage): New.
29998 (write_wide_int): New.
29999 (irange_storage_slot::set_irange): Remove.
30000 (irange_storage::set_irange): New.
30001 (read_wide_int): New.
30002 (irange_storage_slot::get_irange): Remove.
30003 (irange_storage::get_irange): New.
30004 (irange_storage_slot::size): Remove.
30005 (irange_storage::equal_p): New.
30006 (irange_storage_slot::num_wide_ints_needed): Remove.
30007 (irange_storage::size): New.
30008 (irange_storage_slot::fits_p): Remove.
30009 (irange_storage::fits_p): New.
30010 (irange_storage_slot::dump): Remove.
30011 (irange_storage::dump): New.
30012 (frange_storage_slot::alloc_slot): Remove.
30013 (frange_storage::alloc): New.
30014 (frange_storage_slot::set_frange): Remove.
30015 (frange_storage::set_frange): New.
30016 (frange_storage_slot::get_frange): Remove.
30017 (frange_storage::get_frange): New.
30018 (frange_storage_slot::fits_p): Remove.
30019 (frange_storage::equal_p): New.
30020 (frange_storage::fits_p): New.
30021 (ggc_vrange_allocator): New.
30022 (ggc_alloc_vrange_storage): New.
30023 * value-range-storage.h (class vrange_storage): Rewrite.
30024 (class irange_storage): Rewrite.
30025 (class frange_storage): Rewrite.
30026 (class obstack_vrange_allocator): Remove.
30027 (class ggc_vrange_allocator): Remove.
30028 (vrange_allocator::alloc_vrange): Remove.
30029 (vrange_allocator::alloc_irange): Remove.
30030 (vrange_allocator::alloc_frange): Remove.
30031 (ggc_alloc_vrange_storage): New.
30032 * value-range.h (class irange): Rename vrange_allocator to
30034 (class frange): Same.
30036 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
30038 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
30039 inc to avoid clobbering the carry flag.
30041 2023-04-30 Andrew Pinski <apinski@marvell.com>
30043 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
30044 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30046 2023-04-30 Andrew Pinski <apinski@marvell.com>
30048 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
30049 Allow some builtin/internal function calls which
30050 are known not to trap/throw.
30051 (phiopt_worker::match_simplify_replacement):
30052 Use name instead of getting the lhs again.
30054 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
30056 * configure: Regenerate.
30057 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
30059 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
30061 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
30062 emit_insn_if_valid_for_reload.
30063 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
30064 to be recognized, also try emitting a parallel that clobbers
30065 TARGET_FLAGS_REGNUM, as applicable.
30067 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30069 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
30071 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
30072 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
30074 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30076 * config/stormy16/stormy16.md (any_lshift): New code iterator.
30077 (any_or_plus): Likewise.
30078 (any_rotate): Likewise.
30079 (*<any_lshift>_and_internal): New define_insn_and_split to
30080 recognize a logical shift followed by an AND, and split it
30081 again after reload.
30082 (*swpn): New define_insn matching xstormy16's swpn.
30083 (*swpn_zext): New define_insn recognizing swpn followed by
30084 zero_extendqihi2, i.e. with the high byte set to zero.
30085 (*swpn_sext): Likewise, for swpn followed by cbw.
30086 (*swpn_sext_2): Likewise, for an alternate RTL form.
30087 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
30088 sequence is split in the correct place to recognize the *swpn_zext
30089 followed by any_or_plus (ior, xor or plus) instruction.
30091 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
30094 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
30095 (lm32-*-uclinux*): Likewise.
30097 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
30099 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
30100 for riscv_use_save_libcall.
30101 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
30102 (riscv_compute_frame_info): restructure to decouple stack allocation
30103 for rv32e w/o save-restore.
30105 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
30107 * doc/install.texi: Fix documentation typo
30109 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
30111 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
30112 (u): Add div/udiv cases.
30113 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
30114 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
30116 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
30117 (thead_c906_tune_info): Likewise.
30118 (optimize_size_tune_info): Likewise.
30119 (riscv_use_divmod_expander): New function.
30120 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
30122 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
30124 * config/riscv/bitmanip.md: Added clmulr instruction.
30125 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
30126 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
30128 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
30129 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
30130 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
30131 functions to riscv-cmo.def.
30132 * config/riscv/generic.md: Add clmul to list of instructions
30133 using the generic_imul reservation.
30135 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
30137 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
30139 2023-04-28 Andrew Pinski <apinski@marvell.com>
30141 PR tree-optimization/100958
30142 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
30143 (pass_phiopt::execute): Don't call two_value_replacement.
30144 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
30145 handle what two_value_replacement did.
30147 2023-04-28 Andrew Pinski <apinski@marvell.com>
30149 * match.pd: Add patterns for
30150 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
30152 2023-04-28 Andrew Pinski <apinski@marvell.com>
30154 * match.pd: Factor out the deciding the min/max from
30155 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
30157 * fold-const.cc (minmax_from_comparison): this new function.
30158 * fold-const.h (minmax_from_comparison): New prototype.
30160 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
30162 PR rtl-optimization/109476
30163 * lower-subreg.cc: Include explow.h for force_reg.
30164 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
30165 If decomposing a suitable LSHIFTRT and we're not splitting
30166 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
30167 instead of setting a high part SUBREG to zero, which helps combine.
30168 (decompose_multiword_subregs): Update call to resolve_shift_zext.
30170 2023-04-28 Richard Biener <rguenther@suse.de>
30172 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
30174 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
30175 gather-scatter info and cost emulated scatters accordingly.
30176 (get_load_store_type): Support emulated scatters.
30177 (vectorizable_store): Likewise. Emulate them by extracting
30178 scalar offsets and data, doing scalar stores.
30180 2023-04-28 Richard Biener <rguenther@suse.de>
30182 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
30183 Tame down element extracts and scalar loads for gather/scatter
30184 similar to elementwise strided accesses.
30186 2023-04-28 Pan Li <pan2.li@intel.com>
30187 kito-cheng <kito.cheng@sifive.com>
30189 * config/riscv/vector.md: Add new define split to perform
30190 the simplification.
30192 2023-04-28 Richard Biener <rguenther@suse.de>
30195 * ipa-param-manipulation.cc
30196 (ipa_param_body_adjustments::modify_expression): Allow
30197 conversion of a register to a non-register type. Elide
30198 conversions inside BIT_FIELD_REFs.
30200 2023-04-28 Richard Biener <rguenther@suse.de>
30202 PR tree-optimization/109644
30203 * tree-cfg.cc (verify_types_in_gimple_reference): Check
30204 register constraints on the outermost VIEW_CONVERT_EXPR
30205 only. Do not allow register or invariant bases on
30206 multi-level or possibly variable index handled components.
30208 2023-04-28 Richard Biener <rguenther@suse.de>
30210 * gimplify.cc (gimplify_compound_lval): When there's a
30211 non-register type produced by one of the handled component
30212 operations make sure we get a non-register base.
30214 2023-04-28 Richard Biener <rguenther@suse.de>
30216 PR tree-optimization/108752
30217 * tree-vect-generic.cc (build_replicated_const): Rename
30218 to build_replicated_int_cst and move to tree.{h,cc}.
30219 (do_plus_minus): Adjust.
30220 (do_negate): Likewise.
30221 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
30222 arithmetic vector operations in lowered form.
30223 * tree.h (build_replicated_int_cst): Declare.
30224 * tree.cc (build_replicated_int_cst): Moved from
30225 tree-vect-generic.cc build_replicated_const.
30227 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30230 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
30231 (aarch64_rbit<mode><vczle><vczbe>): ... This.
30232 (neg<mode>2): Rename to...
30233 (neg<mode>2<vczle><vczbe>): ... This.
30234 (abs<mode>2): Rename to...
30235 (abs<mode>2<vczle><vczbe>): ... This.
30236 (aarch64_abs<mode>): Rename to...
30237 (aarch64_abs<mode><vczle><vczbe>): ... This.
30238 (one_cmpl<mode>2): Rename to...
30239 (one_cmpl<mode>2<vczle><vczbe>): ... This.
30240 (clrsb<mode>2): Rename to...
30241 (clrsb<mode>2<vczle><vczbe>): ... This.
30242 (clz<mode>2): Rename to...
30243 (clz<mode>2<vczle><vczbe>): ... This.
30244 (popcount<mode>2): Rename to...
30245 (popcount<mode>2<vczle><vczbe>): ... This.
30247 2023-04-28 Jakub Jelinek <jakub@redhat.com>
30249 * gimple-range-op.cc (class cfn_sqrt): New type.
30250 (op_cfn_sqrt): New variable.
30251 (gimple_range_op_handler::maybe_builtin_call): Handle
30252 CASE_CFN_SQRT{,_FN}.
30254 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
30255 Jakub Jelinek <jakub@redhat.com>
30257 * value-range.h (frange_nextafter): Declare.
30258 * gimple-range-op.cc (class cfn_sincos): New.
30259 (op_cfn_sin, op_cfn_cos): New variables.
30260 (gimple_range_op_handler::maybe_builtin_call): Handle
30261 CASE_CFN_{SIN,COS}{,_FN}.
30263 2023-04-28 Jakub Jelinek <jakub@redhat.com>
30265 * target.def (libm_function_max_error): New target hook.
30266 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
30267 * doc/tm.texi: Regenerated.
30268 * targhooks.h (default_libm_function_max_error,
30269 glibc_linux_libm_function_max_error): Declare.
30270 * targhooks.cc: Include case-cfn-macros.h.
30271 (default_libm_function_max_error,
30272 glibc_linux_libm_function_max_error): New functions.
30273 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30274 * config/linux-protos.h (linux_libm_function_max_error): Declare.
30275 * config/linux.cc: Include target.h and targhooks.h.
30276 (linux_libm_function_max_error): New function.
30277 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
30278 (arc_libm_function_max_error): New function.
30279 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30280 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
30281 (ix86_libm_function_max_error): New function.
30282 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30283 * config/rs6000/rs6000-protos.h
30284 (rs6000_linux_libm_function_max_error): Declare.
30285 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
30286 and case-cfn-macros.h.
30287 (rs6000_linux_libm_function_max_error): New function.
30288 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30289 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30290 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
30291 (or1k_libm_function_max_error): New function.
30292 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30294 2023-04-28 Alexandre Oliva <oliva@adacore.com>
30296 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
30297 Move detach value calls...
30298 (pass_harden_conditional_branches::execute): ... here.
30299 (pass_harden_compares::execute): Detach values before
30302 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
30304 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
30305 (cml<addsub_as><mode>4): Likewise.
30306 (vec_addsub<mode>3): Likewise.
30307 (cadd<rot><mode>3): Likewise.
30308 (vec_fmaddsub<mode>4): Likewise.
30309 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
30311 2023-04-27 Andrew Pinski <apinski@marvell.com>
30313 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
30314 up to 2 min/max expressions in the sequence/match code.
30316 2023-04-27 Andrew Pinski <apinski@marvell.com>
30318 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
30320 * tree-eh.cc (operation_could_trap_helper_p): Treate
30321 MIN_EXPR/MAX_EXPR similar as other comparisons.
30323 2023-04-27 Andrew Pinski <apinski@marvell.com>
30325 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
30327 (cond_if_else_store_replacement): Likewise.
30328 (get_non_trapping): Likewise.
30329 (store_elim_worker): Move into ...
30330 (pass_cselim::execute): This.
30332 2023-04-27 Andrew Pinski <apinski@marvell.com>
30334 * tree-ssa-phiopt.cc (two_value_replacement): Remove
30336 (match_simplify_replacement): Likewise.
30337 (factor_out_conditional_conversion): Likewise.
30338 (value_replacement): Likewise.
30339 (minmax_replacement): Likewise.
30340 (spaceship_replacement): Likewise.
30341 (cond_removal_in_builtin_zero_pattern): Likewise.
30342 (hoist_adjacent_loads): Likewise.
30343 (tree_ssa_phiopt_worker): Move into ...
30344 (pass_phiopt::execute): this.
30346 2023-04-27 Andrew Pinski <apinski@marvell.com>
30348 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
30349 do_store_elim argument and split that part out to ...
30350 (store_elim_worker): This new function.
30351 (pass_cselim::execute): Call store_elim_worker.
30352 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
30354 2023-04-27 Jan Hubicka <jh@suse.cz>
30356 * cfgloopmanip.h (unloop_loops): Export.
30357 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
30358 that no longer loop.
30359 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
30360 vectors of loops to unloop.
30361 (canonicalize_induction_variables): Free vectors here.
30362 (tree_unroll_loops_completely): Free vectors here.
30364 2023-04-27 Richard Biener <rguenther@suse.de>
30366 PR tree-optimization/109170
30367 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
30368 Handle __builtin_expect and similar via cfn_pass_through_arg1
30369 and inspecting the calls fnspec.
30370 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
30371 and BUILT_IN_EXPECT_WITH_PROBABILITY.
30373 2023-04-27 Alexandre Oliva <oliva@adacore.com>
30375 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
30377 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
30379 PR tree-optimization/109639
30380 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
30381 (propagate_vr_across_jump_function): Same.
30382 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
30383 * ipa-prop.h (ipa_range_set_and_normalize): New.
30384 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
30386 2023-04-27 Richard Biener <rguenther@suse.de>
30388 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
30389 create a CTOR operand in the result when simplifying GIMPLE.
30391 2023-04-27 Richard Biener <rguenther@suse.de>
30393 * gimplify.cc (gimplify_compound_lval): When the base
30394 gimplified to a register make sure to split up chains
30397 2023-04-27 Richard Biener <rguenther@suse.de>
30400 * ipa-param-manipulation.h
30401 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
30403 * ipa-param-manipulation.cc
30404 (ipa_param_body_adjustments::modify_expression): Likewise.
30405 When we need a conversion and the replacement is a register
30406 split the conversion out.
30407 (ipa_param_body_adjustments::modify_assignment): Pass
30408 extra_stmts to RHS modify_expression.
30410 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
30412 * doc/extend.texi (Zero Length): Describe example.
30414 2023-04-27 Richard Biener <rguenther@suse.de>
30416 PR tree-optimization/109594
30417 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
30418 what we rewrite to a register based on the above.
30420 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
30422 * config/riscv/riscv.cc: Fix whitespace.
30423 * config/riscv/sync.md: Fix whitespace.
30425 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
30427 PR tree-optimization/108697
30428 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
30429 not clear the vector on an out of range query.
30430 (ssa_cache::dump): Use dump_range_query instead of get_range.
30431 (ssa_cache::dump_range_query): New.
30432 (ssa_lazy_cache::dump_range_query): New.
30433 (ssa_lazy_cache::set_range): New.
30434 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
30435 (class ssa_lazy_cache): New.
30436 (ssa_lazy_cache::ssa_lazy_cache): New.
30437 (ssa_lazy_cache::~ssa_lazy_cache): New.
30438 (ssa_lazy_cache::get_range): New.
30439 (ssa_lazy_cache::clear_range): New.
30440 (ssa_lazy_cache::clear): New.
30441 (ssa_lazy_cache::dump): New.
30442 * gimple-range-path.cc (path_range_query::path_range_query): Do
30443 not allocate a ssa_cache object nor has_cache bitmap.
30444 (path_range_query::~path_range_query): Do not free objects.
30445 (path_range_query::clear_cache): Remove.
30446 (path_range_query::get_cache): Adjust.
30447 (path_range_query::set_cache): Remove.
30448 (path_range_query::dump): Don't call through a pointer.
30449 (path_range_query::internal_range_of_expr): Set cache directly.
30450 (path_range_query::reset_path): Clear cache directly.
30451 (path_range_query::ssa_range_in_phi): Fold with globals only.
30452 (path_range_query::compute_ranges_in_phis): Simply set range.
30453 (path_range_query::compute_ranges_in_block): Call cache directly.
30454 * gimple-range-path.h (class path_range_query): Replace bitmap
30455 and cache pointer with lazy cache object.
30456 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
30458 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
30460 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
30461 (ssa_cache::~ssa_cache): Rename.
30462 (ssa_cache::has_range): New.
30463 (ssa_cache::get_range): Rename.
30464 (ssa_cache::set_range): Rename.
30465 (ssa_cache::clear_range): Rename.
30466 (ssa_cache::clear): Rename.
30467 (ssa_cache::dump): Rename and use get_range.
30468 (ranger_cache::get_global_range): Use get_range and set_range.
30469 (ranger_cache::range_of_def): Use get_range.
30470 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
30471 (class ranger_cache): Use ssa_cache.
30472 * gimple-range-path.cc (path_range_query::path_range_query): Use
30474 (path_range_query::get_cache): Use get_range.
30475 (path_range_query::set_cache): Use set_range.
30476 * gimple-range-path.h (class path_range_query): Use ssa_cache.
30477 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
30478 (assume_query::range_of_expr): Use get_range.
30479 (assume_query::assume_query): Use set_range.
30480 (assume_query::calculate_op): Use get_range and set_range.
30481 * gimple-range.h (class assume_query): Use ssa_cache.
30483 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
30485 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
30486 and local to optionally zero memory.
30487 (br_vector::grow): Only zero memory if flag is set.
30488 (class sbr_lazy_vector): New.
30489 (sbr_lazy_vector::sbr_lazy_vector): New.
30490 (sbr_lazy_vector::set_bb_range): New.
30491 (sbr_lazy_vector::get_bb_range): New.
30492 (sbr_lazy_vector::bb_range_p): New.
30493 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
30494 * gimple-range-gori.cc (gori_map::calculate_gori): Use
30495 param_vrp_switch_limit.
30496 (gori_compute::gori_compute): Use param_vrp_switch_limit.
30497 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
30498 (vrp_switch_limit): Rename from evrp_switch_limit.
30499 (vrp_vector_threshold): New.
30501 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
30503 * value-relation.cc (dom_oracle::query_relation): Check early for lack
30505 * value-relation.h (equiv_oracle::has_equiv_p): New.
30507 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
30509 PR tree-optimization/109417
30510 * gimple-range-gori.cc (range_def_chain::register_dependency):
30511 Save the ssa version number, not the pointer.
30512 (gori_compute::may_recompute_p): No need to check if a dependency
30513 is in the free list.
30514 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
30515 fields to be unsigned int instead of trees.
30516 (ange_def_chain::depend1): Adjust.
30517 (ange_def_chain::depend2): Adjust.
30518 * gimple-range.h: Include "ssa.h" to inline ssa_name().
30520 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
30522 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
30523 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
30524 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
30526 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
30529 * config/riscv/riscv-protos.h: Add helper function stubs.
30530 * config/riscv/riscv.cc: Add helper functions for subword masking.
30531 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
30532 -mno-inline-atomics.
30533 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
30534 fetch_and_nand, CAS, and exchange ops.
30535 * doc/invoke.texi: Add blurb regarding new command-line flags
30536 -minline-atomics and -mno-inline-atomics.
30538 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30540 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
30541 Reimplement using standard RTL codes instead of unspec.
30542 (aarch64_rshrn2<mode>_insn_be): Likewise.
30543 (aarch64_rshrn2<mode>): Adjust for the above.
30544 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
30546 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30548 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
30549 with standard RTL codes instead of an UNSPEC.
30550 (aarch64_rshrn<mode>_insn_be): Likewise.
30551 (aarch64_rshrn<mode>): Adjust for the above.
30552 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
30554 2023-04-26 Pan Li <pan2.li@intel.com>
30555 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30557 * config/riscv/riscv.cc (riscv_classify_address): Allow
30558 const0_rtx for the RVV load/store.
30560 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30562 * range-op.cc (range_op_cast_tests): Remove legacy support.
30563 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
30564 * value-range.cc (irange::operator=): Same.
30565 (get_legacy_range): Same.
30566 (irange::copy_legacy_to_multi_range): Delete.
30567 (irange::copy_to_legacy): Delete.
30568 (irange::irange_set_anti_range): Delete.
30569 (irange::set): Remove legacy support.
30570 (irange::verify_range): Same.
30571 (irange::legacy_lower_bound): Delete.
30572 (irange::legacy_upper_bound): Delete.
30573 (irange::legacy_equal_p): Delete.
30574 (irange::operator==): Remove legacy support.
30575 (irange::singleton_p): Same.
30576 (irange::value_inside_range): Same.
30577 (irange::contains_p): Same.
30578 (intersect_ranges): Delete.
30579 (irange::legacy_intersect): Delete.
30580 (union_ranges): Delete.
30581 (irange::legacy_union): Delete.
30582 (irange::legacy_verbose_union_): Delete.
30583 (irange::legacy_verbose_intersect): Delete.
30584 (irange::irange_union): Remove legacy support.
30585 (irange::irange_intersect): Same.
30586 (irange::intersect): Same.
30587 (irange::invert): Same.
30588 (ranges_from_anti_range): Delete.
30589 (gt_pch_nx): Adjust for legacy removal.
30591 (range_tests_legacy): Delete.
30592 (range_tests_misc): Adjust for legacy removal.
30593 (range_tests): Same.
30594 * value-range.h (class irange): Same.
30595 (irange::legacy_mode_p): Delete.
30596 (ranges_from_anti_range): Delete.
30597 (irange::nonzero_p): Adjust for legacy removal.
30598 (irange::lower_bound): Same.
30599 (irange::upper_bound): Same.
30600 (irange::union_): Same.
30601 (irange::intersect): Same.
30602 (irange::set_nonzero): Same.
30603 (irange::set_zero): Same.
30604 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
30606 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30608 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
30609 of range_has_numeric_bounds_p with irange API.
30610 (range_has_numeric_bounds_p): Delete.
30611 * value-range.h (range_has_numeric_bounds_p): Delete.
30613 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30615 * tree-data-ref.cc (compute_distributive_range): Replace uses of
30616 range_int_cst_p with irange API.
30617 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
30618 * tree-vrp.h (range_int_cst_p): Delete.
30619 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
30620 range_int_cst_p with irange API.
30621 (vr_set_zero_nonzero_bits): Same.
30622 (range_fits_type_p): Same.
30623 (simplify_using_ranges::simplify_casted_cond): Same.
30624 * tree-vrp.cc (range_int_cst_p): Remove.
30626 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30628 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
30630 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30632 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
30633 API uses to new API.
30634 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
30635 * internal-fn.cc (get_min_precision): Same.
30637 * tree-affine.cc (expr_to_aff_combination): Same.
30638 * tree-data-ref.cc (dr_step_indicator): Same.
30639 * tree-dfa.cc (get_ref_base_and_extent): Same.
30640 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
30641 * tree-ssa-phiopt.cc (two_value_replacement): Same.
30642 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
30643 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
30644 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
30645 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
30646 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
30647 * tree.cc (get_range_pos_neg): Same.
30649 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30651 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
30652 vrange::dump instead of ad-hoc dumper.
30653 * tree-ssa-strlen.cc (dump_strlen_info): Same.
30654 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
30657 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30659 * range-op.cc (operator_cast::op1_range): Use
30660 create_possibly_reversed_range.
30661 (operator_bitwise_and::simple_op1_range_solver): Same.
30662 * value-range.cc (swap_out_of_order_endpoints): Delete.
30663 (irange::set): Remove call to swap_out_of_order_endpoints.
30665 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30667 * builtins.cc (determine_block_size): Convert use of legacy API to
30669 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
30670 (array_bounds_checker::check_array_ref): Same.
30671 * gimple-ssa-warn-restrict.cc
30672 (builtin_memref::extend_offset_range): Same.
30673 * ipa-cp.cc (ipcp_store_vr_results): Same.
30674 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
30675 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
30676 (ipa_write_jump_function): Same.
30677 * pointer-query.cc (get_size_range): Same.
30678 * tree-data-ref.cc (split_constant_offset): Same.
30679 * tree-ssa-strlen.cc (get_range): Same.
30680 (maybe_diag_stxncpy_trunc): Same.
30681 (strlen_pass::get_len_or_size): Same.
30682 (strlen_pass::count_nonzero_bytes_addr): Same.
30683 * tree-vect-patterns.cc (vect_get_range_info): Same.
30684 * value-range.cc (irange::maybe_anti_range): Remove.
30685 (get_legacy_range): New.
30686 (irange::copy_to_legacy): Use get_legacy_range.
30687 (ranges_from_anti_range): Same.
30688 * value-range.h (class irange): Remove maybe_anti_range.
30689 (get_legacy_range): New.
30690 * vr-values.cc (check_for_binary_op_overflow): Convert use of
30691 legacy API to get_legacy_range.
30692 (compare_ranges): Same.
30693 (compare_range_with_value): Same.
30694 (bounds_of_var_in_loop): Same.
30695 (find_case_label_ranges): Same.
30696 (simplify_using_ranges::simplify_switch_using_ranges): Same.
30698 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30700 * value-range-pretty-print.cc (vrange_printer::visit): Remove
30702 * value-range.cc (irange::constant_p): Remove.
30703 (irange::get_nonzero_bits_from_range): Remove constant_p use.
30704 * value-range.h (class irange): Remove constant_p.
30705 (irange::num_pairs): Remove constant_p use.
30707 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30709 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
30711 (irange::set): Same.
30712 (irange::legacy_lower_bound): Same.
30713 (irange::legacy_upper_bound): Same.
30714 (irange::contains_p): Same.
30715 (range_tests_legacy): Same.
30716 (irange::normalize_addresses): Remove.
30717 (irange::normalize_symbolics): Remove.
30718 (irange::symbolic_p): Remove.
30719 * value-range.h (class irange): Remove symbolic_p,
30720 normalize_symbolics, and normalize_addresses.
30721 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
30722 Remove symbolics support.
30724 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30726 * value-range.cc (irange::may_contain_p): Remove.
30727 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
30728 usage with contains_p.
30729 * vr-values.cc (compare_range_with_value): Same.
30731 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30733 * tree-vrp.cc (supported_types_p): Remove.
30734 (defined_ranges_p): Remove.
30735 (range_fold_binary_expr): Remove.
30736 (range_fold_unary_expr): Remove.
30737 * tree-vrp.h (range_fold_unary_expr): Remove.
30738 (range_fold_binary_expr): Remove.
30740 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30742 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
30743 (ipa_value_range_from_jfunc): Same.
30744 (propagate_vr_across_jump_function): Same.
30745 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
30746 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
30747 * vr-values.cc (bounds_of_var_in_loop): Same.
30749 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30751 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
30752 Add irange argument.
30753 (check_out_of_bounds_and_warn): Remove check for vr.
30754 (array_bounds_checker::check_array_ref): Remove pointer qualifier
30755 for vr and adjust accordingly.
30756 * gimple-array-bounds.h (get_value_range): Add irange argument.
30757 * value-query.cc (class equiv_allocator): Delete.
30758 (range_query::get_value_range): Delete.
30759 (range_query::range_query): Remove allocator access.
30760 (range_query::~range_query): Same.
30761 * value-query.h (get_value_range): Delete.
30763 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
30764 call to get_value_range.
30765 (check_for_binary_op_overflow): Same.
30766 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
30767 (simplify_using_ranges::simplify_abs_using_ranges): Same.
30768 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
30769 (simplify_using_ranges::simplify_casted_cond): Same.
30770 (simplify_using_ranges::simplify_switch_using_ranges): Same.
30771 (simplify_using_ranges::two_valued_val_range_p): Same.
30773 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30776 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
30778 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
30779 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
30780 (simplify_using_ranges::legacy_fold_cond): ...this.
30781 (simplify_using_ranges::fold_cond): Rename
30782 vrp_evaluate_conditional_warnv_with_ops to
30783 legacy_fold_cond_overflow.
30784 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
30785 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
30786 legacy_fold_cond_overflow respectively.
30788 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
30790 * vr-values.cc (get_vr_for_comparison): Remove.
30791 (compare_name_with_value): Same.
30792 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
30793 compare_name_with_value.
30794 * vr-values.h: Remove compare_name_with_value.
30795 Remove get_vr_for_comparison.
30797 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
30799 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
30800 (bswapsi2): New define_insn.
30801 (swaphi): New define_insn to exchange two registers (swpw).
30802 (define_peephole2): Recognize exchange of registers as swaphi.
30804 2023-04-26 Richard Biener <rguenther@suse.de>
30806 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
30808 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
30809 * predict.cc (apply_return_prediction): Likewise.
30810 * sese.cc (set_ifsese_condition): Likewise. Simplify.
30811 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
30812 (make_edges_bb): Likewise.
30813 (make_cond_expr_edges): Likewise.
30814 (end_recording_case_labels): Likewise.
30815 (make_gimple_asm_edges): Likewise.
30816 (cleanup_dead_labels): Likewise.
30817 (group_case_labels): Likewise.
30818 (gimple_can_merge_blocks_p): Likewise.
30819 (gimple_merge_blocks): Likewise.
30820 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
30821 (gimple_duplicate_sese_tail): Avoid last_stmt.
30822 (find_loop_dist_alias): Likewise.
30823 (gimple_block_ends_with_condjump_p): Likewise.
30824 (gimple_purge_dead_eh_edges): Likewise.
30825 (gimple_purge_dead_abnormal_call_edges): Likewise.
30826 (pass_warn_function_return::execute): Likewise.
30827 (execute_fixup_cfg): Likewise.
30828 * tree-eh.cc (redirect_eh_edge_1): Likewise.
30829 (pass_lower_resx::execute): Likewise.
30830 (pass_lower_eh_dispatch::execute): Likewise.
30831 (cleanup_empty_eh): Likewise.
30832 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
30833 (predicate_bbs): Likewise.
30834 (ifcvt_split_critical_edges): Likewise.
30835 * tree-loop-distribution.cc (create_edge_for_control_dependence):
30837 (loop_distribution::transform_reduction_loop): Likewise.
30838 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
30839 (try_transform_to_exit_first_loop_alt): Likewise.
30840 (transform_to_exit_first_loop): Likewise.
30841 (create_parallel_loop): Likewise.
30842 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
30843 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
30844 (eliminate_unnecessary_stmts): Likewise.
30846 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
30848 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
30849 (pass_tree_ifcombine::execute): Likewise.
30850 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
30851 (should_duplicate_loop_header_p): Likewise.
30852 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
30853 (tree_estimate_loop_size): Likewise.
30854 (try_unroll_loop_completely): Likewise.
30855 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
30856 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
30857 (canonicalize_loop_ivs): Likewise.
30858 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
30859 (bound_difference): Likewise.
30860 (number_of_iterations_popcount): Likewise.
30861 (number_of_iterations_cltz): Likewise.
30862 (number_of_iterations_cltz_complement): Likewise.
30863 (simplify_using_initial_conditions): Likewise.
30864 (number_of_iterations_exit_assumptions): Likewise.
30865 (loop_niter_by_eval): Likewise.
30866 (estimate_numbers_of_iterations): Likewise.
30868 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30870 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
30872 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
30875 * config/rs6000/rs6000-builtins.def
30876 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
30877 __builtin_vsx_scalar_cmp_exp_qp_lt,
30878 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
30881 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
30884 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
30885 easy_vector_constant with const_vector_each_byte_same, add
30886 handlings in preparation for !easy_vector_constant, and update
30887 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
30888 * config/rs6000/predicates.md (const_vector_each_byte_same): New
30891 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30893 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
30894 (*pred_ltge<mode>_merge_tie_mask): Ditto.
30895 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
30896 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
30897 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
30898 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
30899 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
30901 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30903 * config/riscv/vector.md: Fix redundant vmv1r.v.
30905 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30907 * config/riscv/vector.md: Fix RA constraint.
30909 2023-04-26 Pan Li <pan2.li@intel.com>
30912 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
30913 check for vn_reference equal.
30915 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30917 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
30918 auto-vectorization preference.
30919 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
30920 auto-vectorization.
30921 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
30923 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
30925 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
30926 and bclridisi_nottwobits patterns.
30927 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
30928 predicate to avoid splitting arith constants.
30929 (const_nottwobits_not_arith_operand): New predicate.
30931 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
30933 * recog.cc (peep2_attempt, peep2_update_life): Correct
30934 head-comment description of parameter match_len.
30936 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
30938 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
30939 riscv_split_symbol() drop in_splitter arg.
30940 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
30941 riscv_split_symbol() drop in_splitter arg.
30942 riscv_force_temporary() drop in_splitter arg.
30943 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
30944 riscv_split_symbol() drop in_splitter arg.
30946 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
30948 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
30949 superfluous debug temporaries for single GIMPLE assignments.
30951 2023-04-25 Richard Biener <rguenther@suse.de>
30953 PR tree-optimization/109609
30954 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
30956 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
30957 the size given by arg_max_access_size_given_by_arg_p as
30958 maximum, not exact, size.
30960 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30963 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
30964 (orn<mode>3<vczle><vczbe>): ... This.
30965 (bic<mode>3): Rename to...
30966 (bic<mode>3<vczle><vczbe>): ... This.
30967 (<su><maxmin><mode>3): Rename to...
30968 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
30970 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30972 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
30973 * config/aarch64/iterators.md (VQDIV): New mode iterator.
30974 (vnx2di): New mode attribute.
30976 2023-04-25 Richard Biener <rguenther@suse.de>
30978 PR rtl-optimization/109585
30979 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
30981 2023-04-25 Jakub Jelinek <jakub@redhat.com>
30984 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
30985 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
30986 is larger than signed int maximum.
30988 2023-04-25 Martin Liska <mliska@suse.cz>
30990 * doc/gcov.texi: Document the new "calls" field and document
30991 the API bump. Mention also "block_ids" for lines.
30992 * gcov.cc (output_intermediate_json_line): Output info about
30993 calls and extend branches as well.
30994 (generate_results): Bump version to 2.
30995 (output_line_details): Use block ID instead of a non-sensual
30998 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
31000 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
31001 length attribute for the first (memory operand) alternative.
31003 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
31005 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
31006 * config/aarch64/constraints.md: Make "Umn" relaxed memory
31008 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
31010 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31012 * value-range.cc (frange::set): Adjust constructor.
31013 * value-range.h (nan_state::nan_state): Replace default
31014 constructor with one taking an argument.
31016 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31018 * ipa-cp.cc (ipa_range_contains_p): New.
31019 (decide_whether_version_node): Use it.
31021 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
31023 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
31024 simplify two successive VEC_PERM_EXPRs with same VLA mask,
31025 where mask chooses elements in reverse order.
31027 2023-04-24 Andrew Pinski <apinski@marvell.com>
31029 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
31030 and support diamond shaped basic block form.
31031 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
31033 2023-04-24 Andrew Pinski <apinski@marvell.com>
31035 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31036 Instead of calling last_and_only_stmt, look for the last statement
31039 2023-04-24 Andrew Pinski <apinski@marvell.com>
31041 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31043 (match_simplify_replacement): Call
31044 empty_bb_or_one_feeding_into_p instead of doing it inline.
31046 2023-04-24 Andrew Pinski <apinski@marvell.com>
31048 PR tree-optimization/68894
31049 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
31050 continue for the do_hoist_loads diamond case.
31052 2023-04-24 Andrew Pinski <apinski@marvell.com>
31054 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
31055 code for better code readability.
31057 2023-04-24 Andrew Pinski <apinski@marvell.com>
31059 PR tree-optimization/109604
31060 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
31061 diamond form check from ...
31062 (minmax_replacement): Here.
31064 2023-04-24 Patrick Palka <ppalka@redhat.com>
31066 * tree.cc (strip_array_types): Don't define here.
31067 (is_typedef_decl): Don't define here.
31068 (typedef_variant_p): Don't define here.
31069 * tree.h (strip_array_types): Define here.
31070 (is_typedef_decl): Define here.
31071 (typedef_variant_p): Define here.
31073 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
31075 * doc/generic.texi (OpenMP): Add != to allowed
31076 conditions and state that vars can be unsigned.
31077 * tree.def (OMP_FOR): Likewise.
31079 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31081 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
31083 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31085 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
31086 Remove explicit Solaris 11 references.
31088 (Options specification, --with-gnu-as): as and gas always differ
31090 Remove /usr/ccs/bin reference.
31091 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
31092 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
31093 (*-*-solaris2*): ... here.
31094 Update bundled GCC versions.
31095 Don't refer to pre-built binaries.
31096 Remove /bin/sh warning.
31097 Update assembler, linker recommendations.
31098 Document GNAT bootstrap compiler.
31099 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
31100 (sparc64-*-solaris2*): Move content...
31101 (sparcv9-*-solaris2*): ...here.
31102 Add GDC for 64-bit bootstrap compilers.
31104 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31107 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
31109 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
31112 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31114 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
31115 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
31116 (aarch64_<su>abal2<mode>): New define_expand.
31117 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
31118 (aarch64_rtx_costs): Handle ABD rtxes.
31119 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
31120 * config/aarch64/iterators.md (ABAL2): Delete.
31121 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
31123 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31125 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
31126 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
31127 (<sur>sadv16qi): Rename to...
31128 (<su>sadv16qi): ... This. Adjust for the above.
31129 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
31130 (<su>sad<vsi2qi>): ... This. Adjust for the above.
31131 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
31132 * config/aarch64/iterators.md (ABAL): Delete.
31133 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
31135 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31137 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
31138 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
31139 (aarch64_<su>abdl2<mode>): New define_expand.
31140 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
31141 * config/aarch64/iterators.md (ABDL2): Delete.
31142 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
31144 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31146 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
31147 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
31149 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
31150 * config/aarch64/iterators.md (ABDL): Delete.
31151 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
31153 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31155 * config/aarch64/aarch64-simd.md
31156 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
31158 2023-04-24 Richard Biener <rguenther@suse.de>
31160 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
31162 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
31164 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
31165 (set_switch_stmt_execution_predicate): Likewise.
31166 (phi_result_unknown_predicate): Likewise.
31167 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
31168 (ipa_analyze_indirect_call_uses): Likewise.
31169 * predict.cc (predict_iv_comparison): Likewise.
31170 (predict_extra_loop_exits): Likewise.
31171 (predict_loops): Likewise.
31172 (tree_predict_by_opcode): Likewise.
31173 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
31175 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
31176 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
31177 (replace_phi_edge_with_variable): Likewise.
31178 (two_value_replacement): Likewise.
31179 (value_replacement): Likewise.
31180 (minmax_replacement): Likewise.
31181 (spaceship_replacement): Likewise.
31182 (cond_removal_in_builtin_zero_pattern): Likewise.
31183 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
31184 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
31185 (vn_phi_lookup): Likewise.
31186 (vn_phi_insert): Likewise.
31187 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
31188 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
31190 (back_threader_profitability::possibly_profitable_path_p):
31192 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
31194 * tree-switch-conversion.cc (pass_convert_switch::execute):
31196 (pass_lower_switch<O0>::execute): Likewise.
31197 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
31198 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
31199 * tree-vect-slp.cc (vect_slp_function): Likewise.
31200 * tree-vect-stmts.cc (cfun_returns): Likewise.
31201 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
31202 (vect_loop_dist_alias_call): Likewise.
31204 2023-04-24 Richard Biener <rguenther@suse.de>
31206 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
31208 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31210 * config/riscv/riscv-vsetvl.cc
31211 (vector_infos_manager::all_avail_in_compatible_p): New function.
31212 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
31213 * config/riscv/riscv-vsetvl.h: New function.
31215 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31217 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
31218 comment for cleanup_insns.
31220 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31222 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
31223 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
31224 with the fault first load property.
31226 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31228 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
31229 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
31231 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31234 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
31235 (aarch64_addp<mode><vczle><vczbe>): ... This.
31237 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31239 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
31240 provide reasonable values for common arithmetic operations and
31241 immediate operands (in several machine modes).
31243 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31245 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
31246 format specifier to output high_part register name of SImode reg.
31247 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
31248 (zero_extendqihi2): Fix lengths, consistent formatting and add
31249 "and Rx,#255" alternative, for documentation purposes.
31250 (zero_extendhisi2): New define_insn.
31252 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31254 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
31255 SImode shifts by two by performing a single bit SImode shift twice.
31257 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
31259 PR tree-optimization/109593
31260 * value-range.cc (frange::operator==): Handle NANs.
31262 2023-04-23 liuhongt <hongtao.liu@intel.com>
31264 PR rtl-optimization/108707
31265 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
31266 GENERAL_REGS when preferred reg_class is not known.
31268 2023-04-22 Andrew Pinski <apinski@marvell.com>
31270 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
31271 Change the code around slightly to move diamond
31272 handling for do_store_elim/do_hoist_loads out of
31275 2023-04-22 Andrew Pinski <apinski@marvell.com>
31277 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
31278 Remove check on empty_block_p.
31280 2023-04-22 Jakub Jelinek <jakub@redhat.com>
31282 PR bootstrap/109589
31283 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
31284 * realmpfr.h (class auto_mpfr): Likewise.
31286 2023-04-22 Jakub Jelinek <jakub@redhat.com>
31288 PR tree-optimization/109583
31289 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
31290 if vec_mode is not VECTOR_MODE_P.
31292 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
31293 Ondrej Kubanek <kubanek0ondrej@gmail.com>
31295 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
31296 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
31297 loop profile and bounds after header duplication.
31298 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
31299 Break out from try_peel_loop; fix handling of 0 iterations.
31300 (try_peel_loop): Use adjust_loop_info_after_peeling.
31302 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
31304 PR tree-optimization/109546
31305 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
31306 not fold conditions with ADDR_EXPR early.
31308 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31310 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
31311 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
31313 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
31314 (*aarch64_<optab><mode>3_zero): Define.
31315 (*aarch64_<optab><mode>3_cssc): Likewise.
31316 * config/aarch64/iterators.md (maxminand): New code attribute.
31318 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31321 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
31322 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
31324 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
31325 (aarch64_override_options_internal): Handle the above.
31326 (aarch64_output_load_tp): New function.
31327 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
31328 aarch64_output_load_tp.
31329 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
31330 (mtp=): New option.
31331 * doc/invoke.texi (AArch64 Options): Document -mtp=.
31333 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31336 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
31337 (add_vec_concat_subst_be): Likewise.
31340 (add<mode>3): Rename to...
31341 (add<mode>3<vczle><vczbe>): ... This.
31342 (sub<mode>3): Rename to...
31343 (sub<mode>3<vczle><vczbe>): ... This.
31344 (mul<mode>3): Rename to...
31345 (mul<mode>3<vczle><vczbe>): ... This.
31346 (and<mode>3): Rename to...
31347 (and<mode>3<vczle><vczbe>): ... This.
31348 (ior<mode>3): Rename to...
31349 (ior<mode>3<vczle><vczbe>): ... This.
31350 (xor<mode>3): Rename to...
31351 (xor<mode>3<vczle><vczbe>): ... This.
31352 * config/aarch64/iterators.md (VDZ): Define.
31354 2023-04-21 Patrick Palka <ppalka@redhat.com>
31356 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
31359 2023-04-21 Jan Hubicka <jh@suse.cz>
31361 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
31364 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
31366 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
31367 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
31369 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
31371 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
31372 force_reg instead of copy_to_mode_reg.
31373 (aarch64_expand_vector_init): Likewise.
31375 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
31377 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
31378 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
31379 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
31380 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
31381 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
31382 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
31383 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
31384 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
31385 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
31386 * config/i386/predicates.md (index_register_operand):
31387 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
31388 * config/i386/i386.cc (ix86_legitimate_address_p): Use
31389 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
31390 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
31392 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
31393 Ondrej Kubanek <kubanek0ondrej@gmail.com>
31395 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
31398 2023-04-21 Richard Biener <rguenther@suse.de>
31400 * is-a.h (safe_is_a): New.
31402 2023-04-21 Richard Biener <rguenther@suse.de>
31404 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
31405 (gphi_iterator::operator*): Likewise.
31407 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
31408 Michal Jires <michal@jires.eu>
31410 * ipa-inline.cc (class inline_badness): New class.
31411 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
31413 (update_edge_key): Update.
31414 (lookup_recursive_calls): Likewise.
31415 (recursive_inlining): Likewise.
31416 (add_new_edges_to_heap): Likewise.
31417 (inline_small_functions): Likewise.
31419 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
31421 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
31423 2023-04-21 Richard Biener <rguenther@suse.de>
31425 PR tree-optimization/109573
31426 * tree-vect-loop.cc (vectorizable_live_operation): Allow
31427 unhandled SSA copy as well. Demote assert to checking only.
31429 2023-04-21 Richard Biener <rguenther@suse.de>
31431 * df-core.cc (df_analyze): Compute RPO on the reverse graph
31432 for DF_BACKWARD problems.
31433 (loop_post_order_compute): Rename to ...
31434 (loop_rev_post_order_compute): ... this, compute a RPO.
31435 (loop_inverted_post_order_compute): Rename to ...
31436 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
31437 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
31438 problems, RPO on the inverted graph for DF_BACKWARD.
31440 2023-04-21 Richard Biener <rguenther@suse.de>
31442 * cfganal.h (inverted_rev_post_order_compute): Rename
31444 (inverted_post_order_compute): ... this. Add struct function
31445 argument, change allocation to a C array.
31446 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
31447 * lcm.cc (compute_antinout_edge): Adjust.
31448 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
31449 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
31450 * tree-ssa-pre.cc (compute_antic): Likewise.
31452 2023-04-21 Richard Biener <rguenther@suse.de>
31454 * df.h (df_d::postorder_inverted): Change back to int *,
31456 * df-core.cc (rest_of_handle_df_finish): Adjust.
31457 (df_analyze_1): Likewise.
31458 (df_analyze): For DF_FORWARD problems use RPO on the forward
31460 (loop_inverted_post_order_compute): Adjust API.
31461 (df_analyze_loop): Adjust.
31462 (df_get_n_blocks): Likewise.
31463 (df_get_postorder): Likewise.
31465 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31468 * config/riscv/riscv-vsetvl.cc
31469 (vector_infos_manager::all_empty_predecessor_p): New function.
31470 (pass_vsetvl::backward_demand_fusion): Ditto.
31471 * config/riscv/riscv-vsetvl.h: Ditto.
31473 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
31476 * config/riscv/generic.md: Change standard names to insn names.
31478 2023-04-21 Richard Biener <rguenther@suse.de>
31480 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
31481 (compute_laterin): Use RPO.
31482 (compute_available): Likewise.
31484 2023-04-21 Peng Fan <fanpeng@loongson.cn>
31486 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
31488 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31491 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
31492 (vector_insn_info::skip_avl_compatible_p): Ditto.
31493 (vector_insn_info::merge): Remove default value.
31494 (pass_vsetvl::compute_local_backward_infos): Ditto.
31495 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
31496 * config/riscv/riscv-vsetvl.h: Ditto.
31498 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
31500 * doc/extend.texi (Common Function Attributes): Remove duplicate
31503 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
31505 PR tree-optimization/109564
31506 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
31507 UNDEFINED range names when deciding if all PHI arguments are the same,
31509 2023-04-20 Jakub Jelinek <jakub@redhat.com>
31511 PR tree-optimization/109011
31512 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
31513 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
31514 .CTZ (X) = PREC - .POPCOUNT (X | -X).
31516 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
31518 * lra-constraints.cc (match_reload): Exclude some hard regs for
31519 multi-reg inout reload pseudos used in asm in different mode.
31521 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
31523 * config/arm/arm.cc (thumb1_legitimate_address_p):
31524 Use VIRTUAL_REGISTER_P predicate.
31525 (arm_eliminable_register): Ditto.
31526 * config/avr/avr.md (push<mode>_1): Ditto.
31527 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
31528 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
31529 * config/i386/predicates.md (register_no_elim_operand): Ditto.
31530 * config/iq2000/predicates.md (call_insn_operand): Ditto.
31531 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
31533 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
31536 * config/i386/predicates.md (extract_operator): New predicate.
31537 * config/i386/i386.md (any_extract): Remove code iterator.
31538 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
31539 (*cmpqi_ext<mode>_1): Ditto.
31540 (*cmpqi_ext<mode>_2): Ditto.
31541 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
31542 (*cmpqi_ext<mode>_3): Ditto.
31543 (*cmpqi_ext<mode>_4): Ditto.
31544 (*extzvqi_mem_rex64): Ditto.
31546 (*insvqi_2): Ditto.
31547 (*extendqi<SWI24:mode>_ext_1): Ditto.
31548 (*addqi_ext<mode>_0): Ditto.
31549 (*addqi_ext<mode>_1): Ditto.
31550 (*addqi_ext<mode>_2): Ditto.
31551 (*subqi_ext<mode>_0): Ditto.
31552 (*subqi_ext<mode>_2): Ditto.
31553 (*testqi_ext<mode>_1): Ditto.
31554 (*testqi_ext<mode>_2): Ditto.
31555 (*andqi_ext<mode>_0): Ditto.
31556 (*andqi_ext<mode>_1): Ditto.
31557 (*andqi_ext<mode>_1_cc): Ditto.
31558 (*andqi_ext<mode>_2): Ditto.
31559 (*<any_or:code>qi_ext<mode>_0): Ditto.
31560 (*<any_or:code>qi_ext<mode>_1): Ditto.
31561 (*<any_or:code>qi_ext<mode>_2): Ditto.
31562 (*xorqi_ext<mode>_1_cc): Ditto.
31563 (*negqi_ext<mode>_2): Ditto.
31564 (*ashlqi_ext<mode>_2): Ditto.
31565 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
31567 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
31570 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
31571 <bitmanip_insn> as the type to allow for fine grained control of
31572 scheduling these insns.
31573 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
31575 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
31576 pcnt, signed and unsigned min/max.
31578 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31579 kito-cheng <kito.cheng@sifive.com>
31581 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
31583 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31584 kito-cheng <kito.cheng@sifive.com>
31587 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
31588 (pass_vsetvl::cleanup_insns): Fix bug.
31590 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
31592 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
31593 (ldexp<mode>3): Delete.
31594 (ldexp<mode>3<exec>): Change "B" to "A".
31596 2023-04-20 Jakub Jelinek <jakub@redhat.com>
31597 Jonathan Wakely <jwakely@redhat.com>
31599 * tree.h (built_in_function_equal_p): New helper function.
31600 (fndecl_built_in_p): Turn into variadic template to support
31601 1 or more built_in_function arguments.
31602 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
31603 * gimplify.cc (goa_stabilize_expr): Likewise.
31604 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
31605 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
31606 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
31607 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
31608 cgraph_update_edges_for_call_stmt_node,
31609 cgraph_edge::verify_corresponds_to_fndecl,
31610 cgraph_node::verify_node): Likewise.
31611 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
31612 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
31613 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
31615 2023-04-20 Jakub Jelinek <jakub@redhat.com>
31617 PR tree-optimization/109011
31618 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
31619 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
31620 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
31621 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
31622 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
31624 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
31626 2023-04-20 Richard Biener <rguenther@suse.de>
31628 * df-core.cc (rest_of_handle_df_initialize): Remove
31629 computation of df->postorder, df->postorder_inverted and
31632 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31634 * common/config/i386/i386-common.cc
31635 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
31636 (ix86_handle_option): Set AVX flag for VAES.
31637 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
31638 Add OPTION_MASK_ISA2_VAES_UNSET.
31639 (def_builtin): Share builtin between AES and VAES.
31640 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
31642 * config/i386/i386.md (aes): New isa attribute.
31643 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
31644 (aesenclast): Ditto.
31646 (aesdeclast): Ditto.
31647 * config/i386/vaesintrin.h: Remove redundant avx target push.
31648 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
31649 (_mm_aesdeclast_si128): Ditto.
31650 (_mm_aesenc_si128): Ditto.
31651 (_mm_aesenclast_si128): Ditto.
31653 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
31655 * config/i386/avx2intrin.h
31656 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
31657 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
31658 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
31659 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
31660 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
31661 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
31662 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
31663 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
31664 (_mm_reduce_add_epi16): New instrinsics.
31665 (_mm_reduce_mul_epi16): Ditto.
31666 (_mm_reduce_and_epi16): Ditto.
31667 (_mm_reduce_or_epi16): Ditto.
31668 (_mm_reduce_max_epi16): Ditto.
31669 (_mm_reduce_max_epu16): Ditto.
31670 (_mm_reduce_min_epi16): Ditto.
31671 (_mm_reduce_min_epu16): Ditto.
31672 (_mm256_reduce_add_epi16): Ditto.
31673 (_mm256_reduce_mul_epi16): Ditto.
31674 (_mm256_reduce_and_epi16): Ditto.
31675 (_mm256_reduce_or_epi16): Ditto.
31676 (_mm256_reduce_max_epi16): Ditto.
31677 (_mm256_reduce_max_epu16): Ditto.
31678 (_mm256_reduce_min_epi16): Ditto.
31679 (_mm256_reduce_min_epu16): Ditto.
31680 (_mm_reduce_add_epi8): Ditto.
31681 (_mm_reduce_mul_epi8): Ditto.
31682 (_mm_reduce_and_epi8): Ditto.
31683 (_mm_reduce_or_epi8): Ditto.
31684 (_mm_reduce_max_epi8): Ditto.
31685 (_mm_reduce_max_epu8): Ditto.
31686 (_mm_reduce_min_epi8): Ditto.
31687 (_mm_reduce_min_epu8): Ditto.
31688 (_mm256_reduce_add_epi8): Ditto.
31689 (_mm256_reduce_mul_epi8): Ditto.
31690 (_mm256_reduce_and_epi8): Ditto.
31691 (_mm256_reduce_or_epi8): Ditto.
31692 (_mm256_reduce_max_epi8): Ditto.
31693 (_mm256_reduce_max_epu8): Ditto.
31694 (_mm256_reduce_min_epi8): Ditto.
31695 (_mm256_reduce_min_epu8): Ditto.
31696 * config/i386/avx512vlbwintrin.h:
31697 (_mm_mask_reduce_add_epi16): Ditto.
31698 (_mm_mask_reduce_mul_epi16): Ditto.
31699 (_mm_mask_reduce_and_epi16): Ditto.
31700 (_mm_mask_reduce_or_epi16): Ditto.
31701 (_mm_mask_reduce_max_epi16): Ditto.
31702 (_mm_mask_reduce_max_epu16): Ditto.
31703 (_mm_mask_reduce_min_epi16): Ditto.
31704 (_mm_mask_reduce_min_epu16): Ditto.
31705 (_mm256_mask_reduce_add_epi16): Ditto.
31706 (_mm256_mask_reduce_mul_epi16): Ditto.
31707 (_mm256_mask_reduce_and_epi16): Ditto.
31708 (_mm256_mask_reduce_or_epi16): Ditto.
31709 (_mm256_mask_reduce_max_epi16): Ditto.
31710 (_mm256_mask_reduce_max_epu16): Ditto.
31711 (_mm256_mask_reduce_min_epi16): Ditto.
31712 (_mm256_mask_reduce_min_epu16): Ditto.
31713 (_mm_mask_reduce_add_epi8): Ditto.
31714 (_mm_mask_reduce_mul_epi8): Ditto.
31715 (_mm_mask_reduce_and_epi8): Ditto.
31716 (_mm_mask_reduce_or_epi8): Ditto.
31717 (_mm_mask_reduce_max_epi8): Ditto.
31718 (_mm_mask_reduce_max_epu8): Ditto.
31719 (_mm_mask_reduce_min_epi8): Ditto.
31720 (_mm_mask_reduce_min_epu8): Ditto.
31721 (_mm256_mask_reduce_add_epi8): Ditto.
31722 (_mm256_mask_reduce_mul_epi8): Ditto.
31723 (_mm256_mask_reduce_and_epi8): Ditto.
31724 (_mm256_mask_reduce_or_epi8): Ditto.
31725 (_mm256_mask_reduce_max_epi8): Ditto.
31726 (_mm256_mask_reduce_max_epu8): Ditto.
31727 (_mm256_mask_reduce_min_epi8): Ditto.
31728 (_mm256_mask_reduce_min_epu8): Ditto.
31730 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31732 * common/config/i386/i386-common.cc
31733 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
31734 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
31735 (OPTION_MASK_ISA_AVX_UNSET):
31736 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
31737 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
31738 * config/i386/i386.md (vpclmulqdqvl): New.
31739 * config/i386/sse.md (pclmulqdq): Add evex encoding.
31740 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
31743 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31745 * config/i386/avx512vlbwintrin.h
31746 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
31747 (_mm_mask_blend_epi8): Ditto.
31748 (_mm256_mask_blend_epi16): Ditto.
31749 (_mm256_mask_blend_epi8): Ditto.
31750 * config/i386/avx512vlintrin.h
31751 (_mm256_mask_blend_pd): Ditto.
31752 (_mm256_mask_blend_ps): Ditto.
31753 (_mm256_mask_blend_epi64): Ditto.
31754 (_mm256_mask_blend_epi32): Ditto.
31755 (_mm_mask_blend_pd): Ditto.
31756 (_mm_mask_blend_ps): Ditto.
31757 (_mm_mask_blend_epi64): Ditto.
31758 (_mm_mask_blend_epi32): Ditto.
31759 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
31760 (VF_AVX512HFBFVL): Move it before the first usage.
31761 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
31762 to VF_AVX512HFBFVL.
31764 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31766 * common/config/i386/i386-common.cc
31767 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
31768 to OPTION_MASK_ISA_AVX512BW_SET.
31769 (OPTION_MASK_ISA_AVX512F_UNSET):
31770 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
31771 (OPTION_MASK_ISA_AVX512BW_UNSET):
31772 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
31773 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
31774 * config/i386/avx512vbmi2vlintrin.h: Ditto.
31775 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
31776 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
31777 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
31778 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
31780 (compressstore<mode>_mask): Ditto.
31781 (expand<mode>_mask): Ditto.
31782 (expand<mode>_maskz): Ditto.
31783 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
31784 VI12_VI48F_AVX512VL.
31786 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31788 * common/config/i386/i386-common.cc
31789 (OPTION_MASK_ISA_AVX512BITALG_SET):
31790 Change OPTION_MASK_ISA_AVX512F_SET
31791 to OPTION_MASK_ISA_AVX512BW_SET.
31792 (OPTION_MASK_ISA_AVX512F_UNSET):
31793 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
31794 (OPTION_MASK_ISA_AVX512BW_UNSET):
31795 Add OPTION_MASK_ISA_AVX512BITALG_SET.
31796 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
31797 * config/i386/i386-builtin.def:
31798 Remove redundant OPTION_MASK_ISA_AVX512BW.
31799 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
31800 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
31801 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
31803 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
31805 * config/i386/i386-expand.cc
31806 (ix86_check_builtin_isa_match): Correct wrong comments.
31807 Add a new macro SHARE_BUILTIN and refactor the current if
31810 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
31812 * config/i386/cpuid.h: Open a new section for Extended Features
31813 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
31816 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
31818 * config/i386/sse.md: Modify insn vperm{i,f}
31821 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
31823 * config/xtensa/xtensa-opts.h: New header.
31824 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
31825 xtensa_strict_align.
31826 * config/xtensa/xtensa.cc (xtensa_option_override): When
31827 -m[no-]strict-align is not specified in the command line set
31828 xtensa_strict_align to 0 if the hardware supports both unaligned
31829 loads and stores or to 1 otherwise.
31830 * config/xtensa/xtensa.opt (mstrict-align): New option.
31831 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
31833 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
31835 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
31838 2023-04-19 Andrew Pinski <apinski@marvell.com>
31840 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
31842 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31844 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
31845 (VECTOR_BOOL_MODE): Ditto.
31846 (ADJUST_NUNITS): Ditto.
31847 (ADJUST_ALIGNMENT): Ditto.
31848 (ADJUST_BYTESIZE): Ditto.
31849 (ADJUST_PRECISION): Ditto.
31850 (RVV_MODES): Ditto.
31851 (VECTOR_MODE_WITH_PREFIX): Ditto.
31852 * config/riscv/riscv-v.cc (ENTRY): Ditto.
31853 (get_vlmul): Ditto.
31854 (get_ratio): Ditto.
31855 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
31856 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
31857 (vbool64_t): Ditto.
31858 (vbool32_t): Ditto.
31859 (vbool16_t): Ditto.
31864 (vint8mf8_t): Ditto.
31865 (vuint8mf8_t): Ditto.
31866 (vint8mf4_t): Ditto.
31867 (vuint8mf4_t): Ditto.
31868 (vint8mf2_t): Ditto.
31869 (vuint8mf2_t): Ditto.
31870 (vint8m1_t): Ditto.
31871 (vuint8m1_t): Ditto.
31872 (vint8m2_t): Ditto.
31873 (vuint8m2_t): Ditto.
31874 (vint8m4_t): Ditto.
31875 (vuint8m4_t): Ditto.
31876 (vint8m8_t): Ditto.
31877 (vuint8m8_t): Ditto.
31878 (vint16mf4_t): Ditto.
31879 (vuint16mf4_t): Ditto.
31880 (vint16mf2_t): Ditto.
31881 (vuint16mf2_t): Ditto.
31882 (vint16m1_t): Ditto.
31883 (vuint16m1_t): Ditto.
31884 (vint16m2_t): Ditto.
31885 (vuint16m2_t): Ditto.
31886 (vint16m4_t): Ditto.
31887 (vuint16m4_t): Ditto.
31888 (vint16m8_t): Ditto.
31889 (vuint16m8_t): Ditto.
31890 (vint32mf2_t): Ditto.
31891 (vuint32mf2_t): Ditto.
31892 (vint32m1_t): Ditto.
31893 (vuint32m1_t): Ditto.
31894 (vint32m2_t): Ditto.
31895 (vuint32m2_t): Ditto.
31896 (vint32m4_t): Ditto.
31897 (vuint32m4_t): Ditto.
31898 (vint32m8_t): Ditto.
31899 (vuint32m8_t): Ditto.
31900 (vint64m1_t): Ditto.
31901 (vuint64m1_t): Ditto.
31902 (vint64m2_t): Ditto.
31903 (vuint64m2_t): Ditto.
31904 (vint64m4_t): Ditto.
31905 (vuint64m4_t): Ditto.
31906 (vint64m8_t): Ditto.
31907 (vuint64m8_t): Ditto.
31908 (vfloat32mf2_t): Ditto.
31909 (vfloat32m1_t): Ditto.
31910 (vfloat32m2_t): Ditto.
31911 (vfloat32m4_t): Ditto.
31912 (vfloat32m8_t): Ditto.
31913 (vfloat64m1_t): Ditto.
31914 (vfloat64m2_t): Ditto.
31915 (vfloat64m4_t): Ditto.
31916 (vfloat64m8_t): Ditto.
31917 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
31918 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
31919 (riscv_convert_vector_bits): Ditto.
31920 * config/riscv/riscv.md:
31921 * config/riscv/vector-iterators.md:
31922 * config/riscv/vector.md
31923 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
31924 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
31925 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
31926 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
31927 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
31928 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
31929 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
31930 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
31931 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
31933 2023-04-19 Pan Li <pan2.li@intel.com>
31935 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
31936 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
31938 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
31942 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
31943 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
31944 for operand 0. Use any_extract code iterator.
31945 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
31946 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
31947 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
31948 (*cmpqi_ext<mode>_1): Use general_operand predicate
31949 for operand 1. Use any_extract code iterator.
31950 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
31951 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
31953 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31955 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
31956 (aarch64_uaddw2<mode>): Delete.
31957 (aarch64_ssubw2<mode>): Delete.
31958 (aarch64_usubw2<mode>): Delete.
31959 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
31961 2023-04-19 Richard Biener <rguenther@suse.de>
31963 * tree-ssa-structalias.cc (do_ds_constraint): Use
31964 solve_add_graph_edge.
31966 2023-04-19 Richard Biener <rguenther@suse.de>
31968 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
31970 (do_sd_constraint): ... here.
31972 2023-04-19 Richard Biener <rguenther@suse.de>
31974 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
31975 rejecting the merge when A contains only a non-local label.
31977 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
31979 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
31980 (VIRTUAL_REGISTER_NUM_P): Ditto.
31981 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
31982 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
31983 * function.cc (instantiate_decl_rtl): Ditto.
31984 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
31985 (nonzero_address_p): Ditto.
31986 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
31988 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
31990 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
31992 2023-04-19 Richard Biener <rguenther@suse.de>
31994 * system.h (auto_mpz::operator->()): New.
31995 * realmpfr.h (auto_mpfr::operator->()): New.
31996 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
31997 * real.cc (real_from_string): Likewise.
31998 (dconst_e_ptr): Likewise.
31999 (dconst_sqrt2_ptr): Likewise.
32000 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
32002 (bound_difference_of_offsetted_base): Likewise.
32003 (number_of_iterations_ne): Likewise.
32004 (number_of_iterations_lt_to_ne): Likewise.
32005 * ubsan.cc: Include realmpfr.h.
32006 (ubsan_instrument_float_cast): Use auto_mpfr.
32008 2023-04-19 Richard Biener <rguenther@suse.de>
32010 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
32011 edges, remove edges from escaped after special-casing them.
32013 2023-04-19 Richard Biener <rguenther@suse.de>
32015 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
32018 2023-04-19 Richard Biener <rguenther@suse.de>
32020 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
32021 to the LHS varinfo solution member.
32023 2023-04-19 Richard Biener <rguenther@suse.de>
32025 * tree-ssa-structalias.cc (topo_visit): Look at the real
32026 destination of edges.
32028 2023-04-19 Richard Biener <rguenther@suse.de>
32030 PR tree-optimization/44794
32031 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
32032 If an epilogue loop is required set its iteration upper bound.
32034 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32037 * config/loongarch/loongarch-protos.h
32038 (loongarch_expand_block_move): Add a parameter as alignment RTX.
32039 * config/loongarch/loongarch.h:
32040 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
32041 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
32042 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
32043 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
32044 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32045 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32046 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
32047 Take the alignment from the parameter, but set it to
32048 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
32049 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
32050 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
32051 (loongarch_block_move_straight): When there are left-over bytes,
32052 half the mode size instead of falling back to byte mode at once.
32053 (loongarch_block_move_loop): Limit the length of loop body with
32054 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32055 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32056 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
32057 to loongarch_expand_block_move.
32059 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32061 * config/loongarch/loongarch.cc
32062 (loongarch_setup_incoming_varargs): Don't save more GARs than
32063 cfun->va_list_gpr_size / UNITS_PER_WORD.
32065 2023-04-19 Richard Biener <rguenther@suse.de>
32067 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
32068 no epilogue condition.
32070 2023-04-19 Richard Biener <rguenther@suse.de>
32072 * gimple.h (gimple_assign_load): Outline...
32073 * gimple.cc (gimple_assign_load): ... here. Avoid
32074 get_base_address and instead just strip the outermost
32075 handled component, treating a remaining handled component
32078 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32080 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
32082 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
32084 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32086 PR tree-optimization/109011
32087 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
32088 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
32089 CLZ, CTZ and FFS. Remove vargs variable, use
32090 gimple_build_call_internal rather than gimple_build_call_internal_vec.
32091 (vect_vect_recog_func_ptrs): Adjust popcount entry.
32093 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32096 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
32097 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
32098 a new REG rather than the SUBREG.
32100 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32102 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
32105 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32108 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
32109 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
32111 2023-04-19 Richard Biener <rguenther@suse.de>
32113 PR rtl-optimization/109237
32114 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
32115 TREE_VISITED on INSN_VAR_LOCATION_DECL.
32116 (delete_trivially_dead_insns): Maintain TREE_VISITED on
32117 active debug bind INSN_VAR_LOCATION_DECL.
32119 2023-04-19 Richard Biener <rguenther@suse.de>
32121 PR rtl-optimization/109237
32122 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
32124 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
32126 * doc/install.texi (enable-decimal-float): Add AArch64.
32128 2023-04-19 liuhongt <hongtao.liu@intel.com>
32130 PR rtl-optimization/109351
32131 * ira.cc (setup_class_subset_and_memory_move_costs): Check
32132 hard_regno_mode_ok before setting lowest memory move cost for
32133 the mode with different reg classes.
32135 2023-04-18 Jason Merrill <jason@redhat.com>
32137 * doc/invoke.texi: Remove stray @gol.
32139 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32141 * ifcvt.cc (cond_move_process_if_block): Consider the result of
32142 targetm.noce_conversion_profitable_p() when replacing the original
32143 sequence with the converted one.
32145 2023-04-18 Mark Harmstone <mark@harmstone.com>
32147 * common.opt (gcodeview): Add new option.
32148 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
32149 * opts.cc (command_handle_option): Similarly.
32150 * doc/invoke.texi: Add documentation for -gcodeview.
32152 2023-04-18 Andrew Pinski <apinski@marvell.com>
32154 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
32155 (make_pass_phiopt): Make execute out of line.
32156 (tree_ssa_cs_elim): Move code into ...
32157 (pass_cselim::execute): here.
32159 2023-04-18 Sam James <sam@gentoo.org>
32161 * system.h: Drop unused INCLUDE_PTHREAD_H.
32163 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
32165 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
32168 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
32170 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
32171 (bswapdi2, bswapsi2): Similarly.
32173 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
32176 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
32177 Use CODE_FOR_sse4_1_insertps_v4sf.
32178 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
32179 (expand_vec_perm_1): Call expand_vec_per_insertps.
32180 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
32181 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
32182 (@sse4_1_insertps_<mode>): New insn pattern.
32183 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
32184 pattern from sse4_1_insertps using VI4F_128 mode iterator.
32186 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32188 * value-range.cc (gt_ggc_mx): New.
32190 * value-range.h (class vrange): Add GTY marker.
32191 (class frange): Same.
32192 (gt_ggc_mx): Remove.
32193 (gt_pch_nx): Remove.
32195 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
32197 * lra-constraints.cc (constraint_unique): New.
32198 (process_address_1): Apply constraint_unique test.
32199 * recog.cc (constrain_operands): Allow relaxed memory
32202 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
32204 * doc/extend.texi (Target Builtins): Add RISC-V Vector
32206 (RISC-V Vector Intrinsics): Document GCC implemented which
32207 version of RISC-V vector intrinsics and its reference.
32209 2023-04-18 Richard Biener <rguenther@suse.de>
32211 PR middle-end/108786
32212 * bitmap.h (bitmap_clear_first_set_bit): New.
32213 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
32214 bitmap_first_set_bit and add optional clearing of the bit.
32215 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
32216 (bitmap_clear_first_set_bit): Likewise.
32217 * df-core.cc (df_worklist_dataflow_doublequeue): Use
32218 bitmap_clear_first_set_bit.
32219 * graphite-scop-detection.cc (scop_detection::merge_sese):
32221 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
32222 (sanitize_asan_mark_poison): Likewise.
32223 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
32224 * tree-into-ssa.cc (rewrite_blocks): Likewise.
32225 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
32226 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
32228 2023-04-18 Richard Biener <rguenther@suse.de>
32230 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
32231 (dump_sa_points_to_info): ... this function.
32232 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
32233 and call dump_sa_stats guarded with TDF_STATS.
32234 (ipa_pta_execute): Likewise.
32235 (compute_may_aliases): Guard dump_alias_info with
32236 TDF_DETAILS|TDF_ALIAS.
32238 2023-04-18 Andrew Pinski <apinski@marvell.com>
32240 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
32241 the expression that is being tried when TDF_FOLDING
32243 (phiopt_worker::match_simplify_replacement): Dump
32244 the sequence which was created by gimple_simplify_phiopt
32245 when TDF_FOLDING is true.
32247 2023-04-18 Andrew Pinski <apinski@marvell.com>
32249 * tree-ssa-phiopt.cc (match_simplify_replacement):
32250 Simplify code that does the movement slightly.
32252 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32254 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
32256 (rev16<mode>2): Rename to...
32257 (aarch64_rev16<mode>2_alt1): ... This.
32258 (rev16<mode>2_alt): Rename to...
32259 (*aarch64_rev16<mode>2_alt2): ... This.
32261 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32263 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
32264 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
32266 * range-op-float.cc (zero_range): Use dconstm0.
32267 (zero_to_inf_range): Same.
32268 * real.h (dconstm0): New.
32269 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
32270 (frange::set_zero): Do not declare dconstm0.
32272 2023-04-18 Richard Biener <rguenther@suse.de>
32274 * system.h (class auto_mpz): New,
32275 * realmpfr.h (class auto_mpfr): Likewise.
32276 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
32277 (do_mpfr_arg2): Likewise.
32278 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
32280 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32282 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
32283 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
32285 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32287 * value-range.cc (frange::operator==): Adjust for NAN.
32288 (range_tests_nan): Remove some NAN tests.
32290 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32292 * inchash.cc (hash::add_real_value): New.
32293 * inchash.h (class hash): Add add_real_value.
32294 * value-range.cc (add_vrange): New.
32295 * value-range.h (inchash::add_vrange): New.
32297 2023-04-18 Richard Biener <rguenther@suse.de>
32299 PR tree-optimization/109539
32300 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
32301 Re-implement pointer relatedness for PHIs.
32303 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
32305 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
32306 (SV_FP): New iterator.
32307 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
32308 (recip<mode>2): Unify the two patterns using SV_FP.
32309 (div_scale<mode><exec_vcc>): New insn.
32310 (div_fmas<mode><exec>): New insn.
32311 (div_fixup<mode><exec>): New insn.
32312 (div<mode>3): Unify the two expanders and rewrite using hardfp.
32313 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
32314 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
32315 and UNSPEC_DIV_FIXUP.
32316 (vccwait): New attribute.
32318 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32320 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
32321 if the argument matches that.
32323 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32325 * config/aarch64/atomics.md
32326 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
32327 Use SD_HSDI for destination mode iterator.
32329 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
32331 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
32332 of z-extensions and s-extensions.
32333 (riscv_subset_list::parse): Likewise.
32335 2023-04-18 Jakub Jelinek <jakub@redhat.com>
32337 PR tree-optimization/109240
32338 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
32339 first vec_perm operand and minus as second using fneg/fadd and
32340 minus as first vec_perm operand and plus as second using fneg/fsub.
32342 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32344 * data-streamer.cc (bp_pack_real_value): New.
32345 (bp_unpack_real_value): New.
32346 * data-streamer.h (bp_pack_real_value): New.
32347 (bp_unpack_real_value): New.
32348 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
32349 bp_unpack_real_value.
32350 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
32351 bp_pack_real_value.
32353 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32355 * wide-int.h (WIDE_INT_MAX_HWIS): New.
32356 (class fixed_wide_int_storage): Use it.
32357 (trailing_wide_ints <N>::set_precision): Use it.
32358 (trailing_wide_ints <N>::extra_size): Use it.
32360 2023-04-18 Xi Ruoyao <xry111@xry111.site>
32362 * config/loongarch/loongarch-protos.h
32363 (loongarch_addu16i_imm12_operand_p): New function prototype.
32364 (loongarch_split_plus_constant): Likewise.
32365 * config/loongarch/loongarch.cc
32366 (loongarch_addu16i_imm12_operand_p): New function.
32367 (loongarch_split_plus_constant): Likewise.
32368 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
32369 (DUAL_IMM12_OPERAND): Likewise.
32370 (DUAL_ADDU16I_OPERAND): Likewise.
32371 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
32373 * config/loongarch/predicates.md (const_dual_imm12_operand): New
32375 (const_addu16i_operand): Likewise.
32376 (const_addu16i_imm12_di_operand): Likewise.
32377 (const_addu16i_imm12_si_operand): Likewise.
32378 (plus_di_operand): Likewise.
32379 (plus_si_operand): Likewise.
32380 (plus_si_extend_operand): Likewise.
32381 * config/loongarch/loongarch.md (add<mode>3): Convert to
32382 define_insn_and_split. Use plus_<mode>_operand predicate
32383 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
32384 and Le constraints.
32385 (*addsi3_extended): Convert to define_insn_and_split. Use
32386 plus_si_extend_operand instead of arith_operand. Add
32387 alternatives for La and Le alternatives.
32389 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32391 * value-range.h (Value_Range::Value_Range): New.
32392 (Value_Range::contains_p): New.
32394 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32396 * value-range.h (class vrange): Make m_discriminator const.
32397 (class irange): Make m_max_ranges const. Adjust constructors
32399 (class unsupported_range): Construct vrange appropriately.
32400 (class frange): Same.
32402 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
32404 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
32407 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
32409 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
32411 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
32413 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
32415 (riscv_expand_epilogue): Likewise.
32417 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
32419 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
32421 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
32423 2023-04-17 Andrew Pinski <apinski@marvell.com>
32425 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
32428 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
32430 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
32433 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
32435 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
32436 parameter remaining_size.
32437 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
32438 (riscv_expand_prologue): Likewise.
32439 (riscv_expand_epilogue): Likewise.
32441 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
32443 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
32444 roriw for constant counts.
32445 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
32446 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
32447 (simplify_context::simplify_binary_operation_1): Use it.
32448 * expmed.cc (expand_shift_1): Likewise.
32450 2023-04-17 Martin Jambor <mjambor@suse.cz>
32454 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
32455 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
32456 (ipa_zap_jf_refdesc): New function.
32457 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
32458 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
32459 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
32460 the new parameter of find_reference.
32461 (adjust_references_in_caller): Likewise. Make sure the constant jump
32462 function is not used to decrement a refdec counter again. Only
32463 decrement refdesc counters when the pass_through jump function allows
32464 it. Added a detailed dump when decrementing refdesc counters.
32465 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
32466 (ipa_set_jf_simple_pass_through): Initialize the new flag.
32467 (ipa_set_jf_unary_pass_through): Likewise.
32468 (ipa_set_jf_arith_pass_through): Likewise.
32469 (remove_described_reference): Provide a value for the new parameter of
32471 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
32472 the previous pass_through had a flag mandating that we do so.
32473 (propagate_controlled_uses): Likewise. Only decrement refdesc
32474 counters when the pass_through jump function allows it.
32475 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
32476 parameter of find_reference.
32477 (ipa_write_jump_function): Assert the new flag does not have to be
32479 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
32482 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
32483 Di Zhao <di.zhao@amperecomputing.com>
32485 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
32486 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
32487 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
32488 Check for the above tuning option when processing loads.
32490 2023-04-17 Richard Biener <rguenther@suse.de>
32492 PR tree-optimization/109524
32493 * tree-vrp.cc (remove_unreachable::m_list): Change to a
32494 vector of pairs of block indices.
32495 (remove_unreachable::maybe_register_block): Adjust.
32496 (remove_unreachable::remove_and_update_globals): Likewise.
32497 Deal with removed blocks.
32499 2023-04-16 Jeff Law <jlaw@ventanamicro>
32502 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
32503 TARGET_SFB_ALU, force the true arm into a register.
32505 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
32508 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
32509 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
32511 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
32512 (pa_function_arg_size): Change return type to int. Return zero
32513 for arguments larger than 1 GB. Update comments.
32515 2023-04-15 Jakub Jelinek <jakub@redhat.com>
32517 PR tree-optimization/109154
32518 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
32519 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
32521 2023-04-15 Jason Merrill <jason@redhat.com>
32524 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
32525 Overhaul lhs_ref.ref analysis.
32527 2023-04-14 Richard Biener <rguenther@suse.de>
32529 PR tree-optimization/109502
32530 * tree-vect-stmts.cc (vectorizable_assignment): Fix
32531 check for conversion between mask and non-mask types.
32533 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
32534 Jakub Jelinek <jakub@redhat.com>
32538 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
32539 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
32540 smaller than word_mode.
32541 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
32542 <case AND>: Likewise.
32544 2023-04-14 Jakub Jelinek <jakub@redhat.com>
32546 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
32549 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
32551 PR tree-optimization/108139
32552 PR tree-optimization/109462
32553 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
32554 equivalency check for PHI nodes.
32555 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
32556 does not dominate single-arg equivalency edges.
32558 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
32561 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
32562 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
32564 2023-04-13 Richard Biener <rguenther@suse.de>
32566 PR tree-optimization/109491
32567 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
32568 NULL operands test.
32570 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32573 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
32574 (vint16mf4_t): Ditto.
32575 (vint32mf2_t): Ditto.
32576 (vint64m1_t): Ditto.
32577 (vint64m2_t): Ditto.
32578 (vint64m4_t): Ditto.
32579 (vint64m8_t): Ditto.
32580 (vuint8mf8_t): Ditto.
32581 (vuint16mf4_t): Ditto.
32582 (vuint32mf2_t): Ditto.
32583 (vuint64m1_t): Ditto.
32584 (vuint64m2_t): Ditto.
32585 (vuint64m4_t): Ditto.
32586 (vuint64m8_t): Ditto.
32587 (vfloat32mf2_t): Ditto.
32588 (vbool64_t): Ditto.
32589 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
32590 (register_vector_type): Ditto.
32591 (check_required_extensions): Fix condition.
32592 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
32593 (RVV_REQUIRE_ELEN_64): New define.
32594 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
32595 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
32596 (TARGET_VECTOR_FP64): Ditto.
32597 (ENTRY): Fix predicate.
32598 * config/riscv/vector-iterators.md: Fix predicate.
32600 2023-04-12 Jakub Jelinek <jakub@redhat.com>
32602 PR tree-optimization/109410
32603 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
32604 block if first statement of the function is a call to returns_twice
32607 2023-04-12 Jakub Jelinek <jakub@redhat.com>
32610 * config/i386/i386.cc: Include rtl-error.h.
32611 (ix86_print_operand): For z modifier warning, use warning_for_asm
32612 if this_is_asm_operands. For Z modifier errors, use %c and code
32613 instead of hardcoded Z.
32615 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
32617 * config/i386/x-mingw32-utf8: Remove extrataneous $@
32619 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
32621 PR tree-optimization/109462
32622 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
32623 check for equivalences if NAME is a phi node.
32625 2023-04-12 Richard Biener <rguenther@suse.de>
32627 PR tree-optimization/109473
32628 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
32629 Convert scalar result to the computation type before performing
32630 the reduction adjustment.
32632 2023-04-12 Richard Biener <rguenther@suse.de>
32634 PR tree-optimization/109469
32635 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
32636 a returns-twice call.
32638 2023-04-12 Richard Biener <rguenther@suse.de>
32640 PR tree-optimization/109434
32641 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
32642 handle possibly throwing calls when processing the LHS
32643 and may-defs are not OK.
32645 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
32647 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
32648 predicate to avoid splitting arith constants.
32650 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
32651 Pan Li <pan2.li@intel.com>
32652 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32653 Kito Cheng <kito.cheng@sifive.com>
32656 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
32657 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
32658 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
32659 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
32660 (riscv_zero_call_used_regs): New.
32661 (TARGET_ZERO_CALL_USED_REGS): New.
32663 2023-04-11 Martin Liska <mliska@suse.cz>
32666 * opts.cc (finish_options): Drop also
32667 x_flag_var_tracking_assignments.
32669 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
32671 PR tree-optimization/108888
32672 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
32674 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
32677 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
32678 (vsx_sign_extend_v16qi_<mode>): ... this.
32679 (vsx_sign_extend_hi_<mode>): Rename to...
32680 (vsx_sign_extend_v8hi_<mode>): ... this.
32681 (vsx_sign_extend_si_v2di): Rename to...
32682 (vsx_sign_extend_v4si_v2di): ... this.
32683 (vsignextend_qi_<mode>): Remove.
32684 (vsignextend_hi_<mode>): Remove.
32685 (vsignextend_si_v2di): Remove.
32686 (vsignextend_v2di_v1ti): Remove.
32687 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
32688 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
32689 with gen_vsx_sign_extend_v16qi_v4si.
32690 * config/rs6000/rs6000.md (split for DI constant generation):
32691 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
32692 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
32693 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
32694 with gen_vsx_sign_extend_v16qi_si.
32695 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
32696 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
32697 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
32698 vsx_sign_extend_v16qi_v4si.
32699 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
32700 vsx_sign_extend_v8hi_v2di.
32701 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
32702 vsx_sign_extend_v8hi_v4si.
32703 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
32704 vsx_sign_extend_si_v2di.
32705 (__builtin_altivec_vsignext): Set bif-pattern to
32706 vsx_sign_extend_v2di_v1ti.
32707 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
32708 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
32709 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
32710 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
32712 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
32715 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
32716 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
32718 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
32720 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
32722 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
32724 * common/config/i386/cpuinfo.h (get_available_features):
32725 Detect AMX-COMPLEX.
32726 * common/config/i386/i386-common.cc
32727 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
32728 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
32729 (ix86_handle_option): Handle -mamx-complex.
32730 * common/config/i386/i386-cpuinfo.h (enum processor_features):
32731 Add FEATURE_AMX_COMPLEX.
32732 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
32734 * config.gcc: Add amxcomplexintrin.h.
32735 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
32736 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
32738 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
32739 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
32740 Handle amx-complex.
32741 * config/i386/i386.opt: Add option -mamx-complex.
32742 * config/i386/immintrin.h: Include amxcomplexintrin.h.
32743 * doc/extend.texi: Document amx-complex.
32744 * doc/invoke.texi: Document -mamx-complex.
32745 * doc/sourcebuild.texi: Document target amx-complex.
32746 * config/i386/amxcomplexintrin.h: New file.
32748 2023-04-08 Jakub Jelinek <jakub@redhat.com>
32750 PR tree-optimization/109392
32751 * tree-vect-generic.cc (tree_vec_extract): Handle failure
32752 of maybe_push_res_to_seq better.
32754 2023-04-08 Jakub Jelinek <jakub@redhat.com>
32756 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
32758 (SYSTEM_H): Depend on $(HASHTAB_H).
32759 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
32760 dependency on $(RTL_BASE_H), remove redundant dependency on
32763 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
32766 * config/arm/arm.cc (arm_effective_regno): New function.
32767 (mve_vector_mem_operand): Use it.
32769 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
32771 PR tree-optimization/109417
32772 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
32773 dependency is in SSA_NAME_FREE_LIST.
32775 2023-04-06 Andrew Pinski <apinski@marvell.com>
32777 PR tree-optimization/109427
32778 * params.opt (-param=vect-induction-float=):
32779 Fix option attribute typo for IntegerRange.
32781 2023-04-05 Jeff Law <jlaw@ventanamicro>
32784 * combine.cc (combine_instructions): Force re-recognition when
32785 after restoring the body of an insn to its original form.
32787 2023-04-05 Martin Jambor <mjambor@suse.cz>
32790 * ipa-sra.cc (zap_useless_ipcp_results): New function.
32791 (process_isra_node_results): Call it.
32793 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32795 * config/riscv/vector.md: Fix incorrect operand order.
32797 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32799 * config/riscv/riscv-vsetvl.cc
32800 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
32803 2023-04-05 Li Xu <xuli1@eswincomputing.com>
32805 * config/riscv/riscv-vector-builtins.def: Fix typo.
32806 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
32807 * config/riscv/vector-iterators.md: Ditto.
32809 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
32811 * doc/md.texi (Including Patterns): Fix page break.
32813 2023-04-04 Jakub Jelinek <jakub@redhat.com>
32815 PR tree-optimization/109386
32816 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
32817 foperator_le::op1_range, foperator_le::op2_range,
32818 foperator_gt::op1_range, foperator_gt::op2_range,
32819 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
32820 BRS_FALSE case even if the other op is maybe_isnan, not just
32822 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
32823 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
32824 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
32825 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
32826 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
32827 not just known_isnan.
32829 2023-04-04 Marek Polacek <polacek@redhat.com>
32831 PR sanitizer/109107
32832 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
32834 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
32836 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
32838 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
32839 (mve_vcreateq_f<mode>): Swap operands.
32841 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
32843 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
32845 2023-04-04 Jakub Jelinek <jakub@redhat.com>
32848 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
32849 Reword diagnostics about zfinx conflict with f, formatting fixes.
32851 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
32853 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
32855 2023-04-04 Richard Biener <rguenther@suse.de>
32857 PR tree-optimization/109304
32858 * tree-profile.cc (tree_profiling): Use symtab node
32859 availability to decide whether to skip adjusting calls.
32860 Do not adjust calls to internal functions.
32862 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
32865 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
32866 function for permutation control vector by considering big endianness.
32868 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
32871 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
32872 (rs6000_vprtyb<mode>2): ... this.
32873 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
32874 rs6000_vprtybv2di2.
32875 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
32876 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
32877 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
32878 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
32880 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
32881 Sandra Loosemore <sandra@codesourcery.com>
32883 * doc/md.texi (Insn Splitting): Tweak wording for readability.
32885 2023-04-03 Martin Jambor <mjambor@suse.cz>
32888 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
32889 offset + size will be representable in unsigned int.
32891 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
32893 * configure.ac (ZSTD_LIB): Move before zstd.h check.
32894 Unset gcc_cv_header_zstd_h without libzstd.
32895 * configure: Regenerate.
32897 2023-04-03 Martin Liska <mliska@suse.cz>
32899 * doc/invoke.texi: Document new param.
32901 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
32903 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
32904 new check_effective_target function.
32906 2023-04-03 Li Xu <xuli1@eswincomputing.com>
32908 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
32909 (vfloat32m8_t): Likewise
32911 2023-04-03 liuhongt <hongtao.liu@intel.com>
32913 * doc/md.texi: Document signbitm2.
32915 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32916 kito-cheng <kito.cheng@sifive.com>
32918 * config/riscv/vector.md: Fix RA constraint.
32920 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32922 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
32923 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
32924 * config/riscv/vector.md: Fix scalar move bug.
32926 2023-04-01 Jakub Jelinek <jakub@redhat.com>
32928 * range-op-float.cc (foperator_equal::fold_range): If at least
32929 one of the op ranges is not singleton and neither is NaN and all
32930 4 bounds are zero, return [1, 1].
32931 (foperator_not_equal::fold_range): In the same case return [0, 0].
32933 2023-04-01 Jakub Jelinek <jakub@redhat.com>
32935 * range-op-float.cc (foperator_equal::fold_range): Perform the
32936 non-singleton handling regardless of maybe_isnan (op1, op2).
32937 (foperator_not_equal::fold_range): Likewise.
32938 (foperator_lt::fold_range, foperator_le::fold_range,
32939 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
32940 real_* comparison check which results in range_false (type)
32941 even if maybe_isnan (op1, op2). Simplify.
32942 (foperator_ltgt): New class.
32943 (fop_ltgt): New variable.
32944 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
32947 2023-04-01 Jakub Jelinek <jakub@redhat.com>
32950 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
32951 returns VOIDmode, handle it like if the register isn't used for
32952 passing arguments at all.
32953 (apply_result_size): If targetm.calls.get_raw_result_mode returns
32954 VOIDmode, handle it like if the register isn't used for returning
32956 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
32957 means to return VOIDmode.
32958 * doc/tm.texi: Regenerated.
32959 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
32960 TARGET_SVE for P0_REGNUM.
32961 (aarch64_function_arg_regno_p): Also return true for p0-p3.
32962 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
32964 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
32966 * lra-constraints.cc: (combine_reload_insn): New function.
32968 2023-03-31 Jakub Jelinek <jakub@redhat.com>
32970 PR tree-optimization/91645
32971 * range-op-float.cc (foperator_unordered_lt::fold_range,
32972 foperator_unordered_le::fold_range,
32973 foperator_unordered_gt::fold_range,
32974 foperator_unordered_ge::fold_range,
32975 foperator_unordered_equal::fold_range): Call the ordered
32976 fold_range on ranges with cleared NaNs.
32977 * value-query.cc (range_query::get_tree_range): Handle also
32978 COMPARISON_CLASS_P trees.
32980 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
32981 Andrew Pinski <pinskia@gmail.com>
32984 * config/riscv/t-riscv: Add missing dependencies.
32986 2023-03-31 liuhongt <hongtao.liu@intel.com>
32988 * config/i386/i386.cc (inline_memory_move_cost): Return 100
32989 for MASK_REGS when MODE_SIZE > 8.
32991 2023-03-31 liuhongt <hongtao.liu@intel.com>
32994 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
32995 ufloat/ufix to floatuns/fixuns.
32996 * config/i386/i386-expand.cc
32997 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
32998 * config/i386/sse.md
32999 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
33001 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
33002 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
33004 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
33006 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
33008 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
33009 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
33010 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
33011 (ufloatv2siv2df2<mask_name>): Renamed to ..
33012 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
33013 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33015 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33017 (ufix_notruncv2dfv2si2): Renamed to ..
33018 (fixuns_notruncv2dfv2si2):.. this.
33019 (ufix_notruncv2dfv2si2_mask): Renamed to ..
33020 (fixuns_notruncv2dfv2si2_mask): .. this.
33021 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
33022 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
33023 (ufix_truncv2dfv2si2): Renamed to ..
33024 (*fixuns_truncv2dfv2si2): .. this.
33025 (ufix_truncv2dfv2si2_mask): Renamed to ..
33026 (fixuns_truncv2dfv2si2_mask): .. this.
33027 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
33028 (*fixuns_truncv2dfv2si2_mask_1): .. this.
33029 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
33030 (fixuns_truncv4dfv4si2<mask_name>): .. this.
33031 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33033 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33035 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
33036 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
33039 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
33041 PR tree-optimization/109154
33042 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
33043 * gimple-range-gori.h (may_recompute_p): Add depth param.
33044 * params.opt (ranger-recompute-depth): New param.
33046 2023-03-30 Jason Merrill <jason@redhat.com>
33050 * cgraph.h: Move reset() from cgraph_node to symtab_node.
33051 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
33052 remove_from_same_comdat_group.
33054 2023-03-30 Richard Biener <rguenther@suse.de>
33056 PR tree-optimization/107561
33057 * gimple-ssa-warn-access.cc (get_size_range): Add flags
33058 argument and pass it on.
33059 (check_access): When querying for the size range pass
33060 SR_ALLOW_ZERO when the known destination size is zero.
33062 2023-03-30 Richard Biener <rguenther@suse.de>
33064 PR tree-optimization/109342
33065 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
33066 overload for edge. When that edge is a backedge use
33067 dominated_by_p directly.
33069 2023-03-30 liuhongt <hongtao.liu@intel.com>
33071 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
33072 vpblendd instead of vpblendw for V4SI under avx2.
33074 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
33076 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
33077 for many quick operands, for register-sized modes.
33079 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
33081 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
33084 2023-03-29 Martin Liska <mliska@suse.cz>
33086 PR bootstrap/109310
33087 * configure.ac: Emit a warning for deprecated option
33088 --enable-link-mutex.
33089 * configure: Regenerate.
33091 2023-03-29 Richard Biener <rguenther@suse.de>
33093 PR tree-optimization/109331
33094 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
33095 discover a taken edge make sure to cleanup the CFG.
33097 2023-03-29 Richard Biener <rguenther@suse.de>
33099 PR tree-optimization/109327
33100 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
33101 already removed stmts when draining to_remove.
33103 2023-03-29 Richard Biener <rguenther@suse.de>
33106 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
33107 so we can re-create the DIE for the type if required.
33109 2023-03-29 Jakub Jelinek <jakub@redhat.com>
33110 Richard Biener <rguenther@suse.de>
33112 PR tree-optimization/109301
33113 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
33114 properties_provided from PROP_gimple_opt_math to 0.
33115 (pass_data_expand_powcabs): Change properties_provided from 0 to
33116 PROP_gimple_opt_math.
33118 2023-03-29 Richard Biener <rguenther@suse.de>
33120 PR tree-optimization/109154
33121 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
33122 inverted condition specially by inverting at the caller.
33123 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
33125 2023-03-28 David Malcolm <dmalcolm@redhat.com>
33128 * diagnostic-show-locus.cc (column_range::column_range): Factor
33129 out assertion conditional into...
33130 (column_range::valid_p): ...this new function.
33131 (line_corrections::add_hint): Don't attempt to consolidate hints
33132 if it would lead to invalid column_range instances.
33134 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
33137 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
33138 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
33141 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
33143 PR rtl-optimization/109187
33144 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
33145 subtraction in three-way comparison.
33147 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
33149 PR tree-optimization/109265
33150 PR tree-optimization/109274
33151 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
33152 not create a relation record is op1 and op2 are the same symbol.
33153 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
33154 handler for this stmt, but create a new record only if this statement
33155 generates a relation based on the ranges.
33156 (gori_compute::compute_operand2_range): Ditto.
33157 * value-relation.h (value_relation::set_relation): Always create the
33158 record that is requested.
33160 2023-03-28 Richard Biener <rguenther@suse.de>
33162 PR tree-optimization/107087
33163 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
33164 executable regions to avoid useless work and to better
33165 propagate degenerate PHIs.
33167 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
33169 * config/i386/x-mingw32-utf8: update comments.
33171 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
33174 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
33175 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
33177 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
33179 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
33180 after inlining. Record which decls are loaded from. Fix handling
33181 of vops for loads and stores.
33182 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
33183 (aarch64_accesses_vector_load_decl_p): Likewise.
33184 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
33186 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
33187 that loads from a decl, treat vector stores to those decls as
33189 (aarch64_vector_costs::finish_cost): ...and in that case,
33190 if the vector code does nothing more than a store, give the
33191 prologue a zero cost as well.
33193 2023-03-28 Richard Biener <rguenther@suse.de>
33196 PR tree-optimization/108129
33197 * genmatch.cc (lower_for): For (match ...) delay
33198 substituting into the match operator if possible.
33199 (dt_operand::gen_gimple_expr): For user_id look at the
33200 first substitute for determining how to access operands.
33201 (dt_operand::gen_generic_expr): Likewise.
33202 (dt_node::gen_kids): Properly sort user_ids according
33203 to their substitutes.
33204 (dt_node::gen_kids_1): Code-generate user_id matching.
33206 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33207 Jonathan Wakely <jwakely@redhat.com>
33209 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
33210 Use subcommand rather than sub-command in function comments.
33212 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33214 PR tree-optimization/109154
33215 * value-range.h (frange::flush_denormals_to_zero): Make it public
33216 rather than private.
33217 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
33219 * range-op-float.cc (range_operator_float::fold_range): Call
33220 flush_denormals_to_zero.
33222 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33224 PR middle-end/106190
33225 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
33226 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
33228 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33230 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
33231 as 4th argument to set to avoid clear_nan and union_ calls.
33233 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33236 * config/i386/i386.cc (assign_386_stack_local): For DImode
33237 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
33238 align 32 rather than 0 to assign_stack_local.
33240 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
33243 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
33244 on operand #3 to get the final condition code. Use std::swap.
33245 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
33246 (fucmp<gcond:code>8<P:mode>_vis): Move around.
33247 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
33248 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
33250 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
33252 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
33253 top-level sections.
33255 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
33257 * config.host: Pull in i386/x-mingw32-utf8 Makefile
33258 fragment and reference utf8rc-mingw32.o explicitly
33260 * config/i386/sym-mingw32.cc: prevent name mangling of
33262 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
33263 depend on manifest file explicitly.
33265 2023-03-28 Richard Biener <rguenther@suse.de>
33268 2023-03-27 Richard Biener <rguenther@suse.de>
33270 PR rtl-optimization/109237
33271 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
33273 2023-03-28 Richard Biener <rguenther@suse.de>
33275 * common.opt (gdwarf): Remove Negative(gdwarf-).
33277 2023-03-28 Richard Biener <rguenther@suse.de>
33279 * common.opt (gdwarf): Add RejectNegative.
33280 (gdwarf-): Likewise.
33284 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33286 * config/cris/constraints.md ("T"): Correct to
33287 define_memory_constraint.
33289 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33291 * config/cris/cris.md (BW2): New mode-iterator.
33292 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
33295 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33297 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
33298 for possible eliminable compares.
33300 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33302 * config/cris/constraints.md ("R"): Remove unused constraint.
33304 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
33306 PR gcov-profile/109297
33307 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
33308 (merge_stream_usage): Likewise.
33309 (overlap_usage): Likewise.
33311 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
33314 * config/riscv/thead.md: Add missing mode specifiers.
33316 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
33317 Jiangning Liu <jiangning.liu@amperecomputing.com>
33318 Manolis Tsamis <manolis.tsamis@vrull.eu>
33320 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
33322 2023-03-27 Richard Biener <rguenther@suse.de>
33324 PR rtl-optimization/109237
33325 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
33327 2023-03-27 Richard Biener <rguenther@suse.de>
33330 * lto-wrapper.cc (run_gcc): Parse alternate debug options
33331 as well, they always enable debug.
33333 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
33336 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
33338 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
33340 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
33343 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
33344 than zero when calling vec_sld.
33345 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
33346 zero when calling vec_sld.
33347 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
33348 than zero when calling vec_sld.
33350 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
33352 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
33353 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
33354 loops are represented and which fields are vectors. Add
33355 documentation for OMP_FOR_PRE_BODY field. Document internal
33356 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
33357 * tree.def (OMP_FOR): Make documentation consistent with the
33358 Texinfo manual, to fill some gaps and correct errors.
33360 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
33363 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
33364 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
33365 (handle_move_double): Call it before handle_movsi.
33366 * config/m68k/m68k-protos.h: Declare it.
33368 2023-03-26 Jakub Jelinek <jakub@redhat.com>
33370 PR tree-optimization/109230
33371 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
33373 2023-03-26 Jakub Jelinek <jakub@redhat.com>
33376 * predict.cc (compute_function_frequency): Don't call
33377 warn_function_cold if function already has cold attribute.
33379 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
33381 * doc/install.texi: Remove anachronistic note
33382 related to languages built and separate source tarballs.
33384 2023-03-25 David Malcolm <dmalcolm@redhat.com>
33387 * diagnostic-format-sarif.cc (read_until_eof): Delete.
33388 (maybe_read_file): Delete.
33389 (sarif_builder::maybe_make_artifact_content_object): Use
33390 get_source_file_content rather than maybe_read_file.
33391 Reject it if it's not valid UTF-8.
33392 * input.cc (file_cache_slot::get_full_file_content): New.
33393 (get_source_file_content): New.
33394 (selftest::check_cpp_valid_utf8_p): New.
33395 (selftest::test_cpp_valid_utf8_p): New.
33396 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
33397 * input.h (get_source_file_content): New prototype.
33399 2023-03-24 David Malcolm <dmalcolm@redhat.com>
33401 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
33403 (Special Functions for Debugging the Analyzer): Convert to a
33404 table, and rewrite in places.
33405 (Other Debugging Techniques): Add notes on how to compare two
33406 different exploded graphs.
33408 2023-03-24 David Malcolm <dmalcolm@redhat.com>
33411 * json.cc: Update comments to indicate that we now preserve
33412 insertion order of keys within objects.
33413 (object::print): Traverse keys in insertion order.
33414 (object::set): Preserve insertion order of keys.
33415 (selftest::test_writing_objects): Add an additional key to verify
33416 that we preserve insertion order.
33417 * json.h (object::m_keys): New field.
33419 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
33421 PR tree-optimization/109238
33422 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
33423 predecessors which this block dominates.
33425 2023-03-24 Richard Biener <rguenther@suse.de>
33427 PR tree-optimization/106912
33428 * tree-profile.cc (tree_profiling): Update stmts only when
33429 profiling or testing coverage. Make sure to update calls
33430 fntype, stripping 'const' there.
33432 2023-03-24 Jakub Jelinek <jakub@redhat.com>
33434 PR middle-end/109258
33435 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
33436 if target == const0_rtx.
33438 2023-03-24 Alexandre Oliva <oliva@adacore.com>
33440 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
33441 Document options and effective targets.
33443 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
33445 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
33448 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
33450 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
33451 non-earlyclobber alternative.
33453 2023-03-23 Andrew Pinski <apinski@marvell.com>
33456 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
33459 2023-03-23 Richard Biener <rguenther@suse.de>
33461 PR tree-optimization/107569
33462 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
33463 Do not push SSA names with zero uses as available leader.
33464 (process_bb): Likewise.
33466 2023-03-23 Richard Biener <rguenther@suse.de>
33468 PR tree-optimization/109262
33469 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
33470 combining a piecewise complex load avoid touching loads
33471 that throw internally. Use fun, not cfun throughout.
33473 2023-03-23 Jakub Jelinek <jakub@redhat.com>
33475 * value-range.cc (irange::irange_union, irange::intersect): Fix
33476 comment spelling bugs.
33477 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
33478 * gimple-range-trace.h: Likewise.
33479 * gimple-range-edge.cc: Likewise.
33480 (gimple_outgoing_range_stmt_p,
33481 gimple_outgoing_range::switch_edge_range,
33482 gimple_outgoing_range::edge_range_p): Likewise.
33483 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
33484 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
33485 assume_query::assume_query, assume_query::calculate_phi): Likewise.
33486 * gimple-range-edge.h: Likewise.
33487 * value-range.h (Value_Range::set, Value_Range::lower_bound,
33488 Value_Range::upper_bound, frange::set_undefined): Likewise.
33489 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
33490 gori_compute): Likewise.
33491 * gimple-range-fold.h (fold_using_range): Likewise.
33492 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
33494 * gimple-range-gori.cc (range_def_chain::in_chain_p,
33495 range_def_chain::dump, gori_map::calculate_gori,
33496 gori_compute::compute_operand_range_switch,
33497 gori_compute::logical_combine, gori_compute::refine_using_relation,
33498 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
33500 * gimple-range.h: Likewise.
33501 (enable_ranger): Likewise.
33502 * range-op.h (empty_range_varying): Likewise.
33503 * value-query.h (value_query): Likewise.
33504 * gimple-range-cache.cc (block_range_cache::set_bb_range,
33505 block_range_cache::dump, ssa_global_cache::clear_global_range,
33506 temporal_cache::temporal_value, temporal_cache::current_p,
33507 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
33508 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
33510 * gimple-range-fold.cc (fur_edge::get_phi_operand,
33511 fur_stmt::get_operand, gimple_range_adjustment,
33512 fold_using_range::range_of_phi,
33513 fold_using_range::relation_fold_and_or): Likewise.
33514 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
33515 * value-query.cc (range_query::value_of_expr,
33516 range_query::value_on_edge, range_query::query_relation): Likewise.
33517 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
33518 intersect_range_with_nonzero_bits): Likewise.
33519 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
33520 exit_range): Likewise.
33521 * value-relation.h: Likewise.
33522 (equiv_oracle, relation_trio::relation_trio, value_relation,
33523 value_relation::value_relation, pe_min): Likewise.
33524 * range-op-float.cc (range_operator_float::rv_fold,
33525 frange_arithmetic, foperator_unordered_equal::op1_range,
33526 foperator_div::rv_fold): Likewise.
33527 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
33528 * value-relation.cc (equiv_oracle::query_relation,
33529 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
33530 value_relation::apply_transitive, relation_chain_head::find_relation,
33531 dom_oracle::query_relation, dom_oracle::find_relation_block,
33532 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
33533 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
33534 create_possibly_reversed_range, adjust_op1_for_overflow,
33535 operator_mult::wi_fold, operator_exact_divide::op1_range,
33536 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
33537 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
33538 range_op_lshift_tests): Likewise.
33540 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
33542 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
33543 (move_callee_saved_registers): Detect the bug condition early.
33545 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
33547 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
33548 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
33550 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
33551 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
33552 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
33553 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
33554 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
33556 2023-03-23 Jakub Jelinek <jakub@redhat.com>
33558 PR tree-optimization/109176
33559 * tree-vect-generic.cc (expand_vector_condition): If a has
33560 vector boolean type and is a comparison, also check if both
33561 the comparison and VEC_COND_EXPR could be successfully expanded
33564 2023-03-23 Pan Li <pan2.li@intel.com>
33565 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33569 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
33570 for vector mask modes.
33571 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
33572 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
33574 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
33576 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
33578 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33581 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
33582 (emit_vlmax_op): Ditto.
33583 * config/riscv/riscv-v.cc (get_sew): New function.
33584 (emit_vlmax_vsetvl): Adapt function.
33585 (emit_pred_op): Ditto.
33586 (emit_vlmax_op): Ditto.
33587 (emit_nonvlmax_op): Ditto.
33588 (legitimize_move): Fix LRA ICE.
33589 (gen_no_side_effects_vsetvl_rtx): Adapt function.
33590 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
33591 (@mov<VB:mode><P:mode>_lra): Ditto.
33592 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
33593 (*mov<VB:mode><P:mode>_lra): Ditto.
33595 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33598 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
33599 __riscv_vlenb support.
33601 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33602 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
33603 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
33605 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33606 * config/riscv/riscv-vector-builtins.cc: Ditto.
33608 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33609 kito-cheng <kito.cheng@sifive.com>
33611 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
33612 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
33613 (pass_vsetvl::need_vsetvl): Fix bugs.
33614 (pass_vsetvl::backward_demand_fusion): Fix bugs.
33615 (pass_vsetvl::demand_fusion): Fix bugs.
33616 (eliminate_insn): Fix bugs.
33617 (insert_vsetvl): Ditto.
33618 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
33619 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
33620 * config/riscv/vector.md: Ditto.
33622 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33623 kito-cheng <kito.cheng@sifive.com>
33625 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
33626 * config/riscv/vector-iterators.md (nmsac): Ditto.
33632 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
33633 (@pred_mul_plus<mode>): Ditto.
33634 (*pred_madd<mode>): Ditto.
33635 (*pred_macc<mode>): Ditto.
33636 (*pred_mul_plus<mode>): Ditto.
33637 (@pred_mul_plus<mode>_scalar): Ditto.
33638 (*pred_madd<mode>_scalar): Ditto.
33639 (*pred_macc<mode>_scalar): Ditto.
33640 (*pred_mul_plus<mode>_scalar): Ditto.
33641 (*pred_madd<mode>_extended_scalar): Ditto.
33642 (*pred_macc<mode>_extended_scalar): Ditto.
33643 (*pred_mul_plus<mode>_extended_scalar): Ditto.
33644 (@pred_minus_mul<mode>): Ditto.
33645 (*pred_<madd_nmsub><mode>): Ditto.
33646 (*pred_nmsub<mode>): Ditto.
33647 (*pred_<macc_nmsac><mode>): Ditto.
33648 (*pred_nmsac<mode>): Ditto.
33649 (*pred_mul_<optab><mode>): Ditto.
33650 (*pred_minus_mul<mode>): Ditto.
33651 (@pred_mul_<optab><mode>_scalar): Ditto.
33652 (@pred_minus_mul<mode>_scalar): Ditto.
33653 (*pred_<madd_nmsub><mode>_scalar): Ditto.
33654 (*pred_nmsub<mode>_scalar): Ditto.
33655 (*pred_<macc_nmsac><mode>_scalar): Ditto.
33656 (*pred_nmsac<mode>_scalar): Ditto.
33657 (*pred_mul_<optab><mode>_scalar): Ditto.
33658 (*pred_minus_mul<mode>_scalar): Ditto.
33659 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
33660 (*pred_nmsub<mode>_extended_scalar): Ditto.
33661 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
33662 (*pred_nmsac<mode>_extended_scalar): Ditto.
33663 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
33664 (*pred_minus_mul<mode>_extended_scalar): Ditto.
33665 (*pred_<madd_msub><mode>): Ditto.
33666 (*pred_<macc_msac><mode>): Ditto.
33667 (*pred_<madd_msub><mode>_scalar): Ditto.
33668 (*pred_<macc_msac><mode>_scalar): Ditto.
33669 (@pred_neg_mul_<optab><mode>): Ditto.
33670 (@pred_mul_neg_<optab><mode>): Ditto.
33671 (*pred_<nmadd_msub><mode>): Ditto.
33672 (*pred_<nmsub_nmadd><mode>): Ditto.
33673 (*pred_<nmacc_msac><mode>): Ditto.
33674 (*pred_<nmsac_nmacc><mode>): Ditto.
33675 (*pred_neg_mul_<optab><mode>): Ditto.
33676 (*pred_mul_neg_<optab><mode>): Ditto.
33677 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
33678 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
33679 (*pred_<nmadd_msub><mode>_scalar): Ditto.
33680 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
33681 (*pred_<nmacc_msac><mode>_scalar): Ditto.
33682 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
33683 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
33684 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
33685 (@pred_widen_neg_mul_<optab><mode>): Ditto.
33686 (@pred_widen_mul_neg_<optab><mode>): Ditto.
33687 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
33688 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
33690 2023-03-23 liuhongt <hongtao.liu@intel.com>
33692 * builtins.cc (builtin_memset_read_str): Replace
33693 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
33694 (builtin_memset_gen_str): Ditto.
33695 * config/i386/i386-expand.cc
33696 (ix86_convert_const_wide_int_to_broadcast): Replace
33697 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
33698 (ix86_expand_vector_move): Ditto.
33699 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
33701 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
33702 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
33703 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
33704 * doc/tm.texi.in: Ditto.
33705 * target.def: Ditto.
33707 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
33709 * lra.cc (lra): Do not repeat inheritance and live range splitting
33710 when asm error is found.
33712 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
33714 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
33715 (gcn_expand_dpp_distribute_even_insn)
33716 (gcn_expand_dpp_distribute_odd_insn): Declare.
33717 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
33718 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
33719 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
33720 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
33721 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
33722 (fms<mode>4_negop2): New patterns.
33723 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
33724 (gcn_expand_dpp_distribute_even_insn)
33725 (gcn_expand_dpp_distribute_odd_insn): New functions.
33726 * config/gcn/gcn.md: Add entries to unspec enum.
33728 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
33730 PR tree-optimization/109008
33731 * value-range.cc (frange::set): Add nan_state argument.
33732 * value-range.h (class nan_state): New.
33733 (frange::get_nan_state): New.
33735 2023-03-22 Martin Liska <mliska@suse.cz>
33737 * configure: Regenerate.
33739 2023-03-21 Joseph Myers <joseph@codesourcery.com>
33741 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
33744 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
33746 PR tree-optimization/109192
33747 * gimple-range-gori.cc (gori_compute::compute_operand_range):
33748 Terminate gori calculations if a relation is not relevant.
33749 * value-relation.h (value_relation::set_relation): Allow
33750 equality between op1 and op2 if they are the same.
33752 2023-03-21 Richard Biener <rguenther@suse.de>
33754 PR tree-optimization/109219
33755 * tree-vect-loop.cc (vectorizable_reduction): Check
33756 slp_node, not STMT_SLP_TYPE.
33757 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
33758 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
33759 Remove assertion on STMT_SLP_TYPE.
33761 2023-03-21 Jakub Jelinek <jakub@redhat.com>
33763 PR tree-optimization/109215
33764 * tree.h (enum special_array_member): Adjust comments for int_0
33766 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
33767 has zero sized element type and the array has variable number of
33768 elements or constant one or more elements.
33769 (component_ref_size): Adjust comments, formatting fix.
33771 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33773 * configure.ac: Add check for the Texinfo 6.8
33774 CONTENTS_OUTPUT_LOCATION customization variable and set it if
33776 * configure: Regenerate.
33777 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
33778 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
33779 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
33780 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
33782 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33784 * doc/extend.texi: Associate use_hazard_barrier_return index
33785 entry with its attribute.
33786 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
33789 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33791 * doc/implement-c.texi: Remove usage of @gol.
33792 * doc/invoke.texi: Ditto.
33793 * doc/sourcebuild.texi: Ditto.
33794 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
33795 texinfo.tex versions, the bug it was working around appears to
33798 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33800 * doc/include/texinfo.tex: Update to 2023-01-17.19.
33802 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33804 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
33805 @enddefbuiltin for defining built-in functions.
33806 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
33807 places where it should be used.
33809 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33811 * doc/extend.texi (Formatted Output Function Checking): New
33812 subsection for grouping together printf et al.
33813 (Exception handling) Fix missing @ sign before copyright
33814 header, which lead to the copyright line leaking into
33815 '(gcc)Exception handling'.
33816 * doc/gcc.texi: Set document language to en_US.
33817 (@copying): Wrap front cover texts in quotations, move in manual
33820 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
33822 * doc/gcc.texi: Add the Indices appendix, to make texinfo
33823 generate nice indices overview page.
33825 2023-03-21 Richard Biener <rguenther@suse.de>
33827 PR tree-optimization/109170
33828 * gimple-range-op.cc (cfn_pass_through_arg1): New.
33829 (gimple_range_op_handler::maybe_builtin_call): Handle
33830 __builtin_expect via cfn_pass_through_arg1.
33832 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
33835 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
33836 (init_float128_ieee): Delete code to switch complex multiply and divide
33838 (complex_multiply_builtin_code): New helper function.
33839 (complex_divide_builtin_code): Likewise.
33840 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
33841 of complex 128-bit multiply and divide built-in functions.
33843 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
33846 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
33848 2023-03-19 Jonny Grant <jg@jguk.org>
33850 * doc/extend.texi (Common Function Attributes) <nonnull>:
33853 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
33855 PR rtl-optimization/109179
33856 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
33857 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
33859 2023-03-17 Jakub Jelinek <jakub@redhat.com>
33862 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
33864 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
33865 to allocate_struct_function instead of false.
33866 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
33867 nor DECL_RESULT here. Pass true as ABSTRACT_P to
33868 push_struct_function. Call targetm.target_option.relayout_function
33870 (tree_function_versioning): Formatting fix.
33872 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
33874 * lra-constraints.cc: Include hooks.h.
33875 (combine_reload_insn): New function.
33876 (lra_constraints): Call it.
33878 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33879 kito-cheng <kito.cheng@sifive.com>
33881 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
33882 as legitimate value.
33883 * config/riscv/riscv-vector-builtins.cc
33884 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
33885 (function_expander::use_widen_ternop_insn): Ditto.
33886 * config/riscv/vector.md (@vundefined<mode>): New pattern.
33887 (pred_mul_<optab><mode>_undef_merge): Remove.
33888 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
33889 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
33890 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
33891 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
33893 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33896 * config/riscv/riscv.md: Fix subreg bug.
33898 2023-03-17 Jakub Jelinek <jakub@redhat.com>
33900 PR middle-end/108685
33901 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
33902 use its loop_father rather than BODY_BB's loop_father.
33903 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
33904 If broken_loop with ordered > collapse and at least one of those
33905 extra loops aren't guaranteed to have at least one iteration, change
33906 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
33907 loop_father to l0_bb's loop_father rather than l1_bb's.
33909 2023-03-17 Jakub Jelinek <jakub@redhat.com>
33912 * gdbhooks.py (TreePrinter.to_string): Wrap
33913 gdb.parse_and_eval('tree_code_type') in a try block, parse
33914 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
33915 raises exception. Update comments for the recent tree_code_type
33918 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
33920 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
33921 issues. Add more line breaks to example so it doesn't overflow
33924 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
33926 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
33927 line breaks in examples.
33928 <malloc>: Fix bad line breaks in running text, also copy-edit
33930 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
33931 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
33933 (C++ Dialect Options) <-fcontracts>: Add line break in example.
33934 <-Wctad-maybe-unsupported>: Likewise.
33935 <-Winvalid-constexpr>: Likewise.
33936 (Warning Options) <-Wdangling-pointer>: Likewise.
33937 <-Winterference-size>: Likewise.
33938 <-Wvla-parameter>: Likewise.
33939 (Static Analyzer Options): Fix bad line breaks in running text,
33940 plus add some missing markup.
33941 (Optimize Options) <openacc-privatization>: Fix more bad line
33942 breaks in running text.
33944 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
33946 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
33947 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
33948 (expand_vec_perm_2perm_pblendv): Ditto.
33950 2023-03-16 Martin Liska <mliska@suse.cz>
33952 PR middle-end/106133
33953 * gcc.cc (driver_handle_option): Use x_main_input_basename
33954 if x_dump_base_name is null.
33955 * opts.cc (common_handle_option): Likewise.
33957 2023-03-16 Richard Biener <rguenther@suse.de>
33959 PR tree-optimization/109123
33960 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
33961 Do not emit -Wuse-after-free late.
33962 (pass_waccess::check_call): Always check call pointer uses.
33964 2023-03-16 Richard Biener <rguenther@suse.de>
33966 PR tree-optimization/109141
33967 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
33968 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
33970 (renumber_gimple_stmt_uids): ... here and
33971 (renumber_gimple_stmt_uids_in_blocks): ... here.
33972 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
33973 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
33975 (pass_waccess::check_pointer_uses): Process all PHIs.
33977 2023-03-15 David Malcolm <dmalcolm@redhat.com>
33980 * diagnostic-format-sarif.cc (class sarif_invocation): New.
33981 (class sarif_ice_notification): New.
33982 (sarif_builder::m_invocation_obj): New field.
33983 (sarif_invocation::add_notification_for_ice): New.
33984 (sarif_invocation::prepare_to_flush): New.
33985 (sarif_ice_notification::sarif_ice_notification): New.
33986 (sarif_builder::sarif_builder): Add m_invocation_obj.
33987 (sarif_builder::end_diagnostic): Special-case DK_ICE and
33989 (sarif_builder::flush_to_file): Call prepare_to_flush on
33990 m_invocation_obj. Pass the latter to make_top_level_object.
33991 (sarif_builder::make_result_object): Move creation of "locations"
33993 (sarif_builder::make_locations_arr): ...this new function.
33994 (sarif_builder::make_top_level_object): Add "invocation_obj" param
33995 and pass it to make_run_object.
33996 (sarif_builder::make_run_object): Add "invocation_obj" param and
33998 (sarif_ice_handler): New callback.
33999 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
34000 * diagnostic.cc (diagnostic_initialize): Initialize new field
34002 (diagnostic_action_after_output): If it is set, make one attempt
34003 to call ice_handler_cb.
34004 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
34006 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
34008 * config/i386/i386-expand.cc (expand_vec_perm_blend):
34009 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
34010 and fix V2HImode handling.
34011 (expand_vec_perm_1): Try to emit BLEND instruction
34012 before MOVSS/MOVSD.
34013 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
34015 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
34017 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
34019 2023-03-15 Richard Biener <rguenther@suse.de>
34021 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
34022 Do not diagnose clobbers.
34024 2023-03-15 Richard Biener <rguenther@suse.de>
34026 PR tree-optimization/109139
34027 * tree-ssa-live.cc (remove_unused_locals): Look at the
34028 base address for unused decls on the LHS of .DEFERRED_INIT.
34030 2023-03-15 Xi Ruoyao <xry111@xry111.site>
34033 * builtins.cc (inline_string_cmp): Force the character
34034 difference into "result" pseudo-register, instead of reassign
34035 the pseudo-register.
34037 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34039 * config.gcc: Add thead.o to RISC-V extra_objs.
34040 * config/riscv/peephole.md: Add mempair peephole passes.
34041 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
34043 (th_mempair_operands_p): Likewise.
34044 (th_mempair_order_operands): Likewise.
34045 (th_mempair_prepare_save_restore_operands): Likewise.
34046 (th_mempair_save_restore_regs): Likewise.
34047 (th_mempair_output_move): Likewise.
34048 * config/riscv/riscv.cc (riscv_save_reg): Move code.
34049 (riscv_restore_reg): Move code.
34050 (riscv_for_each_saved_reg): Add code to emit mempair insns.
34051 * config/riscv/t-riscv: Add thead.cc.
34052 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
34054 (*th_mempair_store_<GPR:mode>2): Likewise.
34055 (*th_mempair_load_extendsidi2): Likewise.
34056 (*th_mempair_load_zero_extendsidi2): Likewise.
34057 * config/riscv/thead.cc: New file.
34059 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34061 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
34062 New constraint "th_f_fmv".
34063 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
34065 * config/riscv/riscv.cc (riscv_split_doubleword_move):
34066 Add split code for XTheadFmv.
34067 (riscv_secondary_memory_needed): XTheadFmv does not need
34069 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
34070 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
34071 movdf_hardfloat_rv32.
34072 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
34073 (th_fmv_x_w): New INSN.
34074 (th_fmv_x_hw): New INSN.
34076 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34078 * config/riscv/riscv.md (maddhisi4): New expand.
34079 (msubhisi4): New expand.
34080 * config/riscv/thead.md (*th_mula<mode>): New pattern.
34081 (*th_mulawsi): New pattern.
34082 (*th_mulawsi2): New pattern.
34083 (*th_maddhisi4): New pattern.
34084 (*th_sextw_maddhisi4): New pattern.
34085 (*th_muls<mode>): New pattern.
34086 (*th_mulswsi): New pattern.
34087 (*th_mulswsi2): New pattern.
34088 (*th_msubhisi4): New pattern.
34089 (*th_sextw_msubhisi4): New pattern.
34091 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34093 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
34094 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
34096 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
34098 (riscv_expand_conditional_move): New function.
34099 (riscv_expand_conditional_move_onesided): New function.
34100 * config/riscv/riscv.md: Add support for XTheadCondMov.
34101 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
34102 support for XTheadCondMov.
34103 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
34105 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34107 * config/riscv/bitmanip.md (clzdi2): New expand.
34108 (clzsi2): New expand.
34109 (ctz<mode>2): New expand.
34110 (popcount<mode>2): New expand.
34111 (<bitmanip_optab>si2): Rename INSN.
34112 (*<bitmanip_optab>si2): Hide INSN name.
34113 (<bitmanip_optab>di2): Rename INSN.
34114 (*<bitmanip_optab>di2): Hide INSN name.
34115 (rotrsi3): Remove INSN.
34116 (rotr<mode>3): Add expand.
34117 (*rotrsi3): New INSN.
34118 (rotrdi3): Rename INSN.
34119 (*rotrdi3): Hide INSN name.
34120 (rotrsi3_sext): Rename INSN.
34121 (*rotrsi3_sext): Hide INSN name.
34122 (bswap<mode>2): Remove INSN.
34123 (bswapdi2): Add expand.
34124 (bswapsi2): Add expand.
34125 (*bswap<mode>2): Hide INSN name.
34126 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
34128 * config/riscv/riscv.md (extv<mode>): New expand.
34129 (extzv<mode>): New expand.
34130 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
34131 (*th_ext<mode>): New INSN.
34132 (*th_extu<mode>): New INSN.
34133 (*th_clz<mode>2): New INSN.
34134 (*th_rev<mode>2): New INSN.
34136 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34138 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
34139 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
34141 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34143 * config/riscv/riscv.md: Include thead.md
34144 * config/riscv/thead.md: New file.
34146 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34148 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
34150 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34152 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
34153 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
34154 (MASK_XTHEADBB): New.
34155 (MASK_XTHEADBS): New.
34156 (MASK_XTHEADCMO): New.
34157 (MASK_XTHEADCONDMOV): New.
34158 (MASK_XTHEADFMEMIDX): New.
34159 (MASK_XTHEADFMV): New.
34160 (MASK_XTHEADINT): New.
34161 (MASK_XTHEADMAC): New.
34162 (MASK_XTHEADMEMIDX): New.
34163 (MASK_XTHEADMEMPAIR): New.
34164 (MASK_XTHEADSYNC): New.
34165 (TARGET_XTHEADBA): New.
34166 (TARGET_XTHEADBB): New.
34167 (TARGET_XTHEADBS): New.
34168 (TARGET_XTHEADCMO): New.
34169 (TARGET_XTHEADCONDMOV): New.
34170 (TARGET_XTHEADFMEMIDX): New.
34171 (TARGET_XTHEADFMV): New.
34172 (TARGET_XTHEADINT): New.
34173 (TARGET_XTHEADMAC): New.
34174 (TARGET_XTHEADMEMIDX): New.
34175 (TARGET_XTHEADMEMPAIR): new.
34176 (TARGET_XTHEADSYNC): New.
34177 * config/riscv/riscv.opt: Add riscv_xthead_subext.
34179 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
34182 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
34183 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
34184 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
34186 2023-03-14 Jakub Jelinek <jakub@redhat.com>
34189 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
34190 when lo is equal to dhi and hi is a MEM which uses dlo register.
34192 2023-03-14 Martin Jambor <mjambor@suse.cz>
34195 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
34196 global0 instead of zeroing when it does not have as many counts as
34199 2023-03-14 Martin Jambor <mjambor@suse.cz>
34202 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
34203 ipa count, remove assert, lenient_count_portion_handling, dump
34204 also orig_node_count.
34206 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
34208 * config/i386/i386-expand.cc (expand_vec_perm_movs):
34209 Handle V2SImode for TARGET_MMX_WITH_SSE.
34210 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
34211 using V2FI mode iterator to handle both V2SI and V2SF modes.
34213 2023-03-14 Sam James <sam@gentoo.org>
34215 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
34216 including <sstream> earlier.
34217 * system.h: Add INCLUDE_SSTREAM.
34219 2023-03-14 Richard Biener <rguenther@suse.de>
34221 * tree-ssa-live.cc (remove_unused_locals): Do not treat
34222 the .DEFERRED_INIT of a variable as use, instead remove
34223 that if it is the only use.
34225 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
34227 PR rtl-optimization/107762
34228 * expr.cc (emit_group_store): Revert latest change.
34230 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
34232 PR tree-optimization/109005
34233 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
34234 aggregate type check.
34236 2023-03-14 Jakub Jelinek <jakub@redhat.com>
34238 PR tree-optimization/109115
34239 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
34240 r.upper_bound () on r.undefined_p () range.
34242 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
34244 PR tree-optimization/106896
34245 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
34246 implementatoin with probability_in; avoid some asserts.
34248 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
34250 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
34252 2023-03-13 Sean Bright <sean@seanbright.com>
34254 * doc/invoke.texi (Warning Options): Remove errant 'See'
34257 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34259 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
34260 REG_OK_FOR_BASE_P): Remove.
34262 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34264 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
34265 (=vd,vd,vr,vr): Ditto.
34266 * config/riscv/vector.md: Ditto.
34268 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34270 * config/riscv/riscv-vector-builtins.cc
34271 (function_expander::use_compare_insn): Add operand predicate check.
34273 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34275 * config/riscv/vector.md: Fine tune RA constraints.
34277 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
34279 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
34280 hsaco assemble/link.
34282 2023-03-13 Richard Biener <rguenther@suse.de>
34284 PR tree-optimization/109046
34285 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
34286 piecewise complex loads.
34288 2023-03-12 Jakub Jelinek <jakub@redhat.com>
34290 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
34291 (aarch64_bf16_ptr_type_node): Adjust comment.
34292 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
34293 bfloat16_type_node rather than aarch64_bf16_type_node.
34294 (aarch64_libgcc_floating_mode_supported_p,
34295 aarch64_scalar_mode_supported_p): Also support BFmode.
34296 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
34297 (aarch64_invalid_binary_op): Remove BFmode related rejections.
34298 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
34299 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
34300 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
34301 aarch64_bf16_type_node.
34302 (aarch64_init_simd_builtin_types): Likewise.
34303 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
34304 which is created in tree.cc already.
34305 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
34307 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
34309 PR middle-end/109031
34310 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
34311 ensure that the type of x is as wide or wider than the type of a.
34313 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34316 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
34317 (*bitmask_shift_plus<mode>): New.
34318 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
34319 (@aarch64_bitmask_udiv<mode>3): Remove.
34320 * config/aarch64/aarch64.cc
34321 (aarch64_vectorize_can_special_div_by_constant,
34322 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
34323 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
34324 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
34326 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34329 * target.def (preferred_div_as_shifts_over_mult): New.
34330 * doc/tm.texi.in: Document it.
34331 * doc/tm.texi: Regenerate.
34332 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
34333 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
34334 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
34336 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34337 Richard Sandiford <richard.sandiford@arm.com>
34340 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
34343 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34344 Andrew MacLeod <amacleod@redhat.com>
34347 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
34348 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
34350 (gimple_range_op_handler::maybe_non_standard): New.
34351 * range-op.cc (class operator_widen_plus_signed,
34352 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
34353 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
34354 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
34355 operator_widen_mult_unsigned::wi_fold,
34356 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
34357 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
34358 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
34359 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
34361 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34364 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
34365 * doc/tm.texi.in: Likewise.
34366 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
34367 * expmed.cc (expand_divmod): Likewise.
34368 * expmed.h (expand_divmod): Likewise.
34369 * expr.cc (force_operand, expand_expr_divmod): Likewise.
34370 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
34371 * target.def (can_special_div_by_const): Remove.
34372 * target.h: Remove tree-core.h include
34373 * targhooks.cc (default_can_special_div_by_const): Remove.
34374 * targhooks.h (default_can_special_div_by_const): Remove.
34375 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
34376 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
34377 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
34379 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
34381 * doc/install.texi2html: Fix issue number typo in comment.
34383 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
34385 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
34388 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
34390 * doc/invoke.texi (Optimize Options): Add markup to
34391 description of asan-kernel-mem-intrinsic-prefix, and clarify
34394 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
34396 * doc/extend.texi (Named Address Spaces): Drop a redundant link
34399 2023-03-11 Jeff Law <jlaw@ventanamicro>
34402 * doc/extend.texi: Clarify Attribute Syntax a bit.
34404 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
34406 * doc/install.texi (Prerequisites): Suggest using newer versions
34408 (Final install): Clean up and modernize discussion of how to
34409 build or obtain the GCC manuals.
34410 * doc/install.texi2html: Update comment to point to the PR instead
34411 of "makeinfo 4.7 brokenness" (it's not specific to that version).
34413 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34416 * optabs.cc (expand_fix): For conversions from BFmode to integral,
34417 use shifts to convert it to SFmode first and then convert SFmode
34420 2023-03-10 Andrew Pinski <apinski@marvell.com>
34422 * config/aarch64/aarch64.md: Add a new define_split
34425 2023-03-10 Richard Biener <rguenther@suse.de>
34427 * tree-ssa-structalias.cc (solve_graph): Immediately
34428 iterate self-cycles.
34430 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34432 PR tree-optimization/109008
34433 * range-op-float.cc (float_widen_lhs_range): If not
34434 -frounding-math and not IBM double double format, extend lhs
34435 range just by 0.5ulp rather than 1ulp in each direction.
34437 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34440 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
34442 * config/i386/t-cygwin-w64: Remove.
34444 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34447 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
34448 C++14, don't declare as extern const arrays.
34449 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
34450 static constexpr member arrays for C++11 or C++14.
34451 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
34452 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
34453 (TREE_CODE_LENGTH): For C++11 or C++14 use
34454 tree_code_length_tmpl <0>::tree_code_length instead of
34456 * tree.cc (tree_code_type, tree_code_length): Remove.
34458 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34461 * common.opt (fcanon-prefix-map): New option.
34462 * opts.cc: Include file-prefix-map.h.
34463 (flag_canon_prefix_map): New variable.
34464 (common_handle_option): Handle OPT_fcanon_prefix_map.
34465 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
34466 * file-prefix-map.h (flag_canon_prefix_map): Declare.
34467 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
34469 (add_prefix_map): Initialize canonicalize member from
34470 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
34471 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
34472 use lrealpath result only for map->canonicalize map entries.
34473 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
34474 * opts-global.cc (handle_common_deferred_options): Clear
34475 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
34476 * doc/invoke.texi (-fcanon-prefix-map): Document.
34477 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
34478 see also for -fcanon-prefix-map.
34479 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
34481 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34484 * cgraphunit.cc (check_global_declaration): Don't warn for unused
34485 variables which have OPT_Wunused_variable warning suppressed.
34487 2023-03-10 Jakub Jelinek <jakub@redhat.com>
34489 PR tree-optimization/109008
34490 * range-op-float.cc (float_widen_lhs_range): If lb is
34491 minimum representable finite number or ub is maximum
34492 representable finite number, instead of widening it to
34493 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
34494 Temporarily clear flag_finite_math_only when canonicalizing
34497 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34499 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
34500 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
34501 (gimple_fold_builtin): Ditto.
34502 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
34503 (class vleff): Ditto.
34505 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34506 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
34508 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
34509 (struct fault_load_def): Ditto.
34511 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34512 * config/riscv/riscv-vector-builtins.cc
34513 (rvv_arg_type_info::get_tree_type): Add size_ptr.
34514 (gimple_folder::gimple_folder): New class.
34515 (gimple_folder::fold): Ditto.
34516 (gimple_fold_builtin): New function.
34517 (get_read_vl_instance): Ditto.
34518 (get_read_vl_decl): Ditto.
34519 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
34520 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
34521 (get_read_vl_instance): New function.
34522 (get_read_vl_decl): Ditto.
34523 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
34524 (read_vl_insn_p): Ditto.
34525 (available_occurrence_p): Ditto.
34526 (backward_propagate_worthwhile_p): Ditto.
34527 (gen_vsetvl_pat): Adapt for vleff support.
34528 (get_forward_read_vl_insn): New function.
34529 (get_backward_fault_first_load_insn): Ditto.
34530 (source_equal_p): Adapt for vleff support.
34531 (first_ratio_invalid_for_second_sew_p): Remove.
34532 (first_ratio_invalid_for_second_lmul_p): Ditto.
34533 (first_lmul_less_than_second_lmul_p): Ditto.
34534 (first_ratio_less_than_second_ratio_p): Ditto.
34535 (support_relaxed_compatible_p): New function.
34536 (vector_insn_info::operator>): Remove.
34537 (vector_insn_info::operator>=): Refine.
34538 (vector_insn_info::parse_insn): Adapt for vleff support.
34539 (vector_insn_info::compatible_p): Ditto.
34540 (vector_insn_info::update_fault_first_load_avl): New function.
34541 (pass_vsetvl::transfer_after): Adapt for vleff support.
34542 (pass_vsetvl::demand_fusion): Ditto.
34543 (pass_vsetvl::cleanup_insns): Ditto.
34544 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
34545 redundant condtions.
34546 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
34547 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
34548 * config/riscv/riscv.md: Adapt for vleff support.
34549 * config/riscv/t-riscv: Ditto.
34550 * config/riscv/vector-iterators.md: New iterator.
34551 * config/riscv/vector.md (read_vlsi): New pattern.
34552 (read_vldi_zero_extend): Ditto.
34553 (@pred_fault_load<mode>): Ditto.
34555 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34557 * config/riscv/riscv-vector-builtins.cc
34558 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
34559 (function_expander::use_widen_ternop_insn): Ditto.
34560 * optabs.cc (maybe_gen_insn): Extend nops handling.
34562 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34564 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
34565 patterns according to RVV ISA.
34566 * config/riscv/vector-iterators.md: New iterators.
34567 * config/riscv/vector.md
34568 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
34569 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
34570 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
34571 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
34572 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
34573 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
34574 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
34575 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
34576 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
34577 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
34578 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
34579 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
34580 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
34581 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
34583 2023-03-10 Michael Collison <collison@rivosinc.com>
34585 * tree-vect-loop-manip.cc (vect_do_peeling): Use
34586 result of constant_lower_bound instead of vf for the lower
34587 bound of the epilog loop trip count.
34589 2023-03-09 Tamar Christina <tamar.christina@arm.com>
34591 * passes.cc (emergency_dump_function): Finish graph generation.
34593 2023-03-09 Tamar Christina <tamar.christina@arm.com>
34595 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
34596 and bottom bit only.
34598 2023-03-09 Andrew Pinski <apinski@marvell.com>
34600 PR tree-optimization/108980
34601 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
34602 Reorgnize the call to warning for not strict flexible arrays
34603 to be before the check of warned.
34605 2023-03-09 Jason Merrill <jason@redhat.com>
34607 * doc/extend.texi: Comment out __is_deducible docs.
34609 2023-03-09 Jason Merrill <jason@redhat.com>
34612 * doc/extend.texi (Type Traits):: Document __is_deducible.
34614 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
34617 * config.host: add object for x86_64-*-mingw*.
34618 * config/i386/sym-mingw32.cc: dummy file to attach
34620 * config/i386/utf8-mingw32.rc: windres resource file.
34621 * config/i386/winnt-utf8.manifest: XML manifest to
34623 * config/i386/x-mingw32: reference to x-mingw32-utf8.
34624 * config/i386/x-mingw32-utf8: Makefile fragment to
34625 embed UTF-8 manifest.
34627 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
34629 * lra-constraints.cc (process_alt_operands): Use operand modes for
34630 clobbered regs instead of the biggest access mode.
34632 2023-03-09 Richard Biener <rguenther@suse.de>
34634 PR middle-end/108995
34635 * fold-const.cc (extract_muldiv_1): Avoid folding
34636 (CST * b) / CST2 when sanitizing overflow and we rely on
34637 overflow being undefined.
34639 2023-03-09 Jakub Jelinek <jakub@redhat.com>
34640 Richard Biener <rguenther@suse.de>
34642 PR tree-optimization/109008
34643 * range-op-float.cc (float_widen_lhs_range): New function.
34644 (foperator_plus::op1_range, foperator_minus::op1_range,
34645 foperator_minus::op2_range, foperator_mult::op1_range,
34646 foperator_div::op1_range, foperator_div::op2_range): Use it.
34648 2023-03-07 Jonathan Grant <jg@jguk.org>
34651 * doc/invoke.texi (Instrumentation Options): Clarify
34652 LeakSanitizer behavior.
34654 2023-03-07 Benson Muite <benson_muite@emailplus.org>
34656 * doc/install.texi (Prerequisites): Add link to gmplib.org.
34658 2023-03-07 Pan Li <pan2.li@intel.com>
34659 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34663 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
34665 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
34666 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
34667 * genmodes.cc (adj_precision): New.
34668 (ADJUST_PRECISION): New.
34669 (emit_mode_adjustments): Handle ADJUST_PRECISION.
34671 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
34673 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
34675 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
34677 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
34678 {s|u}{max|min} in QI, HI and DI modes.
34679 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
34680 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
34681 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
34682 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
34685 2023-03-06 Richard Biener <rguenther@suse.de>
34687 PR tree-optimization/109025
34688 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
34689 the inner LC PHI use is the inner loop PHI latch definition
34690 before classifying an outer PHI as double reduction.
34692 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
34695 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
34697 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
34698 (X86_TUNE_USE_SCATTER): Likewise.
34700 2023-03-06 Xi Ruoyao <xry111@xry111.site>
34703 * config/loongarch/loongarch.h (FP_RETURN): Use
34704 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
34705 (UNITS_PER_FP_ARG): Likewise.
34707 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34709 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
34710 (pass_vsetvl::backward_demand_fusion): Ditto.
34712 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
34713 SiYu Wu <siyu@isrc.iscas.ac.cn>
34715 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
34717 (riscv_sm3p1_<mode>): New.
34718 (riscv_sm4ed_<mode>): New.
34719 (riscv_sm4ks_<mode>): New.
34720 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
34721 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
34722 ZKSH's built-in functions.
34724 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
34725 SiYu Wu <siyu@isrc.iscas.ac.cn>
34727 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
34728 (riscv_sha256sig1_<mode>): New.
34729 (riscv_sha256sum0_<mode>): New.
34730 (riscv_sha256sum1_<mode>): New.
34731 (riscv_sha512sig0h): New.
34732 (riscv_sha512sig0l): New.
34733 (riscv_sha512sig1h): New.
34734 (riscv_sha512sig1l): New.
34735 (riscv_sha512sum0r): New.
34736 (riscv_sha512sum1r): New.
34737 (riscv_sha512sig0): New.
34738 (riscv_sha512sig1): New.
34739 (riscv_sha512sum0): New.
34740 (riscv_sha512sum1): New.
34741 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
34742 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
34743 built-in functions.
34744 (DIRECT_BUILTIN): Add new.
34746 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
34747 SiYu Wu <siyu@isrc.iscas.ac.cn>
34749 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
34751 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
34752 (riscv_aes32dsmi): New.
34753 (riscv_aes64ds): New.
34754 (riscv_aes64dsm): New.
34755 (riscv_aes64im): New.
34756 (riscv_aes64ks1i): New.
34757 (riscv_aes64ks2): New.
34758 (riscv_aes32esi): New.
34759 (riscv_aes32esmi): New.
34760 (riscv_aes64es): New.
34761 (riscv_aes64esm): New.
34762 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
34763 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
34764 ZKNE's built-in functions.
34766 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
34767 SiYu Wu <siyu@isrc.iscas.ac.cn>
34769 * config/riscv/bitmanip.md: Add ZBKB's instructions.
34770 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
34771 * config/riscv/riscv.md: Add new type for crypto instructions.
34772 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
34774 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
34775 extension's built-in function file.
34777 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
34778 SiYu Wu <siyu@isrc.iscas.ac.cn>
34780 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
34781 (RISCV_FTYPE_NAME3): New.
34782 (RISCV_ATYPE_QI): New.
34783 (RISCV_ATYPE_HI): New.
34784 (RISCV_FTYPE_ATYPES2): New.
34785 (RISCV_FTYPE_ATYPES3): New.
34786 * config/riscv/riscv-ftypes.def (2): New.
34789 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
34791 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
34794 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34795 kito-cheng <kito.cheng@sifive.com>
34797 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
34798 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
34799 (riscv_register_pragmas): Add builtin function check call.
34800 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
34801 (check_builtin_call): New function.
34802 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
34803 (class vreinterpret): Ditto.
34804 (class vlmul_ext): Ditto.
34805 (class vlmul_trunc): Ditto.
34806 (class vset): Ditto.
34807 (class vget): Ditto.
34809 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34810 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
34826 (vundefined): Add new intrinsic.
34827 (vreinterpret): Ditto.
34828 (vlmul_ext): Ditto.
34829 (vlmul_trunc): Ditto.
34832 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
34833 (struct narrow_alu_def): Ditto.
34834 (struct reduc_alu_def): Ditto.
34835 (struct vundefined_def): Ditto.
34836 (struct misc_def): Ditto.
34837 (struct vset_def): Ditto.
34838 (struct vget_def): Ditto.
34840 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34841 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
34842 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
34843 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
34844 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
34845 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
34846 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
34847 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
34848 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
34849 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
34850 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
34851 (DEF_RVV_LMUL1_OPS): Ditto.
34852 (DEF_RVV_LMUL2_OPS): Ditto.
34853 (DEF_RVV_LMUL4_OPS): Ditto.
34854 (vint16mf4_t): Ditto.
34855 (vint16mf2_t): Ditto.
34856 (vint16m1_t): Ditto.
34857 (vint16m2_t): Ditto.
34858 (vint16m4_t): Ditto.
34859 (vint16m8_t): Ditto.
34860 (vint32mf2_t): Ditto.
34861 (vint32m1_t): Ditto.
34862 (vint32m2_t): Ditto.
34863 (vint32m4_t): Ditto.
34864 (vint32m8_t): Ditto.
34865 (vint64m1_t): Ditto.
34866 (vint64m2_t): Ditto.
34867 (vint64m4_t): Ditto.
34868 (vint64m8_t): Ditto.
34869 (vuint16mf4_t): Ditto.
34870 (vuint16mf2_t): Ditto.
34871 (vuint16m1_t): Ditto.
34872 (vuint16m2_t): Ditto.
34873 (vuint16m4_t): Ditto.
34874 (vuint16m8_t): Ditto.
34875 (vuint32mf2_t): Ditto.
34876 (vuint32m1_t): Ditto.
34877 (vuint32m2_t): Ditto.
34878 (vuint32m4_t): Ditto.
34879 (vuint32m8_t): Ditto.
34880 (vuint64m1_t): Ditto.
34881 (vuint64m2_t): Ditto.
34882 (vuint64m4_t): Ditto.
34883 (vuint64m8_t): Ditto.
34884 (vint8mf4_t): Ditto.
34885 (vint8mf2_t): Ditto.
34886 (vint8m1_t): Ditto.
34887 (vint8m2_t): Ditto.
34888 (vint8m4_t): Ditto.
34889 (vint8m8_t): Ditto.
34890 (vuint8mf4_t): Ditto.
34891 (vuint8mf2_t): Ditto.
34892 (vuint8m1_t): Ditto.
34893 (vuint8m2_t): Ditto.
34894 (vuint8m4_t): Ditto.
34895 (vuint8m8_t): Ditto.
34896 (vint8mf8_t): Ditto.
34897 (vuint8mf8_t): Ditto.
34898 (vfloat32mf2_t): Ditto.
34899 (vfloat32m1_t): Ditto.
34900 (vfloat32m2_t): Ditto.
34901 (vfloat32m4_t): Ditto.
34902 (vfloat64m1_t): Ditto.
34903 (vfloat64m2_t): Ditto.
34904 (vfloat64m4_t): Ditto.
34905 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
34906 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
34907 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
34908 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
34909 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
34910 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
34911 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
34912 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
34913 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
34914 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
34915 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
34916 (DEF_RVV_LMUL1_OPS): Ditto.
34917 (DEF_RVV_LMUL2_OPS): Ditto.
34918 (DEF_RVV_LMUL4_OPS): Ditto.
34919 (DEF_RVV_TYPE_INDEX): Ditto.
34920 (required_extensions_p): Adapt for new intrinsic support/
34921 (get_required_extensions): New function.
34922 (check_required_extensions): Ditto.
34923 (unsigned_base_type_p): Remove.
34924 (rvv_arg_type_info::get_scalar_ptr_type): New function.
34925 (get_mode_for_bitsize): Remove.
34926 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
34927 (rvv_arg_type_info::get_base_vector_type): Ditto.
34928 (rvv_arg_type_info::get_function_type_index): Ditto.
34929 (DEF_RVV_BASE_TYPE): New def.
34930 (function_builder::apply_predication): New class.
34931 (function_expander::mask_mode): Ditto.
34932 (function_checker::function_checker): Ditto.
34933 (function_checker::report_non_ice): Ditto.
34934 (function_checker::report_out_of_range): Ditto.
34935 (function_checker::require_immediate): Ditto.
34936 (function_checker::require_immediate_range): Ditto.
34937 (function_checker::check): Ditto.
34938 (check_builtin_call): Ditto.
34939 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
34940 (DEF_RVV_BASE_TYPE): Ditto.
34941 (DEF_RVV_TYPE_INDEX): Ditto.
34942 (vbool64_t): Ditto.
34943 (vbool32_t): Ditto.
34944 (vbool16_t): Ditto.
34949 (vuint8mf8_t): Ditto.
34950 (vuint8mf4_t): Ditto.
34951 (vuint8mf2_t): Ditto.
34952 (vuint8m1_t): Ditto.
34953 (vuint8m2_t): Ditto.
34954 (vint8m4_t): Ditto.
34955 (vuint8m4_t): Ditto.
34956 (vint8m8_t): Ditto.
34957 (vuint8m8_t): Ditto.
34958 (vint16mf4_t): Ditto.
34959 (vuint16mf2_t): Ditto.
34960 (vuint16m1_t): Ditto.
34961 (vuint16m2_t): Ditto.
34962 (vuint16m4_t): Ditto.
34963 (vuint16m8_t): Ditto.
34964 (vint32mf2_t): Ditto.
34965 (vuint32m1_t): Ditto.
34966 (vuint32m2_t): Ditto.
34967 (vuint32m4_t): Ditto.
34968 (vuint32m8_t): Ditto.
34969 (vuint64m1_t): Ditto.
34970 (vuint64m2_t): Ditto.
34971 (vuint64m4_t): Ditto.
34972 (vuint64m8_t): Ditto.
34973 (vfloat32mf2_t): Ditto.
34974 (vfloat32m1_t): Ditto.
34975 (vfloat32m2_t): Ditto.
34976 (vfloat32m4_t): Ditto.
34977 (vfloat32m8_t): Ditto.
34978 (vfloat64m1_t): Ditto.
34979 (vfloat64m4_t): Ditto.
34980 (vector): Move it def.
34983 (signed_vector): Ditto.
34984 (unsigned_vector): Ditto.
34985 (unsigned_scalar): Ditto.
34986 (vector_ptr): Ditto.
34987 (scalar_ptr): Ditto.
34988 (scalar_const_ptr): Ditto.
34992 (unsigned_long): Ditto.
34994 (eew8_index): Ditto.
34995 (eew16_index): Ditto.
34996 (eew32_index): Ditto.
34997 (eew64_index): Ditto.
34998 (shift_vector): Ditto.
34999 (double_trunc_vector): Ditto.
35000 (quad_trunc_vector): Ditto.
35001 (oct_trunc_vector): Ditto.
35002 (double_trunc_scalar): Ditto.
35003 (double_trunc_signed_vector): Ditto.
35004 (double_trunc_unsigned_vector): Ditto.
35005 (double_trunc_unsigned_scalar): Ditto.
35006 (double_trunc_float_vector): Ditto.
35007 (float_vector): Ditto.
35008 (lmul1_vector): Ditto.
35009 (widen_lmul1_vector): Ditto.
35010 (eew8_interpret): Ditto.
35011 (eew16_interpret): Ditto.
35012 (eew32_interpret): Ditto.
35013 (eew64_interpret): Ditto.
35014 (vlmul_ext_x2): Ditto.
35015 (vlmul_ext_x4): Ditto.
35016 (vlmul_ext_x8): Ditto.
35017 (vlmul_ext_x16): Ditto.
35018 (vlmul_ext_x32): Ditto.
35019 (vlmul_ext_x64): Ditto.
35020 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
35021 (struct function_type_info): New function.
35022 (struct rvv_arg_type_info): Ditto.
35023 (class function_checker): New class.
35024 (rvv_arg_type_info::get_scalar_type): New function.
35025 (rvv_arg_type_info::get_vector_type): Ditto.
35026 (function_expander::ret_mode): New function.
35027 (function_checker::arg_mode): Ditto.
35028 (function_checker::ret_mode): Ditto.
35029 * config/riscv/t-riscv: Add generator.
35030 * config/riscv/vector-iterators.md: New iterators.
35031 * config/riscv/vector.md (vundefined<mode>): New pattern.
35032 (@vundefined<mode>): Ditto.
35033 (@vreinterpret<mode>): Ditto.
35034 (@vlmul_extx2<mode>): Ditto.
35035 (@vlmul_extx4<mode>): Ditto.
35036 (@vlmul_extx8<mode>): Ditto.
35037 (@vlmul_extx16<mode>): Ditto.
35038 (@vlmul_extx32<mode>): Ditto.
35039 (@vlmul_extx64<mode>): Ditto.
35040 (*vlmul_extx2<mode>): Ditto.
35041 (*vlmul_extx4<mode>): Ditto.
35042 (*vlmul_extx8<mode>): Ditto.
35043 (*vlmul_extx16<mode>): Ditto.
35044 (*vlmul_extx32<mode>): Ditto.
35045 (*vlmul_extx64<mode>): Ditto.
35046 * config/riscv/genrvv-type-indexer.cc: New file.
35048 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35050 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
35051 (slide1_sew64_helper): New function.
35052 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
35053 (get_unknown_min_value): Ditto.
35054 (force_vector_length_operand): Ditto.
35055 (gen_no_side_effects_vsetvl_rtx): Ditto.
35056 (get_vl_x2_rtx): Ditto.
35057 (slide1_sew64_helper): Ditto.
35058 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
35059 (class vrgather): Ditto.
35060 (class vrgatherei16): Ditto.
35061 (class vcompress): Ditto.
35063 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35064 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
35065 (vslidedown): Ditto.
35066 (vslide1up): Ditto.
35067 (vslide1down): Ditto.
35068 (vfslide1up): Ditto.
35069 (vfslide1down): Ditto.
35071 (vrgatherei16): Ditto.
35072 (vcompress): Ditto.
35073 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
35074 (vint8mf8_t): Ditto.
35075 (vint8mf4_t): Ditto.
35076 (vint8mf2_t): Ditto.
35077 (vint8m1_t): Ditto.
35078 (vint8m2_t): Ditto.
35079 (vint8m4_t): Ditto.
35080 (vint16mf4_t): Ditto.
35081 (vint16mf2_t): Ditto.
35082 (vint16m1_t): Ditto.
35083 (vint16m2_t): Ditto.
35084 (vint16m4_t): Ditto.
35085 (vint16m8_t): Ditto.
35086 (vint32mf2_t): Ditto.
35087 (vint32m1_t): Ditto.
35088 (vint32m2_t): Ditto.
35089 (vint32m4_t): Ditto.
35090 (vint32m8_t): Ditto.
35091 (vint64m1_t): Ditto.
35092 (vint64m2_t): Ditto.
35093 (vint64m4_t): Ditto.
35094 (vint64m8_t): Ditto.
35095 (vuint8mf8_t): Ditto.
35096 (vuint8mf4_t): Ditto.
35097 (vuint8mf2_t): Ditto.
35098 (vuint8m1_t): Ditto.
35099 (vuint8m2_t): Ditto.
35100 (vuint8m4_t): Ditto.
35101 (vuint16mf4_t): Ditto.
35102 (vuint16mf2_t): Ditto.
35103 (vuint16m1_t): Ditto.
35104 (vuint16m2_t): Ditto.
35105 (vuint16m4_t): Ditto.
35106 (vuint16m8_t): Ditto.
35107 (vuint32mf2_t): Ditto.
35108 (vuint32m1_t): Ditto.
35109 (vuint32m2_t): Ditto.
35110 (vuint32m4_t): Ditto.
35111 (vuint32m8_t): Ditto.
35112 (vuint64m1_t): Ditto.
35113 (vuint64m2_t): Ditto.
35114 (vuint64m4_t): Ditto.
35115 (vuint64m8_t): Ditto.
35116 (vfloat32mf2_t): Ditto.
35117 (vfloat32m1_t): Ditto.
35118 (vfloat32m2_t): Ditto.
35119 (vfloat32m4_t): Ditto.
35120 (vfloat32m8_t): Ditto.
35121 (vfloat64m1_t): Ditto.
35122 (vfloat64m2_t): Ditto.
35123 (vfloat64m4_t): Ditto.
35124 (vfloat64m8_t): Ditto.
35125 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
35126 * config/riscv/riscv.md: Adjust RVV instruction types.
35127 * config/riscv/vector-iterators.md (down): New iterator.
35128 (=vd,vr): New attribute.
35129 (UNSPEC_VSLIDE1UP): New unspec.
35130 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
35131 (*pred_slide<ud><mode>): Ditto.
35132 (*pred_slide<ud><mode>_extended): Ditto.
35133 (@pred_gather<mode>): Ditto.
35134 (@pred_gather<mode>_scalar): Ditto.
35135 (@pred_gatherei16<mode>): Ditto.
35136 (@pred_compress<mode>): Ditto.
35138 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35140 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
35142 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35144 * config/riscv/constraints.md (Wb1): New constraint.
35145 * config/riscv/predicates.md
35146 (vector_least_significant_set_mask_operand): New predicate.
35147 (vector_broadcast_mask_operand): Ditto.
35148 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
35149 (gen_scalar_move_mask): New function.
35150 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
35151 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
35152 (class vmv_s): Ditto.
35154 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35155 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
35159 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
35161 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35162 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
35163 (function_expander::use_exact_insn): New function.
35164 (function_expander::use_contiguous_load_insn): New function.
35165 (function_expander::use_contiguous_store_insn): New function.
35166 (function_expander::use_ternop_insn): New function.
35167 (function_expander::use_widen_ternop_insn): New function.
35168 (function_expander::use_scalar_move_insn): New function.
35169 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
35170 * config/riscv/riscv-vector-builtins.h
35171 (function_expander::add_scalar_move_mask_operand): New class.
35172 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
35173 (scalar_move_insn_p): Ditto.
35174 (has_vsetvl_killed_avl_p): Ditto.
35175 (anticipatable_occurrence_p): Ditto.
35176 (insert_vsetvl): Ditto.
35177 (get_vl_vtype_info): Ditto.
35178 (calculate_sew): Ditto.
35179 (calculate_vlmul): Ditto.
35180 (incompatible_avl_p): Ditto.
35181 (different_sew_p): Ditto.
35182 (different_lmul_p): Ditto.
35183 (different_ratio_p): Ditto.
35184 (different_tail_policy_p): Ditto.
35185 (different_mask_policy_p): Ditto.
35186 (possible_zero_avl_p): Ditto.
35187 (first_ratio_invalid_for_second_sew_p): Ditto.
35188 (first_ratio_invalid_for_second_lmul_p): Ditto.
35189 (second_ratio_invalid_for_first_sew_p): Ditto.
35190 (second_ratio_invalid_for_first_lmul_p): Ditto.
35191 (second_sew_less_than_first_sew_p): Ditto.
35192 (first_sew_less_than_second_sew_p): Ditto.
35193 (compare_lmul): Ditto.
35194 (second_lmul_less_than_first_lmul_p): Ditto.
35195 (first_lmul_less_than_second_lmul_p): Ditto.
35196 (first_ratio_less_than_second_ratio_p): Ditto.
35197 (second_ratio_less_than_first_ratio_p): Ditto.
35198 (DEF_INCOMPATIBLE_COND): Ditto.
35199 (greatest_sew): Ditto.
35200 (first_sew): Ditto.
35201 (second_sew): Ditto.
35202 (first_vlmul): Ditto.
35203 (second_vlmul): Ditto.
35204 (first_ratio): Ditto.
35205 (second_ratio): Ditto.
35206 (vlmul_for_first_sew_second_ratio): Ditto.
35207 (ratio_for_second_sew_first_vlmul): Ditto.
35208 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
35209 (always_unavailable): Ditto.
35210 (avl_unavailable_p): Ditto.
35211 (sew_unavailable_p): Ditto.
35212 (lmul_unavailable_p): Ditto.
35213 (ge_sew_unavailable_p): Ditto.
35214 (ge_sew_lmul_unavailable_p): Ditto.
35215 (ge_sew_ratio_unavailable_p): Ditto.
35216 (DEF_UNAVAILABLE_COND): Ditto.
35217 (same_sew_lmul_demand_p): Ditto.
35218 (propagate_avl_across_demands_p): Ditto.
35219 (reg_available_p): Ditto.
35220 (avl_info::has_non_zero_avl): Ditto.
35221 (vl_vtype_info::has_non_zero_avl): Ditto.
35222 (vector_insn_info::operator>=): Refactor.
35223 (vector_insn_info::parse_insn): Adjust for scalar move.
35224 (vector_insn_info::demand_vl_vtype): Remove.
35225 (vector_insn_info::compatible_p): New function.
35226 (vector_insn_info::compatible_avl_p): Ditto.
35227 (vector_insn_info::compatible_vtype_p): Ditto.
35228 (vector_insn_info::available_p): Ditto.
35229 (vector_insn_info::merge): Ditto.
35230 (vector_insn_info::fuse_avl): Ditto.
35231 (vector_insn_info::fuse_sew_lmul): Ditto.
35232 (vector_insn_info::fuse_tail_policy): Ditto.
35233 (vector_insn_info::fuse_mask_policy): Ditto.
35234 (vector_insn_info::dump): Ditto.
35235 (vector_infos_manager::release): Ditto.
35236 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
35237 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
35238 (pass_vsetvl::hard_empty_block_p): Ditto.
35239 (pass_vsetvl::backward_demand_fusion): Ditto.
35240 (pass_vsetvl::forward_demand_fusion): Ditto.
35241 (pass_vsetvl::refine_vsetvls): Ditto.
35242 (pass_vsetvl::cleanup_vsetvls): Ditto.
35243 (pass_vsetvl::commit_vsetvls): Ditto.
35244 (pass_vsetvl::propagate_avl): Ditto.
35245 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
35246 (struct demands_pair): Ditto.
35247 (struct demands_cond): Ditto.
35248 (struct demands_fuse_rule): Ditto.
35249 * config/riscv/vector-iterators.md: New iterator.
35250 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
35251 (*pred_broadcast<mode>): Ditto.
35252 (*pred_broadcast<mode>_extended_scalar): Ditto.
35253 (@pred_extract_first<mode>): Ditto.
35254 (*pred_extract_first<mode>): Ditto.
35255 (@pred_extract_first_trunc<mode>): Ditto.
35256 * config/riscv/riscv-vsetvl.def: New file.
35258 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
35260 * config/riscv/bitmanip.md: allow 0 constant in max/min
35263 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
35265 * config/riscv/bitmanip.md: Fix wrong index in the check.
35267 2023-03-04 Jakub Jelinek <jakub@redhat.com>
35269 PR middle-end/109006
35270 * vec.cc (test_auto_alias): Adjust comment for removal of
35272 * read-rtl-function.cc (function_reader::parse_block): Likewise.
35273 * gdbhooks.py: Likewise.
35275 2023-03-04 Jakub Jelinek <jakub@redhat.com>
35277 PR testsuite/108973
35278 * selftest-diagnostic.cc
35279 (test_diagnostic_context::test_diagnostic_context): Set
35280 caret_max_width to 80.
35282 2023-03-03 Alexandre Oliva <oliva@adacore.com>
35284 * gimple-ssa-warn-access.cc
35285 (pass_waccess::check_dangling_stores): Skip non-stores.
35287 2023-03-03 Alexandre Oliva <oliva@adacore.com>
35289 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
35290 after vmsr and vmrs, and lower the case of P0.
35292 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
35294 PR middle-end/109006
35295 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
35297 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
35299 PR middle-end/109006
35300 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
35302 2023-03-03 Jakub Jelinek <jakub@redhat.com>
35305 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
35306 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
35307 suppressed on stmt. For [static %E] warning, print access_nelts
35308 rather than access_size. Fix up comment wording.
35310 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
35312 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
35313 arch14 instead of z16.
35315 2023-03-03 Anthony Green <green@moxielogic.com>
35317 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
35319 2023-03-03 Anthony Green <green@moxielogic.com>
35321 * config/moxie/constraints.md (A, B, W): Change
35322 define_constraint to define_memory_constraint.
35324 2023-03-03 Xi Ruoyao <xry111@xry111.site>
35326 * toplev.cc (process_options): Fix the spelling of
35327 "-fstack-clash-protection".
35329 2023-03-03 Richard Biener <rguenther@suse.de>
35331 PR tree-optimization/109002
35332 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
35333 PHI-translate ANTIC_IN.
35335 2023-03-03 Jakub Jelinek <jakub@redhat.com>
35337 PR tree-optimization/108988
35338 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
35339 size_type_node before passing it as argument to fwrite. Formatting
35342 2023-03-03 Richard Biener <rguenther@suse.de>
35345 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
35346 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
35347 * config/i386/i386-features.h (scalar_chain::max_visits): New.
35348 (scalar_chain::build): Add bitmap parameter, return boolean.
35349 (scalar_chain::add_insn): Likewise.
35350 (scalar_chain::analyze_register_chain): Likewise.
35351 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
35352 Initialize max_visits.
35353 (scalar_chain::analyze_register_chain): When we exhaust
35354 max_visits, abort. Also abort when running into any
35356 (scalar_chain::add_insn): Propagate abort.
35357 (scalar_chain::build): Likewise. When aborting amend
35358 the set of disallowed insn with the insns set.
35359 (convert_scalars_to_vector): Adjust. Do not convert aborted
35362 2023-03-03 Richard Biener <rguenther@suse.de>
35365 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
35366 generate a DIE for a function scope static.
35368 2023-03-03 Alexandre Oliva <oliva@adacore.com>
35370 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
35372 2023-03-02 Jakub Jelinek <jakub@redhat.com>
35375 * target.h (emit_support_tinfos_callback): New typedef.
35376 * targhooks.h (default_emit_support_tinfos): Declare.
35377 * targhooks.cc (default_emit_support_tinfos): New function.
35378 * target.def (emit_support_tinfos): New target hook.
35379 * doc/tm.texi.in (emit_support_tinfos): Document it.
35380 * doc/tm.texi: Regenerated.
35381 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
35382 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
35384 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
35386 * ira-costs.cc: Include print-rtl.h.
35387 (record_reg_classes, scan_one_insn): Add code to print debug info.
35388 (record_operand_costs): Find and use smaller cost for hard reg
35391 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
35392 Paul-Antoine Arras <pa@codesourcery.com>
35394 * builtins.cc (mathfn_built_in_explicit): New.
35395 * config/gcn/gcn.cc: Include case-cfn-macros.h.
35396 (mathfn_built_in_explicit): Add prototype.
35397 (gcn_vectorize_builtin_vectorized_function): New.
35398 (gcn_libc_has_function): New.
35399 (TARGET_LIBC_HAS_FUNCTION): Define.
35400 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
35402 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
35404 PR tree-optimization/108979
35405 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
35406 operations on invariants.
35408 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
35410 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
35411 * config/s390/s390.cc (s390_option_override_internal): Make
35412 partial vector usage the default from z13 on.
35413 * config/s390/vector.md (len_load_v16qi): Add.
35414 (len_store_v16qi): Add.
35416 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35418 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
35419 of constant 0 offset.
35421 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
35423 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
35425 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
35427 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
35429 * config.gcc: add -with-{no-}msa build option.
35430 * config/mips/mips.h: Likewise.
35431 * doc/install.texi: Likewise.
35433 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
35435 PR tree-optimization/108603
35436 * explow.cc (convert_memory_address_addr_space_1): Only wrap
35437 the result of a recursive call in a CONST if no instructions
35440 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
35442 PR tree-optimization/108430
35443 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
35444 of inverted condition.
35446 2023-03-02 Jakub Jelinek <jakub@redhat.com>
35449 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
35450 comparison copy the bytes from ptr to a temporary buffer and clearing
35451 padding bits in there.
35453 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
35455 PR middle-end/108545
35456 * gimplify.cc (struct tree_operand_hash_no_se): New.
35457 (omp_index_mapping_groups_1, omp_index_mapping_groups,
35458 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
35459 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
35460 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
35461 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
35462 of tree_operand_hash.
35464 2023-03-01 LIU Hao <lh_mouse@126.com>
35467 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
35468 Remove the size limit `pch_VA_max_size`
35470 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
35472 PR middle-end/108546
35473 * omp-low.cc (lower_omp_target): Remove optional handling
35474 on the receiver side, i.e. inside target (data), for
35477 2023-03-01 Jakub Jelinek <jakub@redhat.com>
35480 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
35481 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
35483 2023-03-01 Richard Biener <rguenther@suse.de>
35485 PR tree-optimization/108970
35486 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
35487 Check we can copy the BBs.
35488 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
35490 (vect_do_peeling): Streamline error handling.
35492 2023-03-01 Richard Biener <rguenther@suse.de>
35494 PR tree-optimization/108950
35495 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
35496 Check oprnd0 is defined in the loop.
35497 * tree-vect-loop.cc (vectorizable_reduction): Record all
35498 operands vector types, compute that of invariants and
35499 properly update their SLP nodes.
35501 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
35504 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
35505 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
35507 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
35509 PR middle-end/107411
35510 PR middle-end/107411
35511 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
35513 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
35514 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
35516 2023-02-28 Jakub Jelinek <jakub@redhat.com>
35518 PR sanitizer/108894
35519 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
35520 comparison rather than index > bound.
35521 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
35522 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
35523 * doc/invoke.texi (-fsanitize=bounds): Document that whether
35524 flexible array member-like arrays are instrumented or not depends
35525 on -fstrict-flex-arrays* options of strict_flex_array attributes.
35526 (-fsanitize=bounds-strict): Document that flexible array members
35527 are not instrumented.
35529 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
35533 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
35534 (fmod<mode>3): Ditto.
35535 (fpremxf4_i387): Ditto.
35536 (reminderxf3): Ditto.
35537 (reminder<mode>3): Ditto.
35538 (fprem1xf4_i387): Ditto.
35540 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
35542 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
35543 generating FFS with mismatched operand and result modes, by using
35544 an explicit SIGN_EXTEND/ZERO_EXTEND.
35545 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
35546 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
35548 2023-02-27 Patrick Palka <ppalka@redhat.com>
35550 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
35551 * lra-int.h (lra_change_class): Likewise.
35552 * recog.h (which_op_alt): Likewise.
35553 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
35556 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35558 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
35560 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
35562 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
35563 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
35565 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
35567 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
35568 (xtensa_get_config_v3): New functions.
35570 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35572 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
35574 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
35576 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
35577 the macro to 0x1000000000.
35579 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
35582 * doc/gm2.texi (-fm2-pathname): New option documented.
35583 (-fm2-pathnameI): New option documented.
35584 (-fm2-prefix=): New option documented.
35585 (-fruntime-modules=): Update default module list.
35587 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
35590 * config/xtensa/xtensa-protos.h
35591 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
35592 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
35593 to xtensa_expand_call.
35594 (xtensa_expand_call): Emit the call and add a clobber expression
35595 for the static chain to it in case of windowed ABI.
35596 * config/xtensa/xtensa.md (call, call_value, sibcall)
35597 (sibcall_value): Call xtensa_expand_call and complete expansion
35598 right after that call.
35600 2023-02-24 Richard Biener <rguenther@suse.de>
35602 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
35603 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
35604 changing alignment of vec<T, A, vl_embed> and simplifying
35606 (vec<T, A, vl_embed>::address): Compute as this + 1.
35607 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
35608 vector instead of the offset of the m_vecdata member.
35609 (auto_vec<T, N>::m_data): Turn storage into
35610 uninitialized unsigned char.
35611 (auto_vec<T, N>::auto_vec): Allow allocation of one
35612 stack member. Initialize m_vec in a special way to
35613 avoid later stringop overflow diagnostics.
35614 * vec.cc (test_auto_alias): New.
35615 (vec_cc_tests): Call it.
35617 2023-02-24 Richard Biener <rguenther@suse.de>
35619 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
35620 take a const reference to the object, use address to
35622 (vec<T, A, vl_embed>::contains): Use address to access data.
35623 (vec<T, A, vl_embed>::operator[]): Use address instead of
35624 m_vecdata to access data.
35625 (vec<T, A, vl_embed>::iterate): Likewise.
35626 (vec<T, A, vl_embed>::copy): Likewise.
35627 (vec<T, A, vl_embed>::quick_push): Likewise.
35628 (vec<T, A, vl_embed>::pop): Likewise.
35629 (vec<T, A, vl_embed>::quick_insert): Likewise.
35630 (vec<T, A, vl_embed>::ordered_remove): Likewise.
35631 (vec<T, A, vl_embed>::unordered_remove): Likewise.
35632 (vec<T, A, vl_embed>::block_remove): Likewise.
35633 (vec<T, A, vl_heap>::address): Likewise.
35635 2023-02-24 Martin Liska <mliska@suse.cz>
35637 PR sanitizer/108834
35638 * asan.cc (asan_add_global): Use proper TU name for normal
35639 global variables (and aux_base_name for the artificial one).
35641 2023-02-24 Jakub Jelinek <jakub@redhat.com>
35643 * config/i386/i386-builtin.def: Update description of BDESC
35644 and BDESC_FIRST in file comment to include mask2.
35646 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35648 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
35650 2023-02-24 Jakub Jelinek <jakub@redhat.com>
35652 PR middle-end/108854
35653 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
35654 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
35655 nodes and adjust their DECL_CONTEXT.
35657 2023-02-24 Jakub Jelinek <jakub@redhat.com>
35660 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
35661 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
35662 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
35663 __builtin_ia32_cvtne2ps2bf16_v8bf,
35664 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
35665 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
35666 __builtin_ia32_cvtneps2bf16_v8sf_mask,
35667 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
35668 __builtin_ia32_cvtneps2bf16_v4sf_mask,
35669 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
35670 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
35671 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
35672 __builtin_ia32_dpbf16ps_v4sf_mask,
35673 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
35674 OPTION_MASK_ISA_AVX512VL.
35676 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
35678 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
35679 Add non-compact 32-bit multilibs.
35681 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
35683 * config/mips/mips.md (*clo<mode>2): New pattern.
35685 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
35687 * config/mips/mips.h (machine_function): New variable
35688 use_hazard_barrier_return_p.
35689 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
35690 (mips_hb_return_internal): New insn pattern.
35691 * config/mips/mips.cc (mips_attribute_table): Add attribute
35692 use_hazard_barrier_return.
35693 (mips_use_hazard_barrier_return_p): New static function.
35694 (mips_function_attr_inlinable_p): Likewise.
35695 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
35696 Emit error for unsupported architecture choice.
35697 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
35698 Return false for use_hazard_barrier_return.
35699 (mips_expand_epilogue): Emit hazard barrier return.
35700 * doc/extend.texi: Document use_hazard_barrier_return.
35702 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
35704 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
35705 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
35706 for the gcc-internal headers.
35708 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
35710 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
35711 and $(POSTCOMPILE) instead of manual dependency listing.
35712 * config/xtensa/xtensa-dynconfig.c: Rename to ...
35713 * config/xtensa/xtensa-dynconfig.cc: ... this.
35715 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
35717 * doc/cfg.texi: Reorder index entries around @items.
35718 * doc/cpp.texi: Ditto.
35719 * doc/cppenv.texi: Ditto.
35720 * doc/cppopts.texi: Ditto.
35721 * doc/generic.texi: Ditto.
35722 * doc/install.texi: Ditto.
35723 * doc/extend.texi: Ditto.
35724 * doc/invoke.texi: Ditto.
35725 * doc/md.texi: Ditto.
35726 * doc/rtl.texi: Ditto.
35727 * doc/tm.texi.in: Ditto.
35728 * doc/trouble.texi: Ditto.
35729 * doc/tm.texi: Regenerate.
35731 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35733 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
35734 the occurrence of general-purpose register used only once and for
35735 transferring intermediate value.
35737 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35739 * config/xtensa/xtensa.cc (machine_function): Add new member
35740 'eliminated_callee_saved_bmp'.
35741 (xtensa_can_eliminate_callee_saved_reg_p): New function to
35742 determine whether the register can be eliminated or not.
35743 (xtensa_expand_prologue): Add invoking the above function and
35744 elimination the use of callee-saved register by using its stack
35745 slot through the stack pointer (or the frame pointer if needed)
35747 (xtensa_expand_prologue): Modify to not emit register restoration
35748 insn from its stack slot if the register is already eliminated.
35750 2023-02-23 Jakub Jelinek <jakub@redhat.com>
35752 PR translation/108890
35753 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
35754 around fatal_error format strings.
35756 2023-02-23 Richard Biener <rguenther@suse.de>
35758 * tree-ssa-structalias.cc (handle_lhs_call): Do not
35759 re-create rhsc, only truncate it.
35761 2023-02-23 Jakub Jelinek <jakub@redhat.com>
35763 PR middle-end/106258
35764 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
35765 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
35767 2023-02-23 Richard Biener <rguenther@suse.de>
35769 * tree-if-conv.cc (tree_if_conversion): Properly manage
35770 memory of refs and the contained data references.
35772 2023-02-23 Richard Biener <rguenther@suse.de>
35774 PR tree-optimization/108888
35775 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
35776 calls to predicate.
35777 (predicate_statements): Only predicate calls with PLF_2.
35779 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35781 * config/xtensa/xtensa.md
35782 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
35783 Add missing "SI:" to PLUS RTXes.
35785 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
35788 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
35789 Emit (use (reg:SI A0_REG)) at the end in the sibling call
35790 (i.e. the same place as (return) in the normal call).
35792 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
35795 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
35798 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
35800 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
35801 (sibcall_value, sibcall_value_internal): Add 'use' expression
35804 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
35806 * doc/cppdiropts.texi: Reorder @opindex commands to precede
35807 @items they relate to.
35808 * doc/cppopts.texi: Ditto.
35809 * doc/cppwarnopts.texi: Ditto.
35810 * doc/invoke.texi: Ditto.
35811 * doc/lto.texi: Ditto.
35813 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
35815 * internal-fn.cc (expand_MASK_CALL): New.
35816 * internal-fn.def (MASK_CALL): New.
35817 * internal-fn.h (expand_MASK_CALL): New prototype.
35818 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
35819 for mask arguments also.
35820 * tree-if-conv.cc: Include cgraph.h.
35821 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
35822 (predicate_statements): Convert functions to IFN_MASK_CALL.
35823 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
35824 IFN_MASK_CALL as a SIMD function call.
35825 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
35826 IFN_MASK_CALL as an inbranch SIMD function call.
35827 Generate the mask vector arguments.
35829 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35831 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
35832 (class widen_reducop): Ditto.
35833 (class freducop): Ditto.
35834 (class widen_freducop): Ditto.
35836 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35837 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
35846 (vwredsumu): Ditto.
35847 (vfredusum): Ditto.
35848 (vfredosum): Ditto.
35851 (vfwredosum): Ditto.
35852 (vfwredusum): Ditto.
35853 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
35855 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35856 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
35857 (DEF_RVV_WU_OPS): Ditto.
35858 (DEF_RVV_WF_OPS): Ditto.
35859 (vint8mf8_t): Ditto.
35860 (vint8mf4_t): Ditto.
35861 (vint8mf2_t): Ditto.
35862 (vint8m1_t): Ditto.
35863 (vint8m2_t): Ditto.
35864 (vint8m4_t): Ditto.
35865 (vint8m8_t): Ditto.
35866 (vint16mf4_t): Ditto.
35867 (vint16mf2_t): Ditto.
35868 (vint16m1_t): Ditto.
35869 (vint16m2_t): Ditto.
35870 (vint16m4_t): Ditto.
35871 (vint16m8_t): Ditto.
35872 (vint32mf2_t): Ditto.
35873 (vint32m1_t): Ditto.
35874 (vint32m2_t): Ditto.
35875 (vint32m4_t): Ditto.
35876 (vint32m8_t): Ditto.
35877 (vuint8mf8_t): Ditto.
35878 (vuint8mf4_t): Ditto.
35879 (vuint8mf2_t): Ditto.
35880 (vuint8m1_t): Ditto.
35881 (vuint8m2_t): Ditto.
35882 (vuint8m4_t): Ditto.
35883 (vuint8m8_t): Ditto.
35884 (vuint16mf4_t): Ditto.
35885 (vuint16mf2_t): Ditto.
35886 (vuint16m1_t): Ditto.
35887 (vuint16m2_t): Ditto.
35888 (vuint16m4_t): Ditto.
35889 (vuint16m8_t): Ditto.
35890 (vuint32mf2_t): Ditto.
35891 (vuint32m1_t): Ditto.
35892 (vuint32m2_t): Ditto.
35893 (vuint32m4_t): Ditto.
35894 (vuint32m8_t): Ditto.
35895 (vfloat32mf2_t): Ditto.
35896 (vfloat32m1_t): Ditto.
35897 (vfloat32m2_t): Ditto.
35898 (vfloat32m4_t): Ditto.
35899 (vfloat32m8_t): Ditto.
35900 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
35901 (DEF_RVV_WU_OPS): Ditto.
35902 (DEF_RVV_WF_OPS): Ditto.
35903 (required_extensions_p): Add reduction support.
35904 (rvv_arg_type_info::get_base_vector_type): Ditto.
35905 (rvv_arg_type_info::get_tree_type): Ditto.
35906 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
35907 * config/riscv/riscv.md: Ditto.
35908 * config/riscv/vector-iterators.md (minu): Ditto.
35909 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
35910 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
35911 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
35912 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
35913 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
35914 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
35915 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
35917 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35919 * config/riscv/iterators.md: New iterator.
35920 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
35921 (enum ternop_type): New enum.
35922 (class vmacc): New class.
35923 (class imac): Ditto.
35924 (class vnmsac): Ditto.
35925 (enum widen_ternop_type): New enum.
35926 (class vmadd): Ditto.
35927 (class vnmsub): Ditto.
35928 (class iwmac): Ditto.
35929 (class vwmacc): Ditto.
35930 (class vwmaccu): Ditto.
35931 (class vwmaccsu): Ditto.
35932 (class vwmaccus): Ditto.
35933 (class reverse_binop): Ditto.
35934 (class vfmacc): Ditto.
35935 (class vfnmsac): Ditto.
35936 (class vfmadd): Ditto.
35937 (class vfnmsub): Ditto.
35938 (class vfnmacc): Ditto.
35939 (class vfmsac): Ditto.
35940 (class vfnmadd): Ditto.
35941 (class vfmsub): Ditto.
35942 (class vfwmacc): Ditto.
35943 (class vfwnmacc): Ditto.
35944 (class vfwmsac): Ditto.
35945 (class vfwnmsac): Ditto.
35946 (class float_misc): Ditto.
35947 (class fcmp): Ditto.
35948 (class vfclass): Ditto.
35949 (class vfcvt_x): Ditto.
35950 (class vfcvt_rtz_x): Ditto.
35951 (class vfcvt_f): Ditto.
35952 (class vfwcvt_x): Ditto.
35953 (class vfwcvt_rtz_x): Ditto.
35954 (class vfwcvt_f): Ditto.
35955 (class vfncvt_x): Ditto.
35956 (class vfncvt_rtz_x): Ditto.
35957 (class vfncvt_f): Ditto.
35958 (class vfncvt_rod_f): Ditto.
35960 * config/riscv/riscv-vector-builtins-bases.h:
35961 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
36005 (vfcvt_rtz_x): Ditto.
36006 (vfcvt_rtz_xu): Ditto.
36009 (vfwcvt_xu): Ditto.
36010 (vfwcvt_rtz_x): Ditto.
36011 (vfwcvt_rtz_xu): Ditto.
36014 (vfncvt_xu): Ditto.
36015 (vfncvt_rtz_x): Ditto.
36016 (vfncvt_rtz_xu): Ditto.
36018 (vfncvt_rod_f): Ditto.
36019 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36020 (struct move_def): Ditto.
36021 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
36022 (DEF_RVV_CONVERT_I_OPS): Ditto.
36023 (DEF_RVV_CONVERT_U_OPS): Ditto.
36024 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36025 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36026 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36027 (vfloat64m1_t): Ditto.
36028 (vfloat64m2_t): Ditto.
36029 (vfloat64m4_t): Ditto.
36030 (vfloat64m8_t): Ditto.
36031 (vint32mf2_t): Ditto.
36032 (vint32m1_t): Ditto.
36033 (vint32m2_t): Ditto.
36034 (vint32m4_t): Ditto.
36035 (vint32m8_t): Ditto.
36036 (vint64m1_t): Ditto.
36037 (vint64m2_t): Ditto.
36038 (vint64m4_t): Ditto.
36039 (vint64m8_t): Ditto.
36040 (vuint32mf2_t): Ditto.
36041 (vuint32m1_t): Ditto.
36042 (vuint32m2_t): Ditto.
36043 (vuint32m4_t): Ditto.
36044 (vuint32m8_t): Ditto.
36045 (vuint64m1_t): Ditto.
36046 (vuint64m2_t): Ditto.
36047 (vuint64m4_t): Ditto.
36048 (vuint64m8_t): Ditto.
36049 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
36050 (DEF_RVV_CONVERT_U_OPS): Ditto.
36051 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36052 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36053 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36054 (DEF_RVV_F_OPS): Ditto.
36055 (DEF_RVV_WEXTF_OPS): Ditto.
36056 (required_extensions_p): Adjust for floating-point support.
36057 (check_required_extensions): Ditto.
36058 (unsigned_base_type_p): Ditto.
36059 (get_mode_for_bitsize): Ditto.
36060 (rvv_arg_type_info::get_base_vector_type): Ditto.
36061 (rvv_arg_type_info::get_tree_type): Ditto.
36062 * config/riscv/riscv-vector-builtins.def (v_f): New define.
36065 (xu_v): New define.
36067 (xu_w): New define.
36068 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
36069 (function_expander::arg_mode): New function.
36070 * config/riscv/vector-iterators.md (sof): New iterator.
36076 (fixuns_trunc): Ditto.
36078 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
36079 (@pred_<optab><mode>): Ditto.
36080 (@pred_<optab><mode>_scalar): Ditto.
36081 (@pred_<optab><mode>_reverse_scalar): Ditto.
36082 (@pred_<copysign><mode>): Ditto.
36083 (@pred_<copysign><mode>_scalar): Ditto.
36084 (@pred_mul_<optab><mode>): Ditto.
36085 (pred_mul_<optab><mode>_undef_merge): Ditto.
36086 (*pred_<madd_nmsub><mode>): Ditto.
36087 (*pred_<macc_nmsac><mode>): Ditto.
36088 (*pred_mul_<optab><mode>): Ditto.
36089 (@pred_mul_<optab><mode>_scalar): Ditto.
36090 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
36091 (*pred_<madd_nmsub><mode>_scalar): Ditto.
36092 (*pred_<macc_nmsac><mode>_scalar): Ditto.
36093 (*pred_mul_<optab><mode>_scalar): Ditto.
36094 (@pred_neg_mul_<optab><mode>): Ditto.
36095 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
36096 (*pred_<nmadd_msub><mode>): Ditto.
36097 (*pred_<nmacc_msac><mode>): Ditto.
36098 (*pred_neg_mul_<optab><mode>): Ditto.
36099 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
36100 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
36101 (*pred_<nmadd_msub><mode>_scalar): Ditto.
36102 (*pred_<nmacc_msac><mode>_scalar): Ditto.
36103 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
36104 (@pred_<misc_op><mode>): Ditto.
36105 (@pred_class<mode>): Ditto.
36106 (@pred_dual_widen_<optab><mode>): Ditto.
36107 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
36108 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
36109 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
36110 (@pred_widen_mul_<optab><mode>): Ditto.
36111 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
36112 (@pred_widen_neg_mul_<optab><mode>): Ditto.
36113 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
36114 (@pred_cmp<mode>): Ditto.
36115 (*pred_cmp<mode>): Ditto.
36116 (*pred_cmp<mode>_narrow): Ditto.
36117 (@pred_cmp<mode>_scalar): Ditto.
36118 (*pred_cmp<mode>_scalar): Ditto.
36119 (*pred_cmp<mode>_scalar_narrow): Ditto.
36120 (@pred_eqne<mode>_scalar): Ditto.
36121 (*pred_eqne<mode>_scalar): Ditto.
36122 (*pred_eqne<mode>_scalar_narrow): Ditto.
36123 (@pred_merge<mode>_scalar): Ditto.
36124 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
36125 (@pred_<fix_cvt><mode>): Ditto.
36126 (@pred_<float_cvt><mode>): Ditto.
36127 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
36128 (@pred_widen_<fix_cvt><mode>): Ditto.
36129 (@pred_widen_<float_cvt><mode>): Ditto.
36130 (@pred_extend<mode>): Ditto.
36131 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
36132 (@pred_narrow_<fix_cvt><mode>): Ditto.
36133 (@pred_narrow_<float_cvt><mode>): Ditto.
36134 (@pred_trunc<mode>): Ditto.
36135 (@pred_rod_trunc<mode>): Ditto.
36137 2023-02-22 Jakub Jelinek <jakub@redhat.com>
36139 PR middle-end/106258
36140 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
36141 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
36142 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
36143 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
36145 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
36147 * common.opt (-Wcomplain-wrong-lang): New.
36148 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
36149 * opts-common.cc (prune_options): Handle it.
36150 * opts-global.cc (complain_wrong_lang): Use it.
36152 2023-02-21 David Malcolm <dmalcolm@redhat.com>
36155 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
36157 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
36160 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
36162 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
36163 (sibcall_value, sibcall_value_internal): Add 'use' expression
36166 2023-02-21 Richard Biener <rguenther@suse.de>
36168 PR tree-optimization/108691
36169 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
36170 assert about calls_setjmp not becoming true when it was false.
36172 2023-02-21 Richard Biener <rguenther@suse.de>
36174 PR tree-optimization/108793
36175 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
36176 Use convert operands to niter_type when computing num.
36178 2023-02-21 Richard Biener <rguenther@suse.de>
36181 2023-02-13 Richard Biener <rguenther@suse.de>
36183 PR tree-optimization/108691
36184 * tree-cfg.cc (notice_special_calls): When the CFG is built
36185 honor gimple_call_ctrl_altering_p.
36186 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
36187 temporarily if the call is not control-altering.
36188 * calls.cc (emit_call_1): Do not add REG_SETJMP if
36189 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
36191 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36193 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
36194 true if register A0 (return address register) when -Og is specified.
36196 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
36198 * config/i386/predicates.md
36199 (general_x64constmem_operand): New predicate.
36200 * config/i386/i386.md (*cmpqi_ext<mode>_1):
36201 Use nonimm_x64constmem_operand.
36202 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
36203 (*addqi_ext<mode>_1): Ditto.
36204 (*testqi_ext<mode>_1): Ditto.
36205 (*andqi_ext<mode>_1): Ditto.
36206 (*andqi_ext<mode>_1_cc): Ditto.
36207 (*<any_or:code>qi_ext<mode>_1): Ditto.
36208 (*xorqi_ext<mode>_1_cc): Ditto.
36210 2023-02-20 Jakub Jelinek <jakub2redhat.com>
36213 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
36214 gen_umadddi4_highpart{,_le}.
36216 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
36218 * config/riscv/riscv.md (prefetch): Use r instead of p for the
36220 (riscv_prefetchi_<mode>): Ditto.
36222 2023-02-20 Richard Biener <rguenther@suse.de>
36224 PR tree-optimization/108816
36225 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
36226 versioning condition split prerequesite, assert required
36229 2023-02-20 Richard Biener <rguenther@suse.de>
36231 PR tree-optimization/108825
36232 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
36233 loop-local verfication only verify there's no pending SSA
36236 2023-02-20 Richard Biener <rguenther@suse.de>
36238 PR tree-optimization/108819
36239 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
36240 we have an SSA name as iv_2 as expected.
36242 2023-02-18 Jakub Jelinek <jakub@redhat.com>
36244 PR tree-optimization/108819
36245 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
36247 2023-02-18 Jakub Jelinek <jakub@redhat.com>
36250 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
36251 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
36253 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
36254 with ix86_replace_reg_with_reg.
36256 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
36258 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
36260 2023-02-18 Xi Ruoyao <xry111@xry111.site>
36262 * config.gcc (triplet_abi): Set its value based on $with_abi,
36263 instead of $target.
36264 (la_canonical_triplet): Set it after $triplet_abi is set
36266 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
36267 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
36270 2023-02-18 Andrew Pinski <apinski@marvell.com>
36272 * match.pd: Remove #if GIMPLE around the
36275 2023-02-18 Andrew Pinski <apinski@marvell.com>
36277 * value-query.h (get_range_query): Return the global ranges
36278 for a nullptr func.
36280 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
36282 * doc/invoke.texi (@item -Wall): Fix typo in
36285 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
36288 * config/i386/predicates.md
36289 (nonimm_x64constmem_operand): New predicate.
36290 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
36291 (*subqi_ext<mode>_0): Ditto.
36292 (*andqi_ext<mode>_0): Ditto.
36293 (*<any_or:code>qi_ext<mode>_0): Ditto.
36295 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
36298 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
36299 int_outermode instead of GET_MODE (tem) to prevent
36300 VOIDmode from entering simplify_gen_subreg.
36302 2023-02-17 Richard Biener <rguenther@suse.de>
36304 PR tree-optimization/108821
36305 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
36306 move volatile accesses.
36308 2023-02-17 Richard Biener <rguenther@suse.de>
36310 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
36311 called on virtual operands.
36312 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
36313 ssa_undefined_value_p calls.
36314 (vn_phi_insert): Likewise.
36315 (set_ssa_val_to): Likewise.
36316 (visit_phi): Avoid extra work with equivalences for
36317 virtual operand PHIs.
36319 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36321 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
36323 (class mask_nlogic): Ditto.
36324 (class mask_notlogic): Ditto.
36325 (class vmmv): Ditto.
36326 (class vmclr): Ditto.
36327 (class vmset): Ditto.
36328 (class vmnot): Ditto.
36329 (class vcpop): Ditto.
36330 (class vfirst): Ditto.
36331 (class mask_misc): Ditto.
36332 (class viota): Ditto.
36333 (class vid): Ditto.
36335 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36336 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
36355 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36356 (struct mask_alu_def): Ditto.
36358 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36359 * config/riscv/riscv-vector-builtins.cc: Ditto.
36360 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
36361 for dest it scalar RVV intrinsics.
36362 * config/riscv/vector-iterators.md (sof): New iterator.
36363 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
36364 (@pred_<optab>not<mode>): New pattern.
36365 (@pred_popcount<VB:mode><P:mode>): New pattern.
36366 (@pred_ffs<VB:mode><P:mode>): New pattern.
36367 (@pred_<misc_op><mode>): New pattern.
36368 (@pred_iota<mode>): New pattern.
36369 (@pred_series<mode>): New pattern.
36371 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36373 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
36377 * config/riscv/riscv-vector-builtins.cc: Ditto.
36379 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36380 kito-cheng <kito.cheng@sifive.com>
36382 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
36383 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
36384 (sew64_scalar_helper): New function.
36385 * config/riscv/vector.md: Normalization.
36387 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36389 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
36451 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36453 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
36454 (@pred_<optab><mode>_scalar): Ditto.
36455 (*pred_<optab><mode>_scalar): Ditto.
36456 (*pred_<optab><mode>_extended_scalar): Ditto.
36458 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36460 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
36461 (init_builtins): Ditto.
36462 (mangle_builtin_type): Ditto.
36463 (verify_type_context): Ditto.
36464 (handle_pragma_vector): Ditto.
36465 (builtin_decl): Ditto.
36466 (expand_builtin): Ditto.
36467 (const_vec_all_same_in_range_p): Ditto.
36468 (legitimize_move): Ditto.
36469 (emit_vlmax_op): Ditto.
36470 (emit_nonvlmax_op): Ditto.
36471 (get_vlmul): Ditto.
36472 (get_ratio): Ditto.
36475 (get_avl_type): Ditto.
36476 (calculate_ratio): Ditto.
36477 (enum vlmul_type): Ditto.
36479 (neg_simm5_p): Ditto.
36480 (has_vi_variant_p): Ditto.
36482 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36484 * config/riscv/riscv-protos.h (simm32_p): Remove.
36485 * config/riscv/riscv-v.cc (simm32_p): Ditto.
36486 * config/riscv/vector.md: Use immediate_operand
36487 instead of riscv_vector::simm32_p.
36489 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
36491 * doc/invoke.texi (Optimize Options): Reword the explanation
36492 getting minimal, maximal and default values of a parameter.
36494 2023-02-16 Patrick Palka <ppalka@redhat.com>
36496 * addresses.h: Mechanically drop 'static' from 'static inline'
36497 functions via s/^static inline/inline/g.
36498 * asan.h: Likewise.
36499 * attribs.h: Likewise.
36500 * basic-block.h: Likewise.
36501 * bitmap.h: Likewise.
36502 * cfghooks.h: Likewise.
36503 * cfgloop.h: Likewise.
36504 * cgraph.h: Likewise.
36505 * cselib.h: Likewise.
36506 * data-streamer.h: Likewise.
36507 * debug.h: Likewise.
36509 * diagnostic.h: Likewise.
36510 * dominance.h: Likewise.
36511 * dumpfile.h: Likewise.
36512 * emit-rtl.h: Likewise.
36513 * except.h: Likewise.
36514 * expmed.h: Likewise.
36515 * expr.h: Likewise.
36516 * fixed-value.h: Likewise.
36517 * gengtype.h: Likewise.
36518 * gimple-expr.h: Likewise.
36519 * gimple-iterator.h: Likewise.
36520 * gimple-predict.h: Likewise.
36521 * gimple-range-fold.h: Likewise.
36522 * gimple-ssa.h: Likewise.
36523 * gimple.h: Likewise.
36524 * graphite.h: Likewise.
36525 * hard-reg-set.h: Likewise.
36526 * hash-map.h: Likewise.
36527 * hash-set.h: Likewise.
36528 * hash-table.h: Likewise.
36529 * hwint.h: Likewise.
36530 * input.h: Likewise.
36531 * insn-addr.h: Likewise.
36532 * internal-fn.h: Likewise.
36533 * ipa-fnsummary.h: Likewise.
36534 * ipa-icf-gimple.h: Likewise.
36535 * ipa-inline.h: Likewise.
36536 * ipa-modref.h: Likewise.
36537 * ipa-prop.h: Likewise.
36538 * ira-int.h: Likewise.
36540 * lra-int.h: Likewise.
36542 * lto-streamer.h: Likewise.
36543 * memmodel.h: Likewise.
36544 * omp-general.h: Likewise.
36545 * optabs-query.h: Likewise.
36546 * optabs.h: Likewise.
36547 * plugin.h: Likewise.
36548 * pretty-print.h: Likewise.
36549 * range.h: Likewise.
36550 * read-md.h: Likewise.
36551 * recog.h: Likewise.
36552 * regs.h: Likewise.
36553 * rtl-iter.h: Likewise.
36555 * sbitmap.h: Likewise.
36556 * sched-int.h: Likewise.
36557 * sel-sched-ir.h: Likewise.
36558 * sese.h: Likewise.
36559 * sparseset.h: Likewise.
36560 * ssa-iterators.h: Likewise.
36561 * system.h: Likewise.
36562 * target-globals.h: Likewise.
36563 * target.h: Likewise.
36564 * timevar.h: Likewise.
36565 * tree-chrec.h: Likewise.
36566 * tree-data-ref.h: Likewise.
36567 * tree-iterator.h: Likewise.
36568 * tree-outof-ssa.h: Likewise.
36569 * tree-phinodes.h: Likewise.
36570 * tree-scalar-evolution.h: Likewise.
36571 * tree-sra.h: Likewise.
36572 * tree-ssa-alias.h: Likewise.
36573 * tree-ssa-live.h: Likewise.
36574 * tree-ssa-loop-manip.h: Likewise.
36575 * tree-ssa-loop.h: Likewise.
36576 * tree-ssa-operands.h: Likewise.
36577 * tree-ssa-propagate.h: Likewise.
36578 * tree-ssa-sccvn.h: Likewise.
36579 * tree-ssa.h: Likewise.
36580 * tree-ssanames.h: Likewise.
36581 * tree-streamer.h: Likewise.
36582 * tree-switch-conversion.h: Likewise.
36583 * tree-vectorizer.h: Likewise.
36584 * tree.h: Likewise.
36585 * wide-int.h: Likewise.
36587 2023-02-16 Jakub Jelinek <jakub@redhat.com>
36589 PR tree-optimization/108657
36590 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
36591 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
36592 is a call to internal or builtin function.
36594 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
36596 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
36597 using-declaration to unhide functions.
36599 2023-02-16 Jakub Jelinek <jakub@redhat.com>
36601 PR tree-optimization/108783
36602 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
36603 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
36604 t to curr->op. Otherwise, punt if either newop1 or newop2 are
36605 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
36607 2023-02-16 Richard Biener <rguenther@suse.de>
36609 PR tree-optimization/108791
36610 * tree-ssa-forwprop.cc (optimize_vector_load): Build
36611 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
36614 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
36617 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
36618 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
36619 (ix86_expand_prologue): Likewise.
36621 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
36623 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
36625 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
36627 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
36628 int248_register_operand predicate in zero_extract sub-RTX.
36629 (*cmpqi_ext<mode>_2): Ditto.
36630 (*cmpqi_ext<mode>_3): Ditto.
36631 (*cmpqi_ext<mode>_4): Ditto.
36632 (*extzvqi_mem_rex64): Ditto.
36634 (*insvqi_1_mem_rex64): Ditto.
36635 (@insv<mode>_1): Ditto.
36636 (*insvqi_1): Ditto.
36637 (*insvqi_2): Ditto.
36638 (*insvqi_3): Ditto.
36639 (*extendqi<SWI24:mode>_ext_1): Ditto.
36640 (*addqi_ext<mode>_1): Ditto.
36641 (*addqi_ext<mode>_2): Ditto.
36642 (*subqi_ext<mode>_2): Ditto.
36643 (*testqi_ext<mode>_1): Ditto.
36644 (*testqi_ext<mode>_2): Ditto.
36645 (*andqi_ext<mode>_1): Ditto.
36646 (*andqi_ext<mode>_1_cc): Ditto.
36647 (*andqi_ext<mode>_2): Ditto.
36648 (*<any_or:code>qi_ext<mode>_1): Ditto.
36649 (*<any_or:code>qi_ext<mode>_2): Ditto.
36650 (*xorqi_ext<mode>_1_cc): Ditto.
36651 (*negqi_ext<mode>_2): Ditto.
36652 (*ashlqi_ext<mode>_2): Ditto.
36653 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
36655 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
36657 * config/i386/predicates.md (int248_register_operand):
36658 Rename from extr_register_operand.
36659 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
36660 (*extzx<mode>): Ditto.
36661 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
36662 (*ashl<mode>3_mask): Ditto.
36663 (*<any_shiftrt:insn><mode>3_mask): Ditto.
36664 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
36665 (*<any_rotate:insn><mode>3_mask): Ditto.
36666 (*<btsc><mode>_mask): Ditto.
36667 (*btr<mode>_mask): Ditto.
36668 (*jcc_bt<mode>_mask_1): Ditto.
36670 2023-02-15 Richard Biener <rguenther@suse.de>
36672 PR middle-end/26854
36673 * df-core.cc (df_worklist_propagate_forward): Put later
36674 blocks on worklist and only earlier blocks on pending.
36675 (df_worklist_propagate_backward): Likewise.
36676 (df_worklist_dataflow_doublequeue): Change the iteration
36677 to process new blocks in the same iteration if that
36678 maintains the iteration order.
36680 2023-02-15 Marek Polacek <polacek@redhat.com>
36682 PR middle-end/106080
36683 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
36686 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36688 * config/riscv/predicates.md: Refine codes.
36689 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
36690 * config/riscv/riscv-v.cc: Refine codes.
36691 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
36693 (class imac): New class.
36694 (enum widen_ternop_type): New enum.
36695 (class iwmac): New class.
36697 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36698 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
36706 * config/riscv/riscv-vector-builtins.cc
36707 (function_builder::apply_predication): Adjust for multiply-add support.
36708 (function_expander::add_vundef_operand): Refine codes.
36709 (function_expander::use_ternop_insn): New function.
36710 (function_expander::use_widen_ternop_insn): Ditto.
36711 * config/riscv/riscv-vector-builtins.h: New function.
36712 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
36713 (pred_mul_<optab><mode>_undef_merge): Ditto.
36714 (*pred_<madd_nmsub><mode>): Ditto.
36715 (*pred_<macc_nmsac><mode>): Ditto.
36716 (*pred_mul_<optab><mode>): Ditto.
36717 (@pred_mul_<optab><mode>_scalar): Ditto.
36718 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
36719 (*pred_<madd_nmsub><mode>_scalar): Ditto.
36720 (*pred_<macc_nmsac><mode>_scalar): Ditto.
36721 (*pred_mul_<optab><mode>_scalar): Ditto.
36722 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
36723 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
36724 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
36725 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
36726 (@pred_widen_mul_plus<su><mode>): Ditto.
36727 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
36728 (@pred_widen_mul_plussu<mode>): Ditto.
36729 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
36730 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
36732 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36734 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
36735 (vector_all_trues_mask_operand): New predicate.
36736 (vector_undef_operand): New predicate.
36737 (ltge_operator): New predicate.
36738 (comparison_except_ltge_operator): New predicate.
36739 (comparison_except_eqge_operator): New predicate.
36740 (ge_operator): New predicate.
36741 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
36742 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
36744 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36745 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
36755 * config/riscv/riscv-vector-builtins-shapes.cc
36756 (struct return_mask_def): Adjust for compare support.
36757 * config/riscv/riscv-vector-builtins.cc
36758 (function_expander::use_compare_insn): New function.
36759 * config/riscv/riscv-vector-builtins.h
36760 (function_expander::add_integer_operand): Ditto.
36761 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
36762 * config/riscv/riscv.md: Add vector min/max attributes.
36763 * config/riscv/vector-iterators.md (xnor): New iterator.
36764 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
36765 (*pred_cmp<mode>): Ditto.
36766 (*pred_cmp<mode>_narrow): Ditto.
36767 (@pred_ltge<mode>): Ditto.
36768 (*pred_ltge<mode>): Ditto.
36769 (*pred_ltge<mode>_narrow): Ditto.
36770 (@pred_cmp<mode>_scalar): Ditto.
36771 (*pred_cmp<mode>_scalar): Ditto.
36772 (*pred_cmp<mode>_scalar_narrow): Ditto.
36773 (@pred_eqne<mode>_scalar): Ditto.
36774 (*pred_eqne<mode>_scalar): Ditto.
36775 (*pred_eqne<mode>_scalar_narrow): Ditto.
36776 (*pred_cmp<mode>_extended_scalar): Ditto.
36777 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
36778 (*pred_eqne<mode>_extended_scalar): Ditto.
36779 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
36780 (@pred_ge<mode>_scalar): Ditto.
36781 (@pred_<optab><mode>): Ditto.
36782 (@pred_n<optab><mode>): Ditto.
36783 (@pred_<optab>n<mode>): Ditto.
36784 (@pred_not<mode>): Ditto.
36786 2023-02-15 Martin Jambor <mjambor@suse.cz>
36789 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
36790 creation of non-scalar replacements even if IPA-CP knows their
36793 2023-02-15 Jakub Jelinek <jakub@redhat.com>
36797 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
36798 expander, change operand 3 to be TImode, emit maddlddi4 and
36799 umadddi4_highpart{,_le} with its low half and finally add the high
36800 half to the result.
36802 2023-02-15 Martin Liska <mliska@suse.cz>
36804 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
36806 2023-02-15 Richard Biener <rguenther@suse.de>
36808 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
36809 for with_poison and alias worklist to it.
36810 (sanitize_asan_mark_poison): Likewise.
36812 2023-02-15 Richard Biener <rguenther@suse.de>
36815 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
36816 Combine bitmap test and set.
36817 (scalar_chain::add_insn): Likewise.
36818 (scalar_chain::analyze_register_chain): Remove redundant
36819 attempt to add to queue and instead strengthen assert.
36820 Sink common attempts to mark the def dual-mode.
36821 (scalar_chain::add_to_queue): Remove redundant insn bitmap
36824 2023-02-15 Richard Biener <rguenther@suse.de>
36827 * config/i386/i386-features.cc (convert_scalars_to_vector):
36828 Switch candidates bitmaps to tree view before building the chains.
36830 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
36832 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
36833 "failure trying to reload" call.
36835 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
36837 * gdbinit.in (phrs): New command.
36838 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
36839 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
36841 2023-02-14 David Faust <david.faust@oracle.com>
36844 * config/bpf/constraints.md (q): New memory constraint.
36845 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
36846 (zero_extendqidi2): Likewise.
36847 (zero_extendsidi2): Likewise.
36848 (*mov<MM:mode>): Likewise.
36850 2023-02-14 Andrew Pinski <apinski@marvell.com>
36852 PR tree-optimization/108355
36853 PR tree-optimization/96921
36854 * match.pd: Add pattern for "1 - bool_val".
36856 2023-02-14 Richard Biener <rguenther@suse.de>
36858 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
36859 basic block index hashing on the availability of ->cclhs.
36860 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
36861 rely on ->cclhs availability.
36862 (vn_phi_lookup): Set ->cclhs only when we are eventually
36863 going to CSE the PHI.
36864 (vn_phi_insert): Likewise.
36866 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
36868 * gimplify.cc (gimplify_save_expr): Add missing guard.
36870 2023-02-14 Richard Biener <rguenther@suse.de>
36872 PR tree-optimization/108782
36873 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
36874 Make sure we're not vectorizing an inner loop.
36876 2023-02-14 Jakub Jelinek <jakub@redhat.com>
36878 PR sanitizer/108777
36879 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
36880 * asan.h (asan_memfn_rtl): Declare.
36881 * asan.cc (asan_memfn_rtls): New variable.
36882 (asan_memfn_rtl): New function.
36883 * builtins.cc (expand_builtin): If
36884 param_asan_kernel_mem_intrinsic_prefix and function is
36885 kernel-{,hw}address sanitized, emit calls to
36886 __{,hw}asan_{memcpy,memmove,memset} rather than
36887 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
36888 instead of flag_sanitize & SANITIZE_ADDRESS to check if
36889 asan_intercepted_p functions shouldn't be expanded inline.
36891 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
36893 PR tree-optimization/96373
36894 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
36895 operations on the loop mask. Reject partial vectors if this isn't
36898 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
36900 PR rtl-optimization/108681
36901 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
36902 code to handle bare uses and clobbers.
36904 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
36906 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
36907 caller_save_p flag when clearing defined_p flag.
36908 (setup_reg_equiv): Ditto.
36909 * lra-constraints.cc (lra_constraints): Ditto.
36911 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
36914 * config/i386/predicates.md (extr_register_operand):
36915 New special predicate.
36916 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
36917 as operand 1 predicate.
36918 (*exzv<mode>): Ditto.
36919 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
36921 2023-02-13 Richard Biener <rguenther@suse.de>
36923 PR tree-optimization/28614
36924 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
36925 walking all edges in most cases.
36926 (vn_nary_op_insert_pieces_predicated): Avoid repeated
36927 calls to can_track_predicate_on_edge unless checking is
36929 (process_bb): Instead call it once here for each edge
36930 we register possibly multiple predicates on.
36932 2023-02-13 Richard Biener <rguenther@suse.de>
36934 PR tree-optimization/108691
36935 * tree-cfg.cc (notice_special_calls): When the CFG is built
36936 honor gimple_call_ctrl_altering_p.
36937 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
36938 temporarily if the call is not control-altering.
36939 * calls.cc (emit_call_1): Do not add REG_SETJMP if
36940 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
36942 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36945 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
36946 (struct s390_sched_state): Initialise to zero.
36947 (s390_sched_variable_issue): For better debuggability also emit
36949 (s390_sched_init): Unconditionally reset scheduler state.
36951 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
36953 * ifcvt.h (noce_if_info::cond_inverted): New field.
36954 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
36955 values when cond_inverted is true.
36956 (noce_find_if_block): Allow the condition to be inverted when
36957 handling conditional moves.
36959 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36961 * config/s390/predicates.md (execute_operation): Use
36962 constrain_operands instead of extract_constrain_insn in order to
36963 determine wheter there exists a valid alternative.
36965 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
36967 * common/config/arc/arc-common.cc (arc_option_optimization_table):
36968 Remove millicode from list.
36970 2023-02-13 Martin Liska <mliska@suse.cz>
36972 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
36974 2023-02-13 Richard Biener <rguenther@suse.de>
36976 PR tree-optimization/106722
36977 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
36978 whether we marked a stmt.
36979 (mark_control_dependent_edges_necessary): When
36980 mark_last_stmt_necessary didn't mark any stmt make sure
36981 to mark its control dependent edges.
36982 (propagate_necessity): Likewise.
36984 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
36986 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
36987 (DWARF_FRAME_REGISTERS): New.
36988 (DWARF_REG_TO_UNWIND_COLUMN): New.
36990 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
36992 * doc/sourcebuild.texi: Remove (broken) direct reference to
36993 "The GNU configure and build system".
36995 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
36997 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
36998 gen_add3_insn to gen_rtx_SET.
36999 (riscv_adjust_libcall_cfi_epilogue): Likewise.
37001 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37003 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
37004 (class vnclip): Ditto.
37006 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37007 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
37016 * config/riscv/vector-iterators.md (su): Add instruction.
37019 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
37020 (@pred_<sat_op><mode>_scalar): Ditto.
37021 (*pred_<sat_op><mode>_scalar): Ditto.
37022 (*pred_<sat_op><mode>_extended_scalar): Ditto.
37023 (@pred_narrow_clip<v_su><mode>): Ditto.
37024 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
37026 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37028 * config/riscv/constraints.md (Wbr): Remove unused constraint.
37029 * config/riscv/predicates.md: Fix move operand predicate.
37030 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
37031 (class vncvt_x): Ditto.
37032 (class vmerge): Ditto.
37033 (class vmv_v): Ditto.
37035 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37036 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
37043 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
37044 (struct move_def): Ditto.
37046 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37047 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
37048 (DEF_RVV_WEXTU_OPS): Ditto
37049 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
37054 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
37055 * config/riscv/vector-iterators.md (nmsac):New iterator.
37056 (nmsub): New iterator.
37057 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
37058 (@pred_merge<mode>_scalar): New pattern.
37059 (*pred_merge<mode>_scalar): New pattern.
37060 (*pred_merge<mode>_extended_scalar): New pattern.
37061 (@pred_narrow_<optab><mode>): New pattern.
37062 (@pred_narrow_<optab><mode>_scalar): New pattern.
37063 (@pred_trunc<mode>): New pattern.
37065 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37067 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
37068 (class vmsbc): Ditto.
37069 (BASE): Define new class.
37070 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37071 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
37073 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
37076 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37077 * config/riscv/riscv-vector-builtins.cc
37078 (function_expander::use_exact_insn): Adjust for new support
37079 * config/riscv/riscv-vector-builtins.h
37080 (function_base::has_merge_operand_p): New function.
37081 * config/riscv/vector-iterators.md: New iterator.
37082 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
37083 (@pred_msbc<mode>): Ditto.
37084 (@pred_madc<mode>_scalar): Ditto.
37085 (@pred_msbc<mode>_scalar): Ditto.
37086 (*pred_madc<mode>_scalar): Ditto.
37087 (*pred_madc<mode>_extended_scalar): Ditto.
37088 (*pred_msbc<mode>_scalar): Ditto.
37089 (*pred_msbc<mode>_extended_scalar): Ditto.
37090 (@pred_madc<mode>_overflow): Ditto.
37091 (@pred_msbc<mode>_overflow): Ditto.
37092 (@pred_madc<mode>_overflow_scalar): Ditto.
37093 (@pred_msbc<mode>_overflow_scalar): Ditto.
37094 (*pred_madc<mode>_overflow_scalar): Ditto.
37095 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
37096 (*pred_msbc<mode>_overflow_scalar): Ditto.
37097 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
37099 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37101 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
37102 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37103 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
37104 (class vsbc): Ditto.
37106 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37107 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
37109 * config/riscv/riscv-vector-builtins-shapes.cc
37110 (struct no_mask_policy_def): Ditto.
37112 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37113 * config/riscv/riscv-vector-builtins.cc
37114 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
37115 (rvv_arg_type_info::get_tree_type): Ditto.
37116 (function_expander::use_exact_insn): Ditto.
37117 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37118 (function_base::use_mask_predication_p): New function.
37119 * config/riscv/vector-iterators.md: New iterator.
37120 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
37121 (@pred_sbc<mode>): Ditto.
37122 (@pred_adc<mode>_scalar): Ditto.
37123 (@pred_sbc<mode>_scalar): Ditto.
37124 (*pred_adc<mode>_scalar): Ditto.
37125 (*pred_adc<mode>_extended_scalar): Ditto.
37126 (*pred_sbc<mode>_scalar): Ditto.
37127 (*pred_sbc<mode>_extended_scalar): Ditto.
37129 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37131 * config/riscv/vector.md: use "zero" reg.
37133 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37135 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
37137 (class vwmulsu): Ditto.
37138 (class vwcvt): Ditto.
37139 (BASE): Add integer widening support.
37140 * config/riscv/riscv-vector-builtins-bases.h: Ditto
37141 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
37142 (vwsub): New class.
37143 (vwmul): New class.
37144 (vwmulu): New class.
37145 (vwmulsu): New class.
37146 (vwaddu): New class.
37147 (vwsubu): New class.
37148 (vwcvt_x): New class.
37149 (vwcvtu_x): New class.
37150 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
37152 (struct widen_alu_def): New class.
37153 (SHAPE): New class.
37154 * config/riscv/riscv-vector-builtins-shapes.h: New class.
37155 * config/riscv/riscv-vector-builtins.cc
37156 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
37157 (rvv_arg_type_info::get_tree_type): Ditto.
37158 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
37160 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
37162 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
37163 * config/riscv/riscv.h (X0_REGNUM): New constant.
37164 * config/riscv/vector-iterators.md: New iterators.
37165 * config/riscv/vector.md
37166 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
37168 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
37170 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
37171 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
37173 (@pred_widen_mulsu<mode>): Ditto.
37174 (@pred_widen_mulsu<mode>_scalar): Ditto.
37175 (@pred_<optab><mode>): Ditto.
37177 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37178 kito-cheng <kito.cheng@sifive.com>
37180 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
37181 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
37183 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37184 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
37188 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
37190 (DEF_RVV_FULL_V_U_OPS): Ditto.
37191 (vint8mf8_t): Ditto.
37192 (vint8mf4_t): Ditto.
37193 (vint8mf2_t): Ditto.
37194 (vint8m1_t): Ditto.
37195 (vint8m2_t): Ditto.
37196 (vint8m4_t): Ditto.
37197 (vint8m8_t): Ditto.
37198 (vint16mf4_t): Ditto.
37199 (vint16mf2_t): Ditto.
37200 (vint16m1_t): Ditto.
37201 (vint16m2_t): Ditto.
37202 (vint16m4_t): Ditto.
37203 (vint16m8_t): Ditto.
37204 (vint32mf2_t): Ditto.
37205 (vint32m1_t): Ditto.
37206 (vint32m2_t): Ditto.
37207 (vint32m4_t): Ditto.
37208 (vint32m8_t): Ditto.
37209 (vint64m1_t): Ditto.
37210 (vint64m2_t): Ditto.
37211 (vint64m4_t): Ditto.
37212 (vint64m8_t): Ditto.
37213 (vuint8mf8_t): Ditto.
37214 (vuint8mf4_t): Ditto.
37215 (vuint8mf2_t): Ditto.
37216 (vuint8m1_t): Ditto.
37217 (vuint8m2_t): Ditto.
37218 (vuint8m4_t): Ditto.
37219 (vuint8m8_t): Ditto.
37220 (vuint16mf4_t): Ditto.
37221 (vuint16mf2_t): Ditto.
37222 (vuint16m1_t): Ditto.
37223 (vuint16m2_t): Ditto.
37224 (vuint16m4_t): Ditto.
37225 (vuint16m8_t): Ditto.
37226 (vuint32mf2_t): Ditto.
37227 (vuint32m1_t): Ditto.
37228 (vuint32m2_t): Ditto.
37229 (vuint32m4_t): Ditto.
37230 (vuint32m8_t): Ditto.
37231 (vuint64m1_t): Ditto.
37232 (vuint64m2_t): Ditto.
37233 (vuint64m4_t): Ditto.
37234 (vuint64m8_t): Ditto.
37235 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
37236 (DEF_RVV_FULL_V_U_OPS): Ditto.
37237 (check_required_extensions): Add vmulh support.
37238 (rvv_arg_type_info::get_tree_type): Ditto.
37239 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
37240 (enum rvv_base_type): Ditto.
37241 * config/riscv/riscv.opt: Add 'V' extension flag.
37242 * config/riscv/vector-iterators.md (su): New iterator.
37243 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
37244 (@pred_mulh<v_su><mode>_scalar): Ditto.
37245 (*pred_mulh<v_su><mode>_scalar): Ditto.
37246 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
37248 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37250 * config/riscv/iterators.md: Add sign_extend/zero_extend.
37251 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
37253 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
37254 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
37257 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
37258 for vsext/vzext support.
37259 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
37261 (DEF_RVV_QEXTI_OPS): Ditto.
37262 (DEF_RVV_OEXTI_OPS): Ditto.
37263 (DEF_RVV_WEXTU_OPS): Ditto.
37264 (DEF_RVV_QEXTU_OPS): Ditto.
37265 (DEF_RVV_OEXTU_OPS): Ditto.
37266 (vint16mf4_t): Ditto.
37267 (vint16mf2_t): Ditto.
37268 (vint16m1_t): Ditto.
37269 (vint16m2_t): Ditto.
37270 (vint16m4_t): Ditto.
37271 (vint16m8_t): Ditto.
37272 (vint32mf2_t): Ditto.
37273 (vint32m1_t): Ditto.
37274 (vint32m2_t): Ditto.
37275 (vint32m4_t): Ditto.
37276 (vint32m8_t): Ditto.
37277 (vint64m1_t): Ditto.
37278 (vint64m2_t): Ditto.
37279 (vint64m4_t): Ditto.
37280 (vint64m8_t): Ditto.
37281 (vuint16mf4_t): Ditto.
37282 (vuint16mf2_t): Ditto.
37283 (vuint16m1_t): Ditto.
37284 (vuint16m2_t): Ditto.
37285 (vuint16m4_t): Ditto.
37286 (vuint16m8_t): Ditto.
37287 (vuint32mf2_t): Ditto.
37288 (vuint32m1_t): Ditto.
37289 (vuint32m2_t): Ditto.
37290 (vuint32m4_t): Ditto.
37291 (vuint32m8_t): Ditto.
37292 (vuint64m1_t): Ditto.
37293 (vuint64m2_t): Ditto.
37294 (vuint64m4_t): Ditto.
37295 (vuint64m8_t): Ditto.
37296 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
37297 (DEF_RVV_QEXTI_OPS): Ditto.
37298 (DEF_RVV_OEXTI_OPS): Ditto.
37299 (DEF_RVV_WEXTU_OPS): Ditto.
37300 (DEF_RVV_QEXTU_OPS): Ditto.
37301 (DEF_RVV_OEXTU_OPS): Ditto.
37302 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
37304 (rvv_arg_type_info::get_tree_type): Ditto.
37305 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37306 * config/riscv/vector-iterators.md (z): New attribute.
37307 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
37308 (@pred_<optab><mode>_vf4): Ditto.
37309 (@pred_<optab><mode>_vf8): Ditto.
37311 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37313 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
37314 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
37315 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
37316 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37317 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
37321 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
37326 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
37327 (@pred_<optab><mode>_scalar): New pattern.
37328 (*pred_<optab><mode>_scalar): New pattern.
37329 (*pred_<optab><mode>_extended_scalar): New pattern.
37331 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37333 * config/riscv/iterators.md: Add neg and not.
37334 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
37336 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37337 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
37358 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
37359 (struct alu_def): Ditto.
37361 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37362 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
37363 * config/riscv/vector-iterators.md: New iterator.
37364 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
37366 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37368 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
37370 2023-02-11 Jakub Jelinek <jakub@redhat.com>
37373 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
37374 item->offset bit position is too large to be representable as
37375 unsigned int byte position.
37377 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
37379 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
37381 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
37383 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
37384 valid_combine only when ira_use_lra_p is true.
37386 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
37388 * params.opt (ira-simple-lra-insn-threshold): Add new param.
37389 * ira.cc (ira): Use the param to switch on simple LRA.
37391 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
37393 PR tree-optimization/108687
37394 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
37395 back to RFD_NONE mode for calculations.
37396 (ranger_cache::propagate_cache): Call the internal edge range API
37397 with RFD_READ_ONLY instead of changing the external routine.
37399 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
37401 PR tree-optimization/108520
37402 * gimple-range-infer.cc (check_assume_func): Invoke
37403 gimple_range_global directly instead using global_range_query.
37404 * value-query.cc (get_range_global): Add function context and
37405 avoid calling nonnull_arg_p if not cfun.
37406 (gimple_range_global): Add function context pointer.
37407 * value-query.h (imple_range_global): Add function context.
37409 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37411 * config/riscv/constraints.md (Wdm): Adjust constraint.
37412 (Wbr): New constraint.
37413 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
37414 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
37415 (emit_vlmax_op): New function.
37416 (emit_nonvlmax_op): Ditto.
37418 (neg_simm5_p): Ditto.
37419 (has_vi_variant_p): Ditto.
37420 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
37421 (emit_vlmax_op): New function.
37422 (emit_nonvlmax_op): Ditto.
37423 (expand_const_vector): Adjust function.
37424 (legitimize_move): Ditto.
37425 (simm32_p): New function.
37427 (neg_simm5_p): Ditto.
37428 (has_vi_variant_p): Ditto.
37429 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
37431 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37432 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
37435 (vminu): Remove signed cases.
37437 (vdiv): Remove unsigned cases.
37439 (vdivu): Remove signed cases.
37443 (vrsub): New class.
37448 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
37449 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
37450 * config/riscv/vector-iterators.md: New iterators.
37451 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
37453 (@pred_<optab><mode>_scalar): New pattern.
37454 (@pred_sub<mode>_reverse_scalar): Ditto.
37455 (*pred_<optab><mode>_scalar): Ditto.
37456 (*pred_<optab><mode>_extended_scalar): Ditto.
37457 (*pred_sub<mode>_reverse_scalar): Ditto.
37458 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
37460 2023-02-10 Richard Biener <rguenther@suse.de>
37462 PR tree-optimization/108724
37463 * tree-vect-stmts.cc (vectorizable_operation): Avoid
37464 using word_mode vectors when vector lowering will
37465 decompose them to elementwise operations.
37467 2023-02-10 Jakub Jelinek <jakub@redhat.com>
37470 2023-02-09 Martin Liska <mliska@suse.cz>
37473 * doc/extend.texi: Document that the function
37474 does not work correctly for old VIA processors.
37476 2023-02-10 Andrew Pinski <apinski@marvell.com>
37477 Andrew Macleod <amacleod@redhat.com>
37479 PR tree-optimization/108684
37480 * tree-ssa-dce.cc (simple_dce_from_worklist):
37481 Check all ssa names and not just non-vdef ones
37482 before accepting the inline-asm.
37483 Call unlink_stmt_vdef on the statement before
37486 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
37488 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
37489 * ira.cc (validate_equiv_mem): Check memref address variance.
37490 (no_equiv): Clear caller_save_p flag.
37491 (update_equiv_regs): Define caller save equivalence for
37493 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
37494 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
37495 call_save_p. Use caller save equivalence depending on the arg.
37496 (split_reg): Adjust the call.
37498 2023-02-09 Jakub Jelinek <jakub@redhat.com>
37501 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
37502 (cpu_indicator_init): Call get_available_features for all CPUs with
37503 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
37506 2023-02-09 Jakub Jelinek <jakub@redhat.com>
37508 PR tree-optimization/108688
37509 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
37510 of BIT_INSERT_EXPR extracting exactly all inserted bits even
37511 when without mode precision. Formatting fixes.
37513 2023-02-09 Andrew Pinski <apinski@marvell.com>
37515 PR tree-optimization/108688
37516 * match.pd (bit_field_ref [bit_insert]): Avoid generating
37517 BIT_FIELD_REFs of non-mode-precision integral operands.
37519 2023-02-09 Martin Liska <mliska@suse.cz>
37522 * doc/extend.texi: Document that the function
37523 does not work correctly for old VIA processors.
37525 2023-02-09 Andreas Schwab <schwab@suse.de>
37527 * lto-wrapper.cc (merge_and_complain): Handle
37528 -funwind-tables and -fasynchronous-unwind-tables.
37529 (append_compiler_options): Likewise.
37531 2023-02-09 Richard Biener <rguenther@suse.de>
37533 PR tree-optimization/26854
37534 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
37535 view around insert_updated_phi_nodes_for.
37536 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
37538 (walk_aliased_vdefs_1): Likewise.
37540 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
37542 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
37544 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37547 * config.gcc (tm_mlib_file): Define new variable.
37549 2023-02-08 Jakub Jelinek <jakub@redhat.com>
37551 PR tree-optimization/108692
37552 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
37553 widened_code which is different from code, don't call
37554 vect_look_through_possible_promotion but instead just check op is
37555 SSA_NAME with integral type for which vect_is_simple_use is true
37556 and call set_op on this_unprom.
37558 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
37560 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
37562 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
37564 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
37565 to 'aarch_ra_sign_key'.
37566 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
37568 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
37569 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
37570 * config/arm/arm.opt: Define.
37572 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
37574 PR tree-optimization/108316
37575 * tree-vect-stmts.cc (get_load_store_type): When using
37576 internal functions for gather/scatter, make sure that the type
37577 of the offset argument is consistent with the offset vector type.
37579 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
37582 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
37584 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
37585 * ira.cc (validate_equiv_mem): Check memref address variance.
37586 (update_equiv_regs): Define caller save equivalence for
37588 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
37589 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
37590 call_save_p. Use caller save equivalence depending on the arg.
37591 (split_reg): Adjust the call.
37593 2023-02-08 Jakub Jelinek <jakub@redhat.com>
37595 * tree.def (SAD_EXPR): Remove outdated comment about missing
37598 2023-02-07 Marek Polacek <polacek@redhat.com>
37600 * doc/invoke.texi: Update -fchar8_t documentation.
37602 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
37604 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
37605 * ira.cc (validate_equiv_mem): Check memref address variance.
37606 (update_equiv_regs): Define caller save equivalence for
37608 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
37609 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
37610 call_save_p. Use caller save equivalence depending on the arg.
37611 (split_reg): Adjust the call.
37613 2023-02-07 Richard Biener <rguenther@suse.de>
37615 PR tree-optimization/26854
37616 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
37617 instead of immediate uses.
37619 2023-02-07 Jakub Jelinek <jakub@redhat.com>
37621 PR tree-optimization/106923
37622 * ipa-split.cc (execute_split_functions): Don't split returns_twice
37625 2023-02-07 Jakub Jelinek <jakub@redhat.com>
37627 PR tree-optimization/106433
37628 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
37629 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
37631 2023-02-07 Jan Hubicka <jh@suse.cz>
37633 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
37636 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
37638 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
37639 (process_asm): Create a constructor for GCN_STACK_SIZE.
37640 (main): Parse the -mstack-size option.
37642 2023-02-06 Alex Coplan <alex.coplan@arm.com>
37645 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
37646 Use correct constraint for operand 3.
37648 2023-02-06 Martin Jambor <mjambor@suse.cz>
37650 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
37652 2023-02-06 Xi Ruoyao <xry111@xry111.site>
37654 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
37655 New define_int_iterator.
37656 (bytepick_d_ashift_amount): Likewise.
37657 (bytepick_imm): New define_int_attr.
37658 (bytepick_w_lshiftrt_amount): Likewise.
37659 (bytepick_d_lshiftrt_amount): Likewise.
37660 (bytepick_w_<bytepick_imm>): New define_insn template.
37661 (bytepick_w_<bytepick_imm>_extend): Likewise.
37662 (bytepick_d_<bytepick_imm>): Likewise.
37663 (bytepick_w): Remove unused define_insn.
37664 (bytepick_d): Likewise.
37665 (UNSPEC_BYTEPICK_W): Remove unused unspec.
37666 (UNSPEC_BYTEPICK_D): Likewise.
37667 * config/loongarch/predicates.md (const_0_to_3_operand):
37668 Remove unused define_predicate.
37669 (const_0_to_7_operand): Likewise.
37671 2023-02-06 Jakub Jelinek <jakub@redhat.com>
37673 PR tree-optimization/108655
37674 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
37675 or -fsanitize=unreachable -fsanitize-trap=unreachable return
37676 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
37678 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
37680 * doc/install.texi (Specific): Remove PW32.
37682 2023-02-03 Jakub Jelinek <jakub@redhat.com>
37684 PR tree-optimization/108647
37685 * range-op.cc (operator_equal::op1_range,
37686 operator_not_equal::op1_range): Don't test op2 bound
37687 equality if op2.undefined_p (), instead set_varying.
37688 (operator_lt::op1_range, operator_le::op1_range,
37689 operator_gt::op1_range, operator_ge::op1_range): Return false if
37690 op2.undefined_p ().
37691 (operator_lt::op2_range, operator_le::op2_range,
37692 operator_gt::op2_range, operator_ge::op2_range): Return false if
37693 op1.undefined_p ().
37695 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
37697 PR tree-optimization/108639
37698 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
37700 (irange::operator==): Same.
37702 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
37704 PR tree-optimization/108647
37705 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
37706 (foperator_lt::op2_range): Same.
37707 (foperator_le::op1_range): Same.
37708 (foperator_le::op2_range): Same.
37709 (foperator_gt::op1_range): Same.
37710 (foperator_gt::op2_range): Same.
37711 (foperator_ge::op1_range): Same.
37712 (foperator_ge::op2_range): Same.
37713 (foperator_unordered_lt::op1_range): Same.
37714 (foperator_unordered_lt::op2_range): Same.
37715 (foperator_unordered_le::op1_range): Same.
37716 (foperator_unordered_le::op2_range): Same.
37717 (foperator_unordered_gt::op1_range): Same.
37718 (foperator_unordered_gt::op2_range): Same.
37719 (foperator_unordered_ge::op1_range): Same.
37720 (foperator_unordered_ge::op2_range): Same.
37722 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
37724 PR tree-optimization/107570
37725 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
37727 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
37729 * doc/gm2.texi (Internals): Remove from menu.
37730 (Using): Comment out ifnohtml conditional.
37731 (Documentation): Use gcc url.
37732 (License): Node simplified.
37733 (Copying): New node. Include gpl_v3_without_node.
37734 (Contributing): Node simplified.
37735 (Internals): Commented out.
37736 (Libraries): Node simplified.
37739 (Functions): Ditto.
37741 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
37743 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
37745 (mve_vqshluq_m_n_s<mode>): Likewise.
37746 (mve_vshlq_m_<supf><mode>): Likewise.
37747 (mve_vsriq_m_n_<supf><mode>): Likewise.
37748 (mve_vsubq_m_<supf><mode>): Likewise.
37750 2023-02-03 Martin Jambor <mjambor@suse.cz>
37753 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
37754 when comparing to an IPA-CP value.
37755 (dump_list_of_param_indices): New function.
37756 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
37757 Dump removed candidates using dump_list_of_param_indices.
37758 * ipa-param-manipulation.cc
37759 (ipa_param_body_adjustments::modify_expression): Add assert checking
37760 sizes of a VIEW_CONVERT_EXPR will match.
37761 (ipa_param_body_adjustments::modify_assignment): Likewise.
37763 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
37765 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
37766 * config/riscv/riscv.cc: Ditto.
37768 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37770 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
37774 * config/riscv/vector.md: Ditto.
37776 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37778 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
37779 * config/riscv/riscv-vector-builtins-bases.cc: New class.
37780 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
37783 * config/riscv/riscv-vector-builtins.cc: Ditto.
37784 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
37786 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
37788 * toplev.cc (toplev::main): Only print the version information header
37789 from toplevel main().
37791 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
37793 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
37794 cond_{ashl|ashr|lshr}
37796 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
37798 PR rtl-optimization/108086
37799 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
37800 Adjust size-related commentary accordingly.
37802 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
37804 PR rtl-optimization/108508
37805 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
37806 the splay tree search gives the first clobber in the second group,
37807 make sure that the root of the first clobber group is updated
37808 correctly. Enter the new clobber group into the definition splay
37811 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
37813 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
37814 Fix finding best match score.
37816 2023-02-02 Jakub Jelinek <jakub@redhat.com>
37819 PR rtl-optimization/108463
37821 * cselib.cc (cselib_current_insn): Move declaration earlier.
37822 (cselib_hasher::equal): For debug only locs, temporarily override
37823 cselib_current_insn to their l->setting_insn for the
37824 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
37825 promote some debug locs.
37826 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
37827 when using cselib call cselib_lookup_from_insn on the address but
37828 don't substitute it.
37830 2023-02-02 Richard Biener <rguenther@suse.de>
37832 PR middle-end/108625
37833 * genmatch.cc (expr::gen_transform): Also disallow resimplification
37834 from pushing to lseq with force_leaf.
37835 (dt_simplify::gen_1): Likewise.
37837 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
37839 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
37840 (struct kernargs): Replace the common content with kernargs_abi.
37841 (struct heap): Delete.
37842 (main): Read GCN_STACK_SIZE envvar.
37843 Allocate space for the device stacks.
37844 Write the new kernargs fields.
37845 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
37846 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
37847 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
37848 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
37849 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
37850 Set up the stacks from the values in the kernargs, not private.
37851 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
37852 (gcn_hsa_declare_function_name): Turn off the private segment.
37853 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
37854 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
37855 * config/gcn/gcn.opt (mstack-size): Change the description.
37857 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
37860 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
37861 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
37862 addressing MVE predicate modes.
37863 (mve_bool_vec_to_const): Change to represent correct MVE predicate
37865 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
37867 (arm_vector_mode_supported_p): Likewise.
37868 (arm_mode_to_pred_mode): Add V2QI.
37869 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
37871 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
37872 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
37873 (v2qi_UP): New macro.
37874 (v4bi_UP): New macro.
37875 (v8bi_UP): New macro.
37876 (v16bi_UP): New macro.
37877 (arm_expand_builtin_args): Make it able to expand the new predicate
37879 * config/arm/arm-modes.def (V2QI): New mode.
37880 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
37881 Pred4x4_t): Remove unused predicate builtin types.
37882 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
37883 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
37884 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
37885 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
37886 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
37887 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
37888 of MODE_VECTOR_BOOL.
37889 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
37890 (MVE_VPRED): Likewise.
37891 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
37892 (MVE_vctp): New mode attribute.
37896 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
37897 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
37899 (mve_vpnothi): Rename this...
37900 (mve_vpnotv16bi): ... to this.
37901 (mve_vctp<mode1>q_mhi): Rename this...
37902 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
37903 (mve_vldrdq_gather_base_z_<supf>v2di,
37904 mve_vldrdq_gather_offset_z_<supf>v2di,
37905 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
37906 mve_vstrdq_scatter_base_p_<supf>v2di,
37907 mve_vstrdq_scatter_offset_p_<supf>v2di,
37908 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
37909 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
37910 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
37911 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
37912 mve_vldrdq_gather_base_wb_z_<supf>v2di,
37913 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
37914 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
37916 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
37918 (VCTP): ... with this.
37919 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
37920 (VCTP_M): ... with this.
37921 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
37922 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
37924 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
37927 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
37928 (arm_modes_tieable_p): Make MVE predicate modes tieable.
37929 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
37930 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
37931 simplify_subreg to simplify subregs where the outermode is not scalar.
37933 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
37936 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
37937 new qualifiers parameter and use unsigned short type for MVE predicate.
37938 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
37940 (arm_init_crypto_builtins): Likewise.
37942 2023-02-02 Jakub Jelinek <jakub@redhat.com>
37945 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
37946 * internal-fn.def (TRAP): Remove.
37947 * internal-fn.cc (expand_TRAP): Remove.
37948 * tree.cc (build_common_builtin_nodes): Define
37949 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
37950 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
37951 instead of BUILT_IN_TRAP.
37952 * gimple.cc (gimple_build_builtin_unreachable): Remove
37953 emitting internal function for BUILT_IN_TRAP.
37954 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
37955 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
37956 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
37957 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
37958 BUILT_IN_UNREACHABLE_TRAP.
37959 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
37960 * tree-cfg.cc (verify_gimple_call,
37961 pass_warn_function_return::execute): Likewise.
37962 * attribs.cc (decl_attributes): Don't report exclusions on
37963 BUILT_IN_UNREACHABLE_TRAP either.
37965 2023-02-02 liuhongt <hongtao.liu@intel.com>
37967 PR tree-optimization/108601
37968 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
37969 * tree-vect-loop.cc
37970 (vectorizable_nonlinear_induction): Remove
37971 vect_can_peel_nonlinear_iv_p.
37972 (vect_can_peel_nonlinear_iv_p): Don't peel
37973 nonlinear iv(mult or shift) for epilog when vf is not
37974 constant and moved the defination to ..
37975 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
37978 2023-02-02 Jakub Jelinek <jakub@redhat.com>
37980 PR middle-end/108435
37981 * tree-nested.cc (convert_nonlocal_omp_clauses)
37982 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
37983 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
37984 before calling declare_vars.
37985 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
37986 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
37987 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
37988 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
37990 2023-02-01 Tamar Christina <tamar.christina@arm.com>
37992 * common/config/aarch64/aarch64-common.cc
37993 (struct aarch64_option_extension): Add native_detect and document struct
37995 (all_extensions): Set new field native_detect.
37996 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
37999 2023-02-01 Martin Liska <mliska@suse.cz>
38001 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
38004 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
38006 PR tree-optimization/108356
38007 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
38008 do a search of the DOM tree for a range.
38010 2023-02-01 Martin Liska <mliska@suse.cz>
38013 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
38014 ony non-null values.
38015 * ipa.cc (walk_polymorphic_call_targets): Likewise.
38017 2023-02-01 Martin Liska <mliska@suse.cz>
38020 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
38023 2023-02-01 Jakub Jelinek <jakub@redhat.com>
38026 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
38027 subregs in DEBUG_INSNs.
38029 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
38031 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
38033 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38035 * config/s390/s390.cc (s390_restore_gpr_p): New function.
38036 (s390_preserve_gpr_arg_in_range_p): New function.
38037 (s390_preserve_gpr_arg_p): New function.
38038 (s390_preserve_fpr_arg_p): New function.
38039 (s390_register_info_stdarg_fpr): Rename to ...
38040 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
38041 (s390_register_info_stdarg_gpr): Rename to ...
38042 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
38043 (s390_register_info): Use the renamed functions above.
38044 (s390_optimize_register_info): Likewise.
38045 (save_fpr): Generate CFI for -mpreserve-args.
38046 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
38047 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
38048 (s390_optimize_prologue): Likewise.
38049 * config/s390/s390.opt: New option -mpreserve-args
38051 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38053 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
38054 (restore_gprs): Likewise.
38055 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
38056 frame pointer if a frame-pointer is used.
38057 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
38058 * config/s390/s390.md (stack_tie): Add a register operand and
38060 (@stack_tie<mode>): ... this.
38062 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38064 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
38065 EMIT_CFI parameter.
38066 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
38067 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
38069 2023-02-01 Richard Biener <rguenther@suse.de>
38071 PR middle-end/108500
38072 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
38073 with tree traversal algorithm.
38075 2023-02-01 Jason Merrill <jason@redhat.com>
38077 * doc/invoke.texi: Document -Wno-changes-meaning.
38079 2023-02-01 David Malcolm <dmalcolm@redhat.com>
38081 * doc/invoke.texi (Static Analyzer Options): Add notes about
38082 limitations of -fanalyzer.
38084 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38086 * config/riscv/constraints.md (vj): New.
38088 * config/riscv/iterators.md: Add more opcode.
38089 * config/riscv/predicates.md (vector_arith_operand): New.
38090 (vector_neg_arith_operand): New.
38091 (vector_shift_operand): New.
38092 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
38093 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
38110 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
38127 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
38128 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
38129 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
38130 (DEF_RVV_U_OPS): New.
38131 (rvv_arg_type_info::get_base_vector_type): Handle
38132 RVV_BASE_shift_vector.
38133 (rvv_arg_type_info::get_tree_type): Ditto.
38134 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
38135 RVV_BASE_shift_vector.
38136 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
38137 * config/riscv/vector-iterators.md: Handle more opcode.
38138 * config/riscv/vector.md (@pred_<optab><mode>): New.
38140 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
38143 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
38146 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
38148 PR tree-optimization/108608
38149 * tree-vect-loop.cc (vect_transform_reduction): Handle single
38150 def-use cycles that involve function calls rather than tree codes.
38152 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38154 PR tree-optimization/108385
38155 * gimple-range-gori.cc (gori_compute::compute_operand_range):
38156 Allow VARYING computations to continue if there is a relation.
38157 * range-op.cc (pointer_plus_operator::op2_range): New.
38159 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38161 PR tree-optimization/108359
38162 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
38163 (range_operator::fold_range): If op1 is equivalent to op2 then
38164 invoke new fold_in_parts_equiv to operate on sub-components.
38165 * range-op.h (wi_fold_in_parts_equiv): New prototype.
38167 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38169 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
38170 not abort calculations if there is a valid relation available.
38171 (gori_compute::refine_using_relation): Pass correct relation trio.
38172 (gori_compute::compute_operand1_range): Create trio and use it.
38173 (gori_compute::compute_operand2_range): Ditto.
38174 * range-op.cc (operator_plus::op1_range): Use correct trio member.
38175 (operator_minus::op1_range): Use correct trio member.
38176 * value-relation.cc (value_relation::create_trio): New.
38177 * value-relation.h (value_relation::create_trio): New prototype.
38179 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38182 * config/i386/i386-expand.cc
38183 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
38184 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
38185 equal to bitsize of mode.
38187 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38189 PR rtl-optimization/108596
38190 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
38191 ends with asm goto and has a crossing fallthrough edge to the same bb
38192 that contains at least one of its labels by restoring EDGE_CROSSING
38193 flag even on possible edge from cur_bb to new_bb successor.
38195 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38198 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
38199 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
38200 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
38201 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
38202 uninitialized automatic variable __W.
38204 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
38206 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
38208 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38210 * config/riscv/riscv-protos.h (get_vector_mode): New function.
38211 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
38212 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
38213 (class loadstore): Adjust for indexed loads/stores support.
38215 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
38216 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
38232 * config/riscv/riscv-vector-builtins-shapes.cc
38233 (struct indexed_loadstore_def): New class.
38235 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38236 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
38237 for indexed loads/stores support.
38238 (check_required_extensions): Ditto.
38239 (rvv_arg_type_info::get_base_vector_type): New function.
38240 (rvv_arg_type_info::get_tree_type): Ditto.
38241 (function_builder::add_unique_function): Adjust for indexed loads/stores
38243 (function_expander::use_exact_insn): New function.
38244 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
38245 indexed loads/stores support.
38246 (struct rvv_arg_type_info): Ditto.
38247 (function_expander::index_mode): New function.
38248 (function_base::apply_tail_policy_p): Ditto.
38249 (function_base::apply_mask_policy_p): Ditto.
38250 * config/riscv/vector-iterators.md (unspec): New unspec.
38251 * config/riscv/vector.md (unspec): Ditto.
38252 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
38254 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
38255 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
38256 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
38257 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
38258 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
38259 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
38260 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
38261 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
38262 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
38263 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
38264 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
38265 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
38266 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
38268 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
38270 * config.gcc: Recognize x86_64-*-gnu* targets and include
38272 * config/i386/gnu64.h: Define configuration for new target
38273 including ld.so location.
38275 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
38277 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
38278 ampere1a to include SM4.
38280 2023-01-30 Andrew Pinski <apinski@marvell.com>
38282 PR tree-optimization/108582
38283 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
38284 for middlebb to have no phi nodes.
38286 2023-01-30 Richard Biener <rguenther@suse.de>
38288 PR tree-optimization/108574
38289 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
38290 sameval and def, ignore the equivalence if there's the
38291 danger of oscillating between two values.
38293 2023-01-30 Andreas Schwab <schwab@suse.de>
38295 * common/config/riscv/riscv-common.cc
38296 (riscv_option_optimization_table)
38297 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
38298 -fasynchronous-unwind-tables and -funwind-tables.
38299 * config.gcc (riscv*-*-linux*): Define
38300 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
38302 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
38304 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
38305 value of includedir.
38307 2023-01-30 Richard Biener <rguenther@suse.de>
38310 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
38313 2023-01-30 liuhongt <hongtao.liu@intel.com>
38315 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
38316 * doc/invoke.texi: Ditto.
38318 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
38320 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
38321 (stmt_may_terminate_function_p): If assuming return or EH
38322 volatile asm is safe.
38323 (find_always_executed_bbs): Fix handling of terminating BBS and
38324 infinite loops; add debug output.
38325 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
38327 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
38329 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
38330 off-by-one in checking the permissible shift-amount.
38332 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38334 * doc/extend.texi (Named Address Spaces): Update link to the
38337 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38339 * doc/standards.texi (Standards): Fix markup.
38341 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38343 * doc/standards.texi (Standards): Update link to Objective-C book.
38345 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38347 * doc/invoke.texi (Instrumentation Options): Update reference to
38350 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38352 * doc/standards.texi: Update Go1 link.
38354 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38356 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
38357 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
38360 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38361 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
38363 * config/riscv/riscv-vector-builtins.cc
38364 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
38365 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
38366 (@pred_strided_store<mode>): Ditto.
38368 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38370 * config/riscv/vector.md (tail_policy_op_idx): Remove.
38371 (mask_policy_op_idx): Remove.
38372 (avl_type_op_idx): Remove.
38374 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
38376 PR tree-optimization/96373
38377 * tree.h (sign_mask_for): Declare.
38378 * tree.cc (sign_mask_for): New function.
38379 (signed_or_unsigned_type_for): For vector types, try to use the
38380 related_int_vector_mode.
38381 * genmatch.cc (commutative_op): Handle conditional internal functions.
38382 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
38384 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
38386 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
38387 Use the likely minimum VF when bounding the denominators to
38388 the estimated number of iterations.
38390 2023-01-27 Richard Biener <rguenther@suse.de>
38393 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
38394 and -Ofast FP environment side-effects.
38396 2023-01-27 Richard Biener <rguenther@suse.de>
38399 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
38400 Don't add crtfastmath.o for -shared.
38402 2023-01-27 Richard Biener <rguenther@suse.de>
38405 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
38408 2023-01-27 Richard Biener <rguenther@suse.de>
38411 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
38412 crtfastmath.o for -shared.
38414 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
38416 PR tree-optimization/108306
38417 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
38418 varying for shifts that are always out of void range.
38419 (operator_rshift::fold_range): Return [0, 0] not
38420 varying for shifts that are always out of void range.
38422 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
38424 PR tree-optimization/108447
38425 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
38426 Do not attempt to fold HONOR_NAN types.
38428 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38430 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
38431 Remove _m suffix for "vop_m" C++ overloaded API name.
38433 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38435 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
38436 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38437 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
38439 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
38440 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
38441 (vbool64_t): Ditto.
38442 (vbool32_t): Ditto.
38443 (vbool16_t): Ditto.
38448 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
38449 (rvv_arg_type_info::get_tree_type): Ditto.
38450 (function_expander::use_contiguous_load_insn): Ditto.
38451 * config/riscv/vector.md (@pred_store<mode>): Ditto.
38453 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38455 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
38456 (vsetvl_discard_result_insn_p): New function.
38457 (reg_killed_by_bb_p): rename to find_reg_killed_by.
38458 (find_reg_killed_by): New name.
38459 (get_vl): allow it to be called by more functions.
38460 (has_vsetvl_killed_avl_p): Add condition.
38461 (get_avl): allow it to be called by more functions.
38462 (insn_should_be_added_p): New function.
38463 (get_all_nonphi_defs): Refine function.
38464 (get_all_sets): Ditto.
38465 (get_same_bb_set): New function.
38466 (any_insn_in_bb_p): Ditto.
38467 (any_set_in_bb_p): Ditto.
38468 (get_vl_vtype_info): Add VLMAX forward optimization.
38469 (source_equal_p): Fix issues.
38470 (extract_single_source): Refine.
38471 (avl_info::multiple_source_equal_p): New function.
38472 (avl_info::operator==): Adjust for final version.
38473 (vl_vtype_info::operator==): Ditto.
38474 (vl_vtype_info::same_avl_p): Ditto.
38475 (vector_insn_info::parse_insn): Ditto.
38476 (vector_insn_info::available_p): New function.
38477 (vector_insn_info::merge): Adjust for final version.
38478 (vector_insn_info::dump): Add hard_empty.
38479 (pass_vsetvl::hard_empty_block_p): New function.
38480 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
38481 (pass_vsetvl::forward_demand_fusion): Ditto.
38482 (pass_vsetvl::demand_fusion): Ditto.
38483 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
38484 (pass_vsetvl::compute_local_properties): Adjust for final version.
38485 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
38486 (pass_vsetvl::refine_vsetvls): Ditto.
38487 (pass_vsetvl::commit_vsetvls): Ditto.
38488 (pass_vsetvl::propagate_avl): New function.
38489 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
38490 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
38492 2023-01-27 Jakub Jelinek <jakub@redhat.com>
38495 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
38496 from size_t to int.
38498 2023-01-27 Jakub Jelinek <jakub@redhat.com>
38501 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
38502 redirection of calls to __builtin_trap in addition to redirection
38503 to __builtin_unreachable.
38505 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38507 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
38509 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38511 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
38512 (emit_vsetvl_insn): Ditto.
38514 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38516 * config/riscv/vector.md: Fix constraints.
38518 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38520 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
38522 2023-01-27 Patrick Palka <ppalka@redhat.com>
38523 Jakub Jelinek <jakub@redhat.com>
38525 * tree-core.h (tree_code_type, tree_code_length): For
38526 C++17 and later, add inline keyword, otherwise don't define
38527 the arrays, but declare extern arrays.
38528 * tree.cc (tree_code_type, tree_code_length): Define these
38529 arrays for C++14 and older.
38531 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38533 * config/riscv/riscv-vsetvl.h: Change it into public.
38535 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38537 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
38540 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38542 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
38544 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38546 * config/riscv/vector.md: Fix incorrect attributes.
38548 2023-01-27 Richard Biener <rguenther@suse.de>
38551 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
38552 Don't add crtfastmath.o for -shared.
38554 2023-01-27 Alexandre Oliva <oliva@gnu.org>
38556 * doc/options.texi (option, RejectNegative): Mention that
38557 -g-started options are also implicitly negatable.
38559 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
38561 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
38562 Use get_typenode_from_name to get fixed-width integer type
38564 * config/riscv/riscv-vector-builtins.def: Update define with
38565 fixed-width integer type nodes.
38567 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38569 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
38570 (real_insn_and_same_bb_p): New function.
38571 (same_bb_and_after_or_equal_p): Remove it.
38572 (before_p): New function.
38573 (reg_killed_by_bb_p): Ditto.
38574 (has_vsetvl_killed_avl_p): Ditto.
38575 (get_vl): Move location so that we can call it.
38576 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
38577 (available_occurrence_p): Ditto.
38578 (dominate_probability_p): Remove it.
38579 (can_backward_propagate_p): Remove it.
38580 (get_all_nonphi_defs): New function.
38581 (get_all_predecessors): Ditto.
38582 (any_insn_in_bb_p): Ditto.
38583 (insert_vsetvl): Adjust AVL REG.
38584 (source_equal_p): New function.
38585 (extract_single_source): Ditto.
38586 (avl_info::single_source_equal_p): Ditto.
38587 (avl_info::operator==): Adjust for AVL=REG.
38588 (vl_vtype_info::same_avl_p): Ditto.
38589 (vector_insn_info::set_demand_info): Remove it.
38590 (vector_insn_info::compatible_p): Adjust for AVL=REG.
38591 (vector_insn_info::compatible_avl_p): New function.
38592 (vector_insn_info::merge): Adjust AVL=REG.
38593 (vector_insn_info::dump): Ditto.
38594 (pass_vsetvl::merge_successors): Remove it.
38595 (enum fusion_type): New enum.
38596 (pass_vsetvl::get_backward_fusion_type): New function.
38597 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
38598 (pass_vsetvl::forward_demand_fusion): Ditto.
38599 (pass_vsetvl::demand_fusion): Ditto.
38600 (pass_vsetvl::prune_expressions): Ditto.
38601 (pass_vsetvl::compute_local_properties): Ditto.
38602 (pass_vsetvl::cleanup_vsetvls): Ditto.
38603 (pass_vsetvl::commit_vsetvls): Ditto.
38604 (pass_vsetvl::init): Ditto.
38605 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
38606 (enum merge_type): New enum.
38608 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38610 * config/riscv/riscv-vsetvl.cc
38611 (vector_infos_manager::vector_infos_manager): Add probability.
38612 (vector_infos_manager::dump): Ditto.
38613 (pass_vsetvl::compute_probabilities): Ditto.
38614 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
38616 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38618 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
38619 (vector_insn_info::merge): Ditto.
38620 (vector_insn_info::dump): Ditto.
38621 (pass_vsetvl::merge_successors): Ditto.
38622 (pass_vsetvl::backward_demand_fusion): Ditto.
38623 (pass_vsetvl::forward_demand_fusion): Ditto.
38624 (pass_vsetvl::commit_vsetvls): Ditto.
38625 * config/riscv/riscv-vsetvl.h: Ditto.
38627 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38629 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
38632 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38634 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
38636 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38638 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
38639 Add pre-check for redundant flow.
38641 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38643 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
38644 (vector_infos_manager::free_bitmap_vectors): Ditto.
38645 (pass_vsetvl::pre_vsetvl): Adjust codes.
38646 * config/riscv/riscv-vsetvl.h: New function declaration.
38648 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38650 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
38651 (vector_insn_info::set_demand_info): New function.
38652 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
38653 (pass_vsetvl::merge_successors): Ditto.
38654 (pass_vsetvl::compute_global_backward_infos): Ditto.
38655 (pass_vsetvl::backward_demand_fusion): Ditto.
38656 (pass_vsetvl::forward_demand_fusion): Ditto.
38657 (pass_vsetvl::demand_fusion): New function.
38658 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
38659 * config/riscv/riscv-vsetvl.h: New function declaration.
38661 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38663 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
38665 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38667 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
38668 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
38670 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38672 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
38673 (backward_propagate_worthwhile_p): Fix non-worthwhile.
38675 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38677 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
38679 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38681 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
38682 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
38683 (pass_vsetvl::commit_vsetvls): Ditto.
38684 * config/riscv/riscv-vsetvl.h: New function declaration.
38686 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38688 * config/riscv/vector.md:
38690 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38692 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
38693 pred_store for vse.
38694 * config/riscv/riscv-vector-builtins.cc
38695 (function_expander::add_mem_operand): Refine function.
38696 (function_expander::use_contiguous_load_insn): Adjust new
38698 (function_expander::use_contiguous_store_insn): Ditto.
38699 * config/riscv/riscv-vector-builtins.h: Refine function.
38700 * config/riscv/vector.md (@pred_store<mode>): New pattern.
38702 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38704 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
38706 2023-01-26 Marek Polacek <polacek@redhat.com>
38708 PR middle-end/108543
38709 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
38710 if it was previously set.
38712 2023-01-26 Jakub Jelinek <jakub@redhat.com>
38714 PR tree-optimization/108540
38715 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
38716 are singletons, use range_true even if op1 != op2
38717 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
38718 even if intersection of the ranges is empty and one has
38719 zero low bound and another zero high bound, use range_true_and_false
38720 rather than range_false.
38721 (foperator_not_equal::fold_range): If both op1 and op2
38722 are singletons, use range_false even if op1 != op2
38723 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
38724 even if intersection of the ranges is empty and one has
38725 zero low bound and another zero high bound, use range_true_and_false
38726 rather than range_true.
38728 2023-01-26 Jakub Jelinek <jakub@redhat.com>
38730 * value-relation.cc (kind_string): Add const.
38731 (rr_negate_table, rr_swap_table, rr_intersect_table,
38732 rr_union_table, rr_transitive_table): Add static const, change
38733 element type from relation_kind to unsigned char.
38734 (relation_negate, relation_swap, relation_intersect, relation_union,
38735 relation_transitive): Cast rr_*_table element to relation_kind.
38736 (relation_to_code): Add static const.
38737 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
38739 2023-01-26 Richard Biener <rguenther@suse.de>
38741 PR tree-optimization/108547
38742 * gimple-predicate-analysis.cc (value_sat_pred_p):
38745 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
38747 PR tree-optimization/108522
38748 * tree-object-size.cc (compute_object_offset): Make EXPR
38749 argument non-const. Call component_ref_field_offset.
38751 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38753 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
38754 FEATURE_STRING field.
38756 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
38758 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
38760 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
38764 * gcc.cc: Provide default specs for Modula-2 so that when the
38765 language is not built-in better diagnostics are emitted for
38766 attempts to use .mod or .m2i file extensions.
38768 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
38770 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
38772 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
38774 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
38776 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
38778 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
38781 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
38783 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
38785 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
38787 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
38789 2023-01-25 Richard Biener <rguenther@suse.de>
38791 PR tree-optimization/108523
38792 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
38793 backedge value for the result when using predication to
38796 2023-01-25 Richard Biener <rguenther@suse.de>
38798 * doc/lto.texi (Command line options): Reword and update reference
38799 to removed lto_read_all_file_options.
38801 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
38803 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
38806 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
38808 * doc/contrib.texi: Add Jose E. Marchesi.
38810 2023-01-25 Jakub Jelinek <jakub@redhat.com>
38812 PR tree-optimization/108498
38813 * gimple-ssa-store-merging.cc (class store_operand_info):
38814 End coment with full stop rather than comma.
38815 (split_group): Likewise.
38816 (merged_store_group::apply_stores): Clear string_concatenation if
38817 start or end aren't on a byte boundary.
38819 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
38820 Jakub Jelinek <jakub@redhat.com>
38822 PR tree-optimization/108522
38823 * tree-object-size.cc (compute_object_offset): Use
38824 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
38826 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38828 * config/xtensa/xtensa.md:
38829 Fix exit from loops detecting references before overwriting in the
38832 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
38834 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
38835 do elimination but only for hard register.
38836 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
38837 calls of get_hard_regno.
38839 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
38841 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
38844 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
38847 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
38848 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
38851 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38853 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
38854 and only include 'csky/t-csky-linux' when enable multilib.
38855 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
38856 define it when disable multilib.
38858 2023-01-24 Richard Biener <rguenther@suse.de>
38860 PR tree-optimization/108500
38861 * dominance.h (calculate_dominance_info): Add parameter
38862 to indicate fast-query compute, defaulted to true.
38863 * dominance.cc (calculate_dominance_info): Honor
38864 fast-query compute parameter.
38865 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
38866 not compute the dominator fast-query DFS numbers.
38868 2023-01-24 Eric Biggers <ebiggers@google.com>
38871 * optc-save-gen.awk: Fix copy-and-paste error.
38873 2023-01-24 Jakub Jelinek <jakub@redhat.com>
38876 * cgraphbuild.cc: Include gimplify.h.
38877 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
38878 their corresponding DECL_VALUE_EXPR expressions after unsharing.
38880 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38883 * config.gcc (tm_file): Move the variable out of loop.
38885 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
38886 Yang Yujie <yangyujie@loongson.cn>
38889 * config/loongarch/loongarch.cc (loongarch_classify_address):
38890 Add precessint for CONST_INT.
38891 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
38892 (loongarch_print_operand): Increase the processing of '%c'.
38893 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
38894 And port the public operand modifiers information to this document.
38896 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38898 * doc/invoke.texi (-mbranch-protection): Update documentation.
38900 2023-01-23 Richard Biener <rguenther@suse.de>
38903 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
38905 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
38906 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
38907 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
38908 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
38910 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38912 * config/arm/aout.h (ra_auth_code): Add entry in enum.
38913 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
38914 to dwarf frame expression.
38915 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
38916 (arm_expand_prologue): Update frame related information and reg notes
38917 for pac/pacbit insn.
38918 (arm_regno_class): Check for pac pseudo reigster.
38919 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
38920 (arm_init_machine_status): Set pacspval_needed to zero.
38921 (arm_debugger_regno): Check for PAC register.
38922 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
38924 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
38925 (arm_unwind_emit): Update REG_CFA_REGISTER case._
38926 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
38927 (DWARF_PAC_REGNUM): Define.
38928 (IS_PAC_REGNUM): Likewise.
38929 (enum reg_class): Add PAC_REG entry.
38930 (machine_function): Add pacbti_needed state to structure.
38931 * config/arm/arm.md (RA_AUTH_CODE): Define.
38933 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38935 * config.gcc ($tm_file): Update variable.
38936 * config/arm/arm-mlib.h: Create new header file.
38937 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
38938 multilib arch directory.
38939 (MULTILIB_REUSE): Add multilib reuse rules.
38940 (MULTILIB_MATCHES): Add multilib match rules.
38942 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38944 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
38945 * config/arm/arm-tables.opt: Regenerate.
38946 * config/arm/arm-tune.md: Likewise.
38947 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
38948 * (-mfix-cmse-cve-2021-35465): Likewise.
38950 2023-01-23 Richard Biener <rguenther@suse.de>
38952 PR tree-optimization/108482
38953 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
38954 .LOOP_DIST_ALIAS calls.
38956 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
38958 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
38959 * config/arm/arm-protos.h: Update.
38960 * config/arm/aarch-common-protos.h: Declare
38961 'aarch_bti_arch_check'.
38962 * config/arm/arm.cc (aarch_bti_enabled) Update.
38963 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
38964 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
38965 * config/arm/arm.md (bti_nop): New insn.
38966 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
38967 (aarch-bti-insert.o): New target.
38968 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
38969 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
38971 (gate): Make use of 'aarch_bti_arch_check'.
38972 * config/arm/arm-passes.def: New file.
38973 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
38975 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
38977 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
38978 'aarch-bti-insert.o'.
38979 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
38981 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
38982 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
38983 (aarch64_output_mi_thunk)
38984 (aarch64_print_patchable_function_entry)
38985 (aarch64_file_end_indicate_exec_stack): Update renamed function
38986 calls to renamed functions.
38987 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
38988 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
38990 * config/aarch64/aarch64-bti-insert.cc: Delete.
38991 * config/arm/aarch-bti-insert.cc: New file including and
38992 generalizing code from aarch64-bti-insert.cc.
38993 * config/arm/aarch-common-protos.h: Update.
38995 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
38997 * config/arm/arm.h (arm_arch8m_main): Declare it.
38998 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
39000 * config/arm/arm.cc (arm_arch8m_main): Define it.
39001 (arm_option_reconfigure_globals): Set arm_arch8m_main.
39002 (arm_compute_frame_layout, arm_expand_prologue)
39003 (thumb2_expand_return, arm_expand_epilogue)
39004 (arm_conditional_register_usage): Update for pac codegen.
39005 (arm_current_function_pac_enabled_p): New function.
39006 (aarch_bti_enabled) New function.
39007 (use_return_insn): Return zero when pac is enabled.
39008 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
39010 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
39011 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
39013 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39015 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
39016 mbranch-protection.
39018 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39019 Tejas Belagod <tbelagod@arm.com>
39021 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
39022 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
39024 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39025 Tejas Belagod <tbelagod@arm.com>
39026 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39028 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
39029 new pseudo register class _UVRSC_PAC.
39031 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39032 Tejas Belagod <tbelagod@arm.com>
39034 * config/arm/arm-c.cc (arm_cpu_builtins): Define
39035 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
39036 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
39038 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39039 Tejas Belagod <tbelagod@arm.com>
39041 * doc/sourcebuild.texi: Document arm_pacbti_hw.
39043 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39044 Tejas Belagod <tbelagod@arm.com>
39045 Richard Earnshaw <Richard.Earnshaw@arm.com>
39047 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
39048 -mbranch-protection option and initialize appropriate data structures.
39049 * config/arm/arm.opt (-mbranch-protection): New option.
39050 * doc/invoke.texi (Arm Options): Document it.
39052 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39053 Tejas Belagod <tbelagod@arm.com>
39055 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
39056 * config/arm/arm-cpus.in (pacbti): New feature.
39057 * doc/invoke.texi (Arm Options): Document it.
39059 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39060 Tejas Belagod <tbelagod@arm.com>
39062 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
39063 (all_architectures): Fix comment.
39064 (aarch64_parse_extension): Rename return type, enum value names.
39065 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
39066 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
39067 Also rename corresponding enum values.
39068 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
39069 out aarch64_function_type and move it to common code as
39070 aarch_function_type in aarch-common.h.
39071 * config/aarch64/aarch64-protos.h: Include common types header,
39072 move out types aarch64_parse_opt_result and aarch64_key_type to
39074 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
39075 and functions out into aarch-common.h and aarch-common.cc. Fix up
39076 all the name changes resulting from the move.
39077 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
39079 * config/aarch64/aarch64.opt: Include aarch-common.h to import
39080 type move. Fix up name changes from factoring out common code and
39082 * config/arm/aarch-common-protos.h: Export factored out routines to both
39084 * config/arm/aarch-common.cc: Include newly factored out types.
39085 Move all mbranch-protection code and data structures from
39087 * config/arm/aarch-common.h: New header that declares types shared
39088 between aarch32 and aarch64 backends.
39089 * config/arm/arm-protos.h: Declare types and variables that are
39090 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
39091 aarch_ra_sign_scope and aarch_enable_bti.
39092 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
39093 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
39094 * config/arm/arm.cc: Add missing includes.
39096 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
39098 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
39100 2023-01-23 Richard Biener <rguenther@suse.de>
39102 PR tree-optimization/108449
39103 * cgraphunit.cc (check_global_declaration): Do not turn
39104 undefined statics into externs.
39106 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
39108 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
39109 and HI input modes.
39110 * config/pru/pru.md (clz): Fix generated code for QI and HI
39113 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
39115 * config/v850/v850.cc (v850_select_section): Put const volatile
39116 objects into read-only sections.
39118 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
39120 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
39121 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
39122 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
39124 2023-01-20 Jakub Jelinek <jakub@redhat.com>
39126 PR tree-optimization/108457
39127 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
39128 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
39129 argument instead of a temporary. Formatting fixes.
39131 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39133 PR tree-optimization/108447
39134 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
39135 (relation_tests): Add self-tests for relation_{intersect,union}
39137 * selftest.h (relation_tests): Declare.
39138 * function-tests.cc (test_ranges): Call it.
39140 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
39143 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
39144 invalid third argument to __builtin_ia32_prefetch.
39146 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39148 PR middle-end/108459
39149 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
39150 than fold_unary for NEGATE_EXPR.
39152 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
39155 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
39156 comment. Move assert about alignment a bit later.
39158 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39160 PR tree-optimization/108440
39161 * tree-ssa-forwprop.cc: Include gimple-range.h.
39162 (simplify_rotate): For the forms with T2 wider than T and shift counts of
39163 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
39164 to B. For the forms with T2 wider than T and shift counts of
39165 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
39166 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
39167 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
39168 pass specific ranger instead of get_global_range_query.
39169 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
39172 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39174 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
39175 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
39177 (aarch64_simd_vec_copy_lane<mode>): Likewise.
39178 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
39180 2023-01-19 Alexandre Oliva <oliva@adacore.com>
39183 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
39184 within debug insns.
39186 2023-01-18 Martin Jambor <mjambor@suse.cz>
39189 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
39190 lcone_of chain also do not need the body.
39192 2023-01-18 Richard Biener <rguenther@suse.de>
39195 2022-12-16 Richard Biener <rguenther@suse.de>
39197 PR middle-end/108086
39198 * tree-inline.cc (remap_ssa_name): Do not unshare the
39199 result from the decl_map.
39201 2023-01-18 Murray Steele <murray.steele@arm.com>
39204 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
39206 (__arm_vst1q_p_s8): Likewise.
39207 (__arm_vld1q_z_u8): Likewise.
39208 (__arm_vld1q_z_s8): Likewise.
39209 (__arm_vst1q_p_u16): Likewise.
39210 (__arm_vst1q_p_s16): Likewise.
39211 (__arm_vld1q_z_u16): Likewise.
39212 (__arm_vld1q_z_s16): Likewise.
39213 (__arm_vst1q_p_u32): Likewise.
39214 (__arm_vst1q_p_s32): Likewise.
39215 (__arm_vld1q_z_u32): Likewise.
39216 (__arm_vld1q_z_s32): Likewise.
39217 (__arm_vld1q_z_f16): Likewise.
39218 (__arm_vst1q_p_f16): Likewise.
39219 (__arm_vld1q_z_f32): Likewise.
39220 (__arm_vst1q_p_f32): Likewise.
39222 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39224 * config/xtensa/xtensa.md (xorsi3_internal):
39225 Rename from the original of "xorsi3".
39226 (xorsi3): New expansion pattern that emits addition rather than
39227 bitwise-XOR when the second source is a constant of -2147483648
39230 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
39231 Andrew Pinski <apinski@marvell.com>
39234 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
39235 vec_vsubcuqP with vec_vsubcuq.
39237 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
39240 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
39241 support for invalid uses of MMA opaque type in function arguments.
39243 2023-01-18 liuhongt <hongtao.liu@intel.com>
39246 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
39247 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
39248 -share or -mno-daz-ftz is specified.
39249 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
39250 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
39252 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
39254 * config/bpf/bpf.cc (bpf_option_override): Disable
39257 2023-01-17 Jakub Jelinek <jakub@redhat.com>
39259 PR tree-optimization/106523
39260 * tree-ssa-forwprop.cc (simplify_rotate): For the
39261 patterns with (-Y) & (B - 1) in one operand's shift
39262 count and Y in another, if T2 has wider precision than T,
39263 punt if Y could have a value in [B, B2 - 1] range.
39265 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
39268 * config/i386/i386.cc (x86_output_mi_thunk): Disable
39269 -mforce-indirect-call for PIC in 32-bit mode.
39271 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
39274 * ipa-modref.cc (modref_access_analysis::analyze): Use
39275 find_always_executed_bbs.
39276 * ipa-sra.cc (process_scan_results): Likewise.
39277 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
39278 (find_always_executed_bbs): New function.
39279 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
39280 (find_always_executed_bbs): Declare.
39282 2023-01-16 Jan Hubicka <jh@suse.cz>
39284 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
39285 by TARGET_USE_SCATTER.
39286 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
39287 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
39288 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
39289 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
39290 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
39291 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
39293 2023-01-16 Richard Biener <rguenther@suse.de>
39296 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
39298 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
39302 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
39303 (__ARM_mve_coerce3): Likewise.
39305 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39307 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
39309 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39311 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
39312 (number_of_iterations_bitcount): Add call to the above.
39313 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
39314 c[lt]z idiom recognition.
39316 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39318 * doc/sourcebuild.texi: Add missing target attributes.
39320 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39322 PR tree-optimization/94793
39323 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
39325 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
39326 (number_of_iterations_cltz_complement): New.
39327 (number_of_iterations_bitcount): Add call to the above.
39329 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
39331 * doc/extend.texi (Common Function Attributes): Fix grammar.
39333 2023-01-16 Jakub Jelinek <jakub@redhat.com>
39336 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
39337 * config/riscv/riscv-vsetvl.cc: Likewise.
39339 2023-01-16 Jakub Jelinek <jakub@redhat.com>
39342 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
39343 disable -Winit-self using pragma GCC diagnostic ignored.
39344 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
39346 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
39347 _mm256_undefined_si256): Likewise.
39348 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
39349 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
39350 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
39351 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
39353 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
39356 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
39357 support for invalid uses in inline asm, factor out the checking and
39358 erroring to lambda function check_and_error_invalid_use.
39360 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
39362 PR tree-optimization/107608
39363 * range-op-float.cc (range_operator_float::fold_range): Avoid
39364 folding into INF when flag_trapping_math.
39365 * value-range.h (frange::known_isinf): Return false for possible NANs.
39367 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39369 * config.gcc (csky-*-*): Support --with-float=softfp.
39371 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39373 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
39374 Rename to xtensa_adjust_reg_alloc_order.
39375 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
39376 Ditto. And also remove code to reorder register numbers for
39377 leaf functions, rename the tables, and adjust the allocation
39378 order for the call0 ABI to use register A0 more.
39379 (xtensa_leaf_regs): Remove.
39380 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
39381 (order_regs_for_local_alloc): Rename as the above.
39382 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
39384 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39386 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
39387 Change to define_insn_and_split to fold ldr+dup to ld1rq.
39388 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
39390 2023-01-14 Alexandre Oliva <oliva@adacore.com>
39392 * hash-table.h (is_deleted): Precheck !is_empty.
39393 (mark_deleted): Postcheck !is_empty.
39394 (copy constructor): Test is_empty before is_deleted.
39396 2023-01-14 Alexandre Oliva <oliva@adacore.com>
39399 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
39402 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
39404 PR rtl-optimization/108274
39405 * function.cc (thread_prologue_and_epilogue_insns): Also update the
39406 DF information for calls in a few more cases.
39408 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
39410 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
39411 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
39413 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
39414 (MAX_SYNC_LIBFUNC_SIZE): Define.
39415 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
39417 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
39418 libcall when sync libcalls are disabled.
39419 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
39420 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
39421 are disabled on 32-bit target.
39422 * config/pa/pa.opt (matomic-libcalls): New option.
39423 * doc/invoke.texi (HPPA Options): Update.
39425 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
39427 PR rtl-optimization/108117
39428 PR rtl-optimization/108132
39429 * sched-deps.cc (deps_analyze_insn): Do not schedule across
39430 calls before reload.
39432 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39434 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
39435 options for -mlibarch.
39436 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
39437 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
39439 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
39441 * attribs.cc (strict_flex_array_level_of): Move this function to ...
39442 * attribs.h (strict_flex_array_level_of): Remove the declaration.
39443 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
39444 replace the referece to strict_flex_array_level_of with
39445 DECL_NOT_FLEXARRAY.
39446 * tree.cc (component_ref_size): Likewise.
39448 2023-01-13 Richard Biener <rguenther@suse.de>
39451 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
39452 crtfastmath.o for -shared.
39453 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
39455 2023-01-13 Richard Biener <rguenther@suse.de>
39458 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
39459 crtfastmath.o for -shared.
39460 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
39462 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
39465 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
39467 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
39469 (TARGET_DWARF_FRAME_REG_MODE): Define.
39471 2023-01-13 Richard Biener <rguenther@suse.de>
39474 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
39475 update EH info on the fly.
39477 2023-01-13 Richard Biener <rguenther@suse.de>
39479 PR tree-optimization/108387
39480 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
39481 value before inserting expression into the tables.
39483 2023-01-12 Andrew Pinski <apinski@marvell.com>
39484 Roger Sayle <roger@nextmovesoftware.com>
39486 PR tree-optimization/92342
39487 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
39488 Use tcc_comparison and :c for the multiply.
39489 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
39491 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
39492 Richard Sandiford <richard.sandiford@arm.com>
39495 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
39496 Check DECL_PACKED for bitfield.
39497 (aarch64_layout_arg): Warn when parameter passing ABI changes.
39498 (aarch64_function_arg_boundary): Do not warn here.
39499 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
39502 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
39503 Richard Sandiford <richard.sandiford@arm.com>
39505 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
39507 (aarch64_layout_arg): Factorize warning conditions.
39508 (aarch64_function_arg_boundary): Fix typo.
39509 * function.cc (currently_expanding_function_start): New variable.
39510 (expand_function_start): Handle
39511 currently_expanding_function_start.
39512 * function.h (currently_expanding_function_start): Declare.
39514 2023-01-12 Richard Biener <rguenther@suse.de>
39516 PR tree-optimization/99412
39517 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
39518 (swap_ops_for_binary_stmt): Remove reduction handling.
39519 (rewrite_expr_tree_parallel): Adjust.
39520 (reassociate_bb): Likewise.
39521 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
39523 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39525 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
39526 Rearrange the emitting codes.
39528 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39530 * config/xtensa/xtensa.md (*btrue):
39531 Correct value of the attribute "length" that depends on
39532 TARGET_DENSITY and operands, and add '?' character to the register
39533 constraint of the compared operand.
39535 2023-01-12 Alexandre Oliva <oliva@adacore.com>
39537 * hash-table.h (expand): Check elements and deleted counts.
39538 (verify): Likewise.
39540 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
39542 PR tree-optimization/71343
39543 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
39544 the value number of the expression X << C the same as the value
39545 number for the multiplication X * (1<<C).
39547 2023-01-11 David Faust <david.faust@oracle.com>
39550 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
39551 floating point modes.
39553 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
39555 PR tree-optimization/108199
39556 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
39557 for bit-field references.
39559 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
39561 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
39562 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
39563 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
39564 OPTION_MASK_P10_FUSION.
39566 2023-01-11 Richard Biener <rguenther@suse.de>
39568 PR tree-optimization/107767
39569 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
39570 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
39571 * tree-switch-conversion.cc (switch_conversion::collect):
39572 Count unique non-default targets accounting for later
39573 merging opportunities.
39575 2023-01-11 Martin Liska <mliska@suse.cz>
39577 PR middle-end/107976
39578 * params.opt: Limit JT params.
39579 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
39581 2023-01-11 Richard Biener <rguenther@suse.de>
39583 PR tree-optimization/108352
39584 * tree-ssa-threadbackward.cc
39585 (back_threader_profitability::profitable_path_p): Adjust
39586 heuristic that allows non-multi-way branch threads creating
39588 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
39589 (--param fsm-scale-path-stmts): Adjust.
39590 * params.opt (--param=fsm-scale-path-blocks=): Remove.
39591 (-param=fsm-scale-path-stmts=): Adjust description.
39593 2023-01-11 Richard Biener <rguenther@suse.de>
39595 PR tree-optimization/108353
39596 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
39598 (add_ssa_edge): Simplify.
39599 (add_control_edge): Likewise.
39600 (ssa_prop_init): Likewise.
39601 (ssa_prop_fini): Likewise.
39602 (ssa_propagation_engine::ssa_propagate): Likewise.
39604 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
39606 * config/s390/s390.md (*not<mode>): New pattern.
39608 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39610 * config/xtensa/xtensa.cc (xtensa_insn_cost):
39611 Let insn cost for size be obtained by applying COSTS_N_INSNS()
39612 to instruction length and then dividing by 3.
39614 2023-01-10 Richard Biener <rguenther@suse.de>
39616 PR tree-optimization/106293
39617 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
39618 process degenerate PHI defs.
39620 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
39622 PR rtl-optimization/106421
39623 * cprop.cc (bypass_block): Check that DEST is local to this
39624 function (non-NULL) before calling find_edge.
39626 2023-01-10 Martin Jambor <mjambor@suse.cz>
39629 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
39630 sort_replacements, lookup_first_base_replacement and
39631 m_sorted_replacements_p.
39632 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
39633 (ipa_param_body_adjustments::register_replacement): Set
39634 m_sorted_replacements_p to false.
39635 (compare_param_body_replacement): New function.
39636 (ipa_param_body_adjustments::sort_replacements): Likewise.
39637 (ipa_param_body_adjustments::common_initialization): Call
39639 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
39640 m_sorted_replacements_p.
39641 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
39643 (ipa_param_body_adjustments::lookup_first_base_replacement): New
39645 (ipa_param_body_adjustments::modify_call_stmt): Use
39646 lookup_first_base_replacement.
39647 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
39648 adjustments->sort_replacements.
39650 2023-01-10 Richard Biener <rguenther@suse.de>
39652 PR tree-optimization/108314
39653 * tree-vect-stmts.cc (vectorizable_condition): Do not
39654 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
39656 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39658 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
39660 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39662 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
39664 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39666 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
39667 defines for soft float abi.
39669 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39671 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
39672 (smart_bclri): Likewise.
39673 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
39674 (fast_bclri): Likewise.
39675 (fast_cmpnesi_i): Likewise.
39676 (*fast_cmpltsi_i): Likewise.
39677 (*fast_cmpgeusi_i): Likewise.
39679 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39681 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
39682 flag_fp_int_builtin_inexact || !flag_trapping_math.
39683 (<frm_pattern><mode>2): Likewise.
39685 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
39687 * config/s390/s390.cc (s390_register_info): Check call_used_regs
39688 instead of hard-coding the register numbers for call saved
39690 (s390_optimize_register_info): Likewise.
39692 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
39694 * doc/gm2.texi (Overview): Fix @node markers.
39695 (Using): Likewise. Remove subsections that were moved to Overview
39696 from the menu and move others around.
39698 2023-01-09 Richard Biener <rguenther@suse.de>
39700 PR middle-end/108209
39701 * genmatch.cc (commutative_op): Fix return value for
39702 user-id with non-commutative first replacement.
39704 2023-01-09 Jakub Jelinek <jakub@redhat.com>
39707 * calls.cc (expand_call): For calls with
39708 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
39711 2023-01-09 Richard Biener <rguenther@suse.de>
39713 PR middle-end/69482
39714 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
39715 qualified accesses also force objects to memory.
39717 2023-01-09 Martin Liska <mliska@suse.cz>
39720 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
39721 NULL (deleleted value) to a hash_set.
39723 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39725 * config/xtensa/xtensa.md (*splice_bits):
39726 New insn_and_split pattern.
39728 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39730 * config/xtensa/xtensa.cc
39731 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
39732 New helper functions.
39733 (xtensa_set_return_address, xtensa_output_mi_thunk):
39734 Change to use the helper function.
39735 (xtensa_emit_adjust_stack_ptr): Ditto.
39736 And also change to try reusing the content of scratch register
39737 A9 if the register is not modified in the function body.
39739 2023-01-07 LIU Hao <lh_mouse@126.com>
39741 PR middle-end/108300
39742 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
39743 before <windows.h>.
39744 * diagnostic-color.cc: Likewise.
39745 * plugin.cc: Likewise.
39746 * prefix.cc: Likewise.
39748 2023-01-06 Joseph Myers <joseph@codesourcery.com>
39750 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
39751 for handling real integer types.
39753 2023-01-06 Tamar Christina <tamar.christina@arm.com>
39756 2022-12-12 Tamar Christina <tamar.christina@arm.com>
39758 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
39759 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
39760 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
39761 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
39762 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
39763 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
39764 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
39765 (aarch64_simd_dupv2hf): New.
39766 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
39768 * config/aarch64/iterators.md (VHSDF_P): New.
39769 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
39770 Vel, q, vp): Add V2HF.
39771 * config/arm/types.md (neon_fp_reduc_add_h): New.
39773 2023-01-06 Martin Liska <mliska@suse.cz>
39775 PR middle-end/107966
39776 * doc/options.texi: Fix Var documentation in internal manual.
39778 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
39781 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
39783 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
39784 RTL expansion to allow condition (mask) to be shared/reused,
39785 by avoiding overwriting pseudos and adding REG_EQUAL notes.
39787 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
39789 * common.opt: Add -static-libgm2.
39790 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
39791 * doc/gm2.texi: Document static-libgm2.
39792 * gcc.cc (driver_handle_option): Allow static-libgm2.
39794 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
39796 * common/config/i386/i386-common.cc (processor_alias_table):
39797 Use CPU_ZNVER4 for znver4.
39798 * config/i386/i386.md: Add znver4.md.
39799 * config/i386/znver4.md: New.
39801 2023-01-04 Jakub Jelinek <jakub@redhat.com>
39803 PR tree-optimization/108253
39804 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
39807 2023-01-04 Jakub Jelinek <jakub@redhat.com>
39809 PR middle-end/108237
39810 * generic-match-head.cc: Include tree-pass.h.
39811 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
39812 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
39813 resp. PROP_gimple_lvec property set.
39815 2023-01-04 Jakub Jelinek <jakub@redhat.com>
39817 PR sanitizer/108256
39818 * convert.cc (do_narrow): Punt for MULT_EXPR if original
39819 type doesn't wrap around and -fsanitize=signed-integer-overflow
39821 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
39823 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
39825 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
39826 * common/config/i386/i386-common.cc: Add Emeraldrapids.
39828 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
39830 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
39833 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
39835 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
39836 default constructor to initialize it.
39837 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
39838 for last and iterate to handle recursive calls. Delete leftover
39839 candidates at the end.
39840 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
39842 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
39843 gc_candidate bit when a clone is used.
39845 2023-01-03 Florian Weimer <fweimer@redhat.com>
39848 2023-01-02 Florian Weimer <fweimer@redhat.com>
39850 * dwarf2cfi.cc (init_return_column_size): Remove.
39851 (init_one_dwarf_reg_size): Adjust.
39852 (generate_dwarf_reg_sizes): New function. Extracted
39853 from expand_builtin_init_dwarf_reg_sizes.
39854 (expand_builtin_init_dwarf_reg_sizes): Call
39855 generate_dwarf_reg_sizes.
39856 * target.def (init_dwarf_reg_sizes_extra): Adjust
39858 * config/msp430/msp430.cc
39859 (msp430_init_dwarf_reg_sizes_extra): Adjust.
39860 * config/rs6000/rs6000.cc
39861 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
39862 * doc/tm.texi: Update.
39864 2023-01-03 Florian Weimer <fweimer@redhat.com>
39867 2023-01-02 Florian Weimer <fweimer@redhat.com>
39869 * debug.h (dwarf_reg_sizes_constant): Declare.
39870 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
39872 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
39874 PR tree-optimization/105043
39875 * doc/extend.texi (Object Size Checking): Split out into two
39876 subsections and mention _FORTIFY_SOURCE.
39878 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
39880 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
39881 RTL expansion to allow condition (mask) to be shared/reused,
39882 by avoiding overwriting pseudos and adding REG_EQUAL notes.
39884 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
39887 * config/i386/i386-features.cc
39888 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
39889 the gain/cost of converting a MEM operand.
39891 2023-01-03 Jakub Jelinek <jakub@redhat.com>
39893 PR middle-end/108264
39894 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
39895 from source which doesn't have scalar integral mode first convert
39898 2023-01-03 Jakub Jelinek <jakub@redhat.com>
39900 PR rtl-optimization/108263
39901 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
39904 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
39907 * config/i386/lujiazui.md (lujiazui_div): New automaton.
39908 (lua_div): New unit.
39909 (lua_idiv_qi): Correct unit in the reservation.
39910 (lua_idiv_qi_load): Ditto.
39911 (lua_idiv_hi): Ditto.
39912 (lua_idiv_hi_load): Ditto.
39913 (lua_idiv_si): Ditto.
39914 (lua_idiv_si_load): Ditto.
39915 (lua_idiv_di): Ditto.
39916 (lua_idiv_di_load): Ditto.
39917 (lua_fdiv_SF): Ditto.
39918 (lua_fdiv_SF_load): Ditto.
39919 (lua_fdiv_DF): Ditto.
39920 (lua_fdiv_DF_load): Ditto.
39921 (lua_fdiv_XF): Ditto.
39922 (lua_fdiv_XF_load): Ditto.
39923 (lua_ssediv_SF): Ditto.
39924 (lua_ssediv_load_SF): Ditto.
39925 (lua_ssediv_V4SF): Ditto.
39926 (lua_ssediv_load_V4SF): Ditto.
39927 (lua_ssediv_V8SF): Ditto.
39928 (lua_ssediv_load_V8SF): Ditto.
39929 (lua_ssediv_SD): Ditto.
39930 (lua_ssediv_load_SD): Ditto.
39931 (lua_ssediv_V2DF): Ditto.
39932 (lua_ssediv_load_V2DF): Ditto.
39933 (lua_ssediv_V4DF): Ditto.
39934 (lua_ssediv_load_V4DF): Ditto.
39936 2023-01-02 Florian Weimer <fweimer@redhat.com>
39938 * debug.h (dwarf_reg_sizes_constant): Declare.
39939 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
39941 2023-01-02 Florian Weimer <fweimer@redhat.com>
39943 * dwarf2cfi.cc (init_return_column_size): Remove.
39944 (init_one_dwarf_reg_size): Adjust.
39945 (generate_dwarf_reg_sizes): New function. Extracted
39946 from expand_builtin_init_dwarf_reg_sizes.
39947 (expand_builtin_init_dwarf_reg_sizes): Call
39948 generate_dwarf_reg_sizes.
39949 * target.def (init_dwarf_reg_sizes_extra): Adjust
39951 * config/msp430/msp430.cc
39952 (msp430_init_dwarf_reg_sizes_extra): Adjust.
39953 * config/rs6000/rs6000.cc
39954 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
39955 * doc/tm.texi: Update.
39957 2023-01-02 Jakub Jelinek <jakub@redhat.com>
39959 * gcc.cc (process_command): Update copyright notice dates.
39960 * gcov-dump.cc (print_version): Ditto.
39961 * gcov.cc (print_version): Ditto.
39962 * gcov-tool.cc (print_version): Ditto.
39963 * gengtype.cc (create_file): Ditto.
39964 * doc/cpp.texi: Bump @copying's copyright year.
39965 * doc/cppinternals.texi: Ditto.
39966 * doc/gcc.texi: Ditto.
39967 * doc/gccint.texi: Ditto.
39968 * doc/gcov.texi: Ditto.
39969 * doc/install.texi: Ditto.
39970 * doc/invoke.texi: Ditto.
39972 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
39973 Uroš Bizjak <ubizjak@gmail.com>
39975 * config/i386/i386.md (extendditi2): New define_insn.
39976 (define_split): Use DWIH mode iterator to treat new extendditi2
39977 identically to existing extendsidi2_1.
39978 (define_peephole2): Likewise.
39979 (define_peephole2): Likewise.
39980 (define_Split): Likewise.
39983 Copyright (C) 2023 Free Software Foundation, Inc.
39985 Copying and distribution of this file, with or without modification,
39986 are permitted in any medium without royalty provided the copyright
39987 notice and this notice are preserved.