1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2022 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "tree-pass.h"
31 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
35 #include "common/common-target.h"
37 #include "except.h" /* expand_builtin_dwarf_sp_column */
38 #include "profile-count.h" /* For expr.h */
39 #include "expr.h" /* init_return_column_size */
40 #include "output.h" /* asm_out_file */
41 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
42 #include "flags.h" /* dwarf_debuginfo_p */
44 /* ??? Poison these here until it can be done generically. They've been
45 totally replaced in this file; make sure it stays that way. */
46 #undef DWARF2_UNWIND_INFO
47 #undef DWARF2_FRAME_INFO
48 #if (GCC_VERSION >= 3000)
49 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
52 #ifndef INCOMING_RETURN_ADDR_RTX
53 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
56 #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET
57 #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET
60 /* A collected description of an entire row of the abstract CFI table. */
61 struct GTY(()) dw_cfi_row
63 /* The expression that computes the CFA, expressed in two different ways.
64 The CFA member for the simple cases, and the full CFI expression for
65 the complex cases. The later will be a DW_CFA_cfa_expression. */
69 /* The expressions for any register column that is saved. */
72 /* True if the register window is saved. */
75 /* True if the return address is in a mangled state. */
79 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
80 struct GTY(()) reg_saved_in_data
{
86 /* Since we no longer have a proper CFG, we're going to create a facsimile
87 of one on the fly while processing the frame-related insns.
89 We create dw_trace_info structures for each extended basic block beginning
90 and ending at a "save point". Save points are labels, barriers, certain
91 notes, and of course the beginning and end of the function.
93 As we encounter control transfer insns, we propagate the "current"
94 row state across the edges to the starts of traces. When checking is
95 enabled, we validate that we propagate the same data from all sources.
97 All traces are members of the TRACE_INFO array, in the order in which
98 they appear in the instruction stream.
100 All save points are present in the TRACE_INDEX hash, mapping the insn
101 starting a trace to the dw_trace_info describing the trace. */
105 /* The insn that begins the trace. */
108 /* The row state at the beginning and end of the trace. */
109 dw_cfi_row
*beg_row
, *end_row
;
111 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
112 while scanning insns. However, the args_size value is irrelevant at
113 any point except can_throw_internal_p insns. Therefore the "delay"
114 sizes the values that must actually be emitted for this trace. */
115 poly_int64_pod beg_true_args_size
, end_true_args_size
;
116 poly_int64_pod beg_delay_args_size
, end_delay_args_size
;
118 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
121 /* The following variables contain data used in interpreting frame related
122 expressions. These are not part of the "real" row state as defined by
123 Dwarf, but it seems like they need to be propagated into a trace in case
124 frame related expressions have been sunk. */
125 /* ??? This seems fragile. These variables are fragments of a larger
126 expression. If we do not keep the entire expression together, we risk
127 not being able to put it together properly. Consider forcing targets
128 to generate self-contained expressions and dropping all of the magic
129 interpretation code in this file. Or at least refusing to shrink wrap
130 any frame related insn that doesn't contain a complete expression. */
132 /* The register used for saving registers to the stack, and its offset
134 dw_cfa_location cfa_store
;
136 /* A temporary register holding an integral value used in adjusting SP
137 or setting up the store_reg. The "offset" field holds the integer
138 value, not an offset. */
139 dw_cfa_location cfa_temp
;
141 /* A set of registers saved in other registers. This is the inverse of
142 the row->reg_save info, if the entry is a DW_CFA_register. This is
143 implemented as a flat array because it normally contains zero or 1
144 entry, depending on the target. IA-64 is the big spender here, using
145 a maximum of 5 entries. */
146 vec
<reg_saved_in_data
> regs_saved_in_regs
;
148 /* An identifier for this trace. Used only for debugging dumps. */
151 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
152 bool switch_sections
;
154 /* True if we've seen different values incoming to beg_true_args_size. */
155 bool args_size_undefined
;
157 /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */
158 bool args_size_defined_for_eh
;
162 /* Hashtable helpers. */
164 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
166 static inline hashval_t
hash (const dw_trace_info
*);
167 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
171 trace_info_hasher::hash (const dw_trace_info
*ti
)
173 return INSN_UID (ti
->head
);
177 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
179 return a
->head
== b
->head
;
183 /* The variables making up the pseudo-cfg, as described above. */
184 static vec
<dw_trace_info
> trace_info
;
185 static vec
<dw_trace_info
*> trace_work_list
;
186 static hash_table
<trace_info_hasher
> *trace_index
;
188 /* A vector of call frame insns for the CIE. */
191 /* The state of the first row of the FDE table, which includes the
192 state provided by the CIE. */
193 static GTY(()) dw_cfi_row
*cie_cfi_row
;
195 static GTY(()) reg_saved_in_data
*cie_return_save
;
197 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
199 /* The insn after which a new CFI note should be emitted. */
200 static rtx_insn
*add_cfi_insn
;
202 /* When non-null, add_cfi will add the CFI to this vector. */
203 static cfi_vec
*add_cfi_vec
;
205 /* The current instruction trace. */
206 static dw_trace_info
*cur_trace
;
208 /* The current, i.e. most recently generated, row of the CFI table. */
209 static dw_cfi_row
*cur_row
;
211 /* A copy of the current CFA, for use during the processing of a
213 static dw_cfa_location
*cur_cfa
;
215 /* We delay emitting a register save until either (a) we reach the end
216 of the prologue or (b) the register is clobbered. This clusters
217 register saves so that there are fewer pc advances. */
219 struct queued_reg_save
{
222 poly_int64_pod cfa_offset
;
226 static vec
<queued_reg_save
> queued_reg_saves
;
228 /* True if any CFI directives were emitted at the current insn. */
229 static bool any_cfis_emitted
;
231 /* Short-hand for commonly used register numbers. */
232 static struct cfa_reg dw_stack_pointer_regnum
;
233 static struct cfa_reg dw_frame_pointer_regnum
;
235 /* Hook used by __throw. */
238 expand_builtin_dwarf_sp_column (void)
240 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
241 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
244 /* MEM is a memory reference for the register size table, each element of
245 which has mode MODE. Initialize column C as a return address column. */
248 init_return_column_size (scalar_int_mode mode
, rtx mem
, unsigned int c
)
250 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
251 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
252 emit_move_insn (adjust_address (mem
, mode
, offset
),
253 gen_int_mode (size
, mode
));
256 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
257 init_one_dwarf_reg_size to communicate on what has been done by the
260 struct init_one_dwarf_reg_state
262 /* Whether the dwarf return column was initialized. */
263 bool wrote_return_column
;
265 /* For each hard register REGNO, whether init_one_dwarf_reg_size
266 was given REGNO to process already. */
267 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
271 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
272 initialize the dwarf register size table entry corresponding to register
273 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
274 use for the size entry to initialize, and INIT_STATE is the communication
275 datastructure conveying what we're doing to our caller. */
278 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
279 rtx table
, machine_mode slotmode
,
280 init_one_dwarf_reg_state
*init_state
)
282 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
283 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
284 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
286 poly_int64 slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
287 poly_int64 regsize
= GET_MODE_SIZE (regmode
);
289 init_state
->processed_regno
[regno
] = true;
291 if (rnum
>= DWARF_FRAME_REGISTERS
)
294 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
296 if (regmode
== VOIDmode
)
298 init_state
->wrote_return_column
= true;
301 /* ??? When is this true? Should it be a test based on DCOL instead? */
302 if (maybe_lt (slotoffset
, 0))
305 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
306 gen_int_mode (regsize
, slotmode
));
309 /* Generate code to initialize the dwarf register size table located
310 at the provided ADDRESS. */
313 expand_builtin_init_dwarf_reg_sizes (tree address
)
316 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (char_type_node
);
317 rtx addr
= expand_normal (address
);
318 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
320 init_one_dwarf_reg_state init_state
;
322 memset ((char *)&init_state
, 0, sizeof (init_state
));
324 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
326 machine_mode save_mode
;
329 /* No point in processing a register multiple times. This could happen
330 with register spans, e.g. when a reg is first processed as a piece of
331 a span, then as a register on its own later on. */
333 if (init_state
.processed_regno
[i
])
336 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
337 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
340 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
343 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
345 rtx reg
= XVECEXP (span
, 0, si
);
347 init_one_dwarf_reg_size
348 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
353 if (!init_state
.wrote_return_column
)
354 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
356 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
357 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
360 targetm
.init_dwarf_reg_sizes_extra (address
);
364 static dw_trace_info
*
365 get_trace_info (rtx_insn
*insn
)
369 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
373 save_point_p (rtx_insn
*insn
)
375 /* Labels, except those that are really jump tables. */
377 return inside_basic_block_p (insn
);
379 /* We split traces at the prologue/epilogue notes because those
380 are points at which the unwind info is usually stable. This
381 makes it easier to find spots with identical unwind info so
382 that we can use remember/restore_state opcodes. */
384 switch (NOTE_KIND (insn
))
386 case NOTE_INSN_PROLOGUE_END
:
387 case NOTE_INSN_EPILOGUE_BEG
:
394 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
396 static inline HOST_WIDE_INT
397 div_data_align (HOST_WIDE_INT off
)
399 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
400 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
404 /* Return true if we need a signed version of a given opcode
405 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
408 need_data_align_sf_opcode (HOST_WIDE_INT off
)
410 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
413 /* Return a pointer to a newly allocated Call Frame Instruction. */
415 static inline dw_cfi_ref
418 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
420 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
421 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
426 /* Return a newly allocated CFI row, with no defined data. */
431 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
433 row
->cfa
.reg
.set_by_dwreg (INVALID_REGNUM
);
438 /* Return a copy of an existing CFI row. */
441 copy_cfi_row (dw_cfi_row
*src
)
443 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
446 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
451 /* Return a copy of an existing CFA location. */
453 static dw_cfa_location
*
454 copy_cfa (dw_cfa_location
*src
)
456 dw_cfa_location
*dst
= ggc_alloc
<dw_cfa_location
> ();
461 /* Generate a new label for the CFI info to refer to. */
464 dwarf2out_cfi_label (void)
466 int num
= dwarf2out_cfi_label_num
++;
469 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
471 return xstrdup (label
);
474 /* Add CFI either to the current insn stream or to a vector, or both. */
477 add_cfi (dw_cfi_ref cfi
)
479 any_cfis_emitted
= true;
481 if (add_cfi_insn
!= NULL
)
483 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
484 NOTE_CFI (add_cfi_insn
) = cfi
;
487 if (add_cfi_vec
!= NULL
)
488 vec_safe_push (*add_cfi_vec
, cfi
);
492 add_cfi_args_size (poly_int64 size
)
494 /* We don't yet have a representation for polynomial sizes. */
495 HOST_WIDE_INT const_size
= size
.to_constant ();
497 dw_cfi_ref cfi
= new_cfi ();
499 /* While we can occasionally have args_size < 0 internally, this state
500 should not persist at a point we actually need an opcode. */
501 gcc_assert (const_size
>= 0);
503 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
504 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_size
;
510 add_cfi_restore (unsigned reg
)
512 dw_cfi_ref cfi
= new_cfi ();
514 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
515 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
520 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
521 that the register column is no longer saved. */
524 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
526 if (vec_safe_length (row
->reg_save
) <= column
)
527 vec_safe_grow_cleared (row
->reg_save
, column
+ 1, true);
528 (*row
->reg_save
)[column
] = cfi
;
531 /* This function fills in aa dw_cfa_location structure from a dwarf location
532 descriptor sequence. */
535 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
537 struct dw_loc_descr_node
*ptr
;
539 cfa
->base_offset
= 0;
541 cfa
->reg
.set_by_dwreg (INVALID_REGNUM
);
543 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
545 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
581 cfa
->reg
.set_by_dwreg (op
- DW_OP_reg0
);
584 cfa
->reg
.set_by_dwreg (ptr
->dw_loc_oprnd1
.v
.val_int
);
619 if (cfa
->reg
.reg
== INVALID_REGNUM
)
623 ? ptr
->dw_loc_oprnd1
.v
.val_int
: op
- DW_OP_breg0
);
624 cfa
->reg
.set_by_dwreg (regno
);
625 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
629 /* Handle case when span can cover multiple registers. We
630 only support the simple case of consecutive registers
631 all with the same size. DWARF that we are dealing with
632 will look something like:
633 <DW_OP_bregx: (r49) 0; DW_OP_const1u: 32; DW_OP_shl;
634 DW_OP_bregx: (r48) 0; DW_OP_plus> */
638 ? ptr
->dw_loc_oprnd1
.v
.val_int
: op
- DW_OP_breg0
);
639 gcc_assert (regno
== cfa
->reg
.reg
- 1);
641 /* From all the consecutive registers used, we want to set
642 cfa->reg.reg to lower number register. */
643 cfa
->reg
.reg
= regno
;
644 /* The offset was the shift value. Use it to get the
645 span_width and then set it to 0. */
646 cfa
->reg
.span_width
= cfa
->offset
.to_constant () / 8;
687 gcc_assert (known_eq (cfa
->offset
, 0));
688 cfa
->offset
= op
- DW_OP_lit0
;
698 gcc_assert (known_eq (cfa
->offset
, 0));
699 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
702 cfa
->offset
= -cfa
->offset
;
705 /* The offset is already in place. */
707 case DW_OP_plus_uconst
:
708 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
716 /* Find the previous value for the CFA, iteratively. CFI is the opcode
717 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
718 one level of remember/restore state processing. */
721 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
723 switch (cfi
->dw_cfi_opc
)
725 case DW_CFA_def_cfa_offset
:
726 case DW_CFA_def_cfa_offset_sf
:
727 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
729 case DW_CFA_def_cfa_register
:
730 loc
->reg
.set_by_dwreg (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
);
733 case DW_CFA_def_cfa_sf
:
734 loc
->reg
.set_by_dwreg (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
);
735 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
737 case DW_CFA_def_cfa_expression
:
738 if (cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
)
739 *loc
= *cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
;
741 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
744 case DW_CFA_remember_state
:
745 gcc_assert (!remember
->in_use
);
747 remember
->in_use
= 1;
749 case DW_CFA_restore_state
:
750 gcc_assert (remember
->in_use
);
752 remember
->in_use
= 0;
760 /* Determine if two dw_cfa_location structures define the same data. */
763 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
765 return (loc1
->reg
== loc2
->reg
766 && known_eq (loc1
->offset
, loc2
->offset
)
767 && loc1
->indirect
== loc2
->indirect
768 && (loc1
->indirect
== 0
769 || known_eq (loc1
->base_offset
, loc2
->base_offset
)));
772 /* Determine if two CFI operands are identical. */
775 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
779 case dw_cfi_oprnd_unused
:
781 case dw_cfi_oprnd_reg_num
:
782 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
783 case dw_cfi_oprnd_offset
:
784 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
785 case dw_cfi_oprnd_addr
:
786 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
787 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
788 case dw_cfi_oprnd_loc
:
789 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
790 case dw_cfi_oprnd_cfa_loc
:
791 return cfa_equal_p (a
->dw_cfi_cfa_loc
, b
->dw_cfi_cfa_loc
);
796 /* Determine if two CFI entries are identical. */
799 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
801 enum dwarf_call_frame_info opc
;
803 /* Make things easier for our callers, including missing operands. */
806 if (a
== NULL
|| b
== NULL
)
809 /* Obviously, the opcodes must match. */
811 if (opc
!= b
->dw_cfi_opc
)
814 /* Compare the two operands, re-using the type of the operands as
815 already exposed elsewhere. */
816 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
817 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
818 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
819 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
822 /* Determine if two CFI_ROW structures are identical. */
825 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
827 size_t i
, n_a
, n_b
, n_max
;
831 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
834 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
837 n_a
= vec_safe_length (a
->reg_save
);
838 n_b
= vec_safe_length (b
->reg_save
);
839 n_max
= MAX (n_a
, n_b
);
841 for (i
= 0; i
< n_max
; ++i
)
843 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
846 r_a
= (*a
->reg_save
)[i
];
848 r_b
= (*b
->reg_save
)[i
];
850 if (!cfi_equal_p (r_a
, r_b
))
854 if (a
->window_save
!= b
->window_save
)
857 if (a
->ra_mangled
!= b
->ra_mangled
)
863 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
864 what opcode to emit. Returns the CFI opcode to effect the change, or
865 NULL if NEW_CFA == OLD_CFA. */
868 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
872 /* If nothing changed, no need to issue any call frame instructions. */
873 if (cfa_equal_p (old_cfa
, new_cfa
))
878 HOST_WIDE_INT const_offset
;
879 if (new_cfa
->reg
== old_cfa
->reg
880 && new_cfa
->reg
.span
== 1
881 && !new_cfa
->indirect
882 && !old_cfa
->indirect
883 && new_cfa
->offset
.is_constant (&const_offset
))
885 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
886 the CFA register did not change but the offset did. The data
887 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
888 in the assembler via the .cfi_def_cfa_offset directive. */
889 if (const_offset
< 0)
890 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
892 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
893 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_offset
;
895 else if (new_cfa
->offset
.is_constant ()
896 && known_eq (new_cfa
->offset
, old_cfa
->offset
)
897 && old_cfa
->reg
.reg
!= INVALID_REGNUM
898 && new_cfa
->reg
.span
== 1
899 && !new_cfa
->indirect
900 && !old_cfa
->indirect
)
902 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
903 indicating the CFA register has changed to <register> but the
904 offset has not changed. This requires the old CFA to have
905 been set as a register plus offset rather than a general
906 DW_CFA_def_cfa_expression. */
907 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
908 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
.reg
;
910 else if (new_cfa
->indirect
== 0
911 && new_cfa
->offset
.is_constant (&const_offset
)
912 && new_cfa
->reg
.span
== 1)
914 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
915 indicating the CFA register has changed to <register> with
916 the specified offset. The data factoring for DW_CFA_def_cfa_sf
917 happens in output_cfi, or in the assembler via the .cfi_def_cfa
919 if (const_offset
< 0)
920 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
922 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
923 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
.reg
;
924 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
928 /* Construct a DW_CFA_def_cfa_expression instruction to
929 calculate the CFA using a full location expression since no
930 register-offset pair is available. */
931 struct dw_loc_descr_node
*loc_list
;
933 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
934 loc_list
= build_cfa_loc (new_cfa
, 0);
935 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
936 if (!new_cfa
->offset
.is_constant ()
937 || !new_cfa
->base_offset
.is_constant ())
938 /* It's hard to reconstruct the CFA location for a polynomial
939 expression, so just cache it instead. */
940 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= copy_cfa (new_cfa
);
942 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= NULL
;
948 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
951 def_cfa_1 (dw_cfa_location
*new_cfa
)
955 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
956 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
958 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
961 cur_row
->cfa
= *new_cfa
;
962 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
969 /* Add the CFI for saving a register. REG is the CFA column number.
970 If SREG is INVALID_REGISTER, the register is saved at OFFSET from the CFA;
971 otherwise it is saved in SREG. */
974 reg_save (unsigned int reg
, struct cfa_reg sreg
, poly_int64 offset
)
976 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
977 dw_cfi_ref cfi
= new_cfi ();
979 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
981 if (sreg
.reg
== INVALID_REGNUM
)
983 HOST_WIDE_INT const_offset
;
984 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
985 if (fde
&& fde
->stack_realign
)
987 cfi
->dw_cfi_opc
= DW_CFA_expression
;
988 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
989 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
990 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
991 fde
->stack_realignment
);
993 else if (offset
.is_constant (&const_offset
))
995 if (need_data_align_sf_opcode (const_offset
))
996 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
997 else if (reg
& ~0x3f)
998 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
1000 cfi
->dw_cfi_opc
= DW_CFA_offset
;
1001 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
1005 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1006 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1007 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1008 = build_cfa_loc (&cur_row
->cfa
, offset
);
1011 else if (sreg
.reg
== reg
)
1013 /* While we could emit something like DW_CFA_same_value or
1014 DW_CFA_restore, we never expect to see something like that
1015 in a prologue. This is more likely to be a bug. A backend
1016 can always bypass this by using REG_CFA_RESTORE directly. */
1019 else if (sreg
.span
> 1)
1021 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1022 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1023 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
= build_span_loc (sreg
);
1027 cfi
->dw_cfi_opc
= DW_CFA_register
;
1028 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
.reg
;
1032 update_row_reg_save (cur_row
, reg
, cfi
);
1035 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
1036 and adjust data structures to match. */
1039 notice_args_size (rtx_insn
*insn
)
1041 poly_int64 args_size
, delta
;
1044 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
1048 if (!cur_trace
->eh_head
)
1049 cur_trace
->args_size_defined_for_eh
= true;
1051 args_size
= get_args_size (note
);
1052 delta
= args_size
- cur_trace
->end_true_args_size
;
1053 if (known_eq (delta
, 0))
1056 cur_trace
->end_true_args_size
= args_size
;
1058 /* If the CFA is computed off the stack pointer, then we must adjust
1059 the computation of the CFA as well. */
1060 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1062 gcc_assert (!cur_cfa
->indirect
);
1064 /* Convert a change in args_size (always a positive in the
1065 direction of stack growth) to a change in stack pointer. */
1066 if (!STACK_GROWS_DOWNWARD
)
1069 cur_cfa
->offset
+= delta
;
1073 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
1074 data within the trace related to EH insns and args_size. */
1077 notice_eh_throw (rtx_insn
*insn
)
1079 poly_int64 args_size
= cur_trace
->end_true_args_size
;
1080 if (cur_trace
->eh_head
== NULL
)
1082 cur_trace
->eh_head
= insn
;
1083 cur_trace
->beg_delay_args_size
= args_size
;
1084 cur_trace
->end_delay_args_size
= args_size
;
1086 else if (maybe_ne (cur_trace
->end_delay_args_size
, args_size
))
1088 cur_trace
->end_delay_args_size
= args_size
;
1090 /* ??? If the CFA is the stack pointer, search backward for the last
1091 CFI note and insert there. Given that the stack changed for the
1092 args_size change, there *must* be such a note in between here and
1093 the last eh insn. */
1094 add_cfi_args_size (args_size
);
1098 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1099 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1100 used in places where rtl is prohibited. */
1102 static inline unsigned
1103 dwf_regno (const_rtx reg
)
1105 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
1106 return DWARF_FRAME_REGNUM (REGNO (reg
));
1109 /* Like dwf_regno, but when the value can span multiple registers. */
1111 static struct cfa_reg
1112 dwf_cfa_reg (rtx reg
)
1114 struct cfa_reg result
;
1116 result
.reg
= dwf_regno (reg
);
1118 result
.span_width
= 0;
1120 rtx span
= targetm
.dwarf_register_span (reg
);
1123 /* We only support the simple case of consecutive registers all with the
1125 result
.span
= XVECLEN (span
, 0);
1126 result
.span_width
= GET_MODE_SIZE (GET_MODE (XVECEXP (span
, 0, 0)))
1131 /* Ensure that the above assumption is accurate. */
1132 for (unsigned int i
= 0; i
< result
.span
; i
++)
1134 gcc_assert (GET_MODE_SIZE (GET_MODE (XVECEXP (span
, 0, i
)))
1135 .to_constant () == result
.span_width
);
1136 gcc_assert (REG_P (XVECEXP (span
, 0, i
)));
1137 gcc_assert (dwf_regno (XVECEXP (span
, 0, i
)) == result
.reg
+ i
);
1145 /* More efficient comparisons that don't call targetm.dwarf_register_span
1146 unnecessarily. These cfa_reg vs. rtx comparisons should be done at
1147 least for call-saved REGs that might not be CFA related (like stack
1148 pointer, hard frame pointer or DRAP registers are), in other cases it is
1149 just a compile time and memory optimization. */
1152 operator== (cfa_reg
&cfa
, rtx reg
)
1154 unsigned int regno
= dwf_regno (reg
);
1155 if (cfa
.reg
!= regno
)
1157 struct cfa_reg other
= dwf_cfa_reg (reg
);
1158 return cfa
== other
;
1162 operator!= (cfa_reg
&cfa
, rtx reg
)
1164 return !(cfa
== reg
);
1167 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1170 compare_reg_or_pc (rtx x
, rtx y
)
1172 if (REG_P (x
) && REG_P (y
))
1173 return REGNO (x
) == REGNO (y
);
1177 /* Record SRC as being saved in DEST. DEST may be null to delete an
1178 existing entry. SRC may be a register or PC_RTX. */
1181 record_reg_saved_in_reg (rtx dest
, rtx src
)
1183 reg_saved_in_data
*elt
;
1186 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1187 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1190 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1192 elt
->saved_in_reg
= dest
;
1199 reg_saved_in_data e
= {src
, dest
};
1200 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1203 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1204 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1207 queue_reg_save (rtx reg
, rtx sreg
, poly_int64 offset
)
1210 queued_reg_save e
= {reg
, sreg
, offset
};
1213 /* Duplicates waste space, but it's also necessary to remove them
1214 for correctness, since the queue gets output in reverse order. */
1215 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1216 if (compare_reg_or_pc (q
->reg
, reg
))
1222 queued_reg_saves
.safe_push (e
);
1225 /* Output all the entries in QUEUED_REG_SAVES. */
1228 dwarf2out_flush_queued_reg_saves (void)
1233 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1236 struct cfa_reg sreg
;
1238 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1240 if (q
->reg
== pc_rtx
)
1241 reg
= DWARF_FRAME_RETURN_COLUMN
;
1243 reg
= dwf_regno (q
->reg
);
1245 sreg
= dwf_cfa_reg (q
->saved_reg
);
1247 sreg
.set_by_dwreg (INVALID_REGNUM
);
1248 reg_save (reg
, sreg
, q
->cfa_offset
);
1251 queued_reg_saves
.truncate (0);
1254 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1255 location for? Or, does it clobber a register which we've previously
1256 said that some other register is saved in, and for which we now
1257 have a new location for? */
1260 clobbers_queued_reg_save (const_rtx insn
)
1265 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1268 reg_saved_in_data
*rir
;
1270 if (modified_in_p (q
->reg
, insn
))
1273 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1274 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1275 && modified_in_p (rir
->saved_in_reg
, insn
))
1282 /* What register, if any, is currently saved in REG? */
1285 reg_saved_in (rtx reg
)
1287 unsigned int regn
= REGNO (reg
);
1289 reg_saved_in_data
*rir
;
1292 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1293 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1296 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1297 if (regn
== REGNO (rir
->saved_in_reg
))
1298 return rir
->orig_reg
;
1303 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1306 dwarf2out_frame_debug_def_cfa (rtx pat
)
1308 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1310 pat
= strip_offset (pat
, &cur_cfa
->offset
);
1313 cur_cfa
->indirect
= 1;
1314 pat
= strip_offset (XEXP (pat
, 0), &cur_cfa
->base_offset
);
1316 /* ??? If this fails, we could be calling into the _loc functions to
1317 define a full expression. So far no port does that. */
1318 gcc_assert (REG_P (pat
));
1319 cur_cfa
->reg
= dwf_cfa_reg (pat
);
1322 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1325 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1329 gcc_assert (GET_CODE (pat
) == SET
);
1330 dest
= XEXP (pat
, 0);
1331 src
= XEXP (pat
, 1);
1333 switch (GET_CODE (src
))
1336 gcc_assert (cur_cfa
->reg
== XEXP (src
, 0));
1337 cur_cfa
->offset
-= rtx_to_poly_int64 (XEXP (src
, 1));
1347 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1348 gcc_assert (cur_cfa
->indirect
== 0);
1351 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1354 dwarf2out_frame_debug_cfa_offset (rtx set
)
1357 rtx src
, addr
, span
;
1358 unsigned int sregno
;
1360 src
= XEXP (set
, 1);
1361 addr
= XEXP (set
, 0);
1362 gcc_assert (MEM_P (addr
));
1363 addr
= XEXP (addr
, 0);
1365 /* As documented, only consider extremely simple addresses. */
1366 switch (GET_CODE (addr
))
1369 gcc_assert (cur_cfa
->reg
== addr
);
1370 offset
= -cur_cfa
->offset
;
1373 gcc_assert (cur_cfa
->reg
== XEXP (addr
, 0));
1374 offset
= rtx_to_poly_int64 (XEXP (addr
, 1)) - cur_cfa
->offset
;
1383 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1387 span
= targetm
.dwarf_register_span (src
);
1388 sregno
= dwf_regno (src
);
1391 /* ??? We'd like to use queue_reg_save, but we need to come up with
1392 a different flushing heuristic for epilogues. */
1393 struct cfa_reg invalid
;
1394 invalid
.set_by_dwreg (INVALID_REGNUM
);
1396 reg_save (sregno
, invalid
, offset
);
1399 /* We have a PARALLEL describing where the contents of SRC live.
1400 Adjust the offset for each piece of the PARALLEL. */
1401 poly_int64 span_offset
= offset
;
1403 gcc_assert (GET_CODE (span
) == PARALLEL
);
1405 const int par_len
= XVECLEN (span
, 0);
1406 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1408 rtx elem
= XVECEXP (span
, 0, par_index
);
1409 sregno
= dwf_regno (src
);
1410 reg_save (sregno
, invalid
, span_offset
);
1411 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1416 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1419 dwarf2out_frame_debug_cfa_register (rtx set
)
1423 struct cfa_reg dregno
;
1425 src
= XEXP (set
, 1);
1426 dest
= XEXP (set
, 0);
1428 record_reg_saved_in_reg (dest
, src
);
1430 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1432 sregno
= dwf_regno (src
);
1434 dregno
= dwf_cfa_reg (dest
);
1436 /* ??? We'd like to use queue_reg_save, but we need to come up with
1437 a different flushing heuristic for epilogues. */
1438 reg_save (sregno
, dregno
, 0);
1441 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1444 dwarf2out_frame_debug_cfa_expression (rtx set
)
1446 rtx src
, dest
, span
;
1447 dw_cfi_ref cfi
= new_cfi ();
1450 dest
= SET_DEST (set
);
1451 src
= SET_SRC (set
);
1453 gcc_assert (REG_P (src
));
1454 gcc_assert (MEM_P (dest
));
1456 span
= targetm
.dwarf_register_span (src
);
1459 regno
= dwf_regno (src
);
1461 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1462 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1463 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1464 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1465 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1467 /* ??? We'd like to use queue_reg_save, were the interface different,
1468 and, as above, we could manage flushing for epilogues. */
1470 update_row_reg_save (cur_row
, regno
, cfi
);
1473 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
1477 dwarf2out_frame_debug_cfa_val_expression (rtx set
)
1479 rtx dest
= SET_DEST (set
);
1480 gcc_assert (REG_P (dest
));
1482 rtx span
= targetm
.dwarf_register_span (dest
);
1485 rtx src
= SET_SRC (set
);
1486 dw_cfi_ref cfi
= new_cfi ();
1487 cfi
->dw_cfi_opc
= DW_CFA_val_expression
;
1488 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= dwf_regno (dest
);
1489 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1490 = mem_loc_descriptor (src
, GET_MODE (src
),
1491 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1493 update_row_reg_save (cur_row
, dwf_regno (dest
), cfi
);
1496 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1499 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1501 gcc_assert (REG_P (reg
));
1503 rtx span
= targetm
.dwarf_register_span (reg
);
1506 unsigned int regno
= dwf_regno (reg
);
1507 add_cfi_restore (regno
);
1508 update_row_reg_save (cur_row
, regno
, NULL
);
1512 /* We have a PARALLEL describing where the contents of REG live.
1513 Restore the register for each piece of the PARALLEL. */
1514 gcc_assert (GET_CODE (span
) == PARALLEL
);
1516 const int par_len
= XVECLEN (span
, 0);
1517 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1519 reg
= XVECEXP (span
, 0, par_index
);
1520 gcc_assert (REG_P (reg
));
1521 unsigned int regno
= dwf_regno (reg
);
1522 add_cfi_restore (regno
);
1523 update_row_reg_save (cur_row
, regno
, NULL
);
1528 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1530 ??? Perhaps we should note in the CIE where windows are saved (instead
1531 of assuming 0(cfa)) and what registers are in the window. */
1534 dwarf2out_frame_debug_cfa_window_save (void)
1536 dw_cfi_ref cfi
= new_cfi ();
1538 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1540 cur_row
->window_save
= true;
1543 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_TOGGLE_RA_MANGLE.
1544 Note: DW_CFA_GNU_window_save dwarf opcode is reused for toggling RA mangle
1545 state, this is a target specific operation on AArch64 and can only be used
1546 on other targets if they don't use the window save operation otherwise. */
1549 dwarf2out_frame_debug_cfa_toggle_ra_mangle (void)
1551 dw_cfi_ref cfi
= new_cfi ();
1553 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1555 cur_row
->ra_mangled
= !cur_row
->ra_mangled
;
1558 /* Record call frame debugging information for an expression EXPR,
1559 which either sets SP or FP (adjusting how we calculate the frame
1560 address) or saves a register to the stack or another register.
1561 LABEL indicates the address of EXPR.
1563 This function encodes a state machine mapping rtxes to actions on
1564 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1565 users need not read the source code.
1567 The High-Level Picture
1569 Changes in the register we use to calculate the CFA: Currently we
1570 assume that if you copy the CFA register into another register, we
1571 should take the other one as the new CFA register; this seems to
1572 work pretty well. If it's wrong for some target, it's simple
1573 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1575 Changes in the register we use for saving registers to the stack:
1576 This is usually SP, but not always. Again, we deduce that if you
1577 copy SP into another register (and SP is not the CFA register),
1578 then the new register is the one we will be using for register
1579 saves. This also seems to work.
1581 Register saves: There's not much guesswork about this one; if
1582 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1583 register save, and the register used to calculate the destination
1584 had better be the one we think we're using for this purpose.
1585 It's also assumed that a copy from a call-saved register to another
1586 register is saving that register if RTX_FRAME_RELATED_P is set on
1587 that instruction. If the copy is from a call-saved register to
1588 the *same* register, that means that the register is now the same
1589 value as in the caller.
1591 Except: If the register being saved is the CFA register, and the
1592 offset is nonzero, we are saving the CFA, so we assume we have to
1593 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1594 the intent is to save the value of SP from the previous frame.
1596 In addition, if a register has previously been saved to a different
1599 Invariants / Summaries of Rules
1601 cfa current rule for calculating the CFA. It usually
1602 consists of a register and an offset. This is
1603 actually stored in *cur_cfa, but abbreviated
1604 for the purposes of this documentation.
1605 cfa_store register used by prologue code to save things to the stack
1606 cfa_store.offset is the offset from the value of
1607 cfa_store.reg to the actual CFA
1608 cfa_temp register holding an integral value. cfa_temp.offset
1609 stores the value, which will be used to adjust the
1610 stack pointer. cfa_temp is also used like cfa_store,
1611 to track stores to the stack via fp or a temp reg.
1613 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1614 with cfa.reg as the first operand changes the cfa.reg and its
1615 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1618 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1619 expression yielding a constant. This sets cfa_temp.reg
1620 and cfa_temp.offset.
1622 Rule 5: Create a new register cfa_store used to save items to the
1625 Rules 10-14: Save a register to the stack. Define offset as the
1626 difference of the original location and cfa_store's
1627 location (or cfa_temp's location if cfa_temp is used).
1629 Rules 16-20: If AND operation happens on sp in prologue, we assume
1630 stack is realigned. We will use a group of DW_OP_XXX
1631 expressions to represent the location of the stored
1632 register instead of CFA+offset.
1636 "{a,b}" indicates a choice of a xor b.
1637 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1640 (set <reg1> <reg2>:cfa.reg)
1641 effects: cfa.reg = <reg1>
1642 cfa.offset unchanged
1643 cfa_temp.reg = <reg1>
1644 cfa_temp.offset = cfa.offset
1647 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1648 {<const_int>,<reg>:cfa_temp.reg}))
1649 effects: cfa.reg = sp if fp used
1650 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1651 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1652 if cfa_store.reg==sp
1655 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1656 effects: cfa.reg = fp
1657 cfa_offset += +/- <const_int>
1660 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1661 constraints: <reg1> != fp
1663 effects: cfa.reg = <reg1>
1664 cfa_temp.reg = <reg1>
1665 cfa_temp.offset = cfa.offset
1668 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1669 constraints: <reg1> != fp
1671 effects: cfa_store.reg = <reg1>
1672 cfa_store.offset = cfa.offset - cfa_temp.offset
1675 (set <reg> <const_int>)
1676 effects: cfa_temp.reg = <reg>
1677 cfa_temp.offset = <const_int>
1680 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1681 effects: cfa_temp.reg = <reg1>
1682 cfa_temp.offset |= <const_int>
1685 (set <reg> (high <exp>))
1689 (set <reg> (lo_sum <exp> <const_int>))
1690 effects: cfa_temp.reg = <reg>
1691 cfa_temp.offset = <const_int>
1694 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1695 effects: cfa_store.offset -= <const_int>
1696 cfa.offset = cfa_store.offset if cfa.reg == sp
1698 cfa.base_offset = -cfa_store.offset
1701 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1702 effects: cfa_store.offset += -/+ mode_size(mem)
1703 cfa.offset = cfa_store.offset if cfa.reg == sp
1705 cfa.base_offset = -cfa_store.offset
1708 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1711 effects: cfa.reg = <reg1>
1712 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1715 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1716 effects: cfa.reg = <reg1>
1717 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1720 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1721 effects: cfa.reg = <reg1>
1722 cfa.base_offset = -cfa_temp.offset
1723 cfa_temp.offset -= mode_size(mem)
1726 (set <reg> {unspec, unspec_volatile})
1727 effects: target-dependent
1730 (set sp (and: sp <const_int>))
1731 constraints: cfa_store.reg == sp
1732 effects: cfun->fde.stack_realign = 1
1733 cfa_store.offset = 0
1734 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1737 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1738 effects: cfa_store.offset += -/+ mode_size(mem)
1741 (set (mem ({pre_inc, pre_dec} sp)) fp)
1742 constraints: fde->stack_realign == 1
1743 effects: cfa_store.offset = 0
1744 cfa.reg != HARD_FRAME_POINTER_REGNUM
1747 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1748 constraints: fde->stack_realign == 1
1750 && cfa.indirect == 0
1751 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1752 effects: Use DW_CFA_def_cfa_expression to define cfa
1753 cfa.reg == fde->drap_reg */
1756 dwarf2out_frame_debug_expr (rtx expr
)
1758 rtx src
, dest
, span
;
1762 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1763 the PARALLEL independently. The first element is always processed if
1764 it is a SET. This is for backward compatibility. Other elements
1765 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1766 flag is set in them. */
1767 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1770 int limit
= XVECLEN (expr
, 0);
1773 /* PARALLELs have strict read-modify-write semantics, so we
1774 ought to evaluate every rvalue before changing any lvalue.
1775 It's cumbersome to do that in general, but there's an
1776 easy approximation that is enough for all current users:
1777 handle register saves before register assignments. */
1778 if (GET_CODE (expr
) == PARALLEL
)
1779 for (par_index
= 0; par_index
< limit
; par_index
++)
1781 elem
= XVECEXP (expr
, 0, par_index
);
1782 if (GET_CODE (elem
) == SET
1783 && MEM_P (SET_DEST (elem
))
1784 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1785 dwarf2out_frame_debug_expr (elem
);
1788 for (par_index
= 0; par_index
< limit
; par_index
++)
1790 elem
= XVECEXP (expr
, 0, par_index
);
1791 if (GET_CODE (elem
) == SET
1792 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1793 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1794 dwarf2out_frame_debug_expr (elem
);
1799 gcc_assert (GET_CODE (expr
) == SET
);
1801 src
= SET_SRC (expr
);
1802 dest
= SET_DEST (expr
);
1806 rtx rsi
= reg_saved_in (src
);
1813 switch (GET_CODE (dest
))
1816 switch (GET_CODE (src
))
1818 /* Setting FP from SP. */
1820 if (cur_cfa
->reg
== src
)
1823 /* Update the CFA rule wrt SP or FP. Make sure src is
1824 relative to the current CFA register.
1826 We used to require that dest be either SP or FP, but the
1827 ARM copies SP to a temporary register, and from there to
1828 FP. So we just rely on the backends to only set
1829 RTX_FRAME_RELATED_P on appropriate insns. */
1830 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1831 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1832 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1836 /* Saving a register in a register. */
1837 gcc_assert (!fixed_regs
[REGNO (dest
)]
1838 /* For the SPARC and its register window. */
1839 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1841 /* After stack is aligned, we can only save SP in FP
1842 if drap register is used. In this case, we have
1843 to restore stack pointer with the CFA value and we
1844 don't generate this DWARF information. */
1846 && fde
->stack_realign
1847 && REGNO (src
) == STACK_POINTER_REGNUM
)
1849 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1850 && fde
->drap_reg
!= INVALID_REGNUM
1851 && cur_cfa
->reg
!= src
1854 /* The save of hard frame pointer has been deferred
1855 until this point when Rule 18 applied. Emit it now. */
1856 queue_reg_save (dest
, NULL_RTX
, 0);
1857 /* And as the instruction modifies the hard frame pointer,
1858 flush the queue as well. */
1859 dwarf2out_flush_queued_reg_saves ();
1862 queue_reg_save (src
, dest
, 0);
1869 if (dest
== stack_pointer_rtx
)
1873 if (REG_P (XEXP (src
, 1)))
1875 gcc_assert (cur_trace
->cfa_temp
.reg
== XEXP (src
, 1));
1876 offset
= cur_trace
->cfa_temp
.offset
;
1878 else if (!poly_int_rtx_p (XEXP (src
, 1), &offset
))
1881 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1883 /* Restoring SP from FP in the epilogue. */
1884 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1885 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1887 else if (GET_CODE (src
) == LO_SUM
)
1888 /* Assume we've set the source reg of the LO_SUM from sp. */
1891 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1893 if (GET_CODE (src
) != MINUS
)
1895 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1896 cur_cfa
->offset
+= offset
;
1897 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1898 cur_trace
->cfa_store
.offset
+= offset
;
1900 else if (dest
== hard_frame_pointer_rtx
)
1903 /* Either setting the FP from an offset of the SP,
1904 or adjusting the FP */
1905 gcc_assert (frame_pointer_needed
);
1907 gcc_assert (REG_P (XEXP (src
, 0))
1908 && cur_cfa
->reg
== XEXP (src
, 0));
1909 offset
= rtx_to_poly_int64 (XEXP (src
, 1));
1910 if (GET_CODE (src
) != MINUS
)
1912 cur_cfa
->offset
+= offset
;
1913 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1917 gcc_assert (GET_CODE (src
) != MINUS
);
1920 if (REG_P (XEXP (src
, 0))
1921 && cur_cfa
->reg
== XEXP (src
, 0)
1922 && poly_int_rtx_p (XEXP (src
, 1), &offset
))
1924 /* Setting a temporary CFA register that will be copied
1925 into the FP later on. */
1927 cur_cfa
->offset
+= offset
;
1928 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1929 /* Or used to save regs to the stack. */
1930 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1931 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1935 else if (REG_P (XEXP (src
, 0))
1936 && cur_trace
->cfa_temp
.reg
== XEXP (src
, 0)
1937 && XEXP (src
, 1) == stack_pointer_rtx
)
1939 /* Setting a scratch register that we will use instead
1940 of SP for saving registers to the stack. */
1941 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1942 cur_trace
->cfa_store
.reg
= dwf_cfa_reg (dest
);
1943 cur_trace
->cfa_store
.offset
1944 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1948 else if (GET_CODE (src
) == LO_SUM
1949 && poly_int_rtx_p (XEXP (src
, 1),
1950 &cur_trace
->cfa_temp
.offset
))
1951 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1959 case CONST_POLY_INT
:
1960 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1961 cur_trace
->cfa_temp
.offset
= rtx_to_poly_int64 (src
);
1966 gcc_assert (REG_P (XEXP (src
, 0))
1967 && cur_trace
->cfa_temp
.reg
== XEXP (src
, 0)
1968 && CONST_INT_P (XEXP (src
, 1)));
1970 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1971 if (!can_ior_p (cur_trace
->cfa_temp
.offset
, INTVAL (XEXP (src
, 1)),
1972 &cur_trace
->cfa_temp
.offset
))
1973 /* The target shouldn't generate this kind of CFI note if we
1974 can't represent it. */
1978 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1979 which will fill in all of the bits. */
1986 case UNSPEC_VOLATILE
:
1987 /* All unspecs should be represented by REG_CFA_* notes. */
1993 /* If this AND operation happens on stack pointer in prologue,
1994 we assume the stack is realigned and we extract the
1996 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1998 /* We interpret reg_save differently with stack_realign set.
1999 Thus we must flush whatever we have queued first. */
2000 dwarf2out_flush_queued_reg_saves ();
2002 gcc_assert (cur_trace
->cfa_store
.reg
2004 fde
->stack_realign
= 1;
2005 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
2006 cur_trace
->cfa_store
.offset
= 0;
2008 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
2009 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
2011 gcc_assert (cur_cfa
->reg
.span
== 1);
2012 fde
->drap_reg
= cur_cfa
->reg
.reg
;
2024 /* Saving a register to the stack. Make sure dest is relative to the
2026 switch (GET_CODE (XEXP (dest
, 0)))
2032 /* We can't handle variable size modifications. */
2033 offset
= -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
2035 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
2036 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
2038 cur_trace
->cfa_store
.offset
+= offset
;
2039 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
2040 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
2042 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
2043 offset
-= cur_trace
->cfa_store
.offset
;
2045 offset
= -cur_trace
->cfa_store
.offset
;
2052 offset
= GET_MODE_SIZE (GET_MODE (dest
));
2053 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
2056 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
2057 == STACK_POINTER_REGNUM
)
2058 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
2060 cur_trace
->cfa_store
.offset
+= offset
;
2062 /* Rule 18: If stack is aligned, we will use FP as a
2063 reference to represent the address of the stored
2066 && fde
->stack_realign
2068 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
2070 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
2071 cur_trace
->cfa_store
.offset
= 0;
2075 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
2076 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
2078 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
2079 offset
+= -cur_trace
->cfa_store
.offset
;
2081 offset
= -cur_trace
->cfa_store
.offset
;
2085 /* With an offset. */
2090 struct cfa_reg regno
;
2092 gcc_assert (REG_P (XEXP (XEXP (dest
, 0), 0)));
2093 offset
= rtx_to_poly_int64 (XEXP (XEXP (dest
, 0), 1));
2094 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
2097 regno
= dwf_cfa_reg (XEXP (XEXP (dest
, 0), 0));
2099 if (cur_cfa
->reg
== regno
)
2100 offset
-= cur_cfa
->offset
;
2101 else if (cur_trace
->cfa_store
.reg
== regno
)
2102 offset
-= cur_trace
->cfa_store
.offset
;
2105 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
2106 offset
-= cur_trace
->cfa_temp
.offset
;
2112 /* Without an offset. */
2115 struct cfa_reg regno
= dwf_cfa_reg (XEXP (dest
, 0));
2117 if (cur_cfa
->reg
== regno
)
2118 offset
= -cur_cfa
->offset
;
2119 else if (cur_trace
->cfa_store
.reg
== regno
)
2120 offset
= -cur_trace
->cfa_store
.offset
;
2123 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
2124 offset
= -cur_trace
->cfa_temp
.offset
;
2131 gcc_assert (cur_trace
->cfa_temp
.reg
== XEXP (XEXP (dest
, 0), 0));
2132 offset
= -cur_trace
->cfa_temp
.offset
;
2133 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
2141 /* If the source operand of this MEM operation is a memory,
2142 we only care how much stack grew. */
2147 && REGNO (src
) != STACK_POINTER_REGNUM
2148 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
2149 && cur_cfa
->reg
== src
)
2151 /* We're storing the current CFA reg into the stack. */
2153 if (known_eq (cur_cfa
->offset
, 0))
2156 /* If stack is aligned, putting CFA reg into stack means
2157 we can no longer use reg + offset to represent CFA.
2158 Here we use DW_CFA_def_cfa_expression instead. The
2159 result of this expression equals to the original CFA
2162 && fde
->stack_realign
2163 && cur_cfa
->indirect
== 0
2164 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
2166 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
.reg
);
2168 cur_cfa
->indirect
= 1;
2169 cur_cfa
->reg
= dw_frame_pointer_regnum
;
2170 cur_cfa
->base_offset
= offset
;
2171 cur_cfa
->offset
= 0;
2173 fde
->drap_reg_saved
= 1;
2177 /* If the source register is exactly the CFA, assume
2178 we're saving SP like any other register; this happens
2180 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
2185 /* Otherwise, we'll need to look in the stack to
2186 calculate the CFA. */
2187 rtx x
= XEXP (dest
, 0);
2191 gcc_assert (REG_P (x
));
2193 cur_cfa
->reg
= dwf_cfa_reg (x
);
2194 cur_cfa
->base_offset
= offset
;
2195 cur_cfa
->indirect
= 1;
2201 span
= targetm
.dwarf_register_span (src
);
2208 /* Just verify the hard frame pointer save when doing dynamic
2209 realignment uses expected offset. The actual queue_reg_save
2210 needs to be deferred until the instruction that sets
2211 hard frame pointer to stack pointer, see PR99334 for
2213 gcc_assert (known_eq (offset
, 0));
2215 queue_reg_save (src
, NULL_RTX
, offset
);
2219 /* We have a PARALLEL describing where the contents of SRC live.
2220 Queue register saves for each piece of the PARALLEL. */
2221 poly_int64 span_offset
= offset
;
2223 gcc_assert (GET_CODE (span
) == PARALLEL
);
2225 const int par_len
= XVECLEN (span
, 0);
2226 for (int par_index
= 0; par_index
< par_len
; par_index
++)
2228 rtx elem
= XVECEXP (span
, 0, par_index
);
2229 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2230 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2240 /* Record call frame debugging information for INSN, which either sets
2241 SP or FP (adjusting how we calculate the frame address) or saves a
2242 register to the stack. */
2245 dwarf2out_frame_debug (rtx_insn
*insn
)
2248 bool handled_one
= false;
2250 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2251 switch (REG_NOTE_KIND (note
))
2253 case REG_FRAME_RELATED_EXPR
:
2254 pat
= XEXP (note
, 0);
2257 case REG_CFA_DEF_CFA
:
2258 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2262 case REG_CFA_ADJUST_CFA
:
2267 if (GET_CODE (n
) == PARALLEL
)
2268 n
= XVECEXP (n
, 0, 0);
2270 dwarf2out_frame_debug_adjust_cfa (n
);
2274 case REG_CFA_OFFSET
:
2277 n
= single_set (insn
);
2278 dwarf2out_frame_debug_cfa_offset (n
);
2282 case REG_CFA_REGISTER
:
2287 if (GET_CODE (n
) == PARALLEL
)
2288 n
= XVECEXP (n
, 0, 0);
2290 dwarf2out_frame_debug_cfa_register (n
);
2294 case REG_CFA_EXPRESSION
:
2295 case REG_CFA_VAL_EXPRESSION
:
2298 n
= single_set (insn
);
2300 if (REG_NOTE_KIND (note
) == REG_CFA_EXPRESSION
)
2301 dwarf2out_frame_debug_cfa_expression (n
);
2303 dwarf2out_frame_debug_cfa_val_expression (n
);
2308 case REG_CFA_RESTORE
:
2313 if (GET_CODE (n
) == PARALLEL
)
2314 n
= XVECEXP (n
, 0, 0);
2317 dwarf2out_frame_debug_cfa_restore (n
);
2321 case REG_CFA_SET_VDRAP
:
2325 dw_fde_ref fde
= cfun
->fde
;
2328 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2330 fde
->vdrap_reg
= dwf_regno (n
);
2336 case REG_CFA_TOGGLE_RA_MANGLE
:
2337 dwarf2out_frame_debug_cfa_toggle_ra_mangle ();
2341 case REG_CFA_WINDOW_SAVE
:
2342 dwarf2out_frame_debug_cfa_window_save ();
2346 case REG_CFA_FLUSH_QUEUE
:
2347 /* The actual flush happens elsewhere. */
2357 pat
= PATTERN (insn
);
2359 dwarf2out_frame_debug_expr (pat
);
2361 /* Check again. A parallel can save and update the same register.
2362 We could probably check just once, here, but this is safer than
2363 removing the check at the start of the function. */
2364 if (clobbers_queued_reg_save (pat
))
2365 dwarf2out_flush_queued_reg_saves ();
2369 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2372 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2374 size_t i
, n_old
, n_new
, n_max
;
2377 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2378 add_cfi (new_row
->cfa_cfi
);
2381 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2386 n_old
= vec_safe_length (old_row
->reg_save
);
2387 n_new
= vec_safe_length (new_row
->reg_save
);
2388 n_max
= MAX (n_old
, n_new
);
2390 for (i
= 0; i
< n_max
; ++i
)
2392 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2395 r_old
= (*old_row
->reg_save
)[i
];
2397 r_new
= (*new_row
->reg_save
)[i
];
2401 else if (r_new
== NULL
)
2402 add_cfi_restore (i
);
2403 else if (!cfi_equal_p (r_old
, r_new
))
2407 if (!old_row
->window_save
&& new_row
->window_save
)
2409 dw_cfi_ref cfi
= new_cfi ();
2411 gcc_assert (!old_row
->ra_mangled
&& !new_row
->ra_mangled
);
2412 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
2416 if (old_row
->ra_mangled
!= new_row
->ra_mangled
)
2418 dw_cfi_ref cfi
= new_cfi ();
2420 gcc_assert (!old_row
->window_save
&& !new_row
->window_save
);
2421 /* DW_CFA_GNU_window_save is reused for toggling RA mangle state. */
2422 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
2427 /* Examine CFI and return true if a cfi label and set_loc is needed
2428 beforehand. Even when generating CFI assembler instructions, we
2429 still have to add the cfi to the list so that lookup_cfa_1 works
2430 later on. When -g2 and above we even need to force emitting of
2431 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2432 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2433 and so don't use convert_cfa_to_fb_loc_list. */
2436 cfi_label_required_p (dw_cfi_ref cfi
)
2438 if (!dwarf2out_do_cfi_asm ())
2441 if (dwarf_version
== 2
2442 && debug_info_level
> DINFO_LEVEL_TERSE
2443 && dwarf_debuginfo_p ())
2445 switch (cfi
->dw_cfi_opc
)
2447 case DW_CFA_def_cfa_offset
:
2448 case DW_CFA_def_cfa_offset_sf
:
2449 case DW_CFA_def_cfa_register
:
2450 case DW_CFA_def_cfa
:
2451 case DW_CFA_def_cfa_sf
:
2452 case DW_CFA_def_cfa_expression
:
2453 case DW_CFA_restore_state
:
2462 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2463 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2466 add_cfis_to_fde (void)
2468 dw_fde_ref fde
= cfun
->fde
;
2469 rtx_insn
*insn
, *next
;
2471 for (insn
= get_insns (); insn
; insn
= next
)
2473 next
= NEXT_INSN (insn
);
2475 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2476 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2478 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2480 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2482 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2484 required
|= cfi_label_required_p (NOTE_CFI (next
));
2485 next
= NEXT_INSN (next
);
2487 else if (active_insn_p (next
)
2488 || (NOTE_P (next
) && (NOTE_KIND (next
)
2489 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2492 next
= NEXT_INSN (next
);
2495 int num
= dwarf2out_cfi_label_num
;
2496 const char *label
= dwarf2out_cfi_label ();
2499 /* Set the location counter to the new label. */
2501 xcfi
->dw_cfi_opc
= DW_CFA_advance_loc4
;
2502 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2503 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2505 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2506 NOTE_LABEL_NUMBER (tmp
) = num
;
2511 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2512 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2513 insn
= NEXT_INSN (insn
);
2515 while (insn
!= next
);
2520 static void dump_cfi_row (FILE *f
, dw_cfi_row
*row
);
2522 /* If LABEL is the start of a trace, then initialize the state of that
2523 trace from CUR_TRACE and CUR_ROW. */
2526 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2530 ti
= get_trace_info (start
);
2531 gcc_assert (ti
!= NULL
);
2535 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2536 cur_trace
->id
, ti
->id
,
2537 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2538 (origin
? INSN_UID (origin
) : 0));
2541 poly_int64 args_size
= cur_trace
->end_true_args_size
;
2542 if (ti
->beg_row
== NULL
)
2544 /* This is the first time we've encountered this trace. Propagate
2545 state across the edge and push the trace onto the work list. */
2546 ti
->beg_row
= copy_cfi_row (cur_row
);
2547 ti
->beg_true_args_size
= args_size
;
2549 ti
->cfa_store
= cur_trace
->cfa_store
;
2550 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2551 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2553 trace_work_list
.safe_push (ti
);
2556 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2561 /* We ought to have the same state incoming to a given trace no
2562 matter how we arrive at the trace. Anything else means we've
2563 got some kind of optimization error. */
2565 if (!cfi_row_equal_p (cur_row
, ti
->beg_row
))
2569 fprintf (dump_file
, "Inconsistent CFI state!\n");
2570 fprintf (dump_file
, "SHOULD have:\n");
2571 dump_cfi_row (dump_file
, ti
->beg_row
);
2572 fprintf (dump_file
, "DO have:\n");
2573 dump_cfi_row (dump_file
, cur_row
);
2580 /* The args_size is allowed to conflict if it isn't actually used. */
2581 if (maybe_ne (ti
->beg_true_args_size
, args_size
))
2582 ti
->args_size_undefined
= true;
2586 /* Similarly, but handle the args_size and CFA reset across EH
2587 and non-local goto edges. */
2590 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2592 poly_int64 save_args_size
, delta
;
2593 dw_cfa_location save_cfa
;
2595 save_args_size
= cur_trace
->end_true_args_size
;
2596 if (known_eq (save_args_size
, 0))
2598 maybe_record_trace_start (start
, origin
);
2602 delta
= -save_args_size
;
2603 cur_trace
->end_true_args_size
= 0;
2605 save_cfa
= cur_row
->cfa
;
2606 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2608 /* Convert a change in args_size (always a positive in the
2609 direction of stack growth) to a change in stack pointer. */
2610 if (!STACK_GROWS_DOWNWARD
)
2613 cur_row
->cfa
.offset
+= delta
;
2616 maybe_record_trace_start (start
, origin
);
2618 cur_trace
->end_true_args_size
= save_args_size
;
2619 cur_row
->cfa
= save_cfa
;
2622 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2623 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2626 create_trace_edges (rtx_insn
*insn
)
2633 rtx_jump_table_data
*table
;
2635 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2638 if (tablejump_p (insn
, NULL
, &table
))
2640 rtvec vec
= table
->get_labels ();
2642 n
= GET_NUM_ELEM (vec
);
2643 for (i
= 0; i
< n
; ++i
)
2645 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2646 maybe_record_trace_start (lab
, insn
);
2649 /* Handle casesi dispatch insns. */
2650 if ((tmp
= tablejump_casesi_pattern (insn
)) != NULL_RTX
)
2652 rtx_insn
* lab
= label_ref_label (XEXP (SET_SRC (tmp
), 2));
2653 maybe_record_trace_start (lab
, insn
);
2656 else if (computed_jump_p (insn
))
2660 FOR_EACH_VEC_SAFE_ELT (forced_labels
, i
, temp
)
2661 maybe_record_trace_start (temp
, insn
);
2663 else if (returnjump_p (insn
))
2665 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2667 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2668 for (i
= 0; i
< n
; ++i
)
2671 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2672 maybe_record_trace_start (lab
, insn
);
2677 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2678 gcc_assert (lab
!= NULL
);
2679 maybe_record_trace_start (lab
, insn
);
2682 else if (CALL_P (insn
))
2684 /* Sibling calls don't have edges inside this function. */
2685 if (SIBLING_CALL_P (insn
))
2688 /* Process non-local goto edges. */
2689 if (can_nonlocal_goto (insn
))
2690 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2693 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2695 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2697 int i
, n
= seq
->len ();
2698 for (i
= 0; i
< n
; ++i
)
2699 create_trace_edges (seq
->insn (i
));
2703 /* Process EH edges. */
2704 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2706 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2708 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2712 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2715 scan_insn_after (rtx_insn
*insn
)
2717 if (RTX_FRAME_RELATED_P (insn
))
2718 dwarf2out_frame_debug (insn
);
2719 notice_args_size (insn
);
2722 /* Scan the trace beginning at INSN and create the CFI notes for the
2723 instructions therein. */
2726 scan_trace (dw_trace_info
*trace
, bool entry
)
2728 rtx_insn
*prev
, *insn
= trace
->head
;
2729 dw_cfa_location this_cfa
;
2732 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2733 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2736 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2737 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2740 cur_row
= trace
->end_row
;
2742 this_cfa
= cur_row
->cfa
;
2743 cur_cfa
= &this_cfa
;
2745 /* If the current function starts with a non-standard incoming frame
2746 sp offset, emit a note before the first instruction. */
2748 && DEFAULT_INCOMING_FRAME_SP_OFFSET
!= INCOMING_FRAME_SP_OFFSET
)
2750 add_cfi_insn
= insn
;
2751 gcc_assert (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_DELETED
);
2752 this_cfa
.offset
= INCOMING_FRAME_SP_OFFSET
;
2753 def_cfa_1 (&this_cfa
);
2756 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2758 prev
= insn
, insn
= NEXT_INSN (insn
))
2762 /* Do everything that happens "before" the insn. */
2763 add_cfi_insn
= prev
;
2765 /* Notice the end of a trace. */
2766 if (BARRIER_P (insn
))
2768 /* Don't bother saving the unneeded queued registers at all. */
2769 queued_reg_saves
.truncate (0);
2772 if (save_point_p (insn
))
2774 /* Propagate across fallthru edges. */
2775 dwarf2out_flush_queued_reg_saves ();
2776 maybe_record_trace_start (insn
, NULL
);
2780 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2783 /* Handle all changes to the row state. Sequences require special
2784 handling for the positioning of the notes. */
2785 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2788 int i
, n
= pat
->len ();
2790 control
= pat
->insn (0);
2791 if (can_throw_internal (control
))
2792 notice_eh_throw (control
);
2793 dwarf2out_flush_queued_reg_saves ();
2795 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2797 /* ??? Hopefully multiple delay slots are not annulled. */
2798 gcc_assert (n
== 2);
2799 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2800 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2802 elt
= pat
->insn (1);
2804 if (INSN_FROM_TARGET_P (elt
))
2806 cfi_vec save_row_reg_save
;
2808 /* If ELT is an instruction from target of an annulled
2809 branch, the effects are for the target only and so
2810 the args_size and CFA along the current path
2811 shouldn't change. */
2812 add_cfi_insn
= NULL
;
2813 poly_int64 restore_args_size
= cur_trace
->end_true_args_size
;
2814 cur_cfa
= &cur_row
->cfa
;
2815 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2817 scan_insn_after (elt
);
2819 /* ??? Should we instead save the entire row state? */
2820 gcc_assert (!queued_reg_saves
.length ());
2822 create_trace_edges (control
);
2824 cur_trace
->end_true_args_size
= restore_args_size
;
2825 cur_row
->cfa
= this_cfa
;
2826 cur_row
->reg_save
= save_row_reg_save
;
2827 cur_cfa
= &this_cfa
;
2831 /* If ELT is a annulled branch-taken instruction (i.e.
2832 executed only when branch is not taken), the args_size
2833 and CFA should not change through the jump. */
2834 create_trace_edges (control
);
2836 /* Update and continue with the trace. */
2837 add_cfi_insn
= insn
;
2838 scan_insn_after (elt
);
2839 def_cfa_1 (&this_cfa
);
2844 /* The insns in the delay slot should all be considered to happen
2845 "before" a call insn. Consider a call with a stack pointer
2846 adjustment in the delay slot. The backtrace from the callee
2847 should include the sp adjustment. Unfortunately, that leaves
2848 us with an unavoidable unwinding error exactly at the call insn
2849 itself. For jump insns we'd prefer to avoid this error by
2850 placing the notes after the sequence. */
2851 if (JUMP_P (control
))
2852 add_cfi_insn
= insn
;
2854 for (i
= 1; i
< n
; ++i
)
2856 elt
= pat
->insn (i
);
2857 scan_insn_after (elt
);
2860 /* Make sure any register saves are visible at the jump target. */
2861 dwarf2out_flush_queued_reg_saves ();
2862 any_cfis_emitted
= false;
2864 /* However, if there is some adjustment on the call itself, e.g.
2865 a call_pop, that action should be considered to happen after
2866 the call returns. */
2867 add_cfi_insn
= insn
;
2868 scan_insn_after (control
);
2872 /* Flush data before calls and jumps, and of course if necessary. */
2873 if (can_throw_internal (insn
))
2875 notice_eh_throw (insn
);
2876 dwarf2out_flush_queued_reg_saves ();
2878 else if (!NONJUMP_INSN_P (insn
)
2879 || clobbers_queued_reg_save (insn
)
2880 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2881 dwarf2out_flush_queued_reg_saves ();
2882 any_cfis_emitted
= false;
2884 add_cfi_insn
= insn
;
2885 scan_insn_after (insn
);
2889 /* Between frame-related-p and args_size we might have otherwise
2890 emitted two cfa adjustments. Do it now. */
2891 def_cfa_1 (&this_cfa
);
2893 /* Minimize the number of advances by emitting the entire queue
2894 once anything is emitted. */
2895 if (any_cfis_emitted
2896 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2897 dwarf2out_flush_queued_reg_saves ();
2899 /* Note that a test for control_flow_insn_p does exactly the
2900 same tests as are done to actually create the edges. So
2901 always call the routine and let it not create edges for
2902 non-control-flow insns. */
2903 create_trace_edges (control
);
2906 gcc_assert (!cfun
->fde
|| !cfun
->fde
->rule18
);
2907 add_cfi_insn
= NULL
;
2913 /* Scan the function and create the initial set of CFI notes. */
2916 create_cfi_notes (void)
2920 gcc_checking_assert (!queued_reg_saves
.exists ());
2921 gcc_checking_assert (!trace_work_list
.exists ());
2923 /* Always begin at the entry trace. */
2924 ti
= &trace_info
[0];
2925 scan_trace (ti
, true);
2927 while (!trace_work_list
.is_empty ())
2929 ti
= trace_work_list
.pop ();
2930 scan_trace (ti
, false);
2933 queued_reg_saves
.release ();
2934 trace_work_list
.release ();
2937 /* Return the insn before the first NOTE_INSN_CFI after START. */
2940 before_next_cfi_note (rtx_insn
*start
)
2942 rtx_insn
*prev
= start
;
2945 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2948 start
= NEXT_INSN (start
);
2953 /* Insert CFI notes between traces to properly change state between them. */
2956 connect_traces (void)
2959 dw_trace_info
*prev_ti
, *ti
;
2961 /* ??? Ideally, we should have both queued and processed every trace.
2962 However the current representation of constant pools on various targets
2963 is indistinguishable from unreachable code. Assume for the moment that
2964 we can simply skip over such traces. */
2965 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2966 these are not "real" instructions, and should not be considered.
2967 This could be generically useful for tablejump data as well. */
2968 /* Remove all unprocessed traces from the list. */
2970 VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info
, ix
, ix2
, ti
, 1,
2971 trace_info
.length (), ti
->beg_row
== NULL
);
2972 FOR_EACH_VEC_ELT (trace_info
, ix
, ti
)
2973 gcc_assert (ti
->end_row
!= NULL
);
2975 /* Work from the end back to the beginning. This lets us easily insert
2976 remember/restore_state notes in the correct order wrt other notes. */
2977 n
= trace_info
.length ();
2978 prev_ti
= &trace_info
[n
- 1];
2979 for (i
= n
- 1; i
> 0; --i
)
2981 dw_cfi_row
*old_row
;
2984 prev_ti
= &trace_info
[i
- 1];
2986 add_cfi_insn
= ti
->head
;
2988 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2989 for the portion of the function in the alternate text
2990 section. The row state at the very beginning of that
2991 new FDE will be exactly the row state from the CIE. */
2992 if (ti
->switch_sections
)
2993 old_row
= cie_cfi_row
;
2996 old_row
= prev_ti
->end_row
;
2997 /* If there's no change from the previous end state, fine. */
2998 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
3000 /* Otherwise check for the common case of sharing state with
3001 the beginning of an epilogue, but not the end. Insert
3002 remember/restore opcodes in that case. */
3003 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
3007 /* Note that if we blindly insert the remember at the
3008 start of the trace, we can wind up increasing the
3009 size of the unwind info due to extra advance opcodes.
3010 Instead, put the remember immediately before the next
3011 state change. We know there must be one, because the
3012 state at the beginning and head of the trace differ. */
3013 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
3015 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
3018 add_cfi_insn
= ti
->head
;
3020 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
3023 /* If the target unwinder does not save the CFA as part of the
3024 register state, we need to restore it separately. */
3025 if (targetm
.asm_out
.should_restore_cfa_state ()
3026 && (cfi
= def_cfa_0 (&old_row
->cfa
, &ti
->beg_row
->cfa
)))
3029 old_row
= prev_ti
->beg_row
;
3031 /* Otherwise, we'll simply change state from the previous end. */
3034 change_cfi_row (old_row
, ti
->beg_row
);
3036 if (dump_file
&& add_cfi_insn
!= ti
->head
)
3040 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
3041 prev_ti
->id
, ti
->id
);
3046 note
= NEXT_INSN (note
);
3047 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
3048 output_cfi_directive (dump_file
, NOTE_CFI (note
));
3050 while (note
!= add_cfi_insn
);
3054 /* Connect args_size between traces that have can_throw_internal insns. */
3055 if (cfun
->eh
->lp_array
)
3057 poly_int64 prev_args_size
= 0;
3059 for (i
= 0; i
< n
; ++i
)
3061 ti
= &trace_info
[i
];
3063 if (ti
->switch_sections
)
3066 if (ti
->eh_head
== NULL
)
3069 /* We require either the incoming args_size values to match or the
3070 presence of an insn setting it before the first EH insn. */
3071 gcc_assert (!ti
->args_size_undefined
|| ti
->args_size_defined_for_eh
);
3073 /* In the latter case, we force the creation of a CFI note. */
3074 if (ti
->args_size_undefined
3075 || maybe_ne (ti
->beg_delay_args_size
, prev_args_size
))
3077 /* ??? Search back to previous CFI note. */
3078 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
3079 add_cfi_args_size (ti
->beg_delay_args_size
);
3082 prev_args_size
= ti
->end_delay_args_size
;
3087 /* Set up the pseudo-cfg of instruction traces, as described at the
3088 block comment at the top of the file. */
3091 create_pseudo_cfg (void)
3093 bool saw_barrier
, switch_sections
;
3098 /* The first trace begins at the start of the function,
3099 and begins with the CIE row state. */
3100 trace_info
.create (16);
3101 memset (&ti
, 0, sizeof (ti
));
3102 ti
.head
= get_insns ();
3103 ti
.beg_row
= cie_cfi_row
;
3104 ti
.cfa_store
= cie_cfi_row
->cfa
;
3105 ti
.cfa_temp
.reg
.set_by_dwreg (INVALID_REGNUM
);
3106 trace_info
.quick_push (ti
);
3108 if (cie_return_save
)
3109 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
3111 /* Walk all the insns, collecting start of trace locations. */
3112 saw_barrier
= false;
3113 switch_sections
= false;
3114 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3116 if (BARRIER_P (insn
))
3118 else if (NOTE_P (insn
)
3119 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
3121 /* We should have just seen a barrier. */
3122 gcc_assert (saw_barrier
);
3123 switch_sections
= true;
3125 /* Watch out for save_point notes between basic blocks.
3126 In particular, a note after a barrier. Do not record these,
3127 delaying trace creation until the label. */
3128 else if (save_point_p (insn
)
3129 && (LABEL_P (insn
) || !saw_barrier
))
3131 memset (&ti
, 0, sizeof (ti
));
3133 ti
.switch_sections
= switch_sections
;
3134 ti
.id
= trace_info
.length ();
3135 trace_info
.safe_push (ti
);
3137 saw_barrier
= false;
3138 switch_sections
= false;
3142 /* Create the trace index after we've finished building trace_info,
3143 avoiding stale pointer problems due to reallocation. */
3145 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
3147 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
3149 dw_trace_info
**slot
;
3152 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
3153 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
3154 tp
->switch_sections
? " (section switch)" : "");
3156 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
3157 gcc_assert (*slot
== NULL
);
3162 /* Record the initial position of the return address. RTL is
3163 INCOMING_RETURN_ADDR_RTX. */
3166 initial_return_save (rtx rtl
)
3169 reg
.set_by_dwreg (INVALID_REGNUM
);
3170 poly_int64 offset
= 0;
3172 switch (GET_CODE (rtl
))
3175 /* RA is in a register. */
3176 reg
= dwf_cfa_reg (rtl
);
3180 /* RA is on the stack. */
3181 rtl
= XEXP (rtl
, 0);
3182 switch (GET_CODE (rtl
))
3185 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
3190 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
3191 offset
= rtx_to_poly_int64 (XEXP (rtl
, 1));
3195 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
3196 offset
= -rtx_to_poly_int64 (XEXP (rtl
, 1));
3206 /* The return address is at some offset from any value we can
3207 actually load. For instance, on the SPARC it is in %i7+8. Just
3208 ignore the offset for now; it doesn't matter for unwinding frames. */
3209 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
3210 initial_return_save (XEXP (rtl
, 0));
3217 if (reg
.reg
!= DWARF_FRAME_RETURN_COLUMN
)
3219 if (reg
.reg
!= INVALID_REGNUM
)
3220 record_reg_saved_in_reg (rtl
, pc_rtx
);
3221 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
3226 create_cie_data (void)
3228 dw_cfa_location loc
;
3229 dw_trace_info cie_trace
;
3231 dw_stack_pointer_regnum
= dwf_cfa_reg (stack_pointer_rtx
);
3233 memset (&cie_trace
, 0, sizeof (cie_trace
));
3234 cur_trace
= &cie_trace
;
3236 add_cfi_vec
= &cie_cfi_vec
;
3237 cie_cfi_row
= cur_row
= new_cfi_row ();
3239 /* On entry, the Canonical Frame Address is at SP. */
3240 memset (&loc
, 0, sizeof (loc
));
3241 loc
.reg
= dw_stack_pointer_regnum
;
3242 /* create_cie_data is called just once per TU, and when using .cfi_startproc
3243 is even done by the assembler rather than the compiler. If the target
3244 has different incoming frame sp offsets depending on what kind of
3245 function it is, use a single constant offset for the target and
3246 if needed, adjust before the first instruction in insn stream. */
3247 loc
.offset
= DEFAULT_INCOMING_FRAME_SP_OFFSET
;
3250 if (targetm
.debug_unwind_info () == UI_DWARF2
3251 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3253 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
3255 /* For a few targets, we have the return address incoming into a
3256 register, but choose a different return column. This will result
3257 in a DW_CFA_register for the return, and an entry in
3258 regs_saved_in_regs to match. If the target later stores that
3259 return address register to the stack, we want to be able to emit
3260 the DW_CFA_offset against the return column, not the intermediate
3261 save register. Save the contents of regs_saved_in_regs so that
3262 we can re-initialize it at the start of each function. */
3263 switch (cie_trace
.regs_saved_in_regs
.length ())
3268 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
3269 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
3270 cie_trace
.regs_saved_in_regs
.release ();
3282 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
3283 state at each location within the function. These notes will be
3284 emitted during pass_final. */
3287 execute_dwarf2_frame (void)
3289 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
3290 dw_frame_pointer_regnum
= dwf_cfa_reg (hard_frame_pointer_rtx
);
3292 /* The first time we're called, compute the incoming frame state. */
3293 if (cie_cfi_vec
== NULL
)
3296 dwarf2out_alloc_current_fde ();
3298 create_pseudo_cfg ();
3301 create_cfi_notes ();
3305 /* Free all the data we allocated. */
3310 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3311 ti
->regs_saved_in_regs
.release ();
3313 trace_info
.release ();
3321 /* Convert a DWARF call frame info. operation to its string name */
3324 dwarf_cfi_name (unsigned int cfi_opc
)
3326 const char *name
= get_DW_CFA_name (cfi_opc
);
3331 return "DW_CFA_<unknown>";
3334 /* This routine will generate the correct assembly data for a location
3335 description based on a cfi entry with a complex address. */
3338 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3340 dw_loc_descr_ref loc
;
3343 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3344 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3347 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3348 dw2_asm_output_data (1, r
, NULL
);
3349 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3352 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3354 /* Output the size of the block. */
3355 size
= size_of_locs (loc
);
3356 dw2_asm_output_data_uleb128 (size
, NULL
);
3358 /* Now output the operations themselves. */
3359 output_loc_sequence (loc
, for_eh
);
3362 /* Similar, but used for .cfi_escape. */
3365 output_cfa_loc_raw (dw_cfi_ref cfi
)
3367 dw_loc_descr_ref loc
;
3370 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3371 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3374 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3375 fprintf (asm_out_file
, "%#x,", r
);
3376 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3379 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3381 /* Output the size of the block. */
3382 size
= size_of_locs (loc
);
3383 dw2_asm_output_data_uleb128_raw (size
);
3384 fputc (',', asm_out_file
);
3386 /* Now output the operations themselves. */
3387 output_loc_sequence_raw (loc
);
3390 /* Output a Call Frame Information opcode and its operand(s). */
3393 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3398 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3399 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3400 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3401 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3402 ((unsigned HOST_WIDE_INT
)
3403 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3404 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3406 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3407 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3408 "DW_CFA_offset, column %#lx", r
);
3409 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3410 dw2_asm_output_data_uleb128 (off
, NULL
);
3412 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3414 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3415 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3416 "DW_CFA_restore, column %#lx", r
);
3420 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3421 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3423 switch (cfi
->dw_cfi_opc
)
3425 case DW_CFA_set_loc
:
3427 dw2_asm_output_encoded_addr_rtx (
3428 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3429 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3432 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3433 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3434 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3437 case DW_CFA_advance_loc1
:
3438 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3439 fde
->dw_fde_current_label
, NULL
);
3440 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3443 case DW_CFA_advance_loc2
:
3444 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3445 fde
->dw_fde_current_label
, NULL
);
3446 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3449 case DW_CFA_advance_loc4
:
3450 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3451 fde
->dw_fde_current_label
, NULL
);
3452 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3455 case DW_CFA_MIPS_advance_loc8
:
3456 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3457 fde
->dw_fde_current_label
, NULL
);
3458 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3461 case DW_CFA_offset_extended
:
3462 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3463 dw2_asm_output_data_uleb128 (r
, NULL
);
3464 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3465 dw2_asm_output_data_uleb128 (off
, NULL
);
3468 case DW_CFA_def_cfa
:
3469 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3470 dw2_asm_output_data_uleb128 (r
, NULL
);
3471 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3474 case DW_CFA_offset_extended_sf
:
3475 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3476 dw2_asm_output_data_uleb128 (r
, NULL
);
3477 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3478 dw2_asm_output_data_sleb128 (off
, NULL
);
3481 case DW_CFA_def_cfa_sf
:
3482 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3483 dw2_asm_output_data_uleb128 (r
, NULL
);
3484 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3485 dw2_asm_output_data_sleb128 (off
, NULL
);
3488 case DW_CFA_restore_extended
:
3489 case DW_CFA_undefined
:
3490 case DW_CFA_same_value
:
3491 case DW_CFA_def_cfa_register
:
3492 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3493 dw2_asm_output_data_uleb128 (r
, NULL
);
3496 case DW_CFA_register
:
3497 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3498 dw2_asm_output_data_uleb128 (r
, NULL
);
3499 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3500 dw2_asm_output_data_uleb128 (r
, NULL
);
3503 case DW_CFA_def_cfa_offset
:
3504 case DW_CFA_GNU_args_size
:
3505 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3508 case DW_CFA_def_cfa_offset_sf
:
3509 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3510 dw2_asm_output_data_sleb128 (off
, NULL
);
3513 case DW_CFA_GNU_window_save
:
3516 case DW_CFA_def_cfa_expression
:
3517 case DW_CFA_expression
:
3518 case DW_CFA_val_expression
:
3519 output_cfa_loc (cfi
, for_eh
);
3522 case DW_CFA_GNU_negative_offset_extended
:
3523 /* Obsoleted by DW_CFA_offset_extended_sf. */
3532 /* Similar, but do it via assembler directives instead. */
3535 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3537 unsigned long r
, r2
;
3539 switch (cfi
->dw_cfi_opc
)
3541 case DW_CFA_advance_loc
:
3542 case DW_CFA_advance_loc1
:
3543 case DW_CFA_advance_loc2
:
3544 case DW_CFA_advance_loc4
:
3545 case DW_CFA_MIPS_advance_loc8
:
3546 case DW_CFA_set_loc
:
3547 /* Should only be created in a code path not followed when emitting
3548 via directives. The assembler is going to take care of this for
3549 us. But this routines is also used for debugging dumps, so
3551 gcc_assert (f
!= asm_out_file
);
3552 fprintf (f
, "\t.cfi_advance_loc\n");
3556 case DW_CFA_offset_extended
:
3557 case DW_CFA_offset_extended_sf
:
3558 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3559 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3560 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3563 case DW_CFA_restore
:
3564 case DW_CFA_restore_extended
:
3565 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3566 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3569 case DW_CFA_undefined
:
3570 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3571 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3574 case DW_CFA_same_value
:
3575 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3576 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3579 case DW_CFA_def_cfa
:
3580 case DW_CFA_def_cfa_sf
:
3581 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3582 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3583 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3586 case DW_CFA_def_cfa_register
:
3587 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3588 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3591 case DW_CFA_register
:
3592 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3593 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3594 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3597 case DW_CFA_def_cfa_offset
:
3598 case DW_CFA_def_cfa_offset_sf
:
3599 fprintf (f
, "\t.cfi_def_cfa_offset "
3600 HOST_WIDE_INT_PRINT_DEC
"\n",
3601 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3604 case DW_CFA_remember_state
:
3605 fprintf (f
, "\t.cfi_remember_state\n");
3607 case DW_CFA_restore_state
:
3608 fprintf (f
, "\t.cfi_restore_state\n");
3611 case DW_CFA_GNU_args_size
:
3612 if (f
== asm_out_file
)
3614 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3615 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3617 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3618 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3623 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3624 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3628 case DW_CFA_GNU_window_save
:
3629 fprintf (f
, "\t.cfi_window_save\n");
3632 case DW_CFA_def_cfa_expression
:
3633 case DW_CFA_expression
:
3634 case DW_CFA_val_expression
:
3635 if (f
!= asm_out_file
)
3637 fprintf (f
, "\t.cfi_%scfa_%sexpression ...\n",
3638 cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
? "def_" : "",
3639 cfi
->dw_cfi_opc
== DW_CFA_val_expression
? "val_" : "");
3642 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3643 output_cfa_loc_raw (cfi
);
3653 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3655 if (dwarf2out_do_cfi_asm ())
3656 output_cfi_directive (asm_out_file
, cfi
);
3660 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3668 dw_cfa_location dummy
;
3669 memset (&dummy
, 0, sizeof (dummy
));
3670 dummy
.reg
.set_by_dwreg (INVALID_REGNUM
);
3671 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3673 output_cfi_directive (f
, cfi
);
3675 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3677 output_cfi_directive (f
, cfi
);
3680 void debug_cfi_row (dw_cfi_row
*row
);
3683 debug_cfi_row (dw_cfi_row
*row
)
3685 dump_cfi_row (stderr
, row
);
3689 /* Save the result of dwarf2out_do_frame across PCH.
3690 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3691 static GTY(()) signed char saved_do_cfi_asm
= 0;
3693 /* Decide whether to emit EH frame unwind information for the current
3694 translation unit. */
3697 dwarf2out_do_eh_frame (void)
3700 (flag_unwind_tables
|| flag_exceptions
)
3701 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
;
3704 /* Decide whether we want to emit frame unwind information for the current
3705 translation unit. */
3708 dwarf2out_do_frame (void)
3710 /* We want to emit correct CFA location expressions or lists, so we
3711 have to return true if we're going to generate debug info, even if
3712 we're not going to output frame or unwind info. */
3713 if (dwarf_debuginfo_p () || dwarf_based_debuginfo_p ())
3716 if (saved_do_cfi_asm
> 0)
3719 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3722 if (dwarf2out_do_eh_frame ())
3728 /* Decide whether to emit frame unwind via assembler directives. */
3731 dwarf2out_do_cfi_asm (void)
3735 if (saved_do_cfi_asm
!= 0)
3736 return saved_do_cfi_asm
> 0;
3738 /* Assume failure for a moment. */
3739 saved_do_cfi_asm
= -1;
3741 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3743 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3746 /* Make sure the personality encoding is one the assembler can support.
3747 In particular, aligned addresses can't be handled. */
3748 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3749 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3751 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3752 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3755 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3756 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3757 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
&& !dwarf2out_do_eh_frame ())
3761 saved_do_cfi_asm
= 1;
3767 const pass_data pass_data_dwarf2_frame
=
3769 RTL_PASS
, /* type */
3770 "dwarf2", /* name */
3771 OPTGROUP_NONE
, /* optinfo_flags */
3772 TV_FINAL
, /* tv_id */
3773 0, /* properties_required */
3774 0, /* properties_provided */
3775 0, /* properties_destroyed */
3776 0, /* todo_flags_start */
3777 0, /* todo_flags_finish */
3780 class pass_dwarf2_frame
: public rtl_opt_pass
3783 pass_dwarf2_frame (gcc::context
*ctxt
)
3784 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3787 /* opt_pass methods: */
3788 virtual bool gate (function
*);
3789 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3791 }; // class pass_dwarf2_frame
3794 pass_dwarf2_frame::gate (function
*)
3796 /* Targets which still implement the prologue in assembler text
3797 cannot use the generic dwarf2 unwinding. */
3798 if (!targetm
.have_prologue ())
3801 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3802 from the optimized shrink-wrapping annotations that we will compute.
3803 For now, only produce the CFI notes for dwarf2. */
3804 return dwarf2out_do_frame ();
3810 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3812 return new pass_dwarf2_frame (ctxt
);
3815 #include "gt-dwarf2cfi.h"