1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "double-int.h"
38 #include "stor-layout.h"
39 #include "hard-reg-set.h"
44 #include "dwarf2out.h"
45 #include "dwarf2asm.h"
47 #include "hash-table.h"
50 #include "common/common-target.h"
51 #include "tree-pass.h"
53 #include "except.h" /* expand_builtin_dwarf_sp_column */
54 #include "expr.h" /* init_return_column_size */
55 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
56 #include "output.h" /* asm_out_file */
57 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
60 /* ??? Poison these here until it can be done generically. They've been
61 totally replaced in this file; make sure it stays that way. */
62 #undef DWARF2_UNWIND_INFO
63 #undef DWARF2_FRAME_INFO
64 #if (GCC_VERSION >= 3000)
65 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
68 #ifndef INCOMING_RETURN_ADDR_RTX
69 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
72 /* Maximum size (in bytes) of an artificially generated label. */
73 #define MAX_ARTIFICIAL_LABEL_BYTES 30
75 /* A collected description of an entire row of the abstract CFI table. */
76 typedef struct GTY(()) dw_cfi_row_struct
78 /* The expression that computes the CFA, expressed in two different ways.
79 The CFA member for the simple cases, and the full CFI expression for
80 the complex cases. The later will be a DW_CFA_cfa_expression. */
84 /* The expressions for any register column that is saved. */
88 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
89 typedef struct GTY(()) reg_saved_in_data_struct
{
95 /* Since we no longer have a proper CFG, we're going to create a facsimile
96 of one on the fly while processing the frame-related insns.
98 We create dw_trace_info structures for each extended basic block beginning
99 and ending at a "save point". Save points are labels, barriers, certain
100 notes, and of course the beginning and end of the function.
102 As we encounter control transfer insns, we propagate the "current"
103 row state across the edges to the starts of traces. When checking is
104 enabled, we validate that we propagate the same data from all sources.
106 All traces are members of the TRACE_INFO array, in the order in which
107 they appear in the instruction stream.
109 All save points are present in the TRACE_INDEX hash, mapping the insn
110 starting a trace to the dw_trace_info describing the trace. */
114 /* The insn that begins the trace. */
117 /* The row state at the beginning and end of the trace. */
118 dw_cfi_row
*beg_row
, *end_row
;
120 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
121 while scanning insns. However, the args_size value is irrelevant at
122 any point except can_throw_internal_p insns. Therefore the "delay"
123 sizes the values that must actually be emitted for this trace. */
124 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
125 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
127 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
130 /* The following variables contain data used in interpreting frame related
131 expressions. These are not part of the "real" row state as defined by
132 Dwarf, but it seems like they need to be propagated into a trace in case
133 frame related expressions have been sunk. */
134 /* ??? This seems fragile. These variables are fragments of a larger
135 expression. If we do not keep the entire expression together, we risk
136 not being able to put it together properly. Consider forcing targets
137 to generate self-contained expressions and dropping all of the magic
138 interpretation code in this file. Or at least refusing to shrink wrap
139 any frame related insn that doesn't contain a complete expression. */
141 /* The register used for saving registers to the stack, and its offset
143 dw_cfa_location cfa_store
;
145 /* A temporary register holding an integral value used in adjusting SP
146 or setting up the store_reg. The "offset" field holds the integer
147 value, not an offset. */
148 dw_cfa_location cfa_temp
;
150 /* A set of registers saved in other registers. This is the inverse of
151 the row->reg_save info, if the entry is a DW_CFA_register. This is
152 implemented as a flat array because it normally contains zero or 1
153 entry, depending on the target. IA-64 is the big spender here, using
154 a maximum of 5 entries. */
155 vec
<reg_saved_in_data
> regs_saved_in_regs
;
157 /* An identifier for this trace. Used only for debugging dumps. */
160 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
161 bool switch_sections
;
163 /* True if we've seen different values incoming to beg_true_args_size. */
164 bool args_size_undefined
;
168 typedef dw_trace_info
*dw_trace_info_ref
;
171 /* Hashtable helpers. */
173 struct trace_info_hasher
: typed_noop_remove
<dw_trace_info
>
175 typedef dw_trace_info value_type
;
176 typedef dw_trace_info compare_type
;
177 static inline hashval_t
hash (const value_type
*);
178 static inline bool equal (const value_type
*, const compare_type
*);
182 trace_info_hasher::hash (const value_type
*ti
)
184 return INSN_UID (ti
->head
);
188 trace_info_hasher::equal (const value_type
*a
, const compare_type
*b
)
190 return a
->head
== b
->head
;
194 /* The variables making up the pseudo-cfg, as described above. */
195 static vec
<dw_trace_info
> trace_info
;
196 static vec
<dw_trace_info_ref
> trace_work_list
;
197 static hash_table
<trace_info_hasher
> *trace_index
;
199 /* A vector of call frame insns for the CIE. */
202 /* The state of the first row of the FDE table, which includes the
203 state provided by the CIE. */
204 static GTY(()) dw_cfi_row
*cie_cfi_row
;
206 static GTY(()) reg_saved_in_data
*cie_return_save
;
208 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
210 /* The insn after which a new CFI note should be emitted. */
211 static rtx add_cfi_insn
;
213 /* When non-null, add_cfi will add the CFI to this vector. */
214 static cfi_vec
*add_cfi_vec
;
216 /* The current instruction trace. */
217 static dw_trace_info
*cur_trace
;
219 /* The current, i.e. most recently generated, row of the CFI table. */
220 static dw_cfi_row
*cur_row
;
222 /* A copy of the current CFA, for use during the processing of a
224 static dw_cfa_location
*cur_cfa
;
226 /* We delay emitting a register save until either (a) we reach the end
227 of the prologue or (b) the register is clobbered. This clusters
228 register saves so that there are fewer pc advances. */
233 HOST_WIDE_INT cfa_offset
;
237 static vec
<queued_reg_save
> queued_reg_saves
;
239 /* True if any CFI directives were emitted at the current insn. */
240 static bool any_cfis_emitted
;
242 /* Short-hand for commonly used register numbers. */
243 static unsigned dw_stack_pointer_regnum
;
244 static unsigned dw_frame_pointer_regnum
;
246 /* Hook used by __throw. */
249 expand_builtin_dwarf_sp_column (void)
251 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
252 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
255 /* MEM is a memory reference for the register size table, each element of
256 which has mode MODE. Initialize column C as a return address column. */
259 init_return_column_size (machine_mode mode
, rtx mem
, unsigned int c
)
261 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
262 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
263 emit_move_insn (adjust_address (mem
, mode
, offset
),
264 gen_int_mode (size
, mode
));
267 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
268 init_one_dwarf_reg_size to communicate on what has been done by the
273 /* Whether the dwarf return column was initialized. */
274 bool wrote_return_column
;
276 /* For each hard register REGNO, whether init_one_dwarf_reg_size
277 was given REGNO to process already. */
278 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
280 } init_one_dwarf_reg_state
;
282 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
283 initialize the dwarf register size table entry corresponding to register
284 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
285 use for the size entry to initialize, and INIT_STATE is the communication
286 datastructure conveying what we're doing to our caller. */
289 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
290 rtx table
, machine_mode slotmode
,
291 init_one_dwarf_reg_state
*init_state
)
293 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
294 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
295 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
297 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
298 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
300 init_state
->processed_regno
[regno
] = true;
302 if (rnum
>= DWARF_FRAME_REGISTERS
)
305 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
307 if (regmode
== VOIDmode
)
309 init_state
->wrote_return_column
= true;
315 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
316 gen_int_mode (regsize
, slotmode
));
319 /* Generate code to initialize the dwarf register size table located
320 at the provided ADDRESS. */
323 expand_builtin_init_dwarf_reg_sizes (tree address
)
326 machine_mode mode
= TYPE_MODE (char_type_node
);
327 rtx addr
= expand_normal (address
);
328 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
330 init_one_dwarf_reg_state init_state
;
332 memset ((char *)&init_state
, 0, sizeof (init_state
));
334 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
336 machine_mode save_mode
;
339 /* No point in processing a register multiple times. This could happen
340 with register spans, e.g. when a reg is first processed as a piece of
341 a span, then as a register on its own later on. */
343 if (init_state
.processed_regno
[i
])
346 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
347 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
350 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
353 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
355 rtx reg
= XVECEXP (span
, 0, si
);
357 init_one_dwarf_reg_size
358 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
363 if (!init_state
.wrote_return_column
)
364 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
366 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
367 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
370 targetm
.init_dwarf_reg_sizes_extra (address
);
374 static dw_trace_info
*
375 get_trace_info (rtx_insn
*insn
)
379 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
383 save_point_p (rtx_insn
*insn
)
385 /* Labels, except those that are really jump tables. */
387 return inside_basic_block_p (insn
);
389 /* We split traces at the prologue/epilogue notes because those
390 are points at which the unwind info is usually stable. This
391 makes it easier to find spots with identical unwind info so
392 that we can use remember/restore_state opcodes. */
394 switch (NOTE_KIND (insn
))
396 case NOTE_INSN_PROLOGUE_END
:
397 case NOTE_INSN_EPILOGUE_BEG
:
404 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
406 static inline HOST_WIDE_INT
407 div_data_align (HOST_WIDE_INT off
)
409 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
410 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
414 /* Return true if we need a signed version of a given opcode
415 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
418 need_data_align_sf_opcode (HOST_WIDE_INT off
)
420 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
423 /* Return a pointer to a newly allocated Call Frame Instruction. */
425 static inline dw_cfi_ref
428 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
430 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
431 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
436 /* Return a newly allocated CFI row, with no defined data. */
441 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
443 row
->cfa
.reg
= INVALID_REGNUM
;
448 /* Return a copy of an existing CFI row. */
451 copy_cfi_row (dw_cfi_row
*src
)
453 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
456 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
461 /* Generate a new label for the CFI info to refer to. */
464 dwarf2out_cfi_label (void)
466 int num
= dwarf2out_cfi_label_num
++;
469 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
471 return xstrdup (label
);
474 /* Add CFI either to the current insn stream or to a vector, or both. */
477 add_cfi (dw_cfi_ref cfi
)
479 any_cfis_emitted
= true;
481 if (add_cfi_insn
!= NULL
)
483 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
484 NOTE_CFI (add_cfi_insn
) = cfi
;
487 if (add_cfi_vec
!= NULL
)
488 vec_safe_push (*add_cfi_vec
, cfi
);
492 add_cfi_args_size (HOST_WIDE_INT size
)
494 dw_cfi_ref cfi
= new_cfi ();
496 /* While we can occasionally have args_size < 0 internally, this state
497 should not persist at a point we actually need an opcode. */
498 gcc_assert (size
>= 0);
500 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
501 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
507 add_cfi_restore (unsigned reg
)
509 dw_cfi_ref cfi
= new_cfi ();
511 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
512 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
517 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
518 that the register column is no longer saved. */
521 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
523 if (vec_safe_length (row
->reg_save
) <= column
)
524 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
525 (*row
->reg_save
)[column
] = cfi
;
528 /* This function fills in aa dw_cfa_location structure from a dwarf location
529 descriptor sequence. */
532 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
534 struct dw_loc_descr_node
*ptr
;
536 cfa
->base_offset
= 0;
540 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
542 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
578 cfa
->reg
= op
- DW_OP_reg0
;
581 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
615 cfa
->reg
= op
- DW_OP_breg0
;
616 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
619 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
620 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
625 case DW_OP_plus_uconst
:
626 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
634 /* Find the previous value for the CFA, iteratively. CFI is the opcode
635 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
636 one level of remember/restore state processing. */
639 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
641 switch (cfi
->dw_cfi_opc
)
643 case DW_CFA_def_cfa_offset
:
644 case DW_CFA_def_cfa_offset_sf
:
645 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
647 case DW_CFA_def_cfa_register
:
648 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
651 case DW_CFA_def_cfa_sf
:
652 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
653 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
655 case DW_CFA_def_cfa_expression
:
656 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
659 case DW_CFA_remember_state
:
660 gcc_assert (!remember
->in_use
);
662 remember
->in_use
= 1;
664 case DW_CFA_restore_state
:
665 gcc_assert (remember
->in_use
);
667 remember
->in_use
= 0;
675 /* Determine if two dw_cfa_location structures define the same data. */
678 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
680 return (loc1
->reg
== loc2
->reg
681 && loc1
->offset
== loc2
->offset
682 && loc1
->indirect
== loc2
->indirect
683 && (loc1
->indirect
== 0
684 || loc1
->base_offset
== loc2
->base_offset
));
687 /* Determine if two CFI operands are identical. */
690 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
694 case dw_cfi_oprnd_unused
:
696 case dw_cfi_oprnd_reg_num
:
697 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
698 case dw_cfi_oprnd_offset
:
699 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
700 case dw_cfi_oprnd_addr
:
701 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
702 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
703 case dw_cfi_oprnd_loc
:
704 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
709 /* Determine if two CFI entries are identical. */
712 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
714 enum dwarf_call_frame_info opc
;
716 /* Make things easier for our callers, including missing operands. */
719 if (a
== NULL
|| b
== NULL
)
722 /* Obviously, the opcodes must match. */
724 if (opc
!= b
->dw_cfi_opc
)
727 /* Compare the two operands, re-using the type of the operands as
728 already exposed elsewhere. */
729 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
730 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
731 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
732 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
735 /* Determine if two CFI_ROW structures are identical. */
738 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
740 size_t i
, n_a
, n_b
, n_max
;
744 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
747 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
750 n_a
= vec_safe_length (a
->reg_save
);
751 n_b
= vec_safe_length (b
->reg_save
);
752 n_max
= MAX (n_a
, n_b
);
754 for (i
= 0; i
< n_max
; ++i
)
756 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
759 r_a
= (*a
->reg_save
)[i
];
761 r_b
= (*b
->reg_save
)[i
];
763 if (!cfi_equal_p (r_a
, r_b
))
770 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
771 what opcode to emit. Returns the CFI opcode to effect the change, or
772 NULL if NEW_CFA == OLD_CFA. */
775 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
779 /* If nothing changed, no need to issue any call frame instructions. */
780 if (cfa_equal_p (old_cfa
, new_cfa
))
785 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
787 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
788 the CFA register did not change but the offset did. The data
789 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
790 in the assembler via the .cfi_def_cfa_offset directive. */
791 if (new_cfa
->offset
< 0)
792 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
794 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
795 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
797 else if (new_cfa
->offset
== old_cfa
->offset
798 && old_cfa
->reg
!= INVALID_REGNUM
799 && !new_cfa
->indirect
800 && !old_cfa
->indirect
)
802 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
803 indicating the CFA register has changed to <register> but the
804 offset has not changed. */
805 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
806 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
808 else if (new_cfa
->indirect
== 0)
810 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
811 indicating the CFA register has changed to <register> with
812 the specified offset. The data factoring for DW_CFA_def_cfa_sf
813 happens in output_cfi, or in the assembler via the .cfi_def_cfa
815 if (new_cfa
->offset
< 0)
816 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
818 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
819 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
820 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
824 /* Construct a DW_CFA_def_cfa_expression instruction to
825 calculate the CFA using a full location expression since no
826 register-offset pair is available. */
827 struct dw_loc_descr_node
*loc_list
;
829 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
830 loc_list
= build_cfa_loc (new_cfa
, 0);
831 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
837 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
840 def_cfa_1 (dw_cfa_location
*new_cfa
)
844 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
845 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
847 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
850 cur_row
->cfa
= *new_cfa
;
851 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
858 /* Add the CFI for saving a register. REG is the CFA column number.
859 If SREG is -1, the register is saved at OFFSET from the CFA;
860 otherwise it is saved in SREG. */
863 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
865 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
866 dw_cfi_ref cfi
= new_cfi ();
868 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
870 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
872 && fde
->stack_realign
873 && sreg
== INVALID_REGNUM
)
875 cfi
->dw_cfi_opc
= DW_CFA_expression
;
876 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
877 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
878 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
879 fde
->stack_realignment
);
881 else if (sreg
== INVALID_REGNUM
)
883 if (need_data_align_sf_opcode (offset
))
884 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
885 else if (reg
& ~0x3f)
886 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
888 cfi
->dw_cfi_opc
= DW_CFA_offset
;
889 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
891 else if (sreg
== reg
)
893 /* While we could emit something like DW_CFA_same_value or
894 DW_CFA_restore, we never expect to see something like that
895 in a prologue. This is more likely to be a bug. A backend
896 can always bypass this by using REG_CFA_RESTORE directly. */
901 cfi
->dw_cfi_opc
= DW_CFA_register
;
902 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
906 update_row_reg_save (cur_row
, reg
, cfi
);
909 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
910 and adjust data structures to match. */
913 notice_args_size (rtx insn
)
915 HOST_WIDE_INT args_size
, delta
;
918 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
922 args_size
= INTVAL (XEXP (note
, 0));
923 delta
= args_size
- cur_trace
->end_true_args_size
;
927 cur_trace
->end_true_args_size
= args_size
;
929 /* If the CFA is computed off the stack pointer, then we must adjust
930 the computation of the CFA as well. */
931 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
933 gcc_assert (!cur_cfa
->indirect
);
935 /* Convert a change in args_size (always a positive in the
936 direction of stack growth) to a change in stack pointer. */
937 #ifndef STACK_GROWS_DOWNWARD
940 cur_cfa
->offset
+= delta
;
944 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
945 data within the trace related to EH insns and args_size. */
948 notice_eh_throw (rtx_insn
*insn
)
950 HOST_WIDE_INT args_size
;
952 args_size
= cur_trace
->end_true_args_size
;
953 if (cur_trace
->eh_head
== NULL
)
955 cur_trace
->eh_head
= insn
;
956 cur_trace
->beg_delay_args_size
= args_size
;
957 cur_trace
->end_delay_args_size
= args_size
;
959 else if (cur_trace
->end_delay_args_size
!= args_size
)
961 cur_trace
->end_delay_args_size
= args_size
;
963 /* ??? If the CFA is the stack pointer, search backward for the last
964 CFI note and insert there. Given that the stack changed for the
965 args_size change, there *must* be such a note in between here and
967 add_cfi_args_size (args_size
);
971 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
972 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
973 used in places where rtl is prohibited. */
975 static inline unsigned
976 dwf_regno (const_rtx reg
)
978 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
979 return DWARF_FRAME_REGNUM (REGNO (reg
));
982 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
985 compare_reg_or_pc (rtx x
, rtx y
)
987 if (REG_P (x
) && REG_P (y
))
988 return REGNO (x
) == REGNO (y
);
992 /* Record SRC as being saved in DEST. DEST may be null to delete an
993 existing entry. SRC may be a register or PC_RTX. */
996 record_reg_saved_in_reg (rtx dest
, rtx src
)
998 reg_saved_in_data
*elt
;
1001 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1002 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1005 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1007 elt
->saved_in_reg
= dest
;
1014 reg_saved_in_data e
= {src
, dest
};
1015 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1018 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1019 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1022 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1025 queued_reg_save e
= {reg
, sreg
, offset
};
1028 /* Duplicates waste space, but it's also necessary to remove them
1029 for correctness, since the queue gets output in reverse order. */
1030 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1031 if (compare_reg_or_pc (q
->reg
, reg
))
1037 queued_reg_saves
.safe_push (e
);
1040 /* Output all the entries in QUEUED_REG_SAVES. */
1043 dwarf2out_flush_queued_reg_saves (void)
1048 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1050 unsigned int reg
, sreg
;
1052 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1054 if (q
->reg
== pc_rtx
)
1055 reg
= DWARF_FRAME_RETURN_COLUMN
;
1057 reg
= dwf_regno (q
->reg
);
1059 sreg
= dwf_regno (q
->saved_reg
);
1061 sreg
= INVALID_REGNUM
;
1062 reg_save (reg
, sreg
, q
->cfa_offset
);
1065 queued_reg_saves
.truncate (0);
1068 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1069 location for? Or, does it clobber a register which we've previously
1070 said that some other register is saved in, and for which we now
1071 have a new location for? */
1074 clobbers_queued_reg_save (const_rtx insn
)
1079 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1082 reg_saved_in_data
*rir
;
1084 if (modified_in_p (q
->reg
, insn
))
1087 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1088 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1089 && modified_in_p (rir
->saved_in_reg
, insn
))
1096 /* What register, if any, is currently saved in REG? */
1099 reg_saved_in (rtx reg
)
1101 unsigned int regn
= REGNO (reg
);
1103 reg_saved_in_data
*rir
;
1106 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1107 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1110 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1111 if (regn
== REGNO (rir
->saved_in_reg
))
1112 return rir
->orig_reg
;
1117 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1120 dwarf2out_frame_debug_def_cfa (rtx pat
)
1122 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1124 if (GET_CODE (pat
) == PLUS
)
1126 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1127 pat
= XEXP (pat
, 0);
1131 cur_cfa
->indirect
= 1;
1132 pat
= XEXP (pat
, 0);
1133 if (GET_CODE (pat
) == PLUS
)
1135 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1136 pat
= XEXP (pat
, 0);
1139 /* ??? If this fails, we could be calling into the _loc functions to
1140 define a full expression. So far no port does that. */
1141 gcc_assert (REG_P (pat
));
1142 cur_cfa
->reg
= dwf_regno (pat
);
1145 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1148 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1152 gcc_assert (GET_CODE (pat
) == SET
);
1153 dest
= XEXP (pat
, 0);
1154 src
= XEXP (pat
, 1);
1156 switch (GET_CODE (src
))
1159 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1160 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1170 cur_cfa
->reg
= dwf_regno (dest
);
1171 gcc_assert (cur_cfa
->indirect
== 0);
1174 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1177 dwarf2out_frame_debug_cfa_offset (rtx set
)
1179 HOST_WIDE_INT offset
;
1180 rtx src
, addr
, span
;
1181 unsigned int sregno
;
1183 src
= XEXP (set
, 1);
1184 addr
= XEXP (set
, 0);
1185 gcc_assert (MEM_P (addr
));
1186 addr
= XEXP (addr
, 0);
1188 /* As documented, only consider extremely simple addresses. */
1189 switch (GET_CODE (addr
))
1192 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1193 offset
= -cur_cfa
->offset
;
1196 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1197 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1206 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1210 span
= targetm
.dwarf_register_span (src
);
1211 sregno
= dwf_regno (src
);
1214 /* ??? We'd like to use queue_reg_save, but we need to come up with
1215 a different flushing heuristic for epilogues. */
1217 reg_save (sregno
, INVALID_REGNUM
, offset
);
1220 /* We have a PARALLEL describing where the contents of SRC live.
1221 Adjust the offset for each piece of the PARALLEL. */
1222 HOST_WIDE_INT span_offset
= offset
;
1224 gcc_assert (GET_CODE (span
) == PARALLEL
);
1226 const int par_len
= XVECLEN (span
, 0);
1227 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1229 rtx elem
= XVECEXP (span
, 0, par_index
);
1230 sregno
= dwf_regno (src
);
1231 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1232 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1237 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1240 dwarf2out_frame_debug_cfa_register (rtx set
)
1243 unsigned sregno
, dregno
;
1245 src
= XEXP (set
, 1);
1246 dest
= XEXP (set
, 0);
1248 record_reg_saved_in_reg (dest
, src
);
1250 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1252 sregno
= dwf_regno (src
);
1254 dregno
= dwf_regno (dest
);
1256 /* ??? We'd like to use queue_reg_save, but we need to come up with
1257 a different flushing heuristic for epilogues. */
1258 reg_save (sregno
, dregno
, 0);
1261 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1264 dwarf2out_frame_debug_cfa_expression (rtx set
)
1266 rtx src
, dest
, span
;
1267 dw_cfi_ref cfi
= new_cfi ();
1270 dest
= SET_DEST (set
);
1271 src
= SET_SRC (set
);
1273 gcc_assert (REG_P (src
));
1274 gcc_assert (MEM_P (dest
));
1276 span
= targetm
.dwarf_register_span (src
);
1279 regno
= dwf_regno (src
);
1281 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1282 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1283 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1284 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1285 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1287 /* ??? We'd like to use queue_reg_save, were the interface different,
1288 and, as above, we could manage flushing for epilogues. */
1290 update_row_reg_save (cur_row
, regno
, cfi
);
1293 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1296 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1298 gcc_assert (REG_P (reg
));
1300 rtx span
= targetm
.dwarf_register_span (reg
);
1303 unsigned int regno
= dwf_regno (reg
);
1304 add_cfi_restore (regno
);
1305 update_row_reg_save (cur_row
, regno
, NULL
);
1309 /* We have a PARALLEL describing where the contents of REG live.
1310 Restore the register for each piece of the PARALLEL. */
1311 gcc_assert (GET_CODE (span
) == PARALLEL
);
1313 const int par_len
= XVECLEN (span
, 0);
1314 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1316 reg
= XVECEXP (span
, 0, par_index
);
1317 gcc_assert (REG_P (reg
));
1318 unsigned int regno
= dwf_regno (reg
);
1319 add_cfi_restore (regno
);
1320 update_row_reg_save (cur_row
, regno
, NULL
);
1325 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1326 ??? Perhaps we should note in the CIE where windows are saved (instead of
1327 assuming 0(cfa)) and what registers are in the window. */
1330 dwarf2out_frame_debug_cfa_window_save (void)
1332 dw_cfi_ref cfi
= new_cfi ();
1334 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1338 /* Record call frame debugging information for an expression EXPR,
1339 which either sets SP or FP (adjusting how we calculate the frame
1340 address) or saves a register to the stack or another register.
1341 LABEL indicates the address of EXPR.
1343 This function encodes a state machine mapping rtxes to actions on
1344 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1345 users need not read the source code.
1347 The High-Level Picture
1349 Changes in the register we use to calculate the CFA: Currently we
1350 assume that if you copy the CFA register into another register, we
1351 should take the other one as the new CFA register; this seems to
1352 work pretty well. If it's wrong for some target, it's simple
1353 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1355 Changes in the register we use for saving registers to the stack:
1356 This is usually SP, but not always. Again, we deduce that if you
1357 copy SP into another register (and SP is not the CFA register),
1358 then the new register is the one we will be using for register
1359 saves. This also seems to work.
1361 Register saves: There's not much guesswork about this one; if
1362 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1363 register save, and the register used to calculate the destination
1364 had better be the one we think we're using for this purpose.
1365 It's also assumed that a copy from a call-saved register to another
1366 register is saving that register if RTX_FRAME_RELATED_P is set on
1367 that instruction. If the copy is from a call-saved register to
1368 the *same* register, that means that the register is now the same
1369 value as in the caller.
1371 Except: If the register being saved is the CFA register, and the
1372 offset is nonzero, we are saving the CFA, so we assume we have to
1373 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1374 the intent is to save the value of SP from the previous frame.
1376 In addition, if a register has previously been saved to a different
1379 Invariants / Summaries of Rules
1381 cfa current rule for calculating the CFA. It usually
1382 consists of a register and an offset. This is
1383 actually stored in *cur_cfa, but abbreviated
1384 for the purposes of this documentation.
1385 cfa_store register used by prologue code to save things to the stack
1386 cfa_store.offset is the offset from the value of
1387 cfa_store.reg to the actual CFA
1388 cfa_temp register holding an integral value. cfa_temp.offset
1389 stores the value, which will be used to adjust the
1390 stack pointer. cfa_temp is also used like cfa_store,
1391 to track stores to the stack via fp or a temp reg.
1393 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1394 with cfa.reg as the first operand changes the cfa.reg and its
1395 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1398 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1399 expression yielding a constant. This sets cfa_temp.reg
1400 and cfa_temp.offset.
1402 Rule 5: Create a new register cfa_store used to save items to the
1405 Rules 10-14: Save a register to the stack. Define offset as the
1406 difference of the original location and cfa_store's
1407 location (or cfa_temp's location if cfa_temp is used).
1409 Rules 16-20: If AND operation happens on sp in prologue, we assume
1410 stack is realigned. We will use a group of DW_OP_XXX
1411 expressions to represent the location of the stored
1412 register instead of CFA+offset.
1416 "{a,b}" indicates a choice of a xor b.
1417 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1420 (set <reg1> <reg2>:cfa.reg)
1421 effects: cfa.reg = <reg1>
1422 cfa.offset unchanged
1423 cfa_temp.reg = <reg1>
1424 cfa_temp.offset = cfa.offset
1427 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1428 {<const_int>,<reg>:cfa_temp.reg}))
1429 effects: cfa.reg = sp if fp used
1430 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1431 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1432 if cfa_store.reg==sp
1435 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1436 effects: cfa.reg = fp
1437 cfa_offset += +/- <const_int>
1440 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1441 constraints: <reg1> != fp
1443 effects: cfa.reg = <reg1>
1444 cfa_temp.reg = <reg1>
1445 cfa_temp.offset = cfa.offset
1448 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1449 constraints: <reg1> != fp
1451 effects: cfa_store.reg = <reg1>
1452 cfa_store.offset = cfa.offset - cfa_temp.offset
1455 (set <reg> <const_int>)
1456 effects: cfa_temp.reg = <reg>
1457 cfa_temp.offset = <const_int>
1460 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1461 effects: cfa_temp.reg = <reg1>
1462 cfa_temp.offset |= <const_int>
1465 (set <reg> (high <exp>))
1469 (set <reg> (lo_sum <exp> <const_int>))
1470 effects: cfa_temp.reg = <reg>
1471 cfa_temp.offset = <const_int>
1474 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1475 effects: cfa_store.offset -= <const_int>
1476 cfa.offset = cfa_store.offset if cfa.reg == sp
1478 cfa.base_offset = -cfa_store.offset
1481 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1482 effects: cfa_store.offset += -/+ mode_size(mem)
1483 cfa.offset = cfa_store.offset if cfa.reg == sp
1485 cfa.base_offset = -cfa_store.offset
1488 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1491 effects: cfa.reg = <reg1>
1492 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1495 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1496 effects: cfa.reg = <reg1>
1497 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1500 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1501 effects: cfa.reg = <reg1>
1502 cfa.base_offset = -cfa_temp.offset
1503 cfa_temp.offset -= mode_size(mem)
1506 (set <reg> {unspec, unspec_volatile})
1507 effects: target-dependent
1510 (set sp (and: sp <const_int>))
1511 constraints: cfa_store.reg == sp
1512 effects: cfun->fde.stack_realign = 1
1513 cfa_store.offset = 0
1514 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1517 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1518 effects: cfa_store.offset += -/+ mode_size(mem)
1521 (set (mem ({pre_inc, pre_dec} sp)) fp)
1522 constraints: fde->stack_realign == 1
1523 effects: cfa_store.offset = 0
1524 cfa.reg != HARD_FRAME_POINTER_REGNUM
1527 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1528 constraints: fde->stack_realign == 1
1530 && cfa.indirect == 0
1531 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1532 effects: Use DW_CFA_def_cfa_expression to define cfa
1533 cfa.reg == fde->drap_reg */
1536 dwarf2out_frame_debug_expr (rtx expr
)
1538 rtx src
, dest
, span
;
1539 HOST_WIDE_INT offset
;
1542 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1543 the PARALLEL independently. The first element is always processed if
1544 it is a SET. This is for backward compatibility. Other elements
1545 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1546 flag is set in them. */
1547 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1550 int limit
= XVECLEN (expr
, 0);
1553 /* PARALLELs have strict read-modify-write semantics, so we
1554 ought to evaluate every rvalue before changing any lvalue.
1555 It's cumbersome to do that in general, but there's an
1556 easy approximation that is enough for all current users:
1557 handle register saves before register assignments. */
1558 if (GET_CODE (expr
) == PARALLEL
)
1559 for (par_index
= 0; par_index
< limit
; par_index
++)
1561 elem
= XVECEXP (expr
, 0, par_index
);
1562 if (GET_CODE (elem
) == SET
1563 && MEM_P (SET_DEST (elem
))
1564 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1565 dwarf2out_frame_debug_expr (elem
);
1568 for (par_index
= 0; par_index
< limit
; par_index
++)
1570 elem
= XVECEXP (expr
, 0, par_index
);
1571 if (GET_CODE (elem
) == SET
1572 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1573 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1574 dwarf2out_frame_debug_expr (elem
);
1579 gcc_assert (GET_CODE (expr
) == SET
);
1581 src
= SET_SRC (expr
);
1582 dest
= SET_DEST (expr
);
1586 rtx rsi
= reg_saved_in (src
);
1593 switch (GET_CODE (dest
))
1596 switch (GET_CODE (src
))
1598 /* Setting FP from SP. */
1600 if (cur_cfa
->reg
== dwf_regno (src
))
1603 /* Update the CFA rule wrt SP or FP. Make sure src is
1604 relative to the current CFA register.
1606 We used to require that dest be either SP or FP, but the
1607 ARM copies SP to a temporary register, and from there to
1608 FP. So we just rely on the backends to only set
1609 RTX_FRAME_RELATED_P on appropriate insns. */
1610 cur_cfa
->reg
= dwf_regno (dest
);
1611 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1612 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1616 /* Saving a register in a register. */
1617 gcc_assert (!fixed_regs
[REGNO (dest
)]
1618 /* For the SPARC and its register window. */
1619 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1621 /* After stack is aligned, we can only save SP in FP
1622 if drap register is used. In this case, we have
1623 to restore stack pointer with the CFA value and we
1624 don't generate this DWARF information. */
1626 && fde
->stack_realign
1627 && REGNO (src
) == STACK_POINTER_REGNUM
)
1628 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1629 && fde
->drap_reg
!= INVALID_REGNUM
1630 && cur_cfa
->reg
!= dwf_regno (src
));
1632 queue_reg_save (src
, dest
, 0);
1639 if (dest
== stack_pointer_rtx
)
1643 switch (GET_CODE (XEXP (src
, 1)))
1646 offset
= INTVAL (XEXP (src
, 1));
1649 gcc_assert (dwf_regno (XEXP (src
, 1))
1650 == cur_trace
->cfa_temp
.reg
);
1651 offset
= cur_trace
->cfa_temp
.offset
;
1657 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1659 /* Restoring SP from FP in the epilogue. */
1660 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1661 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1663 else if (GET_CODE (src
) == LO_SUM
)
1664 /* Assume we've set the source reg of the LO_SUM from sp. */
1667 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1669 if (GET_CODE (src
) != MINUS
)
1671 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1672 cur_cfa
->offset
+= offset
;
1673 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1674 cur_trace
->cfa_store
.offset
+= offset
;
1676 else if (dest
== hard_frame_pointer_rtx
)
1679 /* Either setting the FP from an offset of the SP,
1680 or adjusting the FP */
1681 gcc_assert (frame_pointer_needed
);
1683 gcc_assert (REG_P (XEXP (src
, 0))
1684 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1685 && CONST_INT_P (XEXP (src
, 1)));
1686 offset
= INTVAL (XEXP (src
, 1));
1687 if (GET_CODE (src
) != MINUS
)
1689 cur_cfa
->offset
+= offset
;
1690 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1694 gcc_assert (GET_CODE (src
) != MINUS
);
1697 if (REG_P (XEXP (src
, 0))
1698 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1699 && CONST_INT_P (XEXP (src
, 1)))
1701 /* Setting a temporary CFA register that will be copied
1702 into the FP later on. */
1703 offset
= - INTVAL (XEXP (src
, 1));
1704 cur_cfa
->offset
+= offset
;
1705 cur_cfa
->reg
= dwf_regno (dest
);
1706 /* Or used to save regs to the stack. */
1707 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1708 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1712 else if (REG_P (XEXP (src
, 0))
1713 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1714 && XEXP (src
, 1) == stack_pointer_rtx
)
1716 /* Setting a scratch register that we will use instead
1717 of SP for saving registers to the stack. */
1718 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1719 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1720 cur_trace
->cfa_store
.offset
1721 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1725 else if (GET_CODE (src
) == LO_SUM
1726 && CONST_INT_P (XEXP (src
, 1)))
1728 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1729 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1738 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1739 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1744 gcc_assert (REG_P (XEXP (src
, 0))
1745 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1746 && CONST_INT_P (XEXP (src
, 1)));
1748 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1749 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1752 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1753 which will fill in all of the bits. */
1760 case UNSPEC_VOLATILE
:
1761 /* All unspecs should be represented by REG_CFA_* notes. */
1767 /* If this AND operation happens on stack pointer in prologue,
1768 we assume the stack is realigned and we extract the
1770 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1772 /* We interpret reg_save differently with stack_realign set.
1773 Thus we must flush whatever we have queued first. */
1774 dwarf2out_flush_queued_reg_saves ();
1776 gcc_assert (cur_trace
->cfa_store
.reg
1777 == dwf_regno (XEXP (src
, 0)));
1778 fde
->stack_realign
= 1;
1779 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1780 cur_trace
->cfa_store
.offset
= 0;
1782 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1783 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1784 fde
->drap_reg
= cur_cfa
->reg
;
1795 /* Saving a register to the stack. Make sure dest is relative to the
1797 switch (GET_CODE (XEXP (dest
, 0)))
1803 /* We can't handle variable size modifications. */
1804 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1806 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1808 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1809 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1811 cur_trace
->cfa_store
.offset
+= offset
;
1812 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1813 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1815 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1816 offset
-= cur_trace
->cfa_store
.offset
;
1818 offset
= -cur_trace
->cfa_store
.offset
;
1825 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1826 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1829 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1830 == STACK_POINTER_REGNUM
)
1831 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1833 cur_trace
->cfa_store
.offset
+= offset
;
1835 /* Rule 18: If stack is aligned, we will use FP as a
1836 reference to represent the address of the stored
1839 && fde
->stack_realign
1841 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1843 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1844 cur_trace
->cfa_store
.offset
= 0;
1847 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1848 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1850 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1851 offset
+= -cur_trace
->cfa_store
.offset
;
1853 offset
= -cur_trace
->cfa_store
.offset
;
1857 /* With an offset. */
1864 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1865 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1866 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1867 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1870 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1872 if (cur_cfa
->reg
== regno
)
1873 offset
-= cur_cfa
->offset
;
1874 else if (cur_trace
->cfa_store
.reg
== regno
)
1875 offset
-= cur_trace
->cfa_store
.offset
;
1878 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1879 offset
-= cur_trace
->cfa_temp
.offset
;
1885 /* Without an offset. */
1888 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1890 if (cur_cfa
->reg
== regno
)
1891 offset
= -cur_cfa
->offset
;
1892 else if (cur_trace
->cfa_store
.reg
== regno
)
1893 offset
= -cur_trace
->cfa_store
.offset
;
1896 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1897 offset
= -cur_trace
->cfa_temp
.offset
;
1904 gcc_assert (cur_trace
->cfa_temp
.reg
1905 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1906 offset
= -cur_trace
->cfa_temp
.offset
;
1907 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1915 /* If the source operand of this MEM operation is a memory,
1916 we only care how much stack grew. */
1921 && REGNO (src
) != STACK_POINTER_REGNUM
1922 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1923 && dwf_regno (src
) == cur_cfa
->reg
)
1925 /* We're storing the current CFA reg into the stack. */
1927 if (cur_cfa
->offset
== 0)
1930 /* If stack is aligned, putting CFA reg into stack means
1931 we can no longer use reg + offset to represent CFA.
1932 Here we use DW_CFA_def_cfa_expression instead. The
1933 result of this expression equals to the original CFA
1936 && fde
->stack_realign
1937 && cur_cfa
->indirect
== 0
1938 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1940 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1942 cur_cfa
->indirect
= 1;
1943 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1944 cur_cfa
->base_offset
= offset
;
1945 cur_cfa
->offset
= 0;
1947 fde
->drap_reg_saved
= 1;
1951 /* If the source register is exactly the CFA, assume
1952 we're saving SP like any other register; this happens
1954 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1959 /* Otherwise, we'll need to look in the stack to
1960 calculate the CFA. */
1961 rtx x
= XEXP (dest
, 0);
1965 gcc_assert (REG_P (x
));
1967 cur_cfa
->reg
= dwf_regno (x
);
1968 cur_cfa
->base_offset
= offset
;
1969 cur_cfa
->indirect
= 1;
1975 span
= targetm
.dwarf_register_span (src
);
1980 queue_reg_save (src
, NULL_RTX
, offset
);
1983 /* We have a PARALLEL describing where the contents of SRC live.
1984 Queue register saves for each piece of the PARALLEL. */
1985 HOST_WIDE_INT span_offset
= offset
;
1987 gcc_assert (GET_CODE (span
) == PARALLEL
);
1989 const int par_len
= XVECLEN (span
, 0);
1990 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1992 rtx elem
= XVECEXP (span
, 0, par_index
);
1993 queue_reg_save (elem
, NULL_RTX
, span_offset
);
1994 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2004 /* Record call frame debugging information for INSN, which either sets
2005 SP or FP (adjusting how we calculate the frame address) or saves a
2006 register to the stack. */
2009 dwarf2out_frame_debug (rtx_insn
*insn
)
2012 bool handled_one
= false;
2014 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2015 switch (REG_NOTE_KIND (note
))
2017 case REG_FRAME_RELATED_EXPR
:
2018 pat
= XEXP (note
, 0);
2021 case REG_CFA_DEF_CFA
:
2022 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2026 case REG_CFA_ADJUST_CFA
:
2031 if (GET_CODE (n
) == PARALLEL
)
2032 n
= XVECEXP (n
, 0, 0);
2034 dwarf2out_frame_debug_adjust_cfa (n
);
2038 case REG_CFA_OFFSET
:
2041 n
= single_set (insn
);
2042 dwarf2out_frame_debug_cfa_offset (n
);
2046 case REG_CFA_REGISTER
:
2051 if (GET_CODE (n
) == PARALLEL
)
2052 n
= XVECEXP (n
, 0, 0);
2054 dwarf2out_frame_debug_cfa_register (n
);
2058 case REG_CFA_EXPRESSION
:
2061 n
= single_set (insn
);
2062 dwarf2out_frame_debug_cfa_expression (n
);
2066 case REG_CFA_RESTORE
:
2071 if (GET_CODE (n
) == PARALLEL
)
2072 n
= XVECEXP (n
, 0, 0);
2075 dwarf2out_frame_debug_cfa_restore (n
);
2079 case REG_CFA_SET_VDRAP
:
2083 dw_fde_ref fde
= cfun
->fde
;
2086 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2088 fde
->vdrap_reg
= dwf_regno (n
);
2094 case REG_CFA_WINDOW_SAVE
:
2095 dwarf2out_frame_debug_cfa_window_save ();
2099 case REG_CFA_FLUSH_QUEUE
:
2100 /* The actual flush happens elsewhere. */
2110 pat
= PATTERN (insn
);
2112 dwarf2out_frame_debug_expr (pat
);
2114 /* Check again. A parallel can save and update the same register.
2115 We could probably check just once, here, but this is safer than
2116 removing the check at the start of the function. */
2117 if (clobbers_queued_reg_save (pat
))
2118 dwarf2out_flush_queued_reg_saves ();
2122 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2125 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2127 size_t i
, n_old
, n_new
, n_max
;
2130 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2131 add_cfi (new_row
->cfa_cfi
);
2134 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2139 n_old
= vec_safe_length (old_row
->reg_save
);
2140 n_new
= vec_safe_length (new_row
->reg_save
);
2141 n_max
= MAX (n_old
, n_new
);
2143 for (i
= 0; i
< n_max
; ++i
)
2145 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2148 r_old
= (*old_row
->reg_save
)[i
];
2150 r_new
= (*new_row
->reg_save
)[i
];
2154 else if (r_new
== NULL
)
2155 add_cfi_restore (i
);
2156 else if (!cfi_equal_p (r_old
, r_new
))
2161 /* Examine CFI and return true if a cfi label and set_loc is needed
2162 beforehand. Even when generating CFI assembler instructions, we
2163 still have to add the cfi to the list so that lookup_cfa_1 works
2164 later on. When -g2 and above we even need to force emitting of
2165 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2166 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2167 and so don't use convert_cfa_to_fb_loc_list. */
2170 cfi_label_required_p (dw_cfi_ref cfi
)
2172 if (!dwarf2out_do_cfi_asm ())
2175 if (dwarf_version
== 2
2176 && debug_info_level
> DINFO_LEVEL_TERSE
2177 && (write_symbols
== DWARF2_DEBUG
2178 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2180 switch (cfi
->dw_cfi_opc
)
2182 case DW_CFA_def_cfa_offset
:
2183 case DW_CFA_def_cfa_offset_sf
:
2184 case DW_CFA_def_cfa_register
:
2185 case DW_CFA_def_cfa
:
2186 case DW_CFA_def_cfa_sf
:
2187 case DW_CFA_def_cfa_expression
:
2188 case DW_CFA_restore_state
:
2197 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2198 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2201 add_cfis_to_fde (void)
2203 dw_fde_ref fde
= cfun
->fde
;
2204 rtx_insn
*insn
, *next
;
2205 /* We always start with a function_begin label. */
2208 for (insn
= get_insns (); insn
; insn
= next
)
2210 next
= NEXT_INSN (insn
);
2212 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2214 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2215 /* Don't attempt to advance_loc4 between labels
2216 in different sections. */
2220 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2222 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2224 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2226 required
|= cfi_label_required_p (NOTE_CFI (next
));
2227 next
= NEXT_INSN (next
);
2229 else if (active_insn_p (next
)
2230 || (NOTE_P (next
) && (NOTE_KIND (next
)
2231 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2234 next
= NEXT_INSN (next
);
2237 int num
= dwarf2out_cfi_label_num
;
2238 const char *label
= dwarf2out_cfi_label ();
2242 /* Set the location counter to the new label. */
2244 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2245 : DW_CFA_advance_loc4
);
2246 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2247 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2249 tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2250 NOTE_LABEL_NUMBER (tmp
) = num
;
2255 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2256 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2257 insn
= NEXT_INSN (insn
);
2259 while (insn
!= next
);
2265 /* If LABEL is the start of a trace, then initialize the state of that
2266 trace from CUR_TRACE and CUR_ROW. */
2269 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2272 HOST_WIDE_INT args_size
;
2274 ti
= get_trace_info (start
);
2275 gcc_assert (ti
!= NULL
);
2279 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2280 cur_trace
->id
, ti
->id
,
2281 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2282 (origin
? INSN_UID (origin
) : 0));
2285 args_size
= cur_trace
->end_true_args_size
;
2286 if (ti
->beg_row
== NULL
)
2288 /* This is the first time we've encountered this trace. Propagate
2289 state across the edge and push the trace onto the work list. */
2290 ti
->beg_row
= copy_cfi_row (cur_row
);
2291 ti
->beg_true_args_size
= args_size
;
2293 ti
->cfa_store
= cur_trace
->cfa_store
;
2294 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2295 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2297 trace_work_list
.safe_push (ti
);
2300 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2305 /* We ought to have the same state incoming to a given trace no
2306 matter how we arrive at the trace. Anything else means we've
2307 got some kind of optimization error. */
2308 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2310 /* The args_size is allowed to conflict if it isn't actually used. */
2311 if (ti
->beg_true_args_size
!= args_size
)
2312 ti
->args_size_undefined
= true;
2316 /* Similarly, but handle the args_size and CFA reset across EH
2317 and non-local goto edges. */
2320 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2322 HOST_WIDE_INT save_args_size
, delta
;
2323 dw_cfa_location save_cfa
;
2325 save_args_size
= cur_trace
->end_true_args_size
;
2326 if (save_args_size
== 0)
2328 maybe_record_trace_start (start
, origin
);
2332 delta
= -save_args_size
;
2333 cur_trace
->end_true_args_size
= 0;
2335 save_cfa
= cur_row
->cfa
;
2336 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2338 /* Convert a change in args_size (always a positive in the
2339 direction of stack growth) to a change in stack pointer. */
2340 #ifndef STACK_GROWS_DOWNWARD
2343 cur_row
->cfa
.offset
+= delta
;
2346 maybe_record_trace_start (start
, origin
);
2348 cur_trace
->end_true_args_size
= save_args_size
;
2349 cur_row
->cfa
= save_cfa
;
2352 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2353 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2356 create_trace_edges (rtx_insn
*insn
)
2363 rtx_jump_table_data
*table
;
2365 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2368 if (tablejump_p (insn
, NULL
, &table
))
2370 rtvec vec
= table
->get_labels ();
2372 n
= GET_NUM_ELEM (vec
);
2373 for (i
= 0; i
< n
; ++i
)
2375 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2376 maybe_record_trace_start (lab
, insn
);
2379 else if (computed_jump_p (insn
))
2381 for (rtx_insn_list
*lab
= forced_labels
; lab
; lab
= lab
->next ())
2382 maybe_record_trace_start (lab
->insn (), insn
);
2384 else if (returnjump_p (insn
))
2386 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2388 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2389 for (i
= 0; i
< n
; ++i
)
2392 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2393 maybe_record_trace_start (lab
, insn
);
2398 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2399 gcc_assert (lab
!= NULL
);
2400 maybe_record_trace_start (lab
, insn
);
2403 else if (CALL_P (insn
))
2405 /* Sibling calls don't have edges inside this function. */
2406 if (SIBLING_CALL_P (insn
))
2409 /* Process non-local goto edges. */
2410 if (can_nonlocal_goto (insn
))
2411 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2414 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2416 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2418 int i
, n
= seq
->len ();
2419 for (i
= 0; i
< n
; ++i
)
2420 create_trace_edges (seq
->insn (i
));
2424 /* Process EH edges. */
2425 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2427 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2429 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2433 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2436 scan_insn_after (rtx_insn
*insn
)
2438 if (RTX_FRAME_RELATED_P (insn
))
2439 dwarf2out_frame_debug (insn
);
2440 notice_args_size (insn
);
2443 /* Scan the trace beginning at INSN and create the CFI notes for the
2444 instructions therein. */
2447 scan_trace (dw_trace_info
*trace
)
2449 rtx_insn
*prev
, *insn
= trace
->head
;
2450 dw_cfa_location this_cfa
;
2453 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2454 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2457 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2458 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2461 cur_row
= trace
->end_row
;
2463 this_cfa
= cur_row
->cfa
;
2464 cur_cfa
= &this_cfa
;
2466 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2468 prev
= insn
, insn
= NEXT_INSN (insn
))
2472 /* Do everything that happens "before" the insn. */
2473 add_cfi_insn
= prev
;
2475 /* Notice the end of a trace. */
2476 if (BARRIER_P (insn
))
2478 /* Don't bother saving the unneeded queued registers at all. */
2479 queued_reg_saves
.truncate (0);
2482 if (save_point_p (insn
))
2484 /* Propagate across fallthru edges. */
2485 dwarf2out_flush_queued_reg_saves ();
2486 maybe_record_trace_start (insn
, NULL
);
2490 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2493 /* Handle all changes to the row state. Sequences require special
2494 handling for the positioning of the notes. */
2495 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2498 int i
, n
= pat
->len ();
2500 control
= pat
->insn (0);
2501 if (can_throw_internal (control
))
2502 notice_eh_throw (control
);
2503 dwarf2out_flush_queued_reg_saves ();
2505 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2507 /* ??? Hopefully multiple delay slots are not annulled. */
2508 gcc_assert (n
== 2);
2509 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2510 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2512 elt
= pat
->insn (1);
2514 if (INSN_FROM_TARGET_P (elt
))
2516 HOST_WIDE_INT restore_args_size
;
2517 cfi_vec save_row_reg_save
;
2519 /* If ELT is an instruction from target of an annulled
2520 branch, the effects are for the target only and so
2521 the args_size and CFA along the current path
2522 shouldn't change. */
2523 add_cfi_insn
= NULL
;
2524 restore_args_size
= cur_trace
->end_true_args_size
;
2525 cur_cfa
= &cur_row
->cfa
;
2526 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2528 scan_insn_after (elt
);
2530 /* ??? Should we instead save the entire row state? */
2531 gcc_assert (!queued_reg_saves
.length ());
2533 create_trace_edges (control
);
2535 cur_trace
->end_true_args_size
= restore_args_size
;
2536 cur_row
->cfa
= this_cfa
;
2537 cur_row
->reg_save
= save_row_reg_save
;
2538 cur_cfa
= &this_cfa
;
2542 /* If ELT is a annulled branch-taken instruction (i.e.
2543 executed only when branch is not taken), the args_size
2544 and CFA should not change through the jump. */
2545 create_trace_edges (control
);
2547 /* Update and continue with the trace. */
2548 add_cfi_insn
= insn
;
2549 scan_insn_after (elt
);
2550 def_cfa_1 (&this_cfa
);
2555 /* The insns in the delay slot should all be considered to happen
2556 "before" a call insn. Consider a call with a stack pointer
2557 adjustment in the delay slot. The backtrace from the callee
2558 should include the sp adjustment. Unfortunately, that leaves
2559 us with an unavoidable unwinding error exactly at the call insn
2560 itself. For jump insns we'd prefer to avoid this error by
2561 placing the notes after the sequence. */
2562 if (JUMP_P (control
))
2563 add_cfi_insn
= insn
;
2565 for (i
= 1; i
< n
; ++i
)
2567 elt
= pat
->insn (i
);
2568 scan_insn_after (elt
);
2571 /* Make sure any register saves are visible at the jump target. */
2572 dwarf2out_flush_queued_reg_saves ();
2573 any_cfis_emitted
= false;
2575 /* However, if there is some adjustment on the call itself, e.g.
2576 a call_pop, that action should be considered to happen after
2577 the call returns. */
2578 add_cfi_insn
= insn
;
2579 scan_insn_after (control
);
2583 /* Flush data before calls and jumps, and of course if necessary. */
2584 if (can_throw_internal (insn
))
2586 notice_eh_throw (insn
);
2587 dwarf2out_flush_queued_reg_saves ();
2589 else if (!NONJUMP_INSN_P (insn
)
2590 || clobbers_queued_reg_save (insn
)
2591 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2592 dwarf2out_flush_queued_reg_saves ();
2593 any_cfis_emitted
= false;
2595 add_cfi_insn
= insn
;
2596 scan_insn_after (insn
);
2600 /* Between frame-related-p and args_size we might have otherwise
2601 emitted two cfa adjustments. Do it now. */
2602 def_cfa_1 (&this_cfa
);
2604 /* Minimize the number of advances by emitting the entire queue
2605 once anything is emitted. */
2606 if (any_cfis_emitted
2607 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2608 dwarf2out_flush_queued_reg_saves ();
2610 /* Note that a test for control_flow_insn_p does exactly the
2611 same tests as are done to actually create the edges. So
2612 always call the routine and let it not create edges for
2613 non-control-flow insns. */
2614 create_trace_edges (control
);
2617 add_cfi_insn
= NULL
;
2623 /* Scan the function and create the initial set of CFI notes. */
2626 create_cfi_notes (void)
2630 gcc_checking_assert (!queued_reg_saves
.exists ());
2631 gcc_checking_assert (!trace_work_list
.exists ());
2633 /* Always begin at the entry trace. */
2634 ti
= &trace_info
[0];
2637 while (!trace_work_list
.is_empty ())
2639 ti
= trace_work_list
.pop ();
2643 queued_reg_saves
.release ();
2644 trace_work_list
.release ();
2647 /* Return the insn before the first NOTE_INSN_CFI after START. */
2650 before_next_cfi_note (rtx_insn
*start
)
2652 rtx_insn
*prev
= start
;
2655 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2658 start
= NEXT_INSN (start
);
2663 /* Insert CFI notes between traces to properly change state between them. */
2666 connect_traces (void)
2668 unsigned i
, n
= trace_info
.length ();
2669 dw_trace_info
*prev_ti
, *ti
;
2671 /* ??? Ideally, we should have both queued and processed every trace.
2672 However the current representation of constant pools on various targets
2673 is indistinguishable from unreachable code. Assume for the moment that
2674 we can simply skip over such traces. */
2675 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2676 these are not "real" instructions, and should not be considered.
2677 This could be generically useful for tablejump data as well. */
2678 /* Remove all unprocessed traces from the list. */
2679 for (i
= n
- 1; i
> 0; --i
)
2681 ti
= &trace_info
[i
];
2682 if (ti
->beg_row
== NULL
)
2684 trace_info
.ordered_remove (i
);
2688 gcc_assert (ti
->end_row
!= NULL
);
2691 /* Work from the end back to the beginning. This lets us easily insert
2692 remember/restore_state notes in the correct order wrt other notes. */
2693 prev_ti
= &trace_info
[n
- 1];
2694 for (i
= n
- 1; i
> 0; --i
)
2696 dw_cfi_row
*old_row
;
2699 prev_ti
= &trace_info
[i
- 1];
2701 add_cfi_insn
= ti
->head
;
2703 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2704 for the portion of the function in the alternate text
2705 section. The row state at the very beginning of that
2706 new FDE will be exactly the row state from the CIE. */
2707 if (ti
->switch_sections
)
2708 old_row
= cie_cfi_row
;
2711 old_row
= prev_ti
->end_row
;
2712 /* If there's no change from the previous end state, fine. */
2713 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2715 /* Otherwise check for the common case of sharing state with
2716 the beginning of an epilogue, but not the end. Insert
2717 remember/restore opcodes in that case. */
2718 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2722 /* Note that if we blindly insert the remember at the
2723 start of the trace, we can wind up increasing the
2724 size of the unwind info due to extra advance opcodes.
2725 Instead, put the remember immediately before the next
2726 state change. We know there must be one, because the
2727 state at the beginning and head of the trace differ. */
2728 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2730 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2733 add_cfi_insn
= ti
->head
;
2735 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2738 old_row
= prev_ti
->beg_row
;
2740 /* Otherwise, we'll simply change state from the previous end. */
2743 change_cfi_row (old_row
, ti
->beg_row
);
2745 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2749 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2750 prev_ti
->id
, ti
->id
);
2755 note
= NEXT_INSN (note
);
2756 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2757 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2759 while (note
!= add_cfi_insn
);
2763 /* Connect args_size between traces that have can_throw_internal insns. */
2764 if (cfun
->eh
->lp_array
)
2766 HOST_WIDE_INT prev_args_size
= 0;
2768 for (i
= 0; i
< n
; ++i
)
2770 ti
= &trace_info
[i
];
2772 if (ti
->switch_sections
)
2774 if (ti
->eh_head
== NULL
)
2776 gcc_assert (!ti
->args_size_undefined
);
2778 if (ti
->beg_delay_args_size
!= prev_args_size
)
2780 /* ??? Search back to previous CFI note. */
2781 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2782 add_cfi_args_size (ti
->beg_delay_args_size
);
2785 prev_args_size
= ti
->end_delay_args_size
;
2790 /* Set up the pseudo-cfg of instruction traces, as described at the
2791 block comment at the top of the file. */
2794 create_pseudo_cfg (void)
2796 bool saw_barrier
, switch_sections
;
2801 /* The first trace begins at the start of the function,
2802 and begins with the CIE row state. */
2803 trace_info
.create (16);
2804 memset (&ti
, 0, sizeof (ti
));
2805 ti
.head
= get_insns ();
2806 ti
.beg_row
= cie_cfi_row
;
2807 ti
.cfa_store
= cie_cfi_row
->cfa
;
2808 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2809 trace_info
.quick_push (ti
);
2811 if (cie_return_save
)
2812 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2814 /* Walk all the insns, collecting start of trace locations. */
2815 saw_barrier
= false;
2816 switch_sections
= false;
2817 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2819 if (BARRIER_P (insn
))
2821 else if (NOTE_P (insn
)
2822 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2824 /* We should have just seen a barrier. */
2825 gcc_assert (saw_barrier
);
2826 switch_sections
= true;
2828 /* Watch out for save_point notes between basic blocks.
2829 In particular, a note after a barrier. Do not record these,
2830 delaying trace creation until the label. */
2831 else if (save_point_p (insn
)
2832 && (LABEL_P (insn
) || !saw_barrier
))
2834 memset (&ti
, 0, sizeof (ti
));
2836 ti
.switch_sections
= switch_sections
;
2837 ti
.id
= trace_info
.length ();
2838 trace_info
.safe_push (ti
);
2840 saw_barrier
= false;
2841 switch_sections
= false;
2845 /* Create the trace index after we've finished building trace_info,
2846 avoiding stale pointer problems due to reallocation. */
2848 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2850 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2852 dw_trace_info
**slot
;
2855 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2856 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2857 tp
->switch_sections
? " (section switch)" : "");
2859 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2860 gcc_assert (*slot
== NULL
);
2865 /* Record the initial position of the return address. RTL is
2866 INCOMING_RETURN_ADDR_RTX. */
2869 initial_return_save (rtx rtl
)
2871 unsigned int reg
= INVALID_REGNUM
;
2872 HOST_WIDE_INT offset
= 0;
2874 switch (GET_CODE (rtl
))
2877 /* RA is in a register. */
2878 reg
= dwf_regno (rtl
);
2882 /* RA is on the stack. */
2883 rtl
= XEXP (rtl
, 0);
2884 switch (GET_CODE (rtl
))
2887 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2892 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2893 offset
= INTVAL (XEXP (rtl
, 1));
2897 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2898 offset
= -INTVAL (XEXP (rtl
, 1));
2908 /* The return address is at some offset from any value we can
2909 actually load. For instance, on the SPARC it is in %i7+8. Just
2910 ignore the offset for now; it doesn't matter for unwinding frames. */
2911 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2912 initial_return_save (XEXP (rtl
, 0));
2919 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2921 if (reg
!= INVALID_REGNUM
)
2922 record_reg_saved_in_reg (rtl
, pc_rtx
);
2923 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2928 create_cie_data (void)
2930 dw_cfa_location loc
;
2931 dw_trace_info cie_trace
;
2933 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2934 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2936 memset (&cie_trace
, 0, sizeof (cie_trace
));
2937 cur_trace
= &cie_trace
;
2939 add_cfi_vec
= &cie_cfi_vec
;
2940 cie_cfi_row
= cur_row
= new_cfi_row ();
2942 /* On entry, the Canonical Frame Address is at SP. */
2943 memset (&loc
, 0, sizeof (loc
));
2944 loc
.reg
= dw_stack_pointer_regnum
;
2945 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2948 if (targetm
.debug_unwind_info () == UI_DWARF2
2949 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2951 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2953 /* For a few targets, we have the return address incoming into a
2954 register, but choose a different return column. This will result
2955 in a DW_CFA_register for the return, and an entry in
2956 regs_saved_in_regs to match. If the target later stores that
2957 return address register to the stack, we want to be able to emit
2958 the DW_CFA_offset against the return column, not the intermediate
2959 save register. Save the contents of regs_saved_in_regs so that
2960 we can re-initialize it at the start of each function. */
2961 switch (cie_trace
.regs_saved_in_regs
.length ())
2966 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
2967 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
2968 cie_trace
.regs_saved_in_regs
.release ();
2980 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2981 state at each location within the function. These notes will be
2982 emitted during pass_final. */
2985 execute_dwarf2_frame (void)
2987 /* The first time we're called, compute the incoming frame state. */
2988 if (cie_cfi_vec
== NULL
)
2991 dwarf2out_alloc_current_fde ();
2993 create_pseudo_cfg ();
2996 create_cfi_notes ();
3000 /* Free all the data we allocated. */
3005 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3006 ti
->regs_saved_in_regs
.release ();
3008 trace_info
.release ();
3016 /* Convert a DWARF call frame info. operation to its string name */
3019 dwarf_cfi_name (unsigned int cfi_opc
)
3021 const char *name
= get_DW_CFA_name (cfi_opc
);
3026 return "DW_CFA_<unknown>";
3029 /* This routine will generate the correct assembly data for a location
3030 description based on a cfi entry with a complex address. */
3033 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3035 dw_loc_descr_ref loc
;
3038 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3041 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3042 dw2_asm_output_data (1, r
, NULL
);
3043 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3046 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3048 /* Output the size of the block. */
3049 size
= size_of_locs (loc
);
3050 dw2_asm_output_data_uleb128 (size
, NULL
);
3052 /* Now output the operations themselves. */
3053 output_loc_sequence (loc
, for_eh
);
3056 /* Similar, but used for .cfi_escape. */
3059 output_cfa_loc_raw (dw_cfi_ref cfi
)
3061 dw_loc_descr_ref loc
;
3064 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3067 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3068 fprintf (asm_out_file
, "%#x,", r
);
3069 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3072 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3074 /* Output the size of the block. */
3075 size
= size_of_locs (loc
);
3076 dw2_asm_output_data_uleb128_raw (size
);
3077 fputc (',', asm_out_file
);
3079 /* Now output the operations themselves. */
3080 output_loc_sequence_raw (loc
);
3083 /* Output a Call Frame Information opcode and its operand(s). */
3086 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3091 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3092 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3093 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3094 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3095 ((unsigned HOST_WIDE_INT
)
3096 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3097 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3099 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3100 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3101 "DW_CFA_offset, column %#lx", r
);
3102 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3103 dw2_asm_output_data_uleb128 (off
, NULL
);
3105 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3107 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3108 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3109 "DW_CFA_restore, column %#lx", r
);
3113 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3114 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3116 switch (cfi
->dw_cfi_opc
)
3118 case DW_CFA_set_loc
:
3120 dw2_asm_output_encoded_addr_rtx (
3121 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3122 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3125 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3126 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3127 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3130 case DW_CFA_advance_loc1
:
3131 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3132 fde
->dw_fde_current_label
, NULL
);
3133 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3136 case DW_CFA_advance_loc2
:
3137 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3138 fde
->dw_fde_current_label
, NULL
);
3139 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3142 case DW_CFA_advance_loc4
:
3143 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3144 fde
->dw_fde_current_label
, NULL
);
3145 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3148 case DW_CFA_MIPS_advance_loc8
:
3149 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3150 fde
->dw_fde_current_label
, NULL
);
3151 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3154 case DW_CFA_offset_extended
:
3155 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3156 dw2_asm_output_data_uleb128 (r
, NULL
);
3157 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3158 dw2_asm_output_data_uleb128 (off
, NULL
);
3161 case DW_CFA_def_cfa
:
3162 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3163 dw2_asm_output_data_uleb128 (r
, NULL
);
3164 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3167 case DW_CFA_offset_extended_sf
:
3168 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3169 dw2_asm_output_data_uleb128 (r
, NULL
);
3170 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3171 dw2_asm_output_data_sleb128 (off
, NULL
);
3174 case DW_CFA_def_cfa_sf
:
3175 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3176 dw2_asm_output_data_uleb128 (r
, NULL
);
3177 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3178 dw2_asm_output_data_sleb128 (off
, NULL
);
3181 case DW_CFA_restore_extended
:
3182 case DW_CFA_undefined
:
3183 case DW_CFA_same_value
:
3184 case DW_CFA_def_cfa_register
:
3185 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3186 dw2_asm_output_data_uleb128 (r
, NULL
);
3189 case DW_CFA_register
:
3190 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3191 dw2_asm_output_data_uleb128 (r
, NULL
);
3192 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3193 dw2_asm_output_data_uleb128 (r
, NULL
);
3196 case DW_CFA_def_cfa_offset
:
3197 case DW_CFA_GNU_args_size
:
3198 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3201 case DW_CFA_def_cfa_offset_sf
:
3202 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3203 dw2_asm_output_data_sleb128 (off
, NULL
);
3206 case DW_CFA_GNU_window_save
:
3209 case DW_CFA_def_cfa_expression
:
3210 case DW_CFA_expression
:
3211 output_cfa_loc (cfi
, for_eh
);
3214 case DW_CFA_GNU_negative_offset_extended
:
3215 /* Obsoleted by DW_CFA_offset_extended_sf. */
3224 /* Similar, but do it via assembler directives instead. */
3227 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3229 unsigned long r
, r2
;
3231 switch (cfi
->dw_cfi_opc
)
3233 case DW_CFA_advance_loc
:
3234 case DW_CFA_advance_loc1
:
3235 case DW_CFA_advance_loc2
:
3236 case DW_CFA_advance_loc4
:
3237 case DW_CFA_MIPS_advance_loc8
:
3238 case DW_CFA_set_loc
:
3239 /* Should only be created in a code path not followed when emitting
3240 via directives. The assembler is going to take care of this for
3241 us. But this routines is also used for debugging dumps, so
3243 gcc_assert (f
!= asm_out_file
);
3244 fprintf (f
, "\t.cfi_advance_loc\n");
3248 case DW_CFA_offset_extended
:
3249 case DW_CFA_offset_extended_sf
:
3250 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3251 fprintf (f
, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3252 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3255 case DW_CFA_restore
:
3256 case DW_CFA_restore_extended
:
3257 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3258 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3261 case DW_CFA_undefined
:
3262 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3263 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3266 case DW_CFA_same_value
:
3267 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3268 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3271 case DW_CFA_def_cfa
:
3272 case DW_CFA_def_cfa_sf
:
3273 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3274 fprintf (f
, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3275 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3278 case DW_CFA_def_cfa_register
:
3279 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3280 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3283 case DW_CFA_register
:
3284 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3285 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3286 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3289 case DW_CFA_def_cfa_offset
:
3290 case DW_CFA_def_cfa_offset_sf
:
3291 fprintf (f
, "\t.cfi_def_cfa_offset "
3292 HOST_WIDE_INT_PRINT_DEC
"\n",
3293 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3296 case DW_CFA_remember_state
:
3297 fprintf (f
, "\t.cfi_remember_state\n");
3299 case DW_CFA_restore_state
:
3300 fprintf (f
, "\t.cfi_restore_state\n");
3303 case DW_CFA_GNU_args_size
:
3304 if (f
== asm_out_file
)
3306 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3307 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3309 fprintf (f
, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC
,
3310 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3315 fprintf (f
, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC
"\n",
3316 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3320 case DW_CFA_GNU_window_save
:
3321 fprintf (f
, "\t.cfi_window_save\n");
3324 case DW_CFA_def_cfa_expression
:
3325 if (f
!= asm_out_file
)
3327 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3331 case DW_CFA_expression
:
3332 if (f
!= asm_out_file
)
3334 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3337 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3338 output_cfa_loc_raw (cfi
);
3348 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3350 if (dwarf2out_do_cfi_asm ())
3351 output_cfi_directive (asm_out_file
, cfi
);
3355 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3363 dw_cfa_location dummy
;
3364 memset (&dummy
, 0, sizeof (dummy
));
3365 dummy
.reg
= INVALID_REGNUM
;
3366 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3368 output_cfi_directive (f
, cfi
);
3370 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3372 output_cfi_directive (f
, cfi
);
3375 void debug_cfi_row (dw_cfi_row
*row
);
3378 debug_cfi_row (dw_cfi_row
*row
)
3380 dump_cfi_row (stderr
, row
);
3384 /* Save the result of dwarf2out_do_frame across PCH.
3385 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3386 static GTY(()) signed char saved_do_cfi_asm
= 0;
3388 /* Decide whether we want to emit frame unwind information for the current
3389 translation unit. */
3392 dwarf2out_do_frame (void)
3394 /* We want to emit correct CFA location expressions or lists, so we
3395 have to return true if we're going to output debug info, even if
3396 we're not going to output frame or unwind info. */
3397 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3400 if (saved_do_cfi_asm
> 0)
3403 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3406 if ((flag_unwind_tables
|| flag_exceptions
)
3407 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3413 /* Decide whether to emit frame unwind via assembler directives. */
3416 dwarf2out_do_cfi_asm (void)
3420 if (saved_do_cfi_asm
!= 0)
3421 return saved_do_cfi_asm
> 0;
3423 /* Assume failure for a moment. */
3424 saved_do_cfi_asm
= -1;
3426 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3428 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3431 /* Make sure the personality encoding is one the assembler can support.
3432 In particular, aligned addresses can't be handled. */
3433 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3434 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3436 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3437 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3440 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3441 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3442 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3443 && !flag_unwind_tables
&& !flag_exceptions
3444 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3448 saved_do_cfi_asm
= 1;
3454 const pass_data pass_data_dwarf2_frame
=
3456 RTL_PASS
, /* type */
3457 "dwarf2", /* name */
3458 OPTGROUP_NONE
, /* optinfo_flags */
3459 TV_FINAL
, /* tv_id */
3460 0, /* properties_required */
3461 0, /* properties_provided */
3462 0, /* properties_destroyed */
3463 0, /* todo_flags_start */
3464 0, /* todo_flags_finish */
3467 class pass_dwarf2_frame
: public rtl_opt_pass
3470 pass_dwarf2_frame (gcc::context
*ctxt
)
3471 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3474 /* opt_pass methods: */
3475 virtual bool gate (function
*);
3476 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3478 }; // class pass_dwarf2_frame
3481 pass_dwarf2_frame::gate (function
*)
3483 #ifndef HAVE_prologue
3484 /* Targets which still implement the prologue in assembler text
3485 cannot use the generic dwarf2 unwinding. */
3489 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3490 from the optimized shrink-wrapping annotations that we will compute.
3491 For now, only produce the CFI notes for dwarf2. */
3492 return dwarf2out_do_frame ();
3498 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3500 return new pass_dwarf2_frame (ctxt
);
3503 #include "gt-dwarf2cfi.h"