Daily bump.
[official-gcc.git] / gcc / reload.c
blobe88a82de7c42e6e9bd05430d5aba9cfec43ca086
1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
58 NOTE SIDE EFFECTS:
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
65 better that way.
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
82 register.
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
88 #define REG_OK_STRICT
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
91 #undef DEBUG_RELOAD
93 #include "config.h"
94 #include "system.h"
95 #include "coretypes.h"
96 #include "tm.h"
97 #include "rtl.h"
98 #include "tm_p.h"
99 #include "insn-config.h"
100 #include "expr.h"
101 #include "optabs.h"
102 #include "recog.h"
103 #include "reload.h"
104 #include "regs.h"
105 #include "addresses.h"
106 #include "hard-reg-set.h"
107 #include "flags.h"
108 #include "real.h"
109 #include "output.h"
110 #include "function.h"
111 #include "toplev.h"
112 #include "params.h"
113 #include "target.h"
114 #include "df.h"
116 /* True if X is a constant that can be forced into the constant pool. */
117 #define CONST_POOL_OK_P(X) \
118 (CONSTANT_P (X) \
119 && GET_CODE (X) != HIGH \
120 && !targetm.cannot_force_const_mem (X))
122 /* True if C is a non-empty register class that has too few registers
123 to be safely used as a reload target class. */
124 #define SMALL_REGISTER_CLASS_P(C) \
125 (reg_class_size [(C)] == 1 \
126 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
129 /* All reloads of the current insn are recorded here. See reload.h for
130 comments. */
131 int n_reloads;
132 struct reload rld[MAX_RELOADS];
134 /* All the "earlyclobber" operands of the current insn
135 are recorded here. */
136 int n_earlyclobbers;
137 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
139 int reload_n_operands;
141 /* Replacing reloads.
143 If `replace_reloads' is nonzero, then as each reload is recorded
144 an entry is made for it in the table `replacements'.
145 Then later `subst_reloads' can look through that table and
146 perform all the replacements needed. */
148 /* Nonzero means record the places to replace. */
149 static int replace_reloads;
151 /* Each replacement is recorded with a structure like this. */
152 struct replacement
154 rtx *where; /* Location to store in */
155 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
156 a SUBREG; 0 otherwise. */
157 int what; /* which reload this is for */
158 enum machine_mode mode; /* mode it must have */
161 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
163 /* Number of replacements currently recorded. */
164 static int n_replacements;
166 /* Used to track what is modified by an operand. */
167 struct decomposition
169 int reg_flag; /* Nonzero if referencing a register. */
170 int safe; /* Nonzero if this can't conflict with anything. */
171 rtx base; /* Base address for MEM. */
172 HOST_WIDE_INT start; /* Starting offset or register number. */
173 HOST_WIDE_INT end; /* Ending offset or register number. */
176 #ifdef SECONDARY_MEMORY_NEEDED
178 /* Save MEMs needed to copy from one class of registers to another. One MEM
179 is used per mode, but normally only one or two modes are ever used.
181 We keep two versions, before and after register elimination. The one
182 after register elimination is record separately for each operand. This
183 is done in case the address is not valid to be sure that we separately
184 reload each. */
186 static rtx secondary_memlocs[NUM_MACHINE_MODES];
187 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
188 static int secondary_memlocs_elim_used = 0;
189 #endif
191 /* The instruction we are doing reloads for;
192 so we can test whether a register dies in it. */
193 static rtx this_insn;
195 /* Nonzero if this instruction is a user-specified asm with operands. */
196 static int this_insn_is_asm;
198 /* If hard_regs_live_known is nonzero,
199 we can tell which hard regs are currently live,
200 at least enough to succeed in choosing dummy reloads. */
201 static int hard_regs_live_known;
203 /* Indexed by hard reg number,
204 element is nonnegative if hard reg has been spilled.
205 This vector is passed to `find_reloads' as an argument
206 and is not changed here. */
207 static short *static_reload_reg_p;
209 /* Set to 1 in subst_reg_equivs if it changes anything. */
210 static int subst_reg_equivs_changed;
212 /* On return from push_reload, holds the reload-number for the OUT
213 operand, which can be different for that from the input operand. */
214 static int output_reloadnum;
216 /* Compare two RTX's. */
217 #define MATCHES(x, y) \
218 (x == y || (x != 0 && (REG_P (x) \
219 ? REG_P (y) && REGNO (x) == REGNO (y) \
220 : rtx_equal_p (x, y) && ! side_effects_p (x))))
222 /* Indicates if two reloads purposes are for similar enough things that we
223 can merge their reloads. */
224 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
225 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
226 || ((when1) == (when2) && (op1) == (op2)) \
227 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
228 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
230 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
231 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
233 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
234 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
235 ((when1) != (when2) \
236 || ! ((op1) == (op2) \
237 || (when1) == RELOAD_FOR_INPUT \
238 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
241 /* If we are going to reload an address, compute the reload type to
242 use. */
243 #define ADDR_TYPE(type) \
244 ((type) == RELOAD_FOR_INPUT_ADDRESS \
245 ? RELOAD_FOR_INPADDR_ADDRESS \
246 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
247 ? RELOAD_FOR_OUTADDR_ADDRESS \
248 : (type)))
250 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
251 enum machine_mode, enum reload_type,
252 enum insn_code *, secondary_reload_info *);
253 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
254 int, unsigned int);
255 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
256 static void push_replacement (rtx *, int, enum machine_mode);
257 static void dup_replacements (rtx *, rtx *);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx *, rtx, enum reg_class,
260 enum reload_type, int, int);
261 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
262 enum machine_mode, enum reg_class, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
264 static struct decomposition decompose (rtx);
265 static int immune_p (rtx, rtx, struct decomposition);
266 static int alternative_allows_memconst (const char *, int);
267 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
268 int *);
269 static rtx make_memloc (rtx, int);
270 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
271 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
272 int, enum reload_type, int, rtx);
273 static rtx subst_reg_equivs (rtx, rtx);
274 static rtx subst_indexed_address (rtx);
275 static void update_auto_inc_notes (rtx, int, int);
276 static int find_reloads_address_1 (enum machine_mode, rtx, int,
277 enum rtx_code, enum rtx_code, rtx *,
278 int, enum reload_type,int, rtx);
279 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
280 enum machine_mode, int,
281 enum reload_type, int);
282 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
283 int, rtx);
284 static void copy_replacements_1 (rtx *, rtx *, int);
285 static int find_inc_amount (rtx, rtx);
286 static int refers_to_mem_for_reload_p (rtx);
287 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
288 rtx, rtx *);
290 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
291 list yet. */
293 static void
294 push_reg_equiv_alt_mem (int regno, rtx mem)
296 rtx it;
298 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
299 if (rtx_equal_p (XEXP (it, 0), mem))
300 return;
302 reg_equiv_alt_mem_list [regno]
303 = alloc_EXPR_LIST (REG_EQUIV, mem,
304 reg_equiv_alt_mem_list [regno]);
307 /* Determine if any secondary reloads are needed for loading (if IN_P is
308 nonzero) or storing (if IN_P is zero) X to or from a reload register of
309 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
310 are needed, push them.
312 Return the reload number of the secondary reload we made, or -1 if
313 we didn't need one. *PICODE is set to the insn_code to use if we do
314 need a secondary reload. */
316 static int
317 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
318 enum reg_class reload_class,
319 enum machine_mode reload_mode, enum reload_type type,
320 enum insn_code *picode, secondary_reload_info *prev_sri)
322 enum reg_class class = NO_REGS;
323 enum reg_class scratch_class;
324 enum machine_mode mode = reload_mode;
325 enum insn_code icode = CODE_FOR_nothing;
326 enum insn_code t_icode = CODE_FOR_nothing;
327 enum reload_type secondary_type;
328 int s_reload, t_reload = -1;
329 const char *scratch_constraint;
330 char letter;
331 secondary_reload_info sri;
333 if (type == RELOAD_FOR_INPUT_ADDRESS
334 || type == RELOAD_FOR_OUTPUT_ADDRESS
335 || type == RELOAD_FOR_INPADDR_ADDRESS
336 || type == RELOAD_FOR_OUTADDR_ADDRESS)
337 secondary_type = type;
338 else
339 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
341 *picode = CODE_FOR_nothing;
343 /* If X is a paradoxical SUBREG, use the inner value to determine both the
344 mode and object being reloaded. */
345 if (GET_CODE (x) == SUBREG
346 && (GET_MODE_SIZE (GET_MODE (x))
347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
349 x = SUBREG_REG (x);
350 reload_mode = GET_MODE (x);
353 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
354 is still a pseudo-register by now, it *must* have an equivalent MEM
355 but we don't want to assume that), use that equivalent when seeing if
356 a secondary reload is needed since whether or not a reload is needed
357 might be sensitive to the form of the MEM. */
359 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
360 && reg_equiv_mem[REGNO (x)] != 0)
361 x = reg_equiv_mem[REGNO (x)];
363 sri.icode = CODE_FOR_nothing;
364 sri.prev_sri = prev_sri;
365 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
366 icode = sri.icode;
368 /* If we don't need any secondary registers, done. */
369 if (class == NO_REGS && icode == CODE_FOR_nothing)
370 return -1;
372 if (class != NO_REGS)
373 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
374 reload_mode, type, &t_icode, &sri);
376 /* If we will be using an insn, the secondary reload is for a
377 scratch register. */
379 if (icode != CODE_FOR_nothing)
381 /* If IN_P is nonzero, the reload register will be the output in
382 operand 0. If IN_P is zero, the reload register will be the input
383 in operand 1. Outputs should have an initial "=", which we must
384 skip. */
386 /* ??? It would be useful to be able to handle only two, or more than
387 three, operands, but for now we can only handle the case of having
388 exactly three: output, input and one temp/scratch. */
389 gcc_assert (insn_data[(int) icode].n_operands == 3);
391 /* ??? We currently have no way to represent a reload that needs
392 an icode to reload from an intermediate tertiary reload register.
393 We should probably have a new field in struct reload to tag a
394 chain of scratch operand reloads onto. */
395 gcc_assert (class == NO_REGS);
397 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
398 gcc_assert (*scratch_constraint == '=');
399 scratch_constraint++;
400 if (*scratch_constraint == '&')
401 scratch_constraint++;
402 letter = *scratch_constraint;
403 scratch_class = (letter == 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
405 scratch_constraint));
407 class = scratch_class;
408 mode = insn_data[(int) icode].operand[2].mode;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
420 other way.
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
426 || t_icode != CODE_FOR_nothing);
428 /* See if we can reuse an existing secondary reload. */
429 for (s_reload = 0; s_reload < n_reloads; s_reload++)
430 if (rld[s_reload].secondary_p
431 && (reg_class_subset_p (class, rld[s_reload].class)
432 || reg_class_subset_p (rld[s_reload].class, class))
433 && ((in_p && rld[s_reload].inmode == mode)
434 || (! in_p && rld[s_reload].outmode == mode))
435 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
436 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
437 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
438 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
439 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
440 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
441 opnum, rld[s_reload].opnum))
443 if (in_p)
444 rld[s_reload].inmode = mode;
445 if (! in_p)
446 rld[s_reload].outmode = mode;
448 if (reg_class_subset_p (class, rld[s_reload].class))
449 rld[s_reload].class = class;
451 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
452 rld[s_reload].optional &= optional;
453 rld[s_reload].secondary_p = 1;
454 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
455 opnum, rld[s_reload].opnum))
456 rld[s_reload].when_needed = RELOAD_OTHER;
459 if (s_reload == n_reloads)
461 #ifdef SECONDARY_MEMORY_NEEDED
462 /* If we need a memory location to copy between the two reload regs,
463 set it up now. Note that we do the input case before making
464 the reload and the output case after. This is due to the
465 way reloads are output. */
467 if (in_p && icode == CODE_FOR_nothing
468 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
470 get_secondary_mem (x, reload_mode, opnum, type);
472 /* We may have just added new reloads. Make sure we add
473 the new reload at the end. */
474 s_reload = n_reloads;
476 #endif
478 /* We need to make a new secondary reload for this register class. */
479 rld[s_reload].in = rld[s_reload].out = 0;
480 rld[s_reload].class = class;
482 rld[s_reload].inmode = in_p ? mode : VOIDmode;
483 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
484 rld[s_reload].reg_rtx = 0;
485 rld[s_reload].optional = optional;
486 rld[s_reload].inc = 0;
487 /* Maybe we could combine these, but it seems too tricky. */
488 rld[s_reload].nocombine = 1;
489 rld[s_reload].in_reg = 0;
490 rld[s_reload].out_reg = 0;
491 rld[s_reload].opnum = opnum;
492 rld[s_reload].when_needed = secondary_type;
493 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
494 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
495 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
496 rld[s_reload].secondary_out_icode
497 = ! in_p ? t_icode : CODE_FOR_nothing;
498 rld[s_reload].secondary_p = 1;
500 n_reloads++;
502 #ifdef SECONDARY_MEMORY_NEEDED
503 if (! in_p && icode == CODE_FOR_nothing
504 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
505 get_secondary_mem (x, mode, opnum, type);
506 #endif
509 *picode = icode;
510 return s_reload;
513 /* If a secondary reload is needed, return its class. If both an intermediate
514 register and a scratch register is needed, we return the class of the
515 intermediate register. */
516 enum reg_class
517 secondary_reload_class (bool in_p, enum reg_class class,
518 enum machine_mode mode, rtx x)
520 enum insn_code icode;
521 secondary_reload_info sri;
523 sri.icode = CODE_FOR_nothing;
524 sri.prev_sri = NULL;
525 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
526 icode = sri.icode;
528 /* If there are no secondary reloads at all, we return NO_REGS.
529 If an intermediate register is needed, we return its class. */
530 if (icode == CODE_FOR_nothing || class != NO_REGS)
531 return class;
533 /* No intermediate register is needed, but we have a special reload
534 pattern, which we assume for now needs a scratch register. */
535 return scratch_reload_class (icode);
538 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
539 three operands, verify that operand 2 is an output operand, and return
540 its register class.
541 ??? We'd like to be able to handle any pattern with at least 2 operands,
542 for zero or more scratch registers, but that needs more infrastructure. */
543 enum reg_class
544 scratch_reload_class (enum insn_code icode)
546 const char *scratch_constraint;
547 char scratch_letter;
548 enum reg_class class;
550 gcc_assert (insn_data[(int) icode].n_operands == 3);
551 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
552 gcc_assert (*scratch_constraint == '=');
553 scratch_constraint++;
554 if (*scratch_constraint == '&')
555 scratch_constraint++;
556 scratch_letter = *scratch_constraint;
557 if (scratch_letter == 'r')
558 return GENERAL_REGS;
559 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
560 scratch_constraint);
561 gcc_assert (class != NO_REGS);
562 return class;
565 #ifdef SECONDARY_MEMORY_NEEDED
567 /* Return a memory location that will be used to copy X in mode MODE.
568 If we haven't already made a location for this mode in this insn,
569 call find_reloads_address on the location being returned. */
572 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
573 int opnum, enum reload_type type)
575 rtx loc;
576 int mem_valid;
578 /* By default, if MODE is narrower than a word, widen it to a word.
579 This is required because most machines that require these memory
580 locations do not support short load and stores from all registers
581 (e.g., FP registers). */
583 #ifdef SECONDARY_MEMORY_NEEDED_MODE
584 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
585 #else
586 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
587 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
588 #endif
590 /* If we already have made a MEM for this operand in MODE, return it. */
591 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
592 return secondary_memlocs_elim[(int) mode][opnum];
594 /* If this is the first time we've tried to get a MEM for this mode,
595 allocate a new one. `something_changed' in reload will get set
596 by noticing that the frame size has changed. */
598 if (secondary_memlocs[(int) mode] == 0)
600 #ifdef SECONDARY_MEMORY_NEEDED_RTX
601 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
602 #else
603 secondary_memlocs[(int) mode]
604 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
605 #endif
608 /* Get a version of the address doing any eliminations needed. If that
609 didn't give us a new MEM, make a new one if it isn't valid. */
611 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
612 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
614 if (! mem_valid && loc == secondary_memlocs[(int) mode])
615 loc = copy_rtx (loc);
617 /* The only time the call below will do anything is if the stack
618 offset is too large. In that case IND_LEVELS doesn't matter, so we
619 can just pass a zero. Adjust the type to be the address of the
620 corresponding object. If the address was valid, save the eliminated
621 address. If it wasn't valid, we need to make a reload each time, so
622 don't save it. */
624 if (! mem_valid)
626 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
627 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
628 : RELOAD_OTHER);
630 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
631 opnum, type, 0, 0);
634 secondary_memlocs_elim[(int) mode][opnum] = loc;
635 if (secondary_memlocs_elim_used <= (int)mode)
636 secondary_memlocs_elim_used = (int)mode + 1;
637 return loc;
640 /* Clear any secondary memory locations we've made. */
642 void
643 clear_secondary_mem (void)
645 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
647 #endif /* SECONDARY_MEMORY_NEEDED */
650 /* Find the largest class which has at least one register valid in
651 mode INNER, and which for every such register, that register number
652 plus N is also valid in OUTER (if in range) and is cheap to move
653 into REGNO. Such a class must exist. */
655 static enum reg_class
656 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
657 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
658 unsigned int dest_regno ATTRIBUTE_UNUSED)
660 int best_cost = -1;
661 int class;
662 int regno;
663 enum reg_class best_class = NO_REGS;
664 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
665 unsigned int best_size = 0;
666 int cost;
668 for (class = 1; class < N_REG_CLASSES; class++)
670 int bad = 0;
671 int good = 0;
672 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
673 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
675 if (HARD_REGNO_MODE_OK (regno, inner))
677 good = 1;
678 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
679 || ! HARD_REGNO_MODE_OK (regno + n, outer))
680 bad = 1;
684 if (bad || !good)
685 continue;
686 cost = REGISTER_MOVE_COST (outer, class, dest_class);
688 if ((reg_class_size[class] > best_size
689 && (best_cost < 0 || best_cost >= cost))
690 || best_cost > cost)
692 best_class = class;
693 best_size = reg_class_size[class];
694 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
698 gcc_assert (best_size != 0);
700 return best_class;
703 /* Return the number of a previously made reload that can be combined with
704 a new one, or n_reloads if none of the existing reloads can be used.
705 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
706 push_reload, they determine the kind of the new reload that we try to
707 combine. P_IN points to the corresponding value of IN, which can be
708 modified by this function.
709 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
711 static int
712 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
713 enum reload_type type, int opnum, int dont_share)
715 rtx in = *p_in;
716 int i;
717 /* We can't merge two reloads if the output of either one is
718 earlyclobbered. */
720 if (earlyclobber_operand_p (out))
721 return n_reloads;
723 /* We can use an existing reload if the class is right
724 and at least one of IN and OUT is a match
725 and the other is at worst neutral.
726 (A zero compared against anything is neutral.)
728 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
729 for the same thing since that can cause us to need more reload registers
730 than we otherwise would. */
732 for (i = 0; i < n_reloads; i++)
733 if ((reg_class_subset_p (class, rld[i].class)
734 || reg_class_subset_p (rld[i].class, class))
735 /* If the existing reload has a register, it must fit our class. */
736 && (rld[i].reg_rtx == 0
737 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
738 true_regnum (rld[i].reg_rtx)))
739 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
740 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
741 || (out != 0 && MATCHES (rld[i].out, out)
742 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
743 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
744 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
745 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
746 return i;
748 /* Reloading a plain reg for input can match a reload to postincrement
749 that reg, since the postincrement's value is the right value.
750 Likewise, it can match a preincrement reload, since we regard
751 the preincrementation as happening before any ref in this insn
752 to that register. */
753 for (i = 0; i < n_reloads; i++)
754 if ((reg_class_subset_p (class, rld[i].class)
755 || reg_class_subset_p (rld[i].class, class))
756 /* If the existing reload has a register, it must fit our
757 class. */
758 && (rld[i].reg_rtx == 0
759 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
760 true_regnum (rld[i].reg_rtx)))
761 && out == 0 && rld[i].out == 0 && rld[i].in != 0
762 && ((REG_P (in)
763 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
764 && MATCHES (XEXP (rld[i].in, 0), in))
765 || (REG_P (rld[i].in)
766 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
767 && MATCHES (XEXP (in, 0), rld[i].in)))
768 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
769 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
770 && MERGABLE_RELOADS (type, rld[i].when_needed,
771 opnum, rld[i].opnum))
773 /* Make sure reload_in ultimately has the increment,
774 not the plain register. */
775 if (REG_P (in))
776 *p_in = rld[i].in;
777 return i;
779 return n_reloads;
782 /* Return nonzero if X is a SUBREG which will require reloading of its
783 SUBREG_REG expression. */
785 static int
786 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
788 rtx inner;
790 /* Only SUBREGs are problematical. */
791 if (GET_CODE (x) != SUBREG)
792 return 0;
794 inner = SUBREG_REG (x);
796 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
797 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
798 return 1;
800 /* If INNER is not a hard register, then INNER will not need to
801 be reloaded. */
802 if (!REG_P (inner)
803 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
804 return 0;
806 /* If INNER is not ok for MODE, then INNER will need reloading. */
807 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
808 return 1;
810 /* If the outer part is a word or smaller, INNER larger than a
811 word and the number of regs for INNER is not the same as the
812 number of words in INNER, then INNER will need reloading. */
813 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
814 && output
815 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
816 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
817 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
820 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
821 requiring an extra reload register. The caller has already found that
822 IN contains some reference to REGNO, so check that we can produce the
823 new value in a single step. E.g. if we have
824 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
825 instruction that adds one to a register, this should succeed.
826 However, if we have something like
827 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
828 needs to be loaded into a register first, we need a separate reload
829 register.
830 Such PLUS reloads are generated by find_reload_address_part.
831 The out-of-range PLUS expressions are usually introduced in the instruction
832 patterns by register elimination and substituting pseudos without a home
833 by their function-invariant equivalences. */
834 static int
835 can_reload_into (rtx in, int regno, enum machine_mode mode)
837 rtx dst, test_insn;
838 int r = 0;
839 struct recog_data save_recog_data;
841 /* For matching constraints, we often get notional input reloads where
842 we want to use the original register as the reload register. I.e.
843 technically this is a non-optional input-output reload, but IN is
844 already a valid register, and has been chosen as the reload register.
845 Speed this up, since it trivially works. */
846 if (REG_P (in))
847 return 1;
849 /* To test MEMs properly, we'd have to take into account all the reloads
850 that are already scheduled, which can become quite complicated.
851 And since we've already handled address reloads for this MEM, it
852 should always succeed anyway. */
853 if (MEM_P (in))
854 return 1;
856 /* If we can make a simple SET insn that does the job, everything should
857 be fine. */
858 dst = gen_rtx_REG (mode, regno);
859 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
860 save_recog_data = recog_data;
861 if (recog_memoized (test_insn) >= 0)
863 extract_insn (test_insn);
864 r = constrain_operands (1);
866 recog_data = save_recog_data;
867 return r;
870 /* Record one reload that needs to be performed.
871 IN is an rtx saying where the data are to be found before this instruction.
872 OUT says where they must be stored after the instruction.
873 (IN is zero for data not read, and OUT is zero for data not written.)
874 INLOC and OUTLOC point to the places in the instructions where
875 IN and OUT were found.
876 If IN and OUT are both nonzero, it means the same register must be used
877 to reload both IN and OUT.
879 CLASS is a register class required for the reloaded data.
880 INMODE is the machine mode that the instruction requires
881 for the reg that replaces IN and OUTMODE is likewise for OUT.
883 If IN is zero, then OUT's location and mode should be passed as
884 INLOC and INMODE.
886 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
888 OPTIONAL nonzero means this reload does not need to be performed:
889 it can be discarded if that is more convenient.
891 OPNUM and TYPE say what the purpose of this reload is.
893 The return value is the reload-number for this reload.
895 If both IN and OUT are nonzero, in some rare cases we might
896 want to make two separate reloads. (Actually we never do this now.)
897 Therefore, the reload-number for OUT is stored in
898 output_reloadnum when we return; the return value applies to IN.
899 Usually (presently always), when IN and OUT are nonzero,
900 the two reload-numbers are equal, but the caller should be careful to
901 distinguish them. */
904 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
905 enum reg_class class, enum machine_mode inmode,
906 enum machine_mode outmode, int strict_low, int optional,
907 int opnum, enum reload_type type)
909 int i;
910 int dont_share = 0;
911 int dont_remove_subreg = 0;
912 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
913 int secondary_in_reload = -1, secondary_out_reload = -1;
914 enum insn_code secondary_in_icode = CODE_FOR_nothing;
915 enum insn_code secondary_out_icode = CODE_FOR_nothing;
917 /* INMODE and/or OUTMODE could be VOIDmode if no mode
918 has been specified for the operand. In that case,
919 use the operand's mode as the mode to reload. */
920 if (inmode == VOIDmode && in != 0)
921 inmode = GET_MODE (in);
922 if (outmode == VOIDmode && out != 0)
923 outmode = GET_MODE (out);
925 /* If IN is a pseudo register everywhere-equivalent to a constant, and
926 it is not in a hard register, reload straight from the constant,
927 since we want to get rid of such pseudo registers.
928 Often this is done earlier, but not always in find_reloads_address. */
929 if (in != 0 && REG_P (in))
931 int regno = REGNO (in);
933 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
934 && reg_equiv_constant[regno] != 0)
935 in = reg_equiv_constant[regno];
938 /* Likewise for OUT. Of course, OUT will never be equivalent to
939 an actual constant, but it might be equivalent to a memory location
940 (in the case of a parameter). */
941 if (out != 0 && REG_P (out))
943 int regno = REGNO (out);
945 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
946 && reg_equiv_constant[regno] != 0)
947 out = reg_equiv_constant[regno];
950 /* If we have a read-write operand with an address side-effect,
951 change either IN or OUT so the side-effect happens only once. */
952 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
953 switch (GET_CODE (XEXP (in, 0)))
955 case POST_INC: case POST_DEC: case POST_MODIFY:
956 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
957 break;
959 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
960 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
961 break;
963 default:
964 break;
967 /* If we are reloading a (SUBREG constant ...), really reload just the
968 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
969 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
970 a pseudo and hence will become a MEM) with M1 wider than M2 and the
971 register is a pseudo, also reload the inside expression.
972 For machines that extend byte loads, do this for any SUBREG of a pseudo
973 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
974 M2 is an integral mode that gets extended when loaded.
975 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
976 either M1 is not valid for R or M2 is wider than a word but we only
977 need one word to store an M2-sized quantity in R.
978 (However, if OUT is nonzero, we need to reload the reg *and*
979 the subreg, so do nothing here, and let following statement handle it.)
981 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
982 we can't handle it here because CONST_INT does not indicate a mode.
984 Similarly, we must reload the inside expression if we have a
985 STRICT_LOW_PART (presumably, in == out in the cas).
987 Also reload the inner expression if it does not require a secondary
988 reload but the SUBREG does.
990 Finally, reload the inner expression if it is a register that is in
991 the class whose registers cannot be referenced in a different size
992 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
993 cannot reload just the inside since we might end up with the wrong
994 register class. But if it is inside a STRICT_LOW_PART, we have
995 no choice, so we hope we do get the right register class there. */
997 if (in != 0 && GET_CODE (in) == SUBREG
998 && (subreg_lowpart_p (in) || strict_low)
999 #ifdef CANNOT_CHANGE_MODE_CLASS
1000 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1001 #endif
1002 && (CONSTANT_P (SUBREG_REG (in))
1003 || GET_CODE (SUBREG_REG (in)) == PLUS
1004 || strict_low
1005 || (((REG_P (SUBREG_REG (in))
1006 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1007 || MEM_P (SUBREG_REG (in)))
1008 && ((GET_MODE_SIZE (inmode)
1009 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1010 #ifdef LOAD_EXTEND_OP
1011 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 <= UNITS_PER_WORD)
1014 && (GET_MODE_SIZE (inmode)
1015 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1016 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1017 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1018 #endif
1019 #ifdef WORD_REGISTER_OPERATIONS
1020 || ((GET_MODE_SIZE (inmode)
1021 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1022 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1023 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1024 / UNITS_PER_WORD)))
1025 #endif
1027 || (REG_P (SUBREG_REG (in))
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1029 /* The case where out is nonzero
1030 is handled differently in the following statement. */
1031 && (out == 0 || subreg_lowpart_p (in))
1032 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1033 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1034 > UNITS_PER_WORD)
1035 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1036 / UNITS_PER_WORD)
1037 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1038 [GET_MODE (SUBREG_REG (in))]))
1039 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1040 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1041 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1042 SUBREG_REG (in))
1043 == NO_REGS))
1044 #ifdef CANNOT_CHANGE_MODE_CLASS
1045 || (REG_P (SUBREG_REG (in))
1046 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1047 && REG_CANNOT_CHANGE_MODE_P
1048 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1049 #endif
1052 in_subreg_loc = inloc;
1053 inloc = &SUBREG_REG (in);
1054 in = *inloc;
1055 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1056 if (MEM_P (in))
1057 /* This is supposed to happen only for paradoxical subregs made by
1058 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1059 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1060 #endif
1061 inmode = GET_MODE (in);
1064 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1065 either M1 is not valid for R or M2 is wider than a word but we only
1066 need one word to store an M2-sized quantity in R.
1068 However, we must reload the inner reg *as well as* the subreg in
1069 that case. */
1071 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1072 code above. This can happen if SUBREG_BYTE != 0. */
1074 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1076 enum reg_class in_class = class;
1078 if (REG_P (SUBREG_REG (in)))
1079 in_class
1080 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1081 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1082 GET_MODE (SUBREG_REG (in)),
1083 SUBREG_BYTE (in),
1084 GET_MODE (in)),
1085 REGNO (SUBREG_REG (in)));
1087 /* This relies on the fact that emit_reload_insns outputs the
1088 instructions for input reloads of type RELOAD_OTHER in the same
1089 order as the reloads. Thus if the outer reload is also of type
1090 RELOAD_OTHER, we are guaranteed that this inner reload will be
1091 output before the outer reload. */
1092 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1093 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1094 dont_remove_subreg = 1;
1097 /* Similarly for paradoxical and problematical SUBREGs on the output.
1098 Note that there is no reason we need worry about the previous value
1099 of SUBREG_REG (out); even if wider than out,
1100 storing in a subreg is entitled to clobber it all
1101 (except in the case of STRICT_LOW_PART,
1102 and in that case the constraint should label it input-output.) */
1103 if (out != 0 && GET_CODE (out) == SUBREG
1104 && (subreg_lowpart_p (out) || strict_low)
1105 #ifdef CANNOT_CHANGE_MODE_CLASS
1106 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1107 #endif
1108 && (CONSTANT_P (SUBREG_REG (out))
1109 || strict_low
1110 || (((REG_P (SUBREG_REG (out))
1111 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1112 || MEM_P (SUBREG_REG (out)))
1113 && ((GET_MODE_SIZE (outmode)
1114 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1115 #ifdef WORD_REGISTER_OPERATIONS
1116 || ((GET_MODE_SIZE (outmode)
1117 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1118 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1119 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1120 / UNITS_PER_WORD)))
1121 #endif
1123 || (REG_P (SUBREG_REG (out))
1124 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1125 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1126 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1127 > UNITS_PER_WORD)
1128 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1129 / UNITS_PER_WORD)
1130 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1131 [GET_MODE (SUBREG_REG (out))]))
1132 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1133 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1134 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1135 SUBREG_REG (out))
1136 == NO_REGS))
1137 #ifdef CANNOT_CHANGE_MODE_CLASS
1138 || (REG_P (SUBREG_REG (out))
1139 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1140 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1141 GET_MODE (SUBREG_REG (out)),
1142 outmode))
1143 #endif
1146 out_subreg_loc = outloc;
1147 outloc = &SUBREG_REG (out);
1148 out = *outloc;
1149 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1150 gcc_assert (!MEM_P (out)
1151 || GET_MODE_SIZE (GET_MODE (out))
1152 <= GET_MODE_SIZE (outmode));
1153 #endif
1154 outmode = GET_MODE (out);
1157 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1158 either M1 is not valid for R or M2 is wider than a word but we only
1159 need one word to store an M2-sized quantity in R.
1161 However, we must reload the inner reg *as well as* the subreg in
1162 that case. In this case, the inner reg is an in-out reload. */
1164 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1166 /* This relies on the fact that emit_reload_insns outputs the
1167 instructions for output reloads of type RELOAD_OTHER in reverse
1168 order of the reloads. Thus if the outer reload is also of type
1169 RELOAD_OTHER, we are guaranteed that this inner reload will be
1170 output after the outer reload. */
1171 dont_remove_subreg = 1;
1172 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1173 &SUBREG_REG (out),
1174 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1175 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1176 GET_MODE (SUBREG_REG (out)),
1177 SUBREG_BYTE (out),
1178 GET_MODE (out)),
1179 REGNO (SUBREG_REG (out))),
1180 VOIDmode, VOIDmode, 0, 0,
1181 opnum, RELOAD_OTHER);
1184 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1185 if (in != 0 && out != 0 && MEM_P (out)
1186 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1187 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1188 dont_share = 1;
1190 /* If IN is a SUBREG of a hard register, make a new REG. This
1191 simplifies some of the cases below. */
1193 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1194 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1195 && ! dont_remove_subreg)
1196 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1198 /* Similarly for OUT. */
1199 if (out != 0 && GET_CODE (out) == SUBREG
1200 && REG_P (SUBREG_REG (out))
1201 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1202 && ! dont_remove_subreg)
1203 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1205 /* Narrow down the class of register wanted if that is
1206 desirable on this machine for efficiency. */
1208 enum reg_class preferred_class = class;
1210 if (in != 0)
1211 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1213 /* Output reloads may need analogous treatment, different in detail. */
1214 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1215 if (out != 0)
1216 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1217 #endif
1219 /* Discard what the target said if we cannot do it. */
1220 if (preferred_class != NO_REGS
1221 || (optional && type == RELOAD_FOR_OUTPUT))
1222 class = preferred_class;
1225 /* Make sure we use a class that can handle the actual pseudo
1226 inside any subreg. For example, on the 386, QImode regs
1227 can appear within SImode subregs. Although GENERAL_REGS
1228 can handle SImode, QImode needs a smaller class. */
1229 #ifdef LIMIT_RELOAD_CLASS
1230 if (in_subreg_loc)
1231 class = LIMIT_RELOAD_CLASS (inmode, class);
1232 else if (in != 0 && GET_CODE (in) == SUBREG)
1233 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1235 if (out_subreg_loc)
1236 class = LIMIT_RELOAD_CLASS (outmode, class);
1237 if (out != 0 && GET_CODE (out) == SUBREG)
1238 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1239 #endif
1241 /* Verify that this class is at least possible for the mode that
1242 is specified. */
1243 if (this_insn_is_asm)
1245 enum machine_mode mode;
1246 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1247 mode = inmode;
1248 else
1249 mode = outmode;
1250 if (mode == VOIDmode)
1252 error_for_asm (this_insn, "cannot reload integer constant "
1253 "operand in %<asm%>");
1254 mode = word_mode;
1255 if (in != 0)
1256 inmode = word_mode;
1257 if (out != 0)
1258 outmode = word_mode;
1260 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1261 if (HARD_REGNO_MODE_OK (i, mode)
1262 && in_hard_reg_set_p (reg_class_contents[(int) class], mode, i))
1263 break;
1264 if (i == FIRST_PSEUDO_REGISTER)
1266 error_for_asm (this_insn, "impossible register constraint "
1267 "in %<asm%>");
1268 /* Avoid further trouble with this insn. */
1269 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1270 /* We used to continue here setting class to ALL_REGS, but it triggers
1271 sanity check on i386 for:
1272 void foo(long double d)
1274 asm("" :: "a" (d));
1276 Returning zero here ought to be safe as we take care in
1277 find_reloads to not process the reloads when instruction was
1278 replaced by USE. */
1280 return 0;
1284 /* Optional output reloads are always OK even if we have no register class,
1285 since the function of these reloads is only to have spill_reg_store etc.
1286 set, so that the storing insn can be deleted later. */
1287 gcc_assert (class != NO_REGS
1288 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1290 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1292 if (i == n_reloads)
1294 /* See if we need a secondary reload register to move between CLASS
1295 and IN or CLASS and OUT. Get the icode and push any required reloads
1296 needed for each of them if so. */
1298 if (in != 0)
1299 secondary_in_reload
1300 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1301 &secondary_in_icode, NULL);
1302 if (out != 0 && GET_CODE (out) != SCRATCH)
1303 secondary_out_reload
1304 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1305 type, &secondary_out_icode, NULL);
1307 /* We found no existing reload suitable for re-use.
1308 So add an additional reload. */
1310 #ifdef SECONDARY_MEMORY_NEEDED
1311 /* If a memory location is needed for the copy, make one. */
1312 if (in != 0
1313 && (REG_P (in)
1314 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1315 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1316 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1317 class, inmode))
1318 get_secondary_mem (in, inmode, opnum, type);
1319 #endif
1321 i = n_reloads;
1322 rld[i].in = in;
1323 rld[i].out = out;
1324 rld[i].class = class;
1325 rld[i].inmode = inmode;
1326 rld[i].outmode = outmode;
1327 rld[i].reg_rtx = 0;
1328 rld[i].optional = optional;
1329 rld[i].inc = 0;
1330 rld[i].nocombine = 0;
1331 rld[i].in_reg = inloc ? *inloc : 0;
1332 rld[i].out_reg = outloc ? *outloc : 0;
1333 rld[i].opnum = opnum;
1334 rld[i].when_needed = type;
1335 rld[i].secondary_in_reload = secondary_in_reload;
1336 rld[i].secondary_out_reload = secondary_out_reload;
1337 rld[i].secondary_in_icode = secondary_in_icode;
1338 rld[i].secondary_out_icode = secondary_out_icode;
1339 rld[i].secondary_p = 0;
1341 n_reloads++;
1343 #ifdef SECONDARY_MEMORY_NEEDED
1344 if (out != 0
1345 && (REG_P (out)
1346 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1347 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1348 && SECONDARY_MEMORY_NEEDED (class,
1349 REGNO_REG_CLASS (reg_or_subregno (out)),
1350 outmode))
1351 get_secondary_mem (out, outmode, opnum, type);
1352 #endif
1354 else
1356 /* We are reusing an existing reload,
1357 but we may have additional information for it.
1358 For example, we may now have both IN and OUT
1359 while the old one may have just one of them. */
1361 /* The modes can be different. If they are, we want to reload in
1362 the larger mode, so that the value is valid for both modes. */
1363 if (inmode != VOIDmode
1364 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1365 rld[i].inmode = inmode;
1366 if (outmode != VOIDmode
1367 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1368 rld[i].outmode = outmode;
1369 if (in != 0)
1371 rtx in_reg = inloc ? *inloc : 0;
1372 /* If we merge reloads for two distinct rtl expressions that
1373 are identical in content, there might be duplicate address
1374 reloads. Remove the extra set now, so that if we later find
1375 that we can inherit this reload, we can get rid of the
1376 address reloads altogether.
1378 Do not do this if both reloads are optional since the result
1379 would be an optional reload which could potentially leave
1380 unresolved address replacements.
1382 It is not sufficient to call transfer_replacements since
1383 choose_reload_regs will remove the replacements for address
1384 reloads of inherited reloads which results in the same
1385 problem. */
1386 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1387 && ! (rld[i].optional && optional))
1389 /* We must keep the address reload with the lower operand
1390 number alive. */
1391 if (opnum > rld[i].opnum)
1393 remove_address_replacements (in);
1394 in = rld[i].in;
1395 in_reg = rld[i].in_reg;
1397 else
1398 remove_address_replacements (rld[i].in);
1400 rld[i].in = in;
1401 rld[i].in_reg = in_reg;
1403 if (out != 0)
1405 rld[i].out = out;
1406 rld[i].out_reg = outloc ? *outloc : 0;
1408 if (reg_class_subset_p (class, rld[i].class))
1409 rld[i].class = class;
1410 rld[i].optional &= optional;
1411 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1412 opnum, rld[i].opnum))
1413 rld[i].when_needed = RELOAD_OTHER;
1414 rld[i].opnum = MIN (rld[i].opnum, opnum);
1417 /* If the ostensible rtx being reloaded differs from the rtx found
1418 in the location to substitute, this reload is not safe to combine
1419 because we cannot reliably tell whether it appears in the insn. */
1421 if (in != 0 && in != *inloc)
1422 rld[i].nocombine = 1;
1424 #if 0
1425 /* This was replaced by changes in find_reloads_address_1 and the new
1426 function inc_for_reload, which go with a new meaning of reload_inc. */
1428 /* If this is an IN/OUT reload in an insn that sets the CC,
1429 it must be for an autoincrement. It doesn't work to store
1430 the incremented value after the insn because that would clobber the CC.
1431 So we must do the increment of the value reloaded from,
1432 increment it, store it back, then decrement again. */
1433 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1435 out = 0;
1436 rld[i].out = 0;
1437 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1438 /* If we did not find a nonzero amount-to-increment-by,
1439 that contradicts the belief that IN is being incremented
1440 in an address in this insn. */
1441 gcc_assert (rld[i].inc != 0);
1443 #endif
1445 /* If we will replace IN and OUT with the reload-reg,
1446 record where they are located so that substitution need
1447 not do a tree walk. */
1449 if (replace_reloads)
1451 if (inloc != 0)
1453 struct replacement *r = &replacements[n_replacements++];
1454 r->what = i;
1455 r->subreg_loc = in_subreg_loc;
1456 r->where = inloc;
1457 r->mode = inmode;
1459 if (outloc != 0 && outloc != inloc)
1461 struct replacement *r = &replacements[n_replacements++];
1462 r->what = i;
1463 r->where = outloc;
1464 r->subreg_loc = out_subreg_loc;
1465 r->mode = outmode;
1469 /* If this reload is just being introduced and it has both
1470 an incoming quantity and an outgoing quantity that are
1471 supposed to be made to match, see if either one of the two
1472 can serve as the place to reload into.
1474 If one of them is acceptable, set rld[i].reg_rtx
1475 to that one. */
1477 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1479 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1480 inmode, outmode,
1481 rld[i].class, i,
1482 earlyclobber_operand_p (out));
1484 /* If the outgoing register already contains the same value
1485 as the incoming one, we can dispense with loading it.
1486 The easiest way to tell the caller that is to give a phony
1487 value for the incoming operand (same as outgoing one). */
1488 if (rld[i].reg_rtx == out
1489 && (REG_P (in) || CONSTANT_P (in))
1490 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1491 static_reload_reg_p, i, inmode))
1492 rld[i].in = out;
1495 /* If this is an input reload and the operand contains a register that
1496 dies in this insn and is used nowhere else, see if it is the right class
1497 to be used for this reload. Use it if so. (This occurs most commonly
1498 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1499 this if it is also an output reload that mentions the register unless
1500 the output is a SUBREG that clobbers an entire register.
1502 Note that the operand might be one of the spill regs, if it is a
1503 pseudo reg and we are in a block where spilling has not taken place.
1504 But if there is no spilling in this block, that is OK.
1505 An explicitly used hard reg cannot be a spill reg. */
1507 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1509 rtx note;
1510 int regno;
1511 enum machine_mode rel_mode = inmode;
1513 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1514 rel_mode = outmode;
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
1518 && REG_P (XEXP (note, 0))
1519 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1520 && reg_mentioned_p (XEXP (note, 0), in)
1521 /* Check that we don't use a hardreg for an uninitialized
1522 pseudo. See also find_dummy_reload(). */
1523 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1524 || ! bitmap_bit_p (DF_RA_LIVE_OUT (ENTRY_BLOCK_PTR),
1525 ORIGINAL_REGNO (XEXP (note, 0))))
1526 && ! refers_to_regno_for_reload_p (regno,
1527 end_hard_regno (rel_mode,
1528 regno),
1529 PATTERN (this_insn), inloc)
1530 /* If this is also an output reload, IN cannot be used as
1531 the reload register if it is set in this insn unless IN
1532 is also OUT. */
1533 && (out == 0 || in == out
1534 || ! hard_reg_set_here_p (regno,
1535 end_hard_regno (rel_mode, regno),
1536 PATTERN (this_insn)))
1537 /* ??? Why is this code so different from the previous?
1538 Is there any simple coherent way to describe the two together?
1539 What's going on here. */
1540 && (in != out
1541 || (GET_CODE (in) == SUBREG
1542 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1543 / UNITS_PER_WORD)
1544 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1545 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1546 /* Make sure the operand fits in the reg that dies. */
1547 && (GET_MODE_SIZE (rel_mode)
1548 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1549 && HARD_REGNO_MODE_OK (regno, inmode)
1550 && HARD_REGNO_MODE_OK (regno, outmode))
1552 unsigned int offs;
1553 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1554 hard_regno_nregs[regno][outmode]);
1556 for (offs = 0; offs < nregs; offs++)
1557 if (fixed_regs[regno + offs]
1558 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1559 regno + offs))
1560 break;
1562 if (offs == nregs
1563 && (! (refers_to_regno_for_reload_p
1564 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1565 || can_reload_into (in, regno, inmode)))
1567 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1568 break;
1573 if (out)
1574 output_reloadnum = i;
1576 return i;
1579 /* Record an additional place we must replace a value
1580 for which we have already recorded a reload.
1581 RELOADNUM is the value returned by push_reload
1582 when the reload was recorded.
1583 This is used in insn patterns that use match_dup. */
1585 static void
1586 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1588 if (replace_reloads)
1590 struct replacement *r = &replacements[n_replacements++];
1591 r->what = reloadnum;
1592 r->where = loc;
1593 r->subreg_loc = 0;
1594 r->mode = mode;
1598 /* Duplicate any replacement we have recorded to apply at
1599 location ORIG_LOC to also be performed at DUP_LOC.
1600 This is used in insn patterns that use match_dup. */
1602 static void
1603 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1605 int i, n = n_replacements;
1607 for (i = 0; i < n; i++)
1609 struct replacement *r = &replacements[i];
1610 if (r->where == orig_loc)
1611 push_replacement (dup_loc, r->what, r->mode);
1615 /* Transfer all replacements that used to be in reload FROM to be in
1616 reload TO. */
1618 void
1619 transfer_replacements (int to, int from)
1621 int i;
1623 for (i = 0; i < n_replacements; i++)
1624 if (replacements[i].what == from)
1625 replacements[i].what = to;
1628 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1629 or a subpart of it. If we have any replacements registered for IN_RTX,
1630 cancel the reloads that were supposed to load them.
1631 Return nonzero if we canceled any reloads. */
1633 remove_address_replacements (rtx in_rtx)
1635 int i, j;
1636 char reload_flags[MAX_RELOADS];
1637 int something_changed = 0;
1639 memset (reload_flags, 0, sizeof reload_flags);
1640 for (i = 0, j = 0; i < n_replacements; i++)
1642 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1643 reload_flags[replacements[i].what] |= 1;
1644 else
1646 replacements[j++] = replacements[i];
1647 reload_flags[replacements[i].what] |= 2;
1650 /* Note that the following store must be done before the recursive calls. */
1651 n_replacements = j;
1653 for (i = n_reloads - 1; i >= 0; i--)
1655 if (reload_flags[i] == 1)
1657 deallocate_reload_reg (i);
1658 remove_address_replacements (rld[i].in);
1659 rld[i].in = 0;
1660 something_changed = 1;
1663 return something_changed;
1666 /* If there is only one output reload, and it is not for an earlyclobber
1667 operand, try to combine it with a (logically unrelated) input reload
1668 to reduce the number of reload registers needed.
1670 This is safe if the input reload does not appear in
1671 the value being output-reloaded, because this implies
1672 it is not needed any more once the original insn completes.
1674 If that doesn't work, see we can use any of the registers that
1675 die in this insn as a reload register. We can if it is of the right
1676 class and does not appear in the value being output-reloaded. */
1678 static void
1679 combine_reloads (void)
1681 int i;
1682 int output_reload = -1;
1683 int secondary_out = -1;
1684 rtx note;
1686 /* Find the output reload; return unless there is exactly one
1687 and that one is mandatory. */
1689 for (i = 0; i < n_reloads; i++)
1690 if (rld[i].out != 0)
1692 if (output_reload >= 0)
1693 return;
1694 output_reload = i;
1697 if (output_reload < 0 || rld[output_reload].optional)
1698 return;
1700 /* An input-output reload isn't combinable. */
1702 if (rld[output_reload].in != 0)
1703 return;
1705 /* If this reload is for an earlyclobber operand, we can't do anything. */
1706 if (earlyclobber_operand_p (rld[output_reload].out))
1707 return;
1709 /* If there is a reload for part of the address of this operand, we would
1710 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1711 its life to the point where doing this combine would not lower the
1712 number of spill registers needed. */
1713 for (i = 0; i < n_reloads; i++)
1714 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1715 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1716 && rld[i].opnum == rld[output_reload].opnum)
1717 return;
1719 /* Check each input reload; can we combine it? */
1721 for (i = 0; i < n_reloads; i++)
1722 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1723 /* Life span of this reload must not extend past main insn. */
1724 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1725 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1726 && rld[i].when_needed != RELOAD_OTHER
1727 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1728 == CLASS_MAX_NREGS (rld[output_reload].class,
1729 rld[output_reload].outmode))
1730 && rld[i].inc == 0
1731 && rld[i].reg_rtx == 0
1732 #ifdef SECONDARY_MEMORY_NEEDED
1733 /* Don't combine two reloads with different secondary
1734 memory locations. */
1735 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1736 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1737 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1738 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1739 #endif
1740 && (SMALL_REGISTER_CLASSES
1741 ? (rld[i].class == rld[output_reload].class)
1742 : (reg_class_subset_p (rld[i].class,
1743 rld[output_reload].class)
1744 || reg_class_subset_p (rld[output_reload].class,
1745 rld[i].class)))
1746 && (MATCHES (rld[i].in, rld[output_reload].out)
1747 /* Args reversed because the first arg seems to be
1748 the one that we imagine being modified
1749 while the second is the one that might be affected. */
1750 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1751 rld[i].in)
1752 /* However, if the input is a register that appears inside
1753 the output, then we also can't share.
1754 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1755 If the same reload reg is used for both reg 69 and the
1756 result to be stored in memory, then that result
1757 will clobber the address of the memory ref. */
1758 && ! (REG_P (rld[i].in)
1759 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1760 rld[output_reload].out))))
1761 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1762 rld[i].when_needed != RELOAD_FOR_INPUT)
1763 && (reg_class_size[(int) rld[i].class]
1764 || SMALL_REGISTER_CLASSES)
1765 /* We will allow making things slightly worse by combining an
1766 input and an output, but no worse than that. */
1767 && (rld[i].when_needed == RELOAD_FOR_INPUT
1768 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1770 int j;
1772 /* We have found a reload to combine with! */
1773 rld[i].out = rld[output_reload].out;
1774 rld[i].out_reg = rld[output_reload].out_reg;
1775 rld[i].outmode = rld[output_reload].outmode;
1776 /* Mark the old output reload as inoperative. */
1777 rld[output_reload].out = 0;
1778 /* The combined reload is needed for the entire insn. */
1779 rld[i].when_needed = RELOAD_OTHER;
1780 /* If the output reload had a secondary reload, copy it. */
1781 if (rld[output_reload].secondary_out_reload != -1)
1783 rld[i].secondary_out_reload
1784 = rld[output_reload].secondary_out_reload;
1785 rld[i].secondary_out_icode
1786 = rld[output_reload].secondary_out_icode;
1789 #ifdef SECONDARY_MEMORY_NEEDED
1790 /* Copy any secondary MEM. */
1791 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1792 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1793 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1794 #endif
1795 /* If required, minimize the register class. */
1796 if (reg_class_subset_p (rld[output_reload].class,
1797 rld[i].class))
1798 rld[i].class = rld[output_reload].class;
1800 /* Transfer all replacements from the old reload to the combined. */
1801 for (j = 0; j < n_replacements; j++)
1802 if (replacements[j].what == output_reload)
1803 replacements[j].what = i;
1805 return;
1808 /* If this insn has only one operand that is modified or written (assumed
1809 to be the first), it must be the one corresponding to this reload. It
1810 is safe to use anything that dies in this insn for that output provided
1811 that it does not occur in the output (we already know it isn't an
1812 earlyclobber. If this is an asm insn, give up. */
1814 if (INSN_CODE (this_insn) == -1)
1815 return;
1817 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1818 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1819 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1820 return;
1822 /* See if some hard register that dies in this insn and is not used in
1823 the output is the right class. Only works if the register we pick
1824 up can fully hold our output reload. */
1825 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1826 if (REG_NOTE_KIND (note) == REG_DEAD
1827 && REG_P (XEXP (note, 0))
1828 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1829 rld[output_reload].out)
1830 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1831 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1832 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1833 REGNO (XEXP (note, 0)))
1834 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1835 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1836 /* Ensure that a secondary or tertiary reload for this output
1837 won't want this register. */
1838 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1839 || (! (TEST_HARD_REG_BIT
1840 (reg_class_contents[(int) rld[secondary_out].class],
1841 REGNO (XEXP (note, 0))))
1842 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1843 || ! (TEST_HARD_REG_BIT
1844 (reg_class_contents[(int) rld[secondary_out].class],
1845 REGNO (XEXP (note, 0)))))))
1846 && ! fixed_regs[REGNO (XEXP (note, 0))]
1847 /* Check that we don't use a hardreg for an uninitialized
1848 pseudo. See also find_dummy_reload(). */
1849 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1850 || ! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1851 ORIGINAL_REGNO (XEXP (note, 0)))))
1853 rld[output_reload].reg_rtx
1854 = gen_rtx_REG (rld[output_reload].outmode,
1855 REGNO (XEXP (note, 0)));
1856 return;
1860 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1861 See if one of IN and OUT is a register that may be used;
1862 this is desirable since a spill-register won't be needed.
1863 If so, return the register rtx that proves acceptable.
1865 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1866 CLASS is the register class required for the reload.
1868 If FOR_REAL is >= 0, it is the number of the reload,
1869 and in some cases when it can be discovered that OUT doesn't need
1870 to be computed, clear out rld[FOR_REAL].out.
1872 If FOR_REAL is -1, this should not be done, because this call
1873 is just to see if a register can be found, not to find and install it.
1875 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1876 puts an additional constraint on being able to use IN for OUT since
1877 IN must not appear elsewhere in the insn (it is assumed that IN itself
1878 is safe from the earlyclobber). */
1880 static rtx
1881 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1882 enum machine_mode inmode, enum machine_mode outmode,
1883 enum reg_class class, int for_real, int earlyclobber)
1885 rtx in = real_in;
1886 rtx out = real_out;
1887 int in_offset = 0;
1888 int out_offset = 0;
1889 rtx value = 0;
1891 /* If operands exceed a word, we can't use either of them
1892 unless they have the same size. */
1893 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1894 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1895 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1896 return 0;
1898 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1899 respectively refers to a hard register. */
1901 /* Find the inside of any subregs. */
1902 while (GET_CODE (out) == SUBREG)
1904 if (REG_P (SUBREG_REG (out))
1905 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1906 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1907 GET_MODE (SUBREG_REG (out)),
1908 SUBREG_BYTE (out),
1909 GET_MODE (out));
1910 out = SUBREG_REG (out);
1912 while (GET_CODE (in) == SUBREG)
1914 if (REG_P (SUBREG_REG (in))
1915 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1916 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1917 GET_MODE (SUBREG_REG (in)),
1918 SUBREG_BYTE (in),
1919 GET_MODE (in));
1920 in = SUBREG_REG (in);
1923 /* Narrow down the reg class, the same way push_reload will;
1924 otherwise we might find a dummy now, but push_reload won't. */
1926 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1927 if (preferred_class != NO_REGS)
1928 class = preferred_class;
1931 /* See if OUT will do. */
1932 if (REG_P (out)
1933 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1935 unsigned int regno = REGNO (out) + out_offset;
1936 unsigned int nwords = hard_regno_nregs[regno][outmode];
1937 rtx saved_rtx;
1939 /* When we consider whether the insn uses OUT,
1940 ignore references within IN. They don't prevent us
1941 from copying IN into OUT, because those refs would
1942 move into the insn that reloads IN.
1944 However, we only ignore IN in its role as this reload.
1945 If the insn uses IN elsewhere and it contains OUT,
1946 that counts. We can't be sure it's the "same" operand
1947 so it might not go through this reload. */
1948 saved_rtx = *inloc;
1949 *inloc = const0_rtx;
1951 if (regno < FIRST_PSEUDO_REGISTER
1952 && HARD_REGNO_MODE_OK (regno, outmode)
1953 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1954 PATTERN (this_insn), outloc))
1956 unsigned int i;
1958 for (i = 0; i < nwords; i++)
1959 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1960 regno + i))
1961 break;
1963 if (i == nwords)
1965 if (REG_P (real_out))
1966 value = real_out;
1967 else
1968 value = gen_rtx_REG (outmode, regno);
1972 *inloc = saved_rtx;
1975 /* Consider using IN if OUT was not acceptable
1976 or if OUT dies in this insn (like the quotient in a divmod insn).
1977 We can't use IN unless it is dies in this insn,
1978 which means we must know accurately which hard regs are live.
1979 Also, the result can't go in IN if IN is used within OUT,
1980 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1981 if (hard_regs_live_known
1982 && REG_P (in)
1983 && REGNO (in) < FIRST_PSEUDO_REGISTER
1984 && (value == 0
1985 || find_reg_note (this_insn, REG_UNUSED, real_out))
1986 && find_reg_note (this_insn, REG_DEAD, real_in)
1987 && !fixed_regs[REGNO (in)]
1988 && HARD_REGNO_MODE_OK (REGNO (in),
1989 /* The only case where out and real_out might
1990 have different modes is where real_out
1991 is a subreg, and in that case, out
1992 has a real mode. */
1993 (GET_MODE (out) != VOIDmode
1994 ? GET_MODE (out) : outmode))
1995 /* But only do all this if we can be sure, that this input
1996 operand doesn't correspond with an uninitialized pseudoreg.
1997 global can assign some hardreg to it, which is the same as
1998 a different pseudo also currently live (as it can ignore the
1999 conflict). So we never must introduce writes to such hardregs,
2000 as they would clobber the other live pseudo using the same.
2001 See also PR20973. */
2002 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2003 || ! bitmap_bit_p (DF_RA_LIVE_OUT (ENTRY_BLOCK_PTR),
2004 ORIGINAL_REGNO (in))))
2006 unsigned int regno = REGNO (in) + in_offset;
2007 unsigned int nwords = hard_regno_nregs[regno][inmode];
2009 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2010 && ! hard_reg_set_here_p (regno, regno + nwords,
2011 PATTERN (this_insn))
2012 && (! earlyclobber
2013 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2014 PATTERN (this_insn), inloc)))
2016 unsigned int i;
2018 for (i = 0; i < nwords; i++)
2019 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2020 regno + i))
2021 break;
2023 if (i == nwords)
2025 /* If we were going to use OUT as the reload reg
2026 and changed our mind, it means OUT is a dummy that
2027 dies here. So don't bother copying value to it. */
2028 if (for_real >= 0 && value == real_out)
2029 rld[for_real].out = 0;
2030 if (REG_P (real_in))
2031 value = real_in;
2032 else
2033 value = gen_rtx_REG (inmode, regno);
2038 return value;
2041 /* This page contains subroutines used mainly for determining
2042 whether the IN or an OUT of a reload can serve as the
2043 reload register. */
2045 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2048 earlyclobber_operand_p (rtx x)
2050 int i;
2052 for (i = 0; i < n_earlyclobbers; i++)
2053 if (reload_earlyclobbers[i] == x)
2054 return 1;
2056 return 0;
2059 /* Return 1 if expression X alters a hard reg in the range
2060 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2061 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2062 X should be the body of an instruction. */
2064 static int
2065 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2067 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2069 rtx op0 = SET_DEST (x);
2071 while (GET_CODE (op0) == SUBREG)
2072 op0 = SUBREG_REG (op0);
2073 if (REG_P (op0))
2075 unsigned int r = REGNO (op0);
2077 /* See if this reg overlaps range under consideration. */
2078 if (r < end_regno
2079 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2080 return 1;
2083 else if (GET_CODE (x) == PARALLEL)
2085 int i = XVECLEN (x, 0) - 1;
2087 for (; i >= 0; i--)
2088 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2089 return 1;
2092 return 0;
2095 /* Return 1 if ADDR is a valid memory address for mode MODE,
2096 and check that each pseudo reg has the proper kind of
2097 hard reg. */
2100 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2102 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2103 return 0;
2105 win:
2106 return 1;
2109 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2110 if they are the same hard reg, and has special hacks for
2111 autoincrement and autodecrement.
2112 This is specifically intended for find_reloads to use
2113 in determining whether two operands match.
2114 X is the operand whose number is the lower of the two.
2116 The value is 2 if Y contains a pre-increment that matches
2117 a non-incrementing address in X. */
2119 /* ??? To be completely correct, we should arrange to pass
2120 for X the output operand and for Y the input operand.
2121 For now, we assume that the output operand has the lower number
2122 because that is natural in (SET output (... input ...)). */
2125 operands_match_p (rtx x, rtx y)
2127 int i;
2128 RTX_CODE code = GET_CODE (x);
2129 const char *fmt;
2130 int success_2;
2132 if (x == y)
2133 return 1;
2134 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2135 && (REG_P (y) || (GET_CODE (y) == SUBREG
2136 && REG_P (SUBREG_REG (y)))))
2138 int j;
2140 if (code == SUBREG)
2142 i = REGNO (SUBREG_REG (x));
2143 if (i >= FIRST_PSEUDO_REGISTER)
2144 goto slow;
2145 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2146 GET_MODE (SUBREG_REG (x)),
2147 SUBREG_BYTE (x),
2148 GET_MODE (x));
2150 else
2151 i = REGNO (x);
2153 if (GET_CODE (y) == SUBREG)
2155 j = REGNO (SUBREG_REG (y));
2156 if (j >= FIRST_PSEUDO_REGISTER)
2157 goto slow;
2158 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2159 GET_MODE (SUBREG_REG (y)),
2160 SUBREG_BYTE (y),
2161 GET_MODE (y));
2163 else
2164 j = REGNO (y);
2166 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2167 multiple hard register group of scalar integer registers, so that
2168 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2169 register. */
2170 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2171 && SCALAR_INT_MODE_P (GET_MODE (x))
2172 && i < FIRST_PSEUDO_REGISTER)
2173 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2174 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2175 && SCALAR_INT_MODE_P (GET_MODE (y))
2176 && j < FIRST_PSEUDO_REGISTER)
2177 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2179 return i == j;
2181 /* If two operands must match, because they are really a single
2182 operand of an assembler insn, then two postincrements are invalid
2183 because the assembler insn would increment only once.
2184 On the other hand, a postincrement matches ordinary indexing
2185 if the postincrement is the output operand. */
2186 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2187 return operands_match_p (XEXP (x, 0), y);
2188 /* Two preincrements are invalid
2189 because the assembler insn would increment only once.
2190 On the other hand, a preincrement matches ordinary indexing
2191 if the preincrement is the input operand.
2192 In this case, return 2, since some callers need to do special
2193 things when this happens. */
2194 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2195 || GET_CODE (y) == PRE_MODIFY)
2196 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2198 slow:
2200 /* Now we have disposed of all the cases in which different rtx codes
2201 can match. */
2202 if (code != GET_CODE (y))
2203 return 0;
2205 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2206 if (GET_MODE (x) != GET_MODE (y))
2207 return 0;
2209 switch (code)
2211 case CONST_INT:
2212 case CONST_DOUBLE:
2213 case CONST_FIXED:
2214 return 0;
2216 case LABEL_REF:
2217 return XEXP (x, 0) == XEXP (y, 0);
2218 case SYMBOL_REF:
2219 return XSTR (x, 0) == XSTR (y, 0);
2221 default:
2222 break;
2225 /* Compare the elements. If any pair of corresponding elements
2226 fail to match, return 0 for the whole things. */
2228 success_2 = 0;
2229 fmt = GET_RTX_FORMAT (code);
2230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2232 int val, j;
2233 switch (fmt[i])
2235 case 'w':
2236 if (XWINT (x, i) != XWINT (y, i))
2237 return 0;
2238 break;
2240 case 'i':
2241 if (XINT (x, i) != XINT (y, i))
2242 return 0;
2243 break;
2245 case 'e':
2246 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2247 if (val == 0)
2248 return 0;
2249 /* If any subexpression returns 2,
2250 we should return 2 if we are successful. */
2251 if (val == 2)
2252 success_2 = 1;
2253 break;
2255 case '0':
2256 break;
2258 case 'E':
2259 if (XVECLEN (x, i) != XVECLEN (y, i))
2260 return 0;
2261 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2263 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2264 if (val == 0)
2265 return 0;
2266 if (val == 2)
2267 success_2 = 1;
2269 break;
2271 /* It is believed that rtx's at this level will never
2272 contain anything but integers and other rtx's,
2273 except for within LABEL_REFs and SYMBOL_REFs. */
2274 default:
2275 gcc_unreachable ();
2278 return 1 + success_2;
2281 /* Describe the range of registers or memory referenced by X.
2282 If X is a register, set REG_FLAG and put the first register
2283 number into START and the last plus one into END.
2284 If X is a memory reference, put a base address into BASE
2285 and a range of integer offsets into START and END.
2286 If X is pushing on the stack, we can assume it causes no trouble,
2287 so we set the SAFE field. */
2289 static struct decomposition
2290 decompose (rtx x)
2292 struct decomposition val;
2293 int all_const = 0;
2295 memset (&val, 0, sizeof (val));
2297 switch (GET_CODE (x))
2299 case MEM:
2301 rtx base = NULL_RTX, offset = 0;
2302 rtx addr = XEXP (x, 0);
2304 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2305 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2307 val.base = XEXP (addr, 0);
2308 val.start = -GET_MODE_SIZE (GET_MODE (x));
2309 val.end = GET_MODE_SIZE (GET_MODE (x));
2310 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2311 return val;
2314 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2316 if (GET_CODE (XEXP (addr, 1)) == PLUS
2317 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2318 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2320 val.base = XEXP (addr, 0);
2321 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2322 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2323 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2324 return val;
2328 if (GET_CODE (addr) == CONST)
2330 addr = XEXP (addr, 0);
2331 all_const = 1;
2333 if (GET_CODE (addr) == PLUS)
2335 if (CONSTANT_P (XEXP (addr, 0)))
2337 base = XEXP (addr, 1);
2338 offset = XEXP (addr, 0);
2340 else if (CONSTANT_P (XEXP (addr, 1)))
2342 base = XEXP (addr, 0);
2343 offset = XEXP (addr, 1);
2347 if (offset == 0)
2349 base = addr;
2350 offset = const0_rtx;
2352 if (GET_CODE (offset) == CONST)
2353 offset = XEXP (offset, 0);
2354 if (GET_CODE (offset) == PLUS)
2356 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2358 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2359 offset = XEXP (offset, 0);
2361 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2363 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2364 offset = XEXP (offset, 1);
2366 else
2368 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2369 offset = const0_rtx;
2372 else if (GET_CODE (offset) != CONST_INT)
2374 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2375 offset = const0_rtx;
2378 if (all_const && GET_CODE (base) == PLUS)
2379 base = gen_rtx_CONST (GET_MODE (base), base);
2381 gcc_assert (GET_CODE (offset) == CONST_INT);
2383 val.start = INTVAL (offset);
2384 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2385 val.base = base;
2387 break;
2389 case REG:
2390 val.reg_flag = 1;
2391 val.start = true_regnum (x);
2392 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2394 /* A pseudo with no hard reg. */
2395 val.start = REGNO (x);
2396 val.end = val.start + 1;
2398 else
2399 /* A hard reg. */
2400 val.end = end_hard_regno (GET_MODE (x), val.start);
2401 break;
2403 case SUBREG:
2404 if (!REG_P (SUBREG_REG (x)))
2405 /* This could be more precise, but it's good enough. */
2406 return decompose (SUBREG_REG (x));
2407 val.reg_flag = 1;
2408 val.start = true_regnum (x);
2409 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2410 return decompose (SUBREG_REG (x));
2411 else
2412 /* A hard reg. */
2413 val.end = val.start + subreg_nregs (x);
2414 break;
2416 case SCRATCH:
2417 /* This hasn't been assigned yet, so it can't conflict yet. */
2418 val.safe = 1;
2419 break;
2421 default:
2422 gcc_assert (CONSTANT_P (x));
2423 val.safe = 1;
2424 break;
2426 return val;
2429 /* Return 1 if altering Y will not modify the value of X.
2430 Y is also described by YDATA, which should be decompose (Y). */
2432 static int
2433 immune_p (rtx x, rtx y, struct decomposition ydata)
2435 struct decomposition xdata;
2437 if (ydata.reg_flag)
2438 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2439 if (ydata.safe)
2440 return 1;
2442 gcc_assert (MEM_P (y));
2443 /* If Y is memory and X is not, Y can't affect X. */
2444 if (!MEM_P (x))
2445 return 1;
2447 xdata = decompose (x);
2449 if (! rtx_equal_p (xdata.base, ydata.base))
2451 /* If bases are distinct symbolic constants, there is no overlap. */
2452 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2453 return 1;
2454 /* Constants and stack slots never overlap. */
2455 if (CONSTANT_P (xdata.base)
2456 && (ydata.base == frame_pointer_rtx
2457 || ydata.base == hard_frame_pointer_rtx
2458 || ydata.base == stack_pointer_rtx))
2459 return 1;
2460 if (CONSTANT_P (ydata.base)
2461 && (xdata.base == frame_pointer_rtx
2462 || xdata.base == hard_frame_pointer_rtx
2463 || xdata.base == stack_pointer_rtx))
2464 return 1;
2465 /* If either base is variable, we don't know anything. */
2466 return 0;
2469 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2472 /* Similar, but calls decompose. */
2475 safe_from_earlyclobber (rtx op, rtx clobber)
2477 struct decomposition early_data;
2479 early_data = decompose (clobber);
2480 return immune_p (op, clobber, early_data);
2483 /* Main entry point of this file: search the body of INSN
2484 for values that need reloading and record them with push_reload.
2485 REPLACE nonzero means record also where the values occur
2486 so that subst_reloads can be used.
2488 IND_LEVELS says how many levels of indirection are supported by this
2489 machine; a value of zero means that a memory reference is not a valid
2490 memory address.
2492 LIVE_KNOWN says we have valid information about which hard
2493 regs are live at each point in the program; this is true when
2494 we are called from global_alloc but false when stupid register
2495 allocation has been done.
2497 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2498 which is nonnegative if the reg has been commandeered for reloading into.
2499 It is copied into STATIC_RELOAD_REG_P and referenced from there
2500 by various subroutines.
2502 Return TRUE if some operands need to be changed, because of swapping
2503 commutative operands, reg_equiv_address substitution, or whatever. */
2506 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2507 short *reload_reg_p)
2509 int insn_code_number;
2510 int i, j;
2511 int noperands;
2512 /* These start out as the constraints for the insn
2513 and they are chewed up as we consider alternatives. */
2514 char *constraints[MAX_RECOG_OPERANDS];
2515 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2516 a register. */
2517 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2518 char pref_or_nothing[MAX_RECOG_OPERANDS];
2519 /* Nonzero for a MEM operand whose entire address needs a reload.
2520 May be -1 to indicate the entire address may or may not need a reload. */
2521 int address_reloaded[MAX_RECOG_OPERANDS];
2522 /* Nonzero for an address operand that needs to be completely reloaded.
2523 May be -1 to indicate the entire operand may or may not need a reload. */
2524 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2525 /* Value of enum reload_type to use for operand. */
2526 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2527 /* Value of enum reload_type to use within address of operand. */
2528 enum reload_type address_type[MAX_RECOG_OPERANDS];
2529 /* Save the usage of each operand. */
2530 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2531 int no_input_reloads = 0, no_output_reloads = 0;
2532 int n_alternatives;
2533 int this_alternative[MAX_RECOG_OPERANDS];
2534 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2535 char this_alternative_win[MAX_RECOG_OPERANDS];
2536 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2537 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2538 int this_alternative_matches[MAX_RECOG_OPERANDS];
2539 int swapped;
2540 int goal_alternative[MAX_RECOG_OPERANDS];
2541 int this_alternative_number;
2542 int goal_alternative_number = 0;
2543 int operand_reloadnum[MAX_RECOG_OPERANDS];
2544 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2545 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2546 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2547 char goal_alternative_win[MAX_RECOG_OPERANDS];
2548 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2549 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2550 int goal_alternative_swapped;
2551 int best;
2552 int commutative;
2553 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2554 rtx substed_operand[MAX_RECOG_OPERANDS];
2555 rtx body = PATTERN (insn);
2556 rtx set = single_set (insn);
2557 int goal_earlyclobber = 0, this_earlyclobber;
2558 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2559 int retval = 0;
2561 this_insn = insn;
2562 n_reloads = 0;
2563 n_replacements = 0;
2564 n_earlyclobbers = 0;
2565 replace_reloads = replace;
2566 hard_regs_live_known = live_known;
2567 static_reload_reg_p = reload_reg_p;
2569 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2570 neither are insns that SET cc0. Insns that use CC0 are not allowed
2571 to have any input reloads. */
2572 if (JUMP_P (insn) || CALL_P (insn))
2573 no_output_reloads = 1;
2575 #ifdef HAVE_cc0
2576 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2577 no_input_reloads = 1;
2578 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2579 no_output_reloads = 1;
2580 #endif
2582 #ifdef SECONDARY_MEMORY_NEEDED
2583 /* The eliminated forms of any secondary memory locations are per-insn, so
2584 clear them out here. */
2586 if (secondary_memlocs_elim_used)
2588 memset (secondary_memlocs_elim, 0,
2589 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2590 secondary_memlocs_elim_used = 0;
2592 #endif
2594 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2595 is cheap to move between them. If it is not, there may not be an insn
2596 to do the copy, so we may need a reload. */
2597 if (GET_CODE (body) == SET
2598 && REG_P (SET_DEST (body))
2599 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2600 && REG_P (SET_SRC (body))
2601 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2602 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2603 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2604 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2605 return 0;
2607 extract_insn (insn);
2609 noperands = reload_n_operands = recog_data.n_operands;
2610 n_alternatives = recog_data.n_alternatives;
2612 /* Just return "no reloads" if insn has no operands with constraints. */
2613 if (noperands == 0 || n_alternatives == 0)
2614 return 0;
2616 insn_code_number = INSN_CODE (insn);
2617 this_insn_is_asm = insn_code_number < 0;
2619 memcpy (operand_mode, recog_data.operand_mode,
2620 noperands * sizeof (enum machine_mode));
2621 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2623 commutative = -1;
2625 /* If we will need to know, later, whether some pair of operands
2626 are the same, we must compare them now and save the result.
2627 Reloading the base and index registers will clobber them
2628 and afterward they will fail to match. */
2630 for (i = 0; i < noperands; i++)
2632 char *p;
2633 int c;
2635 substed_operand[i] = recog_data.operand[i];
2636 p = constraints[i];
2638 modified[i] = RELOAD_READ;
2640 /* Scan this operand's constraint to see if it is an output operand,
2641 an in-out operand, is commutative, or should match another. */
2643 while ((c = *p))
2645 p += CONSTRAINT_LEN (c, p);
2646 switch (c)
2648 case '=':
2649 modified[i] = RELOAD_WRITE;
2650 break;
2651 case '+':
2652 modified[i] = RELOAD_READ_WRITE;
2653 break;
2654 case '%':
2656 /* The last operand should not be marked commutative. */
2657 gcc_assert (i != noperands - 1);
2659 /* We currently only support one commutative pair of
2660 operands. Some existing asm code currently uses more
2661 than one pair. Previously, that would usually work,
2662 but sometimes it would crash the compiler. We
2663 continue supporting that case as well as we can by
2664 silently ignoring all but the first pair. In the
2665 future we may handle it correctly. */
2666 if (commutative < 0)
2667 commutative = i;
2668 else
2669 gcc_assert (this_insn_is_asm);
2671 break;
2672 /* Use of ISDIGIT is tempting here, but it may get expensive because
2673 of locale support we don't want. */
2674 case '0': case '1': case '2': case '3': case '4':
2675 case '5': case '6': case '7': case '8': case '9':
2677 c = strtoul (p - 1, &p, 10);
2679 operands_match[c][i]
2680 = operands_match_p (recog_data.operand[c],
2681 recog_data.operand[i]);
2683 /* An operand may not match itself. */
2684 gcc_assert (c != i);
2686 /* If C can be commuted with C+1, and C might need to match I,
2687 then C+1 might also need to match I. */
2688 if (commutative >= 0)
2690 if (c == commutative || c == commutative + 1)
2692 int other = c + (c == commutative ? 1 : -1);
2693 operands_match[other][i]
2694 = operands_match_p (recog_data.operand[other],
2695 recog_data.operand[i]);
2697 if (i == commutative || i == commutative + 1)
2699 int other = i + (i == commutative ? 1 : -1);
2700 operands_match[c][other]
2701 = operands_match_p (recog_data.operand[c],
2702 recog_data.operand[other]);
2704 /* Note that C is supposed to be less than I.
2705 No need to consider altering both C and I because in
2706 that case we would alter one into the other. */
2713 /* Examine each operand that is a memory reference or memory address
2714 and reload parts of the addresses into index registers.
2715 Also here any references to pseudo regs that didn't get hard regs
2716 but are equivalent to constants get replaced in the insn itself
2717 with those constants. Nobody will ever see them again.
2719 Finally, set up the preferred classes of each operand. */
2721 for (i = 0; i < noperands; i++)
2723 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2725 address_reloaded[i] = 0;
2726 address_operand_reloaded[i] = 0;
2727 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2728 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2729 : RELOAD_OTHER);
2730 address_type[i]
2731 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2732 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2733 : RELOAD_OTHER);
2735 if (*constraints[i] == 0)
2736 /* Ignore things like match_operator operands. */
2738 else if (constraints[i][0] == 'p'
2739 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2741 address_operand_reloaded[i]
2742 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2743 recog_data.operand[i],
2744 recog_data.operand_loc[i],
2745 i, operand_type[i], ind_levels, insn);
2747 /* If we now have a simple operand where we used to have a
2748 PLUS or MULT, re-recognize and try again. */
2749 if ((OBJECT_P (*recog_data.operand_loc[i])
2750 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2751 && (GET_CODE (recog_data.operand[i]) == MULT
2752 || GET_CODE (recog_data.operand[i]) == PLUS))
2754 INSN_CODE (insn) = -1;
2755 retval = find_reloads (insn, replace, ind_levels, live_known,
2756 reload_reg_p);
2757 return retval;
2760 recog_data.operand[i] = *recog_data.operand_loc[i];
2761 substed_operand[i] = recog_data.operand[i];
2763 /* Address operands are reloaded in their existing mode,
2764 no matter what is specified in the machine description. */
2765 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2767 else if (code == MEM)
2769 address_reloaded[i]
2770 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2771 recog_data.operand_loc[i],
2772 XEXP (recog_data.operand[i], 0),
2773 &XEXP (recog_data.operand[i], 0),
2774 i, address_type[i], ind_levels, insn);
2775 recog_data.operand[i] = *recog_data.operand_loc[i];
2776 substed_operand[i] = recog_data.operand[i];
2778 else if (code == SUBREG)
2780 rtx reg = SUBREG_REG (recog_data.operand[i]);
2781 rtx op
2782 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2783 ind_levels,
2784 set != 0
2785 && &SET_DEST (set) == recog_data.operand_loc[i],
2786 insn,
2787 &address_reloaded[i]);
2789 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2790 that didn't get a hard register, emit a USE with a REG_EQUAL
2791 note in front so that we might inherit a previous, possibly
2792 wider reload. */
2794 if (replace
2795 && MEM_P (op)
2796 && REG_P (reg)
2797 && (GET_MODE_SIZE (GET_MODE (reg))
2798 >= GET_MODE_SIZE (GET_MODE (op)))
2799 && reg_equiv_constant[REGNO (reg)] == 0)
2800 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2801 insn),
2802 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2804 substed_operand[i] = recog_data.operand[i] = op;
2806 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2807 /* We can get a PLUS as an "operand" as a result of register
2808 elimination. See eliminate_regs and gen_reload. We handle
2809 a unary operator by reloading the operand. */
2810 substed_operand[i] = recog_data.operand[i]
2811 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2812 ind_levels, 0, insn,
2813 &address_reloaded[i]);
2814 else if (code == REG)
2816 /* This is equivalent to calling find_reloads_toplev.
2817 The code is duplicated for speed.
2818 When we find a pseudo always equivalent to a constant,
2819 we replace it by the constant. We must be sure, however,
2820 that we don't try to replace it in the insn in which it
2821 is being set. */
2822 int regno = REGNO (recog_data.operand[i]);
2823 if (reg_equiv_constant[regno] != 0
2824 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2826 /* Record the existing mode so that the check if constants are
2827 allowed will work when operand_mode isn't specified. */
2829 if (operand_mode[i] == VOIDmode)
2830 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2832 substed_operand[i] = recog_data.operand[i]
2833 = reg_equiv_constant[regno];
2835 if (reg_equiv_memory_loc[regno] != 0
2836 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2837 /* We need not give a valid is_set_dest argument since the case
2838 of a constant equivalence was checked above. */
2839 substed_operand[i] = recog_data.operand[i]
2840 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2841 ind_levels, 0, insn,
2842 &address_reloaded[i]);
2844 /* If the operand is still a register (we didn't replace it with an
2845 equivalent), get the preferred class to reload it into. */
2846 code = GET_CODE (recog_data.operand[i]);
2847 preferred_class[i]
2848 = ((code == REG && REGNO (recog_data.operand[i])
2849 >= FIRST_PSEUDO_REGISTER)
2850 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2851 : NO_REGS);
2852 pref_or_nothing[i]
2853 = (code == REG
2854 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2855 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2858 /* If this is simply a copy from operand 1 to operand 0, merge the
2859 preferred classes for the operands. */
2860 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2861 && recog_data.operand[1] == SET_SRC (set))
2863 preferred_class[0] = preferred_class[1]
2864 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2865 pref_or_nothing[0] |= pref_or_nothing[1];
2866 pref_or_nothing[1] |= pref_or_nothing[0];
2869 /* Now see what we need for pseudo-regs that didn't get hard regs
2870 or got the wrong kind of hard reg. For this, we must consider
2871 all the operands together against the register constraints. */
2873 best = MAX_RECOG_OPERANDS * 2 + 600;
2875 swapped = 0;
2876 goal_alternative_swapped = 0;
2877 try_swapped:
2879 /* The constraints are made of several alternatives.
2880 Each operand's constraint looks like foo,bar,... with commas
2881 separating the alternatives. The first alternatives for all
2882 operands go together, the second alternatives go together, etc.
2884 First loop over alternatives. */
2886 for (this_alternative_number = 0;
2887 this_alternative_number < n_alternatives;
2888 this_alternative_number++)
2890 /* Loop over operands for one constraint alternative. */
2891 /* LOSERS counts those that don't fit this alternative
2892 and would require loading. */
2893 int losers = 0;
2894 /* BAD is set to 1 if it some operand can't fit this alternative
2895 even after reloading. */
2896 int bad = 0;
2897 /* REJECT is a count of how undesirable this alternative says it is
2898 if any reloading is required. If the alternative matches exactly
2899 then REJECT is ignored, but otherwise it gets this much
2900 counted against it in addition to the reloading needed. Each
2901 ? counts three times here since we want the disparaging caused by
2902 a bad register class to only count 1/3 as much. */
2903 int reject = 0;
2905 this_earlyclobber = 0;
2907 for (i = 0; i < noperands; i++)
2909 char *p = constraints[i];
2910 char *end;
2911 int len;
2912 int win = 0;
2913 int did_match = 0;
2914 /* 0 => this operand can be reloaded somehow for this alternative. */
2915 int badop = 1;
2916 /* 0 => this operand can be reloaded if the alternative allows regs. */
2917 int winreg = 0;
2918 int c;
2919 int m;
2920 rtx operand = recog_data.operand[i];
2921 int offset = 0;
2922 /* Nonzero means this is a MEM that must be reloaded into a reg
2923 regardless of what the constraint says. */
2924 int force_reload = 0;
2925 int offmemok = 0;
2926 /* Nonzero if a constant forced into memory would be OK for this
2927 operand. */
2928 int constmemok = 0;
2929 int earlyclobber = 0;
2931 /* If the predicate accepts a unary operator, it means that
2932 we need to reload the operand, but do not do this for
2933 match_operator and friends. */
2934 if (UNARY_P (operand) && *p != 0)
2935 operand = XEXP (operand, 0);
2937 /* If the operand is a SUBREG, extract
2938 the REG or MEM (or maybe even a constant) within.
2939 (Constants can occur as a result of reg_equiv_constant.) */
2941 while (GET_CODE (operand) == SUBREG)
2943 /* Offset only matters when operand is a REG and
2944 it is a hard reg. This is because it is passed
2945 to reg_fits_class_p if it is a REG and all pseudos
2946 return 0 from that function. */
2947 if (REG_P (SUBREG_REG (operand))
2948 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2950 if (!subreg_offset_representable_p
2951 (REGNO (SUBREG_REG (operand)),
2952 GET_MODE (SUBREG_REG (operand)),
2953 SUBREG_BYTE (operand),
2954 GET_MODE (operand)))
2955 force_reload = 1;
2956 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2957 GET_MODE (SUBREG_REG (operand)),
2958 SUBREG_BYTE (operand),
2959 GET_MODE (operand));
2961 operand = SUBREG_REG (operand);
2962 /* Force reload if this is a constant or PLUS or if there may
2963 be a problem accessing OPERAND in the outer mode. */
2964 if (CONSTANT_P (operand)
2965 || GET_CODE (operand) == PLUS
2966 /* We must force a reload of paradoxical SUBREGs
2967 of a MEM because the alignment of the inner value
2968 may not be enough to do the outer reference. On
2969 big-endian machines, it may also reference outside
2970 the object.
2972 On machines that extend byte operations and we have a
2973 SUBREG where both the inner and outer modes are no wider
2974 than a word and the inner mode is narrower, is integral,
2975 and gets extended when loaded from memory, combine.c has
2976 made assumptions about the behavior of the machine in such
2977 register access. If the data is, in fact, in memory we
2978 must always load using the size assumed to be in the
2979 register and let the insn do the different-sized
2980 accesses.
2982 This is doubly true if WORD_REGISTER_OPERATIONS. In
2983 this case eliminate_regs has left non-paradoxical
2984 subregs for push_reload to see. Make sure it does
2985 by forcing the reload.
2987 ??? When is it right at this stage to have a subreg
2988 of a mem that is _not_ to be handled specially? IMO
2989 those should have been reduced to just a mem. */
2990 || ((MEM_P (operand)
2991 || (REG_P (operand)
2992 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2993 #ifndef WORD_REGISTER_OPERATIONS
2994 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2995 < BIGGEST_ALIGNMENT)
2996 && (GET_MODE_SIZE (operand_mode[i])
2997 > GET_MODE_SIZE (GET_MODE (operand))))
2998 || BYTES_BIG_ENDIAN
2999 #ifdef LOAD_EXTEND_OP
3000 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3001 && (GET_MODE_SIZE (GET_MODE (operand))
3002 <= UNITS_PER_WORD)
3003 && (GET_MODE_SIZE (operand_mode[i])
3004 > GET_MODE_SIZE (GET_MODE (operand)))
3005 && INTEGRAL_MODE_P (GET_MODE (operand))
3006 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3007 #endif
3009 #endif
3012 force_reload = 1;
3015 this_alternative[i] = (int) NO_REGS;
3016 this_alternative_win[i] = 0;
3017 this_alternative_match_win[i] = 0;
3018 this_alternative_offmemok[i] = 0;
3019 this_alternative_earlyclobber[i] = 0;
3020 this_alternative_matches[i] = -1;
3022 /* An empty constraint or empty alternative
3023 allows anything which matched the pattern. */
3024 if (*p == 0 || *p == ',')
3025 win = 1, badop = 0;
3027 /* Scan this alternative's specs for this operand;
3028 set WIN if the operand fits any letter in this alternative.
3029 Otherwise, clear BADOP if this operand could
3030 fit some letter after reloads,
3031 or set WINREG if this operand could fit after reloads
3032 provided the constraint allows some registers. */
3035 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3037 case '\0':
3038 len = 0;
3039 break;
3040 case ',':
3041 c = '\0';
3042 break;
3044 case '=': case '+': case '*':
3045 break;
3047 case '%':
3048 /* We only support one commutative marker, the first
3049 one. We already set commutative above. */
3050 break;
3052 case '?':
3053 reject += 6;
3054 break;
3056 case '!':
3057 reject = 600;
3058 break;
3060 case '#':
3061 /* Ignore rest of this alternative as far as
3062 reloading is concerned. */
3064 p++;
3065 while (*p && *p != ',');
3066 len = 0;
3067 break;
3069 case '0': case '1': case '2': case '3': case '4':
3070 case '5': case '6': case '7': case '8': case '9':
3071 m = strtoul (p, &end, 10);
3072 p = end;
3073 len = 0;
3075 this_alternative_matches[i] = m;
3076 /* We are supposed to match a previous operand.
3077 If we do, we win if that one did.
3078 If we do not, count both of the operands as losers.
3079 (This is too conservative, since most of the time
3080 only a single reload insn will be needed to make
3081 the two operands win. As a result, this alternative
3082 may be rejected when it is actually desirable.) */
3083 if ((swapped && (m != commutative || i != commutative + 1))
3084 /* If we are matching as if two operands were swapped,
3085 also pretend that operands_match had been computed
3086 with swapped.
3087 But if I is the second of those and C is the first,
3088 don't exchange them, because operands_match is valid
3089 only on one side of its diagonal. */
3090 ? (operands_match
3091 [(m == commutative || m == commutative + 1)
3092 ? 2 * commutative + 1 - m : m]
3093 [(i == commutative || i == commutative + 1)
3094 ? 2 * commutative + 1 - i : i])
3095 : operands_match[m][i])
3097 /* If we are matching a non-offsettable address where an
3098 offsettable address was expected, then we must reject
3099 this combination, because we can't reload it. */
3100 if (this_alternative_offmemok[m]
3101 && MEM_P (recog_data.operand[m])
3102 && this_alternative[m] == (int) NO_REGS
3103 && ! this_alternative_win[m])
3104 bad = 1;
3106 did_match = this_alternative_win[m];
3108 else
3110 /* Operands don't match. */
3111 rtx value;
3112 int loc1, loc2;
3113 /* Retroactively mark the operand we had to match
3114 as a loser, if it wasn't already. */
3115 if (this_alternative_win[m])
3116 losers++;
3117 this_alternative_win[m] = 0;
3118 if (this_alternative[m] == (int) NO_REGS)
3119 bad = 1;
3120 /* But count the pair only once in the total badness of
3121 this alternative, if the pair can be a dummy reload.
3122 The pointers in operand_loc are not swapped; swap
3123 them by hand if necessary. */
3124 if (swapped && i == commutative)
3125 loc1 = commutative + 1;
3126 else if (swapped && i == commutative + 1)
3127 loc1 = commutative;
3128 else
3129 loc1 = i;
3130 if (swapped && m == commutative)
3131 loc2 = commutative + 1;
3132 else if (swapped && m == commutative + 1)
3133 loc2 = commutative;
3134 else
3135 loc2 = m;
3136 value
3137 = find_dummy_reload (recog_data.operand[i],
3138 recog_data.operand[m],
3139 recog_data.operand_loc[loc1],
3140 recog_data.operand_loc[loc2],
3141 operand_mode[i], operand_mode[m],
3142 this_alternative[m], -1,
3143 this_alternative_earlyclobber[m]);
3145 if (value != 0)
3146 losers--;
3148 /* This can be fixed with reloads if the operand
3149 we are supposed to match can be fixed with reloads. */
3150 badop = 0;
3151 this_alternative[i] = this_alternative[m];
3153 /* If we have to reload this operand and some previous
3154 operand also had to match the same thing as this
3155 operand, we don't know how to do that. So reject this
3156 alternative. */
3157 if (! did_match || force_reload)
3158 for (j = 0; j < i; j++)
3159 if (this_alternative_matches[j]
3160 == this_alternative_matches[i])
3161 badop = 1;
3162 break;
3164 case 'p':
3165 /* All necessary reloads for an address_operand
3166 were handled in find_reloads_address. */
3167 this_alternative[i]
3168 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3169 win = 1;
3170 badop = 0;
3171 break;
3173 case 'm':
3174 if (force_reload)
3175 break;
3176 if (MEM_P (operand)
3177 || (REG_P (operand)
3178 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3179 && reg_renumber[REGNO (operand)] < 0))
3180 win = 1;
3181 if (CONST_POOL_OK_P (operand))
3182 badop = 0;
3183 constmemok = 1;
3184 break;
3186 case '<':
3187 if (MEM_P (operand)
3188 && ! address_reloaded[i]
3189 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3190 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3191 win = 1;
3192 break;
3194 case '>':
3195 if (MEM_P (operand)
3196 && ! address_reloaded[i]
3197 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3198 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3199 win = 1;
3200 break;
3202 /* Memory operand whose address is not offsettable. */
3203 case 'V':
3204 if (force_reload)
3205 break;
3206 if (MEM_P (operand)
3207 && ! (ind_levels ? offsettable_memref_p (operand)
3208 : offsettable_nonstrict_memref_p (operand))
3209 /* Certain mem addresses will become offsettable
3210 after they themselves are reloaded. This is important;
3211 we don't want our own handling of unoffsettables
3212 to override the handling of reg_equiv_address. */
3213 && !(REG_P (XEXP (operand, 0))
3214 && (ind_levels == 0
3215 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3216 win = 1;
3217 break;
3219 /* Memory operand whose address is offsettable. */
3220 case 'o':
3221 if (force_reload)
3222 break;
3223 if ((MEM_P (operand)
3224 /* If IND_LEVELS, find_reloads_address won't reload a
3225 pseudo that didn't get a hard reg, so we have to
3226 reject that case. */
3227 && ((ind_levels ? offsettable_memref_p (operand)
3228 : offsettable_nonstrict_memref_p (operand))
3229 /* A reloaded address is offsettable because it is now
3230 just a simple register indirect. */
3231 || address_reloaded[i] == 1))
3232 || (REG_P (operand)
3233 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3234 && reg_renumber[REGNO (operand)] < 0
3235 /* If reg_equiv_address is nonzero, we will be
3236 loading it into a register; hence it will be
3237 offsettable, but we cannot say that reg_equiv_mem
3238 is offsettable without checking. */
3239 && ((reg_equiv_mem[REGNO (operand)] != 0
3240 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3241 || (reg_equiv_address[REGNO (operand)] != 0))))
3242 win = 1;
3243 if (CONST_POOL_OK_P (operand)
3244 || MEM_P (operand))
3245 badop = 0;
3246 constmemok = 1;
3247 offmemok = 1;
3248 break;
3250 case '&':
3251 /* Output operand that is stored before the need for the
3252 input operands (and their index registers) is over. */
3253 earlyclobber = 1, this_earlyclobber = 1;
3254 break;
3256 case 'E':
3257 case 'F':
3258 if (GET_CODE (operand) == CONST_DOUBLE
3259 || (GET_CODE (operand) == CONST_VECTOR
3260 && (GET_MODE_CLASS (GET_MODE (operand))
3261 == MODE_VECTOR_FLOAT)))
3262 win = 1;
3263 break;
3265 case 'G':
3266 case 'H':
3267 if (GET_CODE (operand) == CONST_DOUBLE
3268 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3269 win = 1;
3270 break;
3272 case 's':
3273 if (GET_CODE (operand) == CONST_INT
3274 || (GET_CODE (operand) == CONST_DOUBLE
3275 && GET_MODE (operand) == VOIDmode))
3276 break;
3277 case 'i':
3278 if (CONSTANT_P (operand)
3279 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3280 win = 1;
3281 break;
3283 case 'n':
3284 if (GET_CODE (operand) == CONST_INT
3285 || (GET_CODE (operand) == CONST_DOUBLE
3286 && GET_MODE (operand) == VOIDmode))
3287 win = 1;
3288 break;
3290 case 'I':
3291 case 'J':
3292 case 'K':
3293 case 'L':
3294 case 'M':
3295 case 'N':
3296 case 'O':
3297 case 'P':
3298 if (GET_CODE (operand) == CONST_INT
3299 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3300 win = 1;
3301 break;
3303 case 'X':
3304 force_reload = 0;
3305 win = 1;
3306 break;
3308 case 'g':
3309 if (! force_reload
3310 /* A PLUS is never a valid operand, but reload can make
3311 it from a register when eliminating registers. */
3312 && GET_CODE (operand) != PLUS
3313 /* A SCRATCH is not a valid operand. */
3314 && GET_CODE (operand) != SCRATCH
3315 && (! CONSTANT_P (operand)
3316 || ! flag_pic
3317 || LEGITIMATE_PIC_OPERAND_P (operand))
3318 && (GENERAL_REGS == ALL_REGS
3319 || !REG_P (operand)
3320 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3321 && reg_renumber[REGNO (operand)] < 0)))
3322 win = 1;
3323 /* Drop through into 'r' case. */
3325 case 'r':
3326 this_alternative[i]
3327 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3328 goto reg;
3330 default:
3331 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3333 #ifdef EXTRA_CONSTRAINT_STR
3334 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3336 if (force_reload)
3337 break;
3338 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3339 win = 1;
3340 /* If the address was already reloaded,
3341 we win as well. */
3342 else if (MEM_P (operand)
3343 && address_reloaded[i] == 1)
3344 win = 1;
3345 /* Likewise if the address will be reloaded because
3346 reg_equiv_address is nonzero. For reg_equiv_mem
3347 we have to check. */
3348 else if (REG_P (operand)
3349 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3350 && reg_renumber[REGNO (operand)] < 0
3351 && ((reg_equiv_mem[REGNO (operand)] != 0
3352 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3353 || (reg_equiv_address[REGNO (operand)] != 0)))
3354 win = 1;
3356 /* If we didn't already win, we can reload
3357 constants via force_const_mem, and other
3358 MEMs by reloading the address like for 'o'. */
3359 if (CONST_POOL_OK_P (operand)
3360 || MEM_P (operand))
3361 badop = 0;
3362 constmemok = 1;
3363 offmemok = 1;
3364 break;
3366 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3368 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3369 win = 1;
3371 /* If we didn't already win, we can reload
3372 the address into a base register. */
3373 this_alternative[i]
3374 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3375 badop = 0;
3376 break;
3379 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3380 win = 1;
3381 #endif
3382 break;
3385 this_alternative[i]
3386 = (int) (reg_class_subunion
3387 [this_alternative[i]]
3388 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3389 reg:
3390 if (GET_MODE (operand) == BLKmode)
3391 break;
3392 winreg = 1;
3393 if (REG_P (operand)
3394 && reg_fits_class_p (operand, this_alternative[i],
3395 offset, GET_MODE (recog_data.operand[i])))
3396 win = 1;
3397 break;
3399 while ((p += len), c);
3401 constraints[i] = p;
3403 /* If this operand could be handled with a reg,
3404 and some reg is allowed, then this operand can be handled. */
3405 if (winreg && this_alternative[i] != (int) NO_REGS)
3406 badop = 0;
3408 /* Record which operands fit this alternative. */
3409 this_alternative_earlyclobber[i] = earlyclobber;
3410 if (win && ! force_reload)
3411 this_alternative_win[i] = 1;
3412 else if (did_match && ! force_reload)
3413 this_alternative_match_win[i] = 1;
3414 else
3416 int const_to_mem = 0;
3418 this_alternative_offmemok[i] = offmemok;
3419 losers++;
3420 if (badop)
3421 bad = 1;
3422 /* Alternative loses if it has no regs for a reg operand. */
3423 if (REG_P (operand)
3424 && this_alternative[i] == (int) NO_REGS
3425 && this_alternative_matches[i] < 0)
3426 bad = 1;
3428 /* If this is a constant that is reloaded into the desired
3429 class by copying it to memory first, count that as another
3430 reload. This is consistent with other code and is
3431 required to avoid choosing another alternative when
3432 the constant is moved into memory by this function on
3433 an early reload pass. Note that the test here is
3434 precisely the same as in the code below that calls
3435 force_const_mem. */
3436 if (CONST_POOL_OK_P (operand)
3437 && ((PREFERRED_RELOAD_CLASS (operand,
3438 (enum reg_class) this_alternative[i])
3439 == NO_REGS)
3440 || no_input_reloads)
3441 && operand_mode[i] != VOIDmode)
3443 const_to_mem = 1;
3444 if (this_alternative[i] != (int) NO_REGS)
3445 losers++;
3448 /* Alternative loses if it requires a type of reload not
3449 permitted for this insn. We can always reload SCRATCH
3450 and objects with a REG_UNUSED note. */
3451 if (GET_CODE (operand) != SCRATCH
3452 && modified[i] != RELOAD_READ && no_output_reloads
3453 && ! find_reg_note (insn, REG_UNUSED, operand))
3454 bad = 1;
3455 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3456 && ! const_to_mem)
3457 bad = 1;
3459 /* If we can't reload this value at all, reject this
3460 alternative. Note that we could also lose due to
3461 LIMIT_RELOAD_CLASS, but we don't check that
3462 here. */
3464 if (! CONSTANT_P (operand)
3465 && (enum reg_class) this_alternative[i] != NO_REGS)
3467 if (PREFERRED_RELOAD_CLASS
3468 (operand, (enum reg_class) this_alternative[i])
3469 == NO_REGS)
3470 reject = 600;
3472 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3473 if (operand_type[i] == RELOAD_FOR_OUTPUT
3474 && PREFERRED_OUTPUT_RELOAD_CLASS
3475 (operand, (enum reg_class) this_alternative[i])
3476 == NO_REGS)
3477 reject = 600;
3478 #endif
3481 /* We prefer to reload pseudos over reloading other things,
3482 since such reloads may be able to be eliminated later.
3483 If we are reloading a SCRATCH, we won't be generating any
3484 insns, just using a register, so it is also preferred.
3485 So bump REJECT in other cases. Don't do this in the
3486 case where we are forcing a constant into memory and
3487 it will then win since we don't want to have a different
3488 alternative match then. */
3489 if (! (REG_P (operand)
3490 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3491 && GET_CODE (operand) != SCRATCH
3492 && ! (const_to_mem && constmemok))
3493 reject += 2;
3495 /* Input reloads can be inherited more often than output
3496 reloads can be removed, so penalize output reloads. */
3497 if (operand_type[i] != RELOAD_FOR_INPUT
3498 && GET_CODE (operand) != SCRATCH)
3499 reject++;
3502 /* If this operand is a pseudo register that didn't get a hard
3503 reg and this alternative accepts some register, see if the
3504 class that we want is a subset of the preferred class for this
3505 register. If not, but it intersects that class, use the
3506 preferred class instead. If it does not intersect the preferred
3507 class, show that usage of this alternative should be discouraged;
3508 it will be discouraged more still if the register is `preferred
3509 or nothing'. We do this because it increases the chance of
3510 reusing our spill register in a later insn and avoiding a pair
3511 of memory stores and loads.
3513 Don't bother with this if this alternative will accept this
3514 operand.
3516 Don't do this for a multiword operand, since it is only a
3517 small win and has the risk of requiring more spill registers,
3518 which could cause a large loss.
3520 Don't do this if the preferred class has only one register
3521 because we might otherwise exhaust the class. */
3523 if (! win && ! did_match
3524 && this_alternative[i] != (int) NO_REGS
3525 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3526 && reg_class_size [(int) preferred_class[i]] > 0
3527 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3529 if (! reg_class_subset_p (this_alternative[i],
3530 preferred_class[i]))
3532 /* Since we don't have a way of forming the intersection,
3533 we just do something special if the preferred class
3534 is a subset of the class we have; that's the most
3535 common case anyway. */
3536 if (reg_class_subset_p (preferred_class[i],
3537 this_alternative[i]))
3538 this_alternative[i] = (int) preferred_class[i];
3539 else
3540 reject += (2 + 2 * pref_or_nothing[i]);
3545 /* Now see if any output operands that are marked "earlyclobber"
3546 in this alternative conflict with any input operands
3547 or any memory addresses. */
3549 for (i = 0; i < noperands; i++)
3550 if (this_alternative_earlyclobber[i]
3551 && (this_alternative_win[i] || this_alternative_match_win[i]))
3553 struct decomposition early_data;
3555 early_data = decompose (recog_data.operand[i]);
3557 gcc_assert (modified[i] != RELOAD_READ);
3559 if (this_alternative[i] == NO_REGS)
3561 this_alternative_earlyclobber[i] = 0;
3562 gcc_assert (this_insn_is_asm);
3563 error_for_asm (this_insn,
3564 "%<&%> constraint used with no register class");
3567 for (j = 0; j < noperands; j++)
3568 /* Is this an input operand or a memory ref? */
3569 if ((MEM_P (recog_data.operand[j])
3570 || modified[j] != RELOAD_WRITE)
3571 && j != i
3572 /* Ignore things like match_operator operands. */
3573 && *recog_data.constraints[j] != 0
3574 /* Don't count an input operand that is constrained to match
3575 the early clobber operand. */
3576 && ! (this_alternative_matches[j] == i
3577 && rtx_equal_p (recog_data.operand[i],
3578 recog_data.operand[j]))
3579 /* Is it altered by storing the earlyclobber operand? */
3580 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3581 early_data))
3583 /* If the output is in a non-empty few-regs class,
3584 it's costly to reload it, so reload the input instead. */
3585 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3586 && (REG_P (recog_data.operand[j])
3587 || GET_CODE (recog_data.operand[j]) == SUBREG))
3589 losers++;
3590 this_alternative_win[j] = 0;
3591 this_alternative_match_win[j] = 0;
3593 else
3594 break;
3596 /* If an earlyclobber operand conflicts with something,
3597 it must be reloaded, so request this and count the cost. */
3598 if (j != noperands)
3600 losers++;
3601 this_alternative_win[i] = 0;
3602 this_alternative_match_win[j] = 0;
3603 for (j = 0; j < noperands; j++)
3604 if (this_alternative_matches[j] == i
3605 && this_alternative_match_win[j])
3607 this_alternative_win[j] = 0;
3608 this_alternative_match_win[j] = 0;
3609 losers++;
3614 /* If one alternative accepts all the operands, no reload required,
3615 choose that alternative; don't consider the remaining ones. */
3616 if (losers == 0)
3618 /* Unswap these so that they are never swapped at `finish'. */
3619 if (commutative >= 0)
3621 recog_data.operand[commutative] = substed_operand[commutative];
3622 recog_data.operand[commutative + 1]
3623 = substed_operand[commutative + 1];
3625 for (i = 0; i < noperands; i++)
3627 goal_alternative_win[i] = this_alternative_win[i];
3628 goal_alternative_match_win[i] = this_alternative_match_win[i];
3629 goal_alternative[i] = this_alternative[i];
3630 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3631 goal_alternative_matches[i] = this_alternative_matches[i];
3632 goal_alternative_earlyclobber[i]
3633 = this_alternative_earlyclobber[i];
3635 goal_alternative_number = this_alternative_number;
3636 goal_alternative_swapped = swapped;
3637 goal_earlyclobber = this_earlyclobber;
3638 goto finish;
3641 /* REJECT, set by the ! and ? constraint characters and when a register
3642 would be reloaded into a non-preferred class, discourages the use of
3643 this alternative for a reload goal. REJECT is incremented by six
3644 for each ? and two for each non-preferred class. */
3645 losers = losers * 6 + reject;
3647 /* If this alternative can be made to work by reloading,
3648 and it needs less reloading than the others checked so far,
3649 record it as the chosen goal for reloading. */
3650 if (! bad && best > losers)
3652 for (i = 0; i < noperands; i++)
3654 goal_alternative[i] = this_alternative[i];
3655 goal_alternative_win[i] = this_alternative_win[i];
3656 goal_alternative_match_win[i] = this_alternative_match_win[i];
3657 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3658 goal_alternative_matches[i] = this_alternative_matches[i];
3659 goal_alternative_earlyclobber[i]
3660 = this_alternative_earlyclobber[i];
3662 goal_alternative_swapped = swapped;
3663 best = losers;
3664 goal_alternative_number = this_alternative_number;
3665 goal_earlyclobber = this_earlyclobber;
3669 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3670 then we need to try each alternative twice,
3671 the second time matching those two operands
3672 as if we had exchanged them.
3673 To do this, really exchange them in operands.
3675 If we have just tried the alternatives the second time,
3676 return operands to normal and drop through. */
3678 if (commutative >= 0)
3680 swapped = !swapped;
3681 if (swapped)
3683 enum reg_class tclass;
3684 int t;
3686 recog_data.operand[commutative] = substed_operand[commutative + 1];
3687 recog_data.operand[commutative + 1] = substed_operand[commutative];
3688 /* Swap the duplicates too. */
3689 for (i = 0; i < recog_data.n_dups; i++)
3690 if (recog_data.dup_num[i] == commutative
3691 || recog_data.dup_num[i] == commutative + 1)
3692 *recog_data.dup_loc[i]
3693 = recog_data.operand[(int) recog_data.dup_num[i]];
3695 tclass = preferred_class[commutative];
3696 preferred_class[commutative] = preferred_class[commutative + 1];
3697 preferred_class[commutative + 1] = tclass;
3699 t = pref_or_nothing[commutative];
3700 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3701 pref_or_nothing[commutative + 1] = t;
3703 t = address_reloaded[commutative];
3704 address_reloaded[commutative] = address_reloaded[commutative + 1];
3705 address_reloaded[commutative + 1] = t;
3707 memcpy (constraints, recog_data.constraints,
3708 noperands * sizeof (char *));
3709 goto try_swapped;
3711 else
3713 recog_data.operand[commutative] = substed_operand[commutative];
3714 recog_data.operand[commutative + 1]
3715 = substed_operand[commutative + 1];
3716 /* Unswap the duplicates too. */
3717 for (i = 0; i < recog_data.n_dups; i++)
3718 if (recog_data.dup_num[i] == commutative
3719 || recog_data.dup_num[i] == commutative + 1)
3720 *recog_data.dup_loc[i]
3721 = recog_data.operand[(int) recog_data.dup_num[i]];
3725 /* The operands don't meet the constraints.
3726 goal_alternative describes the alternative
3727 that we could reach by reloading the fewest operands.
3728 Reload so as to fit it. */
3730 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3732 /* No alternative works with reloads?? */
3733 if (insn_code_number >= 0)
3734 fatal_insn ("unable to generate reloads for:", insn);
3735 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3736 /* Avoid further trouble with this insn. */
3737 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3738 n_reloads = 0;
3739 return 0;
3742 /* Jump to `finish' from above if all operands are valid already.
3743 In that case, goal_alternative_win is all 1. */
3744 finish:
3746 /* Right now, for any pair of operands I and J that are required to match,
3747 with I < J,
3748 goal_alternative_matches[J] is I.
3749 Set up goal_alternative_matched as the inverse function:
3750 goal_alternative_matched[I] = J. */
3752 for (i = 0; i < noperands; i++)
3753 goal_alternative_matched[i] = -1;
3755 for (i = 0; i < noperands; i++)
3756 if (! goal_alternative_win[i]
3757 && goal_alternative_matches[i] >= 0)
3758 goal_alternative_matched[goal_alternative_matches[i]] = i;
3760 for (i = 0; i < noperands; i++)
3761 goal_alternative_win[i] |= goal_alternative_match_win[i];
3763 /* If the best alternative is with operands 1 and 2 swapped,
3764 consider them swapped before reporting the reloads. Update the
3765 operand numbers of any reloads already pushed. */
3767 if (goal_alternative_swapped)
3769 rtx tem;
3771 tem = substed_operand[commutative];
3772 substed_operand[commutative] = substed_operand[commutative + 1];
3773 substed_operand[commutative + 1] = tem;
3774 tem = recog_data.operand[commutative];
3775 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3776 recog_data.operand[commutative + 1] = tem;
3777 tem = *recog_data.operand_loc[commutative];
3778 *recog_data.operand_loc[commutative]
3779 = *recog_data.operand_loc[commutative + 1];
3780 *recog_data.operand_loc[commutative + 1] = tem;
3782 for (i = 0; i < n_reloads; i++)
3784 if (rld[i].opnum == commutative)
3785 rld[i].opnum = commutative + 1;
3786 else if (rld[i].opnum == commutative + 1)
3787 rld[i].opnum = commutative;
3791 for (i = 0; i < noperands; i++)
3793 operand_reloadnum[i] = -1;
3795 /* If this is an earlyclobber operand, we need to widen the scope.
3796 The reload must remain valid from the start of the insn being
3797 reloaded until after the operand is stored into its destination.
3798 We approximate this with RELOAD_OTHER even though we know that we
3799 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3801 One special case that is worth checking is when we have an
3802 output that is earlyclobber but isn't used past the insn (typically
3803 a SCRATCH). In this case, we only need have the reload live
3804 through the insn itself, but not for any of our input or output
3805 reloads.
3806 But we must not accidentally narrow the scope of an existing
3807 RELOAD_OTHER reload - leave these alone.
3809 In any case, anything needed to address this operand can remain
3810 however they were previously categorized. */
3812 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3813 operand_type[i]
3814 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3815 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3818 /* Any constants that aren't allowed and can't be reloaded
3819 into registers are here changed into memory references. */
3820 for (i = 0; i < noperands; i++)
3821 if (! goal_alternative_win[i]
3822 && CONST_POOL_OK_P (recog_data.operand[i])
3823 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3824 (enum reg_class) goal_alternative[i])
3825 == NO_REGS)
3826 || no_input_reloads)
3827 && operand_mode[i] != VOIDmode)
3829 substed_operand[i] = recog_data.operand[i]
3830 = find_reloads_toplev (force_const_mem (operand_mode[i],
3831 recog_data.operand[i]),
3832 i, address_type[i], ind_levels, 0, insn,
3833 NULL);
3834 if (alternative_allows_memconst (recog_data.constraints[i],
3835 goal_alternative_number))
3836 goal_alternative_win[i] = 1;
3839 /* Likewise any invalid constants appearing as operand of a PLUS
3840 that is to be reloaded. */
3841 for (i = 0; i < noperands; i++)
3842 if (! goal_alternative_win[i]
3843 && GET_CODE (recog_data.operand[i]) == PLUS
3844 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3845 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3846 (enum reg_class) goal_alternative[i])
3847 == NO_REGS)
3848 && operand_mode[i] != VOIDmode)
3850 rtx tem = force_const_mem (operand_mode[i],
3851 XEXP (recog_data.operand[i], 1));
3852 tem = gen_rtx_PLUS (operand_mode[i],
3853 XEXP (recog_data.operand[i], 0), tem);
3855 substed_operand[i] = recog_data.operand[i]
3856 = find_reloads_toplev (tem, i, address_type[i],
3857 ind_levels, 0, insn, NULL);
3860 /* Record the values of the earlyclobber operands for the caller. */
3861 if (goal_earlyclobber)
3862 for (i = 0; i < noperands; i++)
3863 if (goal_alternative_earlyclobber[i])
3864 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3866 /* Now record reloads for all the operands that need them. */
3867 for (i = 0; i < noperands; i++)
3868 if (! goal_alternative_win[i])
3870 /* Operands that match previous ones have already been handled. */
3871 if (goal_alternative_matches[i] >= 0)
3873 /* Handle an operand with a nonoffsettable address
3874 appearing where an offsettable address will do
3875 by reloading the address into a base register.
3877 ??? We can also do this when the operand is a register and
3878 reg_equiv_mem is not offsettable, but this is a bit tricky,
3879 so we don't bother with it. It may not be worth doing. */
3880 else if (goal_alternative_matched[i] == -1
3881 && goal_alternative_offmemok[i]
3882 && MEM_P (recog_data.operand[i]))
3884 /* If the address to be reloaded is a VOIDmode constant,
3885 use Pmode as mode of the reload register, as would have
3886 been done by find_reloads_address. */
3887 enum machine_mode address_mode;
3888 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3889 if (address_mode == VOIDmode)
3890 address_mode = Pmode;
3892 operand_reloadnum[i]
3893 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3894 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3895 base_reg_class (VOIDmode, MEM, SCRATCH),
3896 address_mode,
3897 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3898 rld[operand_reloadnum[i]].inc
3899 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3901 /* If this operand is an output, we will have made any
3902 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3903 now we are treating part of the operand as an input, so
3904 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3906 if (modified[i] == RELOAD_WRITE)
3908 for (j = 0; j < n_reloads; j++)
3910 if (rld[j].opnum == i)
3912 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3913 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3914 else if (rld[j].when_needed
3915 == RELOAD_FOR_OUTADDR_ADDRESS)
3916 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3921 else if (goal_alternative_matched[i] == -1)
3923 operand_reloadnum[i]
3924 = push_reload ((modified[i] != RELOAD_WRITE
3925 ? recog_data.operand[i] : 0),
3926 (modified[i] != RELOAD_READ
3927 ? recog_data.operand[i] : 0),
3928 (modified[i] != RELOAD_WRITE
3929 ? recog_data.operand_loc[i] : 0),
3930 (modified[i] != RELOAD_READ
3931 ? recog_data.operand_loc[i] : 0),
3932 (enum reg_class) goal_alternative[i],
3933 (modified[i] == RELOAD_WRITE
3934 ? VOIDmode : operand_mode[i]),
3935 (modified[i] == RELOAD_READ
3936 ? VOIDmode : operand_mode[i]),
3937 (insn_code_number < 0 ? 0
3938 : insn_data[insn_code_number].operand[i].strict_low),
3939 0, i, operand_type[i]);
3941 /* In a matching pair of operands, one must be input only
3942 and the other must be output only.
3943 Pass the input operand as IN and the other as OUT. */
3944 else if (modified[i] == RELOAD_READ
3945 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3947 operand_reloadnum[i]
3948 = push_reload (recog_data.operand[i],
3949 recog_data.operand[goal_alternative_matched[i]],
3950 recog_data.operand_loc[i],
3951 recog_data.operand_loc[goal_alternative_matched[i]],
3952 (enum reg_class) goal_alternative[i],
3953 operand_mode[i],
3954 operand_mode[goal_alternative_matched[i]],
3955 0, 0, i, RELOAD_OTHER);
3956 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3958 else if (modified[i] == RELOAD_WRITE
3959 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3961 operand_reloadnum[goal_alternative_matched[i]]
3962 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3963 recog_data.operand[i],
3964 recog_data.operand_loc[goal_alternative_matched[i]],
3965 recog_data.operand_loc[i],
3966 (enum reg_class) goal_alternative[i],
3967 operand_mode[goal_alternative_matched[i]],
3968 operand_mode[i],
3969 0, 0, i, RELOAD_OTHER);
3970 operand_reloadnum[i] = output_reloadnum;
3972 else
3974 gcc_assert (insn_code_number < 0);
3975 error_for_asm (insn, "inconsistent operand constraints "
3976 "in an %<asm%>");
3977 /* Avoid further trouble with this insn. */
3978 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3979 n_reloads = 0;
3980 return 0;
3983 else if (goal_alternative_matched[i] < 0
3984 && goal_alternative_matches[i] < 0
3985 && address_operand_reloaded[i] != 1
3986 && optimize)
3988 /* For each non-matching operand that's a MEM or a pseudo-register
3989 that didn't get a hard register, make an optional reload.
3990 This may get done even if the insn needs no reloads otherwise. */
3992 rtx operand = recog_data.operand[i];
3994 while (GET_CODE (operand) == SUBREG)
3995 operand = SUBREG_REG (operand);
3996 if ((MEM_P (operand)
3997 || (REG_P (operand)
3998 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3999 /* If this is only for an output, the optional reload would not
4000 actually cause us to use a register now, just note that
4001 something is stored here. */
4002 && ((enum reg_class) goal_alternative[i] != NO_REGS
4003 || modified[i] == RELOAD_WRITE)
4004 && ! no_input_reloads
4005 /* An optional output reload might allow to delete INSN later.
4006 We mustn't make in-out reloads on insns that are not permitted
4007 output reloads.
4008 If this is an asm, we can't delete it; we must not even call
4009 push_reload for an optional output reload in this case,
4010 because we can't be sure that the constraint allows a register,
4011 and push_reload verifies the constraints for asms. */
4012 && (modified[i] == RELOAD_READ
4013 || (! no_output_reloads && ! this_insn_is_asm)))
4014 operand_reloadnum[i]
4015 = push_reload ((modified[i] != RELOAD_WRITE
4016 ? recog_data.operand[i] : 0),
4017 (modified[i] != RELOAD_READ
4018 ? recog_data.operand[i] : 0),
4019 (modified[i] != RELOAD_WRITE
4020 ? recog_data.operand_loc[i] : 0),
4021 (modified[i] != RELOAD_READ
4022 ? recog_data.operand_loc[i] : 0),
4023 (enum reg_class) goal_alternative[i],
4024 (modified[i] == RELOAD_WRITE
4025 ? VOIDmode : operand_mode[i]),
4026 (modified[i] == RELOAD_READ
4027 ? VOIDmode : operand_mode[i]),
4028 (insn_code_number < 0 ? 0
4029 : insn_data[insn_code_number].operand[i].strict_low),
4030 1, i, operand_type[i]);
4031 /* If a memory reference remains (either as a MEM or a pseudo that
4032 did not get a hard register), yet we can't make an optional
4033 reload, check if this is actually a pseudo register reference;
4034 we then need to emit a USE and/or a CLOBBER so that reload
4035 inheritance will do the right thing. */
4036 else if (replace
4037 && (MEM_P (operand)
4038 || (REG_P (operand)
4039 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4040 && reg_renumber [REGNO (operand)] < 0)))
4042 operand = *recog_data.operand_loc[i];
4044 while (GET_CODE (operand) == SUBREG)
4045 operand = SUBREG_REG (operand);
4046 if (REG_P (operand))
4048 if (modified[i] != RELOAD_WRITE)
4049 /* We mark the USE with QImode so that we recognize
4050 it as one that can be safely deleted at the end
4051 of reload. */
4052 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4053 insn), QImode);
4054 if (modified[i] != RELOAD_READ)
4055 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4059 else if (goal_alternative_matches[i] >= 0
4060 && goal_alternative_win[goal_alternative_matches[i]]
4061 && modified[i] == RELOAD_READ
4062 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4063 && ! no_input_reloads && ! no_output_reloads
4064 && optimize)
4066 /* Similarly, make an optional reload for a pair of matching
4067 objects that are in MEM or a pseudo that didn't get a hard reg. */
4069 rtx operand = recog_data.operand[i];
4071 while (GET_CODE (operand) == SUBREG)
4072 operand = SUBREG_REG (operand);
4073 if ((MEM_P (operand)
4074 || (REG_P (operand)
4075 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4076 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4077 != NO_REGS))
4078 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4079 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4080 recog_data.operand[i],
4081 recog_data.operand_loc[goal_alternative_matches[i]],
4082 recog_data.operand_loc[i],
4083 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4084 operand_mode[goal_alternative_matches[i]],
4085 operand_mode[i],
4086 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4089 /* Perform whatever substitutions on the operands we are supposed
4090 to make due to commutativity or replacement of registers
4091 with equivalent constants or memory slots. */
4093 for (i = 0; i < noperands; i++)
4095 /* We only do this on the last pass through reload, because it is
4096 possible for some data (like reg_equiv_address) to be changed during
4097 later passes. Moreover, we lose the opportunity to get a useful
4098 reload_{in,out}_reg when we do these replacements. */
4100 if (replace)
4102 rtx substitution = substed_operand[i];
4104 *recog_data.operand_loc[i] = substitution;
4106 /* If we're replacing an operand with a LABEL_REF, we need to
4107 make sure that there's a REG_LABEL_OPERAND note attached to
4108 this instruction. */
4109 if (GET_CODE (substitution) == LABEL_REF
4110 && !find_reg_note (insn, REG_LABEL_OPERAND,
4111 XEXP (substitution, 0))
4112 /* For a JUMP_P, if it was a branch target it must have
4113 already been recorded as such. */
4114 && (!JUMP_P (insn)
4115 || !label_is_jump_target_p (XEXP (substitution, 0),
4116 insn)))
4117 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL_OPERAND,
4118 XEXP (substitution, 0),
4119 REG_NOTES (insn));
4121 else
4122 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4125 /* If this insn pattern contains any MATCH_DUP's, make sure that
4126 they will be substituted if the operands they match are substituted.
4127 Also do now any substitutions we already did on the operands.
4129 Don't do this if we aren't making replacements because we might be
4130 propagating things allocated by frame pointer elimination into places
4131 it doesn't expect. */
4133 if (insn_code_number >= 0 && replace)
4134 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4136 int opno = recog_data.dup_num[i];
4137 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4138 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4141 #if 0
4142 /* This loses because reloading of prior insns can invalidate the equivalence
4143 (or at least find_equiv_reg isn't smart enough to find it any more),
4144 causing this insn to need more reload regs than it needed before.
4145 It may be too late to make the reload regs available.
4146 Now this optimization is done safely in choose_reload_regs. */
4148 /* For each reload of a reg into some other class of reg,
4149 search for an existing equivalent reg (same value now) in the right class.
4150 We can use it as long as we don't need to change its contents. */
4151 for (i = 0; i < n_reloads; i++)
4152 if (rld[i].reg_rtx == 0
4153 && rld[i].in != 0
4154 && REG_P (rld[i].in)
4155 && rld[i].out == 0)
4157 rld[i].reg_rtx
4158 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4159 static_reload_reg_p, 0, rld[i].inmode);
4160 /* Prevent generation of insn to load the value
4161 because the one we found already has the value. */
4162 if (rld[i].reg_rtx)
4163 rld[i].in = rld[i].reg_rtx;
4165 #endif
4167 /* If we detected error and replaced asm instruction by USE, forget about the
4168 reloads. */
4169 if (GET_CODE (PATTERN (insn)) == USE
4170 && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4171 n_reloads = 0;
4173 /* Perhaps an output reload can be combined with another
4174 to reduce needs by one. */
4175 if (!goal_earlyclobber)
4176 combine_reloads ();
4178 /* If we have a pair of reloads for parts of an address, they are reloading
4179 the same object, the operands themselves were not reloaded, and they
4180 are for two operands that are supposed to match, merge the reloads and
4181 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4183 for (i = 0; i < n_reloads; i++)
4185 int k;
4187 for (j = i + 1; j < n_reloads; j++)
4188 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4189 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4190 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4191 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4192 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4193 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4194 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4195 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4196 && rtx_equal_p (rld[i].in, rld[j].in)
4197 && (operand_reloadnum[rld[i].opnum] < 0
4198 || rld[operand_reloadnum[rld[i].opnum]].optional)
4199 && (operand_reloadnum[rld[j].opnum] < 0
4200 || rld[operand_reloadnum[rld[j].opnum]].optional)
4201 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4202 || (goal_alternative_matches[rld[j].opnum]
4203 == rld[i].opnum)))
4205 for (k = 0; k < n_replacements; k++)
4206 if (replacements[k].what == j)
4207 replacements[k].what = i;
4209 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4210 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4211 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4212 else
4213 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4214 rld[j].in = 0;
4218 /* Scan all the reloads and update their type.
4219 If a reload is for the address of an operand and we didn't reload
4220 that operand, change the type. Similarly, change the operand number
4221 of a reload when two operands match. If a reload is optional, treat it
4222 as though the operand isn't reloaded.
4224 ??? This latter case is somewhat odd because if we do the optional
4225 reload, it means the object is hanging around. Thus we need only
4226 do the address reload if the optional reload was NOT done.
4228 Change secondary reloads to be the address type of their operand, not
4229 the normal type.
4231 If an operand's reload is now RELOAD_OTHER, change any
4232 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4233 RELOAD_FOR_OTHER_ADDRESS. */
4235 for (i = 0; i < n_reloads; i++)
4237 if (rld[i].secondary_p
4238 && rld[i].when_needed == operand_type[rld[i].opnum])
4239 rld[i].when_needed = address_type[rld[i].opnum];
4241 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4242 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4243 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4244 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4245 && (operand_reloadnum[rld[i].opnum] < 0
4246 || rld[operand_reloadnum[rld[i].opnum]].optional))
4248 /* If we have a secondary reload to go along with this reload,
4249 change its type to RELOAD_FOR_OPADDR_ADDR. */
4251 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4252 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4253 && rld[i].secondary_in_reload != -1)
4255 int secondary_in_reload = rld[i].secondary_in_reload;
4257 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4259 /* If there's a tertiary reload we have to change it also. */
4260 if (secondary_in_reload > 0
4261 && rld[secondary_in_reload].secondary_in_reload != -1)
4262 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4263 = RELOAD_FOR_OPADDR_ADDR;
4266 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4267 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4268 && rld[i].secondary_out_reload != -1)
4270 int secondary_out_reload = rld[i].secondary_out_reload;
4272 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4274 /* If there's a tertiary reload we have to change it also. */
4275 if (secondary_out_reload
4276 && rld[secondary_out_reload].secondary_out_reload != -1)
4277 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4278 = RELOAD_FOR_OPADDR_ADDR;
4281 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4282 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4283 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4284 else
4285 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4288 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4289 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4290 && operand_reloadnum[rld[i].opnum] >= 0
4291 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4292 == RELOAD_OTHER))
4293 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4295 if (goal_alternative_matches[rld[i].opnum] >= 0)
4296 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4299 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4300 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4301 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4303 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4304 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4305 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4306 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4307 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4308 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4309 This is complicated by the fact that a single operand can have more
4310 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4311 choose_reload_regs without affecting code quality, and cases that
4312 actually fail are extremely rare, so it turns out to be better to fix
4313 the problem here by not generating cases that choose_reload_regs will
4314 fail for. */
4315 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4316 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4317 a single operand.
4318 We can reduce the register pressure by exploiting that a
4319 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4320 does not conflict with any of them, if it is only used for the first of
4321 the RELOAD_FOR_X_ADDRESS reloads. */
4323 int first_op_addr_num = -2;
4324 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4325 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4326 int need_change = 0;
4327 /* We use last_op_addr_reload and the contents of the above arrays
4328 first as flags - -2 means no instance encountered, -1 means exactly
4329 one instance encountered.
4330 If more than one instance has been encountered, we store the reload
4331 number of the first reload of the kind in question; reload numbers
4332 are known to be non-negative. */
4333 for (i = 0; i < noperands; i++)
4334 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4335 for (i = n_reloads - 1; i >= 0; i--)
4337 switch (rld[i].when_needed)
4339 case RELOAD_FOR_OPERAND_ADDRESS:
4340 if (++first_op_addr_num >= 0)
4342 first_op_addr_num = i;
4343 need_change = 1;
4345 break;
4346 case RELOAD_FOR_INPUT_ADDRESS:
4347 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4349 first_inpaddr_num[rld[i].opnum] = i;
4350 need_change = 1;
4352 break;
4353 case RELOAD_FOR_OUTPUT_ADDRESS:
4354 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4356 first_outpaddr_num[rld[i].opnum] = i;
4357 need_change = 1;
4359 break;
4360 default:
4361 break;
4365 if (need_change)
4367 for (i = 0; i < n_reloads; i++)
4369 int first_num;
4370 enum reload_type type;
4372 switch (rld[i].when_needed)
4374 case RELOAD_FOR_OPADDR_ADDR:
4375 first_num = first_op_addr_num;
4376 type = RELOAD_FOR_OPERAND_ADDRESS;
4377 break;
4378 case RELOAD_FOR_INPADDR_ADDRESS:
4379 first_num = first_inpaddr_num[rld[i].opnum];
4380 type = RELOAD_FOR_INPUT_ADDRESS;
4381 break;
4382 case RELOAD_FOR_OUTADDR_ADDRESS:
4383 first_num = first_outpaddr_num[rld[i].opnum];
4384 type = RELOAD_FOR_OUTPUT_ADDRESS;
4385 break;
4386 default:
4387 continue;
4389 if (first_num < 0)
4390 continue;
4391 else if (i > first_num)
4392 rld[i].when_needed = type;
4393 else
4395 /* Check if the only TYPE reload that uses reload I is
4396 reload FIRST_NUM. */
4397 for (j = n_reloads - 1; j > first_num; j--)
4399 if (rld[j].when_needed == type
4400 && (rld[i].secondary_p
4401 ? rld[j].secondary_in_reload == i
4402 : reg_mentioned_p (rld[i].in, rld[j].in)))
4404 rld[i].when_needed = type;
4405 break;
4413 /* See if we have any reloads that are now allowed to be merged
4414 because we've changed when the reload is needed to
4415 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4416 check for the most common cases. */
4418 for (i = 0; i < n_reloads; i++)
4419 if (rld[i].in != 0 && rld[i].out == 0
4420 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4421 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4422 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4423 for (j = 0; j < n_reloads; j++)
4424 if (i != j && rld[j].in != 0 && rld[j].out == 0
4425 && rld[j].when_needed == rld[i].when_needed
4426 && MATCHES (rld[i].in, rld[j].in)
4427 && rld[i].class == rld[j].class
4428 && !rld[i].nocombine && !rld[j].nocombine
4429 && rld[i].reg_rtx == rld[j].reg_rtx)
4431 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4432 transfer_replacements (i, j);
4433 rld[j].in = 0;
4436 #ifdef HAVE_cc0
4437 /* If we made any reloads for addresses, see if they violate a
4438 "no input reloads" requirement for this insn. But loads that we
4439 do after the insn (such as for output addresses) are fine. */
4440 if (no_input_reloads)
4441 for (i = 0; i < n_reloads; i++)
4442 gcc_assert (rld[i].in == 0
4443 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4444 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4445 #endif
4447 /* Compute reload_mode and reload_nregs. */
4448 for (i = 0; i < n_reloads; i++)
4450 rld[i].mode
4451 = (rld[i].inmode == VOIDmode
4452 || (GET_MODE_SIZE (rld[i].outmode)
4453 > GET_MODE_SIZE (rld[i].inmode)))
4454 ? rld[i].outmode : rld[i].inmode;
4456 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4459 /* Special case a simple move with an input reload and a
4460 destination of a hard reg, if the hard reg is ok, use it. */
4461 for (i = 0; i < n_reloads; i++)
4462 if (rld[i].when_needed == RELOAD_FOR_INPUT
4463 && GET_CODE (PATTERN (insn)) == SET
4464 && REG_P (SET_DEST (PATTERN (insn)))
4465 && SET_SRC (PATTERN (insn)) == rld[i].in
4466 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4468 rtx dest = SET_DEST (PATTERN (insn));
4469 unsigned int regno = REGNO (dest);
4471 if (regno < FIRST_PSEUDO_REGISTER
4472 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4473 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4475 int nr = hard_regno_nregs[regno][rld[i].mode];
4476 int ok = 1, nri;
4478 for (nri = 1; nri < nr; nri ++)
4479 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4480 ok = 0;
4482 if (ok)
4483 rld[i].reg_rtx = dest;
4487 return retval;
4490 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4491 accepts a memory operand with constant address. */
4493 static int
4494 alternative_allows_memconst (const char *constraint, int altnum)
4496 int c;
4497 /* Skip alternatives before the one requested. */
4498 while (altnum > 0)
4500 while (*constraint++ != ',');
4501 altnum--;
4503 /* Scan the requested alternative for 'm' or 'o'.
4504 If one of them is present, this alternative accepts memory constants. */
4505 for (; (c = *constraint) && c != ',' && c != '#';
4506 constraint += CONSTRAINT_LEN (c, constraint))
4507 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4508 return 1;
4509 return 0;
4512 /* Scan X for memory references and scan the addresses for reloading.
4513 Also checks for references to "constant" regs that we want to eliminate
4514 and replaces them with the values they stand for.
4515 We may alter X destructively if it contains a reference to such.
4516 If X is just a constant reg, we return the equivalent value
4517 instead of X.
4519 IND_LEVELS says how many levels of indirect addressing this machine
4520 supports.
4522 OPNUM and TYPE identify the purpose of the reload.
4524 IS_SET_DEST is true if X is the destination of a SET, which is not
4525 appropriate to be replaced by a constant.
4527 INSN, if nonzero, is the insn in which we do the reload. It is used
4528 to determine if we may generate output reloads, and where to put USEs
4529 for pseudos that we have to replace with stack slots.
4531 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4532 result of find_reloads_address. */
4534 static rtx
4535 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4536 int ind_levels, int is_set_dest, rtx insn,
4537 int *address_reloaded)
4539 RTX_CODE code = GET_CODE (x);
4541 const char *fmt = GET_RTX_FORMAT (code);
4542 int i;
4543 int copied;
4545 if (code == REG)
4547 /* This code is duplicated for speed in find_reloads. */
4548 int regno = REGNO (x);
4549 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4550 x = reg_equiv_constant[regno];
4551 #if 0
4552 /* This creates (subreg (mem...)) which would cause an unnecessary
4553 reload of the mem. */
4554 else if (reg_equiv_mem[regno] != 0)
4555 x = reg_equiv_mem[regno];
4556 #endif
4557 else if (reg_equiv_memory_loc[regno]
4558 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4560 rtx mem = make_memloc (x, regno);
4561 if (reg_equiv_address[regno]
4562 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4564 /* If this is not a toplevel operand, find_reloads doesn't see
4565 this substitution. We have to emit a USE of the pseudo so
4566 that delete_output_reload can see it. */
4567 if (replace_reloads && recog_data.operand[opnum] != x)
4568 /* We mark the USE with QImode so that we recognize it
4569 as one that can be safely deleted at the end of
4570 reload. */
4571 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4572 QImode);
4573 x = mem;
4574 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4575 opnum, type, ind_levels, insn);
4576 if (!rtx_equal_p (x, mem))
4577 push_reg_equiv_alt_mem (regno, x);
4578 if (address_reloaded)
4579 *address_reloaded = i;
4582 return x;
4584 if (code == MEM)
4586 rtx tem = x;
4588 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4589 opnum, type, ind_levels, insn);
4590 if (address_reloaded)
4591 *address_reloaded = i;
4593 return tem;
4596 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4598 /* Check for SUBREG containing a REG that's equivalent to a
4599 constant. If the constant has a known value, truncate it
4600 right now. Similarly if we are extracting a single-word of a
4601 multi-word constant. If the constant is symbolic, allow it
4602 to be substituted normally. push_reload will strip the
4603 subreg later. The constant must not be VOIDmode, because we
4604 will lose the mode of the register (this should never happen
4605 because one of the cases above should handle it). */
4607 int regno = REGNO (SUBREG_REG (x));
4608 rtx tem;
4610 if (regno >= FIRST_PSEUDO_REGISTER
4611 && reg_renumber[regno] < 0
4612 && reg_equiv_constant[regno] != 0)
4614 tem =
4615 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4616 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4617 gcc_assert (tem);
4618 if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem))
4620 tem = force_const_mem (GET_MODE (x), tem);
4621 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4622 &XEXP (tem, 0), opnum, type,
4623 ind_levels, insn);
4624 if (address_reloaded)
4625 *address_reloaded = i;
4627 return tem;
4630 /* If the subreg contains a reg that will be converted to a mem,
4631 convert the subreg to a narrower memref now.
4632 Otherwise, we would get (subreg (mem ...) ...),
4633 which would force reload of the mem.
4635 We also need to do this if there is an equivalent MEM that is
4636 not offsettable. In that case, alter_subreg would produce an
4637 invalid address on big-endian machines.
4639 For machines that extend byte loads, we must not reload using
4640 a wider mode if we have a paradoxical SUBREG. find_reloads will
4641 force a reload in that case. So we should not do anything here. */
4643 if (regno >= FIRST_PSEUDO_REGISTER
4644 #ifdef LOAD_EXTEND_OP
4645 && (GET_MODE_SIZE (GET_MODE (x))
4646 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4647 #endif
4648 && (reg_equiv_address[regno] != 0
4649 || (reg_equiv_mem[regno] != 0
4650 && (! strict_memory_address_p (GET_MODE (x),
4651 XEXP (reg_equiv_mem[regno], 0))
4652 || ! offsettable_memref_p (reg_equiv_mem[regno])
4653 || num_not_at_initial_offset))))
4654 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4655 insn);
4658 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4660 if (fmt[i] == 'e')
4662 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4663 ind_levels, is_set_dest, insn,
4664 address_reloaded);
4665 /* If we have replaced a reg with it's equivalent memory loc -
4666 that can still be handled here e.g. if it's in a paradoxical
4667 subreg - we must make the change in a copy, rather than using
4668 a destructive change. This way, find_reloads can still elect
4669 not to do the change. */
4670 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4672 x = shallow_copy_rtx (x);
4673 copied = 1;
4675 XEXP (x, i) = new_part;
4678 return x;
4681 /* Return a mem ref for the memory equivalent of reg REGNO.
4682 This mem ref is not shared with anything. */
4684 static rtx
4685 make_memloc (rtx ad, int regno)
4687 /* We must rerun eliminate_regs, in case the elimination
4688 offsets have changed. */
4689 rtx tem
4690 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4692 /* If TEM might contain a pseudo, we must copy it to avoid
4693 modifying it when we do the substitution for the reload. */
4694 if (rtx_varies_p (tem, 0))
4695 tem = copy_rtx (tem);
4697 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4698 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4700 /* Copy the result if it's still the same as the equivalence, to avoid
4701 modifying it when we do the substitution for the reload. */
4702 if (tem == reg_equiv_memory_loc[regno])
4703 tem = copy_rtx (tem);
4704 return tem;
4707 /* Returns true if AD could be turned into a valid memory reference
4708 to mode MODE by reloading the part pointed to by PART into a
4709 register. */
4711 static int
4712 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4714 int retv;
4715 rtx tem = *part;
4716 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4718 *part = reg;
4719 retv = memory_address_p (mode, ad);
4720 *part = tem;
4722 return retv;
4725 /* Record all reloads needed for handling memory address AD
4726 which appears in *LOC in a memory reference to mode MODE
4727 which itself is found in location *MEMREFLOC.
4728 Note that we take shortcuts assuming that no multi-reg machine mode
4729 occurs as part of an address.
4731 OPNUM and TYPE specify the purpose of this reload.
4733 IND_LEVELS says how many levels of indirect addressing this machine
4734 supports.
4736 INSN, if nonzero, is the insn in which we do the reload. It is used
4737 to determine if we may generate output reloads, and where to put USEs
4738 for pseudos that we have to replace with stack slots.
4740 Value is one if this address is reloaded or replaced as a whole; it is
4741 zero if the top level of this address was not reloaded or replaced, and
4742 it is -1 if it may or may not have been reloaded or replaced.
4744 Note that there is no verification that the address will be valid after
4745 this routine does its work. Instead, we rely on the fact that the address
4746 was valid when reload started. So we need only undo things that reload
4747 could have broken. These are wrong register types, pseudos not allocated
4748 to a hard register, and frame pointer elimination. */
4750 static int
4751 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4752 rtx *loc, int opnum, enum reload_type type,
4753 int ind_levels, rtx insn)
4755 int regno;
4756 int removed_and = 0;
4757 int op_index;
4758 rtx tem;
4760 /* If the address is a register, see if it is a legitimate address and
4761 reload if not. We first handle the cases where we need not reload
4762 or where we must reload in a non-standard way. */
4764 if (REG_P (ad))
4766 regno = REGNO (ad);
4768 /* If the register is equivalent to an invariant expression, substitute
4769 the invariant, and eliminate any eliminable register references. */
4770 tem = reg_equiv_constant[regno];
4771 if (tem != 0
4772 && (tem = eliminate_regs (tem, mode, insn))
4773 && strict_memory_address_p (mode, tem))
4775 *loc = ad = tem;
4776 return 0;
4779 tem = reg_equiv_memory_loc[regno];
4780 if (tem != 0)
4782 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4784 tem = make_memloc (ad, regno);
4785 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4787 rtx orig = tem;
4789 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4790 &XEXP (tem, 0), opnum,
4791 ADDR_TYPE (type), ind_levels, insn);
4792 if (!rtx_equal_p (tem, orig))
4793 push_reg_equiv_alt_mem (regno, tem);
4795 /* We can avoid a reload if the register's equivalent memory
4796 expression is valid as an indirect memory address.
4797 But not all addresses are valid in a mem used as an indirect
4798 address: only reg or reg+constant. */
4800 if (ind_levels > 0
4801 && strict_memory_address_p (mode, tem)
4802 && (REG_P (XEXP (tem, 0))
4803 || (GET_CODE (XEXP (tem, 0)) == PLUS
4804 && REG_P (XEXP (XEXP (tem, 0), 0))
4805 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4807 /* TEM is not the same as what we'll be replacing the
4808 pseudo with after reload, put a USE in front of INSN
4809 in the final reload pass. */
4810 if (replace_reloads
4811 && num_not_at_initial_offset
4812 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4814 *loc = tem;
4815 /* We mark the USE with QImode so that we
4816 recognize it as one that can be safely
4817 deleted at the end of reload. */
4818 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4819 insn), QImode);
4821 /* This doesn't really count as replacing the address
4822 as a whole, since it is still a memory access. */
4824 return 0;
4826 ad = tem;
4830 /* The only remaining case where we can avoid a reload is if this is a
4831 hard register that is valid as a base register and which is not the
4832 subject of a CLOBBER in this insn. */
4834 else if (regno < FIRST_PSEUDO_REGISTER
4835 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4836 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4837 return 0;
4839 /* If we do not have one of the cases above, we must do the reload. */
4840 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4841 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4842 return 1;
4845 if (strict_memory_address_p (mode, ad))
4847 /* The address appears valid, so reloads are not needed.
4848 But the address may contain an eliminable register.
4849 This can happen because a machine with indirect addressing
4850 may consider a pseudo register by itself a valid address even when
4851 it has failed to get a hard reg.
4852 So do a tree-walk to find and eliminate all such regs. */
4854 /* But first quickly dispose of a common case. */
4855 if (GET_CODE (ad) == PLUS
4856 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4857 && REG_P (XEXP (ad, 0))
4858 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4859 return 0;
4861 subst_reg_equivs_changed = 0;
4862 *loc = subst_reg_equivs (ad, insn);
4864 if (! subst_reg_equivs_changed)
4865 return 0;
4867 /* Check result for validity after substitution. */
4868 if (strict_memory_address_p (mode, ad))
4869 return 0;
4872 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4875 if (memrefloc)
4877 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4878 ind_levels, win);
4880 break;
4881 win:
4882 *memrefloc = copy_rtx (*memrefloc);
4883 XEXP (*memrefloc, 0) = ad;
4884 move_replacements (&ad, &XEXP (*memrefloc, 0));
4885 return -1;
4887 while (0);
4888 #endif
4890 /* The address is not valid. We have to figure out why. First see if
4891 we have an outer AND and remove it if so. Then analyze what's inside. */
4893 if (GET_CODE (ad) == AND)
4895 removed_and = 1;
4896 loc = &XEXP (ad, 0);
4897 ad = *loc;
4900 /* One possibility for why the address is invalid is that it is itself
4901 a MEM. This can happen when the frame pointer is being eliminated, a
4902 pseudo is not allocated to a hard register, and the offset between the
4903 frame and stack pointers is not its initial value. In that case the
4904 pseudo will have been replaced by a MEM referring to the
4905 stack pointer. */
4906 if (MEM_P (ad))
4908 /* First ensure that the address in this MEM is valid. Then, unless
4909 indirect addresses are valid, reload the MEM into a register. */
4910 tem = ad;
4911 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4912 opnum, ADDR_TYPE (type),
4913 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4915 /* If tem was changed, then we must create a new memory reference to
4916 hold it and store it back into memrefloc. */
4917 if (tem != ad && memrefloc)
4919 *memrefloc = copy_rtx (*memrefloc);
4920 copy_replacements (tem, XEXP (*memrefloc, 0));
4921 loc = &XEXP (*memrefloc, 0);
4922 if (removed_and)
4923 loc = &XEXP (*loc, 0);
4926 /* Check similar cases as for indirect addresses as above except
4927 that we can allow pseudos and a MEM since they should have been
4928 taken care of above. */
4930 if (ind_levels == 0
4931 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4932 || MEM_P (XEXP (tem, 0))
4933 || ! (REG_P (XEXP (tem, 0))
4934 || (GET_CODE (XEXP (tem, 0)) == PLUS
4935 && REG_P (XEXP (XEXP (tem, 0), 0))
4936 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4938 /* Must use TEM here, not AD, since it is the one that will
4939 have any subexpressions reloaded, if needed. */
4940 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4941 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4942 VOIDmode, 0,
4943 0, opnum, type);
4944 return ! removed_and;
4946 else
4947 return 0;
4950 /* If we have address of a stack slot but it's not valid because the
4951 displacement is too large, compute the sum in a register.
4952 Handle all base registers here, not just fp/ap/sp, because on some
4953 targets (namely SH) we can also get too large displacements from
4954 big-endian corrections. */
4955 else if (GET_CODE (ad) == PLUS
4956 && REG_P (XEXP (ad, 0))
4957 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4958 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4959 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4960 CONST_INT))
4963 /* Unshare the MEM rtx so we can safely alter it. */
4964 if (memrefloc)
4966 *memrefloc = copy_rtx (*memrefloc);
4967 loc = &XEXP (*memrefloc, 0);
4968 if (removed_and)
4969 loc = &XEXP (*loc, 0);
4972 if (double_reg_address_ok)
4974 /* Unshare the sum as well. */
4975 *loc = ad = copy_rtx (ad);
4977 /* Reload the displacement into an index reg.
4978 We assume the frame pointer or arg pointer is a base reg. */
4979 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4980 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4981 type, ind_levels);
4982 return 0;
4984 else
4986 /* If the sum of two regs is not necessarily valid,
4987 reload the sum into a base reg.
4988 That will at least work. */
4989 find_reloads_address_part (ad, loc,
4990 base_reg_class (mode, MEM, SCRATCH),
4991 Pmode, opnum, type, ind_levels);
4993 return ! removed_and;
4996 /* If we have an indexed stack slot, there are three possible reasons why
4997 it might be invalid: The index might need to be reloaded, the address
4998 might have been made by frame pointer elimination and hence have a
4999 constant out of range, or both reasons might apply.
5001 We can easily check for an index needing reload, but even if that is the
5002 case, we might also have an invalid constant. To avoid making the
5003 conservative assumption and requiring two reloads, we see if this address
5004 is valid when not interpreted strictly. If it is, the only problem is
5005 that the index needs a reload and find_reloads_address_1 will take care
5006 of it.
5008 Handle all base registers here, not just fp/ap/sp, because on some
5009 targets (namely SPARC) we can also get invalid addresses from preventive
5010 subreg big-endian corrections made by find_reloads_toplev. We
5011 can also get expressions involving LO_SUM (rather than PLUS) from
5012 find_reloads_subreg_address.
5014 If we decide to do something, it must be that `double_reg_address_ok'
5015 is true. We generate a reload of the base register + constant and
5016 rework the sum so that the reload register will be added to the index.
5017 This is safe because we know the address isn't shared.
5019 We check for the base register as both the first and second operand of
5020 the innermost PLUS and/or LO_SUM. */
5022 for (op_index = 0; op_index < 2; ++op_index)
5024 rtx operand, addend;
5025 enum rtx_code inner_code;
5027 if (GET_CODE (ad) != PLUS)
5028 continue;
5030 inner_code = GET_CODE (XEXP (ad, 0));
5031 if (!(GET_CODE (ad) == PLUS
5032 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5033 && (inner_code == PLUS || inner_code == LO_SUM)))
5034 continue;
5036 operand = XEXP (XEXP (ad, 0), op_index);
5037 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5038 continue;
5040 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5042 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5043 GET_CODE (addend))
5044 || operand == frame_pointer_rtx
5045 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5046 || operand == hard_frame_pointer_rtx
5047 #endif
5048 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5049 || operand == arg_pointer_rtx
5050 #endif
5051 || operand == stack_pointer_rtx)
5052 && ! maybe_memory_address_p (mode, ad,
5053 &XEXP (XEXP (ad, 0), 1 - op_index)))
5055 rtx offset_reg;
5056 enum reg_class cls;
5058 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5060 /* Form the adjusted address. */
5061 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5062 ad = gen_rtx_PLUS (GET_MODE (ad),
5063 op_index == 0 ? offset_reg : addend,
5064 op_index == 0 ? addend : offset_reg);
5065 else
5066 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5067 op_index == 0 ? offset_reg : addend,
5068 op_index == 0 ? addend : offset_reg);
5069 *loc = ad;
5071 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5072 find_reloads_address_part (XEXP (ad, op_index),
5073 &XEXP (ad, op_index), cls,
5074 GET_MODE (ad), opnum, type, ind_levels);
5075 find_reloads_address_1 (mode,
5076 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5077 GET_CODE (XEXP (ad, op_index)),
5078 &XEXP (ad, 1 - op_index), opnum,
5079 type, 0, insn);
5081 return 0;
5085 /* See if address becomes valid when an eliminable register
5086 in a sum is replaced. */
5088 tem = ad;
5089 if (GET_CODE (ad) == PLUS)
5090 tem = subst_indexed_address (ad);
5091 if (tem != ad && strict_memory_address_p (mode, tem))
5093 /* Ok, we win that way. Replace any additional eliminable
5094 registers. */
5096 subst_reg_equivs_changed = 0;
5097 tem = subst_reg_equivs (tem, insn);
5099 /* Make sure that didn't make the address invalid again. */
5101 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5103 *loc = tem;
5104 return 0;
5108 /* If constants aren't valid addresses, reload the constant address
5109 into a register. */
5110 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5112 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5113 Unshare it so we can safely alter it. */
5114 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5115 && CONSTANT_POOL_ADDRESS_P (ad))
5117 *memrefloc = copy_rtx (*memrefloc);
5118 loc = &XEXP (*memrefloc, 0);
5119 if (removed_and)
5120 loc = &XEXP (*loc, 0);
5123 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5124 Pmode, opnum, type, ind_levels);
5125 return ! removed_and;
5128 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5129 ind_levels, insn);
5132 /* Find all pseudo regs appearing in AD
5133 that are eliminable in favor of equivalent values
5134 and do not have hard regs; replace them by their equivalents.
5135 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5136 front of it for pseudos that we have to replace with stack slots. */
5138 static rtx
5139 subst_reg_equivs (rtx ad, rtx insn)
5141 RTX_CODE code = GET_CODE (ad);
5142 int i;
5143 const char *fmt;
5145 switch (code)
5147 case HIGH:
5148 case CONST_INT:
5149 case CONST:
5150 case CONST_DOUBLE:
5151 case CONST_FIXED:
5152 case CONST_VECTOR:
5153 case SYMBOL_REF:
5154 case LABEL_REF:
5155 case PC:
5156 case CC0:
5157 return ad;
5159 case REG:
5161 int regno = REGNO (ad);
5163 if (reg_equiv_constant[regno] != 0)
5165 subst_reg_equivs_changed = 1;
5166 return reg_equiv_constant[regno];
5168 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5170 rtx mem = make_memloc (ad, regno);
5171 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5173 subst_reg_equivs_changed = 1;
5174 /* We mark the USE with QImode so that we recognize it
5175 as one that can be safely deleted at the end of
5176 reload. */
5177 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5178 QImode);
5179 return mem;
5183 return ad;
5185 case PLUS:
5186 /* Quickly dispose of a common case. */
5187 if (XEXP (ad, 0) == frame_pointer_rtx
5188 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5189 return ad;
5190 break;
5192 default:
5193 break;
5196 fmt = GET_RTX_FORMAT (code);
5197 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5198 if (fmt[i] == 'e')
5199 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5200 return ad;
5203 /* Compute the sum of X and Y, making canonicalizations assumed in an
5204 address, namely: sum constant integers, surround the sum of two
5205 constants with a CONST, put the constant as the second operand, and
5206 group the constant on the outermost sum.
5208 This routine assumes both inputs are already in canonical form. */
5211 form_sum (rtx x, rtx y)
5213 rtx tem;
5214 enum machine_mode mode = GET_MODE (x);
5216 if (mode == VOIDmode)
5217 mode = GET_MODE (y);
5219 if (mode == VOIDmode)
5220 mode = Pmode;
5222 if (GET_CODE (x) == CONST_INT)
5223 return plus_constant (y, INTVAL (x));
5224 else if (GET_CODE (y) == CONST_INT)
5225 return plus_constant (x, INTVAL (y));
5226 else if (CONSTANT_P (x))
5227 tem = x, x = y, y = tem;
5229 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5230 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5232 /* Note that if the operands of Y are specified in the opposite
5233 order in the recursive calls below, infinite recursion will occur. */
5234 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5235 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5237 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5238 constant will have been placed second. */
5239 if (CONSTANT_P (x) && CONSTANT_P (y))
5241 if (GET_CODE (x) == CONST)
5242 x = XEXP (x, 0);
5243 if (GET_CODE (y) == CONST)
5244 y = XEXP (y, 0);
5246 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5249 return gen_rtx_PLUS (mode, x, y);
5252 /* If ADDR is a sum containing a pseudo register that should be
5253 replaced with a constant (from reg_equiv_constant),
5254 return the result of doing so, and also apply the associative
5255 law so that the result is more likely to be a valid address.
5256 (But it is not guaranteed to be one.)
5258 Note that at most one register is replaced, even if more are
5259 replaceable. Also, we try to put the result into a canonical form
5260 so it is more likely to be a valid address.
5262 In all other cases, return ADDR. */
5264 static rtx
5265 subst_indexed_address (rtx addr)
5267 rtx op0 = 0, op1 = 0, op2 = 0;
5268 rtx tem;
5269 int regno;
5271 if (GET_CODE (addr) == PLUS)
5273 /* Try to find a register to replace. */
5274 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5275 if (REG_P (op0)
5276 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5277 && reg_renumber[regno] < 0
5278 && reg_equiv_constant[regno] != 0)
5279 op0 = reg_equiv_constant[regno];
5280 else if (REG_P (op1)
5281 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5282 && reg_renumber[regno] < 0
5283 && reg_equiv_constant[regno] != 0)
5284 op1 = reg_equiv_constant[regno];
5285 else if (GET_CODE (op0) == PLUS
5286 && (tem = subst_indexed_address (op0)) != op0)
5287 op0 = tem;
5288 else if (GET_CODE (op1) == PLUS
5289 && (tem = subst_indexed_address (op1)) != op1)
5290 op1 = tem;
5291 else
5292 return addr;
5294 /* Pick out up to three things to add. */
5295 if (GET_CODE (op1) == PLUS)
5296 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5297 else if (GET_CODE (op0) == PLUS)
5298 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5300 /* Compute the sum. */
5301 if (op2 != 0)
5302 op1 = form_sum (op1, op2);
5303 if (op1 != 0)
5304 op0 = form_sum (op0, op1);
5306 return op0;
5308 return addr;
5311 /* Update the REG_INC notes for an insn. It updates all REG_INC
5312 notes for the instruction which refer to REGNO the to refer
5313 to the reload number.
5315 INSN is the insn for which any REG_INC notes need updating.
5317 REGNO is the register number which has been reloaded.
5319 RELOADNUM is the reload number. */
5321 static void
5322 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5323 int reloadnum ATTRIBUTE_UNUSED)
5325 #ifdef AUTO_INC_DEC
5326 rtx link;
5328 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5329 if (REG_NOTE_KIND (link) == REG_INC
5330 && (int) REGNO (XEXP (link, 0)) == regno)
5331 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5332 #endif
5335 /* Record the pseudo registers we must reload into hard registers in a
5336 subexpression of a would-be memory address, X referring to a value
5337 in mode MODE. (This function is not called if the address we find
5338 is strictly valid.)
5340 CONTEXT = 1 means we are considering regs as index regs,
5341 = 0 means we are considering them as base regs.
5342 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5343 or an autoinc code.
5344 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5345 is the code of the index part of the address. Otherwise, pass SCRATCH
5346 for this argument.
5347 OPNUM and TYPE specify the purpose of any reloads made.
5349 IND_LEVELS says how many levels of indirect addressing are
5350 supported at this point in the address.
5352 INSN, if nonzero, is the insn in which we do the reload. It is used
5353 to determine if we may generate output reloads.
5355 We return nonzero if X, as a whole, is reloaded or replaced. */
5357 /* Note that we take shortcuts assuming that no multi-reg machine mode
5358 occurs as part of an address.
5359 Also, this is not fully machine-customizable; it works for machines
5360 such as VAXen and 68000's and 32000's, but other possible machines
5361 could have addressing modes that this does not handle right.
5362 If you add push_reload calls here, you need to make sure gen_reload
5363 handles those cases gracefully. */
5365 static int
5366 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5367 enum rtx_code outer_code, enum rtx_code index_code,
5368 rtx *loc, int opnum, enum reload_type type,
5369 int ind_levels, rtx insn)
5371 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5372 ((CONTEXT) == 0 \
5373 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5374 : REGNO_OK_FOR_INDEX_P (REGNO))
5376 enum reg_class context_reg_class;
5377 RTX_CODE code = GET_CODE (x);
5379 if (context == 1)
5380 context_reg_class = INDEX_REG_CLASS;
5381 else
5382 context_reg_class = base_reg_class (mode, outer_code, index_code);
5384 switch (code)
5386 case PLUS:
5388 rtx orig_op0 = XEXP (x, 0);
5389 rtx orig_op1 = XEXP (x, 1);
5390 RTX_CODE code0 = GET_CODE (orig_op0);
5391 RTX_CODE code1 = GET_CODE (orig_op1);
5392 rtx op0 = orig_op0;
5393 rtx op1 = orig_op1;
5395 if (GET_CODE (op0) == SUBREG)
5397 op0 = SUBREG_REG (op0);
5398 code0 = GET_CODE (op0);
5399 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5400 op0 = gen_rtx_REG (word_mode,
5401 (REGNO (op0) +
5402 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5403 GET_MODE (SUBREG_REG (orig_op0)),
5404 SUBREG_BYTE (orig_op0),
5405 GET_MODE (orig_op0))));
5408 if (GET_CODE (op1) == SUBREG)
5410 op1 = SUBREG_REG (op1);
5411 code1 = GET_CODE (op1);
5412 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5413 /* ??? Why is this given op1's mode and above for
5414 ??? op0 SUBREGs we use word_mode? */
5415 op1 = gen_rtx_REG (GET_MODE (op1),
5416 (REGNO (op1) +
5417 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5418 GET_MODE (SUBREG_REG (orig_op1)),
5419 SUBREG_BYTE (orig_op1),
5420 GET_MODE (orig_op1))));
5422 /* Plus in the index register may be created only as a result of
5423 register rematerialization for expression like &localvar*4. Reload it.
5424 It may be possible to combine the displacement on the outer level,
5425 but it is probably not worthwhile to do so. */
5426 if (context == 1)
5428 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5429 opnum, ADDR_TYPE (type), ind_levels, insn);
5430 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5431 context_reg_class,
5432 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5433 return 1;
5436 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5437 || code0 == ZERO_EXTEND || code1 == MEM)
5439 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5440 &XEXP (x, 0), opnum, type, ind_levels,
5441 insn);
5442 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5443 &XEXP (x, 1), opnum, type, ind_levels,
5444 insn);
5447 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5448 || code1 == ZERO_EXTEND || code0 == MEM)
5450 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5451 &XEXP (x, 0), opnum, type, ind_levels,
5452 insn);
5453 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5454 &XEXP (x, 1), opnum, type, ind_levels,
5455 insn);
5458 else if (code0 == CONST_INT || code0 == CONST
5459 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5460 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5461 &XEXP (x, 1), opnum, type, ind_levels,
5462 insn);
5464 else if (code1 == CONST_INT || code1 == CONST
5465 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5466 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5467 &XEXP (x, 0), opnum, type, ind_levels,
5468 insn);
5470 else if (code0 == REG && code1 == REG)
5472 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5473 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5474 return 0;
5475 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5476 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5477 return 0;
5478 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5479 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5480 &XEXP (x, 1), opnum, type, ind_levels,
5481 insn);
5482 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5483 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5484 &XEXP (x, 0), opnum, type, ind_levels,
5485 insn);
5486 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5487 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5488 &XEXP (x, 0), opnum, type, ind_levels,
5489 insn);
5490 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5491 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5492 &XEXP (x, 1), opnum, type, ind_levels,
5493 insn);
5494 else
5496 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5497 &XEXP (x, 0), opnum, type, ind_levels,
5498 insn);
5499 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5500 &XEXP (x, 1), opnum, type, ind_levels,
5501 insn);
5505 else if (code0 == REG)
5507 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5508 &XEXP (x, 0), opnum, type, ind_levels,
5509 insn);
5510 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5511 &XEXP (x, 1), opnum, type, ind_levels,
5512 insn);
5515 else if (code1 == REG)
5517 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5518 &XEXP (x, 1), opnum, type, ind_levels,
5519 insn);
5520 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5521 &XEXP (x, 0), opnum, type, ind_levels,
5522 insn);
5526 return 0;
5528 case POST_MODIFY:
5529 case PRE_MODIFY:
5531 rtx op0 = XEXP (x, 0);
5532 rtx op1 = XEXP (x, 1);
5533 enum rtx_code index_code;
5534 int regno;
5535 int reloadnum;
5537 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5538 return 0;
5540 /* Currently, we only support {PRE,POST}_MODIFY constructs
5541 where a base register is {inc,dec}remented by the contents
5542 of another register or by a constant value. Thus, these
5543 operands must match. */
5544 gcc_assert (op0 == XEXP (op1, 0));
5546 /* Require index register (or constant). Let's just handle the
5547 register case in the meantime... If the target allows
5548 auto-modify by a constant then we could try replacing a pseudo
5549 register with its equivalent constant where applicable.
5551 We also handle the case where the register was eliminated
5552 resulting in a PLUS subexpression.
5554 If we later decide to reload the whole PRE_MODIFY or
5555 POST_MODIFY, inc_for_reload might clobber the reload register
5556 before reading the index. The index register might therefore
5557 need to live longer than a TYPE reload normally would, so be
5558 conservative and class it as RELOAD_OTHER. */
5559 if ((REG_P (XEXP (op1, 1))
5560 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5561 || GET_CODE (XEXP (op1, 1)) == PLUS)
5562 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5563 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5564 ind_levels, insn);
5566 gcc_assert (REG_P (XEXP (op1, 0)));
5568 regno = REGNO (XEXP (op1, 0));
5569 index_code = GET_CODE (XEXP (op1, 1));
5571 /* A register that is incremented cannot be constant! */
5572 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5573 || reg_equiv_constant[regno] == 0);
5575 /* Handle a register that is equivalent to a memory location
5576 which cannot be addressed directly. */
5577 if (reg_equiv_memory_loc[regno] != 0
5578 && (reg_equiv_address[regno] != 0
5579 || num_not_at_initial_offset))
5581 rtx tem = make_memloc (XEXP (x, 0), regno);
5583 if (reg_equiv_address[regno]
5584 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5586 rtx orig = tem;
5588 /* First reload the memory location's address.
5589 We can't use ADDR_TYPE (type) here, because we need to
5590 write back the value after reading it, hence we actually
5591 need two registers. */
5592 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5593 &XEXP (tem, 0), opnum,
5594 RELOAD_OTHER,
5595 ind_levels, insn);
5597 if (!rtx_equal_p (tem, orig))
5598 push_reg_equiv_alt_mem (regno, tem);
5600 /* Then reload the memory location into a base
5601 register. */
5602 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5603 &XEXP (op1, 0),
5604 base_reg_class (mode, code,
5605 index_code),
5606 GET_MODE (x), GET_MODE (x), 0,
5607 0, opnum, RELOAD_OTHER);
5609 update_auto_inc_notes (this_insn, regno, reloadnum);
5610 return 0;
5614 if (reg_renumber[regno] >= 0)
5615 regno = reg_renumber[regno];
5617 /* We require a base register here... */
5618 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5620 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5621 &XEXP (op1, 0), &XEXP (x, 0),
5622 base_reg_class (mode, code, index_code),
5623 GET_MODE (x), GET_MODE (x), 0, 0,
5624 opnum, RELOAD_OTHER);
5626 update_auto_inc_notes (this_insn, regno, reloadnum);
5627 return 0;
5630 return 0;
5632 case POST_INC:
5633 case POST_DEC:
5634 case PRE_INC:
5635 case PRE_DEC:
5636 if (REG_P (XEXP (x, 0)))
5638 int regno = REGNO (XEXP (x, 0));
5639 int value = 0;
5640 rtx x_orig = x;
5642 /* A register that is incremented cannot be constant! */
5643 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5644 || reg_equiv_constant[regno] == 0);
5646 /* Handle a register that is equivalent to a memory location
5647 which cannot be addressed directly. */
5648 if (reg_equiv_memory_loc[regno] != 0
5649 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5651 rtx tem = make_memloc (XEXP (x, 0), regno);
5652 if (reg_equiv_address[regno]
5653 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5655 rtx orig = tem;
5657 /* First reload the memory location's address.
5658 We can't use ADDR_TYPE (type) here, because we need to
5659 write back the value after reading it, hence we actually
5660 need two registers. */
5661 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5662 &XEXP (tem, 0), opnum, type,
5663 ind_levels, insn);
5664 if (!rtx_equal_p (tem, orig))
5665 push_reg_equiv_alt_mem (regno, tem);
5666 /* Put this inside a new increment-expression. */
5667 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5668 /* Proceed to reload that, as if it contained a register. */
5672 /* If we have a hard register that is ok as an index,
5673 don't make a reload. If an autoincrement of a nice register
5674 isn't "valid", it must be that no autoincrement is "valid".
5675 If that is true and something made an autoincrement anyway,
5676 this must be a special context where one is allowed.
5677 (For example, a "push" instruction.)
5678 We can't improve this address, so leave it alone. */
5680 /* Otherwise, reload the autoincrement into a suitable hard reg
5681 and record how much to increment by. */
5683 if (reg_renumber[regno] >= 0)
5684 regno = reg_renumber[regno];
5685 if (regno >= FIRST_PSEUDO_REGISTER
5686 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5687 index_code))
5689 int reloadnum;
5691 /* If we can output the register afterwards, do so, this
5692 saves the extra update.
5693 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5694 CALL_INSN - and it does not set CC0.
5695 But don't do this if we cannot directly address the
5696 memory location, since this will make it harder to
5697 reuse address reloads, and increases register pressure.
5698 Also don't do this if we can probably update x directly. */
5699 rtx equiv = (MEM_P (XEXP (x, 0))
5700 ? XEXP (x, 0)
5701 : reg_equiv_mem[regno]);
5702 int icode = (int) optab_handler (add_optab, Pmode)->insn_code;
5703 if (insn && NONJUMP_INSN_P (insn) && equiv
5704 && memory_operand (equiv, GET_MODE (equiv))
5705 #ifdef HAVE_cc0
5706 && ! sets_cc0_p (PATTERN (insn))
5707 #endif
5708 && ! (icode != CODE_FOR_nothing
5709 && ((*insn_data[icode].operand[0].predicate)
5710 (equiv, Pmode))
5711 && ((*insn_data[icode].operand[1].predicate)
5712 (equiv, Pmode))))
5714 /* We use the original pseudo for loc, so that
5715 emit_reload_insns() knows which pseudo this
5716 reload refers to and updates the pseudo rtx, not
5717 its equivalent memory location, as well as the
5718 corresponding entry in reg_last_reload_reg. */
5719 loc = &XEXP (x_orig, 0);
5720 x = XEXP (x, 0);
5721 reloadnum
5722 = push_reload (x, x, loc, loc,
5723 context_reg_class,
5724 GET_MODE (x), GET_MODE (x), 0, 0,
5725 opnum, RELOAD_OTHER);
5727 else
5729 reloadnum
5730 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5731 context_reg_class,
5732 GET_MODE (x), GET_MODE (x), 0, 0,
5733 opnum, type);
5734 rld[reloadnum].inc
5735 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5737 value = 1;
5740 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5741 reloadnum);
5743 return value;
5745 return 0;
5747 case TRUNCATE:
5748 case SIGN_EXTEND:
5749 case ZERO_EXTEND:
5750 /* Look for parts to reload in the inner expression and reload them
5751 too, in addition to this operation. Reloading all inner parts in
5752 addition to this one shouldn't be necessary, but at this point,
5753 we don't know if we can possibly omit any part that *can* be
5754 reloaded. Targets that are better off reloading just either part
5755 (or perhaps even a different part of an outer expression), should
5756 define LEGITIMIZE_RELOAD_ADDRESS. */
5757 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5758 context, code, SCRATCH, &XEXP (x, 0), opnum,
5759 type, ind_levels, insn);
5760 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5761 context_reg_class,
5762 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5763 return 1;
5765 case MEM:
5766 /* This is probably the result of a substitution, by eliminate_regs, of
5767 an equivalent address for a pseudo that was not allocated to a hard
5768 register. Verify that the specified address is valid and reload it
5769 into a register.
5771 Since we know we are going to reload this item, don't decrement for
5772 the indirection level.
5774 Note that this is actually conservative: it would be slightly more
5775 efficient to use the value of SPILL_INDIRECT_LEVELS from
5776 reload1.c here. */
5778 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5779 opnum, ADDR_TYPE (type), ind_levels, insn);
5780 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5781 context_reg_class,
5782 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5783 return 1;
5785 case REG:
5787 int regno = REGNO (x);
5789 if (reg_equiv_constant[regno] != 0)
5791 find_reloads_address_part (reg_equiv_constant[regno], loc,
5792 context_reg_class,
5793 GET_MODE (x), opnum, type, ind_levels);
5794 return 1;
5797 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5798 that feeds this insn. */
5799 if (reg_equiv_mem[regno] != 0)
5801 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5802 context_reg_class,
5803 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5804 return 1;
5806 #endif
5808 if (reg_equiv_memory_loc[regno]
5809 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5811 rtx tem = make_memloc (x, regno);
5812 if (reg_equiv_address[regno] != 0
5813 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5815 x = tem;
5816 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5817 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5818 ind_levels, insn);
5819 if (!rtx_equal_p (x, tem))
5820 push_reg_equiv_alt_mem (regno, x);
5824 if (reg_renumber[regno] >= 0)
5825 regno = reg_renumber[regno];
5827 if (regno >= FIRST_PSEUDO_REGISTER
5828 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5829 index_code))
5831 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5832 context_reg_class,
5833 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5834 return 1;
5837 /* If a register appearing in an address is the subject of a CLOBBER
5838 in this insn, reload it into some other register to be safe.
5839 The CLOBBER is supposed to make the register unavailable
5840 from before this insn to after it. */
5841 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5843 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5844 context_reg_class,
5845 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5846 return 1;
5849 return 0;
5851 case SUBREG:
5852 if (REG_P (SUBREG_REG (x)))
5854 /* If this is a SUBREG of a hard register and the resulting register
5855 is of the wrong class, reload the whole SUBREG. This avoids
5856 needless copies if SUBREG_REG is multi-word. */
5857 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5859 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5861 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5862 index_code))
5864 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5865 context_reg_class,
5866 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5867 return 1;
5870 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5871 is larger than the class size, then reload the whole SUBREG. */
5872 else
5874 enum reg_class class = context_reg_class;
5875 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5876 > reg_class_size[class])
5878 x = find_reloads_subreg_address (x, 0, opnum,
5879 ADDR_TYPE (type),
5880 ind_levels, insn);
5881 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5882 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5883 return 1;
5887 break;
5889 default:
5890 break;
5894 const char *fmt = GET_RTX_FORMAT (code);
5895 int i;
5897 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5899 if (fmt[i] == 'e')
5900 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5901 we get here. */
5902 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5903 &XEXP (x, i), opnum, type, ind_levels, insn);
5907 #undef REG_OK_FOR_CONTEXT
5908 return 0;
5911 /* X, which is found at *LOC, is a part of an address that needs to be
5912 reloaded into a register of class CLASS. If X is a constant, or if
5913 X is a PLUS that contains a constant, check that the constant is a
5914 legitimate operand and that we are supposed to be able to load
5915 it into the register.
5917 If not, force the constant into memory and reload the MEM instead.
5919 MODE is the mode to use, in case X is an integer constant.
5921 OPNUM and TYPE describe the purpose of any reloads made.
5923 IND_LEVELS says how many levels of indirect addressing this machine
5924 supports. */
5926 static void
5927 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5928 enum machine_mode mode, int opnum,
5929 enum reload_type type, int ind_levels)
5931 if (CONSTANT_P (x)
5932 && (! LEGITIMATE_CONSTANT_P (x)
5933 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5935 x = force_const_mem (mode, x);
5936 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
5937 opnum, type, ind_levels, 0);
5940 else if (GET_CODE (x) == PLUS
5941 && CONSTANT_P (XEXP (x, 1))
5942 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5943 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5945 rtx tem;
5947 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5948 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5949 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
5950 opnum, type, ind_levels, 0);
5953 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5954 mode, VOIDmode, 0, 0, opnum, type);
5957 /* X, a subreg of a pseudo, is a part of an address that needs to be
5958 reloaded.
5960 If the pseudo is equivalent to a memory location that cannot be directly
5961 addressed, make the necessary address reloads.
5963 If address reloads have been necessary, or if the address is changed
5964 by register elimination, return the rtx of the memory location;
5965 otherwise, return X.
5967 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5968 memory location.
5970 OPNUM and TYPE identify the purpose of the reload.
5972 IND_LEVELS says how many levels of indirect addressing are
5973 supported at this point in the address.
5975 INSN, if nonzero, is the insn in which we do the reload. It is used
5976 to determine where to put USEs for pseudos that we have to replace with
5977 stack slots. */
5979 static rtx
5980 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5981 enum reload_type type, int ind_levels, rtx insn)
5983 int regno = REGNO (SUBREG_REG (x));
5985 if (reg_equiv_memory_loc[regno])
5987 /* If the address is not directly addressable, or if the address is not
5988 offsettable, then it must be replaced. */
5989 if (! force_replace
5990 && (reg_equiv_address[regno]
5991 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5992 force_replace = 1;
5994 if (force_replace || num_not_at_initial_offset)
5996 rtx tem = make_memloc (SUBREG_REG (x), regno);
5998 /* If the address changes because of register elimination, then
5999 it must be replaced. */
6000 if (force_replace
6001 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6003 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6004 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6005 int offset;
6006 rtx orig = tem;
6007 enum machine_mode orig_mode = GET_MODE (orig);
6008 int reloaded;
6010 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6011 hold the correct (negative) byte offset. */
6012 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6013 offset = inner_size - outer_size;
6014 else
6015 offset = SUBREG_BYTE (x);
6017 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6018 PUT_MODE (tem, GET_MODE (x));
6020 /* If this was a paradoxical subreg that we replaced, the
6021 resulting memory must be sufficiently aligned to allow
6022 us to widen the mode of the memory. */
6023 if (outer_size > inner_size)
6025 rtx base;
6027 base = XEXP (tem, 0);
6028 if (GET_CODE (base) == PLUS)
6030 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6031 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6032 return x;
6033 base = XEXP (base, 0);
6035 if (!REG_P (base)
6036 || (REGNO_POINTER_ALIGN (REGNO (base))
6037 < outer_size * BITS_PER_UNIT))
6038 return x;
6041 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6042 XEXP (tem, 0), &XEXP (tem, 0),
6043 opnum, type, ind_levels, insn);
6044 /* ??? Do we need to handle nonzero offsets somehow? */
6045 if (!offset && !rtx_equal_p (tem, orig))
6046 push_reg_equiv_alt_mem (regno, tem);
6048 /* For some processors an address may be valid in the
6049 original mode but not in a smaller mode. For
6050 example, ARM accepts a scaled index register in
6051 SImode but not in HImode. find_reloads_address
6052 assumes that we pass it a valid address, and doesn't
6053 force a reload. This will probably be fine if
6054 find_reloads_address finds some reloads. But if it
6055 doesn't find any, then we may have just converted a
6056 valid address into an invalid one. Check for that
6057 here. */
6058 if (reloaded != 1
6059 && strict_memory_address_p (orig_mode, XEXP (tem, 0))
6060 && !strict_memory_address_p (GET_MODE (tem),
6061 XEXP (tem, 0)))
6062 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6063 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6064 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6065 opnum, type);
6067 /* If this is not a toplevel operand, find_reloads doesn't see
6068 this substitution. We have to emit a USE of the pseudo so
6069 that delete_output_reload can see it. */
6070 if (replace_reloads && recog_data.operand[opnum] != x)
6071 /* We mark the USE with QImode so that we recognize it
6072 as one that can be safely deleted at the end of
6073 reload. */
6074 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6075 SUBREG_REG (x)),
6076 insn), QImode);
6077 x = tem;
6081 return x;
6084 /* Substitute into the current INSN the registers into which we have reloaded
6085 the things that need reloading. The array `replacements'
6086 contains the locations of all pointers that must be changed
6087 and says what to replace them with.
6089 Return the rtx that X translates into; usually X, but modified. */
6091 void
6092 subst_reloads (rtx insn)
6094 int i;
6096 for (i = 0; i < n_replacements; i++)
6098 struct replacement *r = &replacements[i];
6099 rtx reloadreg = rld[r->what].reg_rtx;
6100 if (reloadreg)
6102 #ifdef DEBUG_RELOAD
6103 /* This checking takes a very long time on some platforms
6104 causing the gcc.c-torture/compile/limits-fnargs.c test
6105 to time out during testing. See PR 31850.
6107 Internal consistency test. Check that we don't modify
6108 anything in the equivalence arrays. Whenever something from
6109 those arrays needs to be reloaded, it must be unshared before
6110 being substituted into; the equivalence must not be modified.
6111 Otherwise, if the equivalence is used after that, it will
6112 have been modified, and the thing substituted (probably a
6113 register) is likely overwritten and not a usable equivalence. */
6114 int check_regno;
6116 for (check_regno = 0; check_regno < max_regno; check_regno++)
6118 #define CHECK_MODF(ARRAY) \
6119 gcc_assert (!ARRAY[check_regno] \
6120 || !loc_mentioned_in_p (r->where, \
6121 ARRAY[check_regno]))
6123 CHECK_MODF (reg_equiv_constant);
6124 CHECK_MODF (reg_equiv_memory_loc);
6125 CHECK_MODF (reg_equiv_address);
6126 CHECK_MODF (reg_equiv_mem);
6127 #undef CHECK_MODF
6129 #endif /* DEBUG_RELOAD */
6131 /* If we're replacing a LABEL_REF with a register, there must
6132 already be an indication (to e.g. flow) which label this
6133 register refers to. */
6134 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6135 || !JUMP_P (insn)
6136 || find_reg_note (insn,
6137 REG_LABEL_OPERAND,
6138 XEXP (*r->where, 0))
6139 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6141 /* Encapsulate RELOADREG so its machine mode matches what
6142 used to be there. Note that gen_lowpart_common will
6143 do the wrong thing if RELOADREG is multi-word. RELOADREG
6144 will always be a REG here. */
6145 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6146 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6148 /* If we are putting this into a SUBREG and RELOADREG is a
6149 SUBREG, we would be making nested SUBREGs, so we have to fix
6150 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6152 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6154 if (GET_MODE (*r->subreg_loc)
6155 == GET_MODE (SUBREG_REG (reloadreg)))
6156 *r->subreg_loc = SUBREG_REG (reloadreg);
6157 else
6159 int final_offset =
6160 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6162 /* When working with SUBREGs the rule is that the byte
6163 offset must be a multiple of the SUBREG's mode. */
6164 final_offset = (final_offset /
6165 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6166 final_offset = (final_offset *
6167 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6169 *r->where = SUBREG_REG (reloadreg);
6170 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6173 else
6174 *r->where = reloadreg;
6176 /* If reload got no reg and isn't optional, something's wrong. */
6177 else
6178 gcc_assert (rld[r->what].optional);
6182 /* Make a copy of any replacements being done into X and move those
6183 copies to locations in Y, a copy of X. */
6185 void
6186 copy_replacements (rtx x, rtx y)
6188 /* We can't support X being a SUBREG because we might then need to know its
6189 location if something inside it was replaced. */
6190 gcc_assert (GET_CODE (x) != SUBREG);
6192 copy_replacements_1 (&x, &y, n_replacements);
6195 static void
6196 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6198 int i, j;
6199 rtx x, y;
6200 struct replacement *r;
6201 enum rtx_code code;
6202 const char *fmt;
6204 for (j = 0; j < orig_replacements; j++)
6206 if (replacements[j].subreg_loc == px)
6208 r = &replacements[n_replacements++];
6209 r->where = replacements[j].where;
6210 r->subreg_loc = py;
6211 r->what = replacements[j].what;
6212 r->mode = replacements[j].mode;
6214 else if (replacements[j].where == px)
6216 r = &replacements[n_replacements++];
6217 r->where = py;
6218 r->subreg_loc = 0;
6219 r->what = replacements[j].what;
6220 r->mode = replacements[j].mode;
6224 x = *px;
6225 y = *py;
6226 code = GET_CODE (x);
6227 fmt = GET_RTX_FORMAT (code);
6229 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6231 if (fmt[i] == 'e')
6232 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6233 else if (fmt[i] == 'E')
6234 for (j = XVECLEN (x, i); --j >= 0; )
6235 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6236 orig_replacements);
6240 /* Change any replacements being done to *X to be done to *Y. */
6242 void
6243 move_replacements (rtx *x, rtx *y)
6245 int i;
6247 for (i = 0; i < n_replacements; i++)
6248 if (replacements[i].subreg_loc == x)
6249 replacements[i].subreg_loc = y;
6250 else if (replacements[i].where == x)
6252 replacements[i].where = y;
6253 replacements[i].subreg_loc = 0;
6257 /* If LOC was scheduled to be replaced by something, return the replacement.
6258 Otherwise, return *LOC. */
6261 find_replacement (rtx *loc)
6263 struct replacement *r;
6265 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6267 rtx reloadreg = rld[r->what].reg_rtx;
6269 if (reloadreg && r->where == loc)
6271 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6272 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6274 return reloadreg;
6276 else if (reloadreg && r->subreg_loc == loc)
6278 /* RELOADREG must be either a REG or a SUBREG.
6280 ??? Is it actually still ever a SUBREG? If so, why? */
6282 if (REG_P (reloadreg))
6283 return gen_rtx_REG (GET_MODE (*loc),
6284 (REGNO (reloadreg) +
6285 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6286 GET_MODE (SUBREG_REG (*loc)),
6287 SUBREG_BYTE (*loc),
6288 GET_MODE (*loc))));
6289 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6290 return reloadreg;
6291 else
6293 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6295 /* When working with SUBREGs the rule is that the byte
6296 offset must be a multiple of the SUBREG's mode. */
6297 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6298 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6299 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6300 final_offset);
6305 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6306 what's inside and make a new rtl if so. */
6307 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6308 || GET_CODE (*loc) == MULT)
6310 rtx x = find_replacement (&XEXP (*loc, 0));
6311 rtx y = find_replacement (&XEXP (*loc, 1));
6313 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6314 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6317 return *loc;
6320 /* Return nonzero if register in range [REGNO, ENDREGNO)
6321 appears either explicitly or implicitly in X
6322 other than being stored into (except for earlyclobber operands).
6324 References contained within the substructure at LOC do not count.
6325 LOC may be zero, meaning don't ignore anything.
6327 This is similar to refers_to_regno_p in rtlanal.c except that we
6328 look at equivalences for pseudos that didn't get hard registers. */
6330 static int
6331 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6332 rtx x, rtx *loc)
6334 int i;
6335 unsigned int r;
6336 RTX_CODE code;
6337 const char *fmt;
6339 if (x == 0)
6340 return 0;
6342 repeat:
6343 code = GET_CODE (x);
6345 switch (code)
6347 case REG:
6348 r = REGNO (x);
6350 /* If this is a pseudo, a hard register must not have been allocated.
6351 X must therefore either be a constant or be in memory. */
6352 if (r >= FIRST_PSEUDO_REGISTER)
6354 if (reg_equiv_memory_loc[r])
6355 return refers_to_regno_for_reload_p (regno, endregno,
6356 reg_equiv_memory_loc[r],
6357 (rtx*) 0);
6359 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6360 return 0;
6363 return (endregno > r
6364 && regno < r + (r < FIRST_PSEUDO_REGISTER
6365 ? hard_regno_nregs[r][GET_MODE (x)]
6366 : 1));
6368 case SUBREG:
6369 /* If this is a SUBREG of a hard reg, we can see exactly which
6370 registers are being modified. Otherwise, handle normally. */
6371 if (REG_P (SUBREG_REG (x))
6372 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6374 unsigned int inner_regno = subreg_regno (x);
6375 unsigned int inner_endregno
6376 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6377 ? subreg_nregs (x) : 1);
6379 return endregno > inner_regno && regno < inner_endregno;
6381 break;
6383 case CLOBBER:
6384 case SET:
6385 if (&SET_DEST (x) != loc
6386 /* Note setting a SUBREG counts as referring to the REG it is in for
6387 a pseudo but not for hard registers since we can
6388 treat each word individually. */
6389 && ((GET_CODE (SET_DEST (x)) == SUBREG
6390 && loc != &SUBREG_REG (SET_DEST (x))
6391 && REG_P (SUBREG_REG (SET_DEST (x)))
6392 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6393 && refers_to_regno_for_reload_p (regno, endregno,
6394 SUBREG_REG (SET_DEST (x)),
6395 loc))
6396 /* If the output is an earlyclobber operand, this is
6397 a conflict. */
6398 || ((!REG_P (SET_DEST (x))
6399 || earlyclobber_operand_p (SET_DEST (x)))
6400 && refers_to_regno_for_reload_p (regno, endregno,
6401 SET_DEST (x), loc))))
6402 return 1;
6404 if (code == CLOBBER || loc == &SET_SRC (x))
6405 return 0;
6406 x = SET_SRC (x);
6407 goto repeat;
6409 default:
6410 break;
6413 /* X does not match, so try its subexpressions. */
6415 fmt = GET_RTX_FORMAT (code);
6416 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6418 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6420 if (i == 0)
6422 x = XEXP (x, 0);
6423 goto repeat;
6425 else
6426 if (refers_to_regno_for_reload_p (regno, endregno,
6427 XEXP (x, i), loc))
6428 return 1;
6430 else if (fmt[i] == 'E')
6432 int j;
6433 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6434 if (loc != &XVECEXP (x, i, j)
6435 && refers_to_regno_for_reload_p (regno, endregno,
6436 XVECEXP (x, i, j), loc))
6437 return 1;
6440 return 0;
6443 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6444 we check if any register number in X conflicts with the relevant register
6445 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6446 contains a MEM (we don't bother checking for memory addresses that can't
6447 conflict because we expect this to be a rare case.
6449 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6450 that we look at equivalences for pseudos that didn't get hard registers. */
6453 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6455 int regno, endregno;
6457 /* Overly conservative. */
6458 if (GET_CODE (x) == STRICT_LOW_PART
6459 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6460 x = XEXP (x, 0);
6462 /* If either argument is a constant, then modifying X can not affect IN. */
6463 if (CONSTANT_P (x) || CONSTANT_P (in))
6464 return 0;
6465 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6466 return refers_to_mem_for_reload_p (in);
6467 else if (GET_CODE (x) == SUBREG)
6469 regno = REGNO (SUBREG_REG (x));
6470 if (regno < FIRST_PSEUDO_REGISTER)
6471 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6472 GET_MODE (SUBREG_REG (x)),
6473 SUBREG_BYTE (x),
6474 GET_MODE (x));
6475 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6476 ? subreg_nregs (x) : 1);
6478 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6480 else if (REG_P (x))
6482 regno = REGNO (x);
6484 /* If this is a pseudo, it must not have been assigned a hard register.
6485 Therefore, it must either be in memory or be a constant. */
6487 if (regno >= FIRST_PSEUDO_REGISTER)
6489 if (reg_equiv_memory_loc[regno])
6490 return refers_to_mem_for_reload_p (in);
6491 gcc_assert (reg_equiv_constant[regno]);
6492 return 0;
6495 endregno = END_HARD_REGNO (x);
6497 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6499 else if (MEM_P (x))
6500 return refers_to_mem_for_reload_p (in);
6501 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6502 || GET_CODE (x) == CC0)
6503 return reg_mentioned_p (x, in);
6504 else
6506 gcc_assert (GET_CODE (x) == PLUS);
6508 /* We actually want to know if X is mentioned somewhere inside IN.
6509 We must not say that (plus (sp) (const_int 124)) is in
6510 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6511 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6512 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6513 while (MEM_P (in))
6514 in = XEXP (in, 0);
6515 if (REG_P (in))
6516 return 0;
6517 else if (GET_CODE (in) == PLUS)
6518 return (rtx_equal_p (x, in)
6519 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6520 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6521 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6522 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6525 gcc_unreachable ();
6528 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6529 registers. */
6531 static int
6532 refers_to_mem_for_reload_p (rtx x)
6534 const char *fmt;
6535 int i;
6537 if (MEM_P (x))
6538 return 1;
6540 if (REG_P (x))
6541 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6542 && reg_equiv_memory_loc[REGNO (x)]);
6544 fmt = GET_RTX_FORMAT (GET_CODE (x));
6545 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6546 if (fmt[i] == 'e'
6547 && (MEM_P (XEXP (x, i))
6548 || refers_to_mem_for_reload_p (XEXP (x, i))))
6549 return 1;
6551 return 0;
6554 /* Check the insns before INSN to see if there is a suitable register
6555 containing the same value as GOAL.
6556 If OTHER is -1, look for a register in class CLASS.
6557 Otherwise, just see if register number OTHER shares GOAL's value.
6559 Return an rtx for the register found, or zero if none is found.
6561 If RELOAD_REG_P is (short *)1,
6562 we reject any hard reg that appears in reload_reg_rtx
6563 because such a hard reg is also needed coming into this insn.
6565 If RELOAD_REG_P is any other nonzero value,
6566 it is a vector indexed by hard reg number
6567 and we reject any hard reg whose element in the vector is nonnegative
6568 as well as any that appears in reload_reg_rtx.
6570 If GOAL is zero, then GOALREG is a register number; we look
6571 for an equivalent for that register.
6573 MODE is the machine mode of the value we want an equivalence for.
6574 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6576 This function is used by jump.c as well as in the reload pass.
6578 If GOAL is the sum of the stack pointer and a constant, we treat it
6579 as if it were a constant except that sp is required to be unchanging. */
6582 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6583 short *reload_reg_p, int goalreg, enum machine_mode mode)
6585 rtx p = insn;
6586 rtx goaltry, valtry, value, where;
6587 rtx pat;
6588 int regno = -1;
6589 int valueno;
6590 int goal_mem = 0;
6591 int goal_const = 0;
6592 int goal_mem_addr_varies = 0;
6593 int need_stable_sp = 0;
6594 int nregs;
6595 int valuenregs;
6596 int num = 0;
6598 if (goal == 0)
6599 regno = goalreg;
6600 else if (REG_P (goal))
6601 regno = REGNO (goal);
6602 else if (MEM_P (goal))
6604 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6605 if (MEM_VOLATILE_P (goal))
6606 return 0;
6607 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6608 return 0;
6609 /* An address with side effects must be reexecuted. */
6610 switch (code)
6612 case POST_INC:
6613 case PRE_INC:
6614 case POST_DEC:
6615 case PRE_DEC:
6616 case POST_MODIFY:
6617 case PRE_MODIFY:
6618 return 0;
6619 default:
6620 break;
6622 goal_mem = 1;
6624 else if (CONSTANT_P (goal))
6625 goal_const = 1;
6626 else if (GET_CODE (goal) == PLUS
6627 && XEXP (goal, 0) == stack_pointer_rtx
6628 && CONSTANT_P (XEXP (goal, 1)))
6629 goal_const = need_stable_sp = 1;
6630 else if (GET_CODE (goal) == PLUS
6631 && XEXP (goal, 0) == frame_pointer_rtx
6632 && CONSTANT_P (XEXP (goal, 1)))
6633 goal_const = 1;
6634 else
6635 return 0;
6637 num = 0;
6638 /* Scan insns back from INSN, looking for one that copies
6639 a value into or out of GOAL.
6640 Stop and give up if we reach a label. */
6642 while (1)
6644 p = PREV_INSN (p);
6645 num++;
6646 if (p == 0 || LABEL_P (p)
6647 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6648 return 0;
6650 if (NONJUMP_INSN_P (p)
6651 /* If we don't want spill regs ... */
6652 && (! (reload_reg_p != 0
6653 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6654 /* ... then ignore insns introduced by reload; they aren't
6655 useful and can cause results in reload_as_needed to be
6656 different from what they were when calculating the need for
6657 spills. If we notice an input-reload insn here, we will
6658 reject it below, but it might hide a usable equivalent.
6659 That makes bad code. It may even fail: perhaps no reg was
6660 spilled for this insn because it was assumed we would find
6661 that equivalent. */
6662 || INSN_UID (p) < reload_first_uid))
6664 rtx tem;
6665 pat = single_set (p);
6667 /* First check for something that sets some reg equal to GOAL. */
6668 if (pat != 0
6669 && ((regno >= 0
6670 && true_regnum (SET_SRC (pat)) == regno
6671 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6673 (regno >= 0
6674 && true_regnum (SET_DEST (pat)) == regno
6675 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6677 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6678 /* When looking for stack pointer + const,
6679 make sure we don't use a stack adjust. */
6680 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6681 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6682 || (goal_mem
6683 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6684 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6685 || (goal_mem
6686 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6687 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6688 /* If we are looking for a constant,
6689 and something equivalent to that constant was copied
6690 into a reg, we can use that reg. */
6691 || (goal_const && REG_NOTES (p) != 0
6692 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6693 && ((rtx_equal_p (XEXP (tem, 0), goal)
6694 && (valueno
6695 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6696 || (REG_P (SET_DEST (pat))
6697 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6698 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6699 && GET_CODE (goal) == CONST_INT
6700 && 0 != (goaltry
6701 = operand_subword (XEXP (tem, 0), 0, 0,
6702 VOIDmode))
6703 && rtx_equal_p (goal, goaltry)
6704 && (valtry
6705 = operand_subword (SET_DEST (pat), 0, 0,
6706 VOIDmode))
6707 && (valueno = true_regnum (valtry)) >= 0)))
6708 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6709 NULL_RTX))
6710 && REG_P (SET_DEST (pat))
6711 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6712 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6713 && GET_CODE (goal) == CONST_INT
6714 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6715 VOIDmode))
6716 && rtx_equal_p (goal, goaltry)
6717 && (valtry
6718 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6719 && (valueno = true_regnum (valtry)) >= 0)))
6721 if (other >= 0)
6723 if (valueno != other)
6724 continue;
6726 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6727 continue;
6728 else if (!in_hard_reg_set_p (reg_class_contents[(int) class],
6729 mode, valueno))
6730 continue;
6731 value = valtry;
6732 where = p;
6733 break;
6738 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6739 (or copying VALUE into GOAL, if GOAL is also a register).
6740 Now verify that VALUE is really valid. */
6742 /* VALUENO is the register number of VALUE; a hard register. */
6744 /* Don't try to re-use something that is killed in this insn. We want
6745 to be able to trust REG_UNUSED notes. */
6746 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6747 return 0;
6749 /* If we propose to get the value from the stack pointer or if GOAL is
6750 a MEM based on the stack pointer, we need a stable SP. */
6751 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6752 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6753 goal)))
6754 need_stable_sp = 1;
6756 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6757 if (GET_MODE (value) != mode)
6758 return 0;
6760 /* Reject VALUE if it was loaded from GOAL
6761 and is also a register that appears in the address of GOAL. */
6763 if (goal_mem && value == SET_DEST (single_set (where))
6764 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6765 goal, (rtx*) 0))
6766 return 0;
6768 /* Reject registers that overlap GOAL. */
6770 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6771 nregs = hard_regno_nregs[regno][mode];
6772 else
6773 nregs = 1;
6774 valuenregs = hard_regno_nregs[valueno][mode];
6776 if (!goal_mem && !goal_const
6777 && regno + nregs > valueno && regno < valueno + valuenregs)
6778 return 0;
6780 /* Reject VALUE if it is one of the regs reserved for reloads.
6781 Reload1 knows how to reuse them anyway, and it would get
6782 confused if we allocated one without its knowledge.
6783 (Now that insns introduced by reload are ignored above,
6784 this case shouldn't happen, but I'm not positive.) */
6786 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6788 int i;
6789 for (i = 0; i < valuenregs; ++i)
6790 if (reload_reg_p[valueno + i] >= 0)
6791 return 0;
6794 /* Reject VALUE if it is a register being used for an input reload
6795 even if it is not one of those reserved. */
6797 if (reload_reg_p != 0)
6799 int i;
6800 for (i = 0; i < n_reloads; i++)
6801 if (rld[i].reg_rtx != 0 && rld[i].in)
6803 int regno1 = REGNO (rld[i].reg_rtx);
6804 int nregs1 = hard_regno_nregs[regno1]
6805 [GET_MODE (rld[i].reg_rtx)];
6806 if (regno1 < valueno + valuenregs
6807 && regno1 + nregs1 > valueno)
6808 return 0;
6812 if (goal_mem)
6813 /* We must treat frame pointer as varying here,
6814 since it can vary--in a nonlocal goto as generated by expand_goto. */
6815 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6817 /* Now verify that the values of GOAL and VALUE remain unaltered
6818 until INSN is reached. */
6820 p = insn;
6821 while (1)
6823 p = PREV_INSN (p);
6824 if (p == where)
6825 return value;
6827 /* Don't trust the conversion past a function call
6828 if either of the two is in a call-clobbered register, or memory. */
6829 if (CALL_P (p))
6831 int i;
6833 if (goal_mem || need_stable_sp)
6834 return 0;
6836 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6837 for (i = 0; i < nregs; ++i)
6838 if (call_used_regs[regno + i]
6839 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6840 return 0;
6842 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6843 for (i = 0; i < valuenregs; ++i)
6844 if (call_used_regs[valueno + i]
6845 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6846 return 0;
6849 if (INSN_P (p))
6851 pat = PATTERN (p);
6853 /* Watch out for unspec_volatile, and volatile asms. */
6854 if (volatile_insn_p (pat))
6855 return 0;
6857 /* If this insn P stores in either GOAL or VALUE, return 0.
6858 If GOAL is a memory ref and this insn writes memory, return 0.
6859 If GOAL is a memory ref and its address is not constant,
6860 and this insn P changes a register used in GOAL, return 0. */
6862 if (GET_CODE (pat) == COND_EXEC)
6863 pat = COND_EXEC_CODE (pat);
6864 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6866 rtx dest = SET_DEST (pat);
6867 while (GET_CODE (dest) == SUBREG
6868 || GET_CODE (dest) == ZERO_EXTRACT
6869 || GET_CODE (dest) == STRICT_LOW_PART)
6870 dest = XEXP (dest, 0);
6871 if (REG_P (dest))
6873 int xregno = REGNO (dest);
6874 int xnregs;
6875 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6876 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6877 else
6878 xnregs = 1;
6879 if (xregno < regno + nregs && xregno + xnregs > regno)
6880 return 0;
6881 if (xregno < valueno + valuenregs
6882 && xregno + xnregs > valueno)
6883 return 0;
6884 if (goal_mem_addr_varies
6885 && reg_overlap_mentioned_for_reload_p (dest, goal))
6886 return 0;
6887 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6888 return 0;
6890 else if (goal_mem && MEM_P (dest)
6891 && ! push_operand (dest, GET_MODE (dest)))
6892 return 0;
6893 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6894 && reg_equiv_memory_loc[regno] != 0)
6895 return 0;
6896 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6897 return 0;
6899 else if (GET_CODE (pat) == PARALLEL)
6901 int i;
6902 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6904 rtx v1 = XVECEXP (pat, 0, i);
6905 if (GET_CODE (v1) == COND_EXEC)
6906 v1 = COND_EXEC_CODE (v1);
6907 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6909 rtx dest = SET_DEST (v1);
6910 while (GET_CODE (dest) == SUBREG
6911 || GET_CODE (dest) == ZERO_EXTRACT
6912 || GET_CODE (dest) == STRICT_LOW_PART)
6913 dest = XEXP (dest, 0);
6914 if (REG_P (dest))
6916 int xregno = REGNO (dest);
6917 int xnregs;
6918 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6919 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6920 else
6921 xnregs = 1;
6922 if (xregno < regno + nregs
6923 && xregno + xnregs > regno)
6924 return 0;
6925 if (xregno < valueno + valuenregs
6926 && xregno + xnregs > valueno)
6927 return 0;
6928 if (goal_mem_addr_varies
6929 && reg_overlap_mentioned_for_reload_p (dest,
6930 goal))
6931 return 0;
6932 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6933 return 0;
6935 else if (goal_mem && MEM_P (dest)
6936 && ! push_operand (dest, GET_MODE (dest)))
6937 return 0;
6938 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6939 && reg_equiv_memory_loc[regno] != 0)
6940 return 0;
6941 else if (need_stable_sp
6942 && push_operand (dest, GET_MODE (dest)))
6943 return 0;
6948 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6950 rtx link;
6952 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6953 link = XEXP (link, 1))
6955 pat = XEXP (link, 0);
6956 if (GET_CODE (pat) == CLOBBER)
6958 rtx dest = SET_DEST (pat);
6960 if (REG_P (dest))
6962 int xregno = REGNO (dest);
6963 int xnregs
6964 = hard_regno_nregs[xregno][GET_MODE (dest)];
6966 if (xregno < regno + nregs
6967 && xregno + xnregs > regno)
6968 return 0;
6969 else if (xregno < valueno + valuenregs
6970 && xregno + xnregs > valueno)
6971 return 0;
6972 else if (goal_mem_addr_varies
6973 && reg_overlap_mentioned_for_reload_p (dest,
6974 goal))
6975 return 0;
6978 else if (goal_mem && MEM_P (dest)
6979 && ! push_operand (dest, GET_MODE (dest)))
6980 return 0;
6981 else if (need_stable_sp
6982 && push_operand (dest, GET_MODE (dest)))
6983 return 0;
6988 #ifdef AUTO_INC_DEC
6989 /* If this insn auto-increments or auto-decrements
6990 either regno or valueno, return 0 now.
6991 If GOAL is a memory ref and its address is not constant,
6992 and this insn P increments a register used in GOAL, return 0. */
6994 rtx link;
6996 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6997 if (REG_NOTE_KIND (link) == REG_INC
6998 && REG_P (XEXP (link, 0)))
7000 int incno = REGNO (XEXP (link, 0));
7001 if (incno < regno + nregs && incno >= regno)
7002 return 0;
7003 if (incno < valueno + valuenregs && incno >= valueno)
7004 return 0;
7005 if (goal_mem_addr_varies
7006 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7007 goal))
7008 return 0;
7011 #endif
7016 /* Find a place where INCED appears in an increment or decrement operator
7017 within X, and return the amount INCED is incremented or decremented by.
7018 The value is always positive. */
7020 static int
7021 find_inc_amount (rtx x, rtx inced)
7023 enum rtx_code code = GET_CODE (x);
7024 const char *fmt;
7025 int i;
7027 if (code == MEM)
7029 rtx addr = XEXP (x, 0);
7030 if ((GET_CODE (addr) == PRE_DEC
7031 || GET_CODE (addr) == POST_DEC
7032 || GET_CODE (addr) == PRE_INC
7033 || GET_CODE (addr) == POST_INC)
7034 && XEXP (addr, 0) == inced)
7035 return GET_MODE_SIZE (GET_MODE (x));
7036 else if ((GET_CODE (addr) == PRE_MODIFY
7037 || GET_CODE (addr) == POST_MODIFY)
7038 && GET_CODE (XEXP (addr, 1)) == PLUS
7039 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7040 && XEXP (addr, 0) == inced
7041 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7043 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7044 return i < 0 ? -i : i;
7048 fmt = GET_RTX_FORMAT (code);
7049 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7051 if (fmt[i] == 'e')
7053 int tem = find_inc_amount (XEXP (x, i), inced);
7054 if (tem != 0)
7055 return tem;
7057 if (fmt[i] == 'E')
7059 int j;
7060 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7062 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7063 if (tem != 0)
7064 return tem;
7069 return 0;
7072 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7073 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7075 #ifdef AUTO_INC_DEC
7076 static int
7077 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7078 rtx insn)
7080 rtx link;
7082 gcc_assert (insn);
7084 if (! INSN_P (insn))
7085 return 0;
7087 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7088 if (REG_NOTE_KIND (link) == REG_INC)
7090 unsigned int test = (int) REGNO (XEXP (link, 0));
7091 if (test >= regno && test < endregno)
7092 return 1;
7094 return 0;
7096 #else
7098 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7100 #endif
7102 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7103 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7104 REG_INC. REGNO must refer to a hard register. */
7107 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7108 int sets)
7110 unsigned int nregs, endregno;
7112 /* regno must be a hard register. */
7113 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7115 nregs = hard_regno_nregs[regno][mode];
7116 endregno = regno + nregs;
7118 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7119 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7120 && REG_P (XEXP (PATTERN (insn), 0)))
7122 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7124 return test >= regno && test < endregno;
7127 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7128 return 1;
7130 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7132 int i = XVECLEN (PATTERN (insn), 0) - 1;
7134 for (; i >= 0; i--)
7136 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7137 if ((GET_CODE (elt) == CLOBBER
7138 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7139 && REG_P (XEXP (elt, 0)))
7141 unsigned int test = REGNO (XEXP (elt, 0));
7143 if (test >= regno && test < endregno)
7144 return 1;
7146 if (sets == 2
7147 && reg_inc_found_and_valid_p (regno, endregno, elt))
7148 return 1;
7152 return 0;
7155 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7157 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7159 int regno;
7161 if (GET_MODE (reloadreg) == mode)
7162 return reloadreg;
7164 regno = REGNO (reloadreg);
7166 if (WORDS_BIG_ENDIAN)
7167 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7168 - (int) hard_regno_nregs[regno][mode];
7170 return gen_rtx_REG (mode, regno);
7173 static const char *const reload_when_needed_name[] =
7175 "RELOAD_FOR_INPUT",
7176 "RELOAD_FOR_OUTPUT",
7177 "RELOAD_FOR_INSN",
7178 "RELOAD_FOR_INPUT_ADDRESS",
7179 "RELOAD_FOR_INPADDR_ADDRESS",
7180 "RELOAD_FOR_OUTPUT_ADDRESS",
7181 "RELOAD_FOR_OUTADDR_ADDRESS",
7182 "RELOAD_FOR_OPERAND_ADDRESS",
7183 "RELOAD_FOR_OPADDR_ADDR",
7184 "RELOAD_OTHER",
7185 "RELOAD_FOR_OTHER_ADDRESS"
7188 /* These functions are used to print the variables set by 'find_reloads' */
7190 void
7191 debug_reload_to_stream (FILE *f)
7193 int r;
7194 const char *prefix;
7196 if (! f)
7197 f = stderr;
7198 for (r = 0; r < n_reloads; r++)
7200 fprintf (f, "Reload %d: ", r);
7202 if (rld[r].in != 0)
7204 fprintf (f, "reload_in (%s) = ",
7205 GET_MODE_NAME (rld[r].inmode));
7206 print_inline_rtx (f, rld[r].in, 24);
7207 fprintf (f, "\n\t");
7210 if (rld[r].out != 0)
7212 fprintf (f, "reload_out (%s) = ",
7213 GET_MODE_NAME (rld[r].outmode));
7214 print_inline_rtx (f, rld[r].out, 24);
7215 fprintf (f, "\n\t");
7218 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7220 fprintf (f, "%s (opnum = %d)",
7221 reload_when_needed_name[(int) rld[r].when_needed],
7222 rld[r].opnum);
7224 if (rld[r].optional)
7225 fprintf (f, ", optional");
7227 if (rld[r].nongroup)
7228 fprintf (f, ", nongroup");
7230 if (rld[r].inc != 0)
7231 fprintf (f, ", inc by %d", rld[r].inc);
7233 if (rld[r].nocombine)
7234 fprintf (f, ", can't combine");
7236 if (rld[r].secondary_p)
7237 fprintf (f, ", secondary_reload_p");
7239 if (rld[r].in_reg != 0)
7241 fprintf (f, "\n\treload_in_reg: ");
7242 print_inline_rtx (f, rld[r].in_reg, 24);
7245 if (rld[r].out_reg != 0)
7247 fprintf (f, "\n\treload_out_reg: ");
7248 print_inline_rtx (f, rld[r].out_reg, 24);
7251 if (rld[r].reg_rtx != 0)
7253 fprintf (f, "\n\treload_reg_rtx: ");
7254 print_inline_rtx (f, rld[r].reg_rtx, 24);
7257 prefix = "\n\t";
7258 if (rld[r].secondary_in_reload != -1)
7260 fprintf (f, "%ssecondary_in_reload = %d",
7261 prefix, rld[r].secondary_in_reload);
7262 prefix = ", ";
7265 if (rld[r].secondary_out_reload != -1)
7266 fprintf (f, "%ssecondary_out_reload = %d\n",
7267 prefix, rld[r].secondary_out_reload);
7269 prefix = "\n\t";
7270 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7272 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7273 insn_data[rld[r].secondary_in_icode].name);
7274 prefix = ", ";
7277 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7278 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7279 insn_data[rld[r].secondary_out_icode].name);
7281 fprintf (f, "\n");
7285 void
7286 debug_reload (void)
7288 debug_reload_to_stream (stderr);