1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
72 #include "cfglayout.h"
74 #ifdef XCOFF_DEBUGGING_INFO
75 #include "xcoffout.h" /* Needed for external data
76 declarations for e.g. AIX 4.x. */
79 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
80 #include "dwarf2out.h"
83 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
84 null default for it to save conditionalization later. */
85 #ifndef CC_STATUS_INIT
86 #define CC_STATUS_INIT
89 /* How to start an assembler comment. */
90 #ifndef ASM_COMMENT_START
91 #define ASM_COMMENT_START ";#"
94 /* Is the given character a logical line separator for the assembler? */
95 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
96 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
99 #ifndef JUMP_TABLES_IN_TEXT_SECTION
100 #define JUMP_TABLES_IN_TEXT_SECTION 0
103 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
104 #define HAVE_READONLY_DATA_SECTION 1
106 #define HAVE_READONLY_DATA_SECTION 0
109 /* Last insn processed by final_scan_insn. */
110 static rtx debug_insn
;
111 rtx current_output_insn
;
113 /* Line number of last NOTE. */
114 static int last_linenum
;
116 /* Highest line number in current block. */
117 static int high_block_linenum
;
119 /* Likewise for function. */
120 static int high_function_linenum
;
122 /* Filename of last NOTE. */
123 static const char *last_filename
;
125 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
127 /* Nonzero while outputting an `asm' with operands.
128 This means that inconsistencies are the user's fault, so don't abort.
129 The precise value is the insn being output, to pass to error_for_asm. */
130 rtx this_is_asm_operands
;
132 /* Number of operands of this insn, for an `asm' with operands. */
133 static unsigned int insn_noperands
;
135 /* Compare optimization flag. */
137 static rtx last_ignored_compare
= 0;
139 /* Flag indicating this insn is the start of a new basic block. */
141 static int new_block
= 1;
143 /* Assign a unique number to each insn that is output.
144 This can be used to generate unique local labels. */
146 static int insn_counter
= 0;
149 /* This variable contains machine-dependent flags (defined in tm.h)
150 set and examined by output routines
151 that describe how to interpret the condition codes properly. */
155 /* During output of an insn, this contains a copy of cc_status
156 from before the insn. */
158 CC_STATUS cc_prev_status
;
161 /* Indexed by hardware reg number, is 1 if that register is ever
162 used in the current function.
164 In life_analysis, or in stupid_life_analysis, this is set
165 up to record the hard regs used explicitly. Reload adds
166 in the hard regs used for holding pseudo regs. Final uses
167 it to generate the code in the function prologue and epilogue
168 to save and restore registers as needed. */
170 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
172 /* Nonzero means current function must be given a frame pointer.
173 Set in stmt.c if anything is allocated on the stack there.
174 Set in reload1.c if anything is allocated on the stack there. */
176 int frame_pointer_needed
;
178 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
180 static int block_depth
;
182 /* Nonzero if have enabled APP processing of our assembler output. */
186 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 #ifdef ASSEMBLER_DIALECT
193 /* Number of the assembler dialect to use, starting at 0. */
194 static int dialect_number
;
197 /* Indexed by line number, nonzero if there is a note for that line. */
199 static char *line_note_exists
;
201 #ifdef HAVE_conditional_execution
202 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203 rtx current_insn_predicate
;
208 struct function_list
*next
; /* next function */
209 const char *name
; /* function name */
210 long cfg_checksum
; /* function checksum */
211 long count_edges
; /* number of intrumented edges in this function */
214 static struct function_list
*functions_head
= 0;
215 static struct function_list
**functions_tail
= &functions_head
;
217 #ifdef HAVE_ATTR_length
218 static int asm_insn_count
PARAMS ((rtx
));
220 static void profile_function
PARAMS ((FILE *));
221 static void profile_after_prologue
PARAMS ((FILE *));
222 static void notice_source_line
PARAMS ((rtx
));
223 static rtx walk_alter_subreg
PARAMS ((rtx
*));
224 static void output_asm_name
PARAMS ((void));
225 static void output_alternate_entry_point
PARAMS ((FILE *, rtx
));
226 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
227 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
228 static void output_operand
PARAMS ((rtx
, int));
229 #ifdef LEAF_REGISTERS
230 static void leaf_renumber_regs
PARAMS ((rtx
));
233 static int alter_cond
PARAMS ((rtx
));
235 #ifndef ADDR_VEC_ALIGN
236 static int final_addr_vec_align
PARAMS ((rtx
));
238 #ifdef HAVE_ATTR_length
239 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
242 /* Initialize data in final at the beginning of a compilation. */
245 init_final (filename
)
246 const char *filename ATTRIBUTE_UNUSED
;
251 #ifdef ASSEMBLER_DIALECT
252 dialect_number
= ASSEMBLER_DIALECT
;
256 /* Called at end of source file,
257 to output the arc-profiling table for this entire compilation. */
261 const char *filename
;
263 if (profile_arc_flag
&& profile_info
.count_instrumented_edges
)
266 tree string_type
, string_cst
;
267 tree structure_decl
, structure_value
, structure_pointer_type
;
268 tree field_decl
, decl_chain
, value_chain
;
269 tree sizeof_field_value
, domain_type
;
272 string_type
= build_pointer_type (char_type_node
);
274 /* Libgcc2 bb structure. */
275 structure_decl
= make_node (RECORD_TYPE
);
276 structure_pointer_type
= build_pointer_type (structure_decl
);
278 /* Output the main header, of 7 words:
279 0: 1 if this file is initialized, else 0.
280 1: address of file name (LPBX1).
281 2: address of table of counts (LPBX2).
282 3: number of counts in the table.
283 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
285 The following are GNU extensions:
287 5: Number of bytes in this header.
288 6: address of table of function checksums (LPBX7). */
292 build_decl (FIELD_DECL
, get_identifier ("zero_word"),
293 long_integer_type_node
);
294 value_chain
= build_tree_list (decl_chain
,
295 convert (long_integer_type_node
,
298 /* Address of filename. */
300 char *cwd
, *da_filename
;
304 build_decl (FIELD_DECL
, get_identifier ("filename"), string_type
);
305 TREE_CHAIN (field_decl
) = decl_chain
;
306 decl_chain
= field_decl
;
309 da_filename_len
= strlen (filename
) + strlen (cwd
) + 4 + 1;
310 da_filename
= (char *) alloca (da_filename_len
);
311 strcpy (da_filename
, cwd
);
312 strcat (da_filename
, "/");
313 strcat (da_filename
, filename
);
314 strcat (da_filename
, ".da");
315 da_filename_len
= strlen (da_filename
);
316 string_cst
= build_string (da_filename_len
+ 1, da_filename
);
317 domain_type
= build_index_type (build_int_2 (da_filename_len
, 0));
318 TREE_TYPE (string_cst
)
319 = build_array_type (char_type_node
, domain_type
);
320 value_chain
= tree_cons (field_decl
,
321 build1 (ADDR_EXPR
, string_type
, string_cst
),
325 /* Table of counts. */
327 tree gcov_type_type
= make_unsigned_type (GCOV_TYPE_SIZE
);
328 tree gcov_type_pointer_type
= build_pointer_type (gcov_type_type
);
330 = build_index_type (build_int_2 (profile_info
.
331 count_instrumented_edges
- 1, 0));
332 tree gcov_type_array_type
333 = build_array_type (gcov_type_type
, domain_tree
);
334 tree gcov_type_array_pointer_type
335 = build_pointer_type (gcov_type_array_type
);
339 build_decl (FIELD_DECL
, get_identifier ("counts"),
340 gcov_type_pointer_type
);
341 TREE_CHAIN (field_decl
) = decl_chain
;
342 decl_chain
= field_decl
;
346 = build (VAR_DECL
, gcov_type_array_type
, NULL_TREE
, NULL_TREE
);
347 TREE_STATIC (counts_table
) = 1;
348 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
349 DECL_NAME (counts_table
) = get_identifier (name
);
350 assemble_variable (counts_table
, 0, 0, 0);
352 value_chain
= tree_cons (field_decl
,
354 gcov_type_array_pointer_type
,
355 counts_table
), value_chain
);
358 /* Count of the # of instrumented arcs. */
360 = build_decl (FIELD_DECL
, get_identifier ("ncounts"),
361 long_integer_type_node
);
362 TREE_CHAIN (field_decl
) = decl_chain
;
363 decl_chain
= field_decl
;
365 value_chain
= tree_cons (field_decl
,
366 convert (long_integer_type_node
,
367 build_int_2 (profile_info
.
368 count_instrumented_edges
,
370 /* Pointer to the next bb. */
372 = build_decl (FIELD_DECL
, get_identifier ("next"),
373 structure_pointer_type
);
374 TREE_CHAIN (field_decl
) = decl_chain
;
375 decl_chain
= field_decl
;
377 value_chain
= tree_cons (field_decl
, null_pointer_node
, value_chain
);
379 /* sizeof(struct bb). We'll set this after entire structure
382 = build_decl (FIELD_DECL
, get_identifier ("sizeof_bb"),
383 long_integer_type_node
);
384 TREE_CHAIN (field_decl
) = decl_chain
;
385 decl_chain
= field_decl
;
387 sizeof_field_value
= tree_cons (field_decl
, NULL
, value_chain
);
388 value_chain
= sizeof_field_value
;
390 /* struct bb_function []. */
392 struct function_list
*item
;
394 tree checksum_field
, arc_count_field
, name_field
;
396 tree array_value_chain
= NULL_TREE
;
397 tree bb_fn_struct_type
;
398 tree bb_fn_struct_array_type
;
399 tree bb_fn_struct_array_pointer_type
;
400 tree bb_fn_struct_pointer_type
;
401 tree field_value
, field_value_chain
;
403 bb_fn_struct_type
= make_node (RECORD_TYPE
);
405 checksum_field
= build_decl (FIELD_DECL
, get_identifier ("checksum"),
406 long_integer_type_node
);
409 = build_decl (FIELD_DECL
, get_identifier ("arc_count"),
411 TREE_CHAIN (checksum_field
) = arc_count_field
;
414 = build_decl (FIELD_DECL
, get_identifier ("name"), string_type
);
415 TREE_CHAIN (arc_count_field
) = name_field
;
417 TYPE_FIELDS (bb_fn_struct_type
) = checksum_field
;
421 for (item
= functions_head
; item
!= 0; item
= item
->next
)
424 /* Note that the array contains a terminator, hence no - 1. */
425 domain
= build_index_type (build_int_2 (num_nodes
, 0));
427 bb_fn_struct_pointer_type
= build_pointer_type (bb_fn_struct_type
);
428 bb_fn_struct_array_type
429 = build_array_type (bb_fn_struct_type
, domain
);
430 bb_fn_struct_array_pointer_type
431 = build_pointer_type (bb_fn_struct_array_type
);
433 layout_type (bb_fn_struct_type
);
434 layout_type (bb_fn_struct_pointer_type
);
435 layout_type (bb_fn_struct_array_type
);
436 layout_type (bb_fn_struct_array_pointer_type
);
438 for (item
= functions_head
; item
!= 0; item
= item
->next
)
442 /* create constructor for structure. */
444 = build_tree_list (checksum_field
,
445 convert (long_integer_type_node
,
446 build_int_2 (item
->cfg_checksum
, 0)));
448 = tree_cons (arc_count_field
,
449 convert (integer_type_node
,
450 build_int_2 (item
->count_edges
, 0)),
453 name_len
= strlen (item
->name
);
454 string_cst
= build_string (name_len
+ 1, item
->name
);
455 domain_type
= build_index_type (build_int_2 (name_len
, 0));
456 TREE_TYPE (string_cst
)
457 = build_array_type (char_type_node
, domain_type
);
458 field_value_chain
= tree_cons (name_field
,
459 build1 (ADDR_EXPR
, string_type
,
465 = tree_cons (NULL_TREE
, build (CONSTRUCTOR
,
466 bb_fn_struct_type
, NULL_TREE
,
467 nreverse (field_value_chain
)),
471 /* Add terminator. */
472 field_value
= build_tree_list (arc_count_field
,
473 convert (integer_type_node
,
474 build_int_2 (-1, 0)));
476 array_value_chain
= tree_cons (NULL_TREE
,
477 build (CONSTRUCTOR
, bb_fn_struct_type
,
478 NULL_TREE
, field_value
),
482 /* Create constructor for array. */
484 = build_decl (FIELD_DECL
, get_identifier ("function_infos"),
485 bb_fn_struct_pointer_type
);
486 value_chain
= tree_cons (field_decl
,
488 bb_fn_struct_array_pointer_type
,
490 bb_fn_struct_array_type
,
493 (array_value_chain
))),
495 TREE_CHAIN (field_decl
) = decl_chain
;
496 decl_chain
= field_decl
;
499 /* Finish structure. */
500 TYPE_FIELDS (structure_decl
) = nreverse (decl_chain
);
501 layout_type (structure_decl
);
504 = build (VAR_DECL
, structure_decl
, NULL_TREE
, NULL_TREE
);
505 DECL_INITIAL (structure_value
)
506 = build (CONSTRUCTOR
, structure_decl
, NULL_TREE
,
507 nreverse (value_chain
));
508 TREE_STATIC (structure_value
) = 1;
509 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 0);
510 DECL_NAME (structure_value
) = get_identifier (name
);
512 /* Size of this structure. */
513 TREE_VALUE (sizeof_field_value
)
514 = convert (long_integer_type_node
,
515 build_int_2 (int_size_in_bytes (structure_decl
), 0));
517 /* Build structure. */
518 assemble_variable (structure_value
, 0, 0, 0);
522 /* Default target function prologue and epilogue assembler output.
524 If not overridden for epilogue code, then the function body itself
525 contains return instructions wherever needed. */
527 default_function_pro_epilogue (file
, size
)
528 FILE *file ATTRIBUTE_UNUSED
;
529 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
533 /* Default target hook that outputs nothing to a stream. */
535 no_asm_to_stream (file
)
536 FILE *file ATTRIBUTE_UNUSED
;
540 /* Enable APP processing of subsequent output.
541 Used before the output from an `asm' statement. */
548 fputs (ASM_APP_ON
, asm_out_file
);
553 /* Disable APP processing of subsequent output.
554 Called from varasm.c before most kinds of output. */
561 fputs (ASM_APP_OFF
, asm_out_file
);
566 /* Return the number of slots filled in the current
567 delayed branch sequence (we don't count the insn needing the
568 delay slot). Zero if not in a delayed branch sequence. */
572 dbr_sequence_length ()
574 if (final_sequence
!= 0)
575 return XVECLEN (final_sequence
, 0) - 1;
581 /* The next two pages contain routines used to compute the length of an insn
582 and to shorten branches. */
584 /* Arrays for insn lengths, and addresses. The latter is referenced by
585 `insn_current_length'. */
587 static int *insn_lengths
;
589 varray_type insn_addresses_
;
591 /* Max uid for which the above arrays are valid. */
592 static int insn_lengths_max_uid
;
594 /* Address of insn being processed. Used by `insn_current_length'. */
595 int insn_current_address
;
597 /* Address of insn being processed in previous iteration. */
598 int insn_last_address
;
600 /* known invariant alignment of insn being processed. */
601 int insn_current_align
;
603 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
604 gives the next following alignment insn that increases the known
605 alignment, or NULL_RTX if there is no such insn.
606 For any alignment obtained this way, we can again index uid_align with
607 its uid to obtain the next following align that in turn increases the
608 alignment, till we reach NULL_RTX; the sequence obtained this way
609 for each insn we'll call the alignment chain of this insn in the following
612 struct label_alignment
618 static rtx
*uid_align
;
619 static int *uid_shuid
;
620 static struct label_alignment
*label_align
;
622 /* Indicate that branch shortening hasn't yet been done. */
636 insn_lengths_max_uid
= 0;
638 #ifdef HAVE_ATTR_length
639 INSN_ADDRESSES_FREE ();
648 /* Obtain the current length of an insn. If branch shortening has been done,
649 get its actual length. Otherwise, get its maximum length. */
652 get_attr_length (insn
)
653 rtx insn ATTRIBUTE_UNUSED
;
655 #ifdef HAVE_ATTR_length
660 if (insn_lengths_max_uid
> INSN_UID (insn
))
661 return insn_lengths
[INSN_UID (insn
)];
663 switch (GET_CODE (insn
))
671 length
= insn_default_length (insn
);
675 body
= PATTERN (insn
);
676 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
678 /* Alignment is machine-dependent and should be handled by
682 length
= insn_default_length (insn
);
686 body
= PATTERN (insn
);
687 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
690 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
691 length
= asm_insn_count (body
) * insn_default_length (insn
);
692 else if (GET_CODE (body
) == SEQUENCE
)
693 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
694 length
+= get_attr_length (XVECEXP (body
, 0, i
));
696 length
= insn_default_length (insn
);
703 #ifdef ADJUST_INSN_LENGTH
704 ADJUST_INSN_LENGTH (insn
, length
);
707 #else /* not HAVE_ATTR_length */
709 #endif /* not HAVE_ATTR_length */
712 /* Code to handle alignment inside shorten_branches. */
714 /* Here is an explanation how the algorithm in align_fuzz can give
717 Call a sequence of instructions beginning with alignment point X
718 and continuing until the next alignment point `block X'. When `X'
719 is used in an expression, it means the alignment value of the
722 Call the distance between the start of the first insn of block X, and
723 the end of the last insn of block X `IX', for the `inner size of X'.
724 This is clearly the sum of the instruction lengths.
726 Likewise with the next alignment-delimited block following X, which we
729 Call the distance between the start of the first insn of block X, and
730 the start of the first insn of block Y `OX', for the `outer size of X'.
732 The estimated padding is then OX - IX.
734 OX can be safely estimated as
739 OX = round_up(IX, X) + Y - X
741 Clearly est(IX) >= real(IX), because that only depends on the
742 instruction lengths, and those being overestimated is a given.
744 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
745 we needn't worry about that when thinking about OX.
747 When X >= Y, the alignment provided by Y adds no uncertainty factor
748 for branch ranges starting before X, so we can just round what we have.
749 But when X < Y, we don't know anything about the, so to speak,
750 `middle bits', so we have to assume the worst when aligning up from an
751 address mod X to one mod Y, which is Y - X. */
754 #define LABEL_ALIGN(LABEL) align_labels_log
757 #ifndef LABEL_ALIGN_MAX_SKIP
758 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
762 #define LOOP_ALIGN(LABEL) align_loops_log
765 #ifndef LOOP_ALIGN_MAX_SKIP
766 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
769 #ifndef LABEL_ALIGN_AFTER_BARRIER
770 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
773 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
774 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
778 #define JUMP_ALIGN(LABEL) align_jumps_log
781 #ifndef JUMP_ALIGN_MAX_SKIP
782 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
785 #ifndef ADDR_VEC_ALIGN
787 final_addr_vec_align (addr_vec
)
790 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
792 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
793 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
794 return exact_log2 (align
);
798 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
801 #ifndef INSN_LENGTH_ALIGNMENT
802 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
805 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
807 static int min_labelno
, max_labelno
;
809 #define LABEL_TO_ALIGNMENT(LABEL) \
810 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
812 #define LABEL_TO_MAX_SKIP(LABEL) \
813 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
815 /* For the benefit of port specific code do this also as a function. */
818 label_to_alignment (label
)
821 return LABEL_TO_ALIGNMENT (label
);
824 #ifdef HAVE_ATTR_length
825 /* The differences in addresses
826 between a branch and its target might grow or shrink depending on
827 the alignment the start insn of the range (the branch for a forward
828 branch or the label for a backward branch) starts out on; if these
829 differences are used naively, they can even oscillate infinitely.
830 We therefore want to compute a 'worst case' address difference that
831 is independent of the alignment the start insn of the range end
832 up on, and that is at least as large as the actual difference.
833 The function align_fuzz calculates the amount we have to add to the
834 naively computed difference, by traversing the part of the alignment
835 chain of the start insn of the range that is in front of the end insn
836 of the range, and considering for each alignment the maximum amount
837 that it might contribute to a size increase.
839 For casesi tables, we also want to know worst case minimum amounts of
840 address difference, in case a machine description wants to introduce
841 some common offset that is added to all offsets in a table.
842 For this purpose, align_fuzz with a growth argument of 0 computes the
843 appropriate adjustment. */
845 /* Compute the maximum delta by which the difference of the addresses of
846 START and END might grow / shrink due to a different address for start
847 which changes the size of alignment insns between START and END.
848 KNOWN_ALIGN_LOG is the alignment known for START.
849 GROWTH should be ~0 if the objective is to compute potential code size
850 increase, and 0 if the objective is to compute potential shrink.
851 The return value is undefined for any other value of GROWTH. */
854 align_fuzz (start
, end
, known_align_log
, growth
)
859 int uid
= INSN_UID (start
);
861 int known_align
= 1 << known_align_log
;
862 int end_shuid
= INSN_SHUID (end
);
865 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
867 int align_addr
, new_align
;
869 uid
= INSN_UID (align_label
);
870 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
871 if (uid_shuid
[uid
] > end_shuid
)
873 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
874 new_align
= 1 << known_align_log
;
875 if (new_align
< known_align
)
877 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
878 known_align
= new_align
;
883 /* Compute a worst-case reference address of a branch so that it
884 can be safely used in the presence of aligned labels. Since the
885 size of the branch itself is unknown, the size of the branch is
886 not included in the range. I.e. for a forward branch, the reference
887 address is the end address of the branch as known from the previous
888 branch shortening pass, minus a value to account for possible size
889 increase due to alignment. For a backward branch, it is the start
890 address of the branch as known from the current pass, plus a value
891 to account for possible size increase due to alignment.
892 NB.: Therefore, the maximum offset allowed for backward branches needs
893 to exclude the branch size. */
896 insn_current_reference_address (branch
)
902 if (! INSN_ADDRESSES_SET_P ())
905 seq
= NEXT_INSN (PREV_INSN (branch
));
906 seq_uid
= INSN_UID (seq
);
907 if (GET_CODE (branch
) != JUMP_INSN
)
908 /* This can happen for example on the PA; the objective is to know the
909 offset to address something in front of the start of the function.
910 Thus, we can treat it like a backward branch.
911 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
912 any alignment we'd encounter, so we skip the call to align_fuzz. */
913 return insn_current_address
;
914 dest
= JUMP_LABEL (branch
);
916 /* BRANCH has no proper alignment chain set, so use SEQ.
917 BRANCH also has no INSN_SHUID. */
918 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
920 /* Forward branch. */
921 return (insn_last_address
+ insn_lengths
[seq_uid
]
922 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
926 /* Backward branch. */
927 return (insn_current_address
928 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
931 #endif /* HAVE_ATTR_length */
934 compute_alignments ()
936 int log
, max_skip
, max_log
;
945 max_labelno
= max_label_num ();
946 min_labelno
= get_first_label_num ();
947 label_align
= (struct label_alignment
*)
948 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
950 /* If not optimizing or optimizing for size, don't assign any alignments. */
951 if (! optimize
|| optimize_size
)
956 rtx label
= bb
->head
;
957 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
960 if (GET_CODE (label
) != CODE_LABEL
)
962 max_log
= LABEL_ALIGN (label
);
963 max_skip
= LABEL_ALIGN_MAX_SKIP
;
965 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
967 if (e
->flags
& EDGE_FALLTHRU
)
968 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
970 branch_frequency
+= EDGE_FREQUENCY (e
);
973 /* There are two purposes to align block with no fallthru incoming edge:
974 1) to avoid fetch stalls when branch destination is near cache boundary
975 2) to improve cache efficiency in case the previous block is not executed
976 (so it does not need to be in the cache).
978 We to catch first case, we align frequently executed blocks.
979 To catch the second, we align blocks that are executed more frequently
980 than the predecessor and the predecessor is likely to not be executed
981 when function is called. */
984 && (branch_frequency
> BB_FREQ_MAX
/ 10
985 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
986 && (bb
->prev_bb
->frequency
987 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
989 log
= JUMP_ALIGN (label
);
993 max_skip
= JUMP_ALIGN_MAX_SKIP
;
996 /* In case block is frequent and reached mostly by non-fallthru edge,
997 align it. It is most likely an first block of loop. */
999 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1000 && branch_frequency
> fallthru_frequency
* 5)
1002 log
= LOOP_ALIGN (label
);
1006 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1009 LABEL_TO_ALIGNMENT (label
) = max_log
;
1010 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1014 /* Make a pass over all insns and compute their actual lengths by shortening
1015 any branches of variable length if possible. */
1017 /* Give a default value for the lowest address in a function. */
1019 #ifndef FIRST_INSN_ADDRESS
1020 #define FIRST_INSN_ADDRESS 0
1023 /* shorten_branches might be called multiple times: for example, the SH
1024 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1025 In order to do this, it needs proper length information, which it obtains
1026 by calling shorten_branches. This cannot be collapsed with
1027 shorten_branches itself into a single pass unless we also want to integrate
1028 reorg.c, since the branch splitting exposes new instructions with delay
1032 shorten_branches (first
)
1033 rtx first ATTRIBUTE_UNUSED
;
1040 #ifdef HAVE_ATTR_length
1041 #define MAX_CODE_ALIGN 16
1043 int something_changed
= 1;
1044 char *varying_length
;
1047 rtx align_tab
[MAX_CODE_ALIGN
];
1051 /* Compute maximum UID and allocate label_align / uid_shuid. */
1052 max_uid
= get_max_uid ();
1054 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1056 if (max_labelno
!= max_label_num ())
1058 int old
= max_labelno
;
1062 max_labelno
= max_label_num ();
1064 n_labels
= max_labelno
- min_labelno
+ 1;
1065 n_old_labels
= old
- min_labelno
+ 1;
1067 label_align
= (struct label_alignment
*) xrealloc
1068 (label_align
, n_labels
* sizeof (struct label_alignment
));
1070 /* Range of labels grows monotonically in the function. Abort here
1071 means that the initialization of array got lost. */
1072 if (n_old_labels
> n_labels
)
1075 memset (label_align
+ n_old_labels
, 0,
1076 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1079 /* Initialize label_align and set up uid_shuid to be strictly
1080 monotonically rising with insn order. */
1081 /* We use max_log here to keep track of the maximum alignment we want to
1082 impose on the next CODE_LABEL (or the current one if we are processing
1083 the CODE_LABEL itself). */
1088 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1092 INSN_SHUID (insn
) = i
++;
1095 /* reorg might make the first insn of a loop being run once only,
1096 and delete the label in front of it. Then we want to apply
1097 the loop alignment to the new label created by reorg, which
1098 is separated by the former loop start insn from the
1099 NOTE_INSN_LOOP_BEG. */
1101 else if (GET_CODE (insn
) == CODE_LABEL
)
1105 /* Merge in alignments computed by compute_alignments. */
1106 log
= LABEL_TO_ALIGNMENT (insn
);
1110 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1113 log
= LABEL_ALIGN (insn
);
1117 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1119 next
= NEXT_INSN (insn
);
1120 /* ADDR_VECs only take room if read-only data goes into the text
1122 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1123 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1125 rtx nextbody
= PATTERN (next
);
1126 if (GET_CODE (nextbody
) == ADDR_VEC
1127 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1129 log
= ADDR_VEC_ALIGN (next
);
1133 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1137 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1138 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1142 else if (GET_CODE (insn
) == BARRIER
)
1146 for (label
= insn
; label
&& ! INSN_P (label
);
1147 label
= NEXT_INSN (label
))
1148 if (GET_CODE (label
) == CODE_LABEL
)
1150 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1154 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1160 #ifdef HAVE_ATTR_length
1162 /* Allocate the rest of the arrays. */
1163 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
1164 insn_lengths_max_uid
= max_uid
;
1165 /* Syntax errors can lead to labels being outside of the main insn stream.
1166 Initialize insn_addresses, so that we get reproducible results. */
1167 INSN_ADDRESSES_ALLOC (max_uid
);
1169 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1171 /* Initialize uid_align. We scan instructions
1172 from end to start, and keep in align_tab[n] the last seen insn
1173 that does an alignment of at least n+1, i.e. the successor
1174 in the alignment chain for an insn that does / has a known
1176 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1178 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1179 align_tab
[i
] = NULL_RTX
;
1180 seq
= get_last_insn ();
1181 for (; seq
; seq
= PREV_INSN (seq
))
1183 int uid
= INSN_UID (seq
);
1185 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1186 uid_align
[uid
] = align_tab
[0];
1189 /* Found an alignment label. */
1190 uid_align
[uid
] = align_tab
[log
];
1191 for (i
= log
- 1; i
>= 0; i
--)
1195 #ifdef CASE_VECTOR_SHORTEN_MODE
1198 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1201 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1202 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1205 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1207 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1208 int len
, i
, min
, max
, insn_shuid
;
1210 addr_diff_vec_flags flags
;
1212 if (GET_CODE (insn
) != JUMP_INSN
1213 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1215 pat
= PATTERN (insn
);
1216 len
= XVECLEN (pat
, 1);
1219 min_align
= MAX_CODE_ALIGN
;
1220 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1222 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1223 int shuid
= INSN_SHUID (lab
);
1234 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1235 min_align
= LABEL_TO_ALIGNMENT (lab
);
1237 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1238 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1239 insn_shuid
= INSN_SHUID (insn
);
1240 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1241 flags
.min_align
= min_align
;
1242 flags
.base_after_vec
= rel
> insn_shuid
;
1243 flags
.min_after_vec
= min
> insn_shuid
;
1244 flags
.max_after_vec
= max
> insn_shuid
;
1245 flags
.min_after_base
= min
> rel
;
1246 flags
.max_after_base
= max
> rel
;
1247 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1250 #endif /* CASE_VECTOR_SHORTEN_MODE */
1252 /* Compute initial lengths, addresses, and varying flags for each insn. */
1253 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1255 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1257 uid
= INSN_UID (insn
);
1259 insn_lengths
[uid
] = 0;
1261 if (GET_CODE (insn
) == CODE_LABEL
)
1263 int log
= LABEL_TO_ALIGNMENT (insn
);
1266 int align
= 1 << log
;
1267 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1268 insn_lengths
[uid
] = new_address
- insn_current_address
;
1272 INSN_ADDRESSES (uid
) = insn_current_address
;
1274 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1275 || GET_CODE (insn
) == CODE_LABEL
)
1277 if (INSN_DELETED_P (insn
))
1280 body
= PATTERN (insn
);
1281 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1283 /* This only takes room if read-only data goes into the text
1285 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1286 insn_lengths
[uid
] = (XVECLEN (body
,
1287 GET_CODE (body
) == ADDR_DIFF_VEC
)
1288 * GET_MODE_SIZE (GET_MODE (body
)));
1289 /* Alignment is handled by ADDR_VEC_ALIGN. */
1291 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1292 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1293 else if (GET_CODE (body
) == SEQUENCE
)
1296 int const_delay_slots
;
1298 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1300 const_delay_slots
= 0;
1302 /* Inside a delay slot sequence, we do not do any branch shortening
1303 if the shortening could change the number of delay slots
1305 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1307 rtx inner_insn
= XVECEXP (body
, 0, i
);
1308 int inner_uid
= INSN_UID (inner_insn
);
1311 if (GET_CODE (body
) == ASM_INPUT
1312 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1313 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1314 * insn_default_length (inner_insn
));
1316 inner_length
= insn_default_length (inner_insn
);
1318 insn_lengths
[inner_uid
] = inner_length
;
1319 if (const_delay_slots
)
1321 if ((varying_length
[inner_uid
]
1322 = insn_variable_length_p (inner_insn
)) != 0)
1323 varying_length
[uid
] = 1;
1324 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1325 + insn_lengths
[uid
]);
1328 varying_length
[inner_uid
] = 0;
1329 insn_lengths
[uid
] += inner_length
;
1332 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1334 insn_lengths
[uid
] = insn_default_length (insn
);
1335 varying_length
[uid
] = insn_variable_length_p (insn
);
1338 /* If needed, do any adjustment. */
1339 #ifdef ADJUST_INSN_LENGTH
1340 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1341 if (insn_lengths
[uid
] < 0)
1342 fatal_insn ("negative insn length", insn
);
1346 /* Now loop over all the insns finding varying length insns. For each,
1347 get the current insn length. If it has changed, reflect the change.
1348 When nothing changes for a full pass, we are done. */
1350 while (something_changed
)
1352 something_changed
= 0;
1353 insn_current_align
= MAX_CODE_ALIGN
- 1;
1354 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1356 insn
= NEXT_INSN (insn
))
1359 #ifdef ADJUST_INSN_LENGTH
1364 uid
= INSN_UID (insn
);
1366 if (GET_CODE (insn
) == CODE_LABEL
)
1368 int log
= LABEL_TO_ALIGNMENT (insn
);
1369 if (log
> insn_current_align
)
1371 int align
= 1 << log
;
1372 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1373 insn_lengths
[uid
] = new_address
- insn_current_address
;
1374 insn_current_align
= log
;
1375 insn_current_address
= new_address
;
1378 insn_lengths
[uid
] = 0;
1379 INSN_ADDRESSES (uid
) = insn_current_address
;
1383 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1384 if (length_align
< insn_current_align
)
1385 insn_current_align
= length_align
;
1387 insn_last_address
= INSN_ADDRESSES (uid
);
1388 INSN_ADDRESSES (uid
) = insn_current_address
;
1390 #ifdef CASE_VECTOR_SHORTEN_MODE
1391 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1392 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1394 rtx body
= PATTERN (insn
);
1395 int old_length
= insn_lengths
[uid
];
1396 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1397 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1398 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1399 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1400 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1401 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1404 addr_diff_vec_flags flags
;
1406 /* Avoid automatic aggregate initialization. */
1407 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1409 /* Try to find a known alignment for rel_lab. */
1410 for (prev
= rel_lab
;
1412 && ! insn_lengths
[INSN_UID (prev
)]
1413 && ! (varying_length
[INSN_UID (prev
)] & 1);
1414 prev
= PREV_INSN (prev
))
1415 if (varying_length
[INSN_UID (prev
)] & 2)
1417 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1421 /* See the comment on addr_diff_vec_flags in rtl.h for the
1422 meaning of the flags values. base: REL_LAB vec: INSN */
1423 /* Anything after INSN has still addresses from the last
1424 pass; adjust these so that they reflect our current
1425 estimate for this pass. */
1426 if (flags
.base_after_vec
)
1427 rel_addr
+= insn_current_address
- insn_last_address
;
1428 if (flags
.min_after_vec
)
1429 min_addr
+= insn_current_address
- insn_last_address
;
1430 if (flags
.max_after_vec
)
1431 max_addr
+= insn_current_address
- insn_last_address
;
1432 /* We want to know the worst case, i.e. lowest possible value
1433 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1434 its offset is positive, and we have to be wary of code shrink;
1435 otherwise, it is negative, and we have to be vary of code
1437 if (flags
.min_after_base
)
1439 /* If INSN is between REL_LAB and MIN_LAB, the size
1440 changes we are about to make can change the alignment
1441 within the observed offset, therefore we have to break
1442 it up into two parts that are independent. */
1443 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1445 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1446 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1449 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1453 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1455 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1456 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1459 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1461 /* Likewise, determine the highest lowest possible value
1462 for the offset of MAX_LAB. */
1463 if (flags
.max_after_base
)
1465 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1467 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1468 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1471 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1475 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1477 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1478 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1481 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1483 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1484 max_addr
- rel_addr
,
1486 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1489 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1490 insn_current_address
+= insn_lengths
[uid
];
1491 if (insn_lengths
[uid
] != old_length
)
1492 something_changed
= 1;
1497 #endif /* CASE_VECTOR_SHORTEN_MODE */
1499 if (! (varying_length
[uid
]))
1501 if (GET_CODE (insn
) == INSN
1502 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1506 body
= PATTERN (insn
);
1507 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1509 rtx inner_insn
= XVECEXP (body
, 0, i
);
1510 int inner_uid
= INSN_UID (inner_insn
);
1512 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1514 insn_current_address
+= insn_lengths
[inner_uid
];
1518 insn_current_address
+= insn_lengths
[uid
];
1523 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1527 body
= PATTERN (insn
);
1529 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1531 rtx inner_insn
= XVECEXP (body
, 0, i
);
1532 int inner_uid
= INSN_UID (inner_insn
);
1535 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1537 /* insn_current_length returns 0 for insns with a
1538 non-varying length. */
1539 if (! varying_length
[inner_uid
])
1540 inner_length
= insn_lengths
[inner_uid
];
1542 inner_length
= insn_current_length (inner_insn
);
1544 if (inner_length
!= insn_lengths
[inner_uid
])
1546 insn_lengths
[inner_uid
] = inner_length
;
1547 something_changed
= 1;
1549 insn_current_address
+= insn_lengths
[inner_uid
];
1550 new_length
+= inner_length
;
1555 new_length
= insn_current_length (insn
);
1556 insn_current_address
+= new_length
;
1559 #ifdef ADJUST_INSN_LENGTH
1560 /* If needed, do any adjustment. */
1561 tmp_length
= new_length
;
1562 ADJUST_INSN_LENGTH (insn
, new_length
);
1563 insn_current_address
+= (new_length
- tmp_length
);
1566 if (new_length
!= insn_lengths
[uid
])
1568 insn_lengths
[uid
] = new_length
;
1569 something_changed
= 1;
1572 /* For a non-optimizing compile, do only a single pass. */
1577 free (varying_length
);
1579 #endif /* HAVE_ATTR_length */
1582 #ifdef HAVE_ATTR_length
1583 /* Given the body of an INSN known to be generated by an ASM statement, return
1584 the number of machine instructions likely to be generated for this insn.
1585 This is used to compute its length. */
1588 asm_insn_count (body
)
1591 const char *template;
1594 if (GET_CODE (body
) == ASM_INPUT
)
1595 template = XSTR (body
, 0);
1597 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1599 for (; *template; template++)
1600 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1607 /* Output assembler code for the start of a function,
1608 and initialize some of the variables in this file
1609 for the new function. The label for the function and associated
1610 assembler pseudo-ops have already been output in `assemble_start_function'.
1612 FIRST is the first insn of the rtl for the function being compiled.
1613 FILE is the file to write assembler code to.
1614 OPTIMIZE is nonzero if we should eliminate redundant
1615 test and compare insns. */
1618 final_start_function (first
, file
, optimize
)
1621 int optimize ATTRIBUTE_UNUSED
;
1625 this_is_asm_operands
= 0;
1627 #ifdef NON_SAVING_SETJMP
1628 /* A function that calls setjmp should save and restore all the
1629 call-saved registers on a system where longjmp clobbers them. */
1630 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1634 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1635 if (!call_used_regs
[i
])
1636 regs_ever_live
[i
] = 1;
1640 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1641 notice_source_line (first
);
1642 high_block_linenum
= high_function_linenum
= last_linenum
;
1644 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1646 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1647 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1648 dwarf2out_begin_prologue (0, NULL
);
1651 #ifdef LEAF_REG_REMAP
1652 if (current_function_uses_only_leaf_regs
)
1653 leaf_renumber_regs (first
);
1656 /* The Sun386i and perhaps other machines don't work right
1657 if the profiling code comes after the prologue. */
1658 #ifdef PROFILE_BEFORE_PROLOGUE
1659 if (current_function_profile
)
1660 profile_function (file
);
1661 #endif /* PROFILE_BEFORE_PROLOGUE */
1663 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1664 if (dwarf2out_do_frame ())
1665 dwarf2out_frame_debug (NULL_RTX
);
1668 /* If debugging, assign block numbers to all of the blocks in this
1672 remove_unnecessary_notes ();
1673 scope_to_insns_finalize ();
1674 number_blocks (current_function_decl
);
1675 /* We never actually put out begin/end notes for the top-level
1676 block in the function. But, conceptually, that block is
1678 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1681 /* First output the function prologue: code to set up the stack frame. */
1682 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1684 /* If the machine represents the prologue as RTL, the profiling code must
1685 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1686 #ifdef HAVE_prologue
1687 if (! HAVE_prologue
)
1689 profile_after_prologue (file
);
1693 profile_after_prologue (file
)
1694 FILE *file ATTRIBUTE_UNUSED
;
1696 #ifndef PROFILE_BEFORE_PROLOGUE
1697 if (current_function_profile
)
1698 profile_function (file
);
1699 #endif /* not PROFILE_BEFORE_PROLOGUE */
1703 profile_function (file
)
1704 FILE *file ATTRIBUTE_UNUSED
;
1706 #ifndef NO_PROFILE_COUNTERS
1707 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1709 #if defined(ASM_OUTPUT_REG_PUSH)
1710 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1711 int sval
= current_function_returns_struct
;
1713 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1714 int cxt
= current_function_needs_context
;
1716 #endif /* ASM_OUTPUT_REG_PUSH */
1718 #ifndef NO_PROFILE_COUNTERS
1720 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1721 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", current_function_funcdef_no
);
1722 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1725 function_section (current_function_decl
);
1727 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1729 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1731 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1734 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1739 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1741 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1743 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1746 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1751 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1753 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1755 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1757 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1760 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1765 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1767 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1769 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1772 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1778 /* Output assembler code for the end of a function.
1779 For clarity, args are same as those of `final_start_function'
1780 even though not all of them are needed. */
1783 final_end_function ()
1787 (*debug_hooks
->end_function
) (high_function_linenum
);
1789 /* Finally, output the function epilogue:
1790 code to restore the stack frame and return to the caller. */
1791 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1793 /* And debug output. */
1794 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1796 #if defined (DWARF2_UNWIND_INFO)
1797 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1798 && dwarf2out_do_frame ())
1799 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1803 /* Output assembler code for some insns: all or part of a function.
1804 For description of args, see `final_start_function', above.
1806 PRESCAN is 1 if we are not really outputting,
1807 just scanning as if we were outputting.
1808 Prescanning deletes and rearranges insns just like ordinary output.
1809 PRESCAN is -2 if we are outputting after having prescanned.
1810 In this case, don't try to delete or rearrange insns
1811 because that has already been done.
1812 Prescanning is done only on certain machines. */
1815 final (first
, file
, optimize
, prescan
)
1825 last_ignored_compare
= 0;
1828 /* Make a map indicating which line numbers appear in this function.
1829 When producing SDB debugging info, delete troublesome line number
1830 notes from inlined functions in other files as well as duplicate
1831 line number notes. */
1832 #ifdef SDB_DEBUGGING_INFO
1833 if (write_symbols
== SDB_DEBUG
)
1836 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1837 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1839 if ((RTX_INTEGRATED_P (insn
)
1840 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1842 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1843 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1845 delete_insn (insn
); /* Use delete_note. */
1849 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1850 max_line
= NOTE_LINE_NUMBER (insn
);
1856 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1857 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1858 max_line
= NOTE_LINE_NUMBER (insn
);
1861 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1863 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1865 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1866 max_uid
= INSN_UID (insn
);
1867 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1868 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1870 /* If CC tracking across branches is enabled, record the insn which
1871 jumps to each branch only reached from one place. */
1872 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1874 rtx lab
= JUMP_LABEL (insn
);
1875 if (lab
&& LABEL_NUSES (lab
) == 1)
1877 LABEL_REFS (lab
) = insn
;
1887 /* Output the insns. */
1888 for (insn
= NEXT_INSN (first
); insn
;)
1890 #ifdef HAVE_ATTR_length
1891 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1893 /* This can be triggered by bugs elsewhere in the compiler if
1894 new insns are created after init_insn_lengths is called. */
1895 if (GET_CODE (insn
) == NOTE
)
1896 insn_current_address
= -1;
1901 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1902 #endif /* HAVE_ATTR_length */
1904 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1907 /* Store function names for edge-profiling. */
1908 /* ??? Probably should re-use the existing struct function. */
1910 if (cfun
->arc_profile
)
1912 struct function_list
*new_item
= xmalloc (sizeof (struct function_list
));
1914 *functions_tail
= new_item
;
1915 functions_tail
= &new_item
->next
;
1918 new_item
->name
= xstrdup (current_function_name
);
1919 new_item
->cfg_checksum
= profile_info
.current_function_cfg_checksum
;
1920 new_item
->count_edges
= profile_info
.count_edges_instrumented_now
;
1923 free (line_note_exists
);
1924 line_note_exists
= NULL
;
1928 get_insn_template (code
, insn
)
1932 const void *output
= insn_data
[code
].output
;
1933 switch (insn_data
[code
].output_format
)
1935 case INSN_OUTPUT_FORMAT_SINGLE
:
1936 return (const char *) output
;
1937 case INSN_OUTPUT_FORMAT_MULTI
:
1938 return ((const char *const *) output
)[which_alternative
];
1939 case INSN_OUTPUT_FORMAT_FUNCTION
:
1942 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1949 /* Emit the appropriate declaration for an alternate-entry-point
1950 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1951 LABEL_KIND != LABEL_NORMAL.
1953 The case fall-through in this function is intentional. */
1955 output_alternate_entry_point (file
, insn
)
1959 const char *name
= LABEL_NAME (insn
);
1961 switch (LABEL_KIND (insn
))
1963 case LABEL_WEAK_ENTRY
:
1964 #ifdef ASM_WEAKEN_LABEL
1965 ASM_WEAKEN_LABEL (file
, name
);
1967 case LABEL_GLOBAL_ENTRY
:
1968 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1969 case LABEL_STATIC_ENTRY
:
1970 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1971 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1973 ASM_OUTPUT_LABEL (file
, name
);
1982 /* The final scan for one insn, INSN.
1983 Args are same as in `final', except that INSN
1984 is the insn being scanned.
1985 Value returned is the next insn to be scanned.
1987 NOPEEPHOLES is the flag to disallow peephole processing (currently
1988 used for within delayed branch sequence output). */
1991 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1994 int optimize ATTRIBUTE_UNUSED
;
1996 int nopeepholes ATTRIBUTE_UNUSED
;
2004 /* Ignore deleted insns. These can occur when we split insns (due to a
2005 template of "#") while not optimizing. */
2006 if (INSN_DELETED_P (insn
))
2007 return NEXT_INSN (insn
);
2009 switch (GET_CODE (insn
))
2015 switch (NOTE_LINE_NUMBER (insn
))
2017 case NOTE_INSN_DELETED
:
2018 case NOTE_INSN_LOOP_BEG
:
2019 case NOTE_INSN_LOOP_END
:
2020 case NOTE_INSN_LOOP_END_TOP_COND
:
2021 case NOTE_INSN_LOOP_CONT
:
2022 case NOTE_INSN_LOOP_VTOP
:
2023 case NOTE_INSN_FUNCTION_END
:
2024 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2025 case NOTE_INSN_EXPECTED_VALUE
:
2028 case NOTE_INSN_BASIC_BLOCK
:
2029 #ifdef IA64_UNWIND_INFO
2030 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2033 fprintf (asm_out_file
, "\t%s basic block %d\n",
2034 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2037 case NOTE_INSN_EH_REGION_BEG
:
2038 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2039 NOTE_EH_HANDLER (insn
));
2042 case NOTE_INSN_EH_REGION_END
:
2043 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2044 NOTE_EH_HANDLER (insn
));
2047 case NOTE_INSN_PROLOGUE_END
:
2048 (*targetm
.asm_out
.function_end_prologue
) (file
);
2049 profile_after_prologue (file
);
2052 case NOTE_INSN_EPILOGUE_BEG
:
2053 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2056 case NOTE_INSN_FUNCTION_BEG
:
2058 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
2061 case NOTE_INSN_BLOCK_BEG
:
2062 if (debug_info_level
== DINFO_LEVEL_NORMAL
2063 || debug_info_level
== DINFO_LEVEL_VERBOSE
2064 || write_symbols
== DWARF_DEBUG
2065 || write_symbols
== DWARF2_DEBUG
2066 || write_symbols
== VMS_AND_DWARF2_DEBUG
2067 || write_symbols
== VMS_DEBUG
)
2069 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2073 high_block_linenum
= last_linenum
;
2075 /* Output debugging info about the symbol-block beginning. */
2076 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2078 /* Mark this block as output. */
2079 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2083 case NOTE_INSN_BLOCK_END
:
2084 if (debug_info_level
== DINFO_LEVEL_NORMAL
2085 || debug_info_level
== DINFO_LEVEL_VERBOSE
2086 || write_symbols
== DWARF_DEBUG
2087 || write_symbols
== DWARF2_DEBUG
2088 || write_symbols
== VMS_AND_DWARF2_DEBUG
2089 || write_symbols
== VMS_DEBUG
)
2091 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2095 /* End of a symbol-block. */
2097 if (block_depth
< 0)
2100 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2104 case NOTE_INSN_DELETED_LABEL
:
2105 /* Emit the label. We may have deleted the CODE_LABEL because
2106 the label could be proved to be unreachable, though still
2107 referenced (in the form of having its address taken. */
2108 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2115 if (NOTE_LINE_NUMBER (insn
) <= 0)
2118 /* This note is a line-number. */
2123 /* If there is anything real after this note, output it.
2124 If another line note follows, omit this one. */
2125 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2127 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2130 /* These types of notes can be significant
2131 so make sure the preceding line number stays. */
2132 else if (GET_CODE (note
) == NOTE
2133 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2134 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2135 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2137 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2139 /* Another line note follows; we can delete this note
2140 if no intervening line numbers have notes elsewhere. */
2142 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2143 num
< NOTE_LINE_NUMBER (note
);
2145 if (line_note_exists
[num
])
2148 if (num
>= NOTE_LINE_NUMBER (note
))
2154 /* Output this line note if it is the first or the last line
2158 notice_source_line (insn
);
2159 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2167 #if defined (DWARF2_UNWIND_INFO)
2168 if (dwarf2out_do_frame ())
2169 dwarf2out_frame_debug (insn
);
2174 /* The target port might emit labels in the output function for
2175 some insn, e.g. sh.c output_branchy_insn. */
2176 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2178 int align
= LABEL_TO_ALIGNMENT (insn
);
2179 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2180 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2183 if (align
&& NEXT_INSN (insn
))
2185 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2186 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2188 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2189 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
2191 ASM_OUTPUT_ALIGN (file
, align
);
2198 /* If this label is reached from only one place, set the condition
2199 codes from the instruction just before the branch. */
2201 /* Disabled because some insns set cc_status in the C output code
2202 and NOTICE_UPDATE_CC alone can set incorrect status. */
2203 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2205 rtx jump
= LABEL_REFS (insn
);
2206 rtx barrier
= prev_nonnote_insn (insn
);
2208 /* If the LABEL_REFS field of this label has been set to point
2209 at a branch, the predecessor of the branch is a regular
2210 insn, and that branch is the only way to reach this label,
2211 set the condition codes based on the branch and its
2213 if (barrier
&& GET_CODE (barrier
) == BARRIER
2214 && jump
&& GET_CODE (jump
) == JUMP_INSN
2215 && (prev
= prev_nonnote_insn (jump
))
2216 && GET_CODE (prev
) == INSN
)
2218 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2219 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2227 #ifdef FINAL_PRESCAN_LABEL
2228 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2231 if (LABEL_NAME (insn
))
2232 (*debug_hooks
->label
) (insn
);
2236 fputs (ASM_APP_OFF
, file
);
2239 if (NEXT_INSN (insn
) != 0
2240 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2242 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2244 /* If this label is followed by a jump-table,
2245 make sure we put the label in the read-only section. Also
2246 possibly write the label and jump table together. */
2248 if (GET_CODE (nextbody
) == ADDR_VEC
2249 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2251 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2252 /* In this case, the case vector is being moved by the
2253 target, so don't output the label at all. Leave that
2254 to the back end macros. */
2256 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2260 readonly_data_section ();
2262 #ifdef ADDR_VEC_ALIGN
2263 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2265 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2267 ASM_OUTPUT_ALIGN (file
, log_align
);
2270 function_section (current_function_decl
);
2272 #ifdef ASM_OUTPUT_CASE_LABEL
2273 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2276 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2282 if (LABEL_ALT_ENTRY_P (insn
))
2283 output_alternate_entry_point (file
, insn
);
2285 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2290 rtx body
= PATTERN (insn
);
2291 int insn_code_number
;
2292 const char *template;
2295 /* An INSN, JUMP_INSN or CALL_INSN.
2296 First check for special kinds that recog doesn't recognize. */
2298 if (GET_CODE (body
) == USE
/* These are just declarations */
2299 || GET_CODE (body
) == CLOBBER
)
2303 /* If there is a REG_CC_SETTER note on this insn, it means that
2304 the setting of the condition code was done in the delay slot
2305 of the insn that branched here. So recover the cc status
2306 from the insn that set it. */
2308 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2311 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2312 cc_prev_status
= cc_status
;
2316 /* Detect insns that are really jump-tables
2317 and output them as such. */
2319 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2321 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2330 fputs (ASM_APP_OFF
, file
);
2334 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2335 if (GET_CODE (body
) == ADDR_VEC
)
2337 #ifdef ASM_OUTPUT_ADDR_VEC
2338 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2345 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2346 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2352 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2353 for (idx
= 0; idx
< vlen
; idx
++)
2355 if (GET_CODE (body
) == ADDR_VEC
)
2357 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2358 ASM_OUTPUT_ADDR_VEC_ELT
2359 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2366 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2367 ASM_OUTPUT_ADDR_DIFF_ELT
2370 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2371 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2377 #ifdef ASM_OUTPUT_CASE_END
2378 ASM_OUTPUT_CASE_END (file
,
2379 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2384 function_section (current_function_decl
);
2389 if (GET_CODE (body
) == ASM_INPUT
)
2391 const char *string
= XSTR (body
, 0);
2393 /* There's no telling what that did to the condition codes. */
2402 fputs (ASM_APP_ON
, file
);
2405 fprintf (asm_out_file
, "\t%s\n", string
);
2410 /* Detect `asm' construct with operands. */
2411 if (asm_noperands (body
) >= 0)
2413 unsigned int noperands
= asm_noperands (body
);
2414 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2417 /* There's no telling what that did to the condition codes. */
2422 /* Get out the operand values. */
2423 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2424 /* Inhibit aborts on what would otherwise be compiler bugs. */
2425 insn_noperands
= noperands
;
2426 this_is_asm_operands
= insn
;
2428 /* Output the insn using them. */
2433 fputs (ASM_APP_ON
, file
);
2436 output_asm_insn (string
, ops
);
2439 this_is_asm_operands
= 0;
2443 if (prescan
<= 0 && app_on
)
2445 fputs (ASM_APP_OFF
, file
);
2449 if (GET_CODE (body
) == SEQUENCE
)
2451 /* A delayed-branch sequence */
2457 final_sequence
= body
;
2459 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2460 force the restoration of a comparison that was previously
2461 thought unnecessary. If that happens, cancel this sequence
2462 and cause that insn to be restored. */
2464 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2465 if (next
!= XVECEXP (body
, 0, 1))
2471 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2473 rtx insn
= XVECEXP (body
, 0, i
);
2474 rtx next
= NEXT_INSN (insn
);
2475 /* We loop in case any instruction in a delay slot gets
2478 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2479 while (insn
!= next
);
2481 #ifdef DBR_OUTPUT_SEQEND
2482 DBR_OUTPUT_SEQEND (file
);
2486 /* If the insn requiring the delay slot was a CALL_INSN, the
2487 insns in the delay slot are actually executed before the
2488 called function. Hence we don't preserve any CC-setting
2489 actions in these insns and the CC must be marked as being
2490 clobbered by the function. */
2491 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2498 /* We have a real machine instruction as rtl. */
2500 body
= PATTERN (insn
);
2503 set
= single_set (insn
);
2505 /* Check for redundant test and compare instructions
2506 (when the condition codes are already set up as desired).
2507 This is done only when optimizing; if not optimizing,
2508 it should be possible for the user to alter a variable
2509 with the debugger in between statements
2510 and the next statement should reexamine the variable
2511 to compute the condition codes. */
2516 rtx set
= single_set (insn
);
2520 && GET_CODE (SET_DEST (set
)) == CC0
2521 && insn
!= last_ignored_compare
)
2523 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2524 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2525 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2527 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2528 XEXP (SET_SRC (set
), 0)
2529 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2530 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2531 XEXP (SET_SRC (set
), 1)
2532 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2534 if ((cc_status
.value1
!= 0
2535 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2536 || (cc_status
.value2
!= 0
2537 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2539 /* Don't delete insn if it has an addressing side-effect. */
2540 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2541 /* or if anything in it is volatile. */
2542 && ! volatile_refs_p (PATTERN (insn
)))
2544 /* We don't really delete the insn; just ignore it. */
2545 last_ignored_compare
= insn
;
2554 /* Don't bother outputting obvious no-ops, even without -O.
2555 This optimization is fast and doesn't interfere with debugging.
2556 Don't do this if the insn is in a delay slot, since this
2557 will cause an improper number of delay insns to be written. */
2558 if (final_sequence
== 0
2560 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2561 && GET_CODE (SET_SRC (body
)) == REG
2562 && GET_CODE (SET_DEST (body
)) == REG
2563 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2568 /* If this is a conditional branch, maybe modify it
2569 if the cc's are in a nonstandard state
2570 so that it accomplishes the same thing that it would
2571 do straightforwardly if the cc's were set up normally. */
2573 if (cc_status
.flags
!= 0
2574 && GET_CODE (insn
) == JUMP_INSN
2575 && GET_CODE (body
) == SET
2576 && SET_DEST (body
) == pc_rtx
2577 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2578 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2579 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2580 /* This is done during prescan; it is not done again
2581 in final scan when prescan has been done. */
2584 /* This function may alter the contents of its argument
2585 and clear some of the cc_status.flags bits.
2586 It may also return 1 meaning condition now always true
2587 or -1 meaning condition now always false
2588 or 2 meaning condition nontrivial but altered. */
2589 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2590 /* If condition now has fixed value, replace the IF_THEN_ELSE
2591 with its then-operand or its else-operand. */
2593 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2595 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2597 /* The jump is now either unconditional or a no-op.
2598 If it has become a no-op, don't try to output it.
2599 (It would not be recognized.) */
2600 if (SET_SRC (body
) == pc_rtx
)
2605 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2606 /* Replace (set (pc) (return)) with (return). */
2607 PATTERN (insn
) = body
= SET_SRC (body
);
2609 /* Rerecognize the instruction if it has changed. */
2611 INSN_CODE (insn
) = -1;
2614 /* Make same adjustments to instructions that examine the
2615 condition codes without jumping and instructions that
2616 handle conditional moves (if this machine has either one). */
2618 if (cc_status
.flags
!= 0
2621 rtx cond_rtx
, then_rtx
, else_rtx
;
2623 if (GET_CODE (insn
) != JUMP_INSN
2624 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2626 cond_rtx
= XEXP (SET_SRC (set
), 0);
2627 then_rtx
= XEXP (SET_SRC (set
), 1);
2628 else_rtx
= XEXP (SET_SRC (set
), 2);
2632 cond_rtx
= SET_SRC (set
);
2633 then_rtx
= const_true_rtx
;
2634 else_rtx
= const0_rtx
;
2637 switch (GET_CODE (cond_rtx
))
2651 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2653 result
= alter_cond (cond_rtx
);
2655 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2656 else if (result
== -1)
2657 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2658 else if (result
== 2)
2659 INSN_CODE (insn
) = -1;
2660 if (SET_DEST (set
) == SET_SRC (set
))
2672 #ifdef HAVE_peephole
2673 /* Do machine-specific peephole optimizations if desired. */
2675 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2677 rtx next
= peephole (insn
);
2678 /* When peepholing, if there were notes within the peephole,
2679 emit them before the peephole. */
2680 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2682 rtx prev
= PREV_INSN (insn
);
2684 for (note
= NEXT_INSN (insn
); note
!= next
;
2685 note
= NEXT_INSN (note
))
2686 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2688 /* In case this is prescan, put the notes
2689 in proper position for later rescan. */
2690 note
= NEXT_INSN (insn
);
2691 PREV_INSN (note
) = prev
;
2692 NEXT_INSN (prev
) = note
;
2693 NEXT_INSN (PREV_INSN (next
)) = insn
;
2694 PREV_INSN (insn
) = PREV_INSN (next
);
2695 NEXT_INSN (insn
) = next
;
2696 PREV_INSN (next
) = insn
;
2699 /* PEEPHOLE might have changed this. */
2700 body
= PATTERN (insn
);
2704 /* Try to recognize the instruction.
2705 If successful, verify that the operands satisfy the
2706 constraints for the instruction. Crash if they don't,
2707 since `reload' should have changed them so that they do. */
2709 insn_code_number
= recog_memoized (insn
);
2710 cleanup_subreg_operands (insn
);
2712 /* Dump the insn in the assembly for debugging. */
2713 if (flag_dump_rtl_in_asm
)
2715 print_rtx_head
= ASM_COMMENT_START
;
2716 print_rtl_single (asm_out_file
, insn
);
2717 print_rtx_head
= "";
2720 if (! constrain_operands_cached (1))
2721 fatal_insn_not_found (insn
);
2723 /* Some target machines need to prescan each insn before
2726 #ifdef FINAL_PRESCAN_INSN
2727 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2730 #ifdef HAVE_conditional_execution
2731 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2732 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2734 current_insn_predicate
= NULL_RTX
;
2738 cc_prev_status
= cc_status
;
2740 /* Update `cc_status' for this instruction.
2741 The instruction's output routine may change it further.
2742 If the output routine for a jump insn needs to depend
2743 on the cc status, it should look at cc_prev_status. */
2745 NOTICE_UPDATE_CC (body
, insn
);
2748 current_output_insn
= debug_insn
= insn
;
2750 #if defined (DWARF2_UNWIND_INFO)
2751 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2752 dwarf2out_frame_debug (insn
);
2755 /* Find the proper template for this insn. */
2756 template = get_insn_template (insn_code_number
, insn
);
2758 /* If the C code returns 0, it means that it is a jump insn
2759 which follows a deleted test insn, and that test insn
2760 needs to be reinserted. */
2765 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2769 /* We have already processed the notes between the setter and
2770 the user. Make sure we don't process them again, this is
2771 particularly important if one of the notes is a block
2772 scope note or an EH note. */
2774 prev
!= last_ignored_compare
;
2775 prev
= PREV_INSN (prev
))
2777 if (GET_CODE (prev
) == NOTE
)
2778 delete_insn (prev
); /* Use delete_note. */
2784 /* If the template is the string "#", it means that this insn must
2786 if (template[0] == '#' && template[1] == '\0')
2788 rtx
new = try_split (body
, insn
, 0);
2790 /* If we didn't split the insn, go away. */
2791 if (new == insn
&& PATTERN (new) == body
)
2792 fatal_insn ("could not split insn", insn
);
2794 #ifdef HAVE_ATTR_length
2795 /* This instruction should have been split in shorten_branches,
2796 to ensure that we would have valid length info for the
2808 #ifdef IA64_UNWIND_INFO
2809 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2811 /* Output assembler code from the template. */
2813 output_asm_insn (template, recog_data
.operand
);
2815 #if defined (DWARF2_UNWIND_INFO)
2816 #if defined (HAVE_prologue)
2817 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2818 dwarf2out_frame_debug (insn
);
2820 if (!ACCUMULATE_OUTGOING_ARGS
2821 && GET_CODE (insn
) == INSN
2822 && dwarf2out_do_frame ())
2823 dwarf2out_frame_debug (insn
);
2828 /* It's not at all clear why we did this and doing so interferes
2829 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2832 /* Mark this insn as having been output. */
2833 INSN_DELETED_P (insn
) = 1;
2836 /* Emit information for vtable gc. */
2837 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2839 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2840 INTVAL (XEXP (XEXP (note
, 0), 1)));
2842 current_output_insn
= debug_insn
= 0;
2845 return NEXT_INSN (insn
);
2848 /* Output debugging info to the assembler file FILE
2849 based on the NOTE-insn INSN, assumed to be a line number. */
2852 notice_source_line (insn
)
2855 const char *filename
= NOTE_SOURCE_FILE (insn
);
2857 last_filename
= filename
;
2858 last_linenum
= NOTE_LINE_NUMBER (insn
);
2859 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2860 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2863 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2864 directly to the desired hard register. */
2867 cleanup_subreg_operands (insn
)
2871 extract_insn_cached (insn
);
2872 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2874 /* The following test cannot use recog_data.operand when tesing
2875 for a SUBREG: the underlying object might have been changed
2876 already if we are inside a match_operator expression that
2877 matches the else clause. Instead we test the underlying
2878 expression directly. */
2879 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2880 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2881 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2882 || GET_CODE (recog_data
.operand
[i
]) == MULT
2883 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2884 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2887 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2889 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2890 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2891 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2892 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2893 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2894 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2898 /* If X is a SUBREG, replace it with a REG or a MEM,
2899 based on the thing it is a subreg of. */
2906 rtx y
= SUBREG_REG (x
);
2908 /* simplify_subreg does not remove subreg from volatile references.
2909 We are required to. */
2910 if (GET_CODE (y
) == MEM
)
2911 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2914 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2919 /* Simplify_subreg can't handle some REG cases, but we have to. */
2920 else if (GET_CODE (y
) == REG
)
2922 unsigned int regno
= subreg_hard_regno (x
, 1);
2925 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
2926 /* This field has a different meaning for REGs and SUBREGs. Make
2927 sure to clear it! */
2928 RTX_FLAG (x
, used
) = 0;
2937 /* Do alter_subreg on all the SUBREGs contained in X. */
2940 walk_alter_subreg (xp
)
2944 switch (GET_CODE (x
))
2948 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2949 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2953 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2957 return alter_subreg (xp
);
2968 /* Given BODY, the body of a jump instruction, alter the jump condition
2969 as required by the bits that are set in cc_status.flags.
2970 Not all of the bits there can be handled at this level in all cases.
2972 The value is normally 0.
2973 1 means that the condition has become always true.
2974 -1 means that the condition has become always false.
2975 2 means that COND has been altered. */
2983 if (cc_status
.flags
& CC_REVERSED
)
2986 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2989 if (cc_status
.flags
& CC_INVERTED
)
2992 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2995 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2996 switch (GET_CODE (cond
))
3001 /* Jump becomes unconditional. */
3007 /* Jump becomes no-op. */
3011 PUT_CODE (cond
, EQ
);
3016 PUT_CODE (cond
, NE
);
3024 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3025 switch (GET_CODE (cond
))
3029 /* Jump becomes unconditional. */
3034 /* Jump becomes no-op. */
3039 PUT_CODE (cond
, EQ
);
3045 PUT_CODE (cond
, NE
);
3053 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3054 switch (GET_CODE (cond
))
3057 /* Jump becomes unconditional. */
3061 PUT_CODE (cond
, EQ
);
3066 PUT_CODE (cond
, NE
);
3071 /* Jump becomes no-op. */
3078 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3079 switch (GET_CODE (cond
))
3085 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3090 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3095 if (cc_status
.flags
& CC_NOT_SIGNED
)
3096 /* The flags are valid if signed condition operators are converted
3098 switch (GET_CODE (cond
))
3101 PUT_CODE (cond
, LEU
);
3106 PUT_CODE (cond
, LTU
);
3111 PUT_CODE (cond
, GTU
);
3116 PUT_CODE (cond
, GEU
);
3128 /* Report inconsistency between the assembler template and the operands.
3129 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3132 output_operand_lossage
VPARAMS ((const char *msgid
, ...))
3136 const char *pfx_str
;
3137 VA_OPEN (ap
, msgid
);
3138 VA_FIXEDARG (ap
, const char *, msgid
);
3140 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
3141 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
3142 vasprintf (&new_message
, fmt_string
, ap
);
3144 if (this_is_asm_operands
)
3145 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3147 internal_error ("%s", new_message
);
3154 /* Output of assembler code from a template, and its subroutines. */
3156 /* Annotate the assembly with a comment describing the pattern and
3157 alternative used. */
3164 int num
= INSN_CODE (debug_insn
);
3165 fprintf (asm_out_file
, "\t%s %d\t%s",
3166 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3167 insn_data
[num
].name
);
3168 if (insn_data
[num
].n_alternatives
> 1)
3169 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3170 #ifdef HAVE_ATTR_length
3171 fprintf (asm_out_file
, "\t[length = %d]",
3172 get_attr_length (debug_insn
));
3174 /* Clear this so only the first assembler insn
3175 of any rtl insn will get the special comment for -dp. */
3180 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3181 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3182 corresponds to the address of the object and 0 if to the object. */
3185 get_mem_expr_from_op (op
, paddressp
)
3197 if (GET_CODE (op
) == REG
&& ORIGINAL_REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
3198 return REGNO_DECL (ORIGINAL_REGNO (op
));
3199 else if (GET_CODE (op
) != MEM
)
3202 if (MEM_EXPR (op
) != 0)
3203 return MEM_EXPR (op
);
3205 /* Otherwise we have an address, so indicate it and look at the address. */
3209 /* First check if we have a decl for the address, then look at the right side
3210 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3211 But don't allow the address to itself be indirect. */
3212 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3214 else if (GET_CODE (op
) == PLUS
3215 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3218 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3219 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3222 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3223 return inner_addressp
? 0 : expr
;
3226 /* Output operand names for assembler instructions. OPERANDS is the
3227 operand vector, OPORDER is the order to write the operands, and NOPS
3228 is the number of operands to write. */
3231 output_asm_operand_names (operands
, oporder
, nops
)
3239 for (i
= 0; i
< nops
; i
++)
3242 tree expr
= get_mem_expr_from_op (operands
[oporder
[i
]], &addressp
);
3246 fprintf (asm_out_file
, "%c%s %s",
3247 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
,
3248 addressp
? "*" : "");
3249 print_mem_expr (asm_out_file
, expr
);
3255 /* Output text from TEMPLATE to the assembler output file,
3256 obeying %-directions to substitute operands taken from
3257 the vector OPERANDS.
3259 %N (for N a digit) means print operand N in usual manner.
3260 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3261 and print the label name with no punctuation.
3262 %cN means require operand N to be a constant
3263 and print the constant expression with no punctuation.
3264 %aN means expect operand N to be a memory address
3265 (not a memory reference!) and print a reference
3267 %nN means expect operand N to be a constant
3268 and print a constant expression for minus the value
3269 of the operand, with no other punctuation. */
3272 output_asm_insn (template, operands
)
3273 const char *template;
3278 #ifdef ASSEMBLER_DIALECT
3281 int oporder
[MAX_RECOG_OPERANDS
];
3282 char opoutput
[MAX_RECOG_OPERANDS
];
3285 /* An insn may return a null string template
3286 in a case where no assembler code is needed. */
3290 memset (opoutput
, 0, sizeof opoutput
);
3292 putc ('\t', asm_out_file
);
3294 #ifdef ASM_OUTPUT_OPCODE
3295 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3302 if (flag_verbose_asm
)
3303 output_asm_operand_names (operands
, oporder
, ops
);
3304 if (flag_print_asm_name
)
3308 memset (opoutput
, 0, sizeof opoutput
);
3310 putc (c
, asm_out_file
);
3311 #ifdef ASM_OUTPUT_OPCODE
3312 while ((c
= *p
) == '\t')
3314 putc (c
, asm_out_file
);
3317 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3321 #ifdef ASSEMBLER_DIALECT
3327 output_operand_lossage ("nested assembly dialect alternatives");
3331 /* If we want the first dialect, do nothing. Otherwise, skip
3332 DIALECT_NUMBER of strings ending with '|'. */
3333 for (i
= 0; i
< dialect_number
; i
++)
3335 while (*p
&& *p
!= '}' && *p
++ != '|')
3344 output_operand_lossage ("unterminated assembly dialect alternative");
3351 /* Skip to close brace. */
3356 output_operand_lossage ("unterminated assembly dialect alternative");
3360 while (*p
++ != '}');
3364 putc (c
, asm_out_file
);
3369 putc (c
, asm_out_file
);
3375 /* %% outputs a single %. */
3379 putc (c
, asm_out_file
);
3381 /* %= outputs a number which is unique to each insn in the entire
3382 compilation. This is useful for making local labels that are
3383 referred to more than once in a given insn. */
3387 fprintf (asm_out_file
, "%d", insn_counter
);
3389 /* % followed by a letter and some digits
3390 outputs an operand in a special way depending on the letter.
3391 Letters `acln' are implemented directly.
3392 Other letters are passed to `output_operand' so that
3393 the PRINT_OPERAND macro can define them. */
3394 else if (ISALPHA (*p
))
3400 output_operand_lossage ("operand number missing after %%-letter");
3401 else if (this_is_asm_operands
3402 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3403 output_operand_lossage ("operand number out of range");
3404 else if (letter
== 'l')
3405 output_asm_label (operands
[c
]);
3406 else if (letter
== 'a')
3407 output_address (operands
[c
]);
3408 else if (letter
== 'c')
3410 if (CONSTANT_ADDRESS_P (operands
[c
]))
3411 output_addr_const (asm_out_file
, operands
[c
]);
3413 output_operand (operands
[c
], 'c');
3415 else if (letter
== 'n')
3417 if (GET_CODE (operands
[c
]) == CONST_INT
)
3418 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3419 - INTVAL (operands
[c
]));
3422 putc ('-', asm_out_file
);
3423 output_addr_const (asm_out_file
, operands
[c
]);
3427 output_operand (operands
[c
], letter
);
3433 while (ISDIGIT (c
= *p
))
3436 /* % followed by a digit outputs an operand the default way. */
3437 else if (ISDIGIT (*p
))
3440 if (this_is_asm_operands
3441 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3442 output_operand_lossage ("operand number out of range");
3444 output_operand (operands
[c
], 0);
3450 while (ISDIGIT (c
= *p
))
3453 /* % followed by punctuation: output something for that
3454 punctuation character alone, with no operand.
3455 The PRINT_OPERAND macro decides what is actually done. */
3456 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3457 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3458 output_operand (NULL_RTX
, *p
++);
3461 output_operand_lossage ("invalid %%-code");
3465 putc (c
, asm_out_file
);
3468 /* Write out the variable names for operands, if we know them. */
3469 if (flag_verbose_asm
)
3470 output_asm_operand_names (operands
, oporder
, ops
);
3471 if (flag_print_asm_name
)
3474 putc ('\n', asm_out_file
);
3477 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3480 output_asm_label (x
)
3485 if (GET_CODE (x
) == LABEL_REF
)
3487 if (GET_CODE (x
) == CODE_LABEL
3488 || (GET_CODE (x
) == NOTE
3489 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3490 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3492 output_operand_lossage ("`%%l' operand isn't a label");
3494 assemble_name (asm_out_file
, buf
);
3497 /* Print operand X using machine-dependent assembler syntax.
3498 The macro PRINT_OPERAND is defined just to control this function.
3499 CODE is a non-digit that preceded the operand-number in the % spec,
3500 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3501 between the % and the digits.
3502 When CODE is a non-letter, X is 0.
3504 The meanings of the letters are machine-dependent and controlled
3505 by PRINT_OPERAND. */
3508 output_operand (x
, code
)
3510 int code ATTRIBUTE_UNUSED
;
3512 if (x
&& GET_CODE (x
) == SUBREG
)
3513 x
= alter_subreg (&x
);
3515 /* If X is a pseudo-register, abort now rather than writing trash to the
3518 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3521 PRINT_OPERAND (asm_out_file
, x
, code
);
3524 /* Print a memory reference operand for address X
3525 using machine-dependent assembler syntax.
3526 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3532 walk_alter_subreg (&x
);
3533 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3536 /* Print an integer constant expression in assembler syntax.
3537 Addition and subtraction are the only arithmetic
3538 that may appear in these expressions. */
3541 output_addr_const (file
, x
)
3548 switch (GET_CODE (x
))
3555 #ifdef ASM_OUTPUT_SYMBOL_REF
3556 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3558 assemble_name (file
, XSTR (x
, 0));
3566 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3567 #ifdef ASM_OUTPUT_LABEL_REF
3568 ASM_OUTPUT_LABEL_REF (file
, buf
);
3570 assemble_name (file
, buf
);
3575 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3579 /* This used to output parentheses around the expression,
3580 but that does not work on the 386 (either ATT or BSD assembler). */
3581 output_addr_const (file
, XEXP (x
, 0));
3585 if (GET_MODE (x
) == VOIDmode
)
3587 /* We can use %d if the number is one word and positive. */
3588 if (CONST_DOUBLE_HIGH (x
))
3589 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3590 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3591 else if (CONST_DOUBLE_LOW (x
) < 0)
3592 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3594 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3597 /* We can't handle floating point constants;
3598 PRINT_OPERAND must handle them. */
3599 output_operand_lossage ("floating constant misused");
3603 /* Some assemblers need integer constants to appear last (eg masm). */
3604 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3606 output_addr_const (file
, XEXP (x
, 1));
3607 if (INTVAL (XEXP (x
, 0)) >= 0)
3608 fprintf (file
, "+");
3609 output_addr_const (file
, XEXP (x
, 0));
3613 output_addr_const (file
, XEXP (x
, 0));
3614 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3615 || INTVAL (XEXP (x
, 1)) >= 0)
3616 fprintf (file
, "+");
3617 output_addr_const (file
, XEXP (x
, 1));
3622 /* Avoid outputting things like x-x or x+5-x,
3623 since some assemblers can't handle that. */
3624 x
= simplify_subtraction (x
);
3625 if (GET_CODE (x
) != MINUS
)
3628 output_addr_const (file
, XEXP (x
, 0));
3629 fprintf (file
, "-");
3630 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3631 || GET_CODE (XEXP (x
, 1)) == PC
3632 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3633 output_addr_const (file
, XEXP (x
, 1));
3636 fputs (targetm
.asm_out
.open_paren
, file
);
3637 output_addr_const (file
, XEXP (x
, 1));
3638 fputs (targetm
.asm_out
.close_paren
, file
);
3645 output_addr_const (file
, XEXP (x
, 0));
3649 #ifdef OUTPUT_ADDR_CONST_EXTRA
3650 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3655 output_operand_lossage ("invalid expression as operand");
3659 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3660 %R prints the value of REGISTER_PREFIX.
3661 %L prints the value of LOCAL_LABEL_PREFIX.
3662 %U prints the value of USER_LABEL_PREFIX.
3663 %I prints the value of IMMEDIATE_PREFIX.
3664 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3665 Also supported are %d, %x, %s, %e, %f, %g and %%.
3667 We handle alternate assembler dialects here, just like output_asm_insn. */
3670 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3675 VA_OPEN (argptr
, p
);
3676 VA_FIXEDARG (argptr
, FILE *, file
);
3677 VA_FIXEDARG (argptr
, const char *, p
);
3684 #ifdef ASSEMBLER_DIALECT
3689 /* If we want the first dialect, do nothing. Otherwise, skip
3690 DIALECT_NUMBER of strings ending with '|'. */
3691 for (i
= 0; i
< dialect_number
; i
++)
3693 while (*p
&& *p
++ != '|')
3703 /* Skip to close brace. */
3704 while (*p
&& *p
++ != '}')
3715 while (ISDIGIT (c
) || c
== '.')
3723 fprintf (file
, "%%");
3726 case 'd': case 'i': case 'u':
3727 case 'x': case 'p': case 'X':
3731 fprintf (file
, buf
, va_arg (argptr
, int));
3735 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3736 but we do not check for those cases. It means that the value
3737 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3739 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3741 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3751 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3758 fprintf (file
, buf
, va_arg (argptr
, long));
3766 fprintf (file
, buf
, va_arg (argptr
, double));
3772 fprintf (file
, buf
, va_arg (argptr
, char *));
3776 #ifdef ASM_OUTPUT_OPCODE
3777 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3782 #ifdef REGISTER_PREFIX
3783 fprintf (file
, "%s", REGISTER_PREFIX
);
3788 #ifdef IMMEDIATE_PREFIX
3789 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3794 #ifdef LOCAL_LABEL_PREFIX
3795 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3800 fputs (user_label_prefix
, file
);
3803 #ifdef ASM_FPRINTF_EXTENSIONS
3804 /* Upper case letters are reserved for general use by asm_fprintf
3805 and so are not available to target specific code. In order to
3806 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3807 they are defined here. As they get turned into real extensions
3808 to asm_fprintf they should be removed from this list. */
3809 case 'A': case 'B': case 'C': case 'D': case 'E':
3810 case 'F': case 'G': case 'H': case 'J': case 'K':
3811 case 'M': case 'N': case 'P': case 'Q': case 'S':
3812 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3815 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3828 /* Split up a CONST_DOUBLE or integer constant rtx
3829 into two rtx's for single words,
3830 storing in *FIRST the word that comes first in memory in the target
3831 and in *SECOND the other. */
3834 split_double (value
, first
, second
)
3836 rtx
*first
, *second
;
3838 if (GET_CODE (value
) == CONST_INT
)
3840 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3842 /* In this case the CONST_INT holds both target words.
3843 Extract the bits from it into two word-sized pieces.
3844 Sign extend each half to HOST_WIDE_INT. */
3845 unsigned HOST_WIDE_INT low
, high
;
3846 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3848 /* Set sign_bit to the most significant bit of a word. */
3850 sign_bit
<<= BITS_PER_WORD
- 1;
3852 /* Set mask so that all bits of the word are set. We could
3853 have used 1 << BITS_PER_WORD instead of basing the
3854 calculation on sign_bit. However, on machines where
3855 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3856 compiler warning, even though the code would never be
3858 mask
= sign_bit
<< 1;
3861 /* Set sign_extend as any remaining bits. */
3862 sign_extend
= ~mask
;
3864 /* Pick the lower word and sign-extend it. */
3865 low
= INTVAL (value
);
3870 /* Pick the higher word, shifted to the least significant
3871 bits, and sign-extend it. */
3872 high
= INTVAL (value
);
3873 high
>>= BITS_PER_WORD
- 1;
3876 if (high
& sign_bit
)
3877 high
|= sign_extend
;
3879 /* Store the words in the target machine order. */
3880 if (WORDS_BIG_ENDIAN
)
3882 *first
= GEN_INT (high
);
3883 *second
= GEN_INT (low
);
3887 *first
= GEN_INT (low
);
3888 *second
= GEN_INT (high
);
3893 /* The rule for using CONST_INT for a wider mode
3894 is that we regard the value as signed.
3895 So sign-extend it. */
3896 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3897 if (WORDS_BIG_ENDIAN
)
3909 else if (GET_CODE (value
) != CONST_DOUBLE
)
3911 if (WORDS_BIG_ENDIAN
)
3913 *first
= const0_rtx
;
3919 *second
= const0_rtx
;
3922 else if (GET_MODE (value
) == VOIDmode
3923 /* This is the old way we did CONST_DOUBLE integers. */
3924 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3926 /* In an integer, the words are defined as most and least significant.
3927 So order them by the target's convention. */
3928 if (WORDS_BIG_ENDIAN
)
3930 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3931 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3935 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3936 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3943 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3945 /* Note, this converts the REAL_VALUE_TYPE to the target's
3946 format, splits up the floating point double and outputs
3947 exactly 32 bits of it into each of l[0] and l[1] --
3948 not necessarily BITS_PER_WORD bits. */
3949 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3951 /* If 32 bits is an entire word for the target, but not for the host,
3952 then sign-extend on the host so that the number will look the same
3953 way on the host that it would on the target. See for instance
3954 simplify_unary_operation. The #if is needed to avoid compiler
3957 #if HOST_BITS_PER_LONG > 32
3958 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3960 if (l
[0] & ((long) 1 << 31))
3961 l
[0] |= ((long) (-1) << 32);
3962 if (l
[1] & ((long) 1 << 31))
3963 l
[1] |= ((long) (-1) << 32);
3967 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3968 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3972 /* Return nonzero if this function has no function calls. */
3980 if (current_function_profile
|| profile_arc_flag
)
3983 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3985 if (GET_CODE (insn
) == CALL_INSN
3986 && ! SIBLING_CALL_P (insn
))
3988 if (GET_CODE (insn
) == INSN
3989 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3990 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3991 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3994 for (link
= current_function_epilogue_delay_list
;
3996 link
= XEXP (link
, 1))
3998 insn
= XEXP (link
, 0);
4000 if (GET_CODE (insn
) == CALL_INSN
4001 && ! SIBLING_CALL_P (insn
))
4003 if (GET_CODE (insn
) == INSN
4004 && GET_CODE (PATTERN (insn
)) == SEQUENCE
4005 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
4006 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4013 /* Return 1 if branch is an forward branch.
4014 Uses insn_shuid array, so it works only in the final pass. May be used by
4015 output templates to customary add branch prediction hints.
4018 final_forward_branch_p (insn
)
4021 int insn_id
, label_id
;
4024 insn_id
= INSN_SHUID (insn
);
4025 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4026 /* We've hit some insns that does not have id information available. */
4027 if (!insn_id
|| !label_id
)
4029 return insn_id
< label_id
;
4032 /* On some machines, a function with no call insns
4033 can run faster if it doesn't create its own register window.
4034 When output, the leaf function should use only the "output"
4035 registers. Ordinarily, the function would be compiled to use
4036 the "input" registers to find its arguments; it is a candidate
4037 for leaf treatment if it uses only the "input" registers.
4038 Leaf function treatment means renumbering so the function
4039 uses the "output" registers instead. */
4041 #ifdef LEAF_REGISTERS
4043 /* Return 1 if this function uses only the registers that can be
4044 safely renumbered. */
4047 only_leaf_regs_used ()
4050 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4052 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4053 if ((regs_ever_live
[i
] || global_regs
[i
])
4054 && ! permitted_reg_in_leaf_functions
[i
])
4057 if (current_function_uses_pic_offset_table
4058 && pic_offset_table_rtx
!= 0
4059 && GET_CODE (pic_offset_table_rtx
) == REG
4060 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4066 /* Scan all instructions and renumber all registers into those
4067 available in leaf functions. */
4070 leaf_renumber_regs (first
)
4075 /* Renumber only the actual patterns.
4076 The reg-notes can contain frame pointer refs,
4077 and renumbering them could crash, and should not be needed. */
4078 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4080 leaf_renumber_regs_insn (PATTERN (insn
));
4081 for (insn
= current_function_epilogue_delay_list
;
4083 insn
= XEXP (insn
, 1))
4084 if (INSN_P (XEXP (insn
, 0)))
4085 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4088 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4089 available in leaf functions. */
4092 leaf_renumber_regs_insn (in_rtx
)
4096 const char *format_ptr
;
4101 /* Renumber all input-registers into output-registers.
4102 renumbered_regs would be 1 for an output-register;
4105 if (GET_CODE (in_rtx
) == REG
)
4109 /* Don't renumber the same reg twice. */
4113 newreg
= REGNO (in_rtx
);
4114 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4115 to reach here as part of a REG_NOTE. */
4116 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4121 newreg
= LEAF_REG_REMAP (newreg
);
4124 regs_ever_live
[REGNO (in_rtx
)] = 0;
4125 regs_ever_live
[newreg
] = 1;
4126 REGNO (in_rtx
) = newreg
;
4130 if (INSN_P (in_rtx
))
4132 /* Inside a SEQUENCE, we find insns.
4133 Renumber just the patterns of these insns,
4134 just as we do for the top-level insns. */
4135 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4139 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4141 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4142 switch (*format_ptr
++)
4145 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4149 if (NULL
!= XVEC (in_rtx
, i
))
4151 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4152 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));