PR libstdc++/3584
[official-gcc.git] / gcc / caller-save.c
blobb7e3ceac7b5da8ccea592cadfe9a0cade857b2fc
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "insn-config.h"
26 #include "flags.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "basic-block.h"
31 #include "reload.h"
32 #include "function.h"
33 #include "expr.h"
34 #include "toplev.h"
35 #include "tm_p.h"
37 #ifndef MAX_MOVE_MAX
38 #define MAX_MOVE_MAX MOVE_MAX
39 #endif
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
43 #endif
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
56 if needed. */
58 static rtx
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
65 be recognized. */
67 static int
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
69 static int
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
81 insn. */
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
85 instruction. */
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
92 HARD_REG_SET *,
93 enum machine_mode *));
94 static int insert_restore PARAMS ((struct insn_chain *, int, int,
95 int, enum machine_mode *));
96 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
97 int, rtx));
98 static void add_stored_regs PARAMS ((rtx, rtx, void *));
100 /* Initialize for caller-save.
102 Look at all the hard registers that are used by a call and for which
103 regclass.c has not already excluded from being used across a call.
105 Ensure that we can find a mode to save the register and that there is a
106 simple insn to save and restore the register. This latter check avoids
107 problems that would occur if we tried to save the MQ register of some
108 machines directly into memory. */
110 void
111 init_caller_save ()
113 rtx addr_reg;
114 int offset;
115 rtx address;
116 int i, j;
117 enum machine_mode mode;
118 rtx savepat, restpat;
119 rtx test_reg, test_mem;
120 rtx saveinsn, restinsn;
122 /* First find all the registers that we need to deal with and all
123 the modes that they can have. If we can't find a mode to use,
124 we can't have the register live over calls. */
126 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
128 if (call_used_regs[i] && ! call_fixed_regs[i])
130 for (j = 1; j <= MOVE_MAX_WORDS; j++)
132 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
133 VOIDmode);
134 if (regno_save_mode[i][j] == VOIDmode && j == 1)
136 call_fixed_regs[i] = 1;
137 SET_HARD_REG_BIT (call_fixed_reg_set, i);
141 else
142 regno_save_mode[i][1] = VOIDmode;
145 /* The following code tries to approximate the conditions under which
146 we can easily save and restore a register without scratch registers or
147 other complexities. It will usually work, except under conditions where
148 the validity of an insn operand is dependent on the address offset.
149 No such cases are currently known.
151 We first find a typical offset from some BASE_REG_CLASS register.
152 This address is chosen by finding the first register in the class
153 and by finding the smallest power of two that is a valid offset from
154 that register in every mode we will use to save registers. */
156 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
157 if (TEST_HARD_REG_BIT
158 (reg_class_contents
159 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
160 break;
162 if (i == FIRST_PSEUDO_REGISTER)
163 abort ();
165 addr_reg = gen_rtx_REG (Pmode, i);
167 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
169 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
172 if (regno_save_mode[i][1] != VOIDmode
173 && ! strict_memory_address_p (regno_save_mode[i][1], address))
174 break;
176 if (i == FIRST_PSEUDO_REGISTER)
177 break;
180 /* If we didn't find a valid address, we must use register indirect. */
181 if (offset == 0)
182 address = addr_reg;
184 /* Next we try to form an insn to save and restore the register. We
185 see if such an insn is recognized and meets its constraints.
187 To avoid lots of unnecessary RTL allocation, we construct all the RTL
188 once, then modify the memory and register operands in-place. */
190 test_reg = gen_rtx_REG (VOIDmode, 0);
191 test_mem = gen_rtx_MEM (VOIDmode, address);
192 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
193 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
195 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
196 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
198 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
199 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
200 if (HARD_REGNO_MODE_OK (i, mode))
202 int ok;
204 /* Update the register number and modes of the register
205 and memory operand. */
206 REGNO (test_reg) = i;
207 PUT_MODE (test_reg, mode);
208 PUT_MODE (test_mem, mode);
210 /* Force re-recognition of the modified insns. */
211 INSN_CODE (saveinsn) = -1;
212 INSN_CODE (restinsn) = -1;
214 reg_save_code[i][mode] = recog_memoized (saveinsn);
215 reg_restore_code[i][mode] = recog_memoized (restinsn);
217 /* Now extract both insns and see if we can meet their
218 constraints. */
219 ok = (reg_save_code[i][mode] != -1
220 && reg_restore_code[i][mode] != -1);
221 if (ok)
223 extract_insn (saveinsn);
224 ok = constrain_operands (1);
225 extract_insn (restinsn);
226 ok &= constrain_operands (1);
229 if (! ok)
231 reg_save_code[i][mode] = -1;
232 reg_restore_code[i][mode] = -1;
235 else
237 reg_save_code[i][mode] = -1;
238 reg_restore_code[i][mode] = -1;
241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
242 for (j = 1; j <= MOVE_MAX_WORDS; j++)
243 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
245 regno_save_mode[i][j] = VOIDmode;
246 if (j == 1)
248 call_fixed_regs[i] = 1;
249 SET_HARD_REG_BIT (call_fixed_reg_set, i);
254 /* Initialize save areas by showing that we haven't allocated any yet. */
256 void
257 init_save_areas ()
259 int i, j;
261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
262 for (j = 1; j <= MOVE_MAX_WORDS; j++)
263 regno_save_mem[i][j] = 0;
266 /* Allocate save areas for any hard registers that might need saving.
267 We take a conservative approach here and look for call-clobbered hard
268 registers that are assigned to pseudos that cross calls. This may
269 overestimate slightly (especially if some of these registers are later
270 used as spill registers), but it should not be significant.
272 Future work:
274 In the fallback case we should iterate backwards across all possible
275 modes for the save, choosing the largest available one instead of
276 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
278 We do not try to use "move multiple" instructions that exist
279 on some machines (such as the 68k moveml). It could be a win to try
280 and use them when possible. The hard part is doing it in a way that is
281 machine independent since they might be saving non-consecutive
282 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
284 void
285 setup_save_areas ()
287 int i, j, k;
288 unsigned int r;
289 HARD_REG_SET hard_regs_used;
291 /* Allocate space in the save area for the largest multi-register
292 pseudos first, then work backwards to single register
293 pseudos. */
295 /* Find and record all call-used hard-registers in this function. */
296 CLEAR_HARD_REG_SET (hard_regs_used);
297 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
298 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
300 unsigned int regno = reg_renumber[i];
301 unsigned int endregno
302 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
304 for (r = regno; r < endregno; r++)
305 if (call_used_regs[r])
306 SET_HARD_REG_BIT (hard_regs_used, r);
309 /* Now run through all the call-used hard-registers and allocate
310 space for them in the caller-save area. Try to allocate space
311 in a manner which allows multi-register saves/restores to be done. */
313 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
314 for (j = MOVE_MAX_WORDS; j > 0; j--)
316 int do_save = 1;
318 /* If no mode exists for this size, try another. Also break out
319 if we have already saved this hard register. */
320 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
321 continue;
323 /* See if any register in this group has been saved. */
324 for (k = 0; k < j; k++)
325 if (regno_save_mem[i + k][1])
327 do_save = 0;
328 break;
330 if (! do_save)
331 continue;
333 for (k = 0; k < j; k++)
334 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
336 do_save = 0;
337 break;
339 if (! do_save)
340 continue;
342 /* We have found an acceptable mode to store in. */
343 regno_save_mem[i][j]
344 = assign_stack_local (regno_save_mode[i][j],
345 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
347 /* Setup single word save area just in case... */
348 for (k = 0; k < j; k++)
349 /* This should not depend on WORDS_BIG_ENDIAN.
350 The order of words in regs is the same as in memory. */
351 regno_save_mem[i + k][1]
352 = adjust_address_nv (regno_save_mem[i][j],
353 regno_save_mode[i + k][1],
354 k * UNITS_PER_WORD);
357 /* Now loop again and set the alias set of any save areas we made to
358 the alias set used to represent frame objects. */
359 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
360 for (j = MOVE_MAX_WORDS; j > 0; j--)
361 if (regno_save_mem[i][j] != 0)
362 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
365 /* Find the places where hard regs are live across calls and save them. */
367 void
368 save_call_clobbered_regs ()
370 struct insn_chain *chain, *next;
371 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
373 CLEAR_HARD_REG_SET (hard_regs_saved);
374 n_regs_saved = 0;
376 for (chain = reload_insn_chain; chain != 0; chain = next)
378 rtx insn = chain->insn;
379 enum rtx_code code = GET_CODE (insn);
381 next = chain->next;
383 if (chain->is_caller_save_insn)
384 abort ();
386 if (GET_RTX_CLASS (code) == 'i')
388 /* If some registers have been saved, see if INSN references
389 any of them. We must restore them before the insn if so. */
391 if (n_regs_saved)
393 int regno;
395 if (code == JUMP_INSN)
396 /* Restore all registers if this is a JUMP_INSN. */
397 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
398 else
400 CLEAR_HARD_REG_SET (referenced_regs);
401 mark_referenced_regs (PATTERN (insn));
402 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
405 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
406 if (TEST_HARD_REG_BIT (referenced_regs, regno))
407 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
410 if (code == CALL_INSN)
412 int regno;
413 HARD_REG_SET hard_regs_to_save;
415 /* Use the register life information in CHAIN to compute which
416 regs are live during the call. */
417 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
418 &chain->live_throughout);
419 /* Save hard registers always in the widest mode available. */
420 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
421 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
422 save_mode [regno] = regno_save_mode [regno][1];
423 else
424 save_mode [regno] = VOIDmode;
426 /* Look through all live pseudos, mark their hard registers
427 and choose proper mode for saving. */
428 EXECUTE_IF_SET_IN_REG_SET
429 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
431 int r = reg_renumber[regno];
432 int nregs;
434 if (r >= 0)
436 enum machine_mode mode;
438 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
439 mode = HARD_REGNO_CALLER_SAVE_MODE
440 (r, nregs, PSEUDO_REGNO_MODE (regno));
441 if (GET_MODE_BITSIZE (mode)
442 > GET_MODE_BITSIZE (save_mode[r]))
443 save_mode[r] = mode;
444 while (nregs-- > 0)
445 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
447 else
448 abort ();
451 /* Record all registers set in this call insn. These don't need
452 to be saved. N.B. the call insn might set a subreg of a
453 multi-hard-reg pseudo; then the pseudo is considered live
454 during the call, but the subreg that is set isn't. */
455 CLEAR_HARD_REG_SET (this_insn_sets);
456 note_stores (PATTERN (insn), mark_set_regs, NULL);
458 /* Compute which hard regs must be saved before this call. */
459 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
460 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
461 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
462 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
464 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
465 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
466 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
468 /* Must recompute n_regs_saved. */
469 n_regs_saved = 0;
470 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
471 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
472 n_regs_saved++;
476 if (chain->next == 0 || chain->next->block > chain->block)
478 int regno;
479 /* At the end of the basic block, we must restore any registers that
480 remain saved. If the last insn in the block is a JUMP_INSN, put
481 the restore before the insn, otherwise, put it after the insn. */
483 if (n_regs_saved)
484 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
485 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
486 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
487 regno, MOVE_MAX_WORDS, save_mode);
492 /* Here from note_stores when an insn stores a value in a register.
493 Set the proper bit or bits in this_insn_sets. All pseudos that have
494 been assigned hard regs have had their register number changed already,
495 so we can ignore pseudos. */
496 static void
497 mark_set_regs (reg, setter, data)
498 rtx reg;
499 rtx setter ATTRIBUTE_UNUSED;
500 void *data ATTRIBUTE_UNUSED;
502 int regno, endregno, i;
503 enum machine_mode mode = GET_MODE (reg);
505 if (GET_CODE (reg) == SUBREG)
507 rtx inner = SUBREG_REG (reg);
508 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
509 return;
511 regno = subreg_hard_regno (reg, 1);
513 else if (GET_CODE (reg) == REG
514 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
515 regno = REGNO (reg);
516 else
517 return;
519 endregno = regno + HARD_REGNO_NREGS (regno, mode);
521 for (i = regno; i < endregno; i++)
522 SET_HARD_REG_BIT (this_insn_sets, i);
525 /* Here from note_stores when an insn stores a value in a register.
526 Set the proper bit or bits in the passed regset. All pseudos that have
527 been assigned hard regs have had their register number changed already,
528 so we can ignore pseudos. */
529 static void
530 add_stored_regs (reg, setter, data)
531 rtx reg;
532 rtx setter;
533 void *data;
535 int regno, endregno, i;
536 enum machine_mode mode = GET_MODE (reg);
537 int offset = 0;
539 if (GET_CODE (setter) == CLOBBER)
540 return;
542 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
544 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
545 GET_MODE (SUBREG_REG (reg)),
546 SUBREG_BYTE (reg),
547 GET_MODE (reg));
548 reg = SUBREG_REG (reg);
551 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
552 return;
554 regno = REGNO (reg) + offset;
555 endregno = regno + HARD_REGNO_NREGS (regno, mode);
557 for (i = regno; i < endregno; i++)
558 SET_REGNO_REG_SET ((regset) data, i);
561 /* Walk X and record all referenced registers in REFERENCED_REGS. */
562 static void
563 mark_referenced_regs (x)
564 rtx x;
566 enum rtx_code code = GET_CODE (x);
567 const char *fmt;
568 int i, j;
570 if (code == SET)
571 mark_referenced_regs (SET_SRC (x));
572 if (code == SET || code == CLOBBER)
574 x = SET_DEST (x);
575 code = GET_CODE (x);
576 if (code == REG || code == PC || code == CC0
577 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
578 /* If we're setting only part of a multi-word register,
579 we shall mark it as referenced, because the words
580 that are not being set should be restored. */
581 && ((GET_MODE_SIZE (GET_MODE (x))
582 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
583 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
584 <= UNITS_PER_WORD))))
585 return;
587 if (code == MEM || code == SUBREG)
589 x = XEXP (x, 0);
590 code = GET_CODE (x);
593 if (code == REG)
595 int regno = REGNO (x);
596 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
597 : reg_renumber[regno]);
599 if (hardregno >= 0)
601 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
602 while (nregs-- > 0)
603 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
605 /* If this is a pseudo that did not get a hard register, scan its
606 memory location, since it might involve the use of another
607 register, which might be saved. */
608 else if (reg_equiv_mem[regno] != 0)
609 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
610 else if (reg_equiv_address[regno] != 0)
611 mark_referenced_regs (reg_equiv_address[regno]);
612 return;
615 fmt = GET_RTX_FORMAT (code);
616 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
618 if (fmt[i] == 'e')
619 mark_referenced_regs (XEXP (x, i));
620 else if (fmt[i] == 'E')
621 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
622 mark_referenced_regs (XVECEXP (x, i, j));
626 /* Insert a sequence of insns to restore. Place these insns in front of
627 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
628 the maximum number of registers which should be restored during this call.
629 It should never be less than 1 since we only work with entire registers.
631 Note that we have verified in init_caller_save that we can do this
632 with a simple SET, so use it. Set INSN_CODE to what we save there
633 since the address might not be valid so the insn might not be recognized.
634 These insns will be reloaded and have register elimination done by
635 find_reload, so we need not worry about that here.
637 Return the extra number of registers saved. */
639 static int
640 insert_restore (chain, before_p, regno, maxrestore, save_mode)
641 struct insn_chain *chain;
642 int before_p;
643 int regno;
644 int maxrestore;
645 enum machine_mode *save_mode;
647 int i, k;
648 rtx pat = NULL_RTX;
649 int code;
650 unsigned int numregs = 0;
651 struct insn_chain *new;
652 rtx mem;
654 /* A common failure mode if register status is not correct in the RTL
655 is for this routine to be called with a REGNO we didn't expect to
656 save. That will cause us to write an insn with a (nil) SET_DEST
657 or SET_SRC. Instead of doing so and causing a crash later, check
658 for this common case and abort here instead. This will remove one
659 step in debugging such problems. */
661 if (regno_save_mem[regno][1] == 0)
662 abort ();
664 /* Get the pattern to emit and update our status.
666 See if we can restore `maxrestore' registers at once. Work
667 backwards to the single register case. */
668 for (i = maxrestore; i > 0; i--)
670 int j;
671 int ok = 1;
673 if (regno_save_mem[regno][i] == 0)
674 continue;
676 for (j = 0; j < i; j++)
677 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
679 ok = 0;
680 break;
682 /* Must do this one restore at a time */
683 if (! ok)
684 continue;
686 numregs = i;
687 break;
690 mem = regno_save_mem [regno][numregs];
691 if (save_mode [regno] != VOIDmode
692 && save_mode [regno] != GET_MODE (mem)
693 && numregs == (unsigned int) HARD_REGNO_NREGS (regno, save_mode [regno]))
694 mem = adjust_address (mem, save_mode[regno], 0);
695 pat = gen_rtx_SET (VOIDmode,
696 gen_rtx_REG (GET_MODE (mem),
697 regno), mem);
698 code = reg_restore_code[regno][GET_MODE (mem)];
699 new = insert_one_insn (chain, before_p, code, pat);
701 /* Clear status for all registers we restored. */
702 for (k = 0; k < i; k++)
704 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
705 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
706 n_regs_saved--;
709 /* Tell our callers how many extra registers we saved/restored */
710 return numregs - 1;
713 /* Like insert_restore above, but save registers instead. */
715 static int
716 insert_save (chain, before_p, regno, to_save, save_mode)
717 struct insn_chain *chain;
718 int before_p;
719 int regno;
720 HARD_REG_SET *to_save;
721 enum machine_mode *save_mode;
723 int i;
724 unsigned int k;
725 rtx pat = NULL_RTX;
726 int code;
727 unsigned int numregs = 0;
728 struct insn_chain *new;
729 rtx mem;
731 /* A common failure mode if register status is not correct in the RTL
732 is for this routine to be called with a REGNO we didn't expect to
733 save. That will cause us to write an insn with a (nil) SET_DEST
734 or SET_SRC. Instead of doing so and causing a crash later, check
735 for this common case and abort here instead. This will remove one
736 step in debugging such problems. */
738 if (regno_save_mem[regno][1] == 0)
739 abort ();
741 /* Get the pattern to emit and update our status.
743 See if we can save several registers with a single instruction.
744 Work backwards to the single register case. */
745 for (i = MOVE_MAX_WORDS; i > 0; i--)
747 int j;
748 int ok = 1;
749 if (regno_save_mem[regno][i] == 0)
750 continue;
752 for (j = 0; j < i; j++)
753 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
755 ok = 0;
756 break;
758 /* Must do this one save at a time */
759 if (! ok)
760 continue;
762 numregs = i;
763 break;
766 mem = regno_save_mem [regno][numregs];
767 if (save_mode [regno] != VOIDmode
768 && save_mode [regno] != GET_MODE (mem)
769 && numregs == (unsigned int) HARD_REGNO_NREGS (regno, save_mode [regno]))
770 mem = adjust_address (mem, save_mode[regno], 0);
771 pat = gen_rtx_SET (VOIDmode, mem,
772 gen_rtx_REG (GET_MODE (mem),
773 regno));
774 code = reg_save_code[regno][GET_MODE (mem)];
775 new = insert_one_insn (chain, before_p, code, pat);
777 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
778 for (k = 0; k < numregs; k++)
780 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
781 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
782 n_regs_saved++;
785 /* Tell our callers how many extra registers we saved/restored */
786 return numregs - 1;
789 /* Emit a new caller-save insn and set the code. */
790 static struct insn_chain *
791 insert_one_insn (chain, before_p, code, pat)
792 struct insn_chain *chain;
793 int before_p;
794 int code;
795 rtx pat;
797 rtx insn = chain->insn;
798 struct insn_chain *new;
800 #ifdef HAVE_cc0
801 /* If INSN references CC0, put our insns in front of the insn that sets
802 CC0. This is always safe, since the only way we could be passed an
803 insn that references CC0 is for a restore, and doing a restore earlier
804 isn't a problem. We do, however, assume here that CALL_INSNs don't
805 reference CC0. Guard against non-INSN's like CODE_LABEL. */
807 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
808 && before_p
809 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
810 chain = chain->prev, insn = chain->insn;
811 #endif
813 new = new_insn_chain ();
814 if (before_p)
816 rtx link;
818 new->prev = chain->prev;
819 if (new->prev != 0)
820 new->prev->next = new;
821 else
822 reload_insn_chain = new;
824 chain->prev = new;
825 new->next = chain;
826 new->insn = emit_insn_before (pat, insn);
827 /* ??? It would be nice if we could exclude the already / still saved
828 registers from the live sets. */
829 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
830 /* Registers that die in CHAIN->INSN still live in the new insn. */
831 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
833 if (REG_NOTE_KIND (link) == REG_DEAD)
835 rtx reg = XEXP (link, 0);
836 int regno, i;
838 if (GET_CODE (reg) != REG)
839 abort ();
841 regno = REGNO (reg);
842 if (regno >= FIRST_PSEUDO_REGISTER)
843 regno = reg_renumber[regno];
844 if (regno < 0)
845 continue;
846 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
847 i >= 0; i--)
848 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
851 CLEAR_REG_SET (&new->dead_or_set);
852 if (chain->insn == BLOCK_HEAD (chain->block))
853 BLOCK_HEAD (chain->block) = new->insn;
855 else
857 new->next = chain->next;
858 if (new->next != 0)
859 new->next->prev = new;
860 chain->next = new;
861 new->prev = chain;
862 new->insn = emit_insn_after (pat, insn);
863 /* ??? It would be nice if we could exclude the already / still saved
864 registers from the live sets, and observe REG_UNUSED notes. */
865 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
866 /* Registers that are set in CHAIN->INSN live in the new insn.
867 (Unless there is a REG_UNUSED note for them, but we don't
868 look for them here.) */
869 note_stores (PATTERN (chain->insn), add_stored_regs,
870 &new->live_throughout);
871 CLEAR_REG_SET (&new->dead_or_set);
872 if (chain->insn == BLOCK_END (chain->block))
873 BLOCK_END (chain->block) = new->insn;
875 new->block = chain->block;
876 new->is_caller_save_insn = 1;
878 INSN_CODE (new->insn) = code;
879 return new;