1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "insn-config.h"
32 #include "conditions.h"
33 #include "insn-attr.h"
45 #include "target-def.h"
49 /* Usable when we have an amount to add or subtract, and want the
50 optimal size of the insn. */
51 #define ADDITIVE_SIZE_MODIFIER(size) \
52 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
54 #define ASSERT_PLT_UNSPEC(x) \
57 if (XINT (x, 1) != CRIS_UNSPEC_PLT \
58 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
59 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
63 #define LOSE_AND_RETURN(msgid, x) \
66 cris_operand_lossage (msgid, x); \
70 enum cris_retinsn_type
71 { CRIS_RETINSN_UNKNOWN
= 0, CRIS_RETINSN_RET
, CRIS_RETINSN_JUMP
};
73 /* Per-function machine data. */
74 struct machine_function
GTY(())
76 int needs_return_address_on_stack
;
78 /* This is the number of registers we save in the prologue due to
82 enum cris_retinsn_type return_type
;
85 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
87 static char cris_output_insn_is_bound
= 0;
89 /* This one suppresses printing out the "rPIC+" in
90 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
91 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
92 just the "sym:GOTOFF" part. */
93 static int cris_pic_sympart_only
= 0;
95 /* In code for output macros, this is how we know whether e.g. constant
96 goes in code or in a static initializer. */
97 static int in_code
= 0;
99 /* Fix for reg_overlap_mentioned_p. */
100 static int cris_reg_overlap_mentioned_p (rtx
, rtx
);
102 static void cris_print_base (rtx
, FILE *);
104 static void cris_print_index (rtx
, FILE *);
106 static void cris_output_addr_const (FILE *, rtx
);
108 static struct machine_function
* cris_init_machine_status (void);
110 static rtx
cris_struct_value_rtx (tree
, int);
112 static void cris_setup_incoming_varargs (CUMULATIVE_ARGS
*, enum machine_mode
,
113 tree type
, int *, int);
115 static int cris_initial_frame_pointer_offset (void);
117 static int saved_regs_mentioned (rtx
);
119 static void cris_operand_lossage (const char *, rtx
);
121 static int cris_reg_saved_in_regsave_area (unsigned int, bool);
123 static void cris_asm_output_mi_thunk
124 (FILE *, tree
, HOST_WIDE_INT
, HOST_WIDE_INT
, tree
);
126 static void cris_file_start (void);
127 static void cris_init_libfuncs (void);
129 static bool cris_rtx_costs (rtx
, int, int, int *);
130 static int cris_address_cost (rtx
);
131 static bool cris_pass_by_reference (CUMULATIVE_ARGS
*, enum machine_mode
,
133 static int cris_arg_partial_bytes (CUMULATIVE_ARGS
*, enum machine_mode
,
135 static tree
cris_md_asm_clobbers (tree
, tree
, tree
);
137 /* This is the argument from the "-max-stack-stackframe=" option. */
138 const char *cris_max_stackframe_str
;
140 /* This is the argument from the "-march=" option. */
141 const char *cris_cpu_str
;
143 /* This is the argument from the "-mtune=" option. */
144 const char *cris_tune_str
;
146 /* This is the argument from the "-melinux-stacksize=" option. */
147 const char *cris_elinux_stacksize_str
;
149 /* This is the parsed result of the "-max-stack-stackframe=" option. If
150 it (still) is zero, then there was no such option given. */
151 int cris_max_stackframe
= 0;
153 /* This is the parsed result of the "-march=" option, if given. */
154 int cris_cpu_version
= CRIS_DEFAULT_CPU_VERSION
;
156 #undef TARGET_ASM_ALIGNED_HI_OP
157 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
158 #undef TARGET_ASM_ALIGNED_SI_OP
159 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
160 #undef TARGET_ASM_ALIGNED_DI_OP
161 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
163 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
164 available in ELF. These "normal" pseudos do not have any alignment
165 constraints or side-effects. */
166 #undef TARGET_ASM_UNALIGNED_HI_OP
167 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
169 #undef TARGET_ASM_UNALIGNED_SI_OP
170 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
172 #undef TARGET_ASM_UNALIGNED_DI_OP
173 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
175 #undef TARGET_ASM_OUTPUT_MI_THUNK
176 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
177 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
178 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
180 #undef TARGET_ASM_FILE_START
181 #define TARGET_ASM_FILE_START cris_file_start
183 #undef TARGET_INIT_LIBFUNCS
184 #define TARGET_INIT_LIBFUNCS cris_init_libfuncs
186 #undef TARGET_RTX_COSTS
187 #define TARGET_RTX_COSTS cris_rtx_costs
188 #undef TARGET_ADDRESS_COST
189 #define TARGET_ADDRESS_COST cris_address_cost
191 #undef TARGET_PROMOTE_FUNCTION_ARGS
192 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
193 #undef TARGET_STRUCT_VALUE_RTX
194 #define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
195 #undef TARGET_SETUP_INCOMING_VARARGS
196 #define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
197 #undef TARGET_PASS_BY_REFERENCE
198 #define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
199 #undef TARGET_ARG_PARTIAL_BYTES
200 #define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
201 #undef TARGET_MD_ASM_CLOBBERS
202 #define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
204 struct gcc_target targetm
= TARGET_INITIALIZER
;
206 /* Helper for cris_load_multiple_op and cris_ret_movem_op. */
209 cris_movem_load_rest_p (rtx op
, int offs
)
211 unsigned int reg_count
= XVECLEN (op
, 0) - offs
;
217 unsigned int regno
= 0;
219 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
220 other than (MEM reg). */
222 || GET_CODE (XVECEXP (op
, 0, offs
)) != SET
223 || GET_CODE (SET_DEST (XVECEXP (op
, 0, offs
))) != REG
224 || GET_CODE (SET_SRC (XVECEXP (op
, 0, offs
))) != MEM
)
227 /* Check a possible post-inc indicator. */
228 if (GET_CODE (SET_SRC (XVECEXP (op
, 0, offs
+ 1))) == PLUS
)
230 rtx reg
= XEXP (SET_SRC (XVECEXP (op
, 0, offs
+ 1)), 0);
231 rtx inc
= XEXP (SET_SRC (XVECEXP (op
, 0, offs
+ 1)), 1);
237 || !REG_P (SET_DEST (XVECEXP (op
, 0, offs
+ 1)))
238 || REGNO (reg
) != REGNO (SET_DEST (XVECEXP (op
, 0, offs
+ 1)))
239 || GET_CODE (inc
) != CONST_INT
240 || INTVAL (inc
) != (HOST_WIDE_INT
) reg_count
* 4)
247 /* FIXME: These two only for pre-v32. */
249 regno
= reg_count
- 1;
251 elt
= XVECEXP (op
, 0, offs
);
252 src_addr
= XEXP (SET_SRC (elt
), 0);
254 if (GET_CODE (elt
) != SET
255 || GET_CODE (SET_DEST (elt
)) != REG
256 || GET_MODE (SET_DEST (elt
)) != SImode
257 || REGNO (SET_DEST (elt
)) != regno
258 || GET_CODE (SET_SRC (elt
)) != MEM
259 || GET_MODE (SET_SRC (elt
)) != SImode
260 || !memory_address_p (SImode
, src_addr
))
263 for (setno
= 1; i
< XVECLEN (op
, 0); setno
++, i
++)
265 rtx elt
= XVECEXP (op
, 0, i
);
268 if (GET_CODE (elt
) != SET
269 || GET_CODE (SET_DEST (elt
)) != REG
270 || GET_MODE (SET_DEST (elt
)) != SImode
271 || REGNO (SET_DEST (elt
)) != regno
272 || GET_CODE (SET_SRC (elt
)) != MEM
273 || GET_MODE (SET_SRC (elt
)) != SImode
274 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
275 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
276 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
277 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != setno
* 4)
284 /* Worker function for predicate for the parallel contents in a movem
288 cris_store_multiple_op_p (rtx op
)
290 int reg_count
= XVECLEN (op
, 0);
301 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
302 other than (MEM reg) and (MEM (PLUS reg const)). */
306 elt
= XVECEXP (op
, 0, 0);
308 if (GET_CODE (elt
) != SET
)
311 dest
= SET_DEST (elt
);
313 if (GET_CODE (SET_SRC (elt
)) != REG
314 || GET_CODE (dest
) != MEM
)
317 dest_addr
= XEXP (dest
, 0);
319 /* Check a possible post-inc indicator. */
320 if (GET_CODE (SET_SRC (XVECEXP (op
, 0, 1))) == PLUS
)
322 rtx reg
= XEXP (SET_SRC (XVECEXP (op
, 0, 1)), 0);
323 rtx inc
= XEXP (SET_SRC (XVECEXP (op
, 0, 1)), 1);
329 || !REG_P (SET_DEST (XVECEXP (op
, 0, 1)))
330 || REGNO (reg
) != REGNO (SET_DEST (XVECEXP (op
, 0, 1)))
331 || GET_CODE (inc
) != CONST_INT
332 /* Support increment by number of registers, and by the offset
333 of the destination, if it has the form (MEM (PLUS reg
335 || !((REG_P (dest_addr
)
336 && REGNO (dest_addr
) == REGNO (reg
)
337 && INTVAL (inc
) == (HOST_WIDE_INT
) reg_count
* 4)
338 || (GET_CODE (dest_addr
) == PLUS
339 && REG_P (XEXP (dest_addr
, 0))
340 && REGNO (XEXP (dest_addr
, 0)) == REGNO (reg
)
341 && GET_CODE (XEXP (dest_addr
, 1)) == CONST_INT
342 && INTVAL (XEXP (dest_addr
, 1)) == INTVAL (inc
))))
350 /* FIXME: These two only for pre-v32. */
352 regno
= reg_count
- 1;
354 if (GET_CODE (elt
) != SET
355 || GET_CODE (SET_SRC (elt
)) != REG
356 || GET_MODE (SET_SRC (elt
)) != SImode
357 || REGNO (SET_SRC (elt
)) != (unsigned int) regno
358 || GET_CODE (SET_DEST (elt
)) != MEM
359 || GET_MODE (SET_DEST (elt
)) != SImode
)
362 if (REG_P (dest_addr
))
364 dest_base
= dest_addr
;
367 else if (GET_CODE (dest_addr
) == PLUS
368 && REG_P (XEXP (dest_addr
, 0))
369 && GET_CODE (XEXP (dest_addr
, 1)) == CONST_INT
)
371 dest_base
= XEXP (dest_addr
, 0);
372 offset
= INTVAL (XEXP (dest_addr
, 1));
377 for (setno
= 1; i
< XVECLEN (op
, 0); setno
++, i
++)
379 rtx elt
= XVECEXP (op
, 0, i
);
382 if (GET_CODE (elt
) != SET
383 || GET_CODE (SET_SRC (elt
)) != REG
384 || GET_MODE (SET_SRC (elt
)) != SImode
385 || REGNO (SET_SRC (elt
)) != (unsigned int) regno
386 || GET_CODE (SET_DEST (elt
)) != MEM
387 || GET_MODE (SET_DEST (elt
)) != SImode
388 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
389 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_base
)
390 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
391 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != setno
* 4 + offset
)
398 /* The CONDITIONAL_REGISTER_USAGE worker. */
401 cris_conditional_register_usage (void)
403 /* FIXME: This isn't nice. We should be able to use that register for
404 something else if the PIC table isn't needed. */
406 fixed_regs
[PIC_OFFSET_TABLE_REGNUM
]
407 = call_used_regs
[PIC_OFFSET_TABLE_REGNUM
] = 1;
409 if (TARGET_HAS_MUL_INSNS
)
410 fixed_regs
[CRIS_MOF_REGNUM
] = 0;
413 /* Return current_function_uses_pic_offset_table. For use in cris.md,
414 since some generated files do not include function.h. */
417 cris_cfun_uses_pic_table (void)
419 return current_function_uses_pic_offset_table
;
422 /* Given an rtx, return the text string corresponding to the CODE of X.
423 Intended for use in the assembly language output section of a
429 cris_output_insn_is_bound
= 0;
430 switch (GET_CODE (x
))
441 /* This function is for retrieving a part of an instruction name for
442 an operator, for immediate output. If that ever happens for
443 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
481 /* Used to control the sign/zero-extend character for the 'e' modifier.
483 cris_output_insn_is_bound
= 1;
488 return "Unknown operator";
493 /* Emit an error message when we're in an asm, and a fatal error for
494 "normal" insns. Formatted output isn't easily implemented, since we
495 use output_operand_lossage to output the actual message and handle the
496 categorization of the error. */
499 cris_operand_lossage (const char *msgid
, rtx op
)
502 output_operand_lossage ("%s", msgid
);
505 /* Print an index part of an address to file. */
508 cris_print_index (rtx index
, FILE *file
)
510 rtx inner
= XEXP (index
, 0);
512 /* Make the index "additive" unless we'll output a negative number, in
513 which case the sign character is free (as in free beer). */
514 if (GET_CODE (index
) != CONST_INT
|| INTVAL (index
) >= 0)
518 fprintf (file
, "$%s.b", reg_names
[REGNO (index
)]);
519 else if (CONSTANT_P (index
))
520 cris_output_addr_const (file
, index
);
521 else if (GET_CODE (index
) == MULT
)
523 fprintf (file
, "$%s.",
524 reg_names
[REGNO (XEXP (index
, 0))]);
526 putc (INTVAL (XEXP (index
, 1)) == 2 ? 'w' : 'd', file
);
528 else if (GET_CODE (index
) == SIGN_EXTEND
&&
529 GET_CODE (inner
) == MEM
)
531 rtx inner_inner
= XEXP (inner
, 0);
533 if (GET_CODE (inner_inner
) == POST_INC
)
535 fprintf (file
, "[$%s+].",
536 reg_names
[REGNO (XEXP (inner_inner
, 0))]);
537 putc (GET_MODE (inner
) == HImode
? 'w' : 'b', file
);
541 fprintf (file
, "[$%s].", reg_names
[REGNO (inner_inner
)]);
543 putc (GET_MODE (inner
) == HImode
? 'w' : 'b', file
);
546 else if (GET_CODE (index
) == MEM
)
548 if (GET_CODE (inner
) == POST_INC
)
549 fprintf (file
, "[$%s+].d", reg_names
[REGNO (XEXP (inner
, 0))]);
551 fprintf (file
, "[$%s].d", reg_names
[REGNO (inner
)]);
554 cris_operand_lossage ("unexpected index-type in cris_print_index",
558 /* Print a base rtx of an address to file. */
561 cris_print_base (rtx base
, FILE *file
)
564 fprintf (file
, "$%s", reg_names
[REGNO (base
)]);
565 else if (GET_CODE (base
) == POST_INC
)
566 fprintf (file
, "$%s+", reg_names
[REGNO (XEXP (base
, 0))]);
568 cris_operand_lossage ("unexpected base-type in cris_print_base",
572 /* Usable as a guard in expressions. */
575 cris_fatal (char *arg
)
577 internal_error (arg
);
579 /* We'll never get here; this is just to appease compilers. */
583 /* Return nonzero if REGNO is an ordinary register that *needs* to be
584 saved together with other registers, possibly by a MOVEM instruction,
585 or is saved for target-independent reasons. There may be
586 target-dependent reasons to save the register anyway; this is just a
587 wrapper for a complicated conditional. */
590 cris_reg_saved_in_regsave_area (unsigned int regno
, bool got_really_used
)
593 (((regs_ever_live
[regno
]
594 && !call_used_regs
[regno
])
595 || (regno
== PIC_OFFSET_TABLE_REGNUM
597 /* It is saved anyway, if there would be a gap. */
599 && regs_ever_live
[regno
+ 1]
600 && !call_used_regs
[regno
+ 1]))))
601 && (regno
!= FRAME_POINTER_REGNUM
|| !frame_pointer_needed
)
602 && regno
!= CRIS_SRP_REGNUM
)
603 || (current_function_calls_eh_return
604 && (regno
== EH_RETURN_DATA_REGNO (0)
605 || regno
== EH_RETURN_DATA_REGNO (1)
606 || regno
== EH_RETURN_DATA_REGNO (2)
607 || regno
== EH_RETURN_DATA_REGNO (3)));
610 /* Return nonzero if there are regs mentioned in the insn that are not all
611 in the call_used regs. This is part of the decision whether an insn
612 can be put in the epilogue. */
615 saved_regs_mentioned (rtx x
)
621 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
629 return !call_used_regs
[i
];
632 /* If this is a SUBREG of a hard reg, we can see exactly which
633 registers are being modified. Otherwise, handle normally. */
634 i
= REGNO (SUBREG_REG (x
));
635 return !call_used_regs
[i
];
641 fmt
= GET_RTX_FORMAT (code
);
642 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
646 if (saved_regs_mentioned (XEXP (x
, i
)))
649 else if (fmt
[i
] == 'E')
652 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
653 if (saved_regs_mentioned (XEXP (x
, i
)))
661 /* The PRINT_OPERAND worker. */
664 cris_print_operand (FILE *file
, rtx x
, int code
)
668 /* Size-strings corresponding to MULT expressions. */
669 static const char *const mults
[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
671 /* New code entries should just be added to the switch below. If
672 handling is finished, just return. If handling was just a
673 modification of the operand, the modified operand should be put in
674 "operand", and then do a break to let default handling
675 (zero-modifier) output the operand. */
680 /* Print the unsigned supplied integer as if it were signed
681 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
682 if (GET_CODE (x
) != CONST_INT
683 || ! CONST_OK_FOR_LETTER_P (INTVAL (x
), 'O'))
684 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x
);
685 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
686 INTVAL (x
)| (INTVAL (x
) <= 255 ? ~255 : ~65535));
690 /* Print assembler code for operator. */
691 fprintf (file
, "%s", cris_op_str (operand
));
695 /* Print the operand without the PIC register. */
696 if (! flag_pic
|| ! CONSTANT_P (x
) || ! cris_gotless_symbol (x
))
697 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x
);
698 cris_pic_sympart_only
++;
699 cris_output_addr_const (file
, x
);
700 cris_pic_sympart_only
--;
705 /* A movem modifier working on a parallel; output the register
709 if (GET_CODE (x
) != PARALLEL
)
710 LOSE_AND_RETURN ("invalid operand for 'o' modifier", x
);
712 /* The second item can be (set reg (plus reg const)) to denote a
715 = (GET_CODE (SET_SRC (XVECEXP (x
, 0, 1))) == PLUS
717 : XVECLEN (x
, 0) - 1);
719 fprintf (file
, "$%s", reg_names
[regno
]);
725 /* A similar movem modifier; output the memory operand. */
728 if (GET_CODE (x
) != PARALLEL
)
729 LOSE_AND_RETURN ("invalid operand for 'O' modifier", x
);
731 /* The lowest mem operand is in the first item, but perhaps it
732 needs to be output as postincremented. */
733 addr
= GET_CODE (SET_SRC (XVECEXP (x
, 0, 0))) == MEM
734 ? XEXP (SET_SRC (XVECEXP (x
, 0, 0)), 0)
735 : XEXP (SET_DEST (XVECEXP (x
, 0, 0)), 0);
737 /* The second item can be a (set reg (plus reg const)) to denote
739 if (GET_CODE (SET_SRC (XVECEXP (x
, 0, 1))) == PLUS
)
741 /* It's a post-increment, if the address is a naked (reg). */
743 addr
= gen_rtx_POST_INC (SImode
, addr
);
746 /* Otherwise, it's a side-effect; RN=RN+M. */
747 fprintf (file
, "[$%s=$%s%s%d]",
748 reg_names
[REGNO (SET_DEST (XVECEXP (x
, 0, 1)))],
749 reg_names
[REGNO (XEXP (addr
, 0))],
750 INTVAL (XEXP (addr
, 1)) < 0 ? "" : "+",
751 (int) INTVAL (XEXP (addr
, 1)));
755 output_address (addr
);
760 /* Print the PIC register. Applied to a GOT-less PIC symbol for
762 if (! flag_pic
|| ! CONSTANT_P (x
) || ! cris_gotless_symbol (x
))
763 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x
);
764 fprintf (file
, "$%s", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
768 /* Adjust a power of two to its log2. */
769 if (GET_CODE (x
) != CONST_INT
|| exact_log2 (INTVAL (x
)) < 0 )
770 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x
);
771 fprintf (file
, "%d", exact_log2 (INTVAL (x
)));
775 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
776 respectively. This modifier also terminates the inhibiting
777 effects of the 'x' modifier. */
778 cris_output_insn_is_bound
= 0;
779 if (GET_MODE (x
) == VOIDmode
&& GET_CODE (x
) == CONST_INT
)
783 if (INTVAL (x
) <= 255)
785 else if (INTVAL (x
) <= 65535)
795 /* For a non-integer, print the size of the operand. */
796 putc ((GET_MODE (x
) == SImode
|| GET_MODE (x
) == SFmode
)
797 ? 'd' : GET_MODE (x
) == HImode
? 'w'
798 : GET_MODE (x
) == QImode
? 'b'
799 /* If none of the above, emit an erroneous size letter. */
805 /* Const_int: print b for -127 <= x <= 255,
806 w for -32768 <= x <= 65535, else abort. */
807 if (GET_CODE (x
) != CONST_INT
808 || INTVAL (x
) < -32768 || INTVAL (x
) > 65535)
809 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x
);
810 putc (INTVAL (x
) >= -128 && INTVAL (x
) <= 255 ? 'b' : 'w', file
);
814 /* Output a 'nop' if there's nothing for the delay slot.
815 This method stolen from the sparc files. */
816 if (dbr_sequence_length () == 0)
817 fputs ("\n\tnop", file
);
821 /* Output directive for alignment padded with "nop" insns.
822 Optimizing for size, it's plain 4-byte alignment, otherwise we
823 align the section to a cache-line (32 bytes) and skip at max 2
824 bytes, i.e. we skip if it's the last insn on a cache-line. The
825 latter is faster by a small amount (for two test-programs 99.6%
826 and 99.9%) and larger by a small amount (ditto 100.1% and
827 100.2%). This is supposed to be the simplest yet performance-
828 wise least intrusive way to make sure the immediately following
829 (supposed) muls/mulu insn isn't located at the end of a
833 ? ".p2alignw 2,0x050f\n\t"
834 : ".p2alignw 5,0x050f,2\n\t", file
);
838 /* Print high (most significant) part of something. */
839 switch (GET_CODE (operand
))
842 if (HOST_BITS_PER_WIDE_INT
== 32)
843 /* Sign-extension from a normal int to a long long. */
844 fprintf (file
, INTVAL (operand
) < 0 ? "-1" : "0");
846 fprintf (file
, "0x%x", (unsigned int)(INTVAL (x
) >> 31 >> 1));
850 /* High part of a long long constant. */
851 if (GET_MODE (operand
) == VOIDmode
)
853 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_HIGH (x
));
857 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x
);
860 /* Print reg + 1. Check that there's not an attempt to print
861 high-parts of registers like stack-pointer or higher. */
862 if (REGNO (operand
) > STACK_POINTER_REGNUM
- 2)
863 LOSE_AND_RETURN ("bad register", operand
);
864 fprintf (file
, "$%s", reg_names
[REGNO (operand
) + 1]);
868 /* Adjust memory address to high part. */
870 rtx adj_mem
= operand
;
872 = GET_MODE_BITSIZE (GET_MODE (operand
)) / BITS_PER_UNIT
;
874 /* Adjust so we can use two SImode in DImode.
875 Calling adj_offsettable_operand will make sure it is an
876 offsettable address. Don't do this for a postincrement
877 though; it should remain as it was. */
878 if (GET_CODE (XEXP (adj_mem
, 0)) != POST_INC
)
880 = adjust_address (adj_mem
, GET_MODE (adj_mem
), size
/ 2);
882 output_address (XEXP (adj_mem
, 0));
887 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x
);
891 /* Strip the MEM expression. */
892 operand
= XEXP (operand
, 0);
896 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
897 cris_output_insn_is_bound is nonzero. */
898 if (GET_CODE (operand
) != SIGN_EXTEND
899 && GET_CODE (operand
) != ZERO_EXTEND
900 && GET_CODE (operand
) != CONST_INT
)
901 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x
);
903 if (cris_output_insn_is_bound
)
905 cris_output_insn_is_bound
= 0;
909 putc (GET_CODE (operand
) == SIGN_EXTEND
910 || (GET_CODE (operand
) == CONST_INT
&& INTVAL (operand
) < 0)
915 /* Print the size letter of the inner element. We can do it by
916 calling ourselves with the 's' modifier. */
917 if (GET_CODE (operand
) != SIGN_EXTEND
&& GET_CODE (operand
) != ZERO_EXTEND
)
918 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x
);
919 cris_print_operand (file
, XEXP (operand
, 0), 's');
923 /* Print the least significant part of operand. */
924 if (GET_CODE (operand
) == CONST_DOUBLE
)
926 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
929 else if (HOST_BITS_PER_WIDE_INT
> 32 && GET_CODE (operand
) == CONST_INT
)
931 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
932 INTVAL (x
) & ((unsigned int) 0x7fffffff * 2 + 1));
935 /* Otherwise the least significant part equals the normal part,
936 so handle it normally. */
940 /* When emitting an add for the high part of a DImode constant, we
941 want to use addq for 0 and adds.w for -1. */
942 if (GET_CODE (operand
) != CONST_INT
)
943 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x
);
944 fprintf (file
, INTVAL (operand
) < 0 ? "adds.w" : "addq");
948 /* If this is a GOT symbol, print it as :GOT regardless of -fpic. */
949 if (flag_pic
&& CONSTANT_P (operand
) && cris_got_symbol (operand
))
951 cris_output_addr_const (file
, operand
);
952 fprintf (file
, ":GOT");
958 /* When emitting an sub for the high part of a DImode constant, we
959 want to use subq for 0 and subs.w for -1. */
960 if (GET_CODE (operand
) != CONST_INT
)
961 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x
);
962 fprintf (file
, INTVAL (operand
) < 0 ? "subs.w" : "subq");
966 /* Print the operand as the index-part of an address.
967 Easiest way out is to use cris_print_index. */
968 cris_print_index (operand
, file
);
972 /* Print the size letter for an operand to a MULT, which must be a
973 const_int with a suitable value. */
974 if (GET_CODE (operand
) != CONST_INT
|| INTVAL (operand
) > 4)
975 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x
);
976 fprintf (file
, "%s", mults
[INTVAL (operand
)]);
980 /* No code, print as usual. */
984 LOSE_AND_RETURN ("invalid operand modifier letter", x
);
987 /* Print an operand as without a modifier letter. */
988 switch (GET_CODE (operand
))
991 if (REGNO (operand
) > 15
992 && REGNO (operand
) != CRIS_MOF_REGNUM
993 && REGNO (operand
) != CRIS_SRP_REGNUM
)
994 internal_error ("internal error: bad register: %d", REGNO (operand
));
995 fprintf (file
, "$%s", reg_names
[REGNO (operand
)]);
999 output_address (XEXP (operand
, 0));
1003 if (GET_MODE (operand
) == VOIDmode
)
1004 /* A long long constant. */
1005 output_addr_const (file
, operand
);
1008 /* Only single precision is allowed as plain operands the
1009 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1014 /* FIXME: Perhaps check overflow of the "single". */
1015 REAL_VALUE_FROM_CONST_DOUBLE (r
, operand
);
1016 REAL_VALUE_TO_TARGET_SINGLE (r
, l
);
1018 fprintf (file
, "0x%lx", l
);
1023 ASSERT_PLT_UNSPEC (operand
);
1027 cris_output_addr_const (file
, operand
);
1033 /* For a (MULT (reg X) const_int) we output "rX.S". */
1034 int i
= GET_CODE (XEXP (operand
, 1)) == CONST_INT
1035 ? INTVAL (XEXP (operand
, 1)) : INTVAL (XEXP (operand
, 0));
1036 rtx reg
= GET_CODE (XEXP (operand
, 1)) == CONST_INT
1037 ? XEXP (operand
, 0) : XEXP (operand
, 1);
1039 if (GET_CODE (reg
) != REG
1040 || (GET_CODE (XEXP (operand
, 0)) != CONST_INT
1041 && GET_CODE (XEXP (operand
, 1)) != CONST_INT
))
1042 LOSE_AND_RETURN ("unexpected multiplicative operand", x
);
1044 cris_print_base (reg
, file
);
1045 fprintf (file
, ".%c",
1046 i
== 0 || (i
== 1 && GET_CODE (operand
) == MULT
) ? 'b'
1048 : (i
== 2 && GET_CODE (operand
) == MULT
) || i
== 1 ? 'w'
1054 /* No need to handle all strange variants, let output_addr_const
1056 if (CONSTANT_P (operand
))
1058 cris_output_addr_const (file
, operand
);
1062 LOSE_AND_RETURN ("unexpected operand", x
);
1066 /* The PRINT_OPERAND_ADDRESS worker. */
1069 cris_print_operand_address (FILE *file
, rtx x
)
1071 /* All these were inside MEM:s so output indirection characters. */
1074 if (CONSTANT_ADDRESS_P (x
))
1075 cris_output_addr_const (file
, x
);
1076 else if (BASE_OR_AUTOINCR_P (x
))
1077 cris_print_base (x
, file
);
1078 else if (GET_CODE (x
) == PLUS
)
1086 cris_print_base (x1
, file
);
1087 cris_print_index (x2
, file
);
1089 else if (BASE_P (x2
))
1091 cris_print_base (x2
, file
);
1092 cris_print_index (x1
, file
);
1095 LOSE_AND_RETURN ("unrecognized address", x
);
1097 else if (GET_CODE (x
) == MEM
)
1099 /* A DIP. Output more indirection characters. */
1101 cris_print_base (XEXP (x
, 0), file
);
1105 LOSE_AND_RETURN ("unrecognized address", x
);
1110 /* The RETURN_ADDR_RTX worker.
1111 We mark that the return address is used, either by EH or
1112 __builtin_return_address, for use by the function prologue and
1113 epilogue. FIXME: This isn't optimal; we just use the mark in the
1114 prologue and epilogue to say that the return address is to be stored
1115 in the stack frame. We could return SRP for leaf-functions and use the
1116 initial-value machinery. */
1119 cris_return_addr_rtx (int count
, rtx frameaddr ATTRIBUTE_UNUSED
)
1121 cfun
->machine
->needs_return_address_on_stack
= 1;
1123 /* The return-address is stored just above the saved frame-pointer (if
1124 present). Apparently we can't eliminate from the frame-pointer in
1125 that direction, so use the incoming args (maybe pretended) pointer. */
1127 ? gen_rtx_MEM (Pmode
, plus_constant (virtual_incoming_args_rtx
, -4))
1131 /* Accessor used in cris.md:return because cfun->machine isn't available
1135 cris_return_address_on_stack (void)
1137 return regs_ever_live
[CRIS_SRP_REGNUM
]
1138 || cfun
->machine
->needs_return_address_on_stack
;
1141 /* Accessor used in cris.md:return because cfun->machine isn't available
1145 cris_return_address_on_stack_for_return (void)
1147 return cfun
->machine
->return_type
== CRIS_RETINSN_RET
? false
1148 : cris_return_address_on_stack ();
1151 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1152 handles FP -> SP elimination offset. */
1155 cris_initial_frame_pointer_offset (void)
1159 /* Initial offset is 0 if we don't have a frame pointer. */
1161 bool got_really_used
= current_function_uses_pic_offset_table
;
1163 /* And 4 for each register pushed. */
1164 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1165 if (cris_reg_saved_in_regsave_area (regno
, got_really_used
))
1168 /* And then, last, we add the locals allocated. */
1169 offs
+= get_frame_size ();
1171 /* And more; the accumulated args size. */
1172 offs
+= current_function_outgoing_args_size
;
1174 /* Then round it off, in case we use aligned stack. */
1175 if (TARGET_STACK_ALIGN
)
1176 offs
= TARGET_ALIGN_BY_32
? (offs
+ 3) & ~3 : (offs
+ 1) & ~1;
1181 /* The INITIAL_ELIMINATION_OFFSET worker.
1182 Calculate the difference between imaginary registers such as frame
1183 pointer and the stack pointer. Used to eliminate the frame pointer
1184 and imaginary arg pointer. */
1187 cris_initial_elimination_offset (int fromreg
, int toreg
)
1190 = cris_initial_frame_pointer_offset ();
1192 /* We should be able to use regs_ever_live and related prologue
1193 information here, or alpha should not as well. */
1194 bool return_address_on_stack
= cris_return_address_on_stack ();
1196 /* Here we act as if the frame-pointer were needed. */
1197 int ap_fp_offset
= 4 + (return_address_on_stack
? 4 : 0);
1199 if (fromreg
== ARG_POINTER_REGNUM
1200 && toreg
== FRAME_POINTER_REGNUM
)
1201 return ap_fp_offset
;
1203 /* Between the frame pointer and the stack are only "normal" stack
1204 variables and saved registers. */
1205 if (fromreg
== FRAME_POINTER_REGNUM
1206 && toreg
== STACK_POINTER_REGNUM
)
1207 return fp_sp_offset
;
1209 /* We need to balance out the frame pointer here. */
1210 if (fromreg
== ARG_POINTER_REGNUM
1211 && toreg
== STACK_POINTER_REGNUM
)
1212 return ap_fp_offset
+ fp_sp_offset
- 4;
1217 /* This function looks into the pattern to see how this insn affects
1220 Used when to eliminate test insns before a condition-code user,
1221 such as a "scc" insn or a conditional branch. This includes
1222 checking if the entities that cc was updated by, are changed by the
1225 Currently a jumble of the old peek-inside-the-insn and the newer
1226 check-cc-attribute methods. */
1229 cris_notice_update_cc (rtx exp
, rtx insn
)
1231 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1232 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1233 Several testcases will otherwise fail, for example
1234 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1241 /* Slowly, we're converting to using attributes to control the setting
1242 of condition-code status. */
1243 switch (get_attr_cc (insn
))
1246 /* Even if it is "none", a setting may clobber a previous
1247 cc-value, so check. */
1248 if (GET_CODE (exp
) == SET
)
1250 if (cc_status
.value1
1251 && modified_in_p (cc_status
.value1
, insn
))
1252 cc_status
.value1
= 0;
1254 if (cc_status
.value2
1255 && modified_in_p (cc_status
.value2
, insn
))
1256 cc_status
.value2
= 0;
1265 /* Which means, for:
1270 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1271 CC_NO_OVERFLOW unless (...) is reg or mem.
1280 (set (reg1) (mem (bdap/biap)))
1281 (set (reg2) (bdap/biap))):
1282 CC is (reg1) and (mem (reg2))
1285 (set (mem (bdap/biap)) (reg1)) [or 0]
1286 (set (reg2) (bdap/biap))):
1289 (where reg and mem includes strict_low_parts variants thereof)
1291 For all others, assume CC is clobbered.
1292 Note that we do not have to care about setting CC_NO_OVERFLOW,
1293 since the overflow flag is set to 0 (i.e. right) for
1294 instructions where it does not have any sane sense, but where
1295 other flags have meanings. (This includes shifts; the carry is
1298 Note that there are other parallel constructs we could match,
1299 but we don't do that yet. */
1301 if (GET_CODE (exp
) == SET
)
1303 /* FIXME: Check when this happens. It looks like we should
1304 actually do a CC_STATUS_INIT here to be safe. */
1305 if (SET_DEST (exp
) == pc_rtx
)
1308 /* Record CC0 changes, so we do not have to output multiple
1310 if (SET_DEST (exp
) == cc0_rtx
)
1312 cc_status
.value1
= SET_SRC (exp
);
1313 cc_status
.value2
= 0;
1315 /* Handle flags for the special btstq on one bit. */
1316 if (GET_CODE (SET_SRC (exp
)) == ZERO_EXTRACT
1317 && XEXP (SET_SRC (exp
), 1) == const1_rtx
)
1319 if (GET_CODE (XEXP (SET_SRC (exp
), 0)) == CONST_INT
)
1321 cc_status
.flags
= CC_INVERTED
;
1323 /* A one-bit btstq. */
1324 cc_status
.flags
= CC_Z_IN_NOT_N
;
1327 cc_status
.flags
= 0;
1329 if (GET_CODE (SET_SRC (exp
)) == COMPARE
)
1331 if (!REG_P (XEXP (SET_SRC (exp
), 0))
1332 && XEXP (SET_SRC (exp
), 1) != const0_rtx
)
1333 /* For some reason gcc will not canonicalize compare
1334 operations, reversing the sign by itself if
1335 operands are in wrong order. */
1336 /* (But NOT inverted; eq is still eq.) */
1337 cc_status
.flags
= CC_REVERSED
;
1339 /* This seems to be overlooked by gcc. FIXME: Check again.
1340 FIXME: Is it really safe? */
1342 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp
)),
1343 XEXP (SET_SRC (exp
), 0),
1344 XEXP (SET_SRC (exp
), 1));
1348 else if (REG_P (SET_DEST (exp
))
1349 || (GET_CODE (SET_DEST (exp
)) == STRICT_LOW_PART
1350 && REG_P (XEXP (SET_DEST (exp
), 0))))
1352 /* A register is set; normally CC is set to show that no
1353 test insn is needed. Catch the exceptions. */
1355 /* If not to cc0, then no "set"s in non-natural mode give
1357 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp
))) > UNITS_PER_WORD
1358 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp
))) == MODE_FLOAT
)
1360 /* ... except add:s and sub:s in DImode. */
1361 if (GET_MODE (SET_DEST (exp
)) == DImode
1362 && (GET_CODE (SET_SRC (exp
)) == PLUS
1363 || GET_CODE (SET_SRC (exp
)) == MINUS
))
1365 cc_status
.flags
= 0;
1366 cc_status
.value1
= SET_DEST (exp
);
1367 cc_status
.value2
= SET_SRC (exp
);
1369 if (cris_reg_overlap_mentioned_p (cc_status
.value1
,
1371 cc_status
.value2
= 0;
1373 /* Add and sub may set V, which gets us
1374 unoptimizable results in "gt" and "le" condition
1376 cc_status
.flags
|= CC_NO_OVERFLOW
;
1381 else if (SET_SRC (exp
) == const0_rtx
)
1383 /* There's no CC0 change when clearing a register or
1384 memory. Just check for overlap. */
1385 if (cc_status
.value1
1386 && modified_in_p (cc_status
.value1
, insn
))
1387 cc_status
.value1
= 0;
1389 if (cc_status
.value2
1390 && modified_in_p (cc_status
.value2
, insn
))
1391 cc_status
.value2
= 0;
1397 cc_status
.flags
= 0;
1398 cc_status
.value1
= SET_DEST (exp
);
1399 cc_status
.value2
= SET_SRC (exp
);
1401 if (cris_reg_overlap_mentioned_p (cc_status
.value1
,
1403 cc_status
.value2
= 0;
1405 /* Some operations may set V, which gets us
1406 unoptimizable results in "gt" and "le" condition
1408 if (GET_CODE (SET_SRC (exp
)) == PLUS
1409 || GET_CODE (SET_SRC (exp
)) == MINUS
1410 || GET_CODE (SET_SRC (exp
)) == NEG
)
1411 cc_status
.flags
|= CC_NO_OVERFLOW
;
1416 else if (GET_CODE (SET_DEST (exp
)) == MEM
1417 || (GET_CODE (SET_DEST (exp
)) == STRICT_LOW_PART
1418 && GET_CODE (XEXP (SET_DEST (exp
), 0)) == MEM
))
1420 /* When SET to MEM, then CC is not changed (except for
1422 if (cc_status
.value1
1423 && modified_in_p (cc_status
.value1
, insn
))
1424 cc_status
.value1
= 0;
1426 if (cc_status
.value2
1427 && modified_in_p (cc_status
.value2
, insn
))
1428 cc_status
.value2
= 0;
1433 else if (GET_CODE (exp
) == PARALLEL
)
1435 if (GET_CODE (XVECEXP (exp
, 0, 0)) == SET
1436 && GET_CODE (XVECEXP (exp
, 0, 1)) == SET
1437 && REG_P (XEXP (XVECEXP (exp
, 0, 1), 0)))
1439 if (REG_P (XEXP (XVECEXP (exp
, 0, 0), 0))
1440 && GET_CODE (XEXP (XVECEXP (exp
, 0, 0), 1)) == MEM
)
1442 /* For "move.S [rx=ry+o],rz", say CC reflects
1443 value1=rz and value2=[rx] */
1444 cc_status
.value1
= XEXP (XVECEXP (exp
, 0, 0), 0);
1446 = replace_equiv_address (XEXP (XVECEXP (exp
, 0, 0), 1),
1447 XEXP (XVECEXP (exp
, 0, 1), 0));
1448 cc_status
.flags
= 0;
1450 /* Huh? A side-effect cannot change the destination
1452 if (cris_reg_overlap_mentioned_p (cc_status
.value1
,
1454 internal_error ("internal error: sideeffect-insn affecting main effect");
1457 else if ((REG_P (XEXP (XVECEXP (exp
, 0, 0), 1))
1458 || XEXP (XVECEXP (exp
, 0, 0), 1) == const0_rtx
)
1459 && GET_CODE (XEXP (XVECEXP (exp
, 0, 0), 0)) == MEM
)
1461 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
1462 say flags are not changed, except for overlap. */
1463 if (cc_status
.value1
1464 && modified_in_p (cc_status
.value1
, insn
))
1465 cc_status
.value1
= 0;
1467 if (cc_status
.value2
1468 && modified_in_p (cc_status
.value2
, insn
))
1469 cc_status
.value2
= 0;
1478 /* Unknown cc_attr value. */
1485 /* Return != 0 if the return sequence for the current function is short,
1486 like "ret" or "jump [sp+]". Prior to reloading, we can't tell if
1487 registers must be saved, so return 0 then. */
1490 cris_simple_epilogue (void)
1493 unsigned int reglimit
= STACK_POINTER_REGNUM
;
1494 bool got_really_used
= current_function_uses_pic_offset_table
;
1496 if (! reload_completed
1497 || frame_pointer_needed
1498 || get_frame_size () != 0
1499 || current_function_pretend_args_size
1500 || current_function_args_size
1501 || current_function_outgoing_args_size
1502 || current_function_calls_eh_return
1504 /* If we're not supposed to emit prologue and epilogue, we must
1505 not emit return-type instructions. */
1506 || !TARGET_PROLOGUE_EPILOGUE
)
1509 /* No simple epilogue if there are saved registers. */
1510 for (regno
= 0; regno
< reglimit
; regno
++)
1511 if (cris_reg_saved_in_regsave_area (regno
, got_really_used
))
1517 /* Expand a return insn (just one insn) marked as using SRP or stack
1518 slot depending on parameter ON_STACK. */
1521 cris_expand_return (bool on_stack
)
1523 /* FIXME: emit a parallel with a USE for SRP or the stack-slot, to
1524 tell "ret" from "jump [sp+]". Some, but not all, other parts of
1525 GCC expect just (return) to do the right thing when optimizing, so
1526 we do that until they're fixed. Currently, all return insns in a
1527 function must be the same (not really a limiting factor) so we need
1528 to check that it doesn't change half-way through. */
1529 emit_jump_insn (gen_rtx_RETURN (VOIDmode
));
1531 if ((cfun
->machine
->return_type
== CRIS_RETINSN_RET
&& on_stack
)
1532 || (cfun
->machine
->return_type
== CRIS_RETINSN_JUMP
&& !on_stack
))
1535 cfun
->machine
->return_type
1536 = on_stack
? CRIS_RETINSN_JUMP
: CRIS_RETINSN_RET
;
1539 /* Compute a (partial) cost for rtx X. Return true if the complete
1540 cost has been computed, and false if subexpressions should be
1541 scanned. In either case, *TOTAL contains the cost result. */
1544 cris_rtx_costs (rtx x
, int code
, int outer_code
, int *total
)
1550 HOST_WIDE_INT val
= INTVAL (x
);
1553 else if (val
< 32 && val
>= -32)
1555 /* Eight or 16 bits are a word and cycle more expensive. */
1556 else if (val
<= 32767 && val
>= -32768)
1558 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
1559 another word. FIXME: This isn't linear to 16 bits. */
1571 /* For PIC, we need a prefix (if it isn't already there),
1572 and the PIC register. For a global PIC symbol, we also
1573 need a read of the GOT. */
1576 if (cris_got_symbol (x
))
1586 if (x
!= CONST0_RTX (GET_MODE (x
) == VOIDmode
? DImode
: GET_MODE (x
)))
1589 /* Make 0.0 cheap, else test-insns will not be used. */
1594 /* Identify values that are no powers of two. Powers of 2 are
1595 taken care of already and those values should not be changed. */
1596 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
1597 || exact_log2 (INTVAL (XEXP (x
, 1)) < 0))
1599 /* If we have a multiply insn, then the cost is between
1600 1 and 2 "fast" instructions. */
1601 if (TARGET_HAS_MUL_INSNS
)
1603 *total
= COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
1607 /* Estimate as 4 + 4 * #ofbits. */
1608 *total
= COSTS_N_INSNS (132);
1617 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
1618 || exact_log2 (INTVAL (XEXP (x
, 1)) < 0))
1620 /* Estimate this as 4 + 8 * #of bits. */
1621 *total
= COSTS_N_INSNS (260);
1627 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
1628 /* Two constants may actually happen before optimization. */
1629 && GET_CODE (XEXP (x
, 0)) != CONST_INT
1630 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x
, 1)), 'I'))
1632 *total
= (rtx_cost (XEXP (x
, 0), outer_code
) + 2
1633 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x
, 0))));
1638 case ZERO_EXTEND
: case SIGN_EXTEND
:
1639 *total
= rtx_cost (XEXP (x
, 0), outer_code
);
1647 /* The ADDRESS_COST worker. */
1650 cris_address_cost (rtx x
)
1652 /* The metric to use for the cost-macros is unclear.
1653 The metric used here is (the number of cycles needed) / 2,
1654 where we consider equal a cycle for a word of code and a cycle to
1657 /* The cheapest addressing modes get 0, since nothing extra is needed. */
1658 if (BASE_OR_AUTOINCR_P (x
))
1661 /* An indirect mem must be a DIP. This means two bytes extra for code,
1662 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
1663 if (GET_CODE (x
) == MEM
)
1666 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
1667 an extra DIP prefix and 4 bytes of constant in most cases.
1668 For PIC and a symbol with a GOT entry, we double the cost since we
1669 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
1670 equivalent to the DIP prefix for non-PIC, hence the same cost. */
1672 return flag_pic
&& cris_got_symbol (x
) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
1674 /* Handle BIAP and BDAP prefixes. */
1675 if (GET_CODE (x
) == PLUS
)
1677 rtx tem1
= XEXP (x
, 0);
1678 rtx tem2
= XEXP (x
, 1);
1680 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
1681 recognize the typical MULT which is always in tem1 because of
1682 insn canonicalization. */
1683 if ((GET_CODE (tem1
) == MULT
&& BIAP_INDEX_P (tem1
))
1687 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
1688 PLUS is always found in tem2. */
1689 if (GET_CODE (tem2
) == CONST_INT
1690 && INTVAL (tem2
) < 128 && INTVAL (tem2
) >= -128)
1693 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
1695 if (GET_CODE (tem2
) == CONST_INT
1696 && CONST_OK_FOR_LETTER_P (INTVAL (tem2
), 'L'))
1699 /* A BDAP with some other constant is 2 bytes extra. */
1700 if (CONSTANT_P (tem2
))
1701 return (2 + 2 + 2) / 2;
1703 /* BDAP with something indirect should have a higher cost than
1704 BIAP with register. FIXME: Should it cost like a MEM or more? */
1705 /* Don't need to check it, it's the only one left.
1706 FIXME: There was a REG test missing, perhaps there are others.
1708 return (2 + 2 + 2) / 2;
1711 /* What else? Return a high cost. It matters only for valid
1712 addressing modes. */
1716 /* Check various objections to the side-effect. Used in the test-part
1717 of an anonymous insn describing an insn with a possible side-effect.
1718 Returns nonzero if the implied side-effect is ok.
1721 ops : An array of rtx:es. lreg, rreg, rval,
1722 The variables multop and other_op are indexes into this,
1723 or -1 if they are not applicable.
1724 lreg : The register that gets assigned in the side-effect.
1725 rreg : One register in the side-effect expression
1726 rval : The other register, or an int.
1727 multop : An integer to multiply rval with.
1728 other_op : One of the entities of the main effect,
1729 whose mode we must consider. */
1732 cris_side_effect_mode_ok (enum rtx_code code
, rtx
*ops
,
1733 int lreg
, int rreg
, int rval
,
1734 int multop
, int other_op
)
1736 /* Find what value to multiply with, for rx =ry + rz * n. */
1737 int mult
= multop
< 0 ? 1 : INTVAL (ops
[multop
]);
1739 rtx reg_rtx
= ops
[rreg
];
1740 rtx val_rtx
= ops
[rval
];
1742 /* The operands may be swapped. Canonicalize them in reg_rtx and
1743 val_rtx, where reg_rtx always is a reg (for this constraint to
1745 if (! BASE_P (reg_rtx
))
1746 reg_rtx
= val_rtx
, val_rtx
= ops
[rreg
];
1748 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
1749 we have no business. */
1750 if (! BASE_P (reg_rtx
))
1753 /* Don't do this when -mno-split. */
1754 if (!TARGET_SIDE_EFFECT_PREFIXES
)
1757 /* The mult expression may be hidden in lreg. FIXME: Add more
1758 commentary about that. */
1759 if (GET_CODE (val_rtx
) == MULT
)
1761 mult
= INTVAL (XEXP (val_rtx
, 1));
1762 val_rtx
= XEXP (val_rtx
, 0);
1766 /* First check the "other operand". */
1769 if (GET_MODE_SIZE (GET_MODE (ops
[other_op
])) > UNITS_PER_WORD
)
1772 /* Check if the lvalue register is the same as the "other
1773 operand". If so, the result is undefined and we shouldn't do
1774 this. FIXME: Check again. */
1775 if ((BASE_P (ops
[lreg
])
1776 && BASE_P (ops
[other_op
])
1777 && REGNO (ops
[lreg
]) == REGNO (ops
[other_op
]))
1778 || rtx_equal_p (ops
[other_op
], ops
[lreg
]))
1782 /* Do not accept frame_pointer_rtx as any operand. */
1783 if (ops
[lreg
] == frame_pointer_rtx
|| ops
[rreg
] == frame_pointer_rtx
1784 || ops
[rval
] == frame_pointer_rtx
1785 || (other_op
>= 0 && ops
[other_op
] == frame_pointer_rtx
))
1789 && ! BASE_P (val_rtx
))
1792 /* Do not allow rx = rx + n if a normal add or sub with same size
1794 if (rtx_equal_p (ops
[lreg
], reg_rtx
)
1795 && GET_CODE (val_rtx
) == CONST_INT
1796 && (INTVAL (val_rtx
) <= 63 && INTVAL (val_rtx
) >= -63))
1799 /* Check allowed cases, like [r(+)?].[bwd] and const.
1800 A symbol is not allowed with PIC. */
1801 if (CONSTANT_P (val_rtx
))
1802 return flag_pic
== 0 || cris_symbol (val_rtx
) == 0;
1804 if (GET_CODE (val_rtx
) == MEM
1805 && BASE_OR_AUTOINCR_P (XEXP (val_rtx
, 0)))
1808 if (GET_CODE (val_rtx
) == SIGN_EXTEND
1809 && GET_CODE (XEXP (val_rtx
, 0)) == MEM
1810 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx
, 0), 0)))
1813 /* If we got here, it's not a valid addressing mode. */
1816 else if (code
== MULT
1817 || (code
== PLUS
&& BASE_P (val_rtx
)))
1819 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
1820 if (rtx_equal_p (ops
[lreg
], reg_rtx
)
1821 || (mult
== 1 && rtx_equal_p (ops
[lreg
], val_rtx
)))
1824 /* Do not allow bad multiply-values. */
1825 if (mult
!= 1 && mult
!= 2 && mult
!= 4)
1828 /* Only allow r + ... */
1829 if (! BASE_P (reg_rtx
))
1832 /* If we got here, all seems ok.
1833 (All checks need to be done above). */
1837 /* If we get here, the caller got its initial tests wrong. */
1838 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
1841 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
1842 does not handle the case where the IN operand is strict_low_part; it
1843 does handle it for X. Test-case in Axis-20010516. This function takes
1844 care of that for THIS port. FIXME: strict_low_part is going away
1848 cris_reg_overlap_mentioned_p (rtx x
, rtx in
)
1850 /* The function reg_overlap_mentioned now handles when X is
1851 strict_low_part, but not when IN is a STRICT_LOW_PART. */
1852 if (GET_CODE (in
) == STRICT_LOW_PART
)
1855 return reg_overlap_mentioned_p (x
, in
);
1858 /* The TARGET_ASM_NAMED_SECTION worker.
1859 We just dispatch to the functions for ELF and a.out. */
1862 cris_target_asm_named_section (const char *name
, unsigned int flags
,
1866 default_no_named_section (name
, flags
, decl
);
1868 default_elf_asm_named_section (name
, flags
, decl
);
1871 /* The LEGITIMATE_PIC_OPERAND_P worker. */
1874 cris_legitimate_pic_operand (rtx x
)
1876 /* The PIC representation of a symbol with a GOT entry will be (for
1877 example; relocations differ):
1878 sym => [rPIC+sym:GOT]
1879 and for a GOT-less symbol it will be (for example, relocation differ):
1880 sym => rPIC+sym:GOTOFF
1881 so only a symbol with a GOT is by itself a valid operand, and it
1882 can't be a sum of a symbol and an offset. */
1883 return ! cris_symbol (x
) || cris_got_symbol (x
);
1886 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1892 switch (GET_CODE (x
))
1899 if (XINT (x
, 1) == CRIS_UNSPEC_GOT
|| XINT (x
, 1) != CRIS_UNSPEC_PLT
)
1901 /* A PLT reference. */
1902 ASSERT_PLT_UNSPEC (x
);
1906 return cris_symbol (XEXP (x
, 0));
1910 return cris_symbol (XEXP (x
, 0)) || cris_symbol (XEXP (x
, 1));
1917 fatal_insn ("unrecognized supposed constant", x
);
1923 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1924 CONSTANT_P, and the symbol does not need a GOT entry. Also set
1925 current_function_uses_pic_offset_table if we're generating PIC and ever
1926 see something that would need one. */
1929 cris_gotless_symbol (rtx x
)
1931 #ifdef ENABLE_CHECKING
1936 switch (GET_CODE (x
))
1939 if (XINT (x
, 1) == CRIS_UNSPEC_GOT
)
1941 if (XINT (x
, 1) != CRIS_UNSPEC_PLT
)
1943 ASSERT_PLT_UNSPEC (x
);
1948 current_function_uses_pic_offset_table
= 1;
1949 return SYMBOL_REF_LOCAL_P (x
);
1952 /* We don't set current_function_uses_pic_offset_table for
1953 LABEL_REF:s in here, since they are almost always originating
1954 from some branch. The only time it does not come from a label is
1955 when GCC does something like __builtin_setjmp. Then we get the
1956 LABEL_REF from the movsi expander, so we mark it there as a
1961 return cris_gotless_symbol (XEXP (x
, 0));
1966 int x0
= cris_gotless_symbol (XEXP (x
, 0)) != 0;
1967 int x1
= cris_gotless_symbol (XEXP (x
, 1)) != 0;
1969 /* One and only one of them must be a local symbol. Neither must
1970 be some other, more general kind of symbol. */
1973 && ! (x0
== 0 && cris_symbol (XEXP (x
, 0)))
1974 && ! (x1
== 0 && cris_symbol (XEXP (x
, 1)));
1982 fatal_insn ("unrecognized supposed constant", x
);
1988 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1989 CONSTANT_P, and the symbol needs a GOT entry. */
1992 cris_got_symbol (rtx x
)
1994 #ifdef ENABLE_CHECKING
1999 switch (GET_CODE (x
))
2002 if (XINT (x
, 1) == CRIS_UNSPEC_GOT
)
2004 ASSERT_PLT_UNSPEC (x
);
2009 current_function_uses_pic_offset_table
= 1;
2010 return ! SYMBOL_REF_LOCAL_P (x
);
2013 return cris_got_symbol (XEXP (x
, 0));
2016 /* A LABEL_REF is never visible as a symbol outside the local
2020 /* Nope, can't access the GOT for "symbol + offset". */
2028 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2035 /* The OVERRIDE_OPTIONS worker.
2036 As is the norm, this also parses -mfoo=bar type parameters. */
2039 cris_override_options (void)
2041 if (cris_max_stackframe_str
)
2043 cris_max_stackframe
= atoi (cris_max_stackframe_str
);
2045 /* Do some sanity checking. */
2046 if (cris_max_stackframe
< 0 || cris_max_stackframe
> 0x20000000)
2047 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2048 cris_max_stackframe
, 0x20000000);
2051 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2052 if (TARGET_SVINTO
&& cris_cpu_version
< CRIS_CPU_SVINTO
)
2053 cris_cpu_version
= CRIS_CPU_SVINTO
;
2054 else if (TARGET_ETRAX4_ADD
&& cris_cpu_version
< CRIS_CPU_ETRAX4
)
2055 cris_cpu_version
= CRIS_CPU_ETRAX4
;
2057 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2061 = (*cris_cpu_str
== 'v' ? atoi (cris_cpu_str
+ 1) : -1);
2063 if (strcmp ("etrax4", cris_cpu_str
) == 0)
2064 cris_cpu_version
= 3;
2066 if (strcmp ("svinto", cris_cpu_str
) == 0
2067 || strcmp ("etrax100", cris_cpu_str
) == 0)
2068 cris_cpu_version
= 8;
2070 if (strcmp ("ng", cris_cpu_str
) == 0
2071 || strcmp ("etrax100lx", cris_cpu_str
) == 0)
2072 cris_cpu_version
= 10;
2074 if (cris_cpu_version
< 0 || cris_cpu_version
> 10)
2075 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2078 /* Set the target flags. */
2079 if (cris_cpu_version
>= CRIS_CPU_ETRAX4
)
2080 target_flags
|= TARGET_MASK_ETRAX4_ADD
;
2082 /* If this is Svinto or higher, align for 32 bit accesses. */
2083 if (cris_cpu_version
>= CRIS_CPU_SVINTO
)
2085 |= (TARGET_MASK_SVINTO
| TARGET_MASK_ALIGN_BY_32
2086 | TARGET_MASK_STACK_ALIGN
| TARGET_MASK_CONST_ALIGN
2087 | TARGET_MASK_DATA_ALIGN
);
2089 /* Note that we do not add new flags when it can be completely
2090 described with a macro that uses -mcpu=X. So
2091 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2097 = (*cris_tune_str
== 'v' ? atoi (cris_tune_str
+ 1) : -1);
2099 if (strcmp ("etrax4", cris_tune_str
) == 0)
2102 if (strcmp ("svinto", cris_tune_str
) == 0
2103 || strcmp ("etrax100", cris_tune_str
) == 0)
2106 if (strcmp ("ng", cris_tune_str
) == 0
2107 || strcmp ("etrax100lx", cris_tune_str
) == 0)
2110 if (cris_tune
< 0 || cris_tune
> 10)
2111 error ("unknown CRIS cpu version specification in -mtune= : %s",
2114 if (cris_tune
>= CRIS_CPU_SVINTO
)
2115 /* We have currently nothing more to tune than alignment for
2118 |= (TARGET_MASK_STACK_ALIGN
| TARGET_MASK_CONST_ALIGN
2119 | TARGET_MASK_DATA_ALIGN
| TARGET_MASK_ALIGN_BY_32
);
2124 /* Use error rather than warning, so invalid use is easily
2125 detectable. Still change to the values we expect, to avoid
2129 error ("-fPIC and -fpic are not supported in this configuration");
2133 /* Turn off function CSE. We need to have the addresses reach the
2134 call expanders to get PLT-marked, as they could otherwise be
2135 compared against zero directly or indirectly. After visiting the
2136 call expanders they will then be cse:ed, as the call expanders
2137 force_reg the addresses, effectively forcing flag_no_function_cse
2139 flag_no_function_cse
= 1;
2142 if (write_symbols
== DWARF2_DEBUG
&& ! TARGET_ELF
)
2144 warning ("that particular -g option is invalid with -maout and -melinux");
2145 write_symbols
= DBX_DEBUG
;
2148 /* Set the per-function-data initializer. */
2149 init_machine_status
= cris_init_machine_status
;
2152 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2155 cris_asm_output_mi_thunk (FILE *stream
,
2156 tree thunkdecl ATTRIBUTE_UNUSED
,
2157 HOST_WIDE_INT delta
,
2158 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED
,
2162 fprintf (stream
, "\tadd%s " HOST_WIDE_INT_PRINT_DEC
",$%s\n",
2163 ADDITIVE_SIZE_MODIFIER (delta
), delta
,
2164 reg_names
[CRIS_FIRST_ARG_REG
]);
2166 fprintf (stream
, "\tsub%s " HOST_WIDE_INT_PRINT_DEC
",$%s\n",
2167 ADDITIVE_SIZE_MODIFIER (-delta
), -delta
,
2168 reg_names
[CRIS_FIRST_ARG_REG
]);
2172 const char *name
= XSTR (XEXP (DECL_RTL (funcdecl
), 0), 0);
2174 name
= (* targetm
.strip_name_encoding
) (name
);
2175 fprintf (stream
, "add.d ");
2176 assemble_name (stream
, name
);
2177 fprintf (stream
, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX
);
2181 fprintf (stream
, "jump ");
2182 assemble_name (stream
, XSTR (XEXP (DECL_RTL (funcdecl
), 0), 0));
2183 fprintf (stream
, "\n");
2187 /* Boilerplate emitted at start of file.
2189 NO_APP *only at file start* means faster assembly. It also means
2190 comments are not allowed. In some cases comments will be output
2191 for debugging purposes. Make sure they are allowed then.
2193 We want a .file directive only if TARGET_ELF. */
2195 cris_file_start (void)
2197 /* These expressions can vary at run time, so we cannot put
2198 them into TARGET_INITIALIZER. */
2199 targetm
.file_start_app_off
= !(TARGET_PDEBUG
|| flag_print_asm_name
);
2200 targetm
.file_start_file_directive
= TARGET_ELF
;
2202 default_file_start ();
2205 /* Rename the function calls for integer multiply and divide. */
2207 cris_init_libfuncs (void)
2209 set_optab_libfunc (smul_optab
, SImode
, "__Mul");
2210 set_optab_libfunc (sdiv_optab
, SImode
, "__Div");
2211 set_optab_libfunc (udiv_optab
, SImode
, "__Udiv");
2212 set_optab_libfunc (smod_optab
, SImode
, "__Mod");
2213 set_optab_libfunc (umod_optab
, SImode
, "__Umod");
2216 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2220 cris_init_expanders (void)
2222 /* Nothing here at the moment. */
2225 /* Zero initialization is OK for all current fields. */
2227 static struct machine_function
*
2228 cris_init_machine_status (void)
2230 return ggc_alloc_cleared (sizeof (struct machine_function
));
2233 /* Split a 2 word move (DI or presumably DF) into component parts.
2234 Originally a copy of gen_split_move_double in m32r.c. */
2237 cris_split_movdx (rtx
*operands
)
2239 enum machine_mode mode
= GET_MODE (operands
[0]);
2240 rtx dest
= operands
[0];
2241 rtx src
= operands
[1];
2244 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2245 longer happen; after reload there are no SUBREGs any more, and we're
2246 only called after reload. */
2247 if (GET_CODE (dest
) == SUBREG
|| GET_CODE (src
) == SUBREG
)
2251 if (GET_CODE (dest
) == REG
)
2253 int dregno
= REGNO (dest
);
2255 /* Reg-to-reg copy. */
2256 if (GET_CODE (src
) == REG
)
2258 int sregno
= REGNO (src
);
2260 int reverse
= (dregno
== sregno
+ 1);
2262 /* We normally copy the low-numbered register first. However, if
2263 the first register operand 0 is the same as the second register of
2264 operand 1, we must copy in the opposite order. */
2265 emit_insn (gen_rtx_SET (VOIDmode
,
2266 operand_subword (dest
, reverse
, TRUE
, mode
),
2267 operand_subword (src
, reverse
, TRUE
, mode
)));
2269 emit_insn (gen_rtx_SET (VOIDmode
,
2270 operand_subword (dest
, !reverse
, TRUE
, mode
),
2271 operand_subword (src
, !reverse
, TRUE
, mode
)));
2273 /* Constant-to-reg copy. */
2274 else if (GET_CODE (src
) == CONST_INT
|| GET_CODE (src
) == CONST_DOUBLE
)
2277 split_double (src
, &words
[0], &words
[1]);
2278 emit_insn (gen_rtx_SET (VOIDmode
,
2279 operand_subword (dest
, 0, TRUE
, mode
),
2282 emit_insn (gen_rtx_SET (VOIDmode
,
2283 operand_subword (dest
, 1, TRUE
, mode
),
2286 /* Mem-to-reg copy. */
2287 else if (GET_CODE (src
) == MEM
)
2289 /* If the high-address word is used in the address, we must load it
2290 last. Otherwise, load it first. */
2291 rtx addr
= XEXP (src
, 0);
2293 = (refers_to_regno_p (dregno
, dregno
+ 1, addr
, NULL
) != 0);
2295 /* The original code implies that we can't do
2296 move.x [rN+],rM move.x [rN],rM+1
2297 when rN is dead, because of REG_NOTES damage. That is
2298 consistent with what I've seen, so don't try it.
2300 We have two different cases here; if the addr is POST_INC,
2301 just pass it through, otherwise add constants. */
2303 if (GET_CODE (addr
) == POST_INC
)
2305 emit_insn (gen_rtx_SET (VOIDmode
,
2306 operand_subword (dest
, 0, TRUE
, mode
),
2307 change_address (src
, SImode
, addr
)));
2308 emit_insn (gen_rtx_SET (VOIDmode
,
2309 operand_subword (dest
, 1, TRUE
, mode
),
2310 change_address (src
, SImode
, addr
)));
2314 /* Make sure we don't get any other addresses with
2315 embedded postincrements. They should be stopped in
2316 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2318 if (side_effects_p (addr
))
2319 fatal_insn ("unexpected side-effects in address", addr
);
2321 emit_insn (gen_rtx_SET
2323 operand_subword (dest
, reverse
, TRUE
, mode
),
2326 plus_constant (addr
,
2327 reverse
* UNITS_PER_WORD
))));
2328 emit_insn (gen_rtx_SET
2330 operand_subword (dest
, ! reverse
, TRUE
, mode
),
2333 plus_constant (addr
,
2341 /* Reg-to-mem copy or clear mem. */
2342 else if (GET_CODE (dest
) == MEM
2343 && (GET_CODE (src
) == REG
2344 || src
== const0_rtx
2345 || src
== CONST0_RTX (DFmode
)))
2347 rtx addr
= XEXP (dest
, 0);
2349 if (GET_CODE (addr
) == POST_INC
)
2351 emit_insn (gen_rtx_SET (VOIDmode
,
2352 change_address (dest
, SImode
, addr
),
2353 operand_subword (src
, 0, TRUE
, mode
)));
2354 emit_insn (gen_rtx_SET (VOIDmode
,
2355 change_address (dest
, SImode
, addr
),
2356 operand_subword (src
, 1, TRUE
, mode
)));
2360 /* Make sure we don't get any other addresses with embedded
2361 postincrements. They should be stopped in
2362 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2363 if (side_effects_p (addr
))
2364 fatal_insn ("unexpected side-effects in address", addr
);
2366 emit_insn (gen_rtx_SET
2368 change_address (dest
, SImode
, addr
),
2369 operand_subword (src
, 0, TRUE
, mode
)));
2371 emit_insn (gen_rtx_SET
2373 change_address (dest
, SImode
,
2374 plus_constant (addr
,
2376 operand_subword (src
, 1, TRUE
, mode
)));
2388 /* The expander for the prologue pattern name. */
2391 cris_expand_prologue (void)
2394 int size
= get_frame_size ();
2395 /* Shorten the used name for readability. */
2396 int cfoa_size
= current_function_outgoing_args_size
;
2397 int last_movem_reg
= -1;
2400 int return_address_on_stack
= cris_return_address_on_stack ();
2401 int got_really_used
= current_function_uses_pic_offset_table
;
2402 int n_movem_regs
= 0;
2403 int pretend
= current_function_pretend_args_size
;
2405 /* Don't do anything if no prologues or epilogues are wanted. */
2406 if (!TARGET_PROLOGUE_EPILOGUE
)
2412 /* Align the size to what's best for the CPU model. */
2413 if (TARGET_STACK_ALIGN
)
2414 size
= TARGET_ALIGN_BY_32
? (size
+ 3) & ~3 : (size
+ 1) & ~1;
2418 /* See also cris_setup_incoming_varargs where
2419 cfun->machine->stdarg_regs is set. There are other setters of
2420 current_function_pretend_args_size than stdarg handling, like
2421 for an argument passed with parts in R13 and stack. We must
2422 not store R13 into the pretend-area for that case, as GCC does
2423 that itself. "Our" store would be marked as redundant and GCC
2424 will attempt to remove it, which will then be flagged as an
2425 internal error; trying to remove a frame-related insn. */
2426 int stdarg_regs
= cfun
->machine
->stdarg_regs
;
2428 framesize
+= pretend
;
2430 for (regno
= CRIS_FIRST_ARG_REG
+ CRIS_MAX_ARGS_IN_REGS
- 1;
2432 regno
--, pretend
-= 4, stdarg_regs
--)
2434 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2436 plus_constant (stack_pointer_rtx
,
2438 /* FIXME: When dwarf2 frame output and unless asynchronous
2439 exceptions, make dwarf2 bundle together all stack
2440 adjustments like it does for registers between stack
2442 RTX_FRAME_RELATED_P (insn
) = 1;
2444 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2445 set_mem_alias_set (mem
, get_varargs_alias_set ());
2446 insn
= emit_move_insn (mem
, gen_rtx_raw_REG (SImode
, regno
));
2448 /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
2449 the value isn't restored, so we don't want to tell dwarf2
2450 that it's been stored to stack, else EH handling info would
2454 /* For other setters of current_function_pretend_args_size, we
2455 just adjust the stack by leaving the remaining size in
2456 "pretend", handled below. */
2459 /* Save SRP if not a leaf function. */
2460 if (return_address_on_stack
)
2462 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2464 plus_constant (stack_pointer_rtx
,
2467 RTX_FRAME_RELATED_P (insn
) = 1;
2469 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2470 set_mem_alias_set (mem
, get_frame_alias_set ());
2471 insn
= emit_move_insn (mem
, gen_rtx_raw_REG (SImode
, CRIS_SRP_REGNUM
));
2472 RTX_FRAME_RELATED_P (insn
) = 1;
2476 /* Set up the frame pointer, if needed. */
2477 if (frame_pointer_needed
)
2479 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2481 plus_constant (stack_pointer_rtx
,
2484 RTX_FRAME_RELATED_P (insn
) = 1;
2486 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2487 set_mem_alias_set (mem
, get_frame_alias_set ());
2488 insn
= emit_move_insn (mem
, frame_pointer_rtx
);
2489 RTX_FRAME_RELATED_P (insn
) = 1;
2491 insn
= emit_move_insn (frame_pointer_rtx
, stack_pointer_rtx
);
2492 RTX_FRAME_RELATED_P (insn
) = 1;
2497 /* Between frame-pointer and saved registers lie the area for local
2498 variables. If we get here with "pretended" size remaining, count
2499 it into the general stack size. */
2502 /* Get a contiguous sequence of registers, starting with R0, that need
2504 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2506 if (cris_reg_saved_in_regsave_area (regno
, got_really_used
))
2510 /* Check if movem may be used for registers so far. */
2511 if (regno
== last_movem_reg
+ 1)
2512 /* Yes, update next expected register. */
2513 last_movem_reg
= regno
;
2516 /* We cannot use movem for all registers. We have to flush
2517 any movem:ed registers we got so far. */
2518 if (last_movem_reg
!= -1)
2521 = (n_movem_regs
== 1) ? 1 : last_movem_reg
+ 1;
2523 /* It is a win to use a side-effect assignment for
2524 64 <= size <= 128. But side-effect on movem was
2525 not usable for CRIS v0..3. Also only do it if
2526 side-effects insns are allowed. */
2527 if ((last_movem_reg
+ 1) * 4 + size
>= 64
2528 && (last_movem_reg
+ 1) * 4 + size
<= 128
2529 && (cris_cpu_version
>= CRIS_CPU_SVINTO
|| n_saved
== 1)
2530 && TARGET_SIDE_EFFECT_PREFIXES
)
2533 = gen_rtx_MEM (SImode
,
2534 plus_constant (stack_pointer_rtx
,
2535 -(n_saved
* 4 + size
)));
2536 set_mem_alias_set (mem
, get_frame_alias_set ());
2538 = cris_emit_movem_store (mem
, GEN_INT (n_saved
),
2539 -(n_saved
* 4 + size
),
2545 = gen_rtx_SET (VOIDmode
,
2547 plus_constant (stack_pointer_rtx
,
2548 -(n_saved
* 4 + size
)));
2549 insn
= emit_insn (insn
);
2550 RTX_FRAME_RELATED_P (insn
) = 1;
2552 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2553 set_mem_alias_set (mem
, get_frame_alias_set ());
2554 insn
= cris_emit_movem_store (mem
, GEN_INT (n_saved
),
2558 framesize
+= n_saved
* 4 + size
;
2559 last_movem_reg
= -1;
2563 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2565 plus_constant (stack_pointer_rtx
,
2567 RTX_FRAME_RELATED_P (insn
) = 1;
2569 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2570 set_mem_alias_set (mem
, get_frame_alias_set ());
2571 insn
= emit_move_insn (mem
, gen_rtx_raw_REG (SImode
, regno
));
2572 RTX_FRAME_RELATED_P (insn
) = 1;
2574 framesize
+= 4 + size
;
2580 /* Check after, if we could movem all registers. This is the normal case. */
2581 if (last_movem_reg
!= -1)
2584 = (n_movem_regs
== 1) ? 1 : last_movem_reg
+ 1;
2586 /* Side-effect on movem was not usable for CRIS v0..3. Also only
2587 do it if side-effects insns are allowed. */
2588 if ((last_movem_reg
+ 1) * 4 + size
>= 64
2589 && (last_movem_reg
+ 1) * 4 + size
<= 128
2590 && (cris_cpu_version
>= CRIS_CPU_SVINTO
|| n_saved
== 1)
2591 && TARGET_SIDE_EFFECT_PREFIXES
)
2594 = gen_rtx_MEM (SImode
,
2595 plus_constant (stack_pointer_rtx
,
2596 -(n_saved
* 4 + size
)));
2597 set_mem_alias_set (mem
, get_frame_alias_set ());
2598 insn
= cris_emit_movem_store (mem
, GEN_INT (n_saved
),
2599 -(n_saved
* 4 + size
), true);
2604 = gen_rtx_SET (VOIDmode
,
2606 plus_constant (stack_pointer_rtx
,
2607 -(n_saved
* 4 + size
)));
2608 insn
= emit_insn (insn
);
2609 RTX_FRAME_RELATED_P (insn
) = 1;
2611 mem
= gen_rtx_MEM (SImode
, stack_pointer_rtx
);
2612 set_mem_alias_set (mem
, get_frame_alias_set ());
2613 insn
= cris_emit_movem_store (mem
, GEN_INT (n_saved
), 0, true);
2616 framesize
+= n_saved
* 4 + size
;
2617 /* We have to put outgoing argument space after regs. */
2620 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2622 plus_constant (stack_pointer_rtx
,
2624 RTX_FRAME_RELATED_P (insn
) = 1;
2625 framesize
+= cfoa_size
;
2628 else if ((size
+ cfoa_size
) > 0)
2630 insn
= emit_insn (gen_rtx_SET (VOIDmode
,
2632 plus_constant (stack_pointer_rtx
,
2633 -(cfoa_size
+ size
))));
2634 RTX_FRAME_RELATED_P (insn
) = 1;
2635 framesize
+= size
+ cfoa_size
;
2638 /* Set up the PIC register, if it is used. */
2639 if (got_really_used
)
2642 = gen_rtx_UNSPEC (SImode
, gen_rtvec (1, const0_rtx
), CRIS_UNSPEC_GOT
);
2643 emit_move_insn (pic_offset_table_rtx
, got
);
2645 /* FIXME: This is a cover-up for flow2 messing up; it doesn't
2646 follow exceptional paths and tries to delete the GOT load as
2647 unused, if it isn't used on the non-exceptional paths. Other
2648 ports have similar or other cover-ups, or plain bugs marking
2649 the GOT register load as maybe-dead. To see this, remove the
2650 line below and try libsupc++/vec.cc or a trivial
2651 "static void y (); void x () {try {y ();} catch (...) {}}". */
2652 emit_insn (gen_rtx_USE (VOIDmode
, pic_offset_table_rtx
));
2655 if (cris_max_stackframe
&& framesize
> cris_max_stackframe
)
2656 warning ("stackframe too big: %d bytes", framesize
);
2659 /* The expander for the epilogue pattern. */
2662 cris_expand_epilogue (void)
2665 int size
= get_frame_size ();
2666 int last_movem_reg
= -1;
2667 int argspace_offset
= current_function_outgoing_args_size
;
2668 int pretend
= current_function_pretend_args_size
;
2670 bool return_address_on_stack
= cris_return_address_on_stack ();
2671 /* A reference may have been optimized out
2672 (like the abort () in fde_split in unwind-dw2-fde.c, at least 3.2.1)
2673 so check that it's still used. */
2674 int got_really_used
= current_function_uses_pic_offset_table
;
2675 int n_movem_regs
= 0;
2677 if (!TARGET_PROLOGUE_EPILOGUE
)
2680 /* Align byte count of stack frame. */
2681 if (TARGET_STACK_ALIGN
)
2682 size
= TARGET_ALIGN_BY_32
? (size
+ 3) & ~3 : (size
+ 1) & ~1;
2684 /* Check how many saved regs we can movem. They start at r0 and must
2687 regno
< FIRST_PSEUDO_REGISTER
;
2689 if (cris_reg_saved_in_regsave_area (regno
, got_really_used
))
2693 if (regno
== last_movem_reg
+ 1)
2694 last_movem_reg
= regno
;
2699 /* If there was only one register that really needed to be saved
2700 through movem, don't use movem. */
2701 if (n_movem_regs
== 1)
2702 last_movem_reg
= -1;
2704 /* Now emit "normal" move insns for all regs higher than the movem
2706 for (regno
= FIRST_PSEUDO_REGISTER
- 1;
2707 regno
> last_movem_reg
;
2709 if (cris_reg_saved_in_regsave_area (regno
, got_really_used
))
2711 if (argspace_offset
)
2713 /* There is an area for outgoing parameters located before
2714 the saved registers. We have to adjust for that. */
2715 emit_insn (gen_rtx_SET (VOIDmode
,
2717 plus_constant (stack_pointer_rtx
,
2719 /* Make sure we only do this once. */
2720 argspace_offset
= 0;
2723 mem
= gen_rtx_MEM (SImode
, gen_rtx_POST_INC (SImode
,
2724 stack_pointer_rtx
));
2725 set_mem_alias_set (mem
, get_frame_alias_set ());
2726 emit_move_insn (gen_rtx_raw_REG (SImode
, regno
), mem
);
2729 /* If we have any movem-restore, do it now. */
2730 if (last_movem_reg
!= -1)
2732 if (argspace_offset
)
2734 emit_insn (gen_rtx_SET (VOIDmode
,
2736 plus_constant (stack_pointer_rtx
,
2738 argspace_offset
= 0;
2741 mem
= gen_rtx_MEM (SImode
,
2742 gen_rtx_POST_INC (SImode
, stack_pointer_rtx
));
2743 set_mem_alias_set (mem
, get_frame_alias_set ());
2744 emit_insn (cris_gen_movem_load (mem
, GEN_INT (last_movem_reg
+ 1), 0));
2747 /* If we don't clobber all of the allocated stack area (we've already
2748 deallocated saved registers), GCC might want to schedule loads from
2749 the stack to *after* the stack-pointer restore, which introduces an
2750 interrupt race condition. This happened for the initial-value
2751 SRP-restore for g++.dg/eh/registers1.C (noticed by inspection of
2752 other failure for that test). It also happened for the stack slot
2753 for the return value in (one version of)
2754 linux/fs/dcache.c:__d_lookup, at least with "-O2
2755 -fno-omit-frame-pointer". */
2757 /* Restore frame pointer if necessary. */
2758 if (frame_pointer_needed
)
2760 emit_insn (gen_cris_frame_deallocated_barrier ());
2762 emit_move_insn (stack_pointer_rtx
, frame_pointer_rtx
);
2763 mem
= gen_rtx_MEM (SImode
, gen_rtx_POST_INC (SImode
,
2764 stack_pointer_rtx
));
2765 set_mem_alias_set (mem
, get_frame_alias_set ());
2766 emit_move_insn (frame_pointer_rtx
, mem
);
2768 else if ((size
+ argspace_offset
) != 0)
2770 emit_insn (gen_cris_frame_deallocated_barrier ());
2772 /* If there was no frame-pointer to restore sp from, we must
2773 explicitly deallocate local variables. */
2775 /* Handle space for outgoing parameters that hasn't been handled
2777 size
+= argspace_offset
;
2779 emit_insn (gen_rtx_SET (VOIDmode
,
2781 plus_constant (stack_pointer_rtx
, size
)));
2784 /* If this function has no pushed register parameters
2785 (stdargs/varargs), and if it is not a leaf function, then we have
2786 the return address on the stack. */
2787 if (return_address_on_stack
&& pretend
== 0)
2789 if (current_function_calls_eh_return
)
2792 rtx srpreg
= gen_rtx_raw_REG (SImode
, CRIS_SRP_REGNUM
);
2793 mem
= gen_rtx_MEM (SImode
,
2794 gen_rtx_POST_INC (SImode
,
2795 stack_pointer_rtx
));
2796 set_mem_alias_set (mem
, get_frame_alias_set ());
2797 emit_move_insn (srpreg
, mem
);
2799 emit_insn (gen_addsi3 (stack_pointer_rtx
,
2801 gen_rtx_raw_REG (SImode
,
2802 CRIS_STACKADJ_REG
)));
2803 cris_expand_return (false);
2806 cris_expand_return (true);
2811 /* If we pushed some register parameters, then adjust the stack for
2815 /* If SRP is stored on the way, we need to restore it first. */
2816 if (return_address_on_stack
)
2819 rtx srpreg
= gen_rtx_raw_REG (SImode
, CRIS_SRP_REGNUM
);
2820 mem
= gen_rtx_MEM (SImode
,
2821 gen_rtx_POST_INC (SImode
,
2822 stack_pointer_rtx
));
2823 set_mem_alias_set (mem
, get_frame_alias_set ());
2824 emit_move_insn (srpreg
, mem
);
2827 emit_insn (gen_rtx_SET (VOIDmode
,
2829 plus_constant (stack_pointer_rtx
, pretend
)));
2832 /* Perform the "physical" unwinding that the EH machinery calculated. */
2833 if (current_function_calls_eh_return
)
2834 emit_insn (gen_addsi3 (stack_pointer_rtx
,
2836 gen_rtx_raw_REG (SImode
,
2837 CRIS_STACKADJ_REG
)));
2838 cris_expand_return (false);
2841 /* Worker function for generating movem from mem for load_multiple. */
2844 cris_gen_movem_load (rtx src
, rtx nregs_rtx
, int nprefix
)
2846 int nregs
= INTVAL (nregs_rtx
);
2850 rtx srcreg
= XEXP (src
, 0);
2851 unsigned int regno
= nregs
- 1;
2854 if (GET_CODE (srcreg
) == POST_INC
)
2855 srcreg
= XEXP (srcreg
, 0);
2857 if (!REG_P (srcreg
))
2860 /* Don't use movem for just one insn. The insns are equivalent except
2861 for the pipeline hazard (on v32); movem does not forward the loaded
2862 registers so there's a three cycles penalty for their use. */
2864 return gen_movsi (gen_rtx_REG (SImode
, 0), src
);
2866 vec
= rtvec_alloc (nprefix
+ nregs
2867 + (GET_CODE (XEXP (src
, 0)) == POST_INC
));
2869 if (GET_CODE (XEXP (src
, 0)) == POST_INC
)
2871 RTVEC_ELT (vec
, nprefix
+ 1)
2872 = gen_rtx_SET (VOIDmode
, srcreg
, plus_constant (srcreg
, nregs
* 4));
2876 src
= replace_equiv_address (src
, srcreg
);
2877 RTVEC_ELT (vec
, nprefix
)
2878 = gen_rtx_SET (VOIDmode
, gen_rtx_REG (SImode
, regno
), src
);
2881 for (i
= 1; i
< nregs
; i
++, eltno
++)
2883 RTVEC_ELT (vec
, nprefix
+ eltno
)
2884 = gen_rtx_SET (VOIDmode
, gen_rtx_REG (SImode
, regno
),
2885 adjust_address_nv (src
, SImode
, i
* 4));
2889 return gen_rtx_PARALLEL (VOIDmode
, vec
);
2892 /* Worker function for generating movem to mem. If FRAME_RELATED, notes
2893 are added that the dwarf2 machinery understands. */
2896 cris_emit_movem_store (rtx dest
, rtx nregs_rtx
, int increment
,
2899 int nregs
= INTVAL (nregs_rtx
);
2904 rtx destreg
= XEXP (dest
, 0);
2905 unsigned int regno
= nregs
- 1;
2908 if (GET_CODE (destreg
) == POST_INC
)
2909 increment
+= nregs
* 4;
2911 if (GET_CODE (destreg
) == POST_INC
|| GET_CODE (destreg
) == PLUS
)
2912 destreg
= XEXP (destreg
, 0);
2914 if (!REG_P (destreg
))
2917 /* Don't use movem for just one insn. The insns are equivalent except
2918 for the pipeline hazard (on v32); movem does not forward the loaded
2919 registers so there's a three cycles penalty for use. */
2922 rtx mov
= gen_rtx_SET (VOIDmode
, dest
, gen_rtx_REG (SImode
, 0));
2926 insn
= emit_insn (mov
);
2928 RTX_FRAME_RELATED_P (insn
) = 1;
2932 /* If there was a request for a side-effect, create the ordinary
2934 vec
= rtvec_alloc (2);
2936 RTVEC_ELT (vec
, 0) = mov
;
2937 RTVEC_ELT (vec
, 1) = gen_rtx_SET (VOIDmode
, destreg
,
2938 plus_constant (destreg
, increment
));
2941 RTX_FRAME_RELATED_P (mov
) = 1;
2942 RTX_FRAME_RELATED_P (RTVEC_ELT (vec
, 1)) = 1;
2947 vec
= rtvec_alloc (nregs
+ (increment
!= 0 ? 1 : 0));
2949 = gen_rtx_SET (VOIDmode
,
2950 replace_equiv_address (dest
,
2951 plus_constant (destreg
,
2953 gen_rtx_REG (SImode
, regno
));
2956 /* The dwarf2 info wants this mark on each component in a parallel
2957 that's part of the prologue (though it's optional on the first
2960 RTX_FRAME_RELATED_P (RTVEC_ELT (vec
, 0)) = 1;
2965 = gen_rtx_SET (VOIDmode
, destreg
,
2966 plus_constant (destreg
,
2968 ? increment
: nregs
* 4));
2972 RTX_FRAME_RELATED_P (RTVEC_ELT (vec
, 1)) = 1;
2974 /* Don't call adjust_address_nv on a post-incremented address if
2976 if (GET_CODE (XEXP (dest
, 0)) == POST_INC
)
2977 dest
= replace_equiv_address (dest
, destreg
);
2980 for (i
= 1; i
< nregs
; i
++, eltno
++)
2982 RTVEC_ELT (vec
, eltno
)
2983 = gen_rtx_SET (VOIDmode
, adjust_address_nv (dest
, SImode
, i
* 4),
2984 gen_rtx_REG (SImode
, regno
));
2986 RTX_FRAME_RELATED_P (RTVEC_ELT (vec
, eltno
)) = 1;
2991 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, vec
));
2993 /* Because dwarf2out.c handles the insns in a parallel as a sequence,
2994 we need to keep the stack adjustment separate, after the
2995 MEM-setters. Else the stack-adjustment in the second component of
2996 the parallel would be mishandled; the offsets for the SETs that
2997 follow it would be wrong. We prepare for this by adding a
2998 REG_FRAME_RELATED_EXPR with the MEM-setting parts in a SEQUENCE
2999 followed by the increment. Note that we have FRAME_RELATED_P on
3000 all the SETs, including the original stack adjustment SET in the
3006 rtx seq
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (nregs
+ 1));
3007 XVECEXP (seq
, 0, 0) = XVECEXP (PATTERN (insn
), 0, 0);
3008 for (i
= 1; i
< nregs
; i
++)
3009 XVECEXP (seq
, 0, i
) = XVECEXP (PATTERN (insn
), 0, i
+ 1);
3010 XVECEXP (seq
, 0, nregs
) = XVECEXP (PATTERN (insn
), 0, 1);
3012 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
, seq
,
3016 RTX_FRAME_RELATED_P (insn
) = 1;
3022 /* Use from within code, from e.g. PRINT_OPERAND and
3023 PRINT_OPERAND_ADDRESS. Macros used in output_addr_const need to emit
3024 different things depending on whether code operand or constant is
3028 cris_output_addr_const (FILE *file
, rtx x
)
3031 output_addr_const (file
, x
);
3035 /* Worker function for ASM_OUTPUT_SYMBOL_REF. */
3038 cris_asm_output_symbol_ref (FILE *file
, rtx x
)
3040 if (flag_pic
&& in_code
> 0)
3042 const char *origstr
= XSTR (x
, 0);
3045 str
= (* targetm
.strip_name_encoding
) (origstr
);
3047 if (cris_gotless_symbol (x
))
3049 if (! cris_pic_sympart_only
)
3050 fprintf (file
, "$%s+", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
3051 assemble_name (file
, str
);
3052 fprintf (file
, ":GOTOFF");
3054 else if (cris_got_symbol (x
))
3056 if (cris_pic_sympart_only
)
3058 fprintf (file
, "[$%s+", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
3059 assemble_name (file
, XSTR (x
, 0));
3062 fprintf (file
, ":GOT16]");
3064 fprintf (file
, ":GOT]");
3067 LOSE_AND_RETURN ("unexpected PIC symbol", x
);
3070 if (! current_function_uses_pic_offset_table
)
3071 output_operand_lossage ("PIC register isn't set up");
3074 assemble_name (file
, XSTR (x
, 0));
3077 /* Worker function for ASM_OUTPUT_LABEL_REF. */
3080 cris_asm_output_label_ref (FILE *file
, char *buf
)
3082 if (flag_pic
&& in_code
> 0)
3084 if (! cris_pic_sympart_only
)
3085 fprintf (file
, "$%s+", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
3086 assemble_name (file
, buf
);
3088 fprintf (file
, ":GOTOFF");
3091 if (! current_function_uses_pic_offset_table
)
3092 internal_error ("emitting PIC operand, but PIC register isn't set up");
3095 assemble_name (file
, buf
);
3098 /* Worker function for OUTPUT_ADDR_CONST_EXTRA. */
3101 cris_output_addr_const_extra (FILE *file
, rtx x
)
3103 switch (GET_CODE (x
))
3105 const char *origstr
;
3109 ASSERT_PLT_UNSPEC (x
);
3110 x
= XVECEXP (x
, 0, 0);
3111 origstr
= XSTR (x
, 0);
3112 str
= (* targetm
.strip_name_encoding
) (origstr
);
3113 if (cris_pic_sympart_only
)
3115 assemble_name (file
, str
);
3116 fprintf (file
, ":PLTG");
3120 if (TARGET_AVOID_GOTPLT
)
3121 /* We shouldn't get here. */
3124 fprintf (file
, "[$%s+", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
3125 assemble_name (file
, XSTR (x
, 0));
3128 fprintf (file
, ":GOTPLT16]");
3130 fprintf (file
, ":GOTPLT]");
3139 /* Worker function for TARGET_STRUCT_VALUE_RTX. */
3142 cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED
,
3143 int incoming ATTRIBUTE_UNUSED
)
3145 return gen_rtx_REG (Pmode
, CRIS_STRUCT_VALUE_REGNUM
);
3148 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3151 cris_setup_incoming_varargs (CUMULATIVE_ARGS
*ca
,
3152 enum machine_mode mode ATTRIBUTE_UNUSED
,
3153 tree type ATTRIBUTE_UNUSED
,
3154 int *pretend_arg_size
,
3157 if (ca
->regs
< CRIS_MAX_ARGS_IN_REGS
)
3159 int stdarg_regs
= CRIS_MAX_ARGS_IN_REGS
- ca
->regs
;
3160 cfun
->machine
->stdarg_regs
= stdarg_regs
;
3161 *pretend_arg_size
= stdarg_regs
* 4;
3165 fprintf (asm_out_file
,
3166 "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
3167 ca
->regs
, *pretend_arg_size
, second_time
);
3170 /* Return true if TYPE must be passed by invisible reference.
3171 For cris, we pass <= 8 bytes by value, others by reference. */
3174 cris_pass_by_reference (CUMULATIVE_ARGS
*ca ATTRIBUTE_UNUSED
,
3175 enum machine_mode mode
, tree type
,
3176 bool named ATTRIBUTE_UNUSED
)
3178 return (targetm
.calls
.must_pass_in_stack (mode
, type
)
3179 || CRIS_FUNCTION_ARG_SIZE (mode
, type
) > 8);
3184 cris_arg_partial_bytes (CUMULATIVE_ARGS
*ca
, enum machine_mode mode
,
3185 tree type
, bool named ATTRIBUTE_UNUSED
)
3187 if (ca
->regs
== CRIS_MAX_ARGS_IN_REGS
- 1
3188 && !targetm
.calls
.must_pass_in_stack (mode
, type
)
3189 && CRIS_FUNCTION_ARG_SIZE (mode
, type
) > 4
3190 && CRIS_FUNCTION_ARG_SIZE (mode
, type
) <= 8)
3191 return UNITS_PER_WORD
;
3196 /* Worker function for TARGET_MD_ASM_CLOBBERS. */
3199 cris_md_asm_clobbers (tree outputs
, tree inputs
, tree clobbers
)
3201 HARD_REG_SET mof_set
;
3204 CLEAR_HARD_REG_SET (mof_set
);
3205 SET_HARD_REG_BIT (mof_set
, CRIS_MOF_REGNUM
);
3207 for (t
= outputs
; t
!= NULL
; t
= TREE_CHAIN (t
))
3209 tree val
= TREE_VALUE (t
);
3211 /* The constraint letter for the singleton register class of MOF
3212 is 'h'. If it's mentioned in the constraints, the asm is
3213 MOF-aware and adding it to the clobbers would cause it to have
3214 impossible constraints. */
3215 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t
))),
3217 || decl_overlaps_hard_reg_set_p (val
, mof_set
))
3221 for (t
= inputs
; t
!= NULL
; t
= TREE_CHAIN (t
))
3223 tree val
= TREE_VALUE (t
);
3225 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t
))),
3227 || decl_overlaps_hard_reg_set_p (val
, mof_set
))
3231 return tree_cons (NULL_TREE
,
3232 build_string (strlen (reg_names
[CRIS_MOF_REGNUM
]),
3233 reg_names
[CRIS_MOF_REGNUM
]),
3238 /* Various small functions to replace macros. Only called from a
3239 debugger. They might collide with gcc functions or system functions,
3240 so only emit them when '#if 1' above. */
3242 enum rtx_code
Get_code (rtx
);
3247 return GET_CODE (x
);
3250 const char *Get_mode (rtx
);
3255 return GET_MODE_NAME (GET_MODE (x
));
3258 rtx
Xexp (rtx
, int);
3266 rtx
Xvecexp (rtx
, int, int);
3269 Xvecexp (rtx x
, int n
, int m
)
3271 return XVECEXP (x
, n
, m
);
3274 int Get_rtx_len (rtx
);
3279 return GET_RTX_LENGTH (GET_CODE (x
));
3282 /* Use upper-case to distinguish from local variables that are sometimes
3283 called next_insn and prev_insn. */
3285 rtx
Next_insn (rtx
);
3288 Next_insn (rtx insn
)
3290 return NEXT_INSN (insn
);
3293 rtx
Prev_insn (rtx
);
3296 Prev_insn (rtx insn
)
3298 return PREV_INSN (insn
);
3302 #include "gt-cris.h"
3306 * eval: (c-set-style "gnu")
3307 * indent-tabs-mode: t