[ARM,AArch64][testsuite] AdvSIMD intrinsics tests cleanup: remove useless expected...
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vuzp.c
blobab6e57693ac7114a2f7e15eb792e5cf2b6f11c3f
1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
5 /* Expected results splitted in several chunks. */
6 /* Chunk 0. */
7 VECT_VAR_DECL(expected0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
8 0xf4, 0xf5, 0xf6, 0xf7 };
9 VECT_VAR_DECL(expected0,int,16,4) [] = { 0xfff0, 0xfff1,
10 0xfff2, 0xfff3 };
11 VECT_VAR_DECL(expected0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
12 VECT_VAR_DECL(expected0,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
13 0xf4, 0xf5, 0xf6, 0xf7 };
14 VECT_VAR_DECL(expected0,uint,16,4) [] = { 0xfff0, 0xfff1,
15 0xfff2, 0xfff3 };
16 VECT_VAR_DECL(expected0,uint,32,2) [] = { 0xfffffff0,
17 0xfffffff1 };
18 VECT_VAR_DECL(expected0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
19 0xf4, 0xf5, 0xf6, 0xf7 };
20 VECT_VAR_DECL(expected0,poly,16,4) [] = { 0xfff0, 0xfff1,
21 0xfff2, 0xfff3 };
22 VECT_VAR_DECL(expected0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
23 VECT_VAR_DECL(expected0,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
24 0xf4, 0xf5, 0xf6, 0xf7,
25 0xf8, 0xf9, 0xfa, 0xfb,
26 0xfc, 0xfd, 0xfe, 0xff };
27 VECT_VAR_DECL(expected0,int,16,8) [] = { 0xfff0, 0xfff1,
28 0xfff2, 0xfff3,
29 0xfff4, 0xfff5,
30 0xfff6, 0xfff7 };
31 VECT_VAR_DECL(expected0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
32 0xfffffff2, 0xfffffff3 };
33 VECT_VAR_DECL(expected0,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
34 0xf4, 0xf5, 0xf6, 0xf7,
35 0xf8, 0xf9, 0xfa, 0xfb,
36 0xfc, 0xfd, 0xfe, 0xff };
37 VECT_VAR_DECL(expected0,uint,16,8) [] = { 0xfff0, 0xfff1,
38 0xfff2, 0xfff3,
39 0xfff4, 0xfff5,
40 0xfff6, 0xfff7 };
41 VECT_VAR_DECL(expected0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
42 0xfffffff2, 0xfffffff3 };
43 VECT_VAR_DECL(expected0,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
44 0xf4, 0xf5, 0xf6, 0xf7,
45 0xf8, 0xf9, 0xfa, 0xfb,
46 0xfc, 0xfd, 0xfe, 0xff };
47 VECT_VAR_DECL(expected0,poly,16,8) [] = { 0xfff0, 0xfff1,
48 0xfff2, 0xfff3,
49 0xfff4, 0xfff5,
50 0xfff6, 0xfff7 };
51 VECT_VAR_DECL(expected0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
52 0xc1600000, 0xc1500000 };
54 /* Chunk 1. */
55 VECT_VAR_DECL(expected1,int,8,8) [] = { 0x11, 0x11, 0x11, 0x11,
56 0x11, 0x11, 0x11, 0x11 };
57 VECT_VAR_DECL(expected1,int,16,4) [] = { 0x22, 0x22, 0x22, 0x22 };
58 VECT_VAR_DECL(expected1,int,32,2) [] = { 0x33, 0x33 };
59 VECT_VAR_DECL(expected1,uint,8,8) [] = { 0x55, 0x55, 0x55, 0x55,
60 0x55, 0x55, 0x55, 0x55 };
61 VECT_VAR_DECL(expected1,uint,16,4) [] = { 0x66, 0x66, 0x66, 0x66 };
62 VECT_VAR_DECL(expected1,uint,32,2) [] = { 0x77, 0x77 };
63 VECT_VAR_DECL(expected1,poly,8,8) [] = { 0x55, 0x55, 0x55, 0x55,
64 0x55, 0x55, 0x55, 0x55 };
65 VECT_VAR_DECL(expected1,poly,16,4) [] = { 0x66, 0x66, 0x66, 0x66 };
66 VECT_VAR_DECL(expected1,hfloat,32,2) [] = { 0x42066666, 0x42066666 };
67 VECT_VAR_DECL(expected1,int,8,16) [] = { 0x11, 0x11, 0x11, 0x11,
68 0x11, 0x11, 0x11, 0x11,
69 0x11, 0x11, 0x11, 0x11,
70 0x11, 0x11, 0x11, 0x11 };
71 VECT_VAR_DECL(expected1,int,16,8) [] = { 0x22, 0x22, 0x22, 0x22,
72 0x22, 0x22, 0x22, 0x22 };
73 VECT_VAR_DECL(expected1,int,32,4) [] = { 0x33, 0x33, 0x33, 0x33 };
74 VECT_VAR_DECL(expected1,uint,8,16) [] = { 0x55, 0x55, 0x55, 0x55,
75 0x55, 0x55, 0x55, 0x55,
76 0x55, 0x55, 0x55, 0x55,
77 0x55, 0x55, 0x55, 0x55 };
78 VECT_VAR_DECL(expected1,uint,16,8) [] = { 0x66, 0x66, 0x66, 0x66,
79 0x66, 0x66, 0x66, 0x66 };
80 VECT_VAR_DECL(expected1,uint,32,4) [] = { 0x77, 0x77, 0x77, 0x77 };
81 VECT_VAR_DECL(expected1,poly,8,16) [] = { 0x55, 0x55, 0x55, 0x55,
82 0x55, 0x55, 0x55, 0x55,
83 0x55, 0x55, 0x55, 0x55,
84 0x55, 0x55, 0x55, 0x55 };
85 VECT_VAR_DECL(expected1,poly,16,8) [] = { 0x66, 0x66, 0x66, 0x66,
86 0x66, 0x66, 0x66, 0x66 };
87 VECT_VAR_DECL(expected1,hfloat,32,4) [] = { 0x42073333, 0x42073333,
88 0x42073333, 0x42073333 };
90 #define INSN_NAME vuzp
91 #define TEST_MSG "VUZP/VUZPQ"
93 #include "vshuffle.inc"