[ARM,AArch64][testsuite] AdvSIMD intrinsics tests cleanup: remove useless expected...
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vsri_n.c
blob5f05314de2aaad7f2ad388dad89c26dbae64567a
1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
5 #define INSN_NAME vsri
6 #define TEST_MSG "VSRI_N"
8 /* Extra tests for functions requiring corner cases tests. */
9 void vsri_extra(void);
10 #define EXTRA_TESTS vsri_extra
12 /* Expected results. */
13 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
14 0xf0, 0xf0, 0xf0, 0xf0 };
15 VECT_VAR_DECL(expected,int,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
16 VECT_VAR_DECL(expected,int,32,2) [] = { 0x80000001, 0x80000001 };
17 VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffff00000000 };
18 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xc5, 0xc5, 0xc5, 0xc5,
19 0xc5, 0xc5, 0xc5, 0xc5 };
20 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffc0, 0xffc0, 0xffc0, 0xffc0 };
21 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff0, 0xfffffff0 };
22 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xe000000000000000 };
23 VECT_VAR_DECL(expected,poly,8,8) [] = { 0xc5, 0xc5, 0xc5, 0xc5,
24 0xc5, 0xc5, 0xc5, 0xc5 };
25 VECT_VAR_DECL(expected,poly,16,4) [] = { 0xffc0, 0xffc0, 0xffc0, 0xffc0 };
26 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
27 0xf7, 0xf7, 0xf7, 0xf7,
28 0xff, 0xff, 0xff, 0xff,
29 0xff, 0xff, 0xff, 0xff };
30 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfffd, 0xfffd, 0xfffd, 0xfffd,
31 0xfffd, 0xfffd, 0xfffd, 0xfffd };
32 VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffff, 0xffffffff,
33 0xffffffff, 0xffffffff };
34 VECT_VAR_DECL(expected,int,64,2) [] = { 0xffff000000000000,
35 0xffff000000000000 };
36 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xe1, 0xe1, 0xe1, 0xe1,
37 0xe1, 0xe1, 0xe1, 0xe1,
38 0xe1, 0xe1, 0xe1, 0xe1,
39 0xe1, 0xe1, 0xe1, 0xe1 };
40 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0,
41 0xfff0, 0xfff0, 0xfff0, 0xfff0 };
42 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffe00, 0xfffffe00,
43 0xfffffe00, 0xfffffe00 };
44 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffff800,
45 0xfffffffffffff800 };
46 VECT_VAR_DECL(expected,poly,8,16) [] = { 0xe1, 0xe1, 0xe1, 0xe1,
47 0xe1, 0xe1, 0xe1, 0xe1,
48 0xe1, 0xe1, 0xe1, 0xe1,
49 0xe1, 0xe1, 0xe1, 0xe1 };
50 VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0,
51 0xfff0, 0xfff0, 0xfff0, 0xfff0 };
53 /* Expected results with max shift amount. */
54 VECT_VAR_DECL(expected_max_shift,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
55 0xf4, 0xf5, 0xf6, 0xf7 };
56 VECT_VAR_DECL(expected_max_shift,int,16,4) [] = { 0xfff0, 0xfff1,
57 0xfff2, 0xfff3 };
58 VECT_VAR_DECL(expected_max_shift,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
59 VECT_VAR_DECL(expected_max_shift,int,64,1) [] = { 0xfffffffffffffff0 };
60 VECT_VAR_DECL(expected_max_shift,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
61 0xf4, 0xf5, 0xf6, 0xf7 };
62 VECT_VAR_DECL(expected_max_shift,uint,16,4) [] = { 0xfff0, 0xfff1,
63 0xfff2, 0xfff3 };
64 VECT_VAR_DECL(expected_max_shift,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
65 VECT_VAR_DECL(expected_max_shift,uint,64,1) [] = { 0xfffffffffffffff0 };
66 VECT_VAR_DECL(expected_max_shift,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
67 0xf4, 0xf5, 0xf6, 0xf7 };
68 VECT_VAR_DECL(expected_max_shift,poly,16,4) [] = { 0xfff0, 0xfff1,
69 0xfff2, 0xfff3 };
70 VECT_VAR_DECL(expected_max_shift,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
71 0xf4, 0xf5, 0xf6, 0xf7,
72 0xf8, 0xf9, 0xfa, 0xfb,
73 0xfc, 0xfd, 0xfe, 0xff };
74 VECT_VAR_DECL(expected_max_shift,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
75 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
76 VECT_VAR_DECL(expected_max_shift,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
77 0xfffffff2, 0xfffffff3 };
78 VECT_VAR_DECL(expected_max_shift,int,64,2) [] = { 0xfffffffffffffff0,
79 0xfffffffffffffff1 };
80 VECT_VAR_DECL(expected_max_shift,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
81 0xf4, 0xf5, 0xf6, 0xf7,
82 0xf8, 0xf9, 0xfa, 0xfb,
83 0xfc, 0xfd, 0xfe, 0xff };
84 VECT_VAR_DECL(expected_max_shift,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
85 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
86 VECT_VAR_DECL(expected_max_shift,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
87 0xfffffff2, 0xfffffff3 };
88 VECT_VAR_DECL(expected_max_shift,uint,64,2) [] = { 0xfffffffffffffff0,
89 0xfffffffffffffff1 };
90 VECT_VAR_DECL(expected_max_shift,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
91 0xf4, 0xf5, 0xf6, 0xf7,
92 0xf8, 0xf9, 0xfa, 0xfb,
93 0xfc, 0xfd, 0xfe, 0xff };
94 VECT_VAR_DECL(expected_max_shift,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
95 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
97 #include "vsXi_n.inc"
99 void vsri_extra(void)
101 /* Test cases with maximum shift amount (this amount is different
102 from vsli). */
104 DECL_VARIABLE_ALL_VARIANTS(vector);
105 DECL_VARIABLE_ALL_VARIANTS(vector2);
106 DECL_VARIABLE_ALL_VARIANTS(vector_res);
108 clean_results ();
110 /* Initialize input "vector" from "buffer". */
111 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
113 /* Fill input vector2 with arbitrary values. */
114 VDUP(vector2, , int, s, 8, 8, 2);
115 VDUP(vector2, , int, s, 16, 4, -4);
116 VDUP(vector2, , int, s, 32, 2, 3);
117 VDUP(vector2, , int, s, 64, 1, 100);
118 VDUP(vector2, , uint, u, 8, 8, 20);
119 VDUP(vector2, , uint, u, 16, 4, 30);
120 VDUP(vector2, , uint, u, 32, 2, 40);
121 VDUP(vector2, , uint, u, 64, 1, 2);
122 VDUP(vector2, , poly, p, 8, 8, 20);
123 VDUP(vector2, , poly, p, 16, 4, 30);
124 VDUP(vector2, q, int, s, 8, 16, -10);
125 VDUP(vector2, q, int, s, 16, 8, -20);
126 VDUP(vector2, q, int, s, 32, 4, -30);
127 VDUP(vector2, q, int, s, 64, 2, 24);
128 VDUP(vector2, q, uint, u, 8, 16, 12);
129 VDUP(vector2, q, uint, u, 16, 8, 3);
130 VDUP(vector2, q, uint, u, 32, 4, 55);
131 VDUP(vector2, q, uint, u, 64, 2, 3);
132 VDUP(vector2, q, poly, p, 8, 16, 12);
133 VDUP(vector2, q, poly, p, 16, 8, 3);
135 /* Use maximum allowed shift amount. */
136 TEST_VSXI_N(INSN_NAME, , int, s, 8, 8, 8);
137 TEST_VSXI_N(INSN_NAME, , int, s, 16, 4, 16);
138 TEST_VSXI_N(INSN_NAME, , int, s, 32, 2, 32);
139 TEST_VSXI_N(INSN_NAME, , int, s, 64, 1, 64);
140 TEST_VSXI_N(INSN_NAME, , uint, u, 8, 8, 8);
141 TEST_VSXI_N(INSN_NAME, , uint, u, 16, 4, 16);
142 TEST_VSXI_N(INSN_NAME, , uint, u, 32, 2, 32);
143 TEST_VSXI_N(INSN_NAME, , uint, u, 64, 1, 64);
144 TEST_VSXI_N(INSN_NAME, , poly, p, 8, 8, 8);
145 TEST_VSXI_N(INSN_NAME, , poly, p, 16, 4, 16);
146 TEST_VSXI_N(INSN_NAME, q, int, s, 8, 16, 8);
147 TEST_VSXI_N(INSN_NAME, q, int, s, 16, 8, 16);
148 TEST_VSXI_N(INSN_NAME, q, int, s, 32, 4, 32);
149 TEST_VSXI_N(INSN_NAME, q, int, s, 64, 2, 64);
150 TEST_VSXI_N(INSN_NAME, q, uint, u, 8, 16, 8);
151 TEST_VSXI_N(INSN_NAME, q, uint, u, 16, 8, 16);
152 TEST_VSXI_N(INSN_NAME, q, uint, u, 32, 4, 32);
153 TEST_VSXI_N(INSN_NAME, q, uint, u, 64, 2, 64);
154 TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 8);
155 TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 16);
157 #define COMMENT "(max shift amount)"
158 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shift, COMMENT);
159 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shift, COMMENT);
160 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shift, COMMENT);
161 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_shift, COMMENT);
162 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shift, COMMENT);
163 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
164 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
165 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
166 CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
167 CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
168 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
169 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
170 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
171 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
172 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
173 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
174 CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
175 CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);