gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vorr.c

   1 #define INSN_NAME vorr
   2 #define TEST_MSG "VORR/VORRQ"
   3
   4 #include "binary_op.inc"
   5
   6 /* Expected results.  */
   7 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf2, 0xf3, 0xf2, 0xf3,
   8                                        0xf6, 0xf7, 0xf6, 0xf7 };
   9 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff };
  10 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff3, 0xfffffff3 };
  11 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff4 };
  12 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf4, 0xf5, 0xf6, 0xf7,
  13                                         0xf4, 0xf5, 0xf6, 0xf7 };
  14 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xffff, 0xfffe, 0xffff };
  15 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff8, 0xfffffff9 };
  16 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff2 };
  17 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf6, 0xf7, 0xf6, 0xf7,
  18                                         0xf6, 0xf7, 0xf6, 0xf7,
  19                                         0xfe, 0xff, 0xfe, 0xff,
  20                                         0xfe, 0xff, 0xfe, 0xff };
  21 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff,
  22                                         0xfffc, 0xfffd, 0xfffe, 0xffff };
  23 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff2, 0xfffffff3,
  24                                         0xfffffff2, 0xfffffff3 };
  25 VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff8,
  26                                         0xfffffffffffffff9 };
  27 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xfc, 0xfd, 0xfe, 0xff,
  28                                          0xfc, 0xfd, 0xfe, 0xff,
  29                                          0xfc, 0xfd, 0xfe, 0xff,
  30                                          0xfc, 0xfd, 0xfe, 0xff };
  31 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3,
  32                                          0xfff7, 0xfff7, 0xfff7, 0xfff7 };
  33 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff7, 0xfffffff7,
  34                                          0xfffffff7, 0xfffffff7 };
  35 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff3,
  36                                          0xfffffffffffffff3 };