[ARM,AArch64][testsuite] AdvSIMD intrinsics tests cleanup: remove useless expected...
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vbic.c
blob5a3989f021f3c730504917a6c5fc44842715865c
1 #define INSN_NAME vbic
2 #define TEST_MSG "VBIC/VBICQ"
4 #include "binary_op.inc"
6 /* Expected results. */
7 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xf1, 0xf0, 0xf1,
8 0xf4, 0xf5, 0xf4, 0xf5 };
9 VECT_VAR_DECL(expected,int,16,4) [] = { 0x0, 0x1, 0x2, 0x3 };
10 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff0, 0xfffffff0 };
11 VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffff90 };
12 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe0, 0xe1, 0xe2, 0xe3,
13 0xe0, 0xe1, 0xe2, 0xe3 };
14 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffe0, 0xffe1, 0xffe0, 0xffe1 };
15 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffd0, 0xffffffd1 };
16 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
17 VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x1, 0x0, 0x1,
18 0x0, 0x1, 0x0, 0x1,
19 0x8, 0x9, 0x8, 0x9,
20 0x8, 0x9, 0x8, 0x9 };
21 VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0x11, 0x12, 0x13,
22 0x10, 0x11, 0x12, 0x13 };
23 VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0x11, 0x10, 0x11 };
24 VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffe0, 0xffffffffffffffe1 };
25 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
26 0xf0, 0xf1, 0xf2, 0xf3,
27 0xf0, 0xf1, 0xf2, 0xf3,
28 0xf0, 0xf1, 0xf2, 0xf3 };
29 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0,
30 0xfff4, 0xfff4, 0xfff4, 0xfff4 };
31 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffc0, 0xffffffc0,
32 0xffffffc0, 0xffffffc0 };
33 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
34 0xfffffffffffffff0 };