gcc-4_9-branch/gcc/ChangeLog.linaro

   1 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
   2
   3         Backport from trunk r211408, 211416.
   4         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
   5
   6         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
   7         REG_CFA_RESTORE mode.
   8
   9         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
  10
  11         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
  12         (aarch64_save_or_restore_callee_save_registers): Fix layout.
  13
  14 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  15
  16         Backport from trunk r211418.
  17         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  18
  19         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
  20         Change second alternative type to f_mcr.
  21         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
  22         and 12th alternatives' types to f_mcr and f_mrc.
  23         (*movdi_aarch64): Same for 12th and 13th alternatives.
  24         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
  25         (aarch64_movtilow_tilow): Change type to fmov.
  26
  27 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  28
  29         Backport from trunk r211371.
  30         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  31
  32         * config/arm/arm-modes.def: Remove XFmode.
  33
  34 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  35
  36         Backport from trunk r211268.
  37         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
  38
  39         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
  40         layout comment.
  41
  42 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  43
  44         Backport from trunk r211129.
  45         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  46
  47         PR target/61154
  48         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
  49         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
  50         with immediate_operand.
  51
  52 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  53
  54         Backport from trunk r211073.
  55         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  56
  57         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
  58         to mov_imm.
  59         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
  60
  61 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  62
  63         Backport from trunk r211050.
  64         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
  65         Richard Sandiford  <rdsandiford@googlemail.com>
  66
  67         * arm/iterators.md (shiftable_ops): New code iterator.
  68         (t2_binop0, arith_shift_insn): New code attributes.
  69         * arm/predicates.md (shift_nomul_operator): New predicate.
  70         * arm/arm.md (insn_enabled): Delete.
  71         (enabled): Remove insn_enabled test.
  72         (*arith_shiftsi): Delete.  Replace with ...
  73         (*<arith_shift_insn>_multsi): ... new pattern.
  74         (*<arith_shift_insn>_shiftsi): ... new pattern.
  75         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
  76
  77 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  78
  79         Backport from trunk r210996.
  80         2014-05-27  Andrew Pinski  <apinski@cavium.com>
  81
  82         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
  83         Use <w> for the register in assembly template.
  84         (stack_protect_test): Use the mode of operands[0] for the
  85         result.
  86         (stack_protect_test_<mode>): Use <w> for the register
  87         in assembly template.
  88
  89 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  90
  91         Backport from trunk r210967.
  92         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  93
  94         * config/arm/neon.md (neon_bswap<mode>): New pattern.
  95         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
  96         (arm_init_neon_builtins): Handle NEON_BSWAP.
  97         Define required type nodes.
  98         (arm_expand_neon_builtin): Handle NEON_BSWAP.
  99         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
 100         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
 101         * config/arm/iterators.md (VDQHSD): New mode iterator.
 102
 103 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 104
 105         Backport from trunk r210471.
 106         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 107
 108         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
 109         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
 110
 111 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 112
 113         Backport from trunk r210369.
 114         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 115
 116         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
 117         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
 118         Remove associated type declarations and initialisations.
 119         (arm_expand_neon_builtin): Likewise.
 120         (neon_emit_pair_result_insn): Delete.
 121         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
 122         * config/arm/neon.md (neon_vtrn<mode>): Delete.
 123         (neon_vzip<mode>): Likewise.
 124         (neon_vuzp<mode>): Likewise.
 125
 126 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 127
 128         Backport from trunk r211058, 211177.
 129         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
 130
 131         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
 132         TYPES_BINOPV): New static data.
 133         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
 134         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
 135         New patterns.
 136         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
 137         patterns for EXT.
 138         (aarch64_evpc_ext): New function.
 139
 140         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
 141
 142         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
 143         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
 144         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
 145         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
 146         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
 147
 148         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 149
 150         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
 151         location == 0.
 152
 153 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 154
 155         Backport from trunk r209797.
 156         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 157
 158         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
 159         Use HOST_WIDE_INT_C for mask literal.
 160         (aarch_rev16_shleft_mask_imm_p): Likewise.
 161
 162 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 163
 164         Backport from trunk r211148.
 165         2014-06-02  Andrew Pinski  <apinski@cavium.com>
 166
 167         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
 168         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
 169         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
 170         file whose name depends on -mabi= and -mbig-endian.
 171         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
 172         better and handle ilp32 too.
 173         (MULTILIB_OPTIONS): Delete.
 174         (MULTILIB_DIRNAMES): Delete.
 175
 176 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 177
 178         Backport from trunk r210828, r211103.
 179         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
 180
 181         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
 182         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
 183         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
 184         and __builtins_arm_get_fpscr.
 185         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
 186         __builtins_arm_get_fpscr.
 187         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
 188         __builtins_arm_ldfpscr.
 189         (arm_atomic_assign_expand_fenv): New function.
 190         * config/arm/vfp.md (set_fpscr): New pattern.
 191         (get_fpscr) : Likewise.
 192         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
 193         VUNSPEC_SET_FPSCR.
 194         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 195         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
 196
 197         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
 198
 199         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
 200         define.
 201         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
 202         New function declaration.
 203         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
 204         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
 205         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
 206         (aarch64_init_builtins) : Initialize builtins
 207         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 208         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 209         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
 210         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
 211         and __builtins_aarch64_set_fpsr.
 212         (aarch64_atomic_assign_expand_fenv): New function.
 213         * config/aarch64/aarch64.md (set_fpcr): New pattern.
 214         (get_fpcr) : Likewise.
 215         (set_fpsr) : Likewise.
 216         (get_fpsr) : Likewise.
 217         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
 218          and UNSPECV_SET_FPSR.
 219         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 220         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 221         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 222
 223 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 224
 225         Backport from trunk r210355.
 226         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
 227
 228         * config/aarch64/aarch64-protos.h
 229         (aarch64_hard_regno_caller_save_mode): New prototype.
 230         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
 231         New function.
 232         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
 233
 234 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 235
 236         Backport from trunk r209943.
 237         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
 238
 239         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
 240         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
 241         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
 242         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
 243         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
 244         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
 245         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
 246         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
 247
 248 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
 249
 250         * LINARO-VERSION: Bump version.
 251
 252 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
 253
 254         GCC Linaro 4.9-2014.06-1 released.
 255         * LINARO-VERSION: Update.
 256
 257 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
 258
 259         Revert:
 260         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 261
 262         Backport from trunk r209643.
 263         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 264
 265         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 266
 267 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
 268
 269         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
 270         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
 271         210508, 210509, 210510, 210512, 211205, 211206.
 272         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 273
 274         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
 275         (cpu_addrcost_table): Use it.
 276         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
 277         (aarch64_address_cost): Rewrite using aarch64_classify_address,
 278         move it.
 279
 280         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 281
 282         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
 283         (cortexa57_vector_cost): Likewise.
 284         (cortexa57_tunings): Use them.
 285
 286         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 287
 288         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
 289         (TARGET_RTX_COSTS): Call it.
 290
 291         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 292                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 293
 294         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
 295         emit instructions, return number of instructions which would
 296         be emitted.
 297         (aarch64_add_constant): Update call to aarch64_build_constant.
 298         (aarch64_output_mi_thunk): Likewise.
 299         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
 300         a CONST_DOUBLE.
 301
 302         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 303                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 304
 305         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
 306         to...
 307         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
 308         well formed.
 309         (aarch64_rtx_mult_cost): New.
 310         (aarch64_rtx_costs): Use it, refactor as appropriate.
 311
 312         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 313
 314         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
 315
 316         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 317                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
 318
 319         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
 320         for SET RTX.
 321
 322         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 323                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 324
 325         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
 326         costs when costing loads and stores to memory.
 327
 328         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 329                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 330
 331         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
 332         logical operations.
 333
 334         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 335                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 336
 337         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
 338         ZERO_EXTEND and SIGN_EXTEND better.
 339
 340         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 341                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 342
 343         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
 344         rotates and shifts.
 345
 346         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
 347                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 348
 349         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
 350         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
 351
 352         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 353                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 354
 355         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
 356         DIV/MOD.
 357
 358         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 359                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 360
 361         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
 362         operators.
 363
 364         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 365                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 366
 367         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
 368         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
 369
 370         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 371                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 372
 373         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
 374
 375         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 376
 377         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
 378         HIGH, LO_SUM.
 379
 380         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 381
 382         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
 383         where we were unable to cost an RTX.
 384
 385         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 386
 387         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
 388
 389         2014-06-03  Andrew Pinski  <apinski@cavium.com>
 390
 391         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
 392         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
 393
 394         2014-06-03  Andrew Pinski  <apinski@cavium.com>
 395
 396         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
 397         comparisons for OP0.
 398
 399 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
 400
 401         * LINARO-VERSION: Bump version.
 402
 403 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
 404
 405         GCC Linaro 4.9-2014.06 released.
 406         * LINARO-VERSION: Update.
 407
 408 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
 409
 410         Backport from trunk r211211.
 411         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
 412
 413         * config/aarch64/aarch64.c (aarch64_classify_address)
 414         (aarch64_legitimize_reload_address): Support full addressing modes
 415         for vector modes.
 416         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
 417         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
 418
 419 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 420
 421         Backport from trunk r209906.
 422         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
 423
 424         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
 425         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
 426         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
 427         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
 428         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
 429         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
 430         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
 431         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
 432
 433 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 434
 435         Backport from trunk r209897.
 436         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
 437
 438         * calls.c (initialize_argument_information): Always treat
 439         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
 440         (expand_call): Likewise.
 441         (emit_library_call_calue_1): Likewise.
 442         * expr.c (PUSH_ARGS_REVERSED): Do not define.
 443         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
 444         code accordingly.
 445
 446 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 447
 448         Backport from trunk r209880.
 449         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
 450
 451         * config/aarch64/aarch64-builtins.c
 452         (aarch64_types_storestruct_lane_qualifiers): New.
 453         (TYPES_STORESTRUCT_LANE): Likewise.
 454         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
 455         (st3_lane): Likewise.
 456         (st4_lane): Likewise.
 457         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
 458         (vec_store_lanesci_lane<mode>): Likewise.
 459         (vec_store_lanesxi_lane<mode>): Likewise.
 460                 (aarch64_st2_lane<VQ:mode>): Likewise.
 461         (aarch64_st3_lane<VQ:mode>): Likewise.
 462         (aarch64_st4_lane<VQ:mode>): Likewise.
 463         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
 464         * config/aarch64/arm_neon.h
 465                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
 466         use new macro arguments.
 467         (__ST3_LANE_FUNC): Likewise.
 468         (__ST4_LANE_FUNC): Likewise.
 469         * config/aarch64/iterators.md (V_TWO_ELEM): New.
 470         (V_THREE_ELEM): Likewise.
 471         (V_FOUR_ELEM): Likewise.
 472
 473 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 474
 475         Backport from trunk r209878.
 476         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
 477
 478         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
 479         * config/aarch64/aarch64.c
 480         (aarch64_cannot_change_mode_class): Weaken conditions.
 481         (aarch64_modes_tieable_p): New.
 482         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
 483
 484 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 485
 486         Backport from trunk r209808.
 487         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
 488
 489         * config/arm/predicates.md (call_insn_operand): Add long_call check.
 490         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
 491         reg for long_call.
 492         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
 493         restriction.
 494
 495 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 496
 497         Backport from trunk r209806.
 498         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 499
 500         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
 501         T16-related fields.
 502
 503 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 504
 505         Backport from trunk r209742, 209749.
 506         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
 507
 508         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
 509
 510         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
 511
 512         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
 513         for big-endian.
 514
 515 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 516
 517         Backport from trunk r209736.
 518         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 519
 520         * config/aarch64/aarch64-builtins.c
 521         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
 522         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
 523         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
 524         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
 525         builtins.
 526         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
 527         (Vrevsuff): New mode attribute.
 528
 529 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 530
 531         Backport from trunk r209712.
 532         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 533
 534         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
 535         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
 536         machine descriptions for Stack Smashing Protector.
 537
 538 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 539
 540         Backport from trunk r209711.
 541         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
 542
 543         * aarch64.md (<optab>_rol<mode>3): New pattern.
 544         (<optab>_rolsi3_uxtw): Likewise.
 545         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
 546
 547 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 548
 549         Backport from trunk r209710.
 550         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
 551
 552         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
 553         (arm_cortex_a12_tune): Likewise.
 554
 555 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 556
 557         Backport from trunk r209706.
 558         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 559
 560         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
 561
 562 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 563
 564         Backport from trunk r209701, 209702, 209703, 209704, 209705.
 565         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 566
 567         * config/arm/arm.md (arm_rev16si2): New pattern.
 568         (arm_rev16si2_alt): Likewise.
 569         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
 570
 571         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 572         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
 573         (rev16<mode>2_alt): Likewise.
 574         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
 575         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
 576         (aarch_rev16_shleft_mask_imm_p): Likewise.
 577         (aarch_rev16_p_1): Likewise.
 578         (aarch_rev16_p): Likewise.
 579         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
 580         (aarch_rev16_shright_mask_imm_p): Likewise.
 581         (aarch_rev16_shleft_mask_imm_p): Likewise.
 582
 583         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 584
 585         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
 586         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
 587         rev cost.
 588         (cortex_a53_extra_costs): Likewise.
 589         (cortex_a57_extra_costs): Likewise.
 590         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
 591         (cortexa7_extra_costs): Likewise.
 592         (cortexa8_extra_costs): Likewise.
 593         (cortexa12_extra_costs): Likewise.
 594         (cortexa15_extra_costs): Likewise.
 595         (v7m_extra_costs): Likewise.
 596         (arm_new_rtx_costs): Handle BSWAP.
 597
 598         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 599
 600         * config/arm/arm.c (cortexa8_extra_costs): New table.
 601         (arm_cortex_a8_tune): New tuning struct.
 602         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
 603
 604         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 605
 606         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
 607
 608 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 609
 610         Backport from trunk r209659.
 611         2014-04-22  Richard Henderson  <rth@redhat.com>
 612
 613         * config/aarch64/aarch64 (addti3, subti3): New expanders.
 614         (add<GPI>3_compare0): Remove leading * from name.
 615         (add<GPI>3_carryin): Likewise.
 616         (sub<GPI>3_compare0): Likewise.
 617         (sub<GPI>3_carryin): Likewise.
 618         (<su_optab>mulditi3): New expander.
 619         (multi3): New expander.
 620         (madd<GPI>): Remove leading * from name.
 621
 622 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 623
 624         Backport from trunk r209645.
 625         2014-04-22  Andrew Pinski  <apinski@cavium.com>
 626
 627         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
 628         Handle TLS for ILP32.
 629         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
 630         (tlsie_small_<mode>): this and handle PTR.
 631         (tlsie_small_sidi): New pattern.
 632         (tlsle_small): Change to an expand to handle ILP32.
 633         (tlsle_small_<mode>): New pattern.
 634         (tlsdesc_small): Rename to ...
 635         (tlsdesc_small_<mode>): this and handle PTR.
 636
 637 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 638
 639         Backport from trunk r209643.
 640         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 641
 642         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 643
 644 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 645
 646         Backport from trunk r209641, 209642.
 647         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
 648
 649         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
 650         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
 651         (aarch64_types_signed_poly_qualifiers): Likewise.
 652         (aarch64_types_unsigned_signed_qualifiers): Likewise.
 653         (aarch64_types_poly_signed_qualifiers): Likewise.
 654         (TYPES_REINTERP_SS): Type macro added.
 655         (TYPES_REINTERP_SU): Likewise.
 656         (TYPES_REINTERP_SP): Likewise.
 657         (TYPES_REINTERP_US): Likewise.
 658         (TYPES_REINTERP_PS): Likewise.
 659         (aarch64_fold_builtin): New expression folding added.
 660         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
 661         Declarations removed.
 662         (REINTERP_SS): Declarations added.
 663         (REINTERP_US): Likewise.
 664         (REINTERP_PS): Likewise.
 665         (REINTERP_SU): Likewise.
 666         (REINTERP_SP): Likewise.
 667         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
 668         (vreinterpretq_p8_f64): Likewise.
 669         (vreinterpret_p16_f64): Likewise.
 670         (vreinterpretq_p16_f64): Likewise.
 671         (vreinterpret_f32_f64): Likewise.
 672         (vreinterpretq_f32_f64): Likewise.
 673         (vreinterpret_f64_f32): Likewise.
 674         (vreinterpret_f64_p8): Likewise.
 675         (vreinterpret_f64_p16): Likewise.
 676         (vreinterpret_f64_s8): Likewise.
 677         (vreinterpret_f64_s16): Likewise.
 678         (vreinterpret_f64_s32): Likewise.
 679         (vreinterpret_f64_s64): Likewise.
 680         (vreinterpret_f64_u8): Likewise.
 681         (vreinterpret_f64_u16): Likewise.
 682         (vreinterpret_f64_u32): Likewise.
 683         (vreinterpret_f64_u64): Likewise.
 684         (vreinterpretq_f64_f32): Likewise.
 685         (vreinterpretq_f64_p8): Likewise.
 686         (vreinterpretq_f64_p16): Likewise.
 687         (vreinterpretq_f64_s8): Likewise.
 688         (vreinterpretq_f64_s16): Likewise.
 689         (vreinterpretq_f64_s32): Likewise.
 690         (vreinterpretq_f64_s64): Likewise.
 691         (vreinterpretq_f64_u8): Likewise.
 692         (vreinterpretq_f64_u16): Likewise.
 693         (vreinterpretq_f64_u32): Likewise.
 694         (vreinterpretq_f64_u64): Likewise.
 695         (vreinterpret_s64_f64): Likewise.
 696         (vreinterpretq_s64_f64): Likewise.
 697         (vreinterpret_u64_f64): Likewise.
 698         (vreinterpretq_u64_f64): Likewise.
 699         (vreinterpret_s8_f64): Likewise.
 700         (vreinterpretq_s8_f64): Likewise.
 701         (vreinterpret_s16_f64): Likewise.
 702         (vreinterpretq_s16_f64): Likewise.
 703         (vreinterpret_s32_f64): Likewise.
 704         (vreinterpretq_s32_f64): Likewise.
 705         (vreinterpret_u8_f64): Likewise.
 706         (vreinterpretq_u8_f64): Likewise.
 707         (vreinterpret_u16_f64): Likewise.
 708         (vreinterpretq_u16_f64): Likewise.
 709         (vreinterpret_u32_f64): Likewise.
 710         (vreinterpretq_u32_f64): Likewise.
 711
 712         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
 713
 714         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
 715         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
 716         (vreinterpret_p8_s8): Likewise.
 717         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
 718         (vreinterpret_p8_s16): Likewise.
 719         (vreinterpret_p8_s32): Likewise.
 720         (vreinterpret_p8_s64): Likewise.
 721         (vreinterpret_p8_f32): Likewise.
 722         (vreinterpret_p8_u8): Likewise.
 723         (vreinterpret_p8_u16): Likewise.
 724         (vreinterpret_p8_u32): Likewise.
 725         (vreinterpret_p8_u64): Likewise.
 726         (vreinterpret_p8_p16): Likewise.
 727         (vreinterpretq_p8_s8): Likewise.
 728         (vreinterpretq_p8_s16): Likewise.
 729         (vreinterpretq_p8_s32): Likewise.
 730         (vreinterpretq_p8_s64): Likewise.
 731         (vreinterpretq_p8_f32): Likewise.
 732         (vreinterpretq_p8_u8): Likewise.
 733         (vreinterpretq_p8_u16): Likewise.
 734         (vreinterpretq_p8_u32): Likewise.
 735         (vreinterpretq_p8_u64): Likewise.
 736         (vreinterpretq_p8_p16): Likewise.
 737         (vreinterpret_p16_s8): Likewise.
 738         (vreinterpret_p16_s16): Likewise.
 739         (vreinterpret_p16_s32): Likewise.
 740         (vreinterpret_p16_s64): Likewise.
 741         (vreinterpret_p16_f32): Likewise.
 742         (vreinterpret_p16_u8): Likewise.
 743         (vreinterpret_p16_u16): Likewise.
 744         (vreinterpret_p16_u32): Likewise.
 745         (vreinterpret_p16_u64): Likewise.
 746         (vreinterpret_p16_p8): Likewise.
 747         (vreinterpretq_p16_s8): Likewise.
 748         (vreinterpretq_p16_s16): Likewise.
 749         (vreinterpretq_p16_s32): Likewise.
 750         (vreinterpretq_p16_s64): Likewise.
 751         (vreinterpretq_p16_f32): Likewise.
 752         (vreinterpretq_p16_u8): Likewise.
 753         (vreinterpretq_p16_u16): Likewise.
 754         (vreinterpretq_p16_u32): Likewise.
 755         (vreinterpretq_p16_u64): Likewise.
 756         (vreinterpretq_p16_p8): Likewise.
 757         (vreinterpret_f32_s8): Likewise.
 758         (vreinterpret_f32_s16): Likewise.
 759         (vreinterpret_f32_s32): Likewise.
 760         (vreinterpret_f32_s64): Likewise.
 761         (vreinterpret_f32_u8): Likewise.
 762         (vreinterpret_f32_u16): Likewise.
 763         (vreinterpret_f32_u32): Likewise.
 764         (vreinterpret_f32_u64): Likewise.
 765         (vreinterpret_f32_p8): Likewise.
 766         (vreinterpret_f32_p16): Likewise.
 767         (vreinterpretq_f32_s8): Likewise.
 768         (vreinterpretq_f32_s16): Likewise.
 769         (vreinterpretq_f32_s32): Likewise.
 770         (vreinterpretq_f32_s64): Likewise.
 771         (vreinterpretq_f32_u8): Likewise.
 772         (vreinterpretq_f32_u16): Likewise.
 773         (vreinterpretq_f32_u32): Likewise.
 774         (vreinterpretq_f32_u64): Likewise.
 775         (vreinterpretq_f32_p8): Likewise.
 776         (vreinterpretq_f32_p16): Likewise.
 777         (vreinterpret_s64_s8): Likewise.
 778         (vreinterpret_s64_s16): Likewise.
 779         (vreinterpret_s64_s32): Likewise.
 780         (vreinterpret_s64_f32): Likewise.
 781         (vreinterpret_s64_u8): Likewise.
 782         (vreinterpret_s64_u16): Likewise.
 783         (vreinterpret_s64_u32): Likewise.
 784         (vreinterpret_s64_u64): Likewise.
 785         (vreinterpret_s64_p8): Likewise.
 786         (vreinterpret_s64_p16): Likewise.
 787         (vreinterpretq_s64_s8): Likewise.
 788         (vreinterpretq_s64_s16): Likewise.
 789         (vreinterpretq_s64_s32): Likewise.
 790         (vreinterpretq_s64_f32): Likewise.
 791         (vreinterpretq_s64_u8): Likewise.
 792         (vreinterpretq_s64_u16): Likewise.
 793         (vreinterpretq_s64_u32): Likewise.
 794         (vreinterpretq_s64_u64): Likewise.
 795         (vreinterpretq_s64_p8): Likewise.
 796         (vreinterpretq_s64_p16): Likewise.
 797         (vreinterpret_u64_s8): Likewise.
 798         (vreinterpret_u64_s16): Likewise.
 799         (vreinterpret_u64_s32): Likewise.
 800         (vreinterpret_u64_s64): Likewise.
 801         (vreinterpret_u64_f32): Likewise.
 802         (vreinterpret_u64_u8): Likewise.
 803         (vreinterpret_u64_u16): Likewise.
 804         (vreinterpret_u64_u32): Likewise.
 805         (vreinterpret_u64_p8): Likewise.
 806         (vreinterpret_u64_p16): Likewise.
 807         (vreinterpretq_u64_s8): Likewise.
 808         (vreinterpretq_u64_s16): Likewise.
 809         (vreinterpretq_u64_s32): Likewise.
 810         (vreinterpretq_u64_s64): Likewise.
 811         (vreinterpretq_u64_f32): Likewise.
 812         (vreinterpretq_u64_u8): Likewise.
 813         (vreinterpretq_u64_u16): Likewise.
 814         (vreinterpretq_u64_u32): Likewise.
 815         (vreinterpretq_u64_p8): Likewise.
 816         (vreinterpretq_u64_p16): Likewise.
 817         (vreinterpret_s8_s16): Likewise.
 818         (vreinterpret_s8_s32): Likewise.
 819         (vreinterpret_s8_s64): Likewise.
 820         (vreinterpret_s8_f32): Likewise.
 821         (vreinterpret_s8_u8): Likewise.
 822         (vreinterpret_s8_u16): Likewise.
 823         (vreinterpret_s8_u32): Likewise.
 824         (vreinterpret_s8_u64): Likewise.
 825         (vreinterpret_s8_p8): Likewise.
 826         (vreinterpret_s8_p16): Likewise.
 827         (vreinterpretq_s8_s16): Likewise.
 828         (vreinterpretq_s8_s32): Likewise.
 829         (vreinterpretq_s8_s64): Likewise.
 830         (vreinterpretq_s8_f32): Likewise.
 831         (vreinterpretq_s8_u8): Likewise.
 832         (vreinterpretq_s8_u16): Likewise.
 833         (vreinterpretq_s8_u32): Likewise.
 834         (vreinterpretq_s8_u64): Likewise.
 835         (vreinterpretq_s8_p8): Likewise.
 836         (vreinterpretq_s8_p16): Likewise.
 837         (vreinterpret_s16_s8): Likewise.
 838         (vreinterpret_s16_s32): Likewise.
 839         (vreinterpret_s16_s64): Likewise.
 840         (vreinterpret_s16_f32): Likewise.
 841         (vreinterpret_s16_u8): Likewise.
 842         (vreinterpret_s16_u16): Likewise.
 843         (vreinterpret_s16_u32): Likewise.
 844         (vreinterpret_s16_u64): Likewise.
 845         (vreinterpret_s16_p8): Likewise.
 846         (vreinterpret_s16_p16): Likewise.
 847         (vreinterpretq_s16_s8): Likewise.
 848         (vreinterpretq_s16_s32): Likewise.
 849         (vreinterpretq_s16_s64): Likewise.
 850         (vreinterpretq_s16_f32): Likewise.
 851         (vreinterpretq_s16_u8): Likewise.
 852         (vreinterpretq_s16_u16): Likewise.
 853         (vreinterpretq_s16_u32): Likewise.
 854         (vreinterpretq_s16_u64): Likewise.
 855         (vreinterpretq_s16_p8): Likewise.
 856         (vreinterpretq_s16_p16): Likewise.
 857         (vreinterpret_s32_s8): Likewise.
 858         (vreinterpret_s32_s16): Likewise.
 859         (vreinterpret_s32_s64): Likewise.
 860         (vreinterpret_s32_f32): Likewise.
 861         (vreinterpret_s32_u8): Likewise.
 862         (vreinterpret_s32_u16): Likewise.
 863         (vreinterpret_s32_u32): Likewise.
 864         (vreinterpret_s32_u64): Likewise.
 865         (vreinterpret_s32_p8): Likewise.
 866         (vreinterpret_s32_p16): Likewise.
 867         (vreinterpretq_s32_s8): Likewise.
 868         (vreinterpretq_s32_s16): Likewise.
 869         (vreinterpretq_s32_s64): Likewise.
 870         (vreinterpretq_s32_f32): Likewise.
 871         (vreinterpretq_s32_u8): Likewise.
 872         (vreinterpretq_s32_u16): Likewise.
 873         (vreinterpretq_s32_u32): Likewise.
 874         (vreinterpretq_s32_u64): Likewise.
 875         (vreinterpretq_s32_p8): Likewise.
 876         (vreinterpretq_s32_p16): Likewise.
 877         (vreinterpret_u8_s8): Likewise.
 878         (vreinterpret_u8_s16): Likewise.
 879         (vreinterpret_u8_s32): Likewise.
 880         (vreinterpret_u8_s64): Likewise.
 881         (vreinterpret_u8_f32): Likewise.
 882         (vreinterpret_u8_u16): Likewise.
 883         (vreinterpret_u8_u32): Likewise.
 884         (vreinterpret_u8_u64): Likewise.
 885         (vreinterpret_u8_p8): Likewise.
 886         (vreinterpret_u8_p16): Likewise.
 887         (vreinterpretq_u8_s8): Likewise.
 888         (vreinterpretq_u8_s16): Likewise.
 889         (vreinterpretq_u8_s32): Likewise.
 890         (vreinterpretq_u8_s64): Likewise.
 891         (vreinterpretq_u8_f32): Likewise.
 892         (vreinterpretq_u8_u16): Likewise.
 893         (vreinterpretq_u8_u32): Likewise.
 894         (vreinterpretq_u8_u64): Likewise.
 895         (vreinterpretq_u8_p8): Likewise.
 896         (vreinterpretq_u8_p16): Likewise.
 897         (vreinterpret_u16_s8): Likewise.
 898         (vreinterpret_u16_s16): Likewise.
 899         (vreinterpret_u16_s32): Likewise.
 900         (vreinterpret_u16_s64): Likewise.
 901         (vreinterpret_u16_f32): Likewise.
 902         (vreinterpret_u16_u8): Likewise.
 903         (vreinterpret_u16_u32): Likewise.
 904         (vreinterpret_u16_u64): Likewise.
 905         (vreinterpret_u16_p8): Likewise.
 906         (vreinterpret_u16_p16): Likewise.
 907         (vreinterpretq_u16_s8): Likewise.
 908         (vreinterpretq_u16_s16): Likewise.
 909         (vreinterpretq_u16_s32): Likewise.
 910         (vreinterpretq_u16_s64): Likewise.
 911         (vreinterpretq_u16_f32): Likewise.
 912         (vreinterpretq_u16_u8): Likewise.
 913         (vreinterpretq_u16_u32): Likewise.
 914         (vreinterpretq_u16_u64): Likewise.
 915         (vreinterpretq_u16_p8): Likewise.
 916         (vreinterpretq_u16_p16): Likewise.
 917         (vreinterpret_u32_s8): Likewise.
 918         (vreinterpret_u32_s16): Likewise.
 919         (vreinterpret_u32_s32): Likewise.
 920         (vreinterpret_u32_s64): Likewise.
 921         (vreinterpret_u32_f32): Likewise.
 922         (vreinterpret_u32_u8): Likewise.
 923         (vreinterpret_u32_u16): Likewise.
 924         (vreinterpret_u32_u64): Likewise.
 925         (vreinterpret_u32_p8): Likewise.
 926         (vreinterpret_u32_p16): Likewise.
 927         (vreinterpretq_u32_s8): Likewise.
 928         (vreinterpretq_u32_s16): Likewise.
 929         (vreinterpretq_u32_s32): Likewise.
 930         (vreinterpretq_u32_s64): Likewise.
 931         (vreinterpretq_u32_f32): Likewise.
 932         (vreinterpretq_u32_u8): Likewise.
 933         (vreinterpretq_u32_u16): Likewise.
 934         (vreinterpretq_u32_u64): Likewise.
 935         (vreinterpretq_u32_p8): Likewise.
 936         (vreinterpretq_u32_p16): Likewise.
 937
 938 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 939
 940         Backport from trunk r209640.
 941         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
 942
 943         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
 944         Pattern extended.
 945         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
 946         extended.
 947         (sqabs): Likewise.
 948         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
 949         (vqnegd_s64): Likewise.
 950         (vqabs_s64): Likewise.
 951         (vqabsd_s64): Likewise.
 952
 953 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 954
 955         Backport from trunk r209627, 209636.
 956         2014-04-22  Renlin  <renlin.li@arm.com>
 957                     Jiong Wang  <jiong.wang@arm.com>
 958
 959         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
 960         * config/aarch64/aarch64.c (aarch64_layout_frame)
 961         (aarch64_initial_elimination_offset): Likewise.
 962
 963         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 964
 965         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
 966         Fix indentation.
 967
 968 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 969
 970         Backport from trunk r209618.
 971         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
 972
 973         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
 974         the output asm format.
 975
 976 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 977
 978         Backport from trunk r209617.
 979         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
 980
 981         * config/aarch64/aarch64-simd.md
 982         (aarch64_cm<optab>di): Always split.
 983         (*aarch64_cm<optab>di): New.
 984         (aarch64_cmtstdi): Always split.
 985         (*aarch64_cmtstdi): New.
 986
 987 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 988
 989         Backport from trunk r209615.
 990         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 991
 992         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
 993         restrictions on core registers for DImode values in Thumb2.
 994
 995 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 996
 997         Backport from trunk r209613, r209614.
 998         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
 999
1000         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1001         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1002
1003         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1004
1005         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1006         (*iordi_notzesidi_di): Likewise.
1007         (*iordi_notsesidi_di): Likewise.
1008
1009 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1010
1011         Backport from trunk r209561.
1012         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1013
1014         * config/arm/arm-protos.h (tune_params): New struct members.
1015         * config/arm/arm.c: Initialise tune_params per processor.
1016         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1017         for speed, based on new tune_params.
1018
1019 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1020
1021         Backport from trunk r209559.
1022         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1023
1024         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1025         added.
1026         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1027         macro.
1028         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1029         corrected.
1030         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1031         * config/aarch64/arm_neon.h (vrnd_f64): Added.
1032         (vrnda_f64): Likewise.
1033         (vrndi_f64): Likewise.
1034         (vrndm_f64): Likewise.
1035         (vrndn_f64): Likewise.
1036         (vrndp_f64): Likewise.
1037         (vrndx_f64): Likewise.
1038
1039 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1040
1041         Backport from trunk r209419.
1042         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1043
1044         PR rtl-optimization/60663
1045         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1046         avoid 0 cost.
1047
1048 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1049
1050         Backport from trunk r209457.
1051         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
1052
1053         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
1054         definition.
1055
1056 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
1057
1058         * LINARO-VERSION: Bump version.
1059
1060 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
1061         GCC Linaro 4.9-2014.05 released.
1062         * LINARO-VERSION: Update.
1063
1064 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1065
1066         Backport from trunk r209889.
1067         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1068
1069         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
1070
1071 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1072
1073         Backport from trunk r209556.
1074         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1075
1076         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
1077         GET_MODE_SIZE argument is enum machine_mode.
1078
1079 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
1080
1081         * LINARO-VERSION: Bump version.
1082
1083 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
1084
1085         GCC Linaro 4.9-2014.04 released.
1086         * LINARO-VERSION: New file.
1087         * configure.ac: Add Linaro version string.