1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "hard-reg-set.h"
35 #include "insn-config.h"
39 #include "dominance.h"
43 #include "cfgcleanup.h"
44 #include "basic-block.h"
48 #include "insn-codes.h"
50 #include "diagnostic-core.h"
54 #include "tree-pass.h"
57 #include "shrink-wrap.h"
60 #ifndef HAVE_conditional_move
61 #define HAVE_conditional_move 0
73 #ifndef MAX_CONDITIONAL_EXECUTE
74 #define MAX_CONDITIONAL_EXECUTE \
75 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
79 #ifndef HAVE_cbranchcc4
80 #define HAVE_cbranchcc4 0
83 #define IFCVT_MULTIPLE_DUMPS 1
85 #define NULL_BLOCK ((basic_block) NULL)
87 /* True if after combine pass. */
88 static bool ifcvt_after_combine
;
90 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
91 static int num_possible_if_blocks
;
93 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
95 static int num_updated_if_blocks
;
97 /* # of changes made. */
98 static int num_true_changes
;
100 /* Whether conditional execution changes were made. */
101 static int cond_exec_changed_p
;
103 /* Forward references. */
104 static int count_bb_insns (const_basic_block
);
105 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
106 static rtx_insn
*first_active_insn (basic_block
);
107 static rtx_insn
*last_active_insn (basic_block
, int);
108 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
109 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
110 static basic_block
block_fallthru (basic_block
);
111 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
113 static rtx
cond_exec_get_condition (rtx_insn
*);
114 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
115 static int noce_operand_ok (const_rtx
);
116 static void merge_if_block (ce_if_block
*);
117 static int find_cond_trap (basic_block
, edge
, edge
);
118 static basic_block
find_if_header (basic_block
, int);
119 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
120 static int noce_find_if_block (basic_block
, edge
, edge
, int);
121 static int cond_exec_find_if_block (ce_if_block
*);
122 static int find_if_case_1 (basic_block
, edge
, edge
);
123 static int find_if_case_2 (basic_block
, edge
, edge
);
124 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
126 static void noce_emit_move_insn (rtx
, rtx
);
127 static rtx_insn
*block_has_only_trap (basic_block
);
129 /* Count the number of non-jump active insns in BB. */
132 count_bb_insns (const_basic_block bb
)
135 rtx_insn
*insn
= BB_HEAD (bb
);
139 if (active_insn_p (insn
) && !JUMP_P (insn
))
142 if (insn
== BB_END (bb
))
144 insn
= NEXT_INSN (insn
);
150 /* Determine whether the total insn_rtx_cost on non-jump insns in
151 basic block BB is less than MAX_COST. This function returns
152 false if the cost of any instruction could not be estimated.
154 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
155 as those insns are being speculated. MAX_COST is scaled with SCALE
156 plus a small fudge factor. */
159 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
162 rtx_insn
*insn
= BB_HEAD (bb
);
163 bool speed
= optimize_bb_for_speed_p (bb
);
165 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
166 applied to insn_rtx_cost when optimizing for size. Only do
167 this after combine because if-conversion might interfere with
168 passes before combine.
170 Use optimize_function_for_speed_p instead of the pre-defined
171 variable speed to make sure it is set to same value for all
172 basic blocks in one if-conversion transformation. */
173 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
174 scale
= REG_BR_PROB_BASE
;
175 /* Our branch probability/scaling factors are just estimates and don't
176 account for cases where we can get speculation for free and other
177 secondary benefits. So we fudge the scale factor to make speculating
178 appear a little more profitable when optimizing for performance. */
180 scale
+= REG_BR_PROB_BASE
/ 8;
187 if (NONJUMP_INSN_P (insn
))
189 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
193 /* If this instruction is the load or set of a "stack" register,
194 such as a floating point register on x87, then the cost of
195 speculatively executing this insn may need to include
196 the additional cost of popping its result off of the
197 register stack. Unfortunately, correctly recognizing and
198 accounting for this additional overhead is tricky, so for
199 now we simply prohibit such speculative execution. */
202 rtx set
= single_set (insn
);
203 if (set
&& STACK_REG_P (SET_DEST (set
)))
209 if (count
>= max_cost
)
212 else if (CALL_P (insn
))
215 if (insn
== BB_END (bb
))
217 insn
= NEXT_INSN (insn
);
223 /* Return the first non-jump active insn in the basic block. */
226 first_active_insn (basic_block bb
)
228 rtx_insn
*insn
= BB_HEAD (bb
);
232 if (insn
== BB_END (bb
))
234 insn
= NEXT_INSN (insn
);
237 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
239 if (insn
== BB_END (bb
))
241 insn
= NEXT_INSN (insn
);
250 /* Return the last non-jump active (non-jump) insn in the basic block. */
253 last_active_insn (basic_block bb
, int skip_use_p
)
255 rtx_insn
*insn
= BB_END (bb
);
256 rtx_insn
*head
= BB_HEAD (bb
);
260 || DEBUG_INSN_P (insn
)
262 && NONJUMP_INSN_P (insn
)
263 && GET_CODE (PATTERN (insn
)) == USE
))
267 insn
= PREV_INSN (insn
);
276 /* Return the active insn before INSN inside basic block CURR_BB. */
279 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
281 if (!insn
|| insn
== BB_HEAD (curr_bb
))
284 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
286 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
289 /* No other active insn all the way to the start of the basic block. */
290 if (insn
== BB_HEAD (curr_bb
))
297 /* Return the active insn after INSN inside basic block CURR_BB. */
300 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
302 if (!insn
|| insn
== BB_END (curr_bb
))
305 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
307 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
310 /* No other active insn all the way to the end of the basic block. */
311 if (insn
== BB_END (curr_bb
))
318 /* Return the basic block reached by falling though the basic block BB. */
321 block_fallthru (basic_block bb
)
323 edge e
= find_fallthru_edge (bb
->succs
);
325 return (e
) ? e
->dest
: NULL_BLOCK
;
328 /* Return true if RTXs A and B can be safely interchanged. */
331 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
333 if (!rtx_equal_p (a
, b
))
336 if (GET_CODE (a
) != MEM
)
339 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
340 reference is not. Interchanging a dead type-unsafe memory reference with
341 a live type-safe one creates a live type-unsafe memory reference, in other
342 words, it makes the program illegal.
343 We check here conservatively whether the two memory references have equal
344 memory attributes. */
346 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
350 /* Go through a bunch of insns, converting them to conditional
351 execution format if possible. Return TRUE if all of the non-note
352 insns were processed. */
355 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
356 /* if block information */rtx_insn
*start
,
357 /* first insn to look at */rtx end
,
358 /* last insn to look at */rtx test
,
359 /* conditional execution test */int prob_val
,
360 /* probability of branch taken. */int mod_ok
)
362 int must_be_last
= FALSE
;
370 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
372 /* dwarf2out can't cope with conditional prologues. */
373 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
376 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
379 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
381 /* dwarf2out can't cope with conditional unwind info. */
382 if (RTX_FRAME_RELATED_P (insn
))
385 /* Remove USE insns that get in the way. */
386 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
388 /* ??? Ug. Actually unlinking the thing is problematic,
389 given what we'd have to coordinate with our callers. */
390 SET_INSN_DELETED (insn
);
394 /* Last insn wasn't last? */
398 if (modified_in_p (test
, insn
))
405 /* Now build the conditional form of the instruction. */
406 pattern
= PATTERN (insn
);
407 xtest
= copy_rtx (test
);
409 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
411 if (GET_CODE (pattern
) == COND_EXEC
)
413 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
416 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
417 COND_EXEC_TEST (pattern
));
418 pattern
= COND_EXEC_CODE (pattern
);
421 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
423 /* If the machine needs to modify the insn being conditionally executed,
424 say for example to force a constant integer operand into a temp
425 register, do so here. */
426 #ifdef IFCVT_MODIFY_INSN
427 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
432 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
434 if (CALL_P (insn
) && prob_val
>= 0)
435 validate_change (insn
, ®_NOTES (insn
),
436 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
437 prob_val
, REG_NOTES (insn
)), 1);
447 /* Return the condition for a jump. Do not do any special processing. */
450 cond_exec_get_condition (rtx_insn
*jump
)
454 if (any_condjump_p (jump
))
455 test_if
= SET_SRC (pc_set (jump
));
458 cond
= XEXP (test_if
, 0);
460 /* If this branches to JUMP_LABEL when the condition is false,
461 reverse the condition. */
462 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
463 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
465 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
469 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
476 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
477 to conditional execution. Return TRUE if we were successful at
478 converting the block. */
481 cond_exec_process_if_block (ce_if_block
* ce_info
,
482 /* if block information */int do_multiple_p
)
484 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
485 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
486 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
487 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
488 rtx_insn
*then_start
; /* first insn in THEN block */
489 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
490 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
491 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
492 int max
; /* max # of insns to convert. */
493 int then_mod_ok
; /* whether conditional mods are ok in THEN */
494 rtx true_expr
; /* test for else block insns */
495 rtx false_expr
; /* test for then block insns */
496 int true_prob_val
; /* probability of else block */
497 int false_prob_val
; /* probability of then block */
498 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
499 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
500 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
501 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
502 int then_n_insns
, else_n_insns
, n_insns
;
503 enum rtx_code false_code
;
506 /* If test is comprised of && or || elements, and we've failed at handling
507 all of them together, just use the last test if it is the special case of
508 && elements without an ELSE block. */
509 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
511 if (else_bb
|| ! ce_info
->and_and_p
)
514 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
515 ce_info
->num_multiple_test_blocks
= 0;
516 ce_info
->num_and_and_blocks
= 0;
517 ce_info
->num_or_or_blocks
= 0;
520 /* Find the conditional jump to the ELSE or JOIN part, and isolate
522 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
526 /* If the conditional jump is more than just a conditional jump,
527 then we can not do conditional execution conversion on this block. */
528 if (! onlyjump_p (BB_END (test_bb
)))
531 /* Collect the bounds of where we're to search, skipping any labels, jumps
532 and notes at the beginning and end of the block. Then count the total
533 number of insns and see if it is small enough to convert. */
534 then_start
= first_active_insn (then_bb
);
535 then_end
= last_active_insn (then_bb
, TRUE
);
536 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
537 n_insns
= then_n_insns
;
538 max
= MAX_CONDITIONAL_EXECUTE
;
545 else_start
= first_active_insn (else_bb
);
546 else_end
= last_active_insn (else_bb
, TRUE
);
547 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
548 n_insns
+= else_n_insns
;
550 /* Look for matching sequences at the head and tail of the two blocks,
551 and limit the range of insns to be converted if possible. */
552 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
553 &then_first_tail
, &else_first_tail
,
555 if (then_first_tail
== BB_HEAD (then_bb
))
556 then_start
= then_end
= NULL
;
557 if (else_first_tail
== BB_HEAD (else_bb
))
558 else_start
= else_end
= NULL
;
563 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
565 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
566 n_insns
-= 2 * n_matching
;
571 && then_n_insns
> n_matching
572 && else_n_insns
> n_matching
)
574 int longest_match
= MIN (then_n_insns
- n_matching
,
575 else_n_insns
- n_matching
);
577 = flow_find_head_matching_sequence (then_bb
, else_bb
,
586 /* We won't pass the insns in the head sequence to
587 cond_exec_process_insns, so we need to test them here
588 to make sure that they don't clobber the condition. */
589 for (insn
= BB_HEAD (then_bb
);
590 insn
!= NEXT_INSN (then_last_head
);
591 insn
= NEXT_INSN (insn
))
592 if (!LABEL_P (insn
) && !NOTE_P (insn
)
593 && !DEBUG_INSN_P (insn
)
594 && modified_in_p (test_expr
, insn
))
598 if (then_last_head
== then_end
)
599 then_start
= then_end
= NULL
;
600 if (else_last_head
== else_end
)
601 else_start
= else_end
= NULL
;
606 then_start
= find_active_insn_after (then_bb
, then_last_head
);
608 else_start
= find_active_insn_after (else_bb
, else_last_head
);
609 n_insns
-= 2 * n_matching
;
617 /* Map test_expr/test_jump into the appropriate MD tests to use on
618 the conditionally executed code. */
620 true_expr
= test_expr
;
622 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
623 if (false_code
!= UNKNOWN
)
624 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
625 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
627 false_expr
= NULL_RTX
;
629 #ifdef IFCVT_MODIFY_TESTS
630 /* If the machine description needs to modify the tests, such as setting a
631 conditional execution register from a comparison, it can do so here. */
632 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
634 /* See if the conversion failed. */
635 if (!true_expr
|| !false_expr
)
639 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
642 true_prob_val
= XINT (note
, 0);
643 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
651 /* If we have && or || tests, do them here. These tests are in the adjacent
652 blocks after the first block containing the test. */
653 if (ce_info
->num_multiple_test_blocks
> 0)
655 basic_block bb
= test_bb
;
656 basic_block last_test_bb
= ce_info
->last_test_bb
;
663 rtx_insn
*start
, *end
;
665 enum rtx_code f_code
;
667 bb
= block_fallthru (bb
);
668 start
= first_active_insn (bb
);
669 end
= last_active_insn (bb
, TRUE
);
671 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
672 false_prob_val
, FALSE
))
675 /* If the conditional jump is more than just a conditional jump, then
676 we can not do conditional execution conversion on this block. */
677 if (! onlyjump_p (BB_END (bb
)))
680 /* Find the conditional jump and isolate the test. */
681 t
= cond_exec_get_condition (BB_END (bb
));
685 f_code
= reversed_comparison_code (t
, BB_END (bb
));
686 if (f_code
== UNKNOWN
)
689 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
690 if (ce_info
->and_and_p
)
692 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
693 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
697 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
698 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
701 /* If the machine description needs to modify the tests, such as
702 setting a conditional execution register from a comparison, it can
704 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
705 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
707 /* See if the conversion failed. */
715 while (bb
!= last_test_bb
);
718 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
719 on then THEN block. */
720 then_mod_ok
= (else_bb
== NULL_BLOCK
);
722 /* Go through the THEN and ELSE blocks converting the insns if possible
723 to conditional execution. */
727 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
728 false_expr
, false_prob_val
,
732 if (else_bb
&& else_end
733 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
734 true_expr
, true_prob_val
, TRUE
))
737 /* If we cannot apply the changes, fail. Do not go through the normal fail
738 processing, since apply_change_group will call cancel_changes. */
739 if (! apply_change_group ())
741 #ifdef IFCVT_MODIFY_CANCEL
742 /* Cancel any machine dependent changes. */
743 IFCVT_MODIFY_CANCEL (ce_info
);
748 #ifdef IFCVT_MODIFY_FINAL
749 /* Do any machine dependent final modifications. */
750 IFCVT_MODIFY_FINAL (ce_info
);
753 /* Conversion succeeded. */
755 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
756 n_insns
, (n_insns
== 1) ? " was" : "s were");
758 /* Merge the blocks! If we had matching sequences, make sure to delete one
759 copy at the appropriate location first: delete the copy in the THEN branch
760 for a tail sequence so that the remaining one is executed last for both
761 branches, and delete the copy in the ELSE branch for a head sequence so
762 that the remaining one is executed first for both branches. */
765 rtx_insn
*from
= then_first_tail
;
767 from
= find_active_insn_after (then_bb
, from
);
768 delete_insn_chain (from
, BB_END (then_bb
), false);
771 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
773 merge_if_block (ce_info
);
774 cond_exec_changed_p
= TRUE
;
778 #ifdef IFCVT_MODIFY_CANCEL
779 /* Cancel any machine dependent changes. */
780 IFCVT_MODIFY_CANCEL (ce_info
);
787 /* Used by noce_process_if_block to communicate with its subroutines.
789 The subroutines know that A and B may be evaluated freely. They
790 know that X is a register. They should insert new instructions
791 before cond_earliest. */
795 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
796 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
798 /* The jump that ends TEST_BB. */
801 /* The jump condition. */
804 /* New insns should be inserted before this one. */
805 rtx_insn
*cond_earliest
;
807 /* Insns in the THEN and ELSE block. There is always just this
808 one insns in those blocks. The insns are single_set insns.
809 If there was no ELSE block, INSN_B is the last insn before
810 COND_EARLIEST, or NULL_RTX. In the former case, the insn
811 operands are still valid, as if INSN_B was moved down below
813 rtx_insn
*insn_a
, *insn_b
;
815 /* The SET_SRC of INSN_A and INSN_B. */
818 /* The SET_DEST of INSN_A. */
821 /* True if this if block is not canonical. In the canonical form of
822 if blocks, the THEN_BB is the block reached via the fallthru edge
823 from TEST_BB. For the noce transformations, we allow the symmetric
825 bool then_else_reversed
;
827 /* Estimated cost of the particular branch instruction. */
831 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
832 static int noce_try_move (struct noce_if_info
*);
833 static int noce_try_store_flag (struct noce_if_info
*);
834 static int noce_try_addcc (struct noce_if_info
*);
835 static int noce_try_store_flag_constants (struct noce_if_info
*);
836 static int noce_try_store_flag_mask (struct noce_if_info
*);
837 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
839 static int noce_try_cmove (struct noce_if_info
*);
840 static int noce_try_cmove_arith (struct noce_if_info
*);
841 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
842 static int noce_try_minmax (struct noce_if_info
*);
843 static int noce_try_abs (struct noce_if_info
*);
844 static int noce_try_sign_mask (struct noce_if_info
*);
846 /* Helper function for noce_try_store_flag*. */
849 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
852 rtx cond
= if_info
->cond
;
856 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
857 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
859 /* If earliest == jump, or when the condition is complex, try to
860 build the store_flag insn directly. */
864 rtx set
= pc_set (if_info
->jump
);
865 cond
= XEXP (SET_SRC (set
), 0);
866 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
867 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
868 reversep
= !reversep
;
869 if (if_info
->then_else_reversed
)
870 reversep
= !reversep
;
874 code
= reversed_comparison_code (cond
, if_info
->jump
);
876 code
= GET_CODE (cond
);
878 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
879 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
881 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
883 rtx set
= gen_rtx_SET (VOIDmode
, x
, src
);
886 rtx_insn
*insn
= emit_insn (set
);
888 if (recog_memoized (insn
) >= 0)
890 rtx_insn
*seq
= get_insns ();
894 if_info
->cond_earliest
= if_info
->jump
;
902 /* Don't even try if the comparison operands or the mode of X are weird. */
903 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
906 return emit_store_flag (x
, code
, XEXP (cond
, 0),
907 XEXP (cond
, 1), VOIDmode
,
908 (code
== LTU
|| code
== LEU
909 || code
== GEU
|| code
== GTU
), normalize
);
912 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
913 X is the destination/target and Y is the value to copy. */
916 noce_emit_move_insn (rtx x
, rtx y
)
918 machine_mode outmode
;
922 if (GET_CODE (x
) != STRICT_LOW_PART
)
924 rtx_insn
*seq
, *insn
;
929 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
930 otherwise construct a suitable SET pattern ourselves. */
931 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
932 ? emit_move_insn (x
, y
)
933 : emit_insn (gen_rtx_SET (VOIDmode
, x
, y
));
937 if (recog_memoized (insn
) <= 0)
939 if (GET_CODE (x
) == ZERO_EXTRACT
)
941 rtx op
= XEXP (x
, 0);
942 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
943 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
945 /* store_bit_field expects START to be relative to
946 BYTES_BIG_ENDIAN and adjusts this value for machines with
947 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
948 invoke store_bit_field again it is necessary to have the START
949 value from the first call. */
950 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
953 start
= BITS_PER_UNIT
- start
- size
;
956 gcc_assert (REG_P (op
));
957 start
= BITS_PER_WORD
- start
- size
;
961 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
962 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
966 switch (GET_RTX_CLASS (GET_CODE (y
)))
969 ot
= code_to_optab (GET_CODE (y
));
973 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
974 if (target
!= NULL_RTX
)
977 emit_move_insn (x
, target
);
986 ot
= code_to_optab (GET_CODE (y
));
990 target
= expand_binop (GET_MODE (y
), ot
,
991 XEXP (y
, 0), XEXP (y
, 1),
993 if (target
!= NULL_RTX
)
996 emit_move_insn (x
, target
);
1012 outer
= XEXP (x
, 0);
1013 inner
= XEXP (outer
, 0);
1014 outmode
= GET_MODE (outer
);
1015 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1016 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1020 /* Return the CC reg if it is used in COND. */
1023 cc_in_cond (rtx cond
)
1025 if (HAVE_cbranchcc4
&& cond
1026 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1027 return XEXP (cond
, 0);
1032 /* Return sequence of instructions generated by if conversion. This
1033 function calls end_sequence() to end the current stream, ensures
1034 that are instructions are unshared, recognizable non-jump insns.
1035 On failure, this function returns a NULL_RTX. */
1038 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1041 rtx_insn
*seq
= get_insns ();
1042 rtx cc
= cc_in_cond (if_info
->cond
);
1044 set_used_flags (if_info
->x
);
1045 set_used_flags (if_info
->cond
);
1046 set_used_flags (if_info
->a
);
1047 set_used_flags (if_info
->b
);
1048 unshare_all_rtl_in_chain (seq
);
1051 /* Make sure that all of the instructions emitted are recognizable,
1052 and that we haven't introduced a new jump instruction.
1053 As an exercise for the reader, build a general mechanism that
1054 allows proper placement of required clobbers. */
1055 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1057 || recog_memoized (insn
) == -1
1058 /* Make sure new generated code does not clobber CC. */
1059 || (cc
&& set_of (cc
, insn
)))
1065 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1066 "if (a == b) x = a; else x = b" into "x = b". */
1069 noce_try_move (struct noce_if_info
*if_info
)
1071 rtx cond
= if_info
->cond
;
1072 enum rtx_code code
= GET_CODE (cond
);
1076 if (code
!= NE
&& code
!= EQ
)
1079 /* This optimization isn't valid if either A or B could be a NaN
1080 or a signed zero. */
1081 if (HONOR_NANS (if_info
->x
)
1082 || HONOR_SIGNED_ZEROS (if_info
->x
))
1085 /* Check whether the operands of the comparison are A and in
1087 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1088 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1089 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1090 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1092 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1095 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1097 /* Avoid generating the move if the source is the destination. */
1098 if (! rtx_equal_p (if_info
->x
, y
))
1101 noce_emit_move_insn (if_info
->x
, y
);
1102 seq
= end_ifcvt_sequence (if_info
);
1106 emit_insn_before_setloc (seq
, if_info
->jump
,
1107 INSN_LOCATION (if_info
->insn_a
));
1114 /* Convert "if (test) x = 1; else x = 0".
1116 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1117 tried in noce_try_store_flag_constants after noce_try_cmove has had
1118 a go at the conversion. */
1121 noce_try_store_flag (struct noce_if_info
*if_info
)
1127 if (CONST_INT_P (if_info
->b
)
1128 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1129 && if_info
->a
== const0_rtx
)
1131 else if (if_info
->b
== const0_rtx
1132 && CONST_INT_P (if_info
->a
)
1133 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1134 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1142 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1145 if (target
!= if_info
->x
)
1146 noce_emit_move_insn (if_info
->x
, target
);
1148 seq
= end_ifcvt_sequence (if_info
);
1152 emit_insn_before_setloc (seq
, if_info
->jump
,
1153 INSN_LOCATION (if_info
->insn_a
));
1163 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1166 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1171 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1172 int normalize
, can_reverse
;
1175 if (CONST_INT_P (if_info
->a
)
1176 && CONST_INT_P (if_info
->b
))
1178 mode
= GET_MODE (if_info
->x
);
1179 ifalse
= INTVAL (if_info
->a
);
1180 itrue
= INTVAL (if_info
->b
);
1182 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1183 /* Make sure we can represent the difference between the two values. */
1185 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1188 diff
= trunc_int_for_mode (diff
, mode
);
1190 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1194 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1196 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1197 && (STORE_FLAG_VALUE
== 1
1198 || if_info
->branch_cost
>= 2))
1200 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1201 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1202 normalize
= 1, reversep
= 1;
1203 else if (itrue
== -1
1204 && (STORE_FLAG_VALUE
== -1
1205 || if_info
->branch_cost
>= 2))
1207 else if (ifalse
== -1 && can_reverse
1208 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1209 normalize
= -1, reversep
= 1;
1210 else if ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1211 || if_info
->branch_cost
>= 3)
1218 tmp
= itrue
; itrue
= ifalse
; ifalse
= tmp
;
1219 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1223 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1230 /* if (test) x = 3; else x = 4;
1231 => x = 3 + (test == 0); */
1232 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1234 target
= expand_simple_binop (mode
,
1235 (diff
== STORE_FLAG_VALUE
1237 gen_int_mode (ifalse
, mode
), target
,
1238 if_info
->x
, 0, OPTAB_WIDEN
);
1241 /* if (test) x = 8; else x = 0;
1242 => x = (test != 0) << 3; */
1243 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1245 target
= expand_simple_binop (mode
, ASHIFT
,
1246 target
, GEN_INT (tmp
), if_info
->x
, 0,
1250 /* if (test) x = -1; else x = b;
1251 => x = -(test != 0) | b; */
1252 else if (itrue
== -1)
1254 target
= expand_simple_binop (mode
, IOR
,
1255 target
, gen_int_mode (ifalse
, mode
),
1256 if_info
->x
, 0, OPTAB_WIDEN
);
1259 /* if (test) x = a; else x = b;
1260 => x = (-(test != 0) & (b - a)) + a; */
1263 target
= expand_simple_binop (mode
, AND
,
1264 target
, gen_int_mode (diff
, mode
),
1265 if_info
->x
, 0, OPTAB_WIDEN
);
1267 target
= expand_simple_binop (mode
, PLUS
,
1268 target
, gen_int_mode (ifalse
, mode
),
1269 if_info
->x
, 0, OPTAB_WIDEN
);
1278 if (target
!= if_info
->x
)
1279 noce_emit_move_insn (if_info
->x
, target
);
1281 seq
= end_ifcvt_sequence (if_info
);
1285 emit_insn_before_setloc (seq
, if_info
->jump
,
1286 INSN_LOCATION (if_info
->insn_a
));
1293 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1294 similarly for "foo--". */
1297 noce_try_addcc (struct noce_if_info
*if_info
)
1301 int subtract
, normalize
;
1303 if (GET_CODE (if_info
->a
) == PLUS
1304 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1305 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1308 rtx cond
= if_info
->cond
;
1309 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1311 /* First try to use addcc pattern. */
1312 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1313 && general_operand (XEXP (cond
, 1), VOIDmode
))
1316 target
= emit_conditional_add (if_info
->x
, code
,
1321 XEXP (if_info
->a
, 1),
1322 GET_MODE (if_info
->x
),
1323 (code
== LTU
|| code
== GEU
1324 || code
== LEU
|| code
== GTU
));
1327 if (target
!= if_info
->x
)
1328 noce_emit_move_insn (if_info
->x
, target
);
1330 seq
= end_ifcvt_sequence (if_info
);
1334 emit_insn_before_setloc (seq
, if_info
->jump
,
1335 INSN_LOCATION (if_info
->insn_a
));
1341 /* If that fails, construct conditional increment or decrement using
1343 if (if_info
->branch_cost
>= 2
1344 && (XEXP (if_info
->a
, 1) == const1_rtx
1345 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1348 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1349 subtract
= 0, normalize
= 0;
1350 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1351 subtract
= 1, normalize
= 0;
1353 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1356 target
= noce_emit_store_flag (if_info
,
1357 gen_reg_rtx (GET_MODE (if_info
->x
)),
1361 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1362 subtract
? MINUS
: PLUS
,
1363 if_info
->b
, target
, if_info
->x
,
1367 if (target
!= if_info
->x
)
1368 noce_emit_move_insn (if_info
->x
, target
);
1370 seq
= end_ifcvt_sequence (if_info
);
1374 emit_insn_before_setloc (seq
, if_info
->jump
,
1375 INSN_LOCATION (if_info
->insn_a
));
1385 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1388 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1395 if ((if_info
->branch_cost
>= 2
1396 || STORE_FLAG_VALUE
== -1)
1397 && ((if_info
->a
== const0_rtx
1398 && rtx_equal_p (if_info
->b
, if_info
->x
))
1399 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1402 && if_info
->b
== const0_rtx
1403 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1406 target
= noce_emit_store_flag (if_info
,
1407 gen_reg_rtx (GET_MODE (if_info
->x
)),
1410 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1412 target
, if_info
->x
, 0,
1417 int old_cost
, new_cost
, insn_cost
;
1420 if (target
!= if_info
->x
)
1421 noce_emit_move_insn (if_info
->x
, target
);
1423 seq
= end_ifcvt_sequence (if_info
);
1427 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1428 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1429 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1430 new_cost
= seq_cost (seq
, speed_p
);
1432 if (new_cost
> old_cost
)
1435 emit_insn_before_setloc (seq
, if_info
->jump
,
1436 INSN_LOCATION (if_info
->insn_a
));
1446 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1449 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1450 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1452 rtx target ATTRIBUTE_UNUSED
;
1453 int unsignedp ATTRIBUTE_UNUSED
;
1455 /* If earliest == jump, try to build the cmove insn directly.
1456 This is helpful when combine has created some complex condition
1457 (like for alpha's cmovlbs) that we can't hope to regenerate
1458 through the normal interface. */
1460 if (if_info
->cond_earliest
== if_info
->jump
)
1462 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1463 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1464 cond
, vtrue
, vfalse
);
1465 rtx set
= gen_rtx_SET (VOIDmode
, x
, if_then_else
);
1468 rtx_insn
*insn
= emit_insn (set
);
1470 if (recog_memoized (insn
) >= 0)
1472 rtx_insn
*seq
= get_insns ();
1482 /* Don't even try if the comparison operands are weird
1483 except that the target supports cbranchcc4. */
1484 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1485 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1487 if (!(HAVE_cbranchcc4
)
1488 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1489 || cmp_b
!= const0_rtx
)
1493 #if HAVE_conditional_move
1494 unsignedp
= (code
== LTU
|| code
== GEU
1495 || code
== LEU
|| code
== GTU
);
1497 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1498 vtrue
, vfalse
, GET_MODE (x
),
1503 /* We might be faced with a situation like:
1506 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1507 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1509 We can't do a conditional move in mode M, but it's possible that we
1510 could do a conditional move in mode N instead and take a subreg of
1513 If we can't create new pseudos, though, don't bother. */
1514 if (reload_completed
)
1517 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1519 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1520 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1521 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1522 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1523 rtx promoted_target
;
1525 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1526 || byte_vtrue
!= byte_vfalse
1527 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1528 != SUBREG_PROMOTED_VAR_P (vfalse
))
1529 || (SUBREG_PROMOTED_GET (vtrue
)
1530 != SUBREG_PROMOTED_GET (vfalse
)))
1533 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1535 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1536 VOIDmode
, reg_vtrue
, reg_vfalse
,
1537 GET_MODE (reg_vtrue
), unsignedp
);
1538 /* Nope, couldn't do it in that mode either. */
1542 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1543 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1544 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1545 emit_move_insn (x
, target
);
1551 /* We'll never get here, as noce_process_if_block doesn't call the
1552 functions involved. Ifdef code, however, should be discouraged
1553 because it leads to typos in the code not selected. However,
1554 emit_conditional_move won't exist either. */
1559 /* Try only simple constants and registers here. More complex cases
1560 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1561 has had a go at it. */
1564 noce_try_cmove (struct noce_if_info
*if_info
)
1570 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1571 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1575 code
= GET_CODE (if_info
->cond
);
1576 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1577 XEXP (if_info
->cond
, 0),
1578 XEXP (if_info
->cond
, 1),
1579 if_info
->a
, if_info
->b
);
1583 if (target
!= if_info
->x
)
1584 noce_emit_move_insn (if_info
->x
, target
);
1586 seq
= end_ifcvt_sequence (if_info
);
1590 emit_insn_before_setloc (seq
, if_info
->jump
,
1591 INSN_LOCATION (if_info
->insn_a
));
1604 /* Try more complex cases involving conditional_move. */
1607 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1613 rtx_insn
*insn_a
, *insn_b
;
1618 rtx_insn
*ifcvt_seq
;
1620 /* A conditional move from two memory sources is equivalent to a
1621 conditional on their addresses followed by a load. Don't do this
1622 early because it'll screw alias analysis. Note that we've
1623 already checked for no side effects. */
1624 /* ??? FIXME: Magic number 5. */
1625 if (cse_not_expected
1626 && MEM_P (a
) && MEM_P (b
)
1627 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1628 && if_info
->branch_cost
>= 5)
1630 machine_mode address_mode
= get_address_mode (a
);
1634 x
= gen_reg_rtx (address_mode
);
1638 /* ??? We could handle this if we knew that a load from A or B could
1639 not trap or fault. This is also true if we've already loaded
1640 from the address along the path from ENTRY. */
1641 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1644 /* if (test) x = a + b; else x = c - d;
1651 code
= GET_CODE (if_info
->cond
);
1652 insn_a
= if_info
->insn_a
;
1653 insn_b
= if_info
->insn_b
;
1655 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1656 if insn_rtx_cost can't be estimated. */
1660 = insn_rtx_cost (PATTERN (insn_a
),
1661 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a
)));
1662 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1671 += insn_rtx_cost (PATTERN (insn_b
),
1672 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b
)));
1673 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1677 /* Possibly rearrange operands to make things come out more natural. */
1678 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1681 if (rtx_equal_p (b
, x
))
1683 else if (general_operand (b
, GET_MODE (b
)))
1690 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1691 tmp
= a
, a
= b
, b
= tmp
;
1692 tmp_insn
= insn_a
, insn_a
= insn_b
, insn_b
= tmp_insn
;
1701 /* If either operand is complex, load it into a register first.
1702 The best way to do this is to copy the original insn. In this
1703 way we preserve any clobbers etc that the insn may have had.
1704 This is of course not possible in the IS_MEM case. */
1705 if (! general_operand (a
, GET_MODE (a
)))
1711 rtx reg
= gen_reg_rtx (GET_MODE (a
));
1712 insn
= emit_insn (gen_rtx_SET (VOIDmode
, reg
, a
));
1715 goto end_seq_and_fail
;
1718 a
= gen_reg_rtx (GET_MODE (a
));
1719 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
1720 rtx set
= single_set (copy_of_a
);
1722 insn
= emit_insn (PATTERN (copy_of_a
));
1724 if (recog_memoized (insn
) < 0)
1725 goto end_seq_and_fail
;
1727 if (! general_operand (b
, GET_MODE (b
)))
1735 rtx reg
= gen_reg_rtx (GET_MODE (b
));
1736 pat
= gen_rtx_SET (VOIDmode
, reg
, b
);
1739 goto end_seq_and_fail
;
1742 b
= gen_reg_rtx (GET_MODE (b
));
1743 rtx_insn
*copy_of_insn_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
1744 rtx set
= single_set (copy_of_insn_b
);
1746 pat
= PATTERN (copy_of_insn_b
);
1749 /* If insn to set up A clobbers any registers B depends on, try to
1750 swap insn that sets up A with the one that sets up B. If even
1751 that doesn't help, punt. */
1752 last
= get_last_insn ();
1753 if (last
&& modified_in_p (orig_b
, last
))
1755 new_insn
= emit_insn_before (pat
, get_insns ());
1756 if (modified_in_p (orig_a
, new_insn
))
1757 goto end_seq_and_fail
;
1760 new_insn
= emit_insn (pat
);
1762 if (recog_memoized (new_insn
) < 0)
1763 goto end_seq_and_fail
;
1766 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
1767 XEXP (if_info
->cond
, 1), a
, b
);
1770 goto end_seq_and_fail
;
1772 /* If we're handling a memory for above, emit the load now. */
1775 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
1777 /* Copy over flags as appropriate. */
1778 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
1779 MEM_VOLATILE_P (mem
) = 1;
1780 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
1781 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
1783 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
1785 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
1786 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
1788 noce_emit_move_insn (if_info
->x
, mem
);
1790 else if (target
!= x
)
1791 noce_emit_move_insn (x
, target
);
1793 ifcvt_seq
= end_ifcvt_sequence (if_info
);
1797 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
1798 INSN_LOCATION (if_info
->insn_a
));
1806 /* For most cases, the simplified condition we found is the best
1807 choice, but this is not the case for the min/max/abs transforms.
1808 For these we wish to know that it is A or B in the condition. */
1811 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
1812 rtx_insn
**earliest
)
1818 /* If target is already mentioned in the known condition, return it. */
1819 if (reg_mentioned_p (target
, if_info
->cond
))
1821 *earliest
= if_info
->cond_earliest
;
1822 return if_info
->cond
;
1825 set
= pc_set (if_info
->jump
);
1826 cond
= XEXP (SET_SRC (set
), 0);
1828 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
1829 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
1830 if (if_info
->then_else_reversed
)
1833 /* If we're looking for a constant, try to make the conditional
1834 have that constant in it. There are two reasons why it may
1835 not have the constant we want:
1837 1. GCC may have needed to put the constant in a register, because
1838 the target can't compare directly against that constant. For
1839 this case, we look for a SET immediately before the comparison
1840 that puts a constant in that register.
1842 2. GCC may have canonicalized the conditional, for example
1843 replacing "if x < 4" with "if x <= 3". We can undo that (or
1844 make equivalent types of changes) to get the constants we need
1845 if they're off by one in the right direction. */
1847 if (CONST_INT_P (target
))
1849 enum rtx_code code
= GET_CODE (if_info
->cond
);
1850 rtx op_a
= XEXP (if_info
->cond
, 0);
1851 rtx op_b
= XEXP (if_info
->cond
, 1);
1854 /* First, look to see if we put a constant in a register. */
1855 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
1857 && BLOCK_FOR_INSN (prev_insn
)
1858 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
1859 && INSN_P (prev_insn
)
1860 && GET_CODE (PATTERN (prev_insn
)) == SET
)
1862 rtx src
= find_reg_equal_equiv_note (prev_insn
);
1864 src
= SET_SRC (PATTERN (prev_insn
));
1865 if (CONST_INT_P (src
))
1867 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
1869 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
1872 if (CONST_INT_P (op_a
))
1877 code
= swap_condition (code
);
1882 /* Now, look to see if we can get the right constant by
1883 adjusting the conditional. */
1884 if (CONST_INT_P (op_b
))
1886 HOST_WIDE_INT desired_val
= INTVAL (target
);
1887 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
1892 if (actual_val
== desired_val
+ 1)
1895 op_b
= GEN_INT (desired_val
);
1899 if (actual_val
== desired_val
- 1)
1902 op_b
= GEN_INT (desired_val
);
1906 if (actual_val
== desired_val
- 1)
1909 op_b
= GEN_INT (desired_val
);
1913 if (actual_val
== desired_val
+ 1)
1916 op_b
= GEN_INT (desired_val
);
1924 /* If we made any changes, generate a new conditional that is
1925 equivalent to what we started with, but has the right
1927 if (code
!= GET_CODE (if_info
->cond
)
1928 || op_a
!= XEXP (if_info
->cond
, 0)
1929 || op_b
!= XEXP (if_info
->cond
, 1))
1931 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
1932 *earliest
= if_info
->cond_earliest
;
1937 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
1938 earliest
, target
, HAVE_cbranchcc4
, true);
1939 if (! cond
|| ! reg_mentioned_p (target
, cond
))
1942 /* We almost certainly searched back to a different place.
1943 Need to re-verify correct lifetimes. */
1945 /* X may not be mentioned in the range (cond_earliest, jump]. */
1946 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
1947 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
1950 /* A and B may not be modified in the range [cond_earliest, jump). */
1951 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
1953 && (modified_in_p (if_info
->a
, insn
)
1954 || modified_in_p (if_info
->b
, insn
)))
1960 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1963 noce_try_minmax (struct noce_if_info
*if_info
)
1966 rtx_insn
*earliest
, *seq
;
1967 enum rtx_code code
, op
;
1970 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1971 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1972 to get the target to tell us... */
1973 if (HONOR_SIGNED_ZEROS (if_info
->x
)
1974 || HONOR_NANS (if_info
->x
))
1977 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
1981 /* Verify the condition is of the form we expect, and canonicalize
1982 the comparison code. */
1983 code
= GET_CODE (cond
);
1984 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
1986 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
1989 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
1991 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
1993 code
= swap_condition (code
);
1998 /* Determine what sort of operation this is. Note that the code is for
1999 a taken branch, so the code->operation mapping appears backwards. */
2032 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2033 if_info
->a
, if_info
->b
,
2034 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2040 if (target
!= if_info
->x
)
2041 noce_emit_move_insn (if_info
->x
, target
);
2043 seq
= end_ifcvt_sequence (if_info
);
2047 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2048 if_info
->cond
= cond
;
2049 if_info
->cond_earliest
= earliest
;
2054 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2055 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2059 noce_try_abs (struct noce_if_info
*if_info
)
2061 rtx cond
, target
, a
, b
, c
;
2062 rtx_insn
*earliest
, *seq
;
2064 bool one_cmpl
= false;
2066 /* Reject modes with signed zeros. */
2067 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2070 /* Recognize A and B as constituting an ABS or NABS. The canonical
2071 form is a branch around the negation, taken when the object is the
2072 first operand of a comparison against 0 that evaluates to true. */
2075 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2077 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2079 c
= a
; a
= b
; b
= c
;
2082 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2087 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2089 c
= a
; a
= b
; b
= c
;
2096 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2100 /* Verify the condition is of the form we expect. */
2101 if (rtx_equal_p (XEXP (cond
, 0), b
))
2103 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2111 /* Verify that C is zero. Search one step backward for a
2112 REG_EQUAL note or a simple source if necessary. */
2116 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2118 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2119 && (set
= single_set (insn
))
2120 && rtx_equal_p (SET_DEST (set
), c
))
2122 rtx note
= find_reg_equal_equiv_note (insn
);
2132 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2133 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2134 c
= get_pool_constant (XEXP (c
, 0));
2136 /* Work around funny ideas get_condition has wrt canonicalization.
2137 Note that these rtx constants are known to be CONST_INT, and
2138 therefore imply integer comparisons. */
2139 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2141 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2143 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2146 /* Determine what sort of operation this is. */
2147 switch (GET_CODE (cond
))
2166 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2169 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2171 /* ??? It's a quandary whether cmove would be better here, especially
2172 for integers. Perhaps combine will clean things up. */
2173 if (target
&& negate
)
2176 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2179 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2189 if (target
!= if_info
->x
)
2190 noce_emit_move_insn (if_info
->x
, target
);
2192 seq
= end_ifcvt_sequence (if_info
);
2196 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2197 if_info
->cond
= cond
;
2198 if_info
->cond_earliest
= earliest
;
2203 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2206 noce_try_sign_mask (struct noce_if_info
*if_info
)
2212 bool t_unconditional
;
2214 cond
= if_info
->cond
;
2215 code
= GET_CODE (cond
);
2220 if (if_info
->a
== const0_rtx
)
2222 if ((code
== LT
&& c
== const0_rtx
)
2223 || (code
== LE
&& c
== constm1_rtx
))
2226 else if (if_info
->b
== const0_rtx
)
2228 if ((code
== GE
&& c
== const0_rtx
)
2229 || (code
== GT
&& c
== constm1_rtx
))
2233 if (! t
|| side_effects_p (t
))
2236 /* We currently don't handle different modes. */
2237 mode
= GET_MODE (t
);
2238 if (GET_MODE (m
) != mode
)
2241 /* This is only profitable if T is unconditionally executed/evaluated in the
2242 original insn sequence or T is cheap. The former happens if B is the
2243 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2244 INSN_B which can happen for e.g. conditional stores to memory. For the
2245 cost computation use the block TEST_BB where the evaluation will end up
2246 after the transformation. */
2249 && (if_info
->insn_b
== NULL_RTX
2250 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2251 if (!(t_unconditional
2252 || (set_src_cost (t
, optimize_bb_for_speed_p (if_info
->test_bb
))
2253 < COSTS_N_INSNS (2))))
2257 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2258 "(signed) m >> 31" directly. This benefits targets with specialized
2259 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2260 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2261 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2270 noce_emit_move_insn (if_info
->x
, t
);
2272 seq
= end_ifcvt_sequence (if_info
);
2276 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2281 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2285 noce_try_bitop (struct noce_if_info
*if_info
)
2287 rtx cond
, x
, a
, result
;
2294 cond
= if_info
->cond
;
2295 code
= GET_CODE (cond
);
2297 /* Check for no else condition. */
2298 if (! rtx_equal_p (x
, if_info
->b
))
2301 /* Check for a suitable condition. */
2302 if (code
!= NE
&& code
!= EQ
)
2304 if (XEXP (cond
, 1) != const0_rtx
)
2306 cond
= XEXP (cond
, 0);
2308 /* ??? We could also handle AND here. */
2309 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2311 if (XEXP (cond
, 1) != const1_rtx
2312 || !CONST_INT_P (XEXP (cond
, 2))
2313 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2315 bitnum
= INTVAL (XEXP (cond
, 2));
2316 mode
= GET_MODE (x
);
2317 if (BITS_BIG_ENDIAN
)
2318 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2319 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2326 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2328 /* Check for "if (X & C) x = x op C". */
2329 if (! rtx_equal_p (x
, XEXP (a
, 0))
2330 || !CONST_INT_P (XEXP (a
, 1))
2331 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2332 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2335 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2336 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2337 if (GET_CODE (a
) == IOR
)
2338 result
= (code
== NE
) ? a
: NULL_RTX
;
2339 else if (code
== NE
)
2341 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2342 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2343 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2347 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2348 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2349 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2352 else if (GET_CODE (a
) == AND
)
2354 /* Check for "if (X & C) x &= ~C". */
2355 if (! rtx_equal_p (x
, XEXP (a
, 0))
2356 || !CONST_INT_P (XEXP (a
, 1))
2357 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2358 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2361 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2362 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2363 result
= (code
== EQ
) ? a
: NULL_RTX
;
2371 noce_emit_move_insn (x
, result
);
2372 seq
= end_ifcvt_sequence (if_info
);
2376 emit_insn_before_setloc (seq
, if_info
->jump
,
2377 INSN_LOCATION (if_info
->insn_a
));
2383 /* Similar to get_condition, only the resulting condition must be
2384 valid at JUMP, instead of at EARLIEST.
2386 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2387 THEN block of the caller, and we have to reverse the condition. */
2390 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2395 if (! any_condjump_p (jump
))
2398 set
= pc_set (jump
);
2400 /* If this branches to JUMP_LABEL when the condition is false,
2401 reverse the condition. */
2402 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2403 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2405 /* We may have to reverse because the caller's if block is not canonical,
2406 i.e. the THEN block isn't the fallthrough block for the TEST block
2407 (see find_if_header). */
2408 if (then_else_reversed
)
2411 /* If the condition variable is a register and is MODE_INT, accept it. */
2413 cond
= XEXP (SET_SRC (set
), 0);
2414 tmp
= XEXP (cond
, 0);
2415 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2416 && (GET_MODE (tmp
) != BImode
2417 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2422 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2423 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2427 /* Otherwise, fall back on canonicalize_condition to do the dirty
2428 work of manipulating MODE_CC values and COMPARE rtx codes. */
2429 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2430 NULL_RTX
, HAVE_cbranchcc4
, true);
2432 /* We don't handle side-effects in the condition, like handling
2433 REG_INC notes and making sure no duplicate conditions are emitted. */
2434 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2440 /* Return true if OP is ok for if-then-else processing. */
2443 noce_operand_ok (const_rtx op
)
2445 if (side_effects_p (op
))
2448 /* We special-case memories, so handle any of them with
2449 no address side effects. */
2451 return ! side_effects_p (XEXP (op
, 0));
2453 return ! may_trap_p (op
);
2456 /* Return true if a write into MEM may trap or fault. */
2459 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2463 if (MEM_READONLY_P (mem
))
2466 if (may_trap_or_fault_p (mem
))
2469 addr
= XEXP (mem
, 0);
2471 /* Call target hook to avoid the effects of -fpic etc.... */
2472 addr
= targetm
.delegitimize_address (addr
);
2475 switch (GET_CODE (addr
))
2483 addr
= XEXP (addr
, 0);
2487 addr
= XEXP (addr
, 1);
2490 if (CONST_INT_P (XEXP (addr
, 1)))
2491 addr
= XEXP (addr
, 0);
2498 if (SYMBOL_REF_DECL (addr
)
2499 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2509 /* Return whether we can use store speculation for MEM. TOP_BB is the
2510 basic block above the conditional block where we are considering
2511 doing the speculative store. We look for whether MEM is set
2512 unconditionally later in the function. */
2515 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2517 basic_block dominator
;
2519 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2521 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2525 FOR_BB_INSNS (dominator
, insn
)
2527 /* If we see something that might be a memory barrier, we
2528 have to stop looking. Even if the MEM is set later in
2529 the function, we still don't want to set it
2530 unconditionally before the barrier. */
2532 && (volatile_insn_p (PATTERN (insn
))
2533 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2536 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2538 if (modified_in_p (XEXP (mem
, 0), insn
))
2547 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2548 it without using conditional execution. Return TRUE if we were successful
2549 at converting the block. */
2552 noce_process_if_block (struct noce_if_info
*if_info
)
2554 basic_block test_bb
= if_info
->test_bb
; /* test block */
2555 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2556 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2557 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2558 rtx_insn
*jump
= if_info
->jump
;
2559 rtx cond
= if_info
->cond
;
2560 rtx_insn
*insn_a
, *insn_b
;
2562 rtx orig_x
, x
, a
, b
;
2565 /* We're looking for patterns of the form
2567 (1) if (...) x = a; else x = b;
2568 (2) x = b; if (...) x = a;
2569 (3) if (...) x = a; // as if with an initial x = x.
2571 The later patterns require jumps to be more expensive.
2573 ??? For future expansion, look for multiple X in such patterns. */
2575 /* Look for one of the potential sets. */
2576 insn_a
= first_active_insn (then_bb
);
2578 || insn_a
!= last_active_insn (then_bb
, FALSE
)
2579 || (set_a
= single_set (insn_a
)) == NULL_RTX
)
2582 x
= SET_DEST (set_a
);
2583 a
= SET_SRC (set_a
);
2585 /* Look for the other potential set. Make sure we've got equivalent
2587 /* ??? This is overconservative. Storing to two different mems is
2588 as easy as conditionally computing the address. Storing to a
2589 single mem merely requires a scratch memory to use as one of the
2590 destination addresses; often the memory immediately below the
2591 stack pointer is available for this. */
2595 insn_b
= first_active_insn (else_bb
);
2597 || insn_b
!= last_active_insn (else_bb
, FALSE
)
2598 || (set_b
= single_set (insn_b
)) == NULL_RTX
2599 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
)))
2604 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2605 /* We're going to be moving the evaluation of B down from above
2606 COND_EARLIEST to JUMP. Make sure the relevant data is still
2609 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
2610 || !NONJUMP_INSN_P (insn_b
)
2611 || (set_b
= single_set (insn_b
)) == NULL_RTX
2612 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
2613 || ! noce_operand_ok (SET_SRC (set_b
))
2614 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
2615 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
2616 /* Avoid extending the lifetime of hard registers on small
2617 register class machines. */
2618 || (REG_P (SET_SRC (set_b
))
2619 && HARD_REGISTER_P (SET_SRC (set_b
))
2620 && targetm
.small_register_classes_for_mode_p
2621 (GET_MODE (SET_SRC (set_b
))))
2622 /* Likewise with X. In particular this can happen when
2623 noce_get_condition looks farther back in the instruction
2624 stream than one might expect. */
2625 || reg_overlap_mentioned_p (x
, cond
)
2626 || reg_overlap_mentioned_p (x
, a
)
2627 || modified_between_p (x
, insn_b
, jump
))
2634 /* If x has side effects then only the if-then-else form is safe to
2635 convert. But even in that case we would need to restore any notes
2636 (such as REG_INC) at then end. That can be tricky if
2637 noce_emit_move_insn expands to more than one insn, so disable the
2638 optimization entirely for now if there are side effects. */
2639 if (side_effects_p (x
))
2642 b
= (set_b
? SET_SRC (set_b
) : x
);
2644 /* Only operate on register destinations, and even then avoid extending
2645 the lifetime of hard registers on small register class machines. */
2648 || (HARD_REGISTER_P (x
)
2649 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
2651 if (GET_MODE (x
) == BLKmode
)
2654 if (GET_CODE (x
) == ZERO_EXTRACT
2655 && (!CONST_INT_P (XEXP (x
, 1))
2656 || !CONST_INT_P (XEXP (x
, 2))))
2659 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
2660 ? XEXP (x
, 0) : x
));
2663 /* Don't operate on sources that may trap or are volatile. */
2664 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
2668 /* Set up the info block for our subroutines. */
2669 if_info
->insn_a
= insn_a
;
2670 if_info
->insn_b
= insn_b
;
2675 /* Skip it if the instruction to be moved might clobber CC. */
2676 cc
= cc_in_cond (cond
);
2678 && (set_of (cc
, insn_a
)
2679 || (insn_b
&& set_of (cc
, insn_b
))))
2682 /* Try optimizations in some approximation of a useful order. */
2683 /* ??? Should first look to see if X is live incoming at all. If it
2684 isn't, we don't need anything but an unconditional set. */
2686 /* Look and see if A and B are really the same. Avoid creating silly
2687 cmove constructs that no one will fix up later. */
2688 if (rtx_interchangeable_p (a
, b
))
2690 /* If we have an INSN_B, we don't have to create any new rtl. Just
2691 move the instruction that we already have. If we don't have an
2692 INSN_B, that means that A == X, and we've got a noop move. In
2693 that case don't do anything and let the code below delete INSN_A. */
2694 if (insn_b
&& else_bb
)
2698 if (else_bb
&& insn_b
== BB_END (else_bb
))
2699 BB_END (else_bb
) = PREV_INSN (insn_b
);
2700 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
2702 /* If there was a REG_EQUAL note, delete it since it may have been
2703 true due to this insn being after a jump. */
2704 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
2705 remove_note (insn_b
, note
);
2709 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2710 x must be executed twice. */
2711 else if (insn_b
&& side_effects_p (orig_x
))
2718 if (!set_b
&& MEM_P (orig_x
))
2720 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2721 for optimizations if writing to x may trap or fault,
2722 i.e. it's a memory other than a static var or a stack slot,
2723 is misaligned on strict aligned machines or is read-only. If
2724 x is a read-only memory, then the program is valid only if we
2725 avoid the store into it. If there are stores on both the
2726 THEN and ELSE arms, then we can go ahead with the conversion;
2727 either the program is broken, or the condition is always
2728 false such that the other memory is selected. */
2729 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
2732 /* Avoid store speculation: given "if (...) x = a" where x is a
2733 MEM, we only want to do the store if x is always set
2734 somewhere in the function. This avoids cases like
2735 if (pthread_mutex_trylock(mutex))
2737 where we only want global_variable to be changed if the mutex
2738 is held. FIXME: This should ideally be expressed directly in
2740 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
2744 if (noce_try_move (if_info
))
2746 if (noce_try_store_flag (if_info
))
2748 if (noce_try_bitop (if_info
))
2750 if (noce_try_minmax (if_info
))
2752 if (noce_try_abs (if_info
))
2754 if (HAVE_conditional_move
2755 && noce_try_cmove (if_info
))
2757 if (! targetm
.have_conditional_execution ())
2759 if (noce_try_store_flag_constants (if_info
))
2761 if (noce_try_addcc (if_info
))
2763 if (noce_try_store_flag_mask (if_info
))
2765 if (HAVE_conditional_move
2766 && noce_try_cmove_arith (if_info
))
2768 if (noce_try_sign_mask (if_info
))
2772 if (!else_bb
&& set_b
)
2784 /* If we used a temporary, fix it up now. */
2790 noce_emit_move_insn (orig_x
, x
);
2792 set_used_flags (orig_x
);
2793 unshare_all_rtl_in_chain (seq
);
2796 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
2799 /* The original THEN and ELSE blocks may now be removed. The test block
2800 must now jump to the join block. If the test block and the join block
2801 can be merged, do so. */
2804 delete_basic_block (else_bb
);
2808 remove_edge (find_edge (test_bb
, join_bb
));
2810 remove_edge (find_edge (then_bb
, join_bb
));
2811 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2812 delete_basic_block (then_bb
);
2815 if (can_merge_blocks_p (test_bb
, join_bb
))
2817 merge_blocks (test_bb
, join_bb
);
2821 num_updated_if_blocks
++;
2825 /* Check whether a block is suitable for conditional move conversion.
2826 Every insn must be a simple set of a register to a constant or a
2827 register. For each assignment, store the value in the pointer map
2828 VALS, keyed indexed by register pointer, then store the register
2829 pointer in REGS. COND is the condition we will test. */
2832 check_cond_move_block (basic_block bb
,
2833 hash_map
<rtx
, rtx
> *vals
,
2838 rtx cc
= cc_in_cond (cond
);
2840 /* We can only handle simple jumps at the end of the basic block.
2841 It is almost impossible to update the CFG otherwise. */
2843 if (JUMP_P (insn
) && !onlyjump_p (insn
))
2846 FOR_BB_INSNS (bb
, insn
)
2850 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2852 set
= single_set (insn
);
2856 dest
= SET_DEST (set
);
2857 src
= SET_SRC (set
);
2859 || (HARD_REGISTER_P (dest
)
2860 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
2863 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
2866 if (side_effects_p (src
) || side_effects_p (dest
))
2869 if (may_trap_p (src
) || may_trap_p (dest
))
2872 /* Don't try to handle this if the source register was
2873 modified earlier in the block. */
2876 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
2877 && vals
->get (SUBREG_REG (src
))))
2880 /* Don't try to handle this if the destination register was
2881 modified earlier in the block. */
2882 if (vals
->get (dest
))
2885 /* Don't try to handle this if the condition uses the
2886 destination register. */
2887 if (reg_overlap_mentioned_p (dest
, cond
))
2890 /* Don't try to handle this if the source register is modified
2891 later in the block. */
2892 if (!CONSTANT_P (src
)
2893 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
2896 /* Skip it if the instruction to be moved might clobber CC. */
2897 if (cc
&& set_of (cc
, insn
))
2900 vals
->put (dest
, src
);
2902 regs
->safe_push (dest
);
2908 /* Given a basic block BB suitable for conditional move conversion,
2909 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2910 the register values depending on COND, emit the insns in the block as
2911 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2912 processed. The caller has started a sequence for the conversion.
2913 Return true if successful, false if something goes wrong. */
2916 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
2917 basic_block bb
, rtx cond
,
2918 hash_map
<rtx
, rtx
> *then_vals
,
2919 hash_map
<rtx
, rtx
> *else_vals
,
2924 rtx cond_arg0
, cond_arg1
;
2926 code
= GET_CODE (cond
);
2927 cond_arg0
= XEXP (cond
, 0);
2928 cond_arg1
= XEXP (cond
, 1);
2930 FOR_BB_INSNS (bb
, insn
)
2932 rtx set
, target
, dest
, t
, e
;
2934 /* ??? Maybe emit conditional debug insn? */
2935 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2937 set
= single_set (insn
);
2938 gcc_assert (set
&& REG_P (SET_DEST (set
)));
2940 dest
= SET_DEST (set
);
2942 rtx
*then_slot
= then_vals
->get (dest
);
2943 rtx
*else_slot
= else_vals
->get (dest
);
2944 t
= then_slot
? *then_slot
: NULL_RTX
;
2945 e
= else_slot
? *else_slot
: NULL_RTX
;
2949 /* If this register was set in the then block, we already
2950 handled this case there. */
2963 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
2969 noce_emit_move_insn (dest
, target
);
2975 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2976 it using only conditional moves. Return TRUE if we were successful at
2977 converting the block. */
2980 cond_move_process_if_block (struct noce_if_info
*if_info
)
2982 basic_block test_bb
= if_info
->test_bb
;
2983 basic_block then_bb
= if_info
->then_bb
;
2984 basic_block else_bb
= if_info
->else_bb
;
2985 basic_block join_bb
= if_info
->join_bb
;
2986 rtx_insn
*jump
= if_info
->jump
;
2987 rtx cond
= if_info
->cond
;
2988 rtx_insn
*seq
, *loc_insn
;
2991 vec
<rtx
> then_regs
= vNULL
;
2992 vec
<rtx
> else_regs
= vNULL
;
2994 int success_p
= FALSE
;
2996 /* Build a mapping for each block to the value used for each
2998 hash_map
<rtx
, rtx
> then_vals
;
2999 hash_map
<rtx
, rtx
> else_vals
;
3001 /* Make sure the blocks are suitable. */
3002 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3004 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3007 /* Make sure the blocks can be used together. If the same register
3008 is set in both blocks, and is not set to a constant in both
3009 cases, then both blocks must set it to the same register. We
3010 have already verified that if it is set to a register, that the
3011 source register does not change after the assignment. Also count
3012 the number of registers set in only one of the blocks. */
3014 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3016 rtx
*then_slot
= then_vals
.get (reg
);
3017 rtx
*else_slot
= else_vals
.get (reg
);
3019 gcc_checking_assert (then_slot
);
3024 rtx then_val
= *then_slot
;
3025 rtx else_val
= *else_slot
;
3026 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3027 && !rtx_equal_p (then_val
, else_val
))
3032 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3033 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3035 gcc_checking_assert (else_vals
.get (reg
));
3036 if (!then_vals
.get (reg
))
3040 /* Make sure it is reasonable to convert this block. What matters
3041 is the number of assignments currently made in only one of the
3042 branches, since if we convert we are going to always execute
3044 if (c
> MAX_CONDITIONAL_EXECUTE
)
3047 /* Try to emit the conditional moves. First do the then block,
3048 then do anything left in the else blocks. */
3050 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3051 &then_vals
, &else_vals
, false)
3053 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3054 &then_vals
, &else_vals
, true)))
3059 seq
= end_ifcvt_sequence (if_info
);
3063 loc_insn
= first_active_insn (then_bb
);
3066 loc_insn
= first_active_insn (else_bb
);
3067 gcc_assert (loc_insn
);
3069 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3073 delete_basic_block (else_bb
);
3077 remove_edge (find_edge (test_bb
, join_bb
));
3079 remove_edge (find_edge (then_bb
, join_bb
));
3080 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3081 delete_basic_block (then_bb
);
3084 if (can_merge_blocks_p (test_bb
, join_bb
))
3086 merge_blocks (test_bb
, join_bb
);
3090 num_updated_if_blocks
++;
3095 then_regs
.release ();
3096 else_regs
.release ();
3101 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3102 IF-THEN-ELSE-JOIN block.
3104 If so, we'll try to convert the insns to not require the branch,
3105 using only transformations that do not require conditional execution.
3107 Return TRUE if we were successful at converting the block. */
3110 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3113 basic_block then_bb
, else_bb
, join_bb
;
3114 bool then_else_reversed
= false;
3117 rtx_insn
*cond_earliest
;
3118 struct noce_if_info if_info
;
3120 /* We only ever should get here before reload. */
3121 gcc_assert (!reload_completed
);
3123 /* Recognize an IF-THEN-ELSE-JOIN block. */
3124 if (single_pred_p (then_edge
->dest
)
3125 && single_succ_p (then_edge
->dest
)
3126 && single_pred_p (else_edge
->dest
)
3127 && single_succ_p (else_edge
->dest
)
3128 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3130 then_bb
= then_edge
->dest
;
3131 else_bb
= else_edge
->dest
;
3132 join_bb
= single_succ (then_bb
);
3134 /* Recognize an IF-THEN-JOIN block. */
3135 else if (single_pred_p (then_edge
->dest
)
3136 && single_succ_p (then_edge
->dest
)
3137 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3139 then_bb
= then_edge
->dest
;
3140 else_bb
= NULL_BLOCK
;
3141 join_bb
= else_edge
->dest
;
3143 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3144 of basic blocks in cfglayout mode does not matter, so the fallthrough
3145 edge can go to any basic block (and not just to bb->next_bb, like in
3147 else if (single_pred_p (else_edge
->dest
)
3148 && single_succ_p (else_edge
->dest
)
3149 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3151 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3152 To make this work, we have to invert the THEN and ELSE blocks
3153 and reverse the jump condition. */
3154 then_bb
= else_edge
->dest
;
3155 else_bb
= NULL_BLOCK
;
3156 join_bb
= single_succ (then_bb
);
3157 then_else_reversed
= true;
3160 /* Not a form we can handle. */
3163 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3164 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3167 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3170 num_possible_if_blocks
++;
3175 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3176 (else_bb
) ? "-ELSE" : "",
3177 pass
, test_bb
->index
, then_bb
->index
);
3180 fprintf (dump_file
, ", else %d", else_bb
->index
);
3182 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3185 /* If the conditional jump is more than just a conditional
3186 jump, then we can not do if-conversion on this block. */
3187 jump
= BB_END (test_bb
);
3188 if (! onlyjump_p (jump
))
3191 /* If this is not a standard conditional jump, we can't parse it. */
3192 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3196 /* We must be comparing objects whose modes imply the size. */
3197 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3200 /* Initialize an IF_INFO struct to pass around. */
3201 memset (&if_info
, 0, sizeof if_info
);
3202 if_info
.test_bb
= test_bb
;
3203 if_info
.then_bb
= then_bb
;
3204 if_info
.else_bb
= else_bb
;
3205 if_info
.join_bb
= join_bb
;
3206 if_info
.cond
= cond
;
3207 if_info
.cond_earliest
= cond_earliest
;
3208 if_info
.jump
= jump
;
3209 if_info
.then_else_reversed
= then_else_reversed
;
3210 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3211 predictable_edge_p (then_edge
));
3213 /* Do the real work. */
3215 if (noce_process_if_block (&if_info
))
3218 if (HAVE_conditional_move
3219 && cond_move_process_if_block (&if_info
))
3226 /* Merge the blocks and mark for local life update. */
3229 merge_if_block (struct ce_if_block
* ce_info
)
3231 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3232 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3233 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3234 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3235 basic_block combo_bb
;
3237 /* All block merging is done into the lower block numbers. */
3240 df_set_bb_dirty (test_bb
);
3242 /* Merge any basic blocks to handle && and || subtests. Each of
3243 the blocks are on the fallthru path from the predecessor block. */
3244 if (ce_info
->num_multiple_test_blocks
> 0)
3246 basic_block bb
= test_bb
;
3247 basic_block last_test_bb
= ce_info
->last_test_bb
;
3248 basic_block fallthru
= block_fallthru (bb
);
3253 fallthru
= block_fallthru (bb
);
3254 merge_blocks (combo_bb
, bb
);
3257 while (bb
!= last_test_bb
);
3260 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3261 label, but it might if there were || tests. That label's count should be
3262 zero, and it normally should be removed. */
3266 /* If THEN_BB has no successors, then there's a BARRIER after it.
3267 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3268 is no longer needed, and in fact it is incorrect to leave it in
3270 if (EDGE_COUNT (then_bb
->succs
) == 0
3271 && EDGE_COUNT (combo_bb
->succs
) > 1)
3273 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3274 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3275 end
= NEXT_INSN (end
);
3277 if (end
&& BARRIER_P (end
))
3280 merge_blocks (combo_bb
, then_bb
);
3284 /* The ELSE block, if it existed, had a label. That label count
3285 will almost always be zero, but odd things can happen when labels
3286 get their addresses taken. */
3289 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3290 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3291 is no longer needed, and in fact it is incorrect to leave it in
3293 if (EDGE_COUNT (else_bb
->succs
) == 0
3294 && EDGE_COUNT (combo_bb
->succs
) > 1)
3296 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3297 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3298 end
= NEXT_INSN (end
);
3300 if (end
&& BARRIER_P (end
))
3303 merge_blocks (combo_bb
, else_bb
);
3307 /* If there was no join block reported, that means it was not adjacent
3308 to the others, and so we cannot merge them. */
3312 rtx_insn
*last
= BB_END (combo_bb
);
3314 /* The outgoing edge for the current COMBO block should already
3315 be correct. Verify this. */
3316 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3317 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3318 || (NONJUMP_INSN_P (last
)
3319 && GET_CODE (PATTERN (last
)) == TRAP_IF
3320 && (TRAP_CONDITION (PATTERN (last
))
3321 == const_true_rtx
)));
3324 /* There should still be something at the end of the THEN or ELSE
3325 blocks taking us to our final destination. */
3326 gcc_assert (JUMP_P (last
)
3327 || (EDGE_SUCC (combo_bb
, 0)->dest
3328 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3330 && SIBLING_CALL_P (last
))
3331 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3332 && can_throw_internal (last
)));
3335 /* The JOIN block may have had quite a number of other predecessors too.
3336 Since we've already merged the TEST, THEN and ELSE blocks, we should
3337 have only one remaining edge from our if-then-else diamond. If there
3338 is more than one remaining edge, it must come from elsewhere. There
3339 may be zero incoming edges if the THEN block didn't actually join
3340 back up (as with a call to a non-return function). */
3341 else if (EDGE_COUNT (join_bb
->preds
) < 2
3342 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3344 /* We can merge the JOIN cleanly and update the dataflow try
3345 again on this pass.*/
3346 merge_blocks (combo_bb
, join_bb
);
3351 /* We cannot merge the JOIN. */
3353 /* The outgoing edge for the current COMBO block should already
3354 be correct. Verify this. */
3355 gcc_assert (single_succ_p (combo_bb
)
3356 && single_succ (combo_bb
) == join_bb
);
3358 /* Remove the jump and cruft from the end of the COMBO block. */
3359 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3360 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3363 num_updated_if_blocks
++;
3366 /* Find a block ending in a simple IF condition and try to transform it
3367 in some way. When converting a multi-block condition, put the new code
3368 in the first such block and delete the rest. Return a pointer to this
3369 first block if some transformation was done. Return NULL otherwise. */
3372 find_if_header (basic_block test_bb
, int pass
)
3374 ce_if_block ce_info
;
3378 /* The kind of block we're looking for has exactly two successors. */
3379 if (EDGE_COUNT (test_bb
->succs
) != 2)
3382 then_edge
= EDGE_SUCC (test_bb
, 0);
3383 else_edge
= EDGE_SUCC (test_bb
, 1);
3385 if (df_get_bb_dirty (then_edge
->dest
))
3387 if (df_get_bb_dirty (else_edge
->dest
))
3390 /* Neither edge should be abnormal. */
3391 if ((then_edge
->flags
& EDGE_COMPLEX
)
3392 || (else_edge
->flags
& EDGE_COMPLEX
))
3395 /* Nor exit the loop. */
3396 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3397 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3400 /* The THEN edge is canonically the one that falls through. */
3401 if (then_edge
->flags
& EDGE_FALLTHRU
)
3403 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3406 else_edge
= then_edge
;
3410 /* Otherwise this must be a multiway branch of some sort. */
3413 memset (&ce_info
, 0, sizeof (ce_info
));
3414 ce_info
.test_bb
= test_bb
;
3415 ce_info
.then_bb
= then_edge
->dest
;
3416 ce_info
.else_bb
= else_edge
->dest
;
3417 ce_info
.pass
= pass
;
3419 #ifdef IFCVT_MACHDEP_INIT
3420 IFCVT_MACHDEP_INIT (&ce_info
);
3423 if (!reload_completed
3424 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3427 if (reload_completed
3428 && targetm
.have_conditional_execution ()
3429 && cond_exec_find_if_block (&ce_info
))
3433 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3434 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3437 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3438 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3440 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3442 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3450 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3451 /* Set this so we continue looking. */
3452 cond_exec_changed_p
= TRUE
;
3453 return ce_info
.test_bb
;
3456 /* Return true if a block has two edges, one of which falls through to the next
3457 block, and the other jumps to a specific block, so that we can tell if the
3458 block is part of an && test or an || test. Returns either -1 or the number
3459 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3462 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3465 int fallthru_p
= FALSE
;
3472 if (!cur_bb
|| !target_bb
)
3475 /* If no edges, obviously it doesn't jump or fallthru. */
3476 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3479 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3481 if (cur_edge
->flags
& EDGE_COMPLEX
)
3482 /* Anything complex isn't what we want. */
3485 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3488 else if (cur_edge
->dest
== target_bb
)
3495 if ((jump_p
& fallthru_p
) == 0)
3498 /* Don't allow calls in the block, since this is used to group && and ||
3499 together for conditional execution support. ??? we should support
3500 conditional execution support across calls for IA-64 some day, but
3501 for now it makes the code simpler. */
3502 end
= BB_END (cur_bb
);
3503 insn
= BB_HEAD (cur_bb
);
3505 while (insn
!= NULL_RTX
)
3512 && !DEBUG_INSN_P (insn
)
3513 && GET_CODE (PATTERN (insn
)) != USE
3514 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3520 insn
= NEXT_INSN (insn
);
3526 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3527 block. If so, we'll try to convert the insns to not require the branch.
3528 Return TRUE if we were successful at converting the block. */
3531 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3533 basic_block test_bb
= ce_info
->test_bb
;
3534 basic_block then_bb
= ce_info
->then_bb
;
3535 basic_block else_bb
= ce_info
->else_bb
;
3536 basic_block join_bb
= NULL_BLOCK
;
3541 ce_info
->last_test_bb
= test_bb
;
3543 /* We only ever should get here after reload,
3544 and if we have conditional execution. */
3545 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3547 /* Discover if any fall through predecessors of the current test basic block
3548 were && tests (which jump to the else block) or || tests (which jump to
3550 if (single_pred_p (test_bb
)
3551 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3553 basic_block bb
= single_pred (test_bb
);
3554 basic_block target_bb
;
3555 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3558 /* Determine if the preceding block is an && or || block. */
3559 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3561 ce_info
->and_and_p
= TRUE
;
3562 target_bb
= else_bb
;
3564 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
3566 ce_info
->and_and_p
= FALSE
;
3567 target_bb
= then_bb
;
3570 target_bb
= NULL_BLOCK
;
3572 if (target_bb
&& n_insns
<= max_insns
)
3574 int total_insns
= 0;
3577 ce_info
->last_test_bb
= test_bb
;
3579 /* Found at least one && or || block, look for more. */
3582 ce_info
->test_bb
= test_bb
= bb
;
3583 total_insns
+= n_insns
;
3586 if (!single_pred_p (bb
))
3589 bb
= single_pred (bb
);
3590 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
3592 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
3594 ce_info
->num_multiple_test_blocks
= blocks
;
3595 ce_info
->num_multiple_test_insns
= total_insns
;
3597 if (ce_info
->and_and_p
)
3598 ce_info
->num_and_and_blocks
= blocks
;
3600 ce_info
->num_or_or_blocks
= blocks
;
3604 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3605 other than any || blocks which jump to the THEN block. */
3606 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
3609 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3610 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
3612 if (cur_edge
->flags
& EDGE_COMPLEX
)
3616 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
3618 if (cur_edge
->flags
& EDGE_COMPLEX
)
3622 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3623 if (EDGE_COUNT (then_bb
->succs
) > 0
3624 && (!single_succ_p (then_bb
)
3625 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3626 || (epilogue_completed
3627 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
3630 /* If the THEN block has no successors, conditional execution can still
3631 make a conditional call. Don't do this unless the ELSE block has
3632 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3633 Check for the last insn of the THEN block being an indirect jump, which
3634 is listed as not having any successors, but confuses the rest of the CE
3635 code processing. ??? we should fix this in the future. */
3636 if (EDGE_COUNT (then_bb
->succs
) == 0)
3638 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3640 rtx_insn
*last_insn
= BB_END (then_bb
);
3643 && NOTE_P (last_insn
)
3644 && last_insn
!= BB_HEAD (then_bb
))
3645 last_insn
= PREV_INSN (last_insn
);
3648 && JUMP_P (last_insn
)
3649 && ! simplejump_p (last_insn
))
3653 else_bb
= NULL_BLOCK
;
3659 /* If the THEN block's successor is the other edge out of the TEST block,
3660 then we have an IF-THEN combo without an ELSE. */
3661 else if (single_succ (then_bb
) == else_bb
)
3664 else_bb
= NULL_BLOCK
;
3667 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3668 has exactly one predecessor and one successor, and the outgoing edge
3669 is not complex, then we have an IF-THEN-ELSE combo. */
3670 else if (single_succ_p (else_bb
)
3671 && single_succ (then_bb
) == single_succ (else_bb
)
3672 && single_pred_p (else_bb
)
3673 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3674 && !(epilogue_completed
3675 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
3676 join_bb
= single_succ (else_bb
);
3678 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3682 num_possible_if_blocks
++;
3687 "\nIF-THEN%s block found, pass %d, start block %d "
3688 "[insn %d], then %d [%d]",
3689 (else_bb
) ? "-ELSE" : "",
3692 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
3694 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
3697 fprintf (dump_file
, ", else %d [%d]",
3699 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
3701 fprintf (dump_file
, ", join %d [%d]",
3703 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
3705 if (ce_info
->num_multiple_test_blocks
> 0)
3706 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
3707 ce_info
->num_multiple_test_blocks
,
3708 (ce_info
->and_and_p
) ? "&&" : "||",
3709 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
3710 ce_info
->last_test_bb
->index
,
3711 ((BB_HEAD (ce_info
->last_test_bb
))
3712 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
3715 fputc ('\n', dump_file
);
3718 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3719 first condition for free, since we've already asserted that there's a
3720 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3721 we checked the FALLTHRU flag, those are already adjacent to the last IF
3723 /* ??? As an enhancement, move the ELSE block. Have to deal with
3724 BLOCK notes, if by no other means than backing out the merge if they
3725 exist. Sticky enough I don't want to think about it now. */
3727 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
3729 if ((next
= next
->next_bb
) != join_bb
3730 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3738 /* Do the real work. */
3740 ce_info
->else_bb
= else_bb
;
3741 ce_info
->join_bb
= join_bb
;
3743 /* If we have && and || tests, try to first handle combining the && and ||
3744 tests into the conditional code, and if that fails, go back and handle
3745 it without the && and ||, which at present handles the && case if there
3746 was no ELSE block. */
3747 if (cond_exec_process_if_block (ce_info
, TRUE
))
3750 if (ce_info
->num_multiple_test_blocks
)
3754 if (cond_exec_process_if_block (ce_info
, FALSE
))
3761 /* Convert a branch over a trap, or a branch
3762 to a trap, into a conditional trap. */
3765 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
3767 basic_block then_bb
= then_edge
->dest
;
3768 basic_block else_bb
= else_edge
->dest
;
3769 basic_block other_bb
, trap_bb
;
3770 rtx_insn
*trap
, *jump
;
3772 rtx_insn
*cond_earliest
;
3775 /* Locate the block with the trap instruction. */
3776 /* ??? While we look for no successors, we really ought to allow
3777 EH successors. Need to fix merge_if_block for that to work. */
3778 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
3779 trap_bb
= then_bb
, other_bb
= else_bb
;
3780 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
3781 trap_bb
= else_bb
, other_bb
= then_bb
;
3787 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
3788 test_bb
->index
, trap_bb
->index
);
3791 /* If this is not a standard conditional jump, we can't parse it. */
3792 jump
= BB_END (test_bb
);
3793 cond
= noce_get_condition (jump
, &cond_earliest
, false);
3797 /* If the conditional jump is more than just a conditional jump, then
3798 we can not do if-conversion on this block. */
3799 if (! onlyjump_p (jump
))
3802 /* We must be comparing objects whose modes imply the size. */
3803 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3806 /* Reverse the comparison code, if necessary. */
3807 code
= GET_CODE (cond
);
3808 if (then_bb
== trap_bb
)
3810 code
= reversed_comparison_code (cond
, jump
);
3811 if (code
== UNKNOWN
)
3815 /* Attempt to generate the conditional trap. */
3816 seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
3817 copy_rtx (XEXP (cond
, 1)),
3818 TRAP_CODE (PATTERN (trap
)));
3822 /* Emit the new insns before cond_earliest. */
3823 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
3825 /* Delete the trap block if possible. */
3826 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
3827 df_set_bb_dirty (test_bb
);
3828 df_set_bb_dirty (then_bb
);
3829 df_set_bb_dirty (else_bb
);
3831 if (EDGE_COUNT (trap_bb
->preds
) == 0)
3833 delete_basic_block (trap_bb
);
3837 /* Wire together the blocks again. */
3838 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
3839 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
3840 else if (trap_bb
== then_bb
)
3845 lab
= JUMP_LABEL (jump
);
3846 newjump
= emit_jump_insn_after (gen_jump (lab
), jump
);
3847 LABEL_NUSES (lab
) += 1;
3848 JUMP_LABEL (newjump
) = lab
;
3849 emit_barrier_after (newjump
);
3853 if (can_merge_blocks_p (test_bb
, other_bb
))
3855 merge_blocks (test_bb
, other_bb
);
3859 num_updated_if_blocks
++;
3863 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3867 block_has_only_trap (basic_block bb
)
3871 /* We're not the exit block. */
3872 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
3875 /* The block must have no successors. */
3876 if (EDGE_COUNT (bb
->succs
) > 0)
3879 /* The only instruction in the THEN block must be the trap. */
3880 trap
= first_active_insn (bb
);
3881 if (! (trap
== BB_END (bb
)
3882 && GET_CODE (PATTERN (trap
)) == TRAP_IF
3883 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
3889 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3890 transformable, but not necessarily the other. There need be no
3893 Return TRUE if we were successful at converting the block.
3895 Cases we'd like to look at:
3898 if (test) goto over; // x not live
3906 if (! test) goto label;
3909 if (test) goto E; // x not live
3923 (3) // This one's really only interesting for targets that can do
3924 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3925 // it results in multiple branches on a cache line, which often
3926 // does not sit well with predictors.
3928 if (test1) goto E; // predicted not taken
3944 (A) Don't do (2) if the branch is predicted against the block we're
3945 eliminating. Do it anyway if we can eliminate a branch; this requires
3946 that the sole successor of the eliminated block postdominate the other
3949 (B) With CE, on (3) we can steal from both sides of the if, creating
3958 Again, this is most useful if J postdominates.
3960 (C) CE substitutes for helpful life information.
3962 (D) These heuristics need a lot of work. */
3964 /* Tests for case 1 above. */
3967 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
3969 basic_block then_bb
= then_edge
->dest
;
3970 basic_block else_bb
= else_edge
->dest
;
3972 int then_bb_index
, then_prob
;
3973 rtx else_target
= NULL_RTX
;
3975 /* If we are partitioning hot/cold basic blocks, we don't want to
3976 mess up unconditional or indirect jumps that cross between hot
3979 Basic block partitioning may result in some jumps that appear to
3980 be optimizable (or blocks that appear to be mergeable), but which really
3981 must be left untouched (they are required to make it safely across
3982 partition boundaries). See the comments at the top of
3983 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
3985 if ((BB_END (then_bb
)
3986 && JUMP_P (BB_END (then_bb
))
3987 && CROSSING_JUMP_P (BB_END (then_bb
)))
3988 || (BB_END (test_bb
)
3989 && JUMP_P (BB_END (test_bb
))
3990 && CROSSING_JUMP_P (BB_END (test_bb
)))
3991 || (BB_END (else_bb
)
3992 && JUMP_P (BB_END (else_bb
))
3993 && CROSSING_JUMP_P (BB_END (else_bb
))))
3996 /* THEN has one successor. */
3997 if (!single_succ_p (then_bb
))
4000 /* THEN does not fall through, but is not strange either. */
4001 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4004 /* THEN has one predecessor. */
4005 if (!single_pred_p (then_bb
))
4008 /* THEN must do something. */
4009 if (forwarder_block_p (then_bb
))
4012 num_possible_if_blocks
++;
4015 "\nIF-CASE-1 found, start %d, then %d\n",
4016 test_bb
->index
, then_bb
->index
);
4018 if (then_edge
->probability
)
4019 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4021 then_prob
= REG_BR_PROB_BASE
/ 2;
4023 /* We're speculating from the THEN path, we want to make sure the cost
4024 of speculation is within reason. */
4025 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4026 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4027 predictable_edge_p (then_edge
)))))
4030 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4032 rtx_insn
*jump
= BB_END (else_edge
->src
);
4033 gcc_assert (JUMP_P (jump
));
4034 else_target
= JUMP_LABEL (jump
);
4037 /* Registers set are dead, or are predicable. */
4038 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4039 single_succ_edge (then_bb
), 1))
4042 /* Conversion went ok, including moving the insns and fixing up the
4043 jump. Adjust the CFG to match. */
4045 /* We can avoid creating a new basic block if then_bb is immediately
4046 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4047 through to else_bb. */
4049 if (then_bb
->next_bb
== else_bb
4050 && then_bb
->prev_bb
== test_bb
4051 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4053 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4056 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4057 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4058 else_bb
, else_target
);
4060 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4063 df_set_bb_dirty (test_bb
);
4064 df_set_bb_dirty (else_bb
);
4066 then_bb_index
= then_bb
->index
;
4067 delete_basic_block (then_bb
);
4069 /* Make rest of code believe that the newly created block is the THEN_BB
4070 block we removed. */
4073 df_bb_replace (then_bb_index
, new_bb
);
4074 /* This should have been done above via force_nonfallthru_and_redirect
4075 (possibly called from redirect_edge_and_branch_force). */
4076 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4080 num_updated_if_blocks
++;
4085 /* Test for case 2 above. */
4088 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4090 basic_block then_bb
= then_edge
->dest
;
4091 basic_block else_bb
= else_edge
->dest
;
4093 int then_prob
, else_prob
;
4095 /* We do not want to speculate (empty) loop latches. */
4097 && else_bb
->loop_father
->latch
== else_bb
)
4100 /* If we are partitioning hot/cold basic blocks, we don't want to
4101 mess up unconditional or indirect jumps that cross between hot
4104 Basic block partitioning may result in some jumps that appear to
4105 be optimizable (or blocks that appear to be mergeable), but which really
4106 must be left untouched (they are required to make it safely across
4107 partition boundaries). See the comments at the top of
4108 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4110 if ((BB_END (then_bb
)
4111 && JUMP_P (BB_END (then_bb
))
4112 && CROSSING_JUMP_P (BB_END (then_bb
)))
4113 || (BB_END (test_bb
)
4114 && JUMP_P (BB_END (test_bb
))
4115 && CROSSING_JUMP_P (BB_END (test_bb
)))
4116 || (BB_END (else_bb
)
4117 && JUMP_P (BB_END (else_bb
))
4118 && CROSSING_JUMP_P (BB_END (else_bb
))))
4121 /* ELSE has one successor. */
4122 if (!single_succ_p (else_bb
))
4125 else_succ
= single_succ_edge (else_bb
);
4127 /* ELSE outgoing edge is not complex. */
4128 if (else_succ
->flags
& EDGE_COMPLEX
)
4131 /* ELSE has one predecessor. */
4132 if (!single_pred_p (else_bb
))
4135 /* THEN is not EXIT. */
4136 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4139 if (else_edge
->probability
)
4141 else_prob
= else_edge
->probability
;
4142 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4146 else_prob
= REG_BR_PROB_BASE
/ 2;
4147 then_prob
= REG_BR_PROB_BASE
/ 2;
4150 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4151 if (else_prob
> then_prob
)
4153 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4154 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4160 num_possible_if_blocks
++;
4163 "\nIF-CASE-2 found, start %d, else %d\n",
4164 test_bb
->index
, else_bb
->index
);
4166 /* We're speculating from the ELSE path, we want to make sure the cost
4167 of speculation is within reason. */
4168 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4169 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4170 predictable_edge_p (else_edge
)))))
4173 /* Registers set are dead, or are predicable. */
4174 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4177 /* Conversion went ok, including moving the insns and fixing up the
4178 jump. Adjust the CFG to match. */
4180 df_set_bb_dirty (test_bb
);
4181 df_set_bb_dirty (then_bb
);
4182 delete_basic_block (else_bb
);
4185 num_updated_if_blocks
++;
4187 /* ??? We may now fallthru from one of THEN's successors into a join
4188 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4193 /* Used by the code above to perform the actual rtl transformations.
4194 Return TRUE if successful.
4196 TEST_BB is the block containing the conditional branch. MERGE_BB
4197 is the block containing the code to manipulate. DEST_EDGE is an
4198 edge representing a jump to the join block; after the conversion,
4199 TEST_BB should be branching to its destination.
4200 REVERSEP is true if the sense of the branch should be reversed. */
4203 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4204 basic_block other_bb
, edge dest_edge
, int reversep
)
4206 basic_block new_dest
= dest_edge
->dest
;
4207 rtx_insn
*head
, *end
, *jump
;
4208 rtx_insn
*earliest
= NULL
;
4210 bitmap merge_set
= NULL
;
4211 /* Number of pending changes. */
4212 int n_validated_changes
= 0;
4213 rtx new_dest_label
= NULL_RTX
;
4215 jump
= BB_END (test_bb
);
4217 /* Find the extent of the real code in the merge block. */
4218 head
= BB_HEAD (merge_bb
);
4219 end
= BB_END (merge_bb
);
4221 while (DEBUG_INSN_P (end
) && end
!= head
)
4222 end
= PREV_INSN (end
);
4224 /* If merge_bb ends with a tablejump, predicating/moving insn's
4225 into test_bb and then deleting merge_bb will result in the jumptable
4226 that follows merge_bb being removed along with merge_bb and then we
4227 get an unresolved reference to the jumptable. */
4228 if (tablejump_p (end
, NULL
, NULL
))
4232 head
= NEXT_INSN (head
);
4233 while (DEBUG_INSN_P (head
) && head
!= end
)
4234 head
= NEXT_INSN (head
);
4242 head
= NEXT_INSN (head
);
4243 while (DEBUG_INSN_P (head
) && head
!= end
)
4244 head
= NEXT_INSN (head
);
4249 if (!onlyjump_p (end
))
4256 end
= PREV_INSN (end
);
4257 while (DEBUG_INSN_P (end
) && end
!= head
)
4258 end
= PREV_INSN (end
);
4261 /* Don't move frame-related insn across the conditional branch. This
4262 can lead to one of the paths of the branch having wrong unwind info. */
4263 if (epilogue_completed
)
4265 rtx_insn
*insn
= head
;
4268 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4272 insn
= NEXT_INSN (insn
);
4276 /* Disable handling dead code by conditional execution if the machine needs
4277 to do anything funny with the tests, etc. */
4278 #ifndef IFCVT_MODIFY_TESTS
4279 if (targetm
.have_conditional_execution ())
4281 /* In the conditional execution case, we have things easy. We know
4282 the condition is reversible. We don't have to check life info
4283 because we're going to conditionally execute the code anyway.
4284 All that's left is making sure the insns involved can actually
4289 cond
= cond_exec_get_condition (jump
);
4293 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4294 int prob_val
= (note
? XINT (note
, 0) : -1);
4298 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4301 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4304 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4307 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4308 && verify_changes (0))
4309 n_validated_changes
= num_validated_changes ();
4317 /* If we allocated new pseudos (e.g. in the conditional move
4318 expander called from noce_emit_cmove), we must resize the
4320 if (max_regno
< max_reg_num ())
4321 max_regno
= max_reg_num ();
4323 /* Try the NCE path if the CE path did not result in any changes. */
4324 if (n_validated_changes
== 0)
4331 /* In the non-conditional execution case, we have to verify that there
4332 are no trapping operations, no calls, no references to memory, and
4333 that any registers modified are dead at the branch site. */
4335 if (!any_condjump_p (jump
))
4338 /* Find the extent of the conditional. */
4339 cond
= noce_get_condition (jump
, &earliest
, false);
4343 live
= BITMAP_ALLOC (®_obstack
);
4344 simulate_backwards_to_point (merge_bb
, live
, end
);
4345 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4347 df_get_live_in (other_bb
), NULL
);
4352 /* Collect the set of registers set in MERGE_BB. */
4353 merge_set
= BITMAP_ALLOC (®_obstack
);
4355 FOR_BB_INSNS (merge_bb
, insn
)
4356 if (NONDEBUG_INSN_P (insn
))
4357 df_simulate_find_defs (insn
, merge_set
);
4359 /* If shrink-wrapping, disable this optimization when test_bb is
4360 the first basic block and merge_bb exits. The idea is to not
4361 move code setting up a return register as that may clobber a
4362 register used to pass function parameters, which then must be
4363 saved in caller-saved regs. A caller-saved reg requires the
4364 prologue, killing a shrink-wrap opportunity. */
4365 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4366 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4367 && single_succ_p (new_dest
)
4368 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4369 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4374 return_regs
= BITMAP_ALLOC (®_obstack
);
4376 /* Start off with the intersection of regs used to pass
4377 params and regs used to return values. */
4378 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4379 if (FUNCTION_ARG_REGNO_P (i
)
4380 && targetm
.calls
.function_value_regno_p (i
))
4381 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4383 bitmap_and_into (return_regs
,
4384 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4385 bitmap_and_into (return_regs
,
4386 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4387 if (!bitmap_empty_p (return_regs
))
4389 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4390 if (NONDEBUG_INSN_P (insn
))
4394 /* If this insn sets any reg in return_regs, add all
4395 reg uses to the set of regs we're interested in. */
4396 FOR_EACH_INSN_DEF (def
, insn
)
4397 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4399 df_simulate_uses (insn
, return_regs
);
4403 if (bitmap_intersect_p (merge_set
, return_regs
))
4405 BITMAP_FREE (return_regs
);
4406 BITMAP_FREE (merge_set
);
4410 BITMAP_FREE (return_regs
);
4415 /* We don't want to use normal invert_jump or redirect_jump because
4416 we don't want to delete_insn called. Also, we want to do our own
4417 change group management. */
4419 old_dest
= JUMP_LABEL (jump
);
4420 if (other_bb
!= new_dest
)
4422 if (!any_condjump_p (jump
))
4425 if (JUMP_P (BB_END (dest_edge
->src
)))
4426 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4427 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4428 new_dest_label
= ret_rtx
;
4430 new_dest_label
= block_label (new_dest
);
4433 ? ! invert_jump_1 (jump
, new_dest_label
)
4434 : ! redirect_jump_1 (jump
, new_dest_label
))
4438 if (verify_changes (n_validated_changes
))
4439 confirm_change_group ();
4443 if (other_bb
!= new_dest
)
4445 redirect_jump_2 (jump
, old_dest
, new_dest_label
, 0, reversep
);
4447 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4450 gcov_type count
, probability
;
4451 count
= BRANCH_EDGE (test_bb
)->count
;
4452 BRANCH_EDGE (test_bb
)->count
= FALLTHRU_EDGE (test_bb
)->count
;
4453 FALLTHRU_EDGE (test_bb
)->count
= count
;
4454 probability
= BRANCH_EDGE (test_bb
)->probability
;
4455 BRANCH_EDGE (test_bb
)->probability
4456 = FALLTHRU_EDGE (test_bb
)->probability
;
4457 FALLTHRU_EDGE (test_bb
)->probability
= probability
;
4458 update_br_prob_note (test_bb
);
4462 /* Move the insns out of MERGE_BB to before the branch. */
4467 if (end
== BB_END (merge_bb
))
4468 BB_END (merge_bb
) = PREV_INSN (head
);
4470 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4471 notes being moved might become invalid. */
4477 if (! INSN_P (insn
))
4479 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4482 remove_note (insn
, note
);
4483 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4485 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4486 notes referring to the registers being set might become invalid. */
4492 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4493 remove_reg_equal_equiv_notes_for_regno (i
);
4495 BITMAP_FREE (merge_set
);
4498 reorder_insns (head
, end
, PREV_INSN (earliest
));
4501 /* Remove the jump and edge if we can. */
4502 if (other_bb
== new_dest
)
4505 remove_edge (BRANCH_EDGE (test_bb
));
4506 /* ??? Can't merge blocks here, as then_bb is still in use.
4507 At minimum, the merge will get done just before bb-reorder. */
4516 BITMAP_FREE (merge_set
);
4521 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4522 we are after combine pass. */
4525 if_convert (bool after_combine
)
4532 df_live_add_problem ();
4533 df_live_set_all_dirty ();
4536 /* Record whether we are after combine pass. */
4537 ifcvt_after_combine
= after_combine
;
4538 num_possible_if_blocks
= 0;
4539 num_updated_if_blocks
= 0;
4540 num_true_changes
= 0;
4542 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4543 mark_loop_exit_edges ();
4544 loop_optimizer_finalize ();
4545 free_dominance_info (CDI_DOMINATORS
);
4547 /* Compute postdominators. */
4548 calculate_dominance_info (CDI_POST_DOMINATORS
);
4550 df_set_flags (DF_LR_RUN_DCE
);
4552 /* Go through each of the basic blocks looking for things to convert. If we
4553 have conditional execution, we make multiple passes to allow us to handle
4554 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4559 /* Only need to do dce on the first pass. */
4560 df_clear_flags (DF_LR_RUN_DCE
);
4561 cond_exec_changed_p
= FALSE
;
4564 #ifdef IFCVT_MULTIPLE_DUMPS
4565 if (dump_file
&& pass
> 1)
4566 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
4569 FOR_EACH_BB_FN (bb
, cfun
)
4572 while (!df_get_bb_dirty (bb
)
4573 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
4577 #ifdef IFCVT_MULTIPLE_DUMPS
4578 if (dump_file
&& cond_exec_changed_p
)
4579 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
4582 while (cond_exec_changed_p
);
4584 #ifdef IFCVT_MULTIPLE_DUMPS
4586 fprintf (dump_file
, "\n\n========== no more changes\n");
4589 free_dominance_info (CDI_POST_DOMINATORS
);
4594 clear_aux_for_blocks ();
4596 /* If we allocated new pseudos, we must resize the array for sched1. */
4597 if (max_regno
< max_reg_num ())
4598 max_regno
= max_reg_num ();
4600 /* Write the final stats. */
4601 if (dump_file
&& num_possible_if_blocks
> 0)
4604 "\n%d possible IF blocks searched.\n",
4605 num_possible_if_blocks
);
4607 "%d IF blocks converted.\n",
4608 num_updated_if_blocks
);
4610 "%d true changes made.\n\n\n",
4615 df_remove_problem (df_live
);
4617 #ifdef ENABLE_CHECKING
4618 verify_flow_info ();
4622 /* If-conversion and CFG cleanup. */
4624 rest_of_handle_if_conversion (void)
4626 if (flag_if_conversion
)
4630 dump_reg_info (dump_file
);
4631 dump_flow_info (dump_file
, dump_flags
);
4633 cleanup_cfg (CLEANUP_EXPENSIVE
);
4643 const pass_data pass_data_rtl_ifcvt
=
4645 RTL_PASS
, /* type */
4647 OPTGROUP_NONE
, /* optinfo_flags */
4648 TV_IFCVT
, /* tv_id */
4649 0, /* properties_required */
4650 0, /* properties_provided */
4651 0, /* properties_destroyed */
4652 0, /* todo_flags_start */
4653 TODO_df_finish
, /* todo_flags_finish */
4656 class pass_rtl_ifcvt
: public rtl_opt_pass
4659 pass_rtl_ifcvt (gcc::context
*ctxt
)
4660 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
4663 /* opt_pass methods: */
4664 virtual bool gate (function
*)
4666 return (optimize
> 0) && dbg_cnt (if_conversion
);
4669 virtual unsigned int execute (function
*)
4671 return rest_of_handle_if_conversion ();
4674 }; // class pass_rtl_ifcvt
4679 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
4681 return new pass_rtl_ifcvt (ctxt
);
4685 /* Rerun if-conversion, as combine may have simplified things enough
4686 to now meet sequence length restrictions. */
4690 const pass_data pass_data_if_after_combine
=
4692 RTL_PASS
, /* type */
4694 OPTGROUP_NONE
, /* optinfo_flags */
4695 TV_IFCVT
, /* tv_id */
4696 0, /* properties_required */
4697 0, /* properties_provided */
4698 0, /* properties_destroyed */
4699 0, /* todo_flags_start */
4700 TODO_df_finish
, /* todo_flags_finish */
4703 class pass_if_after_combine
: public rtl_opt_pass
4706 pass_if_after_combine (gcc::context
*ctxt
)
4707 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
4710 /* opt_pass methods: */
4711 virtual bool gate (function
*)
4713 return optimize
> 0 && flag_if_conversion
4714 && dbg_cnt (if_after_combine
);
4717 virtual unsigned int execute (function
*)
4723 }; // class pass_if_after_combine
4728 make_pass_if_after_combine (gcc::context
*ctxt
)
4730 return new pass_if_after_combine (ctxt
);
4736 const pass_data pass_data_if_after_reload
=
4738 RTL_PASS
, /* type */
4740 OPTGROUP_NONE
, /* optinfo_flags */
4741 TV_IFCVT2
, /* tv_id */
4742 0, /* properties_required */
4743 0, /* properties_provided */
4744 0, /* properties_destroyed */
4745 0, /* todo_flags_start */
4746 TODO_df_finish
, /* todo_flags_finish */
4749 class pass_if_after_reload
: public rtl_opt_pass
4752 pass_if_after_reload (gcc::context
*ctxt
)
4753 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
4756 /* opt_pass methods: */
4757 virtual bool gate (function
*)
4759 return optimize
> 0 && flag_if_conversion2
4760 && dbg_cnt (if_after_reload
);
4763 virtual unsigned int execute (function
*)
4769 }; // class pass_if_after_reload
4774 make_pass_if_after_reload (gcc::context
*ctxt
)
4776 return new pass_if_after_reload (ctxt
);