gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2017 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_LRA_INT_H
  22 #define GCC_LRA_INT_H
  23
  24 #define lra_assert(c) gcc_checking_assert (c)
  25
  26 /* The parameter used to prevent infinite reloading for an insn.  Each
  27    insn operands might require a reload and, if it is a memory, its
  28    base and index registers might require a reload too.  */
  29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  30
  31 typedef struct lra_live_range *lra_live_range_t;
  32
  33 /* The structure describes program points where a given pseudo lives.
  34    The live ranges can be used to find conflicts with other pseudos.
  35    If the live ranges of two pseudos are intersected, the pseudos are
  36    in conflict.  */
  37 struct lra_live_range
  38 {
  39   /* Pseudo regno whose live range is described by given
  40      structure.  */
  41   int regno;
  42   /* Program point range.  */
  43   int start, finish;
  44   /* Next structure describing program points where the pseudo
  45      lives.  */
  46   lra_live_range_t next;
  47   /* Pointer to structures with the same start.  */
  48   lra_live_range_t start_next;
  49 };
  50
  51 typedef struct lra_copy *lra_copy_t;
  52
  53 /* Copy between pseudos which affects assigning hard registers.  */
  54 struct lra_copy
  55 {
  56   /* True if regno1 is the destination of the copy.  */
  57   bool regno1_dest_p;
  58   /* Execution frequency of the copy.  */
  59   int freq;
  60   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  61   int regno1, regno2;
  62   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  63   lra_copy_t regno1_next, regno2_next;
  64 };
  65
  66 /* Common info about a register (pseudo or hard register).  */
  67 struct lra_reg
  68 {
  69   /* Bitmap of UIDs of insns (including debug insns) referring the
  70      reg.  */
  71   bitmap_head insn_bitmap;
  72   /* The following fields are defined only for pseudos.  */
  73   /* Hard registers with which the pseudo conflicts.  */
  74   HARD_REG_SET conflict_hard_regs;
  75   /* Call used registers with which the pseudo conflicts, taking into account
  76      the registers used by functions called from calls which cross the
  77      pseudo.  */
  78   HARD_REG_SET actual_call_used_reg_set;
  79   /* We assign hard registers to reload pseudos which can occur in few
  80      places.  So two hard register preferences are enough for them.
  81      The following fields define the preferred hard registers.  If
  82      there are no such hard registers the first field value is
  83      negative.  If there is only one preferred hard register, the 2nd
  84      field is negative.  */
  85   int preferred_hard_regno1, preferred_hard_regno2;
  86   /* Profits to use the corresponding preferred hard registers.  If
  87      the both hard registers defined, the first hard register has not
  88      less profit than the second one.  */
  89   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
  90 #ifdef STACK_REGS
  91   /* True if the pseudo should not be assigned to a stack register.  */
  92   bool no_stack_p;
  93 #endif
  94   /* True if the pseudo crosses a call.  It is setup in lra-lives.c
  95      and used to check that the pseudo crossing a call did not get a
  96      call used hard register.  */
  97   bool call_p;
  98   /* Number of references and execution frequencies of the register in
  99      *non-debug* insns.  */
 100   int nrefs, freq;
 101   int last_reload;
 102   /* rtx used to undo the inheritance.  It can be non-null only
 103      between subsequent inheritance and undo inheritance passes.  */
 104   rtx restore_rtx;
 105   /* Value holding by register.  If the pseudos have the same value
 106      they do not conflict.  */
 107   int val;
 108   /* Offset from relative eliminate register to pesudo reg.  */
 109   int offset;
 110   /* These members are set up in lra-lives.c and updated in
 111      lra-coalesce.c.  */
 112   /* The biggest size mode in which each pseudo reg is referred in
 113      whole function (possibly via subreg).  */
 114   machine_mode biggest_mode;
 115   /* Live ranges of the pseudo.  */
 116   lra_live_range_t live_ranges;
 117   /* This member is set up in lra-lives.c for subsequent
 118      assignments.  */
 119   lra_copy_t copies;
 120 };
 121
 122 /* References to the common info about each register.  */
 123 extern struct lra_reg *lra_reg_info;
 124
 125 /* Static info about each insn operand (common for all insns with the
 126    same ICODE).  Warning: if the structure definition is changed, the
 127    initializer for debug_operand_data in lra.c should be changed
 128    too.  */
 129 struct lra_operand_data
 130 {
 131   /* The machine description constraint string of the operand.  */
 132   const char *constraint;
 133   /* Alternatives for which early_clobber can be true.  */
 134   alternative_mask early_clobber_alts;
 135   /* It is taken only from machine description (which is different
 136      from recog_data.operand_mode) and can be of VOIDmode.  */
 137   ENUM_BITFIELD(machine_mode) mode : 16;
 138   /* The type of the operand (in/out/inout).  */
 139   ENUM_BITFIELD (op_type) type : 8;
 140   /* Through if accessed through STRICT_LOW.  */
 141   unsigned int strict_low : 1;
 142   /* True if the operand is an operator.  */
 143   unsigned int is_operator : 1;
 144   /* True if there is an early clobber alternative for this operand.
 145      This field is set up every time when corresponding
 146      operand_alternative in lra_static_insn_data is set up.  */
 147   unsigned int early_clobber : 1;
 148   /* True if the operand is an address.  */
 149   unsigned int is_address : 1;
 150 };
 151
 152 /* Info about register occurrence in an insn.  */
 153 struct lra_insn_reg
 154 {
 155   /* Alternatives for which early_clobber can be true.  */
 156   alternative_mask early_clobber_alts;
 157   /* The biggest mode through which the insn refers to the register
 158      occurrence (remember the register can be accessed through a
 159      subreg in the insn).  */
 160   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 161   /* The type of the corresponding operand which is the register.  */
 162   ENUM_BITFIELD (op_type) type : 8;
 163   /* True if the reg is accessed through a subreg and the subreg is
 164      just a part of the register.  */
 165   unsigned int subreg_p : 1;
 166   /* True if there is an early clobber alternative for this
 167      operand.  */
 168   unsigned int early_clobber : 1;
 169   /* The corresponding regno of the register.  */
 170   int regno;
 171   /* Next reg info of the same insn.  */
 172   struct lra_insn_reg *next;
 173 };
 174
 175 /* Static part (common info for insns with the same ICODE) of LRA
 176    internal insn info. It exists in at most one exemplar for each
 177    non-negative ICODE. There is only one exception. Each asm insn has
 178    own structure.  Warning: if the structure definition is changed,
 179    the initializer for debug_insn_static_data in lra.c should be
 180    changed too.  */
 181 struct lra_static_insn_data
 182 {
 183   /* Static info about each insn operand.  */
 184   struct lra_operand_data *operand;
 185   /* Each duplication refers to the number of the corresponding
 186      operand which is duplicated.  */
 187   int *dup_num;
 188   /* The number of an operand marked as commutative, -1 otherwise.  */
 189   int commutative;
 190   /* Number of operands, duplications, and alternatives of the
 191      insn.  */
 192   char n_operands;
 193   char n_dups;
 194   char n_alternatives;
 195   /* Insns in machine description (or clobbers in asm) may contain
 196      explicit hard regs which are not operands.  The following list
 197      describes such hard registers.  */
 198   struct lra_insn_reg *hard_regs;
 199   /* Array [n_alternatives][n_operand] of static constraint info for
 200      given operand in given alternative.  This info can be changed if
 201      the target reg info is changed.  */
 202   const struct operand_alternative *operand_alternative;
 203 };
 204
 205 /* LRA internal info about an insn (LRA internal insn
 206    representation).  */
 207 struct lra_insn_recog_data
 208 {
 209   /* The insn code.  */
 210   int icode;
 211   /* The alternative should be used for the insn, -1 if invalid, or we
 212      should try to use any alternative, or the insn is a debug
 213      insn.  */
 214   int used_insn_alternative;
 215   /* SP offset before the insn relative to one at the func start.  */
 216   HOST_WIDE_INT sp_offset;
 217   /* The insn itself.  */
 218   rtx_insn *insn;
 219   /* Common data for insns with the same ICODE.  Asm insns (their
 220      ICODE is negative) do not share such structures.  */
 221   struct lra_static_insn_data *insn_static_data;
 222   /* Two arrays of size correspondingly equal to the operand and the
 223      duplication numbers: */
 224   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 225   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 226   /* Number of hard registers implicitly used/clobbered in given call
 227      insn.  The value can be NULL or points to array of the hard
 228      register numbers ending with a negative value.  To differ
 229      clobbered and used hard regs, clobbered hard regs are incremented
 230      by FIRST_PSEUDO_REGISTER.  */
 231   int *arg_hard_regs;
 232   /* Cached value of get_preferred_alternatives.  */
 233   alternative_mask preferred_alternatives;
 234   /* The following member value is always NULL for a debug insn.  */
 235   struct lra_insn_reg *regs;
 236 };
 237
 238 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
 239
 240 /* Whether the clobber is used temporary in LRA.  */
 241 #define LRA_TEMP_CLOBBER_P(x) \
 242   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 243
 244 /* Cost factor for each additional reload and maximal cost reject for
 245    insn reloads.  One might ask about such strange numbers.  Their
 246    values occurred historically from former reload pass.  */
 247 #define LRA_LOSER_COST_FACTOR 6
 248 #define LRA_MAX_REJECT 600
 249
 250 /* Maximum allowed number of assignment pass iterations after the
 251    latest spill pass when any former reload pseudo was spilled.  It is
 252    for preventing LRA cycling in a bug case.  */
 253 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
 254
 255 /* The maximal number of inheritance/split passes in LRA.  It should
 256    be more 1 in order to perform caller saves transformations and much
 257    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 258    as permitted constraint passes in some complicated cases.  The
 259    first inheritance/split pass has a biggest impact on generated code
 260    quality.  Each subsequent affects generated code in less degree.
 261    For example, the 3rd pass does not change generated SPEC2000 code
 262    at all on x86-64.  */
 263 #define LRA_MAX_INHERITANCE_PASSES 2
 264
 265 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 266     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 267 #error wrong LRA_MAX_INHERITANCE_PASSES value
 268 #endif
 269
 270 /* Analogous macro to the above one but for rematerialization.  */
 271 #define LRA_MAX_REMATERIALIZATION_PASSES 2
 272
 273 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
 274     || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 275 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
 276 #endif
 277
 278 /* lra.c: */
 279
 280 extern FILE *lra_dump_file;
 281
 282 extern bool lra_reg_spill_p;
 283
 284 extern HARD_REG_SET lra_no_alloc_regs;
 285
 286 extern int lra_insn_recog_data_len;
 287 extern lra_insn_recog_data_t *lra_insn_recog_data;
 288
 289 extern int lra_curr_reload_num;
 290
 291 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
 292 extern hashval_t lra_rtx_hash (rtx x);
 293 extern void lra_push_insn (rtx_insn *);
 294 extern void lra_push_insn_by_uid (unsigned int);
 295 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
 296 extern rtx_insn *lra_pop_insn (void);
 297 extern unsigned int lra_insn_stack_length (void);
 298
 299 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
 300                                                  enum reg_class, const char *);
 301 extern void lra_set_regno_unique_value (int);
 302 extern void lra_invalidate_insn_data (rtx_insn *);
 303 extern void lra_set_insn_deleted (rtx_insn *);
 304 extern void lra_delete_dead_insn (rtx_insn *);
 305 extern void lra_emit_add (rtx, rtx, rtx);
 306 extern void lra_emit_move (rtx, rtx);
 307 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 308
 309 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
 310                                    const char *);
 311
 312 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool);
 313 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
 314
 315 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
 316 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
 317 extern void lra_set_used_insn_alternative (rtx_insn *, int);
 318 extern void lra_set_used_insn_alternative_by_uid (int, int);
 319
 320 extern void lra_invalidate_insn_regno_info (rtx_insn *);
 321 extern void lra_update_insn_regno_info (rtx_insn *);
 322 extern struct lra_insn_reg *lra_get_insn_regs (int);
 323
 324 extern void lra_free_copies (void);
 325 extern void lra_create_copy (int, int, int);
 326 extern lra_copy_t lra_get_copy (int);
 327 extern bool lra_former_scratch_p (int);
 328 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
 329 extern void lra_register_new_scratch_op (rtx_insn *, int);
 330
 331 extern int lra_new_regno_start;
 332 extern int lra_constraint_new_regno_start;
 333 extern int lra_bad_spill_regno_start;
 334 extern bitmap_head lra_inheritance_pseudos;
 335 extern bitmap_head lra_split_regs;
 336 extern bitmap_head lra_subreg_reload_pseudos;
 337 extern bitmap_head lra_optional_reload_pseudos;
 338
 339 /* lra-constraints.c: */
 340
 341 extern void lra_init_equiv (void);
 342 extern int lra_constraint_offset (int, machine_mode);
 343
 344 extern int lra_constraint_iter;
 345 extern bool lra_risky_transformations_p;
 346 extern int lra_inheritance_iter;
 347 extern int lra_undo_inheritance_iter;
 348 extern bool lra_constrain_insn (rtx_insn *);
 349 extern bool lra_constraints (bool);
 350 extern void lra_constraints_init (void);
 351 extern void lra_constraints_finish (void);
 352 extern void lra_inheritance (void);
 353 extern bool lra_undo_inheritance (void);
 354
 355 /* lra-lives.c: */
 356
 357 extern int lra_live_max_point;
 358 extern int *lra_point_freq;
 359
 360 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 361
 362 extern int lra_live_range_iter;
 363 extern void lra_create_live_ranges (bool, bool);
 364 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 365 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 366                                                lra_live_range_t);
 367 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 368                                            lra_live_range_t);
 369 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 370 extern void debug (lra_live_range &ref);
 371 extern void debug (lra_live_range *ptr);
 372 extern void lra_debug_live_range_list (lra_live_range_t);
 373 extern void lra_debug_pseudo_live_ranges (int);
 374 extern void lra_debug_live_ranges (void);
 375 extern void lra_clear_live_ranges (void);
 376 extern void lra_live_ranges_init (void);
 377 extern void lra_live_ranges_finish (void);
 378 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 379
 380 /* lra-assigns.c: */
 381
 382 extern int lra_assignment_iter;
 383 extern int lra_assignment_iter_after_spill;
 384 extern void lra_setup_reg_renumber (int, int, bool);
 385 extern bool lra_assign (void);
 386
 387
 388 /* lra-coalesce.c: */
 389
 390 extern int lra_coalesce_iter;
 391 extern bool lra_coalesce (void);
 392
 393 /* lra-spills.c:  */
 394
 395 extern bool lra_need_for_spills_p (void);
 396 extern void lra_spill (void);
 397 extern void lra_final_code_change (void);
 398
 399 /* lra-remat.c:  */
 400
 401 extern int lra_rematerialization_iter;
 402 extern bool lra_remat (void);
 403
 404 /* lra-elimination.c: */
 405
 406 extern void lra_debug_elim_table (void);
 407 extern int lra_get_elimination_hard_regno (int);
 408 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
 409                                  bool, bool, HOST_WIDE_INT, bool);
 410 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, HOST_WIDE_INT);
 411 extern void lra_eliminate (bool, bool);
 412
 413 extern void lra_eliminate_reg_if_possible (rtx *);
 414
 415 \f
 416
 417 /* Return the hard register which given pseudo REGNO assigned to.
 418    Negative value means that the register got memory or we don't know
 419    allocation yet.  */
 420 static inline int
 421 lra_get_regno_hard_regno (int regno)
 422 {
 423   resize_reg_info ();
 424   return reg_renumber[regno];
 425 }
 426
 427 /* Change class of pseudo REGNO to NEW_CLASS.  Print info about it
 428    using TITLE.  Output a new line if NL_P.  */
 429 static void inline
 430 lra_change_class (int regno, enum reg_class new_class,
 431                   const char *title, bool nl_p)
 432 {
 433   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
 434   if (lra_dump_file != NULL)
 435     fprintf (lra_dump_file, "%s class %s for r%d",
 436              title, reg_class_names[new_class], regno);
 437   setup_reg_classes (regno, new_class, NO_REGS, new_class);
 438   if (lra_dump_file != NULL && nl_p)
 439     fprintf (lra_dump_file, "\n");
 440 }
 441
 442 /* Update insn operands which are duplication of NOP operand.  The
 443    insn is represented by its LRA internal representation ID.  */
 444 static inline void
 445 lra_update_dup (lra_insn_recog_data_t id, int nop)
 446 {
 447   int i;
 448   struct lra_static_insn_data *static_id = id->insn_static_data;
 449
 450   for (i = 0; i < static_id->n_dups; i++)
 451     if (static_id->dup_num[i] == nop)
 452       *id->dup_loc[i] = *id->operand_loc[nop];
 453 }
 454
 455 /* Process operator duplications in insn with ID.  We do it after the
 456    operands processing.  Generally speaking, we could do this probably
 457    simultaneously with operands processing because a common practice
 458    is to enumerate the operators after their operands.  */
 459 static inline void
 460 lra_update_operator_dups (lra_insn_recog_data_t id)
 461 {
 462   int i;
 463   struct lra_static_insn_data *static_id = id->insn_static_data;
 464
 465   for (i = 0; i < static_id->n_dups; i++)
 466     {
 467       int ndup = static_id->dup_num[i];
 468
 469       if (static_id->operand[ndup].is_operator)
 470         *id->dup_loc[i] = *id->operand_loc[ndup];
 471     }
 472 }
 473
 474 /* Return info about INSN.  Set up the info if it is not done yet.  */
 475 static inline lra_insn_recog_data_t
 476 lra_get_insn_recog_data (rtx_insn *insn)
 477 {
 478   lra_insn_recog_data_t data;
 479   unsigned int uid = INSN_UID (insn);
 480
 481   if (lra_insn_recog_data_len > (int) uid
 482       && (data = lra_insn_recog_data[uid]) != NULL)
 483     {
 484       /* Check that we did not change insn without updating the insn
 485          info.  */
 486       lra_assert (data->insn == insn
 487                   && (INSN_CODE (insn) < 0
 488                       || data->icode == INSN_CODE (insn)));
 489       return data;
 490     }
 491   return lra_set_insn_recog_data (insn);
 492 }
 493
 494 /* Update offset from pseudos with VAL by INCR.  */
 495 static inline void
 496 lra_update_reg_val_offset (int val, int incr)
 497 {
 498   int i;
 499
 500   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 501     {
 502       if (lra_reg_info[i].val == val)
 503         lra_reg_info[i].offset += incr;
 504     }
 505 }
 506
 507 /* Return true if register content is equal to VAL with OFFSET.  */
 508 static inline bool
 509 lra_reg_val_equal_p (int regno, int val, int offset)
 510 {
 511   if (lra_reg_info[regno].val == val
 512       && lra_reg_info[regno].offset == offset)
 513     return true;
 514
 515   return false;
 516 }
 517
 518 /* Assign value of register FROM to TO.  */
 519 static inline void
 520 lra_assign_reg_val (int from, int to)
 521 {
 522   lra_reg_info[to].val = lra_reg_info[from].val;
 523   lra_reg_info[to].offset = lra_reg_info[from].offset;
 524 }
 525
 526 #endif /* GCC_LRA_INT_H */